Boot log: acer-chromebox-cxi4-puff
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:45:37.342188 lava-dispatcher, installed at version: 2023.08
2 17:45:37.342356 start: 0 validate
3 17:45:37.342467 Start time: 2023-10-09 17:45:37.342458+00:00 (UTC)
4 17:45:37.342571 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:45:37.342678 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:45:37.612390 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:45:37.613012 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:45:37.882078 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:45:37.882720 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:45:41.168317 validate duration: 3.83
12 17:45:41.168578 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:45:41.168671 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:45:41.168746 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:45:41.168862 Not decompressing ramdisk as can be used compressed.
16 17:45:41.168937 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:45:41.168991 saving as /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/ramdisk/rootfs.cpio.gz
18 17:45:41.169045 total size: 8418130 (8 MB)
19 17:45:41.694211 progress 0 % (0 MB)
20 17:45:41.699495 progress 5 % (0 MB)
21 17:45:41.701059 progress 10 % (0 MB)
22 17:45:41.702667 progress 15 % (1 MB)
23 17:45:41.704229 progress 20 % (1 MB)
24 17:45:41.705835 progress 25 % (2 MB)
25 17:45:41.707453 progress 30 % (2 MB)
26 17:45:41.708922 progress 35 % (2 MB)
27 17:45:41.710636 progress 40 % (3 MB)
28 17:45:41.712176 progress 45 % (3 MB)
29 17:45:41.713760 progress 50 % (4 MB)
30 17:45:41.715282 progress 55 % (4 MB)
31 17:45:41.716785 progress 60 % (4 MB)
32 17:45:41.718212 progress 65 % (5 MB)
33 17:45:41.719718 progress 70 % (5 MB)
34 17:45:41.721211 progress 75 % (6 MB)
35 17:45:41.722706 progress 80 % (6 MB)
36 17:45:41.724205 progress 85 % (6 MB)
37 17:45:41.725727 progress 90 % (7 MB)
38 17:45:41.727226 progress 95 % (7 MB)
39 17:45:41.728647 progress 100 % (8 MB)
40 17:45:41.728844 8 MB downloaded in 0.56 s (14.34 MB/s)
41 17:45:41.728981 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:45:41.729176 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:45:41.729244 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:45:41.729311 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:45:41.729439 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:45:41.729502 saving as /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/kernel/bzImage
48 17:45:41.729549 total size: 8490896 (8 MB)
49 17:45:41.729597 No compression specified
50 17:45:41.730610 progress 0 % (0 MB)
51 17:45:41.732135 progress 5 % (0 MB)
52 17:45:41.733742 progress 10 % (0 MB)
53 17:45:41.735302 progress 15 % (1 MB)
54 17:45:41.736889 progress 20 % (1 MB)
55 17:45:41.738459 progress 25 % (2 MB)
56 17:45:41.740012 progress 30 % (2 MB)
57 17:45:41.741590 progress 35 % (2 MB)
58 17:45:41.743120 progress 40 % (3 MB)
59 17:45:41.744646 progress 45 % (3 MB)
60 17:45:41.746221 progress 50 % (4 MB)
61 17:45:41.747735 progress 55 % (4 MB)
62 17:45:41.749230 progress 60 % (4 MB)
63 17:45:41.750774 progress 65 % (5 MB)
64 17:45:41.752265 progress 70 % (5 MB)
65 17:45:41.753767 progress 75 % (6 MB)
66 17:45:41.755262 progress 80 % (6 MB)
67 17:45:41.756750 progress 85 % (6 MB)
68 17:45:41.758242 progress 90 % (7 MB)
69 17:45:41.759734 progress 95 % (7 MB)
70 17:45:41.761236 progress 100 % (8 MB)
71 17:45:41.761323 8 MB downloaded in 0.03 s (254.88 MB/s)
72 17:45:41.761478 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:45:41.761663 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:45:41.761729 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:45:41.761792 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:45:41.761904 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:45:41.761964 saving as /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/modules/modules.tar
79 17:45:41.762011 total size: 250928 (0 MB)
80 17:45:41.762059 Using unxz to decompress xz
81 17:45:41.764956 progress 13 % (0 MB)
82 17:45:41.765240 progress 26 % (0 MB)
83 17:45:41.765433 progress 39 % (0 MB)
84 17:45:41.767043 progress 52 % (0 MB)
85 17:45:41.768594 progress 65 % (0 MB)
86 17:45:41.770255 progress 78 % (0 MB)
87 17:45:41.771850 progress 91 % (0 MB)
88 17:45:41.773350 progress 100 % (0 MB)
89 17:45:41.778176 0 MB downloaded in 0.02 s (14.81 MB/s)
90 17:45:41.778382 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:45:41.778626 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:45:41.778711 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:45:41.778794 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:45:41.778869 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:45:41.778943 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:45:41.779134 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e
98 17:45:41.779261 makedir: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin
99 17:45:41.779373 makedir: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/tests
100 17:45:41.779469 makedir: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/results
101 17:45:41.779576 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-add-keys
102 17:45:41.779689 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-add-sources
103 17:45:41.779790 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-background-process-start
104 17:45:41.779888 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-background-process-stop
105 17:45:41.779988 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-common-functions
106 17:45:41.780085 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-echo-ipv4
107 17:45:41.780181 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-install-packages
108 17:45:41.780275 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-installed-packages
109 17:45:41.780369 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-os-build
110 17:45:41.780464 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-probe-channel
111 17:45:41.780558 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-probe-ip
112 17:45:41.780655 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-target-ip
113 17:45:41.780751 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-target-mac
114 17:45:41.780847 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-target-storage
115 17:45:41.780946 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-case
116 17:45:41.781041 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-event
117 17:45:41.781135 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-feedback
118 17:45:41.781235 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-raise
119 17:45:41.781327 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-reference
120 17:45:41.781446 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-runner
121 17:45:41.781553 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-set
122 17:45:41.781648 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-test-shell
123 17:45:41.781746 Updating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-install-packages (oe)
124 17:45:41.781869 Updating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/bin/lava-installed-packages (oe)
125 17:45:41.781962 Creating /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/environment
126 17:45:41.782043 LAVA metadata
127 17:45:41.782103 - LAVA_JOB_ID=11712589
128 17:45:41.782157 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:45:41.782241 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:45:41.782297 skipped lava-vland-overlay
131 17:45:41.782356 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:45:41.782419 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:45:41.782468 skipped lava-multinode-overlay
134 17:45:41.782526 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:45:41.782589 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:45:41.782646 Loading test definitions
137 17:45:41.782718 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:45:41.782778 Using /lava-11712589 at stage 0
139 17:45:41.783016 uuid=11712589_1.4.2.3.1 testdef=None
140 17:45:41.783088 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:45:41.783161 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:45:41.783588 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:45:41.783757 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:45:41.784252 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:45:41.784428 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:45:41.784939 runner path: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/0/tests/0_dmesg test_uuid 11712589_1.4.2.3.1
149 17:45:41.785072 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:45:41.785261 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:45:41.785318 Using /lava-11712589 at stage 1
153 17:45:41.785573 uuid=11712589_1.4.2.3.5 testdef=None
154 17:45:41.785642 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:45:41.785705 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:45:41.786064 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:45:41.786233 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:45:41.786735 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:45:41.786942 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:45:41.787483 runner path: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/1/tests/1_bootrr test_uuid 11712589_1.4.2.3.5
163 17:45:41.787614 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:45:41.787775 Creating lava-test-runner.conf files
166 17:45:41.787822 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/0 for stage 0
167 17:45:41.787890 - 0_dmesg
168 17:45:41.787954 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712589/lava-overlay-te07d_3e/lava-11712589/1 for stage 1
169 17:45:41.788023 - 1_bootrr
170 17:45:41.788098 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:45:41.788166 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:45:41.794862 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:45:41.794965 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:45:41.795044 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:45:41.795119 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:45:41.795216 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:45:41.959396 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:45:41.959674 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:45:41.959786 extracting modules file /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712589/extract-overlay-ramdisk-dvflnxqj/ramdisk
180 17:45:41.968669 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:45:41.968770 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:45:41.968845 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712589/compress-overlay-uhgo1fu9/overlay-1.4.2.4.tar.gz to ramdisk
183 17:45:41.968902 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712589/compress-overlay-uhgo1fu9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712589/extract-overlay-ramdisk-dvflnxqj/ramdisk
184 17:45:41.975240 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:45:41.975341 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:45:41.975420 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:45:41.975494 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:45:41.975557 Building ramdisk /var/lib/lava/dispatcher/tmp/11712589/extract-overlay-ramdisk-dvflnxqj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712589/extract-overlay-ramdisk-dvflnxqj/ramdisk
189 17:45:42.030095 >> 49788 blocks
190 17:45:42.763011 rename /var/lib/lava/dispatcher/tmp/11712589/extract-overlay-ramdisk-dvflnxqj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/ramdisk/ramdisk.cpio.gz
191 17:45:42.763319 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:45:42.763433 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:45:42.763517 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:45:42.763594 No mkimage arch provided, not using FIT.
195 17:45:42.763670 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:45:42.763738 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:45:42.763823 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:45:42.763897 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:45:42.763962 No LXC device requested
200 17:45:42.764029 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:45:42.764102 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:45:42.764172 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:45:42.764235 Checking files for TFTP limit of 4294967296 bytes.
204 17:45:42.764557 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:45:42.764635 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:45:42.764702 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:45:42.764791 substitutions:
208 17:45:42.764843 - {DTB}: None
209 17:45:42.764893 - {INITRD}: 11712589/tftp-deploy-xplj5qb3/ramdisk/ramdisk.cpio.gz
210 17:45:42.764941 - {KERNEL}: 11712589/tftp-deploy-xplj5qb3/kernel/bzImage
211 17:45:42.764986 - {LAVA_MAC}: None
212 17:45:42.765031 - {PRESEED_CONFIG}: None
213 17:45:42.765075 - {PRESEED_LOCAL}: None
214 17:45:42.765120 - {RAMDISK}: 11712589/tftp-deploy-xplj5qb3/ramdisk/ramdisk.cpio.gz
215 17:45:42.765165 - {ROOT_PART}: None
216 17:45:42.765210 - {ROOT}: None
217 17:45:42.765260 - {SERVER_IP}: 192.168.201.1
218 17:45:42.765303 - {TEE}: None
219 17:45:42.765346 Parsed boot commands:
220 17:45:42.765394 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:45:42.765549 Parsed boot commands: tftpboot 192.168.201.1 11712589/tftp-deploy-xplj5qb3/kernel/bzImage 11712589/tftp-deploy-xplj5qb3/kernel/cmdline 11712589/tftp-deploy-xplj5qb3/ramdisk/ramdisk.cpio.gz
222 17:45:42.765626 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:45:42.765695 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:45:42.765764 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:45:42.765831 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:45:42.765885 Not connected, no need to disconnect.
227 17:45:42.765945 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:45:42.766037 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:45:42.766089 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-10'
230 17:45:42.768468 Setting prompt string to ['lava-test: # ']
231 17:45:42.768696 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:45:42.768782 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:45:42.768856 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:45:42.768937 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:45:42.769097 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-10' '--port=1' '--command=reboot'
236 17:45:49.463100 >> Command sent successfully.
237 17:45:49.465443 Returned 0 in 6 seconds
238 17:45:49.565809 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
240 17:45:49.566127 end: 2.2.2 reset-device (duration 00:00:07) [common]
241 17:45:49.566216 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
242 17:45:49.566288 Setting prompt string to 'Starting depthcharge on Kaisa...'
243 17:45:49.566346 Changing prompt to 'Starting depthcharge on Kaisa...'
244 17:45:49.566404 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
245 17:45:49.566633 [Enter `^Ec?' for help]
246 17:45:49.863344 �
247 17:45:49.863523
248 17:45:49.874002 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
249 17:45:49.878927 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
250 17:45:49.884306 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
251 17:45:49.889824 CPU: AES supported, TXT NOT supported, VT supported
252 17:45:49.894221 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
253 17:45:49.899422 PCH: device id 0285 (rev 00) is Cometlake-U Base
254 17:45:49.904204 IGD: device id 9baa (rev 04) is CometLake ULT GT2
255 17:45:49.907578 VBOOT: Loading verstage.
256 17:45:49.912451 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 17:45:49.917603 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 17:45:49.922989 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 17:45:49.925954 CBFS: Locating 'fallback/verstage'
260 17:45:49.930089 CBFS: Found @ offset 10c240 size 1152c
261 17:45:49.931379
262 17:45:49.931435
263 17:45:49.942514 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
264 17:45:49.956673 Probing TPM: . done!
265 17:45:49.959393 TPM ready after 0 ms
266 17:45:49.964096 Connected to device vid:did:rid of 1ae0:0028:00
267 17:45:49.974778 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
268 17:45:49.978778 Initialized TPM device CR50 revision 0
269 17:45:50.047581 tlcl_send_startup: Startup return code is 0
270 17:45:50.049541 TPM: setup succeeded
271 17:45:50.062534 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 17:45:50.075292 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 17:45:50.083421 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 17:45:50.095929 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 17:45:50.099534 Chrome EC: UHEPI supported
276 17:45:50.101070 Phase 1
277 17:45:50.105661 FMAP: area GBB found @ c05000 (12288 bytes)
278 17:45:50.112461 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 17:45:50.118664 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 17:45:50.122278 Recovery requested (1009000e)
281 17:45:50.128090 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 17:45:50.137005 tlcl_extend: response is 0
283 17:45:50.142358 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 17:45:50.152047 tlcl_extend: response is 0
285 17:45:50.157306 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 17:45:50.160461 CBFS: Locating 'fallback/romstage'
287 17:45:50.164248 CBFS: Found @ offset 80 size 1607c
288 17:45:50.170448 BS: verstage times (exec / console): total (unknown) / 119 ms
289 17:45:50.171822
290 17:45:50.172102
291 17:45:50.182670 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
292 17:45:50.188581 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
293 17:45:50.194400 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
294 17:45:50.198571 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
295 17:45:50.202561 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
296 17:45:50.206815 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
297 17:45:50.211026 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
298 17:45:50.213122 TCO_STS: 0000 0000
299 17:45:50.216844 GEN_PMCON: e0015038 00000200
300 17:45:50.219158 GBLRST_CAUSE: 00000000 00000000
301 17:45:50.221525 prev_sleep_state 5
302 17:45:50.225006 Boot Count incremented to 1375
303 17:45:50.230275 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 17:45:50.233087 CBFS: Locating 'fspm.bin'
305 17:45:50.237121 CBFS: Found @ offset 66fc0 size 71000
306 17:45:50.240962 Chrome EC: UHEPI supported
307 17:45:50.247584 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
308 17:45:50.252254 Probing TPM: done!
309 17:45:50.257541 Connected to device vid:did:rid of 1ae0:0028:00
310 17:45:50.267533 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
311 17:45:50.271227 Initialized TPM device CR50 revision 0
312 17:45:50.284436 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 17:45:50.291404 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
314 17:45:50.293865 MRC cache found, size 1948
315 17:45:50.296357 bootmode is set to: 2
316 17:45:50.299163 PRMRR disabled by config.
317 17:45:50.304408 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
318 17:45:50.307972 SPD_CACHE: cache found, size 0x1000
319 17:45:50.311381 No memory dimm at address 50
320 17:45:50.314542 SPD_CACHE: DIMM0 is not present
321 17:45:50.320240 SPD_CACHE: DIMM1 is the same
322 17:45:50.321321 SPD @ 0x52
323 17:45:50.324691 SPD: module type is DDR4
324 17:45:50.328791 SPD: module part number is HMA851S6CJR6N-VK
325 17:45:50.334754 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
326 17:45:50.339118 SPD: device width 16 bits, bus width 64 bits
327 17:45:50.343222 SPD: module size is 4096 MB (per channel)
328 17:45:50.346729 memory slot: 2 configuration done.
329 17:45:50.395874 CBMEM:
330 17:45:50.398750 IMD: root @ 0x99fff000 254 entries.
331 17:45:50.402430 IMD: root @ 0x99ffec00 62 entries.
332 17:45:50.406878 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 17:45:50.411535 WARNING: RO_VPD is uninitialized or empty.
334 17:45:50.415540 FMAP: area RW_VPD found @ af8000 (8192 bytes)
335 17:45:50.419167 External stage cache:
336 17:45:50.423792 IMD: root @ 0x9abff000 254 entries.
337 17:45:50.426547 IMD: root @ 0x9abfec00 62 entries.
338 17:45:50.441218 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
339 17:45:50.450726 tlcl_write: response is 0
340 17:45:50.454782 MRC: TPM MRC hash updated successfully.
341 17:45:50.456495 1 DIMMs found
342 17:45:50.457848 SMM Memory Map
343 17:45:50.460903 SMRAM : 0x9a000000 0x1000000
344 17:45:50.464865 Subregion 0: 0x9a000000 0xa00000
345 17:45:50.468138 Subregion 1: 0x9aa00000 0x200000
346 17:45:50.471444 Subregion 2: 0x9ac00000 0x400000
347 17:45:50.473862 top_of_ram = 0x9a000000
348 17:45:50.479270 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
349 17:45:50.485147 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
350 17:45:50.489566 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 17:45:50.495244 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
352 17:45:50.498077 CBFS: Locating 'fallback/postcar'
353 17:45:50.501882 CBFS: Found @ offset 1076c0 size 4b28
354 17:45:50.508295 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
355 17:45:50.518494 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
356 17:45:50.523669 Processing 173 relocs. Offset value of 0x97c0c000
357 17:45:50.531329 BS: romstage times (exec / console): total (unknown) / 267 ms
358 17:45:50.532428
359 17:45:50.532484
360 17:45:50.542839 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
361 17:45:50.548160 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 17:45:50.551483 CBFS: Locating 'fallback/ramstage'
363 17:45:50.555806 CBFS: Found @ offset 44e00 size 1e0ef
364 17:45:50.562719 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
365 17:45:50.593293 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
366 17:45:50.598359 Processing 4604 relocs. Offset value of 0x98da5000
367 17:45:50.604469 BS: postcar times (exec / console): total (unknown) / 43 ms
368 17:45:50.604536
369 17:45:50.604756
370 17:45:50.615283 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
371 17:45:50.617149 Normal boot
372 17:45:50.621955 cse_lite: Skip switching to RW in the recovery path
373 17:45:50.627565 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
374 17:45:50.632752 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
375 17:45:50.636821 CBFS: Locating 'cpu_microcode_blob.bin'
376 17:45:50.640307 CBFS: Found @ offset 16180 size 2ec00
377 17:45:50.644994 microcode: sig=0xa0660 pf=0x80 revision=0xc9
378 17:45:50.647279 Skip microcode update
379 17:45:50.652271 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 17:45:50.654823 CBFS: Locating 'fsps.bin'
381 17:45:50.659505 CBFS: Found @ offset d8fc0 size 2e69d
382 17:45:50.695046 Detected 2 core, 2 thread CPU.
383 17:45:50.697288 Setting up SMI for CPU
384 17:45:50.699390 IED base = 0x9ac00000
385 17:45:50.701711 IED size = 0x00400000
386 17:45:50.704313 Will perform SMM setup.
387 17:45:50.708799 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
388 17:45:50.717180 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 17:45:50.722020 Processing 16 relocs. Offset value of 0x00030000
390 17:45:50.724843 Attempting to start 1 APs
391 17:45:50.728485 Waiting for 10ms after sending INIT.
392 17:45:50.742322 Waiting for 1st SIPI to complete...done.
393 17:45:50.744750 AP: slot 1 apic_id 2.
394 17:45:50.748414 Waiting for 2nd SIPI to complete...done.
395 17:45:50.757394 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 17:45:50.761801 Processing 13 relocs. Offset value of 0x00038000
397 17:45:50.768994 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
398 17:45:50.772222 Installing SMM handler to 0x9a000000
399 17:45:50.780881 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
400 17:45:50.785539 Processing 617 relocs. Offset value of 0x9a010000
401 17:45:50.793774 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
402 17:45:50.798648 Processing 13 relocs. Offset value of 0x9a008000
403 17:45:50.804702 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
404 17:45:50.811726 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
405 17:45:50.815296 Clearing SMI status registers
406 17:45:50.816331 SMI_STS: PM1
407 17:45:50.818387 PM1_STS: PWRBTN
408 17:45:50.820708 New SMBASE 0x9a000000
409 17:45:50.823679 In relocation handler: CPU 0
410 17:45:50.827504 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
411 17:45:50.832737 Writing SMRR. base = 0x9a000006, mask=0xff000800
412 17:45:50.834868 Relocation complete.
413 17:45:50.836907 New SMBASE 0x99fffc00
414 17:45:50.840032 In relocation handler: CPU 1
415 17:45:50.844058 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
416 17:45:50.849196 Writing SMRR. base = 0x9a000006, mask=0xff000800
417 17:45:50.850644 Relocation complete.
418 17:45:50.853217 Initializing CPU #0
419 17:45:50.856344 CPU: vendor Intel device a0660
420 17:45:50.859989 CPU: family 06, model a6, stepping 00
421 17:45:50.862569 Clearing out pending MCEs
422 17:45:50.865820 Setting up local APIC...
423 17:45:50.867386 apic_id: 0x00 done.
424 17:45:50.870337 Turbo is available but hidden
425 17:45:50.872477 Turbo is unavailable
426 17:45:50.874762 VMX status: enabled
427 17:45:50.878327 IA32_FEATURE_CONTROL status: locked
428 17:45:50.880234 Skip microcode update
429 17:45:50.883129 CPU #0 initialized
430 17:45:50.885094 Initializing CPU #1
431 17:45:50.888207 CPU: vendor Intel device a0660
432 17:45:50.891613 CPU: family 06, model a6, stepping 00
433 17:45:50.894699 Clearing out pending MCEs
434 17:45:50.896955 Setting up local APIC...
435 17:45:50.898993 apic_id: 0x02 done.
436 17:45:50.900951 VMX status: enabled
437 17:45:50.904852 IA32_FEATURE_CONTROL status: locked
438 17:45:50.906974 Skip microcode update
439 17:45:50.909126 CPU #1 initialized
440 17:45:50.913423 bsp_do_flight_plan done after 160 msecs.
441 17:45:50.915396 Enabling SMIs.
442 17:45:50.916406 Locking SMM.
443 17:45:50.923301 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms
444 17:45:50.933741 Waiting for DisplayPort
445 17:45:53.953955 DisplayPort not ready after 3000ms. Abort.
446 17:45:53.960007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 17:45:53.962436 CBFS: Locating 'vbt.bin'
448 17:45:53.965907 CBFS: Found @ offset 66a80 size 49e
449 17:45:53.970824 Found a VBT of 4608 bytes after decompression
450 17:45:53.972886 psys_pmax = 182W
451 17:45:54.021111 Display FSP Version Info HOB
452 17:45:54.024543 Reference Code - CPU = 9.0.1e.30
453 17:45:54.026876 uCode Version = 0.0.0.ca
454 17:45:54.030551 TXT ACM version = ff.ff.ff.ffff
455 17:45:54.033515 Reference Code - ME = 9.0.1e.30
456 17:45:54.035853 MEBx version = 0.0.0.0
457 17:45:54.039108 ME Firmware Version = Consumer SKU
458 17:45:54.042785 Reference Code - CML PCH = 9.0.1e.30
459 17:45:54.045743 PCH-CRID Status = Disabled
460 17:45:54.049907 PCH-CRID Original Value = ff.ff.ff.ffff
461 17:45:54.053054 PCH-CRID New Value = ff.ff.ff.ffff
462 17:45:54.056466 OPROM - RST - RAID = ff.ff.ff.ffff
463 17:45:54.060860 ChipsetInit Base Version = ff.ff.ff.ffff
464 17:45:54.065508 ChipsetInit Oem Version = ff.ff.ff.ffff
465 17:45:54.069478 Reference Code - SA - System Agent = 9.0.1e.30
466 17:45:54.072413 Reference Code - MRC = 0.0.0.2d
467 17:45:54.075674 SA - PCIe Version = 9.0.1e.30
468 17:45:54.078301 SA-CRID Status = Disabled
469 17:45:54.081629 SA-CRID Original Value = 0.0.0.0
470 17:45:54.084515 SA-CRID New Value = 0.0.0.0
471 17:45:54.087886 OPROM - VBIOS = ff.ff.ff.ffff
472 17:45:54.091438 Found PCIe Root Port #7 at PCI: 00:1c.0.
473 17:45:54.098757 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
474 17:45:54.110517 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
475 17:45:54.122822 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
476 17:45:54.134760 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
477 17:45:54.140900 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3065 / 140 ms
478 17:45:54.142424 RTC Init
479 17:45:54.145950 Set power on after power failure.
480 17:45:54.148653 Disabling Deep S3
481 17:45:54.150240 Disabling Deep S3
482 17:45:54.151591 Disabling Deep S4
483 17:45:54.153388 Disabling Deep S4
484 17:45:54.155127 Disabling Deep S5
485 17:45:54.156989 Disabling Deep S5
486 17:45:54.163259 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
487 17:45:54.166050 Enumerating buses...
488 17:45:54.169713 Show all devs... Before device enumeration.
489 17:45:54.172254 Root Device: enabled 1
490 17:45:54.174574 CPU_CLUSTER: 0: enabled 1
491 17:45:54.177142 DOMAIN: 0000: enabled 1
492 17:45:54.179078 APIC: 00: enabled 1
493 17:45:54.181626 PCI: 00:00.0: enabled 1
494 17:45:54.184182 PCI: 00:02.0: enabled 1
495 17:45:54.187258 PCI: 00:04.0: enabled 1
496 17:45:54.189362 PCI: 00:05.0: enabled 0
497 17:45:54.191547 PCI: 00:12.0: enabled 1
498 17:45:54.193824 PCI: 00:12.5: enabled 0
499 17:45:54.196056 PCI: 00:12.6: enabled 0
500 17:45:54.198954 PCI: 00:14.0: enabled 1
501 17:45:54.201210 PCI: 00:14.1: enabled 0
502 17:45:54.203718 PCI: 00:14.3: enabled 1
503 17:45:54.205991 PCI: 00:14.5: enabled 1
504 17:45:54.208560 PCI: 00:15.0: enabled 0
505 17:45:54.211013 PCI: 00:15.1: enabled 0
506 17:45:54.213574 PCI: 00:15.2: enabled 1
507 17:45:54.215883 PCI: 00:15.3: enabled 1
508 17:45:54.217920 PCI: 00:16.0: enabled 1
509 17:45:54.220786 PCI: 00:16.1: enabled 0
510 17:45:54.223228 PCI: 00:16.2: enabled 0
511 17:45:54.225534 PCI: 00:16.3: enabled 0
512 17:45:54.227801 PCI: 00:16.4: enabled 0
513 17:45:54.230480 PCI: 00:16.5: enabled 0
514 17:45:54.232613 PCI: 00:17.0: enabled 1
515 17:45:54.235355 PCI: 00:19.0: enabled 1
516 17:45:54.237737 PCI: 00:19.1: enabled 0
517 17:45:54.240279 PCI: 00:19.2: enabled 0
518 17:45:54.242766 PCI: 00:1a.0: enabled 1
519 17:45:54.244711 PCI: 00:1c.0: enabled 0
520 17:45:54.247869 PCI: 00:1c.1: enabled 0
521 17:45:54.250043 PCI: 00:1c.2: enabled 0
522 17:45:54.252299 PCI: 00:1c.3: enabled 0
523 17:45:54.254733 PCI: 00:1c.4: enabled 0
524 17:45:54.257415 PCI: 00:1c.5: enabled 0
525 17:45:54.259739 PCI: 00:1c.0: enabled 1
526 17:45:54.262166 PCI: 00:1c.7: enabled 0
527 17:45:54.264485 PCI: 00:1d.0: enabled 1
528 17:45:54.267033 PCI: 00:1d.1: enabled 0
529 17:45:54.269465 PCI: 00:1d.2: enabled 1
530 17:45:54.271735 PCI: 00:1d.3: enabled 0
531 17:45:54.274069 PCI: 00:1d.4: enabled 0
532 17:45:54.276456 PCI: 00:1d.5: enabled 1
533 17:45:54.279464 PCI: 00:1e.0: enabled 1
534 17:45:54.281939 PCI: 00:1e.1: enabled 0
535 17:45:54.284034 PCI: 00:1e.2: enabled 1
536 17:45:54.286225 PCI: 00:1e.3: enabled 0
537 17:45:54.288741 PCI: 00:1f.0: enabled 1
538 17:45:54.291039 PCI: 00:1f.1: enabled 1
539 17:45:54.293920 PCI: 00:1f.2: enabled 1
540 17:45:54.296119 PCI: 00:1f.3: enabled 1
541 17:45:54.298260 PCI: 00:1f.4: enabled 1
542 17:45:54.301055 PCI: 00:1f.5: enabled 1
543 17:45:54.303752 PCI: 00:1f.6: enabled 0
544 17:45:54.305925 GENERIC: 0.0: enabled 1
545 17:45:54.308052 USB0 port 0: enabled 1
546 17:45:54.310633 I2C: 00:4a: enabled 1
547 17:45:54.312792 I2C: 00:4a: enabled 1
548 17:45:54.315029 I2C: 00:1a: enabled 1
549 17:45:54.317280 PCI: 00:00.0: enabled 1
550 17:45:54.320084 PCI: 00:00.0: enabled 1
551 17:45:54.321741 SPI: 00: enabled 1
552 17:45:54.324222 PNP: 0c09.0: enabled 1
553 17:45:54.326424 USB2 port 0: enabled 1
554 17:45:54.329304 USB2 port 1: enabled 1
555 17:45:54.331375 USB2 port 2: enabled 1
556 17:45:54.333065 USB2 port 3: enabled 1
557 17:45:54.336046 USB2 port 5: enabled 1
558 17:45:54.338026 USB2 port 6: enabled 0
559 17:45:54.340302 USB2 port 9: enabled 1
560 17:45:54.342476 USB3 port 0: enabled 1
561 17:45:54.345338 USB3 port 1: enabled 1
562 17:45:54.347498 USB3 port 2: enabled 1
563 17:45:54.349660 USB3 port 3: enabled 1
564 17:45:54.352287 USB3 port 4: enabled 1
565 17:45:54.354609 USB2 port 4: enabled 1
566 17:45:54.357259 USB3 port 5: enabled 1
567 17:45:54.359159 APIC: 02: enabled 1
568 17:45:54.360739 Compare with tree...
569 17:45:54.363182 Root Device: enabled 1
570 17:45:54.365980 CPU_CLUSTER: 0: enabled 1
571 17:45:54.368295 APIC: 00: enabled 1
572 17:45:54.370459 APIC: 02: enabled 1
573 17:45:54.373447 DOMAIN: 0000: enabled 1
574 17:45:54.375485 PCI: 00:00.0: enabled 1
575 17:45:54.378618 PCI: 00:02.0: enabled 1
576 17:45:54.380778 PCI: 00:04.0: enabled 1
577 17:45:54.384126 GENERIC: 0.0: enabled 1
578 17:45:54.386100 PCI: 00:05.0: enabled 0
579 17:45:54.388750 PCI: 00:12.0: enabled 1
580 17:45:54.391560 PCI: 00:12.5: enabled 0
581 17:45:54.394515 PCI: 00:12.6: enabled 0
582 17:45:54.396814 PCI: 00:14.0: enabled 1
583 17:45:54.399235 USB0 port 0: enabled 1
584 17:45:54.402531 USB2 port 0: enabled 1
585 17:45:54.404753 USB2 port 1: enabled 1
586 17:45:54.407598 USB2 port 2: enabled 1
587 17:45:54.410153 USB2 port 3: enabled 1
588 17:45:54.413108 USB2 port 5: enabled 1
589 17:45:54.415840 USB2 port 6: enabled 0
590 17:45:54.418556 USB2 port 9: enabled 1
591 17:45:54.421007 USB3 port 0: enabled 1
592 17:45:54.424350 USB3 port 1: enabled 1
593 17:45:54.427200 USB3 port 2: enabled 1
594 17:45:54.429405 USB3 port 3: enabled 1
595 17:45:54.432330 USB3 port 4: enabled 1
596 17:45:54.434678 USB2 port 4: enabled 1
597 17:45:54.437636 USB3 port 5: enabled 1
598 17:45:54.440152 PCI: 00:14.1: enabled 0
599 17:45:54.443049 PCI: 00:14.3: enabled 1
600 17:45:54.445125 PCI: 00:14.5: enabled 1
601 17:45:54.447859 PCI: 00:15.0: enabled 0
602 17:45:54.451064 PCI: 00:15.1: enabled 0
603 17:45:54.453325 PCI: 00:15.2: enabled 1
604 17:45:54.455587 I2C: 00:4a: enabled 1
605 17:45:54.458226 PCI: 00:15.3: enabled 1
606 17:45:54.460990 I2C: 00:4a: enabled 1
607 17:45:54.463863 PCI: 00:16.0: enabled 1
608 17:45:54.465932 PCI: 00:16.1: enabled 0
609 17:45:54.468975 PCI: 00:16.2: enabled 0
610 17:45:54.471421 PCI: 00:16.3: enabled 0
611 17:45:54.473959 PCI: 00:16.4: enabled 0
612 17:45:54.477088 PCI: 00:16.5: enabled 0
613 17:45:54.479117 PCI: 00:17.0: enabled 1
614 17:45:54.482084 PCI: 00:19.0: enabled 1
615 17:45:54.484628 I2C: 00:1a: enabled 1
616 17:45:54.487105 PCI: 00:19.1: enabled 0
617 17:45:54.490198 PCI: 00:19.2: enabled 0
618 17:45:54.492267 PCI: 00:1a.0: enabled 1
619 17:45:54.495241 PCI: 00:1c.0: enabled 1
620 17:45:54.497909 PCI: 00:00.0: enabled 1
621 17:45:54.500356 PCI: 00:1e.0: enabled 1
622 17:45:54.503166 PCI: 00:1e.1: enabled 0
623 17:45:54.505740 PCI: 00:1e.2: enabled 1
624 17:45:54.508108 SPI: 00: enabled 1
625 17:45:54.510461 PCI: 00:1e.3: enabled 0
626 17:45:54.512973 PCI: 00:1f.0: enabled 1
627 17:45:54.516052 PNP: 0c09.0: enabled 1
628 17:45:54.518203 PCI: 00:1f.1: enabled 1
629 17:45:54.521122 PCI: 00:1f.2: enabled 1
630 17:45:54.524098 PCI: 00:1f.3: enabled 1
631 17:45:54.526536 PCI: 00:1f.4: enabled 1
632 17:45:54.528740 PCI: 00:1f.5: enabled 1
633 17:45:54.531727 PCI: 00:1f.6: enabled 0
634 17:45:54.533804 Root Device scanning...
635 17:45:54.537474 scan_static_bus for Root Device
636 17:45:54.539860 CPU_CLUSTER: 0 enabled
637 17:45:54.542470 DOMAIN: 0000 enabled
638 17:45:54.544422 DOMAIN: 0000 scanning...
639 17:45:54.547881 PCI: pci_scan_bus for bus 00
640 17:45:54.551122 PCI: 00:00.0 [8086/0000] ops
641 17:45:54.554139 PCI: 00:00.0 [8086/9b71] enabled
642 17:45:54.557451 PCI: 00:02.0 [8086/0000] bus ops
643 17:45:54.560909 PCI: 00:02.0 [8086/9baa] enabled
644 17:45:54.563935 PCI: 00:04.0 [8086/0000] bus ops
645 17:45:54.567012 PCI: 00:04.0 [8086/1903] enabled
646 17:45:54.570717 PCI: 00:08.0 [8086/1911] enabled
647 17:45:54.574037 PCI: 00:12.0 [8086/02f9] enabled
648 17:45:54.577336 PCI: 00:14.0 [8086/0000] bus ops
649 17:45:54.580772 PCI: 00:14.0 [8086/02ed] enabled
650 17:45:54.584790 PCI: 00:14.2 [8086/02ef] enabled
651 17:45:54.587774 PCI: 00:14.3 [8086/02f0] enabled
652 17:45:54.590197 PCI: 00:14.5 [8086/0000] ops
653 17:45:54.593388 PCI: 00:14.5 [8086/02f5] enabled
654 17:45:54.597334 PCI: 00:15.0 [8086/0000] bus ops
655 17:45:54.600558 PCI: 00:15.0 [8086/02e8] disabled
656 17:45:54.603503 PCI: 00:15.2 [8086/0000] bus ops
657 17:45:54.606785 PCI: 00:15.2 [8086/02ea] enabled
658 17:45:54.609879 PCI: 00:15.3 [8086/0000] bus ops
659 17:45:54.613784 PCI: 00:15.3 [8086/02eb] enabled
660 17:45:54.616974 PCI: 00:16.0 [8086/0000] ops
661 17:45:54.619705 PCI: 00:16.0 [8086/02e0] enabled
662 17:45:54.625899 PCI: Static device PCI: 00:17.0 not found, disabling it.
663 17:45:54.628968 PCI: 00:19.0 [8086/0000] bus ops
664 17:45:54.632216 PCI: 00:19.0 [8086/02c5] enabled
665 17:45:54.634827 PCI: 00:1a.0 [8086/0000] ops
666 17:45:54.638660 PCI: 00:1a.0 [8086/02c4] enabled
667 17:45:54.641779 PCI: 00:1c.0 [8086/0000] bus ops
668 17:45:54.645109 PCI: 00:1c.0 [8086/02be] enabled
669 17:45:54.648097 PCI: 00:1e.0 [8086/0000] ops
670 17:45:54.651387 PCI: 00:1e.0 [8086/02a8] enabled
671 17:45:54.654659 PCI: 00:1e.2 [8086/0000] bus ops
672 17:45:54.658252 PCI: 00:1e.2 [8086/02aa] enabled
673 17:45:54.661151 PCI: 00:1f.0 [8086/0000] bus ops
674 17:45:54.664554 PCI: 00:1f.0 [8086/0285] enabled
675 17:45:54.670334 PCI: Static device PCI: 00:1f.1 not found, disabling it.
676 17:45:54.675923 PCI: Static device PCI: 00:1f.2 not found, disabling it.
677 17:45:54.679096 PCI: 00:1f.3 [8086/0000] bus ops
678 17:45:54.682665 PCI: 00:1f.3 [8086/02c8] enabled
679 17:45:54.685542 PCI: 00:1f.4 [8086/0000] bus ops
680 17:45:54.689301 PCI: 00:1f.4 [8086/02a3] enabled
681 17:45:54.692355 PCI: 00:1f.5 [8086/0000] bus ops
682 17:45:54.695516 PCI: 00:1f.5 [8086/02a4] enabled
683 17:45:54.698725 PCI: Leftover static devices:
684 17:45:54.700410 PCI: 00:05.0
685 17:45:54.701448 PCI: 00:12.5
686 17:45:54.703203 PCI: 00:12.6
687 17:45:54.704091 PCI: 00:14.1
688 17:45:54.705516 PCI: 00:15.1
689 17:45:54.707292 PCI: 00:16.1
690 17:45:54.708428 PCI: 00:16.2
691 17:45:54.710050 PCI: 00:16.3
692 17:45:54.711131 PCI: 00:16.4
693 17:45:54.713045 PCI: 00:16.5
694 17:45:54.713807 PCI: 00:17.0
695 17:45:54.715055 PCI: 00:19.1
696 17:45:54.716608 PCI: 00:19.2
697 17:45:54.717869 PCI: 00:1e.1
698 17:45:54.719032 PCI: 00:1e.3
699 17:45:54.720828 PCI: 00:1f.1
700 17:45:54.721985 PCI: 00:1f.2
701 17:45:54.723561 PCI: 00:1f.6
702 17:45:54.726767 PCI: Check your devicetree.cb.
703 17:45:54.729167 PCI: 00:02.0 scanning...
704 17:45:54.732724 scan_generic_bus for PCI: 00:02.0
705 17:45:54.736988 scan_generic_bus for PCI: 00:02.0 done
706 17:45:54.741292 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
707 17:45:54.743830 PCI: 00:04.0 scanning...
708 17:45:54.747549 scan_generic_bus for PCI: 00:04.0
709 17:45:54.751725 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
710 17:45:54.756466 scan_generic_bus for PCI: 00:04.0 done
711 17:45:54.760279 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
712 17:45:54.763153 PCI: 00:14.0 scanning...
713 17:45:54.766443 scan_static_bus for PCI: 00:14.0
714 17:45:54.769116 USB0 port 0 enabled
715 17:45:54.771396 USB0 port 0 scanning...
716 17:45:54.774576 scan_static_bus for USB0 port 0
717 17:45:54.776797 USB2 port 0 enabled
718 17:45:54.778733 USB2 port 1 enabled
719 17:45:54.780704 USB2 port 2 enabled
720 17:45:54.782823 USB2 port 3 enabled
721 17:45:54.785390 USB2 port 5 enabled
722 17:45:54.786916 USB2 port 6 disabled
723 17:45:54.789044 USB2 port 9 enabled
724 17:45:54.790907 USB3 port 0 enabled
725 17:45:54.793179 USB3 port 1 enabled
726 17:45:54.795051 USB3 port 2 enabled
727 17:45:54.797782 USB3 port 3 enabled
728 17:45:54.799193 USB3 port 4 enabled
729 17:45:54.801414 USB2 port 4 enabled
730 17:45:54.803148 USB3 port 5 enabled
731 17:45:54.805689 USB2 port 0 scanning...
732 17:45:54.809319 scan_static_bus for USB2 port 0
733 17:45:54.813335 scan_static_bus for USB2 port 0 done
734 17:45:54.817454 scan_bus: bus USB2 port 0 finished in 6 msecs
735 17:45:54.820010 USB2 port 1 scanning...
736 17:45:54.823789 scan_static_bus for USB2 port 1
737 17:45:54.827416 scan_static_bus for USB2 port 1 done
738 17:45:54.831828 scan_bus: bus USB2 port 1 finished in 6 msecs
739 17:45:54.834215 USB2 port 2 scanning...
740 17:45:54.837898 scan_static_bus for USB2 port 2
741 17:45:54.841399 scan_static_bus for USB2 port 2 done
742 17:45:54.846255 scan_bus: bus USB2 port 2 finished in 6 msecs
743 17:45:54.848727 USB2 port 3 scanning...
744 17:45:54.852142 scan_static_bus for USB2 port 3
745 17:45:54.855733 scan_static_bus for USB2 port 3 done
746 17:45:54.860641 scan_bus: bus USB2 port 3 finished in 6 msecs
747 17:45:54.862967 USB2 port 5 scanning...
748 17:45:54.866522 scan_static_bus for USB2 port 5
749 17:45:54.870029 scan_static_bus for USB2 port 5 done
750 17:45:54.874559 scan_bus: bus USB2 port 5 finished in 6 msecs
751 17:45:54.876933 USB2 port 9 scanning...
752 17:45:54.880662 scan_static_bus for USB2 port 9
753 17:45:54.884042 scan_static_bus for USB2 port 9 done
754 17:45:54.888551 scan_bus: bus USB2 port 9 finished in 6 msecs
755 17:45:54.891052 USB3 port 0 scanning...
756 17:45:54.894744 scan_static_bus for USB3 port 0
757 17:45:54.898415 scan_static_bus for USB3 port 0 done
758 17:45:54.902851 scan_bus: bus USB3 port 0 finished in 6 msecs
759 17:45:54.905396 USB3 port 1 scanning...
760 17:45:54.909129 scan_static_bus for USB3 port 1
761 17:45:54.913057 scan_static_bus for USB3 port 1 done
762 17:45:54.917158 scan_bus: bus USB3 port 1 finished in 6 msecs
763 17:45:54.920157 USB3 port 2 scanning...
764 17:45:54.923079 scan_static_bus for USB3 port 2
765 17:45:54.927014 scan_static_bus for USB3 port 2 done
766 17:45:54.931196 scan_bus: bus USB3 port 2 finished in 6 msecs
767 17:45:54.934688 USB3 port 3 scanning...
768 17:45:54.937286 scan_static_bus for USB3 port 3
769 17:45:54.941065 scan_static_bus for USB3 port 3 done
770 17:45:54.945457 scan_bus: bus USB3 port 3 finished in 6 msecs
771 17:45:54.948891 USB3 port 4 scanning...
772 17:45:54.951471 scan_static_bus for USB3 port 4
773 17:45:54.955632 scan_static_bus for USB3 port 4 done
774 17:45:54.959876 scan_bus: bus USB3 port 4 finished in 6 msecs
775 17:45:54.962240 USB2 port 4 scanning...
776 17:45:54.965733 scan_static_bus for USB2 port 4
777 17:45:54.969210 scan_static_bus for USB2 port 4 done
778 17:45:54.973894 scan_bus: bus USB2 port 4 finished in 6 msecs
779 17:45:54.976556 USB3 port 5 scanning...
780 17:45:54.980076 scan_static_bus for USB3 port 5
781 17:45:54.983560 scan_static_bus for USB3 port 5 done
782 17:45:54.989473 scan_bus: bus USB3 port 5 finished in 6 msecs
783 17:45:54.992340 scan_static_bus for USB0 port 0 done
784 17:45:54.996884 scan_bus: bus USB0 port 0 finished in 219 msecs
785 17:45:55.000740 scan_static_bus for PCI: 00:14.0 done
786 17:45:55.005283 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
787 17:45:55.007877 PCI: 00:15.2 scanning...
788 17:45:55.011804 scan_generic_bus for PCI: 00:15.2
789 17:45:55.015813 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
790 17:45:55.019827 scan_generic_bus for PCI: 00:15.2 done
791 17:45:55.024743 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
792 17:45:55.027055 PCI: 00:15.3 scanning...
793 17:45:55.031018 scan_generic_bus for PCI: 00:15.3
794 17:45:55.034907 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
795 17:45:55.038810 scan_generic_bus for PCI: 00:15.3 done
796 17:45:55.043151 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
797 17:45:55.045968 PCI: 00:19.0 scanning...
798 17:45:55.049813 scan_generic_bus for PCI: 00:19.0
799 17:45:55.053851 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
800 17:45:55.057846 scan_generic_bus for PCI: 00:19.0 done
801 17:45:55.062374 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
802 17:45:55.064908 PCI: 00:1c.0 scanning...
803 17:45:55.069140 do_pci_scan_bridge for PCI: 00:1c.0
804 17:45:55.071693 PCI: pci_scan_bus for bus 01
805 17:45:55.074870 PCI: 01:00.0 [10ec/8168] ops
806 17:45:55.078407 PCI: 01:00.0 [10ec/8168] enabled
807 17:45:55.081881 Enabling Common Clock Configuration
808 17:45:55.085774 L1 Sub-State supported from root port 28
809 17:45:55.088994 L1 Sub-State Support = 0xf
810 17:45:55.092240 CommonModeRestoreTime = 0x96
811 17:45:55.096164 Power On Value = 0xf, Power On Scale = 0x1
812 17:45:55.097994 ASPM: Enabled L1
813 17:45:55.101801 PCIe: Max_Payload_Size adjusted to 128
814 17:45:55.106625 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
815 17:45:55.109199 PCI: 00:1e.2 scanning...
816 17:45:55.112645 scan_generic_bus for PCI: 00:1e.2
817 17:45:55.117241 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
818 17:45:55.120433 scan_generic_bus for PCI: 00:1e.2 done
819 17:45:55.125407 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
820 17:45:55.128138 PCI: 00:1f.0 scanning...
821 17:45:55.131398 scan_static_bus for PCI: 00:1f.0
822 17:45:55.133440 PNP: 0c09.0 enabled
823 17:45:55.135971 PNP: 0c09.0 scanning...
824 17:45:55.139291 scan_static_bus for PNP: 0c09.0
825 17:45:55.143248 scan_static_bus for PNP: 0c09.0 done
826 17:45:55.147494 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
827 17:45:55.151401 scan_static_bus for PCI: 00:1f.0 done
828 17:45:55.156023 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
829 17:45:55.159127 PCI: 00:1f.3 scanning...
830 17:45:55.162321 scan_static_bus for PCI: 00:1f.3
831 17:45:55.165869 scan_static_bus for PCI: 00:1f.3 done
832 17:45:55.170973 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
833 17:45:55.173441 PCI: 00:1f.4 scanning...
834 17:45:55.177319 scan_generic_bus for PCI: 00:1f.4
835 17:45:55.180938 scan_generic_bus for PCI: 00:1f.4 done
836 17:45:55.185505 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
837 17:45:55.187905 PCI: 00:1f.5 scanning...
838 17:45:55.192285 scan_generic_bus for PCI: 00:1f.5
839 17:45:55.195508 scan_generic_bus for PCI: 00:1f.5 done
840 17:45:55.200263 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
841 17:45:55.205410 scan_bus: bus DOMAIN: 0000 finished in 654 msecs
842 17:45:55.209528 scan_static_bus for Root Device done
843 17:45:55.214018 scan_bus: bus Root Device finished in 673 msecs
844 17:45:55.214871 done
845 17:45:55.221137 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1038 ms
846 17:45:55.226581 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
847 17:45:55.232567 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
848 17:45:55.238589 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
849 17:45:55.244048 MRC: 'RECOVERY_MRC_CACHE' does not need update.
850 17:45:55.247048 Chrome EC: UHEPI supported
851 17:45:55.255045 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
852 17:45:55.258440 SPI flash protection: WPSW=0 SRP0=0
853 17:45:55.262866 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
854 17:45:55.269514 BS: BS_DEV_ENUMERATE exit times (exec / console): 3 / 39 ms
855 17:45:55.271796 found VGA at PCI: 00:02.0
856 17:45:55.274821 Setting up VGA for PCI: 00:02.0
857 17:45:55.279932 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
858 17:45:55.285222 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
859 17:45:55.287793 Allocating resources...
860 17:45:55.289518 Reading resources...
861 17:45:55.293498 Root Device read_resources bus 0 link: 0
862 17:45:55.298954 CPU_CLUSTER: 0 read_resources bus 0 link: 0
863 17:45:55.303576 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
864 17:45:55.308518 DOMAIN: 0000 read_resources bus 0 link: 0
865 17:45:55.313312 PCI: 00:04.0 read_resources bus 1 link: 0
866 17:45:55.318786 PCI: 00:04.0 read_resources bus 1 link: 0 done
867 17:45:55.323778 PCI: 00:14.0 read_resources bus 0 link: 0
868 17:45:55.328103 USB0 port 0 read_resources bus 0 link: 0
869 17:45:55.337493 USB0 port 0 read_resources bus 0 link: 0 done
870 17:45:55.341990 PCI: 00:14.0 read_resources bus 0 link: 0 done
871 17:45:55.347617 PCI: 00:15.2 read_resources bus 2 link: 0
872 17:45:55.353373 PCI: 00:15.2 read_resources bus 2 link: 0 done
873 17:45:55.357947 PCI: 00:15.3 read_resources bus 3 link: 0
874 17:45:55.362813 PCI: 00:15.3 read_resources bus 3 link: 0 done
875 17:45:55.367764 PCI: 00:19.0 read_resources bus 4 link: 0
876 17:45:55.373143 PCI: 00:19.0 read_resources bus 4 link: 0 done
877 17:45:55.378354 PCI: 00:1c.0 read_resources bus 1 link: 0
878 17:45:55.384038 PCI: 00:1c.0 read_resources bus 1 link: 0 done
879 17:45:55.388447 PCI: 00:1e.2 read_resources bus 5 link: 0
880 17:45:55.393363 PCI: 00:1e.2 read_resources bus 5 link: 0 done
881 17:45:55.398083 PCI: 00:1f.0 read_resources bus 0 link: 0
882 17:45:55.403345 PCI: 00:1f.0 read_resources bus 0 link: 0 done
883 17:45:55.409394 DOMAIN: 0000 read_resources bus 0 link: 0 done
884 17:45:55.414445 Root Device read_resources bus 0 link: 0 done
885 17:45:55.417288 Done reading resources.
886 17:45:55.422727 Show resources in subtree (Root Device)...After reading.
887 17:45:55.426738 Root Device child on link 0 CPU_CLUSTER: 0
888 17:45:55.431239 CPU_CLUSTER: 0 child on link 0 APIC: 00
889 17:45:55.432255 APIC: 00
890 17:45:55.433550 APIC: 02
891 17:45:55.437919 DOMAIN: 0000 child on link 0 PCI: 00:00.0
892 17:45:55.447426 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
893 17:45:55.457040 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
894 17:45:55.458484 PCI: 00:00.0
895 17:45:55.468762 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
896 17:45:55.477951 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
897 17:45:55.486989 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
898 17:45:55.496490 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
899 17:45:55.505797 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
900 17:45:55.515391 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
901 17:45:55.524483 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
902 17:45:55.533671 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
903 17:45:55.542737 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
904 17:45:55.551662 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
905 17:45:55.561837 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
906 17:45:55.570914 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
907 17:45:55.581043 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
908 17:45:55.590595 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
909 17:45:55.600115 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
910 17:45:55.608678 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
911 17:45:55.610326 PCI: 00:02.0
912 17:45:55.620369 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
913 17:45:55.630897 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
914 17:45:55.639327 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
915 17:45:55.643782 PCI: 00:04.0 child on link 0 GENERIC: 0.0
916 17:45:55.653836 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
917 17:45:55.655242 GENERIC: 0.0
918 17:45:55.656837 PCI: 00:08.0
919 17:45:55.667043 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
920 17:45:55.669132 PCI: 00:12.0
921 17:45:55.678420 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
922 17:45:55.682733 PCI: 00:14.0 child on link 0 USB0 port 0
923 17:45:55.692800 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
924 17:45:55.697230 USB0 port 0 child on link 0 USB2 port 0
925 17:45:55.699189 USB2 port 0
926 17:45:55.700838 USB2 port 1
927 17:45:55.702651 USB2 port 2
928 17:45:55.704410 USB2 port 3
929 17:45:55.706141 USB2 port 5
930 17:45:55.707856 USB2 port 6
931 17:45:55.710134 USB2 port 9
932 17:45:55.711456 USB3 port 0
933 17:45:55.713375 USB3 port 1
934 17:45:55.714845 USB3 port 2
935 17:45:55.716405 USB3 port 3
936 17:45:55.718374 USB3 port 4
937 17:45:55.720113 USB2 port 4
938 17:45:55.721861 USB3 port 5
939 17:45:55.723904 PCI: 00:14.2
940 17:45:55.733825 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
941 17:45:55.743628 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
942 17:45:55.745199 PCI: 00:14.3
943 17:45:55.755176 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
944 17:45:55.756779 PCI: 00:14.5
945 17:45:55.766815 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
946 17:45:55.768309 PCI: 00:15.0
947 17:45:55.772457 PCI: 00:15.2 child on link 0 I2C: 02:4a
948 17:45:55.782455 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
949 17:45:55.784173 I2C: 02:4a
950 17:45:55.788659 PCI: 00:15.3 child on link 0 I2C: 03:4a
951 17:45:55.798017 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
952 17:45:55.799785 I2C: 03:4a
953 17:45:55.801694 PCI: 00:16.0
954 17:45:55.811361 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
955 17:45:55.816012 PCI: 00:19.0 child on link 0 I2C: 04:1a
956 17:45:55.825615 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
957 17:45:55.827303 I2C: 04:1a
958 17:45:55.829025 PCI: 00:1a.0
959 17:45:55.838537 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
960 17:45:55.843141 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
961 17:45:55.851729 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
962 17:45:55.861806 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
963 17:45:55.871107 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
964 17:45:55.872434 PCI: 01:00.0
965 17:45:55.881711 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
966 17:45:55.890740 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
967 17:45:55.901137 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
968 17:45:55.902788 PCI: 00:1e.0
969 17:45:55.913730 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
970 17:45:55.924105 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
971 17:45:55.927507 PCI: 00:1e.2 child on link 0 SPI: 00
972 17:45:55.937813 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 17:45:55.939120 SPI: 00
974 17:45:55.943492 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
975 17:45:55.951937 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
976 17:45:55.961074 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
977 17:45:55.962657 PNP: 0c09.0
978 17:45:55.971229 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
979 17:45:55.972995 PCI: 00:1f.3
980 17:45:55.982669 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
981 17:45:55.993108 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
982 17:45:55.994923 PCI: 00:1f.4
983 17:45:56.003510 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
984 17:45:56.013687 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
985 17:45:56.014917 PCI: 00:1f.5
986 17:45:56.024184 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
987 17:45:56.032130 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
988 17:45:56.037496 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
989 17:45:56.041896 PCI: 01:00.0 10 * [0x0 - 0xff] io
990 17:45:56.047780 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
991 17:45:56.053981 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
992 17:45:56.057869 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
993 17:45:56.062408 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
994 17:45:56.069292 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
995 17:45:56.076979 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
996 17:45:56.084241 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
997 17:45:56.091604 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
998 17:45:56.097833 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
999 17:45:56.105354 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1000 17:45:56.113254 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1001 17:45:56.121061 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1002 17:45:56.127762 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1003 17:45:56.131349 DOMAIN: 0000: Resource ranges:
1004 17:45:56.134871 * Base: 1000, Size: 800, Tag: 100
1005 17:45:56.138747 * Base: 1900, Size: d6a0, Tag: 100
1006 17:45:56.141850 * Base: efc0, Size: 1040, Tag: 100
1007 17:45:56.147385 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1008 17:45:56.152974 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1009 17:45:56.159067 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1010 17:45:56.165782 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1011 17:45:56.174265 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1012 17:45:56.181390 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1013 17:45:56.188996 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1014 17:45:56.196694 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1015 17:45:56.204225 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1016 17:45:56.212199 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1017 17:45:56.220327 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1018 17:45:56.227264 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1019 17:45:56.235347 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1020 17:45:56.242532 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1021 17:45:56.250903 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1022 17:45:56.258280 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1023 17:45:56.265897 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1024 17:45:56.274142 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1025 17:45:56.281519 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1026 17:45:56.288727 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1027 17:45:56.296681 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1028 17:45:56.299582 DOMAIN: 0000: Resource ranges:
1029 17:45:56.304402 * Base: 9f800000, Size: 40800000, Tag: 200
1030 17:45:56.308489 * Base: f0000000, Size: c000000, Tag: 200
1031 17:45:56.312645 * Base: fc001000, Size: 1fff000, Tag: 200
1032 17:45:56.316833 * Base: fe010000, Size: 22000, Tag: 200
1033 17:45:56.321068 * Base: fe033000, Size: cdd000, Tag: 200
1034 17:45:56.325216 * Base: fed18000, Size: 68000, Tag: 200
1035 17:45:56.329418 * Base: fed84000, Size: c000, Tag: 200
1036 17:45:56.333193 * Base: fed92000, Size: e000, Tag: 200
1037 17:45:56.337313 * Base: feda2000, Size: 125e000, Tag: 200
1038 17:45:56.342262 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1039 17:45:56.349127 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1040 17:45:56.356032 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1041 17:45:56.362715 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1042 17:45:56.369227 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1043 17:45:56.376022 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1044 17:45:56.382873 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1045 17:45:56.389432 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1046 17:45:56.395875 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1047 17:45:56.402096 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1048 17:45:56.408821 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1049 17:45:56.415747 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1050 17:45:56.422310 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1051 17:45:56.428543 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1052 17:45:56.435675 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1053 17:45:56.442153 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1054 17:45:56.448664 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1055 17:45:56.455491 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1056 17:45:56.461827 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1057 17:45:56.468141 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1058 17:45:56.474789 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1059 17:45:56.481537 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1060 17:45:56.488310 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1061 17:45:56.495427 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1062 17:45:56.502491 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1063 17:45:56.505571 PCI: 00:1c.0: Resource ranges:
1064 17:45:56.509308 * Base: 2000, Size: 1000, Tag: 100
1065 17:45:56.514484 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1066 17:45:56.521705 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1067 17:45:56.530274 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1068 17:45:56.533089 PCI: 00:1c.0: Resource ranges:
1069 17:45:56.537473 * Base: 9f800000, Size: 100000, Tag: 200
1070 17:45:56.543772 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1071 17:45:56.550464 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1072 17:45:56.559043 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1073 17:45:56.565935 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1074 17:45:56.570431 Root Device assign_resources, bus 0 link: 0
1075 17:45:56.575292 DOMAIN: 0000 assign_resources, bus 0 link: 0
1076 17:45:56.584132 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1077 17:45:56.592451 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1078 17:45:56.600162 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1079 17:45:56.608406 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1080 17:45:56.612848 PCI: 00:04.0 assign_resources, bus 1 link: 0
1081 17:45:56.617733 PCI: 00:04.0 assign_resources, bus 1 link: 0
1082 17:45:56.625687 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1083 17:45:56.634073 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1084 17:45:56.642561 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1085 17:45:56.646534 PCI: 00:14.0 assign_resources, bus 0 link: 0
1086 17:45:56.651643 PCI: 00:14.0 assign_resources, bus 0 link: 0
1087 17:45:56.660481 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1088 17:45:56.668033 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1089 17:45:56.675973 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1090 17:45:56.684855 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1091 17:45:56.693000 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1092 17:45:56.697354 PCI: 00:15.2 assign_resources, bus 2 link: 0
1093 17:45:56.702003 PCI: 00:15.2 assign_resources, bus 2 link: 0
1094 17:45:56.710168 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1095 17:45:56.714986 PCI: 00:15.3 assign_resources, bus 3 link: 0
1096 17:45:56.719528 PCI: 00:15.3 assign_resources, bus 3 link: 0
1097 17:45:56.727845 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1098 17:45:56.735914 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1099 17:45:56.740907 PCI: 00:19.0 assign_resources, bus 4 link: 0
1100 17:45:56.745731 PCI: 00:19.0 assign_resources, bus 4 link: 0
1101 17:45:56.753590 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1102 17:45:56.762498 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1103 17:45:56.772725 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1104 17:45:56.780865 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1105 17:45:56.785074 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1106 17:45:56.793559 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1107 17:45:56.801488 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1108 17:45:56.808977 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1109 17:45:56.814029 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1110 17:45:56.822106 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1111 17:45:56.830547 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1112 17:45:56.834954 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1113 17:45:56.839569 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1114 17:45:56.844712 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1115 17:45:56.849458 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1116 17:45:56.854465 LPC: Trying to open IO window from 800 size 1ff
1117 17:45:56.862981 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1118 17:45:56.871185 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1119 17:45:56.879049 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1120 17:45:56.886888 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1121 17:45:56.892223 DOMAIN: 0000 assign_resources, bus 0 link: 0
1122 17:45:56.896509 Root Device assign_resources, bus 0 link: 0
1123 17:45:56.899366 Done setting resources.
1124 17:45:56.905703 Show resources in subtree (Root Device)...After assigning values.
1125 17:45:56.909815 Root Device child on link 0 CPU_CLUSTER: 0
1126 17:45:56.914113 CPU_CLUSTER: 0 child on link 0 APIC: 00
1127 17:45:56.915623 APIC: 00
1128 17:45:56.916349 APIC: 02
1129 17:45:56.921142 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1130 17:45:56.930095 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 17:45:56.939921 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1132 17:45:56.942119 PCI: 00:00.0
1133 17:45:56.951382 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 17:45:56.961062 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 17:45:56.970082 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 17:45:56.979749 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 17:45:56.988725 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 17:45:56.998106 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1139 17:45:57.008068 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1140 17:45:57.017054 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1141 17:45:57.026422 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1142 17:45:57.035588 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1143 17:45:57.044725 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1144 17:45:57.053906 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1145 17:45:57.063600 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1146 17:45:57.073121 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1147 17:45:57.082993 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1148 17:45:57.091737 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1149 17:45:57.093267 PCI: 00:02.0
1150 17:45:57.103895 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1151 17:45:57.114475 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1152 17:45:57.124388 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1153 17:45:57.128450 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1154 17:45:57.138877 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1155 17:45:57.140361 GENERIC: 0.0
1156 17:45:57.141926 PCI: 00:08.0
1157 17:45:57.152449 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1158 17:45:57.154292 PCI: 00:12.0
1159 17:45:57.164231 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1160 17:45:57.168625 PCI: 00:14.0 child on link 0 USB0 port 0
1161 17:45:57.179690 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1162 17:45:57.183195 USB0 port 0 child on link 0 USB2 port 0
1163 17:45:57.185394 USB2 port 0
1164 17:45:57.187010 USB2 port 1
1165 17:45:57.188828 USB2 port 2
1166 17:45:57.190377 USB2 port 3
1167 17:45:57.192250 USB2 port 5
1168 17:45:57.194287 USB2 port 6
1169 17:45:57.195823 USB2 port 9
1170 17:45:57.197645 USB3 port 0
1171 17:45:57.199709 USB3 port 1
1172 17:45:57.201067 USB3 port 2
1173 17:45:57.203329 USB3 port 3
1174 17:45:57.204423 USB3 port 4
1175 17:45:57.206155 USB2 port 4
1176 17:45:57.208067 USB3 port 5
1177 17:45:57.209957 PCI: 00:14.2
1178 17:45:57.220081 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1179 17:45:57.230303 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1180 17:45:57.231992 PCI: 00:14.3
1181 17:45:57.242241 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1182 17:45:57.243895 PCI: 00:14.5
1183 17:45:57.254432 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1184 17:45:57.255911 PCI: 00:15.0
1185 17:45:57.260240 PCI: 00:15.2 child on link 0 I2C: 02:4a
1186 17:45:57.270470 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1187 17:45:57.272085 I2C: 02:4a
1188 17:45:57.276802 PCI: 00:15.3 child on link 0 I2C: 03:4a
1189 17:45:57.286603 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1190 17:45:57.288465 I2C: 03:4a
1191 17:45:57.289978 PCI: 00:16.0
1192 17:45:57.299972 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1193 17:45:57.304899 PCI: 00:19.0 child on link 0 I2C: 04:1a
1194 17:45:57.314924 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1195 17:45:57.316338 I2C: 04:1a
1196 17:45:57.318056 PCI: 00:1a.0
1197 17:45:57.328361 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1198 17:45:57.332776 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1199 17:45:57.342083 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1200 17:45:57.353772 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1201 17:45:57.364480 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1202 17:45:57.366124 PCI: 01:00.0
1203 17:45:57.375361 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1204 17:45:57.386343 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1205 17:45:57.396049 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1206 17:45:57.397715 PCI: 00:1e.0
1207 17:45:57.409009 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 17:45:57.419336 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1209 17:45:57.423634 PCI: 00:1e.2 child on link 0 SPI: 00
1210 17:45:57.433860 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1211 17:45:57.434848 SPI: 00
1212 17:45:57.439164 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 17:45:57.447967 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 17:45:57.456880 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 17:45:57.458605 PNP: 0c09.0
1216 17:45:57.467043 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 17:45:57.468907 PCI: 00:1f.3
1218 17:45:57.479317 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1219 17:45:57.489783 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1220 17:45:57.491677 PCI: 00:1f.4
1221 17:45:57.500680 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 17:45:57.510619 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1223 17:45:57.512106 PCI: 00:1f.5
1224 17:45:57.522506 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1225 17:45:57.525079 Done allocating resources.
1226 17:45:57.531461 BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2221 ms
1227 17:45:57.534455 Enabling resources...
1228 17:45:57.538811 PCI: 00:00.0 subsystem <- 8086/9b71
1229 17:45:57.540639 PCI: 00:00.0 cmd <- 06
1230 17:45:57.544996 PCI: 00:02.0 subsystem <- 8086/9baa
1231 17:45:57.547522 PCI: 00:02.0 cmd <- 03
1232 17:45:57.550758 PCI: 00:04.0 subsystem <- 8086/1903
1233 17:45:57.553320 PCI: 00:04.0 cmd <- 02
1234 17:45:57.555799 PCI: 00:08.0 cmd <- 06
1235 17:45:57.560444 PCI: 00:12.0 subsystem <- 8086/02f9
1236 17:45:57.562167 PCI: 00:12.0 cmd <- 02
1237 17:45:57.566088 PCI: 00:14.0 subsystem <- 8086/02ed
1238 17:45:57.568679 PCI: 00:14.0 cmd <- 02
1239 17:45:57.571089 PCI: 00:14.2 cmd <- 02
1240 17:45:57.575075 PCI: 00:14.3 subsystem <- 8086/02f0
1241 17:45:57.577646 PCI: 00:14.3 cmd <- 02
1242 17:45:57.581354 PCI: 00:14.5 subsystem <- 8086/02f5
1243 17:45:57.583509 PCI: 00:14.5 cmd <- 06
1244 17:45:57.587263 PCI: 00:15.2 subsystem <- 8086/02ea
1245 17:45:57.589684 PCI: 00:15.2 cmd <- 02
1246 17:45:57.594313 PCI: 00:15.3 subsystem <- 8086/02eb
1247 17:45:57.596273 PCI: 00:15.3 cmd <- 02
1248 17:45:57.600354 PCI: 00:16.0 subsystem <- 8086/02e0
1249 17:45:57.601986 PCI: 00:16.0 cmd <- 02
1250 17:45:57.606465 PCI: 00:19.0 subsystem <- 8086/02c5
1251 17:45:57.609063 PCI: 00:19.0 cmd <- 02
1252 17:45:57.612651 PCI: 00:1a.0 subsystem <- 8086/02c4
1253 17:45:57.615069 PCI: 00:1a.0 cmd <- 06
1254 17:45:57.618401 PCI: 00:1c.0 bridge ctrl <- 0013
1255 17:45:57.621751 PCI: 00:1c.0 subsystem <- 8086/02be
1256 17:45:57.624385 PCI: 00:1c.0 cmd <- 07
1257 17:45:57.628747 PCI: 00:1e.0 subsystem <- 8086/02a8
1258 17:45:57.630961 PCI: 00:1e.0 cmd <- 06
1259 17:45:57.634782 PCI: 00:1e.2 subsystem <- 8086/02aa
1260 17:45:57.636768 PCI: 00:1e.2 cmd <- 06
1261 17:45:57.640919 PCI: 00:1f.0 subsystem <- 8086/0285
1262 17:45:57.643345 PCI: 00:1f.0 cmd <- 407
1263 17:45:57.647038 PCI: 00:1f.3 subsystem <- 8086/02c8
1264 17:45:57.649442 PCI: 00:1f.3 cmd <- 02
1265 17:45:57.653374 PCI: 00:1f.4 subsystem <- 8086/02a3
1266 17:45:57.655865 PCI: 00:1f.4 cmd <- 03
1267 17:45:57.660426 PCI: 00:1f.5 subsystem <- 8086/02a4
1268 17:45:57.662331 PCI: 00:1f.5 cmd <- 406
1269 17:45:57.666522 PCI: 01:00.0 cmd <- 03
1270 17:45:57.669139 done.
1271 17:45:57.675296 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1272 17:45:57.677462 Initializing devices...
1273 17:45:57.678945 Root Device init
1274 17:45:57.683832 Chrome EC: Set SMI mask to 0x0000000000000000
1275 17:45:57.689441 Chrome EC: clear events_b mask to 0x0000000000000000
1276 17:45:57.695516 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1277 17:45:57.701715 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1278 17:45:57.707681 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1279 17:45:57.712809 Chrome EC: Set WAKE mask to 0x0000000000000000
1280 17:45:57.716976 Root Device init finished in 33 msecs
1281 17:45:57.720573 PCI: 00:00.0 init
1282 17:45:57.723765 CPU TDP = 15 Watts
1283 17:45:57.725791 CPU PL1 = 15 Watts
1284 17:45:57.727164 CPU PL2 = 35 Watts
1285 17:45:57.729690 CPU PsysPL2 = 65 Watts
1286 17:45:57.733481 PCI: 00:00.0 init finished in 9 msecs
1287 17:45:57.735989 PCI: 00:02.0 init
1288 17:45:57.738123 GMA: Found VBT in CBFS
1289 17:45:57.740889 GMA: Found valid VBT in CBFS
1290 17:45:57.744881 PCI: 00:02.0 init finished in 5 msecs
1291 17:45:57.747545 PCI: 00:08.0 init
1292 17:45:57.751078 PCI: 00:08.0 init finished in 0 msecs
1293 17:45:57.753785 PCI: 00:12.0 init
1294 17:45:57.757818 PCI: 00:12.0 init finished in 0 msecs
1295 17:45:57.759458 PCI: 00:14.0 init
1296 17:45:57.764023 PCI: 00:14.0 init finished in 0 msecs
1297 17:45:57.766130 PCI: 00:14.2 init
1298 17:45:57.769607 PCI: 00:14.2 init finished in 0 msecs
1299 17:45:57.772128 PCI: 00:14.3 init
1300 17:45:57.775775 PCI: 00:14.3 init finished in 0 msecs
1301 17:45:57.778831 PCI: 00:15.2 init
1302 17:45:57.781792 I2C bus 2 version 0x3132322a
1303 17:45:57.785465 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1304 17:45:57.789269 PCI: 00:15.2 init finished in 6 msecs
1305 17:45:57.791581 PCI: 00:15.3 init
1306 17:45:57.794450 I2C bus 3 version 0x3132322a
1307 17:45:57.797768 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1308 17:45:57.801973 PCI: 00:15.3 init finished in 6 msecs
1309 17:45:57.804544 PCI: 00:16.0 init
1310 17:45:57.808072 PCI: 00:16.0 init finished in 0 msecs
1311 17:45:57.810110 PCI: 00:19.0 init
1312 17:45:57.813103 I2C bus 4 version 0x3132322a
1313 17:45:57.816637 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1314 17:45:57.820770 PCI: 00:19.0 init finished in 6 msecs
1315 17:45:57.822564 PCI: 00:1a.0 init
1316 17:45:57.826823 PCI: 00:1a.0 init finished in 0 msecs
1317 17:45:57.829104 PCI: 00:1c.0 init
1318 17:45:57.831870 Initializing PCH PCIe bridge.
1319 17:45:57.835934 PCI: 00:1c.0 init finished in 3 msecs
1320 17:45:57.839020 PCI: 00:1f.0 init
1321 17:45:57.842927 IOAPIC: Initializing IOAPIC at 0xfec00000
1322 17:45:57.847964 IOAPIC: Bootstrap Processor Local APIC = 0x00
1323 17:45:57.849872 IOAPIC: ID = 0x02
1324 17:45:57.852083 IOAPIC: Dumping registers
1325 17:45:57.854733 reg 0x0000: 0x02000000
1326 17:45:57.856935 reg 0x0001: 0x00770020
1327 17:45:57.859608 reg 0x0002: 0x00000000
1328 17:45:57.864097 PCI: 00:1f.0 init finished in 21 msecs
1329 17:45:57.866499 PCI: 00:1f.4 init
1330 17:45:57.870725 PCI: 00:1f.4 init finished in 0 msecs
1331 17:45:57.880689 PCI: 01:00.0 init
1332 17:45:57.885860 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1333 17:45:57.892107 Error: Could not locate 'ethernet_mac0' in VPD
1334 17:45:57.898695 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1335 17:45:57.903177 r8168: ignore invalid MAC address in cbfs
1336 17:45:57.905945 r8168: Resetting NIC...done
1337 17:45:57.909660 r8168: Programming MAC Address...done
1338 17:45:57.912757 r8168: Customized LED 0x5af
1339 17:45:57.916415 r8168: read back LED setting as 0x5af
1340 17:45:57.920250 PCI: 01:00.0 init finished in 35 msecs
1341 17:45:57.923018 PNP: 0c09.0 init
1342 17:45:57.927601 Google Chrome EC uptime: 970934.769 seconds
1343 17:45:57.931762 Google Chrome AP resets since EC boot: 704
1344 17:45:57.936290 Google Chrome most recent AP reset causes:
1345 17:45:57.940128 967856.072: 32768 shutdown: power failure
1346 17:45:57.944695 967856.081: 32768 shutdown: power failure
1347 17:45:57.949052 967856.370: 32775 shutdown: entering G3
1348 17:45:57.954077 970919.563: 32774 shutdown: by console command
1349 17:45:57.958883 Google Chrome EC reset flags at last EC boot: reset-pin
1350 17:45:57.962778 PNP: 0c09.0 init finished in 36 msecs
1351 17:45:57.965270 Devices initialized
1352 17:45:57.968320 Show all devs... After init.
1353 17:45:57.970367 Root Device: enabled 1
1354 17:45:57.973026 CPU_CLUSTER: 0: enabled 1
1355 17:45:57.975676 DOMAIN: 0000: enabled 1
1356 17:45:57.977554 APIC: 00: enabled 1
1357 17:45:57.979925 PCI: 00:00.0: enabled 1
1358 17:45:57.982229 PCI: 00:02.0: enabled 1
1359 17:45:57.984963 PCI: 00:04.0: enabled 1
1360 17:45:57.987313 PCI: 00:05.0: enabled 0
1361 17:45:57.989773 PCI: 00:12.0: enabled 1
1362 17:45:57.991942 PCI: 00:12.5: enabled 0
1363 17:45:57.994371 PCI: 00:12.6: enabled 0
1364 17:45:57.997141 PCI: 00:14.0: enabled 1
1365 17:45:57.999570 PCI: 00:14.1: enabled 0
1366 17:45:58.002369 PCI: 00:14.3: enabled 1
1367 17:45:58.004289 PCI: 00:14.5: enabled 1
1368 17:45:58.006985 PCI: 00:15.0: enabled 0
1369 17:45:58.009442 PCI: 00:15.1: enabled 0
1370 17:45:58.011723 PCI: 00:15.2: enabled 1
1371 17:45:58.014139 PCI: 00:15.3: enabled 1
1372 17:45:58.016577 PCI: 00:16.0: enabled 1
1373 17:45:58.019597 PCI: 00:16.1: enabled 0
1374 17:45:58.021485 PCI: 00:16.2: enabled 0
1375 17:45:58.024012 PCI: 00:16.3: enabled 0
1376 17:45:58.026746 PCI: 00:16.4: enabled 0
1377 17:45:58.028431 PCI: 00:16.5: enabled 0
1378 17:45:58.031405 PCI: 00:17.0: enabled 0
1379 17:45:58.033535 PCI: 00:19.0: enabled 1
1380 17:45:58.036147 PCI: 00:19.1: enabled 0
1381 17:45:58.038271 PCI: 00:19.2: enabled 0
1382 17:45:58.041127 PCI: 00:1a.0: enabled 1
1383 17:45:58.043037 PCI: 00:1c.0: enabled 0
1384 17:45:58.045733 PCI: 00:1c.1: enabled 0
1385 17:45:58.048219 PCI: 00:1c.2: enabled 0
1386 17:45:58.050668 PCI: 00:1c.3: enabled 0
1387 17:45:58.053011 PCI: 00:1c.4: enabled 0
1388 17:45:58.055786 PCI: 00:1c.5: enabled 0
1389 17:45:58.057920 PCI: 00:1c.0: enabled 1
1390 17:45:58.060148 PCI: 00:1c.7: enabled 0
1391 17:45:58.062928 PCI: 00:1d.0: enabled 1
1392 17:45:58.065412 PCI: 00:1d.1: enabled 0
1393 17:45:58.068059 PCI: 00:1d.2: enabled 1
1394 17:45:58.070111 PCI: 00:1d.3: enabled 0
1395 17:45:58.072471 PCI: 00:1d.4: enabled 0
1396 17:45:58.074724 PCI: 00:1d.5: enabled 1
1397 17:45:58.077383 PCI: 00:1e.0: enabled 1
1398 17:45:58.079527 PCI: 00:1e.1: enabled 0
1399 17:45:58.082097 PCI: 00:1e.2: enabled 1
1400 17:45:58.084500 PCI: 00:1e.3: enabled 0
1401 17:45:58.087055 PCI: 00:1f.0: enabled 1
1402 17:45:58.089845 PCI: 00:1f.1: enabled 0
1403 17:45:58.092000 PCI: 00:1f.2: enabled 0
1404 17:45:58.094482 PCI: 00:1f.3: enabled 1
1405 17:45:58.096574 PCI: 00:1f.4: enabled 1
1406 17:45:58.099759 PCI: 00:1f.5: enabled 1
1407 17:45:58.101680 PCI: 00:1f.6: enabled 0
1408 17:45:58.104074 GENERIC: 0.0: enabled 1
1409 17:45:58.106462 USB0 port 0: enabled 1
1410 17:45:58.108711 I2C: 02:4a: enabled 1
1411 17:45:58.111039 I2C: 03:4a: enabled 1
1412 17:45:58.113340 I2C: 04:1a: enabled 1
1413 17:45:58.115800 PCI: 01:00.0: enabled 1
1414 17:45:58.117949 PCI: 00:00.0: enabled 1
1415 17:45:58.120090 SPI: 00: enabled 1
1416 17:45:58.122340 PNP: 0c09.0: enabled 1
1417 17:45:58.125110 USB2 port 0: enabled 1
1418 17:45:58.126931 USB2 port 1: enabled 1
1419 17:45:58.129350 USB2 port 2: enabled 1
1420 17:45:58.131845 USB2 port 3: enabled 1
1421 17:45:58.134151 USB2 port 5: enabled 1
1422 17:45:58.136688 USB2 port 6: enabled 0
1423 17:45:58.139243 USB2 port 9: enabled 1
1424 17:45:58.141153 USB3 port 0: enabled 1
1425 17:45:58.143596 USB3 port 1: enabled 1
1426 17:45:58.145587 USB3 port 2: enabled 1
1427 17:45:58.148441 USB3 port 3: enabled 1
1428 17:45:58.150289 USB3 port 4: enabled 1
1429 17:45:58.152546 USB2 port 4: enabled 1
1430 17:45:58.155041 USB3 port 5: enabled 1
1431 17:45:58.156894 APIC: 02: enabled 1
1432 17:45:58.159656 PCI: 00:08.0: enabled 1
1433 17:45:58.162134 PCI: 00:14.2: enabled 1
1434 17:45:58.167788 BS: BS_DEV_INIT run times (exec / console): 27 / 459 ms
1435 17:45:58.169918 Disabling ACPI via APMC.
1436 17:45:58.174995 APMC done.
1437 17:45:58.179808 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1438 17:45:58.184159 ELOG: NV offset 0xaf0000 size 0x4000
1439 17:45:58.191475 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1440 17:45:58.198319 ELOG: Event(17) added with size 13 at 2023-10-09 17:45:57 UTC
1441 17:45:58.204372 ELOG: Event(92) added with size 9 at 2023-10-09 17:45:57 UTC
1442 17:45:58.210462 ELOG: Event(93) added with size 9 at 2023-10-09 17:45:57 UTC
1443 17:45:58.216829 ELOG: Event(9E) added with size 10 at 2023-10-09 17:45:57 UTC
1444 17:45:58.223181 ELOG: Event(9F) added with size 14 at 2023-10-09 17:45:57 UTC
1445 17:45:58.229067 BS: BS_DEV_INIT exit times (exec / console): 7 / 49 ms
1446 17:45:58.235225 ELOG: Event(A1) added with size 10 at 2023-10-09 17:45:57 UTC
1447 17:45:58.243274 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1448 17:45:58.249204 ELOG: Event(A0) added with size 9 at 2023-10-09 17:45:57 UTC
1449 17:45:58.253485 elog_add_boot_reason: Logged dev mode boot
1450 17:45:58.258835 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1451 17:45:58.261732 Finalize devices...
1452 17:45:58.263015 Devices finalized
1453 17:45:58.268815 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1454 17:45:58.273903 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1455 17:45:58.279590 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1456 17:45:58.283551 ME: HFSTS1 : 0x80030045
1457 17:45:58.287660 ME: HFSTS2 : 0x30280136
1458 17:45:58.292379 ME: HFSTS3 : 0x00000050
1459 17:45:58.296704 ME: HFSTS4 : 0x00004800
1460 17:45:58.300497 ME: HFSTS5 : 0x00000000
1461 17:45:58.304332 ME: HFSTS6 : 0x40400006
1462 17:45:58.307310 ME: Manufacturing Mode : NO
1463 17:45:58.311905 ME: FW Partition Table : OK
1464 17:45:58.314294 ME: Bringup Loader Failure : NO
1465 17:45:58.317327 ME: Firmware Init Complete : NO
1466 17:45:58.320785 ME: Boot Options Present : NO
1467 17:45:58.324135 ME: Update In Progress : NO
1468 17:45:58.327700 ME: D0i3 Support : YES
1469 17:45:58.330806 ME: Low Power State Enabled : NO
1470 17:45:58.334178 ME: CPU Replaced : YES
1471 17:45:58.337611 ME: CPU Replacement Valid : YES
1472 17:45:58.340773 ME: Current Working State : 5
1473 17:45:58.344390 ME: Current Operation State : 1
1474 17:45:58.347279 ME: Current Operation Mode : 3
1475 17:45:58.350216 ME: Error Code : 0
1476 17:45:58.353544 ME: CPU Debug Disabled : YES
1477 17:45:58.357353 ME: TXT Support : NO
1478 17:45:58.363166 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1479 17:45:58.368812 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1480 17:45:58.371889 CBFS: Locating 'fallback/dsdt.aml'
1481 17:45:58.376046 CBFS: Found @ offset 636c0 size 32e0
1482 17:45:58.381077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1483 17:45:58.384276 CBFS: Locating 'fallback/slic'
1484 17:45:58.389764 CBFS: 'fallback/slic' not found.
1485 17:45:58.392982 ACPI: Writing ACPI tables at 99b31000.
1486 17:45:58.394832 ACPI: * FACS
1487 17:45:58.396729 ACPI: * DSDT
1488 17:45:58.400137 Ramoops buffer: 0x100000@0x99a30000.
1489 17:45:58.404880 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1490 17:45:58.409484 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1491 17:45:58.413002 Google Chrome EC: version:
1492 17:45:58.415849 ro: puff_v2.0.4638-67e4d7990
1493 17:45:58.419421 rw: puff_v2.0.4638-67e4d7990
1494 17:45:58.420632 running image: 1
1495 17:45:58.427025 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1496 17:45:58.430008 ACPI: * FADT
1497 17:45:58.431400 SCI is IRQ9
1498 17:45:58.434880 ACPI: added table 1/32, length now 40
1499 17:45:58.437069 ACPI: * SSDT
1500 17:45:58.440900 Found 1 CPU(s) with 2 core(s) each.
1501 17:45:58.445177 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1502 17:45:58.449208 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1503 17:45:58.453906 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1504 17:45:58.459141 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1505 17:45:58.464170 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1506 17:45:58.469135 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1507 17:45:58.473643 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1508 17:45:58.477892 EC returned error result code 3
1509 17:45:58.481745 EC returned error result code 1
1510 17:45:58.486198 PS2K: Bad resp from EC. Vivaldi disabled!
1511 17:45:58.492320 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1512 17:45:58.498299 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1513 17:45:58.504737 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1514 17:45:58.511137 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1515 17:45:58.517444 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1516 17:45:58.522415 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1517 17:45:58.528605 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1518 17:45:58.535774 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1519 17:45:58.541356 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1520 17:45:58.547224 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1521 17:45:58.553247 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1522 17:45:58.560093 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1523 17:45:58.566357 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1524 17:45:58.570257 ACPI: added table 2/32, length now 44
1525 17:45:58.571476 ACPI: * MCFG
1526 17:45:58.575146 ACPI: added table 3/32, length now 48
1527 17:45:58.576968 ACPI: * TPM2
1528 17:45:58.580152 TPM2 log created at 0x99a20000
1529 17:45:58.583838 ACPI: added table 4/32, length now 52
1530 17:45:58.585815 ACPI: * MADT
1531 17:45:58.587440 SCI is IRQ9
1532 17:45:58.590662 ACPI: added table 5/32, length now 56
1533 17:45:58.592663 current = 99b36070
1534 17:45:58.594813 ACPI: * DMAR
1535 17:45:58.598173 ACPI: added table 6/32, length now 60
1536 17:45:58.602126 ACPI: added table 7/32, length now 64
1537 17:45:58.603511 ACPI: * HPET
1538 17:45:58.607080 ACPI: added table 8/32, length now 68
1539 17:45:58.608720 ACPI: done.
1540 17:45:58.611550 ACPI tables: 20912 bytes.
1541 17:45:58.613963 smbios_write_tables: 99a1f000
1542 17:45:58.621812 EC returned error result code 3
1543 17:45:58.625103 Couldn't obtain OEM name from CBI
1544 17:45:58.627959 Create SMBIOS type 17
1545 17:45:58.631282 PCI: 00:00.0 (Intel Cannonlake)
1546 17:45:58.633535 PCI: 00:14.3 (Intel WiFi)
1547 17:45:58.636100 SMBIOS tables: 841 bytes.
1548 17:45:58.640885 Writing table forward entry at 0x00000500
1549 17:45:58.646742 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1550 17:45:58.650558 Writing coreboot table at 0x99b55000
1551 17:45:58.656334 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1552 17:45:58.660871 1. 0000000000001000-000000000009ffff: RAM
1553 17:45:58.665305 2. 00000000000a0000-00000000000fffff: RESERVED
1554 17:45:58.669575 3. 0000000000100000-0000000099a1efff: RAM
1555 17:45:58.675583 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1556 17:45:58.680388 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1557 17:45:58.686224 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1558 17:45:58.690809 7. 000000009a000000-000000009f7fffff: RESERVED
1559 17:45:58.695718 8. 00000000e0000000-00000000efffffff: RESERVED
1560 17:45:58.701086 9. 00000000fc000000-00000000fc000fff: RESERVED
1561 17:45:58.705525 10. 00000000fe000000-00000000fe00ffff: RESERVED
1562 17:45:58.710136 11. 00000000fed10000-00000000fed17fff: RESERVED
1563 17:45:58.714990 12. 00000000fed80000-00000000fed83fff: RESERVED
1564 17:45:58.719450 13. 00000000fed90000-00000000fed91fff: RESERVED
1565 17:45:58.724030 14. 00000000feda0000-00000000feda1fff: RESERVED
1566 17:45:58.729266 15. 0000000100000000-000000015e7fffff: RAM
1567 17:45:58.732597 Graphics hand-off block not found
1568 17:45:58.736235 FSP did not return a valid framebuffer
1569 17:45:58.739260 Passing 4 GPIOs to payload:
1570 17:45:58.743645 NAME | PORT | POLARITY | VALUE
1571 17:45:58.749109 lid | undefined | high | high
1572 17:45:58.754236 power | undefined | high | low
1573 17:45:58.759600 oprom | undefined | high | low
1574 17:45:58.765239 EC in RW | 0x000000cb | high | low
1575 17:45:58.766478 Board ID: 4
1576 17:45:58.771065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1577 17:45:58.777538 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum fb3f
1578 17:45:58.780862 coreboot table: 1424 bytes.
1579 17:45:58.784156 IMD ROOT 0. 0x99fff000 0x00001000
1580 17:45:58.788086 IMD SMALL 1. 0x99ffe000 0x00001000
1581 17:45:58.791978 FSP MEMORY 2. 0x99c4e000 0x003b0000
1582 17:45:58.795508 CONSOLE 3. 0x99c2e000 0x00020000
1583 17:45:58.799017 FMAP 4. 0x99c2d000 0x00000578
1584 17:45:58.802499 TIME STAMP 5. 0x99c2c000 0x00000910
1585 17:45:58.806943 VBOOT WORK 6. 0x99c18000 0x00014000
1586 17:45:58.810484 MRC DATA 7. 0x99c16000 0x00001958
1587 17:45:58.814196 ROMSTG STCK 8. 0x99c15000 0x00001000
1588 17:45:58.817579 AFTER CAR 9. 0x99c0b000 0x0000a000
1589 17:45:58.821634 RAMSTAGE 10. 0x99ba4000 0x00067000
1590 17:45:58.825289 REFCODE 11. 0x99b6f000 0x00035000
1591 17:45:58.829150 SMM BACKUP 12. 0x99b5f000 0x00010000
1592 17:45:58.832380 4f444749 13. 0x99b5d000 0x00002000
1593 17:45:58.836079 COREBOOT 14. 0x99b55000 0x00008000
1594 17:45:58.840013 ACPI 15. 0x99b31000 0x00024000
1595 17:45:58.843473 ACPI GNVS 16. 0x99b30000 0x00001000
1596 17:45:58.847270 RAMOOPS 17. 0x99a30000 0x00100000
1597 17:45:58.850855 TPM2 TCGLOG18. 0x99a20000 0x00010000
1598 17:45:58.855423 SMBIOS 19. 0x99a1f000 0x00000800
1599 17:45:58.857148 IMD small region:
1600 17:45:58.860587 IMD ROOT 0. 0x99ffec00 0x00000400
1601 17:45:58.864611 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1602 17:45:58.868597 VPD 2. 0x99ffeb80 0x0000004c
1603 17:45:58.872347 POWER STATE 3. 0x99ffeb40 0x00000040
1604 17:45:58.876258 ROMSTAGE 4. 0x99ffeb20 0x00000004
1605 17:45:58.880206 MEM INFO 5. 0x99ffe960 0x000001b9
1606 17:45:58.886334 BS: BS_WRITE_TABLES run times (exec / console): 12 / 504 ms
1607 17:45:58.889120 MTRR: Physical address space:
1608 17:45:58.895729 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1609 17:45:58.901876 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1610 17:45:58.907833 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1611 17:45:58.913958 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1612 17:45:58.920453 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1613 17:45:58.926778 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1614 17:45:58.932746 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1615 17:45:58.936556 MTRR: Fixed MSR 0x250 0x0606060606060606
1616 17:45:58.940693 MTRR: Fixed MSR 0x258 0x0606060606060606
1617 17:45:58.944874 MTRR: Fixed MSR 0x259 0x0000000000000000
1618 17:45:58.948857 MTRR: Fixed MSR 0x268 0x0606060606060606
1619 17:45:58.953191 MTRR: Fixed MSR 0x269 0x0606060606060606
1620 17:45:58.957064 MTRR: Fixed MSR 0x26a 0x0606060606060606
1621 17:45:58.961567 MTRR: Fixed MSR 0x26b 0x0606060606060606
1622 17:45:58.965416 MTRR: Fixed MSR 0x26c 0x0606060606060606
1623 17:45:58.969294 MTRR: Fixed MSR 0x26d 0x0606060606060606
1624 17:45:58.973673 MTRR: Fixed MSR 0x26e 0x0606060606060606
1625 17:45:58.977952 MTRR: Fixed MSR 0x26f 0x0606060606060606
1626 17:45:58.980362 call enable_fixed_mtrr()
1627 17:45:58.983950 CPU physical address size: 39 bits
1628 17:45:58.988615 MTRR: default type WB/UC MTRR counts: 5/6.
1629 17:45:58.992379 MTRR: WB selected as default type.
1630 17:45:58.997975 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1631 17:45:59.004297 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1632 17:45:59.010501 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1633 17:45:59.016898 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1634 17:45:59.023375 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1635 17:45:59.027267 MTRR: Fixed MSR 0x250 0x0606060606060606
1636 17:45:59.031686 MTRR: Fixed MSR 0x258 0x0606060606060606
1637 17:45:59.035729 MTRR: Fixed MSR 0x259 0x0000000000000000
1638 17:45:59.039837 MTRR: Fixed MSR 0x268 0x0606060606060606
1639 17:45:59.043842 MTRR: Fixed MSR 0x269 0x0606060606060606
1640 17:45:59.047742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1641 17:45:59.051795 MTRR: Fixed MSR 0x26b 0x0606060606060606
1642 17:45:59.056561 MTRR: Fixed MSR 0x26c 0x0606060606060606
1643 17:45:59.060060 MTRR: Fixed MSR 0x26d 0x0606060606060606
1644 17:45:59.064313 MTRR: Fixed MSR 0x26e 0x0606060606060606
1645 17:45:59.068464 MTRR: Fixed MSR 0x26f 0x0606060606060606
1646 17:45:59.068696
1647 17:45:59.069868 MTRR check
1648 17:45:59.072140 Fixed MTRRs : Enabled
1649 17:45:59.075144 Variable MTRRs: Enabled
1650 17:45:59.075217
1651 17:45:59.077186 call enable_fixed_mtrr()
1652 17:45:59.083418 BS: BS_WRITE_TABLES exit times (exec / console): 45 / 143 ms
1653 17:45:59.086573 CPU physical address size: 39 bits
1654 17:45:59.089312 Probing TPM: done!
1655 17:45:59.094529 Connected to device vid:did:rid of 1ae0:0028:00
1656 17:45:59.104246 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1657 17:45:59.108353 Initialized TPM device CR50 revision 0
1658 17:45:59.111775 Checking cr50 for pending updates
1659 17:45:59.117762 Reading cr50 TPM mode
1660 17:45:59.127317 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1661 17:45:59.132370 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1662 17:45:59.135717 CBFS: Locating 'fallback/payload'
1663 17:45:59.140932 CBFS: Found @ offset 3a0c00 size 48db0
1664 17:45:59.145476 Checking segment from ROM address 0xfffa8c38
1665 17:45:59.149683 Checking segment from ROM address 0xfffa8c54
1666 17:45:59.154251 Loading segment from ROM address 0xfffa8c38
1667 17:45:59.156585 code (compression=0)
1668 17:45:59.165092 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1669 17:45:59.173622 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1670 17:45:59.175478 it's not compressed!
1671 17:45:59.278562 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1672 17:45:59.285279 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1673 17:45:59.292905 Loading segment from ROM address 0xfffa8c54
1674 17:45:59.295942 Entry Point 0x30000000
1675 17:45:59.297392 Loaded segments
1676 17:45:59.303335 BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms
1677 17:45:59.306710 Finalizing chipset.
1678 17:45:59.308462 Finalizing SMM.
1679 17:45:59.309479 APMC done.
1680 17:45:59.315668 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1681 17:45:59.318901 mp_park_aps done after 0 msecs.
1682 17:45:59.323498 Jumping to boot code at 0x30000000(0x99b55000)
1683 17:45:59.332877 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1684 17:45:59.332938
1685 17:45:59.332986
1686 17:45:59.333556
1687 17:45:59.336842 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1688 17:45:59.336929 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1689 17:45:59.336998 Setting prompt string to ['puff:']
1690 17:45:59.337060 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1691 17:45:59.337185 Starting depthcharge on Kaisa...
1692 17:45:59.337242
1693 17:45:59.344103 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1694 17:45:59.344160
1695 17:45:59.351310 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1696 17:45:59.351381
1697 17:45:59.353575 BIOS MMAP details:
1698 17:45:59.353629
1699 17:45:59.356519 IFD Base Offset : 0x300000
1700 17:45:59.356899
1701 17:45:59.359460 IFD End Offset : 0x1000000
1702 17:45:59.359678
1703 17:45:59.361938 MMAP Size : 0xd00000
1704 17:45:59.362159
1705 17:45:59.364902 MMAP Start : 0xff300000
1706 17:45:59.365335
1707 17:45:59.370419 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1708 17:45:59.370647
1709 17:45:59.372157 Wipe memory regions:
1710 17:45:59.372653
1711 17:45:59.376119 [0x00000000001000, 0x000000000a0000)
1712 17:45:59.376337
1713 17:45:59.379634 [0x00000000100000, 0x00000030000000)
1714 17:45:59.428999
1715 17:45:59.432858 [0x00000032660100, 0x00000099a1f000)
1716 17:45:59.535806
1717 17:45:59.538850 [0x00000100000000, 0x0000015e800000)
1718 17:45:59.940515
1719 17:45:59.941540 R8152: Initializing
1720 17:45:59.942133
1721 17:45:59.945104 Version 9 (ocp_data = 6010)
1722 17:45:59.945671
1723 17:45:59.947967 R8152: Done initializing
1724 17:45:59.948026
1725 17:45:59.950140 Adding net device
1726 17:46:00.250841
1727 17:46:00.256268 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1728 17:46:00.256699
1729 17:46:00.256948
1730 17:46:00.257211
1731 17:46:00.257867 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1733 17:46:00.358918 puff: tftpboot 192.168.201.1 11712589/tftp-deploy-xplj5qb3/kernel/bzImage 11712589/tftp-deploy-xplj5qb3/kernel/cmdline 11712589/tftp-deploy-xplj5qb3/ramdisk/ramdisk.cpio.gz
1734 17:46:00.359489 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1735 17:46:00.359987 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1736 17:46:00.401925 tftpboot 192.168.201.1 11712589/tftp-deploy-xplj5qb3/kernel/bzImage 11712589/tftp-deploy-xplj5qb3/kernel/cmdline 11712589/tftp-deploy-xplj5qb3/ramdisk/ramdisk.cpio.gz
1737 17:46:00.402394
1738 17:46:00.402640 Waiting for link
1739 17:46:00.563443
1740 17:46:00.563992 done.
1741 17:46:00.564647
1742 17:46:00.565751 MAC: 00:e0:4c:68:01:d2
1743 17:46:00.566161
1744 17:46:00.568879 Sending DHCP discover... done.
1745 17:46:00.569584
1746 17:46:00.571852 Waiting for reply... done.
1747 17:46:00.572431
1748 17:46:00.574958 Sending DHCP request... done.
1749 17:46:00.575035
1750 17:46:00.579615 Waiting for reply... done.
1751 17:46:00.579691
1752 17:46:00.582150 My ip is 192.168.201.170
1753 17:46:00.582225
1754 17:46:00.585585 The DHCP server ip is 192.168.201.1
1755 17:46:00.585844
1756 17:46:00.590693 TFTP server IP predefined by user: 192.168.201.1
1757 17:46:00.590747
1758 17:46:00.597660 Bootfile predefined by user: 11712589/tftp-deploy-xplj5qb3/kernel/bzImage
1759 17:46:00.598038
1760 17:46:00.601135 Sending tftp read request... done.
1761 17:46:00.601199
1762 17:46:00.604690 Waiting for the transfer...
1763 17:46:00.605012
1764 17:46:00.823443 00000000 ################################################################
1765 17:46:00.824219
1766 17:46:01.043938 00080000 ################################################################
1767 17:46:01.044613
1768 17:46:01.266367 00100000 ################################################################
1769 17:46:01.266873
1770 17:46:01.488019 00180000 ################################################################
1771 17:46:01.488531
1772 17:46:01.725536 00200000 ################################################################
1773 17:46:01.725867
1774 17:46:01.948278 00280000 ################################################################
1775 17:46:01.948852
1776 17:46:02.167319 00300000 ################################################################
1777 17:46:02.167704
1778 17:46:02.411924 00380000 ################################################################
1779 17:46:02.412572
1780 17:46:02.730616 00400000 ################################################################
1781 17:46:02.730957
1782 17:46:02.984558 00480000 ################################################################
1783 17:46:02.985331
1784 17:46:03.207010 00500000 ################################################################
1785 17:46:03.207355
1786 17:46:03.424715 00580000 ################################################################
1787 17:46:03.424863
1788 17:46:03.647160 00600000 ################################################################
1789 17:46:03.647506
1790 17:46:03.867500 00680000 ################################################################
1791 17:46:03.867653
1792 17:46:04.085349 00700000 ################################################################
1793 17:46:04.085744
1794 17:46:04.308332 00780000 ################################################################
1795 17:46:04.308859
1796 17:46:04.352749 00800000 ############# done.
1797 17:46:04.352840
1798 17:46:04.355868 The bootfile was 8490896 bytes long.
1799 17:46:04.356215
1800 17:46:04.359577 Sending tftp read request... done.
1801 17:46:04.359725
1802 17:46:04.362384 Waiting for the transfer...
1803 17:46:04.362462
1804 17:46:04.582683 00000000 ################################################################
1805 17:46:04.583086
1806 17:46:04.803504 00080000 ################################################################
1807 17:46:04.803907
1808 17:46:05.026593 00100000 ################################################################
1809 17:46:05.026973
1810 17:46:05.254356 00180000 ################################################################
1811 17:46:05.254702
1812 17:46:05.480861 00200000 ################################################################
1813 17:46:05.481011
1814 17:46:05.702340 00280000 ################################################################
1815 17:46:05.702483
1816 17:46:05.922512 00300000 ################################################################
1817 17:46:05.922876
1818 17:46:06.141426 00380000 ################################################################
1819 17:46:06.141761
1820 17:46:06.364187 00400000 ################################################################
1821 17:46:06.364331
1822 17:46:06.584220 00480000 ################################################################
1823 17:46:06.584587
1824 17:46:06.804198 00500000 ################################################################
1825 17:46:06.804544
1826 17:46:07.024134 00580000 ################################################################
1827 17:46:07.024308
1828 17:46:07.243589 00600000 ################################################################
1829 17:46:07.243986
1830 17:46:07.475109 00680000 ################################################################
1831 17:46:07.475475
1832 17:46:07.750556 00700000 ################################################################
1833 17:46:07.751119
1834 17:46:07.973019 00780000 ################################################################
1835 17:46:07.973396
1836 17:46:08.157290 00800000 ##################################################### done.
1837 17:46:08.157778
1838 17:46:08.160961 Sending tftp read request... done.
1839 17:46:08.161548
1840 17:46:08.163792 Waiting for the transfer...
1841 17:46:08.164256
1842 17:46:08.165692 00000000 # done.
1843 17:46:08.165749
1844 17:46:08.174674 Command line loaded dynamically from TFTP file: 11712589/tftp-deploy-xplj5qb3/kernel/cmdline
1845 17:46:08.174732
1846 17:46:08.190180 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1847 17:46:08.190467
1848 17:46:08.194408 ec_init: CrosEC protocol v3 supported (256, 256)
1849 17:46:08.198730
1850 17:46:08.202116 Shutting down all USB controllers.
1851 17:46:08.202171
1852 17:46:08.205181 Removing current net device
1853 17:46:08.205234
1854 17:46:08.207156 Finalizing coreboot
1855 17:46:08.207209
1856 17:46:08.212802 Exiting depthcharge with code 4 at timestamp: 18320786
1857 17:46:08.212883
1858 17:46:08.213162
1859 17:46:08.214668 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
1860 17:46:08.214758 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
1861 17:46:08.214823 Setting prompt string to ['Linux version [0-9]']
1862 17:46:08.214879 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1863 17:46:08.214935 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1864 17:46:08.215100 Starting kernel ...
1865 17:46:08.215160
1866 17:46:08.215217
1868 17:50:43.215642 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
1870 17:50:43.216515 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
1872 17:50:43.217121 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1875 17:50:43.218184 end: 2 depthcharge-action (duration 00:05:00) [common]
1877 17:50:43.219087 Cleaning after the job
1878 17:50:43.219434 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/ramdisk
1879 17:50:43.220932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/kernel
1880 17:50:43.221734 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712589/tftp-deploy-xplj5qb3/modules
1881 17:50:43.222046 start: 5.1 power-off (timeout 00:00:30) [common]
1882 17:50:43.222180 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-10' '--port=1' '--command=off'
1883 17:50:44.076108 >> Command sent successfully.
1884 17:50:44.078379 Returned 0 in 0 seconds
1885 17:50:44.179088 end: 5.1 power-off (duration 00:00:01) [common]
1887 17:50:44.180303 start: 5.2 read-feedback (timeout 00:09:59) [common]
1888 17:50:44.181151 Listened to connection for namespace 'common' for up to 1s
1889 17:50:45.181693 Finalising connection for namespace 'common'
1890 17:50:45.182279 Disconnecting from shell: Finalise
1891 17:50:45.182628
1892 17:50:45.283583 end: 5.2 read-feedback (duration 00:00:01) [common]
1893 17:50:45.284089 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712589
1894 17:50:45.296848 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712589
1895 17:50:45.296957 JobError: Your job cannot terminate cleanly.