Boot log: asus-CM1400CXA-dalboz
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:52:43.679164 lava-dispatcher, installed at version: 2023.08
2 17:52:43.679404 start: 0 validate
3 17:52:43.679541 Start time: 2023-10-09 17:52:43.679533+00:00 (UTC)
4 17:52:43.679689 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:52:43.679833 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:52:43.932063 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:52:43.932246 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:52:44.196261 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:52:44.196463 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:52:44.455301 validate duration: 0.78
12 17:52:44.455610 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:52:44.455721 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:52:44.455814 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:52:44.455956 Not decompressing ramdisk as can be used compressed.
16 17:52:44.456048 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:52:44.456130 saving as /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/ramdisk/rootfs.cpio.gz
18 17:52:44.456233 total size: 8418130 (8 MB)
19 17:52:44.457356 progress 0 % (0 MB)
20 17:52:44.459883 progress 5 % (0 MB)
21 17:52:44.462264 progress 10 % (0 MB)
22 17:52:44.464604 progress 15 % (1 MB)
23 17:52:44.466886 progress 20 % (1 MB)
24 17:52:44.469437 progress 25 % (2 MB)
25 17:52:44.471806 progress 30 % (2 MB)
26 17:52:44.474025 progress 35 % (2 MB)
27 17:52:44.476336 progress 40 % (3 MB)
28 17:52:44.478730 progress 45 % (3 MB)
29 17:52:44.481031 progress 50 % (4 MB)
30 17:52:44.483329 progress 55 % (4 MB)
31 17:52:44.485574 progress 60 % (4 MB)
32 17:52:44.487684 progress 65 % (5 MB)
33 17:52:44.489928 progress 70 % (5 MB)
34 17:52:44.492206 progress 75 % (6 MB)
35 17:52:44.494435 progress 80 % (6 MB)
36 17:52:44.496728 progress 85 % (6 MB)
37 17:52:44.499026 progress 90 % (7 MB)
38 17:52:44.501307 progress 95 % (7 MB)
39 17:52:44.503488 progress 100 % (8 MB)
40 17:52:44.503723 8 MB downloaded in 0.05 s (169.03 MB/s)
41 17:52:44.503886 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:52:44.504141 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:52:44.504227 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:52:44.504312 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:52:44.504457 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:52:44.504530 saving as /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/kernel/bzImage
48 17:52:44.504591 total size: 8490896 (8 MB)
49 17:52:44.504651 No compression specified
50 17:52:44.505766 progress 0 % (0 MB)
51 17:52:44.508008 progress 5 % (0 MB)
52 17:52:44.510354 progress 10 % (0 MB)
53 17:52:44.512727 progress 15 % (1 MB)
54 17:52:44.515099 progress 20 % (1 MB)
55 17:52:44.517485 progress 25 % (2 MB)
56 17:52:44.519895 progress 30 % (2 MB)
57 17:52:44.522225 progress 35 % (2 MB)
58 17:52:44.524606 progress 40 % (3 MB)
59 17:52:44.526939 progress 45 % (3 MB)
60 17:52:44.529254 progress 50 % (4 MB)
61 17:52:44.531553 progress 55 % (4 MB)
62 17:52:44.533785 progress 60 % (4 MB)
63 17:52:44.536042 progress 65 % (5 MB)
64 17:52:44.538327 progress 70 % (5 MB)
65 17:52:44.540613 progress 75 % (6 MB)
66 17:52:44.542847 progress 80 % (6 MB)
67 17:52:44.545122 progress 85 % (6 MB)
68 17:52:44.547408 progress 90 % (7 MB)
69 17:52:44.549751 progress 95 % (7 MB)
70 17:52:44.552047 progress 100 % (8 MB)
71 17:52:44.552170 8 MB downloaded in 0.05 s (170.21 MB/s)
72 17:52:44.552319 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:52:44.552554 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:52:44.552641 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:52:44.552725 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:52:44.552872 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:52:44.552944 saving as /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/modules/modules.tar
79 17:52:44.553005 total size: 250928 (0 MB)
80 17:52:44.553066 Using unxz to decompress xz
81 17:52:44.557440 progress 13 % (0 MB)
82 17:52:44.557883 progress 26 % (0 MB)
83 17:52:44.558139 progress 39 % (0 MB)
84 17:52:44.559726 progress 52 % (0 MB)
85 17:52:44.561576 progress 65 % (0 MB)
86 17:52:44.563623 progress 78 % (0 MB)
87 17:52:44.565641 progress 91 % (0 MB)
88 17:52:44.567535 progress 100 % (0 MB)
89 17:52:44.573189 0 MB downloaded in 0.02 s (11.86 MB/s)
90 17:52:44.573465 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:52:44.573739 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:52:44.573848 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:52:44.573953 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:52:44.574041 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:52:44.574128 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:52:44.574366 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4
98 17:52:44.574620 makedir: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin
99 17:52:44.574775 makedir: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/tests
100 17:52:44.574881 makedir: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/results
101 17:52:44.574999 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-add-keys
102 17:52:44.575198 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-add-sources
103 17:52:44.575339 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-background-process-start
104 17:52:44.575469 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-background-process-stop
105 17:52:44.575595 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-common-functions
106 17:52:44.575727 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-echo-ipv4
107 17:52:44.575851 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-install-packages
108 17:52:44.575973 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-installed-packages
109 17:52:44.576116 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-os-build
110 17:52:44.576241 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-probe-channel
111 17:52:44.576364 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-probe-ip
112 17:52:44.576497 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-target-ip
113 17:52:44.576620 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-target-mac
114 17:52:44.576742 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-target-storage
115 17:52:44.576879 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-case
116 17:52:44.577070 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-event
117 17:52:44.577196 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-feedback
118 17:52:44.577337 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-raise
119 17:52:44.577464 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-reference
120 17:52:44.577624 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-runner
121 17:52:44.577802 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-set
122 17:52:44.577929 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-test-shell
123 17:52:44.578057 Updating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-install-packages (oe)
124 17:52:44.578216 Updating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/bin/lava-installed-packages (oe)
125 17:52:44.578373 Creating /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/environment
126 17:52:44.578489 LAVA metadata
127 17:52:44.578565 - LAVA_JOB_ID=11712629
128 17:52:44.578665 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:52:44.578774 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:52:44.578840 skipped lava-vland-overlay
131 17:52:44.578917 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:52:44.579004 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:52:44.579068 skipped lava-multinode-overlay
134 17:52:44.579196 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:52:44.579277 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:52:44.579352 Loading test definitions
137 17:52:44.579446 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:52:44.579524 Using /lava-11712629 at stage 0
139 17:52:44.579865 uuid=11712629_1.4.2.3.1 testdef=None
140 17:52:44.579954 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:52:44.580056 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:52:44.580597 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:52:44.580831 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:52:44.581483 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:52:44.581724 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:52:44.582352 runner path: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/0/tests/0_dmesg test_uuid 11712629_1.4.2.3.1
149 17:52:44.582506 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:52:44.582733 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:52:44.582804 Using /lava-11712629 at stage 1
153 17:52:44.583133 uuid=11712629_1.4.2.3.5 testdef=None
154 17:52:44.583221 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:52:44.583305 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:52:44.583777 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:52:44.583992 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:52:44.584641 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:52:44.584931 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:52:44.585576 runner path: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/1/tests/1_bootrr test_uuid 11712629_1.4.2.3.5
163 17:52:44.585728 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:52:44.585931 Creating lava-test-runner.conf files
166 17:52:44.585994 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/0 for stage 0
167 17:52:44.586082 - 0_dmesg
168 17:52:44.586165 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712629/lava-overlay-fxzk_7p4/lava-11712629/1 for stage 1
169 17:52:44.586266 - 1_bootrr
170 17:52:44.586361 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:52:44.586458 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:52:44.595036 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:52:44.595233 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:52:44.595324 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:52:44.595412 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:52:44.595497 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:52:44.856604 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:52:44.856996 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:52:44.857151 extracting modules file /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712629/extract-overlay-ramdisk-99k3939y/ramdisk
180 17:52:44.871488 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:52:44.871660 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:52:44.871760 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712629/compress-overlay-r9lf3u46/overlay-1.4.2.4.tar.gz to ramdisk
183 17:52:44.871836 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712629/compress-overlay-r9lf3u46/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712629/extract-overlay-ramdisk-99k3939y/ramdisk
184 17:52:44.881091 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:52:44.881248 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:52:44.881350 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:52:44.881443 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:52:44.881528 Building ramdisk /var/lib/lava/dispatcher/tmp/11712629/extract-overlay-ramdisk-99k3939y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712629/extract-overlay-ramdisk-99k3939y/ramdisk
189 17:52:45.031063 >> 49788 blocks
190 17:52:45.906644 rename /var/lib/lava/dispatcher/tmp/11712629/extract-overlay-ramdisk-99k3939y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/ramdisk/ramdisk.cpio.gz
191 17:52:45.907124 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:52:45.907262 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:52:45.907372 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:52:45.907477 No mkimage arch provided, not using FIT.
195 17:52:45.907568 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:52:45.907655 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:52:45.907761 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:52:45.907855 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:52:45.907935 No LXC device requested
200 17:52:45.908012 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:52:45.908103 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:52:45.908188 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:52:45.908267 Checking files for TFTP limit of 4294967296 bytes.
204 17:52:45.908698 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:52:45.908808 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:52:45.908936 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:52:45.909065 substitutions:
208 17:52:45.909141 - {DTB}: None
209 17:52:45.909205 - {INITRD}: 11712629/tftp-deploy-teqw0we0/ramdisk/ramdisk.cpio.gz
210 17:52:45.909274 - {KERNEL}: 11712629/tftp-deploy-teqw0we0/kernel/bzImage
211 17:52:45.909333 - {LAVA_MAC}: None
212 17:52:45.909390 - {PRESEED_CONFIG}: None
213 17:52:45.909453 - {PRESEED_LOCAL}: None
214 17:52:45.909508 - {RAMDISK}: 11712629/tftp-deploy-teqw0we0/ramdisk/ramdisk.cpio.gz
215 17:52:45.909572 - {ROOT_PART}: None
216 17:52:45.909626 - {ROOT}: None
217 17:52:45.909683 - {SERVER_IP}: 192.168.201.1
218 17:52:45.909738 - {TEE}: None
219 17:52:45.909801 Parsed boot commands:
220 17:52:45.909864 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:52:45.910061 Parsed boot commands: tftpboot 192.168.201.1 11712629/tftp-deploy-teqw0we0/kernel/bzImage 11712629/tftp-deploy-teqw0we0/kernel/cmdline 11712629/tftp-deploy-teqw0we0/ramdisk/ramdisk.cpio.gz
222 17:52:45.910157 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:52:45.910244 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:52:45.910346 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:52:45.910446 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:52:45.910519 Not connected, no need to disconnect.
227 17:52:45.910594 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:52:45.910678 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:52:45.910746 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-CM1400CXA-dalboz-cbg-6'
230 17:52:45.914868 Setting prompt string to ['lava-test: # ']
231 17:52:45.915356 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:52:45.915503 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:52:45.915643 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:52:45.915786 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:52:45.916036 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-CM1400CXA-dalboz-cbg-6' '--port=1' '--command=reboot'
236 17:52:51.058418 >> Command sent successfully.
237 17:52:51.060840 Returned 0 in 5 seconds
238 17:52:51.161244 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:52:51.161568 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:52:51.161666 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:52:51.161783 Setting prompt string to 'Starting depthcharge on Shuboz...'
243 17:52:51.161866 Changing prompt to 'Starting depthcharge on Shuboz...'
244 17:52:51.161935 depthcharge-start: Wait for prompt Starting depthcharge on Shuboz... (timeout 00:05:00)
245 17:52:51.162203 [Enter `^Ec?' for help]
246 17:52:54.393273
247 17:52:54.393923
248 17:52:54.399959 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 bootblock starting (log level: 8)...
249 17:52:54.400593 Family_Model: 00820f01
250 17:52:54.403036 PSP boot mode: Production
251 17:52:54.406121 Silicon level: Production
252 17:52:54.409738 PMxC0 STATUS: 0x800 BIT11
253 17:52:54.410281 I2C bus 3 version 0x3132322a
254 17:52:54.413063 DW I2C bus 3 at 0xfedc5000 (400 KHz)
255 17:52:54.419973 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
256 17:52:54.422912 CBFS: Locating 'fallback/romstage'
257 17:52:54.426511 CBFS: Found @ offset 123000 size cc24
258 17:52:54.435421 BS: bootblock times (exec / console): total (unknown) / 34 ms
259 17:52:54.435888
260 17:52:54.436204
261 17:52:54.442310 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 romstage starting (log level: 8)...
262 17:52:54.445695 POST: 0x41
263 17:52:54.446239 POST: 0x42
264 17:52:54.449093 Family_Model: 00820f01
265 17:52:54.455703 GPIO Control Switch: 0xef000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000
266 17:52:54.456164 POST: 0x43
267 17:52:54.458796 Boot Count incremented to 5176
268 17:52:54.462430 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
269 17:52:54.465369 CBFS: Locating 'fspm.bin'
270 17:52:54.468849 CBFS: Found @ offset 152f00 size 18558
271 17:52:54.508989 Spec version: v2.0
272 17:52:54.512571 Revision: 0.0.0, Build Number 1
273 17:52:54.513008 Type: release/test
274 17:52:54.519157 image ID: AMD_PCS0, base 0x20c0000 + 0x4b000
275 17:52:54.522249 Config region 0x46f2c + 0x104
276 17:52:54.522684 Memory init offset 0x7b8
277 17:52:54.525726 POST: 0x34
278 17:52:54.526216 bootmode is set to: 0
279 17:52:54.529312 POST: 0x36
280 17:52:54.532575 Calling FspMemoryInit: 0x020c07b8
281 17:52:54.533103 0x02000dec: raminit_upd
282 17:52:54.535972 0x0204ccbc: &hob_list_ptr
283 17:52:54.536404 POST: 0x92
284 17:52:54.541997 POST: 0x98
285 17:52:54.542432 CBMEM:
286 17:52:54.546012 IMD: root @ 0xcb7ff000 254 entries.
287 17:52:54.548604 IMD: root @ 0xcb7fec00 62 entries.
288 17:52:54.551883 FMAP: area RO_VPD found @ 800000 (16384 bytes)
289 17:52:54.555412 WARNING: RO_VPD is uninitialized or empty.
290 17:52:54.561976 FMAP: area RW_VPD found @ 615000 (8192 bytes)
291 17:52:54.562418 External stage cache:
292 17:52:54.565473 IMD: root @ 0xcbfff000 254 entries.
293 17:52:54.568558 IMD: root @ 0xcbffec00 62 entries.
294 17:52:54.572556 FspMemoryInit returned 0x00000000
295 17:52:54.575465 FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)
296 17:52:54.582098 APOB valid copy is already in flash
297 17:52:54.585540 POST: 0x44
298 17:52:54.588994 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
299 17:52:54.592027 CBFS: Locating 'fallback/ramstage'
300 17:52:54.595512 CBFS: Found @ offset 132280 size 1c422
301 17:52:54.601657 Decompressing stage fallback/ramstage @ 0xca6b5fc0 (1119536 bytes)
302 17:52:54.657246 Loading module at 0xca6b6000 with entry 0xca6b6000. filesize: 0x40980 memsize: 0x1114f0
303 17:52:54.660622 Processing 4370 relocs. Offset value of 0xba6b6000
304 17:52:54.667582 BS: romstage times (exec / console): total (unknown) / 132 ms
305 17:52:54.668017
306 17:52:54.668469
307 17:52:54.674381 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 ramstage starting (log level: 8)...
308 17:52:54.677395 POST: 0x39
309 17:52:54.677839 POST: 0x80
310 17:52:54.678265 Normal boot
311 17:52:54.680891 POST: 0x70
312 17:52:54.683999 BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms
313 17:52:54.684467 POST: 0x71
314 17:52:54.687632 mainboard: EC init
315 17:52:54.690685 Chrome EC: Set SMI mask to 0x0000000000000000
316 17:52:54.694289 Chrome EC: UHEPI supported
317 17:52:54.700473 Chrome EC: clear events_b mask to 0x0000000000000000
318 17:52:54.703954 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
319 17:52:54.710987 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001400101e
320 17:52:54.714259 Chrome EC: Set WAKE mask to 0x0000000000000000
321 17:52:54.717551 Board ID: 4
322 17:52:54.721006 EC returned error result code 3
323 17:52:54.727432 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
324 17:52:54.727871 CBFS: Locating 'fsps.bin'
325 17:52:54.730596 CBFS: Found @ offset 16bfc0 size 1654d
326 17:52:54.812887 Spec version: v2.0
327 17:52:54.813424 Revision: 0.0.0, Build Number 1
328 17:52:54.813772 Type: release/test
329 17:52:54.814127 image ID: AMD_PCS0, base 0xca677000 + 0x3e000
330 17:52:54.814445 Config region 0x3cf54 + 0x202
331 17:52:54.814780 Silicon init offset 0x3c2
332 17:52:54.815425 Notify phase offset 0x3b8
333 17:52:54.815863 Calling FspSiliconInit: 0xca6773c2
334 17:52:54.816588 0xca7074f0: upd
335 17:52:54.816953 POST: 0x93
336 17:52:55.077521 POST: 0x99
337 17:52:55.080832 FspSiliconInit returned 0x00000000
338 17:52:55.084259 I2C bus 2 version 0x3132322a
339 17:52:55.087532 DW I2C bus 2 at 0xfedc4000 (400 KHz)
340 17:52:55.091221 FMAP: area RW_ELOG found @ 610000 (4096 bytes)
341 17:52:55.094349 spi_init: SPI BAR at 0xfec10000
342 17:52:55.094827 Manufacturer: ef
343 17:52:55.101015 SF: Detected ef 8018 with sector size 0x1000, total 0x1000000
344 17:52:55.104537 ELOG: NV offset 0x610000 size 0x1000
345 17:52:55.114800 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
346 17:52:55.121614 ELOG: Event(17) added with size 13 at 2023-10-09 17:52:56 UTC
347 17:52:55.125064 ELOG: Event(9F) added with size 14 at 2023-10-09 17:52:56 UTC
348 17:52:55.128648 PM1_STS: PWRBTN
349 17:52:55.134957 BS: BS_DEV_INIT_CHIPS run times (exec / console): 331 / 113 ms
350 17:52:55.138724 EC returned error result code 3
351 17:52:55.139209 FW_CONFIG value is 0x4080000
352 17:52:55.145389 fw_config match found: TOUCHPAD=REGULAR_TOUCHPAD
353 17:52:55.148677 I2C: 00:15 disabled by fw_config
354 17:52:55.151578 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682
355 17:52:55.155145 GENERIC: 1.0 disabled by fw_config
356 17:52:55.161225 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682
357 17:52:55.164595 GENERIC: 1.0 disabled by fw_config
358 17:52:55.168190 BS: BS_DEV_ENUMERATE entry times (exec / console): 1 / 30 ms
359 17:52:55.171198 POST: 0x72
360 17:52:55.171290 Enumerating buses...
361 17:52:55.174771 Show all devs... Before device enumeration.
362 17:52:55.178429 Root Device: enabled 1
363 17:52:55.181525 CPU_CLUSTER: 0: enabled 1
364 17:52:55.181609 DOMAIN: 0000: enabled 1
365 17:52:55.185023 MMIO: fedc5000: enabled 1
366 17:52:55.187990 MMIO: fedca000: enabled 0
367 17:52:55.191693 MMIO: fedce000: enabled 0
368 17:52:55.191800 MMIO: fedcf000: enabled 0
369 17:52:55.194664 MMIO: fedc4000: enabled 1
370 17:52:55.198013 GENERIC: 0.1: enabled 1
371 17:52:55.198112 APIC: 00: enabled 1
372 17:52:55.201634 PCI: 00:00.0: enabled 1
373 17:52:55.201723 PCI: 00:00.2: enabled 1
374 17:52:55.205043 PCI: 00:01.0: enabled 1
375 17:52:55.207924 PCI: 00:01.1: enabled 0
376 17:52:55.208049 PCI: 00:01.2: enabled 1
377 17:52:55.211206 PCI: 00:01.3: enabled 1
378 17:52:55.215233 PCI: 00:01.4: enabled 0
379 17:52:55.215816 PCI: 00:01.5: enabled 0
380 17:52:55.218243 PCI: 00:08.0: enabled 1
381 17:52:55.221919 PCI: 00:08.1: enabled 1
382 17:52:55.222522 PCI: 00:08.2: enabled 0
383 17:52:55.224988 PCI: 00:14.0: enabled 1
384 17:52:55.228617 PCI: 00:14.3: enabled 1
385 17:52:55.229212 PCI: 00:18.0: enabled 1
386 17:52:55.232831 PCI: 00:18.1: enabled 1
387 17:52:55.233257 PCI: 00:18.2: enabled 1
388 17:52:55.236101 PCI: 00:18.3: enabled 1
389 17:52:55.239688 PCI: 00:18.4: enabled 1
390 17:52:55.240117 PCI: 00:18.5: enabled 1
391 17:52:55.242787 PCI: 00:18.6: enabled 1
392 17:52:55.246344 I2C: 00:50: enabled 1
393 17:52:55.246787 I2C: 00:10: enabled 1
394 17:52:55.249296 I2C: 00:15: enabled 1
395 17:52:55.249724 I2C: 00:15: enabled 0
396 17:52:55.252877 PCI: 00:00.0: enabled 1
397 17:52:55.255977 PCI: 00:00.0: enabled 1
398 17:52:55.256403 PCI: 00:00.1: enabled 1
399 17:52:55.259682 PCI: 00:00.2: enabled 1
400 17:52:55.262729 PCI: 00:00.3: enabled 1
401 17:52:55.263187 PCI: 00:00.5: enabled 1
402 17:52:55.266298 PCI: 00:00.6: enabled 0
403 17:52:55.269749 PCI: 00:00.7: enabled 1
404 17:52:55.270182 PCI: 00:00.0: enabled 0
405 17:52:55.272652 PNP: 0c09.0: enabled 1
406 17:52:55.273080 USB0 port 0: enabled 1
407 17:52:55.276576 GENERIC: 0.0: enabled 1
408 17:52:55.279572 GENERIC: 1.0: enabled 0
409 17:52:55.280002 GENERIC: 0.0: enabled 1
410 17:52:55.283409 GENERIC: 0.0: enabled 1
411 17:52:55.286387 GENERIC: 1.0: enabled 0
412 17:52:55.286813 USB2 port 0: enabled 1
413 17:52:55.289440 USB2 port 1: enabled 1
414 17:52:55.293100 USB2 port 2: enabled 1
415 17:52:55.293528 USB2 port 3: enabled 1
416 17:52:55.296642 USB2 port 4: enabled 1
417 17:52:55.299750 USB2 port 5: enabled 1
418 17:52:55.300179 USB3 port 0: enabled 1
419 17:52:55.303205 USB3 port 1: enabled 1
420 17:52:55.303739 USB3 port 2: enabled 1
421 17:52:55.306424 USB3 port 3: enabled 1
422 17:52:55.309429 I2C: 00:1a: enabled 1
423 17:52:55.309907 I2C: 00:1a: enabled 1
424 17:52:55.312945 Compare with tree...
425 17:52:55.313412 Root Device: enabled 1
426 17:52:55.316482 CPU_CLUSTER: 0: enabled 1
427 17:52:55.319833 APIC: 00: enabled 1
428 17:52:55.320314 DOMAIN: 0000: enabled 1
429 17:52:55.323182 PCI: 00:00.0: enabled 1
430 17:52:55.326338 PCI: 00:00.2: enabled 1
431 17:52:55.329336 PCI: 00:01.0: enabled 1
432 17:52:55.329760 PCI: 00:01.1: enabled 0
433 17:52:55.333015 PCI: 00:01.2: enabled 1
434 17:52:55.336551 PCI: 00:00.0: enabled 1
435 17:52:55.336985 PCI: 00:01.3: enabled 1
436 17:52:55.339923 PCI: 00:01.4: enabled 0
437 17:52:55.343425 PCI: 00:01.5: enabled 0
438 17:52:55.346640 PCI: 00:08.0: enabled 1
439 17:52:55.347140 PCI: 00:08.1: enabled 1
440 17:52:55.349665 PCI: 00:00.0: enabled 1
441 17:52:55.353219 PCI: 00:00.1: enabled 1
442 17:52:55.353680 PCI: 00:00.2: enabled 1
443 17:52:55.356624 PCI: 00:00.3: enabled 1
444 17:52:55.359547 USB0 port 0: enabled 1
445 17:52:55.363317 USB2 port 0: enabled 1
446 17:52:55.363893 USB2 port 1: enabled 1
447 17:52:55.366783 USB2 port 2: enabled 1
448 17:52:55.369769 USB2 port 3: enabled 1
449 17:52:55.372795 USB2 port 4: enabled 1
450 17:52:55.373270 USB2 port 5: enabled 1
451 17:52:55.375972 USB3 port 0: enabled 1
452 17:52:55.379311 USB3 port 1: enabled 1
453 17:52:55.382643 USB3 port 2: enabled 1
454 17:52:55.382745 USB3 port 3: enabled 1
455 17:52:55.386328 PCI: 00:00.5: enabled 1
456 17:52:55.389305 GENERIC: 0.0: enabled 1
457 17:52:55.393023 GENERIC: 1.0: enabled 0
458 17:52:55.393135 PCI: 00:00.6: enabled 0
459 17:52:55.395761 PCI: 00:00.7: enabled 1
460 17:52:55.399400 PCI: 00:08.2: enabled 0
461 17:52:55.402879 PCI: 00:00.0: enabled 0
462 17:52:55.402962 PCI: 00:14.0: enabled 1
463 17:52:55.405920 PCI: 00:14.3: enabled 1
464 17:52:55.409578 PNP: 0c09.0: enabled 1
465 17:52:55.409681 GENERIC: 0.0: enabled 1
466 17:52:55.412897 I2C: 00:1a: enabled 1
467 17:52:55.416971 GENERIC: 0.0: enabled 1
468 17:52:55.417060 GENERIC: 1.0: enabled 0
469 17:52:55.420664 I2C: 00:1a: enabled 1
470 17:52:55.424705 PCI: 00:18.0: enabled 1
471 17:52:55.424794 PCI: 00:18.1: enabled 1
472 17:52:55.428300 PCI: 00:18.2: enabled 1
473 17:52:55.433154 PCI: 00:18.3: enabled 1
474 17:52:55.433238 PCI: 00:18.4: enabled 1
475 17:52:55.436654 PCI: 00:18.5: enabled 1
476 17:52:55.436737 PCI: 00:18.6: enabled 1
477 17:52:55.439868 MMIO: fedc5000: enabled 1
478 17:52:55.442908 I2C: 00:50: enabled 1
479 17:52:55.442991 MMIO: fedca000: enabled 0
480 17:52:55.446487 MMIO: fedce000: enabled 0
481 17:52:55.449940 MMIO: fedcf000: enabled 0
482 17:52:55.452926 MMIO: fedc4000: enabled 1
483 17:52:55.453010 I2C: 00:10: enabled 1
484 17:52:55.456601 I2C: 00:15: enabled 1
485 17:52:55.459970 I2C: 00:15: enabled 0
486 17:52:55.460053 GENERIC: 0.1: enabled 1
487 17:52:55.462920 Mainboard Shuboz Enable.
488 17:52:55.466437 Root Device scanning...
489 17:52:55.466520 scan_static_bus for Root Device
490 17:52:55.469999 CPU_CLUSTER: 0 enabled
491 17:52:55.473073 DOMAIN: 0000 enabled
492 17:52:55.473156 MMIO: fedc5000 enabled
493 17:52:55.476735 MMIO: fedca000 disabled
494 17:52:55.479717 MMIO: fedce000 disabled
495 17:52:55.479800 MMIO: fedcf000 disabled
496 17:52:55.483007 MMIO: fedc4000 enabled
497 17:52:55.483146 GENERIC: 0.1 enabled
498 17:52:55.486533 DOMAIN: 0000 scanning...
499 17:52:55.489796 PCI: pci_scan_bus for bus 00
500 17:52:55.489888 POST: 0x24
501 17:52:55.493430 PCI: 00:00.0 [1022/15d0] ops
502 17:52:55.496584 PCI: 00:00.0 [1022/15d0] enabled
503 17:52:55.500391 PCI: 00:00.2 [1022/0000] ops
504 17:52:55.503427 PCI: 00:00.2 [1022/15d1] enabled
505 17:52:55.503997 PCI: 00:01.0 [1022/1452] enabled
506 17:52:55.507143 PCI: 00:01.2 [1022/15d3] bus ops
507 17:52:55.510125 PCI: 00:01.2 [1022/15d3] enabled
508 17:52:55.513787 PCI: 00:01.3 [1022/15d3] bus ops
509 17:52:55.516787 PCI: 00:01.3 [1022/15d3] enabled
510 17:52:55.520449 PCI: 00:08.0 [1022/1452] enabled
511 17:52:55.523541 PCI: 00:08.1 [1022/0000] bus ops
512 17:52:55.527115 PCI: 00:08.1 [1022/15db] enabled
513 17:52:55.527567 PCI: 00:14.0 [1022/790b] bus ops
514 17:52:55.530135 PCI: 00:14.0 [1022/790b] enabled
515 17:52:55.533858 PCI: 00:14.3 [1022/0000] bus ops
516 17:52:55.537272 PCI: 00:14.3 [1022/790e] enabled
517 17:52:55.540823 PCI: 00:18.0 [1022/0000] ops
518 17:52:55.543887 PCI: 00:18.0 [1022/15e8] enabled
519 17:52:55.547246 PCI: 00:18.1 [1022/0000] ops
520 17:52:55.547682 PCI: 00:18.1 [1022/15e9] enabled
521 17:52:55.550663 PCI: 00:18.2 [1022/0000] ops
522 17:52:55.553999 PCI: 00:18.2 [1022/15ea] enabled
523 17:52:55.557185 PCI: 00:18.3 [1022/0000] ops
524 17:52:55.560751 PCI: 00:18.3 [1022/15eb] enabled
525 17:52:55.563727 PCI: 00:18.4 [1022/0000] ops
526 17:52:55.564174 PCI: 00:18.4 [1022/15ec] enabled
527 17:52:55.567295 PCI: 00:18.5 [1022/0000] ops
528 17:52:55.570251 PCI: 00:18.5 [1022/15ed] enabled
529 17:52:55.573864 PCI: 00:18.6 [1022/0000] ops
530 17:52:55.577476 PCI: 00:18.6 [1022/15ee] enabled
531 17:52:55.580502 PCI: 00:18.7 [1022/15ef] enabled
532 17:52:55.580933 POST: 0x25
533 17:52:55.584131 PCI: Leftover static devices:
534 17:52:55.584564 PCI: 00:01.1
535 17:52:55.587127 PCI: 00:01.4
536 17:52:55.587577 PCI: 00:01.5
537 17:52:55.587917 PCI: 00:08.2
538 17:52:55.590645 PCI: Check your devicetree.cb.
539 17:52:55.594158 PCI: 00:01.2 scanning...
540 17:52:55.597387 do_pci_scan_bridge for PCI: 00:01.2
541 17:52:55.600814 PCI: pci_scan_bus for bus 01
542 17:52:55.601241 POST: 0x24
543 17:52:55.603867 PCI: 01:00.0 [10ec/c822] enabled
544 17:52:55.604298 POST: 0x25
545 17:52:55.604639 POST: 0x55
546 17:52:55.606755 Enabling Common Clock Configuration
547 17:52:55.614194 L1 Sub-State supported from root port 1
548 17:52:55.614628 L1 Sub-State Support = 0xf
549 17:52:55.617352 CommonModeRestoreTime = 0x1e
550 17:52:55.620761 Power On Value = 0x1e, Power On Scale = 0x0
551 17:52:55.624111 ASPM: Enabled L1
552 17:52:55.627127 PCIe: Max_Payload_Size adjusted to 128
553 17:52:55.630563 scan_bus: bus PCI: 00:01.2 finished in 33 msecs
554 17:52:55.633685 PCI: 00:01.3 scanning...
555 17:52:55.637300 do_pci_scan_bridge for PCI: 00:01.3
556 17:52:55.637729 PCI: pci_scan_bus for bus 02
557 17:52:55.640344 POST: 0x24
558 17:52:55.644221 PCI: 02:00.0 [17a0/9750] enabled
559 17:52:55.644681 POST: 0x25
560 17:52:55.645026 POST: 0x55
561 17:52:55.646984 Enabling Common Clock Configuration
562 17:52:55.650644 L1 Sub-State supported from root port 1
563 17:52:55.653994 L1 Sub-State Support = 0xf
564 17:52:55.657184 CommonModeRestoreTime = 0xff
565 17:52:55.660583 Power On Value = 0x1f, Power On Scale = 0x2
566 17:52:55.663926 ASPM: Enabled L1
567 17:52:55.670280 PCIe: Max_Payload_Size adjusted to 128
568 17:52:55.677482 scan_bus: bus PCI: 00:01.3 finished in 39 msecs
569 17:52:55.677959 PCI: 00:08.1 scanning...
570 17:52:55.680361 do_pci_scan_bridge for PCI: 00:08.1
571 17:52:55.684241 PCI: pci_scan_bus for bus 03
572 17:52:55.684788 POST: 0x24
573 17:52:55.687175 PCI: 03:00.0 [1002/0000] ops
574 17:52:55.690728 PCI: 03:00.0 [1002/15d8] enabled
575 17:52:55.694327 PCI: 03:00.1 [1002/15de] enabled
576 17:52:55.697428 PCI: 03:00.2 [1022/15df] enabled
577 17:52:55.701031 PCI: 03:00.3 [1022/0000] bus ops
578 17:52:55.704391 PCI: 03:00.3 [1022/15e5] enabled
579 17:52:55.707688 PCI: 03:00.5 [1022/15e2] bus ops
580 17:52:55.708133 PCI: 03:00.5 [1022/15e2] enabled
581 17:52:55.711029 PCI: 03:00.7 [1022/15e4] enabled
582 17:52:55.713986 POST: 0x25
583 17:52:55.714421 PCI: Leftover static devices:
584 17:52:55.717795 PCI: 03:00.6
585 17:52:55.720739 PCI: Check your devicetree.cb.
586 17:52:55.721173 PCI: 03:00.3 scanning...
587 17:52:55.724433 scan_static_bus for PCI: 03:00.3
588 17:52:55.727585 USB0 port 0 enabled
589 17:52:55.728051 USB0 port 0 scanning...
590 17:52:55.731256 scan_static_bus for USB0 port 0
591 17:52:55.734454 USB2 port 0 enabled
592 17:52:55.734883 USB2 port 1 enabled
593 17:52:55.737651 USB2 port 2 enabled
594 17:52:55.741063 USB2 port 3 enabled
595 17:52:55.741496 USB2 port 4 enabled
596 17:52:55.744416 USB2 port 5 enabled
597 17:52:55.744850 USB3 port 0 enabled
598 17:52:55.747359 USB3 port 1 enabled
599 17:52:55.747908 USB3 port 2 enabled
600 17:52:55.750959 USB3 port 3 enabled
601 17:52:55.751454 USB2 port 0 scanning...
602 17:52:55.754048 scan_static_bus for USB2 port 0
603 17:52:55.757558 scan_static_bus for USB2 port 0 done
604 17:52:55.764321 scan_bus: bus USB2 port 0 finished in 6 msecs
605 17:52:55.764755 USB2 port 1 scanning...
606 17:52:55.768008 scan_static_bus for USB2 port 1
607 17:52:55.770886 scan_static_bus for USB2 port 1 done
608 17:52:55.774357 scan_bus: bus USB2 port 1 finished in 6 msecs
609 17:52:55.777887 USB2 port 2 scanning...
610 17:52:55.781165 scan_static_bus for USB2 port 2
611 17:52:55.784616 scan_static_bus for USB2 port 2 done
612 17:52:55.787630 scan_bus: bus USB2 port 2 finished in 6 msecs
613 17:52:55.791124 USB2 port 3 scanning...
614 17:52:55.794108 scan_static_bus for USB2 port 3
615 17:52:55.797592 scan_static_bus for USB2 port 3 done
616 17:52:55.801431 scan_bus: bus USB2 port 3 finished in 6 msecs
617 17:52:55.801887 USB2 port 4 scanning...
618 17:52:55.804333 scan_static_bus for USB2 port 4
619 17:52:55.807605 scan_static_bus for USB2 port 4 done
620 17:52:55.810511 scan_bus: bus USB2 port 4 finished in 6 msecs
621 17:52:55.814238 USB2 port 5 scanning...
622 17:52:55.817697 scan_static_bus for USB2 port 5
623 17:52:55.821128 scan_static_bus for USB2 port 5 done
624 17:52:55.824537 scan_bus: bus USB2 port 5 finished in 6 msecs
625 17:52:55.827671 USB3 port 0 scanning...
626 17:52:55.830641 scan_static_bus for USB3 port 0
627 17:52:55.834460 scan_static_bus for USB3 port 0 done
628 17:52:55.837438 scan_bus: bus USB3 port 0 finished in 6 msecs
629 17:52:55.841319 USB3 port 1 scanning...
630 17:52:55.841495 scan_static_bus for USB3 port 1
631 17:52:55.844170 scan_static_bus for USB3 port 1 done
632 17:52:55.851629 scan_bus: bus USB3 port 1 finished in 6 msecs
633 17:52:55.851826 USB3 port 2 scanning...
634 17:52:55.854645 scan_static_bus for USB3 port 2
635 17:52:55.857720 scan_static_bus for USB3 port 2 done
636 17:52:55.861345 scan_bus: bus USB3 port 2 finished in 6 msecs
637 17:52:55.864508 USB3 port 3 scanning...
638 17:52:55.867650 scan_static_bus for USB3 port 3
639 17:52:55.871065 scan_static_bus for USB3 port 3 done
640 17:52:55.874470 scan_bus: bus USB3 port 3 finished in 6 msecs
641 17:52:55.878178 scan_static_bus for USB0 port 0 done
642 17:52:55.881447 scan_bus: bus USB0 port 0 finished in 149 msecs
643 17:52:55.884297 scan_static_bus for PCI: 03:00.3 done
644 17:52:55.891507 scan_bus: bus PCI: 03:00.3 finished in 163 msecs
645 17:52:55.891900 PCI: 03:00.5 scanning...
646 17:52:55.894382 scan_static_bus for PCI: 03:00.5
647 17:52:55.897616 GENERIC: 0.0 enabled
648 17:52:55.901039 GENERIC: 1.0 disabled
649 17:52:55.904721 scan_static_bus for PCI: 03:00.5 done
650 17:52:55.907681 scan_bus: bus PCI: 03:00.5 finished in 10 msecs
651 17:52:55.908187 POST: 0x55
652 17:52:55.910733 scan_bus: bus PCI: 00:08.1 finished in 229 msecs
653 17:52:55.914377 PCI: 00:14.0 scanning...
654 17:52:55.917905 scan_generic_bus for PCI: 00:14.0
655 17:52:55.921369 scan_generic_bus for PCI: 00:14.0 done
656 17:52:55.924203 scan_bus: bus PCI: 00:14.0 finished in 6 msecs
657 17:52:55.927619 PCI: 00:14.3 scanning...
658 17:52:55.931368 scan_static_bus for PCI: 00:14.3
659 17:52:55.934245 PNP: 0c09.0 enabled
660 17:52:55.934665 PNP: 0c09.0 scanning...
661 17:52:55.938024 scan_static_bus for PNP: 0c09.0
662 17:52:55.941105 GENERIC: 0.0 enabled
663 17:52:55.941527 GENERIC: 0.0 enabled
664 17:52:55.944665 GENERIC: 1.0 disabled
665 17:52:55.945088 GENERIC: 0.0 scanning...
666 17:52:55.947728 scan_static_bus for GENERIC: 0.0
667 17:52:55.951152 I2C: 00:1a enabled
668 17:52:55.954648 scan_static_bus for GENERIC: 0.0 done
669 17:52:55.958067 scan_bus: bus GENERIC: 0.0 finished in 8 msecs
670 17:52:55.961383 GENERIC: 0.0 scanning...
671 17:52:55.964482 scan_static_bus for GENERIC: 0.0
672 17:52:55.968131 scan_static_bus for GENERIC: 0.0 done
673 17:52:55.971164 scan_bus: bus GENERIC: 0.0 finished in 6 msecs
674 17:52:55.974859 scan_static_bus for PNP: 0c09.0 done
675 17:52:55.977600 scan_bus: bus PNP: 0c09.0 finished in 39 msecs
676 17:52:55.981178 scan_static_bus for PCI: 00:14.3 done
677 17:52:55.987549 scan_bus: bus PCI: 00:14.3 finished in 53 msecs
678 17:52:55.987973 POST: 0x55
679 17:52:55.991221 scan_bus: bus DOMAIN: 0000 finished in 499 msecs
680 17:52:55.994235 MMIO: fedc5000 scanning...
681 17:52:55.997537 scan_generic_bus for MMIO: fedc5000
682 17:52:56.001348 bus: MMIO: fedc5000[0]->I2C: 01:50 enabled
683 17:52:56.004137 scan_generic_bus for MMIO: fedc5000 done
684 17:52:56.007448 scan_bus: bus MMIO: fedc5000 finished in 10 msecs
685 17:52:56.010695 MMIO: fedc4000 scanning...
686 17:52:56.014451 scan_generic_bus for MMIO: fedc4000
687 17:52:56.017726 bus: MMIO: fedc4000[0]->I2C: 02:10 enabled
688 17:52:56.024182 bus: MMIO: fedc4000[0]->I2C: 02:15 enabled
689 17:52:56.028949 bus: MMIO: fedc4000[0]->I2C: 02:15 disabled
690 17:52:56.032015 scan_generic_bus for MMIO: fedc4000 done
691 17:52:56.035157 scan_bus: bus MMIO: fedc4000 finished in 18 msecs
692 17:52:56.038616 scan_static_bus for Root Device done
693 17:52:56.041734 scan_bus: bus Root Device finished in 571 msecs
694 17:52:56.042161 done
695 17:52:56.048582 BS: BS_DEV_ENUMERATE run times (exec / console): 8 / 863 ms
696 17:52:56.049010 POST: 0x73
697 17:52:56.052305 found VGA at PCI: 03:00.0
698 17:52:56.055263 Setting up VGA for PCI: 03:00.0
699 17:52:56.058838 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:08.1
700 17:52:56.061881 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
701 17:52:56.068638 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
702 17:52:56.069097 Allocating resources...
703 17:52:56.071816 Reading resources...
704 17:52:56.075459 Root Device read_resources bus 0 link: 0
705 17:52:56.078524 CPU_CLUSTER: 0 read_resources bus 0 link: 0
706 17:52:56.085653 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
707 17:52:56.088630 DOMAIN: 0000 read_resources bus 0 link: 0
708 17:52:56.092040 Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
709 17:52:56.098508 PCI: 00:01.2 read_resources bus 1 link: 0
710 17:52:56.102058 PCI: 00:01.2 read_resources bus 1 link: 0 done
711 17:52:56.105291 PCI: 00:01.3 read_resources bus 2 link: 0
712 17:52:56.113903 PCI: 00:01.3 read_resources bus 2 link: 0 done
713 17:52:56.117259 PCI: 00:08.1 read_resources bus 3 link: 0
714 17:52:56.120599 PCI: 03:00.3 read_resources bus 0 link: 0
715 17:52:56.123872 USB0 port 0 read_resources bus 0 link: 0
716 17:52:56.130234 USB0 port 0 read_resources bus 0 link: 0 done
717 17:52:56.133781 PCI: 03:00.3 read_resources bus 0 link: 0 done
718 17:52:56.136668 PCI: 03:00.5 read_resources bus 0 link: 0
719 17:52:56.140261 PCI: 03:00.5 read_resources bus 0 link: 0 done
720 17:52:56.146906 PCI: 00:08.1 read_resources bus 3 link: 0 done
721 17:52:56.147190 ACPI GNVS at 0xca676000
722 17:52:56.150506 PCI: 00:14.3 read_resources bus 0 link: 0
723 17:52:56.153548 PNP: 0c09.0 read_resources bus 0 link: 0
724 17:52:56.160705 GENERIC: 0.0 read_resources bus 0 link: 0
725 17:52:56.163803 GENERIC: 0.0 read_resources bus 0 link: 0 done
726 17:52:56.167251 PNP: 0c09.0 read_resources bus 0 link: 0 done
727 17:52:56.170297 PCI: 00:14.3 read_resources bus 0 link: 0 done
728 17:52:56.176986 DOMAIN: 0000 read_resources bus 0 link: 0 done
729 17:52:56.180701 MMIO: fedc5000 read_resources bus 1 link: 0
730 17:52:56.184158 MMIO: fedc5000 read_resources bus 1 link: 0 done
731 17:52:56.187121 MMIO: fedc4000 read_resources bus 2 link: 0
732 17:52:56.194143 MMIO: fedc4000 read_resources bus 2 link: 0 done
733 17:52:56.197077 Root Device read_resources bus 0 link: 0 done
734 17:52:56.200783 Done reading resources.
735 17:52:56.204237 Show resources in subtree (Root Device)...After reading.
736 17:52:56.207903 Root Device child on link 0 CPU_CLUSTER: 0
737 17:52:56.210898 CPU_CLUSTER: 0 child on link 0 APIC: 00
738 17:52:56.214154 APIC: 00
739 17:52:56.217587 DOMAIN: 0000 child on link 0 PCI: 00:00.0
740 17:52:56.227401 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
741 17:52:56.233995 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
742 17:52:56.237363 PCI: 00:00.0
743 17:52:56.244069 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
744 17:52:56.250717 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
745 17:52:56.260961 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
746 17:52:56.267689 PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
747 17:52:56.277316 PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
748 17:52:56.283907 PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
749 17:52:56.294166 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
750 17:52:56.304213 PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
751 17:52:56.311131 PCI: 00:00.0 resource base 100000000 size 12f340000 align 0 gran 0 limit 0 flags e0004200 index 7
752 17:52:56.321060 PCI: 00:00.0 resource base 22f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
753 17:52:56.331067 PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
754 17:52:56.338169 PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
755 17:52:56.348180 PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
756 17:52:56.354513 PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
757 17:52:56.357655 PCI: 00:00.2
758 17:52:56.364825 PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
759 17:52:56.367672 PCI: 00:01.0
760 17:52:56.371313 PCI: 00:01.2 child on link 0 PCI: 01:00.0
761 17:52:56.377954 PCI: 00:01.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
762 17:52:56.387783 PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
763 17:52:56.394258 PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
764 17:52:56.397867 PCI: 01:00.0
765 17:52:56.404149 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
766 17:52:56.414076 PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 18
767 17:52:56.417319 PCI: 00:01.3 child on link 0 PCI: 02:00.0
768 17:52:56.424409 PCI: 00:01.3 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
769 17:52:56.434398 PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
770 17:52:56.440955 PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
771 17:52:56.444511 PCI: 02:00.0
772 17:52:56.450851 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
773 17:52:56.454570 PCI: 00:08.0
774 17:52:56.457442 PCI: 00:08.1 child on link 0 PCI: 03:00.0
775 17:52:56.464246 PCI: 00:08.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
776 17:52:56.474615 PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
777 17:52:56.481213 PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
778 17:52:56.484254 PCI: 03:00.0
779 17:52:56.494583 PCI: 03:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
780 17:52:56.504186 PCI: 03:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18
781 17:52:56.510889 PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
782 17:52:56.518108 PCI: 03:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 24
783 17:52:56.521154 PCI: 03:00.1
784 17:52:56.527636 PCI: 03:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
785 17:52:56.531203 PCI: 03:00.2
786 17:52:56.537656 PCI: 03:00.2 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
787 17:52:56.548233 PCI: 03:00.2 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
788 17:52:56.551657 PCI: 03:00.3 child on link 0 USB0 port 0
789 17:52:56.561853 PCI: 03:00.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10
790 17:52:56.564946 USB0 port 0 child on link 0 USB2 port 0
791 17:52:56.565376 USB2 port 0
792 17:52:56.567933 USB2 port 1
793 17:52:56.568358 USB2 port 2
794 17:52:56.571496 USB2 port 3
795 17:52:56.571951 USB2 port 4
796 17:52:56.574948 USB2 port 5
797 17:52:56.575414 USB3 port 0
798 17:52:56.577920 USB3 port 1
799 17:52:56.578350 USB3 port 2
800 17:52:56.581386 USB3 port 3
801 17:52:56.585070 PCI: 03:00.5 child on link 0 GENERIC: 0.0
802 17:52:56.594772 PCI: 03:00.5 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 10
803 17:52:56.595267 GENERIC: 0.0
804 17:52:56.597839 GENERIC: 1.0
805 17:52:56.598306 PCI: 03:00.7
806 17:52:56.608108 PCI: 03:00.7 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
807 17:52:56.614737 PCI: 03:00.7 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
808 17:52:56.617786 PCI: 00:14.0
809 17:52:56.621442 PCI: 00:14.3 child on link 0 PNP: 0c09.0
810 17:52:56.627950 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
811 17:52:56.637933 PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
812 17:52:56.644598 PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
813 17:52:56.654825 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
814 17:52:56.661222 PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
815 17:52:56.667768 PNP: 0c09.0 child on link 0 GENERIC: 0.0
816 17:52:56.674298 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
817 17:52:56.677919 GENERIC: 0.0 child on link 0 I2C: 00:1a
818 17:52:56.680989 I2C: 00:1a
819 17:52:56.681591 GENERIC: 0.0
820 17:52:56.684323 GENERIC: 1.0 child on link 0 I2C: 00:1a
821 17:52:56.687687 I2C: 00:1a
822 17:52:56.688146 PCI: 00:18.0
823 17:52:56.690942 PCI: 00:18.1
824 17:52:56.691572 PCI: 00:18.2
825 17:52:56.694740 PCI: 00:18.3
826 17:52:56.695385 PCI: 00:18.4
827 17:52:56.697879 PCI: 00:18.5
828 17:52:56.698403 PCI: 00:18.6
829 17:52:56.700803 PCI: 00:18.7
830 17:52:56.704515 MMIO: fedc5000 child on link 0 I2C: 01:50
831 17:52:56.705217 I2C: 01:50
832 17:52:56.707486 MMIO: fedca000
833 17:52:56.707982 MMIO: fedce000
834 17:52:56.711274 MMIO: fedcf000
835 17:52:56.714183 MMIO: fedc4000 child on link 0 I2C: 02:10
836 17:52:56.714616 I2C: 02:10
837 17:52:56.717689 I2C: 02:15
838 17:52:56.718118 I2C: 02:15
839 17:52:56.718555 GENERIC: 0.1
840 17:52:56.724333 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
841 17:52:56.731047 PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff
842 17:52:56.734596 PCI: 01:00.0 10 * [0x0 - 0xff] io
843 17:52:56.741117 PCI: 00:01.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
844 17:52:56.743996 PCI: 00:01.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
845 17:52:56.747679 PCI: 01:00.0 18 * [0x0 - 0xffff] mem
846 17:52:56.754235 PCI: 00:01.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
847 17:52:56.760901 PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
848 17:52:56.767898 PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
849 17:52:56.774407 PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff
850 17:52:56.781296 PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff done
851 17:52:56.784539 PCI: 00:01.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
852 17:52:56.787897 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
853 17:52:56.794464 PCI: 00:01.3 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
854 17:52:56.800936 PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
855 17:52:56.808062 PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
856 17:52:56.814164 PCI: 00:08.1 io: size: 0 align: 12 gran: 12 limit: ffffffff
857 17:52:56.817939 PCI: 03:00.0 20 * [0x0 - 0xff] io
858 17:52:56.824419 PCI: 00:08.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
859 17:52:56.828226 PCI: 00:08.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
860 17:52:56.831178 PCI: 03:00.2 18 * [0x0 - 0xfffff] mem
861 17:52:56.837782 PCI: 03:00.3 10 * [0x100000 - 0x1fffff] mem
862 17:52:56.841344 PCI: 03:00.7 18 * [0x200000 - 0x2fffff] mem
863 17:52:56.844445 PCI: 03:00.0 24 * [0x300000 - 0x37ffff] mem
864 17:52:56.848171 PCI: 03:00.5 10 * [0x380000 - 0x3bffff] mem
865 17:52:56.854438 PCI: 03:00.1 10 * [0x3c0000 - 0x3c3fff] mem
866 17:52:56.857487 PCI: 03:00.2 24 * [0x3c4000 - 0x3c5fff] mem
867 17:52:56.861191 PCI: 03:00.7 24 * [0x3c6000 - 0x3c7fff] mem
868 17:52:56.867973 PCI: 00:08.1 mem: size: 400000 align: 20 gran: 20 limit: ffffffff done
869 17:52:56.874686 PCI: 00:08.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
870 17:52:56.878152 PCI: 03:00.0 10 * [0x0 - 0xfffffff] prefmem
871 17:52:56.884351 PCI: 03:00.0 18 * [0x10000000 - 0x101fffff] prefmem
872 17:52:56.891132 PCI: 00:08.1 prefmem: size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done
873 17:52:56.897512 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
874 17:52:56.904586 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
875 17:52:56.911419 update_constraints: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
876 17:52:56.918174 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
877 17:52:56.920967 DOMAIN: 0000: Resource ranges:
878 17:52:56.924567 * Base: 1000, Size: f000, Tag: 100
879 17:52:56.927695 PCI: 00:01.2 1c * [0x1000 - 0x1fff] limit: 1fff io
880 17:52:56.931068 PCI: 00:08.1 1c * [0x2000 - 0x2fff] limit: 2fff io
881 17:52:56.937720 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
882 17:52:56.944466 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff
883 17:52:56.951060 update_constraints: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
884 17:52:56.957659 update_constraints: PCI: 00:00.0 01 base 000a0000 limit 000bffff mem (fixed)
885 17:52:56.964766 update_constraints: PCI: 00:00.0 02 base 000c0000 limit 000fffff mem (fixed)
886 17:52:56.971469 update_constraints: PCI: 00:00.0 03 base 00100000 limit 01ffffff mem (fixed)
887 17:52:56.977730 update_constraints: PCI: 00:00.0 04 base 02000000 limit 021bffff mem (fixed)
888 17:52:56.984175 update_constraints: PCI: 00:00.0 05 base 021c0000 limit cb7fffff mem (fixed)
889 17:52:56.994265 update_constraints: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
890 17:52:57.001418 update_constraints: PCI: 00:00.0 06 base cc000000 limit cfffffff mem (fixed)
891 17:52:57.007823 update_constraints: PCI: 00:00.0 07 base 100000000 limit 22f33ffff mem (fixed)
892 17:52:57.014238 update_constraints: PCI: 00:00.0 08 base 22f340000 limit 22fffffff mem (fixed)
893 17:52:57.021386 update_constraints: PCI: 00:00.0 09 base cb800000 limit cbffffff mem (fixed)
894 17:52:57.027831 update_constraints: PCI: 00:00.0 0a base cb7fe000 limit cb7fffff mem (fixed)
895 17:52:57.034623 update_constraints: PCI: 00:00.0 0b base ca7fe000 limit cb7fdfff mem (fixed)
896 17:52:57.041283 update_constraints: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)
897 17:52:57.047869 update_constraints: PCI: 00:14.3 10000100 base ff000000 limit ffffffff mem (fixed)
898 17:52:57.057592 update_constraints: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
899 17:52:57.064157 update_constraints: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
900 17:52:57.071200 update_constraints: PCI: 00:14.3 04 base fedc4000 limit fedc5fff mem (fixed)
901 17:52:57.074236 DOMAIN: 0000: Resource ranges:
902 17:52:57.078042 * Base: d0000000, Size: 28000000, Tag: 200
903 17:52:57.080935 * Base: fc000000, Size: 2c00000, Tag: 200
904 17:52:57.084340 * Base: fec02000, Size: e000, Tag: 200
905 17:52:57.087883 * Base: fec11000, Size: 1b3000, Tag: 200
906 17:52:57.091504 * Base: fedc6000, Size: 23a000, Tag: 200
907 17:52:57.097954 * Base: 230000000, Size: fffdd0000000, Tag: 100200
908 17:52:57.101236 PCI: 00:08.1 24 * [0xd0000000 - 0xe01fffff] limit: e01fffff prefmem
909 17:52:57.107985 PCI: 00:08.1 20 * [0xe0200000 - 0xe05fffff] limit: e05fffff mem
910 17:52:57.114510 PCI: 00:01.2 20 * [0xe0600000 - 0xe06fffff] limit: e06fffff mem
911 17:52:57.121082 PCI: 00:01.3 20 * [0xe0700000 - 0xe07fffff] limit: e07fffff mem
912 17:52:57.124647 PCI: 00:00.2 44 * [0xe0800000 - 0xe087ffff] limit: e087ffff mem
913 17:52:57.131627 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff done
914 17:52:57.137892 PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff
915 17:52:57.141605 PCI: 00:01.2: Resource ranges:
916 17:52:57.145086 * Base: 1000, Size: 1000, Tag: 100
917 17:52:57.151476 PCI: 01:00.0 10 * [0x1000 - 0x10ff] limit: 10ff io
918 17:52:57.158474 PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done
919 17:52:57.165010 PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff
920 17:52:57.168113 PCI: 00:01.2: Resource ranges:
921 17:52:57.171609 * Base: e0600000, Size: 100000, Tag: 200
922 17:52:57.174766 PCI: 01:00.0 18 * [0xe0600000 - 0xe060ffff] limit: e060ffff mem
923 17:52:57.185128 PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff done
924 17:52:57.191480 PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff
925 17:52:57.194773 PCI: 00:01.3: Resource ranges:
926 17:52:57.198398 * Base: e0700000, Size: 100000, Tag: 200
927 17:52:57.204902 PCI: 02:00.0 10 * [0xe0700000 - 0xe0700fff] limit: e0700fff mem
928 17:52:57.211224 PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff done
929 17:52:57.218291 PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
930 17:52:57.221457 PCI: 00:08.1: Resource ranges:
931 17:52:57.224938 * Base: 2000, Size: 1000, Tag: 100
932 17:52:57.227960 PCI: 03:00.0 20 * [0x2000 - 0x20ff] limit: 20ff io
933 17:52:57.234658 PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
934 17:52:57.241152 PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff
935 17:52:57.244749 PCI: 00:08.1: Resource ranges:
936 17:52:57.248243 * Base: d0000000, Size: 10200000, Tag: 1200
937 17:52:57.254665 PCI: 03:00.0 10 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
938 17:52:57.261402 PCI: 03:00.0 18 * [0xe0000000 - 0xe01fffff] limit: e01fffff prefmem
939 17:52:57.271480 PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff done
940 17:52:57.278083 PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff
941 17:52:57.281152 PCI: 00:08.1: Resource ranges:
942 17:52:57.284865 * Base: e0200000, Size: 400000, Tag: 200
943 17:52:57.287872 PCI: 03:00.2 18 * [0xe0200000 - 0xe02fffff] limit: e02fffff mem
944 17:52:57.294325 PCI: 03:00.3 10 * [0xe0300000 - 0xe03fffff] limit: e03fffff mem
945 17:52:57.301076 PCI: 03:00.7 18 * [0xe0400000 - 0xe04fffff] limit: e04fffff mem
946 17:52:57.308244 PCI: 03:00.0 24 * [0xe0500000 - 0xe057ffff] limit: e057ffff mem
947 17:52:57.311066 PCI: 03:00.5 10 * [0xe0580000 - 0xe05bffff] limit: e05bffff mem
948 17:52:57.318377 PCI: 03:00.1 10 * [0xe05c0000 - 0xe05c3fff] limit: e05c3fff mem
949 17:52:57.324742 PCI: 03:00.2 24 * [0xe05c4000 - 0xe05c5fff] limit: e05c5fff mem
950 17:52:57.331313 PCI: 03:00.7 24 * [0xe05c6000 - 0xe05c7fff] limit: e05c7fff mem
951 17:52:57.338479 PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff done
952 17:52:57.345173 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
953 17:52:57.348030 Root Device assign_resources, bus 0 link: 0
954 17:52:57.351741 DOMAIN: 0000 assign_resources, bus 0 link: 0
955 17:52:57.358219 PCI: 00:00.2 44 <- [0x00e0800000 - 0x00e087ffff] size 0x00080000 gran 0x13 mem
956 17:52:57.368383 PCI: 00:01.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
957 17:52:57.374922 PCI: 00:01.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
958 17:52:57.384523 PCI: 00:01.2 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 01 mem
959 17:52:57.388112 PCI: 00:01.2 assign_resources, bus 1 link: 0
960 17:52:57.394706 PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
961 17:52:57.401127 PCI: 01:00.0 18 <- [0x00e0600000 - 0x00e060ffff] size 0x00010000 gran 0x10 mem64
962 17:52:57.404716 PCI: 00:01.2 assign_resources, bus 1 link: 0
963 17:52:57.411528 PCI: 00:01.3 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 02 io
964 17:52:57.421508 PCI: 00:01.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
965 17:52:57.428141 PCI: 00:01.3 20 <- [0x00e0700000 - 0x00e07fffff] size 0x00100000 gran 0x14 bus 02 mem
966 17:52:57.434655 PCI: 00:01.3 assign_resources, bus 2 link: 0
967 17:52:57.445053 PCI: 02:00.0 10 <- [0x00e0700000 - 0x00e0700fff] size 0x00001000 gran 0x0c mem
968 17:52:57.452145 PCI: 00:01.3 assign_resources, bus 2 link: 0
969 17:52:57.458711 PCI: 00:08.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
970 17:52:57.465084 PCI: 00:08.1 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 03 prefmem
971 17:52:57.475032 PCI: 00:08.1 20 <- [0x00e0200000 - 0x00e05fffff] size 0x00400000 gran 0x14 bus 03 mem
972 17:52:57.478727 PCI: 00:08.1 assign_resources, bus 3 link: 0
973 17:52:57.485497 PCI: 03:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
974 17:52:57.492189 PCI: 03:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64
975 17:52:57.498888 PCI: 03:00.0 20 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
976 17:52:57.505492 PCI: 03:00.0 24 <- [0x00e0500000 - 0x00e057ffff] size 0x00080000 gran 0x13 mem
977 17:52:57.511917 PCI: 03:00.1 10 <- [0x00e05c0000 - 0x00e05c3fff] size 0x00004000 gran 0x0e mem
978 17:52:57.521945 PCI: 03:00.2 18 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 mem
979 17:52:57.528710 PCI: 03:00.2 24 <- [0x00e05c4000 - 0x00e05c5fff] size 0x00002000 gran 0x0d mem
980 17:52:57.535155 PCI: 03:00.3 10 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 mem64
981 17:52:57.538752 PCI: 03:00.3 assign_resources, bus 0 link: 0
982 17:52:57.542264 PCI: 03:00.3 assign_resources, bus 0 link: 0
983 17:52:57.548711 PCI: 03:00.5 10 <- [0x00e0580000 - 0x00e05bffff] size 0x00040000 gran 0x12 mem
984 17:52:57.555254 PCI: 03:00.5 assign_resources, bus 0 link: 0
985 17:52:57.558894 PCI: 03:00.5 assign_resources, bus 0 link: 0
986 17:52:57.565232 PCI: 03:00.7 18 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem
987 17:52:57.572346 PCI: 03:00.7 24 <- [0x00e05c6000 - 0x00e05c7fff] size 0x00002000 gran 0x0d mem
988 17:52:57.575147 PCI: 00:08.1 assign_resources, bus 3 link: 0
989 17:52:57.578761 PCI: 00:14.3 assign_resources, bus 0 link: 0
990 17:52:57.585337 PCI: 00:14.3 assign_resources, bus 0 link: 0
991 17:52:57.588704 DOMAIN: 0000 assign_resources, bus 0 link: 0
992 17:52:57.592257 Root Device assign_resources, bus 0 link: 0
993 17:52:57.595703 Done setting resources.
994 17:52:57.598778 Show resources in subtree (Root Device)...After assigning values.
995 17:52:57.605359 Root Device child on link 0 CPU_CLUSTER: 0
996 17:52:57.608934 CPU_CLUSTER: 0 child on link 0 APIC: 00
997 17:52:57.609365 APIC: 00
998 17:52:57.612074 DOMAIN: 0000 child on link 0 PCI: 00:00.0
999 17:52:57.621702 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1000 17:52:57.628487 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
1001 17:52:57.632247 PCI: 00:00.0
1002 17:52:57.638856 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
1003 17:52:57.648622 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1004 17:52:57.655050 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
1005 17:52:57.662044 PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
1006 17:52:57.671784 PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
1007 17:52:57.681854 PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
1008 17:52:57.689025 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
1009 17:52:57.698907 PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
1010 17:52:57.709003 PCI: 00:00.0 resource base 100000000 size 12f340000 align 0 gran 0 limit 0 flags e0004200 index 7
1011 17:52:57.715562 PCI: 00:00.0 resource base 22f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
1012 17:52:57.725196 PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
1013 17:52:57.732150 PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
1014 17:52:57.742205 PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1015 17:52:57.748893 PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
1016 17:52:57.751883 PCI: 00:00.2
1017 17:52:57.762083 PCI: 00:00.2 resource base e0800000 size 80000 align 19 gran 19 limit e087ffff flags 60000200 index 44
1018 17:52:57.762197 PCI: 00:01.0
1019 17:52:57.765609 PCI: 00:01.2 child on link 0 PCI: 01:00.0
1020 17:52:57.775555 PCI: 00:01.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
1021 17:52:57.785280 PCI: 00:01.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1022 17:52:57.795231 PCI: 00:01.2 resource base e0600000 size 100000 align 20 gran 20 limit e06fffff flags 60080202 index 20
1023 17:52:57.795340 PCI: 01:00.0
1024 17:52:57.805497 PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
1025 17:52:57.815335 PCI: 01:00.0 resource base e0600000 size 10000 align 16 gran 16 limit e060ffff flags 60000201 index 18
1026 17:52:57.818826 PCI: 00:01.3 child on link 0 PCI: 02:00.0
1027 17:52:57.825482 PCI: 00:01.3 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
1028 17:52:57.835408 PCI: 00:01.3 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1029 17:52:57.845573 PCI: 00:01.3 resource base e0700000 size 100000 align 20 gran 20 limit e07fffff flags 60080202 index 20
1030 17:52:57.848809 PCI: 02:00.0
1031 17:52:57.858926 PCI: 02:00.0 resource base e0700000 size 1000 align 12 gran 12 limit e0700fff flags 60000200 index 10
1032 17:52:57.859011 PCI: 00:08.0
1033 17:52:57.862477 PCI: 00:08.1 child on link 0 PCI: 03:00.0
1034 17:52:57.872345 PCI: 00:08.1 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1035 17:52:57.882383 PCI: 00:08.1 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24
1036 17:52:57.888997 PCI: 00:08.1 resource base e0200000 size 400000 align 20 gran 20 limit e05fffff flags 60080202 index 20
1037 17:52:57.892442 PCI: 03:00.0
1038 17:52:57.902425 PCI: 03:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10
1039 17:52:57.912583 PCI: 03:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18
1040 17:52:57.918975 PCI: 03:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 20
1041 17:52:57.928993 PCI: 03:00.0 resource base e0500000 size 80000 align 19 gran 19 limit e057ffff flags 60000200 index 24
1042 17:52:57.929102 PCI: 03:00.1
1043 17:52:57.938712 PCI: 03:00.1 resource base e05c0000 size 4000 align 14 gran 14 limit e05c3fff flags 60000200 index 10
1044 17:52:57.942042 PCI: 03:00.2
1045 17:52:57.952363 PCI: 03:00.2 resource base e0200000 size 100000 align 20 gran 20 limit e02fffff flags 60000200 index 18
1046 17:52:57.958794 PCI: 03:00.2 resource base e05c4000 size 2000 align 13 gran 13 limit e05c5fff flags 60000200 index 24
1047 17:52:57.965355 PCI: 03:00.3 child on link 0 USB0 port 0
1048 17:52:57.972491 PCI: 03:00.3 resource base e0300000 size 100000 align 20 gran 20 limit e03fffff flags 60000201 index 10
1049 17:52:57.979002 USB0 port 0 child on link 0 USB2 port 0
1050 17:52:57.979132 USB2 port 0
1051 17:52:57.982185 USB2 port 1
1052 17:52:57.982262 USB2 port 2
1053 17:52:57.985728 USB2 port 3
1054 17:52:57.985800 USB2 port 4
1055 17:52:57.989182 USB2 port 5
1056 17:52:57.989253 USB3 port 0
1057 17:52:57.992073 USB3 port 1
1058 17:52:57.992146 USB3 port 2
1059 17:52:57.995455 USB3 port 3
1060 17:52:57.998805 PCI: 03:00.5 child on link 0 GENERIC: 0.0
1061 17:52:58.009232 PCI: 03:00.5 resource base e0580000 size 40000 align 18 gran 18 limit e05bffff flags 60000200 index 10
1062 17:52:58.009315 GENERIC: 0.0
1063 17:52:58.012606 GENERIC: 1.0
1064 17:52:58.012689 PCI: 03:00.7
1065 17:52:58.022363 PCI: 03:00.7 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60000200 index 18
1066 17:52:58.032584 PCI: 03:00.7 resource base e05c6000 size 2000 align 13 gran 13 limit e05c7fff flags 60000200 index 24
1067 17:52:58.032670 PCI: 00:14.0
1068 17:52:58.036098 PCI: 00:14.3 child on link 0 PNP: 0c09.0
1069 17:52:58.046355 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
1070 17:52:58.056130 PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
1071 17:52:58.062720 PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
1072 17:52:58.072529 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
1073 17:52:58.079036 PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
1074 17:52:58.082638 PNP: 0c09.0 child on link 0 GENERIC: 0.0
1075 17:52:58.092471 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1076 17:52:58.095424 GENERIC: 0.0 child on link 0 I2C: 00:1a
1077 17:52:58.095500 I2C: 00:1a
1078 17:52:58.098841 GENERIC: 0.0
1079 17:52:58.102223 GENERIC: 1.0 child on link 0 I2C: 00:1a
1080 17:52:58.102307 I2C: 00:1a
1081 17:52:58.105667 PCI: 00:18.0
1082 17:52:58.105751 PCI: 00:18.1
1083 17:52:58.108890 PCI: 00:18.2
1084 17:52:58.109007 PCI: 00:18.3
1085 17:52:58.112217 PCI: 00:18.4
1086 17:52:58.112301 PCI: 00:18.5
1087 17:52:58.115716 PCI: 00:18.6
1088 17:52:58.115825 PCI: 00:18.7
1089 17:52:58.119281 MMIO: fedc5000 child on link 0 I2C: 01:50
1090 17:52:58.122272 I2C: 01:50
1091 17:52:58.122369 MMIO: fedca000
1092 17:52:58.126042 MMIO: fedce000
1093 17:52:58.126151 MMIO: fedcf000
1094 17:52:58.129313 MMIO: fedc4000 child on link 0 I2C: 02:10
1095 17:52:58.132374 I2C: 02:10
1096 17:52:58.132457 I2C: 02:15
1097 17:52:58.132522 I2C: 02:15
1098 17:52:58.135687 GENERIC: 0.1
1099 17:52:58.139055 Done allocating resources.
1100 17:52:58.141993 BS: BS_DEV_RESOURCES run times (exec / console): 14 / 2072 ms
1101 17:52:58.145641 0x00000020: notify_params->phase
1102 17:52:58.149265 Calling FspNotify: 0xca6773b8
1103 17:52:58.152289 0xca6fff7c: notify_params
1104 17:52:58.152372 POST: 0x94
1105 17:52:58.157876 POST: 0x94
1106 17:52:58.161161 FspNotify returned 0x00000000
1107 17:52:58.164917 PCI_INTR tables: Writing registers C00/C01 for PCI IRQ routing:
1108 17:52:58.171558 PCI_INTR_INDEX name PIC mode APIC mode
1109 17:52:58.174443 0x00 INTA# 0x06 0x1F
1110 17:52:58.178128 0x01 INTB# 0x0D 0x1F
1111 17:52:58.181245 0x02 INTC# 0x0E 0x1F
1112 17:52:58.184754 0x03 INTD# 0x0F 0x1F
1113 17:52:58.188369 0x04 INTE# 0x0F 0x1F
1114 17:52:58.191452 0x05 INTF#/GENINT2 0x0E 0x1F
1115 17:52:58.191537 0x06 INTG# 0x0D 0x1F
1116 17:52:58.195086 0x07 INTH# 0x06 0x1F
1117 17:52:58.197924 0x08 Misc 0xFA 0x00
1118 17:52:58.201656 0x09 Misc0 0xF1 0x00
1119 17:52:58.205011 0x0A Misc1 0x00 0x00
1120 17:52:58.208356 0x0B Misc2 0x00 0x00
1121 17:52:58.211333 0x0C Ser IRQ INTA 0x1F 0x1F
1122 17:52:58.214734 0x0D Ser IRQ INTB 0x1F 0x1F
1123 17:52:58.218062 0x0E Ser IRQ INTC 0x1F 0x1F
1124 17:52:58.221369 0x0F Ser IRQ INTD 0x1F 0x1F
1125 17:52:58.224844 0x10 SCI 0x09 0x09
1126 17:52:58.228587 0x11 SMBUS 0x1F 0x1F
1127 17:52:58.231410 0x12 ASF 0x1F 0x1F
1128 17:52:58.234473 0x16 PerMon 0x1F 0x1F
1129 17:52:58.237938 0x17 SD 0x1F 0x1F
1130 17:52:58.241434 0x1A SDIO 0x1F 0x1F
1131 17:52:58.244708 0x20 CIR 0x1F 0x1F
1132 17:52:58.247938 0x21 GPIOa 0x1F 0x1F
1133 17:52:58.251106 0x22 GPIOb 0x1F 0x1F
1134 17:52:58.254513 0x23 GPIOc 0x1F 0x1F
1135 17:52:58.261071 0x41 SATA 0x1F 0x1F
1136 17:52:58.261156 0x43 eMMC 0x05 0x05
1137 17:52:58.264553 0x50 GPP0 0x1F 0x1F
1138 17:52:58.267773 0x51 GPP1 0x1F 0x1F
1139 17:52:58.271321 0x52 GPP2 0x1F 0x1F
1140 17:52:58.274533 0x53 GPP3 0x1F 0x1F
1141 17:52:58.278019 0x62 GPIO 0x07 0x07
1142 17:52:58.281511 0x70 I2C0 0x1F 0x1F
1143 17:52:58.284590 0x71 I2C1 0x1F 0x1F
1144 17:52:58.288184 0x72 I2C2 0x0A 0x0A
1145 17:52:58.291133 0x73 I2C3 0x0B 0x0B
1146 17:52:58.294805 0x74 UART0 0x04 0x04
1147 17:52:58.297836 0x75 UART1 0x03 0x03
1148 17:52:58.301569 0x76 I2C4 0x1F 0x1F
1149 17:52:58.304614 0x77 I2C5 0x1F 0x1F
1150 17:52:58.308272 0x78 UART2 0x1F 0x1F
1151 17:52:58.311014 0x79 UART3 0x1F 0x1F
1152 17:52:58.317986 PCI_CFG IRQ: Write PCI config space IRQ assignments
1153 17:52:58.321512 PCI IRQ: Found device 0:00.02 using PIN A
1154 17:52:58.324464 PCI Devfn (0x2) not found in pirq_data table
1155 17:52:58.327827 PCI IRQ: Found device 0:08.01 using PIN A
1156 17:52:58.334241 Found this device in pirq_data table entry 7
1157 17:52:58.334335 Orig INT_PIN : 1 (PIN A)
1158 17:52:58.337751 PCI_INTR idx : 0x04 (INTE#)
1159 17:52:58.341166 INT_LINE : 0xF (IRQ 15)
1160 17:52:58.344165 PCI IRQ: Found device 1:00.00 using PIN A
1161 17:52:58.347699 With INT_PIN swizzled to PIN A
1162 17:52:58.351313 Attached to bridge device 0:01h.02h
1163 17:52:58.354243 Found this device in pirq_data table entry 1
1164 17:52:58.357614 Orig INT_PIN : 1 (PIN A)
1165 17:52:58.357696 PCI_INTR idx : 0x04 (INTE#)
1166 17:52:58.361021 INT_LINE : 0xF (IRQ 15)
1167 17:52:58.364653 PCI IRQ: Found device 3:00.00 using PIN A
1168 17:52:58.367311 With INT_PIN swizzled to PIN A
1169 17:52:58.370844 Attached to bridge device 0:08h.01h
1170 17:52:58.374298 Found this device in pirq_data table entry 7
1171 17:52:58.377487 Orig INT_PIN : 1 (PIN A)
1172 17:52:58.381135 PCI_INTR idx : 0x04 (INTE#)
1173 17:52:58.384024 INT_LINE : 0xF (IRQ 15)
1174 17:52:58.387443 PCI IRQ: Found device 3:00.01 using PIN B
1175 17:52:58.390561 With INT_PIN swizzled to PIN B
1176 17:52:58.394048 Attached to bridge device 0:08h.01h
1177 17:52:58.397223 Found this device in pirq_data table entry 7
1178 17:52:58.400800 Orig INT_PIN : 2 (PIN B)
1179 17:52:58.400883 PCI_INTR idx : 0x05 (INTF#/GENINT2)
1180 17:52:58.404437 INT_LINE : 0xE (IRQ 14)
1181 17:52:58.407461 PCI IRQ: Found device 3:00.02 using PIN C
1182 17:52:58.411104 With INT_PIN swizzled to PIN C
1183 17:52:58.414025 Attached to bridge device 0:08h.01h
1184 17:52:58.417451 Found this device in pirq_data table entry 7
1185 17:52:58.420865 Orig INT_PIN : 3 (PIN C)
1186 17:52:58.424563 PCI_INTR idx : 0x06 (INTG#)
1187 17:52:58.427574 INT_LINE : 0xD (IRQ 13)
1188 17:52:58.430646 PCI IRQ: Found device 3:00.03 using PIN D
1189 17:52:58.430768 With INT_PIN swizzled to PIN D
1190 17:52:58.434193 Attached to bridge device 0:08h.01h
1191 17:52:58.440697 Found this device in pirq_data table entry 7
1192 17:52:58.440854 Orig INT_PIN : 4 (PIN D)
1193 17:52:58.443906 PCI_INTR idx : 0x07 (INTH#)
1194 17:52:58.447836 INT_LINE : 0x6 (IRQ 6)
1195 17:52:58.450893 PCI IRQ: Found device 3:00.05 using PIN B
1196 17:52:58.454524 With INT_PIN swizzled to PIN B
1197 17:52:58.457671 Attached to bridge device 0:08h.01h
1198 17:52:58.461384 Found this device in pirq_data table entry 7
1199 17:52:58.464445 Orig INT_PIN : 2 (PIN B)
1200 17:52:58.467961 PCI_INTR idx : 0x05 (INTF#/GENINT2)
1201 17:52:58.468412 INT_LINE : 0xE (IRQ 14)
1202 17:52:58.474725 PCI IRQ: Found device 3:00.07 using PIN D
1203 17:52:58.475362 With INT_PIN swizzled to PIN D
1204 17:52:58.478264 Attached to bridge device 0:08h.01h
1205 17:52:58.484913 Found this device in pirq_data table entry 7
1206 17:52:58.485525 Orig INT_PIN : 4 (PIN D)
1207 17:52:58.488042 PCI_INTR idx : 0x07 (INTH#)
1208 17:52:58.491382 INT_LINE : 0x6 (IRQ 6)
1209 17:52:58.498537 PCI IRQ: Found device 2:00.00 using PIN A
1210 17:52:58.502260 With INT_PIN swizzled to PIN A
1211 17:52:58.505301 Attached to bridge device 0:01h.03h
1212 17:52:58.514486 Found this device in pirq_data table entry 2
1213 17:52:58.518799 Orig INT_PIN : 1 (PIN A)
1214 17:52:58.521863 PCI_INTR idx : 0x00 (INTA#)
1215 17:52:58.525385 INT_LINE : 0x6 (IRQ 6)
1216 17:52:58.528663 PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
1217 17:52:58.535236 BS: BS_DEV_ENABLE entry times (exec / console): 17 / 368 ms
1218 17:52:58.535821 POST: 0x74
1219 17:52:58.538976 Enabling resources...
1220 17:52:58.539564 PCI: 00:00.0 cmd <- 00
1221 17:52:58.542175 PCI: 00:00.2 subsystem <- 1022/1510
1222 17:52:58.545646 PCI: 00:00.2 cmd <- 06
1223 17:52:58.549012 PCI: 00:01.0 subsystem <- 1022/1510
1224 17:52:58.552142 PCI: 00:01.0 cmd <- 00
1225 17:52:58.555443 PCI: 00:01.2 bridge ctrl <- 0013
1226 17:52:58.556081 PCI: 00:01.2 cmd <- 07
1227 17:52:58.558980 PCI: 00:01.3 bridge ctrl <- 0013
1228 17:52:58.562075 PCI: 00:01.3 cmd <- 06
1229 17:52:58.565625 PCI: 00:08.0 subsystem <- 1022/1510
1230 17:52:58.566101 PCI: 00:08.0 cmd <- 00
1231 17:52:58.569159 PCI: 00:08.1 bridge ctrl <- 001b
1232 17:52:58.572260 PCI: 00:08.1 cmd <- 07
1233 17:52:58.575506 PCI: 00:14.0 subsystem <- 1022/1510
1234 17:52:58.576039 PCI: 00:14.0 cmd <- 403
1235 17:52:58.578477 PCI: 00:14.3 subsystem <- 1022/1510
1236 17:52:58.582003 PCI: 00:14.3 cmd <- 0f
1237 17:52:58.585503 PCI: 00:18.7 cmd <- 00
1238 17:52:58.588536 PCI: 01:00.0 subsystem <- 1022/1510
1239 17:52:58.589121 PCI: 01:00.0 cmd <- 03
1240 17:52:58.594480 PCI: 02:00.0 cmd <- 06
1241 17:52:58.600037 PCI: 03:00.0 subsystem <- 1022/1510
1242 17:52:58.603404 PCI: 03:00.0 cmd <- 07
1243 17:52:58.606859 PCI: 03:00.1 subsystem <- 1022/1510
1244 17:52:58.609933 PCI: 03:00.1 cmd <- 02
1245 17:52:58.613639 PCI: 03:00.2 subsystem <- 1022/1510
1246 17:52:58.614062 PCI: 03:00.2 cmd <- 02
1247 17:52:58.616764 PCI: 03:00.3 subsystem <- 1022/1510
1248 17:52:58.620412 PCI: 03:00.3 cmd <- 02
1249 17:52:58.623405 PCI: 03:00.5 subsystem <- 1022/1510
1250 17:52:58.623920 PCI: 03:00.5 cmd <- 02
1251 17:52:58.626948 PCI: 03:00.7 subsystem <- 1022/1510
1252 17:52:58.630612 PCI: 03:00.7 cmd <- 02
1253 17:52:58.631065 done.
1254 17:52:58.637264 BS: BS_DEV_ENABLE run times (exec / console): 8 / 89 ms
1255 17:52:58.637720 POST: 0x75
1256 17:52:58.640255 Initializing devices...
1257 17:52:58.640677 POST: 0x75
1258 17:52:58.643905 CPU_CLUSTER: 0 init
1259 17:52:58.646833 MTRR: Physical address space:
1260 17:52:58.650549 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1261 17:52:58.656956 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1262 17:52:58.663524 0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
1263 17:52:58.666774 0x00000000d0000000 - 0x00000000e0200000 size 0x10200000 type 1
1264 17:52:58.673601 0x00000000e0200000 - 0x0000000100000000 size 0x1fe00000 type 0
1265 17:52:58.680112 0x0000000100000000 - 0x0000000230000000 size 0x130000000 type 6
1266 17:52:58.683434 MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
1267 17:52:58.687054 MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
1268 17:52:58.690363 MTRR: Fixed MSR 0x259 0x0000000000000000
1269 17:52:58.693336 MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
1270 17:52:58.697017 MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
1271 17:52:58.699962 MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
1272 17:52:58.703484 MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
1273 17:52:58.706987 MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
1274 17:52:58.710020 MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
1275 17:52:58.717088 MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
1276 17:52:58.720255 MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
1277 17:52:58.720856 call enable_fixed_mtrr()
1278 17:52:58.723812 CPU physical address size: 48 bits
1279 17:52:58.730557 MTRR: default type WB/UC MTRR counts: 10/5.
1280 17:52:58.731183 MTRR: UC selected as default type.
1281 17:52:58.737233 MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
1282 17:52:58.743668 MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
1283 17:52:58.746878 MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
1284 17:52:58.753782 MTRR: 3 base 0x00000000d0000000 mask 0x0000fffff0000000 type 1
1285 17:52:58.759940 MTRR: 4 base 0x00000000e0000000 mask 0x0000ffffffe00000 type 1
1286 17:52:58.760525
1287 17:52:58.761042 MTRR check
1288 17:52:58.763539 Fixed MTRRs : Enabled
1289 17:52:58.764122 Variable MTRRs: Enabled
1290 17:52:58.766871
1291 17:52:58.767523 POST: 0x93
1292 17:52:58.767972 Setting up SMI for CPU
1293 17:52:58.770479 Will perform SMM setup.
1294 17:52:58.776956 CPU: AMD 3015Ce with Radeon Graphics .
1295 17:52:58.783526 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
1296 17:52:58.787148 Processing 16 relocs. Offset value of 0x00030000
1297 17:52:58.789955 Attempting to start 3 APs
1298 17:52:58.793227 Waiting for 10ms after sending INIT.
1299 17:52:58.807376 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 3.
1300 17:52:58.807488 done.
1301 17:52:58.811007 AP: slot 2 apic_id 2.
1302 17:52:58.811128 AP: slot 3 apic_id 1.
1303 17:52:58.820751 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
1304 17:52:58.824565 Processing 13 relocs. Offset value of 0x00038000
1305 17:52:58.830978 SMM Module: stub loaded at 0x00038000. Will call 0xca6d31cb(0x00000000)
1306 17:52:58.834621 Installing permanent SMM handler to 0xcb800000
1307 17:52:58.844198 Loading module at 0xcb810000 with entry 0xcb8114d2. filesize: 0x6b10 memsize: 0xd3c8
1308 17:52:58.847845 Processing 415 relocs. Offset value of 0xcb810000
1309 17:52:58.854065 Loading module at 0xcb808000 with entry 0xcb808000. filesize: 0x1b8 memsize: 0x1b8
1310 17:52:58.857574 Processing 13 relocs. Offset value of 0xcb808000
1311 17:52:58.864306 SMM Module: placing jmp sequence at 0xcb807e00 rel16 0x01fd
1312 17:52:58.870990 SMM Module: placing jmp sequence at 0xcb807c00 rel16 0x03fd
1313 17:52:58.874303 SMM Module: placing jmp sequence at 0xcb807a00 rel16 0x05fd
1314 17:52:58.880688 SMM Module: stub loaded at 0xcb808000. Will call 0xcb8114d2(0x00000000)
1315 17:52:58.887969 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb800000, cpu = 0
1316 17:52:58.890787 Relocation complete.
1317 17:52:58.897504 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffe00, cpu = 1
1318 17:52:58.897655 Relocation complete.
1319 17:52:58.904114 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffa00, cpu = 3
1320 17:52:58.907810 Relocation complete.
1321 17:52:58.914380 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffc00, cpu = 2
1322 17:52:58.914572 Relocation complete.
1323 17:52:58.917512 Initializing CPU #0
1324 17:52:58.917732 CPU: vendor AMD device 820f01
1325 17:52:58.923880 CPU: family 17, model 20, stepping 01
1326 17:52:58.923990 Setting up local APIC...
1327 17:52:58.927338 apic_id: 0x00 done.
1328 17:52:58.930441 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1329 17:52:58.934130 CBFS: Locating 'cpu_microcode_blob.bin'
1330 17:52:58.937333 CBFS: Found @ offset 12fc80 size 2580
1331 17:52:58.944368 microcode: patch id to apply = 0x08200103
1332 17:52:58.947462 microcode: being updated to patch id = 0x08200103 succeeded
1333 17:52:58.951177 CPU #0 initialized
1334 17:52:58.951258 Initializing CPU #2
1335 17:52:58.954071 Initializing CPU #3
1336 17:52:58.957828 CPU: vendor AMD device 820f01
1337 17:52:58.957911 CPU: vendor AMD device 820f01
1338 17:52:58.960686 CPU: family 17, model 20, stepping 01
1339 17:52:58.963983 Initializing CPU #1
1340 17:52:58.967573 Setting up local APIC...
1341 17:52:58.970713 CPU: family 17, model 20, stepping 01
1342 17:52:58.970789 apic_id: 0x01 done.
1343 17:52:58.974342 CPU: vendor AMD device 820f01
1344 17:52:58.977847 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1345 17:52:58.980843 CPU: family 17, model 20, stepping 01
1346 17:52:58.987665 CBFS: Locating 'cpu_microcode_blob.bin'
1347 17:52:58.987743 Setting up local APIC...
1348 17:52:58.991402 CBFS: Found @ offset 12fc80 size 2580
1349 17:52:58.997817 apic_id: 0x03 microcode: patch id to apply = 0x08200103
1350 17:52:58.997895 done.
1351 17:52:59.001091 microcode: being updated to patch id = 0x08200103 succeeded
1352 17:52:59.004200 Setting up local APIC...
1353 17:52:59.010947 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1354 17:52:59.011027 CPU #3 initialized
1355 17:52:59.014670 CBFS: Locating 'cpu_microcode_blob.bin'
1356 17:52:59.017743 apic_id: 0x02 done.
1357 17:52:59.021417 CBFS: Found @ offset 12fc80 size 2580
1358 17:52:59.024271 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1359 17:52:59.027864 microcode: patch id to apply = 0x08200103
1360 17:52:59.031432 CBFS: Locating 'cpu_microcode_blob.bin'
1361 17:52:59.037828 microcode: being updated to patch id = 0x08200103 succeeded
1362 17:52:59.041241 CBFS: Found @ offset 12fc80 size 2580
1363 17:52:59.044529 CPU #1 initialized
1364 17:52:59.047517 microcode: patch id to apply = 0x08200103
1365 17:52:59.054764 microcode: being updated to patch id = 0x08200103 succeeded
1366 17:52:59.054870 CPU #2 initialized
1367 17:52:59.057780 bsp_do_flight_plan done after 246 msecs.
1368 17:52:59.057860
1369 17:52:59.057923
1370 17:52:59.064409 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...
1371 17:52:59.064513
1372 17:52:59.067931 SMI# #1
1373 17:52:59.068018 spi_init: SPI BAR at 0xfec10000
1374 17:52:59.071294 PSP: Notify SMM info... OK
1375 17:52:59.074694 MTRR: TEMPORARY Physical address space:
1376 17:52:59.081243 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1377 17:52:59.088503 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1378 17:52:59.091399 0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
1379 17:52:59.097930 0x00000000d0000000 - 0x00000000ff000000 size 0x2f000000 type 0
1380 17:52:59.104606 0x00000000ff000000 - 0x0000000100000000 size 0x01000000 type 5
1381 17:52:59.107999 0x0000000100000000 - 0x0000000230000000 size 0x130000000 type 6
1382 17:52:59.111437 MTRR: default type WB/UC MTRR counts: 7/6.
1383 17:52:59.114683 MTRR: UC selected as default type.
1384 17:52:59.121137 MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
1385 17:52:59.127901 MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
1386 17:52:59.131630 MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
1387 17:52:59.138314 MTRR: 3 base 0x00000000ff000000 mask 0x0000ffffff000000 type 5
1388 17:52:59.144935 MTRR: 4 base 0x0000000100000000 mask 0x0000ffff00000000 type 6
1389 17:52:59.148625 MTRR: 5 base 0x0000000200000000 mask 0x0000ffffc0000000 type 6
1390 17:52:59.155050 CPU_CLUSTER: 0 init finished in 506 msecs
1391 17:52:59.155542 POST: 0x75
1392 17:52:59.155889 POST: 0x75
1393 17:52:59.157900 POST: 0x75
1394 17:52:59.158356 POST: 0x75
1395 17:52:59.158702 POST: 0x75
1396 17:52:59.161687 POST: 0x75
1397 17:52:59.162149 POST: 0x75
1398 17:52:59.162549 POST: 0x75
1399 17:52:59.165021 POST: 0x75
1400 17:52:59.165597 POST: 0x75
1401 17:52:59.166128 POST: 0x75
1402 17:52:59.168412 POST: 0x75
1403 17:52:59.169039 PCI: 00:00.0 init
1404 17:52:59.171595 IOAPIC: Initializing IOAPIC at 0xfec01000
1405 17:52:59.174591 IOAPIC: Bootstrap Processor Local APIC = 0x00
1406 17:52:59.177961 IOAPIC: ID = 0x09
1407 17:52:59.181356 IOAPIC: Dumping registers
1408 17:52:59.181792 reg 0x0000: 0x09000000
1409 17:52:59.184633 reg 0x0001: 0x001f8021
1410 17:52:59.188018 reg 0x0002: 0x00000000
1411 17:52:59.188649 IOAPIC: 32 interrupts
1412 17:52:59.191771 IOAPIC: Enabling interrupts on FSB
1413 17:52:59.198124 IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
1414 17:52:59.201040 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
1415 17:52:59.204772 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
1416 17:52:59.211391 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
1417 17:52:59.214610 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
1418 17:52:59.218093 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
1419 17:52:59.224573 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
1420 17:52:59.228172 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
1421 17:52:59.231026 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
1422 17:52:59.237758 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
1423 17:52:59.241370 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
1424 17:52:59.247956 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
1425 17:52:59.251605 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
1426 17:52:59.254703 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
1427 17:52:59.261059 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
1428 17:52:59.264584 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
1429 17:52:59.268110 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
1430 17:52:59.274405 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
1431 17:52:59.277683 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
1432 17:52:59.281134 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
1433 17:52:59.288095 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
1434 17:52:59.291330 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
1435 17:52:59.294627 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
1436 17:52:59.301156 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
1437 17:52:59.304745 IOAPIC: reg 0x00000018 value 0x00000000 0x00010000
1438 17:52:59.308384 IOAPIC: reg 0x00000019 value 0x00000000 0x00010000
1439 17:52:59.315023 IOAPIC: reg 0x0000001a value 0x00000000 0x00010000
1440 17:52:59.317942 IOAPIC: reg 0x0000001b value 0x00000000 0x00010000
1441 17:52:59.324630 IOAPIC: reg 0x0000001c value 0x00000000 0x00010000
1442 17:52:59.328331 IOAPIC: reg 0x0000001d value 0x00000000 0x00010000
1443 17:52:59.331296 IOAPIC: reg 0x0000001e value 0x00000000 0x00010000
1444 17:52:59.338038 IOAPIC: reg 0x0000001f value 0x00000000 0x00010000
1445 17:52:59.341800 PCI: 00:00.0 init finished in 168 msecs
1446 17:52:59.341902 POST: 0x75
1447 17:52:59.342002 POST: 0x75
1448 17:52:59.344836 PCI: 00:01.0 init
1449 17:52:59.348378 PCI: 00:01.0 init finished in 0 msecs
1450 17:52:59.348458 POST: 0x75
1451 17:52:59.348559 POST: 0x75
1452 17:52:59.351365 POST: 0x75
1453 17:52:59.351439 PCI: 00:08.0 init
1454 17:52:59.355002 PCI: 00:08.0 init finished in 0 msecs
1455 17:52:59.358085 POST: 0x75
1456 17:52:59.358174 POST: 0x75
1457 17:52:59.358239 PCI: 00:14.0 init
1458 17:52:59.364940 IOAPIC: Initializing IOAPIC at 0xfec00000
1459 17:52:59.368482 IOAPIC: Bootstrap Processor Local APIC = 0x00
1460 17:52:59.368581 IOAPIC: ID = 0x08
1461 17:52:59.371901 IOAPIC: Dumping registers
1462 17:52:59.374762 reg 0x0000: 0x08000000
1463 17:52:59.374844 reg 0x0001: 0x00178021
1464 17:52:59.378517 reg 0x0002: 0x08000000
1465 17:52:59.381421 IOAPIC: 24 interrupts
1466 17:52:59.384900 IOAPIC: Enabling interrupts on FSB
1467 17:52:59.387867 IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
1468 17:52:59.391456 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
1469 17:52:59.398411 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
1470 17:52:59.401735 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
1471 17:52:59.404555 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
1472 17:52:59.411351 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
1473 17:52:59.414984 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
1474 17:52:59.421519 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
1475 17:52:59.424517 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
1476 17:52:59.428261 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
1477 17:52:59.434930 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
1478 17:52:59.437882 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
1479 17:52:59.441460 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
1480 17:52:59.447811 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
1481 17:52:59.451263 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
1482 17:52:59.454936 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
1483 17:52:59.461204 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
1484 17:52:59.464805 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
1485 17:52:59.468273 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
1486 17:52:59.474880 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
1487 17:52:59.478407 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
1488 17:52:59.485049 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
1489 17:52:59.487972 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
1490 17:52:59.491444 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
1491 17:52:59.495050 PCI: 00:14.0 init finished in 132 msecs
1492 17:52:59.497967 POST: 0x75
1493 17:52:59.498054 PCI: 00:14.3 init
1494 17:52:59.498121 RTC Init
1495 17:52:59.501517 PCI: 00:14.3 init finished in 0 msecs
1496 17:52:59.504980 POST: 0x75
1497 17:52:59.505063 POST: 0x75
1498 17:52:59.505128 POST: 0x75
1499 17:52:59.507860 POST: 0x75
1500 17:52:59.507968 POST: 0x75
1501 17:52:59.508063 POST: 0x75
1502 17:52:59.511380 POST: 0x75
1503 17:52:59.511462 POST: 0x75
1504 17:52:59.514593 PCI: 00:18.7 init
1505 17:52:59.517876 PCI: 00:18.7 init finished in 0 msecs
1506 17:52:59.517958 POST: 0x75
1507 17:52:59.518023 PCI: 01:00.0 init
1508 17:52:59.521416 PCI: 01:00.0 init finished in 0 msecs
1509 17:52:59.525016 POST: 0x75
1510 17:52:59.525099 PCI: 02:00.0 init
1511 17:52:59.527988 PCI: 02:00.0 init finished in 0 msecs
1512 17:52:59.531537 POST: 0x75
1513 17:52:59.531620 PCI: 03:00.0 init
1514 17:52:59.534966 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1515 17:52:59.538114 CBFS: Locating 'pci1002,15d8,ea.rom'
1516 17:52:59.545174 CBFS: 'pci1002,15d8,ea.rom' not found.
1517 17:52:59.545256 Using RV2 VBIOS.
1518 17:52:59.548814 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1519 17:52:59.551931 CBFS: Locating 'pci1002,15dd,c4.rom'
1520 17:52:59.555206 CBFS: Found @ offset 18f9c0 size d400
1521 17:52:59.562109 In CBFS, ROM address for PCI: 03:00.0 = 0xff1a19f8
1522 17:52:59.568490 PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
1523 17:52:59.571858 PCI ROM image, vendor ID 1002, device ID 15dd,
1524 17:52:59.574977 PCI ROM image, Class Code 030000, Code Type 00
1525 17:52:59.581662 Copying VGA ROM Image from 0xff1a19f8 to 0xc0000, 0xd400 bytes
1526 17:52:59.591011 Real mode stub @0x00000600: 889 bytes
1527 17:52:59.591144 Calling Option ROM...
1528 17:52:59.615629 ... Option ROM returned.
1529 17:52:59.618682 VBE: Getting information about VESA mode 41d4
1530 17:52:59.622073 VBE: resolution: 1920x1080@32
1531 17:52:59.625315 VBE: framebuffer: 0xd0000000
1532 17:52:59.629064 VBE: Setting VESA mode 41d4
1533 17:52:59.652421 fb_add_framebuffer_info_ex: channel bit mask=24 and BPP=32 don't match. This is a driver bug.
1534 17:52:59.658913 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1535 17:52:59.662731 x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000
1536 17:52:59.665746 VGA Option ROM was run
1537 17:52:59.669229 PCI: 03:00.0 init finished in 133 msecs
1538 17:52:59.669387 POST: 0x75
1539 17:52:59.672442 PCI: 03:00.1 init
1540 17:52:59.675920 PCI: 03:00.1 init finished in 0 msecs
1541 17:52:59.676055 POST: 0x75
1542 17:52:59.679395 PCI: 03:00.2 init
1543 17:52:59.682480 PCI: 03:00.2 init finished in 0 msecs
1544 17:52:59.682623 POST: 0x75
1545 17:52:59.685747 PCI: 03:00.3 init
1546 17:52:59.689118 PCI: 03:00.3 init finished in 0 msecs
1547 17:52:59.689281 POST: 0x75
1548 17:52:59.692307 PCI: 03:00.5 init
1549 17:52:59.696199 PCI: 03:00.5 init finished in 0 msecs
1550 17:52:59.696472 POST: 0x75
1551 17:52:59.696672 PCI: 03:00.7 init
1552 17:52:59.699113 PCI: 03:00.7 init finished in 0 msecs
1553 17:52:59.702275 POST: 0x75
1554 17:52:59.702543 POST: 0x75
1555 17:52:59.702837 POST: 0x75
1556 17:52:59.705855 POST: 0x75
1557 17:52:59.706169 POST: 0x75
1558 17:52:59.706486 POST: 0x75
1559 17:52:59.709397 POST: 0x75
1560 17:52:59.709830 POST: 0x75
1561 17:52:59.710156 POST: 0x75
1562 17:52:59.712875 POST: 0x75
1563 17:52:59.713379 POST: 0x75
1564 17:52:59.713779 POST: 0x75
1565 17:52:59.716260 POST: 0x75
1566 17:52:59.716763 POST: 0x75
1567 17:52:59.719199 PNP: 0c09.0 init
1568 17:52:59.722641 Google Chrome EC uptime: 8.651 seconds
1569 17:52:59.725660 Google Chrome AP resets since EC boot: 0
1570 17:52:59.729279 Google Chrome most recent AP reset causes:
1571 17:52:59.736066 Google Chrome EC reset flags at last EC boot: reset-pin
1572 17:52:59.739343 PNP: 0c09.0 init finished in 16 msecs
1573 17:52:59.739845 POST: 0x75
1574 17:52:59.740188 POST: 0x75
1575 17:52:59.743050 POST: 0x75
1576 17:52:59.743520 POST: 0x75
1577 17:52:59.743936 POST: 0x75
1578 17:52:59.745921 POST: 0x75
1579 17:52:59.746476 POST: 0x75
1580 17:52:59.746868 POST: 0x75
1581 17:52:59.749517 POST: 0x75
1582 17:52:59.750092 Devices initialized
1583 17:52:59.752455 Show all devs... After init.
1584 17:52:59.756073 Root Device: enabled 1
1585 17:52:59.756507 CPU_CLUSTER: 0: enabled 1
1586 17:52:59.759728 DOMAIN: 0000: enabled 1
1587 17:52:59.762782 MMIO: fedc5000: enabled 1
1588 17:52:59.763267 MMIO: fedca000: enabled 0
1589 17:52:59.766415 MMIO: fedce000: enabled 0
1590 17:52:59.769406 MMIO: fedcf000: enabled 0
1591 17:52:59.769827 MMIO: fedc4000: enabled 1
1592 17:52:59.772983 GENERIC: 0.1: enabled 1
1593 17:52:59.776263 APIC: 00: enabled 1
1594 17:52:59.776704 PCI: 00:00.0: enabled 1
1595 17:52:59.779032 PCI: 00:00.2: enabled 1
1596 17:52:59.782365 PCI: 00:01.0: enabled 1
1597 17:52:59.782869 PCI: 00:01.1: enabled 0
1598 17:52:59.785981 PCI: 00:01.2: enabled 1
1599 17:52:59.789049 PCI: 00:01.3: enabled 1
1600 17:52:59.789509 PCI: 00:01.4: enabled 0
1601 17:52:59.792651 PCI: 00:01.5: enabled 0
1602 17:52:59.795746 PCI: 00:08.0: enabled 1
1603 17:52:59.796178 PCI: 00:08.1: enabled 1
1604 17:52:59.799415 PCI: 00:08.2: enabled 0
1605 17:52:59.799869 PCI: 00:14.0: enabled 1
1606 17:52:59.802648 PCI: 00:14.3: enabled 1
1607 17:52:59.806002 PCI: 00:18.0: enabled 1
1608 17:52:59.806563 PCI: 00:18.1: enabled 1
1609 17:52:59.809200 PCI: 00:18.2: enabled 1
1610 17:52:59.812209 PCI: 00:18.3: enabled 1
1611 17:52:59.812650 PCI: 00:18.4: enabled 1
1612 17:52:59.816206 PCI: 00:18.5: enabled 1
1613 17:52:59.818966 PCI: 00:18.6: enabled 1
1614 17:52:59.819455 I2C: 01:50: enabled 1
1615 17:52:59.822312 I2C: 02:10: enabled 1
1616 17:52:59.822795 I2C: 02:15: enabled 1
1617 17:52:59.825619 I2C: 02:15: enabled 0
1618 17:52:59.829284 PCI: 01:00.0: enabled 1
1619 17:52:59.829884 PCI: 03:00.0: enabled 1
1620 17:52:59.832806 PCI: 03:00.1: enabled 1
1621 17:52:59.835953 PCI: 03:00.2: enabled 1
1622 17:52:59.836400 PCI: 03:00.3: enabled 1
1623 17:52:59.839313 PCI: 03:00.5: enabled 1
1624 17:52:59.842804 PCI: 03:00.6: enabled 0
1625 17:52:59.843359 PCI: 03:00.7: enabled 1
1626 17:52:59.846058 PCI: 00:00.0: enabled 0
1627 17:52:59.849289 PNP: 0c09.0: enabled 1
1628 17:52:59.849714 USB0 port 0: enabled 1
1629 17:52:59.852905 GENERIC: 0.0: enabled 1
1630 17:52:59.853366 GENERIC: 1.0: enabled 0
1631 17:52:59.856495 GENERIC: 0.0: enabled 1
1632 17:52:59.859696 GENERIC: 0.0: enabled 1
1633 17:52:59.860125 GENERIC: 1.0: enabled 0
1634 17:52:59.863240 USB2 port 0: enabled 1
1635 17:52:59.866175 USB2 port 1: enabled 1
1636 17:52:59.866602 USB2 port 2: enabled 1
1637 17:52:59.869668 USB2 port 3: enabled 1
1638 17:52:59.872745 USB2 port 4: enabled 1
1639 17:52:59.873171 USB2 port 5: enabled 1
1640 17:52:59.876448 USB3 port 0: enabled 1
1641 17:52:59.877007 USB3 port 1: enabled 1
1642 17:52:59.879524 USB3 port 2: enabled 1
1643 17:52:59.882852 USB3 port 3: enabled 1
1644 17:52:59.883408 I2C: 00:1a: enabled 1
1645 17:52:59.886941 I2C: 00:1a: enabled 1
1646 17:52:59.889763 PCI: 00:18.7: enabled 1
1647 17:52:59.890355 PCI: 02:00.0: enabled 1
1648 17:52:59.892972 APIC: 03: enabled 1
1649 17:52:59.893435 APIC: 02: enabled 1
1650 17:52:59.896362 APIC: 01: enabled 1
1651 17:52:59.899362 BS: BS_DEV_INIT run times (exec / console): 210 / 1047 ms
1652 17:52:59.906434 SCIMAP 56 maps to GPE 31 (active high, edge trigger)
1653 17:52:59.909510 ELOG: Event(A0) added with size 9 at 2023-10-09 17:53:00 UTC
1654 17:52:59.916447 elog_add_boot_reason: Logged dev mode boot
1655 17:52:59.919602 BS: BS_POST_DEVICE entry times (exec / console): 0 / 14 ms
1656 17:52:59.920031 POST: 0x76
1657 17:52:59.922781 Finalize devices...
1658 17:52:59.926257 Devices finalized
1659 17:52:59.929589 BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms
1660 17:52:59.933014 FMAP: area RW_NVRAM found @ 617000 (20480 bytes)
1661 17:52:59.939180 BS: BS_POST_DEVICE exit times (exec / console): 1 / 4 ms
1662 17:52:59.939613 POST: 0x77
1663 17:52:59.945969 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
1664 17:52:59.949530 Saving dimm info for smbios type 17
1665 17:52:59.949834 AMD_FSP_DMI_HOB found
1666 17:52:59.952829 AGESA TYPE 17 DMI INFO:
1667 17:52:59.953058 Handle: 1
1668 17:52:59.956057 TotalWidth: 64
1669 17:52:59.956285 DataWidth: 64
1670 17:52:59.959446 MemorySize: 8192
1671 17:52:59.959675 DeviceSet: 0
1672 17:52:59.963118 Speed: 1600
1673 17:52:59.963351 ManufacturerIdCode: 0
1674 17:52:59.966653 Attributes: 1
1675 17:52:59.967126 ExtSize: 0
1676 17:52:59.969765 ConfigSpeed: 800
1677 17:52:59.969969 MemoryType: 0x1a
1678 17:52:59.972774 FormFactor: 0xd
1679 17:52:59.973021 DeviceLocator: DIMM 0
1680 17:52:59.976437 BankLocator: P0 CHANNEL A
1681 17:52:59.979454 SerialNumber(8): 00000000
1682 17:52:59.983129 PartNumber(0):
1683 17:52:59.983363 CBMEM_ID_MEMINFO:
1684 17:52:59.986485 dimm_size: 8192
1685 17:52:59.986734 ddr_type: 0x1a
1686 17:52:59.989568 ddr_frequency: 0
1687 17:52:59.989812 rank_per_dimm: 1
1688 17:52:59.993142 channel_num: 0
1689 17:52:59.993370 dimm_num: 0
1690 17:52:59.996083 bank_locator: 0
1691 17:52:59.996336 mod_id: 0
1692 17:52:59.999560 mod_type: 0x4
1693 17:52:59.999768 bus_width: 3
1694 17:52:59.999976 serial: 00000000
1695 17:53:00.006456 module_part_number(18): MT40A1G16KD-062E_E
1696 17:53:00.009454 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 59 ms
1697 17:53:00.012931 POST: 0x79
1698 17:53:00.013140 POST: 0x9c
1699 17:53:00.016519 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1700 17:53:00.019561 CBFS: Locating 'fallback/dsdt.aml'
1701 17:53:00.023180 CBFS: Found @ offset 14ed40 size 417b
1702 17:53:00.029677 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1703 17:53:00.030203 CBFS: Locating 'fallback/slic'
1704 17:53:00.033212 CBFS: 'fallback/slic' not found.
1705 17:53:00.036186 ACPI: Writing ACPI tables at ca63a000.
1706 17:53:00.039821 ACPI: * FACS
1707 17:53:00.040310 ACPI: * DSDT
1708 17:53:00.042710 Ramoops buffer: 0x100000@0xca53a000.
1709 17:53:00.049768 FMAP: area RO_VPD found @ 800000 (16384 bytes)
1710 17:53:00.053083 FMAP: area RW_VPD found @ 615000 (8192 bytes)
1711 17:53:00.056129 ACPI: * FADT
1712 17:53:00.056654 pm_base: 0x0400
1713 17:53:00.059824 ACPI: added table 1/32, length now 40
1714 17:53:00.062998 ACPI: * SSDT
1715 17:53:00.066308 PSS: 1200MHz power 1461 control 0x0 status 0x0
1716 17:53:00.069477 PSS: 800MHz power 760 control 0x1 status 0x1
1717 17:53:00.073118 PSS: 400MHz power 364 control 0x2 status 0x2
1718 17:53:00.076051 PSS: 1200MHz power 1461 control 0x0 status 0x0
1719 17:53:00.082677 PSS: 800MHz power 760 control 0x1 status 0x1
1720 17:53:00.086183 PSS: 400MHz power 364 control 0x2 status 0x2
1721 17:53:00.089809 PSS: 1200MHz power 1461 control 0x0 status 0x0
1722 17:53:00.092806 PSS: 800MHz power 760 control 0x1 status 0x1
1723 17:53:00.099282 PSS: 400MHz power 364 control 0x2 status 0x2
1724 17:53:00.103045 PSS: 1200MHz power 1461 control 0x0 status 0x0
1725 17:53:00.106745 PSS: 800MHz power 760 control 0x1 status 0x1
1726 17:53:00.109461 PSS: 400MHz power 364 control 0x2 status 0x2
1727 17:53:00.113217 \_SB.MAXM: Maxim Integrated 98357A Amplifier
1728 17:53:00.116071 \_SB.I2C3.TPMI: I2C TPM at I2C: 01:50
1729 17:53:00.122737 \_SB.I2C2.D010: ELAN Touchscreen at I2C: 02:10
1730 17:53:00.126270 \_SB.I2C2.D015: ELAN Touchpad at I2C: 02:15
1731 17:53:00.129023 \_SB.PCI0.PBR1.WF00.WF00: WIFI Device PCI: 01:00.0
1732 17:53:00.136096 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1733 17:53:00.139341 CBFS: Locating 'pci1002,15d8,ea.rom'
1734 17:53:00.142330 CBFS: 'pci1002,15d8,ea.rom' not found.
1735 17:53:00.142433 Using RV2 VBIOS.
1736 17:53:00.146169 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1737 17:53:00.149732 CBFS: Locating 'pci1002,15dd,c4.rom'
1738 17:53:00.152787 CBFS: Found @ offset 18f9c0 size d400
1739 17:53:00.159848 In CBFS, ROM address for PCI: 03:00.0 = 0xff1a19f8
1740 17:53:00.165987 PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
1741 17:53:00.169816 PCI ROM image, vendor ID 1002, device ID 15dd,
1742 17:53:00.173211 PCI ROM image, Class Code 030000, Code Type 00
1743 17:53:00.176425 xHCI SSDT generation
1744 17:53:00.179624 xhci_fill_ssdt: Got GPE 31 for PCI: 03:00.3
1745 17:53:00.183243 xHCI Supported Protocol:
1746 17:53:00.186220 Major: 0x2, Minor: 0x0, Protocol: 'USB '
1747 17:53:00.189307 Port Offset: 1, Port Count: 6
1748 17:53:00.189390 xHCI Supported Protocol:
1749 17:53:00.192915 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1750 17:53:00.196483 Port Offset: 7, Port Count: 1
1751 17:53:00.199931 xHCI Supported Protocol:
1752 17:53:00.202969 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1753 17:53:00.206438 Port Offset: 8, Port Count: 1
1754 17:53:00.209523 xHCI Supported Protocol:
1755 17:53:00.212617 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1756 17:53:00.216052 Port Offset: 9, Port Count: 1
1757 17:53:00.216135 xHCI Supported Protocol:
1758 17:53:00.222877 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1759 17:53:00.222994 Port Offset: 10, Port Count: 1
1760 17:53:00.227056 EC returned error result code 1
1761 17:53:00.230733 PS2K: Bad resp from EC. Vivaldi disabled!
1762 17:53:00.236870 \_SB.PCI0.PBRA.ACPD.I2S0: I2S machine driver at GENERIC: 0.0
1763 17:53:00.243821 \_SB.PCI0.PBRA.ACPD.I2S1: I2S machine driver at GENERIC: 1.0
1764 17:53:00.247374 \_SB.PCI0.LPCB.EC0.CREC.TUN0: Cros EC I2C Tunnel at GENERIC: 0.0
1765 17:53:00.253905 \_SB.PCI0.LPCB.EC0.CREC.ECA0: Cros EC audio codec at GENERIC: 0.0
1766 17:53:00.260158 \_SB.PCI0.PBRA.XHC0.RHUB.HS01: Left Type-C Port at USB2 port 0
1767 17:53:00.266990 \_SB.PCI0.PBRA.XHC0.RHUB.HS02: Right Type-C Port at USB2 port 1
1768 17:53:00.270496 \_SB.PCI0.PBRA.XHC0.RHUB.HS03: Left Type-A Port at USB2 port 2
1769 17:53:00.277240 \_SB.PCI0.PBRA.XHC0.RHUB.HS04: Right Type-A Port at USB2 port 3
1770 17:53:00.283705 \_SB.PCI0.PBRA.XHC0.RHUB.HS05: User-Facing Camera at USB2 port 4
1771 17:53:00.286919 \_SB.PCI0.PBRA.XHC0.RHUB.HS06: Bluetooth at USB2 port 5
1772 17:53:00.293891 \_SB.PCI0.PBRA.XHC0.RHUB.SS01: Left Type-C Port at USB3 port 0
1773 17:53:00.296943 \_SB.PCI0.PBRA.XHC0.RHUB.SS02: Right Type-C Port at USB3 port 1
1774 17:53:00.304021 \_SB.PCI0.PBRA.XHC0.RHUB.SS03: Left Type-A Port at USB3 port 2
1775 17:53:00.310861 \_SB.PCI0.PBRA.XHC0.RHUB.SS04: Right Type-A Port at USB3 port 3
1776 17:53:00.313773 \_SB.PCI0.LPCB.EC0.CREC.TUN0.RT58: Realtek RT5682 at I2C: 00:1a
1777 17:53:00.320374 ACPI: added table 2/32, length now 44
1778 17:53:00.320460 ACPI: * MCFG
1779 17:53:00.324009 ACPI: added table 3/32, length now 48
1780 17:53:00.324104 ACPI: * TPM2
1781 17:53:00.326851 TPM2 log created at 0xca51c000
1782 17:53:00.330231 ACPI: added table 4/32, length now 52
1783 17:53:00.333841 ACPI: * MADT
1784 17:53:00.336914 ACPI: added table 5/32, length now 56
1785 17:53:00.336990 current = ca6408c0
1786 17:53:00.340509 ACPI: added table 6/32, length now 60
1787 17:53:00.343665 ACPI: * ALIB (AGESA).
1788 17:53:00.346639 ACPI: added table 7/32, length now 64
1789 17:53:00.361906 ACPI: added table 8/32, length now 68
1790 17:53:00.362017 ACPI: * HPET
1791 17:53:00.365274 ACPI: added table 9/32, length now 72
1792 17:53:00.371853 Copying initialized VBIOS image from 0x000c0000
1793 17:53:00.371934 ACPI: * VFCT at ca646320
1794 17:53:00.375570 ACPI: added table 10/32, length now 76
1795 17:53:00.378319 ACPI: done.
1796 17:53:00.378434 ACPI tables: 104336 bytes.
1797 17:53:00.382001 smbios_write_tables: ca51b000
1798 17:53:00.385463 EC returned error result code 3
1799 17:53:00.388374 Couldn't obtain OEM name from CBI
1800 17:53:00.392100 Create SMBIOS type 16
1801 17:53:00.392209 Create SMBIOS type 17
1802 17:53:00.395087 PCI: 01:00.0 (WIFI Device)
1803 17:53:00.398587 SMBIOS tables: 869 bytes.
1804 17:53:00.401777 Writing table forward entry at 0x00000500
1805 17:53:00.408440 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5578
1806 17:53:00.411970 Writing coreboot table at 0xca65e000
1807 17:53:00.415341 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1808 17:53:00.418419 1. 0000000000001000-000000000009ffff: RAM
1809 17:53:00.424849 2. 00000000000a0000-00000000000fffff: RESERVED
1810 17:53:00.428593 3. 0000000000100000-0000000001ffffff: RAM
1811 17:53:00.432226 4. 0000000002000000-00000000021bffff: RESERVED
1812 17:53:00.435070 5. 00000000021c0000-00000000ca51afff: RAM
1813 17:53:00.442209 6. 00000000ca51b000-00000000ca6b5fff: CONFIGURATION TABLES
1814 17:53:00.445417 7. 00000000ca6b6000-00000000ca7c7fff: RAMSTAGE
1815 17:53:00.451991 8. 00000000ca7c8000-00000000cb7fffff: CONFIGURATION TABLES
1816 17:53:00.455023 9. 00000000cb800000-00000000cfffffff: RESERVED
1817 17:53:00.458613 10. 00000000f8000000-00000000fbffffff: RESERVED
1818 17:53:00.461764 11. 0000000100000000-000000022f33ffff: RAM
1819 17:53:00.468475 12. 000000022f340000-000000022fffffff: RESERVED
1820 17:53:00.468559 Passing 3 GPIOs to payload:
1821 17:53:00.475261 NAME | PORT | POLARITY | VALUE
1822 17:53:00.478692 lid | undefined | high | high
1823 17:53:00.485413 power | undefined | high | low
1824 17:53:00.488384 EC in RW | 0x0000000b | high | low
1825 17:53:00.491919 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1826 17:53:00.498598 Wrote coreboot table at: 0xca65e000, 0x528 bytes, checksum 78de
1827 17:53:00.501670 coreboot table: 1344 bytes.
1828 17:53:00.505302 IMD ROOT 0. 0xcb7ff000 0x00001000
1829 17:53:00.508352 IMD SMALL 1. 0xcb7fe000 0x00001000
1830 17:53:00.511740 FSP MEMORY 2. 0xca7fe000 0x01000000
1831 17:53:00.515032 CONSOLE 3. 0xca7de000 0x00020000
1832 17:53:00.518268 FMAP 4. 0xca7dd000 0x00000452
1833 17:53:00.521641 TIME STAMP 5. 0xca7dc000 0x00000910
1834 17:53:00.525396 VBOOT WORK 6. 0xca7c8000 0x00014000
1835 17:53:00.528768 RAMSTAGE 7. 0xca6b5000 0x00113000
1836 17:53:00.531780 REFCODE 8. 0xca677000 0x0003e000
1837 17:53:00.535424 ACPI GNVS 9. 0xca676000 0x00001000
1838 17:53:00.538379 SMM BACKUP 10. 0xca666000 0x00010000
1839 17:53:00.541891 COREBOOT 11. 0xca65e000 0x00008000
1840 17:53:00.545197 ACPI 12. 0xca63a000 0x00024000
1841 17:53:00.548771 RAMOOPS 13. 0xca53a000 0x00100000
1842 17:53:00.551852 VGA ROM #0 14. 0xca52c000 0x0000d400
1843 17:53:00.555434 TPM2 TCGLOG15. 0xca51c000 0x00010000
1844 17:53:00.558431 SMBIOS 16. 0xca51b000 0x00000800
1845 17:53:00.558540 IMD small region:
1846 17:53:00.561984 IMD ROOT 0. 0xcb7fec00 0x00000400
1847 17:53:00.565644 FSP RUNTIME 1. 0xcb7febe0 0x00000004
1848 17:53:00.572299 VPD 2. 0xcb7feb80 0x00000058
1849 17:53:00.575383 POWER STATE 3. 0xcb7feb40 0x00000030
1850 17:53:00.578919 ROMSTAGE 4. 0xcb7feb20 0x00000004
1851 17:53:00.582262 EARLY DRAM USAGE 5. 0xcb7feb00 0x00000008
1852 17:53:00.585274 MEM INFO 6. 0xcb7fe920 0x000001e0
1853 17:53:00.588453 BS: BS_WRITE_TABLES run times (exec / console): 13 / 560 ms
1854 17:53:00.595534 Probing TPM I2C: done! DID_VID 0x00281ae0
1855 17:53:00.595674 Locality already claimed
1856 17:53:00.598851 cr50 TPM 2.0 (i2c 3:0x50 id 0x28)
1857 17:53:00.601862 Checking cr50 for pending updates
1858 17:53:00.612991 Reading cr50 TPM mode
1859 17:53:00.627365 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 14 ms
1860 17:53:00.627878 POST: 0x7a
1861 17:53:00.634254 FMAP: area FW_MAIN_A found @ 12000 (3137280 bytes)
1862 17:53:00.637600 CBFS: Locating 'fallback/payload'
1863 17:53:00.640914 CBFS: Found @ offset 1c9a40 size 2335d
1864 17:53:00.644233 Checking segment from ROM address 0xff1dba78
1865 17:53:00.647004 Checking segment from ROM address 0xff1dba94
1866 17:53:00.650506 Loading segment from ROM address 0xff1dba78
1867 17:53:00.653772 code (compression=1)
1868 17:53:00.660430 New segment dstaddr 0x30000000 memsize 0x10651f0 srcaddr 0xff1dbab0 filesize 0x23325
1869 17:53:00.670692 Loading Segment: addr: 0x30000000 memsz: 0x00000000010651f0 filesz: 0x0000000000023325
1870 17:53:00.670809 using LZMA
1871 17:53:00.710813 [ 0x30000000, 3004d29c, 0x310651f0) <- ff1dbab0
1872 17:53:00.717502 Clearing Segment: addr: 0x000000003004d29c memsz: 0x0000000001017f54
1873 17:53:00.723999 Loading segment from ROM address 0xff1dba94
1874 17:53:00.724092 Entry Point 0x30000000
1875 17:53:00.727355 Loaded segments
1876 17:53:00.730934 BS: BS_PAYLOAD_LOAD run times (exec / console): 39 / 60 ms
1877 17:53:00.733892 0x00000040: notify_params->phase
1878 17:53:00.737363 Calling FspNotify: 0xca6773b8
1879 17:53:00.740931 0xca6fff6c: notify_params
1880 17:53:00.741034 POST: 0x95
1881 17:53:00.745502 POST: 0x95
1882 17:53:00.748912 FspNotify returned 0x00000000
1883 17:53:00.749012 0x000000f0: notify_params->phase
1884 17:53:00.752501 Calling FspNotify: 0xca6773b8
1885 17:53:00.755410 0xca6fff7c: notify_params
1886 17:53:00.755487 POST: 0x88
1887 17:53:00.758920 POST: 0x89
1888 17:53:00.759021 FspNotify returned 0x00000000
1889 17:53:00.762287 Lock SMM configuration
1890 17:53:00.762364 POST: 0xfe
1891 17:53:00.769133 BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 29 ms
1892 17:53:00.772810 PSP: Notify that POST is finishing... OK
1893 17:53:00.778823 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 4 ms
1894 17:53:00.778930 POST: 0x7b
1895 17:53:00.782485 mp_park_aps done after 0 msecs.
1896 17:53:00.785459 Jumping to boot code at 0x30000000(0xca65e000)
1897 17:53:00.785561 POST: 0xf8
1898 17:53:00.795670 CPU0: stack: 0xca6ff000 - 0xca700000, lowest used address 0xca6ff92c, stack used: 1748 bytes
1899 17:53:00.795752
1900 17:53:00.795835
1901 17:53:00.795914
1902 17:53:00.798876 Starting depthcharge on Shuboz...
1903 17:53:00.798977
1904 17:53:00.799390 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1905 17:53:00.799530 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
1906 17:53:00.799649 Setting prompt string to ['zork:']
1907 17:53:00.799770 bootloader-commands: Wait for prompt ['zork:'] (timeout 00:04:45)
1908 17:53:00.805832 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1909 17:53:00.805914
1910 17:53:00.812449 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1911 17:53:00.812553
1912 17:53:00.815755 new_rt5682_codec: chip = 0x1A
1913 17:53:00.829982
1914 17:53:00.833891 Looking for NVMe Controller 0x300617c0 @ 00:01:07
1915 17:53:00.833972
1916 17:53:00.834057 Wipe memory regions:
1917 17:53:00.834138
1918 17:53:00.836699 [0x00000000001000, 0x000000000a0000)
1919 17:53:00.836789
1920 17:53:00.840308 [0x00000000100000, 0x00000002000000)
1921 17:53:00.849244
1922 17:53:00.849354 [0x000000021c0000, 0x00000030000000)
1923 17:53:01.003526
1924 17:53:01.003696 [0x000000310651f0, 0x000000ca51b000)
1925 17:53:01.504688
1926 17:53:01.504863 [0x00000100000000, 0x0000022f340000)
1927 17:53:02.991211
1928 17:53:02.991374 R8152: Initializing
1929 17:53:02.991471
1930 17:53:02.994819 Version 6 (ocp_data = 5c30)
1931 17:53:02.994920
1932 17:53:02.997738 R8152: Done initializing
1933 17:53:02.997841
1934 17:53:02.997943 Adding net device
1935 17:53:03.300987
1936 17:53:03.304355 [firmware-zork-13434.B-collabora] Oct 13 2022 14:21:34
1937 17:53:03.304466
1938 17:53:03.304570
1939 17:53:03.304672
1940 17:53:03.304995 Setting prompt string to ['zork:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1942 17:53:03.405418 zork: tftpboot 192.168.201.1 11712629/tftp-deploy-teqw0we0/kernel/bzImage 11712629/tftp-deploy-teqw0we0/kernel/cmdline 11712629/tftp-deploy-teqw0we0/ramdisk/ramdisk.cpio.gz
1943 17:53:03.405581 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1944 17:53:03.405697 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
1945 17:53:03.409475 tftpboot 192.168.201.1 11712629/tftp-deploy-teqw0we0/kernel/bzImage we0/kernel/cmdline 11712629/tftp-deploy-teqw0we0/ramdisk/ramdisk.cpio.gz
1946 17:53:03.409594
1947 17:53:03.409701 Waiting for link
1948 17:53:03.611890
1949 17:53:03.612041 done.
1950 17:53:03.612144
1951 17:53:03.612246 MAC: 00:24:32:50:1a:96
1952 17:53:03.612365
1953 17:53:03.615252 Sending DHCP discover... done.
1954 17:53:03.615359
1955 17:53:03.618727 Waiting for reply... done.
1956 17:53:03.618834
1957 17:53:03.621545 Sending DHCP request... done.
1958 17:53:03.621658
1959 17:53:03.621760 Waiting for reply... done.
1960 17:53:03.621863
1961 17:53:03.624994 My ip is 192.168.201.24
1962 17:53:03.625093
1963 17:53:03.628228 The DHCP server ip is 192.168.201.1
1964 17:53:03.628327
1965 17:53:03.631487 TFTP server IP predefined by user: 192.168.201.1
1966 17:53:03.631644
1967 17:53:03.638460 Bootfile predefined by user: 11712629/tftp-deploy-teqw0we0/kernel/bzImage
1968 17:53:03.638579
1969 17:53:03.641448 Sending tftp read request... done.
1970 17:53:03.641552
1971 17:53:03.644961 Waiting for the transfer...
1972 17:53:03.645068
1973 17:53:04.171462 00000000 ################################################################
1974 17:53:04.171620
1975 17:53:04.702319 00080000 ################################################################
1976 17:53:04.702465
1977 17:53:05.226648 00100000 ################################################################
1978 17:53:05.226797
1979 17:53:05.754408 00180000 ################################################################
1980 17:53:05.754573
1981 17:53:06.276206 00200000 ################################################################
1982 17:53:06.276358
1983 17:53:06.798739 00280000 ################################################################
1984 17:53:06.798880
1985 17:53:07.342105 00300000 ################################################################
1986 17:53:07.342242
1987 17:53:07.865276 00380000 ################################################################
1988 17:53:07.865448
1989 17:53:08.388791 00400000 ################################################################
1990 17:53:08.388940
1991 17:53:08.912721 00480000 ################################################################
1992 17:53:08.912895
1993 17:53:09.456848 00500000 ################################################################
1994 17:53:09.456998
1995 17:53:10.002234 00580000 ################################################################
1996 17:53:10.002387
1997 17:53:10.548258 00600000 ################################################################
1998 17:53:10.548406
1999 17:53:11.108552 00680000 ################################################################
2000 17:53:11.108728
2001 17:53:11.658785 00700000 ################################################################
2002 17:53:11.658947
2003 17:53:12.196271 00780000 ################################################################
2004 17:53:12.196431
2005 17:53:12.298230 00800000 ############# done.
2006 17:53:12.298359
2007 17:53:12.301661 The bootfile was 8490896 bytes long.
2008 17:53:12.301751
2009 17:53:12.305273 Sending tftp read request... done.
2010 17:53:12.305351
2011 17:53:12.305427 Waiting for the transfer...
2012 17:53:12.305489
2013 17:53:12.865516 00000000 ################################################################
2014 17:53:12.865720
2015 17:53:13.422675 00080000 ################################################################
2016 17:53:13.422834
2017 17:53:13.999547 00100000 ################################################################
2018 17:53:13.999809
2019 17:53:14.607984 00180000 ################################################################
2020 17:53:14.608360
2021 17:53:15.218641 00200000 ################################################################
2022 17:53:15.218958
2023 17:53:15.802534 00280000 ################################################################
2024 17:53:15.802679
2025 17:53:16.363910 00300000 ################################################################
2026 17:53:16.364044
2027 17:53:16.938064 00380000 ################################################################
2028 17:53:16.938207
2029 17:53:17.567675 00400000 ################################################################
2030 17:53:17.567808
2031 17:53:18.177713 00480000 ################################################################
2032 17:53:18.178363
2033 17:53:18.816022 00500000 ################################################################
2034 17:53:18.816550
2035 17:53:19.478463 00580000 ################################################################
2036 17:53:19.478988
2037 17:53:20.142510 00600000 ################################################################
2038 17:53:20.142698
2039 17:53:20.698046 00680000 ################################################################
2040 17:53:20.698211
2041 17:53:21.348496 00700000 ################################################################
2042 17:53:21.348647
2043 17:53:21.986098 00780000 ################################################################
2044 17:53:21.986247
2045 17:53:22.513395 00800000 ###################################################### done.
2046 17:53:22.514051
2047 17:53:22.516794 Sending tftp read request... done.
2048 17:53:22.517244
2049 17:53:22.520287 Waiting for the transfer...
2050 17:53:22.520719
2051 17:53:22.521058 00000000 # done.
2052 17:53:22.523345
2053 17:53:22.530036 Command line loaded dynamically from TFTP file: 11712629/tftp-deploy-teqw0we0/kernel/cmdline
2054 17:53:22.530470
2055 17:53:22.543253 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2056 17:53:22.543692
2057 17:53:22.547009 ec_init: CrosEC protocol v3 supported (256, 256)
2058 17:53:22.555346
2059 17:53:22.555772 Shutting down all USB controllers.
2060 17:53:22.556115
2061 17:53:22.558761 Removing current net device
2062 17:53:22.559343
2063 17:53:22.562256 Finalizing coreboot
2064 17:53:22.562874
2065 17:53:22.563411
2066 17:53:22.563802
2067 17:53:22.568869 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...
2068 17:53:22.569322
2069 17:53:22.569663 SMI# #3
2070 17:53:22.575219 Exiting depthcharge with code 4 at timestamp: 30777446
2071 17:53:22.575669
2072 17:53:22.576178
2073 17:53:22.576691 Starting kernel ...
2074 17:53:22.577168
2075 17:53:22.577581
2076 17:53:22.579440 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2077 17:53:22.580014 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2078 17:53:22.580541 Setting prompt string to ['Linux version [0-9]']
2079 17:53:22.581106 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 17:53:22.581658 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2081 17:53:22.923468
2082 17:53:22.924091
2083 17:53:22.924442
2084 17:53:22.930206 coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...
2085 17:53:22.930685
2086 17:53:22.931026 SMI# #0
2087 17:53:22.933106 Chrome EC: Set SMI mask to 0x0000000000000000
2088 17:53:22.936777 Chrome EC: UHEPI supported
2089 17:53:22.943178 Clearing pending EC events. Error code EC_RES_UNAVAILABLE(9) is expected.
2090 17:53:22.946810 EC returned error result code 9
2091 17:53:22.949729 Chrome EC: Set SCI mask to 0x00000000142609fb
2093 17:57:45.580260 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2095 17:57:45.580575 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2097 17:57:45.580793 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2100 17:57:45.581177 end: 2 depthcharge-action (duration 00:05:00) [common]
2102 17:57:45.581503 Cleaning after the job
2103 17:57:45.581617 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/ramdisk
2104 17:57:45.582892 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/kernel
2105 17:57:45.584216 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712629/tftp-deploy-teqw0we0/modules
2106 17:57:45.584599 start: 5.1 power-off (timeout 00:00:30) [common]
2107 17:57:45.584873 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-CM1400CXA-dalboz-cbg-6' '--port=1' '--command=off'
2108 17:57:45.655798 >> Command sent successfully.
2109 17:57:45.658420 Returned 0 in 0 seconds
2110 17:57:45.758817 end: 5.1 power-off (duration 00:00:00) [common]
2112 17:57:45.759208 start: 5.2 read-feedback (timeout 00:10:00) [common]
2113 17:57:45.759477 Listened to connection for namespace 'common' for up to 1s
2114 17:57:45.759765 Listened to connection for namespace 'common' for up to 1s
2115 17:57:46.760419 Finalising connection for namespace 'common'
2116 17:57:46.760599 Disconnecting from shell: Finalise
2117 17:57:46.760684
2118 17:57:46.861031 end: 5.2 read-feedback (duration 00:00:01) [common]
2119 17:57:46.861197 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712629
2120 17:57:46.877735 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712629
2121 17:57:46.877884 JobError: Your job cannot terminate cleanly.