Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:56:33.408286 lava-dispatcher, installed at version: 2023.08
2 17:56:33.408553 start: 0 validate
3 17:56:33.408692 Start time: 2023-10-09 17:56:33.408684+00:00 (UTC)
4 17:56:33.408860 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:56:33.409012 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:56:33.677852 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:56:33.678028 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:56:33.943174 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:56:33.943392 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:56:34.210409 validate duration: 0.80
12 17:56:34.210797 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:56:34.210944 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:56:34.211076 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:56:34.211241 Not decompressing ramdisk as can be used compressed.
16 17:56:34.211360 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:56:34.211455 saving as /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/ramdisk/rootfs.cpio.gz
18 17:56:34.211551 total size: 8418130 (8 MB)
19 17:56:34.212945 progress 0 % (0 MB)
20 17:56:34.215665 progress 5 % (0 MB)
21 17:56:34.218409 progress 10 % (0 MB)
22 17:56:34.221279 progress 15 % (1 MB)
23 17:56:34.223828 progress 20 % (1 MB)
24 17:56:34.226665 progress 25 % (2 MB)
25 17:56:34.229372 progress 30 % (2 MB)
26 17:56:34.231975 progress 35 % (2 MB)
27 17:56:34.234425 progress 40 % (3 MB)
28 17:56:34.236876 progress 45 % (3 MB)
29 17:56:34.239186 progress 50 % (4 MB)
30 17:56:34.241530 progress 55 % (4 MB)
31 17:56:34.243857 progress 60 % (4 MB)
32 17:56:34.246020 progress 65 % (5 MB)
33 17:56:34.248392 progress 70 % (5 MB)
34 17:56:34.250885 progress 75 % (6 MB)
35 17:56:34.253316 progress 80 % (6 MB)
36 17:56:34.255574 progress 85 % (6 MB)
37 17:56:34.257868 progress 90 % (7 MB)
38 17:56:34.260280 progress 95 % (7 MB)
39 17:56:34.262464 progress 100 % (8 MB)
40 17:56:34.262696 8 MB downloaded in 0.05 s (156.97 MB/s)
41 17:56:34.262853 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:56:34.263092 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:56:34.263178 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:56:34.263262 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:56:34.263447 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:56:34.263525 saving as /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/kernel/bzImage
48 17:56:34.263601 total size: 8490896 (8 MB)
49 17:56:34.263663 No compression specified
50 17:56:34.264812 progress 0 % (0 MB)
51 17:56:34.267380 progress 5 % (0 MB)
52 17:56:34.270081 progress 10 % (0 MB)
53 17:56:34.272532 progress 15 % (1 MB)
54 17:56:34.274938 progress 20 % (1 MB)
55 17:56:34.277286 progress 25 % (2 MB)
56 17:56:34.279609 progress 30 % (2 MB)
57 17:56:34.281997 progress 35 % (2 MB)
58 17:56:34.284341 progress 40 % (3 MB)
59 17:56:34.286694 progress 45 % (3 MB)
60 17:56:34.288996 progress 50 % (4 MB)
61 17:56:34.291259 progress 55 % (4 MB)
62 17:56:34.293587 progress 60 % (4 MB)
63 17:56:34.295851 progress 65 % (5 MB)
64 17:56:34.298121 progress 70 % (5 MB)
65 17:56:34.300409 progress 75 % (6 MB)
66 17:56:34.302702 progress 80 % (6 MB)
67 17:56:34.305031 progress 85 % (6 MB)
68 17:56:34.307349 progress 90 % (7 MB)
69 17:56:34.309658 progress 95 % (7 MB)
70 17:56:34.311949 progress 100 % (8 MB)
71 17:56:34.312068 8 MB downloaded in 0.05 s (167.04 MB/s)
72 17:56:34.312216 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:56:34.312465 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:56:34.312553 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:56:34.312639 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:56:34.312784 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:56:34.312859 saving as /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/modules/modules.tar
79 17:56:34.312921 total size: 250928 (0 MB)
80 17:56:34.312984 Using unxz to decompress xz
81 17:56:34.317228 progress 13 % (0 MB)
82 17:56:34.317651 progress 26 % (0 MB)
83 17:56:34.317902 progress 39 % (0 MB)
84 17:56:34.319488 progress 52 % (0 MB)
85 17:56:34.321542 progress 65 % (0 MB)
86 17:56:34.323576 progress 78 % (0 MB)
87 17:56:34.325603 progress 91 % (0 MB)
88 17:56:34.327456 progress 100 % (0 MB)
89 17:56:34.333452 0 MB downloaded in 0.02 s (11.66 MB/s)
90 17:56:34.333748 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:56:34.334056 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:56:34.334191 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:56:34.334344 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:56:34.334477 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:56:34.334603 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:56:34.334920 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj
98 17:56:34.335079 makedir: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin
99 17:56:34.335196 makedir: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/tests
100 17:56:34.335353 makedir: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/results
101 17:56:34.335475 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-add-keys
102 17:56:34.335650 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-add-sources
103 17:56:34.335864 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-background-process-start
104 17:56:34.336029 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-background-process-stop
105 17:56:34.336171 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-common-functions
106 17:56:34.336351 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-echo-ipv4
107 17:56:34.336504 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-install-packages
108 17:56:34.336665 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-installed-packages
109 17:56:34.336823 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-os-build
110 17:56:34.336952 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-probe-channel
111 17:56:34.337116 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-probe-ip
112 17:56:34.337297 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-target-ip
113 17:56:34.337467 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-target-mac
114 17:56:34.337651 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-target-storage
115 17:56:34.337832 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-case
116 17:56:34.338006 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-event
117 17:56:34.338186 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-feedback
118 17:56:34.338363 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-raise
119 17:56:34.338551 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-reference
120 17:56:34.338742 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-runner
121 17:56:34.338915 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-set
122 17:56:34.339047 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-test-shell
123 17:56:34.339211 Updating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-install-packages (oe)
124 17:56:34.339391 Updating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/bin/lava-installed-packages (oe)
125 17:56:34.339518 Creating /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/environment
126 17:56:34.339694 LAVA metadata
127 17:56:34.339879 - LAVA_JOB_ID=11712547
128 17:56:34.339950 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:56:34.340142 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:56:34.340241 skipped lava-vland-overlay
131 17:56:34.340329 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:56:34.340444 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:56:34.340511 skipped lava-multinode-overlay
134 17:56:34.340609 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:56:34.340691 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:56:34.340792 Loading test definitions
137 17:56:34.340889 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:56:34.340992 Using /lava-11712547 at stage 0
139 17:56:34.341353 uuid=11712547_1.4.2.3.1 testdef=None
140 17:56:34.341444 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:56:34.341558 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:56:34.342418 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:56:34.342812 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:56:34.343605 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:56:34.343884 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:56:34.344684 runner path: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/0/tests/0_dmesg test_uuid 11712547_1.4.2.3.1
149 17:56:34.344900 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:56:34.345298 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:56:34.345400 Using /lava-11712547 at stage 1
153 17:56:34.345870 uuid=11712547_1.4.2.3.5 testdef=None
154 17:56:34.345999 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:56:34.346127 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:56:34.346891 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:56:34.347234 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:56:34.348008 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:56:34.348283 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:56:34.348999 runner path: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/1/tests/1_bootrr test_uuid 11712547_1.4.2.3.5
163 17:56:34.349192 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:56:34.349412 Creating lava-test-runner.conf files
166 17:56:34.349497 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/0 for stage 0
167 17:56:34.349590 - 0_dmesg
168 17:56:34.349686 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712547/lava-overlay-qf6ic0aj/lava-11712547/1 for stage 1
169 17:56:34.349779 - 1_bootrr
170 17:56:34.349919 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:56:34.350050 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:56:34.360901 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:56:34.361067 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:56:34.361188 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:56:34.361277 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:56:34.361377 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:56:34.644631 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:56:34.645023 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:56:34.645142 extracting modules file /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712547/extract-overlay-ramdisk-xsoik81x/ramdisk
180 17:56:34.659896 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:56:34.660030 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:56:34.660125 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712547/compress-overlay-pyquypys/overlay-1.4.2.4.tar.gz to ramdisk
183 17:56:34.660198 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712547/compress-overlay-pyquypys/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712547/extract-overlay-ramdisk-xsoik81x/ramdisk
184 17:56:34.669754 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:56:34.669878 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:56:34.669972 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:56:34.670064 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:56:34.670149 Building ramdisk /var/lib/lava/dispatcher/tmp/11712547/extract-overlay-ramdisk-xsoik81x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712547/extract-overlay-ramdisk-xsoik81x/ramdisk
189 17:56:34.817452 >> 49788 blocks
190 17:56:35.676394 rename /var/lib/lava/dispatcher/tmp/11712547/extract-overlay-ramdisk-xsoik81x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/ramdisk/ramdisk.cpio.gz
191 17:56:35.676918 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:56:35.677052 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:56:35.677161 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:56:35.677263 No mkimage arch provided, not using FIT.
195 17:56:35.677355 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:56:35.677444 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:56:35.677552 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:56:35.677670 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:56:35.677751 No LXC device requested
200 17:56:35.677830 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:56:35.677922 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:56:35.678009 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:56:35.678086 Checking files for TFTP limit of 4294967296 bytes.
204 17:56:35.678512 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:56:35.678624 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:56:35.678719 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:56:35.678891 substitutions:
208 17:56:35.678986 - {DTB}: None
209 17:56:35.679078 - {INITRD}: 11712547/tftp-deploy-g4coc2zk/ramdisk/ramdisk.cpio.gz
210 17:56:35.679167 - {KERNEL}: 11712547/tftp-deploy-g4coc2zk/kernel/bzImage
211 17:56:35.679257 - {LAVA_MAC}: None
212 17:56:35.679323 - {PRESEED_CONFIG}: None
213 17:56:35.679381 - {PRESEED_LOCAL}: None
214 17:56:35.679437 - {RAMDISK}: 11712547/tftp-deploy-g4coc2zk/ramdisk/ramdisk.cpio.gz
215 17:56:35.679520 - {ROOT_PART}: None
216 17:56:35.679624 - {ROOT}: None
217 17:56:35.679728 - {SERVER_IP}: 192.168.201.1
218 17:56:35.679793 - {TEE}: None
219 17:56:35.679850 Parsed boot commands:
220 17:56:35.679922 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:56:35.680117 Parsed boot commands: tftpboot 192.168.201.1 11712547/tftp-deploy-g4coc2zk/kernel/bzImage 11712547/tftp-deploy-g4coc2zk/kernel/cmdline 11712547/tftp-deploy-g4coc2zk/ramdisk/ramdisk.cpio.gz
222 17:56:35.680209 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:56:35.680298 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:56:35.680393 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:56:35.680480 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:56:35.680550 Not connected, no need to disconnect.
227 17:56:35.680626 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:56:35.680713 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:56:35.680782 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-8'
230 17:56:35.684965 Setting prompt string to ['lava-test: # ']
231 17:56:35.685341 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:56:35.685451 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:56:35.685546 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:56:35.685645 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:56:35.685861 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
236 17:56:40.818393 >> Command sent successfully.
237 17:56:40.821009 Returned 0 in 5 seconds
238 17:56:40.921363 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:56:40.921718 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:56:40.921817 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:56:40.921921 Setting prompt string to 'Starting depthcharge on Voema...'
243 17:56:40.921991 Changing prompt to 'Starting depthcharge on Voema...'
244 17:56:40.922057 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 17:56:40.922345 [Enter `^Ec?' for help]
246 17:56:42.524058
247 17:56:42.524246
248 17:56:42.534201 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 17:56:42.540578 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 17:56:42.544166 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 17:56:42.546992 CPU: AES supported, TXT NOT supported, VT supported
252 17:56:42.553624 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 17:56:42.560099 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 17:56:42.563488 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 17:56:42.566872 VBOOT: Loading verstage.
256 17:56:42.573237 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 17:56:42.576735 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 17:56:42.583327 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 17:56:42.589956 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 17:56:42.596739 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 17:56:42.600613
262 17:56:42.600699
263 17:56:42.610125 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 17:56:42.624561 Probing TPM: . done!
265 17:56:42.627993 TPM ready after 0 ms
266 17:56:42.631585 Connected to device vid:did:rid of 1ae0:0028:00
267 17:56:42.642795 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
268 17:56:42.649323 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 17:56:42.652443 Initialized TPM device CR50 revision 0
270 17:56:42.704396 tlcl_send_startup: Startup return code is 0
271 17:56:42.704548 TPM: setup succeeded
272 17:56:42.718637 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 17:56:42.732834 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 17:56:42.745494 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 17:56:42.755585 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 17:56:42.758844 Chrome EC: UHEPI supported
277 17:56:42.762377 Phase 1
278 17:56:42.765421 FMAP: area GBB found @ 1805000 (458752 bytes)
279 17:56:42.775518 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 17:56:42.781730 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 17:56:42.788452 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 17:56:42.795352 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 17:56:42.798540 Recovery requested (1009000e)
284 17:56:42.807253 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 17:56:42.813487 tlcl_extend: response is 0
286 17:56:42.819895 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 17:56:42.830209 tlcl_extend: response is 0
288 17:56:42.836860 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 17:56:42.843412 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 17:56:42.850086 BS: verstage times (exec / console): total (unknown) / 142 ms
291 17:56:42.850207
292 17:56:42.850313
293 17:56:42.863406 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 17:56:42.869872 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 17:56:42.872826 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 17:56:42.876246 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 17:56:42.883183 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 17:56:42.886136 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 17:56:42.889893 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 17:56:42.892623 TCO_STS: 0000 0000
301 17:56:42.895999 GEN_PMCON: d0015038 00002200
302 17:56:42.899334 GBLRST_CAUSE: 00000000 00000000
303 17:56:42.903057 HPR_CAUSE0: 00000000
304 17:56:42.903141 prev_sleep_state 5
305 17:56:42.905754 Boot Count incremented to 23415
306 17:56:42.912885 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 17:56:42.918977 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 17:56:42.929266 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 17:56:42.935815 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 17:56:42.938973 Chrome EC: UHEPI supported
311 17:56:42.945433 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 17:56:42.957351 Probing TPM: done!
313 17:56:42.963763 Connected to device vid:did:rid of 1ae0:0028:00
314 17:56:42.974663 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
315 17:56:42.983307 Initialized TPM device CR50 revision 0
316 17:56:42.996606 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 17:56:42.999574 MRC: Hash idx 0x100b comparison successful.
318 17:56:43.002862 MRC cache found, size faa8
319 17:56:43.002947 bootmode is set to: 2
320 17:56:43.006436 SPD index = 0
321 17:56:43.013519 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 17:56:43.016387 SPD: module type is LPDDR4X
323 17:56:43.019905 SPD: module part number is MT53E512M64D4NW-046
324 17:56:43.026260 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 17:56:43.032710 SPD: device width 16 bits, bus width 16 bits
326 17:56:43.036262 SPD: module size is 1024 MB (per channel)
327 17:56:43.467204 CBMEM:
328 17:56:43.470141 IMD: root @ 0x76fff000 254 entries.
329 17:56:43.473754 IMD: root @ 0x76ffec00 62 entries.
330 17:56:43.476728 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 17:56:43.483467 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 17:56:43.486694 External stage cache:
333 17:56:43.490085 IMD: root @ 0x7b3ff000 254 entries.
334 17:56:43.493064 IMD: root @ 0x7b3fec00 62 entries.
335 17:56:43.508873 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 17:56:43.515414 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 17:56:43.521963 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 17:56:43.536221 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 17:56:43.542469 cse_lite: Skip switching to RW in the recovery path
340 17:56:43.542593 8 DIMMs found
341 17:56:43.545545 SMM Memory Map
342 17:56:43.548856 SMRAM : 0x7b000000 0x800000
343 17:56:43.552573 Subregion 0: 0x7b000000 0x200000
344 17:56:43.556058 Subregion 1: 0x7b200000 0x200000
345 17:56:43.559481 Subregion 2: 0x7b400000 0x400000
346 17:56:43.559577 top_of_ram = 0x77000000
347 17:56:43.566776 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 17:56:43.570055 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 17:56:43.576664 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 17:56:43.583292 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 17:56:43.589494 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 17:56:43.595998 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 17:56:43.606290 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 17:56:43.609168 Processing 211 relocs. Offset value of 0x74c0b000
355 17:56:43.619304 BS: romstage times (exec / console): total (unknown) / 277 ms
356 17:56:43.625292
357 17:56:43.625378
358 17:56:43.635495 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 17:56:43.638317 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 17:56:43.648114 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 17:56:43.654470 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 17:56:43.661206 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 17:56:43.667532 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 17:56:43.715621 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 17:56:43.721985 Processing 5008 relocs. Offset value of 0x75d98000
366 17:56:43.725139 BS: postcar times (exec / console): total (unknown) / 59 ms
367 17:56:43.728743
368 17:56:43.728825
369 17:56:43.738473 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 17:56:43.738558 Normal boot
371 17:56:43.742202 FW_CONFIG value is 0x804c02
372 17:56:43.745171 PCI: 00:07.0 disabled by fw_config
373 17:56:43.748553 PCI: 00:07.1 disabled by fw_config
374 17:56:43.754884 PCI: 00:0d.2 disabled by fw_config
375 17:56:43.758468 PCI: 00:1c.7 disabled by fw_config
376 17:56:43.761854 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 17:56:43.768542 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 17:56:43.774927 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 17:56:43.778179 GENERIC: 0.0 disabled by fw_config
380 17:56:43.782243 GENERIC: 1.0 disabled by fw_config
381 17:56:43.785200 fw_config match found: DB_USB=USB3_ACTIVE
382 17:56:43.788533 fw_config match found: DB_USB=USB3_ACTIVE
383 17:56:43.794478 fw_config match found: DB_USB=USB3_ACTIVE
384 17:56:43.797954 fw_config match found: DB_USB=USB3_ACTIVE
385 17:56:43.801226 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 17:56:43.811488 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 17:56:43.817876 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 17:56:43.824305 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 17:56:43.830832 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 17:56:43.834320 microcode: Update skipped, already up-to-date
391 17:56:43.840810 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 17:56:43.869275 Detected 4 core, 8 thread CPU.
393 17:56:43.872540 Setting up SMI for CPU
394 17:56:43.875546 IED base = 0x7b400000
395 17:56:43.878684 IED size = 0x00400000
396 17:56:43.878766 Will perform SMM setup.
397 17:56:43.885348 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 17:56:43.892238 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 17:56:43.898485 Processing 16 relocs. Offset value of 0x00030000
400 17:56:43.901987 Attempting to start 7 APs
401 17:56:43.904785 Waiting for 10ms after sending INIT.
402 17:56:43.921005 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 17:56:43.924454 AP: slot 5 apic_id 6.
404 17:56:43.927300 AP: slot 4 apic_id 7.
405 17:56:43.927402 done.
406 17:56:43.927494 AP: slot 2 apic_id 2.
407 17:56:43.930898 AP: slot 6 apic_id 3.
408 17:56:43.933865 AP: slot 7 apic_id 4.
409 17:56:43.937636 Waiting for 2nd SIPI to complete...done.
410 17:56:43.940777 AP: slot 3 apic_id 5.
411 17:56:43.947346 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 17:56:43.953802 Processing 13 relocs. Offset value of 0x00038000
413 17:56:43.957273 Unable to locate Global NVS
414 17:56:43.963965 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 17:56:43.966794 Installing permanent SMM handler to 0x7b000000
416 17:56:43.977015 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 17:56:43.980023 Processing 794 relocs. Offset value of 0x7b010000
418 17:56:43.990281 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 17:56:43.993425 Processing 13 relocs. Offset value of 0x7b008000
420 17:56:44.000322 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 17:56:44.006843 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 17:56:44.013432 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 17:56:44.016180 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 17:56:44.023008 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 17:56:44.029869 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 17:56:44.036214 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 17:56:44.039141 Unable to locate Global NVS
428 17:56:44.046026 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 17:56:44.049187 Clearing SMI status registers
430 17:56:44.052699 SMI_STS: PM1
431 17:56:44.052781 PM1_STS: PWRBTN
432 17:56:44.062498 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 17:56:44.062608 In relocation handler: CPU 0
434 17:56:44.069076 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 17:56:44.072391 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 17:56:44.075321 Relocation complete.
437 17:56:44.081934 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 17:56:44.085101 In relocation handler: CPU 1
439 17:56:44.088675 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 17:56:44.092030 Relocation complete.
441 17:56:44.098083 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
442 17:56:44.101429 In relocation handler: CPU 4
443 17:56:44.104953 New SMBASE=0x7afff000 IEDBASE=0x7b400000
444 17:56:44.108189 Relocation complete.
445 17:56:44.114678 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
446 17:56:44.118096 In relocation handler: CPU 2
447 17:56:44.121238 New SMBASE=0x7afff800 IEDBASE=0x7b400000
448 17:56:44.127864 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 17:56:44.127942 Relocation complete.
450 17:56:44.137742 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 17:56:44.141290 In relocation handler: CPU 5
452 17:56:44.144501 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 17:56:44.147643 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 17:56:44.151361 Relocation complete.
455 17:56:44.157626 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 17:56:44.160851 In relocation handler: CPU 3
457 17:56:44.163747 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 17:56:44.167407 Relocation complete.
459 17:56:44.173963 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
460 17:56:44.177201 In relocation handler: CPU 7
461 17:56:44.180240 New SMBASE=0x7affe400 IEDBASE=0x7b400000
462 17:56:44.186806 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 17:56:44.186889 Relocation complete.
464 17:56:44.196681 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
465 17:56:44.200140 In relocation handler: CPU 6
466 17:56:44.203317 New SMBASE=0x7affe800 IEDBASE=0x7b400000
467 17:56:44.203400 Relocation complete.
468 17:56:44.206909 Initializing CPU #0
469 17:56:44.210139 CPU: vendor Intel device 806c1
470 17:56:44.213614 CPU: family 06, model 8c, stepping 01
471 17:56:44.216876 Clearing out pending MCEs
472 17:56:44.219849 Setting up local APIC...
473 17:56:44.223997 apic_id: 0x00 done.
474 17:56:44.224079 Turbo is available but hidden
475 17:56:44.227478 Turbo is available and visible
476 17:56:44.230908 microcode: Update skipped, already up-to-date
477 17:56:44.234242 CPU #0 initialized
478 17:56:44.237556 Initializing CPU #1
479 17:56:44.237659 Initializing CPU #2
480 17:56:44.241060 Initializing CPU #6
481 17:56:44.244698 CPU: vendor Intel device 806c1
482 17:56:44.247760 CPU: family 06, model 8c, stepping 01
483 17:56:44.251132 Initializing CPU #7
484 17:56:44.251233 Initializing CPU #3
485 17:56:44.253870 CPU: vendor Intel device 806c1
486 17:56:44.257440 CPU: family 06, model 8c, stepping 01
487 17:56:44.260486 CPU: vendor Intel device 806c1
488 17:56:44.267637 CPU: family 06, model 8c, stepping 01
489 17:56:44.267789 Clearing out pending MCEs
490 17:56:44.270502 Clearing out pending MCEs
491 17:56:44.273654 Setting up local APIC...
492 17:56:44.277123 CPU: vendor Intel device 806c1
493 17:56:44.280687 CPU: family 06, model 8c, stepping 01
494 17:56:44.283480 Clearing out pending MCEs
495 17:56:44.286904 Clearing out pending MCEs
496 17:56:44.286994 Setting up local APIC...
497 17:56:44.290468 apic_id: 0x04 done.
498 17:56:44.293332 Setting up local APIC...
499 17:56:44.296882 CPU: vendor Intel device 806c1
500 17:56:44.299851 CPU: family 06, model 8c, stepping 01
501 17:56:44.303441 Initializing CPU #4
502 17:56:44.303523 Initializing CPU #5
503 17:56:44.306443 CPU: vendor Intel device 806c1
504 17:56:44.309911 CPU: family 06, model 8c, stepping 01
505 17:56:44.313152 CPU: vendor Intel device 806c1
506 17:56:44.316405 CPU: family 06, model 8c, stepping 01
507 17:56:44.320300 Clearing out pending MCEs
508 17:56:44.323301 Clearing out pending MCEs
509 17:56:44.326378 Setting up local APIC...
510 17:56:44.330080 Clearing out pending MCEs
511 17:56:44.330162 apic_id: 0x02 done.
512 17:56:44.333048 Setting up local APIC...
513 17:56:44.336367 Setting up local APIC...
514 17:56:44.339281 microcode: Update skipped, already up-to-date
515 17:56:44.342927 apic_id: 0x03 done.
516 17:56:44.343008 CPU #2 initialized
517 17:56:44.349168 microcode: Update skipped, already up-to-date
518 17:56:44.352588 Setting up local APIC...
519 17:56:44.352670 apic_id: 0x05 done.
520 17:56:44.359657 microcode: Update skipped, already up-to-date
521 17:56:44.362447 microcode: Update skipped, already up-to-date
522 17:56:44.365593 CPU #7 initialized
523 17:56:44.365675 CPU #3 initialized
524 17:56:44.368959 apic_id: 0x01 done.
525 17:56:44.372521 CPU #6 initialized
526 17:56:44.375540 microcode: Update skipped, already up-to-date
527 17:56:44.378572 apic_id: 0x06 done.
528 17:56:44.378654 apic_id: 0x07 done.
529 17:56:44.385753 microcode: Update skipped, already up-to-date
530 17:56:44.388565 microcode: Update skipped, already up-to-date
531 17:56:44.392363 CPU #5 initialized
532 17:56:44.392448 CPU #4 initialized
533 17:56:44.395081 CPU #1 initialized
534 17:56:44.398186 bsp_do_flight_plan done after 457 msecs.
535 17:56:44.401586 CPU: frequency set to 4000 MHz
536 17:56:44.404980 Enabling SMIs.
537 17:56:44.411650 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 17:56:44.425811 SATAXPCIE1 indicates PCIe NVMe is present
539 17:56:44.428746 Probing TPM: done!
540 17:56:44.431870 Connected to device vid:did:rid of 1ae0:0028:00
541 17:56:44.443196 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
542 17:56:44.446529 Initialized TPM device CR50 revision 0
543 17:56:44.449522 Enabling S0i3.4
544 17:56:44.456225 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 17:56:44.459257 Found a VBT of 8704 bytes after decompression
546 17:56:44.466338 cse_lite: CSE RO boot. HybridStorageMode disabled
547 17:56:44.472877 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 17:56:44.548933 FSPS returned 0
549 17:56:44.551997 Executing Phase 1 of FspMultiPhaseSiInit
550 17:56:44.561971 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 17:56:44.565040 port C0 DISC req: usage 1 usb3 1 usb2 5
552 17:56:44.568528 Raw Buffer output 0 00000511
553 17:56:44.571669 Raw Buffer output 1 00000000
554 17:56:44.575867 pmc_send_ipc_cmd succeeded
555 17:56:44.581990 port C1 DISC req: usage 1 usb3 2 usb2 3
556 17:56:44.582100 Raw Buffer output 0 00000321
557 17:56:44.585393 Raw Buffer output 1 00000000
558 17:56:44.589667 pmc_send_ipc_cmd succeeded
559 17:56:44.597870 Detected 4 core, 8 thread CPU.
560 17:56:44.598028 Detected 4 core, 8 thread CPU.
561 17:56:44.832227 Display FSP Version Info HOB
562 17:56:44.835679 Reference Code - CPU = a.0.4c.31
563 17:56:44.838562 uCode Version = 0.0.0.86
564 17:56:44.842072 TXT ACM version = ff.ff.ff.ffff
565 17:56:44.845114 Reference Code - ME = a.0.4c.31
566 17:56:44.848493 MEBx version = 0.0.0.0
567 17:56:44.851840 ME Firmware Version = Consumer SKU
568 17:56:44.854807 Reference Code - PCH = a.0.4c.31
569 17:56:44.858700 PCH-CRID Status = Disabled
570 17:56:44.861399 PCH-CRID Original Value = ff.ff.ff.ffff
571 17:56:44.864910 PCH-CRID New Value = ff.ff.ff.ffff
572 17:56:44.867999 OPROM - RST - RAID = ff.ff.ff.ffff
573 17:56:44.871547 PCH Hsio Version = 4.0.0.0
574 17:56:44.874635 Reference Code - SA - System Agent = a.0.4c.31
575 17:56:44.878069 Reference Code - MRC = 2.0.0.1
576 17:56:44.881381 SA - PCIe Version = a.0.4c.31
577 17:56:44.884626 SA-CRID Status = Disabled
578 17:56:44.887799 SA-CRID Original Value = 0.0.0.1
579 17:56:44.891373 SA-CRID New Value = 0.0.0.1
580 17:56:44.894785 OPROM - VBIOS = ff.ff.ff.ffff
581 17:56:44.897856 IO Manageability Engine FW Version = 11.1.4.0
582 17:56:44.901311 PHY Build Version = 0.0.0.e0
583 17:56:44.904446 Thunderbolt(TM) FW Version = 0.0.0.0
584 17:56:44.910876 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 17:56:44.914289 ITSS IRQ Polarities Before:
586 17:56:44.917290 IPC0: 0xffffffff
587 17:56:44.917372 IPC1: 0xffffffff
588 17:56:44.920748 IPC2: 0xffffffff
589 17:56:44.920833 IPC3: 0xffffffff
590 17:56:44.923732 ITSS IRQ Polarities After:
591 17:56:44.927342 IPC0: 0xffffffff
592 17:56:44.927416 IPC1: 0xffffffff
593 17:56:44.930296 IPC2: 0xffffffff
594 17:56:44.930369 IPC3: 0xffffffff
595 17:56:44.934229 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 17:56:44.947065 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 17:56:44.960013 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 17:56:44.969990 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 17:56:44.976430 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 17:56:44.979940 Enumerating buses...
601 17:56:44.983564 Show all devs... Before device enumeration.
602 17:56:44.986941 Root Device: enabled 1
603 17:56:44.989721 DOMAIN: 0000: enabled 1
604 17:56:44.992789 CPU_CLUSTER: 0: enabled 1
605 17:56:44.992872 PCI: 00:00.0: enabled 1
606 17:56:44.996431 PCI: 00:02.0: enabled 1
607 17:56:44.999420 PCI: 00:04.0: enabled 1
608 17:56:45.003112 PCI: 00:05.0: enabled 1
609 17:56:45.003220 PCI: 00:06.0: enabled 0
610 17:56:45.006352 PCI: 00:07.0: enabled 0
611 17:56:45.009741 PCI: 00:07.1: enabled 0
612 17:56:45.012601 PCI: 00:07.2: enabled 0
613 17:56:45.012684 PCI: 00:07.3: enabled 0
614 17:56:45.015791 PCI: 00:08.0: enabled 1
615 17:56:45.019241 PCI: 00:09.0: enabled 0
616 17:56:45.022605 PCI: 00:0a.0: enabled 0
617 17:56:45.022688 PCI: 00:0d.0: enabled 1
618 17:56:45.025663 PCI: 00:0d.1: enabled 0
619 17:56:45.029100 PCI: 00:0d.2: enabled 0
620 17:56:45.029182 PCI: 00:0d.3: enabled 0
621 17:56:45.032286 PCI: 00:0e.0: enabled 0
622 17:56:45.035885 PCI: 00:10.2: enabled 1
623 17:56:45.039181 PCI: 00:10.6: enabled 0
624 17:56:45.039289 PCI: 00:10.7: enabled 0
625 17:56:45.042109 PCI: 00:12.0: enabled 0
626 17:56:45.045689 PCI: 00:12.6: enabled 0
627 17:56:45.048676 PCI: 00:13.0: enabled 0
628 17:56:45.048784 PCI: 00:14.0: enabled 1
629 17:56:45.052240 PCI: 00:14.1: enabled 0
630 17:56:45.055495 PCI: 00:14.2: enabled 1
631 17:56:45.058726 PCI: 00:14.3: enabled 1
632 17:56:45.058863 PCI: 00:15.0: enabled 1
633 17:56:45.062015 PCI: 00:15.1: enabled 1
634 17:56:45.065735 PCI: 00:15.2: enabled 1
635 17:56:45.068719 PCI: 00:15.3: enabled 1
636 17:56:45.068829 PCI: 00:16.0: enabled 1
637 17:56:45.072267 PCI: 00:16.1: enabled 0
638 17:56:45.074925 PCI: 00:16.2: enabled 0
639 17:56:45.078706 PCI: 00:16.3: enabled 0
640 17:56:45.078812 PCI: 00:16.4: enabled 0
641 17:56:45.081965 PCI: 00:16.5: enabled 0
642 17:56:45.085334 PCI: 00:17.0: enabled 1
643 17:56:45.088263 PCI: 00:19.0: enabled 0
644 17:56:45.088388 PCI: 00:19.1: enabled 1
645 17:56:45.091660 PCI: 00:19.2: enabled 0
646 17:56:45.094929 PCI: 00:1c.0: enabled 1
647 17:56:45.098086 PCI: 00:1c.1: enabled 0
648 17:56:45.098191 PCI: 00:1c.2: enabled 0
649 17:56:45.101331 PCI: 00:1c.3: enabled 0
650 17:56:45.104707 PCI: 00:1c.4: enabled 0
651 17:56:45.108191 PCI: 00:1c.5: enabled 0
652 17:56:45.108293 PCI: 00:1c.6: enabled 1
653 17:56:45.111308 PCI: 00:1c.7: enabled 0
654 17:56:45.114612 PCI: 00:1d.0: enabled 1
655 17:56:45.118104 PCI: 00:1d.1: enabled 0
656 17:56:45.118206 PCI: 00:1d.2: enabled 1
657 17:56:45.121396 PCI: 00:1d.3: enabled 0
658 17:56:45.124522 PCI: 00:1e.0: enabled 1
659 17:56:45.124617 PCI: 00:1e.1: enabled 0
660 17:56:45.127918 PCI: 00:1e.2: enabled 1
661 17:56:45.131327 PCI: 00:1e.3: enabled 1
662 17:56:45.134321 PCI: 00:1f.0: enabled 1
663 17:56:45.134420 PCI: 00:1f.1: enabled 0
664 17:56:45.137842 PCI: 00:1f.2: enabled 1
665 17:56:45.141027 PCI: 00:1f.3: enabled 1
666 17:56:45.144426 PCI: 00:1f.4: enabled 0
667 17:56:45.144503 PCI: 00:1f.5: enabled 1
668 17:56:45.147397 PCI: 00:1f.6: enabled 0
669 17:56:45.150613 PCI: 00:1f.7: enabled 0
670 17:56:45.154061 APIC: 00: enabled 1
671 17:56:45.154155 GENERIC: 0.0: enabled 1
672 17:56:45.157678 GENERIC: 0.0: enabled 1
673 17:56:45.160573 GENERIC: 1.0: enabled 1
674 17:56:45.160669 GENERIC: 0.0: enabled 1
675 17:56:45.164126 GENERIC: 1.0: enabled 1
676 17:56:45.167184 USB0 port 0: enabled 1
677 17:56:45.170470 GENERIC: 0.0: enabled 1
678 17:56:45.170567 USB0 port 0: enabled 1
679 17:56:45.174280 GENERIC: 0.0: enabled 1
680 17:56:45.177056 I2C: 00:1a: enabled 1
681 17:56:45.177127 I2C: 00:31: enabled 1
682 17:56:45.180751 I2C: 00:32: enabled 1
683 17:56:45.183933 I2C: 00:10: enabled 1
684 17:56:45.187112 I2C: 00:15: enabled 1
685 17:56:45.187226 GENERIC: 0.0: enabled 0
686 17:56:45.190241 GENERIC: 1.0: enabled 0
687 17:56:45.193546 GENERIC: 0.0: enabled 1
688 17:56:45.193647 SPI: 00: enabled 1
689 17:56:45.196682 SPI: 00: enabled 1
690 17:56:45.200371 PNP: 0c09.0: enabled 1
691 17:56:45.200455 GENERIC: 0.0: enabled 1
692 17:56:45.203604 USB3 port 0: enabled 1
693 17:56:45.207012 USB3 port 1: enabled 1
694 17:56:45.210068 USB3 port 2: enabled 0
695 17:56:45.210172 USB3 port 3: enabled 0
696 17:56:45.213493 USB2 port 0: enabled 0
697 17:56:45.217056 USB2 port 1: enabled 1
698 17:56:45.217163 USB2 port 2: enabled 1
699 17:56:45.219691 USB2 port 3: enabled 0
700 17:56:45.222943 USB2 port 4: enabled 1
701 17:56:45.226611 USB2 port 5: enabled 0
702 17:56:45.226706 USB2 port 6: enabled 0
703 17:56:45.229695 USB2 port 7: enabled 0
704 17:56:45.232796 USB2 port 8: enabled 0
705 17:56:45.232895 USB2 port 9: enabled 0
706 17:56:45.236075 USB3 port 0: enabled 0
707 17:56:45.239883 USB3 port 1: enabled 1
708 17:56:45.242705 USB3 port 2: enabled 0
709 17:56:45.242803 USB3 port 3: enabled 0
710 17:56:45.246279 GENERIC: 0.0: enabled 1
711 17:56:45.249507 GENERIC: 1.0: enabled 1
712 17:56:45.249600 APIC: 01: enabled 1
713 17:56:45.252876 APIC: 02: enabled 1
714 17:56:45.255951 APIC: 05: enabled 1
715 17:56:45.256045 APIC: 07: enabled 1
716 17:56:45.259586 APIC: 06: enabled 1
717 17:56:45.262672 APIC: 03: enabled 1
718 17:56:45.262768 APIC: 04: enabled 1
719 17:56:45.266016 Compare with tree...
720 17:56:45.266110 Root Device: enabled 1
721 17:56:45.269669 DOMAIN: 0000: enabled 1
722 17:56:45.272863 PCI: 00:00.0: enabled 1
723 17:56:45.275668 PCI: 00:02.0: enabled 1
724 17:56:45.279265 PCI: 00:04.0: enabled 1
725 17:56:45.282293 GENERIC: 0.0: enabled 1
726 17:56:45.282389 PCI: 00:05.0: enabled 1
727 17:56:45.285830 PCI: 00:06.0: enabled 0
728 17:56:45.288803 PCI: 00:07.0: enabled 0
729 17:56:45.292192 GENERIC: 0.0: enabled 1
730 17:56:45.295444 PCI: 00:07.1: enabled 0
731 17:56:45.295546 GENERIC: 1.0: enabled 1
732 17:56:45.298877 PCI: 00:07.2: enabled 0
733 17:56:45.301815 GENERIC: 0.0: enabled 1
734 17:56:45.305266 PCI: 00:07.3: enabled 0
735 17:56:45.308584 GENERIC: 1.0: enabled 1
736 17:56:45.308681 PCI: 00:08.0: enabled 1
737 17:56:45.311851 PCI: 00:09.0: enabled 0
738 17:56:45.315109 PCI: 00:0a.0: enabled 0
739 17:56:45.318351 PCI: 00:0d.0: enabled 1
740 17:56:45.322089 USB0 port 0: enabled 1
741 17:56:45.322190 USB3 port 0: enabled 1
742 17:56:45.325240 USB3 port 1: enabled 1
743 17:56:45.328725 USB3 port 2: enabled 0
744 17:56:45.331619 USB3 port 3: enabled 0
745 17:56:45.335184 PCI: 00:0d.1: enabled 0
746 17:56:45.338091 PCI: 00:0d.2: enabled 0
747 17:56:45.338188 GENERIC: 0.0: enabled 1
748 17:56:45.341502 PCI: 00:0d.3: enabled 0
749 17:56:45.344809 PCI: 00:0e.0: enabled 0
750 17:56:45.348067 PCI: 00:10.2: enabled 1
751 17:56:45.351756 PCI: 00:10.6: enabled 0
752 17:56:45.351841 PCI: 00:10.7: enabled 0
753 17:56:45.354698 PCI: 00:12.0: enabled 0
754 17:56:45.358445 PCI: 00:12.6: enabled 0
755 17:56:45.361145 PCI: 00:13.0: enabled 0
756 17:56:45.364970 PCI: 00:14.0: enabled 1
757 17:56:45.365039 USB0 port 0: enabled 1
758 17:56:45.367889 USB2 port 0: enabled 0
759 17:56:45.371022 USB2 port 1: enabled 1
760 17:56:45.374260 USB2 port 2: enabled 1
761 17:56:45.378030 USB2 port 3: enabled 0
762 17:56:45.380673 USB2 port 4: enabled 1
763 17:56:45.380767 USB2 port 5: enabled 0
764 17:56:45.384198 USB2 port 6: enabled 0
765 17:56:45.387995 USB2 port 7: enabled 0
766 17:56:45.390726 USB2 port 8: enabled 0
767 17:56:45.394420 USB2 port 9: enabled 0
768 17:56:45.397174 USB3 port 0: enabled 0
769 17:56:45.397270 USB3 port 1: enabled 1
770 17:56:45.400629 USB3 port 2: enabled 0
771 17:56:45.403846 USB3 port 3: enabled 0
772 17:56:45.407448 PCI: 00:14.1: enabled 0
773 17:56:45.410917 PCI: 00:14.2: enabled 1
774 17:56:45.411017 PCI: 00:14.3: enabled 1
775 17:56:45.413918 GENERIC: 0.0: enabled 1
776 17:56:45.417313 PCI: 00:15.0: enabled 1
777 17:56:45.420626 I2C: 00:1a: enabled 1
778 17:56:45.423945 I2C: 00:31: enabled 1
779 17:56:45.424015 I2C: 00:32: enabled 1
780 17:56:45.427208 PCI: 00:15.1: enabled 1
781 17:56:45.430068 I2C: 00:10: enabled 1
782 17:56:45.433422 PCI: 00:15.2: enabled 1
783 17:56:45.436939 PCI: 00:15.3: enabled 1
784 17:56:45.437037 PCI: 00:16.0: enabled 1
785 17:56:45.440452 PCI: 00:16.1: enabled 0
786 17:56:45.443413 PCI: 00:16.2: enabled 0
787 17:56:45.446928 PCI: 00:16.3: enabled 0
788 17:56:45.449801 PCI: 00:16.4: enabled 0
789 17:56:45.449898 PCI: 00:16.5: enabled 0
790 17:56:45.453088 PCI: 00:17.0: enabled 1
791 17:56:45.457043 PCI: 00:19.0: enabled 0
792 17:56:45.460213 PCI: 00:19.1: enabled 1
793 17:56:45.508920 I2C: 00:15: enabled 1
794 17:56:45.509047 PCI: 00:19.2: enabled 0
795 17:56:45.509123 PCI: 00:1d.0: enabled 1
796 17:56:45.509401 GENERIC: 0.0: enabled 1
797 17:56:45.509468 PCI: 00:1e.0: enabled 1
798 17:56:45.509530 PCI: 00:1e.1: enabled 0
799 17:56:45.509589 PCI: 00:1e.2: enabled 1
800 17:56:45.509645 SPI: 00: enabled 1
801 17:56:45.509701 PCI: 00:1e.3: enabled 1
802 17:56:45.509758 SPI: 00: enabled 1
803 17:56:45.509998 PCI: 00:1f.0: enabled 1
804 17:56:45.510057 PNP: 0c09.0: enabled 1
805 17:56:45.510467 PCI: 00:1f.1: enabled 0
806 17:56:45.510557 PCI: 00:1f.2: enabled 1
807 17:56:45.510641 GENERIC: 0.0: enabled 1
808 17:56:45.511238 GENERIC: 0.0: enabled 1
809 17:56:45.511344 GENERIC: 1.0: enabled 1
810 17:56:45.511644 PCI: 00:1f.3: enabled 1
811 17:56:45.511738 PCI: 00:1f.4: enabled 0
812 17:56:45.513756 PCI: 00:1f.5: enabled 1
813 17:56:45.513846 PCI: 00:1f.6: enabled 0
814 17:56:45.517717 PCI: 00:1f.7: enabled 0
815 17:56:45.520605 CPU_CLUSTER: 0: enabled 1
816 17:56:45.520704 APIC: 00: enabled 1
817 17:56:45.523984 APIC: 01: enabled 1
818 17:56:45.527288 APIC: 02: enabled 1
819 17:56:45.530622 APIC: 05: enabled 1
820 17:56:45.530717 APIC: 07: enabled 1
821 17:56:45.533897 APIC: 06: enabled 1
822 17:56:45.537153 APIC: 03: enabled 1
823 17:56:45.537252 APIC: 04: enabled 1
824 17:56:45.541085 Root Device scanning...
825 17:56:45.544264 scan_static_bus for Root Device
826 17:56:45.548013 DOMAIN: 0000 enabled
827 17:56:45.550869 CPU_CLUSTER: 0 enabled
828 17:56:45.550963 DOMAIN: 0000 scanning...
829 17:56:45.554239 PCI: pci_scan_bus for bus 00
830 17:56:45.557833 PCI: 00:00.0 [8086/0000] ops
831 17:56:45.561288 PCI: 00:00.0 [8086/9a12] enabled
832 17:56:45.564140 PCI: 00:02.0 [8086/0000] bus ops
833 17:56:45.567641 PCI: 00:02.0 [8086/9a40] enabled
834 17:56:45.570445 PCI: 00:04.0 [8086/0000] bus ops
835 17:56:45.573968 PCI: 00:04.0 [8086/9a03] enabled
836 17:56:45.577029 PCI: 00:05.0 [8086/9a19] enabled
837 17:56:45.580651 PCI: 00:07.0 [0000/0000] hidden
838 17:56:45.584170 PCI: 00:08.0 [8086/9a11] enabled
839 17:56:45.587338 PCI: 00:0a.0 [8086/9a0d] disabled
840 17:56:45.590424 PCI: 00:0d.0 [8086/0000] bus ops
841 17:56:45.594010 PCI: 00:0d.0 [8086/9a13] enabled
842 17:56:45.596724 PCI: 00:14.0 [8086/0000] bus ops
843 17:56:45.603768 PCI: 00:14.0 [8086/a0ed] enabled
844 17:56:45.606784 PCI: 00:14.2 [8086/a0ef] enabled
845 17:56:45.609866 PCI: 00:14.3 [8086/0000] bus ops
846 17:56:45.613254 PCI: 00:14.3 [8086/a0f0] enabled
847 17:56:45.616893 PCI: 00:15.0 [8086/0000] bus ops
848 17:56:45.620272 PCI: 00:15.0 [8086/a0e8] enabled
849 17:56:45.623330 PCI: 00:15.1 [8086/0000] bus ops
850 17:56:45.626506 PCI: 00:15.1 [8086/a0e9] enabled
851 17:56:45.629505 PCI: 00:15.2 [8086/0000] bus ops
852 17:56:45.633086 PCI: 00:15.2 [8086/a0ea] enabled
853 17:56:45.636002 PCI: 00:15.3 [8086/0000] bus ops
854 17:56:45.639626 PCI: 00:15.3 [8086/a0eb] enabled
855 17:56:45.642618 PCI: 00:16.0 [8086/0000] ops
856 17:56:45.646069 PCI: 00:16.0 [8086/a0e0] enabled
857 17:56:45.649393 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 17:56:45.652497 PCI: 00:19.0 [8086/0000] bus ops
859 17:56:45.655830 PCI: 00:19.0 [8086/a0c5] disabled
860 17:56:45.659556 PCI: 00:19.1 [8086/0000] bus ops
861 17:56:45.662728 PCI: 00:19.1 [8086/a0c6] enabled
862 17:56:45.665643 PCI: 00:1d.0 [8086/0000] bus ops
863 17:56:45.668991 PCI: 00:1d.0 [8086/a0b0] enabled
864 17:56:45.672625 PCI: 00:1e.0 [8086/0000] ops
865 17:56:45.675549 PCI: 00:1e.0 [8086/a0a8] enabled
866 17:56:45.679240 PCI: 00:1e.2 [8086/0000] bus ops
867 17:56:45.681962 PCI: 00:1e.2 [8086/a0aa] enabled
868 17:56:45.685734 PCI: 00:1e.3 [8086/0000] bus ops
869 17:56:45.689106 PCI: 00:1e.3 [8086/a0ab] enabled
870 17:56:45.691969 PCI: 00:1f.0 [8086/0000] bus ops
871 17:56:45.695140 PCI: 00:1f.0 [8086/a087] enabled
872 17:56:45.698803 RTC Init
873 17:56:45.702335 Set power on after power failure.
874 17:56:45.702433 Disabling Deep S3
875 17:56:45.705249 Disabling Deep S3
876 17:56:45.708527 Disabling Deep S4
877 17:56:45.708623 Disabling Deep S4
878 17:56:45.711982 Disabling Deep S5
879 17:56:45.712075 Disabling Deep S5
880 17:56:45.714891 PCI: 00:1f.2 [0000/0000] hidden
881 17:56:45.718502 PCI: 00:1f.3 [8086/0000] bus ops
882 17:56:45.721432 PCI: 00:1f.3 [8086/a0c8] enabled
883 17:56:45.725212 PCI: 00:1f.5 [8086/0000] bus ops
884 17:56:45.728189 PCI: 00:1f.5 [8086/a0a4] enabled
885 17:56:45.731533 PCI: Leftover static devices:
886 17:56:45.734821 PCI: 00:10.2
887 17:56:45.734905 PCI: 00:10.6
888 17:56:45.738348 PCI: 00:10.7
889 17:56:45.738453 PCI: 00:06.0
890 17:56:45.738545 PCI: 00:07.1
891 17:56:45.741391 PCI: 00:07.2
892 17:56:45.741505 PCI: 00:07.3
893 17:56:45.744467 PCI: 00:09.0
894 17:56:45.744579 PCI: 00:0d.1
895 17:56:45.744671 PCI: 00:0d.2
896 17:56:45.747793 PCI: 00:0d.3
897 17:56:45.747866 PCI: 00:0e.0
898 17:56:45.751071 PCI: 00:12.0
899 17:56:45.751175 PCI: 00:12.6
900 17:56:45.754298 PCI: 00:13.0
901 17:56:45.754394 PCI: 00:14.1
902 17:56:45.754470 PCI: 00:16.1
903 17:56:45.757748 PCI: 00:16.2
904 17:56:45.757840 PCI: 00:16.3
905 17:56:45.760947 PCI: 00:16.4
906 17:56:45.761042 PCI: 00:16.5
907 17:56:45.761110 PCI: 00:17.0
908 17:56:45.764722 PCI: 00:19.2
909 17:56:45.764822 PCI: 00:1e.1
910 17:56:45.768059 PCI: 00:1f.1
911 17:56:45.768134 PCI: 00:1f.4
912 17:56:45.770741 PCI: 00:1f.6
913 17:56:45.770833 PCI: 00:1f.7
914 17:56:45.773968 PCI: Check your devicetree.cb.
915 17:56:45.777718 PCI: 00:02.0 scanning...
916 17:56:45.780948 scan_generic_bus for PCI: 00:02.0
917 17:56:45.783927 scan_generic_bus for PCI: 00:02.0 done
918 17:56:45.787775 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 17:56:45.790395 PCI: 00:04.0 scanning...
920 17:56:45.794011 scan_generic_bus for PCI: 00:04.0
921 17:56:45.797283 GENERIC: 0.0 enabled
922 17:56:45.803935 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 17:56:45.806738 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 17:56:45.810366 PCI: 00:0d.0 scanning...
925 17:56:45.813368 scan_static_bus for PCI: 00:0d.0
926 17:56:45.816854 USB0 port 0 enabled
927 17:56:45.819817 USB0 port 0 scanning...
928 17:56:45.823397 scan_static_bus for USB0 port 0
929 17:56:45.823506 USB3 port 0 enabled
930 17:56:45.826397 USB3 port 1 enabled
931 17:56:45.830047 USB3 port 2 disabled
932 17:56:45.830128 USB3 port 3 disabled
933 17:56:45.833062 USB3 port 0 scanning...
934 17:56:45.836739 scan_static_bus for USB3 port 0
935 17:56:45.839660 scan_static_bus for USB3 port 0 done
936 17:56:45.842848 scan_bus: bus USB3 port 0 finished in 6 msecs
937 17:56:45.846153 USB3 port 1 scanning...
938 17:56:45.849850 scan_static_bus for USB3 port 1
939 17:56:45.852756 scan_static_bus for USB3 port 1 done
940 17:56:45.859289 scan_bus: bus USB3 port 1 finished in 6 msecs
941 17:56:45.862883 scan_static_bus for USB0 port 0 done
942 17:56:45.866267 scan_bus: bus USB0 port 0 finished in 43 msecs
943 17:56:45.872844 scan_static_bus for PCI: 00:0d.0 done
944 17:56:45.875951 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 17:56:45.879054 PCI: 00:14.0 scanning...
946 17:56:45.882277 scan_static_bus for PCI: 00:14.0
947 17:56:45.882379 USB0 port 0 enabled
948 17:56:45.885788 USB0 port 0 scanning...
949 17:56:45.888753 scan_static_bus for USB0 port 0
950 17:56:45.892453 USB2 port 0 disabled
951 17:56:45.895659 USB2 port 1 enabled
952 17:56:45.895798 USB2 port 2 enabled
953 17:56:45.898601 USB2 port 3 disabled
954 17:56:45.898723 USB2 port 4 enabled
955 17:56:45.902055 USB2 port 5 disabled
956 17:56:45.905191 USB2 port 6 disabled
957 17:56:45.905294 USB2 port 7 disabled
958 17:56:45.908774 USB2 port 8 disabled
959 17:56:45.912362 USB2 port 9 disabled
960 17:56:45.912465 USB3 port 0 disabled
961 17:56:45.915428 USB3 port 1 enabled
962 17:56:45.918727 USB3 port 2 disabled
963 17:56:45.918844 USB3 port 3 disabled
964 17:56:45.921994 USB2 port 1 scanning...
965 17:56:45.925442 scan_static_bus for USB2 port 1
966 17:56:45.928514 scan_static_bus for USB2 port 1 done
967 17:56:45.935120 scan_bus: bus USB2 port 1 finished in 6 msecs
968 17:56:45.935200 USB2 port 2 scanning...
969 17:56:45.938008 scan_static_bus for USB2 port 2
970 17:56:45.944612 scan_static_bus for USB2 port 2 done
971 17:56:45.948186 scan_bus: bus USB2 port 2 finished in 6 msecs
972 17:56:45.951105 USB2 port 4 scanning...
973 17:56:45.954385 scan_static_bus for USB2 port 4
974 17:56:45.958404 scan_static_bus for USB2 port 4 done
975 17:56:45.961075 scan_bus: bus USB2 port 4 finished in 6 msecs
976 17:56:45.964698 USB3 port 1 scanning...
977 17:56:45.967697 scan_static_bus for USB3 port 1
978 17:56:45.971082 scan_static_bus for USB3 port 1 done
979 17:56:45.977876 scan_bus: bus USB3 port 1 finished in 6 msecs
980 17:56:45.980827 scan_static_bus for USB0 port 0 done
981 17:56:45.984447 scan_bus: bus USB0 port 0 finished in 93 msecs
982 17:56:45.987339 scan_static_bus for PCI: 00:14.0 done
983 17:56:45.994204 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 17:56:45.997008 PCI: 00:14.3 scanning...
985 17:56:46.000345 scan_static_bus for PCI: 00:14.3
986 17:56:46.000445 GENERIC: 0.0 enabled
987 17:56:46.006916 scan_static_bus for PCI: 00:14.3 done
988 17:56:46.010532 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 17:56:46.013482 PCI: 00:15.0 scanning...
990 17:56:46.017302 scan_static_bus for PCI: 00:15.0
991 17:56:46.017375 I2C: 00:1a enabled
992 17:56:46.020082 I2C: 00:31 enabled
993 17:56:46.023220 I2C: 00:32 enabled
994 17:56:46.026712 scan_static_bus for PCI: 00:15.0 done
995 17:56:46.030460 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
996 17:56:46.033227 PCI: 00:15.1 scanning...
997 17:56:46.036805 scan_static_bus for PCI: 00:15.1
998 17:56:46.039761 I2C: 00:10 enabled
999 17:56:46.043346 scan_static_bus for PCI: 00:15.1 done
1000 17:56:46.046371 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 17:56:46.049904 PCI: 00:15.2 scanning...
1002 17:56:46.052861 scan_static_bus for PCI: 00:15.2
1003 17:56:46.057085 scan_static_bus for PCI: 00:15.2 done
1004 17:56:46.063121 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 17:56:46.063225 PCI: 00:15.3 scanning...
1006 17:56:46.066489 scan_static_bus for PCI: 00:15.3
1007 17:56:46.073252 scan_static_bus for PCI: 00:15.3 done
1008 17:56:46.076421 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 17:56:46.079806 PCI: 00:19.1 scanning...
1010 17:56:46.083062 scan_static_bus for PCI: 00:19.1
1011 17:56:46.083162 I2C: 00:15 enabled
1012 17:56:46.089778 scan_static_bus for PCI: 00:19.1 done
1013 17:56:46.092659 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 17:56:46.096168 PCI: 00:1d.0 scanning...
1015 17:56:46.099264 do_pci_scan_bridge for PCI: 00:1d.0
1016 17:56:46.102527 PCI: pci_scan_bus for bus 01
1017 17:56:46.105898 PCI: 01:00.0 [1c5c/174a] enabled
1018 17:56:46.109063 GENERIC: 0.0 enabled
1019 17:56:46.112761 Enabling Common Clock Configuration
1020 17:56:46.116133 L1 Sub-State supported from root port 29
1021 17:56:46.119283 L1 Sub-State Support = 0xf
1022 17:56:46.122456 CommonModeRestoreTime = 0x28
1023 17:56:46.125532 Power On Value = 0x16, Power On Scale = 0x0
1024 17:56:46.128826 ASPM: Enabled L1
1025 17:56:46.132515 PCIe: Max_Payload_Size adjusted to 128
1026 17:56:46.135404 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 17:56:46.138535 PCI: 00:1e.2 scanning...
1028 17:56:46.142060 scan_generic_bus for PCI: 00:1e.2
1029 17:56:46.145624 SPI: 00 enabled
1030 17:56:46.152266 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 17:56:46.155093 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 17:56:46.158754 PCI: 00:1e.3 scanning...
1033 17:56:46.161981 scan_generic_bus for PCI: 00:1e.3
1034 17:56:46.162087 SPI: 00 enabled
1035 17:56:46.168461 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 17:56:46.174766 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 17:56:46.174942 PCI: 00:1f.0 scanning...
1038 17:56:46.181601 scan_static_bus for PCI: 00:1f.0
1039 17:56:46.181708 PNP: 0c09.0 enabled
1040 17:56:46.185017 PNP: 0c09.0 scanning...
1041 17:56:46.188361 scan_static_bus for PNP: 0c09.0
1042 17:56:46.191568 scan_static_bus for PNP: 0c09.0 done
1043 17:56:46.194894 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 17:56:46.201292 scan_static_bus for PCI: 00:1f.0 done
1045 17:56:46.204921 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 17:56:46.208180 PCI: 00:1f.2 scanning...
1047 17:56:46.211329 scan_static_bus for PCI: 00:1f.2
1048 17:56:46.214588 GENERIC: 0.0 enabled
1049 17:56:46.214691 GENERIC: 0.0 scanning...
1050 17:56:46.217954 scan_static_bus for GENERIC: 0.0
1051 17:56:46.221251 GENERIC: 0.0 enabled
1052 17:56:46.224329 GENERIC: 1.0 enabled
1053 17:56:46.227656 scan_static_bus for GENERIC: 0.0 done
1054 17:56:46.230890 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 17:56:46.237439 scan_static_bus for PCI: 00:1f.2 done
1056 17:56:46.241038 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 17:56:46.243942 PCI: 00:1f.3 scanning...
1058 17:56:46.247635 scan_static_bus for PCI: 00:1f.3
1059 17:56:46.250983 scan_static_bus for PCI: 00:1f.3 done
1060 17:56:46.254311 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 17:56:46.257013 PCI: 00:1f.5 scanning...
1062 17:56:46.260479 scan_generic_bus for PCI: 00:1f.5
1063 17:56:46.267005 scan_generic_bus for PCI: 00:1f.5 done
1064 17:56:46.270643 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 17:56:46.273561 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 17:56:46.280363 scan_static_bus for Root Device done
1067 17:56:46.283274 scan_bus: bus Root Device finished in 737 msecs
1068 17:56:46.283380 done
1069 17:56:46.290252 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 17:56:46.293550 Chrome EC: UHEPI supported
1071 17:56:46.299642 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 17:56:46.306863 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 17:56:46.309714 SPI flash protection: WPSW=1 SRP0=0
1074 17:56:46.313294 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 17:56:46.319489 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 17:56:46.323463 found VGA at PCI: 00:02.0
1077 17:56:46.326134 Setting up VGA for PCI: 00:02.0
1078 17:56:46.333009 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 17:56:46.336209 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 17:56:46.339657 Allocating resources...
1081 17:56:46.339788 Reading resources...
1082 17:56:46.346188 Root Device read_resources bus 0 link: 0
1083 17:56:46.349464 DOMAIN: 0000 read_resources bus 0 link: 0
1084 17:56:46.355774 PCI: 00:04.0 read_resources bus 1 link: 0
1085 17:56:46.359243 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 17:56:46.365943 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 17:56:46.369061 USB0 port 0 read_resources bus 0 link: 0
1088 17:56:46.375575 USB0 port 0 read_resources bus 0 link: 0 done
1089 17:56:46.378676 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 17:56:46.382190 PCI: 00:14.0 read_resources bus 0 link: 0
1091 17:56:46.388890 USB0 port 0 read_resources bus 0 link: 0
1092 17:56:46.392399 USB0 port 0 read_resources bus 0 link: 0 done
1093 17:56:46.398823 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 17:56:46.402259 PCI: 00:14.3 read_resources bus 0 link: 0
1095 17:56:46.409102 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 17:56:46.412242 PCI: 00:15.0 read_resources bus 0 link: 0
1097 17:56:46.419272 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 17:56:46.422139 PCI: 00:15.1 read_resources bus 0 link: 0
1099 17:56:46.428770 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 17:56:46.434942 PCI: 00:19.1 read_resources bus 0 link: 0
1101 17:56:46.438373 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 17:56:46.445259 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 17:56:46.448547 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 17:56:46.455032 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 17:56:46.458501 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 17:56:46.464518 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 17:56:46.468225 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 17:56:46.474575 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 17:56:46.477522 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 17:56:46.484100 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 17:56:46.487807 GENERIC: 0.0 read_resources bus 0 link: 0
1112 17:56:46.493936 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 17:56:46.497284 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 17:56:46.504322 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 17:56:46.507084 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 17:56:46.513948 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 17:56:46.516982 Root Device read_resources bus 0 link: 0 done
1118 17:56:46.520195 Done reading resources.
1119 17:56:46.526761 Show resources in subtree (Root Device)...After reading.
1120 17:56:46.530667 Root Device child on link 0 DOMAIN: 0000
1121 17:56:46.533296 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 17:56:46.543274 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 17:56:46.553402 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 17:56:46.556748 PCI: 00:00.0
1125 17:56:46.566665 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 17:56:46.573168 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 17:56:46.582773 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 17:56:46.593107 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 17:56:46.602803 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 17:56:46.612383 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 17:56:46.622625 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 17:56:46.631970 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 17:56:46.638919 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 17:56:46.648481 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 17:56:46.658782 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 17:56:46.668331 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 17:56:46.678529 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 17:56:46.684794 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 17:56:46.694660 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 17:56:46.704270 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 17:56:46.714680 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 17:56:46.724078 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 17:56:46.733939 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 17:56:46.744092 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 17:56:46.744177 PCI: 00:02.0
1146 17:56:46.756929 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 17:56:46.766644 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 17:56:46.773459 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 17:56:46.780077 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 17:56:46.789775 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 17:56:46.789880 GENERIC: 0.0
1152 17:56:46.793245 PCI: 00:05.0
1153 17:56:46.802664 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 17:56:46.806334 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 17:56:46.809777 GENERIC: 0.0
1156 17:56:46.809884 PCI: 00:08.0
1157 17:56:46.819218 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 17:56:46.822619 PCI: 00:0a.0
1159 17:56:46.825970 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 17:56:46.835652 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 17:56:46.842626 USB0 port 0 child on link 0 USB3 port 0
1162 17:56:46.842729 USB3 port 0
1163 17:56:46.845509 USB3 port 1
1164 17:56:46.845606 USB3 port 2
1165 17:56:46.849015 USB3 port 3
1166 17:56:46.852180 PCI: 00:14.0 child on link 0 USB0 port 0
1167 17:56:46.862071 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 17:56:46.865530 USB0 port 0 child on link 0 USB2 port 0
1169 17:56:46.869282 USB2 port 0
1170 17:56:46.871837 USB2 port 1
1171 17:56:46.871908 USB2 port 2
1172 17:56:46.875457 USB2 port 3
1173 17:56:46.875558 USB2 port 4
1174 17:56:46.878768 USB2 port 5
1175 17:56:46.878849 USB2 port 6
1176 17:56:46.881599 USB2 port 7
1177 17:56:46.881693 USB2 port 8
1178 17:56:46.884860 USB2 port 9
1179 17:56:46.884960 USB3 port 0
1180 17:56:46.888664 USB3 port 1
1181 17:56:46.888776 USB3 port 2
1182 17:56:46.891642 USB3 port 3
1183 17:56:46.891774 PCI: 00:14.2
1184 17:56:46.905070 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 17:56:46.914829 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 17:56:46.917871 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 17:56:46.927906 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 17:56:46.927990 GENERIC: 0.0
1189 17:56:46.934695 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 17:56:46.944629 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 17:56:46.944726 I2C: 00:1a
1192 17:56:46.947677 I2C: 00:31
1193 17:56:46.947814 I2C: 00:32
1194 17:56:46.954410 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 17:56:46.964032 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 17:56:46.964133 I2C: 00:10
1197 17:56:46.967672 PCI: 00:15.2
1198 17:56:46.977325 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 17:56:46.977426 PCI: 00:15.3
1200 17:56:46.987031 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 17:56:46.990214 PCI: 00:16.0
1202 17:56:47.000501 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 17:56:47.000607 PCI: 00:19.0
1204 17:56:47.006937 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 17:56:47.016426 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 17:56:47.016504 I2C: 00:15
1207 17:56:47.019983 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 17:56:47.029600 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 17:56:47.039467 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 17:56:47.049166 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 17:56:47.049270 GENERIC: 0.0
1212 17:56:47.052682 PCI: 01:00.0
1213 17:56:47.062298 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 17:56:47.072134 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 17:56:47.082230 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 17:56:47.082315 PCI: 00:1e.0
1217 17:56:47.091924 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 17:56:47.098624 PCI: 00:1e.2 child on link 0 SPI: 00
1219 17:56:47.108540 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 17:56:47.108649 SPI: 00
1221 17:56:47.111566 PCI: 00:1e.3 child on link 0 SPI: 00
1222 17:56:47.121591 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 17:56:47.124560 SPI: 00
1224 17:56:47.128297 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 17:56:47.138516 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 17:56:47.138620 PNP: 0c09.0
1227 17:56:47.147630 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 17:56:47.151284 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 17:56:47.161100 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 17:56:47.171051 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 17:56:47.174265 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 17:56:47.177369 GENERIC: 0.0
1233 17:56:47.177440 GENERIC: 1.0
1234 17:56:47.180973 PCI: 00:1f.3
1235 17:56:47.190480 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 17:56:47.200228 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 17:56:47.203716 PCI: 00:1f.5
1238 17:56:47.210544 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 17:56:47.216984 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 17:56:47.217091 APIC: 00
1241 17:56:47.217183 APIC: 01
1242 17:56:47.220212 APIC: 02
1243 17:56:47.220310 APIC: 05
1244 17:56:47.223455 APIC: 07
1245 17:56:47.223550 APIC: 06
1246 17:56:47.223636 APIC: 03
1247 17:56:47.226434 APIC: 04
1248 17:56:47.232847 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 17:56:47.239515 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 17:56:47.246006 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 17:56:47.252749 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 17:56:47.256221 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 17:56:47.259163 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 17:56:47.262493 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 17:56:47.272632 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 17:56:47.279190 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 17:56:47.285704 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 17:56:47.292022 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 17:56:47.298872 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 17:56:47.308493 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 17:56:47.315508 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 17:56:47.321816 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 17:56:47.325387 DOMAIN: 0000: Resource ranges:
1264 17:56:47.328379 * Base: 1000, Size: 800, Tag: 100
1265 17:56:47.331393 * Base: 1900, Size: e700, Tag: 100
1266 17:56:47.338554 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 17:56:47.344588 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 17:56:47.351413 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 17:56:47.357878 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 17:56:47.367845 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 17:56:47.374451 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 17:56:47.383896 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 17:56:47.390588 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 17:56:47.397550 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 17:56:47.407135 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 17:56:47.413850 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 17:56:47.420466 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 17:56:47.430264 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 17:56:47.436860 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 17:56:47.443359 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 17:56:47.453313 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 17:56:47.459596 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 17:56:47.466437 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 17:56:47.476144 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 17:56:47.482915 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 17:56:47.489198 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 17:56:47.499010 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 17:56:47.505678 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 17:56:47.512510 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 17:56:47.522191 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 17:56:47.525585 DOMAIN: 0000: Resource ranges:
1292 17:56:47.528693 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 17:56:47.532094 * Base: d0000000, Size: 28000000, Tag: 200
1294 17:56:47.538595 * Base: fa000000, Size: 1000000, Tag: 200
1295 17:56:47.541535 * Base: fb001000, Size: 2fff000, Tag: 200
1296 17:56:47.545102 * Base: fe010000, Size: 2e000, Tag: 200
1297 17:56:47.551909 * Base: fe03f000, Size: d41000, Tag: 200
1298 17:56:47.554746 * Base: fed88000, Size: 8000, Tag: 200
1299 17:56:47.558340 * Base: fed93000, Size: d000, Tag: 200
1300 17:56:47.561840 * Base: feda2000, Size: 1e000, Tag: 200
1301 17:56:47.568377 * Base: fede0000, Size: 1220000, Tag: 200
1302 17:56:47.571542 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 17:56:47.577759 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 17:56:47.584506 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 17:56:47.590788 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 17:56:47.597552 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 17:56:47.604526 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 17:56:47.610632 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 17:56:47.617270 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 17:56:47.623924 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 17:56:47.630418 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 17:56:47.637067 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 17:56:47.643300 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 17:56:47.650071 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 17:56:47.656575 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 17:56:47.664081 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 17:56:47.673344 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 17:56:47.679686 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 17:56:47.686630 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 17:56:47.693245 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 17:56:47.699835 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 17:56:47.706418 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 17:56:47.712693 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 17:56:47.719228 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 17:56:47.725534 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 17:56:47.732541 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 17:56:47.735383 PCI: 00:1d.0: Resource ranges:
1328 17:56:47.742193 * Base: 7fc00000, Size: 100000, Tag: 200
1329 17:56:47.748846 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 17:56:47.755335 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 17:56:47.761567 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 17:56:47.768423 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 17:56:47.775045 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 17:56:47.781341 Root Device assign_resources, bus 0 link: 0
1335 17:56:47.784768 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 17:56:47.794544 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 17:56:47.801427 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 17:56:47.811192 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 17:56:47.817759 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 17:56:47.824191 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 17:56:47.827638 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 17:56:47.837670 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 17:56:47.843838 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 17:56:47.853466 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 17:56:47.856873 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 17:56:47.860587 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 17:56:47.870477 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 17:56:47.873650 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 17:56:47.880016 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 17:56:47.886904 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 17:56:47.896720 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 17:56:47.903197 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 17:56:47.906162 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 17:56:47.912807 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 17:56:47.919948 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 17:56:47.926004 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 17:56:47.929685 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 17:56:47.939413 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 17:56:47.942675 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 17:56:47.949129 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 17:56:47.955241 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 17:56:47.965304 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 17:56:47.971900 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 17:56:47.981737 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 17:56:47.985205 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 17:56:47.988168 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 17:56:47.997998 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 17:56:48.008062 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 17:56:48.018284 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 17:56:48.021573 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 17:56:48.031072 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 17:56:48.037634 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 17:56:48.044216 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 17:56:48.051052 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 17:56:48.057501 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 17:56:48.064021 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 17:56:48.067222 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 17:56:48.077270 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 17:56:48.080646 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 17:56:48.083808 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 17:56:48.090212 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 17:56:48.093850 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 17:56:48.100228 LPC: Trying to open IO window from 800 size 1ff
1384 17:56:48.106714 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 17:56:48.116943 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 17:56:48.123423 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 17:56:48.129957 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 17:56:48.133259 Root Device assign_resources, bus 0 link: 0
1389 17:56:48.136447 Done setting resources.
1390 17:56:48.142833 Show resources in subtree (Root Device)...After assigning values.
1391 17:56:48.146532 Root Device child on link 0 DOMAIN: 0000
1392 17:56:48.149426 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 17:56:48.159538 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 17:56:48.169233 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 17:56:48.172368 PCI: 00:00.0
1396 17:56:48.182477 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 17:56:48.192245 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 17:56:48.202086 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 17:56:48.208653 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 17:56:48.218774 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 17:56:48.228617 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 17:56:48.238348 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 17:56:48.248459 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 17:56:48.258640 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 17:56:48.264925 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 17:56:48.274525 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 17:56:48.284501 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 17:56:48.293955 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 17:56:48.304273 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 17:56:48.314128 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 17:56:48.320521 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 17:56:48.330306 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 17:56:48.340393 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 17:56:48.349805 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 17:56:48.359900 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 17:56:48.363042 PCI: 00:02.0
1417 17:56:48.372975 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 17:56:48.382598 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 17:56:48.392930 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 17:56:48.396079 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 17:56:48.405675 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 17:56:48.409433 GENERIC: 0.0
1423 17:56:48.412201 PCI: 00:05.0
1424 17:56:48.422379 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 17:56:48.425979 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 17:56:48.428909 GENERIC: 0.0
1427 17:56:48.429008 PCI: 00:08.0
1428 17:56:48.438665 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 17:56:48.441938 PCI: 00:0a.0
1430 17:56:48.445251 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 17:56:48.455444 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 17:56:48.461706 USB0 port 0 child on link 0 USB3 port 0
1433 17:56:48.461811 USB3 port 0
1434 17:56:48.464999 USB3 port 1
1435 17:56:48.465105 USB3 port 2
1436 17:56:48.468467 USB3 port 3
1437 17:56:48.471929 PCI: 00:14.0 child on link 0 USB0 port 0
1438 17:56:48.481330 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 17:56:48.487904 USB0 port 0 child on link 0 USB2 port 0
1440 17:56:48.487992 USB2 port 0
1441 17:56:48.491527 USB2 port 1
1442 17:56:48.491631 USB2 port 2
1443 17:56:48.494332 USB2 port 3
1444 17:56:48.494433 USB2 port 4
1445 17:56:48.497822 USB2 port 5
1446 17:56:48.497925 USB2 port 6
1447 17:56:48.501246 USB2 port 7
1448 17:56:48.504696 USB2 port 8
1449 17:56:48.504799 USB2 port 9
1450 17:56:48.507845 USB3 port 0
1451 17:56:48.507945 USB3 port 1
1452 17:56:48.510820 USB3 port 2
1453 17:56:48.510917 USB3 port 3
1454 17:56:48.514328 PCI: 00:14.2
1455 17:56:48.523981 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 17:56:48.533900 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 17:56:48.537542 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 17:56:48.550151 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 17:56:48.550259 GENERIC: 0.0
1460 17:56:48.553722 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 17:56:48.566840 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 17:56:48.566947 I2C: 00:1a
1463 17:56:48.570067 I2C: 00:31
1464 17:56:48.570154 I2C: 00:32
1465 17:56:48.573387 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 17:56:48.583165 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 17:56:48.586770 I2C: 00:10
1468 17:56:48.586872 PCI: 00:15.2
1469 17:56:48.599482 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 17:56:48.599599 PCI: 00:15.3
1471 17:56:48.609767 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 17:56:48.613268 PCI: 00:16.0
1473 17:56:48.623054 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 17:56:48.623165 PCI: 00:19.0
1475 17:56:48.629712 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 17:56:48.638879 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 17:56:48.638996 I2C: 00:15
1478 17:56:48.645448 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 17:56:48.655594 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 17:56:48.665268 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 17:56:48.675395 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 17:56:48.678437 GENERIC: 0.0
1483 17:56:48.678534 PCI: 01:00.0
1484 17:56:48.691528 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 17:56:48.701606 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 17:56:48.711165 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 17:56:48.711270 PCI: 00:1e.0
1488 17:56:48.724339 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 17:56:48.728028 PCI: 00:1e.2 child on link 0 SPI: 00
1490 17:56:48.737504 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 17:56:48.741040 SPI: 00
1492 17:56:48.744671 PCI: 00:1e.3 child on link 0 SPI: 00
1493 17:56:48.753811 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 17:56:48.753915 SPI: 00
1495 17:56:48.760722 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 17:56:48.767142 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 17:56:48.770304 PNP: 0c09.0
1498 17:56:48.777147 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 17:56:48.783788 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 17:56:48.793390 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 17:56:48.799993 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 17:56:48.806494 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 17:56:48.806593 GENERIC: 0.0
1504 17:56:48.809799 GENERIC: 1.0
1505 17:56:48.809897 PCI: 00:1f.3
1506 17:56:48.822811 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 17:56:48.832755 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 17:56:48.832862 PCI: 00:1f.5
1509 17:56:48.843009 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 17:56:48.849585 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 17:56:48.849688 APIC: 00
1512 17:56:48.852558 APIC: 01
1513 17:56:48.852656 APIC: 02
1514 17:56:48.852745 APIC: 05
1515 17:56:48.856178 APIC: 07
1516 17:56:48.856271 APIC: 06
1517 17:56:48.856360 APIC: 03
1518 17:56:48.859462 APIC: 04
1519 17:56:48.862417 Done allocating resources.
1520 17:56:48.868838 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 17:56:48.872424 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 17:56:48.878901 Configure GPIOs for I2S audio on UP4.
1523 17:56:48.885634 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 17:56:48.885736 Enabling resources...
1525 17:56:48.892194 PCI: 00:00.0 subsystem <- 8086/9a12
1526 17:56:48.892295 PCI: 00:00.0 cmd <- 06
1527 17:56:48.895157 PCI: 00:02.0 subsystem <- 8086/9a40
1528 17:56:48.898707 PCI: 00:02.0 cmd <- 03
1529 17:56:48.901734 PCI: 00:04.0 subsystem <- 8086/9a03
1530 17:56:48.905309 PCI: 00:04.0 cmd <- 02
1531 17:56:48.908399 PCI: 00:05.0 subsystem <- 8086/9a19
1532 17:56:48.911680 PCI: 00:05.0 cmd <- 02
1533 17:56:48.915462 PCI: 00:08.0 subsystem <- 8086/9a11
1534 17:56:48.918666 PCI: 00:08.0 cmd <- 06
1535 17:56:48.921852 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 17:56:48.925031 PCI: 00:0d.0 cmd <- 02
1537 17:56:48.928318 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 17:56:48.931472 PCI: 00:14.0 cmd <- 02
1539 17:56:48.934598 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 17:56:48.937990 PCI: 00:14.2 cmd <- 02
1541 17:56:48.941128 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 17:56:48.941228 PCI: 00:14.3 cmd <- 02
1543 17:56:48.947963 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 17:56:48.948064 PCI: 00:15.0 cmd <- 02
1545 17:56:48.951335 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 17:56:48.954704 PCI: 00:15.1 cmd <- 02
1547 17:56:48.958001 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 17:56:48.961406 PCI: 00:15.2 cmd <- 02
1549 17:56:48.964601 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 17:56:48.967691 PCI: 00:15.3 cmd <- 02
1551 17:56:48.971435 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 17:56:48.974235 PCI: 00:16.0 cmd <- 02
1553 17:56:48.977745 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 17:56:48.980770 PCI: 00:19.1 cmd <- 02
1555 17:56:48.984283 PCI: 00:1d.0 bridge ctrl <- 0013
1556 17:56:48.987556 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 17:56:48.990907 PCI: 00:1d.0 cmd <- 06
1558 17:56:48.994381 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 17:56:48.997465 PCI: 00:1e.0 cmd <- 06
1560 17:56:49.000903 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 17:56:49.001007 PCI: 00:1e.2 cmd <- 06
1562 17:56:49.006952 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 17:56:49.007030 PCI: 00:1e.3 cmd <- 02
1564 17:56:49.010537 PCI: 00:1f.0 subsystem <- 8086/a087
1565 17:56:49.013498 PCI: 00:1f.0 cmd <- 407
1566 17:56:49.017016 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 17:56:49.020488 PCI: 00:1f.3 cmd <- 02
1568 17:56:49.023565 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 17:56:49.026645 PCI: 00:1f.5 cmd <- 406
1570 17:56:49.031210 PCI: 01:00.0 cmd <- 02
1571 17:56:49.035968 done.
1572 17:56:49.039132 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 17:56:49.042670 Initializing devices...
1574 17:56:49.045646 Root Device init
1575 17:56:49.049100 Chrome EC: Set SMI mask to 0x0000000000000000
1576 17:56:49.056351 Chrome EC: clear events_b mask to 0x0000000000000000
1577 17:56:49.062783 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 17:56:49.069428 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 17:56:49.075836 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 17:56:49.082286 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 17:56:49.086072 fw_config match found: DB_USB=USB3_ACTIVE
1582 17:56:49.092734 Configure Right Type-C port orientation for retimer
1583 17:56:49.095690 Root Device init finished in 47 msecs
1584 17:56:49.099557 PCI: 00:00.0 init
1585 17:56:49.102272 CPU TDP = 9 Watts
1586 17:56:49.102374 CPU PL1 = 9 Watts
1587 17:56:49.105883 CPU PL2 = 40 Watts
1588 17:56:49.108815 CPU PL4 = 83 Watts
1589 17:56:49.112030 PCI: 00:00.0 init finished in 8 msecs
1590 17:56:49.112136 PCI: 00:02.0 init
1591 17:56:49.115574 GMA: Found VBT in CBFS
1592 17:56:49.118885 GMA: Found valid VBT in CBFS
1593 17:56:49.125628 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 17:56:49.131711 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 17:56:49.135065 PCI: 00:02.0 init finished in 18 msecs
1596 17:56:49.138281 PCI: 00:05.0 init
1597 17:56:49.141835 PCI: 00:05.0 init finished in 0 msecs
1598 17:56:49.145367 PCI: 00:08.0 init
1599 17:56:49.148343 PCI: 00:08.0 init finished in 0 msecs
1600 17:56:49.152194 PCI: 00:14.0 init
1601 17:56:49.154819 PCI: 00:14.0 init finished in 0 msecs
1602 17:56:49.158377 PCI: 00:14.2 init
1603 17:56:49.161374 PCI: 00:14.2 init finished in 0 msecs
1604 17:56:49.165167 PCI: 00:15.0 init
1605 17:56:49.167853 I2C bus 0 version 0x3230302a
1606 17:56:49.171273 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 17:56:49.174798 PCI: 00:15.0 init finished in 6 msecs
1608 17:56:49.174899 PCI: 00:15.1 init
1609 17:56:49.178191 I2C bus 1 version 0x3230302a
1610 17:56:49.181611 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 17:56:49.187996 PCI: 00:15.1 init finished in 6 msecs
1612 17:56:49.188095 PCI: 00:15.2 init
1613 17:56:49.191374 I2C bus 2 version 0x3230302a
1614 17:56:49.194221 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 17:56:49.197493 PCI: 00:15.2 init finished in 6 msecs
1616 17:56:49.201467 PCI: 00:15.3 init
1617 17:56:49.204722 I2C bus 3 version 0x3230302a
1618 17:56:49.207589 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 17:56:49.211199 PCI: 00:15.3 init finished in 6 msecs
1620 17:56:49.214147 PCI: 00:16.0 init
1621 17:56:49.217838 PCI: 00:16.0 init finished in 0 msecs
1622 17:56:49.220728 PCI: 00:19.1 init
1623 17:56:49.224287 I2C bus 5 version 0x3230302a
1624 17:56:49.227184 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 17:56:49.230847 PCI: 00:19.1 init finished in 6 msecs
1626 17:56:49.233861 PCI: 00:1d.0 init
1627 17:56:49.237344 Initializing PCH PCIe bridge.
1628 17:56:49.240348 PCI: 00:1d.0 init finished in 3 msecs
1629 17:56:49.243649 PCI: 00:1f.0 init
1630 17:56:49.246993 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 17:56:49.250510 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 17:56:49.253638 IOAPIC: ID = 0x02
1633 17:56:49.256795 IOAPIC: Dumping registers
1634 17:56:49.260079 reg 0x0000: 0x02000000
1635 17:56:49.260162 reg 0x0001: 0x00770020
1636 17:56:49.263431 reg 0x0002: 0x00000000
1637 17:56:49.266967 PCI: 00:1f.0 init finished in 21 msecs
1638 17:56:49.270540 PCI: 00:1f.2 init
1639 17:56:49.274103 Disabling ACPI via APMC.
1640 17:56:49.276969 APMC done.
1641 17:56:49.280229 PCI: 00:1f.2 init finished in 5 msecs
1642 17:56:49.291192 PCI: 01:00.0 init
1643 17:56:49.294131 PCI: 01:00.0 init finished in 0 msecs
1644 17:56:49.297463 PNP: 0c09.0 init
1645 17:56:49.300770 Google Chrome EC uptime: 8.361 seconds
1646 17:56:49.307819 Google Chrome AP resets since EC boot: 1
1647 17:56:49.310795 Google Chrome most recent AP reset causes:
1648 17:56:49.313954 0.347: 32775 shutdown: entering G3
1649 17:56:49.320439 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 17:56:49.323916 PNP: 0c09.0 init finished in 22 msecs
1651 17:56:49.329949 Devices initialized
1652 17:56:49.333001 Show all devs... After init.
1653 17:56:49.336433 Root Device: enabled 1
1654 17:56:49.336544 DOMAIN: 0000: enabled 1
1655 17:56:49.339968 CPU_CLUSTER: 0: enabled 1
1656 17:56:49.342903 PCI: 00:00.0: enabled 1
1657 17:56:49.346428 PCI: 00:02.0: enabled 1
1658 17:56:49.349806 PCI: 00:04.0: enabled 1
1659 17:56:49.349921 PCI: 00:05.0: enabled 1
1660 17:56:49.352888 PCI: 00:06.0: enabled 0
1661 17:56:49.355907 PCI: 00:07.0: enabled 0
1662 17:56:49.356044 PCI: 00:07.1: enabled 0
1663 17:56:49.359555 PCI: 00:07.2: enabled 0
1664 17:56:49.362724 PCI: 00:07.3: enabled 0
1665 17:56:49.365767 PCI: 00:08.0: enabled 1
1666 17:56:49.365868 PCI: 00:09.0: enabled 0
1667 17:56:49.369440 PCI: 00:0a.0: enabled 0
1668 17:56:49.372471 PCI: 00:0d.0: enabled 1
1669 17:56:49.375997 PCI: 00:0d.1: enabled 0
1670 17:56:49.376099 PCI: 00:0d.2: enabled 0
1671 17:56:49.378964 PCI: 00:0d.3: enabled 0
1672 17:56:49.382425 PCI: 00:0e.0: enabled 0
1673 17:56:49.385683 PCI: 00:10.2: enabled 1
1674 17:56:49.385785 PCI: 00:10.6: enabled 0
1675 17:56:49.389017 PCI: 00:10.7: enabled 0
1676 17:56:49.392201 PCI: 00:12.0: enabled 0
1677 17:56:49.395615 PCI: 00:12.6: enabled 0
1678 17:56:49.395732 PCI: 00:13.0: enabled 0
1679 17:56:49.398738 PCI: 00:14.0: enabled 1
1680 17:56:49.402136 PCI: 00:14.1: enabled 0
1681 17:56:49.405138 PCI: 00:14.2: enabled 1
1682 17:56:49.405239 PCI: 00:14.3: enabled 1
1683 17:56:49.408551 PCI: 00:15.0: enabled 1
1684 17:56:49.411876 PCI: 00:15.1: enabled 1
1685 17:56:49.415391 PCI: 00:15.2: enabled 1
1686 17:56:49.415496 PCI: 00:15.3: enabled 1
1687 17:56:49.418289 PCI: 00:16.0: enabled 1
1688 17:56:49.421743 PCI: 00:16.1: enabled 0
1689 17:56:49.424891 PCI: 00:16.2: enabled 0
1690 17:56:49.425001 PCI: 00:16.3: enabled 0
1691 17:56:49.428128 PCI: 00:16.4: enabled 0
1692 17:56:49.431980 PCI: 00:16.5: enabled 0
1693 17:56:49.434897 PCI: 00:17.0: enabled 0
1694 17:56:49.434995 PCI: 00:19.0: enabled 0
1695 17:56:49.438257 PCI: 00:19.1: enabled 1
1696 17:56:49.441302 PCI: 00:19.2: enabled 0
1697 17:56:49.444800 PCI: 00:1c.0: enabled 1
1698 17:56:49.444899 PCI: 00:1c.1: enabled 0
1699 17:56:49.448393 PCI: 00:1c.2: enabled 0
1700 17:56:49.451596 PCI: 00:1c.3: enabled 0
1701 17:56:49.451694 PCI: 00:1c.4: enabled 0
1702 17:56:49.455122 PCI: 00:1c.5: enabled 0
1703 17:56:49.457746 PCI: 00:1c.6: enabled 1
1704 17:56:49.461357 PCI: 00:1c.7: enabled 0
1705 17:56:49.461460 PCI: 00:1d.0: enabled 1
1706 17:56:49.464599 PCI: 00:1d.1: enabled 0
1707 17:56:49.467523 PCI: 00:1d.2: enabled 1
1708 17:56:49.470938 PCI: 00:1d.3: enabled 0
1709 17:56:49.471015 PCI: 00:1e.0: enabled 1
1710 17:56:49.474240 PCI: 00:1e.1: enabled 0
1711 17:56:49.477897 PCI: 00:1e.2: enabled 1
1712 17:56:49.480925 PCI: 00:1e.3: enabled 1
1713 17:56:49.481046 PCI: 00:1f.0: enabled 1
1714 17:56:49.484508 PCI: 00:1f.1: enabled 0
1715 17:56:49.487362 PCI: 00:1f.2: enabled 1
1716 17:56:49.490781 PCI: 00:1f.3: enabled 1
1717 17:56:49.490871 PCI: 00:1f.4: enabled 0
1718 17:56:49.493964 PCI: 00:1f.5: enabled 1
1719 17:56:49.497615 PCI: 00:1f.6: enabled 0
1720 17:56:49.500541 PCI: 00:1f.7: enabled 0
1721 17:56:49.500644 APIC: 00: enabled 1
1722 17:56:49.504364 GENERIC: 0.0: enabled 1
1723 17:56:49.507047 GENERIC: 0.0: enabled 1
1724 17:56:49.507122 GENERIC: 1.0: enabled 1
1725 17:56:49.510472 GENERIC: 0.0: enabled 1
1726 17:56:49.513837 GENERIC: 1.0: enabled 1
1727 17:56:49.517491 USB0 port 0: enabled 1
1728 17:56:49.517592 GENERIC: 0.0: enabled 1
1729 17:56:49.520301 USB0 port 0: enabled 1
1730 17:56:49.523952 GENERIC: 0.0: enabled 1
1731 17:56:49.526816 I2C: 00:1a: enabled 1
1732 17:56:49.526887 I2C: 00:31: enabled 1
1733 17:56:49.530594 I2C: 00:32: enabled 1
1734 17:56:49.533586 I2C: 00:10: enabled 1
1735 17:56:49.533655 I2C: 00:15: enabled 1
1736 17:56:49.537075 GENERIC: 0.0: enabled 0
1737 17:56:49.540318 GENERIC: 1.0: enabled 0
1738 17:56:49.543223 GENERIC: 0.0: enabled 1
1739 17:56:49.543324 SPI: 00: enabled 1
1740 17:56:49.546790 SPI: 00: enabled 1
1741 17:56:49.546867 PNP: 0c09.0: enabled 1
1742 17:56:49.549652 GENERIC: 0.0: enabled 1
1743 17:56:49.552907 USB3 port 0: enabled 1
1744 17:56:49.556238 USB3 port 1: enabled 1
1745 17:56:49.556347 USB3 port 2: enabled 0
1746 17:56:49.559831 USB3 port 3: enabled 0
1747 17:56:49.562832 USB2 port 0: enabled 0
1748 17:56:49.562908 USB2 port 1: enabled 1
1749 17:56:49.566416 USB2 port 2: enabled 1
1750 17:56:49.569727 USB2 port 3: enabled 0
1751 17:56:49.573021 USB2 port 4: enabled 1
1752 17:56:49.573104 USB2 port 5: enabled 0
1753 17:56:49.576111 USB2 port 6: enabled 0
1754 17:56:49.579648 USB2 port 7: enabled 0
1755 17:56:49.579760 USB2 port 8: enabled 0
1756 17:56:49.582730 USB2 port 9: enabled 0
1757 17:56:49.586206 USB3 port 0: enabled 0
1758 17:56:49.589748 USB3 port 1: enabled 1
1759 17:56:49.589832 USB3 port 2: enabled 0
1760 17:56:49.592649 USB3 port 3: enabled 0
1761 17:56:49.595781 GENERIC: 0.0: enabled 1
1762 17:56:49.595866 GENERIC: 1.0: enabled 1
1763 17:56:49.599047 APIC: 01: enabled 1
1764 17:56:49.602921 APIC: 02: enabled 1
1765 17:56:49.603017 APIC: 05: enabled 1
1766 17:56:49.606142 APIC: 07: enabled 1
1767 17:56:49.609338 APIC: 06: enabled 1
1768 17:56:49.609435 APIC: 03: enabled 1
1769 17:56:49.612534 APIC: 04: enabled 1
1770 17:56:49.615872 PCI: 01:00.0: enabled 1
1771 17:56:49.619276 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1772 17:56:49.625741 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 17:56:49.628616 ELOG: NV offset 0xf30000 size 0x1000
1774 17:56:49.635389 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 17:56:49.642360 ELOG: Event(17) added with size 13 at 2023-10-09 17:56:48 UTC
1776 17:56:49.648448 ELOG: Event(92) added with size 9 at 2023-10-09 17:56:48 UTC
1777 17:56:49.655181 ELOG: Event(93) added with size 9 at 2023-10-09 17:56:48 UTC
1778 17:56:49.662017 ELOG: Event(9E) added with size 10 at 2023-10-09 17:56:48 UTC
1779 17:56:49.668336 ELOG: Event(9F) added with size 14 at 2023-10-09 17:56:48 UTC
1780 17:56:49.675098 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 17:56:49.678258 ELOG: Event(A1) added with size 10 at 2023-10-09 17:56:48 UTC
1782 17:56:49.684685 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 17:56:49.691663 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 17:56:49.694875 Finalize devices...
1785 17:56:49.694979 Devices finalized
1786 17:56:49.701121 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 17:56:49.707656 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 17:56:49.711135 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 17:56:49.717625 ME: HFSTS1 : 0x80030055
1790 17:56:49.721120 ME: HFSTS2 : 0x30280116
1791 17:56:49.724559 ME: HFSTS3 : 0x00000050
1792 17:56:49.731173 ME: HFSTS4 : 0x00004000
1793 17:56:49.734248 ME: HFSTS5 : 0x00000000
1794 17:56:49.740895 ME: HFSTS6 : 0x00400006
1795 17:56:49.743692 ME: Manufacturing Mode : YES
1796 17:56:49.747476 ME: SPI Protection Mode Enabled : NO
1797 17:56:49.750755 ME: FW Partition Table : OK
1798 17:56:49.753542 ME: Bringup Loader Failure : NO
1799 17:56:49.757115 ME: Firmware Init Complete : NO
1800 17:56:49.760434 ME: Boot Options Present : NO
1801 17:56:49.767155 ME: Update In Progress : NO
1802 17:56:49.770101 ME: D0i3 Support : YES
1803 17:56:49.773750 ME: Low Power State Enabled : NO
1804 17:56:49.776960 ME: CPU Replaced : YES
1805 17:56:49.780341 ME: CPU Replacement Valid : YES
1806 17:56:49.783342 ME: Current Working State : 5
1807 17:56:49.786428 ME: Current Operation State : 1
1808 17:56:49.789847 ME: Current Operation Mode : 3
1809 17:56:49.796630 ME: Error Code : 0
1810 17:56:49.800177 ME: Enhanced Debug Mode : NO
1811 17:56:49.803217 ME: CPU Debug Disabled : YES
1812 17:56:49.806436 ME: TXT Support : NO
1813 17:56:49.812697 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 17:56:49.819355 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 17:56:49.822844 CBFS: 'fallback/slic' not found.
1816 17:56:49.826356 ACPI: Writing ACPI tables at 76b01000.
1817 17:56:49.829170 ACPI: * FACS
1818 17:56:49.829286 ACPI: * DSDT
1819 17:56:49.832669 Ramoops buffer: 0x100000@0x76a00000.
1820 17:56:49.839199 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 17:56:49.842763 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 17:56:49.846429 Google Chrome EC: version:
1823 17:56:49.849428 ro: voema_v2.0.7540-147f8d37d1
1824 17:56:49.852897 rw: voema_v2.0.7540-147f8d37d1
1825 17:56:49.856013 running image: 2
1826 17:56:49.862710 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 17:56:49.865882 ACPI: * FADT
1828 17:56:49.865976 SCI is IRQ9
1829 17:56:49.872743 ACPI: added table 1/32, length now 40
1830 17:56:49.872840 ACPI: * SSDT
1831 17:56:49.875705 Found 1 CPU(s) with 8 core(s) each.
1832 17:56:49.882378 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 17:56:49.885374 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 17:56:49.888871 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 17:56:49.892123 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 17:56:49.898872 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 17:56:49.905571 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 17:56:49.908829 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 17:56:49.915043 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 17:56:49.921559 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 17:56:49.924754 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 17:56:49.931757 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 17:56:49.934541 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 17:56:49.941132 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 17:56:49.944715 PS2K: Passing 80 keymaps to kernel
1846 17:56:49.951349 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 17:56:49.957996 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 17:56:49.964476 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 17:56:49.971058 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 17:56:49.977937 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 17:56:49.984455 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 17:56:49.990889 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 17:56:49.997344 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 17:56:50.000900 ACPI: added table 2/32, length now 44
1855 17:56:50.003986 ACPI: * MCFG
1856 17:56:50.007418 ACPI: added table 3/32, length now 48
1857 17:56:50.007516 ACPI: * TPM2
1858 17:56:50.010375 TPM2 log created at 0x769f0000
1859 17:56:50.014055 ACPI: added table 4/32, length now 52
1860 17:56:50.016802 ACPI: * MADT
1861 17:56:50.016898 SCI is IRQ9
1862 17:56:50.020680 ACPI: added table 5/32, length now 56
1863 17:56:50.023677 current = 76b09850
1864 17:56:50.023789 ACPI: * DMAR
1865 17:56:50.030266 ACPI: added table 6/32, length now 60
1866 17:56:50.033578 ACPI: added table 7/32, length now 64
1867 17:56:50.033677 ACPI: * HPET
1868 17:56:50.040014 ACPI: added table 8/32, length now 68
1869 17:56:50.040112 ACPI: done.
1870 17:56:50.043738 ACPI tables: 35216 bytes.
1871 17:56:50.046578 smbios_write_tables: 769ef000
1872 17:56:50.049937 EC returned error result code 3
1873 17:56:50.052845 Couldn't obtain OEM name from CBI
1874 17:56:50.056389 Create SMBIOS type 16
1875 17:56:50.056486 Create SMBIOS type 17
1876 17:56:50.059607 GENERIC: 0.0 (WIFI Device)
1877 17:56:50.063215 SMBIOS tables: 1750 bytes.
1878 17:56:50.066024 Writing table forward entry at 0x00000500
1879 17:56:50.072909 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 17:56:50.076132 Writing coreboot table at 0x76b25000
1881 17:56:50.082505 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 17:56:50.089480 1. 0000000000001000-000000000009ffff: RAM
1883 17:56:50.092216 2. 00000000000a0000-00000000000fffff: RESERVED
1884 17:56:50.095847 3. 0000000000100000-00000000769eefff: RAM
1885 17:56:50.102481 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 17:56:50.108848 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 17:56:50.112157 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 17:56:50.119159 7. 0000000077000000-000000007fbfffff: RESERVED
1889 17:56:50.122335 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 17:56:50.128884 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 17:56:50.131929 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 17:56:50.138549 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 17:56:50.142196 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 17:56:50.148384 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 17:56:50.151773 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 17:56:50.155068 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 17:56:50.161612 16. 0000000100000000-00000002803fffff: RAM
1898 17:56:50.164547 Passing 4 GPIOs to payload:
1899 17:56:50.167888 NAME | PORT | POLARITY | VALUE
1900 17:56:50.174738 lid | undefined | high | high
1901 17:56:50.178296 power | undefined | high | low
1902 17:56:50.184236 oprom | undefined | high | low
1903 17:56:50.191091 EC in RW | 0x000000e5 | high | high
1904 17:56:50.197647 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1856
1905 17:56:50.201235 coreboot table: 1576 bytes.
1906 17:56:50.204114 IMD ROOT 0. 0x76fff000 0x00001000
1907 17:56:50.207670 IMD SMALL 1. 0x76ffe000 0x00001000
1908 17:56:50.210773 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 17:56:50.214207 VPD 3. 0x76c4d000 0x00000367
1910 17:56:50.217679 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 17:56:50.220912 CONSOLE 5. 0x76c2c000 0x00020000
1912 17:56:50.223878 FMAP 6. 0x76c2b000 0x00000578
1913 17:56:50.230646 TIME STAMP 7. 0x76c2a000 0x00000910
1914 17:56:50.233941 VBOOT WORK 8. 0x76c16000 0x00014000
1915 17:56:50.236776 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 17:56:50.240544 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 17:56:50.243934 RAMSTAGE 11. 0x76b97000 0x00073000
1918 17:56:50.246751 REFCODE 12. 0x76b42000 0x00055000
1919 17:56:50.250464 SMM BACKUP 13. 0x76b32000 0x00010000
1920 17:56:50.256584 4f444749 14. 0x76b30000 0x00002000
1921 17:56:50.259883 EXT VBT15. 0x76b2d000 0x0000219f
1922 17:56:50.263289 COREBOOT 16. 0x76b25000 0x00008000
1923 17:56:50.266926 ACPI 17. 0x76b01000 0x00024000
1924 17:56:50.269963 ACPI GNVS 18. 0x76b00000 0x00001000
1925 17:56:50.273533 RAMOOPS 19. 0x76a00000 0x00100000
1926 17:56:50.276448 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 17:56:50.279897 SMBIOS 21. 0x769ef000 0x00000800
1928 17:56:50.283280 IMD small region:
1929 17:56:50.286582 IMD ROOT 0. 0x76ffec00 0x00000400
1930 17:56:50.289916 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 17:56:50.292807 POWER STATE 2. 0x76ffeb80 0x00000044
1932 17:56:50.299668 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 17:56:50.302634 MEM INFO 4. 0x76ffe980 0x000001e0
1934 17:56:50.309141 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1935 17:56:50.312708 MTRR: Physical address space:
1936 17:56:50.316257 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 17:56:50.322769 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 17:56:50.329320 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 17:56:50.335955 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 17:56:50.342431 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 17:56:50.348933 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 17:56:50.355476 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 17:56:50.358745 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 17:56:50.361810 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 17:56:50.368567 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 17:56:50.371825 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 17:56:50.375600 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 17:56:50.378481 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 17:56:50.385216 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 17:56:50.388033 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 17:56:50.391429 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 17:56:50.394868 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 17:56:50.401431 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 17:56:50.404990 call enable_fixed_mtrr()
1955 17:56:50.408024 CPU physical address size: 39 bits
1956 17:56:50.411174 MTRR: default type WB/UC MTRR counts: 6/6.
1957 17:56:50.414698 MTRR: UC selected as default type.
1958 17:56:50.421140 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 17:56:50.427658 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 17:56:50.434541 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 17:56:50.441090 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 17:56:50.447310 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 17:56:50.454259 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 17:56:50.454339
1965 17:56:50.454422 MTRR check
1966 17:56:50.457038 Fixed MTRRs : Enabled
1967 17:56:50.460338 Variable MTRRs: Enabled
1968 17:56:50.460412
1969 17:56:50.463971 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 17:56:50.467065 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 17:56:50.473989 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 17:56:50.477114 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 17:56:50.480115 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 17:56:50.483675 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 17:56:50.490294 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 17:56:50.493277 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 17:56:50.496755 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 17:56:50.499956 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 17:56:50.506796 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 17:56:50.513446 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1981 17:56:50.516589 call enable_fixed_mtrr()
1982 17:56:50.520040 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 17:56:50.523078 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 17:56:50.526570 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 17:56:50.533105 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 17:56:50.536051 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 17:56:50.539498 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 17:56:50.543169 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 17:56:50.549640 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 17:56:50.552763 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 17:56:50.556127 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 17:56:50.559158 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 17:56:50.562400 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 17:56:50.569366 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 17:56:50.572201 call enable_fixed_mtrr()
1996 17:56:50.575880 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 17:56:50.579197 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 17:56:50.585366 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 17:56:50.588721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 17:56:50.592506 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 17:56:50.595290 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 17:56:50.601781 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 17:56:50.605127 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 17:56:50.608384 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 17:56:50.611547 CPU physical address size: 39 bits
2006 17:56:50.618327 call enable_fixed_mtrr()
2007 17:56:50.622015 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 17:56:50.624770 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 17:56:50.628282 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 17:56:50.634885 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 17:56:50.637882 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 17:56:50.641399 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 17:56:50.644933 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 17:56:50.651169 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 17:56:50.654249 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 17:56:50.657635 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 17:56:50.660919 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 17:56:50.667433 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 17:56:50.670840 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 17:56:50.673842 call enable_fixed_mtrr()
2021 17:56:50.677461 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 17:56:50.680613 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 17:56:50.687116 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 17:56:50.690353 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 17:56:50.693712 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 17:56:50.696726 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 17:56:50.703554 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 17:56:50.706658 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 17:56:50.709925 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 17:56:50.716676 CPU physical address size: 39 bits
2031 17:56:50.720068 call enable_fixed_mtrr()
2032 17:56:50.723349 CPU physical address size: 39 bits
2033 17:56:50.726397 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 17:56:50.729923 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 17:56:50.733002 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 17:56:50.739631 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 17:56:50.742724 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 17:56:50.746375 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 17:56:50.749703 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 17:56:50.756181 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 17:56:50.759212 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 17:56:50.762796 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 17:56:50.765896 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 17:56:50.772443 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 17:56:50.775393 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 17:56:50.782067 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 17:56:50.785660 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 17:56:50.788468 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 17:56:50.791995 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 17:56:50.798368 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 17:56:50.801952 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 17:56:50.805052 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 17:56:50.808561 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 17:56:50.814889 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 17:56:50.818297 call enable_fixed_mtrr()
2056 17:56:50.818422 call enable_fixed_mtrr()
2057 17:56:50.824766 CPU physical address size: 39 bits
2058 17:56:50.827809 CPU physical address size: 39 bits
2059 17:56:50.831393 CPU physical address size: 39 bits
2060 17:56:50.834939 Checking cr50 for pending updates
2061 17:56:50.838554 CPU physical address size: 39 bits
2062 17:56:50.843138 Reading cr50 TPM mode
2063 17:56:50.853290 BS: BS_PAYLOAD_LOAD entry times (exec / console): 329 / 6 ms
2064 17:56:50.863451 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 17:56:50.866287 Checking segment from ROM address 0xffc02b38
2066 17:56:50.869787 Checking segment from ROM address 0xffc02b54
2067 17:56:50.876567 Loading segment from ROM address 0xffc02b38
2068 17:56:50.876647 code (compression=0)
2069 17:56:50.886408 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 17:56:50.895795 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 17:56:50.895966 it's not compressed!
2072 17:56:51.036070 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 17:56:51.042661 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 17:56:51.049309 Loading segment from ROM address 0xffc02b54
2075 17:56:51.052208 Entry Point 0x30000000
2076 17:56:51.052290 Loaded segments
2077 17:56:51.059027 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2078 17:56:51.102513 Finalizing chipset.
2079 17:56:51.105584 Finalizing SMM.
2080 17:56:51.105675 APMC done.
2081 17:56:51.112074 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 17:56:51.115555 mp_park_aps done after 0 msecs.
2083 17:56:51.119020 Jumping to boot code at 0x30000000(0x76b25000)
2084 17:56:51.128662 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 17:56:51.128743
2086 17:56:51.132005
2087 17:56:51.132081
2088 17:56:51.132424 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2089 17:56:51.132527 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2090 17:56:51.132611 Setting prompt string to ['volteer:']
2091 17:56:51.132692 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2092 17:56:51.134901 Starting depthcharge on Voema...
2093 17:56:51.134974
2094 17:56:51.141674 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 17:56:51.141758
2096 17:56:51.148197 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 17:56:51.148283
2098 17:56:51.154474 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 17:56:51.154553
2100 17:56:51.158113 Failed to find eMMC card reader
2101 17:56:51.158200
2102 17:56:51.161240 Wipe memory regions:
2103 17:56:51.161311
2104 17:56:51.164961 [0x00000000001000, 0x000000000a0000)
2105 17:56:51.165033
2106 17:56:51.167689 [0x00000000100000, 0x00000030000000)
2107 17:56:51.193546
2108 17:56:51.197011 [0x00000032662db0, 0x000000769ef000)
2109 17:56:51.233294
2110 17:56:51.236820 [0x00000100000000, 0x00000280400000)
2111 17:56:51.439285
2112 17:56:51.442138 ec_init: CrosEC protocol v3 supported (256, 256)
2113 17:56:51.442235
2114 17:56:51.449025 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 17:56:51.449106
2116 17:56:51.458701 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 17:56:51.458792
2118 17:56:51.461807 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2119 17:56:51.461889
2120 17:56:51.468451 send_conn_disc_msg: pmc_send_cmd succeeded
2121 17:56:51.898308
2122 17:56:51.898543 R8152: Initializing
2123 17:56:51.898654
2124 17:56:51.901621 Version 6 (ocp_data = 5c30)
2125 17:56:51.901772
2126 17:56:51.904541 R8152: Done initializing
2127 17:56:51.904615
2128 17:56:51.908010 Adding net device
2129 17:56:52.209478
2130 17:56:52.212306 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 17:56:52.212403
2132 17:56:52.212467
2133 17:56:52.212527
2134 17:56:52.215929 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 17:56:52.316267 volteer: tftpboot 192.168.201.1 11712547/tftp-deploy-g4coc2zk/kernel/bzImage 11712547/tftp-deploy-g4coc2zk/kernel/cmdline 11712547/tftp-deploy-g4coc2zk/ramdisk/ramdisk.cpio.gz
2137 17:56:52.316460 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 17:56:52.316572 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 17:56:52.320616 tftpboot 192.168.201.1 11712547/tftp-deploy-g4coc2zk/kernel/bzIploy-g4coc2zk/kernel/cmdline 11712547/tftp-deploy-g4coc2zk/ramdisk/ramdisk.cpio.gz
2140 17:56:52.320738
2141 17:56:52.320849 Waiting for link
2142 17:56:52.524725
2143 17:56:52.524887 done.
2144 17:56:52.524962
2145 17:56:52.525023 MAC: 00:24:32:30:79:42
2146 17:56:52.525094
2147 17:56:52.527791 Sending DHCP discover... done.
2148 17:56:52.527869
2149 17:56:52.530977 Waiting for reply... done.
2150 17:56:52.531054
2151 17:56:52.534337 Sending DHCP request... done.
2152 17:56:52.534414
2153 17:56:52.537762 Waiting for reply... done.
2154 17:56:52.540621
2155 17:56:52.540721 My ip is 192.168.201.13
2156 17:56:52.540829
2157 17:56:52.544558 The DHCP server ip is 192.168.201.1
2158 17:56:52.544638
2159 17:56:52.550950 TFTP server IP predefined by user: 192.168.201.1
2160 17:56:52.551031
2161 17:56:52.557003 Bootfile predefined by user: 11712547/tftp-deploy-g4coc2zk/kernel/bzImage
2162 17:56:52.557107
2163 17:56:52.560233 Sending tftp read request... done.
2164 17:56:52.560311
2165 17:56:52.563878 Waiting for the transfer...
2166 17:56:52.563989
2167 17:56:53.112220 00000000 ################################################################
2168 17:56:53.112393
2169 17:56:53.648704 00080000 ################################################################
2170 17:56:53.648859
2171 17:56:54.184871 00100000 ################################################################
2172 17:56:54.185020
2173 17:56:54.733814 00180000 ################################################################
2174 17:56:54.733990
2175 17:56:55.277975 00200000 ################################################################
2176 17:56:55.278127
2177 17:56:55.815594 00280000 ################################################################
2178 17:56:55.815754
2179 17:56:56.401746 00300000 ################################################################
2180 17:56:56.402309
2181 17:56:57.029982 00380000 ################################################################
2182 17:56:57.030128
2183 17:56:57.565498 00400000 ################################################################
2184 17:56:57.565645
2185 17:56:58.099877 00480000 ################################################################
2186 17:56:58.100022
2187 17:56:58.628942 00500000 ################################################################
2188 17:56:58.629111
2189 17:56:59.154278 00580000 ################################################################
2190 17:56:59.154427
2191 17:56:59.690884 00600000 ################################################################
2192 17:56:59.691028
2193 17:57:00.223503 00680000 ################################################################
2194 17:57:00.223700
2195 17:57:00.751169 00700000 ################################################################
2196 17:57:00.751354
2197 17:57:01.292344 00780000 ################################################################
2198 17:57:01.292489
2199 17:57:01.397203 00800000 ############# done.
2200 17:57:01.397346
2201 17:57:01.400158 The bootfile was 8490896 bytes long.
2202 17:57:01.400248
2203 17:57:01.403654 Sending tftp read request... done.
2204 17:57:01.403789
2205 17:57:01.406560 Waiting for the transfer...
2206 17:57:01.406646
2207 17:57:01.944469 00000000 ################################################################
2208 17:57:01.944642
2209 17:57:02.477184 00080000 ################################################################
2210 17:57:02.477327
2211 17:57:03.003710 00100000 ################################################################
2212 17:57:03.003895
2213 17:57:03.521943 00180000 ################################################################
2214 17:57:03.522117
2215 17:57:04.064632 00200000 ################################################################
2216 17:57:04.064816
2217 17:57:04.610334 00280000 ################################################################
2218 17:57:04.610507
2219 17:57:05.155141 00300000 ################################################################
2220 17:57:05.155322
2221 17:57:05.778479 00380000 ################################################################
2222 17:57:05.779134
2223 17:57:06.440412 00400000 ################################################################
2224 17:57:06.441109
2225 17:57:07.085175 00480000 ################################################################
2226 17:57:07.085772
2227 17:57:07.670179 00500000 ################################################################
2228 17:57:07.670324
2229 17:57:08.226647 00580000 ################################################################
2230 17:57:08.226794
2231 17:57:08.771367 00600000 ################################################################
2232 17:57:08.771517
2233 17:57:09.313179 00680000 ################################################################
2234 17:57:09.313324
2235 17:57:09.874345 00700000 ################################################################
2236 17:57:09.874489
2237 17:57:10.439262 00780000 ################################################################
2238 17:57:10.439474
2239 17:57:10.961853 00800000 ####################################################### done.
2240 17:57:10.962025
2241 17:57:10.965520 Sending tftp read request... done.
2242 17:57:10.965612
2243 17:57:10.968899 Waiting for the transfer...
2244 17:57:10.968981
2245 17:57:10.971982 00000000 # done.
2246 17:57:10.972065
2247 17:57:10.978632 Command line loaded dynamically from TFTP file: 11712547/tftp-deploy-g4coc2zk/kernel/cmdline
2248 17:57:10.981301
2249 17:57:10.994443 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 17:57:11.000008
2251 17:57:11.002706 Shutting down all USB controllers.
2252 17:57:11.002785
2253 17:57:11.002847 Removing current net device
2254 17:57:11.002906
2255 17:57:11.006272 Finalizing coreboot
2256 17:57:11.006402
2257 17:57:11.012815 Exiting depthcharge with code 4 at timestamp: 28527833
2258 17:57:11.012934
2259 17:57:11.013018
2260 17:57:11.013080 Starting kernel ...
2261 17:57:11.013140
2262 17:57:11.013506 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2263 17:57:11.013601 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2264 17:57:11.013673 Setting prompt string to ['Linux version [0-9]']
2265 17:57:11.013741 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2266 17:57:11.013807 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 17:57:11.015641
2269 18:01:36.014619 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2271 18:01:36.016015 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2273 18:01:36.016878 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 18:01:36.018263 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 18:01:36.019428 Cleaning after the job
2279 18:01:36.019517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/ramdisk
2280 18:01:36.020940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/kernel
2281 18:01:36.022234 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712547/tftp-deploy-g4coc2zk/modules
2282 18:01:36.022582 start: 5.1 power-off (timeout 00:00:30) [common]
2283 18:01:36.022741 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2284 18:01:36.106477 >> Command sent successfully.
2285 18:01:36.118519 Returned 0 in 0 seconds
2286 18:01:36.219994 end: 5.1 power-off (duration 00:00:00) [common]
2288 18:01:36.221382 start: 5.2 read-feedback (timeout 00:10:00) [common]
2289 18:01:36.222553 Listened to connection for namespace 'common' for up to 1s
2290 18:01:37.223264 Finalising connection for namespace 'common'
2291 18:01:37.224114 Disconnecting from shell: Finalise
2292 18:01:37.224542
2293 18:01:37.325555 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 18:01:37.326171 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712547
2295 18:01:37.378208 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712547
2296 18:01:37.378437 JobError: Your job cannot terminate cleanly.