Boot log: dell-latitude-5400-4305U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:47:17.606371 lava-dispatcher, installed at version: 2023.08
2 17:47:17.606627 start: 0 validate
3 17:47:17.606799 Start time: 2023-10-09 17:47:17.606790+00:00 (UTC)
4 17:47:17.606919 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:47:17.607061 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:47:17.875064 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:47:17.875326 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:47:20.378683 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:47:20.378870 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:47:21.383525 validate duration: 3.78
12 17:47:21.383857 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:47:21.383992 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:47:21.384134 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:47:21.384309 Not decompressing ramdisk as can be used compressed.
16 17:47:21.384449 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:47:21.384548 saving as /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/ramdisk/rootfs.cpio.gz
18 17:47:21.384659 total size: 8418130 (8 MB)
19 17:47:21.386217 progress 0 % (0 MB)
20 17:47:21.388827 progress 5 % (0 MB)
21 17:47:21.391396 progress 10 % (0 MB)
22 17:47:21.393936 progress 15 % (1 MB)
23 17:47:21.396449 progress 20 % (1 MB)
24 17:47:21.398799 progress 25 % (2 MB)
25 17:47:21.401235 progress 30 % (2 MB)
26 17:47:21.403388 progress 35 % (2 MB)
27 17:47:21.405740 progress 40 % (3 MB)
28 17:47:21.408209 progress 45 % (3 MB)
29 17:47:21.410532 progress 50 % (4 MB)
30 17:47:21.412924 progress 55 % (4 MB)
31 17:47:21.415224 progress 60 % (4 MB)
32 17:47:21.417376 progress 65 % (5 MB)
33 17:47:21.419682 progress 70 % (5 MB)
34 17:47:21.421962 progress 75 % (6 MB)
35 17:47:21.424340 progress 80 % (6 MB)
36 17:47:21.426727 progress 85 % (6 MB)
37 17:47:21.429128 progress 90 % (7 MB)
38 17:47:21.431524 progress 95 % (7 MB)
39 17:47:21.433963 progress 100 % (8 MB)
40 17:47:21.434268 8 MB downloaded in 0.05 s (161.83 MB/s)
41 17:47:21.434527 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:47:21.434933 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:47:21.435066 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:47:21.435195 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:47:21.435373 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:47:21.435484 saving as /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/kernel/bzImage
48 17:47:21.435576 total size: 8490896 (8 MB)
49 17:47:21.435680 No compression specified
50 17:47:21.437439 progress 0 % (0 MB)
51 17:47:21.439976 progress 5 % (0 MB)
52 17:47:21.442600 progress 10 % (0 MB)
53 17:47:21.445162 progress 15 % (1 MB)
54 17:47:21.447733 progress 20 % (1 MB)
55 17:47:21.450362 progress 25 % (2 MB)
56 17:47:21.452979 progress 30 % (2 MB)
57 17:47:21.455544 progress 35 % (2 MB)
58 17:47:21.458149 progress 40 % (3 MB)
59 17:47:21.460687 progress 45 % (3 MB)
60 17:47:21.463148 progress 50 % (4 MB)
61 17:47:21.465594 progress 55 % (4 MB)
62 17:47:21.468306 progress 60 % (4 MB)
63 17:47:21.470978 progress 65 % (5 MB)
64 17:47:21.473279 progress 70 % (5 MB)
65 17:47:21.475546 progress 75 % (6 MB)
66 17:47:21.477892 progress 80 % (6 MB)
67 17:47:21.480334 progress 85 % (6 MB)
68 17:47:21.482822 progress 90 % (7 MB)
69 17:47:21.485285 progress 95 % (7 MB)
70 17:47:21.487777 progress 100 % (8 MB)
71 17:47:21.487911 8 MB downloaded in 0.05 s (154.74 MB/s)
72 17:47:21.488064 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:47:21.488298 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:47:21.488401 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:47:21.488494 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:47:21.488646 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:47:21.488722 saving as /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/modules/modules.tar
79 17:47:21.488785 total size: 250928 (0 MB)
80 17:47:21.488848 Using unxz to decompress xz
81 17:47:21.493649 progress 13 % (0 MB)
82 17:47:21.494136 progress 26 % (0 MB)
83 17:47:21.494419 progress 39 % (0 MB)
84 17:47:21.496604 progress 52 % (0 MB)
85 17:47:21.498497 progress 65 % (0 MB)
86 17:47:21.500554 progress 78 % (0 MB)
87 17:47:21.502506 progress 91 % (0 MB)
88 17:47:21.504303 progress 100 % (0 MB)
89 17:47:21.510017 0 MB downloaded in 0.02 s (11.28 MB/s)
90 17:47:21.510318 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:47:21.510598 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:47:21.510700 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:47:21.510798 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:47:21.510883 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:47:21.510977 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:47:21.511207 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25
98 17:47:21.511352 makedir: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin
99 17:47:21.511462 makedir: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/tests
100 17:47:21.511563 makedir: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/results
101 17:47:21.511698 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-add-keys
102 17:47:21.511853 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-add-sources
103 17:47:21.511986 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-background-process-start
104 17:47:21.512117 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-background-process-stop
105 17:47:21.512246 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-common-functions
106 17:47:21.512375 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-echo-ipv4
107 17:47:21.512502 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-install-packages
108 17:47:21.512646 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-installed-packages
109 17:47:21.512773 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-os-build
110 17:47:21.512900 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-probe-channel
111 17:47:21.513026 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-probe-ip
112 17:47:21.513153 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-target-ip
113 17:47:21.513300 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-target-mac
114 17:47:21.513437 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-target-storage
115 17:47:21.513584 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-case
116 17:47:21.513725 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-event
117 17:47:21.513855 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-feedback
118 17:47:21.513982 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-raise
119 17:47:21.514109 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-reference
120 17:47:21.514235 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-runner
121 17:47:21.514375 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-set
122 17:47:21.514533 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-test-shell
123 17:47:21.514678 Updating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-install-packages (oe)
124 17:47:21.514842 Updating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/bin/lava-installed-packages (oe)
125 17:47:21.514979 Creating /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/environment
126 17:47:21.515090 LAVA metadata
127 17:47:21.515166 - LAVA_JOB_ID=11712627
128 17:47:21.515232 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:47:21.515345 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:47:21.515414 skipped lava-vland-overlay
131 17:47:21.515537 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:47:21.515663 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:47:21.515746 skipped lava-multinode-overlay
134 17:47:21.515829 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:47:21.515914 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:47:21.515993 Loading test definitions
137 17:47:21.516089 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:47:21.516180 Using /lava-11712627 at stage 0
139 17:47:21.516536 uuid=11712627_1.4.2.3.1 testdef=None
140 17:47:21.516625 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:47:21.516727 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:47:21.517306 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:47:21.517552 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:47:21.518397 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:47:21.518751 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:47:21.519720 runner path: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/0/tests/0_dmesg test_uuid 11712627_1.4.2.3.1
149 17:47:21.519895 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:47:21.520168 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:47:21.520243 Using /lava-11712627 at stage 1
153 17:47:21.520696 uuid=11712627_1.4.2.3.5 testdef=None
154 17:47:21.520822 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:47:21.520952 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:47:21.521709 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:47:21.522088 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:47:21.523008 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:47:21.523396 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:47:21.524433 runner path: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/1/tests/1_bootrr test_uuid 11712627_1.4.2.3.5
163 17:47:21.524639 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:47:21.524990 Creating lava-test-runner.conf files
166 17:47:21.525083 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/0 for stage 0
167 17:47:21.525205 - 0_dmesg
168 17:47:21.525320 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712627/lava-overlay-k3eh2f25/lava-11712627/1 for stage 1
169 17:47:21.525449 - 1_bootrr
170 17:47:21.525579 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:47:21.525697 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:47:21.537040 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:47:21.537237 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:47:21.537364 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:47:21.537486 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:47:21.537605 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:47:21.806288 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:47:21.806731 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:47:21.806879 extracting modules file /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712627/extract-overlay-ramdisk-gjrd6y4o/ramdisk
180 17:47:21.821418 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:47:21.821592 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:47:21.821692 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712627/compress-overlay-ryr47sq9/overlay-1.4.2.4.tar.gz to ramdisk
183 17:47:21.821764 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712627/compress-overlay-ryr47sq9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712627/extract-overlay-ramdisk-gjrd6y4o/ramdisk
184 17:47:21.831551 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:47:21.831781 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:47:21.831918 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:47:21.832048 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:47:21.832158 Building ramdisk /var/lib/lava/dispatcher/tmp/11712627/extract-overlay-ramdisk-gjrd6y4o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712627/extract-overlay-ramdisk-gjrd6y4o/ramdisk
189 17:47:21.992095 >> 49788 blocks
190 17:47:22.872527 rename /var/lib/lava/dispatcher/tmp/11712627/extract-overlay-ramdisk-gjrd6y4o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/ramdisk/ramdisk.cpio.gz
191 17:47:22.873089 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:47:22.873269 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:47:22.873423 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:47:22.873565 No mkimage arch provided, not using FIT.
195 17:47:22.873699 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:47:22.873829 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:47:22.873988 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:47:22.874128 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:47:22.874264 No LXC device requested
200 17:47:22.874389 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:47:22.874533 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:47:22.874661 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:47:22.874779 Checking files for TFTP limit of 4294967296 bytes.
204 17:47:22.875354 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:47:22.875500 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:47:22.875648 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:47:22.875829 substitutions:
208 17:47:22.875933 - {DTB}: None
209 17:47:22.876037 - {INITRD}: 11712627/tftp-deploy-e74ic94s/ramdisk/ramdisk.cpio.gz
210 17:47:22.876139 - {KERNEL}: 11712627/tftp-deploy-e74ic94s/kernel/bzImage
211 17:47:22.876241 - {LAVA_MAC}: None
212 17:47:22.876337 - {PRESEED_CONFIG}: None
213 17:47:22.876436 - {PRESEED_LOCAL}: None
214 17:47:22.876529 - {RAMDISK}: 11712627/tftp-deploy-e74ic94s/ramdisk/ramdisk.cpio.gz
215 17:47:22.876634 - {ROOT_PART}: None
216 17:47:22.876729 - {ROOT}: None
217 17:47:22.876825 - {SERVER_IP}: 192.168.201.1
218 17:47:22.876919 - {TEE}: None
219 17:47:22.877012 Parsed boot commands:
220 17:47:22.877107 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:47:22.877360 Parsed boot commands: tftpboot 192.168.201.1 11712627/tftp-deploy-e74ic94s/kernel/bzImage 11712627/tftp-deploy-e74ic94s/kernel/cmdline 11712627/tftp-deploy-e74ic94s/ramdisk/ramdisk.cpio.gz
222 17:47:22.877494 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:47:22.877629 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:47:22.877766 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:47:22.877909 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:47:22.878024 Not connected, no need to disconnect.
227 17:47:22.878142 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:47:22.878270 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:47:22.878383 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-0'
230 17:47:22.883385 Setting prompt string to ['lava-test: # ']
231 17:47:22.883903 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:47:22.884064 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:47:22.884213 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:47:22.884355 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:47:22.884677 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
236 17:47:39.797103 >> Command sent successfully.
237 17:47:39.799497 Returned 0 in 16 seconds
238 17:47:39.899923 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 17:47:39.900247 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 17:47:39.900346 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 17:47:39.900434 Setting prompt string to 'Starting depthcharge on sarien...'
243 17:47:39.900498 Changing prompt to 'Starting depthcharge on sarien...'
244 17:47:39.900562 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 17:47:39.900828 [Enter `^Ec?' for help]
246 17:47:39.900905
247 17:47:39.900970
248 17:47:39.901031 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 17:47:39.901092 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
250 17:47:39.901152 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 17:47:39.901209 CPU: AES supported, TXT NOT supported, VT supported
252 17:47:39.901263 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
253 17:47:39.901318 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 17:47:39.901388 IGD: device id 3ea1 (rev 02) is Unknown
255 17:47:39.901442 VBOOT: Loading verstage.
256 17:47:39.901498 CBFS @ 1d00000 size 300000
257 17:47:39.901550 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 17:47:39.901604 CBFS: Locating 'fallback/verstage'
259 17:47:39.901657 CBFS: Found @ offset 10f6c0 size 1435c
260 17:47:39.901710
261 17:47:39.901762
262 17:47:39.901833 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 17:47:39.901888 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 17:47:39.901942 done! DID_VID 0x00281ae0
265 17:47:39.901995 TPM ready after 0 ms
266 17:47:39.902050 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 17:47:39.902102 tlcl_send_startup: Startup return code is 0
268 17:47:39.902155 TPM: setup succeeded
269 17:47:39.902208 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 17:47:39.902276 Checking cr50 for recovery request
271 17:47:39.902331 Phase 1
272 17:47:39.902383 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 17:47:39.902438 FMAP: base = fe000000 size = 2000000 #areas = 37
274 17:47:39.902492 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 17:47:39.902545 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 17:47:39.902597 Phase 2
277 17:47:39.902649 Phase 3
278 17:47:39.902700 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 17:47:39.902752 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 17:47:39.902806 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 17:47:39.902895 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 17:47:39.902953 VB2:vb2_verify_keyblock() Checking key block signature...
283 17:47:39.903007 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 17:47:39.903060 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 17:47:39.903112 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 17:47:39.903163 Phase 4
287 17:47:39.903215 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 17:47:39.903267 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 17:47:39.903320 VB2:vb2_rsa_verify_digest() Digest check failed!
290 17:47:39.903372 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 17:47:39.903424 Saving nvdata
292 17:47:39.903476 Reboot requested (10020007)
293 17:47:39.903529 board_reset() called!
294 17:47:39.903581 full_reset() called!
295 17:47:44.065241
296 17:47:44.065375
297 17:47:44.073451 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 17:47:44.077915 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
299 17:47:44.082725 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 17:47:44.087915 CPU: AES supported, TXT NOT supported, VT supported
301 17:47:44.093550 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
302 17:47:44.098465 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 17:47:44.102517 IGD: device id 3ea1 (rev 02) is Unknown
304 17:47:44.105475 VBOOT: Loading verstage.
305 17:47:44.109265 CBFS @ 1d00000 size 300000
306 17:47:44.115380 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 17:47:44.118629 CBFS: Locating 'fallback/verstage'
308 17:47:44.122078 CBFS: Found @ offset 10f6c0 size 1435c
309 17:47:44.136502
310 17:47:44.136587
311 17:47:44.144553 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 17:47:44.151751 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 17:47:44.155462 done! DID_VID 0x00281ae0
314 17:47:44.157349 TPM ready after 0 ms
315 17:47:44.161275 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 17:47:44.258747 tlcl_send_startup: Startup return code is 0
317 17:47:44.260945 TPM: setup succeeded
318 17:47:44.278327 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 17:47:44.281932 Checking cr50 for recovery request
320 17:47:44.291644 Phase 1
321 17:47:44.296192 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 17:47:44.301590 FMAP: base = fe000000 size = 2000000 #areas = 37
323 17:47:44.306165 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 17:47:44.313342 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 17:47:44.320337 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 17:47:44.323183 Recovery requested (1009000e)
327 17:47:44.324434 Saving nvdata
328 17:47:44.339742 tlcl_extend: response is 0
329 17:47:44.353748 tlcl_extend: response is 0
330 17:47:44.357165 CBFS @ 1d00000 size 300000
331 17:47:44.363518 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 17:47:44.367142 CBFS: Locating 'fallback/romstage'
333 17:47:44.370230 CBFS: Found @ offset 80 size 15b2c
334 17:47:44.371523
335 17:47:44.372028
336 17:47:44.380104 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 17:47:44.385213 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 17:47:44.390046 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 17:47:44.394571 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 17:47:44.398984 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 17:47:44.402675 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 17:47:44.404774 TCO_STS: 0000 0004
343 17:47:44.408386 GEN_PMCON: d0015209 00002200
344 17:47:44.410548 GBLRST_CAUSE: 00000000 00000000
345 17:47:44.413132 prev_sleep_state 5
346 17:47:44.416147 Boot Count incremented to 42458
347 17:47:44.419855 CBFS @ 1d00000 size 300000
348 17:47:44.425741 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 17:47:44.428612 CBFS: Locating 'fspm.bin'
350 17:47:44.431975 CBFS: Found @ offset 60fc0 size 70000
351 17:47:44.437905 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 17:47:44.442251 FMAP: base = fe000000 size = 2000000 #areas = 37
353 17:47:44.448407 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 17:47:44.454982 Probing TPM I2C: done! DID_VID 0x00281ae0
355 17:47:44.457128 Locality already claimed
356 17:47:44.461008 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 17:47:44.480553 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 17:47:44.486758 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 17:47:44.489809 MRC cache found, size 18e0
360 17:47:44.491745 bootmode is set to :2
361 17:47:44.582118 CBMEM:
362 17:47:44.586147 IMD: root @ 89fff000 254 entries.
363 17:47:44.589494 IMD: root @ 89ffec00 62 entries.
364 17:47:44.592148 External stage cache:
365 17:47:44.595340 IMD: root @ 8abff000 254 entries.
366 17:47:44.598074 IMD: root @ 8abfec00 62 entries.
367 17:47:44.604932 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 17:47:44.607860 creating vboot_handoff structure
369 17:47:44.628759 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 17:47:44.644785 tlcl_write: response is 0
371 17:47:44.663122 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 17:47:44.667521 MRC: TPM MRC hash updated successfully.
373 17:47:44.669178 1 DIMMs found
374 17:47:44.670840 top_of_ram = 0x8a000000
375 17:47:44.676843 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 17:47:44.681174 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 17:47:44.684323 CBFS @ 1d00000 size 300000
378 17:47:44.690706 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 17:47:44.693675 CBFS: Locating 'fallback/postcar'
380 17:47:44.697559 CBFS: Found @ offset 107000 size 41a4
381 17:47:44.704244 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 17:47:44.714278 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 17:47:44.720106 Processing 126 relocs. Offset value of 0x87cdd000
384 17:47:44.721635
385 17:47:44.722166
386 17:47:44.731007 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 17:47:44.733232 CBFS @ 1d00000 size 300000
388 17:47:44.739049 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 17:47:44.743032 CBFS: Locating 'fallback/ramstage'
390 17:47:44.746663 CBFS: Found @ offset 458c0 size 1a8a8
391 17:47:44.753283 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 17:47:44.780425 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 17:47:44.785209 Processing 3754 relocs. Offset value of 0x88e81000
394 17:47:44.791034
395 17:47:44.791557
396 17:47:44.799768 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 17:47:44.804266 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 17:47:44.809066 FMAP: base = fe000000 size = 2000000 #areas = 37
399 17:47:44.814441 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 17:47:44.818640 WARNING: RO_VPD is uninitialized or empty.
401 17:47:44.822987 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 17:47:44.827667 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 17:47:44.829595 Normal boot.
404 17:47:44.835784 BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1163
405 17:47:44.838628 CBFS @ 1d00000 size 300000
406 17:47:44.845393 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 17:47:44.849125 CBFS: Locating 'cpu_microcode_blob.bin'
408 17:47:44.852992 CBFS: Found @ offset 15c40 size 2fc00
409 17:47:44.857083 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 17:47:44.859245 Skip microcode update
411 17:47:44.862671 CBFS @ 1d00000 size 300000
412 17:47:44.868309 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 17:47:44.871055 CBFS: Locating 'fsps.bin'
414 17:47:44.875437 CBFS: Found @ offset d1fc0 size 35000
415 17:47:44.909355 Detected 2 core, 2 thread CPU.
416 17:47:44.912545 Setting up SMI for CPU
417 17:47:44.914533 IED base = 0x8ac00000
418 17:47:44.916566 IED size = 0x00400000
419 17:47:44.919901 Will perform SMM setup.
420 17:47:44.924410 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
421 17:47:44.931863 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 17:47:44.936334 Processing 16 relocs. Offset value of 0x00030000
423 17:47:44.939620 Attempting to start 1 APs
424 17:47:44.943236 Waiting for 10ms after sending INIT.
425 17:47:44.957461 Waiting for 1st SIPI to complete...done.
426 17:47:44.959210 AP: slot 1 apic_id 2.
427 17:47:44.963321 Waiting for 2nd SIPI to complete...done.
428 17:47:44.971130 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 17:47:44.976280 Processing 13 relocs. Offset value of 0x00038000
430 17:47:44.982623 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 17:47:44.986370 Installing SMM handler to 0x8a000000
432 17:47:44.994071 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 17:47:44.999764 Processing 867 relocs. Offset value of 0x8a010000
434 17:47:45.008733 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 17:47:45.012854 Processing 13 relocs. Offset value of 0x8a008000
436 17:47:45.018832 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 17:47:45.025086 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
438 17:47:45.027984 Clearing SMI status registers
439 17:47:45.029790 SMI_STS: PM1
440 17:47:45.031667 PM1_STS: WAK PWRBTN
441 17:47:45.035061 TCO_STS: BOOT SECOND_TO
442 17:47:45.036867 GPE0 STD STS: eSPI
443 17:47:45.038795 New SMBASE 0x8a000000
444 17:47:45.041414 In relocation handler: CPU 0
445 17:47:45.045651 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
446 17:47:45.050893 Writing SMRR. base = 0x8a000006, mask=0xff000800
447 17:47:45.052441 Relocation complete.
448 17:47:45.054744 New SMBASE 0x89fffc00
449 17:47:45.058215 In relocation handler: CPU 1
450 17:47:45.062367 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
451 17:47:45.067472 Writing SMRR. base = 0x8a000006, mask=0xff000800
452 17:47:45.069326 Relocation complete.
453 17:47:45.071288 Initializing CPU #0
454 17:47:45.074614 CPU: vendor Intel device 806ec
455 17:47:45.078618 CPU: family 06, model 8e, stepping 0c
456 17:47:45.080988 Clearing out pending MCEs
457 17:47:45.085479 Setting up local APIC... apic_id: 0x00 done.
458 17:47:45.088499 Turbo is available but hidden
459 17:47:45.091081 Turbo has been enabled
460 17:47:45.092465 VMX status: enabled
461 17:47:45.096289 IA32_FEATURE_CONTROL status: locked
462 17:47:45.098456 Skip microcode update
463 17:47:45.100721 CPU #0 initialized
464 17:47:45.102880 Initializing CPU #1
465 17:47:45.106233 CPU: vendor Intel device 806ec
466 17:47:45.109862 CPU: family 06, model 8e, stepping 0c
467 17:47:45.112602 Clearing out pending MCEs
468 17:47:45.116607 Setting up local APIC... apic_id: 0x02 done.
469 17:47:45.119116 VMX status: enabled
470 17:47:45.122192 IA32_FEATURE_CONTROL status: locked
471 17:47:45.124744 Skip microcode update
472 17:47:45.127181 CPU #1 initialized
473 17:47:45.131203 bsp_do_flight_plan done after 163 msecs.
474 17:47:45.134536 CPU: frequency set to 2200 MHz
475 17:47:45.136073 Enabling SMIs.
476 17:47:45.137729 Locking SMM.
477 17:47:45.139907 CBFS @ 1d00000 size 300000
478 17:47:45.147062 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
479 17:47:45.149158 CBFS: Locating 'vbt.bin'
480 17:47:45.152950 CBFS: Found @ offset 60a40 size 4a0
481 17:47:45.157632 Found a VBT of 4608 bytes after decompression
482 17:47:45.171104 FMAP: area GBB found @ 1c11000 (978944 bytes)
483 17:47:45.281139 Detected 2 core, 2 thread CPU.
484 17:47:45.284749 Detected 2 core, 2 thread CPU.
485 17:47:45.514381 Display FSP Version Info HOB
486 17:47:45.517093 Reference Code - CPU = 7.0.5e.40
487 17:47:45.519909 uCode Version = 0.0.0.b8
488 17:47:45.522883 Display FSP Version Info HOB
489 17:47:45.526000 Reference Code - ME = 7.0.5e.40
490 17:47:45.528245 MEBx version = 0.0.0.0
491 17:47:45.531599 ME Firmware Version = Consumer SKU
492 17:47:45.534317 Display FSP Version Info HOB
493 17:47:45.538148 Reference Code - CNL PCH = 7.0.5e.40
494 17:47:45.541042 PCH-CRID Status = Disabled
495 17:47:45.544942 CNL PCH H A0 Hsio Version = 2.0.0.0
496 17:47:45.548969 CNL PCH H Ax Hsio Version = 9.0.0.0
497 17:47:45.552258 CNL PCH H Bx Hsio Version = a.0.0.0
498 17:47:45.555761 CNL PCH LP B0 Hsio Version = 7.0.0.0
499 17:47:45.559041 CNL PCH LP Bx Hsio Version = 6.0.0.0
500 17:47:45.563557 CNL PCH LP Dx Hsio Version = 7.0.0.0
501 17:47:45.565783 Display FSP Version Info HOB
502 17:47:45.570312 Reference Code - SA - System Agent = 7.0.5e.40
503 17:47:45.574265 Reference Code - MRC = 0.7.1.68
504 17:47:45.576918 SA - PCIe Version = 7.0.5e.40
505 17:47:45.579751 SA-CRID Status = Disabled
506 17:47:45.582793 SA-CRID Original Value = 0.0.0.c
507 17:47:45.585500 SA-CRID New Value = 0.0.0.c
508 17:47:45.604074 RTC Init
509 17:47:45.608021 Set power off after power failure.
510 17:47:45.610173 Disabling Deep S3
511 17:47:45.611353 Disabling Deep S3
512 17:47:45.613409 Disabling Deep S4
513 17:47:45.615351 Disabling Deep S4
514 17:47:45.617834 Disabling Deep S5
515 17:47:45.619279 Disabling Deep S5
516 17:47:45.625665 BS: BS_DEV_INIT_CHIPS times (us): entry 301108 run 465608 exit 16239
517 17:47:45.628243 Enumerating buses...
518 17:47:45.632576 Show all devs... Before device enumeration.
519 17:47:45.634900 Root Device: enabled 1
520 17:47:45.637459 CPU_CLUSTER: 0: enabled 1
521 17:47:45.639727 DOMAIN: 0000: enabled 1
522 17:47:45.642141 APIC: 00: enabled 1
523 17:47:45.644185 PCI: 00:00.0: enabled 1
524 17:47:45.646842 PCI: 00:02.0: enabled 1
525 17:47:45.649413 PCI: 00:04.0: enabled 1
526 17:47:45.651859 PCI: 00:12.0: enabled 1
527 17:47:45.653916 PCI: 00:12.5: enabled 0
528 17:47:45.656688 PCI: 00:12.6: enabled 0
529 17:47:45.658748 PCI: 00:13.0: enabled 0
530 17:47:45.661547 PCI: 00:14.0: enabled 1
531 17:47:45.663670 PCI: 00:14.1: enabled 0
532 17:47:45.666716 PCI: 00:14.3: enabled 1
533 17:47:45.669284 PCI: 00:14.5: enabled 0
534 17:47:45.670826 PCI: 00:15.0: enabled 1
535 17:47:45.673863 PCI: 00:15.1: enabled 1
536 17:47:45.675948 PCI: 00:15.2: enabled 0
537 17:47:45.678467 PCI: 00:15.3: enabled 0
538 17:47:45.681141 PCI: 00:16.0: enabled 1
539 17:47:45.683924 PCI: 00:16.1: enabled 0
540 17:47:45.685885 PCI: 00:16.2: enabled 0
541 17:47:45.687845 PCI: 00:16.3: enabled 0
542 17:47:45.690467 PCI: 00:16.4: enabled 0
543 17:47:45.693170 PCI: 00:16.5: enabled 0
544 17:47:45.695461 PCI: 00:17.0: enabled 1
545 17:47:45.698593 PCI: 00:19.0: enabled 1
546 17:47:45.700019 PCI: 00:19.1: enabled 0
547 17:47:45.703236 PCI: 00:19.2: enabled 1
548 17:47:45.705889 PCI: 00:1a.0: enabled 0
549 17:47:45.707838 PCI: 00:1c.0: enabled 1
550 17:47:45.710445 PCI: 00:1c.1: enabled 0
551 17:47:45.712440 PCI: 00:1c.2: enabled 0
552 17:47:45.714587 PCI: 00:1c.3: enabled 0
553 17:47:45.716959 PCI: 00:1c.4: enabled 0
554 17:47:45.719555 PCI: 00:1c.5: enabled 0
555 17:47:45.722366 PCI: 00:1c.6: enabled 0
556 17:47:45.724413 PCI: 00:1c.7: enabled 1
557 17:47:45.726898 PCI: 00:1d.0: enabled 1
558 17:47:45.729541 PCI: 00:1d.1: enabled 1
559 17:47:45.732148 PCI: 00:1d.2: enabled 0
560 17:47:45.734553 PCI: 00:1d.3: enabled 0
561 17:47:45.736406 PCI: 00:1d.4: enabled 1
562 17:47:45.739386 PCI: 00:1e.0: enabled 0
563 17:47:45.741828 PCI: 00:1e.1: enabled 0
564 17:47:45.743919 PCI: 00:1e.2: enabled 0
565 17:47:45.746441 PCI: 00:1e.3: enabled 0
566 17:47:45.748911 PCI: 00:1f.0: enabled 1
567 17:47:45.751602 PCI: 00:1f.1: enabled 1
568 17:47:45.753902 PCI: 00:1f.2: enabled 1
569 17:47:45.757005 PCI: 00:1f.3: enabled 1
570 17:47:45.758338 PCI: 00:1f.4: enabled 1
571 17:47:45.761107 PCI: 00:1f.5: enabled 1
572 17:47:45.763141 PCI: 00:1f.6: enabled 1
573 17:47:45.766045 USB0 port 0: enabled 1
574 17:47:45.767841 I2C: 00:10: enabled 1
575 17:47:45.770469 I2C: 00:10: enabled 1
576 17:47:45.772514 I2C: 00:34: enabled 1
577 17:47:45.774817 I2C: 00:2c: enabled 1
578 17:47:45.776776 I2C: 00:50: enabled 1
579 17:47:45.779302 PNP: 0c09.0: enabled 1
580 17:47:45.781395 USB2 port 0: enabled 1
581 17:47:45.784191 USB2 port 1: enabled 1
582 17:47:45.786503 USB2 port 2: enabled 1
583 17:47:45.788420 USB2 port 4: enabled 1
584 17:47:45.791543 USB2 port 5: enabled 1
585 17:47:45.793141 USB2 port 6: enabled 1
586 17:47:45.796217 USB2 port 7: enabled 1
587 17:47:45.798203 USB2 port 8: enabled 1
588 17:47:45.800474 USB2 port 9: enabled 1
589 17:47:45.802287 USB3 port 0: enabled 1
590 17:47:45.804963 USB3 port 1: enabled 1
591 17:47:45.807456 USB3 port 2: enabled 1
592 17:47:45.809630 USB3 port 3: enabled 1
593 17:47:45.812444 USB3 port 4: enabled 1
594 17:47:45.813757 APIC: 02: enabled 1
595 17:47:45.816435 Compare with tree...
596 17:47:45.818625 Root Device: enabled 1
597 17:47:45.821273 CPU_CLUSTER: 0: enabled 1
598 17:47:45.823653 APIC: 00: enabled 1
599 17:47:45.826450 APIC: 02: enabled 1
600 17:47:45.828519 DOMAIN: 0000: enabled 1
601 17:47:45.830832 PCI: 00:00.0: enabled 1
602 17:47:45.833437 PCI: 00:02.0: enabled 1
603 17:47:45.836799 PCI: 00:04.0: enabled 1
604 17:47:45.838663 PCI: 00:12.0: enabled 1
605 17:47:45.841644 PCI: 00:12.5: enabled 0
606 17:47:45.844040 PCI: 00:12.6: enabled 0
607 17:47:45.846396 PCI: 00:13.0: enabled 0
608 17:47:45.849573 PCI: 00:14.0: enabled 1
609 17:47:45.852140 USB0 port 0: enabled 1
610 17:47:45.855026 USB2 port 0: enabled 1
611 17:47:45.857517 USB2 port 1: enabled 1
612 17:47:45.860289 USB2 port 2: enabled 1
613 17:47:45.862591 USB2 port 4: enabled 1
614 17:47:45.865481 USB2 port 5: enabled 1
615 17:47:45.868953 USB2 port 6: enabled 1
616 17:47:45.870967 USB2 port 7: enabled 1
617 17:47:45.874135 USB2 port 8: enabled 1
618 17:47:45.876395 USB2 port 9: enabled 1
619 17:47:45.879547 USB3 port 0: enabled 1
620 17:47:45.881741 USB3 port 1: enabled 1
621 17:47:45.884852 USB3 port 2: enabled 1
622 17:47:45.887065 USB3 port 3: enabled 1
623 17:47:45.890254 USB3 port 4: enabled 1
624 17:47:45.892276 PCI: 00:14.1: enabled 0
625 17:47:45.895181 PCI: 00:14.3: enabled 1
626 17:47:45.897473 PCI: 00:14.5: enabled 0
627 17:47:45.900129 PCI: 00:15.0: enabled 1
628 17:47:45.903409 I2C: 00:10: enabled 1
629 17:47:45.905430 I2C: 00:10: enabled 1
630 17:47:45.907978 I2C: 00:34: enabled 1
631 17:47:45.910730 PCI: 00:15.1: enabled 1
632 17:47:45.913545 I2C: 00:2c: enabled 1
633 17:47:45.915843 PCI: 00:15.2: enabled 0
634 17:47:45.918316 PCI: 00:15.3: enabled 0
635 17:47:45.920848 PCI: 00:16.0: enabled 1
636 17:47:45.923330 PCI: 00:16.1: enabled 0
637 17:47:45.926586 PCI: 00:16.2: enabled 0
638 17:47:45.928845 PCI: 00:16.3: enabled 0
639 17:47:45.931900 PCI: 00:16.4: enabled 0
640 17:47:45.933880 PCI: 00:16.5: enabled 0
641 17:47:45.937201 PCI: 00:17.0: enabled 1
642 17:47:45.939991 PCI: 00:19.0: enabled 1
643 17:47:45.942488 I2C: 00:50: enabled 1
644 17:47:45.944748 PCI: 00:19.1: enabled 0
645 17:47:45.947394 PCI: 00:19.2: enabled 1
646 17:47:45.950050 PCI: 00:1a.0: enabled 0
647 17:47:45.953130 PCI: 00:1c.0: enabled 1
648 17:47:45.955127 PCI: 00:1c.1: enabled 0
649 17:47:45.957762 PCI: 00:1c.2: enabled 0
650 17:47:45.960422 PCI: 00:1c.3: enabled 0
651 17:47:45.962936 PCI: 00:1c.4: enabled 0
652 17:47:45.965377 PCI: 00:1c.5: enabled 0
653 17:47:45.968127 PCI: 00:1c.6: enabled 0
654 17:47:45.971258 PCI: 00:1c.7: enabled 1
655 17:47:45.973662 PCI: 00:1d.0: enabled 1
656 17:47:45.976284 PCI: 00:1d.1: enabled 1
657 17:47:45.978526 PCI: 00:1d.2: enabled 0
658 17:47:45.981760 PCI: 00:1d.3: enabled 0
659 17:47:45.984490 PCI: 00:1d.4: enabled 1
660 17:47:45.987014 PCI: 00:1e.0: enabled 0
661 17:47:45.989176 PCI: 00:1e.1: enabled 0
662 17:47:45.992539 PCI: 00:1e.2: enabled 0
663 17:47:45.994650 PCI: 00:1e.3: enabled 0
664 17:47:45.997339 PCI: 00:1f.0: enabled 1
665 17:47:45.999412 PNP: 0c09.0: enabled 1
666 17:47:46.002121 PCI: 00:1f.1: enabled 1
667 17:47:46.004848 PCI: 00:1f.2: enabled 1
668 17:47:46.007891 PCI: 00:1f.3: enabled 1
669 17:47:46.010442 PCI: 00:1f.4: enabled 1
670 17:47:46.013058 PCI: 00:1f.5: enabled 1
671 17:47:46.016132 PCI: 00:1f.6: enabled 1
672 17:47:46.017604 Root Device scanning...
673 17:47:46.021735 root_dev_scan_bus for Root Device
674 17:47:46.023832 CPU_CLUSTER: 0 enabled
675 17:47:46.026505 DOMAIN: 0000 enabled
676 17:47:46.028331 DOMAIN: 0000 scanning...
677 17:47:46.031955 PCI: pci_scan_bus for bus 00
678 17:47:46.034921 PCI: 00:00.0 [8086/0000] ops
679 17:47:46.037922 PCI: 00:00.0 [8086/3e35] enabled
680 17:47:46.041086 PCI: 00:02.0 [8086/0000] ops
681 17:47:46.044858 PCI: 00:02.0 [8086/3ea1] enabled
682 17:47:46.048063 PCI: 00:04.0 [8086/1903] enabled
683 17:47:46.051853 PCI: 00:08.0 [8086/1911] enabled
684 17:47:46.054615 PCI: 00:12.0 [8086/9df9] enabled
685 17:47:46.057942 PCI: 00:14.0 [8086/0000] bus ops
686 17:47:46.061855 PCI: 00:14.0 [8086/9ded] enabled
687 17:47:46.064476 PCI: 00:14.2 [8086/9def] enabled
688 17:47:46.067763 PCI: 00:14.3 [8086/9df0] enabled
689 17:47:46.071170 PCI: 00:15.0 [8086/0000] bus ops
690 17:47:46.075008 PCI: 00:15.0 [8086/9de8] enabled
691 17:47:46.077780 PCI: 00:15.1 [8086/0000] bus ops
692 17:47:46.080868 PCI: 00:15.1 [8086/9de9] enabled
693 17:47:46.083708 PCI: 00:16.0 [8086/0000] ops
694 17:47:46.087630 PCI: 00:16.0 [8086/9de0] enabled
695 17:47:46.090108 PCI: 00:17.0 [8086/0000] ops
696 17:47:46.093455 PCI: 00:17.0 [8086/9dd3] enabled
697 17:47:46.096936 PCI: 00:19.0 [8086/0000] bus ops
698 17:47:46.100849 PCI: 00:19.0 [8086/9dc5] enabled
699 17:47:46.103531 PCI: 00:19.2 [8086/0000] ops
700 17:47:46.106457 PCI: 00:19.2 [8086/9dc7] enabled
701 17:47:46.109754 PCI: 00:1c.0 [8086/0000] bus ops
702 17:47:46.113602 PCI: 00:1c.0 [8086/9dbf] enabled
703 17:47:46.118343 PCI: Static device PCI: 00:1c.7 not found, disabling it.
704 17:47:46.122146 PCI: 00:1d.0 [8086/0000] bus ops
705 17:47:46.125495 PCI: 00:1d.0 [8086/9db4] enabled
706 17:47:46.130868 PCI: Static device PCI: 00:1d.1 not found, disabling it.
707 17:47:46.136677 PCI: Static device PCI: 00:1d.4 not found, disabling it.
708 17:47:46.140115 PCI: 00:1f.0 [8086/0000] bus ops
709 17:47:46.143311 PCI: 00:1f.0 [8086/9d84] enabled
710 17:47:46.149616 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 17:47:46.154959 PCI: Static device PCI: 00:1f.2 not found, disabling it.
712 17:47:46.157967 PCI: 00:1f.3 [8086/0000] bus ops
713 17:47:46.161136 PCI: 00:1f.3 [8086/9dc8] enabled
714 17:47:46.164362 PCI: 00:1f.4 [8086/0000] bus ops
715 17:47:46.167440 PCI: 00:1f.4 [8086/9da3] enabled
716 17:47:46.171306 PCI: 00:1f.5 [8086/0000] bus ops
717 17:47:46.174096 PCI: 00:1f.5 [8086/9da4] enabled
718 17:47:46.177492 PCI: 00:1f.6 [8086/15be] enabled
719 17:47:46.180715 PCI: Leftover static devices:
720 17:47:46.182519 PCI: 00:12.5
721 17:47:46.183860 PCI: 00:12.6
722 17:47:46.184654 PCI: 00:13.0
723 17:47:46.186445 PCI: 00:14.1
724 17:47:46.187953 PCI: 00:14.5
725 17:47:46.189322 PCI: 00:15.2
726 17:47:46.190623 PCI: 00:15.3
727 17:47:46.191938 PCI: 00:16.1
728 17:47:46.193217 PCI: 00:16.2
729 17:47:46.194372 PCI: 00:16.3
730 17:47:46.196177 PCI: 00:16.4
731 17:47:46.196943 PCI: 00:16.5
732 17:47:46.198676 PCI: 00:19.1
733 17:47:46.200023 PCI: 00:1a.0
734 17:47:46.201042 PCI: 00:1c.1
735 17:47:46.202397 PCI: 00:1c.2
736 17:47:46.204235 PCI: 00:1c.3
737 17:47:46.205765 PCI: 00:1c.4
738 17:47:46.206524 PCI: 00:1c.5
739 17:47:46.208081 PCI: 00:1c.6
740 17:47:46.209444 PCI: 00:1c.7
741 17:47:46.211248 PCI: 00:1d.1
742 17:47:46.212048 PCI: 00:1d.2
743 17:47:46.213324 PCI: 00:1d.3
744 17:47:46.215190 PCI: 00:1d.4
745 17:47:46.216548 PCI: 00:1e.0
746 17:47:46.217859 PCI: 00:1e.1
747 17:47:46.218584 PCI: 00:1e.2
748 17:47:46.220494 PCI: 00:1e.3
749 17:47:46.221968 PCI: 00:1f.1
750 17:47:46.223109 PCI: 00:1f.2
751 17:47:46.226444 PCI: Check your devicetree.cb.
752 17:47:46.228538 PCI: 00:14.0 scanning...
753 17:47:46.232449 scan_usb_bus for PCI: 00:14.0
754 17:47:46.234460 USB0 port 0 enabled
755 17:47:46.236406 USB0 port 0 scanning...
756 17:47:46.239919 scan_usb_bus for USB0 port 0
757 17:47:46.241716 USB2 port 0 enabled
758 17:47:46.244009 USB2 port 1 enabled
759 17:47:46.245638 USB2 port 2 enabled
760 17:47:46.248554 USB2 port 4 enabled
761 17:47:46.249890 USB2 port 5 enabled
762 17:47:46.252367 USB2 port 6 enabled
763 17:47:46.254337 USB2 port 7 enabled
764 17:47:46.256324 USB2 port 8 enabled
765 17:47:46.258386 USB2 port 9 enabled
766 17:47:46.260191 USB3 port 0 enabled
767 17:47:46.262269 USB3 port 1 enabled
768 17:47:46.264632 USB3 port 2 enabled
769 17:47:46.266444 USB3 port 3 enabled
770 17:47:46.268431 USB3 port 4 enabled
771 17:47:46.271282 USB2 port 0 scanning...
772 17:47:46.273950 scan_usb_bus for USB2 port 0
773 17:47:46.277121 scan_usb_bus for USB2 port 0 done
774 17:47:46.283093 scan_bus: scanning of bus USB2 port 0 took 9063 usecs
775 17:47:46.285387 USB2 port 1 scanning...
776 17:47:46.288555 scan_usb_bus for USB2 port 1
777 17:47:46.292422 scan_usb_bus for USB2 port 1 done
778 17:47:46.297300 scan_bus: scanning of bus USB2 port 1 took 9063 usecs
779 17:47:46.299834 USB2 port 2 scanning...
780 17:47:46.302515 scan_usb_bus for USB2 port 2
781 17:47:46.306954 scan_usb_bus for USB2 port 2 done
782 17:47:46.312203 scan_bus: scanning of bus USB2 port 2 took 9063 usecs
783 17:47:46.314233 USB2 port 4 scanning...
784 17:47:46.317346 scan_usb_bus for USB2 port 4
785 17:47:46.320685 scan_usb_bus for USB2 port 4 done
786 17:47:46.326264 scan_bus: scanning of bus USB2 port 4 took 9062 usecs
787 17:47:46.328962 USB2 port 5 scanning...
788 17:47:46.331548 scan_usb_bus for USB2 port 5
789 17:47:46.335087 scan_usb_bus for USB2 port 5 done
790 17:47:46.340489 scan_bus: scanning of bus USB2 port 5 took 9065 usecs
791 17:47:46.343602 USB2 port 6 scanning...
792 17:47:46.346495 scan_usb_bus for USB2 port 6
793 17:47:46.350072 scan_usb_bus for USB2 port 6 done
794 17:47:46.354480 scan_bus: scanning of bus USB2 port 6 took 9064 usecs
795 17:47:46.357511 USB2 port 7 scanning...
796 17:47:46.360765 scan_usb_bus for USB2 port 7
797 17:47:46.364004 scan_usb_bus for USB2 port 7 done
798 17:47:46.369119 scan_bus: scanning of bus USB2 port 7 took 9062 usecs
799 17:47:46.371423 USB2 port 8 scanning...
800 17:47:46.374968 scan_usb_bus for USB2 port 8
801 17:47:46.378833 scan_usb_bus for USB2 port 8 done
802 17:47:46.384059 scan_bus: scanning of bus USB2 port 8 took 9064 usecs
803 17:47:46.386560 USB2 port 9 scanning...
804 17:47:46.389476 scan_usb_bus for USB2 port 9
805 17:47:46.392618 scan_usb_bus for USB2 port 9 done
806 17:47:46.397829 scan_bus: scanning of bus USB2 port 9 took 9063 usecs
807 17:47:46.400881 USB3 port 0 scanning...
808 17:47:46.403671 scan_usb_bus for USB3 port 0
809 17:47:46.407023 scan_usb_bus for USB3 port 0 done
810 17:47:46.412124 scan_bus: scanning of bus USB3 port 0 took 9063 usecs
811 17:47:46.414830 USB3 port 1 scanning...
812 17:47:46.418239 scan_usb_bus for USB3 port 1
813 17:47:46.421511 scan_usb_bus for USB3 port 1 done
814 17:47:46.426661 scan_bus: scanning of bus USB3 port 1 took 9064 usecs
815 17:47:46.429089 USB3 port 2 scanning...
816 17:47:46.432546 scan_usb_bus for USB3 port 2
817 17:47:46.436102 scan_usb_bus for USB3 port 2 done
818 17:47:46.441789 scan_bus: scanning of bus USB3 port 2 took 9063 usecs
819 17:47:46.443888 USB3 port 3 scanning...
820 17:47:46.447108 scan_usb_bus for USB3 port 3
821 17:47:46.450355 scan_usb_bus for USB3 port 3 done
822 17:47:46.455793 scan_bus: scanning of bus USB3 port 3 took 9057 usecs
823 17:47:46.458153 USB3 port 4 scanning...
824 17:47:46.461677 scan_usb_bus for USB3 port 4
825 17:47:46.464517 scan_usb_bus for USB3 port 4 done
826 17:47:46.470550 scan_bus: scanning of bus USB3 port 4 took 9063 usecs
827 17:47:46.473682 scan_usb_bus for USB0 port 0 done
828 17:47:46.478901 scan_bus: scanning of bus USB0 port 0 took 239367 usecs
829 17:47:46.482694 scan_usb_bus for PCI: 00:14.0 done
830 17:47:46.488175 scan_bus: scanning of bus PCI: 00:14.0 took 256303 usecs
831 17:47:46.490705 PCI: 00:15.0 scanning...
832 17:47:46.494624 scan_generic_bus for PCI: 00:15.0
833 17:47:46.498656 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
834 17:47:46.502733 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
835 17:47:46.506871 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
836 17:47:46.510404 scan_generic_bus for PCI: 00:15.0 done
837 17:47:46.515918 scan_bus: scanning of bus PCI: 00:15.0 took 22389 usecs
838 17:47:46.518284 PCI: 00:15.1 scanning...
839 17:47:46.522380 scan_generic_bus for PCI: 00:15.1
840 17:47:46.526139 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
841 17:47:46.530294 scan_generic_bus for PCI: 00:15.1 done
842 17:47:46.536160 scan_bus: scanning of bus PCI: 00:15.1 took 14216 usecs
843 17:47:46.539037 PCI: 00:19.0 scanning...
844 17:47:46.542189 scan_generic_bus for PCI: 00:19.0
845 17:47:46.545941 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
846 17:47:46.550685 scan_generic_bus for PCI: 00:19.0 done
847 17:47:46.555989 scan_bus: scanning of bus PCI: 00:19.0 took 14216 usecs
848 17:47:46.558197 PCI: 00:1c.0 scanning...
849 17:47:46.562033 do_pci_scan_bridge for PCI: 00:1c.0
850 17:47:46.565258 PCI: pci_scan_bus for bus 01
851 17:47:46.568552 PCI: 01:00.0 [10ec/525a] enabled
852 17:47:46.571219 Capability: type 0x01 @ 0x80
853 17:47:46.574313 Capability: type 0x05 @ 0x90
854 17:47:46.577437 Capability: type 0x10 @ 0xb0
855 17:47:46.580237 Capability: type 0x10 @ 0x40
856 17:47:46.583900 Enabling Common Clock Configuration
857 17:47:46.588619 L1 Sub-State supported from root port 28
858 17:47:46.590724 L1 Sub-State Support = 0xf
859 17:47:46.593902 CommonModeRestoreTime = 0x3c
860 17:47:46.598430 Power On Value = 0x6, Power On Scale = 0x1
861 17:47:46.600275 ASPM: Enabled L0s and L1
862 17:47:46.603917 Capability: type 0x01 @ 0x80
863 17:47:46.606586 Capability: type 0x05 @ 0x90
864 17:47:46.609528 Capability: type 0x10 @ 0xb0
865 17:47:46.614954 scan_bus: scanning of bus PCI: 00:1c.0 took 53677 usecs
866 17:47:46.617237 PCI: 00:1d.0 scanning...
867 17:47:46.621555 do_pci_scan_bridge for PCI: 00:1d.0
868 17:47:46.624086 PCI: pci_scan_bus for bus 02
869 17:47:46.628216 PCI: 02:00.0 [15b7/5004] enabled
870 17:47:46.630401 Capability: type 0x01 @ 0x80
871 17:47:46.633624 Capability: type 0x05 @ 0x90
872 17:47:46.636483 Capability: type 0x11 @ 0xb0
873 17:47:46.639319 Capability: type 0x10 @ 0xc0
874 17:47:46.642359 Capability: type 0x10 @ 0x40
875 17:47:46.645636 Enabling Common Clock Configuration
876 17:47:46.650308 L1 Sub-State supported from root port 29
877 17:47:46.653418 L1 Sub-State Support = 0x5
878 17:47:46.655933 CommonModeRestoreTime = 0xff
879 17:47:46.660117 Power On Value = 0x16, Power On Scale = 0x0
880 17:47:46.661561 ASPM: Enabled L1
881 17:47:46.664492 Capability: type 0x01 @ 0x80
882 17:47:46.667519 Capability: type 0x05 @ 0x90
883 17:47:46.671095 Capability: type 0x11 @ 0xb0
884 17:47:46.673860 Capability: type 0x10 @ 0xc0
885 17:47:46.679965 scan_bus: scanning of bus PCI: 00:1d.0 took 58810 usecs
886 17:47:46.681943 PCI: 00:1f.0 scanning...
887 17:47:46.684831 scan_lpc_bus for PCI: 00:1f.0
888 17:47:46.687806 PNP: 0c09.0 enabled
889 17:47:46.690561 scan_lpc_bus for PCI: 00:1f.0 done
890 17:47:46.696397 scan_bus: scanning of bus PCI: 00:1f.0 took 11397 usecs
891 17:47:46.698726 PCI: 00:1f.3 scanning...
892 17:47:46.704451 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
893 17:47:46.706650 PCI: 00:1f.4 scanning...
894 17:47:46.711051 scan_generic_bus for PCI: 00:1f.4
895 17:47:46.714933 scan_generic_bus for PCI: 00:1f.4 done
896 17:47:46.720188 scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs
897 17:47:46.722759 PCI: 00:1f.5 scanning...
898 17:47:46.726771 scan_generic_bus for PCI: 00:1f.5
899 17:47:46.730898 scan_generic_bus for PCI: 00:1f.5 done
900 17:47:46.735646 scan_bus: scanning of bus PCI: 00:1f.5 took 10131 usecs
901 17:47:46.741758 scan_bus: scanning of bus DOMAIN: 0000 took 709685 usecs
902 17:47:46.745996 root_dev_scan_bus for Root Device done
903 17:47:46.750733 scan_bus: scanning of bus Root Device took 729829 usecs
904 17:47:46.751594 done
905 17:47:46.758486 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
906 17:47:46.764264 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
907 17:47:46.771913 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
908 17:47:46.778384 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
909 17:47:46.782262 SPI flash protection: WPSW=1 SRP0=0
910 17:47:46.786355 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
911 17:47:46.793270 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1126007 exit 34824
912 17:47:46.795861 found VGA at PCI: 00:02.0
913 17:47:46.798545 Setting up VGA for PCI: 00:02.0
914 17:47:46.803998 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
915 17:47:46.809196 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
916 17:47:46.811205 Allocating resources...
917 17:47:46.813621 Reading resources...
918 17:47:46.818267 Root Device read_resources bus 0 link: 0
919 17:47:46.822222 CPU_CLUSTER: 0 read_resources bus 0 link: 0
920 17:47:46.827745 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
921 17:47:46.831671 DOMAIN: 0000 read_resources bus 0 link: 0
922 17:47:46.837782 PCI: 00:14.0 read_resources bus 0 link: 0
923 17:47:46.842306 USB0 port 0 read_resources bus 0 link: 0
924 17:47:46.851850 USB0 port 0 read_resources bus 0 link: 0 done
925 17:47:46.856926 PCI: 00:14.0 read_resources bus 0 link: 0 done
926 17:47:46.862202 PCI: 00:15.0 read_resources bus 1 link: 0
927 17:47:46.868376 PCI: 00:15.0 read_resources bus 1 link: 0 done
928 17:47:46.872682 PCI: 00:15.1 read_resources bus 2 link: 0
929 17:47:46.877712 PCI: 00:15.1 read_resources bus 2 link: 0 done
930 17:47:46.882872 PCI: 00:19.0 read_resources bus 3 link: 0
931 17:47:46.888231 PCI: 00:19.0 read_resources bus 3 link: 0 done
932 17:47:46.893788 PCI: 00:1c.0 read_resources bus 1 link: 0
933 17:47:46.898464 PCI: 00:1c.0 read_resources bus 1 link: 0 done
934 17:47:46.902991 PCI: 00:1d.0 read_resources bus 2 link: 0
935 17:47:46.908165 PCI: 00:1d.0 read_resources bus 2 link: 0 done
936 17:47:46.912879 PCI: 00:1f.0 read_resources bus 0 link: 0
937 17:47:46.918094 PCI: 00:1f.0 read_resources bus 0 link: 0 done
938 17:47:46.924825 DOMAIN: 0000 read_resources bus 0 link: 0 done
939 17:47:46.929551 Root Device read_resources bus 0 link: 0 done
940 17:47:46.932278 Done reading resources.
941 17:47:46.937385 Show resources in subtree (Root Device)...After reading.
942 17:47:46.942230 Root Device child on link 0 CPU_CLUSTER: 0
943 17:47:46.946209 CPU_CLUSTER: 0 child on link 0 APIC: 00
944 17:47:46.947529 APIC: 00
945 17:47:46.948920 APIC: 02
946 17:47:46.953002 DOMAIN: 0000 child on link 0 PCI: 00:00.0
947 17:47:46.962988 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
948 17:47:46.972722 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
949 17:47:46.973552 PCI: 00:00.0
950 17:47:46.983744 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
951 17:47:46.992544 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
952 17:47:47.001867 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
953 17:47:47.011371 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
954 17:47:47.020466 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
955 17:47:47.030171 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
956 17:47:47.039618 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
957 17:47:47.048200 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
958 17:47:47.057342 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
959 17:47:47.066929 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
960 17:47:47.077559 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
961 17:47:47.086812 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
962 17:47:47.095951 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
963 17:47:47.105159 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
964 17:47:47.106937 PCI: 00:02.0
965 17:47:47.116536 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
966 17:47:47.127483 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
967 17:47:47.135788 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
968 17:47:47.136977 PCI: 00:04.0
969 17:47:47.147788 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
970 17:47:47.148566 PCI: 00:08.0
971 17:47:47.158605 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 17:47:47.160361 PCI: 00:12.0
973 17:47:47.170473 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
974 17:47:47.174806 PCI: 00:14.0 child on link 0 USB0 port 0
975 17:47:47.184748 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
976 17:47:47.189374 USB0 port 0 child on link 0 USB2 port 0
977 17:47:47.190633 USB2 port 0
978 17:47:47.192584 USB2 port 1
979 17:47:47.193918 USB2 port 2
980 17:47:47.195913 USB2 port 4
981 17:47:47.197892 USB2 port 5
982 17:47:47.199239 USB2 port 6
983 17:47:47.201234 USB2 port 7
984 17:47:47.203514 USB2 port 8
985 17:47:47.205363 USB2 port 9
986 17:47:47.206420 USB3 port 0
987 17:47:47.208111 USB3 port 1
988 17:47:47.210369 USB3 port 2
989 17:47:47.211547 USB3 port 3
990 17:47:47.214333 USB3 port 4
991 17:47:47.215117 PCI: 00:14.2
992 17:47:47.225722 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
993 17:47:47.235279 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
994 17:47:47.236652 PCI: 00:14.3
995 17:47:47.246635 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
996 17:47:47.251034 PCI: 00:15.0 child on link 0 I2C: 01:10
997 17:47:47.261032 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
998 17:47:47.262359 I2C: 01:10
999 17:47:47.264286 I2C: 01:10
1000 17:47:47.266285 I2C: 01:34
1001 17:47:47.269698 PCI: 00:15.1 child on link 0 I2C: 02:2c
1002 17:47:47.280248 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 17:47:47.281117 I2C: 02:2c
1004 17:47:47.283583 PCI: 00:16.0
1005 17:47:47.293017 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1006 17:47:47.294722 PCI: 00:17.0
1007 17:47:47.303688 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1008 17:47:47.312799 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1009 17:47:47.320604 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1010 17:47:47.329461 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1011 17:47:47.337398 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1012 17:47:47.346758 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1013 17:47:47.350632 PCI: 00:19.0 child on link 0 I2C: 03:50
1014 17:47:47.361594 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 17:47:47.370323 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1016 17:47:47.372745 I2C: 03:50
1017 17:47:47.373614 PCI: 00:19.2
1018 17:47:47.385380 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 17:47:47.395351 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 17:47:47.399325 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1021 17:47:47.407815 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1022 17:47:47.418059 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1023 17:47:47.426776 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1024 17:47:47.428671 PCI: 01:00.0
1025 17:47:47.438426 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1026 17:47:47.442044 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1027 17:47:47.451524 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1028 17:47:47.461320 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1029 17:47:47.470335 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1030 17:47:47.471197 PCI: 02:00.0
1031 17:47:47.481570 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1032 17:47:47.486020 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1033 17:47:47.495092 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1034 17:47:47.503661 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1035 17:47:47.505109 PNP: 0c09.0
1036 17:47:47.513638 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1037 17:47:47.522558 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1038 17:47:47.531498 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1039 17:47:47.532268 PCI: 00:1f.3
1040 17:47:47.542575 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1041 17:47:47.552386 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1042 17:47:47.554222 PCI: 00:1f.4
1043 17:47:47.563684 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1044 17:47:47.573282 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1045 17:47:47.574626 PCI: 00:1f.5
1046 17:47:47.584368 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 17:47:47.585573 PCI: 00:1f.6
1048 17:47:47.595332 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1049 17:47:47.600890 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 17:47:47.607923 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1051 17:47:47.613942 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1052 17:47:47.620689 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1053 17:47:47.627230 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1054 17:47:47.630893 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1055 17:47:47.634506 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1056 17:47:47.638270 PCI: 00:17.0 18 * [0x60 - 0x67] io
1057 17:47:47.642142 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1058 17:47:47.648544 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1059 17:47:47.654721 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1060 17:47:47.663760 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1061 17:47:47.671804 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1062 17:47:47.678286 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1063 17:47:47.682131 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1064 17:47:47.689650 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1065 17:47:47.698283 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1066 17:47:47.706754 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1067 17:47:47.713158 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1068 17:47:47.717276 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1069 17:47:47.725121 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1070 17:47:47.729690 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1071 17:47:47.734840 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1072 17:47:47.738975 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1073 17:47:47.744861 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1074 17:47:47.749049 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1075 17:47:47.753761 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1076 17:47:47.759261 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1077 17:47:47.763618 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1078 17:47:47.768502 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1079 17:47:47.773668 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1080 17:47:47.778279 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1081 17:47:47.782887 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1082 17:47:47.787830 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1083 17:47:47.792446 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1084 17:47:47.797824 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1085 17:47:47.802729 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1086 17:47:47.807438 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1087 17:47:47.812337 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1088 17:47:47.816726 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1089 17:47:47.821608 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1090 17:47:47.826402 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1091 17:47:47.831879 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1092 17:47:47.837025 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1093 17:47:47.841100 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1094 17:47:47.846194 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1095 17:47:47.854443 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1096 17:47:47.858855 avoid_fixed_resources: DOMAIN: 0000
1097 17:47:47.864740 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1098 17:47:47.870423 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1099 17:47:47.878281 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1100 17:47:47.885429 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1101 17:47:47.893101 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1102 17:47:47.900963 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1103 17:47:47.908870 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1104 17:47:47.916118 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1105 17:47:47.923868 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1106 17:47:47.931107 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1107 17:47:47.938464 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1108 17:47:47.946154 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1109 17:47:47.947948 Setting resources...
1110 17:47:47.954373 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1111 17:47:47.958877 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1112 17:47:47.962735 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1113 17:47:47.966600 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1114 17:47:47.970542 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1115 17:47:47.977166 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1116 17:47:47.982507 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1117 17:47:47.989680 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1118 17:47:47.995716 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1119 17:47:48.001459 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1120 17:47:48.009577 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1121 17:47:48.014637 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1122 17:47:48.019529 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1123 17:47:48.024435 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1124 17:47:48.029594 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1125 17:47:48.033761 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1126 17:47:48.039389 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1127 17:47:48.043236 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1128 17:47:48.048556 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1129 17:47:48.053256 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1130 17:47:48.058342 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1131 17:47:48.063178 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1132 17:47:48.067950 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1133 17:47:48.073054 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1134 17:47:48.078297 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1135 17:47:48.082885 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1136 17:47:48.087080 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1137 17:47:48.091974 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1138 17:47:48.096866 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1139 17:47:48.102247 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1140 17:47:48.107553 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1141 17:47:48.111973 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1142 17:47:48.116834 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1143 17:47:48.121682 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1144 17:47:48.126356 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1145 17:47:48.130970 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1146 17:47:48.138699 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1147 17:47:48.146019 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1148 17:47:48.153681 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1149 17:47:48.160560 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1150 17:47:48.166223 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1151 17:47:48.173327 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1152 17:47:48.180532 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1153 17:47:48.187543 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1154 17:47:48.195397 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1155 17:47:48.200527 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1156 17:47:48.207464 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1157 17:47:48.211870 Root Device assign_resources, bus 0 link: 0
1158 17:47:48.216670 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 17:47:48.224971 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1160 17:47:48.234211 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1161 17:47:48.241385 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1162 17:47:48.249702 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1163 17:47:48.257688 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1164 17:47:48.265943 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1165 17:47:48.273953 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1166 17:47:48.279202 PCI: 00:14.0 assign_resources, bus 0 link: 0
1167 17:47:48.283925 PCI: 00:14.0 assign_resources, bus 0 link: 0
1168 17:47:48.291764 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1169 17:47:48.299602 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1170 17:47:48.308030 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1171 17:47:48.316693 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1172 17:47:48.320704 PCI: 00:15.0 assign_resources, bus 1 link: 0
1173 17:47:48.326395 PCI: 00:15.0 assign_resources, bus 1 link: 0
1174 17:47:48.334167 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1175 17:47:48.338211 PCI: 00:15.1 assign_resources, bus 2 link: 0
1176 17:47:48.343794 PCI: 00:15.1 assign_resources, bus 2 link: 0
1177 17:47:48.351718 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1178 17:47:48.360018 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1179 17:47:48.367819 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1180 17:47:48.375644 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1181 17:47:48.382514 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1182 17:47:48.390917 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1183 17:47:48.398324 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1184 17:47:48.406527 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1185 17:47:48.415100 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1186 17:47:48.418761 PCI: 00:19.0 assign_resources, bus 3 link: 0
1187 17:47:48.423667 PCI: 00:19.0 assign_resources, bus 3 link: 0
1188 17:47:48.431770 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1189 17:47:48.440830 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1190 17:47:48.449706 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1191 17:47:48.458389 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1192 17:47:48.462074 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1193 17:47:48.470477 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1194 17:47:48.475476 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1195 17:47:48.483599 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1196 17:47:48.492890 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1197 17:47:48.501217 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1198 17:47:48.505640 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1199 17:47:48.514921 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1200 17:47:48.519014 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1201 17:47:48.523666 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1202 17:47:48.528972 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1203 17:47:48.533827 LPC: Trying to open IO window from 930 size 8
1204 17:47:48.538155 LPC: Trying to open IO window from 940 size 8
1205 17:47:48.542431 LPC: Trying to open IO window from 950 size 10
1206 17:47:48.550629 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1207 17:47:48.558641 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1208 17:47:48.567298 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1209 17:47:48.575147 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1210 17:47:48.583076 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1211 17:47:48.587783 DOMAIN: 0000 assign_resources, bus 0 link: 0
1212 17:47:48.592592 Root Device assign_resources, bus 0 link: 0
1213 17:47:48.595332 Done setting resources.
1214 17:47:48.601965 Show resources in subtree (Root Device)...After assigning values.
1215 17:47:48.606180 Root Device child on link 0 CPU_CLUSTER: 0
1216 17:47:48.610328 CPU_CLUSTER: 0 child on link 0 APIC: 00
1217 17:47:48.611736 APIC: 00
1218 17:47:48.612527 APIC: 02
1219 17:47:48.617041 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1220 17:47:48.627232 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1221 17:47:48.638068 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1222 17:47:48.639397 PCI: 00:00.0
1223 17:47:48.649363 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 17:47:48.659038 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1225 17:47:48.668411 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1226 17:47:48.677348 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1227 17:47:48.686406 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1228 17:47:48.695677 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1229 17:47:48.705126 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1230 17:47:48.714469 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1231 17:47:48.723370 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1232 17:47:48.733489 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1233 17:47:48.742281 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1234 17:47:48.752398 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1235 17:47:48.762104 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1236 17:47:48.770580 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1237 17:47:48.772966 PCI: 00:02.0
1238 17:47:48.783667 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1239 17:47:48.793652 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1240 17:47:48.803129 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1241 17:47:48.804657 PCI: 00:04.0
1242 17:47:48.814732 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1243 17:47:48.817051 PCI: 00:08.0
1244 17:47:48.827090 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1245 17:47:48.828882 PCI: 00:12.0
1246 17:47:48.838402 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1247 17:47:48.843154 PCI: 00:14.0 child on link 0 USB0 port 0
1248 17:47:48.853785 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1249 17:47:48.857709 USB0 port 0 child on link 0 USB2 port 0
1250 17:47:48.860268 USB2 port 0
1251 17:47:48.861006 USB2 port 1
1252 17:47:48.863177 USB2 port 2
1253 17:47:48.865154 USB2 port 4
1254 17:47:48.866526 USB2 port 5
1255 17:47:48.868912 USB2 port 6
1256 17:47:48.870559 USB2 port 7
1257 17:47:48.871718 USB2 port 8
1258 17:47:48.873768 USB2 port 9
1259 17:47:48.875609 USB3 port 0
1260 17:47:48.877471 USB3 port 1
1261 17:47:48.878936 USB3 port 2
1262 17:47:48.880881 USB3 port 3
1263 17:47:48.882260 USB3 port 4
1264 17:47:48.884290 PCI: 00:14.2
1265 17:47:48.894288 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1266 17:47:48.905407 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1267 17:47:48.906598 PCI: 00:14.3
1268 17:47:48.916384 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1269 17:47:48.921204 PCI: 00:15.0 child on link 0 I2C: 01:10
1270 17:47:48.931600 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1271 17:47:48.933096 I2C: 01:10
1272 17:47:48.934340 I2C: 01:10
1273 17:47:48.936108 I2C: 01:34
1274 17:47:48.940392 PCI: 00:15.1 child on link 0 I2C: 02:2c
1275 17:47:48.950964 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1276 17:47:48.952193 I2C: 02:2c
1277 17:47:48.954040 PCI: 00:16.0
1278 17:47:48.963987 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1279 17:47:48.965468 PCI: 00:17.0
1280 17:47:48.976586 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1281 17:47:48.986182 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1282 17:47:48.995002 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1283 17:47:49.004189 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1284 17:47:49.014030 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1285 17:47:49.023115 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1286 17:47:49.027667 PCI: 00:19.0 child on link 0 I2C: 03:50
1287 17:47:49.038554 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1288 17:47:49.048171 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1289 17:47:49.049721 I2C: 03:50
1290 17:47:49.051675 PCI: 00:19.2
1291 17:47:49.062901 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1292 17:47:49.072732 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1293 17:47:49.077054 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1294 17:47:49.086707 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1295 17:47:49.097137 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1296 17:47:49.107066 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1297 17:47:49.109310 PCI: 01:00.0
1298 17:47:49.119205 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1299 17:47:49.124378 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1300 17:47:49.132739 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1301 17:47:49.142801 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1302 17:47:49.153687 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1303 17:47:49.155127 PCI: 02:00.0
1304 17:47:49.165373 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1305 17:47:49.170580 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1306 17:47:49.178838 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1307 17:47:49.188187 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1308 17:47:49.189264 PNP: 0c09.0
1309 17:47:49.198032 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1310 17:47:49.206246 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1311 17:47:49.215236 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1312 17:47:49.217301 PCI: 00:1f.3
1313 17:47:49.226935 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1314 17:47:49.237607 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1315 17:47:49.239561 PCI: 00:1f.4
1316 17:47:49.248027 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1317 17:47:49.258467 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1318 17:47:49.259902 PCI: 00:1f.5
1319 17:47:49.270554 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1320 17:47:49.271575 PCI: 00:1f.6
1321 17:47:49.282186 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1322 17:47:49.284613 Done allocating resources.
1323 17:47:49.291186 BS: BS_DEV_RESOURCES times (us): entry 0 run 2492116 exit 13
1324 17:47:49.294067 Enabling resources...
1325 17:47:49.298511 PCI: 00:00.0 subsystem <- 1028/3e35
1326 17:47:49.300987 PCI: 00:00.0 cmd <- 06
1327 17:47:49.304398 PCI: 00:02.0 subsystem <- 1028/3ea1
1328 17:47:49.307166 PCI: 00:02.0 cmd <- 03
1329 17:47:49.310493 PCI: 00:04.0 subsystem <- 1028/1903
1330 17:47:49.313268 PCI: 00:04.0 cmd <- 02
1331 17:47:49.316232 PCI: 00:08.0 cmd <- 06
1332 17:47:49.319674 PCI: 00:12.0 subsystem <- 1028/9df9
1333 17:47:49.322536 PCI: 00:12.0 cmd <- 02
1334 17:47:49.326073 PCI: 00:14.0 subsystem <- 1028/9ded
1335 17:47:49.328102 PCI: 00:14.0 cmd <- 02
1336 17:47:49.331285 PCI: 00:14.2 cmd <- 02
1337 17:47:49.334733 PCI: 00:14.3 subsystem <- 1028/9df0
1338 17:47:49.337894 PCI: 00:14.3 cmd <- 02
1339 17:47:49.341569 PCI: 00:15.0 subsystem <- 1028/9de8
1340 17:47:49.343674 PCI: 00:15.0 cmd <- 02
1341 17:47:49.347673 PCI: 00:15.1 subsystem <- 1028/9de9
1342 17:47:49.349427 PCI: 00:15.1 cmd <- 02
1343 17:47:49.353905 PCI: 00:16.0 subsystem <- 1028/9de0
1344 17:47:49.356593 PCI: 00:16.0 cmd <- 02
1345 17:47:49.360056 PCI: 00:17.0 subsystem <- 1028/9dd3
1346 17:47:49.362081 PCI: 00:17.0 cmd <- 03
1347 17:47:49.366763 PCI: 00:19.0 subsystem <- 1028/9dc5
1348 17:47:49.368686 PCI: 00:19.0 cmd <- 06
1349 17:47:49.372205 PCI: 00:19.2 subsystem <- 1028/9dc7
1350 17:47:49.374502 PCI: 00:19.2 cmd <- 06
1351 17:47:49.378816 PCI: 00:1c.0 bridge ctrl <- 0003
1352 17:47:49.382090 PCI: 00:1c.0 subsystem <- 1028/9dbf
1353 17:47:49.384877 Capability: type 0x10 @ 0x40
1354 17:47:49.387553 Capability: type 0x05 @ 0x80
1355 17:47:49.390873 Capability: type 0x0d @ 0x90
1356 17:47:49.392686 PCI: 00:1c.0 cmd <- 06
1357 17:47:49.396706 PCI: 00:1d.0 bridge ctrl <- 0003
1358 17:47:49.399802 PCI: 00:1d.0 subsystem <- 1028/9db4
1359 17:47:49.403210 Capability: type 0x10 @ 0x40
1360 17:47:49.406087 Capability: type 0x05 @ 0x80
1361 17:47:49.408569 Capability: type 0x0d @ 0x90
1362 17:47:49.412018 PCI: 00:1d.0 cmd <- 06
1363 17:47:49.415081 PCI: 00:1f.0 subsystem <- 1028/9d84
1364 17:47:49.417946 PCI: 00:1f.0 cmd <- 407
1365 17:47:49.422263 PCI: 00:1f.3 subsystem <- 1028/9dc8
1366 17:47:49.424786 PCI: 00:1f.3 cmd <- 02
1367 17:47:49.428595 PCI: 00:1f.4 subsystem <- 1028/9da3
1368 17:47:49.430901 PCI: 00:1f.4 cmd <- 03
1369 17:47:49.434475 PCI: 00:1f.5 subsystem <- 1028/9da4
1370 17:47:49.436922 PCI: 00:1f.5 cmd <- 406
1371 17:47:49.440414 PCI: 00:1f.6 subsystem <- 1028/15be
1372 17:47:49.442994 PCI: 00:1f.6 cmd <- 02
1373 17:47:49.453057 PCI: 01:00.0 cmd <- 02
1374 17:47:49.456364 PCI: 02:00.0 cmd <- 02
1375 17:47:49.458649 done.
1376 17:47:49.464934 BS: BS_DEV_ENABLE times (us): entry 384 run 167109 exit 0
1377 17:47:49.466851 Initializing devices...
1378 17:47:49.469564 Root Device init ...
1379 17:47:49.473563 Root Device init finished in 2139 usecs
1380 17:47:49.475672 CPU_CLUSTER: 0 init ...
1381 17:47:49.479967 CPU_CLUSTER: 0 init finished in 2430 usecs
1382 17:47:49.484212 PCI: 00:00.0 init ...
1383 17:47:49.486798 CPU TDP: 15 Watts
1384 17:47:49.489203 CPU PL2 = 51 Watts
1385 17:47:49.492625 PCI: 00:00.0 init finished in 7037 usecs
1386 17:47:49.495401 PCI: 00:02.0 init ...
1387 17:47:49.500379 PCI: 00:02.0 init finished in 2236 usecs
1388 17:47:49.502445 PCI: 00:04.0 init ...
1389 17:47:49.506087 PCI: 00:04.0 init finished in 2235 usecs
1390 17:47:49.509688 PCI: 00:08.0 init ...
1391 17:47:49.513106 PCI: 00:08.0 init finished in 2235 usecs
1392 17:47:49.515718 PCI: 00:12.0 init ...
1393 17:47:49.520066 PCI: 00:12.0 init finished in 2235 usecs
1394 17:47:49.522556 PCI: 00:14.0 init ...
1395 17:47:49.526698 PCI: 00:14.0 init finished in 2235 usecs
1396 17:47:49.529334 PCI: 00:14.2 init ...
1397 17:47:49.533264 PCI: 00:14.2 init finished in 2235 usecs
1398 17:47:49.536585 PCI: 00:14.3 init ...
1399 17:47:49.540559 PCI: 00:14.3 init finished in 2241 usecs
1400 17:47:49.542509 PCI: 00:15.0 init ...
1401 17:47:49.546534 DW I2C bus 0 at 0xd1347000 (400 KHz)
1402 17:47:49.550301 PCI: 00:15.0 init finished in 5934 usecs
1403 17:47:49.552911 PCI: 00:15.1 init ...
1404 17:47:49.557126 DW I2C bus 1 at 0xd1348000 (400 KHz)
1405 17:47:49.561248 PCI: 00:15.1 init finished in 5933 usecs
1406 17:47:49.563838 PCI: 00:16.0 init ...
1407 17:47:49.567343 PCI: 00:16.0 init finished in 2237 usecs
1408 17:47:49.570368 PCI: 00:19.0 init ...
1409 17:47:49.574295 DW I2C bus 4 at 0xd134a000 (400 KHz)
1410 17:47:49.578059 PCI: 00:19.0 init finished in 5934 usecs
1411 17:47:49.581150 PCI: 00:1c.0 init ...
1412 17:47:49.584467 Initializing PCH PCIe bridge.
1413 17:47:49.588588 PCI: 00:1c.0 init finished in 5240 usecs
1414 17:47:49.590976 PCI: 00:1d.0 init ...
1415 17:47:49.594013 Initializing PCH PCIe bridge.
1416 17:47:49.598266 PCI: 00:1d.0 init finished in 5248 usecs
1417 17:47:49.600872 PCI: 00:1f.0 init ...
1418 17:47:49.605928 IOAPIC: Initializing IOAPIC at 0xfec00000
1419 17:47:49.609445 IOAPIC: Bootstrap Processor Local APIC = 0x00
1420 17:47:49.611305 IOAPIC: ID = 0x02
1421 17:47:49.614824 IOAPIC: Dumping registers
1422 17:47:49.616876 reg 0x0000: 0x02000000
1423 17:47:49.619608 reg 0x0001: 0x00770020
1424 17:47:49.622278 reg 0x0002: 0x00000000
1425 17:47:49.626031 PCI: 00:1f.0 init finished in 23320 usecs
1426 17:47:49.628683 PCI: 00:1f.3 init ...
1427 17:47:49.634199 HDA: codec_mask = 05
1428 17:47:49.646350 HDA: Initializing codec #2
1429 17:47:49.646457 HDA: codec viddid: 8086280b
1430 17:47:49.646550 HDA: No verb table entry found
1431 17:47:49.646640 HDA: Initializing codec #0
1432 17:47:49.648283 HDA: codec viddid: 10ec0236
1433 17:47:49.655315 HDA: verb loaded.
1434 17:47:49.659451 PCI: 00:1f.3 init finished in 28838 usecs
1435 17:47:49.662637 PCI: 00:1f.4 init ...
1436 17:47:49.667295 PCI: 00:1f.4 init finished in 2247 usecs
1437 17:47:49.670375 PCI: 00:1f.6 init ...
1438 17:47:49.673389 PCI: 00:1f.6 init finished in 2236 usecs
1439 17:47:49.684086 PCI: 01:00.0 init ...
1440 17:47:49.688562 PCI: 01:00.0 init finished in 2236 usecs
1441 17:47:49.691598 PCI: 02:00.0 init ...
1442 17:47:49.695415 PCI: 02:00.0 init finished in 2235 usecs
1443 17:47:49.697844 PNP: 0c09.0 init ...
1444 17:47:49.701571 EC Label : 00.00.20
1445 17:47:49.705436 EC Revision : 9ca674bba
1446 17:47:49.708775 EC Model Num : 08B9
1447 17:47:49.712670 EC Build Date : 05/10/19
1448 17:47:49.721712 PNP: 0c09.0 init finished in 21748 usecs
1449 17:47:49.723475 Devices initialized
1450 17:47:49.726655 Show all devs... After init.
1451 17:47:49.729158 Root Device: enabled 1
1452 17:47:49.732451 CPU_CLUSTER: 0: enabled 1
1453 17:47:49.734296 DOMAIN: 0000: enabled 1
1454 17:47:49.736373 APIC: 00: enabled 1
1455 17:47:49.739029 PCI: 00:00.0: enabled 1
1456 17:47:49.741094 PCI: 00:02.0: enabled 1
1457 17:47:49.743962 PCI: 00:04.0: enabled 1
1458 17:47:49.746542 PCI: 00:12.0: enabled 1
1459 17:47:49.748035 PCI: 00:12.5: enabled 0
1460 17:47:49.750621 PCI: 00:12.6: enabled 0
1461 17:47:49.753267 PCI: 00:13.0: enabled 0
1462 17:47:49.755403 PCI: 00:14.0: enabled 1
1463 17:47:49.757998 PCI: 00:14.1: enabled 0
1464 17:47:49.760770 PCI: 00:14.3: enabled 1
1465 17:47:49.762638 PCI: 00:14.5: enabled 0
1466 17:47:49.765310 PCI: 00:15.0: enabled 1
1467 17:47:49.767662 PCI: 00:15.1: enabled 1
1468 17:47:49.770261 PCI: 00:15.2: enabled 0
1469 17:47:49.772495 PCI: 00:15.3: enabled 0
1470 17:47:49.775520 PCI: 00:16.0: enabled 1
1471 17:47:49.777734 PCI: 00:16.1: enabled 0
1472 17:47:49.780133 PCI: 00:16.2: enabled 0
1473 17:47:49.782415 PCI: 00:16.3: enabled 0
1474 17:47:49.784912 PCI: 00:16.4: enabled 0
1475 17:47:49.788010 PCI: 00:16.5: enabled 0
1476 17:47:49.789988 PCI: 00:17.0: enabled 1
1477 17:47:49.792190 PCI: 00:19.0: enabled 1
1478 17:47:49.794730 PCI: 00:19.1: enabled 0
1479 17:47:49.797054 PCI: 00:19.2: enabled 1
1480 17:47:49.799037 PCI: 00:1a.0: enabled 0
1481 17:47:49.801703 PCI: 00:1c.0: enabled 1
1482 17:47:49.804823 PCI: 00:1c.1: enabled 0
1483 17:47:49.806365 PCI: 00:1c.2: enabled 0
1484 17:47:49.809030 PCI: 00:1c.3: enabled 0
1485 17:47:49.811189 PCI: 00:1c.4: enabled 0
1486 17:47:49.813917 PCI: 00:1c.5: enabled 0
1487 17:47:49.816399 PCI: 00:1c.6: enabled 0
1488 17:47:49.818431 PCI: 00:1c.7: enabled 0
1489 17:47:49.821054 PCI: 00:1d.0: enabled 1
1490 17:47:49.823537 PCI: 00:1d.1: enabled 0
1491 17:47:49.826510 PCI: 00:1d.2: enabled 0
1492 17:47:49.828935 PCI: 00:1d.3: enabled 0
1493 17:47:49.830607 PCI: 00:1d.4: enabled 0
1494 17:47:49.833681 PCI: 00:1e.0: enabled 0
1495 17:47:49.835671 PCI: 00:1e.1: enabled 0
1496 17:47:49.838521 PCI: 00:1e.2: enabled 0
1497 17:47:49.840937 PCI: 00:1e.3: enabled 0
1498 17:47:49.843384 PCI: 00:1f.0: enabled 1
1499 17:47:49.845327 PCI: 00:1f.1: enabled 0
1500 17:47:49.847979 PCI: 00:1f.2: enabled 0
1501 17:47:49.850425 PCI: 00:1f.3: enabled 1
1502 17:47:49.853155 PCI: 00:1f.4: enabled 1
1503 17:47:49.855423 PCI: 00:1f.5: enabled 1
1504 17:47:49.857899 PCI: 00:1f.6: enabled 1
1505 17:47:49.860052 USB0 port 0: enabled 1
1506 17:47:49.862046 I2C: 01:10: enabled 1
1507 17:47:49.864160 I2C: 01:10: enabled 1
1508 17:47:49.866748 I2C: 01:34: enabled 1
1509 17:47:49.869549 I2C: 02:2c: enabled 1
1510 17:47:49.871533 I2C: 03:50: enabled 1
1511 17:47:49.873131 PNP: 0c09.0: enabled 1
1512 17:47:49.875771 USB2 port 0: enabled 1
1513 17:47:49.878340 USB2 port 1: enabled 1
1514 17:47:49.881036 USB2 port 2: enabled 1
1515 17:47:49.882621 USB2 port 4: enabled 1
1516 17:47:49.885707 USB2 port 5: enabled 1
1517 17:47:49.887226 USB2 port 6: enabled 1
1518 17:47:49.890527 USB2 port 7: enabled 1
1519 17:47:49.892976 USB2 port 8: enabled 1
1520 17:47:49.894715 USB2 port 9: enabled 1
1521 17:47:49.897437 USB3 port 0: enabled 1
1522 17:47:49.898956 USB3 port 1: enabled 1
1523 17:47:49.901604 USB3 port 2: enabled 1
1524 17:47:49.903686 USB3 port 3: enabled 1
1525 17:47:49.906939 USB3 port 4: enabled 1
1526 17:47:49.908244 APIC: 02: enabled 1
1527 17:47:49.910438 PCI: 00:08.0: enabled 1
1528 17:47:49.913115 PCI: 00:14.2: enabled 1
1529 17:47:49.915208 PCI: 01:00.0: enabled 1
1530 17:47:49.918067 PCI: 02:00.0: enabled 1
1531 17:47:49.922869 Disabling ACPI via APMC:
1532 17:47:49.925261 done.
1533 17:47:49.929852 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1534 17:47:49.934146 ELOG: NV offset 0x1bf0000 size 0x4000
1535 17:47:49.941491 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1536 17:47:49.948571 ELOG: Event(17) added with size 13 at 2023-10-09 17:46:17 UTC
1537 17:47:49.953574 POST: Unexpected post code in previous boot: 0x73
1538 17:47:49.959378 ELOG: Event(A3) added with size 11 at 2023-10-09 17:46:17 UTC
1539 17:47:49.965987 ELOG: Event(92) added with size 9 at 2023-10-09 17:46:17 UTC
1540 17:47:49.971689 ELOG: Event(93) added with size 9 at 2023-10-09 17:46:17 UTC
1541 17:47:49.977760 ELOG: Event(9A) added with size 9 at 2023-10-09 17:46:17 UTC
1542 17:47:49.984108 ELOG: Event(9E) added with size 10 at 2023-10-09 17:46:17 UTC
1543 17:47:49.990451 ELOG: Event(9F) added with size 14 at 2023-10-09 17:46:17 UTC
1544 17:47:49.996658 BS: BS_DEV_INIT times (us): entry 0 run 453552 exit 72538
1545 17:47:50.003529 ELOG: Event(A1) added with size 10 at 2023-10-09 17:46:17 UTC
1546 17:47:50.011215 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1547 17:47:50.016715 ELOG: Event(A0) added with size 9 at 2023-10-09 17:46:17 UTC
1548 17:47:50.021493 elog_add_boot_reason: Logged dev mode boot
1549 17:47:50.023507 Finalize devices...
1550 17:47:50.026373 PCI: 00:17.0 final
1551 17:47:50.027197 Devices finalized
1552 17:47:50.032657 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1553 17:47:50.038673 BS: BS_POST_DEVICE times (us): entry 24778 run 5938 exit 5369
1554 17:47:50.044658 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1555 17:47:50.053135 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1556 17:47:50.057392 disable_unused_touchscreen: Disable ACPI0C50
1557 17:47:50.062077 disable_unused_touchscreen: Enable ELAN900C
1558 17:47:50.064711 CBFS @ 1d00000 size 300000
1559 17:47:50.071090 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1560 17:47:50.074757 CBFS: Locating 'fallback/dsdt.aml'
1561 17:47:50.079061 CBFS: Found @ offset 10b200 size 4448
1562 17:47:50.081056 CBFS @ 1d00000 size 300000
1563 17:47:50.087694 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1564 17:47:50.091011 CBFS: Locating 'fallback/slic'
1565 17:47:50.096148 CBFS: 'fallback/slic' not found.
1566 17:47:50.099670 ACPI: Writing ACPI tables at 89c0f000.
1567 17:47:50.101025 ACPI: * FACS
1568 17:47:50.102839 ACPI: * DSDT
1569 17:47:50.106642 Ramoops buffer: 0x100000@0x89b0e000.
1570 17:47:50.112307 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1571 17:47:50.116598 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1572 17:47:50.119924 ACPI: * FADT
1573 17:47:50.121357 SCI is IRQ9
1574 17:47:50.125674 ACPI: added table 1/32, length now 40
1575 17:47:50.126458 ACPI: * SSDT
1576 17:47:50.130452 Found 1 CPU(s) with 2 core(s) each.
1577 17:47:50.135330 Error: Could not locate 'wifi_sar' in VPD.
1578 17:47:50.138263 Error: failed from getting SAR limits!
1579 17:47:50.142351 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1580 17:47:50.146290 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1581 17:47:50.150785 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1582 17:47:50.154968 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1583 17:47:50.160013 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1584 17:47:50.164993 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1585 17:47:50.170294 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1586 17:47:50.175203 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1587 17:47:50.180112 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1588 17:47:50.186814 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1589 17:47:50.192296 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1590 17:47:50.197782 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1591 17:47:50.202607 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1592 17:47:50.207595 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1593 17:47:50.211816 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1594 17:47:50.216792 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1595 17:47:50.221877 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1596 17:47:50.227544 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1597 17:47:50.233516 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1598 17:47:50.239389 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1599 17:47:50.245358 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1600 17:47:50.250138 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1601 17:47:50.254400 ACPI: added table 2/32, length now 44
1602 17:47:50.255884 ACPI: * MCFG
1603 17:47:50.259914 ACPI: added table 3/32, length now 48
1604 17:47:50.261210 ACPI: * TPM2
1605 17:47:50.264587 TPM2 log created at 89afe000
1606 17:47:50.268120 ACPI: added table 4/32, length now 52
1607 17:47:50.269465 ACPI: * MADT
1608 17:47:50.270438 SCI is IRQ9
1609 17:47:50.274340 ACPI: added table 5/32, length now 56
1610 17:47:50.276046 current = 89c14720
1611 17:47:50.278997 ACPI: * IGD OpRegion
1612 17:47:50.281049 GMA: Found VBT in CBFS
1613 17:47:50.284298 GMA: Found valid VBT in CBFS
1614 17:47:50.287767 ACPI: added table 6/32, length now 60
1615 17:47:50.290306 ACPI: * HPET
1616 17:47:50.293564 ACPI: added table 7/32, length now 64
1617 17:47:50.294251 ACPI: done.
1618 17:47:50.296964 ACPI tables: 30672 bytes.
1619 17:47:50.300497 smbios_write_tables: 89afd000
1620 17:47:50.303240 recv_ec_data: 0x01
1621 17:47:50.304745 Create SMBIOS type 17
1622 17:47:50.307206 PCI: 00:14.3 (Intel WiFi)
1623 17:47:50.309863 SMBIOS tables: 708 bytes.
1624 17:47:50.314329 Writing table forward entry at 0x00000500
1625 17:47:50.320400 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1626 17:47:50.324086 Writing coreboot table at 0x89c33000
1627 17:47:50.330296 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1628 17:47:50.334847 1. 0000000000001000-000000000009ffff: RAM
1629 17:47:50.338897 2. 00000000000a0000-00000000000fffff: RESERVED
1630 17:47:50.342924 3. 0000000000100000-0000000089afcfff: RAM
1631 17:47:50.349001 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1632 17:47:50.353530 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1633 17:47:50.359868 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1634 17:47:50.364717 7. 000000008a000000-000000008f7fffff: RESERVED
1635 17:47:50.369366 8. 00000000e0000000-00000000efffffff: RESERVED
1636 17:47:50.374021 9. 00000000fc000000-00000000fc000fff: RESERVED
1637 17:47:50.378707 10. 00000000fe000000-00000000fe00ffff: RESERVED
1638 17:47:50.383790 11. 00000000fed10000-00000000fed17fff: RESERVED
1639 17:47:50.388598 12. 00000000fed80000-00000000fed83fff: RESERVED
1640 17:47:50.393306 13. 00000000feda0000-00000000feda1fff: RESERVED
1641 17:47:50.397216 14. 0000000100000000-000000016e7fffff: RAM
1642 17:47:50.401922 Graphics framebuffer located at 0xc0000000
1643 17:47:50.404821 Passing 6 GPIOs to payload:
1644 17:47:50.409522 NAME | PORT | POLARITY | VALUE
1645 17:47:50.414935 write protect | 0x000000dc | high | high
1646 17:47:50.420764 recovery | 0x000000d5 | low | high
1647 17:47:50.425394 lid | undefined | high | high
1648 17:47:50.431438 power | undefined | high | low
1649 17:47:50.435575 oprom | undefined | high | low
1650 17:47:50.441314 EC in RW | undefined | high | low
1651 17:47:50.443950 recv_ec_data: 0x01
1652 17:47:50.444636 SKU ID: 3
1653 17:47:50.447450 CBFS @ 1d00000 size 300000
1654 17:47:50.454303 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1655 17:47:50.460266 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 2d88
1656 17:47:50.463092 coreboot table: 1484 bytes.
1657 17:47:50.465877 IMD ROOT 0. 89fff000 00001000
1658 17:47:50.469017 IMD SMALL 1. 89ffe000 00001000
1659 17:47:50.472699 FSP MEMORY 2. 89d0e000 002f0000
1660 17:47:50.475680 CONSOLE 3. 89cee000 00020000
1661 17:47:50.479058 TIME STAMP 4. 89ced000 00000910
1662 17:47:50.482513 VBOOT WORK 5. 89cea000 00003000
1663 17:47:50.485446 VBOOT 6. 89ce9000 00000c0c
1664 17:47:50.489187 MRC DATA 7. 89ce7000 000018f0
1665 17:47:50.492634 ROMSTG STCK 8. 89ce6000 00000400
1666 17:47:50.496005 AFTER CAR 9. 89cdc000 0000a000
1667 17:47:50.499223 RAMSTAGE 10. 89c80000 0005c000
1668 17:47:50.502519 REFCODE 11. 89c4b000 00035000
1669 17:47:50.505996 SMM BACKUP 12. 89c3b000 00010000
1670 17:47:50.508780 COREBOOT 13. 89c33000 00008000
1671 17:47:50.512819 ACPI 14. 89c0f000 00024000
1672 17:47:50.515716 ACPI GNVS 15. 89c0e000 00001000
1673 17:47:50.519238 RAMOOPS 16. 89b0e000 00100000
1674 17:47:50.522084 TPM2 TCGLOG17. 89afe000 00010000
1675 17:47:50.525493 SMBIOS 18. 89afd000 00000800
1676 17:47:50.527534 IMD small region:
1677 17:47:50.531464 IMD ROOT 0. 89ffec00 00000400
1678 17:47:50.534074 FSP RUNTIME 1. 89ffebe0 00000004
1679 17:47:50.538246 POWER STATE 2. 89ffeba0 00000040
1680 17:47:50.541603 ROMSTAGE 3. 89ffeb80 00000004
1681 17:47:50.544591 MEM INFO 4. 89ffe9c0 000001a9
1682 17:47:50.549074 VPD 5. 89ffe960 00000058
1683 17:47:50.552079 COREBOOTFWD 6. 89ffe920 00000028
1684 17:47:50.554822 MTRR: Physical address space:
1685 17:47:50.562032 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 17:47:50.568133 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 17:47:50.573896 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1688 17:47:50.579470 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1689 17:47:50.586175 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1690 17:47:50.592526 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1691 17:47:50.599024 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1692 17:47:50.602297 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 17:47:50.607398 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 17:47:50.610904 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 17:47:50.614583 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 17:47:50.619770 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 17:47:50.623366 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 17:47:50.626995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 17:47:50.631397 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 17:47:50.635504 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 17:47:50.639671 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 17:47:50.643924 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 17:47:50.646519 call enable_fixed_mtrr()
1704 17:47:50.650218 CPU physical address size: 39 bits
1705 17:47:50.654282 MTRR: default type WB/UC MTRR counts: 7/6.
1706 17:47:50.658426 MTRR: UC selected as default type.
1707 17:47:50.664545 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 17:47:50.670145 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1709 17:47:50.676131 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1710 17:47:50.683018 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1711 17:47:50.688897 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1712 17:47:50.694616 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1713 17:47:50.696348
1714 17:47:50.696991 MTRR check
1715 17:47:50.699625 Fixed MTRRs : Enabled
1716 17:47:50.701831 Variable MTRRs: Enabled
1717 17:47:50.701943
1718 17:47:50.706293 MTRR: Fixed MSR 0x250 0x0606060606060606
1719 17:47:50.710227 MTRR: Fixed MSR 0x258 0x0606060606060606
1720 17:47:50.714208 MTRR: Fixed MSR 0x259 0x0000000000000000
1721 17:47:50.718799 MTRR: Fixed MSR 0x268 0x0606060606060606
1722 17:47:50.722520 MTRR: Fixed MSR 0x269 0x0606060606060606
1723 17:47:50.726570 MTRR: Fixed MSR 0x26a 0x0606060606060606
1724 17:47:50.730857 MTRR: Fixed MSR 0x26b 0x0606060606060606
1725 17:47:50.734804 MTRR: Fixed MSR 0x26c 0x0606060606060606
1726 17:47:50.738713 MTRR: Fixed MSR 0x26d 0x0606060606060606
1727 17:47:50.742410 MTRR: Fixed MSR 0x26e 0x0606060606060606
1728 17:47:50.746836 MTRR: Fixed MSR 0x26f 0x0606060606060606
1729 17:47:50.753397 BS: BS_WRITE_TABLES times (us): entry 17196 run 490238 exit 150006
1730 17:47:50.756395 call enable_fixed_mtrr()
1731 17:47:50.758473 CBFS @ 1d00000 size 300000
1732 17:47:50.765305 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1733 17:47:50.768526 CBFS: Locating 'fallback/payload'
1734 17:47:50.772074 CPU physical address size: 39 bits
1735 17:47:50.776150 CBFS: Found @ offset 1cf4c0 size 3a954
1736 17:47:50.780419 Checking segment from ROM address 0xffecf4f8
1737 17:47:50.785030 Checking segment from ROM address 0xffecf514
1738 17:47:50.788650 Loading segment from ROM address 0xffecf4f8
1739 17:47:50.791829 code (compression=0)
1740 17:47:50.800633 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1741 17:47:50.808747 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1742 17:47:50.810701 it's not compressed!
1743 17:47:50.892757 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1744 17:47:50.899520 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1745 17:47:50.908234 Loading segment from ROM address 0xffecf514
1746 17:47:50.911466 Entry Point 0x30100018
1747 17:47:50.912874 Loaded segments
1748 17:47:50.922107 Finalizing chipset.
1749 17:47:50.923598 Finalizing SMM.
1750 17:47:50.930668 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158725 exit 11553
1751 17:47:50.933625 mp_park_aps done after 0 msecs.
1752 17:47:50.937277 Jumping to boot code at 30100018(89c33000)
1753 17:47:50.945938 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1754 17:47:50.946546
1755 17:47:50.946935
1756 17:47:50.947372
1757 17:47:50.950447 Starting depthcharge on sarien...
1758 17:47:50.950553
1759 17:47:50.951356 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1760 17:47:50.951486 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1761 17:47:50.951611 Setting prompt string to ['sarien:']
1762 17:47:50.951728 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1763 17:47:50.957603 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1764 17:47:50.957715
1765 17:47:50.964700 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1766 17:47:50.965033
1767 17:47:50.972695 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1768 17:47:50.973143
1769 17:47:50.974629 BIOS MMAP details:
1770 17:47:50.975177
1771 17:47:50.978002 IFD Base Offset : 0x1000000
1772 17:47:50.978327
1773 17:47:50.981362 IFD End Offset : 0x2000000
1774 17:47:50.981462
1775 17:47:50.984115 MMAP Size : 0x1000000
1776 17:47:50.984213
1777 17:47:50.986305 MMAP Start : 0xff000000
1778 17:47:50.987777
1779 17:47:50.993179 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1780 17:47:50.996506
1781 17:47:51.000314 Failed to find BH720 with VID/DID 1217:8620
1782 17:47:51.001355
1783 17:47:51.005122 New NVMe Controller 0x3214e050 @ 00:1d:04
1784 17:47:51.005236
1785 17:47:51.009315 New NVMe Controller 0x3214e118 @ 00:1d:00
1786 17:47:51.009881
1787 17:47:51.014676 The GBB signature is at 0x30000014 and is: 24 47 42 42
1788 17:47:51.018951
1789 17:47:51.020820 Wipe memory regions:
1790 17:47:51.021325
1791 17:47:51.025369 [0x00000000001000, 0x000000000a0000)
1792 17:47:51.025464
1793 17:47:51.028259 [0x00000000100000, 0x00000030000000)
1794 17:47:51.111436
1795 17:47:51.115045 [0x00000032751910, 0x00000089afd000)
1796 17:47:51.265041
1797 17:47:51.268448 [0x00000100000000, 0x0000016e800000)
1798 17:47:51.889415
1799 17:47:51.890724 R8152: Initializing
1800 17:47:51.891265
1801 17:47:51.893461 Version 9 (ocp_data = 6010)
1802 17:47:51.894879
1803 17:47:51.896947 R8152: Done initializing
1804 17:47:51.897597
1805 17:47:51.899618 Adding net device
1806 17:47:51.900627
1807 17:47:51.904600 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1808 17:47:51.905339
1809 17:47:51.905943
1810 17:47:51.906494
1811 17:47:51.907709 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1813 17:47:52.009162 sarien: tftpboot 192.168.201.1 11712627/tftp-deploy-e74ic94s/kernel/bzImage 11712627/tftp-deploy-e74ic94s/kernel/cmdline 11712627/tftp-deploy-e74ic94s/ramdisk/ramdisk.cpio.gz
1814 17:47:52.009944 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1815 17:47:52.010701 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1816 17:47:52.051934 tftpboot 192.168.201.1 11712627/tftp-deploy-e74ic94s/kernel/bzImage 11712627/tftp-deploy-e74ic94s/kernel/cmdline 11712627/tftp-deploy-e74ic94s/ramdisk/ramdisk.cpio.gz
1817 17:47:52.052405
1818 17:47:52.052917 Waiting for link
1819 17:47:52.213563
1820 17:47:52.214156 done.
1821 17:47:52.214677
1822 17:47:52.216779 MAC: 00:e0:4c:78:7f:db
1823 17:47:52.217028
1824 17:47:52.219410 Sending DHCP discover... done.
1825 17:47:52.219683
1826 17:47:52.221437 Waiting for reply... done.
1827 17:47:52.221921
1828 17:47:52.225007 Sending DHCP request... done.
1829 17:47:52.225170
1830 17:47:52.230642 Waiting for reply... done.
1831 17:47:52.231518
1832 17:47:52.233734 My ip is 192.168.201.104
1833 17:47:52.233839
1834 17:47:52.237041 The DHCP server ip is 192.168.201.1
1835 17:47:52.237364
1836 17:47:52.241815 TFTP server IP predefined by user: 192.168.201.1
1837 17:47:52.242153
1838 17:47:52.249514 Bootfile predefined by user: 11712627/tftp-deploy-e74ic94s/kernel/bzImage
1839 17:47:52.249667
1840 17:47:52.252868 Sending tftp read request... done.
1841 17:47:52.252975
1842 17:47:52.256670 Waiting for the transfer...
1843 17:47:52.257085
1844 17:47:52.501495 00000000 ################################################################
1845 17:47:52.501881
1846 17:47:52.748532 00080000 ################################################################
1847 17:47:52.748852
1848 17:47:52.987398 00100000 ################################################################
1849 17:47:52.988059
1850 17:47:53.227509 00180000 ################################################################
1851 17:47:53.228235
1852 17:47:53.476987 00200000 ################################################################
1853 17:47:53.477676
1854 17:47:53.718193 00280000 ################################################################
1855 17:47:53.718868
1856 17:47:53.954138 00300000 ################################################################
1857 17:47:53.954561
1858 17:47:54.203002 00380000 ################################################################
1859 17:47:54.203724
1860 17:47:54.443698 00400000 ################################################################
1861 17:47:54.444135
1862 17:47:54.678177 00480000 ################################################################
1863 17:47:54.678765
1864 17:47:54.919436 00500000 ################################################################
1865 17:47:54.919834
1866 17:47:55.156960 00580000 ################################################################
1867 17:47:55.157094
1868 17:47:55.392277 00600000 ################################################################
1869 17:47:55.392623
1870 17:47:55.632880 00680000 ################################################################
1871 17:47:55.633223
1872 17:47:55.870487 00700000 ################################################################
1873 17:47:55.870994
1874 17:47:56.113982 00780000 ################################################################
1875 17:47:56.114118
1876 17:47:56.161383 00800000 ############# done.
1877 17:47:56.161531
1878 17:47:56.165868 The bootfile was 8490896 bytes long.
1879 17:47:56.165952
1880 17:47:56.169324 Sending tftp read request... done.
1881 17:47:56.169410
1882 17:47:56.171476 Waiting for the transfer...
1883 17:47:56.171560
1884 17:47:56.410025 00000000 ################################################################
1885 17:47:56.410680
1886 17:47:56.645944 00080000 ################################################################
1887 17:47:56.646409
1888 17:47:56.880840 00100000 ################################################################
1889 17:47:56.881487
1890 17:47:57.123737 00180000 ################################################################
1891 17:47:57.124333
1892 17:47:57.358126 00200000 ################################################################
1893 17:47:57.358561
1894 17:47:57.591191 00280000 ################################################################
1895 17:47:57.591601
1896 17:47:57.826242 00300000 ################################################################
1897 17:47:57.826392
1898 17:47:58.061321 00380000 ################################################################
1899 17:47:58.061695
1900 17:47:58.295795 00400000 ################################################################
1901 17:47:58.296188
1902 17:47:58.531892 00480000 ################################################################
1903 17:47:58.532041
1904 17:47:58.766306 00500000 ################################################################
1905 17:47:58.767626
1906 17:47:59.001895 00580000 ################################################################
1907 17:47:59.002544
1908 17:47:59.235940 00600000 ################################################################
1909 17:47:59.236657
1910 17:47:59.471569 00680000 ################################################################
1911 17:47:59.472350
1912 17:47:59.706436 00700000 ################################################################
1913 17:47:59.707174
1914 17:47:59.942494 00780000 ################################################################
1915 17:47:59.943173
1916 17:48:00.141787 00800000 ####################################################### done.
1917 17:48:00.141984
1918 17:48:00.145283 Sending tftp read request... done.
1919 17:48:00.145415
1920 17:48:00.147956 Waiting for the transfer...
1921 17:48:00.148066
1922 17:48:00.149648 00000000 # done.
1923 17:48:00.150184
1924 17:48:00.159242 Command line loaded dynamically from TFTP file: 11712627/tftp-deploy-e74ic94s/kernel/cmdline
1925 17:48:00.159366
1926 17:48:00.179133 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1927 17:48:00.183088
1928 17:48:00.186040 Shutting down all USB controllers.
1929 17:48:00.186148
1930 17:48:00.189028 Removing current net device
1931 17:48:00.190625
1932 17:48:00.192968 EC: exit firmware mode
1933 17:48:00.194210
1934 17:48:00.196083 Finalizing coreboot
1935 17:48:00.197537
1936 17:48:00.202726 Exiting depthcharge with code 4 at timestamp: 16158076
1937 17:48:00.202810
1938 17:48:00.202875
1939 17:48:00.204688 Starting kernel ...
1940 17:48:00.205097 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
1941 17:48:00.205237 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
1942 17:48:00.205322 Setting prompt string to ['Linux version [0-9]']
1943 17:48:00.205391 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1944 17:48:00.205461 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1945 17:48:00.205636
1946 17:48:00.205705
1948 17:52:23.205529 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
1950 17:52:23.205848 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
1952 17:52:23.206083 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1955 17:52:23.206485 end: 2 depthcharge-action (duration 00:05:00) [common]
1957 17:52:23.206823 Cleaning after the job
1958 17:52:23.206951 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/ramdisk
1959 17:52:23.208903 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/kernel
1960 17:52:23.210894 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712627/tftp-deploy-e74ic94s/modules
1961 17:52:23.211383 start: 5.1 power-off (timeout 00:00:30) [common]
1962 17:52:23.211680 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
1963 17:52:28.349791 >> Command sent successfully.
1964 17:52:28.359846 Returned 0 in 5 seconds
1965 17:52:28.460836 end: 5.1 power-off (duration 00:00:05) [common]
1967 17:52:28.461683 start: 5.2 read-feedback (timeout 00:09:55) [common]
1968 17:52:28.462420 Listened to connection for namespace 'common' for up to 1s
1969 17:52:29.463109 Finalising connection for namespace 'common'
1970 17:52:29.463313 Disconnecting from shell: Finalise
1971 17:52:29.463420
1972 17:52:29.563744 end: 5.2 read-feedback (duration 00:00:01) [common]
1973 17:52:29.563898 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712627
1974 17:52:29.582124 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712627
1975 17:52:29.582277 JobError: Your job cannot terminate cleanly.