Boot log: acer-cbv514-1h-34uz-brya

    1 17:46:15.435600  lava-dispatcher, installed at version: 2023.08
    2 17:46:15.435796  start: 0 validate
    3 17:46:15.435925  Start time: 2023-10-09 17:46:15.435917+00:00 (UTC)
    4 17:46:15.436051  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:46:15.436187  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:46:15.706226  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:46:15.706953  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:46:15.968873  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:46:15.969704  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:46:16.240699  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:46:16.241466  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:46:16.510305  validate duration: 1.07
   14 17:46:16.511674  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:46:16.512219  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:46:16.512729  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:46:16.513377  Not decompressing ramdisk as can be used compressed.
   18 17:46:16.513922  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 17:46:16.514297  saving as /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/ramdisk/initrd.cpio.gz
   20 17:46:16.514662  total size: 5432690 (5 MB)
   21 17:46:16.519961  progress   0 % (0 MB)
   22 17:46:16.530383  progress   5 % (0 MB)
   23 17:46:16.536638  progress  10 % (0 MB)
   24 17:46:16.541127  progress  15 % (0 MB)
   25 17:46:16.544957  progress  20 % (1 MB)
   26 17:46:16.548016  progress  25 % (1 MB)
   27 17:46:16.550747  progress  30 % (1 MB)
   28 17:46:16.553574  progress  35 % (1 MB)
   29 17:46:16.555870  progress  40 % (2 MB)
   30 17:46:16.557995  progress  45 % (2 MB)
   31 17:46:16.559984  progress  50 % (2 MB)
   32 17:46:16.562201  progress  55 % (2 MB)
   33 17:46:16.563979  progress  60 % (3 MB)
   34 17:46:16.565760  progress  65 % (3 MB)
   35 17:46:16.567650  progress  70 % (3 MB)
   36 17:46:16.569240  progress  75 % (3 MB)
   37 17:46:16.570853  progress  80 % (4 MB)
   38 17:46:16.572394  progress  85 % (4 MB)
   39 17:46:16.574025  progress  90 % (4 MB)
   40 17:46:16.575477  progress  95 % (4 MB)
   41 17:46:16.576958  progress 100 % (5 MB)
   42 17:46:16.577170  5 MB downloaded in 0.06 s (82.86 MB/s)
   43 17:46:16.577332  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 17:46:16.577639  end: 1.1 download-retry (duration 00:00:00) [common]
   46 17:46:16.577741  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 17:46:16.577826  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 17:46:16.577965  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:46:16.578039  saving as /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/kernel/bzImage
   50 17:46:16.578101  total size: 8490896 (8 MB)
   51 17:46:16.578162  No compression specified
   52 17:46:16.579319  progress   0 % (0 MB)
   53 17:46:16.581460  progress   5 % (0 MB)
   54 17:46:16.583774  progress  10 % (0 MB)
   55 17:46:16.586090  progress  15 % (1 MB)
   56 17:46:16.588340  progress  20 % (1 MB)
   57 17:46:16.590629  progress  25 % (2 MB)
   58 17:46:16.592909  progress  30 % (2 MB)
   59 17:46:16.595220  progress  35 % (2 MB)
   60 17:46:16.597484  progress  40 % (3 MB)
   61 17:46:16.599769  progress  45 % (3 MB)
   62 17:46:16.602091  progress  50 % (4 MB)
   63 17:46:16.604371  progress  55 % (4 MB)
   64 17:46:16.606620  progress  60 % (4 MB)
   65 17:46:16.608844  progress  65 % (5 MB)
   66 17:46:16.611376  progress  70 % (5 MB)
   67 17:46:16.613788  progress  75 % (6 MB)
   68 17:46:16.615999  progress  80 % (6 MB)
   69 17:46:16.618284  progress  85 % (6 MB)
   70 17:46:16.620491  progress  90 % (7 MB)
   71 17:46:16.622745  progress  95 % (7 MB)
   72 17:46:16.624988  progress 100 % (8 MB)
   73 17:46:16.625106  8 MB downloaded in 0.05 s (172.28 MB/s)
   74 17:46:16.625253  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:46:16.625487  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:46:16.625624  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 17:46:16.625718  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 17:46:16.625861  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 17:46:16.625930  saving as /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/nfsrootfs/full.rootfs.tar
   81 17:46:16.625991  total size: 133380384 (127 MB)
   82 17:46:16.626058  Using unxz to decompress xz
   83 17:46:16.630105  progress   0 % (0 MB)
   84 17:46:16.982154  progress   5 % (6 MB)
   85 17:46:17.342706  progress  10 % (12 MB)
   86 17:46:17.648174  progress  15 % (19 MB)
   87 17:46:17.846362  progress  20 % (25 MB)
   88 17:46:18.102057  progress  25 % (31 MB)
   89 17:46:18.474228  progress  30 % (38 MB)
   90 17:46:18.844162  progress  35 % (44 MB)
   91 17:46:19.270796  progress  40 % (50 MB)
   92 17:46:19.684363  progress  45 % (57 MB)
   93 17:46:20.069312  progress  50 % (63 MB)
   94 17:46:20.477135  progress  55 % (69 MB)
   95 17:46:20.868891  progress  60 % (76 MB)
   96 17:46:21.255950  progress  65 % (82 MB)
   97 17:46:21.667230  progress  70 % (89 MB)
   98 17:46:22.090589  progress  75 % (95 MB)
   99 17:46:22.565902  progress  80 % (101 MB)
  100 17:46:23.021527  progress  85 % (108 MB)
  101 17:46:23.295453  progress  90 % (114 MB)
  102 17:46:23.654370  progress  95 % (120 MB)
  103 17:46:24.062420  progress 100 % (127 MB)
  104 17:46:24.068444  127 MB downloaded in 7.44 s (17.09 MB/s)
  105 17:46:24.068708  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 17:46:24.068972  end: 1.3 download-retry (duration 00:00:07) [common]
  108 17:46:24.069063  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 17:46:24.069150  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 17:46:24.069307  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:46:24.069381  saving as /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/modules/modules.tar
  112 17:46:24.069443  total size: 250928 (0 MB)
  113 17:46:24.069505  Using unxz to decompress xz
  114 17:46:24.073703  progress  13 % (0 MB)
  115 17:46:24.074117  progress  26 % (0 MB)
  116 17:46:24.074357  progress  39 % (0 MB)
  117 17:46:24.075934  progress  52 % (0 MB)
  118 17:46:24.077904  progress  65 % (0 MB)
  119 17:46:24.079999  progress  78 % (0 MB)
  120 17:46:24.082114  progress  91 % (0 MB)
  121 17:46:24.086005  progress 100 % (0 MB)
  122 17:46:24.092198  0 MB downloaded in 0.02 s (10.52 MB/s)
  123 17:46:24.092495  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 17:46:24.092894  end: 1.4 download-retry (duration 00:00:00) [common]
  126 17:46:24.093021  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  127 17:46:24.093147  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  128 17:46:26.336042  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712638/extract-nfsrootfs-k2r6vgiu
  129 17:46:26.336235  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  130 17:46:26.336343  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  131 17:46:26.336514  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue
  132 17:46:26.336651  makedir: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin
  133 17:46:26.336758  makedir: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/tests
  134 17:46:26.336862  makedir: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/results
  135 17:46:26.336967  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-add-keys
  136 17:46:26.337118  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-add-sources
  137 17:46:26.337253  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-background-process-start
  138 17:46:26.337386  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-background-process-stop
  139 17:46:26.337518  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-common-functions
  140 17:46:26.337844  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-echo-ipv4
  141 17:46:26.337979  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-install-packages
  142 17:46:26.338115  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-installed-packages
  143 17:46:26.338245  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-os-build
  144 17:46:26.338375  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-probe-channel
  145 17:46:26.338505  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-probe-ip
  146 17:46:26.338652  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-target-ip
  147 17:46:26.338784  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-target-mac
  148 17:46:26.338948  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-target-storage
  149 17:46:26.339083  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-case
  150 17:46:26.339220  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-event
  151 17:46:26.339351  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-feedback
  152 17:46:26.339481  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-raise
  153 17:46:26.339610  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-reference
  154 17:46:26.339755  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-runner
  155 17:46:26.339888  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-set
  156 17:46:26.340018  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-test-shell
  157 17:46:26.340150  Updating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-install-packages (oe)
  158 17:46:26.340314  Updating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/bin/lava-installed-packages (oe)
  159 17:46:26.340443  Creating /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/environment
  160 17:46:26.340547  LAVA metadata
  161 17:46:26.340620  - LAVA_JOB_ID=11712638
  162 17:46:26.340685  - LAVA_DISPATCHER_IP=192.168.201.1
  163 17:46:26.340790  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  164 17:46:26.340858  skipped lava-vland-overlay
  165 17:46:26.340934  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 17:46:26.341014  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  167 17:46:26.341077  skipped lava-multinode-overlay
  168 17:46:26.341151  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 17:46:26.341230  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  170 17:46:26.341304  Loading test definitions
  171 17:46:26.341397  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  172 17:46:26.341467  Using /lava-11712638 at stage 0
  173 17:46:26.341790  uuid=11712638_1.5.2.3.1 testdef=None
  174 17:46:26.341881  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 17:46:26.341967  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  176 17:46:26.342485  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 17:46:26.342707  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  179 17:46:26.343360  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 17:46:26.343590  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  182 17:46:26.344228  runner path: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/0/tests/0_dmesg test_uuid 11712638_1.5.2.3.1
  183 17:46:26.344391  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 17:46:26.344619  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
  186 17:46:26.344692  Using /lava-11712638 at stage 1
  187 17:46:26.345004  uuid=11712638_1.5.2.3.5 testdef=None
  188 17:46:26.345092  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 17:46:26.345176  start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
  190 17:46:26.345723  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 17:46:26.345942  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
  193 17:46:26.346601  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 17:46:26.346831  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
  196 17:46:26.347475  runner path: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/1/tests/1_bootrr test_uuid 11712638_1.5.2.3.5
  197 17:46:26.347630  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 17:46:26.347836  Creating lava-test-runner.conf files
  200 17:46:26.347899  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/0 for stage 0
  201 17:46:26.347990  - 0_dmesg
  202 17:46:26.348071  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712638/lava-overlay-__0nm0ue/lava-11712638/1 for stage 1
  203 17:46:26.348165  - 1_bootrr
  204 17:46:26.348262  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 17:46:26.348349  start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
  206 17:46:26.355834  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 17:46:26.355938  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
  208 17:46:26.356023  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 17:46:26.356109  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 17:46:26.356193  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
  211 17:46:26.493530  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 17:46:26.493912  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  213 17:46:26.494036  extracting modules file /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712638/extract-nfsrootfs-k2r6vgiu
  214 17:46:26.508815  extracting modules file /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712638/extract-overlay-ramdisk-nlc6i4d1/ramdisk
  215 17:46:26.526055  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 17:46:26.526183  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  217 17:46:26.526284  [common] Applying overlay to NFS
  218 17:46:26.526382  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712638/compress-overlay-1crl2gjm/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712638/extract-nfsrootfs-k2r6vgiu
  219 17:46:26.535992  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 17:46:26.536135  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  221 17:46:26.536271  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 17:46:26.536396  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  223 17:46:26.536519  Building ramdisk /var/lib/lava/dispatcher/tmp/11712638/extract-overlay-ramdisk-nlc6i4d1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712638/extract-overlay-ramdisk-nlc6i4d1/ramdisk
  224 17:46:26.615752  >> 26159 blocks

  225 17:46:27.177198  rename /var/lib/lava/dispatcher/tmp/11712638/extract-overlay-ramdisk-nlc6i4d1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/ramdisk/ramdisk.cpio.gz
  226 17:46:27.177671  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 17:46:27.177808  start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
  228 17:46:27.177922  start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
  229 17:46:27.178022  No mkimage arch provided, not using FIT.
  230 17:46:27.178120  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 17:46:27.178208  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 17:46:27.178322  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  233 17:46:27.178416  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
  234 17:46:27.178502  No LXC device requested
  235 17:46:27.178591  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 17:46:27.178686  start: 1.7 deploy-device-env (timeout 00:09:49) [common]
  237 17:46:27.178794  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 17:46:27.178902  Checking files for TFTP limit of 4294967296 bytes.
  239 17:46:27.179449  end: 1 tftp-deploy (duration 00:00:11) [common]
  240 17:46:27.179587  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 17:46:27.179714  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 17:46:27.179882  substitutions:
  243 17:46:27.179979  - {DTB}: None
  244 17:46:27.180076  - {INITRD}: 11712638/tftp-deploy-c74zfnvq/ramdisk/ramdisk.cpio.gz
  245 17:46:27.180170  - {KERNEL}: 11712638/tftp-deploy-c74zfnvq/kernel/bzImage
  246 17:46:27.180260  - {LAVA_MAC}: None
  247 17:46:27.180353  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712638/extract-nfsrootfs-k2r6vgiu
  248 17:46:27.180443  - {NFS_SERVER_IP}: 192.168.201.1
  249 17:46:27.180533  - {PRESEED_CONFIG}: None
  250 17:46:27.180622  - {PRESEED_LOCAL}: None
  251 17:46:27.180709  - {RAMDISK}: 11712638/tftp-deploy-c74zfnvq/ramdisk/ramdisk.cpio.gz
  252 17:46:27.180804  - {ROOT_PART}: None
  253 17:46:27.180870  - {ROOT}: None
  254 17:46:27.180963  - {SERVER_IP}: 192.168.201.1
  255 17:46:27.181061  - {TEE}: None
  256 17:46:27.181150  Parsed boot commands:
  257 17:46:27.181246  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 17:46:27.181503  Parsed boot commands: tftpboot 192.168.201.1 11712638/tftp-deploy-c74zfnvq/kernel/bzImage 11712638/tftp-deploy-c74zfnvq/kernel/cmdline 11712638/tftp-deploy-c74zfnvq/ramdisk/ramdisk.cpio.gz
  259 17:46:27.181636  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 17:46:27.181756  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 17:46:27.181893  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 17:46:27.181986  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 17:46:27.182082  Not connected, no need to disconnect.
  264 17:46:27.182182  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 17:46:27.182299  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 17:46:27.182410  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
  267 17:46:27.186673  Setting prompt string to ['lava-test: # ']
  268 17:46:27.187099  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 17:46:27.187252  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 17:46:27.187399  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 17:46:27.187531  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 17:46:27.187880  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
  273 17:46:32.324311  >> Command sent successfully.

  274 17:46:32.327077  Returned 0 in 5 seconds
  275 17:46:32.427473  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 17:46:32.427923  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 17:46:32.428089  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 17:46:32.428251  Setting prompt string to 'Starting depthcharge on Volmar...'
  280 17:46:32.428381  Changing prompt to 'Starting depthcharge on Volmar...'
  281 17:46:32.428529  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  282 17:46:32.428850  [Enter `^Ec?' for help]

  283 17:46:33.806939  

  284 17:46:33.807088  

  285 17:46:33.813638  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  286 17:46:33.817561  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  287 17:46:33.821445  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  288 17:46:33.828930  CPU: AES supported, TXT NOT supported, VT supported

  289 17:46:33.836479  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  290 17:46:33.836565  Cache size = 10 MiB

  291 17:46:33.844225  MCH: device id 4609 (rev 04) is Alderlake-P

  292 17:46:33.847694  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  293 17:46:33.851592  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  294 17:46:33.855374  VBOOT: Loading verstage.

  295 17:46:33.859316  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  296 17:46:33.863195  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  297 17:46:33.870605  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 17:46:33.878430  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  299 17:46:33.885947  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  300 17:46:33.886035  

  301 17:46:33.886106  

  302 17:46:33.893045  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  303 17:46:33.902105  Probing TPM I2C: I2C bus 1 version 0x3230302a

  304 17:46:33.905825  DW I2C bus 1 at 0xfe022000 (400 KHz)

  305 17:46:33.909531  I2C TX abort detected (00000001)

  306 17:46:33.909623  cr50_i2c_read: Address write failed

  307 17:46:33.923450  .done! DID_VID 0x00281ae0

  308 17:46:33.927991  TPM ready after 0 ms

  309 17:46:33.931273  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  310 17:46:33.943177  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  311 17:46:33.950333  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  312 17:46:34.002621  tlcl_send_startup: Startup return code is 0

  313 17:46:34.002716  TPM: setup succeeded

  314 17:46:34.026543  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  315 17:46:34.047492  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  316 17:46:34.051259  Chrome EC: UHEPI supported

  317 17:46:34.054598  Reading cr50 boot mode

  318 17:46:34.069946  Cr50 says boot_mode is VERIFIED_RW(0x00).

  319 17:46:34.070025  Phase 1

  320 17:46:34.073415  FMAP: area GBB found @ 1805000 (458752 bytes)

  321 17:46:34.083985  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  322 17:46:34.090747  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  323 17:46:34.097152  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  324 17:46:34.097268  Phase 2

  325 17:46:34.097343  Phase 3

  326 17:46:34.104197  FMAP: area GBB found @ 1805000 (458752 bytes)

  327 17:46:34.107444  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  328 17:46:34.113935  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  329 17:46:34.121012  VB2:vb2_verify_keyblock() Checking keyblock signature...

  330 17:46:34.127819  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  331 17:46:34.134666  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  332 17:46:34.142247  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  333 17:46:34.155009  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  334 17:46:34.158389  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  335 17:46:34.165120  VB2:vb2_verify_fw_preamble() Verifying preamble.

  336 17:46:34.171362  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  337 17:46:34.178060  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  338 17:46:34.184572  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  339 17:46:34.188409  Phase 4

  340 17:46:34.191581  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  341 17:46:34.198212  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  342 17:46:34.411051  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  343 17:46:34.417688  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  344 17:46:34.421216  Saving vboot hash.

  345 17:46:34.427494  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  346 17:46:34.443266  tlcl_extend: response is 0

  347 17:46:34.450237  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  348 17:46:34.456652  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  349 17:46:34.471220  tlcl_extend: response is 0

  350 17:46:34.477751  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  351 17:46:34.500530  tlcl_lock_nv_write: response is 0

  352 17:46:34.519833  tlcl_lock_nv_write: response is 0

  353 17:46:34.519948  Slot A is selected

  354 17:46:34.526412  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  355 17:46:34.532917  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  356 17:46:34.539569  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  357 17:46:34.546284  BS: verstage times (exec / console): total (unknown) / 264 ms

  358 17:46:34.546389  

  359 17:46:34.546483  

  360 17:46:34.552811  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  361 17:46:34.558333  Google Chrome EC: version:

  362 17:46:34.561671  	ro: volmar_v2.0.14126-e605144e9c

  363 17:46:34.564923  	rw: volmar_v0.0.55-22d1557

  364 17:46:34.568156    running image: 2

  365 17:46:34.571587  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  366 17:46:34.581741  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  367 17:46:34.588420  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  368 17:46:34.594595  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  369 17:46:34.605004  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  370 17:46:34.615074  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  371 17:46:34.618326  EC took 1187us to calculate image hash

  372 17:46:34.627991  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  373 17:46:34.631239  VB2:sync_ec() select_rw=RW(active)

  374 17:46:34.642956  Waited 275us to clear limit power flag.

  375 17:46:34.646133  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  376 17:46:34.649391  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  377 17:46:34.653080  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  378 17:46:34.659434  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  379 17:46:34.662832  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  380 17:46:34.666220  TCO_STS:   0000 0000

  381 17:46:34.669187  GEN_PMCON: d0015038 00002200

  382 17:46:34.672725  GBLRST_CAUSE: 00000000 00000000

  383 17:46:34.672806  HPR_CAUSE0: 00000000

  384 17:46:34.675902  prev_sleep_state 5

  385 17:46:34.679507  Abort disabling TXT, as CPU is not TXT capable.

  386 17:46:34.687554  cse_lite: Number of partitions = 3

  387 17:46:34.691010  cse_lite: Current partition = RO

  388 17:46:34.691118  cse_lite: Next partition = RO

  389 17:46:34.694324  cse_lite: Flags = 0x7

  390 17:46:34.700918  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  391 17:46:34.710880  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  392 17:46:34.714367  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  393 17:46:34.720954  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  394 17:46:34.727483  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  395 17:46:34.734203  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  396 17:46:34.737815  cse_lite: CSE CBFS RW version : 16.1.25.2049

  397 17:46:34.744478  cse_lite: Set Boot Partition Info Command (RW)

  398 17:46:34.747394  HECI: Global Reset(Type:1) Command

  399 17:46:36.165650  6ȣeb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  400 17:46:36.169436  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  401 17:46:36.176154  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  402 17:46:36.179637  CPU: AES supported, TXT NOT supported, VT supported

  403 17:46:36.189846  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  404 17:46:36.189933  Cache size = 10 MiB

  405 17:46:36.196395  MCH: device id 4609 (rev 04) is Alderlake-P

  406 17:46:36.199679  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  407 17:46:36.206405  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  408 17:46:36.206504  VBOOT: Loading verstage.

  409 17:46:36.213869  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  410 17:46:36.217226  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  411 17:46:36.220506  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  412 17:46:36.231464  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  413 17:46:36.238357  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  414 17:46:36.238442  

  415 17:46:36.238509  

  416 17:46:36.248421  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  417 17:46:36.255005  Probing TPM I2C: I2C bus 1 version 0x3230302a

  418 17:46:36.258472  DW I2C bus 1 at 0xfe022000 (400 KHz)

  419 17:46:36.261765  done! DID_VID 0x00281ae0

  420 17:46:36.261849  TPM ready after 0 ms

  421 17:46:36.265535  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  422 17:46:36.280056  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  423 17:46:36.283762  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  424 17:46:36.339376  tlcl_send_startup: Startup return code is 0

  425 17:46:36.339510  TPM: setup succeeded

  426 17:46:36.359736  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  427 17:46:36.381476  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  428 17:46:36.385381  Chrome EC: UHEPI supported

  429 17:46:36.388506  Reading cr50 boot mode

  430 17:46:36.403128  Cr50 says boot_mode is VERIFIED_RW(0x00).

  431 17:46:36.403217  Phase 1

  432 17:46:36.410073  FMAP: area GBB found @ 1805000 (458752 bytes)

  433 17:46:36.416530  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  434 17:46:36.423356  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  435 17:46:36.430005  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  436 17:46:36.433401  Phase 2

  437 17:46:36.433486  Phase 3

  438 17:46:36.436659  FMAP: area GBB found @ 1805000 (458752 bytes)

  439 17:46:36.443262  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  440 17:46:36.446901  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  441 17:46:36.453418  VB2:vb2_verify_keyblock() Checking keyblock signature...

  442 17:46:36.459732  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  443 17:46:36.466568  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  444 17:46:36.476816  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  445 17:46:36.488590  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  446 17:46:36.491897  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  447 17:46:36.498469  VB2:vb2_verify_fw_preamble() Verifying preamble.

  448 17:46:36.504913  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  449 17:46:36.511455  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  450 17:46:36.518391  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  451 17:46:36.522457  Phase 4

  452 17:46:36.526001  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  453 17:46:36.532516  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  454 17:46:36.744615  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  455 17:46:36.751501  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  456 17:46:36.754553  Saving vboot hash.

  457 17:46:36.761481  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  458 17:46:36.777150  tlcl_extend: response is 0

  459 17:46:36.783754  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  460 17:46:36.790460  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  461 17:46:36.804768  tlcl_extend: response is 0

  462 17:46:36.811444  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  463 17:46:36.830192  tlcl_lock_nv_write: response is 0

  464 17:46:36.848986  tlcl_lock_nv_write: response is 0

  465 17:46:36.849075  Slot A is selected

  466 17:46:36.855874  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  467 17:46:36.862510  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  468 17:46:36.869213  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  469 17:46:36.875672  BS: verstage times (exec / console): total (unknown) / 256 ms

  470 17:46:36.875758  

  471 17:46:36.875825  

  472 17:46:36.882240  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  473 17:46:36.886538  Google Chrome EC: version:

  474 17:46:36.890122  	ro: volmar_v2.0.14126-e605144e9c

  475 17:46:36.893012  	rw: volmar_v0.0.55-22d1557

  476 17:46:36.896376    running image: 2

  477 17:46:36.899786  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  478 17:46:36.909760  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  479 17:46:36.916147  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  480 17:46:36.922655  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  481 17:46:36.932977  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  482 17:46:36.943109  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  483 17:46:36.945953  EC took 941us to calculate image hash

  484 17:46:36.955949  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  485 17:46:36.959431  VB2:sync_ec() select_rw=RW(active)

  486 17:46:36.971409  Waited 275us to clear limit power flag.

  487 17:46:36.974964  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  488 17:46:36.978530  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  489 17:46:36.982630  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  490 17:46:36.985979  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  491 17:46:36.992638  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  492 17:46:36.992724  TCO_STS:   0000 0000

  493 17:46:36.995601  GEN_PMCON: d1001038 00002200

  494 17:46:36.998990  GBLRST_CAUSE: 00000040 00000000

  495 17:46:37.002471  HPR_CAUSE0: 00000000

  496 17:46:37.002555  prev_sleep_state 5

  497 17:46:37.009127  Abort disabling TXT, as CPU is not TXT capable.

  498 17:46:37.015875  cse_lite: Number of partitions = 3

  499 17:46:37.019110  cse_lite: Current partition = RW

  500 17:46:37.019194  cse_lite: Next partition = RW

  501 17:46:37.022236  cse_lite: Flags = 0x7

  502 17:46:37.028987  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  503 17:46:37.038927  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  504 17:46:37.042806  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  505 17:46:37.049167  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  506 17:46:37.055664  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  507 17:46:37.062390  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  508 17:46:37.065727  cse_lite: CSE CBFS RW version : 16.1.25.2049

  509 17:46:37.068927  Boot Count incremented to 4333

  510 17:46:37.075568  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  511 17:46:37.082100  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  512 17:46:37.095188  Probing TPM I2C: done! DID_VID 0x00281ae0

  513 17:46:37.098535  Locality already claimed

  514 17:46:37.101525  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  515 17:46:37.121426  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  516 17:46:37.127849  MRC: Hash idx 0x100d comparison successful.

  517 17:46:37.131098  MRC cache found, size f6c8

  518 17:46:37.131181  bootmode is set to: 2

  519 17:46:37.134878  EC returned error result code 3

  520 17:46:37.138029  FW_CONFIG value from CBI is 0x131

  521 17:46:37.144508  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  522 17:46:37.147871  SPD index = 0

  523 17:46:37.154581  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  524 17:46:37.154665  SPD: module type is LPDDR4X

  525 17:46:37.161461  SPD: module part number is K4U6E3S4AB-MGCL

  526 17:46:37.168028  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  527 17:46:37.171398  SPD: device width 16 bits, bus width 16 bits

  528 17:46:37.174513  SPD: module size is 1024 MB (per channel)

  529 17:46:37.244221  CBMEM:

  530 17:46:37.247487  IMD: root @ 0x76fff000 254 entries.

  531 17:46:37.250508  IMD: root @ 0x76ffec00 62 entries.

  532 17:46:37.258632  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  533 17:46:37.261826  RO_VPD is uninitialized or empty.

  534 17:46:37.265124  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  535 17:46:37.272087  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  536 17:46:37.275050  External stage cache:

  537 17:46:37.278362  IMD: root @ 0x7bbff000 254 entries.

  538 17:46:37.281735  IMD: root @ 0x7bbfec00 62 entries.

  539 17:46:37.288478  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  540 17:46:37.295138  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  541 17:46:37.298475  MRC: 'RW_MRC_CACHE' does not need update.

  542 17:46:37.298559  8 DIMMs found

  543 17:46:37.301899  SMM Memory Map

  544 17:46:37.305338  SMRAM       : 0x7b800000 0x800000

  545 17:46:37.308626   Subregion 0: 0x7b800000 0x200000

  546 17:46:37.311976   Subregion 1: 0x7ba00000 0x200000

  547 17:46:37.315372   Subregion 2: 0x7bc00000 0x400000

  548 17:46:37.318751  top_of_ram = 0x77000000

  549 17:46:37.321568  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  550 17:46:37.328393  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  551 17:46:37.335188  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  552 17:46:37.338627  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  553 17:46:37.338711  Normal boot

  554 17:46:37.348294  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  555 17:46:37.355026  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  556 17:46:37.361492  Processing 237 relocs. Offset value of 0x74ab9000

  557 17:46:37.369529  BS: romstage times (exec / console): total (unknown) / 377 ms

  558 17:46:37.377077  

  559 17:46:37.377164  

  560 17:46:37.383994  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  561 17:46:37.384104  Normal boot

  562 17:46:37.390294  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  563 17:46:37.397318  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  564 17:46:37.404082  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  565 17:46:37.413658  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  566 17:46:37.461478  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  567 17:46:37.468265  Processing 5931 relocs. Offset value of 0x72a2f000

  568 17:46:37.471617  BS: postcar times (exec / console): total (unknown) / 51 ms

  569 17:46:37.471701  

  570 17:46:37.474875  

  571 17:46:37.481743  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  572 17:46:37.485058  Reserving BERT start 76a1e000, size 10000

  573 17:46:37.488033  Normal boot

  574 17:46:37.491450  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  575 17:46:37.498278  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  576 17:46:37.508189  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  577 17:46:37.511619  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  578 17:46:37.515048  Google Chrome EC: version:

  579 17:46:37.518067  	ro: volmar_v2.0.14126-e605144e9c

  580 17:46:37.521305  	rw: volmar_v0.0.55-22d1557

  581 17:46:37.521381    running image: 2

  582 17:46:37.528009  ACPI _SWS is PM1 Index 8 GPE Index -1

  583 17:46:37.531442  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  584 17:46:37.535115  EC returned error result code 3

  585 17:46:37.538500  FW_CONFIG value from CBI is 0x131

  586 17:46:37.545440  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  587 17:46:37.548582  PCI: 00:1c.2 disabled by fw_config

  588 17:46:37.555204  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  589 17:46:37.559366  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  590 17:46:37.565926  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  591 17:46:37.569349  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  592 17:46:37.575969  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  593 17:46:37.582495  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  594 17:46:37.585888  microcode: sig=0x906a4 pf=0x80 revision=0x423

  595 17:46:37.592291  microcode: Update skipped, already up-to-date

  596 17:46:37.598949  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  597 17:46:37.631149  Detected 6 core, 8 thread CPU.

  598 17:46:37.634444  Setting up SMI for CPU

  599 17:46:37.637514  IED base = 0x7bc00000

  600 17:46:37.637641  IED size = 0x00400000

  601 17:46:37.641012  Will perform SMM setup.

  602 17:46:37.644304  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  603 17:46:37.647541  LAPIC 0x0 in XAPIC mode.

  604 17:46:37.657851  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  605 17:46:37.660658  Processing 18 relocs. Offset value of 0x00030000

  606 17:46:37.665286  Attempting to start 7 APs

  607 17:46:37.668628  Waiting for 10ms after sending INIT.

  608 17:46:37.682139  Waiting for SIPI to complete...

  609 17:46:37.685432  done.

  610 17:46:37.685609  LAPIC 0x12 in XAPIC mode.

  611 17:46:37.688741  LAPIC 0x10 in XAPIC mode.

  612 17:46:37.695490  AP: slot 3 apic_id 12, MCU rev: 0x00000423

  613 17:46:37.695688  LAPIC 0x14 in XAPIC mode.

  614 17:46:37.702182  AP: slot 2 apic_id 10, MCU rev: 0x00000423

  615 17:46:37.702352  LAPIC 0x16 in XAPIC mode.

  616 17:46:37.708395  AP: slot 4 apic_id 14, MCU rev: 0x00000423

  617 17:46:37.711685  AP: slot 1 apic_id 16, MCU rev: 0x00000423

  618 17:46:37.715319  LAPIC 0x8 in XAPIC mode.

  619 17:46:37.718560  LAPIC 0x9 in XAPIC mode.

  620 17:46:37.721856  AP: slot 6 apic_id 8, MCU rev: 0x00000423

  621 17:46:37.725252  AP: slot 7 apic_id 9, MCU rev: 0x00000423

  622 17:46:37.728157  Waiting for SIPI to complete...

  623 17:46:37.728268  done.

  624 17:46:37.731438  LAPIC 0x1 in XAPIC mode.

  625 17:46:37.735159  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  626 17:46:37.738253  smm_setup_relocation_handler: enter

  627 17:46:37.741495  smm_setup_relocation_handler: exit

  628 17:46:37.751589  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  629 17:46:37.754800  Processing 11 relocs. Offset value of 0x00038000

  630 17:46:37.761468  smm_module_setup_stub: stack_top = 0x7b804000

  631 17:46:37.764980  smm_module_setup_stub: per cpu stack_size = 0x800

  632 17:46:37.771337  smm_module_setup_stub: runtime.start32_offset = 0x4c

  633 17:46:37.774678  smm_module_setup_stub: runtime.smm_size = 0x10000

  634 17:46:37.781332  SMM Module: stub loaded at 38000. Will call 0x76a52094

  635 17:46:37.784745  Installing permanent SMM handler to 0x7b800000

  636 17:46:37.791462  smm_load_module: total_smm_space_needed e468, available -> 200000

  637 17:46:37.801433  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  638 17:46:37.804863  Processing 255 relocs. Offset value of 0x7b9f6000

  639 17:46:37.811505  smm_load_module: smram_start: 0x7b800000

  640 17:46:37.814740  smm_load_module: smram_end: 7ba00000

  641 17:46:37.817842  smm_load_module: handler start 0x7b9f6d5f

  642 17:46:37.821206  smm_load_module: handler_size 98d0

  643 17:46:37.824417  smm_load_module: fxsave_area 0x7b9ff000

  644 17:46:37.827956  smm_load_module: fxsave_size 1000

  645 17:46:37.831373  smm_load_module: CONFIG_MSEG_SIZE 0x0

  646 17:46:37.838146  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  647 17:46:37.844462  smm_load_module: handler_mod_params.smbase = 0x7b800000

  648 17:46:37.847865  smm_load_module: per_cpu_save_state_size = 0x400

  649 17:46:37.851285  smm_load_module: num_cpus = 0x8

  650 17:46:37.857496  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  651 17:46:37.861067  smm_load_module: total_save_state_size = 0x2000

  652 17:46:37.867724  smm_load_module: cpu0 entry: 7b9e6000

  653 17:46:37.871224  smm_create_map: cpus allowed in one segment 30

  654 17:46:37.874269  smm_create_map: min # of segments needed 1

  655 17:46:37.874354  CPU 0x0

  656 17:46:37.880960      smbase 7b9e6000  entry 7b9ee000

  657 17:46:37.884317             ss_start 7b9f5c00  code_end 7b9ee208

  658 17:46:37.884413  CPU 0x1

  659 17:46:37.887802      smbase 7b9e5c00  entry 7b9edc00

  660 17:46:37.894477             ss_start 7b9f5800  code_end 7b9ede08

  661 17:46:37.894612  CPU 0x2

  662 17:46:37.897733      smbase 7b9e5800  entry 7b9ed800

  663 17:46:37.904573             ss_start 7b9f5400  code_end 7b9eda08

  664 17:46:37.904735  CPU 0x3

  665 17:46:37.907898      smbase 7b9e5400  entry 7b9ed400

  666 17:46:37.911254             ss_start 7b9f5000  code_end 7b9ed608

  667 17:46:37.914759  CPU 0x4

  668 17:46:37.917759      smbase 7b9e5000  entry 7b9ed000

  669 17:46:37.921248             ss_start 7b9f4c00  code_end 7b9ed208

  670 17:46:37.921374  CPU 0x5

  671 17:46:37.924628      smbase 7b9e4c00  entry 7b9ecc00

  672 17:46:37.931776             ss_start 7b9f4800  code_end 7b9ece08

  673 17:46:37.932206  CPU 0x6

  674 17:46:37.934663      smbase 7b9e4800  entry 7b9ec800

  675 17:46:37.941275             ss_start 7b9f4400  code_end 7b9eca08

  676 17:46:37.941735  CPU 0x7

  677 17:46:37.944502      smbase 7b9e4400  entry 7b9ec400

  678 17:46:37.951236             ss_start 7b9f4000  code_end 7b9ec608

  679 17:46:37.957937  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  680 17:46:37.961038  Processing 11 relocs. Offset value of 0x7b9ee000

  681 17:46:37.967877  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  682 17:46:37.974488  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  683 17:46:37.980914  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  684 17:46:37.987552  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  685 17:46:37.993800  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  686 17:46:38.001254  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  687 17:46:38.007948  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  688 17:46:38.010852  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  689 17:46:38.017949  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  690 17:46:38.024203  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  691 17:46:38.030613  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  692 17:46:38.037488  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  693 17:46:38.043789  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  694 17:46:38.050777  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  695 17:46:38.057369  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  696 17:46:38.060760  smm_module_setup_stub: stack_top = 0x7b804000

  697 17:46:38.067348  smm_module_setup_stub: per cpu stack_size = 0x800

  698 17:46:38.070824  smm_module_setup_stub: runtime.start32_offset = 0x4c

  699 17:46:38.077158  smm_module_setup_stub: runtime.smm_size = 0x200000

  700 17:46:38.080733  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  701 17:46:38.085843  Clearing SMI status registers

  702 17:46:38.088971  SMI_STS: PM1 

  703 17:46:38.089057  PM1_STS: WAK PWRBTN 

  704 17:46:38.099025  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  705 17:46:38.102249  In relocation handler: CPU 0

  706 17:46:38.106094  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  707 17:46:38.109422  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  708 17:46:38.112730  Relocation complete.

  709 17:46:38.119360  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  710 17:46:38.122852  In relocation handler: CPU 5

  711 17:46:38.126202  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  712 17:46:38.129591  Relocation complete.

  713 17:46:38.136517  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  714 17:46:38.139399  In relocation handler: CPU 4

  715 17:46:38.142849  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  716 17:46:38.146160  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  717 17:46:38.149512  Relocation complete.

  718 17:46:38.156084  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  719 17:46:38.159415  In relocation handler: CPU 1

  720 17:46:38.162691  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  721 17:46:38.169685  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  722 17:46:38.173361  Relocation complete.

  723 17:46:38.179681  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  724 17:46:38.183069  In relocation handler: CPU 2

  725 17:46:38.186268  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  726 17:46:38.189479  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  727 17:46:38.193001  Relocation complete.

  728 17:46:38.199670  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  729 17:46:38.202692  In relocation handler: CPU 3

  730 17:46:38.206442  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  731 17:46:38.213045  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  732 17:46:38.213669  Relocation complete.

  733 17:46:38.219794  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  734 17:46:38.222882  In relocation handler: CPU 7

  735 17:46:38.229812  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  736 17:46:38.230294  Relocation complete.

  737 17:46:38.236267  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  738 17:46:38.239324  In relocation handler: CPU 6

  739 17:46:38.242693  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  740 17:46:38.249627  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  741 17:46:38.252859  Relocation complete.

  742 17:46:38.253521  Initializing CPU #0

  743 17:46:38.255961  CPU: vendor Intel device 906a4

  744 17:46:38.259424  CPU: family 06, model 9a, stepping 04

  745 17:46:38.262464  Clearing out pending MCEs

  746 17:46:38.266082  cpu: energy policy set to 7

  747 17:46:38.269580  Turbo is available but hidden

  748 17:46:38.272885  Turbo is available and visible

  749 17:46:38.276359  microcode: Update skipped, already up-to-date

  750 17:46:38.279856  CPU #0 initialized

  751 17:46:38.280446  Initializing CPU #5

  752 17:46:38.282826  Initializing CPU #1

  753 17:46:38.285955  Initializing CPU #3

  754 17:46:38.289148  CPU: vendor Intel device 906a4

  755 17:46:38.292674  CPU: family 06, model 9a, stepping 04

  756 17:46:38.293166  Initializing CPU #2

  757 17:46:38.296013  CPU: vendor Intel device 906a4

  758 17:46:38.299347  CPU: family 06, model 9a, stepping 04

  759 17:46:38.302783  CPU: vendor Intel device 906a4

  760 17:46:38.308992  CPU: family 06, model 9a, stepping 04

  761 17:46:38.309745  Initializing CPU #4

  762 17:46:38.312401  CPU: vendor Intel device 906a4

  763 17:46:38.315721  CPU: family 06, model 9a, stepping 04

  764 17:46:38.319338  Initializing CPU #6

  765 17:46:38.319908  Initializing CPU #7

  766 17:46:38.322390  CPU: vendor Intel device 906a4

  767 17:46:38.329258  CPU: family 06, model 9a, stepping 04

  768 17:46:38.329885  Clearing out pending MCEs

  769 17:46:38.333071  Clearing out pending MCEs

  770 17:46:38.336552  Clearing out pending MCEs

  771 17:46:38.339133  cpu: energy policy set to 7

  772 17:46:38.342289  Clearing out pending MCEs

  773 17:46:38.342763  cpu: energy policy set to 7

  774 17:46:38.346219  cpu: energy policy set to 7

  775 17:46:38.349012  CPU: vendor Intel device 906a4

  776 17:46:38.352549  CPU: family 06, model 9a, stepping 04

  777 17:46:38.355773  cpu: energy policy set to 7

  778 17:46:38.362325  microcode: Update skipped, already up-to-date

  779 17:46:38.362883  CPU #2 initialized

  780 17:46:38.369055  microcode: Update skipped, already up-to-date

  781 17:46:38.369650  CPU #3 initialized

  782 17:46:38.376071  microcode: Update skipped, already up-to-date

  783 17:46:38.376652  CPU #1 initialized

  784 17:46:38.379404  microcode: Update skipped, already up-to-date

  785 17:46:38.382515  CPU #4 initialized

  786 17:46:38.385747  Clearing out pending MCEs

  787 17:46:38.388907  CPU: vendor Intel device 906a4

  788 17:46:38.392235  CPU: family 06, model 9a, stepping 04

  789 17:46:38.395887  cpu: energy policy set to 7

  790 17:46:38.398961  Clearing out pending MCEs

  791 17:46:38.402799  microcode: Update skipped, already up-to-date

  792 17:46:38.406026  CPU #7 initialized

  793 17:46:38.406595  cpu: energy policy set to 7

  794 17:46:38.409142  Clearing out pending MCEs

  795 17:46:38.415410  microcode: Update skipped, already up-to-date

  796 17:46:38.415973  CPU #6 initialized

  797 17:46:38.419336  cpu: energy policy set to 7

  798 17:46:38.422120  microcode: Update skipped, already up-to-date

  799 17:46:38.425914  CPU #5 initialized

  800 17:46:38.429367  bsp_do_flight_plan done after 695 msecs.

  801 17:46:38.432448  CPU: frequency set to 4400 MHz

  802 17:46:38.435600  Enabling SMIs.

  803 17:46:38.442263  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  804 17:46:38.457248  Probing TPM I2C: done! DID_VID 0x00281ae0

  805 17:46:38.460038  Locality already claimed

  806 17:46:38.463329  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  807 17:46:38.475171  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  808 17:46:38.478075  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  809 17:46:38.485255  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  810 17:46:38.491513  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  811 17:46:38.494833  Found a VBT of 9216 bytes after decompression

  812 17:46:38.498644  PCI  1.0, PIN A, using IRQ #16

  813 17:46:38.501910  PCI  2.0, PIN A, using IRQ #17

  814 17:46:38.505432  PCI  4.0, PIN A, using IRQ #18

  815 17:46:38.508514  PCI  5.0, PIN A, using IRQ #16

  816 17:46:38.512255  PCI  6.0, PIN A, using IRQ #16

  817 17:46:38.515419  PCI  6.2, PIN C, using IRQ #18

  818 17:46:38.518565  PCI  7.0, PIN A, using IRQ #19

  819 17:46:38.521620  PCI  7.1, PIN B, using IRQ #20

  820 17:46:38.525229  PCI  7.2, PIN C, using IRQ #21

  821 17:46:38.528436  PCI  7.3, PIN D, using IRQ #22

  822 17:46:38.531557  PCI  8.0, PIN A, using IRQ #23

  823 17:46:38.532124  PCI  D.0, PIN A, using IRQ #17

  824 17:46:38.535521  PCI  D.1, PIN B, using IRQ #19

  825 17:46:38.538079  PCI 10.0, PIN A, using IRQ #24

  826 17:46:38.541174  PCI 10.1, PIN B, using IRQ #25

  827 17:46:38.544759  PCI 10.6, PIN C, using IRQ #20

  828 17:46:38.547995  PCI 10.7, PIN D, using IRQ #21

  829 17:46:38.551496  PCI 11.0, PIN A, using IRQ #26

  830 17:46:38.554667  PCI 11.1, PIN B, using IRQ #27

  831 17:46:38.558082  PCI 11.2, PIN C, using IRQ #28

  832 17:46:38.561645  PCI 11.3, PIN D, using IRQ #29

  833 17:46:38.564848  PCI 12.0, PIN A, using IRQ #30

  834 17:46:38.567890  PCI 12.6, PIN B, using IRQ #31

  835 17:46:38.571111  PCI 12.7, PIN C, using IRQ #22

  836 17:46:38.574410  PCI 13.0, PIN A, using IRQ #32

  837 17:46:38.578211  PCI 13.1, PIN B, using IRQ #33

  838 17:46:38.581420  PCI 13.2, PIN C, using IRQ #34

  839 17:46:38.584670  PCI 13.3, PIN D, using IRQ #35

  840 17:46:38.588185  PCI 14.0, PIN B, using IRQ #23

  841 17:46:38.588756  PCI 14.1, PIN A, using IRQ #36

  842 17:46:38.591405  PCI 14.3, PIN C, using IRQ #17

  843 17:46:38.594580  PCI 15.0, PIN A, using IRQ #37

  844 17:46:38.597871  PCI 15.1, PIN B, using IRQ #38

  845 17:46:38.601061  PCI 15.2, PIN C, using IRQ #39

  846 17:46:38.604368  PCI 15.3, PIN D, using IRQ #40

  847 17:46:38.607791  PCI 16.0, PIN A, using IRQ #18

  848 17:46:38.611251  PCI 16.1, PIN B, using IRQ #19

  849 17:46:38.614551  PCI 16.2, PIN C, using IRQ #20

  850 17:46:38.617629  PCI 16.3, PIN D, using IRQ #21

  851 17:46:38.621056  PCI 16.4, PIN A, using IRQ #18

  852 17:46:38.624338  PCI 16.5, PIN B, using IRQ #19

  853 17:46:38.627592  PCI 17.0, PIN A, using IRQ #22

  854 17:46:38.631320  PCI 19.0, PIN A, using IRQ #41

  855 17:46:38.634759  PCI 19.1, PIN B, using IRQ #42

  856 17:46:38.637875  PCI 19.2, PIN C, using IRQ #43

  857 17:46:38.641489  PCI 1C.0, PIN A, using IRQ #16

  858 17:46:38.642105  PCI 1C.1, PIN B, using IRQ #17

  859 17:46:38.644980  PCI 1C.2, PIN C, using IRQ #18

  860 17:46:38.647668  PCI 1C.3, PIN D, using IRQ #19

  861 17:46:38.650967  PCI 1C.4, PIN A, using IRQ #16

  862 17:46:38.654060  PCI 1C.5, PIN B, using IRQ #17

  863 17:46:38.657872  PCI 1C.6, PIN C, using IRQ #18

  864 17:46:38.661078  PCI 1C.7, PIN D, using IRQ #19

  865 17:46:38.664540  PCI 1D.0, PIN A, using IRQ #16

  866 17:46:38.668074  PCI 1D.1, PIN B, using IRQ #17

  867 17:46:38.670959  PCI 1D.2, PIN C, using IRQ #18

  868 17:46:38.674179  PCI 1D.3, PIN D, using IRQ #19

  869 17:46:38.677927  PCI 1E.0, PIN A, using IRQ #23

  870 17:46:38.681164  PCI 1E.1, PIN B, using IRQ #20

  871 17:46:38.684885  PCI 1E.2, PIN C, using IRQ #44

  872 17:46:38.687721  PCI 1E.3, PIN D, using IRQ #45

  873 17:46:38.690852  PCI 1F.3, PIN B, using IRQ #22

  874 17:46:38.691322  PCI 1F.4, PIN C, using IRQ #23

  875 17:46:38.694130  PCI 1F.6, PIN D, using IRQ #20

  876 17:46:38.697913  PCI 1F.7, PIN A, using IRQ #21

  877 17:46:38.704194  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  878 17:46:38.710721  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  879 17:46:38.888133  FSPS returned 0

  880 17:46:38.891525  Executing Phase 1 of FspMultiPhaseSiInit

  881 17:46:38.900989  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  882 17:46:38.904319  port C0 DISC req: usage 1 usb3 1 usb2 1

  883 17:46:38.907626  Raw Buffer output 0 00000111

  884 17:46:38.910912  Raw Buffer output 1 00000000

  885 17:46:38.914933  pmc_send_ipc_cmd succeeded

  886 17:46:38.921416  port C1 DISC req: usage 1 usb3 3 usb2 3

  887 17:46:38.921942  Raw Buffer output 0 00000331

  888 17:46:38.925044  Raw Buffer output 1 00000000

  889 17:46:38.928857  pmc_send_ipc_cmd succeeded

  890 17:46:38.932641  Detected 6 core, 8 thread CPU.

  891 17:46:38.935958  Detected 6 core, 8 thread CPU.

  892 17:46:38.941171  Detected 6 core, 8 thread CPU.

  893 17:46:38.944478  Detected 6 core, 8 thread CPU.

  894 17:46:38.948033  Detected 6 core, 8 thread CPU.

  895 17:46:38.951129  Detected 6 core, 8 thread CPU.

  896 17:46:38.954262  Detected 6 core, 8 thread CPU.

  897 17:46:38.958015  Detected 6 core, 8 thread CPU.

  898 17:46:38.960896  Detected 6 core, 8 thread CPU.

  899 17:46:38.964406  Detected 6 core, 8 thread CPU.

  900 17:46:38.967698  Detected 6 core, 8 thread CPU.

  901 17:46:38.970823  Detected 6 core, 8 thread CPU.

  902 17:46:38.974341  Detected 6 core, 8 thread CPU.

  903 17:46:38.977659  Detected 6 core, 8 thread CPU.

  904 17:46:38.981098  Detected 6 core, 8 thread CPU.

  905 17:46:38.984357  Detected 6 core, 8 thread CPU.

  906 17:46:38.987675  Detected 6 core, 8 thread CPU.

  907 17:46:38.991400  Detected 6 core, 8 thread CPU.

  908 17:46:38.994488  Detected 6 core, 8 thread CPU.

  909 17:46:38.998183  Detected 6 core, 8 thread CPU.

  910 17:46:39.001223  Detected 6 core, 8 thread CPU.

  911 17:46:39.004171  Detected 6 core, 8 thread CPU.

  912 17:46:39.293174  Detected 6 core, 8 thread CPU.

  913 17:46:39.296503  Detected 6 core, 8 thread CPU.

  914 17:46:39.299710  Detected 6 core, 8 thread CPU.

  915 17:46:39.303036  Detected 6 core, 8 thread CPU.

  916 17:46:39.306429  Detected 6 core, 8 thread CPU.

  917 17:46:39.309895  Detected 6 core, 8 thread CPU.

  918 17:46:39.313116  Detected 6 core, 8 thread CPU.

  919 17:46:39.316451  Detected 6 core, 8 thread CPU.

  920 17:46:39.319672  Detected 6 core, 8 thread CPU.

  921 17:46:39.323285  Detected 6 core, 8 thread CPU.

  922 17:46:39.326528  Detected 6 core, 8 thread CPU.

  923 17:46:39.329925  Detected 6 core, 8 thread CPU.

  924 17:46:39.333189  Detected 6 core, 8 thread CPU.

  925 17:46:39.336648  Detected 6 core, 8 thread CPU.

  926 17:46:39.339760  Detected 6 core, 8 thread CPU.

  927 17:46:39.343657  Detected 6 core, 8 thread CPU.

  928 17:46:39.346491  Detected 6 core, 8 thread CPU.

  929 17:46:39.350387  Detected 6 core, 8 thread CPU.

  930 17:46:39.353471  Detected 6 core, 8 thread CPU.

  931 17:46:39.356439  Detected 6 core, 8 thread CPU.

  932 17:46:39.360091  Display FSP Version Info HOB

  933 17:46:39.363604  Reference Code - CPU = c.0.65.70

  934 17:46:39.364080  uCode Version = 0.0.4.23

  935 17:46:39.366848  TXT ACM version = ff.ff.ff.ffff

  936 17:46:39.370180  Reference Code - ME = c.0.65.70

  937 17:46:39.373423  MEBx version = 0.0.0.0

  938 17:46:39.376925  ME Firmware Version = Lite SKU

  939 17:46:39.380138  Reference Code - PCH = c.0.65.70

  940 17:46:39.383858  PCH-CRID Status = Disabled

  941 17:46:39.387071  PCH-CRID Original Value = ff.ff.ff.ffff

  942 17:46:39.390103  PCH-CRID New Value = ff.ff.ff.ffff

  943 17:46:39.393374  OPROM - RST - RAID = ff.ff.ff.ffff

  944 17:46:39.396861  PCH Hsio Version = 4.0.0.0

  945 17:46:39.400319  Reference Code - SA - System Agent = c.0.65.70

  946 17:46:39.403618  Reference Code - MRC = 0.0.3.80

  947 17:46:39.407194  SA - PCIe Version = c.0.65.70

  948 17:46:39.410130  SA-CRID Status = Disabled

  949 17:46:39.413472  SA-CRID Original Value = 0.0.0.4

  950 17:46:39.417048  SA-CRID New Value = 0.0.0.4

  951 17:46:39.420149  OPROM - VBIOS = ff.ff.ff.ffff

  952 17:46:39.423726  IO Manageability Engine FW Version = 24.0.4.0

  953 17:46:39.426657  PHY Build Version = 0.0.0.2016

  954 17:46:39.430134  Thunderbolt(TM) FW Version = 0.0.0.0

  955 17:46:39.436848  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  956 17:46:39.443513  BS: BS_DEV_INIT_CHIPS run times (exec / console): 488 / 507 ms

  957 17:46:39.446848  Enumerating buses...

  958 17:46:39.450597  Show all devs... Before device enumeration.

  959 17:46:39.454013  Root Device: enabled 1

  960 17:46:39.454583  CPU_CLUSTER: 0: enabled 1

  961 17:46:39.456381  DOMAIN: 0000: enabled 1

  962 17:46:39.460082  GPIO: 0: enabled 1

  963 17:46:39.460555  PCI: 00:00.0: enabled 1

  964 17:46:39.463327  PCI: 00:01.0: enabled 0

  965 17:46:39.466826  PCI: 00:01.1: enabled 0

  966 17:46:39.470629  PCI: 00:02.0: enabled 1

  967 17:46:39.471098  PCI: 00:04.0: enabled 1

  968 17:46:39.473297  PCI: 00:05.0: enabled 0

  969 17:46:39.476654  PCI: 00:06.0: enabled 1

  970 17:46:39.480105  PCI: 00:06.2: enabled 0

  971 17:46:39.480580  PCI: 00:07.0: enabled 0

  972 17:46:39.483292  PCI: 00:07.1: enabled 0

  973 17:46:39.486626  PCI: 00:07.2: enabled 0

  974 17:46:39.490175  PCI: 00:07.3: enabled 0

  975 17:46:39.490652  PCI: 00:08.0: enabled 0

  976 17:46:39.493404  PCI: 00:09.0: enabled 0

  977 17:46:39.496745  PCI: 00:0a.0: enabled 1

  978 17:46:39.497376  PCI: 00:0d.0: enabled 1

  979 17:46:39.500083  PCI: 00:0d.1: enabled 0

  980 17:46:39.503823  PCI: 00:0d.2: enabled 0

  981 17:46:39.507134  PCI: 00:0d.3: enabled 0

  982 17:46:39.507603  PCI: 00:0e.0: enabled 0

  983 17:46:39.510041  PCI: 00:10.0: enabled 0

  984 17:46:39.513680  PCI: 00:10.1: enabled 0

  985 17:46:39.516985  PCI: 00:10.6: enabled 0

  986 17:46:39.517455  PCI: 00:10.7: enabled 0

  987 17:46:39.520265  PCI: 00:12.0: enabled 0

  988 17:46:39.523524  PCI: 00:12.6: enabled 0

  989 17:46:39.527075  PCI: 00:12.7: enabled 0

  990 17:46:39.527669  PCI: 00:13.0: enabled 0

  991 17:46:39.530196  PCI: 00:14.0: enabled 1

  992 17:46:39.533203  PCI: 00:14.1: enabled 0

  993 17:46:39.533718  PCI: 00:14.2: enabled 1

  994 17:46:39.536862  PCI: 00:14.3: enabled 1

  995 17:46:39.540107  PCI: 00:15.0: enabled 1

  996 17:46:39.543366  PCI: 00:15.1: enabled 1

  997 17:46:39.543933  PCI: 00:15.2: enabled 0

  998 17:46:39.547032  PCI: 00:15.3: enabled 1

  999 17:46:39.550416  PCI: 00:16.0: enabled 1

 1000 17:46:39.553528  PCI: 00:16.1: enabled 0

 1001 17:46:39.554040  PCI: 00:16.2: enabled 0

 1002 17:46:39.556907  PCI: 00:16.3: enabled 0

 1003 17:46:39.560198  PCI: 00:16.4: enabled 0

 1004 17:46:39.563554  PCI: 00:16.5: enabled 0

 1005 17:46:39.564029  PCI: 00:17.0: enabled 1

 1006 17:46:39.566763  PCI: 00:19.0: enabled 0

 1007 17:46:39.569807  PCI: 00:19.1: enabled 1

 1008 17:46:39.570277  PCI: 00:19.2: enabled 0

 1009 17:46:39.573524  PCI: 00:1a.0: enabled 0

 1010 17:46:39.576841  PCI: 00:1c.0: enabled 0

 1011 17:46:39.580391  PCI: 00:1c.1: enabled 0

 1012 17:46:39.580956  PCI: 00:1c.2: enabled 0

 1013 17:46:39.583424  PCI: 00:1c.3: enabled 0

 1014 17:46:39.586710  PCI: 00:1c.4: enabled 0

 1015 17:46:39.590265  PCI: 00:1c.5: enabled 0

 1016 17:46:39.590837  PCI: 00:1c.6: enabled 0

 1017 17:46:39.593393  PCI: 00:1c.7: enabled 0

 1018 17:46:39.596752  PCI: 00:1d.0: enabled 0

 1019 17:46:39.599882  PCI: 00:1d.1: enabled 0

 1020 17:46:39.600355  PCI: 00:1d.2: enabled 0

 1021 17:46:39.603334  PCI: 00:1d.3: enabled 0

 1022 17:46:39.606445  PCI: 00:1e.0: enabled 1

 1023 17:46:39.606918  PCI: 00:1e.1: enabled 0

 1024 17:46:39.609891  PCI: 00:1e.2: enabled 0

 1025 17:46:39.613331  PCI: 00:1e.3: enabled 1

 1026 17:46:39.616420  PCI: 00:1f.0: enabled 1

 1027 17:46:39.616883  PCI: 00:1f.1: enabled 0

 1028 17:46:39.619871  PCI: 00:1f.2: enabled 1

 1029 17:46:39.622975  PCI: 00:1f.3: enabled 1

 1030 17:46:39.626585  PCI: 00:1f.4: enabled 0

 1031 17:46:39.627051  PCI: 00:1f.5: enabled 1

 1032 17:46:39.630136  PCI: 00:1f.6: enabled 0

 1033 17:46:39.633476  PCI: 00:1f.7: enabled 0

 1034 17:46:39.636692  GENERIC: 0.0: enabled 1

 1035 17:46:39.637153  GENERIC: 0.0: enabled 1

 1036 17:46:39.639931  GENERIC: 1.0: enabled 1

 1037 17:46:39.643245  GENERIC: 0.0: enabled 1

 1038 17:46:39.646635  GENERIC: 1.0: enabled 1

 1039 17:46:39.647102  USB0 port 0: enabled 1

 1040 17:46:39.649637  USB0 port 0: enabled 1

 1041 17:46:39.653175  GENERIC: 0.0: enabled 1

 1042 17:46:39.653857  I2C: 00:1a: enabled 1

 1043 17:46:39.656530  I2C: 00:31: enabled 1

 1044 17:46:39.659864  I2C: 00:32: enabled 1

 1045 17:46:39.660328  I2C: 00:50: enabled 1

 1046 17:46:39.663241  I2C: 00:10: enabled 1

 1047 17:46:39.666658  I2C: 00:15: enabled 1

 1048 17:46:39.667125  I2C: 00:2c: enabled 1

 1049 17:46:39.669527  GENERIC: 0.0: enabled 1

 1050 17:46:39.673153  SPI: 00: enabled 1

 1051 17:46:39.673666  PNP: 0c09.0: enabled 1

 1052 17:46:39.676253  GENERIC: 0.0: enabled 1

 1053 17:46:39.679957  USB3 port 0: enabled 1

 1054 17:46:39.683119  USB3 port 1: enabled 0

 1055 17:46:39.683679  USB3 port 2: enabled 1

 1056 17:46:39.686398  USB3 port 3: enabled 0

 1057 17:46:39.689924  USB2 port 0: enabled 1

 1058 17:46:39.690479  USB2 port 1: enabled 0

 1059 17:46:39.692890  USB2 port 2: enabled 1

 1060 17:46:39.696099  USB2 port 3: enabled 0

 1061 17:46:39.699723  USB2 port 4: enabled 0

 1062 17:46:39.700181  USB2 port 5: enabled 1

 1063 17:46:39.703126  USB2 port 6: enabled 0

 1064 17:46:39.706481  USB2 port 7: enabled 0

 1065 17:46:39.706994  USB2 port 8: enabled 1

 1066 17:46:39.709729  USB2 port 9: enabled 1

 1067 17:46:39.712690  USB3 port 0: enabled 1

 1068 17:46:39.713157  USB3 port 1: enabled 0

 1069 17:46:39.716066  USB3 port 2: enabled 0

 1070 17:46:39.719485  USB3 port 3: enabled 0

 1071 17:46:39.723017  GENERIC: 0.0: enabled 1

 1072 17:46:39.723482  GENERIC: 1.0: enabled 1

 1073 17:46:39.726264  APIC: 00: enabled 1

 1074 17:46:39.729442  APIC: 16: enabled 1

 1075 17:46:39.729958  APIC: 10: enabled 1

 1076 17:46:39.732799  APIC: 12: enabled 1

 1077 17:46:39.733411  APIC: 14: enabled 1

 1078 17:46:39.736187  APIC: 01: enabled 1

 1079 17:46:39.739290  APIC: 08: enabled 1

 1080 17:46:39.739810  APIC: 09: enabled 1

 1081 17:46:39.742941  Compare with tree...

 1082 17:46:39.746372  Root Device: enabled 1

 1083 17:46:39.746889   CPU_CLUSTER: 0: enabled 1

 1084 17:46:39.749204    APIC: 00: enabled 1

 1085 17:46:39.752631    APIC: 16: enabled 1

 1086 17:46:39.753097    APIC: 10: enabled 1

 1087 17:46:39.755971    APIC: 12: enabled 1

 1088 17:46:39.759237    APIC: 14: enabled 1

 1089 17:46:39.762830    APIC: 01: enabled 1

 1090 17:46:39.763390    APIC: 08: enabled 1

 1091 17:46:39.766127    APIC: 09: enabled 1

 1092 17:46:39.769206   DOMAIN: 0000: enabled 1

 1093 17:46:39.769710    GPIO: 0: enabled 1

 1094 17:46:39.772761    PCI: 00:00.0: enabled 1

 1095 17:46:39.776231    PCI: 00:01.0: enabled 0

 1096 17:46:39.779566    PCI: 00:01.1: enabled 0

 1097 17:46:39.780130    PCI: 00:02.0: enabled 1

 1098 17:46:39.782411    PCI: 00:04.0: enabled 1

 1099 17:46:39.785940     GENERIC: 0.0: enabled 1

 1100 17:46:39.789651    PCI: 00:05.0: enabled 0

 1101 17:46:39.792801    PCI: 00:06.0: enabled 1

 1102 17:46:39.793264    PCI: 00:06.2: enabled 0

 1103 17:46:39.796379    PCI: 00:08.0: enabled 0

 1104 17:46:39.799233    PCI: 00:09.0: enabled 0

 1105 17:46:39.802549    PCI: 00:0a.0: enabled 1

 1106 17:46:39.806180    PCI: 00:0d.0: enabled 1

 1107 17:46:39.806775     USB0 port 0: enabled 1

 1108 17:46:39.809226      USB3 port 0: enabled 1

 1109 17:46:39.812577      USB3 port 1: enabled 0

 1110 17:46:39.815878      USB3 port 2: enabled 1

 1111 17:46:39.818991      USB3 port 3: enabled 0

 1112 17:46:39.819459    PCI: 00:0d.1: enabled 0

 1113 17:46:39.822674    PCI: 00:0d.2: enabled 0

 1114 17:46:39.826106    PCI: 00:0d.3: enabled 0

 1115 17:46:39.829645    PCI: 00:0e.0: enabled 0

 1116 17:46:39.832636    PCI: 00:10.0: enabled 0

 1117 17:46:39.833103    PCI: 00:10.1: enabled 0

 1118 17:46:39.835962    PCI: 00:10.6: enabled 0

 1119 17:46:39.839160    PCI: 00:10.7: enabled 0

 1120 17:46:39.842286    PCI: 00:12.0: enabled 0

 1121 17:46:39.845654    PCI: 00:12.6: enabled 0

 1122 17:46:39.846124    PCI: 00:12.7: enabled 0

 1123 17:46:39.849269    PCI: 00:13.0: enabled 0

 1124 17:46:39.852570    PCI: 00:14.0: enabled 1

 1125 17:46:39.855780     USB0 port 0: enabled 1

 1126 17:46:39.858792      USB2 port 0: enabled 1

 1127 17:46:39.859255      USB2 port 1: enabled 0

 1128 17:46:39.862067      USB2 port 2: enabled 1

 1129 17:46:39.866118      USB2 port 3: enabled 0

 1130 17:46:39.869371      USB2 port 4: enabled 0

 1131 17:46:39.872103      USB2 port 5: enabled 1

 1132 17:46:39.876221      USB2 port 6: enabled 0

 1133 17:46:39.876778      USB2 port 7: enabled 0

 1134 17:46:39.878985      USB2 port 8: enabled 1

 1135 17:46:39.882128      USB2 port 9: enabled 1

 1136 17:46:39.885813      USB3 port 0: enabled 1

 1137 17:46:39.888729      USB3 port 1: enabled 0

 1138 17:46:39.892026      USB3 port 2: enabled 0

 1139 17:46:39.892490      USB3 port 3: enabled 0

 1140 17:46:39.895613    PCI: 00:14.1: enabled 0

 1141 17:46:39.899055    PCI: 00:14.2: enabled 1

 1142 17:46:39.902011    PCI: 00:14.3: enabled 1

 1143 17:46:39.905501     GENERIC: 0.0: enabled 1

 1144 17:46:39.906019    PCI: 00:15.0: enabled 1

 1145 17:46:39.908711     I2C: 00:1a: enabled 1

 1146 17:46:39.912232     I2C: 00:31: enabled 1

 1147 17:46:39.915522     I2C: 00:32: enabled 1

 1148 17:46:39.915982    PCI: 00:15.1: enabled 1

 1149 17:46:39.918894     I2C: 00:50: enabled 1

 1150 17:46:39.922072    PCI: 00:15.2: enabled 0

 1151 17:46:39.925371    PCI: 00:15.3: enabled 1

 1152 17:46:39.928610     I2C: 00:10: enabled 1

 1153 17:46:39.929122    PCI: 00:16.0: enabled 1

 1154 17:46:39.932317    PCI: 00:16.1: enabled 0

 1155 17:46:39.935625    PCI: 00:16.2: enabled 0

 1156 17:46:39.938799    PCI: 00:16.3: enabled 0

 1157 17:46:39.942311    PCI: 00:16.4: enabled 0

 1158 17:46:39.942942    PCI: 00:16.5: enabled 0

 1159 17:46:39.945465    PCI: 00:17.0: enabled 1

 1160 17:46:39.948551    PCI: 00:19.0: enabled 0

 1161 17:46:39.951981    PCI: 00:19.1: enabled 1

 1162 17:46:39.952452     I2C: 00:15: enabled 1

 1163 17:46:39.955359     I2C: 00:2c: enabled 1

 1164 17:46:39.958728    PCI: 00:19.2: enabled 0

 1165 17:46:39.962170    PCI: 00:1a.0: enabled 0

 1166 17:46:39.965486    PCI: 00:1e.0: enabled 1

 1167 17:46:39.966117    PCI: 00:1e.1: enabled 0

 1168 17:46:39.968809    PCI: 00:1e.2: enabled 0

 1169 17:46:39.971822    PCI: 00:1e.3: enabled 1

 1170 17:46:39.975186     SPI: 00: enabled 1

 1171 17:46:39.975647    PCI: 00:1f.0: enabled 1

 1172 17:46:39.978941     PNP: 0c09.0: enabled 1

 1173 17:46:39.981881    PCI: 00:1f.1: enabled 0

 1174 17:46:39.985458    PCI: 00:1f.2: enabled 1

 1175 17:46:39.988814     GENERIC: 0.0: enabled 1

 1176 17:46:39.991824      GENERIC: 0.0: enabled 1

 1177 17:46:39.992284      GENERIC: 1.0: enabled 1

 1178 17:46:39.995152    PCI: 00:1f.3: enabled 1

 1179 17:46:39.998285    PCI: 00:1f.4: enabled 0

 1180 17:46:40.001670    PCI: 00:1f.5: enabled 1

 1181 17:46:40.005133    PCI: 00:1f.6: enabled 0

 1182 17:46:40.005652    PCI: 00:1f.7: enabled 0

 1183 17:46:40.008770  Root Device scanning...

 1184 17:46:40.012029  scan_static_bus for Root Device

 1185 17:46:40.015574  CPU_CLUSTER: 0 enabled

 1186 17:46:40.016132  DOMAIN: 0000 enabled

 1187 17:46:40.018365  DOMAIN: 0000 scanning...

 1188 17:46:40.021625  PCI: pci_scan_bus for bus 00

 1189 17:46:40.024749  PCI: 00:00.0 [8086/0000] ops

 1190 17:46:40.028794  PCI: 00:00.0 [8086/4609] enabled

 1191 17:46:40.031999  PCI: 00:02.0 [8086/0000] bus ops

 1192 17:46:40.035286  PCI: 00:02.0 [8086/46b3] enabled

 1193 17:46:40.038659  PCI: 00:04.0 [8086/0000] bus ops

 1194 17:46:40.041785  PCI: 00:04.0 [8086/461d] enabled

 1195 17:46:40.044970  PCI: 00:06.0 [8086/0000] bus ops

 1196 17:46:40.048142  PCI: 00:06.0 [8086/464d] enabled

 1197 17:46:40.051513  PCI: 00:08.0 [8086/464f] disabled

 1198 17:46:40.054839  PCI: 00:0a.0 [8086/467d] enabled

 1199 17:46:40.058575  PCI: 00:0d.0 [8086/0000] bus ops

 1200 17:46:40.061657  PCI: 00:0d.0 [8086/461e] enabled

 1201 17:46:40.064709  PCI: 00:14.0 [8086/0000] bus ops

 1202 17:46:40.068210  PCI: 00:14.0 [8086/51ed] enabled

 1203 17:46:40.071435  PCI: 00:14.2 [8086/51ef] enabled

 1204 17:46:40.075043  PCI: 00:14.3 [8086/0000] bus ops

 1205 17:46:40.078392  PCI: 00:14.3 [8086/51f0] enabled

 1206 17:46:40.081456  PCI: 00:15.0 [8086/0000] bus ops

 1207 17:46:40.084909  PCI: 00:15.0 [8086/51e8] enabled

 1208 17:46:40.088528  PCI: 00:15.1 [8086/0000] bus ops

 1209 17:46:40.091904  PCI: 00:15.1 [8086/51e9] enabled

 1210 17:46:40.095082  PCI: 00:15.2 [8086/0000] bus ops

 1211 17:46:40.098253  PCI: 00:15.2 [8086/51ea] disabled

 1212 17:46:40.101406  PCI: 00:15.3 [8086/0000] bus ops

 1213 17:46:40.104865  PCI: 00:15.3 [8086/51eb] enabled

 1214 17:46:40.108173  PCI: 00:16.0 [8086/0000] ops

 1215 17:46:40.111793  PCI: 00:16.0 [8086/51e0] enabled

 1216 17:46:40.118364  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1217 17:46:40.121510  PCI: 00:19.0 [8086/0000] bus ops

 1218 17:46:40.125071  PCI: 00:19.0 [8086/51c5] disabled

 1219 17:46:40.128082  PCI: 00:19.1 [8086/0000] bus ops

 1220 17:46:40.131521  PCI: 00:19.1 [8086/51c6] enabled

 1221 17:46:40.134491  PCI: 00:1e.0 [8086/0000] ops

 1222 17:46:40.138154  PCI: 00:1e.0 [8086/51a8] enabled

 1223 17:46:40.141522  PCI: 00:1e.3 [8086/0000] bus ops

 1224 17:46:40.144833  PCI: 00:1e.3 [8086/51ab] enabled

 1225 17:46:40.148240  PCI: 00:1f.0 [8086/0000] bus ops

 1226 17:46:40.151487  PCI: 00:1f.0 [8086/5182] enabled

 1227 17:46:40.154907  RTC Init

 1228 17:46:40.157984  Set power on after power failure.

 1229 17:46:40.158682  Disabling Deep S3

 1230 17:46:40.161338  Disabling Deep S3

 1231 17:46:40.161895  Disabling Deep S4

 1232 17:46:40.164938  Disabling Deep S4

 1233 17:46:40.167879  Disabling Deep S5

 1234 17:46:40.168345  Disabling Deep S5

 1235 17:46:40.171601  PCI: 00:1f.2 [0000/0000] hidden

 1236 17:46:40.174707  PCI: 00:1f.3 [8086/0000] bus ops

 1237 17:46:40.178078  PCI: 00:1f.3 [8086/51c8] enabled

 1238 17:46:40.181727  PCI: 00:1f.5 [8086/0000] bus ops

 1239 17:46:40.184820  PCI: 00:1f.5 [8086/51a4] enabled

 1240 17:46:40.188036  GPIO: 0 enabled

 1241 17:46:40.191607  PCI: Leftover static devices:

 1242 17:46:40.192159  PCI: 00:01.0

 1243 17:46:40.192529  PCI: 00:01.1

 1244 17:46:40.194966  PCI: 00:05.0

 1245 17:46:40.195518  PCI: 00:06.2

 1246 17:46:40.198291  PCI: 00:09.0

 1247 17:46:40.198888  PCI: 00:0d.1

 1248 17:46:40.199261  PCI: 00:0d.2

 1249 17:46:40.201454  PCI: 00:0d.3

 1250 17:46:40.201986  PCI: 00:0e.0

 1251 17:46:40.205004  PCI: 00:10.0

 1252 17:46:40.205510  PCI: 00:10.1

 1253 17:46:40.206209  PCI: 00:10.6

 1254 17:46:40.208247  PCI: 00:10.7

 1255 17:46:40.208760  PCI: 00:12.0

 1256 17:46:40.211230  PCI: 00:12.6

 1257 17:46:40.211750  PCI: 00:12.7

 1258 17:46:40.214638  PCI: 00:13.0

 1259 17:46:40.215159  PCI: 00:14.1

 1260 17:46:40.215571  PCI: 00:16.1

 1261 17:46:40.217905  PCI: 00:16.2

 1262 17:46:40.218366  PCI: 00:16.3

 1263 17:46:40.221284  PCI: 00:16.4

 1264 17:46:40.221863  PCI: 00:16.5

 1265 17:46:40.222282  PCI: 00:17.0

 1266 17:46:40.224952  PCI: 00:19.2

 1267 17:46:40.225593  PCI: 00:1a.0

 1268 17:46:40.227931  PCI: 00:1e.1

 1269 17:46:40.228390  PCI: 00:1e.2

 1270 17:46:40.228803  PCI: 00:1f.1

 1271 17:46:40.231420  PCI: 00:1f.4

 1272 17:46:40.231883  PCI: 00:1f.6

 1273 17:46:40.234733  PCI: 00:1f.7

 1274 17:46:40.238018  PCI: Check your devicetree.cb.

 1275 17:46:40.238533  PCI: 00:02.0 scanning...

 1276 17:46:40.241214  scan_generic_bus for PCI: 00:02.0

 1277 17:46:40.248133  scan_generic_bus for PCI: 00:02.0 done

 1278 17:46:40.251133  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1279 17:46:40.254672  PCI: 00:04.0 scanning...

 1280 17:46:40.257668  scan_generic_bus for PCI: 00:04.0

 1281 17:46:40.258350  GENERIC: 0.0 enabled

 1282 17:46:40.264697  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1283 17:46:40.271445  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1284 17:46:40.272010  PCI: 00:06.0 scanning...

 1285 17:46:40.278266  do_pci_scan_bridge for PCI: 00:06.0

 1286 17:46:40.278733  PCI: pci_scan_bus for bus 01

 1287 17:46:40.281208  PCI: 01:00.0 [15b7/5009] enabled

 1288 17:46:40.287735  Enabling Common Clock Configuration

 1289 17:46:40.290943  L1 Sub-State supported from root port 6

 1290 17:46:40.294610  L1 Sub-State Support = 0x5

 1291 17:46:40.297944  CommonModeRestoreTime = 0x6e

 1292 17:46:40.300857  Power On Value = 0x5, Power On Scale = 0x2

 1293 17:46:40.301324  ASPM: Enabled L1

 1294 17:46:40.307601  PCIe: Max_Payload_Size adjusted to 256

 1295 17:46:40.308162  PCI: 01:00.0: Enabled LTR

 1296 17:46:40.314158  PCI: 01:00.0: Programmed LTR max latencies

 1297 17:46:40.317781  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1298 17:46:40.320911  PCI: 00:0d.0 scanning...

 1299 17:46:40.324410  scan_static_bus for PCI: 00:0d.0

 1300 17:46:40.327841  USB0 port 0 enabled

 1301 17:46:40.328401  USB0 port 0 scanning...

 1302 17:46:40.331191  scan_static_bus for USB0 port 0

 1303 17:46:40.334529  USB3 port 0 enabled

 1304 17:46:40.337404  USB3 port 1 disabled

 1305 17:46:40.338006  USB3 port 2 enabled

 1306 17:46:40.340800  USB3 port 3 disabled

 1307 17:46:40.341353  USB3 port 0 scanning...

 1308 17:46:40.344053  scan_static_bus for USB3 port 0

 1309 17:46:40.351132  scan_static_bus for USB3 port 0 done

 1310 17:46:40.354532  scan_bus: bus USB3 port 0 finished in 6 msecs

 1311 17:46:40.357253  USB3 port 2 scanning...

 1312 17:46:40.360872  scan_static_bus for USB3 port 2

 1313 17:46:40.364456  scan_static_bus for USB3 port 2 done

 1314 17:46:40.367359  scan_bus: bus USB3 port 2 finished in 6 msecs

 1315 17:46:40.370892  scan_static_bus for USB0 port 0 done

 1316 17:46:40.377822  scan_bus: bus USB0 port 0 finished in 43 msecs

 1317 17:46:40.381048  scan_static_bus for PCI: 00:0d.0 done

 1318 17:46:40.384807  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1319 17:46:40.387380  PCI: 00:14.0 scanning...

 1320 17:46:40.390975  scan_static_bus for PCI: 00:14.0

 1321 17:46:40.394279  USB0 port 0 enabled

 1322 17:46:40.394801  USB0 port 0 scanning...

 1323 17:46:40.397398  scan_static_bus for USB0 port 0

 1324 17:46:40.400623  USB2 port 0 enabled

 1325 17:46:40.404650  USB2 port 1 disabled

 1326 17:46:40.405214  USB2 port 2 enabled

 1327 17:46:40.407387  USB2 port 3 disabled

 1328 17:46:40.407847  USB2 port 4 disabled

 1329 17:46:40.411292  USB2 port 5 enabled

 1330 17:46:40.414443  USB2 port 6 disabled

 1331 17:46:40.415005  USB2 port 7 disabled

 1332 17:46:40.417885  USB2 port 8 enabled

 1333 17:46:40.421247  USB2 port 9 enabled

 1334 17:46:40.421848  USB3 port 0 enabled

 1335 17:46:40.424103  USB3 port 1 disabled

 1336 17:46:40.427928  USB3 port 2 disabled

 1337 17:46:40.428486  USB3 port 3 disabled

 1338 17:46:40.431137  USB2 port 0 scanning...

 1339 17:46:40.434491  scan_static_bus for USB2 port 0

 1340 17:46:40.437154  scan_static_bus for USB2 port 0 done

 1341 17:46:40.440448  scan_bus: bus USB2 port 0 finished in 6 msecs

 1342 17:46:40.444128  USB2 port 2 scanning...

 1343 17:46:40.447389  scan_static_bus for USB2 port 2

 1344 17:46:40.450796  scan_static_bus for USB2 port 2 done

 1345 17:46:40.457229  scan_bus: bus USB2 port 2 finished in 6 msecs

 1346 17:46:40.457830  USB2 port 5 scanning...

 1347 17:46:40.460449  scan_static_bus for USB2 port 5

 1348 17:46:40.464171  scan_static_bus for USB2 port 5 done

 1349 17:46:40.470507  scan_bus: bus USB2 port 5 finished in 6 msecs

 1350 17:46:40.473865  USB2 port 8 scanning...

 1351 17:46:40.474326  scan_static_bus for USB2 port 8

 1352 17:46:40.480784  scan_static_bus for USB2 port 8 done

 1353 17:46:40.483511  scan_bus: bus USB2 port 8 finished in 6 msecs

 1354 17:46:40.487409  USB2 port 9 scanning...

 1355 17:46:40.490396  scan_static_bus for USB2 port 9

 1356 17:46:40.493663  scan_static_bus for USB2 port 9 done

 1357 17:46:40.497308  scan_bus: bus USB2 port 9 finished in 6 msecs

 1358 17:46:40.500782  USB3 port 0 scanning...

 1359 17:46:40.503696  scan_static_bus for USB3 port 0

 1360 17:46:40.507160  scan_static_bus for USB3 port 0 done

 1361 17:46:40.510374  scan_bus: bus USB3 port 0 finished in 6 msecs

 1362 17:46:40.513477  scan_static_bus for USB0 port 0 done

 1363 17:46:40.520760  scan_bus: bus USB0 port 0 finished in 120 msecs

 1364 17:46:40.523683  scan_static_bus for PCI: 00:14.0 done

 1365 17:46:40.530552  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1366 17:46:40.531016  PCI: 00:14.3 scanning...

 1367 17:46:40.533887  scan_static_bus for PCI: 00:14.3

 1368 17:46:40.536888  GENERIC: 0.0 enabled

 1369 17:46:40.540524  scan_static_bus for PCI: 00:14.3 done

 1370 17:46:40.547392  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1371 17:46:40.547949  PCI: 00:15.0 scanning...

 1372 17:46:40.550630  scan_static_bus for PCI: 00:15.0

 1373 17:46:40.553661  I2C: 00:1a enabled

 1374 17:46:40.554216  I2C: 00:31 enabled

 1375 17:46:40.557202  I2C: 00:32 enabled

 1376 17:46:40.560286  scan_static_bus for PCI: 00:15.0 done

 1377 17:46:40.566841  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1378 17:46:40.567448  PCI: 00:15.1 scanning...

 1379 17:46:40.570115  scan_static_bus for PCI: 00:15.1

 1380 17:46:40.573388  I2C: 00:50 enabled

 1381 17:46:40.576921  scan_static_bus for PCI: 00:15.1 done

 1382 17:46:40.583564  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1383 17:46:40.584214  PCI: 00:15.3 scanning...

 1384 17:46:40.587195  scan_static_bus for PCI: 00:15.3

 1385 17:46:40.590767  I2C: 00:10 enabled

 1386 17:46:40.593537  scan_static_bus for PCI: 00:15.3 done

 1387 17:46:40.596893  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1388 17:46:40.600304  PCI: 00:19.1 scanning...

 1389 17:46:40.603422  scan_static_bus for PCI: 00:19.1

 1390 17:46:40.606975  I2C: 00:15 enabled

 1391 17:46:40.607446  I2C: 00:2c enabled

 1392 17:46:40.613359  scan_static_bus for PCI: 00:19.1 done

 1393 17:46:40.616823  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1394 17:46:40.620545  PCI: 00:1e.3 scanning...

 1395 17:46:40.623762  scan_generic_bus for PCI: 00:1e.3

 1396 17:46:40.624323  SPI: 00 enabled

 1397 17:46:40.630127  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1398 17:46:40.633841  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1399 17:46:40.637001  PCI: 00:1f.0 scanning...

 1400 17:46:40.640131  scan_static_bus for PCI: 00:1f.0

 1401 17:46:40.643571  PNP: 0c09.0 enabled

 1402 17:46:40.646716  PNP: 0c09.0 scanning...

 1403 17:46:40.650042  scan_static_bus for PNP: 0c09.0

 1404 17:46:40.653302  scan_static_bus for PNP: 0c09.0 done

 1405 17:46:40.656874  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1406 17:46:40.659988  scan_static_bus for PCI: 00:1f.0 done

 1407 17:46:40.666840  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1408 17:46:40.667402  PCI: 00:1f.2 scanning...

 1409 17:46:40.669849  scan_static_bus for PCI: 00:1f.2

 1410 17:46:40.673349  GENERIC: 0.0 enabled

 1411 17:46:40.676918  GENERIC: 0.0 scanning...

 1412 17:46:40.679668  scan_static_bus for GENERIC: 0.0

 1413 17:46:40.682940  GENERIC: 0.0 enabled

 1414 17:46:40.683508  GENERIC: 1.0 enabled

 1415 17:46:40.686617  scan_static_bus for GENERIC: 0.0 done

 1416 17:46:40.693260  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1417 17:46:40.696501  scan_static_bus for PCI: 00:1f.2 done

 1418 17:46:40.699606  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1419 17:46:40.702858  PCI: 00:1f.3 scanning...

 1420 17:46:40.706484  scan_static_bus for PCI: 00:1f.3

 1421 17:46:40.709430  scan_static_bus for PCI: 00:1f.3 done

 1422 17:46:40.716260  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1423 17:46:40.716809  PCI: 00:1f.5 scanning...

 1424 17:46:40.723040  scan_generic_bus for PCI: 00:1f.5

 1425 17:46:40.726422  scan_generic_bus for PCI: 00:1f.5 done

 1426 17:46:40.730048  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1427 17:46:40.736714  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1428 17:46:40.740167  scan_static_bus for Root Device done

 1429 17:46:40.743492  scan_bus: bus Root Device finished in 729 msecs

 1430 17:46:40.744048  done

 1431 17:46:40.749644  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1432 17:46:40.756247  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1433 17:46:40.762847  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1434 17:46:40.766106  SPI flash protection: WPSW=1 SRP0=0

 1435 17:46:40.769744  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1436 17:46:40.776441  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1437 17:46:40.779390  found VGA at PCI: 00:02.0

 1438 17:46:40.783366  Setting up VGA for PCI: 00:02.0

 1439 17:46:40.786636  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1440 17:46:40.793305  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1441 17:46:40.796207  Allocating resources...

 1442 17:46:40.796764  Reading resources...

 1443 17:46:40.799403  Root Device read_resources bus 0 link: 0

 1444 17:46:40.806139  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1445 17:46:40.809636  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1446 17:46:40.813155  DOMAIN: 0000 read_resources bus 0 link: 0

 1447 17:46:40.819681  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1448 17:46:40.825858  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1449 17:46:40.832727  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1450 17:46:40.839521  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1451 17:46:40.845779  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1452 17:46:40.852745  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1453 17:46:40.859228  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1454 17:46:40.866330  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1455 17:46:40.869690  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1456 17:46:40.879289  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1457 17:46:40.882569  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1458 17:46:40.889192  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1459 17:46:40.896049  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1460 17:46:40.902452  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1461 17:46:40.908879  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1462 17:46:40.915681  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1463 17:46:40.922613  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1464 17:46:40.929117  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1465 17:46:40.936313  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1466 17:46:40.939440  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1467 17:46:40.945676  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1468 17:46:40.952453  PCI: 00:04.0 read_resources bus 1 link: 0

 1469 17:46:40.955766  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1470 17:46:40.958874  PCI: 00:06.0 read_resources bus 1 link: 0

 1471 17:46:40.965762  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1472 17:46:40.969233  PCI: 00:0d.0 read_resources bus 0 link: 0

 1473 17:46:40.972719  USB0 port 0 read_resources bus 0 link: 0

 1474 17:46:40.978964  USB0 port 0 read_resources bus 0 link: 0 done

 1475 17:46:40.983028  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1476 17:46:40.985949  PCI: 00:14.0 read_resources bus 0 link: 0

 1477 17:46:40.992575  USB0 port 0 read_resources bus 0 link: 0

 1478 17:46:40.995539  USB0 port 0 read_resources bus 0 link: 0 done

 1479 17:46:40.998809  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1480 17:46:41.005227  PCI: 00:14.3 read_resources bus 0 link: 0

 1481 17:46:41.008570  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1482 17:46:41.011782  PCI: 00:15.0 read_resources bus 0 link: 0

 1483 17:46:41.018883  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1484 17:46:41.022327  PCI: 00:15.1 read_resources bus 0 link: 0

 1485 17:46:41.025264  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1486 17:46:41.032063  PCI: 00:15.3 read_resources bus 0 link: 0

 1487 17:46:41.035280  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1488 17:46:41.038802  PCI: 00:19.1 read_resources bus 0 link: 0

 1489 17:46:41.045435  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1490 17:46:41.048998  PCI: 00:1e.3 read_resources bus 2 link: 0

 1491 17:46:41.055917  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1492 17:46:41.059094  PCI: 00:1f.0 read_resources bus 0 link: 0

 1493 17:46:41.062243  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1494 17:46:41.069070  PCI: 00:1f.2 read_resources bus 0 link: 0

 1495 17:46:41.071989  GENERIC: 0.0 read_resources bus 0 link: 0

 1496 17:46:41.075234  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1497 17:46:41.081789  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1498 17:46:41.084792  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1499 17:46:41.092027  Root Device read_resources bus 0 link: 0 done

 1500 17:46:41.092587  Done reading resources.

 1501 17:46:41.098846  Show resources in subtree (Root Device)...After reading.

 1502 17:46:41.101876   Root Device child on link 0 CPU_CLUSTER: 0

 1503 17:46:41.108581    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1504 17:46:41.109133     APIC: 00

 1505 17:46:41.109502     APIC: 16

 1506 17:46:41.112287     APIC: 10

 1507 17:46:41.112900     APIC: 12

 1508 17:46:41.115483     APIC: 14

 1509 17:46:41.116043     APIC: 01

 1510 17:46:41.116409     APIC: 08

 1511 17:46:41.119096     APIC: 09

 1512 17:46:41.122228    DOMAIN: 0000 child on link 0 GPIO: 0

 1513 17:46:41.131632    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1514 17:46:41.142367    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1515 17:46:41.142991     GPIO: 0

 1516 17:46:41.143394     PCI: 00:00.0

 1517 17:46:41.152199     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1518 17:46:41.161826     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1519 17:46:41.171613     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1520 17:46:41.181526     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1521 17:46:41.191686     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1522 17:46:41.198515     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1523 17:46:41.208182     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1524 17:46:41.218370     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1525 17:46:41.228471     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1526 17:46:41.238196     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1527 17:46:41.248174     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1528 17:46:41.257941     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1529 17:46:41.265184     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1530 17:46:41.275033     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1531 17:46:41.284515     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1532 17:46:41.295054     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1533 17:46:41.304445     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1534 17:46:41.314470     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1535 17:46:41.324434     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1536 17:46:41.334218     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1537 17:46:41.341312     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1538 17:46:41.351152     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1539 17:46:41.360803     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1540 17:46:41.370753     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1541 17:46:41.381190     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1542 17:46:41.391193     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1543 17:46:41.400573     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1544 17:46:41.407426     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1545 17:46:41.411029     PCI: 00:02.0

 1546 17:46:41.421231     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1547 17:46:41.430772     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1548 17:46:41.440924     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1549 17:46:41.444168     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1550 17:46:41.454032     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1551 17:46:41.457635      GENERIC: 0.0

 1552 17:46:41.460678     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1553 17:46:41.470704     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1554 17:46:41.480528     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1555 17:46:41.487020     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1556 17:46:41.490344      PCI: 01:00.0

 1557 17:46:41.500630      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1558 17:46:41.510103      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1559 17:46:41.510652     PCI: 00:08.0

 1560 17:46:41.513683     PCI: 00:0a.0

 1561 17:46:41.523730     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1562 17:46:41.527145     PCI: 00:0d.0 child on link 0 USB0 port 0

 1563 17:46:41.537007     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1564 17:46:41.543733      USB0 port 0 child on link 0 USB3 port 0

 1565 17:46:41.544293       USB3 port 0

 1566 17:46:41.546827       USB3 port 1

 1567 17:46:41.547298       USB3 port 2

 1568 17:46:41.550358       USB3 port 3

 1569 17:46:41.553466     PCI: 00:14.0 child on link 0 USB0 port 0

 1570 17:46:41.563406     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1571 17:46:41.567145      USB0 port 0 child on link 0 USB2 port 0

 1572 17:46:41.570285       USB2 port 0

 1573 17:46:41.570842       USB2 port 1

 1574 17:46:41.573399       USB2 port 2

 1575 17:46:41.573968       USB2 port 3

 1576 17:46:41.576793       USB2 port 4

 1577 17:46:41.579975       USB2 port 5

 1578 17:46:41.580432       USB2 port 6

 1579 17:46:41.583634       USB2 port 7

 1580 17:46:41.584186       USB2 port 8

 1581 17:46:41.587066       USB2 port 9

 1582 17:46:41.587621       USB3 port 0

 1583 17:46:41.590024       USB3 port 1

 1584 17:46:41.590484       USB3 port 2

 1585 17:46:41.593402       USB3 port 3

 1586 17:46:41.594012     PCI: 00:14.2

 1587 17:46:41.603390     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1588 17:46:41.612924     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1589 17:46:41.619799     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1590 17:46:41.630190     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1591 17:46:41.630940      GENERIC: 0.0

 1592 17:46:41.633254     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1593 17:46:41.642771     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1594 17:46:41.646394      I2C: 00:1a

 1595 17:46:41.646858      I2C: 00:31

 1596 17:46:41.649721      I2C: 00:32

 1597 17:46:41.653290     PCI: 00:15.1 child on link 0 I2C: 00:50

 1598 17:46:41.662970     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1599 17:46:41.666347      I2C: 00:50

 1600 17:46:41.666810     PCI: 00:15.2

 1601 17:46:41.670005     PCI: 00:15.3 child on link 0 I2C: 00:10

 1602 17:46:41.679695     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1603 17:46:41.683304      I2C: 00:10

 1604 17:46:41.683859     PCI: 00:16.0

 1605 17:46:41.693130     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1606 17:46:41.696686     PCI: 00:19.0

 1607 17:46:41.699963     PCI: 00:19.1 child on link 0 I2C: 00:15

 1608 17:46:41.709756     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1609 17:46:41.713157      I2C: 00:15

 1610 17:46:41.713707      I2C: 00:2c

 1611 17:46:41.716491     PCI: 00:1e.0

 1612 17:46:41.726264     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1613 17:46:41.729521     PCI: 00:1e.3 child on link 0 SPI: 00

 1614 17:46:41.739604     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1615 17:46:41.742748      SPI: 00

 1616 17:46:41.746040     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1617 17:46:41.753202     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1618 17:46:41.756383      PNP: 0c09.0

 1619 17:46:41.766044      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1620 17:46:41.769393     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1621 17:46:41.779543     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1622 17:46:41.789170     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1623 17:46:41.792563      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1624 17:46:41.795865       GENERIC: 0.0

 1625 17:46:41.796481       GENERIC: 1.0

 1626 17:46:41.799653     PCI: 00:1f.3

 1627 17:46:41.809308     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1628 17:46:41.819709     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1629 17:46:41.820278     PCI: 00:1f.5

 1630 17:46:41.829287     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1631 17:46:41.836002  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1632 17:46:41.842479   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1633 17:46:41.849285   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1634 17:46:41.856198   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1635 17:46:41.859075    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1636 17:46:41.862293    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1637 17:46:41.869387   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1638 17:46:41.875633   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1639 17:46:41.885641   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1640 17:46:41.892313  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1641 17:46:41.898999  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1642 17:46:41.905931   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1643 17:46:41.912318   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1644 17:46:41.922280   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1645 17:46:41.925348   DOMAIN: 0000: Resource ranges:

 1646 17:46:41.928915   * Base: 1000, Size: 800, Tag: 100

 1647 17:46:41.931925   * Base: 1900, Size: e700, Tag: 100

 1648 17:46:41.935375    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1649 17:46:41.942011  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1650 17:46:41.948834  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1651 17:46:41.958537   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1652 17:46:41.965325   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1653 17:46:41.971820   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1654 17:46:41.981729   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1655 17:46:41.988720   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1656 17:46:41.995308   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1657 17:46:42.004974   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1658 17:46:42.011468   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1659 17:46:42.018335   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1660 17:46:42.028656   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1661 17:46:42.034970   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1662 17:46:42.041738   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1663 17:46:42.052196   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1664 17:46:42.058338   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1665 17:46:42.064773   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1666 17:46:42.074811   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1667 17:46:42.081348   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1668 17:46:42.088319   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1669 17:46:42.097812   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1670 17:46:42.104823   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1671 17:46:42.110956   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1672 17:46:42.117724   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1673 17:46:42.127750   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1674 17:46:42.134581   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1675 17:46:42.144300   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1676 17:46:42.150992   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1677 17:46:42.157767   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1678 17:46:42.164307   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1679 17:46:42.174160   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1680 17:46:42.180674   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1681 17:46:42.184280   DOMAIN: 0000: Resource ranges:

 1682 17:46:42.187470   * Base: 80400000, Size: 3fc00000, Tag: 200

 1683 17:46:42.194301   * Base: d0000000, Size: 28000000, Tag: 200

 1684 17:46:42.197503   * Base: fa000000, Size: 1000000, Tag: 200

 1685 17:46:42.200796   * Base: fb001000, Size: 17ff000, Tag: 200

 1686 17:46:42.207613   * Base: fe800000, Size: 300000, Tag: 200

 1687 17:46:42.210775   * Base: feb80000, Size: 80000, Tag: 200

 1688 17:46:42.213939   * Base: fed00000, Size: 40000, Tag: 200

 1689 17:46:42.217455   * Base: fed70000, Size: 10000, Tag: 200

 1690 17:46:42.221173   * Base: fed88000, Size: 8000, Tag: 200

 1691 17:46:42.227577   * Base: fed93000, Size: d000, Tag: 200

 1692 17:46:42.230819   * Base: feda2000, Size: 1e000, Tag: 200

 1693 17:46:42.234084   * Base: fede0000, Size: 1220000, Tag: 200

 1694 17:46:42.240984   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1695 17:46:42.247719    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1696 17:46:42.254069    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1697 17:46:42.260388    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1698 17:46:42.267001    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1699 17:46:42.273619    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1700 17:46:42.280364    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1701 17:46:42.287015    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1702 17:46:42.293660    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1703 17:46:42.300396    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1704 17:46:42.307441    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1705 17:46:42.313506    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1706 17:46:42.320028    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1707 17:46:42.326868    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1708 17:46:42.333444    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1709 17:46:42.340127    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1710 17:46:42.346875    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1711 17:46:42.353368    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1712 17:46:42.360108    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1713 17:46:42.366716    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1714 17:46:42.373071  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1715 17:46:42.379754  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1716 17:46:42.383419   PCI: 00:06.0: Resource ranges:

 1717 17:46:42.390235   * Base: 80400000, Size: 100000, Tag: 200

 1718 17:46:42.396730    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1719 17:46:42.403299    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1720 17:46:42.409686  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1721 17:46:42.416221  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1722 17:46:42.423080  Root Device assign_resources, bus 0 link: 0

 1723 17:46:42.426323  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1724 17:46:42.432889  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1725 17:46:42.443066  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1726 17:46:42.449619  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1727 17:46:42.459671  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1728 17:46:42.462864  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1729 17:46:42.469667  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1730 17:46:42.476256  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1731 17:46:42.486258  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1732 17:46:42.496170  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1733 17:46:42.499538  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1734 17:46:42.505862  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1735 17:46:42.515915  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1736 17:46:42.519167  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1737 17:46:42.529056  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1738 17:46:42.535939  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1739 17:46:42.542543  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1740 17:46:42.545774  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1741 17:46:42.552898  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1742 17:46:42.559323  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1743 17:46:42.562431  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1744 17:46:42.572013  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1745 17:46:42.578735  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1746 17:46:42.588636  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1747 17:46:42.592026  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1748 17:46:42.598881  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1749 17:46:42.605825  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1750 17:46:42.608920  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1751 17:46:42.615203  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1752 17:46:42.622211  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1753 17:46:42.628271  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1754 17:46:42.632159  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1755 17:46:42.638566  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1756 17:46:42.645213  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1757 17:46:42.648819  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1758 17:46:42.658331  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1759 17:46:42.665034  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1760 17:46:42.671697  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1761 17:46:42.674965  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1762 17:46:42.681409  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1763 17:46:42.688914  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1764 17:46:42.691521  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1765 17:46:42.698010  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1766 17:46:42.701724  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1767 17:46:42.708271  LPC: Trying to open IO window from 800 size 1ff

 1768 17:46:42.714794  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1769 17:46:42.721642  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1770 17:46:42.731502  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1771 17:46:42.734872  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1772 17:46:42.741461  Root Device assign_resources, bus 0 link: 0 done

 1773 17:46:42.742078  Done setting resources.

 1774 17:46:42.748043  Show resources in subtree (Root Device)...After assigning values.

 1775 17:46:42.754463   Root Device child on link 0 CPU_CLUSTER: 0

 1776 17:46:42.758144    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1777 17:46:42.758605     APIC: 00

 1778 17:46:42.761147     APIC: 16

 1779 17:46:42.761648     APIC: 10

 1780 17:46:42.764414     APIC: 12

 1781 17:46:42.764896     APIC: 14

 1782 17:46:42.765384     APIC: 01

 1783 17:46:42.767906     APIC: 08

 1784 17:46:42.768364     APIC: 09

 1785 17:46:42.771373    DOMAIN: 0000 child on link 0 GPIO: 0

 1786 17:46:42.781235    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1787 17:46:42.791600    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1788 17:46:42.792162     GPIO: 0

 1789 17:46:42.794365     PCI: 00:00.0

 1790 17:46:42.804406     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1791 17:46:42.814481     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1792 17:46:42.821291     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1793 17:46:42.831199     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1794 17:46:42.840940     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1795 17:46:42.851070     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1796 17:46:42.860958     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1797 17:46:42.871176     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1798 17:46:42.877229     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1799 17:46:42.887625     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1800 17:46:42.897326     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1801 17:46:42.906985     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1802 17:46:42.916983     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1803 17:46:42.927110     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1804 17:46:42.936939     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1805 17:46:42.943745     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1806 17:46:42.954225     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1807 17:46:42.963957     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1808 17:46:42.973856     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1809 17:46:42.983277     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1810 17:46:42.993373     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1811 17:46:43.003441     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1812 17:46:43.009955     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1813 17:46:43.019883     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1814 17:46:43.029650     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1815 17:46:43.039819     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1816 17:46:43.050188     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1817 17:46:43.059378     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1818 17:46:43.062844     PCI: 00:02.0

 1819 17:46:43.073075     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1820 17:46:43.082887     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1821 17:46:43.092792     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1822 17:46:43.096029     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1823 17:46:43.105916     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1824 17:46:43.109766      GENERIC: 0.0

 1825 17:46:43.112715     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1826 17:46:43.122882     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1827 17:46:43.132634     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1828 17:46:43.145639     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1829 17:46:43.146177      PCI: 01:00.0

 1830 17:46:43.155932      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1831 17:46:43.166071      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1832 17:46:43.168983     PCI: 00:08.0

 1833 17:46:43.169450     PCI: 00:0a.0

 1834 17:46:43.179196     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1835 17:46:43.186089     PCI: 00:0d.0 child on link 0 USB0 port 0

 1836 17:46:43.195827     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1837 17:46:43.199025      USB0 port 0 child on link 0 USB3 port 0

 1838 17:46:43.202414       USB3 port 0

 1839 17:46:43.202884       USB3 port 1

 1840 17:46:43.205451       USB3 port 2

 1841 17:46:43.205967       USB3 port 3

 1842 17:46:43.212003     PCI: 00:14.0 child on link 0 USB0 port 0

 1843 17:46:43.222262     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1844 17:46:43.225499      USB0 port 0 child on link 0 USB2 port 0

 1845 17:46:43.228966       USB2 port 0

 1846 17:46:43.229456       USB2 port 1

 1847 17:46:43.232136       USB2 port 2

 1848 17:46:43.232615       USB2 port 3

 1849 17:46:43.235544       USB2 port 4

 1850 17:46:43.236004       USB2 port 5

 1851 17:46:43.238840       USB2 port 6

 1852 17:46:43.239404       USB2 port 7

 1853 17:46:43.242281       USB2 port 8

 1854 17:46:43.242750       USB2 port 9

 1855 17:46:43.245431       USB3 port 0

 1856 17:46:43.248970       USB3 port 1

 1857 17:46:43.249527       USB3 port 2

 1858 17:46:43.252330       USB3 port 3

 1859 17:46:43.252937     PCI: 00:14.2

 1860 17:46:43.262083     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1861 17:46:43.272308     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1862 17:46:43.279152     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1863 17:46:43.288655     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1864 17:46:43.289220      GENERIC: 0.0

 1865 17:46:43.295515     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1866 17:46:43.305201     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1867 17:46:43.305793      I2C: 00:1a

 1868 17:46:43.308422      I2C: 00:31

 1869 17:46:43.308911      I2C: 00:32

 1870 17:46:43.311910     PCI: 00:15.1 child on link 0 I2C: 00:50

 1871 17:46:43.325539     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1872 17:46:43.326158      I2C: 00:50

 1873 17:46:43.328886     PCI: 00:15.2

 1874 17:46:43.332095     PCI: 00:15.3 child on link 0 I2C: 00:10

 1875 17:46:43.342368     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1876 17:46:43.342934      I2C: 00:10

 1877 17:46:43.345296     PCI: 00:16.0

 1878 17:46:43.354964     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1879 17:46:43.358345     PCI: 00:19.0

 1880 17:46:43.361585     PCI: 00:19.1 child on link 0 I2C: 00:15

 1881 17:46:43.371581     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1882 17:46:43.372147      I2C: 00:15

 1883 17:46:43.374859      I2C: 00:2c

 1884 17:46:43.375455     PCI: 00:1e.0

 1885 17:46:43.388314     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1886 17:46:43.391706     PCI: 00:1e.3 child on link 0 SPI: 00

 1887 17:46:43.401386     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1888 17:46:43.404790      SPI: 00

 1889 17:46:43.408228     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1890 17:46:43.414796     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1891 17:46:43.418062      PNP: 0c09.0

 1892 17:46:43.428368      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1893 17:46:43.431666     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1894 17:46:43.441684     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1895 17:46:43.451431     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1896 17:46:43.454701      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1897 17:46:43.455214       GENERIC: 0.0

 1898 17:46:43.458085       GENERIC: 1.0

 1899 17:46:43.461284     PCI: 00:1f.3

 1900 17:46:43.471515     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1901 17:46:43.481089     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1902 17:46:43.481616     PCI: 00:1f.5

 1903 17:46:43.494198     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1904 17:46:43.494751  Done allocating resources.

 1905 17:46:43.501085  BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms

 1906 17:46:43.507465  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1907 17:46:43.511040  Configure audio over I2S with MAX98373 NAU88L25B.

 1908 17:46:43.516429  Enabling BT offload

 1909 17:46:43.523777  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1910 17:46:43.527259  Enabling resources...

 1911 17:46:43.530424  PCI: 00:00.0 subsystem <- 8086/4609

 1912 17:46:43.533514  PCI: 00:00.0 cmd <- 06

 1913 17:46:43.536926  PCI: 00:02.0 subsystem <- 8086/46b3

 1914 17:46:43.540222  PCI: 00:02.0 cmd <- 03

 1915 17:46:43.543495  PCI: 00:04.0 subsystem <- 8086/461d

 1916 17:46:43.544016  PCI: 00:04.0 cmd <- 02

 1917 17:46:43.546829  PCI: 00:06.0 bridge ctrl <- 0013

 1918 17:46:43.550064  PCI: 00:06.0 subsystem <- 8086/464d

 1919 17:46:43.553450  PCI: 00:06.0 cmd <- 106

 1920 17:46:43.557055  PCI: 00:0a.0 subsystem <- 8086/467d

 1921 17:46:43.560475  PCI: 00:0a.0 cmd <- 02

 1922 17:46:43.563456  PCI: 00:0d.0 subsystem <- 8086/461e

 1923 17:46:43.566831  PCI: 00:0d.0 cmd <- 02

 1924 17:46:43.570124  PCI: 00:14.0 subsystem <- 8086/51ed

 1925 17:46:43.573303  PCI: 00:14.0 cmd <- 02

 1926 17:46:43.576834  PCI: 00:14.2 subsystem <- 8086/51ef

 1927 17:46:43.577392  PCI: 00:14.2 cmd <- 02

 1928 17:46:43.583358  PCI: 00:14.3 subsystem <- 8086/51f0

 1929 17:46:43.583928  PCI: 00:14.3 cmd <- 02

 1930 17:46:43.586321  PCI: 00:15.0 subsystem <- 8086/51e8

 1931 17:46:43.590221  PCI: 00:15.0 cmd <- 02

 1932 17:46:43.593539  PCI: 00:15.1 subsystem <- 8086/51e9

 1933 17:46:43.596563  PCI: 00:15.1 cmd <- 06

 1934 17:46:43.600136  PCI: 00:15.3 subsystem <- 8086/51eb

 1935 17:46:43.603247  PCI: 00:15.3 cmd <- 02

 1936 17:46:43.606520  PCI: 00:16.0 subsystem <- 8086/51e0

 1937 17:46:43.607079  PCI: 00:16.0 cmd <- 02

 1938 17:46:43.612902  PCI: 00:19.1 subsystem <- 8086/51c6

 1939 17:46:43.613483  PCI: 00:19.1 cmd <- 02

 1940 17:46:43.616249  PCI: 00:1e.0 subsystem <- 8086/51a8

 1941 17:46:43.619609  PCI: 00:1e.0 cmd <- 06

 1942 17:46:43.622989  PCI: 00:1e.3 subsystem <- 8086/51ab

 1943 17:46:43.626135  PCI: 00:1e.3 cmd <- 02

 1944 17:46:43.629269  PCI: 00:1f.0 subsystem <- 8086/5182

 1945 17:46:43.633050  PCI: 00:1f.0 cmd <- 407

 1946 17:46:43.636315  PCI: 00:1f.3 subsystem <- 8086/51c8

 1947 17:46:43.639726  PCI: 00:1f.3 cmd <- 02

 1948 17:46:43.642968  PCI: 00:1f.5 subsystem <- 8086/51a4

 1949 17:46:43.643434  PCI: 00:1f.5 cmd <- 406

 1950 17:46:43.646192  PCI: 01:00.0 cmd <- 02

 1951 17:46:43.646711  done.

 1952 17:46:43.652534  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1953 17:46:43.656173  ME: Version: Unavailable

 1954 17:46:43.659459  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1955 17:46:43.662624  Initializing devices...

 1956 17:46:43.665998  Root Device init

 1957 17:46:43.666481  mainboard: EC init

 1958 17:46:43.672339  Chrome EC: Set SMI mask to 0x0000000000000000

 1959 17:46:43.676067  Chrome EC: UHEPI supported

 1960 17:46:43.679357  Chrome EC: clear events_b mask to 0x0000000000000000

 1961 17:46:43.686229  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1962 17:46:43.693215  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1963 17:46:43.699610  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1964 17:46:43.705878  Chrome EC: Set WAKE mask to 0x0000000000000000

 1965 17:46:43.709663  Root Device init finished in 41 msecs

 1966 17:46:43.712849  PCI: 00:00.0 init

 1967 17:46:43.716320  CPU TDP = 15 Watts

 1968 17:46:43.716883  CPU PL1 = 15 Watts

 1969 17:46:43.719458  CPU PL2 = 55 Watts

 1970 17:46:43.722672  CPU PL4 = 123 Watts

 1971 17:46:43.726208  PCI: 00:00.0 init finished in 8 msecs

 1972 17:46:43.726679  PCI: 00:02.0 init

 1973 17:46:43.729342  GMA: Found VBT in CBFS

 1974 17:46:43.732694  GMA: Found valid VBT in CBFS

 1975 17:46:43.739438  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1976 17:46:43.745929                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1977 17:46:43.749398  PCI: 00:02.0 init finished in 18 msecs

 1978 17:46:43.752568  PCI: 00:06.0 init

 1979 17:46:43.756138  Initializing PCH PCIe bridge.

 1980 17:46:43.759241  PCI: 00:06.0 init finished in 3 msecs

 1981 17:46:43.759810  PCI: 00:0a.0 init

 1982 17:46:43.762518  PCI: 00:0a.0 init finished in 0 msecs

 1983 17:46:43.765758  PCI: 00:14.0 init

 1984 17:46:43.769086  PCI: 00:14.0 init finished in 0 msecs

 1985 17:46:43.772760  PCI: 00:14.2 init

 1986 17:46:43.775759  PCI: 00:14.2 init finished in 0 msecs

 1987 17:46:43.776374  PCI: 00:15.0 init

 1988 17:46:43.778966  I2C bus 0 version 0x3230302a

 1989 17:46:43.782089  DW I2C bus 0 at 0x80655000 (400 KHz)

 1990 17:46:43.789366  PCI: 00:15.0 init finished in 6 msecs

 1991 17:46:43.789868  PCI: 00:15.1 init

 1992 17:46:43.792481  I2C bus 1 version 0x3230302a

 1993 17:46:43.795979  DW I2C bus 1 at 0x80656000 (400 KHz)

 1994 17:46:43.799210  PCI: 00:15.1 init finished in 6 msecs

 1995 17:46:43.802624  PCI: 00:15.3 init

 1996 17:46:43.806213  I2C bus 3 version 0x3230302a

 1997 17:46:43.808973  DW I2C bus 3 at 0x80657000 (400 KHz)

 1998 17:46:43.812180  PCI: 00:15.3 init finished in 6 msecs

 1999 17:46:43.815948  PCI: 00:16.0 init

 2000 17:46:43.818920  PCI: 00:16.0 init finished in 0 msecs

 2001 17:46:43.819387  PCI: 00:19.1 init

 2002 17:46:43.822208  I2C bus 5 version 0x3230302a

 2003 17:46:43.825501  DW I2C bus 5 at 0x80659000 (400 KHz)

 2004 17:46:43.829101  PCI: 00:19.1 init finished in 6 msecs

 2005 17:46:43.832189  PCI: 00:1f.0 init

 2006 17:46:43.835525  IOAPIC: Initializing IOAPIC at 0xfec00000

 2007 17:46:43.838668  IOAPIC: ID = 0x02

 2008 17:46:43.841968  IOAPIC: Dumping registers

 2009 17:46:43.842432    reg 0x0000: 0x02000000

 2010 17:46:43.845349    reg 0x0001: 0x00770020

 2011 17:46:43.848806    reg 0x0002: 0x00000000

 2012 17:46:43.852339  IOAPIC: 120 interrupts

 2013 17:46:43.855494  IOAPIC: Clearing IOAPIC at 0xfec00000

 2014 17:46:43.858653  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 2015 17:46:43.865624  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 2016 17:46:43.868582  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 2017 17:46:43.875323  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 2018 17:46:43.878462  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 2019 17:46:43.882033  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 2020 17:46:43.889120  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 2021 17:46:43.892255  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 2022 17:46:43.898453  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 2023 17:46:43.902280  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 2024 17:46:43.908552  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 2025 17:46:43.912174  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2026 17:46:43.918796  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2027 17:46:43.921834  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2028 17:46:43.925371  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2029 17:46:43.931863  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2030 17:46:43.935362  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2031 17:46:43.942064  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2032 17:46:43.945150  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2033 17:46:43.952052  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2034 17:46:43.955432  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2035 17:46:43.961664  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2036 17:46:43.964985  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2037 17:46:43.968657  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2038 17:46:43.975560  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2039 17:46:43.978327  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2040 17:46:43.984866  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2041 17:46:43.988925  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2042 17:46:43.994965  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2043 17:46:43.998576  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2044 17:46:44.005214  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2045 17:46:44.008417  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2046 17:46:44.011701  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2047 17:46:44.018180  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2048 17:46:44.021311  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2049 17:46:44.028321  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2050 17:46:44.031434  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2051 17:46:44.038218  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2052 17:46:44.041521  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2053 17:46:44.045187  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2054 17:46:44.051859  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2055 17:46:44.055275  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2056 17:46:44.061294  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2057 17:46:44.064993  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2058 17:46:44.071668  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2059 17:46:44.075190  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2060 17:46:44.081473  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2061 17:46:44.084979  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2062 17:46:44.088370  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2063 17:46:44.094785  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2064 17:46:44.097806  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2065 17:46:44.104436  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2066 17:46:44.108183  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2067 17:46:44.114502  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2068 17:46:44.117830  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2069 17:46:44.124407  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2070 17:46:44.128113  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2071 17:46:44.131244  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2072 17:46:44.137988  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2073 17:46:44.141199  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2074 17:46:44.148280  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2075 17:46:44.151275  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2076 17:46:44.157911  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2077 17:46:44.161216  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2078 17:46:44.168008  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2079 17:46:44.171002  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2080 17:46:44.174559  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2081 17:46:44.181040  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2082 17:46:44.184609  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2083 17:46:44.191256  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2084 17:46:44.194615  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2085 17:46:44.201063  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2086 17:46:44.204462  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2087 17:46:44.211287  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2088 17:46:44.214318  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2089 17:46:44.217667  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2090 17:46:44.224221  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2091 17:46:44.227634  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2092 17:46:44.234148  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2093 17:46:44.237517  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2094 17:46:44.244694  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2095 17:46:44.247831  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2096 17:46:44.250873  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2097 17:46:44.257171  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2098 17:46:44.260372  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2099 17:46:44.267183  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2100 17:46:44.270550  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2101 17:46:44.277433  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2102 17:46:44.280757  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2103 17:46:44.287610  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2104 17:46:44.291060  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2105 17:46:44.294438  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2106 17:46:44.300710  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2107 17:46:44.304315  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2108 17:46:44.310701  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2109 17:46:44.314207  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2110 17:46:44.320762  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2111 17:46:44.324061  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2112 17:46:44.330349  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2113 17:46:44.333723  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2114 17:46:44.337093  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2115 17:46:44.343936  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2116 17:46:44.347280  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2117 17:46:44.353969  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2118 17:46:44.357369  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2119 17:46:44.363895  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2120 17:46:44.367238  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2121 17:46:44.373867  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2122 17:46:44.377388  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2123 17:46:44.380601  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2124 17:46:44.386997  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2125 17:46:44.390215  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2126 17:46:44.397068  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2127 17:46:44.400327  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2128 17:46:44.406959  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2129 17:46:44.410032  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2130 17:46:44.416837  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2131 17:46:44.420044  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2132 17:46:44.423441  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2133 17:46:44.430043  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2134 17:46:44.433492  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2135 17:46:44.440081  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2136 17:46:44.443372  PCI: 00:1f.0 init finished in 607 msecs

 2137 17:46:44.446796  PCI: 00:1f.2 init

 2138 17:46:44.447354  apm_control: Disabling ACPI.

 2139 17:46:44.453075  APMC done.

 2140 17:46:44.456494  PCI: 00:1f.2 init finished in 7 msecs

 2141 17:46:44.459614  PCI: 00:1f.3 init

 2142 17:46:44.462938  PCI: 00:1f.3 init finished in 0 msecs

 2143 17:46:44.463403  PCI: 01:00.0 init

 2144 17:46:44.466101  PCI: 01:00.0 init finished in 0 msecs

 2145 17:46:44.469612  PNP: 0c09.0 init

 2146 17:46:44.473015  Google Chrome EC uptime: 12.076 seconds

 2147 17:46:44.479699  Google Chrome AP resets since EC boot: 1

 2148 17:46:44.483074  Google Chrome most recent AP reset causes:

 2149 17:46:44.486227  	0.342: 32775 shutdown: entering G3

 2150 17:46:44.492570  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2151 17:46:44.495811  PNP: 0c09.0 init finished in 23 msecs

 2152 17:46:44.499288  GENERIC: 0.0 init

 2153 17:46:44.502824  GENERIC: 0.0 init finished in 0 msecs

 2154 17:46:44.503287  GENERIC: 1.0 init

 2155 17:46:44.509722  GENERIC: 1.0 init finished in 0 msecs

 2156 17:46:44.510284  Devices initialized

 2157 17:46:44.512982  Show all devs... After init.

 2158 17:46:44.516139  Root Device: enabled 1

 2159 17:46:44.519311  CPU_CLUSTER: 0: enabled 1

 2160 17:46:44.519774  DOMAIN: 0000: enabled 1

 2161 17:46:44.522550  GPIO: 0: enabled 1

 2162 17:46:44.526062  PCI: 00:00.0: enabled 1

 2163 17:46:44.526525  PCI: 00:01.0: enabled 0

 2164 17:46:44.529491  PCI: 00:01.1: enabled 0

 2165 17:46:44.532711  PCI: 00:02.0: enabled 1

 2166 17:46:44.535966  PCI: 00:04.0: enabled 1

 2167 17:46:44.536529  PCI: 00:05.0: enabled 0

 2168 17:46:44.539545  PCI: 00:06.0: enabled 1

 2169 17:46:44.542891  PCI: 00:06.2: enabled 0

 2170 17:46:44.543446  PCI: 00:07.0: enabled 0

 2171 17:46:44.546001  PCI: 00:07.1: enabled 0

 2172 17:46:44.549419  PCI: 00:07.2: enabled 0

 2173 17:46:44.552925  PCI: 00:07.3: enabled 0

 2174 17:46:44.553499  PCI: 00:08.0: enabled 0

 2175 17:46:44.555871  PCI: 00:09.0: enabled 0

 2176 17:46:44.559444  PCI: 00:0a.0: enabled 1

 2177 17:46:44.562457  PCI: 00:0d.0: enabled 1

 2178 17:46:44.562921  PCI: 00:0d.1: enabled 0

 2179 17:46:44.565846  PCI: 00:0d.2: enabled 0

 2180 17:46:44.569380  PCI: 00:0d.3: enabled 0

 2181 17:46:44.572419  PCI: 00:0e.0: enabled 0

 2182 17:46:44.572939  PCI: 00:10.0: enabled 0

 2183 17:46:44.575693  PCI: 00:10.1: enabled 0

 2184 17:46:44.579443  PCI: 00:10.6: enabled 0

 2185 17:46:44.579905  PCI: 00:10.7: enabled 0

 2186 17:46:44.582730  PCI: 00:12.0: enabled 0

 2187 17:46:44.585678  PCI: 00:12.6: enabled 0

 2188 17:46:44.589342  PCI: 00:12.7: enabled 0

 2189 17:46:44.589941  PCI: 00:13.0: enabled 0

 2190 17:46:44.592985  PCI: 00:14.0: enabled 1

 2191 17:46:44.595922  PCI: 00:14.1: enabled 0

 2192 17:46:44.599148  PCI: 00:14.2: enabled 1

 2193 17:46:44.599708  PCI: 00:14.3: enabled 1

 2194 17:46:44.602416  PCI: 00:15.0: enabled 1

 2195 17:46:44.605864  PCI: 00:15.1: enabled 1

 2196 17:46:44.609244  PCI: 00:15.2: enabled 0

 2197 17:46:44.609855  PCI: 00:15.3: enabled 1

 2198 17:46:44.612682  PCI: 00:16.0: enabled 1

 2199 17:46:44.615903  PCI: 00:16.1: enabled 0

 2200 17:46:44.619239  PCI: 00:16.2: enabled 0

 2201 17:46:44.619700  PCI: 00:16.3: enabled 0

 2202 17:46:44.622228  PCI: 00:16.4: enabled 0

 2203 17:46:44.625897  PCI: 00:16.5: enabled 0

 2204 17:46:44.626436  PCI: 00:17.0: enabled 0

 2205 17:46:44.629028  PCI: 00:19.0: enabled 0

 2206 17:46:44.632358  PCI: 00:19.1: enabled 1

 2207 17:46:44.635702  PCI: 00:19.2: enabled 0

 2208 17:46:44.636263  PCI: 00:1a.0: enabled 0

 2209 17:46:44.639119  PCI: 00:1c.0: enabled 0

 2210 17:46:44.642435  PCI: 00:1c.1: enabled 0

 2211 17:46:44.645440  PCI: 00:1c.2: enabled 0

 2212 17:46:44.645940  PCI: 00:1c.3: enabled 0

 2213 17:46:44.648890  PCI: 00:1c.4: enabled 0

 2214 17:46:44.652300  PCI: 00:1c.5: enabled 0

 2215 17:46:44.655411  PCI: 00:1c.6: enabled 0

 2216 17:46:44.655875  PCI: 00:1c.7: enabled 0

 2217 17:46:44.658737  PCI: 00:1d.0: enabled 0

 2218 17:46:44.662356  PCI: 00:1d.1: enabled 0

 2219 17:46:44.662817  PCI: 00:1d.2: enabled 0

 2220 17:46:44.665335  PCI: 00:1d.3: enabled 0

 2221 17:46:44.668792  PCI: 00:1e.0: enabled 1

 2222 17:46:44.671911  PCI: 00:1e.1: enabled 0

 2223 17:46:44.672368  PCI: 00:1e.2: enabled 0

 2224 17:46:44.675727  PCI: 00:1e.3: enabled 1

 2225 17:46:44.678965  PCI: 00:1f.0: enabled 1

 2226 17:46:44.682160  PCI: 00:1f.1: enabled 0

 2227 17:46:44.682719  PCI: 00:1f.2: enabled 1

 2228 17:46:44.685291  PCI: 00:1f.3: enabled 1

 2229 17:46:44.689260  PCI: 00:1f.4: enabled 0

 2230 17:46:44.692226  PCI: 00:1f.5: enabled 1

 2231 17:46:44.692782  PCI: 00:1f.6: enabled 0

 2232 17:46:44.695607  PCI: 00:1f.7: enabled 0

 2233 17:46:44.698719  GENERIC: 0.0: enabled 1

 2234 17:46:44.702230  GENERIC: 0.0: enabled 1

 2235 17:46:44.702788  GENERIC: 1.0: enabled 1

 2236 17:46:44.705451  GENERIC: 0.0: enabled 1

 2237 17:46:44.708768  GENERIC: 1.0: enabled 1

 2238 17:46:44.709326  USB0 port 0: enabled 1

 2239 17:46:44.712013  USB0 port 0: enabled 1

 2240 17:46:44.715683  GENERIC: 0.0: enabled 1

 2241 17:46:44.718948  I2C: 00:1a: enabled 1

 2242 17:46:44.719505  I2C: 00:31: enabled 1

 2243 17:46:44.722188  I2C: 00:32: enabled 1

 2244 17:46:44.725336  I2C: 00:50: enabled 1

 2245 17:46:44.725873  I2C: 00:10: enabled 1

 2246 17:46:44.728744  I2C: 00:15: enabled 1

 2247 17:46:44.732044  I2C: 00:2c: enabled 1

 2248 17:46:44.732505  GENERIC: 0.0: enabled 1

 2249 17:46:44.735601  SPI: 00: enabled 1

 2250 17:46:44.738494  PNP: 0c09.0: enabled 1

 2251 17:46:44.739193  GENERIC: 0.0: enabled 1

 2252 17:46:44.742090  USB3 port 0: enabled 1

 2253 17:46:44.745291  USB3 port 1: enabled 0

 2254 17:46:44.745883  USB3 port 2: enabled 1

 2255 17:46:44.748627  USB3 port 3: enabled 0

 2256 17:46:44.751958  USB2 port 0: enabled 1

 2257 17:46:44.755075  USB2 port 1: enabled 0

 2258 17:46:44.755534  USB2 port 2: enabled 1

 2259 17:46:44.758739  USB2 port 3: enabled 0

 2260 17:46:44.761948  USB2 port 4: enabled 0

 2261 17:46:44.762424  USB2 port 5: enabled 1

 2262 17:46:44.765021  USB2 port 6: enabled 0

 2263 17:46:44.768362  USB2 port 7: enabled 0

 2264 17:46:44.772008  USB2 port 8: enabled 1

 2265 17:46:44.772468  USB2 port 9: enabled 1

 2266 17:46:44.775350  USB3 port 0: enabled 1

 2267 17:46:44.778619  USB3 port 1: enabled 0

 2268 17:46:44.779177  USB3 port 2: enabled 0

 2269 17:46:44.781700  USB3 port 3: enabled 0

 2270 17:46:44.785075  GENERIC: 0.0: enabled 1

 2271 17:46:44.788262  GENERIC: 1.0: enabled 1

 2272 17:46:44.788919  APIC: 00: enabled 1

 2273 17:46:44.792200  APIC: 16: enabled 1

 2274 17:46:44.792759  APIC: 10: enabled 1

 2275 17:46:44.794846  APIC: 12: enabled 1

 2276 17:46:44.798426  APIC: 14: enabled 1

 2277 17:46:44.798890  APIC: 01: enabled 1

 2278 17:46:44.801683  APIC: 08: enabled 1

 2279 17:46:44.804973  APIC: 09: enabled 1

 2280 17:46:44.805610  PCI: 01:00.0: enabled 1

 2281 17:46:44.811769  BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms

 2282 17:46:44.814684  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2283 17:46:44.821719  ELOG: NV offset 0xf20000 size 0x4000

 2284 17:46:44.828207  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2285 17:46:44.835071  ELOG: Event(17) added with size 13 at 2023-10-09 17:46:44 UTC

 2286 17:46:44.841621  ELOG: Event(9E) added with size 10 at 2023-10-09 17:46:44 UTC

 2287 17:46:44.848127  ELOG: Event(9F) added with size 14 at 2023-10-09 17:46:44 UTC

 2288 17:46:44.854827  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2289 17:46:44.858276  ELOG: Event(A0) added with size 9 at 2023-10-09 17:46:44 UTC

 2290 17:46:44.864967  ELOG: Event(16) added with size 11 at 2023-10-09 17:46:44 UTC

 2291 17:46:44.868254  Erasing flash addr f20000 + 4 KiB

 2292 17:46:44.918386  elog_add_boot_reason: Logged dev mode boot

 2293 17:46:44.925000  BS: BS_POST_DEVICE entry times (exec / console): 42 / 20 ms

 2294 17:46:44.925470  Finalize devices...

 2295 17:46:44.928481  PCI: 00:16.0 final

 2296 17:46:44.929046  PCI: 00:1f.2 final

 2297 17:46:44.931639  GENERIC: 0.0 final

 2298 17:46:44.938468  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2299 17:46:44.939039  GENERIC: 1.0 final

 2300 17:46:44.945289  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2301 17:46:44.948231  Devices finalized

 2302 17:46:44.951459  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2303 17:46:44.958214  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2304 17:46:44.965017  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2305 17:46:44.968416  ME: HFSTS1                      : 0x90000245

 2306 17:46:44.972056  ME: HFSTS2                      : 0x82100116

 2307 17:46:44.978526  ME: HFSTS3                      : 0x00000050

 2308 17:46:44.981627  ME: HFSTS4                      : 0x00004000

 2309 17:46:44.984839  ME: HFSTS5                      : 0x00000000

 2310 17:46:44.991918  ME: HFSTS6                      : 0x40600006

 2311 17:46:44.995005  ME: Manufacturing Mode          : NO

 2312 17:46:44.998500  ME: SPI Protection Mode Enabled : YES

 2313 17:46:45.001637  ME: FPFs Committed              : YES

 2314 17:46:45.005070  ME: Manufacturing Vars Locked   : YES

 2315 17:46:45.011936  ME: FW Partition Table          : OK

 2316 17:46:45.015014  ME: Bringup Loader Failure      : NO

 2317 17:46:45.018505  ME: Firmware Init Complete      : YES

 2318 17:46:45.021614  ME: Boot Options Present        : NO

 2319 17:46:45.025304  ME: Update In Progress          : NO

 2320 17:46:45.028133  ME: D0i3 Support                : YES

 2321 17:46:45.032062  ME: Low Power State Enabled     : NO

 2322 17:46:45.035098  ME: CPU Replaced                : YES

 2323 17:46:45.041688  ME: CPU Replacement Valid       : YES

 2324 17:46:45.044759  ME: Current Working State       : 5

 2325 17:46:45.048157  ME: Current Operation State     : 1

 2326 17:46:45.051313  ME: Current Operation Mode      : 0

 2327 17:46:45.054733  ME: Error Code                  : 0

 2328 17:46:45.058035  ME: Enhanced Debug Mode         : NO

 2329 17:46:45.061377  ME: CPU Debug Disabled          : YES

 2330 17:46:45.065211  ME: TXT Support                 : NO

 2331 17:46:45.068241  ME: WP for RO is enabled        : YES

 2332 17:46:45.074898  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2333 17:46:45.081615  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2334 17:46:45.084760  Ramoops buffer: 0x100000@0x76899000.

 2335 17:46:45.091593  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2336 17:46:45.098452  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2337 17:46:45.101727  CBFS: 'fallback/slic' not found.

 2338 17:46:45.105089  ACPI: Writing ACPI tables at 7686d000.

 2339 17:46:45.108164  ACPI:    * FACS

 2340 17:46:45.108784  ACPI:    * DSDT

 2341 17:46:45.114763  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2342 17:46:45.119755  ACPI:    * FADT

 2343 17:46:45.120311  SCI is IRQ9

 2344 17:46:45.126043  ACPI: added table 1/32, length now 40

 2345 17:46:45.126506  ACPI:     * SSDT

 2346 17:46:45.132378  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2347 17:46:45.136103  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2348 17:46:45.142712  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2349 17:46:45.145768  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2350 17:46:45.152415  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2351 17:46:45.156080  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2352 17:46:45.162616  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2353 17:46:45.169348  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2354 17:46:45.172398  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2355 17:46:45.179092  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2356 17:46:45.182439  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2357 17:46:45.188909  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2358 17:46:45.192469  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2359 17:46:45.198696  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2360 17:46:45.206007  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2361 17:46:45.209128  PS2K: Passing 80 keymaps to kernel

 2362 17:46:45.215810  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2363 17:46:45.222910  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2364 17:46:45.229146  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2365 17:46:45.236227  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2366 17:46:45.242609  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2367 17:46:45.248913  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2368 17:46:45.252256  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2369 17:46:45.259258  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2370 17:46:45.265842  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2371 17:46:45.272428  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2372 17:46:45.276237  ACPI: added table 2/32, length now 44

 2373 17:46:45.278758  ACPI:    * MCFG

 2374 17:46:45.282521  ACPI: added table 3/32, length now 48

 2375 17:46:45.282980  ACPI:    * TPM2

 2376 17:46:45.285371  TPM2 log created at 0x7685d000

 2377 17:46:45.292399  ACPI: added table 4/32, length now 52

 2378 17:46:45.292858  ACPI:     * LPIT

 2379 17:46:45.295629  ACPI: added table 5/32, length now 56

 2380 17:46:45.298896  ACPI:    * MADT

 2381 17:46:45.299355  SCI is IRQ9

 2382 17:46:45.302311  ACPI: added table 6/32, length now 60

 2383 17:46:45.305380  cmd_reg from pmc_make_ipc_cmd 1052838

 2384 17:46:45.312708  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2385 17:46:45.318724  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2386 17:46:45.325448  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2387 17:46:45.328611  PMC CrashLog size in discovery mode: 0xC00

 2388 17:46:45.332150  cpu crashlog bar addr: 0x80640000

 2389 17:46:45.335444  cpu discovery table offset: 0x6030

 2390 17:46:45.341856  cpu_crashlog_discovery_table buffer count: 0x3

 2391 17:46:45.348582  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2392 17:46:45.355233  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2393 17:46:45.361925  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2394 17:46:45.365003  PMC crashLog size in discovery mode : 0xC00

 2395 17:46:45.371724  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2396 17:46:45.378616  discover mode PMC crashlog size adjusted to: 0x200

 2397 17:46:45.385141  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2398 17:46:45.388683  discover mode PMC crashlog size adjusted to: 0x0

 2399 17:46:45.391420  m_cpu_crashLog_size : 0x3480 bytes

 2400 17:46:45.394722  CPU crashLog present.

 2401 17:46:45.401947  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2402 17:46:45.408254  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2403 17:46:45.408807  current = 76876550

 2404 17:46:45.411790  ACPI:    * DMAR

 2405 17:46:45.415262  ACPI: added table 7/32, length now 64

 2406 17:46:45.418293  ACPI: added table 8/32, length now 68

 2407 17:46:45.421507  ACPI:    * HPET

 2408 17:46:45.425021  ACPI: added table 9/32, length now 72

 2409 17:46:45.425625  ACPI: done.

 2410 17:46:45.428353  ACPI tables: 38528 bytes.

 2411 17:46:45.432050  smbios_write_tables: 76857000

 2412 17:46:45.435251  EC returned error result code 3

 2413 17:46:45.438311  Couldn't obtain OEM name from CBI

 2414 17:46:45.441522  Create SMBIOS type 16

 2415 17:46:45.445268  Create SMBIOS type 17

 2416 17:46:45.445895  Create SMBIOS type 20

 2417 17:46:45.448328  GENERIC: 0.0 (WIFI Device)

 2418 17:46:45.451555  SMBIOS tables: 2156 bytes.

 2419 17:46:45.455305  Writing table forward entry at 0x00000500

 2420 17:46:45.461429  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2421 17:46:45.464953  Writing coreboot table at 0x76891000

 2422 17:46:45.471641   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2423 17:46:45.474620   1. 0000000000001000-000000000009ffff: RAM

 2424 17:46:45.481744   2. 00000000000a0000-00000000000fffff: RESERVED

 2425 17:46:45.484933   3. 0000000000100000-0000000076856fff: RAM

 2426 17:46:45.491773   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2427 17:46:45.495186   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2428 17:46:45.501613   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2429 17:46:45.505086   7. 0000000077000000-00000000803fffff: RESERVED

 2430 17:46:45.511669   8. 00000000c0000000-00000000cfffffff: RESERVED

 2431 17:46:45.515036   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2432 17:46:45.521078  10. 00000000fb000000-00000000fb000fff: RESERVED

 2433 17:46:45.524969  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2434 17:46:45.531168  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2435 17:46:45.534488  13. 00000000fec00000-00000000fecfffff: RESERVED

 2436 17:46:45.538234  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2437 17:46:45.544707  15. 00000000fed80000-00000000fed87fff: RESERVED

 2438 17:46:45.547904  16. 00000000fed90000-00000000fed92fff: RESERVED

 2439 17:46:45.554626  17. 00000000feda0000-00000000feda1fff: RESERVED

 2440 17:46:45.557658  18. 00000000fedc0000-00000000feddffff: RESERVED

 2441 17:46:45.564414  19. 0000000100000000-000000027fbfffff: RAM

 2442 17:46:45.564973  Passing 4 GPIOs to payload:

 2443 17:46:45.571000              NAME |       PORT | POLARITY |     VALUE

 2444 17:46:45.577913               lid |  undefined |     high |      high

 2445 17:46:45.581210             power |  undefined |     high |       low

 2446 17:46:45.587659             oprom |  undefined |     high |       low

 2447 17:46:45.591281          EC in RW | 0x00000151 |     high |      high

 2448 17:46:45.594704  Board ID: 3

 2449 17:46:45.595274  FW config: 0x131

 2450 17:46:45.601059  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 3d0c

 2451 17:46:45.604290  coreboot table: 1788 bytes.

 2452 17:46:45.607690  IMD ROOT    0. 0x76fff000 0x00001000

 2453 17:46:45.610846  IMD SMALL   1. 0x76ffe000 0x00001000

 2454 17:46:45.614292  FSP MEMORY  2. 0x76afe000 0x00500000

 2455 17:46:45.617643  CONSOLE     3. 0x76ade000 0x00020000

 2456 17:46:45.624140  RW MCACHE   4. 0x76add000 0x0000043c

 2457 17:46:45.628237  RO MCACHE   5. 0x76adc000 0x00000fd8

 2458 17:46:45.631005  FMAP        6. 0x76adb000 0x0000064a

 2459 17:46:45.634246  TIME STAMP  7. 0x76ada000 0x00000910

 2460 17:46:45.637461  VBOOT WORK  8. 0x76ac6000 0x00014000

 2461 17:46:45.641265  MEM INFO    9. 0x76ac5000 0x000003b8

 2462 17:46:45.644933  ROMSTG STCK10. 0x76ac4000 0x00001000

 2463 17:46:45.647761  AFTER CAR  11. 0x76ab8000 0x0000c000

 2464 17:46:45.654546  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2465 17:46:45.658022  ACPI BERT  13. 0x76a1e000 0x00010000

 2466 17:46:45.661185  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2467 17:46:45.664403  REFCODE    15. 0x769ae000 0x0006f000

 2468 17:46:45.667552  SMM BACKUP 16. 0x7699e000 0x00010000

 2469 17:46:45.670763  IGD OPREGION17. 0x76999000 0x00004203

 2470 17:46:45.674009  RAMOOPS    18. 0x76899000 0x00100000

 2471 17:46:45.680669  COREBOOT   19. 0x76891000 0x00008000

 2472 17:46:45.683864  ACPI       20. 0x7686d000 0x00024000

 2473 17:46:45.687440  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2474 17:46:45.690736  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2475 17:46:45.694071  CPU CRASHLOG23. 0x76858000 0x00003480

 2476 17:46:45.697441  SMBIOS     24. 0x76857000 0x00001000

 2477 17:46:45.700684  IMD small region:

 2478 17:46:45.704019    IMD ROOT    0. 0x76ffec00 0x00000400

 2479 17:46:45.707680    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2480 17:46:45.710852    VPD         2. 0x76ffeb60 0x0000006c

 2481 17:46:45.717410    POWER STATE 3. 0x76ffeb00 0x00000044

 2482 17:46:45.720467    ROMSTAGE    4. 0x76ffeae0 0x00000004

 2483 17:46:45.723709    ACPI GNVS   5. 0x76ffea80 0x00000048

 2484 17:46:45.727007    TYPE_C INFO 6. 0x76ffea60 0x0000000c

 2485 17:46:45.733718  BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms

 2486 17:46:45.737274  MTRR: Physical address space:

 2487 17:46:45.743824  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2488 17:46:45.750541  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2489 17:46:45.753782  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2490 17:46:45.760446  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2491 17:46:45.766768  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2492 17:46:45.773486  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2493 17:46:45.780400  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2494 17:46:45.783632  MTRR: Fixed MSR 0x250 0x0606060606060606

 2495 17:46:45.786768  MTRR: Fixed MSR 0x258 0x0606060606060606

 2496 17:46:45.793596  MTRR: Fixed MSR 0x259 0x0000000000000000

 2497 17:46:45.796897  MTRR: Fixed MSR 0x268 0x0606060606060606

 2498 17:46:45.800226  MTRR: Fixed MSR 0x269 0x0606060606060606

 2499 17:46:45.803831  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2500 17:46:45.810138  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2501 17:46:45.813306  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2502 17:46:45.816862  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2503 17:46:45.820094  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2504 17:46:45.826600  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2505 17:46:45.829746  call enable_fixed_mtrr()

 2506 17:46:45.833219  CPU physical address size: 39 bits

 2507 17:46:45.836504  MTRR: default type WB/UC MTRR counts: 6/6.

 2508 17:46:45.839783  MTRR: UC selected as default type.

 2509 17:46:45.846370  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2510 17:46:45.853245  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2511 17:46:45.860211  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2512 17:46:45.866386  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2513 17:46:45.873032  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2514 17:46:45.880044  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2515 17:46:45.882940  MTRR: Fixed MSR 0x250 0x0606060606060606

 2516 17:46:45.886289  MTRR: Fixed MSR 0x258 0x0606060606060606

 2517 17:46:45.892644  MTRR: Fixed MSR 0x259 0x0000000000000000

 2518 17:46:45.895908  MTRR: Fixed MSR 0x268 0x0606060606060606

 2519 17:46:45.899549  MTRR: Fixed MSR 0x269 0x0606060606060606

 2520 17:46:45.902455  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2521 17:46:45.909157  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2522 17:46:45.912731  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2523 17:46:45.916059  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2524 17:46:45.919279  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2525 17:46:45.926081  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2526 17:46:45.929238  MTRR: Fixed MSR 0x250 0x0606060606060606

 2527 17:46:45.932613  MTRR: Fixed MSR 0x250 0x0606060606060606

 2528 17:46:45.935931  MTRR: Fixed MSR 0x250 0x0606060606060606

 2529 17:46:45.939325  call enable_fixed_mtrr()

 2530 17:46:45.942582  MTRR: Fixed MSR 0x258 0x0606060606060606

 2531 17:46:45.949298  MTRR: Fixed MSR 0x259 0x0000000000000000

 2532 17:46:45.952618  MTRR: Fixed MSR 0x268 0x0606060606060606

 2533 17:46:45.955966  MTRR: Fixed MSR 0x269 0x0606060606060606

 2534 17:46:45.959147  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2535 17:46:45.962200  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2536 17:46:45.968859  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2537 17:46:45.972143  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2538 17:46:45.975728  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2539 17:46:45.978592  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2540 17:46:45.985556  MTRR: Fixed MSR 0x258 0x0606060606060606

 2541 17:46:45.985742  call enable_fixed_mtrr()

 2542 17:46:45.992017  MTRR: Fixed MSR 0x250 0x0606060606060606

 2543 17:46:45.995575  MTRR: Fixed MSR 0x250 0x0606060606060606

 2544 17:46:45.998889  MTRR: Fixed MSR 0x258 0x0606060606060606

 2545 17:46:46.001816  MTRR: Fixed MSR 0x259 0x0000000000000000

 2546 17:46:46.008536  MTRR: Fixed MSR 0x268 0x0606060606060606

 2547 17:46:46.011857  MTRR: Fixed MSR 0x269 0x0606060606060606

 2548 17:46:46.015117  MTRR: Fixed MSR 0x250 0x0606060606060606

 2549 17:46:46.018585  MTRR: Fixed MSR 0x258 0x0606060606060606

 2550 17:46:46.025167  MTRR: Fixed MSR 0x259 0x0000000000000000

 2551 17:46:46.028563  MTRR: Fixed MSR 0x268 0x0606060606060606

 2552 17:46:46.031839  MTRR: Fixed MSR 0x269 0x0606060606060606

 2553 17:46:46.034958  MTRR: Fixed MSR 0x258 0x0606060606060606

 2554 17:46:46.038696  CPU physical address size: 39 bits

 2555 17:46:46.045219  MTRR: Fixed MSR 0x259 0x0000000000000000

 2556 17:46:46.048556  MTRR: Fixed MSR 0x259 0x0000000000000000

 2557 17:46:46.052061  MTRR: Fixed MSR 0x258 0x0606060606060606

 2558 17:46:46.055478  MTRR: Fixed MSR 0x268 0x0606060606060606

 2559 17:46:46.058747  MTRR: Fixed MSR 0x269 0x0606060606060606

 2560 17:46:46.064961  MTRR: Fixed MSR 0x268 0x0606060606060606

 2561 17:46:46.068674  MTRR: Fixed MSR 0x269 0x0606060606060606

 2562 17:46:46.072069  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2563 17:46:46.075344  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2564 17:46:46.081874  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2565 17:46:46.085052  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2566 17:46:46.088788  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2567 17:46:46.091586  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2568 17:46:46.098553  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2569 17:46:46.098968  call enable_fixed_mtrr()

 2570 17:46:46.105672  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2571 17:46:46.108698  CPU physical address size: 39 bits

 2572 17:46:46.112214  CPU physical address size: 39 bits

 2573 17:46:46.115197  MTRR: Fixed MSR 0x259 0x0000000000000000

 2574 17:46:46.118529  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2575 17:46:46.121860  MTRR: Fixed MSR 0x268 0x0606060606060606

 2576 17:46:46.128736  MTRR: Fixed MSR 0x269 0x0606060606060606

 2577 17:46:46.132146  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2578 17:46:46.134977  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2579 17:46:46.138274  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2580 17:46:46.145144  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2581 17:46:46.148405  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2582 17:46:46.151877  call enable_fixed_mtrr()

 2583 17:46:46.155143  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2584 17:46:46.158465  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2585 17:46:46.161246  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2586 17:46:46.168488  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2587 17:46:46.171390  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2588 17:46:46.174708  CPU physical address size: 39 bits

 2589 17:46:46.177965  call enable_fixed_mtrr()

 2590 17:46:46.181209  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2591 17:46:46.184532  CPU physical address size: 39 bits

 2592 17:46:46.187999  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2593 17:46:46.191393  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2594 17:46:46.197911  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2595 17:46:46.201187  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2596 17:46:46.204506  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2597 17:46:46.207711  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2598 17:46:46.214694  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2599 17:46:46.217815  call enable_fixed_mtrr()

 2600 17:46:46.221274  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2601 17:46:46.224783  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2602 17:46:46.227851  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2603 17:46:46.234415  CPU physical address size: 39 bits

 2604 17:46:46.237340  call enable_fixed_mtrr()

 2605 17:46:46.241023  CPU physical address size: 39 bits

 2606 17:46:46.241706  

 2607 17:46:46.242133  MTRR check

 2608 17:46:46.244309  Fixed MTRRs   : Enabled

 2609 17:46:46.247088  Variable MTRRs: Enabled

 2610 17:46:46.247546  

 2611 17:46:46.253918  BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms

 2612 17:46:46.257425  Checking cr50 for pending updates

 2613 17:46:46.268316  Reading cr50 TPM mode

 2614 17:46:46.283921  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2615 17:46:46.293542  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2616 17:46:46.297111  Checking segment from ROM address 0xf96cbe6c

 2617 17:46:46.300177  Checking segment from ROM address 0xf96cbe88

 2618 17:46:46.307098  Loading segment from ROM address 0xf96cbe6c

 2619 17:46:46.307668    code (compression=1)

 2620 17:46:46.316644    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2621 17:46:46.326961  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2622 17:46:46.327527  using LZMA

 2623 17:46:46.349210  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2624 17:46:46.355643  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2625 17:46:46.363800  Loading segment from ROM address 0xf96cbe88

 2626 17:46:46.367099    Entry Point 0x30000000

 2627 17:46:46.367560  Loaded segments

 2628 17:46:46.373471  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2629 17:46:46.381460  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2630 17:46:46.383600  Finalizing chipset.

 2631 17:46:46.386882  apm_control: Finalizing SMM.

 2632 17:46:46.387210  APMC done.

 2633 17:46:46.390075  HECI: CSE device 16.1 is disabled

 2634 17:46:46.393517  HECI: CSE device 16.2 is disabled

 2635 17:46:46.396872  HECI: CSE device 16.3 is disabled

 2636 17:46:46.400141  HECI: CSE device 16.4 is disabled

 2637 17:46:46.403419  HECI: CSE device 16.5 is disabled

 2638 17:46:46.406557  HECI: Sending End-of-Post

 2639 17:46:46.415420  CSE: EOP requested action: continue boot

 2640 17:46:46.418525  CSE EOP successful, continuing boot

 2641 17:46:46.425453  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2642 17:46:46.428607  mp_park_aps done after 0 msecs.

 2643 17:46:46.431846  Jumping to boot code at 0x30000000(0x76891000)

 2644 17:46:46.441862  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2645 17:46:46.446224  

 2646 17:46:46.446737  

 2647 17:46:46.447072  

 2648 17:46:46.449299  Starting depthcharge on Volmar...

 2649 17:46:46.449796  

 2650 17:46:46.451591  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2651 17:46:46.452137  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2652 17:46:46.452680  Setting prompt string to ['brya:']
 2653 17:46:46.453124  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2654 17:46:46.456392  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2655 17:46:46.456958  

 2656 17:46:46.462546  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2657 17:46:46.463090  

 2658 17:46:46.469357  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2659 17:46:46.469929  

 2660 17:46:46.472680  configure_storage: Failed to remap 1C:2

 2661 17:46:46.473169  

 2662 17:46:46.476020  Wipe memory regions:

 2663 17:46:46.476488  

 2664 17:46:46.479397  	[0x00000000001000, 0x000000000a0000)

 2665 17:46:46.480026  

 2666 17:46:46.482498  	[0x00000000100000, 0x00000030000000)

 2667 17:46:46.590172  

 2668 17:46:46.593614  	[0x00000032668e60, 0x00000076857000)

 2669 17:46:46.741778  

 2670 17:46:46.745092  	[0x00000100000000, 0x0000027fc00000)

 2671 17:46:47.588569  

 2672 17:46:47.591883  ec_init: CrosEC protocol v3 supported (256, 256)

 2673 17:46:48.200804  

 2674 17:46:48.201370  R8152: Initializing

 2675 17:46:48.201786  

 2676 17:46:48.203921  Version 9 (ocp_data = 6010)

 2677 17:46:48.204383  

 2678 17:46:48.207485  R8152: Done initializing

 2679 17:46:48.208052  

 2680 17:46:48.210155  Adding net device

 2681 17:46:48.512577  

 2682 17:46:48.515394  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2683 17:46:48.515531  

 2684 17:46:48.515634  

 2685 17:46:48.515731  

 2686 17:46:48.516076  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2688 17:46:48.616736  brya: tftpboot 192.168.201.1 11712638/tftp-deploy-c74zfnvq/kernel/bzImage 11712638/tftp-deploy-c74zfnvq/kernel/cmdline 11712638/tftp-deploy-c74zfnvq/ramdisk/ramdisk.cpio.gz

 2689 17:46:48.616951  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2690 17:46:48.617067  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2691 17:46:48.621433  tftpboot 192.168.201.1 11712638/tftp-deploy-c74zfnvq/kernel/bzIploy-c74zfnvq/kernel/cmdline 11712638/tftp-deploy-c74zfnvq/ramdisk/ramdisk.cpio.gz

 2692 17:46:48.621541  

 2693 17:46:48.621641  Waiting for link

 2694 17:46:48.824350  

 2695 17:46:48.824622  done.

 2696 17:46:48.824757  

 2697 17:46:48.824881  MAC: 00:e0:4c:68:05:70

 2698 17:46:48.824999  

 2699 17:46:48.827647  Sending DHCP discover... done.

 2700 17:46:48.827836  

 2701 17:46:48.830695  Waiting for reply... done.

 2702 17:46:48.830989  

 2703 17:46:48.834095  Sending DHCP request... done.

 2704 17:46:48.834319  

 2705 17:46:48.837711  Waiting for reply... done.

 2706 17:46:48.838173  

 2707 17:46:48.841155  My ip is 192.168.201.16

 2708 17:46:48.841652  

 2709 17:46:48.844424  The DHCP server ip is 192.168.201.1

 2710 17:46:48.844884  

 2711 17:46:48.847834  TFTP server IP predefined by user: 192.168.201.1

 2712 17:46:48.848348  

 2713 17:46:48.854110  Bootfile predefined by user: 11712638/tftp-deploy-c74zfnvq/kernel/bzImage

 2714 17:46:48.854588  

 2715 17:46:48.857530  Sending tftp read request... done.

 2716 17:46:48.858051  

 2717 17:46:48.867599  Waiting for the transfer... 

 2718 17:46:48.868113  

 2719 17:46:49.158072  00000000 ################################################################

 2720 17:46:49.158212  

 2721 17:46:49.407273  00080000 ################################################################

 2722 17:46:49.407417  

 2723 17:46:49.656271  00100000 ################################################################

 2724 17:46:49.656410  

 2725 17:46:49.907388  00180000 ################################################################

 2726 17:46:49.907530  

 2727 17:46:50.156153  00200000 ################################################################

 2728 17:46:50.156293  

 2729 17:46:50.405857  00280000 ################################################################

 2730 17:46:50.405996  

 2731 17:46:50.654714  00300000 ################################################################

 2732 17:46:50.654862  

 2733 17:46:50.904288  00380000 ################################################################

 2734 17:46:50.904431  

 2735 17:46:51.154532  00400000 ################################################################

 2736 17:46:51.154672  

 2737 17:46:51.404578  00480000 ################################################################

 2738 17:46:51.404727  

 2739 17:46:51.654690  00500000 ################################################################

 2740 17:46:51.654838  

 2741 17:46:51.909121  00580000 ################################################################

 2742 17:46:51.909270  

 2743 17:46:52.160494  00600000 ################################################################

 2744 17:46:52.160636  

 2745 17:46:52.409029  00680000 ################################################################

 2746 17:46:52.409174  

 2747 17:46:52.657904  00700000 ################################################################

 2748 17:46:52.658082  

 2749 17:46:52.908873  00780000 ################################################################

 2750 17:46:52.909046  

 2751 17:46:52.955904  00800000 ############# done.

 2752 17:46:52.955994  

 2753 17:46:52.959325  The bootfile was 8490896 bytes long.

 2754 17:46:52.959459  

 2755 17:46:52.962396  Sending tftp read request... done.

 2756 17:46:52.962522  

 2757 17:46:52.965816  Waiting for the transfer... 

 2758 17:46:52.965923  

 2759 17:46:53.225688  00000000 ################################################################

 2760 17:46:53.225840  

 2761 17:46:53.475711  00080000 ################################################################

 2762 17:46:53.475847  

 2763 17:46:53.725138  00100000 ################################################################

 2764 17:46:53.725279  

 2765 17:46:53.975142  00180000 ################################################################

 2766 17:46:53.975288  

 2767 17:46:54.224147  00200000 ################################################################

 2768 17:46:54.224293  

 2769 17:46:54.474360  00280000 ################################################################

 2770 17:46:54.474502  

 2771 17:46:54.726060  00300000 ################################################################

 2772 17:46:54.726228  

 2773 17:46:54.974270  00380000 ################################################################

 2774 17:46:54.974417  

 2775 17:46:55.223984  00400000 ################################################################

 2776 17:46:55.224127  

 2777 17:46:55.475276  00480000 ################################################################

 2778 17:46:55.475447  

 2779 17:46:55.720784  00500000 ################################################################ done.

 2780 17:46:55.720920  

 2781 17:46:55.724129  Sending tftp read request... done.

 2782 17:46:55.724212  

 2783 17:46:55.727634  Waiting for the transfer... 

 2784 17:46:55.727723  

 2785 17:46:55.727793  00000000 # done.

 2786 17:46:55.727862  

 2787 17:46:55.737699  Command line loaded dynamically from TFTP file: 11712638/tftp-deploy-c74zfnvq/kernel/cmdline

 2788 17:46:55.737877  

 2789 17:46:55.760272  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712638/extract-nfsrootfs-k2r6vgiu,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2790 17:46:55.767122  

 2791 17:46:55.770286  Shutting down all USB controllers.

 2792 17:46:55.770488  

 2793 17:46:55.770651  Removing current net device

 2794 17:46:55.770827  

 2795 17:46:55.773660  Finalizing coreboot

 2796 17:46:55.773899  

 2797 17:46:55.780386  Exiting depthcharge with code 4 at timestamp: 19630933

 2798 17:46:55.780787  

 2799 17:46:55.781130  

 2800 17:46:55.781416  Starting kernel ...

 2801 17:46:55.781750  

 2802 17:46:55.782028  

 2803 17:46:55.783244  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2804 17:46:55.783697  start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
 2805 17:46:55.784039  Setting prompt string to ['Linux version [0-9]']
 2806 17:46:55.784354  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2807 17:46:55.784670  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2809 17:51:26.784893  end: 2.2.5 auto-login-action (duration 00:04:31) [common]
 2811 17:51:26.786117  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
 2813 17:51:26.786994  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2816 17:51:26.788410  end: 2 depthcharge-action (duration 00:05:00) [common]
 2818 17:51:26.789016  Cleaning after the job
 2819 17:51:26.789107  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/ramdisk
 2820 17:51:26.790067  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/kernel
 2821 17:51:26.791337  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/nfsrootfs
 2822 17:51:26.868297  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712638/tftp-deploy-c74zfnvq/modules
 2823 17:51:26.868762  start: 5.1 power-off (timeout 00:00:30) [common]
 2824 17:51:26.868931  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
 2825 17:51:26.946242  >> Command sent successfully.

 2826 17:51:26.951220  Returned 0 in 0 seconds
 2827 17:51:27.052309  end: 5.1 power-off (duration 00:00:00) [common]
 2829 17:51:27.054017  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2830 17:51:27.055465  Listened to connection for namespace 'common' for up to 1s
 2832 17:51:27.056928  Listened to connection for namespace 'common' for up to 1s
 2833 17:51:28.056053  Finalising connection for namespace 'common'
 2834 17:51:28.056733  Disconnecting from shell: Finalise
 2835 17:51:28.057159  
 2836 17:51:28.158301  end: 5.2 read-feedback (duration 00:00:01) [common]
 2837 17:51:28.159185  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712638
 2838 17:51:28.475478  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712638
 2839 17:51:28.475677  JobError: Your job cannot terminate cleanly.