Boot log: dell-latitude-5400-4305U-sarien

    1 17:45:59.394871  lava-dispatcher, installed at version: 2023.08
    2 17:45:59.395118  start: 0 validate
    3 17:45:59.395269  Start time: 2023-10-09 17:45:59.395260+00:00 (UTC)
    4 17:45:59.395407  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:45:59.395550  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:45:59.661907  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:45:59.662732  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:45:59.934713  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:45:59.935064  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:46:03.657757  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:46:03.658008  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:46:03.925097  validate duration: 4.53
   14 17:46:03.925428  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:46:03.925542  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:46:03.925642  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:46:03.925781  Not decompressing ramdisk as can be used compressed.
   18 17:46:03.925884  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 17:46:03.925955  saving as /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/ramdisk/initrd.cpio.gz
   20 17:46:03.926028  total size: 5432690 (5 MB)
   21 17:46:04.451440  progress   0 % (0 MB)
   22 17:46:04.453432  progress   5 % (0 MB)
   23 17:46:04.455100  progress  10 % (0 MB)
   24 17:46:04.456726  progress  15 % (0 MB)
   25 17:46:04.458515  progress  20 % (1 MB)
   26 17:46:04.460159  progress  25 % (1 MB)
   27 17:46:04.461779  progress  30 % (1 MB)
   28 17:46:04.463526  progress  35 % (1 MB)
   29 17:46:04.465089  progress  40 % (2 MB)
   30 17:46:04.466665  progress  45 % (2 MB)
   31 17:46:04.468278  progress  50 % (2 MB)
   32 17:46:04.470056  progress  55 % (2 MB)
   33 17:46:04.471613  progress  60 % (3 MB)
   34 17:46:04.473183  progress  65 % (3 MB)
   35 17:46:04.474988  progress  70 % (3 MB)
   36 17:46:04.476569  progress  75 % (3 MB)
   37 17:46:04.478168  progress  80 % (4 MB)
   38 17:46:04.479859  progress  85 % (4 MB)
   39 17:46:04.481725  progress  90 % (4 MB)
   40 17:46:04.483412  progress  95 % (4 MB)
   41 17:46:04.485109  progress 100 % (5 MB)
   42 17:46:04.485357  5 MB downloaded in 0.56 s (9.26 MB/s)
   43 17:46:04.485535  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 17:46:04.485825  end: 1.1 download-retry (duration 00:00:01) [common]
   46 17:46:04.485926  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 17:46:04.486036  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 17:46:04.486195  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:46:04.486281  saving as /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/kernel/bzImage
   50 17:46:04.486350  total size: 8490896 (8 MB)
   51 17:46:04.486418  No compression specified
   52 17:46:04.488036  progress   0 % (0 MB)
   53 17:46:04.490535  progress   5 % (0 MB)
   54 17:46:04.493249  progress  10 % (0 MB)
   55 17:46:04.496016  progress  15 % (1 MB)
   56 17:46:04.498778  progress  20 % (1 MB)
   57 17:46:04.501508  progress  25 % (2 MB)
   58 17:46:04.504242  progress  30 % (2 MB)
   59 17:46:04.506977  progress  35 % (2 MB)
   60 17:46:04.509777  progress  40 % (3 MB)
   61 17:46:04.512558  progress  45 % (3 MB)
   62 17:46:04.515297  progress  50 % (4 MB)
   63 17:46:04.518066  progress  55 % (4 MB)
   64 17:46:04.520800  progress  60 % (4 MB)
   65 17:46:04.523527  progress  65 % (5 MB)
   66 17:46:04.526300  progress  70 % (5 MB)
   67 17:46:04.529048  progress  75 % (6 MB)
   68 17:46:04.531769  progress  80 % (6 MB)
   69 17:46:04.534464  progress  85 % (6 MB)
   70 17:46:04.537170  progress  90 % (7 MB)
   71 17:46:04.539906  progress  95 % (7 MB)
   72 17:46:04.542634  progress 100 % (8 MB)
   73 17:46:04.542806  8 MB downloaded in 0.06 s (143.45 MB/s)
   74 17:46:04.543022  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:46:04.543319  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:46:04.543429  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 17:46:04.543573  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 17:46:04.543764  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 17:46:04.543878  saving as /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/nfsrootfs/full.rootfs.tar
   81 17:46:04.543985  total size: 133380384 (127 MB)
   82 17:46:04.544103  Using unxz to decompress xz
   83 17:46:04.548871  progress   0 % (0 MB)
   84 17:46:04.938890  progress   5 % (6 MB)
   85 17:46:05.335464  progress  10 % (12 MB)
   86 17:46:05.658241  progress  15 % (19 MB)
   87 17:46:05.866732  progress  20 % (25 MB)
   88 17:46:06.144172  progress  25 % (31 MB)
   89 17:46:06.530862  progress  30 % (38 MB)
   90 17:46:06.917769  progress  35 % (44 MB)
   91 17:46:07.370456  progress  40 % (50 MB)
   92 17:46:07.814445  progress  45 % (57 MB)
   93 17:46:08.226582  progress  50 % (63 MB)
   94 17:46:08.653110  progress  55 % (69 MB)
   95 17:46:09.067258  progress  60 % (76 MB)
   96 17:46:09.480066  progress  65 % (82 MB)
   97 17:46:09.913795  progress  70 % (89 MB)
   98 17:46:10.331012  progress  75 % (95 MB)
   99 17:46:10.826201  progress  80 % (101 MB)
  100 17:46:11.319238  progress  85 % (108 MB)
  101 17:46:11.618620  progress  90 % (114 MB)
  102 17:46:12.010624  progress  95 % (120 MB)
  103 17:46:12.460201  progress 100 % (127 MB)
  104 17:46:12.466645  127 MB downloaded in 7.92 s (16.06 MB/s)
  105 17:46:12.466921  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 17:46:12.467229  end: 1.3 download-retry (duration 00:00:08) [common]
  108 17:46:12.467334  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 17:46:12.467433  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 17:46:12.467612  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:46:12.467696  saving as /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/modules/modules.tar
  112 17:46:12.467766  total size: 250928 (0 MB)
  113 17:46:12.467844  Using unxz to decompress xz
  114 17:46:12.472049  progress  13 % (0 MB)
  115 17:46:12.472525  progress  26 % (0 MB)
  116 17:46:12.472805  progress  39 % (0 MB)
  117 17:46:12.474274  progress  52 % (0 MB)
  118 17:46:12.476374  progress  65 % (0 MB)
  119 17:46:12.478536  progress  78 % (0 MB)
  120 17:46:12.480713  progress  91 % (0 MB)
  121 17:46:12.482684  progress 100 % (0 MB)
  122 17:46:12.489189  0 MB downloaded in 0.02 s (11.17 MB/s)
  123 17:46:12.489453  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 17:46:12.489751  end: 1.4 download-retry (duration 00:00:00) [common]
  126 17:46:12.489863  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  127 17:46:12.489971  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  128 17:46:15.008039  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712555/extract-nfsrootfs-07tgk53u
  129 17:46:15.008249  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  130 17:46:15.008366  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  131 17:46:15.008558  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2
  132 17:46:15.008717  makedir: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin
  133 17:46:15.008839  makedir: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/tests
  134 17:46:15.008957  makedir: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/results
  135 17:46:15.009072  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-add-keys
  136 17:46:15.009238  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-add-sources
  137 17:46:15.009390  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-background-process-start
  138 17:46:15.009538  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-background-process-stop
  139 17:46:15.009683  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-common-functions
  140 17:46:15.009832  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-echo-ipv4
  141 17:46:15.009977  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-install-packages
  142 17:46:15.010120  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-installed-packages
  143 17:46:15.010261  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-os-build
  144 17:46:15.010405  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-probe-channel
  145 17:46:15.010548  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-probe-ip
  146 17:46:15.010689  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-target-ip
  147 17:46:15.010831  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-target-mac
  148 17:46:15.010981  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-target-storage
  149 17:46:15.011127  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-case
  150 17:46:15.011272  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-event
  151 17:46:15.011414  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-feedback
  152 17:46:15.011625  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-raise
  153 17:46:15.011774  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-reference
  154 17:46:15.012081  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-runner
  155 17:46:15.012281  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-set
  156 17:46:15.012434  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-test-shell
  157 17:46:15.012583  Updating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-install-packages (oe)
  158 17:46:15.012758  Updating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/bin/lava-installed-packages (oe)
  159 17:46:15.012908  Creating /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/environment
  160 17:46:15.013027  LAVA metadata
  161 17:46:15.013107  - LAVA_JOB_ID=11712555
  162 17:46:15.013196  - LAVA_DISPATCHER_IP=192.168.201.1
  163 17:46:15.013431  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  164 17:46:15.013575  skipped lava-vland-overlay
  165 17:46:15.013694  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 17:46:15.013789  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  167 17:46:15.013861  skipped lava-multinode-overlay
  168 17:46:15.013960  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 17:46:15.014051  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  170 17:46:15.014134  Loading test definitions
  171 17:46:15.014235  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  172 17:46:15.014315  Using /lava-11712555 at stage 0
  173 17:46:15.014674  uuid=11712555_1.5.2.3.1 testdef=None
  174 17:46:15.014774  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 17:46:15.014869  start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
  176 17:46:15.015445  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 17:46:15.015686  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  179 17:46:15.016745  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 17:46:15.017001  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  182 17:46:15.017700  runner path: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/0/tests/0_dmesg test_uuid 11712555_1.5.2.3.1
  183 17:46:15.017881  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 17:46:15.018128  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
  186 17:46:15.018212  Using /lava-11712555 at stage 1
  187 17:46:15.018763  uuid=11712555_1.5.2.3.5 testdef=None
  188 17:46:15.018865  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 17:46:15.018961  start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
  190 17:46:15.019523  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 17:46:15.019993  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
  193 17:46:15.020754  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 17:46:15.021012  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
  196 17:46:15.021985  runner path: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/1/tests/1_bootrr test_uuid 11712555_1.5.2.3.5
  197 17:46:15.022160  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 17:46:15.022388  Creating lava-test-runner.conf files
  200 17:46:15.022458  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/0 for stage 0
  201 17:46:15.022560  - 0_dmesg
  202 17:46:15.022650  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712555/lava-overlay-4gd9i2e2/lava-11712555/1 for stage 1
  203 17:46:15.022762  - 1_bootrr
  204 17:46:15.022871  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 17:46:15.022968  start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
  206 17:46:15.031192  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 17:46:15.031341  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
  208 17:46:15.031469  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 17:46:15.031600  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 17:46:15.031728  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
  211 17:46:15.186184  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 17:46:15.186615  start: 1.5.4 extract-modules (timeout 00:09:49) [common]
  213 17:46:15.186742  extracting modules file /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712555/extract-nfsrootfs-07tgk53u
  214 17:46:15.202181  extracting modules file /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712555/extract-overlay-ramdisk-v7udgiex/ramdisk
  215 17:46:15.217270  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 17:46:15.217413  start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
  217 17:46:15.217510  [common] Applying overlay to NFS
  218 17:46:15.217586  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712555/compress-overlay-qawdd4dl/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712555/extract-nfsrootfs-07tgk53u
  219 17:46:15.226825  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 17:46:15.226946  start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
  221 17:46:15.227045  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 17:46:15.227152  start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
  223 17:46:15.227244  Building ramdisk /var/lib/lava/dispatcher/tmp/11712555/extract-overlay-ramdisk-v7udgiex/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712555/extract-overlay-ramdisk-v7udgiex/ramdisk
  224 17:46:15.308487  >> 26159 blocks

  225 17:46:15.916215  rename /var/lib/lava/dispatcher/tmp/11712555/extract-overlay-ramdisk-v7udgiex/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/ramdisk/ramdisk.cpio.gz
  226 17:46:15.916748  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 17:46:15.916916  start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
  228 17:46:15.917062  start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
  229 17:46:15.917205  No mkimage arch provided, not using FIT.
  230 17:46:15.917341  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 17:46:15.917475  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 17:46:15.917628  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  233 17:46:15.917756  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
  234 17:46:15.917847  No LXC device requested
  235 17:46:15.917936  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 17:46:15.918034  start: 1.7 deploy-device-env (timeout 00:09:48) [common]
  237 17:46:15.918126  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 17:46:15.918212  Checking files for TFTP limit of 4294967296 bytes.
  239 17:46:15.918692  end: 1 tftp-deploy (duration 00:00:12) [common]
  240 17:46:15.918854  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 17:46:15.918988  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 17:46:15.919173  substitutions:
  243 17:46:15.919281  - {DTB}: None
  244 17:46:15.919386  - {INITRD}: 11712555/tftp-deploy-djbleuol/ramdisk/ramdisk.cpio.gz
  245 17:46:15.919488  - {KERNEL}: 11712555/tftp-deploy-djbleuol/kernel/bzImage
  246 17:46:15.919587  - {LAVA_MAC}: None
  247 17:46:15.919689  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712555/extract-nfsrootfs-07tgk53u
  248 17:46:15.919787  - {NFS_SERVER_IP}: 192.168.201.1
  249 17:46:15.919886  - {PRESEED_CONFIG}: None
  250 17:46:15.919984  - {PRESEED_LOCAL}: None
  251 17:46:15.920061  - {RAMDISK}: 11712555/tftp-deploy-djbleuol/ramdisk/ramdisk.cpio.gz
  252 17:46:15.920132  - {ROOT_PART}: None
  253 17:46:15.920195  - {ROOT}: None
  254 17:46:15.920256  - {SERVER_IP}: 192.168.201.1
  255 17:46:15.920317  - {TEE}: None
  256 17:46:15.920378  Parsed boot commands:
  257 17:46:15.920439  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 17:46:15.920682  Parsed boot commands: tftpboot 192.168.201.1 11712555/tftp-deploy-djbleuol/kernel/bzImage 11712555/tftp-deploy-djbleuol/kernel/cmdline 11712555/tftp-deploy-djbleuol/ramdisk/ramdisk.cpio.gz
  259 17:46:15.920820  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 17:46:15.920950  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 17:46:15.921093  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 17:46:15.921228  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 17:46:15.921343  Not connected, no need to disconnect.
  264 17:46:15.921466  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 17:46:15.921600  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 17:46:15.921714  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-1'
  267 17:46:15.925951  Setting prompt string to ['lava-test: # ']
  268 17:46:15.926391  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 17:46:15.926553  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 17:46:15.926697  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 17:46:15.926836  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 17:46:15.927134  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
  273 17:46:32.847479  >> Command sent successfully.

  274 17:46:32.850252  Returned 0 in 16 seconds
  275 17:46:32.950763  end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
  277 17:46:32.951110  end: 2.2.2 reset-device (duration 00:00:17) [common]
  278 17:46:32.951222  start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
  279 17:46:32.951339  Setting prompt string to 'Starting depthcharge on sarien...'
  280 17:46:32.951416  Changing prompt to 'Starting depthcharge on sarien...'
  281 17:46:32.951491  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  282 17:46:32.951797  [Enter `^Ec?' for help]

  283 17:46:32.951888  

  284 17:46:32.951960  

  285 17:46:32.952043  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  286 17:46:32.952113  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz

  287 17:46:32.952182  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  288 17:46:32.952254  CPU: AES supported, TXT NOT supported, VT supported

  289 17:46:32.952319  MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)

  290 17:46:32.952382  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  291 17:46:32.952445  IGD: device id 3ea1 (rev 02) is Unknown

  292 17:46:32.952506  VBOOT: Loading verstage.

  293 17:46:32.952570  CBFS @ 1d00000 size 300000

  294 17:46:32.952632  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  295 17:46:32.952694  CBFS: Locating 'fallback/verstage'

  296 17:46:32.952756  CBFS: Found @ offset 10f6c0 size 1435c

  297 17:46:32.952817  

  298 17:46:32.952877  

  299 17:46:32.952937  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  300 17:46:32.952998  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  301 17:46:32.953059  done! DID_VID 0x00281ae0

  302 17:46:32.953119  TPM ready after 0 ms

  303 17:46:32.953180  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  304 17:46:32.953241  tlcl_send_startup: Startup return code is 0

  305 17:46:32.953301  TPM: setup succeeded

  306 17:46:32.953391  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  307 17:46:32.953493  Checking cr50 for recovery request

  308 17:46:32.953559  Phase 1

  309 17:46:32.953622  FMAP: Found "FLASH" version 1.1 at 1c10000.

  310 17:46:32.953686  FMAP: base = fe000000 size = 2000000 #areas = 37

  311 17:46:32.953750  FMAP: area GBB found @ 1c11000 (978944 bytes)

  312 17:46:32.953811  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  313 17:46:32.953873  Phase 2

  314 17:46:32.953932  Phase 3

  315 17:46:32.953992  FMAP: area GBB found @ 1c11000 (978944 bytes)

  316 17:46:32.954053  VB2:vb2_report_dev_firmware() This is developer signed firmware

  317 17:46:32.954114  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  318 17:46:32.954175  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  319 17:46:32.954237  VB2:vb2_verify_keyblock() Checking key block signature...

  320 17:46:32.954298  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  321 17:46:32.954359  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  322 17:46:32.954420  VB2:vb2_verify_fw_preamble() Verifying preamble.

  323 17:46:32.954480  Phase 4

  324 17:46:32.954541  FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)

  325 17:46:32.954602  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  326 17:46:32.954664  VB2:vb2_rsa_verify_digest() Digest check failed!

  327 17:46:32.954725  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  328 17:46:32.954786  Saving nvdata

  329 17:46:32.954846  Reboot requested (10020007)

  330 17:46:32.954907  board_reset() called!

  331 17:46:32.954967  full_reset() called!

  332 17:46:37.143540  

  333 17:46:37.144025  

  334 17:46:37.151674  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  335 17:46:37.156913  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz

  336 17:46:37.161609  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  337 17:46:37.166856  CPU: AES supported, TXT NOT supported, VT supported

  338 17:46:37.171875  MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)

  339 17:46:37.177036  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  340 17:46:37.180762  IGD: device id 3ea1 (rev 02) is Unknown

  341 17:46:37.184605  VBOOT: Loading verstage.

  342 17:46:37.187414  CBFS @ 1d00000 size 300000

  343 17:46:37.193629  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  344 17:46:37.196928  CBFS: Locating 'fallback/verstage'

  345 17:46:37.201238  CBFS: Found @ offset 10f6c0 size 1435c

  346 17:46:37.215350  

  347 17:46:37.215445  

  348 17:46:37.223611  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  349 17:46:37.230812  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  350 17:46:37.233057  done! DID_VID 0x00281ae0

  351 17:46:37.235077  TPM ready after 0 ms

  352 17:46:37.239172  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  353 17:46:37.339456  tlcl_send_startup: Startup return code is 0

  354 17:46:37.341233  TPM: setup succeeded

  355 17:46:37.360060  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  356 17:46:37.363623  Checking cr50 for recovery request

  357 17:46:37.373494  Phase 1

  358 17:46:37.378127  FMAP: Found "FLASH" version 1.1 at 1c10000.

  359 17:46:37.382860  FMAP: base = fe000000 size = 2000000 #areas = 37

  360 17:46:37.387508  FMAP: area GBB found @ 1c11000 (978944 bytes)

  361 17:46:37.394722  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  362 17:46:37.400973  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  363 17:46:37.404259  Recovery requested (1009000e)

  364 17:46:37.405322  Saving nvdata

  365 17:46:37.421279  tlcl_extend: response is 0

  366 17:46:37.437892  tlcl_extend: response is 0

  367 17:46:37.441494  CBFS @ 1d00000 size 300000

  368 17:46:37.447586  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  369 17:46:37.450560  CBFS: Locating 'fallback/romstage'

  370 17:46:37.454114  CBFS: Found @ offset 80 size 15b2c

  371 17:46:37.456244  

  372 17:46:37.456361  

  373 17:46:37.464543  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  374 17:46:37.469778  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  375 17:46:37.473817  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  376 17:46:37.477270  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  377 17:46:37.482434  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  378 17:46:37.486534  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  379 17:46:37.488855  TCO_STS:   0000 0004

  380 17:46:37.491723  GEN_PMCON: d0015209 00002200

  381 17:46:37.495183  GBLRST_CAUSE: 00000000 00000000

  382 17:46:37.497043  prev_sleep_state 5

  383 17:46:37.500666  Boot Count incremented to 28374

  384 17:46:37.503578  CBFS @ 1d00000 size 300000

  385 17:46:37.510030  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  386 17:46:37.512324  CBFS: Locating 'fspm.bin'

  387 17:46:37.516201  CBFS: Found @ offset 60fc0 size 70000

  388 17:46:37.521575  FMAP: Found "FLASH" version 1.1 at 1c10000.

  389 17:46:37.526356  FMAP: base = fe000000 size = 2000000 #areas = 37

  390 17:46:37.532227  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  391 17:46:37.538586  Probing TPM I2C: done! DID_VID 0x00281ae0

  392 17:46:37.541314  Locality already claimed

  393 17:46:37.544744  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  394 17:46:37.563980  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  395 17:46:37.570933  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  396 17:46:37.573307  MRC cache found, size 18e0

  397 17:46:37.575293  bootmode is set to :2

  398 17:46:37.664110  CBMEM:

  399 17:46:37.667674  IMD: root @ 89fff000 254 entries.

  400 17:46:37.671054  IMD: root @ 89ffec00 62 entries.

  401 17:46:37.674116  External stage cache:

  402 17:46:37.677227  IMD: root @ 8abff000 254 entries.

  403 17:46:37.680330  IMD: root @ 8abfec00 62 entries.

  404 17:46:37.686635  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  405 17:46:37.690120  creating vboot_handoff structure

  406 17:46:37.710811  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  407 17:46:37.726342  tlcl_write: response is 0

  408 17:46:37.745498  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  409 17:46:37.749574  MRC: TPM MRC hash updated successfully.

  410 17:46:37.750819  1 DIMMs found

  411 17:46:37.753624  top_of_ram = 0x8a000000

  412 17:46:37.758435  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  413 17:46:37.763421  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  414 17:46:37.766597  CBFS @ 1d00000 size 300000

  415 17:46:37.772708  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  416 17:46:37.775357  CBFS: Locating 'fallback/postcar'

  417 17:46:37.780210  CBFS: Found @ offset 107000 size 41a4

  418 17:46:37.785976  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  419 17:46:37.796478  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  420 17:46:37.801651  Processing 126 relocs. Offset value of 0x87cdd000

  421 17:46:37.803532  

  422 17:46:37.803626  

  423 17:46:37.812127  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  424 17:46:37.815008  CBFS @ 1d00000 size 300000

  425 17:46:37.821594  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  426 17:46:37.825029  CBFS: Locating 'fallback/ramstage'

  427 17:46:37.828746  CBFS: Found @ offset 458c0 size 1a8a8

  428 17:46:37.835025  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  429 17:46:37.862739  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  430 17:46:37.867428  Processing 3754 relocs. Offset value of 0x88e81000

  431 17:46:37.873340  

  432 17:46:37.873455  

  433 17:46:37.881558  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  434 17:46:37.885769  FMAP: Found "FLASH" version 1.1 at 1c10000.

  435 17:46:37.891176  FMAP: base = fe000000 size = 2000000 #areas = 37

  436 17:46:37.895858  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  437 17:46:37.900473  WARNING: RO_VPD is uninitialized or empty.

  438 17:46:37.905064  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  439 17:46:37.909809  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  440 17:46:37.910946  Normal boot.

  441 17:46:37.917358  BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1162

  442 17:46:37.920476  CBFS @ 1d00000 size 300000

  443 17:46:37.926672  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  444 17:46:37.930875  CBFS: Locating 'cpu_microcode_blob.bin'

  445 17:46:37.934376  CBFS: Found @ offset 15c40 size 2fc00

  446 17:46:37.938472  microcode: sig=0x806ec pf=0x80 revision=0xb7

  447 17:46:37.941168  Skip microcode update

  448 17:46:37.944108  CBFS @ 1d00000 size 300000

  449 17:46:37.950431  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  450 17:46:37.953451  CBFS: Locating 'fsps.bin'

  451 17:46:37.956412  CBFS: Found @ offset d1fc0 size 35000

  452 17:46:37.991386  Detected 2 core, 2 thread CPU.

  453 17:46:37.993073  Setting up SMI for CPU

  454 17:46:37.995390  IED base = 0x8ac00000

  455 17:46:37.997893  IED size = 0x00400000

  456 17:46:38.000144  Will perform SMM setup.

  457 17:46:38.005443  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.

  458 17:46:38.012348  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  459 17:46:38.017837  Processing 16 relocs. Offset value of 0x00030000

  460 17:46:38.020869  Attempting to start 1 APs

  461 17:46:38.024303  Waiting for 10ms after sending INIT.

  462 17:46:38.038831  Waiting for 1st SIPI to complete...done.

  463 17:46:38.040576  AP: slot 1 apic_id 2.

  464 17:46:38.044161  Waiting for 2nd SIPI to complete...done.

  465 17:46:38.052505  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 17:46:38.057685  Processing 13 relocs. Offset value of 0x00038000

  467 17:46:38.063992  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  468 17:46:38.067439  Installing SMM handler to 0x8a000000

  469 17:46:38.075558  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  470 17:46:38.081448  Processing 867 relocs. Offset value of 0x8a010000

  471 17:46:38.089203  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  472 17:46:38.093946  Processing 13 relocs. Offset value of 0x8a008000

  473 17:46:38.099820  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  474 17:46:38.105779  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  475 17:46:38.109580  Clearing SMI status registers

  476 17:46:38.110256  SMI_STS: PM1 

  477 17:46:38.112873  PM1_STS: WAK PWRBTN 

  478 17:46:38.115585  TCO_STS: BOOT SECOND_TO 

  479 17:46:38.117857  GPE0 STD STS: eSPI 

  480 17:46:38.120215  New SMBASE 0x8a000000

  481 17:46:38.123073  In relocation handler: CPU 0

  482 17:46:38.126823  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  483 17:46:38.131687  Writing SMRR. base = 0x8a000006, mask=0xff000800

  484 17:46:38.133772  Relocation complete.

  485 17:46:38.135494  New SMBASE 0x89fffc00

  486 17:46:38.138792  In relocation handler: CPU 1

  487 17:46:38.143290  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  488 17:46:38.148226  Writing SMRR. base = 0x8a000006, mask=0xff000800

  489 17:46:38.149440  Relocation complete.

  490 17:46:38.152323  Initializing CPU #0

  491 17:46:38.155574  CPU: vendor Intel device 806ec

  492 17:46:38.159560  CPU: family 06, model 8e, stepping 0c

  493 17:46:38.161964  Clearing out pending MCEs

  494 17:46:38.166739  Setting up local APIC... apic_id: 0x00 done.

  495 17:46:38.169714  Turbo is available but hidden

  496 17:46:38.172061  Turbo has been enabled

  497 17:46:38.173709  VMX status: enabled

  498 17:46:38.177268  IA32_FEATURE_CONTROL status: locked

  499 17:46:38.179918  Skip microcode update

  500 17:46:38.181708  CPU #0 initialized

  501 17:46:38.183937  Initializing CPU #1

  502 17:46:38.187384  CPU: vendor Intel device 806ec

  503 17:46:38.190344  CPU: family 06, model 8e, stepping 0c

  504 17:46:38.193452  Clearing out pending MCEs

  505 17:46:38.198208  Setting up local APIC... apic_id: 0x02 done.

  506 17:46:38.199941  VMX status: enabled

  507 17:46:38.204089  IA32_FEATURE_CONTROL status: locked

  508 17:46:38.205388  Skip microcode update

  509 17:46:38.208139  CPU #1 initialized

  510 17:46:38.212378  bsp_do_flight_plan done after 163 msecs.

  511 17:46:38.215115  CPU: frequency set to 2200 MHz

  512 17:46:38.216707  Enabling SMIs.

  513 17:46:38.218385  Locking SMM.

  514 17:46:38.221654  CBFS @ 1d00000 size 300000

  515 17:46:38.227945  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  516 17:46:38.230290  CBFS: Locating 'vbt.bin'

  517 17:46:38.234365  CBFS: Found @ offset 60a40 size 4a0

  518 17:46:38.238806  Found a VBT of 4608 bytes after decompression

  519 17:46:38.251713  FMAP: area GBB found @ 1c11000 (978944 bytes)

  520 17:46:38.371133  Detected 2 core, 2 thread CPU.

  521 17:46:38.374455  Detected 2 core, 2 thread CPU.

  522 17:46:38.601422  Display FSP Version Info HOB

  523 17:46:38.604714  Reference Code - CPU = 7.0.5e.40

  524 17:46:38.607541  uCode Version = 0.0.0.b8

  525 17:46:38.610330  Display FSP Version Info HOB

  526 17:46:38.613524  Reference Code - ME = 7.0.5e.40

  527 17:46:38.615858  MEBx version = 0.0.0.0

  528 17:46:38.619418  ME Firmware Version = Consumer SKU

  529 17:46:38.622408  Display FSP Version Info HOB

  530 17:46:38.625875  Reference Code - CNL PCH = 7.0.5e.40

  531 17:46:38.628908  PCH-CRID Status = Disabled

  532 17:46:38.632395  CNL PCH H A0 Hsio Version = 2.0.0.0

  533 17:46:38.635290  CNL PCH H Ax Hsio Version = 9.0.0.0

  534 17:46:38.639295  CNL PCH H Bx Hsio Version = a.0.0.0

  535 17:46:38.642959  CNL PCH LP B0 Hsio Version = 7.0.0.0

  536 17:46:38.647064  CNL PCH LP Bx Hsio Version = 6.0.0.0

  537 17:46:38.650663  CNL PCH LP Dx Hsio Version = 7.0.0.0

  538 17:46:38.653666  Display FSP Version Info HOB

  539 17:46:38.657728  Reference Code - SA - System Agent = 7.0.5e.40

  540 17:46:38.661370  Reference Code - MRC = 0.7.1.68

  541 17:46:38.664615  SA - PCIe Version = 7.0.5e.40

  542 17:46:38.666764  SA-CRID Status = Disabled

  543 17:46:38.670162  SA-CRID Original Value = 0.0.0.c

  544 17:46:38.673099  SA-CRID New Value = 0.0.0.c

  545 17:46:38.691992  RTC Init

  546 17:46:38.695463  Set power off after power failure.

  547 17:46:38.696693  Disabling Deep S3

  548 17:46:38.699481  Disabling Deep S3

  549 17:46:38.701196  Disabling Deep S4

  550 17:46:38.702811  Disabling Deep S4

  551 17:46:38.705126  Disabling Deep S5

  552 17:46:38.706522  Disabling Deep S5

  553 17:46:38.713637  BS: BS_DEV_INIT_CHIPS times (us): entry 300578 run 472081 exit 16236

  554 17:46:38.716170  Enumerating buses...

  555 17:46:38.719897  Show all devs... Before device enumeration.

  556 17:46:38.722447  Root Device: enabled 1

  557 17:46:38.725096  CPU_CLUSTER: 0: enabled 1

  558 17:46:38.727446  DOMAIN: 0000: enabled 1

  559 17:46:38.729690  APIC: 00: enabled 1

  560 17:46:38.731979  PCI: 00:00.0: enabled 1

  561 17:46:38.734385  PCI: 00:02.0: enabled 1

  562 17:46:38.736731  PCI: 00:04.0: enabled 1

  563 17:46:38.739039  PCI: 00:12.0: enabled 1

  564 17:46:38.741461  PCI: 00:12.5: enabled 0

  565 17:46:38.743805  PCI: 00:12.6: enabled 0

  566 17:46:38.746504  PCI: 00:13.0: enabled 0

  567 17:46:38.748319  PCI: 00:14.0: enabled 1

  568 17:46:38.751361  PCI: 00:14.1: enabled 0

  569 17:46:38.753622  PCI: 00:14.3: enabled 1

  570 17:46:38.755904  PCI: 00:14.5: enabled 0

  571 17:46:38.758959  PCI: 00:15.0: enabled 1

  572 17:46:38.760711  PCI: 00:15.1: enabled 1

  573 17:46:38.763215  PCI: 00:15.2: enabled 0

  574 17:46:38.765927  PCI: 00:15.3: enabled 0

  575 17:46:38.768281  PCI: 00:16.0: enabled 1

  576 17:46:38.770152  PCI: 00:16.1: enabled 0

  577 17:46:38.772984  PCI: 00:16.2: enabled 0

  578 17:46:38.775588  PCI: 00:16.3: enabled 0

  579 17:46:38.777956  PCI: 00:16.4: enabled 0

  580 17:46:38.780330  PCI: 00:16.5: enabled 0

  581 17:46:38.783325  PCI: 00:17.0: enabled 1

  582 17:46:38.785062  PCI: 00:19.0: enabled 1

  583 17:46:38.787499  PCI: 00:19.1: enabled 0

  584 17:46:38.790481  PCI: 00:19.2: enabled 1

  585 17:46:38.792805  PCI: 00:1a.0: enabled 0

  586 17:46:38.795073  PCI: 00:1c.0: enabled 1

  587 17:46:38.797374  PCI: 00:1c.1: enabled 0

  588 17:46:38.799802  PCI: 00:1c.2: enabled 0

  589 17:46:38.802243  PCI: 00:1c.3: enabled 0

  590 17:46:38.804988  PCI: 00:1c.4: enabled 0

  591 17:46:38.807324  PCI: 00:1c.5: enabled 0

  592 17:46:38.809636  PCI: 00:1c.6: enabled 0

  593 17:46:38.812036  PCI: 00:1c.7: enabled 1

  594 17:46:38.814335  PCI: 00:1d.0: enabled 1

  595 17:46:38.816689  PCI: 00:1d.1: enabled 1

  596 17:46:38.819599  PCI: 00:1d.2: enabled 0

  597 17:46:38.821533  PCI: 00:1d.3: enabled 0

  598 17:46:38.824164  PCI: 00:1d.4: enabled 1

  599 17:46:38.826410  PCI: 00:1e.0: enabled 0

  600 17:46:38.829204  PCI: 00:1e.1: enabled 0

  601 17:46:38.831278  PCI: 00:1e.2: enabled 0

  602 17:46:38.833763  PCI: 00:1e.3: enabled 0

  603 17:46:38.836400  PCI: 00:1f.0: enabled 1

  604 17:46:38.839215  PCI: 00:1f.1: enabled 1

  605 17:46:38.841376  PCI: 00:1f.2: enabled 1

  606 17:46:38.843784  PCI: 00:1f.3: enabled 1

  607 17:46:38.846210  PCI: 00:1f.4: enabled 1

  608 17:46:38.848545  PCI: 00:1f.5: enabled 1

  609 17:46:38.850916  PCI: 00:1f.6: enabled 1

  610 17:46:38.853287  USB0 port 0: enabled 1

  611 17:46:38.855456  I2C: 00:10: enabled 1

  612 17:46:38.857742  I2C: 00:10: enabled 1

  613 17:46:38.859913  I2C: 00:34: enabled 1

  614 17:46:38.861945  I2C: 00:2c: enabled 1

  615 17:46:38.864269  I2C: 00:50: enabled 1

  616 17:46:38.866914  PNP: 0c09.0: enabled 1

  617 17:46:38.869241  USB2 port 0: enabled 1

  618 17:46:38.871595  USB2 port 1: enabled 1

  619 17:46:38.874013  USB2 port 2: enabled 1

  620 17:46:38.876432  USB2 port 4: enabled 1

  621 17:46:38.878755  USB2 port 5: enabled 1

  622 17:46:38.880475  USB2 port 6: enabled 1

  623 17:46:38.883097  USB2 port 7: enabled 1

  624 17:46:38.885427  USB2 port 8: enabled 1

  625 17:46:38.887845  USB2 port 9: enabled 1

  626 17:46:38.890221  USB3 port 0: enabled 1

  627 17:46:38.892580  USB3 port 1: enabled 1

  628 17:46:38.894927  USB3 port 2: enabled 1

  629 17:46:38.897312  USB3 port 3: enabled 1

  630 17:46:38.899227  USB3 port 4: enabled 1

  631 17:46:38.901430  APIC: 02: enabled 1

  632 17:46:38.903703  Compare with tree...

  633 17:46:38.905989  Root Device: enabled 1

  634 17:46:38.908923   CPU_CLUSTER: 0: enabled 1

  635 17:46:38.911257    APIC: 00: enabled 1

  636 17:46:38.913607    APIC: 02: enabled 1

  637 17:46:38.915939   DOMAIN: 0000: enabled 1

  638 17:46:38.918312    PCI: 00:00.0: enabled 1

  639 17:46:38.921090    PCI: 00:02.0: enabled 1

  640 17:46:38.923496    PCI: 00:04.0: enabled 1

  641 17:46:38.926495    PCI: 00:12.0: enabled 1

  642 17:46:38.928793    PCI: 00:12.5: enabled 0

  643 17:46:38.931692    PCI: 00:12.6: enabled 0

  644 17:46:38.934102    PCI: 00:13.0: enabled 0

  645 17:46:38.936973    PCI: 00:14.0: enabled 1

  646 17:46:38.938857     USB0 port 0: enabled 1

  647 17:46:38.942091      USB2 port 0: enabled 1

  648 17:46:38.944503      USB2 port 1: enabled 1

  649 17:46:38.947515      USB2 port 2: enabled 1

  650 17:46:38.950138      USB2 port 4: enabled 1

  651 17:46:38.952314      USB2 port 5: enabled 1

  652 17:46:38.955702      USB2 port 6: enabled 1

  653 17:46:38.958659      USB2 port 7: enabled 1

  654 17:46:38.961028      USB2 port 8: enabled 1

  655 17:46:38.963950      USB2 port 9: enabled 1

  656 17:46:38.966862      USB3 port 0: enabled 1

  657 17:46:38.968759      USB3 port 1: enabled 1

  658 17:46:38.971823      USB3 port 2: enabled 1

  659 17:46:38.974497      USB3 port 3: enabled 1

  660 17:46:38.977819      USB3 port 4: enabled 1

  661 17:46:38.980006    PCI: 00:14.1: enabled 0

  662 17:46:38.983096    PCI: 00:14.3: enabled 1

  663 17:46:38.985534    PCI: 00:14.5: enabled 0

  664 17:46:38.988728    PCI: 00:15.0: enabled 1

  665 17:46:38.990448     I2C: 00:10: enabled 1

  666 17:46:38.993135     I2C: 00:10: enabled 1

  667 17:46:38.995598     I2C: 00:34: enabled 1

  668 17:46:38.998476    PCI: 00:15.1: enabled 1

  669 17:46:39.000804     I2C: 00:2c: enabled 1

  670 17:46:39.003674    PCI: 00:15.2: enabled 0

  671 17:46:39.005929    PCI: 00:15.3: enabled 0

  672 17:46:39.008818    PCI: 00:16.0: enabled 1

  673 17:46:39.010809    PCI: 00:16.1: enabled 0

  674 17:46:39.014134    PCI: 00:16.2: enabled 0

  675 17:46:39.016434    PCI: 00:16.3: enabled 0

  676 17:46:39.019385    PCI: 00:16.4: enabled 0

  677 17:46:39.021704    PCI: 00:16.5: enabled 0

  678 17:46:39.024203    PCI: 00:17.0: enabled 1

  679 17:46:39.027030    PCI: 00:19.0: enabled 1

  680 17:46:39.029461     I2C: 00:50: enabled 1

  681 17:46:39.032366    PCI: 00:19.1: enabled 0

  682 17:46:39.034652    PCI: 00:19.2: enabled 1

  683 17:46:39.037617    PCI: 00:1a.0: enabled 0

  684 17:46:39.039899    PCI: 00:1c.0: enabled 1

  685 17:46:39.042806    PCI: 00:1c.1: enabled 0

  686 17:46:39.044995    PCI: 00:1c.2: enabled 0

  687 17:46:39.048051    PCI: 00:1c.3: enabled 0

  688 17:46:39.050585    PCI: 00:1c.4: enabled 0

  689 17:46:39.052966    PCI: 00:1c.5: enabled 0

  690 17:46:39.055784    PCI: 00:1c.6: enabled 0

  691 17:46:39.058513    PCI: 00:1c.7: enabled 1

  692 17:46:39.060681    PCI: 00:1d.0: enabled 1

  693 17:46:39.063426    PCI: 00:1d.1: enabled 1

  694 17:46:39.066239    PCI: 00:1d.2: enabled 0

  695 17:46:39.069034    PCI: 00:1d.3: enabled 0

  696 17:46:39.071345    PCI: 00:1d.4: enabled 1

  697 17:46:39.074268    PCI: 00:1e.0: enabled 0

  698 17:46:39.076601    PCI: 00:1e.1: enabled 0

  699 17:46:39.079475    PCI: 00:1e.2: enabled 0

  700 17:46:39.081826    PCI: 00:1e.3: enabled 0

  701 17:46:39.084308    PCI: 00:1f.0: enabled 1

  702 17:46:39.087476     PNP: 0c09.0: enabled 1

  703 17:46:39.089685    PCI: 00:1f.1: enabled 1

  704 17:46:39.092454    PCI: 00:1f.2: enabled 1

  705 17:46:39.094830    PCI: 00:1f.3: enabled 1

  706 17:46:39.097607    PCI: 00:1f.4: enabled 1

  707 17:46:39.100329    PCI: 00:1f.5: enabled 1

  708 17:46:39.103247    PCI: 00:1f.6: enabled 1

  709 17:46:39.105521  Root Device scanning...

  710 17:46:39.108994  root_dev_scan_bus for Root Device

  711 17:46:39.111307  CPU_CLUSTER: 0 enabled

  712 17:46:39.113636  DOMAIN: 0000 enabled

  713 17:46:39.115984  DOMAIN: 0000 scanning...

  714 17:46:39.119340  PCI: pci_scan_bus for bus 00

  715 17:46:39.122228  PCI: 00:00.0 [8086/0000] ops

  716 17:46:39.125298  PCI: 00:00.0 [8086/3e35] enabled

  717 17:46:39.128715  PCI: 00:02.0 [8086/0000] ops

  718 17:46:39.132265  PCI: 00:02.0 [8086/3ea1] enabled

  719 17:46:39.135132  PCI: 00:04.0 [8086/1903] enabled

  720 17:46:39.138735  PCI: 00:08.0 [8086/1911] enabled

  721 17:46:39.142203  PCI: 00:12.0 [8086/9df9] enabled

  722 17:46:39.145180  PCI: 00:14.0 [8086/0000] bus ops

  723 17:46:39.148707  PCI: 00:14.0 [8086/9ded] enabled

  724 17:46:39.152215  PCI: 00:14.2 [8086/9def] enabled

  725 17:46:39.155218  PCI: 00:14.3 [8086/9df0] enabled

  726 17:46:39.158689  PCI: 00:15.0 [8086/0000] bus ops

  727 17:46:39.161653  PCI: 00:15.0 [8086/9de8] enabled

  728 17:46:39.165091  PCI: 00:15.1 [8086/0000] bus ops

  729 17:46:39.168450  PCI: 00:15.1 [8086/9de9] enabled

  730 17:46:39.171232  PCI: 00:16.0 [8086/0000] ops

  731 17:46:39.174829  PCI: 00:16.0 [8086/9de0] enabled

  732 17:46:39.177588  PCI: 00:17.0 [8086/0000] ops

  733 17:46:39.180846  PCI: 00:17.0 [8086/9dd3] enabled

  734 17:46:39.184428  PCI: 00:19.0 [8086/0000] bus ops

  735 17:46:39.187424  PCI: 00:19.0 [8086/9dc5] enabled

  736 17:46:39.190291  PCI: 00:19.2 [8086/0000] ops

  737 17:46:39.193746  PCI: 00:19.2 [8086/9dc7] enabled

  738 17:46:39.197201  PCI: 00:1c.0 [8086/0000] bus ops

  739 17:46:39.200449  PCI: 00:1c.0 [8086/9dbf] enabled

  740 17:46:39.205643  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  741 17:46:39.209447  PCI: 00:1d.0 [8086/0000] bus ops

  742 17:46:39.213063  PCI: 00:1d.0 [8086/9db4] enabled

  743 17:46:39.218396  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  744 17:46:39.224024  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  745 17:46:39.226915  PCI: 00:1f.0 [8086/0000] bus ops

  746 17:46:39.231013  PCI: 00:1f.0 [8086/9d84] enabled

  747 17:46:39.236415  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  748 17:46:39.241679  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  749 17:46:39.245758  PCI: 00:1f.3 [8086/0000] bus ops

  750 17:46:39.248666  PCI: 00:1f.3 [8086/9dc8] enabled

  751 17:46:39.252303  PCI: 00:1f.4 [8086/0000] bus ops

  752 17:46:39.255253  PCI: 00:1f.4 [8086/9da3] enabled

  753 17:46:39.258839  PCI: 00:1f.5 [8086/0000] bus ops

  754 17:46:39.261365  PCI: 00:1f.5 [8086/9da4] enabled

  755 17:46:39.265444  PCI: 00:1f.6 [8086/15be] enabled

  756 17:46:39.268437  PCI: Leftover static devices:

  757 17:46:39.269611  PCI: 00:12.5

  758 17:46:39.270807  PCI: 00:12.6

  759 17:46:39.272618  PCI: 00:13.0

  760 17:46:39.273819  PCI: 00:14.1

  761 17:46:39.275438  PCI: 00:14.5

  762 17:46:39.276562  PCI: 00:15.2

  763 17:46:39.277660  PCI: 00:15.3

  764 17:46:39.279420  PCI: 00:16.1

  765 17:46:39.280445  PCI: 00:16.2

  766 17:46:39.281951  PCI: 00:16.3

  767 17:46:39.283543  PCI: 00:16.4

  768 17:46:39.284298  PCI: 00:16.5

  769 17:46:39.285869  PCI: 00:19.1

  770 17:46:39.287544  PCI: 00:1a.0

  771 17:46:39.288279  PCI: 00:1c.1

  772 17:46:39.290367  PCI: 00:1c.2

  773 17:46:39.291518  PCI: 00:1c.3

  774 17:46:39.292677  PCI: 00:1c.4

  775 17:46:39.294498  PCI: 00:1c.5

  776 17:46:39.295252  PCI: 00:1c.6

  777 17:46:39.296866  PCI: 00:1c.7

  778 17:46:39.298031  PCI: 00:1d.1

  779 17:46:39.299744  PCI: 00:1d.2

  780 17:46:39.300991  PCI: 00:1d.3

  781 17:46:39.302155  PCI: 00:1d.4

  782 17:46:39.303895  PCI: 00:1e.0

  783 17:46:39.305160  PCI: 00:1e.1

  784 17:46:39.305903  PCI: 00:1e.2

  785 17:46:39.307862  PCI: 00:1e.3

  786 17:46:39.308999  PCI: 00:1f.1

  787 17:46:39.310428  PCI: 00:1f.2

  788 17:46:39.313716  PCI: Check your devicetree.cb.

  789 17:46:39.315976  PCI: 00:14.0 scanning...

  790 17:46:39.319687  scan_usb_bus for PCI: 00:14.0

  791 17:46:39.320963  USB0 port 0 enabled

  792 17:46:39.323926  USB0 port 0 scanning...

  793 17:46:39.327367  scan_usb_bus for USB0 port 0

  794 17:46:39.329053  USB2 port 0 enabled

  795 17:46:39.331265  USB2 port 1 enabled

  796 17:46:39.333332  USB2 port 2 enabled

  797 17:46:39.335246  USB2 port 4 enabled

  798 17:46:39.337565  USB2 port 5 enabled

  799 17:46:39.339296  USB2 port 6 enabled

  800 17:46:39.341629  USB2 port 7 enabled

  801 17:46:39.343433  USB2 port 8 enabled

  802 17:46:39.345765  USB2 port 9 enabled

  803 17:46:39.347498  USB3 port 0 enabled

  804 17:46:39.349858  USB3 port 1 enabled

  805 17:46:39.351244  USB3 port 2 enabled

  806 17:46:39.354041  USB3 port 3 enabled

  807 17:46:39.355829  USB3 port 4 enabled

  808 17:46:39.357618  USB2 port 0 scanning...

  809 17:46:39.361370  scan_usb_bus for USB2 port 0

  810 17:46:39.364780  scan_usb_bus for USB2 port 0 done

  811 17:46:39.370195  scan_bus: scanning of bus USB2 port 0 took 9061 usecs

  812 17:46:39.372506  USB2 port 1 scanning...

  813 17:46:39.375988  scan_usb_bus for USB2 port 1

  814 17:46:39.379543  scan_usb_bus for USB2 port 1 done

  815 17:46:39.384531  scan_bus: scanning of bus USB2 port 1 took 9063 usecs

  816 17:46:39.386420  USB2 port 2 scanning...

  817 17:46:39.390268  scan_usb_bus for USB2 port 2

  818 17:46:39.393268  scan_usb_bus for USB2 port 2 done

  819 17:46:39.398858  scan_bus: scanning of bus USB2 port 2 took 9060 usecs

  820 17:46:39.401196  USB2 port 4 scanning...

  821 17:46:39.404780  scan_usb_bus for USB2 port 4

  822 17:46:39.408397  scan_usb_bus for USB2 port 4 done

  823 17:46:39.413468  scan_bus: scanning of bus USB2 port 4 took 9061 usecs

  824 17:46:39.415833  USB2 port 5 scanning...

  825 17:46:39.419431  scan_usb_bus for USB2 port 5

  826 17:46:39.421862  scan_usb_bus for USB2 port 5 done

  827 17:46:39.427685  scan_bus: scanning of bus USB2 port 5 took 9060 usecs

  828 17:46:39.430196  USB2 port 6 scanning...

  829 17:46:39.433551  scan_usb_bus for USB2 port 6

  830 17:46:39.436865  scan_usb_bus for USB2 port 6 done

  831 17:46:39.442428  scan_bus: scanning of bus USB2 port 6 took 9059 usecs

  832 17:46:39.444300  USB2 port 7 scanning...

  833 17:46:39.448346  scan_usb_bus for USB2 port 7

  834 17:46:39.451277  scan_usb_bus for USB2 port 7 done

  835 17:46:39.456574  scan_bus: scanning of bus USB2 port 7 took 9061 usecs

  836 17:46:39.458901  USB2 port 8 scanning...

  837 17:46:39.462472  scan_usb_bus for USB2 port 8

  838 17:46:39.465636  scan_usb_bus for USB2 port 8 done

  839 17:46:39.471468  scan_bus: scanning of bus USB2 port 8 took 9058 usecs

  840 17:46:39.473839  USB2 port 9 scanning...

  841 17:46:39.476283  scan_usb_bus for USB2 port 9

  842 17:46:39.480287  scan_usb_bus for USB2 port 9 done

  843 17:46:39.485694  scan_bus: scanning of bus USB2 port 9 took 9059 usecs

  844 17:46:39.487844  USB3 port 0 scanning...

  845 17:46:39.491365  scan_usb_bus for USB3 port 0

  846 17:46:39.494392  scan_usb_bus for USB3 port 0 done

  847 17:46:39.500058  scan_bus: scanning of bus USB3 port 0 took 9060 usecs

  848 17:46:39.502295  USB3 port 1 scanning...

  849 17:46:39.505821  scan_usb_bus for USB3 port 1

  850 17:46:39.508668  scan_usb_bus for USB3 port 1 done

  851 17:46:39.513960  scan_bus: scanning of bus USB3 port 1 took 9059 usecs

  852 17:46:39.516804  USB3 port 2 scanning...

  853 17:46:39.519789  scan_usb_bus for USB3 port 2

  854 17:46:39.523526  scan_usb_bus for USB3 port 2 done

  855 17:46:39.528879  scan_bus: scanning of bus USB3 port 2 took 9060 usecs

  856 17:46:39.531288  USB3 port 3 scanning...

  857 17:46:39.534062  scan_usb_bus for USB3 port 3

  858 17:46:39.537405  scan_usb_bus for USB3 port 3 done

  859 17:46:39.542663  scan_bus: scanning of bus USB3 port 3 took 9059 usecs

  860 17:46:39.545360  USB3 port 4 scanning...

  861 17:46:39.548616  scan_usb_bus for USB3 port 4

  862 17:46:39.551760  scan_usb_bus for USB3 port 4 done

  863 17:46:39.557273  scan_bus: scanning of bus USB3 port 4 took 9061 usecs

  864 17:46:39.560836  scan_usb_bus for USB0 port 0 done

  865 17:46:39.566239  scan_bus: scanning of bus USB0 port 0 took 239290 usecs

  866 17:46:39.569792  scan_usb_bus for PCI: 00:14.0 done

  867 17:46:39.575535  scan_bus: scanning of bus PCI: 00:14.0 took 256219 usecs

  868 17:46:39.577984  PCI: 00:15.0 scanning...

  869 17:46:39.582076  scan_generic_bus for PCI: 00:15.0

  870 17:46:39.585277  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  871 17:46:39.589976  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  872 17:46:39.593947  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  873 17:46:39.598039  scan_generic_bus for PCI: 00:15.0 done

  874 17:46:39.603304  scan_bus: scanning of bus PCI: 00:15.0 took 22379 usecs

  875 17:46:39.605762  PCI: 00:15.1 scanning...

  876 17:46:39.609761  scan_generic_bus for PCI: 00:15.1

  877 17:46:39.613685  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  878 17:46:39.617244  scan_generic_bus for PCI: 00:15.1 done

  879 17:46:39.623216  scan_bus: scanning of bus PCI: 00:15.1 took 14212 usecs

  880 17:46:39.625631  PCI: 00:19.0 scanning...

  881 17:46:39.629730  scan_generic_bus for PCI: 00:19.0

  882 17:46:39.632826  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

  883 17:46:39.637460  scan_generic_bus for PCI: 00:19.0 done

  884 17:46:39.643112  scan_bus: scanning of bus PCI: 00:19.0 took 14213 usecs

  885 17:46:39.645264  PCI: 00:1c.0 scanning...

  886 17:46:39.649318  do_pci_scan_bridge for PCI: 00:1c.0

  887 17:46:39.652153  PCI: pci_scan_bus for bus 01

  888 17:46:39.655507  PCI: 01:00.0 [10ec/525a] enabled

  889 17:46:39.658883  Capability: type 0x01 @ 0x80

  890 17:46:39.661775  Capability: type 0x05 @ 0x90

  891 17:46:39.664739  Capability: type 0x10 @ 0xb0

  892 17:46:39.667715  Capability: type 0x10 @ 0x40

  893 17:46:39.670799  Enabling Common Clock Configuration

  894 17:46:39.675403  L1 Sub-State supported from root port 28

  895 17:46:39.678264  L1 Sub-State Support = 0xf

  896 17:46:39.680650  CommonModeRestoreTime = 0x3c

  897 17:46:39.685265  Power On Value = 0x6, Power On Scale = 0x1

  898 17:46:39.687657  ASPM: Enabled L0s and L1

  899 17:46:39.690247  Capability: type 0x01 @ 0x80

  900 17:46:39.693641  Capability: type 0x05 @ 0x90

  901 17:46:39.696492  Capability: type 0x10 @ 0xb0

  902 17:46:39.702161  scan_bus: scanning of bus PCI: 00:1c.0 took 53662 usecs

  903 17:46:39.704570  PCI: 00:1d.0 scanning...

  904 17:46:39.708610  do_pci_scan_bridge for PCI: 00:1d.0

  905 17:46:39.711492  PCI: pci_scan_bus for bus 02

  906 17:46:39.715011  PCI: 02:00.0 [1e95/9100] enabled

  907 17:46:39.717986  Capability: type 0x01 @ 0x40

  908 17:46:39.720899  Capability: type 0x05 @ 0x50

  909 17:46:39.723819  Capability: type 0x10 @ 0x70

  910 17:46:39.726636  Capability: type 0x10 @ 0x40

  911 17:46:39.730491  Enabling Common Clock Configuration

  912 17:46:39.734365  L1 Sub-State supported from root port 29

  913 17:46:39.737339  L1 Sub-State Support = 0xf

  914 17:46:39.740267  CommonModeRestoreTime = 0x28

  915 17:46:39.744801  Power On Value = 0x16, Power On Scale = 0x0

  916 17:46:39.746576  ASPM: Enabled L1

  917 17:46:39.749462  Capability: type 0x01 @ 0x40

  918 17:46:39.752313  Capability: type 0x05 @ 0x50

  919 17:46:39.755207  Capability: type 0x10 @ 0x70

  920 17:46:39.760419  scan_bus: scanning of bus PCI: 00:1d.0 took 52980 usecs

  921 17:46:39.762936  PCI: 00:1f.0 scanning...

  922 17:46:39.765967  scan_lpc_bus for PCI: 00:1f.0

  923 17:46:39.768668  PNP: 0c09.0 enabled

  924 17:46:39.771765  scan_lpc_bus for PCI: 00:1f.0 done

  925 17:46:39.777256  scan_bus: scanning of bus PCI: 00:1f.0 took 11393 usecs

  926 17:46:39.779978  PCI: 00:1f.3 scanning...

  927 17:46:39.785878  scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs

  928 17:46:39.787915  PCI: 00:1f.4 scanning...

  929 17:46:39.792393  scan_generic_bus for PCI: 00:1f.4

  930 17:46:39.795849  scan_generic_bus for PCI: 00:1f.4 done

  931 17:46:39.801768  scan_bus: scanning of bus PCI: 00:1f.4 took 10129 usecs

  932 17:46:39.804034  PCI: 00:1f.5 scanning...

  933 17:46:39.807883  scan_generic_bus for PCI: 00:1f.5

  934 17:46:39.811460  scan_generic_bus for PCI: 00:1f.5 done

  935 17:46:39.817256  scan_bus: scanning of bus PCI: 00:1f.5 took 10128 usecs

  936 17:46:39.822646  scan_bus: scanning of bus DOMAIN: 0000 took 703647 usecs

  937 17:46:39.826600  root_dev_scan_bus for Root Device done

  938 17:46:39.832034  scan_bus: scanning of bus Root Device took 723785 usecs

  939 17:46:39.832960  done

  940 17:46:39.838830  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  941 17:46:39.844473  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  942 17:46:39.852829  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

  943 17:46:39.859590  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

  944 17:46:39.863617  SPI flash protection: WPSW=1 SRP0=1

  945 17:46:39.870632  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff

  946 17:46:39.875912  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.

  947 17:46:39.882472  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119842 exit 42597

  948 17:46:39.884775  found VGA at PCI: 00:02.0

  949 17:46:39.888217  Setting up VGA for PCI: 00:02.0

  950 17:46:39.892957  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  951 17:46:39.898178  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  952 17:46:39.900445  Allocating resources...

  953 17:46:39.902809  Reading resources...

  954 17:46:39.906887  Root Device read_resources bus 0 link: 0

  955 17:46:39.911396  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  956 17:46:39.916722  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  957 17:46:39.921327  DOMAIN: 0000 read_resources bus 0 link: 0

  958 17:46:39.927286  PCI: 00:14.0 read_resources bus 0 link: 0

  959 17:46:39.931927  USB0 port 0 read_resources bus 0 link: 0

  960 17:46:39.941229  USB0 port 0 read_resources bus 0 link: 0 done

  961 17:46:39.945903  PCI: 00:14.0 read_resources bus 0 link: 0 done

  962 17:46:39.951484  PCI: 00:15.0 read_resources bus 1 link: 0

  963 17:46:39.957219  PCI: 00:15.0 read_resources bus 1 link: 0 done

  964 17:46:39.961609  PCI: 00:15.1 read_resources bus 2 link: 0

  965 17:46:39.966961  PCI: 00:15.1 read_resources bus 2 link: 0 done

  966 17:46:39.972401  PCI: 00:19.0 read_resources bus 3 link: 0

  967 17:46:39.977418  PCI: 00:19.0 read_resources bus 3 link: 0 done

  968 17:46:39.982574  PCI: 00:1c.0 read_resources bus 1 link: 0

  969 17:46:39.987972  PCI: 00:1c.0 read_resources bus 1 link: 0 done

  970 17:46:39.992559  PCI: 00:1d.0 read_resources bus 2 link: 0

  971 17:46:39.997900  PCI: 00:1d.0 read_resources bus 2 link: 0 done

  972 17:46:40.001632  PCI: 00:1f.0 read_resources bus 0 link: 0

  973 17:46:40.007768  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  974 17:46:40.013783  DOMAIN: 0000 read_resources bus 0 link: 0 done

  975 17:46:40.018910  Root Device read_resources bus 0 link: 0 done

  976 17:46:40.021348  Done reading resources.

  977 17:46:40.027047  Show resources in subtree (Root Device)...After reading.

  978 17:46:40.031271   Root Device child on link 0 CPU_CLUSTER: 0

  979 17:46:40.034871    CPU_CLUSTER: 0 child on link 0 APIC: 00

  980 17:46:40.037063     APIC: 00

  981 17:46:40.038234     APIC: 02

  982 17:46:40.042309    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  983 17:46:40.051620    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  984 17:46:40.061453    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

  985 17:46:40.063242     PCI: 00:00.0

  986 17:46:40.072834     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  987 17:46:40.082199     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  988 17:46:40.090942     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  989 17:46:40.100021     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  990 17:46:40.109863     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  991 17:46:40.118894     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  992 17:46:40.128788     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

  993 17:46:40.137563     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

  994 17:46:40.146957     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

  995 17:46:40.156307     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

  996 17:46:40.166188     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

  997 17:46:40.175933     PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c

  998 17:46:40.184914     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

  999 17:46:40.193864     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1000 17:46:40.196033     PCI: 00:02.0

 1001 17:46:40.205588     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1002 17:46:40.216353     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1003 17:46:40.224745     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1004 17:46:40.226508     PCI: 00:04.0

 1005 17:46:40.236316     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1006 17:46:40.238060     PCI: 00:08.0

 1007 17:46:40.248108     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1008 17:46:40.249295     PCI: 00:12.0

 1009 17:46:40.259236     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1010 17:46:40.263809     PCI: 00:14.0 child on link 0 USB0 port 0

 1011 17:46:40.273742     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1012 17:46:40.278010      USB0 port 0 child on link 0 USB2 port 0

 1013 17:46:40.280186       USB2 port 0

 1014 17:46:40.281584       USB2 port 1

 1015 17:46:40.283174       USB2 port 2

 1016 17:46:40.284981       USB2 port 4

 1017 17:46:40.286760       USB2 port 5

 1018 17:46:40.288439       USB2 port 6

 1019 17:46:40.290670       USB2 port 7

 1020 17:46:40.292271       USB2 port 8

 1021 17:46:40.293888       USB2 port 9

 1022 17:46:40.295593       USB3 port 0

 1023 17:46:40.297306       USB3 port 1

 1024 17:46:40.299019       USB3 port 2

 1025 17:46:40.300834       USB3 port 3

 1026 17:46:40.302547       USB3 port 4

 1027 17:46:40.304283     PCI: 00:14.2

 1028 17:46:40.313938     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1029 17:46:40.323842     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1030 17:46:40.325540     PCI: 00:14.3

 1031 17:46:40.335434     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1032 17:46:40.339887     PCI: 00:15.0 child on link 0 I2C: 01:10

 1033 17:46:40.349308     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1034 17:46:40.351515      I2C: 01:10

 1035 17:46:40.353268      I2C: 01:10

 1036 17:46:40.354472      I2C: 01:34

 1037 17:46:40.359100     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1038 17:46:40.368543     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1039 17:46:40.369975      I2C: 02:2c

 1040 17:46:40.372046     PCI: 00:16.0

 1041 17:46:40.382233     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1042 17:46:40.383405     PCI: 00:17.0

 1043 17:46:40.392616     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1044 17:46:40.401667     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1045 17:46:40.410088     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1046 17:46:40.418424     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1047 17:46:40.426644     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1048 17:46:40.435614     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1049 17:46:40.440099     PCI: 00:19.0 child on link 0 I2C: 03:50

 1050 17:46:40.449851     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1051 17:46:40.459859     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1052 17:46:40.460993      I2C: 03:50

 1053 17:46:40.462246     PCI: 00:19.2

 1054 17:46:40.473754     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1055 17:46:40.483735     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1056 17:46:40.488569     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1057 17:46:40.497009     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1058 17:46:40.506111     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1059 17:46:40.515965     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1060 17:46:40.517796      PCI: 01:00.0

 1061 17:46:40.527104      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1062 17:46:40.531242     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1063 17:46:40.539892     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1064 17:46:40.549558     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1065 17:46:40.558475     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1066 17:46:40.560519      PCI: 02:00.0

 1067 17:46:40.570263      PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1068 17:46:40.574762     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1069 17:46:40.583555     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1070 17:46:40.592302     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1071 17:46:40.594002      PNP: 0c09.0

 1072 17:46:40.602434      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1073 17:46:40.611141      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1074 17:46:40.620034      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1075 17:46:40.621248     PCI: 00:1f.3

 1076 17:46:40.631171     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1077 17:46:40.641646     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1078 17:46:40.642864     PCI: 00:1f.4

 1079 17:46:40.652373     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1080 17:46:40.661691     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1081 17:46:40.663436     PCI: 00:1f.5

 1082 17:46:40.672837     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1083 17:46:40.674510     PCI: 00:1f.6

 1084 17:46:40.683395     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1085 17:46:40.689976  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1086 17:46:40.696237  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1087 17:46:40.703260  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1088 17:46:40.709271  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1089 17:46:40.716102  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1090 17:46:40.720097  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1091 17:46:40.723275  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1092 17:46:40.727307  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1093 17:46:40.730794  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1094 17:46:40.737136  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1095 17:46:40.744148  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1096 17:46:40.751770  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1097 17:46:40.760277  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1098 17:46:40.767532  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1099 17:46:40.771107  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1100 17:46:40.778450  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1101 17:46:40.787044  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1102 17:46:40.794869  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1103 17:46:40.801894  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1104 17:46:40.805411  PCI: 02:00.0 10 *  [0x0 - 0x3fff] mem

 1105 17:46:40.813783  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1106 17:46:40.818293  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1107 17:46:40.822794  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1108 17:46:40.828042  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1109 17:46:40.833248  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1110 17:46:40.838173  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1111 17:46:40.842892  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1112 17:46:40.847509  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1113 17:46:40.852864  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1114 17:46:40.857666  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1115 17:46:40.862364  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1116 17:46:40.866880  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1117 17:46:40.871757  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1118 17:46:40.876735  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1119 17:46:40.881472  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1120 17:46:40.886806  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1121 17:46:40.891604  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1122 17:46:40.895993  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1123 17:46:40.901044  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem

 1124 17:46:40.905974  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem

 1125 17:46:40.911057  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem

 1126 17:46:40.915633  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem

 1127 17:46:40.920799  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem

 1128 17:46:40.925625  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem

 1129 17:46:40.930330  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem

 1130 17:46:40.934648  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem

 1131 17:46:40.943222  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done

 1132 17:46:40.947272  avoid_fixed_resources: DOMAIN: 0000

 1133 17:46:40.953209  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1134 17:46:40.959102  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1135 17:46:40.966727  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1136 17:46:40.974637  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1137 17:46:40.982057  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1138 17:46:40.989949  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1139 17:46:40.997787  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1140 17:46:41.004918  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1141 17:46:41.012857  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1142 17:46:41.019993  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1143 17:46:41.027199  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1144 17:46:41.034858  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1145 17:46:41.037091  Setting resources...

 1146 17:46:41.043584  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1147 17:46:41.047532  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1148 17:46:41.051077  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1149 17:46:41.055348  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1150 17:46:41.059040  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1151 17:46:41.065497  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1152 17:46:41.071758  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1153 17:46:41.078177  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1154 17:46:41.084072  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1155 17:46:41.090816  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1156 17:46:41.098288  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff

 1157 17:46:41.103560  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1158 17:46:41.108261  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1159 17:46:41.112983  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1160 17:46:41.117796  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1161 17:46:41.122401  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1162 17:46:41.127940  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1163 17:46:41.132865  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1164 17:46:41.137475  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1165 17:46:41.142440  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1166 17:46:41.146688  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1167 17:46:41.151860  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1168 17:46:41.156841  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1169 17:46:41.161587  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1170 17:46:41.166024  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1171 17:46:41.170873  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1172 17:46:41.176472  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1173 17:46:41.181025  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1174 17:46:41.185887  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1175 17:46:41.190272  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem

 1176 17:46:41.195920  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem

 1177 17:46:41.200348  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem

 1178 17:46:41.205421  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem

 1179 17:46:41.210496  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem

 1180 17:46:41.215313  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem

 1181 17:46:41.219947  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem

 1182 17:46:41.227607  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done

 1183 17:46:41.234257  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1184 17:46:41.241532  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1185 17:46:41.249750  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1186 17:46:41.254581  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1187 17:46:41.262004  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1188 17:46:41.269541  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1189 17:46:41.276606  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1190 17:46:41.284070  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1191 17:46:41.288863  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1103fff] mem

 1192 17:46:41.296581  PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done

 1193 17:46:41.300789  Root Device assign_resources, bus 0 link: 0

 1194 17:46:41.305409  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1195 17:46:41.314285  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1196 17:46:41.322417  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1197 17:46:41.329552  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1198 17:46:41.338307  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1199 17:46:41.346970  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1200 17:46:41.355098  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1201 17:46:41.363273  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1202 17:46:41.367915  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1203 17:46:41.372015  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1204 17:46:41.380565  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1205 17:46:41.388975  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1206 17:46:41.396922  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1207 17:46:41.405277  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1208 17:46:41.410017  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1209 17:46:41.414439  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1210 17:46:41.423043  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1211 17:46:41.427483  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1212 17:46:41.432379  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1213 17:46:41.440736  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1214 17:46:41.448480  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1215 17:46:41.456126  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem

 1216 17:46:41.463698  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1217 17:46:41.471023  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1218 17:46:41.479257  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1219 17:46:41.486569  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem

 1220 17:46:41.495585  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1221 17:46:41.503318  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1222 17:46:41.507989  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1223 17:46:41.512889  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1224 17:46:41.520943  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64

 1225 17:46:41.529306  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1226 17:46:41.538287  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1227 17:46:41.546844  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1228 17:46:41.551066  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1229 17:46:41.559332  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1230 17:46:41.564058  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1231 17:46:41.572797  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1232 17:46:41.581717  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1233 17:46:41.589561  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1234 17:46:41.594790  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1235 17:46:41.602860  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64

 1236 17:46:41.607966  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1237 17:46:41.612665  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1238 17:46:41.617614  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1239 17:46:41.622301  LPC: Trying to open IO window from 930 size 8

 1240 17:46:41.626302  LPC: Trying to open IO window from 940 size 8

 1241 17:46:41.631340  LPC: Trying to open IO window from 950 size 10

 1242 17:46:41.639805  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1243 17:46:41.647488  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1244 17:46:41.655655  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64

 1245 17:46:41.664329  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem

 1246 17:46:41.672254  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1247 17:46:41.676918  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1248 17:46:41.681249  Root Device assign_resources, bus 0 link: 0

 1249 17:46:41.683908  Done setting resources.

 1250 17:46:41.690247  Show resources in subtree (Root Device)...After assigning values.

 1251 17:46:41.694707   Root Device child on link 0 CPU_CLUSTER: 0

 1252 17:46:41.699338    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1253 17:46:41.700439     APIC: 00

 1254 17:46:41.701033     APIC: 02

 1255 17:46:41.705983    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1256 17:46:41.715852    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1257 17:46:41.727043    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1258 17:46:41.728050     PCI: 00:00.0

 1259 17:46:41.738087     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1260 17:46:41.747309     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1261 17:46:41.756786     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1262 17:46:41.766112     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1263 17:46:41.775626     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1264 17:46:41.784477     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1265 17:46:41.793948     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1266 17:46:41.802555     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1267 17:46:41.812274     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1268 17:46:41.822098     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1269 17:46:41.831434     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1270 17:46:41.841427     PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1271 17:46:41.850202     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1272 17:46:41.859407     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1273 17:46:41.860616     PCI: 00:02.0

 1274 17:46:41.871620     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1275 17:46:41.882620     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1276 17:46:41.891844     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1277 17:46:41.893077     PCI: 00:04.0

 1278 17:46:41.903300     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1279 17:46:41.905380     PCI: 00:08.0

 1280 17:46:41.915739     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1281 17:46:41.917392     PCI: 00:12.0

 1282 17:46:41.927473     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1283 17:46:41.931049     PCI: 00:14.0 child on link 0 USB0 port 0

 1284 17:46:41.942119     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1285 17:46:41.946828      USB0 port 0 child on link 0 USB2 port 0

 1286 17:46:41.948575       USB2 port 0

 1287 17:46:41.950343       USB2 port 1

 1288 17:46:41.951957       USB2 port 2

 1289 17:46:41.953704       USB2 port 4

 1290 17:46:41.955411       USB2 port 5

 1291 17:46:41.956987       USB2 port 6

 1292 17:46:41.958739       USB2 port 7

 1293 17:46:41.960530       USB2 port 8

 1294 17:46:41.962285       USB2 port 9

 1295 17:46:41.964096       USB3 port 0

 1296 17:46:41.965450       USB3 port 1

 1297 17:46:41.966983       USB3 port 2

 1298 17:46:41.969388       USB3 port 3

 1299 17:46:41.970998       USB3 port 4

 1300 17:46:41.972712     PCI: 00:14.2

 1301 17:46:41.982889     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1302 17:46:41.993487     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1303 17:46:41.995081     PCI: 00:14.3

 1304 17:46:42.005607     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1305 17:46:42.009732     PCI: 00:15.0 child on link 0 I2C: 01:10

 1306 17:46:42.019772     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1307 17:46:42.021607      I2C: 01:10

 1308 17:46:42.022816      I2C: 01:10

 1309 17:46:42.024677      I2C: 01:34

 1310 17:46:42.029086     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1311 17:46:42.039011     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1312 17:46:42.040686      I2C: 02:2c

 1313 17:46:42.042401     PCI: 00:16.0

 1314 17:46:42.052876     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1315 17:46:42.054585     PCI: 00:17.0

 1316 17:46:42.064817     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1317 17:46:42.074364     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14

 1318 17:46:42.083677     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1319 17:46:42.092654     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1320 17:46:42.101810     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1321 17:46:42.112102     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24

 1322 17:46:42.116293     PCI: 00:19.0 child on link 0 I2C: 03:50

 1323 17:46:42.126703     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10

 1324 17:46:42.136937     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1325 17:46:42.138705      I2C: 03:50

 1326 17:46:42.140437     PCI: 00:19.2

 1327 17:46:42.151535     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1328 17:46:42.161769     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18

 1329 17:46:42.165936     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1330 17:46:42.175282     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1331 17:46:42.185619     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1332 17:46:42.195524     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1333 17:46:42.197864      PCI: 01:00.0

 1334 17:46:42.207593      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1335 17:46:42.212334     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1336 17:46:42.221395     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1337 17:46:42.231716     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1338 17:46:42.241364     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1339 17:46:42.243259      PCI: 02:00.0

 1340 17:46:42.254146      PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10

 1341 17:46:42.258711     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1342 17:46:42.267241     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1343 17:46:42.276041     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1344 17:46:42.277795      PNP: 0c09.0

 1345 17:46:42.286671      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1346 17:46:42.294986      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1347 17:46:42.303456      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1348 17:46:42.305202     PCI: 00:1f.3

 1349 17:46:42.315669     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1350 17:46:42.325698     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1351 17:46:42.327455     PCI: 00:1f.4

 1352 17:46:42.336908     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1353 17:46:42.346798     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10

 1354 17:46:42.348482     PCI: 00:1f.5

 1355 17:46:42.358274     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10

 1356 17:46:42.360338     PCI: 00:1f.6

 1357 17:46:42.370797     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1358 17:46:42.373383  Done allocating resources.

 1359 17:46:42.379199  BS: BS_DEV_RESOURCES times (us): entry 0 run 2491417 exit 13

 1360 17:46:42.382637  Enabling resources...

 1361 17:46:42.386311  PCI: 00:00.0 subsystem <- 1028/3e35

 1362 17:46:42.389474  PCI: 00:00.0 cmd <- 06

 1363 17:46:42.393230  PCI: 00:02.0 subsystem <- 1028/3ea1

 1364 17:46:42.394985  PCI: 00:02.0 cmd <- 03

 1365 17:46:42.399332  PCI: 00:04.0 subsystem <- 1028/1903

 1366 17:46:42.401599  PCI: 00:04.0 cmd <- 02

 1367 17:46:42.404512  PCI: 00:08.0 cmd <- 06

 1368 17:46:42.408520  PCI: 00:12.0 subsystem <- 1028/9df9

 1369 17:46:42.410357  PCI: 00:12.0 cmd <- 02

 1370 17:46:42.414552  PCI: 00:14.0 subsystem <- 1028/9ded

 1371 17:46:42.416930  PCI: 00:14.0 cmd <- 02

 1372 17:46:42.419841  PCI: 00:14.2 cmd <- 02

 1373 17:46:42.423312  PCI: 00:14.3 subsystem <- 1028/9df0

 1374 17:46:42.425669  PCI: 00:14.3 cmd <- 02

 1375 17:46:42.429328  PCI: 00:15.0 subsystem <- 1028/9de8

 1376 17:46:42.432146  PCI: 00:15.0 cmd <- 02

 1377 17:46:42.435837  PCI: 00:15.1 subsystem <- 1028/9de9

 1378 17:46:42.438661  PCI: 00:15.1 cmd <- 02

 1379 17:46:42.442192  PCI: 00:16.0 subsystem <- 1028/9de0

 1380 17:46:42.444412  PCI: 00:16.0 cmd <- 02

 1381 17:46:42.448429  PCI: 00:17.0 subsystem <- 1028/9dd3

 1382 17:46:42.450577  PCI: 00:17.0 cmd <- 03

 1383 17:46:42.454633  PCI: 00:19.0 subsystem <- 1028/9dc5

 1384 17:46:42.456912  PCI: 00:19.0 cmd <- 06

 1385 17:46:42.461021  PCI: 00:19.2 subsystem <- 1028/9dc7

 1386 17:46:42.463354  PCI: 00:19.2 cmd <- 06

 1387 17:46:42.466845  PCI: 00:1c.0 bridge ctrl <- 0003

 1388 17:46:42.470182  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1389 17:46:42.473748  Capability: type 0x10 @ 0x40

 1390 17:46:42.476602  Capability: type 0x05 @ 0x80

 1391 17:46:42.479321  Capability: type 0x0d @ 0x90

 1392 17:46:42.481598  PCI: 00:1c.0 cmd <- 06

 1393 17:46:42.484976  PCI: 00:1d.0 bridge ctrl <- 0003

 1394 17:46:42.488349  PCI: 00:1d.0 subsystem <- 1028/9db4

 1395 17:46:42.491896  Capability: type 0x10 @ 0x40

 1396 17:46:42.494691  Capability: type 0x05 @ 0x80

 1397 17:46:42.497611  Capability: type 0x0d @ 0x90

 1398 17:46:42.499841  PCI: 00:1d.0 cmd <- 06

 1399 17:46:42.503759  PCI: 00:1f.0 subsystem <- 1028/9d84

 1400 17:46:42.505861  PCI: 00:1f.0 cmd <- 407

 1401 17:46:42.510318  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1402 17:46:42.512044  PCI: 00:1f.3 cmd <- 02

 1403 17:46:42.516693  PCI: 00:1f.4 subsystem <- 1028/9da3

 1404 17:46:42.518895  PCI: 00:1f.4 cmd <- 03

 1405 17:46:42.523105  PCI: 00:1f.5 subsystem <- 1028/9da4

 1406 17:46:42.525627  PCI: 00:1f.5 cmd <- 406

 1407 17:46:42.529118  PCI: 00:1f.6 subsystem <- 1028/15be

 1408 17:46:42.531464  PCI: 00:1f.6 cmd <- 02

 1409 17:46:42.542080  PCI: 01:00.0 cmd <- 02

 1410 17:46:42.545122  PCI: 02:00.0 cmd <- 02

 1411 17:46:42.547626  done.

 1412 17:46:42.552904  BS: BS_DEV_ENABLE times (us): entry 390 run 167118 exit 0

 1413 17:46:42.555781  Initializing devices...

 1414 17:46:42.558016  Root Device init ...

 1415 17:46:42.561897  Root Device init finished in 2138 usecs

 1416 17:46:42.564468  CPU_CLUSTER: 0 init ...

 1417 17:46:42.569099  CPU_CLUSTER: 0 init finished in 2429 usecs

 1418 17:46:42.572563  PCI: 00:00.0 init ...

 1419 17:46:42.575488  CPU TDP: 15 Watts

 1420 17:46:42.577773  CPU PL2 = 51 Watts

 1421 17:46:42.581161  PCI: 00:00.0 init finished in 7037 usecs

 1422 17:46:42.584796  PCI: 00:02.0 init ...

 1423 17:46:42.588736  PCI: 00:02.0 init finished in 2236 usecs

 1424 17:46:42.591365  PCI: 00:04.0 init ...

 1425 17:46:42.595397  PCI: 00:04.0 init finished in 2235 usecs

 1426 17:46:42.598164  PCI: 00:08.0 init ...

 1427 17:46:42.601624  PCI: 00:08.0 init finished in 2235 usecs

 1428 17:46:42.603974  PCI: 00:12.0 init ...

 1429 17:46:42.608477  PCI: 00:12.0 init finished in 2236 usecs

 1430 17:46:42.610685  PCI: 00:14.0 init ...

 1431 17:46:42.615608  PCI: 00:14.0 init finished in 2236 usecs

 1432 17:46:42.617707  PCI: 00:14.2 init ...

 1433 17:46:42.622087  PCI: 00:14.2 init finished in 2235 usecs

 1434 17:46:42.624288  PCI: 00:14.3 init ...

 1435 17:46:42.628319  PCI: 00:14.3 init finished in 2241 usecs

 1436 17:46:42.631198  PCI: 00:15.0 init ...

 1437 17:46:42.634959  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1438 17:46:42.639036  PCI: 00:15.0 init finished in 5932 usecs

 1439 17:46:42.641952  PCI: 00:15.1 init ...

 1440 17:46:42.645617  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1441 17:46:42.649337  PCI: 00:15.1 init finished in 5933 usecs

 1442 17:46:42.652181  PCI: 00:16.0 init ...

 1443 17:46:42.656352  PCI: 00:16.0 init finished in 2236 usecs

 1444 17:46:42.659143  PCI: 00:19.0 init ...

 1445 17:46:42.662635  DW I2C bus 4 at 0xd134a000 (400 KHz)

 1446 17:46:42.667224  PCI: 00:19.0 init finished in 5934 usecs

 1447 17:46:42.670203  PCI: 00:1c.0 init ...

 1448 17:46:42.673224  Initializing PCH PCIe bridge.

 1449 17:46:42.677169  PCI: 00:1c.0 init finished in 5240 usecs

 1450 17:46:42.680019  PCI: 00:1d.0 init ...

 1451 17:46:42.682882  Initializing PCH PCIe bridge.

 1452 17:46:42.686510  PCI: 00:1d.0 init finished in 5248 usecs

 1453 17:46:42.689341  PCI: 00:1f.0 init ...

 1454 17:46:42.694079  IOAPIC: Initializing IOAPIC at 0xfec00000

 1455 17:46:42.697967  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1456 17:46:42.700076  IOAPIC: ID = 0x02

 1457 17:46:42.702931  IOAPIC: Dumping registers

 1458 17:46:42.704691    reg 0x0000: 0x02000000

 1459 17:46:42.708133    reg 0x0001: 0x00770020

 1460 17:46:42.710502    reg 0x0002: 0x00000000

 1461 17:46:42.715115  PCI: 00:1f.0 init finished in 23322 usecs

 1462 17:46:42.717567  PCI: 00:1f.3 init ...

 1463 17:46:42.722647  HDA: codec_mask = 05

 1464 17:46:42.725050  HDA: Initializing codec #2

 1465 17:46:42.727938  HDA: codec viddid: 8086280b

 1466 17:46:42.731476  HDA: No verb table entry found

 1467 17:46:42.733958  HDA: Initializing codec #0

 1468 17:46:42.736495  HDA: codec viddid: 10ec0236

 1469 17:46:42.743856  HDA: verb loaded.

 1470 17:46:42.747979  PCI: 00:1f.3 init finished in 28837 usecs

 1471 17:46:42.750920  PCI: 00:1f.4 init ...

 1472 17:46:42.755077  PCI: 00:1f.4 init finished in 2245 usecs

 1473 17:46:42.758020  PCI: 00:1f.6 init ...

 1474 17:46:42.762020  PCI: 00:1f.6 init finished in 2227 usecs

 1475 17:46:42.773304  PCI: 01:00.0 init ...

 1476 17:46:42.776544  PCI: 01:00.0 init finished in 2235 usecs

 1477 17:46:42.779523  PCI: 02:00.0 init ...

 1478 17:46:42.783594  PCI: 02:00.0 init finished in 2236 usecs

 1479 17:46:42.785992  PNP: 0c09.0 init ...

 1480 17:46:42.790253  EC Label      : 00.00.20

 1481 17:46:42.794474  EC Revision   : 9ca674bba

 1482 17:46:42.797891  EC Model Num  : 08B9

 1483 17:46:42.801080  EC Build Date : 05/10/19

 1484 17:46:42.810205  PNP: 0c09.0 init finished in 21751 usecs

 1485 17:46:42.812627  Devices initialized

 1486 17:46:42.815498  Show all devs... After init.

 1487 17:46:42.817799  Root Device: enabled 1

 1488 17:46:42.820918  CPU_CLUSTER: 0: enabled 1

 1489 17:46:42.822895  DOMAIN: 0000: enabled 1

 1490 17:46:42.824670  APIC: 00: enabled 1

 1491 17:46:42.827036  PCI: 00:00.0: enabled 1

 1492 17:46:42.829876  PCI: 00:02.0: enabled 1

 1493 17:46:42.832081  PCI: 00:04.0: enabled 1

 1494 17:46:42.834448  PCI: 00:12.0: enabled 1

 1495 17:46:42.836833  PCI: 00:12.5: enabled 0

 1496 17:46:42.839319  PCI: 00:12.6: enabled 0

 1497 17:46:42.841913  PCI: 00:13.0: enabled 0

 1498 17:46:42.844105  PCI: 00:14.0: enabled 1

 1499 17:46:42.846765  PCI: 00:14.1: enabled 0

 1500 17:46:42.848966  PCI: 00:14.3: enabled 1

 1501 17:46:42.851623  PCI: 00:14.5: enabled 0

 1502 17:46:42.853576  PCI: 00:15.0: enabled 1

 1503 17:46:42.856591  PCI: 00:15.1: enabled 1

 1504 17:46:42.858934  PCI: 00:15.2: enabled 0

 1505 17:46:42.861337  PCI: 00:15.3: enabled 0

 1506 17:46:42.863763  PCI: 00:16.0: enabled 1

 1507 17:46:42.866206  PCI: 00:16.1: enabled 0

 1508 17:46:42.868588  PCI: 00:16.2: enabled 0

 1509 17:46:42.870490  PCI: 00:16.3: enabled 0

 1510 17:46:42.873414  PCI: 00:16.4: enabled 0

 1511 17:46:42.875815  PCI: 00:16.5: enabled 0

 1512 17:46:42.878249  PCI: 00:17.0: enabled 1

 1513 17:46:42.880591  PCI: 00:19.0: enabled 1

 1514 17:46:42.883434  PCI: 00:19.1: enabled 0

 1515 17:46:42.885608  PCI: 00:19.2: enabled 1

 1516 17:46:42.887247  PCI: 00:1a.0: enabled 0

 1517 17:46:42.890551  PCI: 00:1c.0: enabled 1

 1518 17:46:42.892510  PCI: 00:1c.1: enabled 0

 1519 17:46:42.895146  PCI: 00:1c.2: enabled 0

 1520 17:46:42.898083  PCI: 00:1c.3: enabled 0

 1521 17:46:42.900409  PCI: 00:1c.4: enabled 0

 1522 17:46:42.902630  PCI: 00:1c.5: enabled 0

 1523 17:46:42.904931  PCI: 00:1c.6: enabled 0

 1524 17:46:42.907776  PCI: 00:1c.7: enabled 0

 1525 17:46:42.909975  PCI: 00:1d.0: enabled 1

 1526 17:46:42.911655  PCI: 00:1d.1: enabled 0

 1527 17:46:42.914436  PCI: 00:1d.2: enabled 0

 1528 17:46:42.917435  PCI: 00:1d.3: enabled 0

 1529 17:46:42.919808  PCI: 00:1d.4: enabled 0

 1530 17:46:42.922166  PCI: 00:1e.0: enabled 0

 1531 17:46:42.924657  PCI: 00:1e.1: enabled 0

 1532 17:46:42.927031  PCI: 00:1e.2: enabled 0

 1533 17:46:42.929500  PCI: 00:1e.3: enabled 0

 1534 17:46:42.931913  PCI: 00:1f.0: enabled 1

 1535 17:46:42.934243  PCI: 00:1f.1: enabled 0

 1536 17:46:42.936705  PCI: 00:1f.2: enabled 0

 1537 17:46:42.938935  PCI: 00:1f.3: enabled 1

 1538 17:46:42.941282  PCI: 00:1f.4: enabled 1

 1539 17:46:42.944184  PCI: 00:1f.5: enabled 1

 1540 17:46:42.946614  PCI: 00:1f.6: enabled 1

 1541 17:46:42.949040  USB0 port 0: enabled 1

 1542 17:46:42.950239  I2C: 01:10: enabled 1

 1543 17:46:42.953120  I2C: 01:10: enabled 1

 1544 17:46:42.954850  I2C: 01:34: enabled 1

 1545 17:46:42.957650  I2C: 02:2c: enabled 1

 1546 17:46:42.959891  I2C: 03:50: enabled 1

 1547 17:46:42.962030  PNP: 0c09.0: enabled 1

 1548 17:46:42.964279  USB2 port 0: enabled 1

 1549 17:46:42.966481  USB2 port 1: enabled 1

 1550 17:46:42.968514  USB2 port 2: enabled 1

 1551 17:46:42.971485  USB2 port 4: enabled 1

 1552 17:46:42.974201  USB2 port 5: enabled 1

 1553 17:46:42.975979  USB2 port 6: enabled 1

 1554 17:46:42.978344  USB2 port 7: enabled 1

 1555 17:46:42.980717  USB2 port 8: enabled 1

 1556 17:46:42.983090  USB2 port 9: enabled 1

 1557 17:46:42.985412  USB3 port 0: enabled 1

 1558 17:46:42.987744  USB3 port 1: enabled 1

 1559 17:46:42.989640  USB3 port 2: enabled 1

 1560 17:46:42.992627  USB3 port 3: enabled 1

 1561 17:46:42.994834  USB3 port 4: enabled 1

 1562 17:46:42.996884  APIC: 02: enabled 1

 1563 17:46:42.999099  PCI: 00:08.0: enabled 1

 1564 17:46:43.001320  PCI: 00:14.2: enabled 1

 1565 17:46:43.004131  PCI: 01:00.0: enabled 1

 1566 17:46:43.006490  PCI: 02:00.0: enabled 1

 1567 17:46:43.011867  Disabling ACPI via APMC:

 1568 17:46:43.013591  done.

 1569 17:46:43.018775  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1570 17:46:43.022704  ELOG: NV offset 0x1bf0000 size 0x4000

 1571 17:46:43.030188  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1572 17:46:43.036699  ELOG: Event(17) added with size 13 at 2023-10-09 17:46:22 UTC

 1573 17:46:43.042315  ELOG: Event(92) added with size 9 at 2023-10-09 17:46:22 UTC

 1574 17:46:43.049526  ELOG: Event(93) added with size 9 at 2023-10-09 17:46:22 UTC

 1575 17:46:43.055650  ELOG: Event(9A) added with size 9 at 2023-10-09 17:46:22 UTC

 1576 17:46:43.061049  ELOG: Event(9E) added with size 10 at 2023-10-09 17:46:22 UTC

 1577 17:46:43.067855  ELOG: Event(9F) added with size 14 at 2023-10-09 17:46:22 UTC

 1578 17:46:43.073899  BS: BS_DEV_INIT times (us): entry 0 run 453555 exit 61270

 1579 17:46:43.080631  ELOG: Event(A1) added with size 10 at 2023-10-09 17:46:22 UTC

 1580 17:46:43.087513  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1581 17:46:43.094593  ELOG: Event(A0) added with size 9 at 2023-10-09 17:46:22 UTC

 1582 17:46:43.099067  elog_add_boot_reason: Logged dev mode boot

 1583 17:46:43.100720  Finalize devices...

 1584 17:46:43.103033  PCI: 00:17.0 final

 1585 17:46:43.104628  Devices finalized

 1586 17:46:43.109632  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1587 17:46:43.115597  BS: BS_POST_DEVICE times (us): entry 24773 run 5935 exit 5367

 1588 17:46:43.121853  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0

 1589 17:46:43.129785  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1590 17:46:43.134510  disable_unused_touchscreen: Disable ACPI0C50

 1591 17:46:43.139287  disable_unused_touchscreen: Enable ELAN900C

 1592 17:46:43.142275  CBFS @ 1d00000 size 300000

 1593 17:46:43.147563  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1594 17:46:43.151995  CBFS: Locating 'fallback/dsdt.aml'

 1595 17:46:43.155791  CBFS: Found @ offset 10b200 size 4448

 1596 17:46:43.158295  CBFS @ 1d00000 size 300000

 1597 17:46:43.164757  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1598 17:46:43.168350  CBFS: Locating 'fallback/slic'

 1599 17:46:43.173099  CBFS: 'fallback/slic' not found.

 1600 17:46:43.177250  ACPI: Writing ACPI tables at 89c0f000.

 1601 17:46:43.179118  ACPI:    * FACS

 1602 17:46:43.180319  ACPI:    * DSDT

 1603 17:46:43.183533  Ramoops buffer: 0x100000@0x89b0e000.

 1604 17:46:43.189079  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1605 17:46:43.193732  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1606 17:46:43.197237  ACPI:    * FADT

 1607 17:46:43.198309  SCI is IRQ9

 1608 17:46:43.201679  ACPI: added table 1/32, length now 40

 1609 17:46:43.204039  ACPI:     * SSDT

 1610 17:46:43.207369  Found 1 CPU(s) with 2 core(s) each.

 1611 17:46:43.211423  Error: Could not locate 'wifi_sar' in VPD.

 1612 17:46:43.215870  Error: failed from getting SAR limits!

 1613 17:46:43.219129  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1614 17:46:43.223655  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1615 17:46:43.227737  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1616 17:46:43.232009  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1617 17:46:43.237441  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1618 17:46:43.242180  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1619 17:46:43.247387  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1620 17:46:43.251533  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1621 17:46:43.256928  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1622 17:46:43.263366  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1623 17:46:43.269220  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1624 17:46:43.275169  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1625 17:46:43.279952  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1626 17:46:43.284628  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1627 17:46:43.289342  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1628 17:46:43.294737  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1629 17:46:43.299557  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1630 17:46:43.304875  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1631 17:46:43.311489  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1632 17:46:43.317184  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1633 17:46:43.323015  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1634 17:46:43.327723  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1635 17:46:43.331250  ACPI: added table 2/32, length now 44

 1636 17:46:43.332869  ACPI:    * MCFG

 1637 17:46:43.336683  ACPI: added table 3/32, length now 48

 1638 17:46:43.338330  ACPI:    * TPM2

 1639 17:46:43.341311  TPM2 log created at 89afe000

 1640 17:46:43.345058  ACPI: added table 4/32, length now 52

 1641 17:46:43.346686  ACPI:    * MADT

 1642 17:46:43.347750  SCI is IRQ9

 1643 17:46:43.351377  ACPI: added table 5/32, length now 56

 1644 17:46:43.353307  current = 89c14720

 1645 17:46:43.356353  ACPI:    * IGD OpRegion

 1646 17:46:43.358280  GMA: Found VBT in CBFS

 1647 17:46:43.361588  GMA: Found valid VBT in CBFS

 1648 17:46:43.365036  ACPI: added table 6/32, length now 60

 1649 17:46:43.366328  ACPI:    * HPET

 1650 17:46:43.370837  ACPI: added table 7/32, length now 64

 1651 17:46:43.371980  ACPI: done.

 1652 17:46:43.374489  ACPI tables: 30672 bytes.

 1653 17:46:43.377563  smbios_write_tables: 89afd000

 1654 17:46:43.379797  recv_ec_data: 0x01

 1655 17:46:43.382060  Create SMBIOS type 17

 1656 17:46:43.384973  PCI: 00:14.3 (Intel WiFi)

 1657 17:46:43.387493  SMBIOS tables: 707 bytes.

 1658 17:46:43.391469  Writing table forward entry at 0x00000500

 1659 17:46:43.397526  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1660 17:46:43.401048  Writing coreboot table at 0x89c33000

 1661 17:46:43.407478   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1662 17:46:43.411424   1. 0000000000001000-000000000009ffff: RAM

 1663 17:46:43.415989   2. 00000000000a0000-00000000000fffff: RESERVED

 1664 17:46:43.420764   3. 0000000000100000-0000000089afcfff: RAM

 1665 17:46:43.426629   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1666 17:46:43.431102   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1667 17:46:43.436963   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1668 17:46:43.442162   7. 000000008a000000-000000008f7fffff: RESERVED

 1669 17:46:43.446538   8. 00000000e0000000-00000000efffffff: RESERVED

 1670 17:46:43.451410   9. 00000000fc000000-00000000fc000fff: RESERVED

 1671 17:46:43.455802  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1672 17:46:43.460288  11. 00000000fed10000-00000000fed17fff: RESERVED

 1673 17:46:43.465858  12. 00000000fed80000-00000000fed83fff: RESERVED

 1674 17:46:43.470617  13. 00000000feda0000-00000000feda1fff: RESERVED

 1675 17:46:43.474340  14. 0000000100000000-000000016e7fffff: RAM

 1676 17:46:43.478556  Graphics framebuffer located at 0xc0000000

 1677 17:46:43.481897  Passing 6 GPIOs to payload:

 1678 17:46:43.487038              NAME |       PORT | POLARITY |     VALUE

 1679 17:46:43.492418     write protect | 0x000000dc |     high |      high

 1680 17:46:43.497597          recovery | 0x000000d5 |      low |      high

 1681 17:46:43.502929               lid |  undefined |     high |      high

 1682 17:46:43.508319             power |  undefined |     high |       low

 1683 17:46:43.513603             oprom |  undefined |     high |       low

 1684 17:46:43.518293          EC in RW |  undefined |     high |       low

 1685 17:46:43.521109  recv_ec_data: 0x01

 1686 17:46:43.521760  SKU ID: 3

 1687 17:46:43.524298  CBFS @ 1d00000 size 300000

 1688 17:46:43.530808  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1689 17:46:43.536816  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum d657

 1690 17:46:43.540158  coreboot table: 1484 bytes.

 1691 17:46:43.543256  IMD ROOT    0. 89fff000 00001000

 1692 17:46:43.546765  IMD SMALL   1. 89ffe000 00001000

 1693 17:46:43.550282  FSP MEMORY  2. 89d0e000 002f0000

 1694 17:46:43.553025  CONSOLE     3. 89cee000 00020000

 1695 17:46:43.556346  TIME STAMP  4. 89ced000 00000910

 1696 17:46:43.559843  VBOOT WORK  5. 89cea000 00003000

 1697 17:46:43.563572  VBOOT       6. 89ce9000 00000c0c

 1698 17:46:43.566518  MRC DATA    7. 89ce7000 000018f0

 1699 17:46:43.569990  ROMSTG STCK 8. 89ce6000 00000400

 1700 17:46:43.572744  AFTER CAR   9. 89cdc000 0000a000

 1701 17:46:43.576309  RAMSTAGE   10. 89c80000 0005c000

 1702 17:46:43.579180  REFCODE    11. 89c4b000 00035000

 1703 17:46:43.583115  SMM BACKUP 12. 89c3b000 00010000

 1704 17:46:43.586064  COREBOOT   13. 89c33000 00008000

 1705 17:46:43.589619  ACPI       14. 89c0f000 00024000

 1706 17:46:43.592402  ACPI GNVS  15. 89c0e000 00001000

 1707 17:46:43.596407  RAMOOPS    16. 89b0e000 00100000

 1708 17:46:43.599116  TPM2 TCGLOG17. 89afe000 00010000

 1709 17:46:43.602972  SMBIOS     18. 89afd000 00000800

 1710 17:46:43.604841  IMD small region:

 1711 17:46:43.608319    IMD ROOT    0. 89ffec00 00000400

 1712 17:46:43.611334    FSP RUNTIME 1. 89ffebe0 00000004

 1713 17:46:43.615392    POWER STATE 2. 89ffeba0 00000040

 1714 17:46:43.618903    ROMSTAGE    3. 89ffeb80 00000004

 1715 17:46:43.622271    MEM INFO    4. 89ffe9c0 000001a9

 1716 17:46:43.625861    VPD         5. 89ffe960 00000058

 1717 17:46:43.629375    COREBOOTFWD 6. 89ffe920 00000028

 1718 17:46:43.632413  MTRR: Physical address space:

 1719 17:46:43.638231  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1720 17:46:43.644452  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1721 17:46:43.651139  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1722 17:46:43.656897  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1723 17:46:43.663573  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1724 17:46:43.669868  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1725 17:46:43.675832  0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6

 1726 17:46:43.679935  MTRR: Fixed MSR 0x250 0x0606060606060606

 1727 17:46:43.684126  MTRR: Fixed MSR 0x258 0x0606060606060606

 1728 17:46:43.688270  MTRR: Fixed MSR 0x259 0x0000000000000000

 1729 17:46:43.692362  MTRR: Fixed MSR 0x268 0x0606060606060606

 1730 17:46:43.696406  MTRR: Fixed MSR 0x269 0x0606060606060606

 1731 17:46:43.700476  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1732 17:46:43.704245  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1733 17:46:43.708383  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1734 17:46:43.712030  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1735 17:46:43.716417  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1736 17:46:43.721119  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1737 17:46:43.723442  call enable_fixed_mtrr()

 1738 17:46:43.727308  CPU physical address size: 39 bits

 1739 17:46:43.731429  MTRR: default type WB/UC MTRR counts: 7/6.

 1740 17:46:43.735004  MTRR: UC selected as default type.

 1741 17:46:43.741071  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1742 17:46:43.747613  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1743 17:46:43.753361  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1744 17:46:43.759892  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1745 17:46:43.765844  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1746 17:46:43.772069  MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6

 1747 17:46:43.773199  

 1748 17:46:43.774292  MTRR check

 1749 17:46:43.776652  Fixed MTRRs   : Enabled

 1750 17:46:43.778954  Variable MTRRs: Enabled

 1751 17:46:43.779037  

 1752 17:46:43.783561  MTRR: Fixed MSR 0x250 0x0606060606060606

 1753 17:46:43.787331  MTRR: Fixed MSR 0x258 0x0606060606060606

 1754 17:46:43.790911  MTRR: Fixed MSR 0x259 0x0000000000000000

 1755 17:46:43.795545  MTRR: Fixed MSR 0x268 0x0606060606060606

 1756 17:46:43.799574  MTRR: Fixed MSR 0x269 0x0606060606060606

 1757 17:46:43.803581  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1758 17:46:43.807296  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1759 17:46:43.811990  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1760 17:46:43.816366  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1761 17:46:43.819767  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1762 17:46:43.824229  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1763 17:46:43.830763  BS: BS_WRITE_TABLES times (us): entry 17197 run 490312 exit 150010

 1764 17:46:43.832987  call enable_fixed_mtrr()

 1765 17:46:43.835927  CBFS @ 1d00000 size 300000

 1766 17:46:43.842538  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1767 17:46:43.845569  CPU physical address size: 39 bits

 1768 17:46:43.848560  CBFS: Locating 'fallback/payload'

 1769 17:46:43.853751  CBFS: Found @ offset 1cf4c0 size 3a954

 1770 17:46:43.858386  Checking segment from ROM address 0xffecf4f8

 1771 17:46:43.862434  Checking segment from ROM address 0xffecf514

 1772 17:46:43.867206  Loading segment from ROM address 0xffecf4f8

 1773 17:46:43.869042    code (compression=0)

 1774 17:46:43.877724    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1775 17:46:43.886831  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1776 17:46:43.888686  it's not compressed!

 1777 17:46:43.970648  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 1778 17:46:43.977838  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 1779 17:46:43.986476  Loading segment from ROM address 0xffecf514

 1780 17:46:43.988706    Entry Point 0x30100018

 1781 17:46:43.990331  Loaded segments

 1782 17:46:44.000818  Finalizing chipset.

 1783 17:46:44.002622  Finalizing SMM.

 1784 17:46:44.008872  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 159311 exit 12539

 1785 17:46:44.012495  mp_park_aps done after 0 msecs.

 1786 17:46:44.016314  Jumping to boot code at 30100018(89c33000)

 1787 17:46:44.024417  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 1788 17:46:44.024518  

 1789 17:46:44.025570  

 1790 17:46:44.025668  

 1791 17:46:44.028399  Starting depthcharge on sarien...

 1792 17:46:44.028913  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 1793 17:46:44.029027  start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
 1794 17:46:44.029122  Setting prompt string to ['sarien:']
 1795 17:46:44.029212  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
 1796 17:46:44.029379  

 1797 17:46:44.036110  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1798 17:46:44.036235  

 1799 17:46:44.043939  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1800 17:46:44.044059  

 1801 17:46:44.051449  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 1802 17:46:44.051896  

 1803 17:46:44.053577  BIOS MMAP details:

 1804 17:46:44.053838  

 1805 17:46:44.056250  IFD Base Offset  : 0x1000000

 1806 17:46:44.056332  

 1807 17:46:44.059325  IFD End Offset   : 0x2000000

 1808 17:46:44.059786  

 1809 17:46:44.062303  MMAP Size        : 0x1000000

 1810 17:46:44.062386  

 1811 17:46:44.065699  MMAP Start       : 0xff000000

 1812 17:46:44.066364  

 1813 17:46:44.072138  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 1814 17:46:44.075125  

 1815 17:46:44.079372  Failed to find BH720 with VID/DID 1217:8620

 1816 17:46:44.079919  

 1817 17:46:44.083798  New NVMe Controller 0x3214e050 @ 00:1d:04

 1818 17:46:44.083890  

 1819 17:46:44.088140  New NVMe Controller 0x3214e118 @ 00:1d:00

 1820 17:46:44.088712  

 1821 17:46:44.093129  The GBB signature is at 0x30000014 and is:  24 47 42 42

 1822 17:46:44.097857  

 1823 17:46:44.100112  Wipe memory regions:

 1824 17:46:44.100286  

 1825 17:46:44.103528  	[0x00000000001000, 0x000000000a0000)

 1826 17:46:44.103719  

 1827 17:46:44.107119  	[0x00000000100000, 0x00000030000000)

 1828 17:46:44.189732  

 1829 17:46:44.193662  	[0x00000032751910, 0x00000089afd000)

 1830 17:46:44.344105  

 1831 17:46:44.347485  	[0x00000100000000, 0x0000016e800000)

 1832 17:46:45.117470  

 1833 17:46:45.119617  R8152: Initializing

 1834 17:46:45.120212  

 1835 17:46:45.122475  Version 6 (ocp_data = 5c30)

 1836 17:46:45.123255  

 1837 17:46:45.125752  R8152: Done initializing

 1838 17:46:45.126245  

 1839 17:46:45.127293  Adding net device

 1840 17:46:45.127985  

 1841 17:46:45.133423  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 1842 17:46:45.134226  

 1843 17:46:45.134640  

 1844 17:46:45.135098  

 1845 17:46:45.135960  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1847 17:46:45.237021  sarien: tftpboot 192.168.201.1 11712555/tftp-deploy-djbleuol/kernel/bzImage 11712555/tftp-deploy-djbleuol/kernel/cmdline 11712555/tftp-deploy-djbleuol/ramdisk/ramdisk.cpio.gz

 1848 17:46:45.237238  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1849 17:46:45.237387  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
 1850 17:46:45.238358  tftpboot 192.168.201.1 11712555/tftp-deploy-djbleuol/kernel/bzImage 11712555/tftp-deploy-djbleuol/kernel/cmdline 11712555/tftp-deploy-djbleuol/ramdisk/ramdisk.cpio.gz

 1851 17:46:45.238539  

 1852 17:46:45.280392  Waiting for link

 1853 17:46:45.440344  

 1854 17:46:45.441521  done.

 1855 17:46:45.441915  

 1856 17:46:45.443373  MAC: 00:24:32:30:77:df

 1857 17:46:45.443879  

 1858 17:46:45.446831  Sending DHCP discover... done.

 1859 17:46:45.447250  

 1860 17:46:45.449212  Waiting for reply... done.

 1861 17:46:45.449630  

 1862 17:46:45.452544  Sending DHCP request... done.

 1863 17:46:45.453035  

 1864 17:46:45.456168  Waiting for reply... done.

 1865 17:46:45.457123  

 1866 17:46:45.458845  My ip is 192.168.201.221

 1867 17:46:45.459383  

 1868 17:46:45.462472  The DHCP server ip is 192.168.201.1

 1869 17:46:45.462589  

 1870 17:46:45.466837  TFTP server IP predefined by user: 192.168.201.1

 1871 17:46:45.467435  

 1872 17:46:45.474540  Bootfile predefined by user: 11712555/tftp-deploy-djbleuol/kernel/bzImage

 1873 17:46:45.474661  

 1874 17:46:45.478032  Sending tftp read request... done.

 1875 17:46:45.478147  

 1876 17:46:45.481588  Waiting for the transfer... 

 1877 17:46:45.482127  

 1878 17:46:46.062876  00000000 ################################################################

 1879 17:46:46.064103  

 1880 17:46:46.669309  00080000 ################################################################

 1881 17:46:46.669911  

 1882 17:46:47.232262  00100000 ################################################################

 1883 17:46:47.232798  

 1884 17:46:47.721851  00180000 ################################################################

 1885 17:46:47.722369  

 1886 17:46:48.222699  00200000 ################################################################

 1887 17:46:48.223949  

 1888 17:46:48.734706  00280000 ################################################################

 1889 17:46:48.735295  

 1890 17:46:49.204225  00300000 ################################################################

 1891 17:46:49.204819  

 1892 17:46:49.738639  00380000 ################################################################

 1893 17:46:49.739230  

 1894 17:46:50.277094  00400000 ################################################################

 1895 17:46:50.278326  

 1896 17:46:50.865432  00480000 ################################################################

 1897 17:46:50.866383  

 1898 17:46:51.400481  00500000 ################################################################

 1899 17:46:51.401088  

 1900 17:46:51.929621  00580000 ################################################################

 1901 17:46:51.930282  

 1902 17:46:52.478839  00600000 ################################################################

 1903 17:46:52.479371  

 1904 17:46:52.991876  00680000 ################################################################

 1905 17:46:52.992531  

 1906 17:46:53.490587  00700000 ################################################################

 1907 17:46:53.491114  

 1908 17:46:54.044087  00780000 ################################################################

 1909 17:46:54.045094  

 1910 17:46:54.155032  00800000 ############# done.

 1911 17:46:54.155197  

 1912 17:46:54.159124  The bootfile was 8490896 bytes long.

 1913 17:46:54.159224  

 1914 17:46:54.161969  Sending tftp read request... done.

 1915 17:46:54.162618  

 1916 17:46:54.165068  Waiting for the transfer... 

 1917 17:46:54.165528  

 1918 17:46:54.742565  00000000 ################################################################

 1919 17:46:54.743792  

 1920 17:46:55.288968  00080000 ################################################################

 1921 17:46:55.289557  

 1922 17:46:55.781051  00100000 ################################################################

 1923 17:46:55.781642  

 1924 17:46:56.270055  00180000 ################################################################

 1925 17:46:56.271023  

 1926 17:46:56.790113  00200000 ################################################################

 1927 17:46:56.790533  

 1928 17:46:57.310504  00280000 ################################################################

 1929 17:46:57.312201  

 1930 17:46:57.824683  00300000 ################################################################

 1931 17:46:57.825168  

 1932 17:46:58.316566  00380000 ################################################################

 1933 17:46:58.316985  

 1934 17:46:58.807813  00400000 ################################################################

 1935 17:46:58.808406  

 1936 17:46:59.357691  00480000 ################################################################

 1937 17:46:59.358369  

 1938 17:46:59.935387  00500000 ############################################################### done.

 1939 17:46:59.935929  

 1940 17:46:59.938807  Sending tftp read request... done.

 1941 17:46:59.939244  

 1942 17:46:59.942591  Waiting for the transfer... 

 1943 17:46:59.943064  

 1944 17:46:59.944312  00000000 # done.

 1945 17:46:59.944767  

 1946 17:46:59.952805  Command line loaded dynamically from TFTP file: 11712555/tftp-deploy-djbleuol/kernel/cmdline

 1947 17:46:59.953338  

 1948 17:46:59.982060  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712555/extract-nfsrootfs-07tgk53u,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 1949 17:46:59.984893  

 1950 17:46:59.988748  Shutting down all USB controllers.

 1951 17:46:59.989299  

 1952 17:46:59.991448  Removing current net device

 1953 17:46:59.996629  

 1954 17:46:59.999346  EC: exit firmware mode

 1955 17:47:00.000123  

 1956 17:47:00.002062  Finalizing coreboot

 1957 17:47:00.002245  

 1958 17:47:00.007701  Exiting depthcharge with code 4 at timestamp: 22883485

 1959 17:47:00.007794  

 1960 17:47:00.008200  

 1961 17:47:00.009887  end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
 1962 17:47:00.010031  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 1963 17:47:00.010149  Setting prompt string to ['Linux version [0-9]']
 1964 17:47:00.010259  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1965 17:47:00.010366  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1966 17:47:00.010647  Starting kernel ...

 1967 17:47:00.010756  

 1968 17:47:00.010856  

 1970 17:51:16.011176  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 1972 17:51:16.012240  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 1974 17:51:16.013026  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1977 17:51:16.014299  end: 2 depthcharge-action (duration 00:05:00) [common]
 1979 17:51:16.015454  Cleaning after the job
 1980 17:51:16.015566  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/ramdisk
 1981 17:51:16.016579  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/kernel
 1982 17:51:16.017937  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/nfsrootfs
 1983 17:51:16.099502  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712555/tftp-deploy-djbleuol/modules
 1984 17:51:16.100298  start: 5.1 power-off (timeout 00:00:30) [common]
 1985 17:51:16.100500  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
 1986 17:51:21.244122  >> Command sent successfully.

 1987 17:51:21.249997  Returned 0 in 5 seconds
 1988 17:51:21.350776  end: 5.1 power-off (duration 00:00:05) [common]
 1990 17:51:21.352239  start: 5.2 read-feedback (timeout 00:09:55) [common]
 1991 17:51:21.353511  Listened to connection for namespace 'common' for up to 1s
 1992 17:51:22.354011  Finalising connection for namespace 'common'
 1993 17:51:22.354226  Disconnecting from shell: Finalise
 1994 17:51:22.354321  

 1995 17:51:22.454645  end: 5.2 read-feedback (duration 00:00:01) [common]
 1996 17:51:22.454820  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712555
 1997 17:51:22.821041  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712555
 1998 17:51:22.821284  JobError: Your job cannot terminate cleanly.