Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 18:02:13.744212 lava-dispatcher, installed at version: 2023.08
2 18:02:13.744422 start: 0 validate
3 18:02:13.744553 Start time: 2023-10-09 18:02:13.744545+00:00 (UTC)
4 18:02:13.744669 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:02:13.744802 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 18:02:14.015226 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:02:14.015958 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:02:14.278338 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:02:14.279063 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:02:14.549327 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:02:14.550092 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:02:14.827487 validate duration: 1.08
14 18:02:14.828914 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:02:14.829418 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:02:14.829863 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:02:14.830466 Not decompressing ramdisk as can be used compressed.
18 18:02:14.830906 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/initrd.cpio.gz
19 18:02:14.831239 saving as /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/ramdisk/initrd.cpio.gz
20 18:02:14.831571 total size: 6134299 (5 MB)
21 18:02:14.840309 progress 0 % (0 MB)
22 18:02:14.849588 progress 5 % (0 MB)
23 18:02:14.857469 progress 10 % (0 MB)
24 18:02:14.863182 progress 15 % (0 MB)
25 18:02:14.867382 progress 20 % (1 MB)
26 18:02:14.870999 progress 25 % (1 MB)
27 18:02:14.874290 progress 30 % (1 MB)
28 18:02:14.877133 progress 35 % (2 MB)
29 18:02:14.879647 progress 40 % (2 MB)
30 18:02:14.882269 progress 45 % (2 MB)
31 18:02:14.884476 progress 50 % (2 MB)
32 18:02:14.886611 progress 55 % (3 MB)
33 18:02:14.888759 progress 60 % (3 MB)
34 18:02:14.890708 progress 65 % (3 MB)
35 18:02:14.892706 progress 70 % (4 MB)
36 18:02:14.894497 progress 75 % (4 MB)
37 18:02:14.896266 progress 80 % (4 MB)
38 18:02:14.898070 progress 85 % (5 MB)
39 18:02:14.899666 progress 90 % (5 MB)
40 18:02:14.901284 progress 95 % (5 MB)
41 18:02:14.903021 progress 100 % (5 MB)
42 18:02:14.903156 5 MB downloaded in 0.07 s (81.70 MB/s)
43 18:02:14.903314 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:02:14.903563 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:02:14.903651 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:02:14.903747 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:02:14.903890 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:02:14.903965 saving as /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/kernel/bzImage
50 18:02:14.904027 total size: 8490896 (8 MB)
51 18:02:14.904089 No compression specified
52 18:02:14.905226 progress 0 % (0 MB)
53 18:02:14.907383 progress 5 % (0 MB)
54 18:02:14.909666 progress 10 % (0 MB)
55 18:02:14.911949 progress 15 % (1 MB)
56 18:02:14.914238 progress 20 % (1 MB)
57 18:02:14.916561 progress 25 % (2 MB)
58 18:02:14.918866 progress 30 % (2 MB)
59 18:02:14.921194 progress 35 % (2 MB)
60 18:02:14.923465 progress 40 % (3 MB)
61 18:02:14.925800 progress 45 % (3 MB)
62 18:02:14.928052 progress 50 % (4 MB)
63 18:02:14.930272 progress 55 % (4 MB)
64 18:02:14.932555 progress 60 % (4 MB)
65 18:02:14.934767 progress 65 % (5 MB)
66 18:02:14.936996 progress 70 % (5 MB)
67 18:02:14.939225 progress 75 % (6 MB)
68 18:02:14.941506 progress 80 % (6 MB)
69 18:02:14.943773 progress 85 % (6 MB)
70 18:02:14.946012 progress 90 % (7 MB)
71 18:02:14.948284 progress 95 % (7 MB)
72 18:02:14.950578 progress 100 % (8 MB)
73 18:02:14.950698 8 MB downloaded in 0.05 s (173.52 MB/s)
74 18:02:14.950842 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:02:14.951071 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:02:14.951158 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:02:14.951246 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:02:14.951383 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 18:02:14.951452 saving as /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/nfsrootfs/full.rootfs.tar
81 18:02:14.951513 total size: 202699900 (193 MB)
82 18:02:14.951579 Using unxz to decompress xz
83 18:02:14.957669 progress 0 % (0 MB)
84 18:02:15.537378 progress 5 % (9 MB)
85 18:02:16.073484 progress 10 % (19 MB)
86 18:02:16.654324 progress 15 % (29 MB)
87 18:02:16.940095 progress 20 % (38 MB)
88 18:02:17.508594 progress 25 % (48 MB)
89 18:02:18.081504 progress 30 % (58 MB)
90 18:02:18.645961 progress 35 % (67 MB)
91 18:02:19.197571 progress 40 % (77 MB)
92 18:02:19.773030 progress 45 % (87 MB)
93 18:02:20.384691 progress 50 % (96 MB)
94 18:02:20.987287 progress 55 % (106 MB)
95 18:02:21.684914 progress 60 % (116 MB)
96 18:02:22.109420 progress 65 % (125 MB)
97 18:02:22.201571 progress 70 % (135 MB)
98 18:02:22.345668 progress 75 % (145 MB)
99 18:02:22.426907 progress 80 % (154 MB)
100 18:02:22.480260 progress 85 % (164 MB)
101 18:02:22.570443 progress 90 % (174 MB)
102 18:02:22.931835 progress 95 % (183 MB)
103 18:02:23.538274 progress 100 % (193 MB)
104 18:02:23.545221 193 MB downloaded in 8.59 s (22.49 MB/s)
105 18:02:23.545474 end: 1.3.1 http-download (duration 00:00:09) [common]
107 18:02:23.545738 end: 1.3 download-retry (duration 00:00:09) [common]
108 18:02:23.545829 start: 1.4 download-retry (timeout 00:09:51) [common]
109 18:02:23.545916 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 18:02:23.546073 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:02:23.546144 saving as /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/modules/modules.tar
112 18:02:23.546205 total size: 250928 (0 MB)
113 18:02:23.546268 Using unxz to decompress xz
114 18:02:23.550495 progress 13 % (0 MB)
115 18:02:23.550951 progress 26 % (0 MB)
116 18:02:23.551192 progress 39 % (0 MB)
117 18:02:23.552905 progress 52 % (0 MB)
118 18:02:23.555083 progress 65 % (0 MB)
119 18:02:23.557115 progress 78 % (0 MB)
120 18:02:23.559161 progress 91 % (0 MB)
121 18:02:23.561020 progress 100 % (0 MB)
122 18:02:23.567053 0 MB downloaded in 0.02 s (11.48 MB/s)
123 18:02:23.567292 end: 1.4.1 http-download (duration 00:00:00) [common]
125 18:02:23.567558 end: 1.4 download-retry (duration 00:00:00) [common]
126 18:02:23.567655 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 18:02:23.567808 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 18:02:27.216746 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712609/extract-nfsrootfs-7yzqqfvd
129 18:02:27.216956 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 18:02:27.217058 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 18:02:27.217232 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn
132 18:02:27.217369 makedir: /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin
133 18:02:27.217476 makedir: /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/tests
134 18:02:27.217577 makedir: /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/results
135 18:02:27.217681 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-add-keys
136 18:02:27.217827 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-add-sources
137 18:02:27.217957 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-background-process-start
138 18:02:27.218085 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-background-process-stop
139 18:02:27.218212 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-common-functions
140 18:02:27.218336 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-echo-ipv4
141 18:02:27.218463 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-install-packages
142 18:02:27.218588 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-installed-packages
143 18:02:27.218711 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-os-build
144 18:02:27.218835 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-probe-channel
145 18:02:27.218966 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-probe-ip
146 18:02:27.219092 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-target-ip
147 18:02:27.219216 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-target-mac
148 18:02:27.219339 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-target-storage
149 18:02:27.219465 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-case
150 18:02:27.219591 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-event
151 18:02:27.219714 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-feedback
152 18:02:27.220002 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-raise
153 18:02:27.220129 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-reference
154 18:02:27.220256 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-runner
155 18:02:27.220381 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-set
156 18:02:27.220508 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-test-shell
157 18:02:27.220640 Updating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-add-keys (debian)
158 18:02:27.220792 Updating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-add-sources (debian)
159 18:02:27.220934 Updating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-install-packages (debian)
160 18:02:27.221073 Updating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-installed-packages (debian)
161 18:02:27.221211 Updating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/bin/lava-os-build (debian)
162 18:02:27.221332 Creating /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/environment
163 18:02:27.221428 LAVA metadata
164 18:02:27.221498 - LAVA_JOB_ID=11712609
165 18:02:27.221561 - LAVA_DISPATCHER_IP=192.168.201.1
166 18:02:27.221661 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 18:02:27.221728 skipped lava-vland-overlay
168 18:02:27.221801 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 18:02:27.221879 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 18:02:27.221940 skipped lava-multinode-overlay
171 18:02:27.222011 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 18:02:27.222102 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 18:02:27.222174 Loading test definitions
174 18:02:27.222261 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 18:02:27.222329 Using /lava-11712609 at stage 0
176 18:02:27.222622 uuid=11712609_1.5.2.3.1 testdef=None
177 18:02:27.222709 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 18:02:27.222792 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 18:02:27.223240 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 18:02:27.223457 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 18:02:27.224061 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 18:02:27.224287 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 18:02:27.224826 runner path: /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/0/tests/0_timesync-off test_uuid 11712609_1.5.2.3.1
186 18:02:27.224982 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 18:02:27.225202 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 18:02:27.225274 Using /lava-11712609 at stage 0
190 18:02:27.225399 Fetching tests from https://github.com/kernelci/test-definitions.git
191 18:02:27.225477 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/0/tests/1_kselftest-alsa'
192 18:02:30.197545 Running '/usr/bin/git checkout kernelci.org
193 18:02:30.322608 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 18:02:30.323372 uuid=11712609_1.5.2.3.5 testdef=None
195 18:02:30.323537 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
197 18:02:30.323828 start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
198 18:02:30.324591 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 18:02:30.324823 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
201 18:02:30.325796 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 18:02:30.326040 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
204 18:02:30.327030 runner path: /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/0/tests/1_kselftest-alsa test_uuid 11712609_1.5.2.3.5
205 18:02:30.327123 BOARD='asus-cx9400-volteer'
206 18:02:30.327197 BRANCH='cip'
207 18:02:30.327256 SKIPFILE='/dev/null'
208 18:02:30.327316 SKIP_INSTALL='True'
209 18:02:30.327396 TESTPROG_URL='None'
210 18:02:30.327459 TST_CASENAME=''
211 18:02:30.327513 TST_CMDFILES='alsa'
212 18:02:30.327664 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 18:02:30.327968 Creating lava-test-runner.conf files
215 18:02:30.328033 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712609/lava-overlay-zaa724cn/lava-11712609/0 for stage 0
216 18:02:30.328139 - 0_timesync-off
217 18:02:30.328235 - 1_kselftest-alsa
218 18:02:30.328341 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
219 18:02:30.328428 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
220 18:02:37.876179 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 18:02:37.876367 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
222 18:02:37.876461 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 18:02:37.876561 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
224 18:02:37.876651 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
225 18:02:38.037779 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 18:02:38.038176 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
227 18:02:38.038298 extracting modules file /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712609/extract-nfsrootfs-7yzqqfvd
228 18:02:38.052456 extracting modules file /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712609/extract-overlay-ramdisk-ia0480hn/ramdisk
229 18:02:38.069508 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 18:02:38.069632 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
231 18:02:38.069724 [common] Applying overlay to NFS
232 18:02:38.069792 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712609/compress-overlay-uqaahcqi/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712609/extract-nfsrootfs-7yzqqfvd
233 18:02:39.051414 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 18:02:39.051585 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
235 18:02:39.051682 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 18:02:39.051859 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
237 18:02:39.051944 Building ramdisk /var/lib/lava/dispatcher/tmp/11712609/extract-overlay-ramdisk-ia0480hn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712609/extract-overlay-ramdisk-ia0480hn/ramdisk
238 18:02:39.143783 >> 30670 blocks
239 18:02:39.764958 rename /var/lib/lava/dispatcher/tmp/11712609/extract-overlay-ramdisk-ia0480hn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/ramdisk/ramdisk.cpio.gz
240 18:02:39.765414 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 18:02:39.765532 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
242 18:02:39.765632 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
243 18:02:39.765726 No mkimage arch provided, not using FIT.
244 18:02:39.765812 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 18:02:39.765894 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 18:02:39.765998 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
247 18:02:39.766085 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
248 18:02:39.766162 No LXC device requested
249 18:02:39.766242 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 18:02:39.766328 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
251 18:02:39.766406 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 18:02:39.766476 Checking files for TFTP limit of 4294967296 bytes.
253 18:02:39.766889 end: 1 tftp-deploy (duration 00:00:25) [common]
254 18:02:39.766996 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 18:02:39.767086 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 18:02:39.767205 substitutions:
257 18:02:39.767275 - {DTB}: None
258 18:02:39.767337 - {INITRD}: 11712609/tftp-deploy-8vsrz_ay/ramdisk/ramdisk.cpio.gz
259 18:02:39.767395 - {KERNEL}: 11712609/tftp-deploy-8vsrz_ay/kernel/bzImage
260 18:02:39.767449 - {LAVA_MAC}: None
261 18:02:39.767504 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712609/extract-nfsrootfs-7yzqqfvd
262 18:02:39.767559 - {NFS_SERVER_IP}: 192.168.201.1
263 18:02:39.767613 - {PRESEED_CONFIG}: None
264 18:02:39.767666 - {PRESEED_LOCAL}: None
265 18:02:39.767718 - {RAMDISK}: 11712609/tftp-deploy-8vsrz_ay/ramdisk/ramdisk.cpio.gz
266 18:02:39.767815 - {ROOT_PART}: None
267 18:02:39.767867 - {ROOT}: None
268 18:02:39.767919 - {SERVER_IP}: 192.168.201.1
269 18:02:39.767971 - {TEE}: None
270 18:02:39.768022 Parsed boot commands:
271 18:02:39.768074 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 18:02:39.768287 Parsed boot commands: tftpboot 192.168.201.1 11712609/tftp-deploy-8vsrz_ay/kernel/bzImage 11712609/tftp-deploy-8vsrz_ay/kernel/cmdline 11712609/tftp-deploy-8vsrz_ay/ramdisk/ramdisk.cpio.gz
273 18:02:39.768372 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 18:02:39.768458 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 18:02:39.768548 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 18:02:39.768633 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 18:02:39.768704 Not connected, no need to disconnect.
278 18:02:39.768775 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 18:02:39.768856 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 18:02:39.768920 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-8'
281 18:02:39.772963 Setting prompt string to ['lava-test: # ']
282 18:02:39.773319 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 18:02:39.773424 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 18:02:39.773535 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 18:02:39.773628 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 18:02:39.773837 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
287 18:02:44.908973 >> Command sent successfully.
288 18:02:44.911976 Returned 0 in 5 seconds
289 18:02:45.012761 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 18:02:45.014156 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 18:02:45.014684 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 18:02:45.015140 Setting prompt string to 'Starting depthcharge on Voema...'
294 18:02:45.015532 Changing prompt to 'Starting depthcharge on Voema...'
295 18:02:45.015952 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
296 18:02:45.017170 [Enter `^Ec?' for help]
297 18:02:46.615819
298 18:02:46.616486
299 18:02:46.625373 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
300 18:02:46.631797 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
301 18:02:46.635229 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
302 18:02:46.638747 CPU: AES supported, TXT NOT supported, VT supported
303 18:02:46.644806 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
304 18:02:46.651824 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
305 18:02:46.654848 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
306 18:02:46.658225 VBOOT: Loading verstage.
307 18:02:46.664465 FMAP: Found "FLASH" version 1.1 at 0x1804000.
308 18:02:46.668167 FMAP: base = 0x0 size = 0x2000000 #areas = 32
309 18:02:46.674579 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
310 18:02:46.681168 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
311 18:02:46.687663 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
312 18:02:46.691283
313 18:02:46.691714
314 18:02:46.701740 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
315 18:02:46.716063 Probing TPM: . done!
316 18:02:46.719466 TPM ready after 0 ms
317 18:02:46.722668 Connected to device vid:did:rid of 1ae0:0028:00
318 18:02:46.733985 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
319 18:02:46.740293 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 18:02:46.743839 Initialized TPM device CR50 revision 0
321 18:02:46.795631 tlcl_send_startup: Startup return code is 0
322 18:02:46.796242 TPM: setup succeeded
323 18:02:46.809520 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
324 18:02:46.823941 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
325 18:02:46.836698 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
326 18:02:46.846703 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
327 18:02:46.850578 Chrome EC: UHEPI supported
328 18:02:46.853314 Phase 1
329 18:02:46.857035 FMAP: area GBB found @ 1805000 (458752 bytes)
330 18:02:46.866583 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 18:02:46.873088 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 18:02:46.879493 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
333 18:02:46.886463 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
334 18:02:46.889464 Recovery requested (1009000e)
335 18:02:46.898361 TPM: Extending digest for VBOOT: boot mode into PCR 0
336 18:02:46.904503 tlcl_extend: response is 0
337 18:02:46.911155 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
338 18:02:46.921228 tlcl_extend: response is 0
339 18:02:46.927910 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 18:02:46.934844 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
341 18:02:46.940961 BS: verstage times (exec / console): total (unknown) / 142 ms
342 18:02:46.941530
343 18:02:46.941908
344 18:02:46.954492 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
345 18:02:46.961187 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
346 18:02:46.963882 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 18:02:46.970908 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
348 18:02:46.974251 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 18:02:46.977492 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
350 18:02:46.980872 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
351 18:02:46.983939 TCO_STS: 0000 0000
352 18:02:46.987522 GEN_PMCON: d0015038 00002200
353 18:02:46.990653 GBLRST_CAUSE: 00000000 00000000
354 18:02:46.993915 HPR_CAUSE0: 00000000
355 18:02:46.994556 prev_sleep_state 5
356 18:02:46.996960 Boot Count incremented to 23416
357 18:02:47.003801 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 18:02:47.010425 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 18:02:47.020273 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 18:02:47.026842 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
361 18:02:47.030282 Chrome EC: UHEPI supported
362 18:02:47.037139 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 18:02:47.048386 Probing TPM: done!
364 18:02:47.055225 Connected to device vid:did:rid of 1ae0:0028:00
365 18:02:47.065910 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
366 18:02:47.073147 Initialized TPM device CR50 revision 0
367 18:02:47.083491 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
368 18:02:47.089669 MRC: Hash idx 0x100b comparison successful.
369 18:02:47.092886 MRC cache found, size faa8
370 18:02:47.093578 bootmode is set to: 2
371 18:02:47.096505 SPD index = 0
372 18:02:47.103169 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
373 18:02:47.106026 SPD: module type is LPDDR4X
374 18:02:47.109505 SPD: module part number is MT53E512M64D4NW-046
375 18:02:47.116257 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
376 18:02:47.122656 SPD: device width 16 bits, bus width 16 bits
377 18:02:47.125818 SPD: module size is 1024 MB (per channel)
378 18:02:47.561174 CBMEM:
379 18:02:47.564552 IMD: root @ 0x76fff000 254 entries.
380 18:02:47.567832 IMD: root @ 0x76ffec00 62 entries.
381 18:02:47.571122 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
382 18:02:47.577588 FMAP: area RW_VPD found @ f35000 (8192 bytes)
383 18:02:47.580804 External stage cache:
384 18:02:47.584590 IMD: root @ 0x7b3ff000 254 entries.
385 18:02:47.587526 IMD: root @ 0x7b3fec00 62 entries.
386 18:02:47.603285 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
387 18:02:47.610112 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
388 18:02:47.616561 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
389 18:02:47.630500 MRC: 'RECOVERY_MRC_CACHE' does not need update.
390 18:02:47.636829 cse_lite: Skip switching to RW in the recovery path
391 18:02:47.637397 8 DIMMs found
392 18:02:47.637799 SMM Memory Map
393 18:02:47.640800 SMRAM : 0x7b000000 0x800000
394 18:02:47.644992 Subregion 0: 0x7b000000 0x200000
395 18:02:47.647757 Subregion 1: 0x7b200000 0x200000
396 18:02:47.651290 Subregion 2: 0x7b400000 0x400000
397 18:02:47.654608 top_of_ram = 0x77000000
398 18:02:47.661091 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
399 18:02:47.664050 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
400 18:02:47.671213 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
401 18:02:47.677346 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 18:02:47.684209 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
403 18:02:47.690441 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
404 18:02:47.700998 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
405 18:02:47.703803 Processing 211 relocs. Offset value of 0x74c0b000
406 18:02:47.713518 BS: romstage times (exec / console): total (unknown) / 277 ms
407 18:02:47.719683
408 18:02:47.720345
409 18:02:47.728889 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
410 18:02:47.732361 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 18:02:47.742386 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 18:02:47.748874 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 18:02:47.755510 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
414 18:02:47.761889 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
415 18:02:47.809554 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
416 18:02:47.815798 Processing 5008 relocs. Offset value of 0x75d98000
417 18:02:47.819313 BS: postcar times (exec / console): total (unknown) / 59 ms
418 18:02:47.822720
419 18:02:47.823299
420 18:02:47.832098 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
421 18:02:47.832579 Normal boot
422 18:02:47.836025 FW_CONFIG value is 0x804c02
423 18:02:47.838773 PCI: 00:07.0 disabled by fw_config
424 18:02:47.842344 PCI: 00:07.1 disabled by fw_config
425 18:02:47.845809 PCI: 00:0d.2 disabled by fw_config
426 18:02:47.852208 PCI: 00:1c.7 disabled by fw_config
427 18:02:47.855577 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
428 18:02:47.862630 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
429 18:02:47.868792 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
430 18:02:47.871903 GENERIC: 0.0 disabled by fw_config
431 18:02:47.875208 GENERIC: 1.0 disabled by fw_config
432 18:02:47.878496 fw_config match found: DB_USB=USB3_ACTIVE
433 18:02:47.881501 fw_config match found: DB_USB=USB3_ACTIVE
434 18:02:47.885277 fw_config match found: DB_USB=USB3_ACTIVE
435 18:02:47.891701 fw_config match found: DB_USB=USB3_ACTIVE
436 18:02:47.894616 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 18:02:47.904790 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 18:02:47.911429 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 18:02:47.918461 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
440 18:02:47.924700 microcode: sig=0x806c1 pf=0x80 revision=0x86
441 18:02:47.927720 microcode: Update skipped, already up-to-date
442 18:02:47.934698 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
443 18:02:47.962870 Detected 4 core, 8 thread CPU.
444 18:02:47.965699 Setting up SMI for CPU
445 18:02:47.969457 IED base = 0x7b400000
446 18:02:47.972451 IED size = 0x00400000
447 18:02:47.972936 Will perform SMM setup.
448 18:02:47.979094 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
449 18:02:47.985668 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
450 18:02:47.992848 Processing 16 relocs. Offset value of 0x00030000
451 18:02:47.995459 Attempting to start 7 APs
452 18:02:47.998852 Waiting for 10ms after sending INIT.
453 18:02:48.015622 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
454 18:02:48.016288 done.
455 18:02:48.018375 AP: slot 3 apic_id 4.
456 18:02:48.021501 AP: slot 7 apic_id 5.
457 18:02:48.021979 AP: slot 6 apic_id 2.
458 18:02:48.028103 Waiting for 2nd SIPI to complete...done.
459 18:02:48.028688 AP: slot 2 apic_id 3.
460 18:02:48.031464 AP: slot 4 apic_id 7.
461 18:02:48.035161 AP: slot 5 apic_id 6.
462 18:02:48.041398 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
463 18:02:48.047928 Processing 13 relocs. Offset value of 0x00038000
464 18:02:48.051060 Unable to locate Global NVS
465 18:02:48.057763 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
466 18:02:48.060657 Installing permanent SMM handler to 0x7b000000
467 18:02:48.070430 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
468 18:02:48.073756 Processing 794 relocs. Offset value of 0x7b010000
469 18:02:48.083945 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
470 18:02:48.087255 Processing 13 relocs. Offset value of 0x7b008000
471 18:02:48.093638 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
472 18:02:48.100271 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
473 18:02:48.107171 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
474 18:02:48.110382 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
475 18:02:48.116620 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
476 18:02:48.123254 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
477 18:02:48.129604 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
478 18:02:48.133175 Unable to locate Global NVS
479 18:02:48.139822 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
480 18:02:48.142912 Clearing SMI status registers
481 18:02:48.146207 SMI_STS: PM1
482 18:02:48.146742 PM1_STS: PWRBTN
483 18:02:48.155977 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
484 18:02:48.156540 In relocation handler: CPU 0
485 18:02:48.162858 New SMBASE=0x7b000000 IEDBASE=0x7b400000
486 18:02:48.166004 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 18:02:48.169185 Relocation complete.
488 18:02:48.175545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
489 18:02:48.179252 In relocation handler: CPU 1
490 18:02:48.182519 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
491 18:02:48.185529 Relocation complete.
492 18:02:48.192712 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 18:02:48.195206 In relocation handler: CPU 7
494 18:02:48.198628 New SMBASE=0x7affe400 IEDBASE=0x7b400000
495 18:02:48.201951 Relocation complete.
496 18:02:48.208421 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
497 18:02:48.212257 In relocation handler: CPU 3
498 18:02:48.215006 New SMBASE=0x7afff400 IEDBASE=0x7b400000
499 18:02:48.221678 Writing SMRR. base = 0x7b000006, mask=0xff800c00
500 18:02:48.222239 Relocation complete.
501 18:02:48.231442 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
502 18:02:48.234546 In relocation handler: CPU 5
503 18:02:48.238232 New SMBASE=0x7affec00 IEDBASE=0x7b400000
504 18:02:48.241532 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 18:02:48.244581 Relocation complete.
506 18:02:48.251382 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
507 18:02:48.254618 In relocation handler: CPU 4
508 18:02:48.257658 New SMBASE=0x7afff000 IEDBASE=0x7b400000
509 18:02:48.261229 Relocation complete.
510 18:02:48.267801 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
511 18:02:48.271569 In relocation handler: CPU 2
512 18:02:48.274028 New SMBASE=0x7afff800 IEDBASE=0x7b400000
513 18:02:48.277466 Relocation complete.
514 18:02:48.284080 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
515 18:02:48.287638 In relocation handler: CPU 6
516 18:02:48.290734 New SMBASE=0x7affe800 IEDBASE=0x7b400000
517 18:02:48.297156 Writing SMRR. base = 0x7b000006, mask=0xff800c00
518 18:02:48.297642 Relocation complete.
519 18:02:48.300724 Initializing CPU #0
520 18:02:48.304508 CPU: vendor Intel device 806c1
521 18:02:48.308137 CPU: family 06, model 8c, stepping 01
522 18:02:48.311822 Clearing out pending MCEs
523 18:02:48.312295 Setting up local APIC...
524 18:02:48.315019 apic_id: 0x00 done.
525 18:02:48.318702 Turbo is available but hidden
526 18:02:48.321641 Turbo is available and visible
527 18:02:48.324881 microcode: Update skipped, already up-to-date
528 18:02:48.328189 CPU #0 initialized
529 18:02:48.331301 Initializing CPU #4
530 18:02:48.331773 Initializing CPU #5
531 18:02:48.334830 CPU: vendor Intel device 806c1
532 18:02:48.337906 CPU: family 06, model 8c, stepping 01
533 18:02:48.341870 CPU: vendor Intel device 806c1
534 18:02:48.348115 CPU: family 06, model 8c, stepping 01
535 18:02:48.348643 Clearing out pending MCEs
536 18:02:48.351195 Clearing out pending MCEs
537 18:02:48.354746 Setting up local APIC...
538 18:02:48.358184 Initializing CPU #2
539 18:02:48.358759 Initializing CPU #6
540 18:02:48.361487 CPU: vendor Intel device 806c1
541 18:02:48.364637 CPU: family 06, model 8c, stepping 01
542 18:02:48.368118 CPU: vendor Intel device 806c1
543 18:02:48.371063 CPU: family 06, model 8c, stepping 01
544 18:02:48.374458 Clearing out pending MCEs
545 18:02:48.377530 Clearing out pending MCEs
546 18:02:48.380833 Setting up local APIC...
547 18:02:48.381312 Initializing CPU #7
548 18:02:48.384116 Initializing CPU #3
549 18:02:48.387682 CPU: vendor Intel device 806c1
550 18:02:48.391165 CPU: family 06, model 8c, stepping 01
551 18:02:48.394736 CPU: vendor Intel device 806c1
552 18:02:48.397598 CPU: family 06, model 8c, stepping 01
553 18:02:48.401012 Clearing out pending MCEs
554 18:02:48.404089 Clearing out pending MCEs
555 18:02:48.407484 Setting up local APIC...
556 18:02:48.408071 apic_id: 0x03 done.
557 18:02:48.410678 Setting up local APIC...
558 18:02:48.414198 Setting up local APIC...
559 18:02:48.417532 Setting up local APIC...
560 18:02:48.418102 apic_id: 0x05 done.
561 18:02:48.420443 apic_id: 0x04 done.
562 18:02:48.423595 microcode: Update skipped, already up-to-date
563 18:02:48.430664 microcode: Update skipped, already up-to-date
564 18:02:48.431296 CPU #7 initialized
565 18:02:48.433747 apic_id: 0x02 done.
566 18:02:48.436878 microcode: Update skipped, already up-to-date
567 18:02:48.443486 microcode: Update skipped, already up-to-date
568 18:02:48.444281 CPU #2 initialized
569 18:02:48.446615 CPU #6 initialized
570 18:02:48.447090 apic_id: 0x06 done.
571 18:02:48.450254 apic_id: 0x07 done.
572 18:02:48.456744 microcode: Update skipped, already up-to-date
573 18:02:48.460033 microcode: Update skipped, already up-to-date
574 18:02:48.463343 CPU #5 initialized
575 18:02:48.463853 CPU #4 initialized
576 18:02:48.467334 Initializing CPU #1
577 18:02:48.468082 CPU #3 initialized
578 18:02:48.469916 CPU: vendor Intel device 806c1
579 18:02:48.473312 CPU: family 06, model 8c, stepping 01
580 18:02:48.476189 Clearing out pending MCEs
581 18:02:48.479346 Setting up local APIC...
582 18:02:48.482930 apic_id: 0x01 done.
583 18:02:48.486059 microcode: Update skipped, already up-to-date
584 18:02:48.489478 CPU #1 initialized
585 18:02:48.492908 bsp_do_flight_plan done after 462 msecs.
586 18:02:48.496123 CPU: frequency set to 4000 MHz
587 18:02:48.496601 Enabling SMIs.
588 18:02:48.502816 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
589 18:02:48.520063 SATAXPCIE1 indicates PCIe NVMe is present
590 18:02:48.523314 Probing TPM: done!
591 18:02:48.526581 Connected to device vid:did:rid of 1ae0:0028:00
592 18:02:48.537244 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
593 18:02:48.540288 Initialized TPM device CR50 revision 0
594 18:02:48.544402 Enabling S0i3.4
595 18:02:48.550845 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 18:02:48.553726 Found a VBT of 8704 bytes after decompression
597 18:02:48.560108 cse_lite: CSE RO boot. HybridStorageMode disabled
598 18:02:48.566911 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 18:02:48.642695 FSPS returned 0
600 18:02:48.646274 Executing Phase 1 of FspMultiPhaseSiInit
601 18:02:48.655780 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 18:02:48.658939 port C0 DISC req: usage 1 usb3 1 usb2 5
603 18:02:48.662661 Raw Buffer output 0 00000511
604 18:02:48.665212 Raw Buffer output 1 00000000
605 18:02:48.669270 pmc_send_ipc_cmd succeeded
606 18:02:48.676302 port C1 DISC req: usage 1 usb3 2 usb2 3
607 18:02:48.676801 Raw Buffer output 0 00000321
608 18:02:48.679424 Raw Buffer output 1 00000000
609 18:02:48.683759 pmc_send_ipc_cmd succeeded
610 18:02:48.688629 Detected 4 core, 8 thread CPU.
611 18:02:48.691914 Detected 4 core, 8 thread CPU.
612 18:02:48.926515 Display FSP Version Info HOB
613 18:02:48.930240 Reference Code - CPU = a.0.4c.31
614 18:02:48.933054 uCode Version = 0.0.0.86
615 18:02:48.936051 TXT ACM version = ff.ff.ff.ffff
616 18:02:48.939237 Reference Code - ME = a.0.4c.31
617 18:02:48.943253 MEBx version = 0.0.0.0
618 18:02:48.946035 ME Firmware Version = Consumer SKU
619 18:02:48.949612 Reference Code - PCH = a.0.4c.31
620 18:02:48.953006 PCH-CRID Status = Disabled
621 18:02:48.956294 PCH-CRID Original Value = ff.ff.ff.ffff
622 18:02:48.959769 PCH-CRID New Value = ff.ff.ff.ffff
623 18:02:48.962447 OPROM - RST - RAID = ff.ff.ff.ffff
624 18:02:48.966109 PCH Hsio Version = 4.0.0.0
625 18:02:48.968903 Reference Code - SA - System Agent = a.0.4c.31
626 18:02:48.972946 Reference Code - MRC = 2.0.0.1
627 18:02:48.975838 SA - PCIe Version = a.0.4c.31
628 18:02:48.979455 SA-CRID Status = Disabled
629 18:02:48.982379 SA-CRID Original Value = 0.0.0.1
630 18:02:48.985735 SA-CRID New Value = 0.0.0.1
631 18:02:48.988614 OPROM - VBIOS = ff.ff.ff.ffff
632 18:02:48.992210 IO Manageability Engine FW Version = 11.1.4.0
633 18:02:48.995685 PHY Build Version = 0.0.0.e0
634 18:02:48.998956 Thunderbolt(TM) FW Version = 0.0.0.0
635 18:02:49.005597 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
636 18:02:49.008675 ITSS IRQ Polarities Before:
637 18:02:49.011996 IPC0: 0xffffffff
638 18:02:49.012493 IPC1: 0xffffffff
639 18:02:49.014839 IPC2: 0xffffffff
640 18:02:49.015349 IPC3: 0xffffffff
641 18:02:49.018656 ITSS IRQ Polarities After:
642 18:02:49.021636 IPC0: 0xffffffff
643 18:02:49.022132 IPC1: 0xffffffff
644 18:02:49.024781 IPC2: 0xffffffff
645 18:02:49.025442 IPC3: 0xffffffff
646 18:02:49.028681 Found PCIe Root Port #9 at PCI: 00:1d.0.
647 18:02:49.041204 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
648 18:02:49.054685 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
649 18:02:49.064448 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
650 18:02:49.071024 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
651 18:02:49.074406 Enumerating buses...
652 18:02:49.077638 Show all devs... Before device enumeration.
653 18:02:49.080913 Root Device: enabled 1
654 18:02:49.084440 DOMAIN: 0000: enabled 1
655 18:02:49.087118 CPU_CLUSTER: 0: enabled 1
656 18:02:49.087615 PCI: 00:00.0: enabled 1
657 18:02:49.090661 PCI: 00:02.0: enabled 1
658 18:02:49.094227 PCI: 00:04.0: enabled 1
659 18:02:49.097708 PCI: 00:05.0: enabled 1
660 18:02:49.098160 PCI: 00:06.0: enabled 0
661 18:02:49.101356 PCI: 00:07.0: enabled 0
662 18:02:49.104439 PCI: 00:07.1: enabled 0
663 18:02:49.104876 PCI: 00:07.2: enabled 0
664 18:02:49.107231 PCI: 00:07.3: enabled 0
665 18:02:49.110293 PCI: 00:08.0: enabled 1
666 18:02:49.113442 PCI: 00:09.0: enabled 0
667 18:02:49.113878 PCI: 00:0a.0: enabled 0
668 18:02:49.117593 PCI: 00:0d.0: enabled 1
669 18:02:49.120281 PCI: 00:0d.1: enabled 0
670 18:02:49.123677 PCI: 00:0d.2: enabled 0
671 18:02:49.124157 PCI: 00:0d.3: enabled 0
672 18:02:49.126547 PCI: 00:0e.0: enabled 0
673 18:02:49.130185 PCI: 00:10.2: enabled 1
674 18:02:49.133856 PCI: 00:10.6: enabled 0
675 18:02:49.134447 PCI: 00:10.7: enabled 0
676 18:02:49.136852 PCI: 00:12.0: enabled 0
677 18:02:49.139881 PCI: 00:12.6: enabled 0
678 18:02:49.143576 PCI: 00:13.0: enabled 0
679 18:02:49.144062 PCI: 00:14.0: enabled 1
680 18:02:49.146611 PCI: 00:14.1: enabled 0
681 18:02:49.149673 PCI: 00:14.2: enabled 1
682 18:02:49.153398 PCI: 00:14.3: enabled 1
683 18:02:49.153960 PCI: 00:15.0: enabled 1
684 18:02:49.156772 PCI: 00:15.1: enabled 1
685 18:02:49.159941 PCI: 00:15.2: enabled 1
686 18:02:49.163106 PCI: 00:15.3: enabled 1
687 18:02:49.163555 PCI: 00:16.0: enabled 1
688 18:02:49.166788 PCI: 00:16.1: enabled 0
689 18:02:49.170002 PCI: 00:16.2: enabled 0
690 18:02:49.173425 PCI: 00:16.3: enabled 0
691 18:02:49.173959 PCI: 00:16.4: enabled 0
692 18:02:49.176798 PCI: 00:16.5: enabled 0
693 18:02:49.179530 PCI: 00:17.0: enabled 1
694 18:02:49.179992 PCI: 00:19.0: enabled 0
695 18:02:49.183171 PCI: 00:19.1: enabled 1
696 18:02:49.186408 PCI: 00:19.2: enabled 0
697 18:02:49.189222 PCI: 00:1c.0: enabled 1
698 18:02:49.189741 PCI: 00:1c.1: enabled 0
699 18:02:49.193011 PCI: 00:1c.2: enabled 0
700 18:02:49.195802 PCI: 00:1c.3: enabled 0
701 18:02:49.199265 PCI: 00:1c.4: enabled 0
702 18:02:49.199690 PCI: 00:1c.5: enabled 0
703 18:02:49.202576 PCI: 00:1c.6: enabled 1
704 18:02:49.206197 PCI: 00:1c.7: enabled 0
705 18:02:49.209068 PCI: 00:1d.0: enabled 1
706 18:02:49.209520 PCI: 00:1d.1: enabled 0
707 18:02:49.212460 PCI: 00:1d.2: enabled 1
708 18:02:49.215819 PCI: 00:1d.3: enabled 0
709 18:02:49.218886 PCI: 00:1e.0: enabled 1
710 18:02:49.219339 PCI: 00:1e.1: enabled 0
711 18:02:49.222305 PCI: 00:1e.2: enabled 1
712 18:02:49.226196 PCI: 00:1e.3: enabled 1
713 18:02:49.229064 PCI: 00:1f.0: enabled 1
714 18:02:49.229494 PCI: 00:1f.1: enabled 0
715 18:02:49.232137 PCI: 00:1f.2: enabled 1
716 18:02:49.235673 PCI: 00:1f.3: enabled 1
717 18:02:49.239347 PCI: 00:1f.4: enabled 0
718 18:02:49.239994 PCI: 00:1f.5: enabled 1
719 18:02:49.242413 PCI: 00:1f.6: enabled 0
720 18:02:49.245246 PCI: 00:1f.7: enabled 0
721 18:02:49.245676 APIC: 00: enabled 1
722 18:02:49.248844 GENERIC: 0.0: enabled 1
723 18:02:49.251686 GENERIC: 0.0: enabled 1
724 18:02:49.254928 GENERIC: 1.0: enabled 1
725 18:02:49.255409 GENERIC: 0.0: enabled 1
726 18:02:49.258577 GENERIC: 1.0: enabled 1
727 18:02:49.262234 USB0 port 0: enabled 1
728 18:02:49.265369 GENERIC: 0.0: enabled 1
729 18:02:49.265819 USB0 port 0: enabled 1
730 18:02:49.268563 GENERIC: 0.0: enabled 1
731 18:02:49.271507 I2C: 00:1a: enabled 1
732 18:02:49.272048 I2C: 00:31: enabled 1
733 18:02:49.275286 I2C: 00:32: enabled 1
734 18:02:49.278283 I2C: 00:10: enabled 1
735 18:02:49.278941 I2C: 00:15: enabled 1
736 18:02:49.282051 GENERIC: 0.0: enabled 0
737 18:02:49.284766 GENERIC: 1.0: enabled 0
738 18:02:49.288192 GENERIC: 0.0: enabled 1
739 18:02:49.288740 SPI: 00: enabled 1
740 18:02:49.291405 SPI: 00: enabled 1
741 18:02:49.294777 PNP: 0c09.0: enabled 1
742 18:02:49.295270 GENERIC: 0.0: enabled 1
743 18:02:49.298183 USB3 port 0: enabled 1
744 18:02:49.301085 USB3 port 1: enabled 1
745 18:02:49.304549 USB3 port 2: enabled 0
746 18:02:49.305148 USB3 port 3: enabled 0
747 18:02:49.307990 USB2 port 0: enabled 0
748 18:02:49.311224 USB2 port 1: enabled 1
749 18:02:49.311717 USB2 port 2: enabled 1
750 18:02:49.314500 USB2 port 3: enabled 0
751 18:02:49.317635 USB2 port 4: enabled 1
752 18:02:49.318235 USB2 port 5: enabled 0
753 18:02:49.321310 USB2 port 6: enabled 0
754 18:02:49.324498 USB2 port 7: enabled 0
755 18:02:49.327881 USB2 port 8: enabled 0
756 18:02:49.328473 USB2 port 9: enabled 0
757 18:02:49.331259 USB3 port 0: enabled 0
758 18:02:49.333929 USB3 port 1: enabled 1
759 18:02:49.334349 USB3 port 2: enabled 0
760 18:02:49.337513 USB3 port 3: enabled 0
761 18:02:49.340733 GENERIC: 0.0: enabled 1
762 18:02:49.344078 GENERIC: 1.0: enabled 1
763 18:02:49.344542 APIC: 01: enabled 1
764 18:02:49.347574 APIC: 03: enabled 1
765 18:02:49.350584 APIC: 04: enabled 1
766 18:02:49.351131 APIC: 07: enabled 1
767 18:02:49.353662 APIC: 06: enabled 1
768 18:02:49.354089 APIC: 02: enabled 1
769 18:02:49.356898 APIC: 05: enabled 1
770 18:02:49.360896 Compare with tree...
771 18:02:49.361430 Root Device: enabled 1
772 18:02:49.363632 DOMAIN: 0000: enabled 1
773 18:02:49.366873 PCI: 00:00.0: enabled 1
774 18:02:49.370354 PCI: 00:02.0: enabled 1
775 18:02:49.373359 PCI: 00:04.0: enabled 1
776 18:02:49.373785 GENERIC: 0.0: enabled 1
777 18:02:49.376771 PCI: 00:05.0: enabled 1
778 18:02:49.380250 PCI: 00:06.0: enabled 0
779 18:02:49.383408 PCI: 00:07.0: enabled 0
780 18:02:49.386864 GENERIC: 0.0: enabled 1
781 18:02:49.387334 PCI: 00:07.1: enabled 0
782 18:02:49.389978 GENERIC: 1.0: enabled 1
783 18:02:49.393420 PCI: 00:07.2: enabled 0
784 18:02:49.396346 GENERIC: 0.0: enabled 1
785 18:02:49.399799 PCI: 00:07.3: enabled 0
786 18:02:49.402963 GENERIC: 1.0: enabled 1
787 18:02:49.403389 PCI: 00:08.0: enabled 1
788 18:02:49.406581 PCI: 00:09.0: enabled 0
789 18:02:49.409804 PCI: 00:0a.0: enabled 0
790 18:02:49.412961 PCI: 00:0d.0: enabled 1
791 18:02:49.416629 USB0 port 0: enabled 1
792 18:02:49.417062 USB3 port 0: enabled 1
793 18:02:49.419598 USB3 port 1: enabled 1
794 18:02:49.422908 USB3 port 2: enabled 0
795 18:02:49.426285 USB3 port 3: enabled 0
796 18:02:49.429646 PCI: 00:0d.1: enabled 0
797 18:02:49.432737 PCI: 00:0d.2: enabled 0
798 18:02:49.433166 GENERIC: 0.0: enabled 1
799 18:02:49.436406 PCI: 00:0d.3: enabled 0
800 18:02:49.439861 PCI: 00:0e.0: enabled 0
801 18:02:49.442862 PCI: 00:10.2: enabled 1
802 18:02:49.446665 PCI: 00:10.6: enabled 0
803 18:02:49.447206 PCI: 00:10.7: enabled 0
804 18:02:49.449070 PCI: 00:12.0: enabled 0
805 18:02:49.452559 PCI: 00:12.6: enabled 0
806 18:02:49.455599 PCI: 00:13.0: enabled 0
807 18:02:49.458901 PCI: 00:14.0: enabled 1
808 18:02:49.459383 USB0 port 0: enabled 1
809 18:02:49.462681 USB2 port 0: enabled 0
810 18:02:49.466348 USB2 port 1: enabled 1
811 18:02:49.468982 USB2 port 2: enabled 1
812 18:02:49.472032 USB2 port 3: enabled 0
813 18:02:49.475428 USB2 port 4: enabled 1
814 18:02:49.475992 USB2 port 5: enabled 0
815 18:02:49.478716 USB2 port 6: enabled 0
816 18:02:49.482359 USB2 port 7: enabled 0
817 18:02:49.485243 USB2 port 8: enabled 0
818 18:02:49.488926 USB2 port 9: enabled 0
819 18:02:49.492356 USB3 port 0: enabled 0
820 18:02:49.492839 USB3 port 1: enabled 1
821 18:02:49.495253 USB3 port 2: enabled 0
822 18:02:49.498655 USB3 port 3: enabled 0
823 18:02:49.502118 PCI: 00:14.1: enabled 0
824 18:02:49.505336 PCI: 00:14.2: enabled 1
825 18:02:49.505815 PCI: 00:14.3: enabled 1
826 18:02:49.508632 GENERIC: 0.0: enabled 1
827 18:02:49.511934 PCI: 00:15.0: enabled 1
828 18:02:49.515423 I2C: 00:1a: enabled 1
829 18:02:49.518522 I2C: 00:31: enabled 1
830 18:02:49.518990 I2C: 00:32: enabled 1
831 18:02:49.521930 PCI: 00:15.1: enabled 1
832 18:02:49.525110 I2C: 00:10: enabled 1
833 18:02:49.528648 PCI: 00:15.2: enabled 1
834 18:02:49.531453 PCI: 00:15.3: enabled 1
835 18:02:49.532007 PCI: 00:16.0: enabled 1
836 18:02:49.534817 PCI: 00:16.1: enabled 0
837 18:02:49.537797 PCI: 00:16.2: enabled 0
838 18:02:49.541392 PCI: 00:16.3: enabled 0
839 18:02:49.544645 PCI: 00:16.4: enabled 0
840 18:02:49.545149 PCI: 00:16.5: enabled 0
841 18:02:49.548111 PCI: 00:17.0: enabled 1
842 18:02:49.551344 PCI: 00:19.0: enabled 0
843 18:02:49.600226 PCI: 00:19.1: enabled 1
844 18:02:49.601136 I2C: 00:15: enabled 1
845 18:02:49.601561 PCI: 00:19.2: enabled 0
846 18:02:49.601929 PCI: 00:1d.0: enabled 1
847 18:02:49.602265 GENERIC: 0.0: enabled 1
848 18:02:49.602645 PCI: 00:1e.0: enabled 1
849 18:02:49.602973 PCI: 00:1e.1: enabled 0
850 18:02:49.603665 PCI: 00:1e.2: enabled 1
851 18:02:49.604124 SPI: 00: enabled 1
852 18:02:49.604455 PCI: 00:1e.3: enabled 1
853 18:02:49.604769 SPI: 00: enabled 1
854 18:02:49.605323 PCI: 00:1f.0: enabled 1
855 18:02:49.605735 PNP: 0c09.0: enabled 1
856 18:02:49.606059 PCI: 00:1f.1: enabled 0
857 18:02:49.606374 PCI: 00:1f.2: enabled 1
858 18:02:49.606701 GENERIC: 0.0: enabled 1
859 18:02:49.607008 GENERIC: 0.0: enabled 1
860 18:02:49.607386 GENERIC: 1.0: enabled 1
861 18:02:49.607797 PCI: 00:1f.3: enabled 1
862 18:02:49.608200 PCI: 00:1f.4: enabled 0
863 18:02:49.608613 PCI: 00:1f.5: enabled 1
864 18:02:49.608945 PCI: 00:1f.6: enabled 0
865 18:02:49.611535 PCI: 00:1f.7: enabled 0
866 18:02:49.614462 CPU_CLUSTER: 0: enabled 1
867 18:02:49.618058 APIC: 00: enabled 1
868 18:02:49.618642 APIC: 01: enabled 1
869 18:02:49.621153 APIC: 03: enabled 1
870 18:02:49.624232 APIC: 04: enabled 1
871 18:02:49.624710 APIC: 07: enabled 1
872 18:02:49.628425 APIC: 06: enabled 1
873 18:02:49.631032 APIC: 02: enabled 1
874 18:02:49.631511 APIC: 05: enabled 1
875 18:02:49.635223 Root Device scanning...
876 18:02:49.638472 scan_static_bus for Root Device
877 18:02:49.641721 DOMAIN: 0000 enabled
878 18:02:49.644781 CPU_CLUSTER: 0 enabled
879 18:02:49.645259 DOMAIN: 0000 scanning...
880 18:02:49.648305 PCI: pci_scan_bus for bus 00
881 18:02:49.651650 PCI: 00:00.0 [8086/0000] ops
882 18:02:49.654618 PCI: 00:00.0 [8086/9a12] enabled
883 18:02:49.658060 PCI: 00:02.0 [8086/0000] bus ops
884 18:02:49.661443 PCI: 00:02.0 [8086/9a40] enabled
885 18:02:49.665136 PCI: 00:04.0 [8086/0000] bus ops
886 18:02:49.668257 PCI: 00:04.0 [8086/9a03] enabled
887 18:02:49.671176 PCI: 00:05.0 [8086/9a19] enabled
888 18:02:49.674475 PCI: 00:07.0 [0000/0000] hidden
889 18:02:49.678095 PCI: 00:08.0 [8086/9a11] enabled
890 18:02:49.680954 PCI: 00:0a.0 [8086/9a0d] disabled
891 18:02:49.684474 PCI: 00:0d.0 [8086/0000] bus ops
892 18:02:49.690771 PCI: 00:0d.0 [8086/9a13] enabled
893 18:02:49.694092 PCI: 00:14.0 [8086/0000] bus ops
894 18:02:49.697042 PCI: 00:14.0 [8086/a0ed] enabled
895 18:02:49.700597 PCI: 00:14.2 [8086/a0ef] enabled
896 18:02:49.704219 PCI: 00:14.3 [8086/0000] bus ops
897 18:02:49.707197 PCI: 00:14.3 [8086/a0f0] enabled
898 18:02:49.710815 PCI: 00:15.0 [8086/0000] bus ops
899 18:02:49.713744 PCI: 00:15.0 [8086/a0e8] enabled
900 18:02:49.717024 PCI: 00:15.1 [8086/0000] bus ops
901 18:02:49.720417 PCI: 00:15.1 [8086/a0e9] enabled
902 18:02:49.724227 PCI: 00:15.2 [8086/0000] bus ops
903 18:02:49.726941 PCI: 00:15.2 [8086/a0ea] enabled
904 18:02:49.729899 PCI: 00:15.3 [8086/0000] bus ops
905 18:02:49.733286 PCI: 00:15.3 [8086/a0eb] enabled
906 18:02:49.736323 PCI: 00:16.0 [8086/0000] ops
907 18:02:49.739857 PCI: 00:16.0 [8086/a0e0] enabled
908 18:02:49.743124 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 18:02:49.746031 PCI: 00:19.0 [8086/0000] bus ops
910 18:02:49.749554 PCI: 00:19.0 [8086/a0c5] disabled
911 18:02:49.752691 PCI: 00:19.1 [8086/0000] bus ops
912 18:02:49.756027 PCI: 00:19.1 [8086/a0c6] enabled
913 18:02:49.759405 PCI: 00:1d.0 [8086/0000] bus ops
914 18:02:49.762805 PCI: 00:1d.0 [8086/a0b0] enabled
915 18:02:49.765812 PCI: 00:1e.0 [8086/0000] ops
916 18:02:49.769139 PCI: 00:1e.0 [8086/a0a8] enabled
917 18:02:49.772500 PCI: 00:1e.2 [8086/0000] bus ops
918 18:02:49.775889 PCI: 00:1e.2 [8086/a0aa] enabled
919 18:02:49.779027 PCI: 00:1e.3 [8086/0000] bus ops
920 18:02:49.782279 PCI: 00:1e.3 [8086/a0ab] enabled
921 18:02:49.785574 PCI: 00:1f.0 [8086/0000] bus ops
922 18:02:49.788761 PCI: 00:1f.0 [8086/a087] enabled
923 18:02:49.792611 RTC Init
924 18:02:49.795678 Set power on after power failure.
925 18:02:49.795773 Disabling Deep S3
926 18:02:49.799357 Disabling Deep S3
927 18:02:49.802517 Disabling Deep S4
928 18:02:49.802601 Disabling Deep S4
929 18:02:49.805804 Disabling Deep S5
930 18:02:49.805887 Disabling Deep S5
931 18:02:49.809209 PCI: 00:1f.2 [0000/0000] hidden
932 18:02:49.812291 PCI: 00:1f.3 [8086/0000] bus ops
933 18:02:49.815693 PCI: 00:1f.3 [8086/a0c8] enabled
934 18:02:49.818568 PCI: 00:1f.5 [8086/0000] bus ops
935 18:02:49.822084 PCI: 00:1f.5 [8086/a0a4] enabled
936 18:02:49.825108 PCI: Leftover static devices:
937 18:02:49.828529 PCI: 00:10.2
938 18:02:49.828616 PCI: 00:10.6
939 18:02:49.832460 PCI: 00:10.7
940 18:02:49.832543 PCI: 00:06.0
941 18:02:49.832609 PCI: 00:07.1
942 18:02:49.835358 PCI: 00:07.2
943 18:02:49.835441 PCI: 00:07.3
944 18:02:49.838336 PCI: 00:09.0
945 18:02:49.838419 PCI: 00:0d.1
946 18:02:49.838484 PCI: 00:0d.2
947 18:02:49.841781 PCI: 00:0d.3
948 18:02:49.841864 PCI: 00:0e.0
949 18:02:49.845323 PCI: 00:12.0
950 18:02:49.845406 PCI: 00:12.6
951 18:02:49.848249 PCI: 00:13.0
952 18:02:49.848332 PCI: 00:14.1
953 18:02:49.848397 PCI: 00:16.1
954 18:02:49.851519 PCI: 00:16.2
955 18:02:49.851601 PCI: 00:16.3
956 18:02:49.854795 PCI: 00:16.4
957 18:02:49.854877 PCI: 00:16.5
958 18:02:49.854942 PCI: 00:17.0
959 18:02:49.858167 PCI: 00:19.2
960 18:02:49.858249 PCI: 00:1e.1
961 18:02:49.861626 PCI: 00:1f.1
962 18:02:49.861708 PCI: 00:1f.4
963 18:02:49.864736 PCI: 00:1f.6
964 18:02:49.864818 PCI: 00:1f.7
965 18:02:49.868233 PCI: Check your devicetree.cb.
966 18:02:49.871144 PCI: 00:02.0 scanning...
967 18:02:49.874482 scan_generic_bus for PCI: 00:02.0
968 18:02:49.877607 scan_generic_bus for PCI: 00:02.0 done
969 18:02:49.881167 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 18:02:49.884777 PCI: 00:04.0 scanning...
971 18:02:49.887927 scan_generic_bus for PCI: 00:04.0
972 18:02:49.891160 GENERIC: 0.0 enabled
973 18:02:49.897601 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
974 18:02:49.900717 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
975 18:02:49.904098 PCI: 00:0d.0 scanning...
976 18:02:49.907242 scan_static_bus for PCI: 00:0d.0
977 18:02:49.910659 USB0 port 0 enabled
978 18:02:49.914012 USB0 port 0 scanning...
979 18:02:49.917505 scan_static_bus for USB0 port 0
980 18:02:49.917590 USB3 port 0 enabled
981 18:02:49.920375 USB3 port 1 enabled
982 18:02:49.920459 USB3 port 2 disabled
983 18:02:49.923614 USB3 port 3 disabled
984 18:02:49.927011 USB3 port 0 scanning...
985 18:02:49.930523 scan_static_bus for USB3 port 0
986 18:02:49.933567 scan_static_bus for USB3 port 0 done
987 18:02:49.937006 scan_bus: bus USB3 port 0 finished in 6 msecs
988 18:02:49.940026 USB3 port 1 scanning...
989 18:02:49.943706 scan_static_bus for USB3 port 1
990 18:02:49.946573 scan_static_bus for USB3 port 1 done
991 18:02:49.953406 scan_bus: bus USB3 port 1 finished in 6 msecs
992 18:02:49.956628 scan_static_bus for USB0 port 0 done
993 18:02:49.959872 scan_bus: bus USB0 port 0 finished in 43 msecs
994 18:02:49.963605 scan_static_bus for PCI: 00:0d.0 done
995 18:02:49.969607 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 18:02:49.972806 PCI: 00:14.0 scanning...
997 18:02:49.976397 scan_static_bus for PCI: 00:14.0
998 18:02:49.976481 USB0 port 0 enabled
999 18:02:49.979693 USB0 port 0 scanning...
1000 18:02:49.983000 scan_static_bus for USB0 port 0
1001 18:02:49.986547 USB2 port 0 disabled
1002 18:02:49.986631 USB2 port 1 enabled
1003 18:02:49.989732 USB2 port 2 enabled
1004 18:02:49.992942 USB2 port 3 disabled
1005 18:02:49.993026 USB2 port 4 enabled
1006 18:02:49.996016 USB2 port 5 disabled
1007 18:02:49.999282 USB2 port 6 disabled
1008 18:02:49.999366 USB2 port 7 disabled
1009 18:02:50.002675 USB2 port 8 disabled
1010 18:02:50.006233 USB2 port 9 disabled
1011 18:02:50.006331 USB3 port 0 disabled
1012 18:02:50.009278 USB3 port 1 enabled
1013 18:02:50.012585 USB3 port 2 disabled
1014 18:02:50.012668 USB3 port 3 disabled
1015 18:02:50.015715 USB2 port 1 scanning...
1016 18:02:50.019072 scan_static_bus for USB2 port 1
1017 18:02:50.022759 scan_static_bus for USB2 port 1 done
1018 18:02:50.028972 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 18:02:50.029056 USB2 port 2 scanning...
1020 18:02:50.032748 scan_static_bus for USB2 port 2
1021 18:02:50.035571 scan_static_bus for USB2 port 2 done
1022 18:02:50.042354 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 18:02:50.045524 USB2 port 4 scanning...
1024 18:02:50.048602 scan_static_bus for USB2 port 4
1025 18:02:50.052219 scan_static_bus for USB2 port 4 done
1026 18:02:50.055125 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 18:02:50.058502 USB3 port 1 scanning...
1028 18:02:50.061959 scan_static_bus for USB3 port 1
1029 18:02:50.065215 scan_static_bus for USB3 port 1 done
1030 18:02:50.071459 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 18:02:50.074908 scan_static_bus for USB0 port 0 done
1032 18:02:50.078817 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 18:02:50.081507 scan_static_bus for PCI: 00:14.0 done
1034 18:02:50.088135 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1035 18:02:50.091514 PCI: 00:14.3 scanning...
1036 18:02:50.094783 scan_static_bus for PCI: 00:14.3
1037 18:02:50.094890 GENERIC: 0.0 enabled
1038 18:02:50.097716 scan_static_bus for PCI: 00:14.3 done
1039 18:02:50.104432 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 18:02:50.107910 PCI: 00:15.0 scanning...
1041 18:02:50.111058 scan_static_bus for PCI: 00:15.0
1042 18:02:50.111140 I2C: 00:1a enabled
1043 18:02:50.114482 I2C: 00:31 enabled
1044 18:02:50.114564 I2C: 00:32 enabled
1045 18:02:50.121444 scan_static_bus for PCI: 00:15.0 done
1046 18:02:50.124331 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1047 18:02:50.127801 PCI: 00:15.1 scanning...
1048 18:02:50.131680 scan_static_bus for PCI: 00:15.1
1049 18:02:50.132141 I2C: 00:10 enabled
1050 18:02:50.135406 scan_static_bus for PCI: 00:15.1 done
1051 18:02:50.142169 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 18:02:50.145553 PCI: 00:15.2 scanning...
1053 18:02:50.148624 scan_static_bus for PCI: 00:15.2
1054 18:02:50.151976 scan_static_bus for PCI: 00:15.2 done
1055 18:02:50.155098 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1056 18:02:50.158945 PCI: 00:15.3 scanning...
1057 18:02:50.161610 scan_static_bus for PCI: 00:15.3
1058 18:02:50.164836 scan_static_bus for PCI: 00:15.3 done
1059 18:02:50.171551 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1060 18:02:50.172025 PCI: 00:19.1 scanning...
1061 18:02:50.178425 scan_static_bus for PCI: 00:19.1
1062 18:02:50.178849 I2C: 00:15 enabled
1063 18:02:50.182126 scan_static_bus for PCI: 00:19.1 done
1064 18:02:50.188278 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1065 18:02:50.188722 PCI: 00:1d.0 scanning...
1066 18:02:50.194874 do_pci_scan_bridge for PCI: 00:1d.0
1067 18:02:50.195303 PCI: pci_scan_bus for bus 01
1068 18:02:50.201630 PCI: 01:00.0 [1c5c/174a] enabled
1069 18:02:50.202139 GENERIC: 0.0 enabled
1070 18:02:50.204807 Enabling Common Clock Configuration
1071 18:02:50.211365 L1 Sub-State supported from root port 29
1072 18:02:50.211839 L1 Sub-State Support = 0xf
1073 18:02:50.214672 CommonModeRestoreTime = 0x28
1074 18:02:50.221803 Power On Value = 0x16, Power On Scale = 0x0
1075 18:02:50.222248 ASPM: Enabled L1
1076 18:02:50.224817 PCIe: Max_Payload_Size adjusted to 128
1077 18:02:50.230992 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1078 18:02:50.234603 PCI: 00:1e.2 scanning...
1079 18:02:50.237883 scan_generic_bus for PCI: 00:1e.2
1080 18:02:50.238307 SPI: 00 enabled
1081 18:02:50.244523 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 18:02:50.251115 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 18:02:50.251540 PCI: 00:1e.3 scanning...
1084 18:02:50.254313 scan_generic_bus for PCI: 00:1e.3
1085 18:02:50.257336 SPI: 00 enabled
1086 18:02:50.264344 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1087 18:02:50.267475 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1088 18:02:50.270641 PCI: 00:1f.0 scanning...
1089 18:02:50.274406 scan_static_bus for PCI: 00:1f.0
1090 18:02:50.277243 PNP: 0c09.0 enabled
1091 18:02:50.277667 PNP: 0c09.0 scanning...
1092 18:02:50.280745 scan_static_bus for PNP: 0c09.0
1093 18:02:50.287554 scan_static_bus for PNP: 0c09.0 done
1094 18:02:50.290753 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1095 18:02:50.293785 scan_static_bus for PCI: 00:1f.0 done
1096 18:02:50.300216 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 18:02:50.300662 PCI: 00:1f.2 scanning...
1098 18:02:50.303718 scan_static_bus for PCI: 00:1f.2
1099 18:02:50.306867 GENERIC: 0.0 enabled
1100 18:02:50.310184 GENERIC: 0.0 scanning...
1101 18:02:50.313629 scan_static_bus for GENERIC: 0.0
1102 18:02:50.316951 GENERIC: 0.0 enabled
1103 18:02:50.317406 GENERIC: 1.0 enabled
1104 18:02:50.320159 scan_static_bus for GENERIC: 0.0 done
1105 18:02:50.327081 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 18:02:50.330129 scan_static_bus for PCI: 00:1f.2 done
1107 18:02:50.336490 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 18:02:50.336966 PCI: 00:1f.3 scanning...
1109 18:02:50.339505 scan_static_bus for PCI: 00:1f.3
1110 18:02:50.346407 scan_static_bus for PCI: 00:1f.3 done
1111 18:02:50.349473 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 18:02:50.353076 PCI: 00:1f.5 scanning...
1113 18:02:50.356510 scan_generic_bus for PCI: 00:1f.5
1114 18:02:50.359669 scan_generic_bus for PCI: 00:1f.5 done
1115 18:02:50.362600 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 18:02:50.369475 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1117 18:02:50.372640 scan_static_bus for Root Device done
1118 18:02:50.379070 scan_bus: bus Root Device finished in 737 msecs
1119 18:02:50.379495 done
1120 18:02:50.385860 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 18:02:50.389284 Chrome EC: UHEPI supported
1122 18:02:50.392643 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 18:02:50.399503 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 18:02:50.402059 SPI flash protection: WPSW=1 SRP0=0
1125 18:02:50.408847 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 18:02:50.415711 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 18:02:50.419128 found VGA at PCI: 00:02.0
1128 18:02:50.419646 Setting up VGA for PCI: 00:02.0
1129 18:02:50.425746 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 18:02:50.431693 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 18:02:50.432290 Allocating resources...
1132 18:02:50.435037 Reading resources...
1133 18:02:50.438461 Root Device read_resources bus 0 link: 0
1134 18:02:50.445114 DOMAIN: 0000 read_resources bus 0 link: 0
1135 18:02:50.448155 PCI: 00:04.0 read_resources bus 1 link: 0
1136 18:02:50.455142 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 18:02:50.457954 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 18:02:50.464780 USB0 port 0 read_resources bus 0 link: 0
1139 18:02:50.467867 USB0 port 0 read_resources bus 0 link: 0 done
1140 18:02:50.474453 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 18:02:50.477978 PCI: 00:14.0 read_resources bus 0 link: 0
1142 18:02:50.481137 USB0 port 0 read_resources bus 0 link: 0
1143 18:02:50.488585 USB0 port 0 read_resources bus 0 link: 0 done
1144 18:02:50.491338 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 18:02:50.498712 PCI: 00:14.3 read_resources bus 0 link: 0
1146 18:02:50.501679 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 18:02:50.508524 PCI: 00:15.0 read_resources bus 0 link: 0
1148 18:02:50.511342 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 18:02:50.518751 PCI: 00:15.1 read_resources bus 0 link: 0
1150 18:02:50.521519 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 18:02:50.528977 PCI: 00:19.1 read_resources bus 0 link: 0
1152 18:02:50.532006 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 18:02:50.538806 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 18:02:50.541738 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 18:02:50.548746 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 18:02:50.552739 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 18:02:50.558633 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 18:02:50.562083 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 18:02:50.568611 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 18:02:50.571839 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 18:02:50.578684 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 18:02:50.581590 GENERIC: 0.0 read_resources bus 0 link: 0
1163 18:02:50.588404 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 18:02:50.591628 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 18:02:50.598059 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 18:02:50.601670 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 18:02:50.608443 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 18:02:50.611589 Root Device read_resources bus 0 link: 0 done
1169 18:02:50.614711 Done reading resources.
1170 18:02:50.621105 Show resources in subtree (Root Device)...After reading.
1171 18:02:50.624396 Root Device child on link 0 DOMAIN: 0000
1172 18:02:50.627762 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 18:02:50.637618 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 18:02:50.648069 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 18:02:50.651118 PCI: 00:00.0
1176 18:02:50.660803 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 18:02:50.667421 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 18:02:50.677259 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 18:02:50.687423 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 18:02:50.697044 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 18:02:50.706843 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 18:02:50.716646 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 18:02:50.726850 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 18:02:50.732898 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 18:02:50.743102 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 18:02:50.752999 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 18:02:50.762800 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1188 18:02:50.772835 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1189 18:02:50.778951 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1190 18:02:50.789000 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1191 18:02:50.798974 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1192 18:02:50.808949 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1193 18:02:50.818825 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1194 18:02:50.828585 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1195 18:02:50.838907 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1196 18:02:50.839336 PCI: 00:02.0
1197 18:02:50.848199 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 18:02:50.861774 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1199 18:02:50.867917 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1200 18:02:50.874703 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1201 18:02:50.884621 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1202 18:02:50.885183 GENERIC: 0.0
1203 18:02:50.887861 PCI: 00:05.0
1204 18:02:50.897547 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 18:02:50.901005 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1206 18:02:50.904489 GENERIC: 0.0
1207 18:02:50.904958 PCI: 00:08.0
1208 18:02:50.914262 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 18:02:50.917610 PCI: 00:0a.0
1210 18:02:50.920403 PCI: 00:0d.0 child on link 0 USB0 port 0
1211 18:02:50.930653 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 18:02:50.933891 USB0 port 0 child on link 0 USB3 port 0
1213 18:02:50.937277 USB3 port 0
1214 18:02:50.940372 USB3 port 1
1215 18:02:50.940834 USB3 port 2
1216 18:02:50.944251 USB3 port 3
1217 18:02:50.947334 PCI: 00:14.0 child on link 0 USB0 port 0
1218 18:02:50.957200 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 18:02:50.960866 USB0 port 0 child on link 0 USB2 port 0
1220 18:02:50.963783 USB2 port 0
1221 18:02:50.964354 USB2 port 1
1222 18:02:50.967766 USB2 port 2
1223 18:02:50.968343 USB2 port 3
1224 18:02:50.969959 USB2 port 4
1225 18:02:50.973572 USB2 port 5
1226 18:02:50.974035 USB2 port 6
1227 18:02:50.977035 USB2 port 7
1228 18:02:50.977599 USB2 port 8
1229 18:02:50.980125 USB2 port 9
1230 18:02:50.980584 USB3 port 0
1231 18:02:50.983585 USB3 port 1
1232 18:02:50.984238 USB3 port 2
1233 18:02:50.986606 USB3 port 3
1234 18:02:50.987064 PCI: 00:14.2
1235 18:02:50.996341 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 18:02:51.006820 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 18:02:51.012720 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 18:02:51.022941 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 18:02:51.023535 GENERIC: 0.0
1240 18:02:51.029438 PCI: 00:15.0 child on link 0 I2C: 00:1a
1241 18:02:51.039423 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 18:02:51.040060 I2C: 00:1a
1243 18:02:51.042711 I2C: 00:31
1244 18:02:51.043289 I2C: 00:32
1245 18:02:51.046104 PCI: 00:15.1 child on link 0 I2C: 00:10
1246 18:02:51.056107 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 18:02:51.059157 I2C: 00:10
1248 18:02:51.059779 PCI: 00:15.2
1249 18:02:51.069003 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 18:02:51.072135 PCI: 00:15.3
1251 18:02:51.082065 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 18:02:51.082654 PCI: 00:16.0
1253 18:02:51.092292 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 18:02:51.095337 PCI: 00:19.0
1255 18:02:51.098608 PCI: 00:19.1 child on link 0 I2C: 00:15
1256 18:02:51.108372 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 18:02:51.111775 I2C: 00:15
1258 18:02:51.114881 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1259 18:02:51.124511 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1260 18:02:51.134632 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1261 18:02:51.144556 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1262 18:02:51.145025 GENERIC: 0.0
1263 18:02:51.148242 PCI: 01:00.0
1264 18:02:51.157996 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 18:02:51.164439 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1266 18:02:51.174050 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1267 18:02:51.177995 PCI: 00:1e.0
1268 18:02:51.187220 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1269 18:02:51.190763 PCI: 00:1e.2 child on link 0 SPI: 00
1270 18:02:51.200784 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1271 18:02:51.203856 SPI: 00
1272 18:02:51.206969 PCI: 00:1e.3 child on link 0 SPI: 00
1273 18:02:51.217187 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 18:02:51.217678 SPI: 00
1275 18:02:51.223795 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1276 18:02:51.230361 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1277 18:02:51.233488 PNP: 0c09.0
1278 18:02:51.243569 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1279 18:02:51.246432 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1280 18:02:51.256895 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1281 18:02:51.266873 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1282 18:02:51.269641 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1283 18:02:51.272769 GENERIC: 0.0
1284 18:02:51.273250 GENERIC: 1.0
1285 18:02:51.276292 PCI: 00:1f.3
1286 18:02:51.285979 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1287 18:02:51.295655 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1288 18:02:51.296205 PCI: 00:1f.5
1289 18:02:51.305647 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1290 18:02:51.309135 CPU_CLUSTER: 0 child on link 0 APIC: 00
1291 18:02:51.312392 APIC: 00
1292 18:02:51.312879 APIC: 01
1293 18:02:51.313359 APIC: 03
1294 18:02:51.315782 APIC: 04
1295 18:02:51.316267 APIC: 07
1296 18:02:51.319448 APIC: 06
1297 18:02:51.320105 APIC: 02
1298 18:02:51.320603 APIC: 05
1299 18:02:51.329035 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1300 18:02:51.332359 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1301 18:02:51.338718 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1302 18:02:51.345042 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1303 18:02:51.348839 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1304 18:02:51.355173 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1305 18:02:51.358586 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1306 18:02:51.364670 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1307 18:02:51.371835 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1308 18:02:51.381837 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1309 18:02:51.387913 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1310 18:02:51.394966 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1311 18:02:51.401224 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1312 18:02:51.407873 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1313 18:02:51.417700 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1314 18:02:51.421319 DOMAIN: 0000: Resource ranges:
1315 18:02:51.424423 * Base: 1000, Size: 800, Tag: 100
1316 18:02:51.427277 * Base: 1900, Size: e700, Tag: 100
1317 18:02:51.434104 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1318 18:02:51.440806 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1319 18:02:51.447467 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1320 18:02:51.453889 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1321 18:02:51.460521 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1322 18:02:51.470200 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1323 18:02:51.476594 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1324 18:02:51.483355 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1325 18:02:51.493140 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1326 18:02:51.500129 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1327 18:02:51.506679 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1328 18:02:51.516617 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1329 18:02:51.523024 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1330 18:02:51.529039 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1331 18:02:51.539310 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1332 18:02:51.546137 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1333 18:02:51.552919 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1334 18:02:51.562089 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1335 18:02:51.568890 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1336 18:02:51.578660 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1337 18:02:51.585332 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1338 18:02:51.592113 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1339 18:02:51.602038 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1340 18:02:51.608495 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1341 18:02:51.614716 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1342 18:02:51.618171 DOMAIN: 0000: Resource ranges:
1343 18:02:51.624401 * Base: 7fc00000, Size: 40400000, Tag: 200
1344 18:02:51.627618 * Base: d0000000, Size: 28000000, Tag: 200
1345 18:02:51.631160 * Base: fa000000, Size: 1000000, Tag: 200
1346 18:02:51.638012 * Base: fb001000, Size: 2fff000, Tag: 200
1347 18:02:51.641221 * Base: fe010000, Size: 2e000, Tag: 200
1348 18:02:51.644516 * Base: fe03f000, Size: d41000, Tag: 200
1349 18:02:51.647339 * Base: fed88000, Size: 8000, Tag: 200
1350 18:02:51.654298 * Base: fed93000, Size: d000, Tag: 200
1351 18:02:51.657477 * Base: feda2000, Size: 1e000, Tag: 200
1352 18:02:51.660467 * Base: fede0000, Size: 1220000, Tag: 200
1353 18:02:51.667597 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1354 18:02:51.673970 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1355 18:02:51.680789 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1356 18:02:51.686992 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1357 18:02:51.693621 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1358 18:02:51.699807 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1359 18:02:51.706835 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1360 18:02:51.713061 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1361 18:02:51.719370 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1362 18:02:51.726144 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1363 18:02:51.733107 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1364 18:02:51.739287 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1365 18:02:51.745930 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1366 18:02:51.752702 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1367 18:02:51.758976 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1368 18:02:51.765941 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1369 18:02:51.772422 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1370 18:02:51.779032 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1371 18:02:51.786016 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1372 18:02:51.791716 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1373 18:02:51.798863 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1374 18:02:51.805189 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1375 18:02:51.811534 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1376 18:02:51.818467 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1377 18:02:51.828035 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1378 18:02:51.831334 PCI: 00:1d.0: Resource ranges:
1379 18:02:51.834694 * Base: 7fc00000, Size: 100000, Tag: 200
1380 18:02:51.841401 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1381 18:02:51.847689 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1382 18:02:51.854843 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1383 18:02:51.864691 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1384 18:02:51.870782 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1385 18:02:51.874951 Root Device assign_resources, bus 0 link: 0
1386 18:02:51.881001 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 18:02:51.887603 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1388 18:02:51.897344 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1389 18:02:51.904192 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1390 18:02:51.913969 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1391 18:02:51.916926 PCI: 00:04.0 assign_resources, bus 1 link: 0
1392 18:02:51.920307 PCI: 00:04.0 assign_resources, bus 1 link: 0
1393 18:02:51.930592 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1394 18:02:51.936793 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1395 18:02:51.946848 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1396 18:02:51.950120 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1397 18:02:51.956552 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1398 18:02:51.963597 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1399 18:02:51.969906 PCI: 00:14.0 assign_resources, bus 0 link: 0
1400 18:02:51.973241 PCI: 00:14.0 assign_resources, bus 0 link: 0
1401 18:02:51.982908 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1402 18:02:51.989806 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1403 18:02:51.996471 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1404 18:02:52.002677 PCI: 00:14.3 assign_resources, bus 0 link: 0
1405 18:02:52.005831 PCI: 00:14.3 assign_resources, bus 0 link: 0
1406 18:02:52.015915 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1407 18:02:52.018886 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 18:02:52.025456 PCI: 00:15.0 assign_resources, bus 0 link: 0
1409 18:02:52.032304 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1410 18:02:52.038952 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 18:02:52.041696 PCI: 00:15.1 assign_resources, bus 0 link: 0
1412 18:02:52.049176 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1413 18:02:52.058313 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1414 18:02:52.065257 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1415 18:02:52.075129 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1416 18:02:52.078845 PCI: 00:19.1 assign_resources, bus 0 link: 0
1417 18:02:52.084886 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 18:02:52.091450 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 18:02:52.100899 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 18:02:52.111016 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 18:02:52.113984 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 18:02:52.124318 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 18:02:52.130720 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 18:02:52.140571 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 18:02:52.143825 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 18:02:52.153768 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 18:02:52.156880 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 18:02:52.163201 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 18:02:52.169884 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 18:02:52.173238 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 18:02:52.179925 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 18:02:52.182874 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 18:02:52.189870 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 18:02:52.193024 LPC: Trying to open IO window from 800 size 1ff
1435 18:02:52.202649 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 18:02:52.209142 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 18:02:52.219431 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 18:02:52.222675 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 18:02:52.229260 Root Device assign_resources, bus 0 link: 0
1440 18:02:52.229930 Done setting resources.
1441 18:02:52.235593 Show resources in subtree (Root Device)...After assigning values.
1442 18:02:52.242175 Root Device child on link 0 DOMAIN: 0000
1443 18:02:52.245756 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 18:02:52.255489 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 18:02:52.265531 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 18:02:52.266049 PCI: 00:00.0
1447 18:02:52.274953 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 18:02:52.284913 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 18:02:52.295080 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 18:02:52.304834 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 18:02:52.314914 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 18:02:52.324274 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 18:02:52.331445 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 18:02:52.340545 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 18:02:52.350715 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 18:02:52.360472 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 18:02:52.370529 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 18:02:52.380100 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 18:02:52.386820 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 18:02:52.396802 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 18:02:52.406438 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 18:02:52.416439 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 18:02:52.426366 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 18:02:52.436283 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1465 18:02:52.445854 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1466 18:02:52.455819 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1467 18:02:52.456378 PCI: 00:02.0
1468 18:02:52.465600 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1469 18:02:52.478995 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1470 18:02:52.485373 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1471 18:02:52.491619 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1472 18:02:52.501420 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1473 18:02:52.504866 GENERIC: 0.0
1474 18:02:52.505276 PCI: 00:05.0
1475 18:02:52.514902 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1476 18:02:52.521352 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1477 18:02:52.521879 GENERIC: 0.0
1478 18:02:52.524625 PCI: 00:08.0
1479 18:02:52.534625 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1480 18:02:52.535088 PCI: 00:0a.0
1481 18:02:52.541143 PCI: 00:0d.0 child on link 0 USB0 port 0
1482 18:02:52.551092 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1483 18:02:52.554455 USB0 port 0 child on link 0 USB3 port 0
1484 18:02:52.557243 USB3 port 0
1485 18:02:52.557658 USB3 port 1
1486 18:02:52.560546 USB3 port 2
1487 18:02:52.560958 USB3 port 3
1488 18:02:52.567087 PCI: 00:14.0 child on link 0 USB0 port 0
1489 18:02:52.577208 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1490 18:02:52.580467 USB0 port 0 child on link 0 USB2 port 0
1491 18:02:52.583480 USB2 port 0
1492 18:02:52.583938 USB2 port 1
1493 18:02:52.586736 USB2 port 2
1494 18:02:52.587146 USB2 port 3
1495 18:02:52.590480 USB2 port 4
1496 18:02:52.591004 USB2 port 5
1497 18:02:52.593546 USB2 port 6
1498 18:02:52.596660 USB2 port 7
1499 18:02:52.597072 USB2 port 8
1500 18:02:52.600210 USB2 port 9
1501 18:02:52.600656 USB3 port 0
1502 18:02:52.603243 USB3 port 1
1503 18:02:52.603683 USB3 port 2
1504 18:02:52.606543 USB3 port 3
1505 18:02:52.607021 PCI: 00:14.2
1506 18:02:52.616807 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1507 18:02:52.629926 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1508 18:02:52.633070 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1509 18:02:52.642991 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1510 18:02:52.646298 GENERIC: 0.0
1511 18:02:52.649199 PCI: 00:15.0 child on link 0 I2C: 00:1a
1512 18:02:52.659533 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1513 18:02:52.662813 I2C: 00:1a
1514 18:02:52.663370 I2C: 00:31
1515 18:02:52.665400 I2C: 00:32
1516 18:02:52.668618 PCI: 00:15.1 child on link 0 I2C: 00:10
1517 18:02:52.679419 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1518 18:02:52.682302 I2C: 00:10
1519 18:02:52.682863 PCI: 00:15.2
1520 18:02:52.692437 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1521 18:02:52.695091 PCI: 00:15.3
1522 18:02:52.705233 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1523 18:02:52.705818 PCI: 00:16.0
1524 18:02:52.714750 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1525 18:02:52.718304 PCI: 00:19.0
1526 18:02:52.721483 PCI: 00:19.1 child on link 0 I2C: 00:15
1527 18:02:52.731187 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1528 18:02:52.734603 I2C: 00:15
1529 18:02:52.738128 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1530 18:02:52.748108 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1531 18:02:52.760753 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1532 18:02:52.770705 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1533 18:02:52.771295 GENERIC: 0.0
1534 18:02:52.774069 PCI: 01:00.0
1535 18:02:52.784132 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1536 18:02:52.793799 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1537 18:02:52.803622 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1538 18:02:52.806962 PCI: 00:1e.0
1539 18:02:52.816770 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1540 18:02:52.823579 PCI: 00:1e.2 child on link 0 SPI: 00
1541 18:02:52.833204 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1542 18:02:52.833723 SPI: 00
1543 18:02:52.836207 PCI: 00:1e.3 child on link 0 SPI: 00
1544 18:02:52.847209 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1545 18:02:52.849499 SPI: 00
1546 18:02:52.852784 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1547 18:02:52.862896 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1548 18:02:52.863324 PNP: 0c09.0
1549 18:02:52.872516 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1550 18:02:52.875514 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1551 18:02:52.885747 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1552 18:02:52.895641 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1553 18:02:52.898719 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1554 18:02:52.901801 GENERIC: 0.0
1555 18:02:52.905310 GENERIC: 1.0
1556 18:02:52.905726 PCI: 00:1f.3
1557 18:02:52.915636 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1558 18:02:52.925036 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1559 18:02:52.928575 PCI: 00:1f.5
1560 18:02:52.937979 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1561 18:02:52.941751 CPU_CLUSTER: 0 child on link 0 APIC: 00
1562 18:02:52.944473 APIC: 00
1563 18:02:52.944893 APIC: 01
1564 18:02:52.947993 APIC: 03
1565 18:02:52.948415 APIC: 04
1566 18:02:52.948753 APIC: 07
1567 18:02:52.951088 APIC: 06
1568 18:02:52.951508 APIC: 02
1569 18:02:52.954452 APIC: 05
1570 18:02:52.954873 Done allocating resources.
1571 18:02:52.961234 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1572 18:02:52.967621 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1573 18:02:52.970857 Configure GPIOs for I2S audio on UP4.
1574 18:02:52.978045 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1575 18:02:52.981387 Enabling resources...
1576 18:02:52.985422 PCI: 00:00.0 subsystem <- 8086/9a12
1577 18:02:52.988054 PCI: 00:00.0 cmd <- 06
1578 18:02:52.991544 PCI: 00:02.0 subsystem <- 8086/9a40
1579 18:02:52.995415 PCI: 00:02.0 cmd <- 03
1580 18:02:52.997860 PCI: 00:04.0 subsystem <- 8086/9a03
1581 18:02:53.001056 PCI: 00:04.0 cmd <- 02
1582 18:02:53.004299 PCI: 00:05.0 subsystem <- 8086/9a19
1583 18:02:53.004716 PCI: 00:05.0 cmd <- 02
1584 18:02:53.011198 PCI: 00:08.0 subsystem <- 8086/9a11
1585 18:02:53.011846 PCI: 00:08.0 cmd <- 06
1586 18:02:53.014621 PCI: 00:0d.0 subsystem <- 8086/9a13
1587 18:02:53.017887 PCI: 00:0d.0 cmd <- 02
1588 18:02:53.021075 PCI: 00:14.0 subsystem <- 8086/a0ed
1589 18:02:53.024606 PCI: 00:14.0 cmd <- 02
1590 18:02:53.028067 PCI: 00:14.2 subsystem <- 8086/a0ef
1591 18:02:53.030727 PCI: 00:14.2 cmd <- 02
1592 18:02:53.034508 PCI: 00:14.3 subsystem <- 8086/a0f0
1593 18:02:53.037507 PCI: 00:14.3 cmd <- 02
1594 18:02:53.040946 PCI: 00:15.0 subsystem <- 8086/a0e8
1595 18:02:53.043830 PCI: 00:15.0 cmd <- 02
1596 18:02:53.047266 PCI: 00:15.1 subsystem <- 8086/a0e9
1597 18:02:53.050491 PCI: 00:15.1 cmd <- 02
1598 18:02:53.053873 PCI: 00:15.2 subsystem <- 8086/a0ea
1599 18:02:53.056987 PCI: 00:15.2 cmd <- 02
1600 18:02:53.060125 PCI: 00:15.3 subsystem <- 8086/a0eb
1601 18:02:53.060557 PCI: 00:15.3 cmd <- 02
1602 18:02:53.066906 PCI: 00:16.0 subsystem <- 8086/a0e0
1603 18:02:53.067420 PCI: 00:16.0 cmd <- 02
1604 18:02:53.070421 PCI: 00:19.1 subsystem <- 8086/a0c6
1605 18:02:53.073493 PCI: 00:19.1 cmd <- 02
1606 18:02:53.076996 PCI: 00:1d.0 bridge ctrl <- 0013
1607 18:02:53.080439 PCI: 00:1d.0 subsystem <- 8086/a0b0
1608 18:02:53.083614 PCI: 00:1d.0 cmd <- 06
1609 18:02:53.086571 PCI: 00:1e.0 subsystem <- 8086/a0a8
1610 18:02:53.089859 PCI: 00:1e.0 cmd <- 06
1611 18:02:53.093368 PCI: 00:1e.2 subsystem <- 8086/a0aa
1612 18:02:53.096896 PCI: 00:1e.2 cmd <- 06
1613 18:02:53.100130 PCI: 00:1e.3 subsystem <- 8086/a0ab
1614 18:02:53.103031 PCI: 00:1e.3 cmd <- 02
1615 18:02:53.106669 PCI: 00:1f.0 subsystem <- 8086/a087
1616 18:02:53.109700 PCI: 00:1f.0 cmd <- 407
1617 18:02:53.113681 PCI: 00:1f.3 subsystem <- 8086/a0c8
1618 18:02:53.116209 PCI: 00:1f.3 cmd <- 02
1619 18:02:53.119212 PCI: 00:1f.5 subsystem <- 8086/a0a4
1620 18:02:53.122550 PCI: 00:1f.5 cmd <- 406
1621 18:02:53.125534 PCI: 01:00.0 cmd <- 02
1622 18:02:53.129719 done.
1623 18:02:53.133009 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1624 18:02:53.136903 Initializing devices...
1625 18:02:53.139949 Root Device init
1626 18:02:53.142891 Chrome EC: Set SMI mask to 0x0000000000000000
1627 18:02:53.149364 Chrome EC: clear events_b mask to 0x0000000000000000
1628 18:02:53.156568 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1629 18:02:53.159459 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1630 18:02:53.166607 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1631 18:02:53.173058 Chrome EC: Set WAKE mask to 0x0000000000000000
1632 18:02:53.176101 fw_config match found: DB_USB=USB3_ACTIVE
1633 18:02:53.183096 Configure Right Type-C port orientation for retimer
1634 18:02:53.186156 Root Device init finished in 42 msecs
1635 18:02:53.189618 PCI: 00:00.0 init
1636 18:02:53.192699 CPU TDP = 9 Watts
1637 18:02:53.193119 CPU PL1 = 9 Watts
1638 18:02:53.196551 CPU PL2 = 40 Watts
1639 18:02:53.197132 CPU PL4 = 83 Watts
1640 18:02:53.199100 PCI: 00:00.0 init finished in 8 msecs
1641 18:02:53.203303 PCI: 00:02.0 init
1642 18:02:53.206424 GMA: Found VBT in CBFS
1643 18:02:53.209554 GMA: Found valid VBT in CBFS
1644 18:02:53.212562 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1645 18:02:53.222590 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1646 18:02:53.226096 PCI: 00:02.0 init finished in 18 msecs
1647 18:02:53.228946 PCI: 00:05.0 init
1648 18:02:53.232325 PCI: 00:05.0 init finished in 0 msecs
1649 18:02:53.235551 PCI: 00:08.0 init
1650 18:02:53.239054 PCI: 00:08.0 init finished in 0 msecs
1651 18:02:53.242396 PCI: 00:14.0 init
1652 18:02:53.245544 PCI: 00:14.0 init finished in 0 msecs
1653 18:02:53.246013 PCI: 00:14.2 init
1654 18:02:53.252550 PCI: 00:14.2 init finished in 0 msecs
1655 18:02:53.253013 PCI: 00:15.0 init
1656 18:02:53.255188 I2C bus 0 version 0x3230302a
1657 18:02:53.258939 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1658 18:02:53.265501 PCI: 00:15.0 init finished in 6 msecs
1659 18:02:53.265925 PCI: 00:15.1 init
1660 18:02:53.268820 I2C bus 1 version 0x3230302a
1661 18:02:53.271552 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1662 18:02:53.275200 PCI: 00:15.1 init finished in 6 msecs
1663 18:02:53.278229 PCI: 00:15.2 init
1664 18:02:53.281403 I2C bus 2 version 0x3230302a
1665 18:02:53.285248 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1666 18:02:53.288157 PCI: 00:15.2 init finished in 6 msecs
1667 18:02:53.291386 PCI: 00:15.3 init
1668 18:02:53.295059 I2C bus 3 version 0x3230302a
1669 18:02:53.298351 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1670 18:02:53.301185 PCI: 00:15.3 init finished in 6 msecs
1671 18:02:53.305149 PCI: 00:16.0 init
1672 18:02:53.308322 PCI: 00:16.0 init finished in 0 msecs
1673 18:02:53.311953 PCI: 00:19.1 init
1674 18:02:53.314794 I2C bus 5 version 0x3230302a
1675 18:02:53.317868 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1676 18:02:53.321491 PCI: 00:19.1 init finished in 6 msecs
1677 18:02:53.321961 PCI: 00:1d.0 init
1678 18:02:53.324268 Initializing PCH PCIe bridge.
1679 18:02:53.330902 PCI: 00:1d.0 init finished in 3 msecs
1680 18:02:53.331340 PCI: 00:1f.0 init
1681 18:02:53.337757 IOAPIC: Initializing IOAPIC at 0xfec00000
1682 18:02:53.340992 IOAPIC: Bootstrap Processor Local APIC = 0x00
1683 18:02:53.344082 IOAPIC: ID = 0x02
1684 18:02:53.347692 IOAPIC: Dumping registers
1685 18:02:53.348144 reg 0x0000: 0x02000000
1686 18:02:53.351038 reg 0x0001: 0x00770020
1687 18:02:53.354424 reg 0x0002: 0x00000000
1688 18:02:53.357613 PCI: 00:1f.0 init finished in 21 msecs
1689 18:02:53.360416 PCI: 00:1f.2 init
1690 18:02:53.364106 Disabling ACPI via APMC.
1691 18:02:53.367533 APMC done.
1692 18:02:53.370383 PCI: 00:1f.2 init finished in 6 msecs
1693 18:02:53.382645 PCI: 01:00.0 init
1694 18:02:53.385754 PCI: 01:00.0 init finished in 0 msecs
1695 18:02:53.388800 PNP: 0c09.0 init
1696 18:02:53.395409 Google Chrome EC uptime: 8.387 seconds
1697 18:02:53.398893 Google Chrome AP resets since EC boot: 1
1698 18:02:53.403013 Google Chrome most recent AP reset causes:
1699 18:02:53.405864 0.349: 32775 shutdown: entering G3
1700 18:02:53.411838 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1701 18:02:53.415720 PNP: 0c09.0 init finished in 24 msecs
1702 18:02:53.422645 Devices initialized
1703 18:02:53.426047 Show all devs... After init.
1704 18:02:53.428758 Root Device: enabled 1
1705 18:02:53.429223 DOMAIN: 0000: enabled 1
1706 18:02:53.432159 CPU_CLUSTER: 0: enabled 1
1707 18:02:53.435801 PCI: 00:00.0: enabled 1
1708 18:02:53.439289 PCI: 00:02.0: enabled 1
1709 18:02:53.442051 PCI: 00:04.0: enabled 1
1710 18:02:53.442609 PCI: 00:05.0: enabled 1
1711 18:02:53.445595 PCI: 00:06.0: enabled 0
1712 18:02:53.448747 PCI: 00:07.0: enabled 0
1713 18:02:53.449206 PCI: 00:07.1: enabled 0
1714 18:02:53.451863 PCI: 00:07.2: enabled 0
1715 18:02:53.455316 PCI: 00:07.3: enabled 0
1716 18:02:53.459055 PCI: 00:08.0: enabled 1
1717 18:02:53.459626 PCI: 00:09.0: enabled 0
1718 18:02:53.461505 PCI: 00:0a.0: enabled 0
1719 18:02:53.464975 PCI: 00:0d.0: enabled 1
1720 18:02:53.468437 PCI: 00:0d.1: enabled 0
1721 18:02:53.468893 PCI: 00:0d.2: enabled 0
1722 18:02:53.471953 PCI: 00:0d.3: enabled 0
1723 18:02:53.474853 PCI: 00:0e.0: enabled 0
1724 18:02:53.478020 PCI: 00:10.2: enabled 1
1725 18:02:53.478432 PCI: 00:10.6: enabled 0
1726 18:02:53.481207 PCI: 00:10.7: enabled 0
1727 18:02:53.484681 PCI: 00:12.0: enabled 0
1728 18:02:53.488149 PCI: 00:12.6: enabled 0
1729 18:02:53.488561 PCI: 00:13.0: enabled 0
1730 18:02:53.491662 PCI: 00:14.0: enabled 1
1731 18:02:53.494649 PCI: 00:14.1: enabled 0
1732 18:02:53.498032 PCI: 00:14.2: enabled 1
1733 18:02:53.498475 PCI: 00:14.3: enabled 1
1734 18:02:53.501037 PCI: 00:15.0: enabled 1
1735 18:02:53.504690 PCI: 00:15.1: enabled 1
1736 18:02:53.507964 PCI: 00:15.2: enabled 1
1737 18:02:53.508420 PCI: 00:15.3: enabled 1
1738 18:02:53.510867 PCI: 00:16.0: enabled 1
1739 18:02:53.514210 PCI: 00:16.1: enabled 0
1740 18:02:53.517608 PCI: 00:16.2: enabled 0
1741 18:02:53.518067 PCI: 00:16.3: enabled 0
1742 18:02:53.520824 PCI: 00:16.4: enabled 0
1743 18:02:53.524100 PCI: 00:16.5: enabled 0
1744 18:02:53.527113 PCI: 00:17.0: enabled 0
1745 18:02:53.527533 PCI: 00:19.0: enabled 0
1746 18:02:53.530590 PCI: 00:19.1: enabled 1
1747 18:02:53.534307 PCI: 00:19.2: enabled 0
1748 18:02:53.534748 PCI: 00:1c.0: enabled 1
1749 18:02:53.537268 PCI: 00:1c.1: enabled 0
1750 18:02:53.540309 PCI: 00:1c.2: enabled 0
1751 18:02:53.543841 PCI: 00:1c.3: enabled 0
1752 18:02:53.544295 PCI: 00:1c.4: enabled 0
1753 18:02:53.547320 PCI: 00:1c.5: enabled 0
1754 18:02:53.550749 PCI: 00:1c.6: enabled 1
1755 18:02:53.553313 PCI: 00:1c.7: enabled 0
1756 18:02:53.553877 PCI: 00:1d.0: enabled 1
1757 18:02:53.556828 PCI: 00:1d.1: enabled 0
1758 18:02:53.560525 PCI: 00:1d.2: enabled 1
1759 18:02:53.563279 PCI: 00:1d.3: enabled 0
1760 18:02:53.563773 PCI: 00:1e.0: enabled 1
1761 18:02:53.566741 PCI: 00:1e.1: enabled 0
1762 18:02:53.570278 PCI: 00:1e.2: enabled 1
1763 18:02:53.573366 PCI: 00:1e.3: enabled 1
1764 18:02:53.573926 PCI: 00:1f.0: enabled 1
1765 18:02:53.576749 PCI: 00:1f.1: enabled 0
1766 18:02:53.579560 PCI: 00:1f.2: enabled 1
1767 18:02:53.582838 PCI: 00:1f.3: enabled 1
1768 18:02:53.583280 PCI: 00:1f.4: enabled 0
1769 18:02:53.586350 PCI: 00:1f.5: enabled 1
1770 18:02:53.589682 PCI: 00:1f.6: enabled 0
1771 18:02:53.592917 PCI: 00:1f.7: enabled 0
1772 18:02:53.593368 APIC: 00: enabled 1
1773 18:02:53.596289 GENERIC: 0.0: enabled 1
1774 18:02:53.599424 GENERIC: 0.0: enabled 1
1775 18:02:53.599979 GENERIC: 1.0: enabled 1
1776 18:02:53.603121 GENERIC: 0.0: enabled 1
1777 18:02:53.606545 GENERIC: 1.0: enabled 1
1778 18:02:53.609619 USB0 port 0: enabled 1
1779 18:02:53.610265 GENERIC: 0.0: enabled 1
1780 18:02:53.612887 USB0 port 0: enabled 1
1781 18:02:53.616293 GENERIC: 0.0: enabled 1
1782 18:02:53.616880 I2C: 00:1a: enabled 1
1783 18:02:53.619003 I2C: 00:31: enabled 1
1784 18:02:53.622458 I2C: 00:32: enabled 1
1785 18:02:53.626081 I2C: 00:10: enabled 1
1786 18:02:53.626518 I2C: 00:15: enabled 1
1787 18:02:53.628983 GENERIC: 0.0: enabled 0
1788 18:02:53.632995 GENERIC: 1.0: enabled 0
1789 18:02:53.633556 GENERIC: 0.0: enabled 1
1790 18:02:53.635617 SPI: 00: enabled 1
1791 18:02:53.639083 SPI: 00: enabled 1
1792 18:02:53.639544 PNP: 0c09.0: enabled 1
1793 18:02:53.642120 GENERIC: 0.0: enabled 1
1794 18:02:53.645460 USB3 port 0: enabled 1
1795 18:02:53.649103 USB3 port 1: enabled 1
1796 18:02:53.649642 USB3 port 2: enabled 0
1797 18:02:53.652171 USB3 port 3: enabled 0
1798 18:02:53.655546 USB2 port 0: enabled 0
1799 18:02:53.656090 USB2 port 1: enabled 1
1800 18:02:53.659234 USB2 port 2: enabled 1
1801 18:02:53.662189 USB2 port 3: enabled 0
1802 18:02:53.665130 USB2 port 4: enabled 1
1803 18:02:53.665567 USB2 port 5: enabled 0
1804 18:02:53.668494 USB2 port 6: enabled 0
1805 18:02:53.672136 USB2 port 7: enabled 0
1806 18:02:53.672574 USB2 port 8: enabled 0
1807 18:02:53.675580 USB2 port 9: enabled 0
1808 18:02:53.678242 USB3 port 0: enabled 0
1809 18:02:53.681470 USB3 port 1: enabled 1
1810 18:02:53.681555 USB3 port 2: enabled 0
1811 18:02:53.685039 USB3 port 3: enabled 0
1812 18:02:53.687877 GENERIC: 0.0: enabled 1
1813 18:02:53.687963 GENERIC: 1.0: enabled 1
1814 18:02:53.691154 APIC: 01: enabled 1
1815 18:02:53.694569 APIC: 03: enabled 1
1816 18:02:53.694654 APIC: 04: enabled 1
1817 18:02:53.697875 APIC: 07: enabled 1
1818 18:02:53.701164 APIC: 06: enabled 1
1819 18:02:53.701250 APIC: 02: enabled 1
1820 18:02:53.704483 APIC: 05: enabled 1
1821 18:02:53.707913 PCI: 01:00.0: enabled 1
1822 18:02:53.711304 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1823 18:02:53.718046 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1824 18:02:53.721738 ELOG: NV offset 0xf30000 size 0x1000
1825 18:02:53.728078 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1826 18:02:53.734496 ELOG: Event(17) added with size 13 at 2023-10-09 18:02:52 UTC
1827 18:02:53.741517 ELOG: Event(92) added with size 9 at 2023-10-09 18:02:52 UTC
1828 18:02:53.747649 ELOG: Event(93) added with size 9 at 2023-10-09 18:02:52 UTC
1829 18:02:53.754660 ELOG: Event(9E) added with size 10 at 2023-10-09 18:02:52 UTC
1830 18:02:53.761092 ELOG: Event(9F) added with size 14 at 2023-10-09 18:02:52 UTC
1831 18:02:53.767663 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1832 18:02:53.770734 ELOG: Event(A1) added with size 10 at 2023-10-09 18:02:52 UTC
1833 18:02:53.777190 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1834 18:02:53.784241 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1835 18:02:53.787226 Finalize devices...
1836 18:02:53.787687 Devices finalized
1837 18:02:53.794198 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1838 18:02:53.800662 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1839 18:02:53.803893 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1840 18:02:53.810255 ME: HFSTS1 : 0x80030055
1841 18:02:53.813459 ME: HFSTS2 : 0x30280116
1842 18:02:53.817113 ME: HFSTS3 : 0x00000050
1843 18:02:53.823531 ME: HFSTS4 : 0x00004000
1844 18:02:53.826415 ME: HFSTS5 : 0x00000000
1845 18:02:53.833467 ME: HFSTS6 : 0x00400006
1846 18:02:53.836809 ME: Manufacturing Mode : YES
1847 18:02:53.839714 ME: SPI Protection Mode Enabled : NO
1848 18:02:53.843184 ME: FW Partition Table : OK
1849 18:02:53.846799 ME: Bringup Loader Failure : NO
1850 18:02:53.849982 ME: Firmware Init Complete : NO
1851 18:02:53.853372 ME: Boot Options Present : NO
1852 18:02:53.856477 ME: Update In Progress : NO
1853 18:02:53.863065 ME: D0i3 Support : YES
1854 18:02:53.866141 ME: Low Power State Enabled : NO
1855 18:02:53.869471 ME: CPU Replaced : YES
1856 18:02:53.872859 ME: CPU Replacement Valid : YES
1857 18:02:53.876193 ME: Current Working State : 5
1858 18:02:53.879088 ME: Current Operation State : 1
1859 18:02:53.882663 ME: Current Operation Mode : 3
1860 18:02:53.885886 ME: Error Code : 0
1861 18:02:53.892348 ME: Enhanced Debug Mode : NO
1862 18:02:53.896169 ME: CPU Debug Disabled : YES
1863 18:02:53.898949 ME: TXT Support : NO
1864 18:02:53.905475 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1865 18:02:53.912162 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1866 18:02:53.915699 CBFS: 'fallback/slic' not found.
1867 18:02:53.918559 ACPI: Writing ACPI tables at 76b01000.
1868 18:02:53.922102 ACPI: * FACS
1869 18:02:53.922526 ACPI: * DSDT
1870 18:02:53.925154 Ramoops buffer: 0x100000@0x76a00000.
1871 18:02:53.931579 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1872 18:02:53.934960 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1873 18:02:53.938363 Google Chrome EC: version:
1874 18:02:53.941542 ro: voema_v2.0.7540-147f8d37d1
1875 18:02:53.945100 rw: voema_v2.0.7540-147f8d37d1
1876 18:02:53.948213 running image: 2
1877 18:02:53.955199 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1878 18:02:53.958123 ACPI: * FADT
1879 18:02:53.958665 SCI is IRQ9
1880 18:02:53.964518 ACPI: added table 1/32, length now 40
1881 18:02:53.964944 ACPI: * SSDT
1882 18:02:53.968347 Found 1 CPU(s) with 8 core(s) each.
1883 18:02:53.974299 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1884 18:02:53.978287 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1885 18:02:53.981293 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1886 18:02:53.988145 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1887 18:02:53.991024 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1888 18:02:53.997429 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1889 18:02:54.000747 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1890 18:02:54.007548 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1891 18:02:54.014479 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1892 18:02:54.017340 \_SB.PCI0.RP09: Added StorageD3Enable property
1893 18:02:54.023720 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1894 18:02:54.026733 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1895 18:02:54.034702 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1896 18:02:54.037492 PS2K: Passing 80 keymaps to kernel
1897 18:02:54.044411 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1898 18:02:54.050793 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1899 18:02:54.057356 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1900 18:02:54.064009 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1901 18:02:54.070499 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1902 18:02:54.077120 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1903 18:02:54.084113 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1904 18:02:54.090602 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1905 18:02:54.093761 ACPI: added table 2/32, length now 44
1906 18:02:54.096910 ACPI: * MCFG
1907 18:02:54.100167 ACPI: added table 3/32, length now 48
1908 18:02:54.100634 ACPI: * TPM2
1909 18:02:54.103474 TPM2 log created at 0x769f0000
1910 18:02:54.109727 ACPI: added table 4/32, length now 52
1911 18:02:54.110291 ACPI: * MADT
1912 18:02:54.110658 SCI is IRQ9
1913 18:02:54.116635 ACPI: added table 5/32, length now 56
1914 18:02:54.117163 current = 76b09850
1915 18:02:54.120077 ACPI: * DMAR
1916 18:02:54.123419 ACPI: added table 6/32, length now 60
1917 18:02:54.126103 ACPI: added table 7/32, length now 64
1918 18:02:54.130149 ACPI: * HPET
1919 18:02:54.133034 ACPI: added table 8/32, length now 68
1920 18:02:54.133609 ACPI: done.
1921 18:02:54.136392 ACPI tables: 35216 bytes.
1922 18:02:54.139687 smbios_write_tables: 769ef000
1923 18:02:54.143009 EC returned error result code 3
1924 18:02:54.146283 Couldn't obtain OEM name from CBI
1925 18:02:54.149556 Create SMBIOS type 16
1926 18:02:54.152436 Create SMBIOS type 17
1927 18:02:54.155707 GENERIC: 0.0 (WIFI Device)
1928 18:02:54.156177 SMBIOS tables: 1750 bytes.
1929 18:02:54.162190 Writing table forward entry at 0x00000500
1930 18:02:54.168531 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1931 18:02:54.172006 Writing coreboot table at 0x76b25000
1932 18:02:54.178402 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1933 18:02:54.181937 1. 0000000000001000-000000000009ffff: RAM
1934 18:02:54.184745 2. 00000000000a0000-00000000000fffff: RESERVED
1935 18:02:54.191820 3. 0000000000100000-00000000769eefff: RAM
1936 18:02:54.195202 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1937 18:02:54.201570 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1938 18:02:54.208542 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1939 18:02:54.211853 7. 0000000077000000-000000007fbfffff: RESERVED
1940 18:02:54.218329 8. 00000000c0000000-00000000cfffffff: RESERVED
1941 18:02:54.221570 9. 00000000f8000000-00000000f9ffffff: RESERVED
1942 18:02:54.228031 10. 00000000fb000000-00000000fb000fff: RESERVED
1943 18:02:54.231382 11. 00000000fe000000-00000000fe00ffff: RESERVED
1944 18:02:54.234477 12. 00000000fed80000-00000000fed87fff: RESERVED
1945 18:02:54.240876 13. 00000000fed90000-00000000fed92fff: RESERVED
1946 18:02:54.244479 14. 00000000feda0000-00000000feda1fff: RESERVED
1947 18:02:54.251337 15. 00000000fedc0000-00000000feddffff: RESERVED
1948 18:02:54.254355 16. 0000000100000000-00000002803fffff: RAM
1949 18:02:54.257778 Passing 4 GPIOs to payload:
1950 18:02:54.264156 NAME | PORT | POLARITY | VALUE
1951 18:02:54.267255 lid | undefined | high | high
1952 18:02:54.274193 power | undefined | high | low
1953 18:02:54.277168 oprom | undefined | high | low
1954 18:02:54.284176 EC in RW | 0x000000e5 | high | high
1955 18:02:54.290730 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 18ea
1956 18:02:54.293988 coreboot table: 1576 bytes.
1957 18:02:54.296916 IMD ROOT 0. 0x76fff000 0x00001000
1958 18:02:54.300148 IMD SMALL 1. 0x76ffe000 0x00001000
1959 18:02:54.303779 FSP MEMORY 2. 0x76c4e000 0x003b0000
1960 18:02:54.307279 VPD 3. 0x76c4d000 0x00000367
1961 18:02:54.310327 RO MCACHE 4. 0x76c4c000 0x00000fdc
1962 18:02:54.316957 CONSOLE 5. 0x76c2c000 0x00020000
1963 18:02:54.319870 FMAP 6. 0x76c2b000 0x00000578
1964 18:02:54.323452 TIME STAMP 7. 0x76c2a000 0x00000910
1965 18:02:54.327066 VBOOT WORK 8. 0x76c16000 0x00014000
1966 18:02:54.329746 ROMSTG STCK 9. 0x76c15000 0x00001000
1967 18:02:54.333406 AFTER CAR 10. 0x76c0a000 0x0000b000
1968 18:02:54.336334 RAMSTAGE 11. 0x76b97000 0x00073000
1969 18:02:54.343561 REFCODE 12. 0x76b42000 0x00055000
1970 18:02:54.346473 SMM BACKUP 13. 0x76b32000 0x00010000
1971 18:02:54.350325 4f444749 14. 0x76b30000 0x00002000
1972 18:02:54.353038 EXT VBT15. 0x76b2d000 0x0000219f
1973 18:02:54.356462 COREBOOT 16. 0x76b25000 0x00008000
1974 18:02:54.359777 ACPI 17. 0x76b01000 0x00024000
1975 18:02:54.363046 ACPI GNVS 18. 0x76b00000 0x00001000
1976 18:02:54.366684 RAMOOPS 19. 0x76a00000 0x00100000
1977 18:02:54.372554 TPM2 TCGLOG20. 0x769f0000 0x00010000
1978 18:02:54.376104 SMBIOS 21. 0x769ef000 0x00000800
1979 18:02:54.376568 IMD small region:
1980 18:02:54.379017 IMD ROOT 0. 0x76ffec00 0x00000400
1981 18:02:54.385526 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1982 18:02:54.388973 POWER STATE 2. 0x76ffeb80 0x00000044
1983 18:02:54.392058 ROMSTAGE 3. 0x76ffeb60 0x00000004
1984 18:02:54.395611 MEM INFO 4. 0x76ffe980 0x000001e0
1985 18:02:54.402021 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1986 18:02:54.405245 MTRR: Physical address space:
1987 18:02:54.411673 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1988 18:02:54.418204 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1989 18:02:54.424812 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1990 18:02:54.431816 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1991 18:02:54.434790 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1992 18:02:54.441857 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1993 18:02:54.448699 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1994 18:02:54.451435 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 18:02:54.458379 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 18:02:54.461456 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 18:02:54.464292 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 18:02:54.467958 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 18:02:54.474912 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 18:02:54.477826 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 18:02:54.481072 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 18:02:54.484358 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 18:02:54.490619 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 18:02:54.494073 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 18:02:54.497462 call enable_fixed_mtrr()
2006 18:02:54.500779 CPU physical address size: 39 bits
2007 18:02:54.504163 MTRR: default type WB/UC MTRR counts: 6/6.
2008 18:02:54.510748 MTRR: UC selected as default type.
2009 18:02:54.514202 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2010 18:02:54.520353 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2011 18:02:54.527224 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2012 18:02:54.533883 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2013 18:02:54.540162 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2014 18:02:54.547246 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2015 18:02:54.547858
2016 18:02:54.550382 MTRR check
2017 18:02:54.550950 Fixed MTRRs : Enabled
2018 18:02:54.553678 Variable MTRRs: Enabled
2019 18:02:54.554275
2020 18:02:54.559815 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 18:02:54.563356 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 18:02:54.566630 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 18:02:54.569825 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 18:02:54.576476 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 18:02:54.579813 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 18:02:54.583926 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 18:02:54.586578 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 18:02:54.589716 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 18:02:54.596763 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 18:02:54.599868 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 18:02:54.606419 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2032 18:02:54.609911 call enable_fixed_mtrr()
2033 18:02:54.613207 Checking cr50 for pending updates
2034 18:02:54.616925 CPU physical address size: 39 bits
2035 18:02:54.619646 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 18:02:54.623119 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 18:02:54.629645 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 18:02:54.633043 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 18:02:54.636535 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 18:02:54.639667 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 18:02:54.643329 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 18:02:54.649649 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 18:02:54.652971 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 18:02:54.656401 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 18:02:54.659424 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 18:02:54.666266 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 18:02:54.669303 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 18:02:54.672626 call enable_fixed_mtrr()
2049 18:02:54.675898 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 18:02:54.682942 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 18:02:54.686369 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 18:02:54.689088 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 18:02:54.692438 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 18:02:54.696221 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 18:02:54.703022 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 18:02:54.705471 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 18:02:54.709122 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 18:02:54.713270 CPU physical address size: 39 bits
2059 18:02:54.719454 call enable_fixed_mtrr()
2060 18:02:54.722861 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 18:02:54.726697 Reading cr50 TPM mode
2062 18:02:54.729950 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 18:02:54.733415 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 18:02:54.736513 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 18:02:54.739863 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 18:02:54.743305 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 18:02:54.749906 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 18:02:54.753430 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 18:02:54.756209 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 18:02:54.759612 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 18:02:54.766192 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 18:02:54.769426 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 18:02:54.772620 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 18:02:54.779756 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 18:02:54.780315 call enable_fixed_mtrr()
2076 18:02:54.786291 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 18:02:54.789306 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 18:02:54.792739 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 18:02:54.796368 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 18:02:54.802484 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 18:02:54.806180 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 18:02:54.809225 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 18:02:54.812526 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 18:02:54.819539 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 18:02:54.822454 CPU physical address size: 39 bits
2086 18:02:54.825820 call enable_fixed_mtrr()
2087 18:02:54.828866 CPU physical address size: 39 bits
2088 18:02:54.832214 MTRR: Fixed MSR 0x258 0x0606060606060606
2089 18:02:54.838693 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 18:02:54.841850 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 18:02:54.845285 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 18:02:54.848325 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 18:02:54.855147 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 18:02:54.858433 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 18:02:54.861718 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 18:02:54.864928 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 18:02:54.871809 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 18:02:54.875052 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 18:02:54.878132 MTRR: Fixed MSR 0x258 0x0606060606060606
2100 18:02:54.881795 call enable_fixed_mtrr()
2101 18:02:54.884715 MTRR: Fixed MSR 0x259 0x0000000000000000
2102 18:02:54.891614 MTRR: Fixed MSR 0x268 0x0606060606060606
2103 18:02:54.894338 MTRR: Fixed MSR 0x269 0x0606060606060606
2104 18:02:54.897888 MTRR: Fixed MSR 0x26a 0x0606060606060606
2105 18:02:54.901370 MTRR: Fixed MSR 0x26b 0x0606060606060606
2106 18:02:54.908254 MTRR: Fixed MSR 0x26c 0x0606060606060606
2107 18:02:54.911090 MTRR: Fixed MSR 0x26d 0x0606060606060606
2108 18:02:54.914563 MTRR: Fixed MSR 0x26e 0x0606060606060606
2109 18:02:54.917846 MTRR: Fixed MSR 0x26f 0x0606060606060606
2110 18:02:54.921873 CPU physical address size: 39 bits
2111 18:02:54.928935 call enable_fixed_mtrr()
2112 18:02:54.932042 CPU physical address size: 39 bits
2113 18:02:54.935497 CPU physical address size: 39 bits
2114 18:02:54.941860 BS: BS_PAYLOAD_LOAD entry times (exec / console): 117 / 6 ms
2115 18:02:54.948443 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2116 18:02:54.951855 Checking segment from ROM address 0xffc02b38
2117 18:02:54.958512 Checking segment from ROM address 0xffc02b54
2118 18:02:54.961923 Loading segment from ROM address 0xffc02b38
2119 18:02:54.965246 code (compression=0)
2120 18:02:54.971871 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2121 18:02:54.981259 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2122 18:02:54.984726 it's not compressed!
2123 18:02:55.122034 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2124 18:02:55.128748 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2125 18:02:55.134957 Loading segment from ROM address 0xffc02b54
2126 18:02:55.138539 Entry Point 0x30000000
2127 18:02:55.139122 Loaded segments
2128 18:02:55.144731 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2129 18:02:55.188420 Finalizing chipset.
2130 18:02:55.191422 Finalizing SMM.
2131 18:02:55.191924 APMC done.
2132 18:02:55.198072 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2133 18:02:55.201257 mp_park_aps done after 0 msecs.
2134 18:02:55.204648 Jumping to boot code at 0x30000000(0x76b25000)
2135 18:02:55.214066 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2136 18:02:55.214484
2137 18:02:55.217526
2138 18:02:55.218008
2139 18:02:55.219256 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2140 18:02:55.219796 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2141 18:02:55.220282 Setting prompt string to ['volteer:']
2142 18:02:55.220849 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2143 18:02:55.221571 Starting depthcharge on Voema...
2144 18:02:55.221961
2145 18:02:55.227937 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2146 18:02:55.228508
2147 18:02:55.234466 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2148 18:02:55.235003
2149 18:02:55.240687 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2150 18:02:55.241101
2151 18:02:55.243882 Failed to find eMMC card reader
2152 18:02:55.244299
2153 18:02:55.247414 Wipe memory regions:
2154 18:02:55.247876
2155 18:02:55.250666 [0x00000000001000, 0x000000000a0000)
2156 18:02:55.251080
2157 18:02:55.253869 [0x00000000100000, 0x00000030000000)
2158 18:02:55.279591
2159 18:02:55.283195 [0x00000032662db0, 0x000000769ef000)
2160 18:02:55.318824
2161 18:02:55.321782 [0x00000100000000, 0x00000280400000)
2162 18:02:55.522544
2163 18:02:55.526207 ec_init: CrosEC protocol v3 supported (256, 256)
2164 18:02:55.526667
2165 18:02:55.532448 update_port_state: port C0 state: usb enable 1 mux conn 0
2166 18:02:55.532912
2167 18:02:55.542460 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2168 18:02:55.543030
2169 18:02:55.545311 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2170 18:02:55.549074
2171 18:02:55.552154 send_conn_disc_msg: pmc_send_cmd succeeded
2172 18:02:55.983242
2173 18:02:55.983844 R8152: Initializing
2174 18:02:55.984217
2175 18:02:55.985980 Version 6 (ocp_data = 5c30)
2176 18:02:55.986534
2177 18:02:55.988428 R8152: Done initializing
2178 18:02:55.988885
2179 18:02:55.992123 Adding net device
2180 18:02:56.293864
2181 18:02:56.296973 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2182 18:02:56.297589
2183 18:02:56.297955
2184 18:02:56.298291
2185 18:02:56.300627 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 18:02:56.402278 volteer: tftpboot 192.168.201.1 11712609/tftp-deploy-8vsrz_ay/kernel/bzImage 11712609/tftp-deploy-8vsrz_ay/kernel/cmdline 11712609/tftp-deploy-8vsrz_ay/ramdisk/ramdisk.cpio.gz
2188 18:02:56.402950 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 18:02:56.403420 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2190 18:02:56.408440 tftpboot 192.168.201.1 11712609/tftp-deploy-8vsrz_ay/kernel/bzIploy-8vsrz_ay/kernel/cmdline 11712609/tftp-deploy-8vsrz_ay/ramdisk/ramdisk.cpio.gz
2191 18:02:56.408921
2192 18:02:56.409283 Waiting for link
2193 18:02:56.612635
2194 18:02:56.613194 done.
2195 18:02:56.613637
2196 18:02:56.613979 MAC: 00:24:32:30:79:42
2197 18:02:56.614303
2198 18:02:56.615160 Sending DHCP discover... done.
2199 18:02:56.615626
2200 18:02:56.618895 Waiting for reply... done.
2201 18:02:56.619672
2202 18:02:56.622443 Sending DHCP request... done.
2203 18:02:56.623108
2204 18:02:56.629182 Waiting for reply... done.
2205 18:02:56.629646
2206 18:02:56.630006 My ip is 192.168.201.13
2207 18:02:56.630342
2208 18:02:56.635478 The DHCP server ip is 192.168.201.1
2209 18:02:56.635979
2210 18:02:56.638955 TFTP server IP predefined by user: 192.168.201.1
2211 18:02:56.639569
2212 18:02:56.645605 Bootfile predefined by user: 11712609/tftp-deploy-8vsrz_ay/kernel/bzImage
2213 18:02:56.646071
2214 18:02:56.648831 Sending tftp read request... done.
2215 18:02:56.649300
2216 18:02:56.658409 Waiting for the transfer...
2217 18:02:56.658874
2218 18:02:57.349537 00000000 ################################################################
2219 18:02:57.350050
2220 18:02:58.033104 00080000 ################################################################
2221 18:02:58.033622
2222 18:02:58.724330 00100000 ################################################################
2223 18:02:58.724926
2224 18:02:59.416206 00180000 ################################################################
2225 18:02:59.416773
2226 18:03:00.113569 00200000 ################################################################
2227 18:03:00.114137
2228 18:03:00.703309 00280000 ################################################################
2229 18:03:00.703491
2230 18:03:01.366865 00300000 ################################################################
2231 18:03:01.367380
2232 18:03:02.052869 00380000 ################################################################
2233 18:03:02.053392
2234 18:03:02.731555 00400000 ################################################################
2235 18:03:02.732149
2236 18:03:03.433175 00480000 ################################################################
2237 18:03:03.433688
2238 18:03:04.098083 00500000 ################################################################
2239 18:03:04.098599
2240 18:03:04.773012 00580000 ################################################################
2241 18:03:04.773551
2242 18:03:05.466082 00600000 ################################################################
2243 18:03:05.466595
2244 18:03:06.043634 00680000 ################################################################
2245 18:03:06.043858
2246 18:03:06.696430 00700000 ################################################################
2247 18:03:06.696952
2248 18:03:07.248675 00780000 ################################################################
2249 18:03:07.248835
2250 18:03:07.366073 00800000 ############# done.
2251 18:03:07.366208
2252 18:03:07.369421 The bootfile was 8490896 bytes long.
2253 18:03:07.369505
2254 18:03:07.372337 Sending tftp read request... done.
2255 18:03:07.372420
2256 18:03:07.375700 Waiting for the transfer...
2257 18:03:07.375824
2258 18:03:08.048145 00000000 ################################################################
2259 18:03:08.048665
2260 18:03:08.764163 00080000 ################################################################
2261 18:03:08.764706
2262 18:03:09.447675 00100000 ################################################################
2263 18:03:09.448333
2264 18:03:10.129742 00180000 ################################################################
2265 18:03:10.130277
2266 18:03:10.746721 00200000 ################################################################
2267 18:03:10.747310
2268 18:03:11.403990 00280000 ################################################################
2269 18:03:11.404801
2270 18:03:12.088669 00300000 ################################################################
2271 18:03:12.089238
2272 18:03:12.791320 00380000 ################################################################
2273 18:03:12.791885
2274 18:03:13.486832 00400000 ################################################################
2275 18:03:13.487366
2276 18:03:14.183910 00480000 ################################################################
2277 18:03:14.184565
2278 18:03:14.883909 00500000 ################################################################
2279 18:03:14.884610
2280 18:03:15.564125 00580000 ################################################################
2281 18:03:15.564698
2282 18:03:15.793288 00600000 ###################### done.
2283 18:03:15.794144
2284 18:03:15.796561 Sending tftp read request... done.
2285 18:03:15.797015
2286 18:03:15.799942 Waiting for the transfer...
2287 18:03:15.800363
2288 18:03:15.803079 00000000 # done.
2289 18:03:15.803519
2290 18:03:15.809519 Command line loaded dynamically from TFTP file: 11712609/tftp-deploy-8vsrz_ay/kernel/cmdline
2291 18:03:15.813205
2292 18:03:15.836100 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712609/extract-nfsrootfs-7yzqqfvd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2293 18:03:15.840986
2294 18:03:15.844351 Shutting down all USB controllers.
2295 18:03:15.844813
2296 18:03:15.845177 Removing current net device
2297 18:03:15.845519
2298 18:03:15.847526 Finalizing coreboot
2299 18:03:15.848042
2300 18:03:15.854065 Exiting depthcharge with code 4 at timestamp: 29278060
2301 18:03:15.854619
2302 18:03:15.854984
2303 18:03:15.855321 Starting kernel ...
2304 18:03:15.855645
2305 18:03:15.856037
2306 18:03:15.857273 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2307 18:03:15.857797 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2308 18:03:15.858204 Setting prompt string to ['Linux version [0-9]']
2309 18:03:15.858588 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2310 18:03:15.858957 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2312 18:07:39.858684 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2314 18:07:39.859821 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2316 18:07:39.860736 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2319 18:07:39.862187 end: 2 depthcharge-action (duration 00:05:00) [common]
2321 18:07:39.863361 Cleaning after the job
2322 18:07:39.863720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/ramdisk
2323 18:07:39.864750 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/kernel
2324 18:07:39.866097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/nfsrootfs
2325 18:07:39.967736 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712609/tftp-deploy-8vsrz_ay/modules
2326 18:07:39.968235 start: 4.1 power-off (timeout 00:00:30) [common]
2327 18:07:39.968429 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2328 18:07:40.049600 >> Command sent successfully.
2329 18:07:40.061240 Returned 0 in 0 seconds
2330 18:07:40.162620 end: 4.1 power-off (duration 00:00:00) [common]
2332 18:07:40.164374 start: 4.2 read-feedback (timeout 00:10:00) [common]
2333 18:07:40.165825 Listened to connection for namespace 'common' for up to 1s
2334 18:07:41.166581 Finalising connection for namespace 'common'
2335 18:07:41.167279 Disconnecting from shell: Finalise
2336 18:07:41.167710
2337 18:07:41.268865 end: 4.2 read-feedback (duration 00:00:01) [common]
2338 18:07:41.269499 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712609
2339 18:07:41.895444 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712609
2340 18:07:41.895656 JobError: Your job cannot terminate cleanly.