Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:50:25.533773 lava-dispatcher, installed at version: 2023.08
2 17:50:25.533980 start: 0 validate
3 17:50:25.534118 Start time: 2023-10-09 17:50:25.534110+00:00 (UTC)
4 17:50:25.534233 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:50:25.534367 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:50:25.802523 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:50:25.802760 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:50:25.804211 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:50:25.804404 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:50:26.070297 validate duration: 0.54
12 17:50:26.071855 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:50:26.072476 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:50:26.073008 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:50:26.073678 Not decompressing ramdisk as can be used compressed.
16 17:50:26.074161 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:50:26.074561 saving as /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/ramdisk/rootfs.cpio.gz
18 17:50:26.074934 total size: 8418130 (8 MB)
19 17:50:26.081466 progress 0 % (0 MB)
20 17:50:26.095377 progress 5 % (0 MB)
21 17:50:26.102983 progress 10 % (0 MB)
22 17:50:26.108488 progress 15 % (1 MB)
23 17:50:26.112868 progress 20 % (1 MB)
24 17:50:26.116741 progress 25 % (2 MB)
25 17:50:26.120267 progress 30 % (2 MB)
26 17:50:26.123251 progress 35 % (2 MB)
27 17:50:26.126199 progress 40 % (3 MB)
28 17:50:26.129075 progress 45 % (3 MB)
29 17:50:26.131632 progress 50 % (4 MB)
30 17:50:26.134164 progress 55 % (4 MB)
31 17:50:26.136500 progress 60 % (4 MB)
32 17:50:26.138721 progress 65 % (5 MB)
33 17:50:26.140984 progress 70 % (5 MB)
34 17:50:26.143218 progress 75 % (6 MB)
35 17:50:26.145473 progress 80 % (6 MB)
36 17:50:26.147734 progress 85 % (6 MB)
37 17:50:26.149950 progress 90 % (7 MB)
38 17:50:26.152200 progress 95 % (7 MB)
39 17:50:26.154267 progress 100 % (8 MB)
40 17:50:26.154503 8 MB downloaded in 0.08 s (100.86 MB/s)
41 17:50:26.154661 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:50:26.154902 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:50:26.154991 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:50:26.155079 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:50:26.155214 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:50:26.155288 saving as /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/kernel/bzImage
48 17:50:26.155351 total size: 8490896 (8 MB)
49 17:50:26.155440 No compression specified
50 17:50:26.156573 progress 0 % (0 MB)
51 17:50:26.158713 progress 5 % (0 MB)
52 17:50:26.161021 progress 10 % (0 MB)
53 17:50:26.163286 progress 15 % (1 MB)
54 17:50:26.165577 progress 20 % (1 MB)
55 17:50:26.167926 progress 25 % (2 MB)
56 17:50:26.170196 progress 30 % (2 MB)
57 17:50:26.172498 progress 35 % (2 MB)
58 17:50:26.174752 progress 40 % (3 MB)
59 17:50:26.177054 progress 45 % (3 MB)
60 17:50:26.179278 progress 50 % (4 MB)
61 17:50:26.181565 progress 55 % (4 MB)
62 17:50:26.183843 progress 60 % (4 MB)
63 17:50:26.186043 progress 65 % (5 MB)
64 17:50:26.188321 progress 70 % (5 MB)
65 17:50:26.190542 progress 75 % (6 MB)
66 17:50:26.192792 progress 80 % (6 MB)
67 17:50:26.195050 progress 85 % (6 MB)
68 17:50:26.197366 progress 90 % (7 MB)
69 17:50:26.199625 progress 95 % (7 MB)
70 17:50:26.201974 progress 100 % (8 MB)
71 17:50:26.202097 8 MB downloaded in 0.05 s (173.24 MB/s)
72 17:50:26.202286 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:50:26.202516 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:50:26.202603 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:50:26.202688 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:50:26.202827 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:50:26.202900 saving as /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/modules/modules.tar
79 17:50:26.202963 total size: 250928 (0 MB)
80 17:50:26.203025 Using unxz to decompress xz
81 17:50:26.207473 progress 13 % (0 MB)
82 17:50:26.207885 progress 26 % (0 MB)
83 17:50:26.208126 progress 39 % (0 MB)
84 17:50:26.209744 progress 52 % (0 MB)
85 17:50:26.211614 progress 65 % (0 MB)
86 17:50:26.213492 progress 78 % (0 MB)
87 17:50:26.215357 progress 91 % (0 MB)
88 17:50:26.217247 progress 100 % (0 MB)
89 17:50:26.223328 0 MB downloaded in 0.02 s (11.76 MB/s)
90 17:50:26.223667 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:50:26.223935 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:50:26.224037 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:50:26.224133 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:50:26.224214 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:50:26.224306 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:50:26.224540 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f
98 17:50:26.224677 makedir: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin
99 17:50:26.224784 makedir: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/tests
100 17:50:26.224883 makedir: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/results
101 17:50:26.225000 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-add-keys
102 17:50:26.225146 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-add-sources
103 17:50:26.225278 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-background-process-start
104 17:50:26.225409 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-background-process-stop
105 17:50:26.225537 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-common-functions
106 17:50:26.225663 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-echo-ipv4
107 17:50:26.225790 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-install-packages
108 17:50:26.225916 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-installed-packages
109 17:50:26.226041 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-os-build
110 17:50:26.226167 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-probe-channel
111 17:50:26.226293 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-probe-ip
112 17:50:26.226419 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-target-ip
113 17:50:26.226545 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-target-mac
114 17:50:26.226669 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-target-storage
115 17:50:26.226806 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-case
116 17:50:26.226934 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-event
117 17:50:26.227061 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-feedback
118 17:50:26.227186 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-raise
119 17:50:26.227314 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-reference
120 17:50:26.227487 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-runner
121 17:50:26.227614 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-set
122 17:50:26.227743 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-test-shell
123 17:50:26.227873 Updating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-install-packages (oe)
124 17:50:26.228026 Updating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/bin/lava-installed-packages (oe)
125 17:50:26.228150 Creating /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/environment
126 17:50:26.228251 LAVA metadata
127 17:50:26.228325 - LAVA_JOB_ID=11712639
128 17:50:26.228391 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:50:26.228493 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:50:26.228559 skipped lava-vland-overlay
131 17:50:26.228636 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:50:26.228716 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:50:26.228782 skipped lava-multinode-overlay
134 17:50:26.228863 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:50:26.228947 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:50:26.229019 Loading test definitions
137 17:50:26.229110 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:50:26.229189 Using /lava-11712639 at stage 0
139 17:50:26.229513 uuid=11712639_1.4.2.3.1 testdef=None
140 17:50:26.229601 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:50:26.229685 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:50:26.230219 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:50:26.230433 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:50:26.231062 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:50:26.231288 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:50:26.231999 runner path: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/0/tests/0_dmesg test_uuid 11712639_1.4.2.3.1
149 17:50:26.232155 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:50:26.232381 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:50:26.232452 Using /lava-11712639 at stage 1
153 17:50:26.232747 uuid=11712639_1.4.2.3.5 testdef=None
154 17:50:26.232835 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:50:26.232917 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:50:26.233383 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:50:26.233603 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:50:26.234251 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:50:26.234478 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:50:26.235104 runner path: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/1/tests/1_bootrr test_uuid 11712639_1.4.2.3.5
163 17:50:26.235277 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:50:26.235571 Creating lava-test-runner.conf files
166 17:50:26.235634 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/0 for stage 0
167 17:50:26.235756 - 0_dmesg
168 17:50:26.235855 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712639/lava-overlay-lw5rpu3f/lava-11712639/1 for stage 1
169 17:50:26.235947 - 1_bootrr
170 17:50:26.236041 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:50:26.236127 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:50:26.244770 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:50:26.244904 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:50:26.244993 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:50:26.245079 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:50:26.245177 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:50:26.502735 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:50:26.503129 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:50:26.503244 extracting modules file /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712639/extract-overlay-ramdisk-grl9pm42/ramdisk
180 17:50:26.516848 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:50:26.516970 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:50:26.517058 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712639/compress-overlay-uj_y1ae4/overlay-1.4.2.4.tar.gz to ramdisk
183 17:50:26.517132 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712639/compress-overlay-uj_y1ae4/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712639/extract-overlay-ramdisk-grl9pm42/ramdisk
184 17:50:26.526091 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:50:26.526207 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:50:26.526301 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:50:26.526393 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:50:26.526476 Building ramdisk /var/lib/lava/dispatcher/tmp/11712639/extract-overlay-ramdisk-grl9pm42/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712639/extract-overlay-ramdisk-grl9pm42/ramdisk
189 17:50:26.673064 >> 49788 blocks
190 17:50:27.521267 rename /var/lib/lava/dispatcher/tmp/11712639/extract-overlay-ramdisk-grl9pm42/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/ramdisk/ramdisk.cpio.gz
191 17:50:27.521746 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:50:27.521888 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:50:27.522008 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:50:27.522125 No mkimage arch provided, not using FIT.
195 17:50:27.522229 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:50:27.522331 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:50:27.522459 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:50:27.522592 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:50:27.522711 No LXC device requested
200 17:50:27.522835 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:50:27.522966 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:50:27.523091 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:50:27.523205 Checking files for TFTP limit of 4294967296 bytes.
204 17:50:27.523791 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:50:27.523935 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:50:27.524069 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:50:27.524229 substitutions:
208 17:50:27.524306 - {DTB}: None
209 17:50:27.524389 - {INITRD}: 11712639/tftp-deploy-dqdt0xrk/ramdisk/ramdisk.cpio.gz
210 17:50:27.524471 - {KERNEL}: 11712639/tftp-deploy-dqdt0xrk/kernel/bzImage
211 17:50:27.524552 - {LAVA_MAC}: None
212 17:50:27.524628 - {PRESEED_CONFIG}: None
213 17:50:27.524705 - {PRESEED_LOCAL}: None
214 17:50:27.524799 - {RAMDISK}: 11712639/tftp-deploy-dqdt0xrk/ramdisk/ramdisk.cpio.gz
215 17:50:27.524897 - {ROOT_PART}: None
216 17:50:27.524991 - {ROOT}: None
217 17:50:27.525087 - {SERVER_IP}: 192.168.201.1
218 17:50:27.525180 - {TEE}: None
219 17:50:27.525274 Parsed boot commands:
220 17:50:27.525367 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:50:27.525595 Parsed boot commands: tftpboot 192.168.201.1 11712639/tftp-deploy-dqdt0xrk/kernel/bzImage 11712639/tftp-deploy-dqdt0xrk/kernel/cmdline 11712639/tftp-deploy-dqdt0xrk/ramdisk/ramdisk.cpio.gz
222 17:50:27.525721 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:50:27.525848 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:50:27.525983 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:50:27.526112 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:50:27.526219 Not connected, no need to disconnect.
227 17:50:27.526336 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:50:27.526464 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:50:27.526567 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-4'
230 17:50:27.530828 Setting prompt string to ['lava-test: # ']
231 17:50:27.531231 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:50:27.531373 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:50:27.531541 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:50:27.531652 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:50:27.531998 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
236 17:50:44.453275 >> Command sent successfully.
237 17:50:44.465133 Returned 0 in 16 seconds
238 17:50:44.566538 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 17:50:44.568214 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 17:50:44.568806 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 17:50:44.569314 Setting prompt string to 'Starting depthcharge on sarien...'
243 17:50:44.569750 Changing prompt to 'Starting depthcharge on sarien...'
244 17:50:44.570218 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 17:50:44.571588 [Enter `^Ec?' for help]
246 17:50:44.572015
247 17:50:44.572446
248 17:50:44.572872 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 17:50:44.573306 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 17:50:44.573817 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 17:50:44.574241 CPU: AES supported, TXT supported, VT supported
252 17:50:44.574640 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 17:50:44.575037 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 17:50:44.575568 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 17:50:44.575970 VBOOT: Loading verstage.
256 17:50:44.576371 CBFS @ 1d00000 size 300000
257 17:50:44.576761 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 17:50:44.577148 CBFS: Locating 'fallback/verstage'
259 17:50:44.577533 CBFS: Found @ offset 10f6c0 size 1435c
260 17:50:44.577920
261 17:50:44.578301
262 17:50:44.578681 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 17:50:44.579179 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 17:50:44.579696 done! DID_VID 0x00281ae0
265 17:50:44.580087 TPM ready after 0 ms
266 17:50:44.580570 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 17:50:44.580956 tlcl_send_startup: Startup return code is 0
268 17:50:44.581337 TPM: setup succeeded
269 17:50:44.581818 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 17:50:44.582213 Checking cr50 for recovery request
271 17:50:44.582603 Phase 1
272 17:50:44.582985 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 17:50:44.583517 FMAP: base = fe000000 size = 2000000 #areas = 37
274 17:50:44.583917 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 17:50:44.584307 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 17:50:44.584696 Phase 2
277 17:50:44.585076 Phase 3
278 17:50:44.585455 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 17:50:44.585901 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 17:50:44.586294 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
281 17:50:44.586678 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
282 17:50:44.587060 VB2:vb2_verify_keyblock() Checking key block signature...
283 17:50:44.587472 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
284 17:50:44.587861 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
285 17:50:44.588243 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 17:50:44.588623 Phase 4
287 17:50:44.589005 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
288 17:50:44.589387 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 17:50:44.589830 VB2:vb2_rsa_verify_digest() Digest check failed!
290 17:50:44.590284 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 17:50:44.590594 Saving nvdata
292 17:50:44.590885 Reboot requested (10020007)
293 17:50:44.591172 board_reset() called!
294 17:50:44.591492 full_reset() called!
295 17:50:48.734086
296 17:50:48.734225
297 17:50:48.741822 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 17:50:48.746635 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 17:50:48.752045 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 17:50:48.756518 CPU: AES supported, TXT supported, VT supported
301 17:50:48.761517 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 17:50:48.766965 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 17:50:48.772273 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 17:50:48.775394 VBOOT: Loading verstage.
305 17:50:48.778111 CBFS @ 1d00000 size 300000
306 17:50:48.785173 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 17:50:48.787849 CBFS: Locating 'fallback/verstage'
308 17:50:48.792264 CBFS: Found @ offset 10f6c0 size 1435c
309 17:50:48.806231
310 17:50:48.806323
311 17:50:48.814796 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 17:50:48.822135 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 17:50:48.945125 .done! DID_VID 0x00281ae0
314 17:50:48.947450 TPM ready after 0 ms
315 17:50:48.951612 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 17:50:49.018668 tlcl_send_startup: Startup return code is 0
317 17:50:49.021110 TPM: setup succeeded
318 17:50:49.039005 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 17:50:49.042233 Checking cr50 for recovery request
320 17:50:49.051484 Phase 1
321 17:50:49.056604 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 17:50:49.061675 FMAP: base = fe000000 size = 2000000 #areas = 37
323 17:50:49.066557 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 17:50:49.072699 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 17:50:49.079515 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 17:50:49.082586 Recovery requested (1009000e)
327 17:50:49.084116 Saving nvdata
328 17:50:49.100072 tlcl_extend: response is 0
329 17:50:49.115304 tlcl_extend: response is 0
330 17:50:49.118573 CBFS @ 1d00000 size 300000
331 17:50:49.124465 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 17:50:49.127776 CBFS: Locating 'fallback/romstage'
333 17:50:49.131573 CBFS: Found @ offset 80 size 15b2c
334 17:50:49.132987
335 17:50:49.133069
336 17:50:49.141593 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 17:50:49.147281 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 17:50:49.151355 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 17:50:49.154928 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 17:50:49.159127 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 17:50:49.164282 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 17:50:49.166277 TCO_STS: 0000 0004
343 17:50:49.168983 GEN_PMCON: d0015209 00002200
344 17:50:49.172143 GBLRST_CAUSE: 00000000 00000000
345 17:50:49.174573 prev_sleep_state 5
346 17:50:49.178173 Boot Count incremented to 37362
347 17:50:49.180862 CBFS @ 1d00000 size 300000
348 17:50:49.187497 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 17:50:49.190075 CBFS: Locating 'fspm.bin'
350 17:50:49.193533 CBFS: Found @ offset 60fc0 size 70000
351 17:50:49.198824 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 17:50:49.204403 FMAP: base = fe000000 size = 2000000 #areas = 37
353 17:50:49.209610 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 17:50:49.215784 Probing TPM I2C: done! DID_VID 0x00281ae0
355 17:50:49.218762 Locality already claimed
356 17:50:49.222072 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 17:50:49.242078 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 17:50:49.248108 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 17:50:49.251128 MRC cache found, size 18e0
360 17:50:49.253248 bootmode is set to :2
361 17:50:49.346422 CBMEM:
362 17:50:49.349549 IMD: root @ 89fff000 254 entries.
363 17:50:49.353253 IMD: root @ 89ffec00 62 entries.
364 17:50:49.355833 External stage cache:
365 17:50:49.360153 IMD: root @ 8abff000 254 entries.
366 17:50:49.363301 IMD: root @ 8abfec00 62 entries.
367 17:50:49.369067 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 17:50:49.372471 creating vboot_handoff structure
369 17:50:49.393236 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 17:50:49.408974 tlcl_write: response is 0
371 17:50:49.428503 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 17:50:49.432438 MRC: TPM MRC hash updated successfully.
373 17:50:49.433701 1 DIMMs found
374 17:50:49.435364 top_of_ram = 0x8a000000
375 17:50:49.441490 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 17:50:49.446170 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 17:50:49.448590 CBFS @ 1d00000 size 300000
378 17:50:49.455277 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 17:50:49.458840 CBFS: Locating 'fallback/postcar'
380 17:50:49.461982 CBFS: Found @ offset 107000 size 41a4
381 17:50:49.468750 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 17:50:49.478899 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 17:50:49.483820 Processing 126 relocs. Offset value of 0x87cdd000
384 17:50:49.487354
385 17:50:49.487488
386 17:50:49.494849 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 17:50:49.498073 CBFS @ 1d00000 size 300000
388 17:50:49.504264 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 17:50:49.508183 CBFS: Locating 'fallback/ramstage'
390 17:50:49.512305 CBFS: Found @ offset 458c0 size 1a8a8
391 17:50:49.518884 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 17:50:49.547772 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 17:50:49.552422 Processing 3754 relocs. Offset value of 0x88e81000
394 17:50:49.559199
395 17:50:49.559292
396 17:50:49.567742 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 17:50:49.572351 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 17:50:49.576694 FMAP: base = fe000000 size = 2000000 #areas = 37
399 17:50:49.581320 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 17:50:49.585801 WARNING: RO_VPD is uninitialized or empty.
401 17:50:49.590520 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 17:50:49.594978 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 17:50:49.596351 Normal boot.
404 17:50:49.602971 BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1160
405 17:50:49.606380 CBFS @ 1d00000 size 300000
406 17:50:49.612582 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 17:50:49.616635 CBFS: Locating 'cpu_microcode_blob.bin'
408 17:50:49.620146 CBFS: Found @ offset 15c40 size 2fc00
409 17:50:49.624800 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 17:50:49.626821 Skip microcode update
411 17:50:49.629989 CBFS @ 1d00000 size 300000
412 17:50:49.636233 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 17:50:49.638442 CBFS: Locating 'fsps.bin'
414 17:50:49.642972 CBFS: Found @ offset d1fc0 size 35000
415 17:50:49.677764 Detected 4 core, 8 thread CPU.
416 17:50:49.679231 Setting up SMI for CPU
417 17:50:49.681866 IED base = 0x8ac00000
418 17:50:49.683831 IED size = 0x00400000
419 17:50:49.686937 Will perform SMM setup.
420 17:50:49.691685 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 17:50:49.698867 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 17:50:49.704653 Processing 16 relocs. Offset value of 0x00030000
423 17:50:49.707325 Attempting to start 7 APs
424 17:50:49.710563 Waiting for 10ms after sending INIT.
425 17:50:49.726224 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
426 17:50:49.727389 done.
427 17:50:49.729115 AP: slot 5 apic_id 5.
428 17:50:49.731769 AP: slot 4 apic_id 4.
429 17:50:49.733775 AP: slot 7 apic_id 7.
430 17:50:49.736821 AP: slot 6 apic_id 6.
431 17:50:49.740073 Waiting for 2nd SIPI to complete...done.
432 17:50:49.742593 AP: slot 1 apic_id 2.
433 17:50:49.745104 AP: slot 3 apic_id 3.
434 17:50:49.752544 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 17:50:49.757323 Processing 13 relocs. Offset value of 0x00038000
436 17:50:49.763898 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 17:50:49.767197 Installing SMM handler to 0x8a000000
438 17:50:49.775660 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 17:50:49.781038 Processing 867 relocs. Offset value of 0x8a010000
440 17:50:49.789468 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 17:50:49.793809 Processing 13 relocs. Offset value of 0x8a008000
442 17:50:49.799949 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 17:50:49.805724 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 17:50:49.811951 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 17:50:49.817829 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 17:50:49.822924 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 17:50:49.828486 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 17:50:49.834947 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 17:50:49.840631 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 17:50:49.844753 Clearing SMI status registers
451 17:50:49.845506 SMI_STS: PM1
452 17:50:49.847841 PM1_STS: WAK PWRBTN
453 17:50:49.850173 TCO_STS: BOOT SECOND_TO
454 17:50:49.852505 GPE0 STD STS: eSPI
455 17:50:49.854566 New SMBASE 0x8a000000
456 17:50:49.857320 In relocation handler: CPU 0
457 17:50:49.862136 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 17:50:49.866882 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 17:50:49.869027 Relocation complete.
460 17:50:49.871156 New SMBASE 0x89fff800
461 17:50:49.874244 In relocation handler: CPU 2
462 17:50:49.877746 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
463 17:50:49.882891 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 17:50:49.885016 Relocation complete.
465 17:50:49.887348 New SMBASE 0x89fff400
466 17:50:49.890085 In relocation handler: CPU 3
467 17:50:49.894287 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
468 17:50:49.899979 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 17:50:49.901782 Relocation complete.
470 17:50:49.904398 New SMBASE 0x89fffc00
471 17:50:49.906948 In relocation handler: CPU 1
472 17:50:49.910936 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
473 17:50:49.915140 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 17:50:49.917660 Relocation complete.
475 17:50:49.920276 New SMBASE 0x89fff000
476 17:50:49.923647 In relocation handler: CPU 4
477 17:50:49.926877 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
478 17:50:49.931444 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 17:50:49.934098 Relocation complete.
480 17:50:49.936693 New SMBASE 0x89ffec00
481 17:50:49.938818 In relocation handler: CPU 5
482 17:50:49.944016 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
483 17:50:49.948454 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 17:50:49.950313 Relocation complete.
485 17:50:49.952777 New SMBASE 0x89ffe800
486 17:50:49.955338 In relocation handler: CPU 6
487 17:50:49.959526 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
488 17:50:49.965081 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 17:50:49.966941 Relocation complete.
490 17:50:49.968700 New SMBASE 0x89ffe400
491 17:50:49.971719 In relocation handler: CPU 7
492 17:50:49.975657 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
493 17:50:49.980563 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 17:50:49.983153 Relocation complete.
495 17:50:49.984924 Initializing CPU #0
496 17:50:49.988033 CPU: vendor Intel device 806ec
497 17:50:49.992076 CPU: family 06, model 8e, stepping 0c
498 17:50:49.994711 Clearing out pending MCEs
499 17:50:49.999325 Setting up local APIC... apic_id: 0x00 done.
500 17:50:50.002575 Turbo is available but hidden
501 17:50:50.004329 Turbo has been enabled
502 17:50:50.007041 VMX status: enabled
503 17:50:50.009721 IA32_FEATURE_CONTROL status: locked
504 17:50:50.012672 Skip microcode update
505 17:50:50.014204 CPU #0 initialized
506 17:50:50.016233 Initializing CPU #2
507 17:50:50.018297 Initializing CPU #6
508 17:50:50.020308 Initializing CPU #7
509 17:50:50.024084 CPU: vendor Intel device 806ec
510 17:50:50.027350 CPU: family 06, model 8e, stepping 0c
511 17:50:50.031229 CPU: vendor Intel device 806ec
512 17:50:50.034182 CPU: family 06, model 8e, stepping 0c
513 17:50:50.036773 Clearing out pending MCEs
514 17:50:50.040236 Clearing out pending MCEs
515 17:50:50.044405 Setting up local APIC...Initializing CPU #4
516 17:50:50.045831 Initializing CPU #5
517 17:50:50.049550 CPU: vendor Intel device 806ec
518 17:50:50.052953 CPU: family 06, model 8e, stepping 0c
519 17:50:50.056359 CPU: vendor Intel device 806ec
520 17:50:50.059678 CPU: family 06, model 8e, stepping 0c
521 17:50:50.062567 Clearing out pending MCEs
522 17:50:50.064719 Clearing out pending MCEs
523 17:50:50.069350 Setting up local APIC...Initializing CPU #1
524 17:50:50.071314 Initializing CPU #3
525 17:50:50.074659 CPU: vendor Intel device 806ec
526 17:50:50.078449 CPU: family 06, model 8e, stepping 0c
527 17:50:50.081847 CPU: vendor Intel device 806ec
528 17:50:50.085536 CPU: family 06, model 8e, stepping 0c
529 17:50:50.088020 Clearing out pending MCEs
530 17:50:50.090958 Clearing out pending MCEs
531 17:50:50.097509 Setting up local APIC...Setting up local APIC... apic_id: 0x02 done.
532 17:50:50.101581 Setting up local APIC... apic_id: 0x04 done.
533 17:50:50.107629 Setting up local APIC...CPU: vendor Intel device 806ec
534 17:50:50.111241 CPU: family 06, model 8e, stepping 0c
535 17:50:50.112842 apic_id: 0x03 done.
536 17:50:50.115741 VMX status: enabled
537 17:50:50.117578 VMX status: enabled
538 17:50:50.121008 IA32_FEATURE_CONTROL status: locked
539 17:50:50.124373 IA32_FEATURE_CONTROL status: locked
540 17:50:50.126429 Skip microcode update
541 17:50:50.129159 Skip microcode update
542 17:50:50.131606 CPU #1 initialized
543 17:50:50.133568 CPU #3 initialized
544 17:50:50.135515 apic_id: 0x07 done.
545 17:50:50.137007 apic_id: 0x06 done.
546 17:50:50.139146 VMX status: enabled
547 17:50:50.141553 VMX status: enabled
548 17:50:50.145060 IA32_FEATURE_CONTROL status: locked
549 17:50:50.148722 IA32_FEATURE_CONTROL status: locked
550 17:50:50.150517 Skip microcode update
551 17:50:50.153139 Skip microcode update
552 17:50:50.154682 CPU #7 initialized
553 17:50:50.157049 CPU #6 initialized
554 17:50:50.159757 Clearing out pending MCEs
555 17:50:50.161595 apic_id: 0x05 done.
556 17:50:50.163588 VMX status: enabled
557 17:50:50.166264 VMX status: enabled
558 17:50:50.169339 IA32_FEATURE_CONTROL status: locked
559 17:50:50.173283 IA32_FEATURE_CONTROL status: locked
560 17:50:50.174637 Skip microcode update
561 17:50:50.177967 Skip microcode update
562 17:50:50.179310 CPU #4 initialized
563 17:50:50.181383 CPU #5 initialized
564 17:50:50.186430 Setting up local APIC... apic_id: 0x01 done.
565 17:50:50.187782 VMX status: enabled
566 17:50:50.190939 IA32_FEATURE_CONTROL status: locked
567 17:50:50.193687 Skip microcode update
568 17:50:50.195931 CPU #2 initialized
569 17:50:50.199657 bsp_do_flight_plan done after 455 msecs.
570 17:50:50.203687 CPU: frequency set to 4800 MHz
571 17:50:50.204510 Enabling SMIs.
572 17:50:50.205615 Locking SMM.
573 17:50:50.209102 CBFS @ 1d00000 size 300000
574 17:50:50.215015 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 17:50:50.218152 CBFS: Locating 'vbt.bin'
576 17:50:50.222069 CBFS: Found @ offset 60a40 size 4a0
577 17:50:50.226236 Found a VBT of 4608 bytes after decompression
578 17:50:50.239617 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 17:50:50.299408 Detected 4 core, 8 thread CPU.
580 17:50:50.302536 Detected 4 core, 8 thread CPU.
581 17:50:50.529814 Display FSP Version Info HOB
582 17:50:50.532242 Reference Code - CPU = 7.0.5e.40
583 17:50:50.535184 uCode Version = 0.0.0.b8
584 17:50:50.538705 Display FSP Version Info HOB
585 17:50:50.540886 Reference Code - ME = 7.0.5e.40
586 17:50:50.543683 MEBx version = 0.0.0.0
587 17:50:50.547370 ME Firmware Version = Consumer SKU
588 17:50:50.550119 Display FSP Version Info HOB
589 17:50:50.554441 Reference Code - CNL PCH = 7.0.5e.40
590 17:50:50.556706 PCH-CRID Status = Disabled
591 17:50:50.559812 CNL PCH H A0 Hsio Version = 2.0.0.0
592 17:50:50.563895 CNL PCH H Ax Hsio Version = 9.0.0.0
593 17:50:50.566939 CNL PCH H Bx Hsio Version = a.0.0.0
594 17:50:50.571422 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 17:50:50.574801 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 17:50:50.578529 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 17:50:50.581122 Display FSP Version Info HOB
598 17:50:50.585681 Reference Code - SA - System Agent = 7.0.5e.40
599 17:50:50.588895 Reference Code - MRC = 0.7.1.68
600 17:50:50.592182 SA - PCIe Version = 7.0.5e.40
601 17:50:50.595166 SA-CRID Status = Disabled
602 17:50:50.597847 SA-CRID Original Value = 0.0.0.c
603 17:50:50.600899 SA-CRID New Value = 0.0.0.c
604 17:50:50.619863 RTC Init
605 17:50:50.623720 Set power off after power failure.
606 17:50:50.625114 Disabling Deep S3
607 17:50:50.627490 Disabling Deep S3
608 17:50:50.629396 Disabling Deep S4
609 17:50:50.630689 Disabling Deep S4
610 17:50:50.632583 Disabling Deep S5
611 17:50:50.634573 Disabling Deep S5
612 17:50:50.641631 BS: BS_DEV_INIT_CHIPS times (us): entry 602638 run 412266 exit 16228
613 17:50:50.642877 Enumerating buses...
614 17:50:50.647872 Show all devs... Before device enumeration.
615 17:50:50.650385 Root Device: enabled 1
616 17:50:50.652500 CPU_CLUSTER: 0: enabled 1
617 17:50:50.655042 DOMAIN: 0000: enabled 1
618 17:50:50.657132 APIC: 00: enabled 1
619 17:50:50.659499 PCI: 00:00.0: enabled 1
620 17:50:50.662156 PCI: 00:02.0: enabled 1
621 17:50:50.664211 PCI: 00:04.0: enabled 1
622 17:50:50.666995 PCI: 00:12.0: enabled 1
623 17:50:50.669911 PCI: 00:12.5: enabled 0
624 17:50:50.671395 PCI: 00:12.6: enabled 0
625 17:50:50.674245 PCI: 00:13.0: enabled 0
626 17:50:50.676550 PCI: 00:14.0: enabled 1
627 17:50:50.679515 PCI: 00:14.1: enabled 0
628 17:50:50.681512 PCI: 00:14.3: enabled 1
629 17:50:50.683737 PCI: 00:14.5: enabled 0
630 17:50:50.686694 PCI: 00:15.0: enabled 1
631 17:50:50.688376 PCI: 00:15.1: enabled 1
632 17:50:50.690739 PCI: 00:15.2: enabled 0
633 17:50:50.693733 PCI: 00:15.3: enabled 0
634 17:50:50.696269 PCI: 00:16.0: enabled 1
635 17:50:50.698626 PCI: 00:16.1: enabled 0
636 17:50:50.701281 PCI: 00:16.2: enabled 0
637 17:50:50.703762 PCI: 00:16.3: enabled 0
638 17:50:50.705352 PCI: 00:16.4: enabled 0
639 17:50:50.708178 PCI: 00:16.5: enabled 0
640 17:50:50.710810 PCI: 00:17.0: enabled 1
641 17:50:50.713519 PCI: 00:19.0: enabled 1
642 17:50:50.716102 PCI: 00:19.1: enabled 0
643 17:50:50.718033 PCI: 00:19.2: enabled 1
644 17:50:50.720593 PCI: 00:1a.0: enabled 0
645 17:50:50.723354 PCI: 00:1c.0: enabled 1
646 17:50:50.725670 PCI: 00:1c.1: enabled 0
647 17:50:50.727251 PCI: 00:1c.2: enabled 0
648 17:50:50.729826 PCI: 00:1c.3: enabled 0
649 17:50:50.732464 PCI: 00:1c.4: enabled 0
650 17:50:50.735561 PCI: 00:1c.5: enabled 0
651 17:50:50.737461 PCI: 00:1c.6: enabled 0
652 17:50:50.740085 PCI: 00:1c.7: enabled 1
653 17:50:50.742586 PCI: 00:1d.0: enabled 1
654 17:50:50.744487 PCI: 00:1d.1: enabled 1
655 17:50:50.747727 PCI: 00:1d.2: enabled 0
656 17:50:50.749013 PCI: 00:1d.3: enabled 0
657 17:50:50.752214 PCI: 00:1d.4: enabled 1
658 17:50:50.754726 PCI: 00:1e.0: enabled 0
659 17:50:50.756721 PCI: 00:1e.1: enabled 0
660 17:50:50.759122 PCI: 00:1e.2: enabled 0
661 17:50:50.762237 PCI: 00:1e.3: enabled 0
662 17:50:50.764228 PCI: 00:1f.0: enabled 1
663 17:50:50.766465 PCI: 00:1f.1: enabled 1
664 17:50:50.768935 PCI: 00:1f.2: enabled 1
665 17:50:50.771109 PCI: 00:1f.3: enabled 1
666 17:50:50.774053 PCI: 00:1f.4: enabled 1
667 17:50:50.776690 PCI: 00:1f.5: enabled 1
668 17:50:50.779268 PCI: 00:1f.6: enabled 1
669 17:50:50.781119 USB0 port 0: enabled 1
670 17:50:50.783116 I2C: 00:10: enabled 1
671 17:50:50.785501 I2C: 00:10: enabled 1
672 17:50:50.788067 I2C: 00:34: enabled 1
673 17:50:50.790132 I2C: 00:2c: enabled 1
674 17:50:50.791895 I2C: 00:50: enabled 1
675 17:50:50.794929 PNP: 0c09.0: enabled 1
676 17:50:50.796996 USB2 port 0: enabled 1
677 17:50:50.799492 USB2 port 1: enabled 1
678 17:50:50.801573 USB2 port 2: enabled 1
679 17:50:50.803363 USB2 port 4: enabled 1
680 17:50:50.806316 USB2 port 5: enabled 1
681 17:50:50.809202 USB2 port 6: enabled 1
682 17:50:50.811024 USB2 port 7: enabled 1
683 17:50:50.812989 USB2 port 8: enabled 1
684 17:50:50.815963 USB2 port 9: enabled 1
685 17:50:50.818027 USB3 port 0: enabled 1
686 17:50:50.820531 USB3 port 1: enabled 1
687 17:50:50.823014 USB3 port 2: enabled 1
688 17:50:50.824530 USB3 port 3: enabled 1
689 17:50:50.827606 USB3 port 4: enabled 1
690 17:50:50.829568 APIC: 02: enabled 1
691 17:50:50.831591 APIC: 01: enabled 1
692 17:50:50.832939 APIC: 03: enabled 1
693 17:50:50.835901 APIC: 04: enabled 1
694 17:50:50.837144 APIC: 05: enabled 1
695 17:50:50.839041 APIC: 06: enabled 1
696 17:50:50.841605 APIC: 07: enabled 1
697 17:50:50.843502 Compare with tree...
698 17:50:50.846428 Root Device: enabled 1
699 17:50:50.848845 CPU_CLUSTER: 0: enabled 1
700 17:50:50.851293 APIC: 00: enabled 1
701 17:50:50.852784 APIC: 02: enabled 1
702 17:50:50.855770 APIC: 01: enabled 1
703 17:50:50.857403 APIC: 03: enabled 1
704 17:50:50.859930 APIC: 04: enabled 1
705 17:50:50.862401 APIC: 05: enabled 1
706 17:50:50.864387 APIC: 06: enabled 1
707 17:50:50.866587 APIC: 07: enabled 1
708 17:50:50.868931 DOMAIN: 0000: enabled 1
709 17:50:50.872205 PCI: 00:00.0: enabled 1
710 17:50:50.874745 PCI: 00:02.0: enabled 1
711 17:50:50.877198 PCI: 00:04.0: enabled 1
712 17:50:50.879310 PCI: 00:12.0: enabled 1
713 17:50:50.881903 PCI: 00:12.5: enabled 0
714 17:50:50.885017 PCI: 00:12.6: enabled 0
715 17:50:50.887579 PCI: 00:13.0: enabled 0
716 17:50:50.890114 PCI: 00:14.0: enabled 1
717 17:50:50.892333 USB0 port 0: enabled 1
718 17:50:50.895590 USB2 port 0: enabled 1
719 17:50:50.897728 USB2 port 1: enabled 1
720 17:50:50.901226 USB2 port 2: enabled 1
721 17:50:50.903275 USB2 port 4: enabled 1
722 17:50:50.906405 USB2 port 5: enabled 1
723 17:50:50.909273 USB2 port 6: enabled 1
724 17:50:50.911541 USB2 port 7: enabled 1
725 17:50:50.914213 USB2 port 8: enabled 1
726 17:50:50.917910 USB2 port 9: enabled 1
727 17:50:50.919540 USB3 port 0: enabled 1
728 17:50:50.922275 USB3 port 1: enabled 1
729 17:50:50.925199 USB3 port 2: enabled 1
730 17:50:50.928186 USB3 port 3: enabled 1
731 17:50:50.930591 USB3 port 4: enabled 1
732 17:50:50.933456 PCI: 00:14.1: enabled 0
733 17:50:50.935655 PCI: 00:14.3: enabled 1
734 17:50:50.939011 PCI: 00:14.5: enabled 0
735 17:50:50.941934 PCI: 00:15.0: enabled 1
736 17:50:50.943422 I2C: 00:10: enabled 1
737 17:50:50.946141 I2C: 00:10: enabled 1
738 17:50:50.949242 I2C: 00:34: enabled 1
739 17:50:50.952012 PCI: 00:15.1: enabled 1
740 17:50:50.953776 I2C: 00:2c: enabled 1
741 17:50:50.957110 PCI: 00:15.2: enabled 0
742 17:50:50.959323 PCI: 00:15.3: enabled 0
743 17:50:50.961807 PCI: 00:16.0: enabled 1
744 17:50:50.965060 PCI: 00:16.1: enabled 0
745 17:50:50.967595 PCI: 00:16.2: enabled 0
746 17:50:50.969455 PCI: 00:16.3: enabled 0
747 17:50:50.972065 PCI: 00:16.4: enabled 0
748 17:50:50.975107 PCI: 00:16.5: enabled 0
749 17:50:50.978431 PCI: 00:17.0: enabled 1
750 17:50:50.980867 PCI: 00:19.0: enabled 1
751 17:50:50.982944 I2C: 00:50: enabled 1
752 17:50:50.986003 PCI: 00:19.1: enabled 0
753 17:50:50.987924 PCI: 00:19.2: enabled 1
754 17:50:50.990604 PCI: 00:1a.0: enabled 0
755 17:50:50.993392 PCI: 00:1c.0: enabled 1
756 17:50:50.996369 PCI: 00:1c.1: enabled 0
757 17:50:50.998797 PCI: 00:1c.2: enabled 0
758 17:50:51.001302 PCI: 00:1c.3: enabled 0
759 17:50:51.003595 PCI: 00:1c.4: enabled 0
760 17:50:51.006420 PCI: 00:1c.5: enabled 0
761 17:50:51.009207 PCI: 00:1c.6: enabled 0
762 17:50:51.011574 PCI: 00:1c.7: enabled 1
763 17:50:51.014108 PCI: 00:1d.0: enabled 1
764 17:50:51.017426 PCI: 00:1d.1: enabled 1
765 17:50:51.019404 PCI: 00:1d.2: enabled 0
766 17:50:51.022379 PCI: 00:1d.3: enabled 0
767 17:50:51.024606 PCI: 00:1d.4: enabled 1
768 17:50:51.027744 PCI: 00:1e.0: enabled 0
769 17:50:51.029581 PCI: 00:1e.1: enabled 0
770 17:50:51.033306 PCI: 00:1e.2: enabled 0
771 17:50:51.035927 PCI: 00:1e.3: enabled 0
772 17:50:51.037928 PCI: 00:1f.0: enabled 1
773 17:50:51.040473 PNP: 0c09.0: enabled 1
774 17:50:51.042878 PCI: 00:1f.1: enabled 1
775 17:50:51.046300 PCI: 00:1f.2: enabled 1
776 17:50:51.048963 PCI: 00:1f.3: enabled 1
777 17:50:51.051604 PCI: 00:1f.4: enabled 1
778 17:50:51.053244 PCI: 00:1f.5: enabled 1
779 17:50:51.056233 PCI: 00:1f.6: enabled 1
780 17:50:51.059282 Root Device scanning...
781 17:50:51.062580 root_dev_scan_bus for Root Device
782 17:50:51.065265 CPU_CLUSTER: 0 enabled
783 17:50:51.066707 DOMAIN: 0000 enabled
784 17:50:51.069947 DOMAIN: 0000 scanning...
785 17:50:51.073378 PCI: pci_scan_bus for bus 00
786 17:50:51.075247 PCI: 00:00.0 [8086/0000] ops
787 17:50:51.079155 PCI: 00:00.0 [8086/3e34] enabled
788 17:50:51.081554 PCI: 00:02.0 [8086/0000] ops
789 17:50:51.085714 PCI: 00:02.0 [8086/3ea0] enabled
790 17:50:51.088370 PCI: 00:04.0 [8086/1903] enabled
791 17:50:51.092306 PCI: 00:08.0 [8086/1911] enabled
792 17:50:51.095199 PCI: 00:12.0 [8086/9df9] enabled
793 17:50:51.098652 PCI: 00:14.0 [8086/0000] bus ops
794 17:50:51.102368 PCI: 00:14.0 [8086/9ded] enabled
795 17:50:51.105496 PCI: 00:14.2 [8086/9def] enabled
796 17:50:51.108112 PCI: 00:14.3 [8086/9df0] enabled
797 17:50:51.112259 PCI: 00:15.0 [8086/0000] bus ops
798 17:50:51.114729 PCI: 00:15.0 [8086/9de8] enabled
799 17:50:51.118864 PCI: 00:15.1 [8086/0000] bus ops
800 17:50:51.121486 PCI: 00:15.1 [8086/9de9] enabled
801 17:50:51.124838 PCI: 00:16.0 [8086/0000] ops
802 17:50:51.128362 PCI: 00:16.0 [8086/9de0] enabled
803 17:50:51.131576 PCI: 00:17.0 [8086/0000] ops
804 17:50:51.134812 PCI: 00:17.0 [8086/9dd3] enabled
805 17:50:51.137936 PCI: 00:19.0 [8086/0000] bus ops
806 17:50:51.140683 PCI: 00:19.0 [8086/9dc5] enabled
807 17:50:51.143613 PCI: 00:19.2 [8086/0000] ops
808 17:50:51.147503 PCI: 00:19.2 [8086/9dc7] enabled
809 17:50:51.150773 PCI: 00:1c.0 [8086/0000] bus ops
810 17:50:51.154115 PCI: 00:1c.0 [8086/9dbf] enabled
811 17:50:51.158917 PCI: Static device PCI: 00:1c.7 not found, disabling it.
812 17:50:51.162763 PCI: 00:1d.0 [8086/0000] bus ops
813 17:50:51.166400 PCI: 00:1d.0 [8086/9db4] enabled
814 17:50:51.171334 PCI: Static device PCI: 00:1d.1 not found, disabling it.
815 17:50:51.177936 PCI: Static device PCI: 00:1d.4 not found, disabling it.
816 17:50:51.181234 PCI: 00:1f.0 [8086/0000] bus ops
817 17:50:51.183969 PCI: 00:1f.0 [8086/9d84] enabled
818 17:50:51.189635 PCI: Static device PCI: 00:1f.1 not found, disabling it.
819 17:50:51.195453 PCI: Static device PCI: 00:1f.2 not found, disabling it.
820 17:50:51.198953 PCI: 00:1f.3 [8086/0000] bus ops
821 17:50:51.202369 PCI: 00:1f.3 [8086/9dc8] enabled
822 17:50:51.205711 PCI: 00:1f.4 [8086/0000] bus ops
823 17:50:51.208937 PCI: 00:1f.4 [8086/9da3] enabled
824 17:50:51.211613 PCI: 00:1f.5 [8086/0000] bus ops
825 17:50:51.215078 PCI: 00:1f.5 [8086/9da4] enabled
826 17:50:51.218176 PCI: 00:1f.6 [8086/15be] enabled
827 17:50:51.221098 PCI: Leftover static devices:
828 17:50:51.222984 PCI: 00:12.5
829 17:50:51.224527 PCI: 00:12.6
830 17:50:51.225954 PCI: 00:13.0
831 17:50:51.226668 PCI: 00:14.1
832 17:50:51.228109 PCI: 00:14.5
833 17:50:51.230050 PCI: 00:15.2
834 17:50:51.231316 PCI: 00:15.3
835 17:50:51.232543 PCI: 00:16.1
836 17:50:51.233399 PCI: 00:16.2
837 17:50:51.234906 PCI: 00:16.3
838 17:50:51.236906 PCI: 00:16.4
839 17:50:51.237663 PCI: 00:16.5
840 17:50:51.238771 PCI: 00:19.1
841 17:50:51.240457 PCI: 00:1a.0
842 17:50:51.241672 PCI: 00:1c.1
843 17:50:51.243570 PCI: 00:1c.2
844 17:50:51.244267 PCI: 00:1c.3
845 17:50:51.245701 PCI: 00:1c.4
846 17:50:51.247293 PCI: 00:1c.5
847 17:50:51.248748 PCI: 00:1c.6
848 17:50:51.250029 PCI: 00:1c.7
849 17:50:51.251204 PCI: 00:1d.1
850 17:50:51.253123 PCI: 00:1d.2
851 17:50:51.254373 PCI: 00:1d.3
852 17:50:51.256173 PCI: 00:1d.4
853 17:50:51.257052 PCI: 00:1e.0
854 17:50:51.258334 PCI: 00:1e.1
855 17:50:51.260111 PCI: 00:1e.2
856 17:50:51.261373 PCI: 00:1e.3
857 17:50:51.262716 PCI: 00:1f.1
858 17:50:51.263546 PCI: 00:1f.2
859 17:50:51.267521 PCI: Check your devicetree.cb.
860 17:50:51.270011 PCI: 00:14.0 scanning...
861 17:50:51.272844 scan_usb_bus for PCI: 00:14.0
862 17:50:51.274591 USB0 port 0 enabled
863 17:50:51.277189 USB0 port 0 scanning...
864 17:50:51.281000 scan_usb_bus for USB0 port 0
865 17:50:51.282573 USB2 port 0 enabled
866 17:50:51.284920 USB2 port 1 enabled
867 17:50:51.286207 USB2 port 2 enabled
868 17:50:51.288501 USB2 port 4 enabled
869 17:50:51.290923 USB2 port 5 enabled
870 17:50:51.292416 USB2 port 6 enabled
871 17:50:51.294784 USB2 port 7 enabled
872 17:50:51.296888 USB2 port 8 enabled
873 17:50:51.299127 USB2 port 9 enabled
874 17:50:51.300663 USB3 port 0 enabled
875 17:50:51.303495 USB3 port 1 enabled
876 17:50:51.305215 USB3 port 2 enabled
877 17:50:51.307248 USB3 port 3 enabled
878 17:50:51.309224 USB3 port 4 enabled
879 17:50:51.311324 USB2 port 0 scanning...
880 17:50:51.314630 scan_usb_bus for USB2 port 0
881 17:50:51.318619 scan_usb_bus for USB2 port 0 done
882 17:50:51.323210 scan_bus: scanning of bus USB2 port 0 took 9056 usecs
883 17:50:51.325969 USB2 port 1 scanning...
884 17:50:51.329708 scan_usb_bus for USB2 port 1
885 17:50:51.332834 scan_usb_bus for USB2 port 1 done
886 17:50:51.338014 scan_bus: scanning of bus USB2 port 1 took 9057 usecs
887 17:50:51.339862 USB2 port 2 scanning...
888 17:50:51.343430 scan_usb_bus for USB2 port 2
889 17:50:51.346648 scan_usb_bus for USB2 port 2 done
890 17:50:51.352243 scan_bus: scanning of bus USB2 port 2 took 9057 usecs
891 17:50:51.354126 USB2 port 4 scanning...
892 17:50:51.357592 scan_usb_bus for USB2 port 4
893 17:50:51.360706 scan_usb_bus for USB2 port 4 done
894 17:50:51.366738 scan_bus: scanning of bus USB2 port 4 took 9057 usecs
895 17:50:51.368801 USB2 port 5 scanning...
896 17:50:51.372614 scan_usb_bus for USB2 port 5
897 17:50:51.376104 scan_usb_bus for USB2 port 5 done
898 17:50:51.381243 scan_bus: scanning of bus USB2 port 5 took 9058 usecs
899 17:50:51.383738 USB2 port 6 scanning...
900 17:50:51.386536 scan_usb_bus for USB2 port 6
901 17:50:51.389853 scan_usb_bus for USB2 port 6 done
902 17:50:51.395670 scan_bus: scanning of bus USB2 port 6 took 9058 usecs
903 17:50:51.397774 USB2 port 7 scanning...
904 17:50:51.401043 scan_usb_bus for USB2 port 7
905 17:50:51.404395 scan_usb_bus for USB2 port 7 done
906 17:50:51.409437 scan_bus: scanning of bus USB2 port 7 took 9057 usecs
907 17:50:51.412517 USB2 port 8 scanning...
908 17:50:51.415787 scan_usb_bus for USB2 port 8
909 17:50:51.418614 scan_usb_bus for USB2 port 8 done
910 17:50:51.424716 scan_bus: scanning of bus USB2 port 8 took 9058 usecs
911 17:50:51.426613 USB2 port 9 scanning...
912 17:50:51.430430 scan_usb_bus for USB2 port 9
913 17:50:51.433728 scan_usb_bus for USB2 port 9 done
914 17:50:51.438487 scan_bus: scanning of bus USB2 port 9 took 9056 usecs
915 17:50:51.441247 USB3 port 0 scanning...
916 17:50:51.444432 scan_usb_bus for USB3 port 0
917 17:50:51.447308 scan_usb_bus for USB3 port 0 done
918 17:50:51.453096 scan_bus: scanning of bus USB3 port 0 took 9054 usecs
919 17:50:51.455264 USB3 port 1 scanning...
920 17:50:51.458820 scan_usb_bus for USB3 port 1
921 17:50:51.462466 scan_usb_bus for USB3 port 1 done
922 17:50:51.467052 scan_bus: scanning of bus USB3 port 1 took 9057 usecs
923 17:50:51.469476 USB3 port 2 scanning...
924 17:50:51.473284 scan_usb_bus for USB3 port 2
925 17:50:51.476040 scan_usb_bus for USB3 port 2 done
926 17:50:51.482063 scan_bus: scanning of bus USB3 port 2 took 9057 usecs
927 17:50:51.484137 USB3 port 3 scanning...
928 17:50:51.487589 scan_usb_bus for USB3 port 3
929 17:50:51.491253 scan_usb_bus for USB3 port 3 done
930 17:50:51.496144 scan_bus: scanning of bus USB3 port 3 took 9057 usecs
931 17:50:51.498769 USB3 port 4 scanning...
932 17:50:51.501849 scan_usb_bus for USB3 port 4
933 17:50:51.505365 scan_usb_bus for USB3 port 4 done
934 17:50:51.510550 scan_bus: scanning of bus USB3 port 4 took 9056 usecs
935 17:50:51.513897 scan_usb_bus for USB0 port 0 done
936 17:50:51.519464 scan_bus: scanning of bus USB0 port 0 took 239205 usecs
937 17:50:51.523291 scan_usb_bus for PCI: 00:14.0 done
938 17:50:51.528341 scan_bus: scanning of bus PCI: 00:14.0 took 256131 usecs
939 17:50:51.531449 PCI: 00:15.0 scanning...
940 17:50:51.534690 scan_generic_bus for PCI: 00:15.0
941 17:50:51.539223 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 17:50:51.542816 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 17:50:51.547796 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 17:50:51.550590 scan_generic_bus for PCI: 00:15.0 done
945 17:50:51.556612 scan_bus: scanning of bus PCI: 00:15.0 took 22373 usecs
946 17:50:51.559204 PCI: 00:15.1 scanning...
947 17:50:51.563224 scan_generic_bus for PCI: 00:15.1
948 17:50:51.567254 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 17:50:51.571312 scan_generic_bus for PCI: 00:15.1 done
950 17:50:51.576393 scan_bus: scanning of bus PCI: 00:15.1 took 14209 usecs
951 17:50:51.578454 PCI: 00:19.0 scanning...
952 17:50:51.582807 scan_generic_bus for PCI: 00:19.0
953 17:50:51.587043 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 17:50:51.590687 scan_generic_bus for PCI: 00:19.0 done
955 17:50:51.595723 scan_bus: scanning of bus PCI: 00:19.0 took 14213 usecs
956 17:50:51.599001 PCI: 00:1c.0 scanning...
957 17:50:51.602352 do_pci_scan_bridge for PCI: 00:1c.0
958 17:50:51.605393 PCI: pci_scan_bus for bus 01
959 17:50:51.608379 PCI: 01:00.0 [10ec/525a] enabled
960 17:50:51.612417 Capability: type 0x01 @ 0x80
961 17:50:51.615416 Capability: type 0x05 @ 0x90
962 17:50:51.617986 Capability: type 0x10 @ 0xb0
963 17:50:51.620607 Capability: type 0x10 @ 0x40
964 17:50:51.623947 Enabling Common Clock Configuration
965 17:50:51.628344 L1 Sub-State supported from root port 28
966 17:50:51.631369 L1 Sub-State Support = 0xf
967 17:50:51.634647 CommonModeRestoreTime = 0x3c
968 17:50:51.638292 Power On Value = 0x6, Power On Scale = 0x1
969 17:50:51.641562 ASPM: Enabled L0s and L1
970 17:50:51.644244 Capability: type 0x01 @ 0x80
971 17:50:51.647550 Capability: type 0x05 @ 0x90
972 17:50:51.649658 Capability: type 0x10 @ 0xb0
973 17:50:51.655364 scan_bus: scanning of bus PCI: 00:1c.0 took 53643 usecs
974 17:50:51.657563 PCI: 00:1d.0 scanning...
975 17:50:51.662240 do_pci_scan_bridge for PCI: 00:1d.0
976 17:50:51.664801 PCI: pci_scan_bus for bus 02
977 17:50:51.667740 PCI: 02:00.0 [1217/8620] enabled
978 17:50:51.670975 Capability: type 0x01 @ 0x6c
979 17:50:51.673735 Capability: type 0x05 @ 0x48
980 17:50:51.677453 Capability: type 0x10 @ 0x80
981 17:50:51.679525 Capability: type 0x10 @ 0x40
982 17:50:51.683542 L1 Sub-State supported from root port 29
983 17:50:51.686142 L1 Sub-State Support = 0xf
984 17:50:51.689949 CommonModeRestoreTime = 0x78
985 17:50:51.694603 Power On Value = 0x16, Power On Scale = 0x0
986 17:50:51.695415 ASPM: Enabled L1
987 17:50:51.700110 Capability: type 0x01 @ 0x6c
988 17:50:51.704935 Capability: type 0x05 @ 0x48
989 17:50:51.709408 Capability: type 0x10 @ 0x80
990 17:50:51.717154 scan_bus: scanning of bus PCI: 00:1d.0 took 55994 usecs
991 17:50:51.719490 PCI: 00:1f.0 scanning...
992 17:50:51.722063 scan_lpc_bus for PCI: 00:1f.0
993 17:50:51.724935 PNP: 0c09.0 enabled
994 17:50:51.728134 scan_lpc_bus for PCI: 00:1f.0 done
995 17:50:51.734098 scan_bus: scanning of bus PCI: 00:1f.0 took 11391 usecs
996 17:50:51.735874 PCI: 00:1f.3 scanning...
997 17:50:51.742089 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
998 17:50:51.744317 PCI: 00:1f.4 scanning...
999 17:50:51.748222 scan_generic_bus for PCI: 00:1f.4
1000 17:50:51.752128 scan_generic_bus for PCI: 00:1f.4 done
1001 17:50:51.757978 scan_bus: scanning of bus PCI: 00:1f.4 took 10134 usecs
1002 17:50:51.760612 PCI: 00:1f.5 scanning...
1003 17:50:51.763413 scan_generic_bus for PCI: 00:1f.5
1004 17:50:51.767484 scan_generic_bus for PCI: 00:1f.5 done
1005 17:50:51.773981 scan_bus: scanning of bus PCI: 00:1f.5 took 10124 usecs
1006 17:50:51.779097 scan_bus: scanning of bus DOMAIN: 0000 took 706458 usecs
1007 17:50:51.782550 root_dev_scan_bus for Root Device done
1008 17:50:51.788254 scan_bus: scanning of bus Root Device took 726591 usecs
1009 17:50:51.789412 done
1010 17:50:51.795352 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 17:50:51.801288 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 17:50:51.809173 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 17:50:51.815951 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1014 17:50:51.819722 SPI flash protection: WPSW=1 SRP0=1
1015 17:50:51.826971 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1016 17:50:51.832643 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1017 17:50:51.837813 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148151 exit 42570
1018 17:50:51.840557 found VGA at PCI: 00:02.0
1019 17:50:51.843801 Setting up VGA for PCI: 00:02.0
1020 17:50:51.849315 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1021 17:50:51.854718 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1022 17:50:51.856326 Allocating resources...
1023 17:50:51.858690 Reading resources...
1024 17:50:51.863292 Root Device read_resources bus 0 link: 0
1025 17:50:51.867526 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1026 17:50:51.873315 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1027 17:50:51.877011 DOMAIN: 0000 read_resources bus 0 link: 0
1028 17:50:51.883420 PCI: 00:14.0 read_resources bus 0 link: 0
1029 17:50:51.887832 USB0 port 0 read_resources bus 0 link: 0
1030 17:50:51.897479 USB0 port 0 read_resources bus 0 link: 0 done
1031 17:50:51.901975 PCI: 00:14.0 read_resources bus 0 link: 0 done
1032 17:50:51.907824 PCI: 00:15.0 read_resources bus 1 link: 0
1033 17:50:51.913210 PCI: 00:15.0 read_resources bus 1 link: 0 done
1034 17:50:51.917437 PCI: 00:15.1 read_resources bus 2 link: 0
1035 17:50:51.922704 PCI: 00:15.1 read_resources bus 2 link: 0 done
1036 17:50:51.928038 PCI: 00:19.0 read_resources bus 3 link: 0
1037 17:50:51.933190 PCI: 00:19.0 read_resources bus 3 link: 0 done
1038 17:50:51.939082 PCI: 00:1c.0 read_resources bus 1 link: 0
1039 17:50:51.943829 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1040 17:50:51.948722 PCI: 00:1d.0 read_resources bus 2 link: 0
1041 17:50:51.955048 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1042 17:50:51.960426 PCI: 00:1f.0 read_resources bus 0 link: 0
1043 17:50:51.965746 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1044 17:50:51.971361 DOMAIN: 0000 read_resources bus 0 link: 0 done
1045 17:50:51.976737 Root Device read_resources bus 0 link: 0 done
1046 17:50:51.979618 Done reading resources.
1047 17:50:51.984149 Show resources in subtree (Root Device)...After reading.
1048 17:50:51.988627 Root Device child on link 0 CPU_CLUSTER: 0
1049 17:50:51.993140 CPU_CLUSTER: 0 child on link 0 APIC: 00
1050 17:50:51.994131 APIC: 00
1051 17:50:51.996128 APIC: 02
1052 17:50:51.997359 APIC: 01
1053 17:50:51.998678 APIC: 03
1054 17:50:52.000014 APIC: 04
1055 17:50:52.001332 APIC: 05
1056 17:50:52.001985 APIC: 06
1057 17:50:52.003990 APIC: 07
1058 17:50:52.008423 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1059 17:50:52.016544 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1060 17:50:52.027021 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1061 17:50:52.028393 PCI: 00:00.0
1062 17:50:52.037860 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1063 17:50:52.047643 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1064 17:50:52.056909 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1065 17:50:52.065504 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1066 17:50:52.075308 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1067 17:50:52.084343 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1068 17:50:52.094469 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1069 17:50:52.102813 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1070 17:50:52.112357 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1071 17:50:52.122095 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1072 17:50:52.130982 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1073 17:50:52.141020 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1074 17:50:52.150876 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1075 17:50:52.159959 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1076 17:50:52.161451 PCI: 00:02.0
1077 17:50:52.171015 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1078 17:50:52.182233 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1079 17:50:52.190697 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1080 17:50:52.191464 PCI: 00:04.0
1081 17:50:52.201918 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1082 17:50:52.203537 PCI: 00:08.0
1083 17:50:52.212916 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1084 17:50:52.215214 PCI: 00:12.0
1085 17:50:52.224565 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1086 17:50:52.229350 PCI: 00:14.0 child on link 0 USB0 port 0
1087 17:50:52.238945 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1088 17:50:52.243096 USB0 port 0 child on link 0 USB2 port 0
1089 17:50:52.245641 USB2 port 0
1090 17:50:52.247688 USB2 port 1
1091 17:50:52.248553 USB2 port 2
1092 17:50:52.250939 USB2 port 4
1093 17:50:52.252884 USB2 port 5
1094 17:50:52.253747 USB2 port 6
1095 17:50:52.255784 USB2 port 7
1096 17:50:52.257670 USB2 port 8
1097 17:50:52.259044 USB2 port 9
1098 17:50:52.261603 USB3 port 0
1099 17:50:52.262958 USB3 port 1
1100 17:50:52.264386 USB3 port 2
1101 17:50:52.266796 USB3 port 3
1102 17:50:52.268794 USB3 port 4
1103 17:50:52.269591 PCI: 00:14.2
1104 17:50:52.279362 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1105 17:50:52.289869 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1106 17:50:52.291813 PCI: 00:14.3
1107 17:50:52.301192 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1108 17:50:52.305058 PCI: 00:15.0 child on link 0 I2C: 01:10
1109 17:50:52.315228 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 17:50:52.316974 I2C: 01:10
1111 17:50:52.318749 I2C: 01:10
1112 17:50:52.320714 I2C: 01:34
1113 17:50:52.324676 PCI: 00:15.1 child on link 0 I2C: 02:2c
1114 17:50:52.334296 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 17:50:52.335843 I2C: 02:2c
1116 17:50:52.337695 PCI: 00:16.0
1117 17:50:52.347593 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1118 17:50:52.348652 PCI: 00:17.0
1119 17:50:52.358665 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1120 17:50:52.366845 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1121 17:50:52.375946 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1122 17:50:52.383555 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1123 17:50:52.392119 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1124 17:50:52.400552 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1125 17:50:52.405127 PCI: 00:19.0 child on link 0 I2C: 03:50
1126 17:50:52.415206 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 17:50:52.425575 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 17:50:52.426662 I2C: 03:50
1129 17:50:52.428310 PCI: 00:19.2
1130 17:50:52.439429 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1131 17:50:52.449309 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1132 17:50:52.453907 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1133 17:50:52.461953 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1134 17:50:52.472409 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1135 17:50:52.481736 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1136 17:50:52.483495 PCI: 01:00.0
1137 17:50:52.492106 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1138 17:50:52.497384 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1139 17:50:52.505663 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1140 17:50:52.515249 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1141 17:50:52.523882 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1142 17:50:52.525858 PCI: 02:00.0
1143 17:50:52.535192 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1144 17:50:52.543876 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1145 17:50:52.548776 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1146 17:50:52.556918 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1147 17:50:52.566435 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1148 17:50:52.568083 PNP: 0c09.0
1149 17:50:52.576617 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1150 17:50:52.585557 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1151 17:50:52.593606 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1152 17:50:52.595822 PCI: 00:1f.3
1153 17:50:52.604816 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 17:50:52.615802 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1155 17:50:52.617076 PCI: 00:1f.4
1156 17:50:52.626168 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1157 17:50:52.635417 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1158 17:50:52.637924 PCI: 00:1f.5
1159 17:50:52.647106 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1160 17:50:52.648459 PCI: 00:1f.6
1161 17:50:52.657524 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1162 17:50:52.663738 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1163 17:50:52.670004 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1164 17:50:52.677529 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1165 17:50:52.683115 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1166 17:50:52.689826 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1167 17:50:52.693867 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1168 17:50:52.697108 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1169 17:50:52.700646 PCI: 00:17.0 18 * [0x60 - 0x67] io
1170 17:50:52.704536 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1171 17:50:52.711023 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1172 17:50:52.717729 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1173 17:50:52.725512 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1174 17:50:52.734587 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1175 17:50:52.740686 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1176 17:50:52.745119 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1177 17:50:52.752998 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1178 17:50:52.760388 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1179 17:50:52.768756 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1180 17:50:52.775936 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1181 17:50:52.780225 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1182 17:50:52.783446 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1183 17:50:52.791841 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1184 17:50:52.796489 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1185 17:50:52.801464 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1186 17:50:52.805616 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1187 17:50:52.810505 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1188 17:50:52.815959 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1189 17:50:52.821055 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1190 17:50:52.825621 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1191 17:50:52.830246 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1192 17:50:52.834984 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1193 17:50:52.839592 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1194 17:50:52.845002 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1195 17:50:52.850240 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1196 17:50:52.854838 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1197 17:50:52.859571 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1198 17:50:52.864788 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1199 17:50:52.868828 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1200 17:50:52.874536 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1201 17:50:52.878516 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1202 17:50:52.883863 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1203 17:50:52.888392 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1204 17:50:52.893981 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1205 17:50:52.897986 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1206 17:50:52.902826 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1207 17:50:52.908030 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1208 17:50:52.912625 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1209 17:50:52.921659 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1210 17:50:52.924935 avoid_fixed_resources: DOMAIN: 0000
1211 17:50:52.930607 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1212 17:50:52.936925 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1213 17:50:52.944382 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1214 17:50:52.952283 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1215 17:50:52.960080 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1216 17:50:52.967264 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1217 17:50:52.975501 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1218 17:50:52.982431 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1219 17:50:52.990849 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1220 17:50:52.998259 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1221 17:50:53.005458 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1222 17:50:53.012237 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1223 17:50:53.014401 Setting resources...
1224 17:50:53.020743 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1225 17:50:53.024697 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1226 17:50:53.029134 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1227 17:50:53.033211 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1228 17:50:53.037241 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1229 17:50:53.043748 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1230 17:50:53.049488 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1231 17:50:53.056350 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1232 17:50:53.062122 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 17:50:53.068408 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 17:50:53.075590 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1235 17:50:53.081192 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 17:50:53.086532 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 17:50:53.090664 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 17:50:53.095776 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1239 17:50:53.100693 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1240 17:50:53.105151 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1241 17:50:53.110333 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1242 17:50:53.115620 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1243 17:50:53.120186 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1244 17:50:53.124526 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1245 17:50:53.129502 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1246 17:50:53.134928 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1247 17:50:53.139966 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1248 17:50:53.144051 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1249 17:50:53.148877 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1250 17:50:53.153935 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1251 17:50:53.158991 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1252 17:50:53.163267 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1253 17:50:53.168396 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1254 17:50:53.173516 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1255 17:50:53.178868 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1256 17:50:53.183346 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1257 17:50:53.188031 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1258 17:50:53.193368 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1259 17:50:53.197987 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1260 17:50:53.205003 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1261 17:50:53.212340 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1262 17:50:53.219939 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1263 17:50:53.227974 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1264 17:50:53.231782 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1265 17:50:53.239218 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1266 17:50:53.247295 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 17:50:53.254448 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 17:50:53.261383 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1269 17:50:53.266571 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1270 17:50:53.272117 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1271 17:50:53.278993 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1272 17:50:53.282871 Root Device assign_resources, bus 0 link: 0
1273 17:50:53.288429 DOMAIN: 0000 assign_resources, bus 0 link: 0
1274 17:50:53.297054 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1275 17:50:53.305072 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1276 17:50:53.312969 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1277 17:50:53.320994 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1278 17:50:53.328956 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1279 17:50:53.337214 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1280 17:50:53.345821 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1281 17:50:53.350152 PCI: 00:14.0 assign_resources, bus 0 link: 0
1282 17:50:53.355182 PCI: 00:14.0 assign_resources, bus 0 link: 0
1283 17:50:53.363728 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1284 17:50:53.371129 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1285 17:50:53.379269 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1286 17:50:53.388181 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1287 17:50:53.391990 PCI: 00:15.0 assign_resources, bus 1 link: 0
1288 17:50:53.397749 PCI: 00:15.0 assign_resources, bus 1 link: 0
1289 17:50:53.405221 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1290 17:50:53.409825 PCI: 00:15.1 assign_resources, bus 2 link: 0
1291 17:50:53.414439 PCI: 00:15.1 assign_resources, bus 2 link: 0
1292 17:50:53.423068 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1293 17:50:53.431379 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1294 17:50:53.438986 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1295 17:50:53.446561 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1296 17:50:53.454124 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1297 17:50:53.462256 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1298 17:50:53.469332 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1299 17:50:53.477959 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1300 17:50:53.485571 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1301 17:50:53.490140 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 17:50:53.495095 PCI: 00:19.0 assign_resources, bus 3 link: 0
1303 17:50:53.502910 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1304 17:50:53.512618 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1305 17:50:53.521358 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1306 17:50:53.529524 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1307 17:50:53.533642 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1308 17:50:53.542031 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1309 17:50:53.546772 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1310 17:50:53.555121 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1311 17:50:53.564334 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1312 17:50:53.573150 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1313 17:50:53.577268 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1314 17:50:53.586974 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1315 17:50:53.596008 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1316 17:50:53.602545 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1317 17:50:53.607471 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 17:50:53.612373 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1319 17:50:53.617629 LPC: Trying to open IO window from 930 size 8
1320 17:50:53.621624 LPC: Trying to open IO window from 940 size 8
1321 17:50:53.626339 LPC: Trying to open IO window from 950 size 10
1322 17:50:53.634918 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1323 17:50:53.643271 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1324 17:50:53.651236 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1325 17:50:53.659007 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1326 17:50:53.667368 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1327 17:50:53.672213 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 17:50:53.676733 Root Device assign_resources, bus 0 link: 0
1329 17:50:53.679398 Done setting resources.
1330 17:50:53.685792 Show resources in subtree (Root Device)...After assigning values.
1331 17:50:53.689899 Root Device child on link 0 CPU_CLUSTER: 0
1332 17:50:53.693884 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 17:50:53.695069 APIC: 00
1334 17:50:53.696535 APIC: 02
1335 17:50:53.698245 APIC: 01
1336 17:50:53.699063 APIC: 03
1337 17:50:53.700690 APIC: 04
1338 17:50:53.701377 APIC: 05
1339 17:50:53.703312 APIC: 06
1340 17:50:53.703967 APIC: 07
1341 17:50:53.709255 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 17:50:53.718002 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 17:50:53.729722 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 17:50:53.730772 PCI: 00:00.0
1345 17:50:53.740638 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1346 17:50:53.750401 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1347 17:50:53.759569 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1348 17:50:53.768341 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1349 17:50:53.777732 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1350 17:50:53.788013 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1351 17:50:53.797309 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1352 17:50:53.805354 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1353 17:50:53.815064 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1354 17:50:53.825312 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1355 17:50:53.834270 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1356 17:50:53.843811 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1357 17:50:53.853835 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1358 17:50:53.862840 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1359 17:50:53.864905 PCI: 00:02.0
1360 17:50:53.874793 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1361 17:50:53.885734 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1362 17:50:53.894610 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1363 17:50:53.896377 PCI: 00:04.0
1364 17:50:53.906726 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1365 17:50:53.908188 PCI: 00:08.0
1366 17:50:53.918977 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1367 17:50:53.920374 PCI: 00:12.0
1368 17:50:53.929859 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1369 17:50:53.934832 PCI: 00:14.0 child on link 0 USB0 port 0
1370 17:50:53.945004 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1371 17:50:53.949969 USB0 port 0 child on link 0 USB2 port 0
1372 17:50:53.951781 USB2 port 0
1373 17:50:53.953073 USB2 port 1
1374 17:50:53.954912 USB2 port 2
1375 17:50:53.956702 USB2 port 4
1376 17:50:53.958429 USB2 port 5
1377 17:50:53.960106 USB2 port 6
1378 17:50:53.961404 USB2 port 7
1379 17:50:53.963391 USB2 port 8
1380 17:50:53.965427 USB2 port 9
1381 17:50:53.966673 USB3 port 0
1382 17:50:53.968433 USB3 port 1
1383 17:50:53.970651 USB3 port 2
1384 17:50:53.972113 USB3 port 3
1385 17:50:53.973571 USB3 port 4
1386 17:50:53.975467 PCI: 00:14.2
1387 17:50:53.985760 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1388 17:50:53.996185 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1389 17:50:53.998133 PCI: 00:14.3
1390 17:50:54.007960 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1391 17:50:54.012532 PCI: 00:15.0 child on link 0 I2C: 01:10
1392 17:50:54.022765 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1393 17:50:54.024711 I2C: 01:10
1394 17:50:54.026042 I2C: 01:10
1395 17:50:54.027307 I2C: 01:34
1396 17:50:54.031974 PCI: 00:15.1 child on link 0 I2C: 02:2c
1397 17:50:54.042235 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1398 17:50:54.043124 I2C: 02:2c
1399 17:50:54.044930 PCI: 00:16.0
1400 17:50:54.056006 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1401 17:50:54.056669 PCI: 00:17.0
1402 17:50:54.067930 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1403 17:50:54.077323 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1404 17:50:54.086402 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1405 17:50:54.095177 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1406 17:50:54.104518 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1407 17:50:54.114988 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1408 17:50:54.119179 PCI: 00:19.0 child on link 0 I2C: 03:50
1409 17:50:54.129186 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1410 17:50:54.139557 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1411 17:50:54.141955 I2C: 03:50
1412 17:50:54.142595 PCI: 00:19.2
1413 17:50:54.153908 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 17:50:54.164614 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1415 17:50:54.169137 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1416 17:50:54.178165 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1417 17:50:54.188566 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1418 17:50:54.198753 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1419 17:50:54.200056 PCI: 01:00.0
1420 17:50:54.210463 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1421 17:50:54.215404 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1422 17:50:54.224617 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1423 17:50:54.234245 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1424 17:50:54.245462 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1425 17:50:54.246867 PCI: 02:00.0
1426 17:50:54.257360 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1427 17:50:54.267974 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1428 17:50:54.271429 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1429 17:50:54.280600 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1430 17:50:54.289821 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1431 17:50:54.291053 PNP: 0c09.0
1432 17:50:54.299570 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1433 17:50:54.308647 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1434 17:50:54.316346 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1435 17:50:54.318216 PCI: 00:1f.3
1436 17:50:54.328600 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1437 17:50:54.339017 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1438 17:50:54.340414 PCI: 00:1f.4
1439 17:50:54.349544 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1440 17:50:54.360159 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1441 17:50:54.361381 PCI: 00:1f.5
1442 17:50:54.372634 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1443 17:50:54.373914 PCI: 00:1f.6
1444 17:50:54.384587 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1445 17:50:54.387291 Done allocating resources.
1446 17:50:54.392782 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548538 exit 21
1447 17:50:54.395848 Enabling resources...
1448 17:50:54.400272 PCI: 00:00.0 subsystem <- 1028/3e34
1449 17:50:54.402261 PCI: 00:00.0 cmd <- 06
1450 17:50:54.406461 PCI: 00:02.0 subsystem <- 1028/3ea0
1451 17:50:54.408953 PCI: 00:02.0 cmd <- 03
1452 17:50:54.412903 PCI: 00:04.0 subsystem <- 1028/1903
1453 17:50:54.415618 PCI: 00:04.0 cmd <- 02
1454 17:50:54.418302 PCI: 00:08.0 cmd <- 06
1455 17:50:54.421650 PCI: 00:12.0 subsystem <- 1028/9df9
1456 17:50:54.424303 PCI: 00:12.0 cmd <- 02
1457 17:50:54.427337 PCI: 00:14.0 subsystem <- 1028/9ded
1458 17:50:54.430174 PCI: 00:14.0 cmd <- 02
1459 17:50:54.432298 PCI: 00:14.2 cmd <- 02
1460 17:50:54.436237 PCI: 00:14.3 subsystem <- 1028/9df0
1461 17:50:54.438675 PCI: 00:14.3 cmd <- 02
1462 17:50:54.442776 PCI: 00:15.0 subsystem <- 1028/9de8
1463 17:50:54.444984 PCI: 00:15.0 cmd <- 02
1464 17:50:54.448702 PCI: 00:15.1 subsystem <- 1028/9de9
1465 17:50:54.451035 PCI: 00:15.1 cmd <- 02
1466 17:50:54.454850 PCI: 00:16.0 subsystem <- 1028/9de0
1467 17:50:54.457658 PCI: 00:16.0 cmd <- 02
1468 17:50:54.461138 PCI: 00:17.0 subsystem <- 1028/9dd3
1469 17:50:54.463923 PCI: 00:17.0 cmd <- 03
1470 17:50:54.468070 PCI: 00:19.0 subsystem <- 1028/9dc5
1471 17:50:54.469979 PCI: 00:19.0 cmd <- 06
1472 17:50:54.474220 PCI: 00:19.2 subsystem <- 1028/9dc7
1473 17:50:54.476028 PCI: 00:19.2 cmd <- 06
1474 17:50:54.479991 PCI: 00:1c.0 bridge ctrl <- 0003
1475 17:50:54.483262 PCI: 00:1c.0 subsystem <- 1028/9dbf
1476 17:50:54.486128 Capability: type 0x10 @ 0x40
1477 17:50:54.489112 Capability: type 0x05 @ 0x80
1478 17:50:54.492096 Capability: type 0x0d @ 0x90
1479 17:50:54.495015 PCI: 00:1c.0 cmd <- 06
1480 17:50:54.497918 PCI: 00:1d.0 bridge ctrl <- 0003
1481 17:50:54.501937 PCI: 00:1d.0 subsystem <- 1028/9db4
1482 17:50:54.505214 Capability: type 0x10 @ 0x40
1483 17:50:54.508027 Capability: type 0x05 @ 0x80
1484 17:50:54.510248 Capability: type 0x0d @ 0x90
1485 17:50:54.512986 PCI: 00:1d.0 cmd <- 06
1486 17:50:54.517228 PCI: 00:1f.0 subsystem <- 1028/9d84
1487 17:50:54.519413 PCI: 00:1f.0 cmd <- 407
1488 17:50:54.523885 PCI: 00:1f.3 subsystem <- 1028/9dc8
1489 17:50:54.525343 PCI: 00:1f.3 cmd <- 02
1490 17:50:54.529318 PCI: 00:1f.4 subsystem <- 1028/9da3
1491 17:50:54.532274 PCI: 00:1f.4 cmd <- 03
1492 17:50:54.536048 PCI: 00:1f.5 subsystem <- 1028/9da4
1493 17:50:54.538178 PCI: 00:1f.5 cmd <- 406
1494 17:50:54.542563 PCI: 00:1f.6 subsystem <- 1028/15be
1495 17:50:54.544456 PCI: 00:1f.6 cmd <- 02
1496 17:50:54.555108 PCI: 01:00.0 cmd <- 02
1497 17:50:54.559528 PCI: 02:00.0 cmd <- 06
1498 17:50:54.563835 done.
1499 17:50:54.569597 BS: BS_DEV_ENABLE times (us): entry 400 run 170415 exit 0
1500 17:50:54.571745 Initializing devices...
1501 17:50:54.573953 Root Device init ...
1502 17:50:54.577997 Root Device init finished in 2163 usecs
1503 17:50:54.581052 CPU_CLUSTER: 0 init ...
1504 17:50:54.584869 CPU_CLUSTER: 0 init finished in 2429 usecs
1505 17:50:54.591130 PCI: 00:00.0 init ...
1506 17:50:54.594809 CPU TDP: 15 Watts
1507 17:50:54.596185 CPU PL2 = 51 Watts
1508 17:50:54.600394 PCI: 00:00.0 init finished in 7034 usecs
1509 17:50:54.602600 PCI: 00:02.0 init ...
1510 17:50:54.606912 PCI: 00:02.0 init finished in 2236 usecs
1511 17:50:54.609481 PCI: 00:04.0 init ...
1512 17:50:54.613506 PCI: 00:04.0 init finished in 2235 usecs
1513 17:50:54.616510 PCI: 00:08.0 init ...
1514 17:50:54.620891 PCI: 00:08.0 init finished in 2235 usecs
1515 17:50:54.623403 PCI: 00:12.0 init ...
1516 17:50:54.626890 PCI: 00:12.0 init finished in 2235 usecs
1517 17:50:54.629496 PCI: 00:14.0 init ...
1518 17:50:54.634786 PCI: 00:14.0 init finished in 2226 usecs
1519 17:50:54.636171 PCI: 00:14.2 init ...
1520 17:50:54.640831 PCI: 00:14.2 init finished in 2235 usecs
1521 17:50:54.643411 PCI: 00:14.3 init ...
1522 17:50:54.647164 PCI: 00:14.3 init finished in 2240 usecs
1523 17:50:54.649748 PCI: 00:15.0 init ...
1524 17:50:54.653997 DW I2C bus 0 at 0xd1347000 (400 KHz)
1525 17:50:54.657932 PCI: 00:15.0 init finished in 5931 usecs
1526 17:50:54.660454 PCI: 00:15.1 init ...
1527 17:50:54.664542 DW I2C bus 1 at 0xd1348000 (400 KHz)
1528 17:50:54.668061 PCI: 00:15.1 init finished in 5931 usecs
1529 17:50:54.671069 PCI: 00:16.0 init ...
1530 17:50:54.675128 PCI: 00:16.0 init finished in 2234 usecs
1531 17:50:54.677614 PCI: 00:19.0 init ...
1532 17:50:54.681413 DW I2C bus 4 at 0xd134a000 (400 KHz)
1533 17:50:54.685350 PCI: 00:19.0 init finished in 5931 usecs
1534 17:50:54.688695 PCI: 00:1c.0 init ...
1535 17:50:54.691929 Initializing PCH PCIe bridge.
1536 17:50:54.695930 PCI: 00:1c.0 init finished in 5248 usecs
1537 17:50:54.698953 PCI: 00:1d.0 init ...
1538 17:50:54.701172 Initializing PCH PCIe bridge.
1539 17:50:54.706052 PCI: 00:1d.0 init finished in 5246 usecs
1540 17:50:54.708617 PCI: 00:1f.0 init ...
1541 17:50:54.712510 IOAPIC: Initializing IOAPIC at 0xfec00000
1542 17:50:54.716934 IOAPIC: Bootstrap Processor Local APIC = 0x00
1543 17:50:54.718865 IOAPIC: ID = 0x02
1544 17:50:54.721965 IOAPIC: Dumping registers
1545 17:50:54.724406 reg 0x0000: 0x02000000
1546 17:50:54.726623 reg 0x0001: 0x00770020
1547 17:50:54.729262 reg 0x0002: 0x00000000
1548 17:50:54.735576 PCI: 00:1f.0 init finished in 25016 usecs
1549 17:50:54.737721 PCI: 00:1f.3 init ...
1550 17:50:54.742783 HDA: codec_mask = 05
1551 17:50:54.746014 HDA: Initializing codec #2
1552 17:50:54.748541 HDA: codec viddid: 8086280b
1553 17:50:54.751810 HDA: No verb table entry found
1554 17:50:54.754994 HDA: Initializing codec #0
1555 17:50:54.757171 HDA: codec viddid: 10ec0236
1556 17:50:54.764158 HDA: verb loaded.
1557 17:50:54.768495 PCI: 00:1f.3 init finished in 28806 usecs
1558 17:50:54.771276 PCI: 00:1f.4 init ...
1559 17:50:54.775361 PCI: 00:1f.4 init finished in 2245 usecs
1560 17:50:54.777908 PCI: 00:1f.6 init ...
1561 17:50:54.782545 PCI: 00:1f.6 init finished in 2235 usecs
1562 17:50:54.793670 PCI: 01:00.0 init ...
1563 17:50:54.797512 PCI: 01:00.0 init finished in 2236 usecs
1564 17:50:54.799688 PCI: 02:00.0 init ...
1565 17:50:54.804084 PCI: 02:00.0 init finished in 2235 usecs
1566 17:50:54.806372 PNP: 0c09.0 init ...
1567 17:50:54.811369 EC Label : 00.00.20
1568 17:50:54.814486 EC Revision : 9ca674bba
1569 17:50:54.817971 EC Model Num : 08B9
1570 17:50:54.821075 EC Build Date : 05/10/19
1571 17:50:54.829967 PNP: 0c09.0 init finished in 21735 usecs
1572 17:50:54.833011 Devices initialized
1573 17:50:54.835117 Show all devs... After init.
1574 17:50:54.837972 Root Device: enabled 1
1575 17:50:54.840572 CPU_CLUSTER: 0: enabled 1
1576 17:50:54.842766 DOMAIN: 0000: enabled 1
1577 17:50:54.845448 APIC: 00: enabled 1
1578 17:50:54.848125 PCI: 00:00.0: enabled 1
1579 17:50:54.849525 PCI: 00:02.0: enabled 1
1580 17:50:54.852000 PCI: 00:04.0: enabled 1
1581 17:50:54.854686 PCI: 00:12.0: enabled 1
1582 17:50:54.856929 PCI: 00:12.5: enabled 0
1583 17:50:54.859423 PCI: 00:12.6: enabled 0
1584 17:50:54.862240 PCI: 00:13.0: enabled 0
1585 17:50:54.864720 PCI: 00:14.0: enabled 1
1586 17:50:54.867338 PCI: 00:14.1: enabled 0
1587 17:50:54.869955 PCI: 00:14.3: enabled 1
1588 17:50:54.871453 PCI: 00:14.5: enabled 0
1589 17:50:54.873997 PCI: 00:15.0: enabled 1
1590 17:50:54.876414 PCI: 00:15.1: enabled 1
1591 17:50:54.878828 PCI: 00:15.2: enabled 0
1592 17:50:54.881784 PCI: 00:15.3: enabled 0
1593 17:50:54.884222 PCI: 00:16.0: enabled 1
1594 17:50:54.886136 PCI: 00:16.1: enabled 0
1595 17:50:54.888663 PCI: 00:16.2: enabled 0
1596 17:50:54.890820 PCI: 00:16.3: enabled 0
1597 17:50:54.893351 PCI: 00:16.4: enabled 0
1598 17:50:54.896390 PCI: 00:16.5: enabled 0
1599 17:50:54.898919 PCI: 00:17.0: enabled 1
1600 17:50:54.900934 PCI: 00:19.0: enabled 1
1601 17:50:54.903567 PCI: 00:19.1: enabled 0
1602 17:50:54.905327 PCI: 00:19.2: enabled 1
1603 17:50:54.908780 PCI: 00:1a.0: enabled 0
1604 17:50:54.910796 PCI: 00:1c.0: enabled 1
1605 17:50:54.913364 PCI: 00:1c.1: enabled 0
1606 17:50:54.915757 PCI: 00:1c.2: enabled 0
1607 17:50:54.918188 PCI: 00:1c.3: enabled 0
1608 17:50:54.920517 PCI: 00:1c.4: enabled 0
1609 17:50:54.922409 PCI: 00:1c.5: enabled 0
1610 17:50:54.924807 PCI: 00:1c.6: enabled 0
1611 17:50:54.927791 PCI: 00:1c.7: enabled 0
1612 17:50:54.929881 PCI: 00:1d.0: enabled 1
1613 17:50:54.932200 PCI: 00:1d.1: enabled 0
1614 17:50:54.935027 PCI: 00:1d.2: enabled 0
1615 17:50:54.937125 PCI: 00:1d.3: enabled 0
1616 17:50:54.939441 PCI: 00:1d.4: enabled 0
1617 17:50:54.942113 PCI: 00:1e.0: enabled 0
1618 17:50:54.944697 PCI: 00:1e.1: enabled 0
1619 17:50:54.947212 PCI: 00:1e.2: enabled 0
1620 17:50:54.950216 PCI: 00:1e.3: enabled 0
1621 17:50:54.952222 PCI: 00:1f.0: enabled 1
1622 17:50:54.954845 PCI: 00:1f.1: enabled 0
1623 17:50:54.956839 PCI: 00:1f.2: enabled 0
1624 17:50:54.959596 PCI: 00:1f.3: enabled 1
1625 17:50:54.961528 PCI: 00:1f.4: enabled 1
1626 17:50:54.963746 PCI: 00:1f.5: enabled 1
1627 17:50:54.966268 PCI: 00:1f.6: enabled 1
1628 17:50:54.969228 USB0 port 0: enabled 1
1629 17:50:54.971175 I2C: 01:10: enabled 1
1630 17:50:54.972822 I2C: 01:10: enabled 1
1631 17:50:54.975583 I2C: 01:34: enabled 1
1632 17:50:54.978264 I2C: 02:2c: enabled 1
1633 17:50:54.980250 I2C: 03:50: enabled 1
1634 17:50:54.982891 PNP: 0c09.0: enabled 1
1635 17:50:54.984104 USB2 port 0: enabled 1
1636 17:50:54.987061 USB2 port 1: enabled 1
1637 17:50:54.988967 USB2 port 2: enabled 1
1638 17:50:54.991812 USB2 port 4: enabled 1
1639 17:50:54.994263 USB2 port 5: enabled 1
1640 17:50:54.996705 USB2 port 6: enabled 1
1641 17:50:54.999286 USB2 port 7: enabled 1
1642 17:50:55.000618 USB2 port 8: enabled 1
1643 17:50:55.003452 USB2 port 9: enabled 1
1644 17:50:55.005822 USB3 port 0: enabled 1
1645 17:50:55.007827 USB3 port 1: enabled 1
1646 17:50:55.010419 USB3 port 2: enabled 1
1647 17:50:55.013120 USB3 port 3: enabled 1
1648 17:50:55.014742 USB3 port 4: enabled 1
1649 17:50:55.016525 APIC: 02: enabled 1
1650 17:50:55.019114 APIC: 01: enabled 1
1651 17:50:55.021707 APIC: 03: enabled 1
1652 17:50:55.023192 APIC: 04: enabled 1
1653 17:50:55.025556 APIC: 05: enabled 1
1654 17:50:55.027586 APIC: 06: enabled 1
1655 17:50:55.029517 APIC: 07: enabled 1
1656 17:50:55.031423 PCI: 00:08.0: enabled 1
1657 17:50:55.034745 PCI: 00:14.2: enabled 1
1658 17:50:55.036623 PCI: 01:00.0: enabled 1
1659 17:50:55.038777 PCI: 02:00.0: enabled 1
1660 17:50:55.044195 Disabling ACPI via APMC:
1661 17:50:55.046219 done.
1662 17:50:55.050623 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1663 17:50:55.054516 ELOG: NV offset 0x1bf0000 size 0x4000
1664 17:50:55.063079 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1665 17:50:55.069637 ELOG: Event(17) added with size 13 at 2023-10-09 17:50:54 UTC
1666 17:50:55.074319 POST: Unexpected post code in previous boot: 0x72
1667 17:50:55.080228 ELOG: Event(A3) added with size 11 at 2023-10-09 17:50:54 UTC
1668 17:50:55.086438 ELOG: Event(92) added with size 9 at 2023-10-09 17:50:54 UTC
1669 17:50:55.092471 ELOG: Event(93) added with size 9 at 2023-10-09 17:50:54 UTC
1670 17:50:55.099423 ELOG: Event(9A) added with size 9 at 2023-10-09 17:50:54 UTC
1671 17:50:55.105378 ELOG: Event(9E) added with size 10 at 2023-10-09 17:50:54 UTC
1672 17:50:55.111444 ELOG: Event(9F) added with size 14 at 2023-10-09 17:50:54 UTC
1673 17:50:55.118051 ELOG: Event(16) added with size 11 at 2023-10-09 17:50:54 UTC
1674 17:50:55.121464 Erasing flash addr 1bf0000 + 4 KiB
1675 17:50:55.172286 BS: BS_DEV_INIT times (us): entry 0 run 469575 exit 106873
1676 17:50:55.178683 ELOG: Event(A1) added with size 10 at 2023-10-09 17:50:54 UTC
1677 17:50:55.186831 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1678 17:50:55.192276 ELOG: Event(A0) added with size 9 at 2023-10-09 17:50:54 UTC
1679 17:50:55.196922 elog_add_boot_reason: Logged dev mode boot
1680 17:50:55.198705 Finalize devices...
1681 17:50:55.200612 PCI: 00:17.0 final
1682 17:50:55.202379 Devices finalized
1683 17:50:55.208036 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1684 17:50:55.214166 BS: BS_POST_DEVICE times (us): entry 24766 run 5934 exit 5384
1685 17:50:55.219697 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1686 17:50:55.228574 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1687 17:50:55.232468 disable_unused_touchscreen: Disable ACPI0C50
1688 17:50:55.237159 disable_unused_touchscreen: Enable ELAN900C
1689 17:50:55.240672 CBFS @ 1d00000 size 300000
1690 17:50:55.246594 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1691 17:50:55.250599 CBFS: Locating 'fallback/dsdt.aml'
1692 17:50:55.254071 CBFS: Found @ offset 10b200 size 4448
1693 17:50:55.256878 CBFS @ 1d00000 size 300000
1694 17:50:55.262499 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1695 17:50:55.266116 CBFS: Locating 'fallback/slic'
1696 17:50:55.271481 CBFS: 'fallback/slic' not found.
1697 17:50:55.275688 ACPI: Writing ACPI tables at 89c0f000.
1698 17:50:55.277386 ACPI: * FACS
1699 17:50:55.279011 ACPI: * DSDT
1700 17:50:55.282567 Ramoops buffer: 0x100000@0x89b0e000.
1701 17:50:55.286914 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1702 17:50:55.291602 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1703 17:50:55.295541 ACPI: * FADT
1704 17:50:55.296699 SCI is IRQ9
1705 17:50:55.300948 ACPI: added table 1/32, length now 40
1706 17:50:55.301946 ACPI: * SSDT
1707 17:50:55.306088 Found 1 CPU(s) with 8 core(s) each.
1708 17:50:55.310327 Error: Could not locate 'wifi_sar' in VPD.
1709 17:50:55.314349 Error: failed from getting SAR limits!
1710 17:50:55.318152 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1711 17:50:55.322749 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1712 17:50:55.325764 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1713 17:50:55.330596 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1714 17:50:55.335359 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1715 17:50:55.340869 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1716 17:50:55.345346 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1717 17:50:55.350658 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1718 17:50:55.355222 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1719 17:50:55.362050 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1720 17:50:55.367815 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1721 17:50:55.373188 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1722 17:50:55.377935 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1723 17:50:55.382969 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1724 17:50:55.387141 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1725 17:50:55.392400 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1726 17:50:55.397370 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 17:50:55.402931 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 17:50:55.409544 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1729 17:50:55.415565 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 17:50:55.420984 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1731 17:50:55.425588 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1732 17:50:55.429365 ACPI: added table 2/32, length now 44
1733 17:50:55.430974 ACPI: * MCFG
1734 17:50:55.434751 ACPI: added table 3/32, length now 48
1735 17:50:55.436627 ACPI: * TPM2
1736 17:50:55.439021 TPM2 log created at 89afe000
1737 17:50:55.443746 ACPI: added table 4/32, length now 52
1738 17:50:55.444599 ACPI: * MADT
1739 17:50:55.446239 SCI is IRQ9
1740 17:50:55.450127 ACPI: added table 5/32, length now 56
1741 17:50:55.452070 current = 89c14bd0
1742 17:50:55.454731 ACPI: * IGD OpRegion
1743 17:50:55.456618 GMA: Found VBT in CBFS
1744 17:50:55.459789 GMA: Found valid VBT in CBFS
1745 17:50:55.463294 ACPI: added table 6/32, length now 60
1746 17:50:55.465169 ACPI: * HPET
1747 17:50:55.468847 ACPI: added table 7/32, length now 64
1748 17:50:55.470718 ACPI: done.
1749 17:50:55.473296 ACPI tables: 31872 bytes.
1750 17:50:55.475416 smbios_write_tables: 89afd000
1751 17:50:55.478195 recv_ec_data: 0x01
1752 17:50:55.480486 Create SMBIOS type 17
1753 17:50:55.482975 PCI: 00:14.3 (Intel WiFi)
1754 17:50:55.485621 SMBIOS tables: 708 bytes.
1755 17:50:55.489755 Writing table forward entry at 0x00000500
1756 17:50:55.496140 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1757 17:50:55.499292 Writing coreboot table at 0x89c33000
1758 17:50:55.505220 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1759 17:50:55.509444 1. 0000000000001000-000000000009ffff: RAM
1760 17:50:55.514528 2. 00000000000a0000-00000000000fffff: RESERVED
1761 17:50:55.518161 3. 0000000000100000-0000000089afcfff: RAM
1762 17:50:55.524905 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1763 17:50:55.529506 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1764 17:50:55.535845 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1765 17:50:55.540254 7. 000000008a000000-000000008f7fffff: RESERVED
1766 17:50:55.544996 8. 00000000e0000000-00000000efffffff: RESERVED
1767 17:50:55.549171 9. 00000000fc000000-00000000fc000fff: RESERVED
1768 17:50:55.554656 10. 00000000fe000000-00000000fe00ffff: RESERVED
1769 17:50:55.558727 11. 00000000fed10000-00000000fed17fff: RESERVED
1770 17:50:55.564369 12. 00000000fed80000-00000000fed83fff: RESERVED
1771 17:50:55.568376 13. 00000000feda0000-00000000feda1fff: RESERVED
1772 17:50:55.573316 14. 0000000100000000-000000026e7fffff: RAM
1773 17:50:55.577331 Graphics framebuffer located at 0xc0000000
1774 17:50:55.580513 Passing 6 GPIOs to payload:
1775 17:50:55.585036 NAME | PORT | POLARITY | VALUE
1776 17:50:55.590604 write protect | 0x000000dc | high | high
1777 17:50:55.595967 recovery | 0x000000d5 | low | high
1778 17:50:55.601201 lid | undefined | high | high
1779 17:50:55.605801 power | undefined | high | low
1780 17:50:55.611459 oprom | undefined | high | low
1781 17:50:55.617313 EC in RW | undefined | high | low
1782 17:50:55.618776 recv_ec_data: 0x01
1783 17:50:55.619601 SKU ID: 3
1784 17:50:55.622700 CBFS @ 1d00000 size 300000
1785 17:50:55.628637 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1786 17:50:55.635249 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a37d
1787 17:50:55.637885 coreboot table: 1484 bytes.
1788 17:50:55.641391 IMD ROOT 0. 89fff000 00001000
1789 17:50:55.644668 IMD SMALL 1. 89ffe000 00001000
1790 17:50:55.648065 FSP MEMORY 2. 89d0e000 002f0000
1791 17:50:55.652025 CONSOLE 3. 89cee000 00020000
1792 17:50:55.654348 TIME STAMP 4. 89ced000 00000910
1793 17:50:55.657553 VBOOT WORK 5. 89cea000 00003000
1794 17:50:55.661060 VBOOT 6. 89ce9000 00000c0c
1795 17:50:55.664337 MRC DATA 7. 89ce7000 000018f0
1796 17:50:55.667958 ROMSTG STCK 8. 89ce6000 00000400
1797 17:50:55.671348 AFTER CAR 9. 89cdc000 0000a000
1798 17:50:55.674857 RAMSTAGE 10. 89c80000 0005c000
1799 17:50:55.677565 REFCODE 11. 89c4b000 00035000
1800 17:50:55.680934 SMM BACKUP 12. 89c3b000 00010000
1801 17:50:55.684991 COREBOOT 13. 89c33000 00008000
1802 17:50:55.687738 ACPI 14. 89c0f000 00024000
1803 17:50:55.691528 ACPI GNVS 15. 89c0e000 00001000
1804 17:50:55.694051 RAMOOPS 16. 89b0e000 00100000
1805 17:50:55.697925 TPM2 TCGLOG17. 89afe000 00010000
1806 17:50:55.700656 SMBIOS 18. 89afd000 00000800
1807 17:50:55.703201 IMD small region:
1808 17:50:55.706407 IMD ROOT 0. 89ffec00 00000400
1809 17:50:55.709459 FSP RUNTIME 1. 89ffebe0 00000004
1810 17:50:55.713547 POWER STATE 2. 89ffeba0 00000040
1811 17:50:55.716880 ROMSTAGE 3. 89ffeb80 00000004
1812 17:50:55.720205 MEM INFO 4. 89ffe9c0 000001a9
1813 17:50:55.724130 VPD 5. 89ffe960 00000058
1814 17:50:55.727908 COREBOOTFWD 6. 89ffe920 00000028
1815 17:50:55.730049 MTRR: Physical address space:
1816 17:50:55.737089 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1817 17:50:55.742339 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1818 17:50:55.749047 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1819 17:50:55.755551 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1820 17:50:55.761514 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1821 17:50:55.767069 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1822 17:50:55.773964 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1823 17:50:55.778189 MTRR: Fixed MSR 0x250 0x0606060606060606
1824 17:50:55.782260 MTRR: Fixed MSR 0x258 0x0606060606060606
1825 17:50:55.786203 MTRR: Fixed MSR 0x259 0x0000000000000000
1826 17:50:55.790106 MTRR: Fixed MSR 0x268 0x0606060606060606
1827 17:50:55.794559 MTRR: Fixed MSR 0x269 0x0606060606060606
1828 17:50:55.798453 MTRR: Fixed MSR 0x26a 0x0606060606060606
1829 17:50:55.802640 MTRR: Fixed MSR 0x26b 0x0606060606060606
1830 17:50:55.807081 MTRR: Fixed MSR 0x26c 0x0606060606060606
1831 17:50:55.811051 MTRR: Fixed MSR 0x26d 0x0606060606060606
1832 17:50:55.815045 MTRR: Fixed MSR 0x26e 0x0606060606060606
1833 17:50:55.818833 MTRR: Fixed MSR 0x26f 0x0606060606060606
1834 17:50:55.822231 call enable_fixed_mtrr()
1835 17:50:55.825983 CPU physical address size: 39 bits
1836 17:50:55.829929 MTRR: default type WB/UC MTRR counts: 7/7.
1837 17:50:55.833977 MTRR: UC selected as default type.
1838 17:50:55.839897 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1839 17:50:55.845992 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1840 17:50:55.852136 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1841 17:50:55.858688 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1842 17:50:55.864921 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1843 17:50:55.870971 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1844 17:50:55.877059 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1845 17:50:55.878352
1846 17:50:55.879015 MTRR check
1847 17:50:55.882098 Fixed MTRRs : Enabled
1848 17:50:55.884192 Variable MTRRs: Enabled
1849 17:50:55.884275
1850 17:50:55.888648 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 17:50:55.892777 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 17:50:55.896976 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 17:50:55.900746 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 17:50:55.904638 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 17:50:55.908928 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 17:50:55.913449 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 17:50:55.916993 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 17:50:55.921329 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 17:50:55.924803 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 17:50:55.929204 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 17:50:55.935585 BS: BS_WRITE_TABLES times (us): entry 17191 run 490114 exit 157113
1862 17:50:55.938325 call enable_fixed_mtrr()
1863 17:50:55.941913 CBFS @ 1d00000 size 300000
1864 17:50:55.948250 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1865 17:50:55.951607 CPU physical address size: 39 bits
1866 17:50:55.955081 CBFS: Locating 'fallback/payload'
1867 17:50:55.958971 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 17:50:55.963198 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 17:50:55.967506 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 17:50:55.971417 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 17:50:55.975080 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 17:50:55.979638 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 17:50:55.983476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 17:50:55.987331 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 17:50:55.991429 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 17:50:55.995948 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 17:50:55.999563 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 17:50:56.004222 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 17:50:56.008066 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 17:50:56.010265 call enable_fixed_mtrr()
1881 17:50:56.015232 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 17:50:56.019136 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 17:50:56.023192 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 17:50:56.027652 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 17:50:56.030957 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 17:50:56.034909 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 17:50:56.039546 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 17:50:56.043246 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 17:50:56.047144 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 17:50:56.050966 CPU physical address size: 39 bits
1891 17:50:56.054723 call enable_fixed_mtrr()
1892 17:50:56.058347 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 17:50:56.062750 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 17:50:56.066682 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 17:50:56.070672 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 17:50:56.075021 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 17:50:56.078205 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 17:50:56.082460 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 17:50:56.087168 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 17:50:56.090575 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 17:50:56.094748 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 17:50:56.099038 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 17:50:56.103110 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 17:50:56.107962 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 17:50:56.110221 call enable_fixed_mtrr()
1906 17:50:56.114029 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 17:50:56.117686 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 17:50:56.122437 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 17:50:56.126162 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 17:50:56.130316 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 17:50:56.135062 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 17:50:56.138946 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 17:50:56.142452 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 17:50:56.146401 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 17:50:56.150457 CPU physical address size: 39 bits
1916 17:50:56.154002 call enable_fixed_mtrr()
1917 17:50:56.156983 CPU physical address size: 39 bits
1918 17:50:56.161252 CBFS: Found @ offset 1cf4c0 size 3a954
1919 17:50:56.164202 CPU physical address size: 39 bits
1920 17:50:56.168162 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 17:50:56.172532 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 17:50:56.176165 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 17:50:56.180408 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 17:50:56.184402 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 17:50:56.189270 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 17:50:56.192329 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 17:50:56.196650 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 17:50:56.200613 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 17:50:56.205032 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 17:50:56.209381 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 17:50:56.213487 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 17:50:56.215955 call enable_fixed_mtrr()
1933 17:50:56.219711 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 17:50:56.224060 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 17:50:56.227810 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 17:50:56.232309 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 17:50:56.236765 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 17:50:56.240688 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 17:50:56.244250 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 17:50:56.249199 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 17:50:56.252713 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 17:50:56.256340 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 17:50:56.260897 CPU physical address size: 39 bits
1944 17:50:56.263063 call enable_fixed_mtrr()
1945 17:50:56.267787 Checking segment from ROM address 0xffecf4f8
1946 17:50:56.271145 CPU physical address size: 39 bits
1947 17:50:56.275661 Checking segment from ROM address 0xffecf514
1948 17:50:56.280184 Loading segment from ROM address 0xffecf4f8
1949 17:50:56.283253 code (compression=0)
1950 17:50:56.290884 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1951 17:50:56.299724 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1952 17:50:56.302091 it's not compressed!
1953 17:50:56.383429 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1954 17:50:56.390987 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1955 17:50:56.398710 Loading segment from ROM address 0xffecf514
1956 17:50:56.401326 Entry Point 0x30100018
1957 17:50:56.403286 Loaded segments
1958 17:50:56.413002 Finalizing chipset.
1959 17:50:56.413778 Finalizing SMM.
1960 17:50:56.419776 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466446 exit 11545
1961 17:50:56.423400 mp_park_aps done after 0 msecs.
1962 17:50:56.428100 Jumping to boot code at 30100018(89c33000)
1963 17:50:56.436787 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1964 17:50:56.436918
1965 17:50:56.437398
1966 17:50:56.437495
1967 17:50:56.440320 Starting depthcharge on sarien...
1968 17:50:56.441180 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
1969 17:50:56.441313 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
1970 17:50:56.441423 Setting prompt string to ['sarien:']
1971 17:50:56.441534 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
1972 17:50:56.441727
1973 17:50:56.448081 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1974 17:50:56.448169
1975 17:50:56.455504 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1976 17:50:56.456049
1977 17:50:56.463419 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1978 17:50:56.464115
1979 17:50:56.464954 BIOS MMAP details:
1980 17:50:56.465380
1981 17:50:56.468288 IFD Base Offset : 0x1000000
1982 17:50:56.468371
1983 17:50:56.471268 IFD End Offset : 0x2000000
1984 17:50:56.471556
1985 17:50:56.474353 MMAP Size : 0x1000000
1986 17:50:56.474436
1987 17:50:56.477132 MMAP Start : 0xff000000
1988 17:50:56.477722
1989 17:50:56.483961 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1990 17:50:56.487710
1991 17:50:56.492205 New NVMe Controller 0x3214e110 @ 00:1d:04
1992 17:50:56.492822
1993 17:50:56.496133 New NVMe Controller 0x3214e1d8 @ 00:1d:00
1994 17:50:56.496794
1995 17:50:56.502680 The GBB signature is at 0x30000014 and is: 24 47 42 42
1996 17:50:56.508037
1997 17:50:56.510637 Wipe memory regions:
1998 17:50:56.510733
1999 17:50:56.514539 [0x00000000001000, 0x000000000a0000)
2000 17:50:56.514627
2001 17:50:56.517913 [0x00000000100000, 0x00000030000000)
2002 17:50:56.600526
2003 17:50:56.604022 [0x00000032751910, 0x00000089afd000)
2004 17:50:56.753766
2005 17:50:56.757292 [0x00000100000000, 0x0000026e800000)
2006 17:50:57.766405
2007 17:50:57.768350 R8152: Initializing
2008 17:50:57.768527
2009 17:50:57.771070 Version 6 (ocp_data = 5c30)
2010 17:50:57.772174
2011 17:50:57.775333 R8152: Done initializing
2012 17:50:57.775570
2013 17:50:57.777294 Adding net device
2014 17:50:57.779207
2015 17:50:57.784541 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2016 17:50:57.785034
2017 17:50:57.785622
2018 17:50:57.785866
2019 17:50:57.786641 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2021 17:50:57.887246 sarien: tftpboot 192.168.201.1 11712639/tftp-deploy-dqdt0xrk/kernel/bzImage 11712639/tftp-deploy-dqdt0xrk/kernel/cmdline 11712639/tftp-deploy-dqdt0xrk/ramdisk/ramdisk.cpio.gz
2022 17:50:57.887457 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2023 17:50:57.887592 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2024 17:50:57.931546 tftpboot 192.168.201.1 11712639/tftp-deploy-dqdt0xrk/kernel/bzImage 11712639/tftp-deploy-dqdt0xrk/kernel/cmdline 11712639/tftp-deploy-dqdt0xrk/ramdisk/ramdisk.cpio.gz
2025 17:50:57.931658
2026 17:50:57.931742 Waiting for link
2027 17:50:58.091073
2028 17:50:58.091442 done.
2029 17:50:58.091533
2030 17:50:58.093811 MAC: 00:24:32:30:79:bd
2031 17:50:58.094542
2032 17:50:58.097196 Sending DHCP discover... done.
2033 17:50:58.097278
2034 17:50:58.100188 Waiting for reply... done.
2035 17:50:58.100283
2036 17:50:58.102761 Sending DHCP request... done.
2037 17:50:58.103173
2038 17:50:58.109098 Waiting for reply... done.
2039 17:50:58.109421
2040 17:50:58.111133 My ip is 192.168.201.166
2041 17:50:58.111449
2042 17:50:58.115618 The DHCP server ip is 192.168.201.1
2043 17:50:58.115695
2044 17:50:58.120567 TFTP server IP predefined by user: 192.168.201.1
2045 17:50:58.120646
2046 17:50:58.127916 Bootfile predefined by user: 11712639/tftp-deploy-dqdt0xrk/kernel/bzImage
2047 17:50:58.127995
2048 17:50:58.131012 Sending tftp read request... done.
2049 17:50:58.131322
2050 17:50:58.134860 Waiting for the transfer...
2051 17:50:58.134943
2052 17:50:58.667800 00000000 ################################################################
2053 17:50:58.668142
2054 17:50:59.198364 00080000 ################################################################
2055 17:50:59.198958
2056 17:50:59.758737 00100000 ################################################################
2057 17:50:59.759391
2058 17:51:00.303713 00180000 ################################################################
2059 17:51:00.304371
2060 17:51:00.828219 00200000 ################################################################
2061 17:51:00.828573
2062 17:51:01.352507 00280000 ################################################################
2063 17:51:01.353130
2064 17:51:01.898579 00300000 ################################################################
2065 17:51:01.898718
2066 17:51:02.567909 00380000 ################################################################
2067 17:51:02.568381
2068 17:51:03.202913 00400000 ################################################################
2069 17:51:03.203562
2070 17:51:03.735290 00480000 ################################################################
2071 17:51:03.735713
2072 17:51:04.254702 00500000 ################################################################
2073 17:51:04.255181
2074 17:51:04.789242 00580000 ################################################################
2075 17:51:04.789945
2076 17:51:05.310924 00600000 ################################################################
2077 17:51:05.311747
2078 17:51:05.848606 00680000 ################################################################
2079 17:51:05.849838
2080 17:51:06.372529 00700000 ################################################################
2081 17:51:06.373151
2082 17:51:06.905027 00780000 ################################################################
2083 17:51:06.905635
2084 17:51:07.015103 00800000 ############# done.
2085 17:51:07.015235
2086 17:51:07.018680 The bootfile was 8490896 bytes long.
2087 17:51:07.019321
2088 17:51:07.022605 Sending tftp read request... done.
2089 17:51:07.022682
2090 17:51:07.025215 Waiting for the transfer...
2091 17:51:07.025972
2092 17:51:07.579656 00000000 ################################################################
2093 17:51:07.580340
2094 17:51:08.139532 00080000 ################################################################
2095 17:51:08.140019
2096 17:51:08.694565 00100000 ################################################################
2097 17:51:08.695210
2098 17:51:09.243576 00180000 ################################################################
2099 17:51:09.244187
2100 17:51:09.799438 00200000 ################################################################
2101 17:51:09.799613
2102 17:51:10.372476 00280000 ################################################################
2103 17:51:10.373141
2104 17:51:10.950272 00300000 ################################################################
2105 17:51:10.950917
2106 17:51:11.539901 00380000 ################################################################
2107 17:51:11.540568
2108 17:51:12.106098 00400000 ################################################################
2109 17:51:12.107546
2110 17:51:12.669518 00480000 ################################################################
2111 17:51:12.670357
2112 17:51:13.331298 00500000 ################################################################
2113 17:51:13.331930
2114 17:51:13.990688 00580000 ################################################################
2115 17:51:13.991226
2116 17:51:14.645633 00600000 ################################################################
2117 17:51:14.645944
2118 17:51:15.302190 00680000 ################################################################
2119 17:51:15.302777
2120 17:51:15.879796 00700000 ################################################################
2121 17:51:15.880488
2122 17:51:16.454892 00780000 ################################################################
2123 17:51:16.455489
2124 17:51:16.924659 00800000 ##################################################### done.
2125 17:51:16.924964
2126 17:51:16.927877 Sending tftp read request... done.
2127 17:51:16.928190
2128 17:51:16.930652 Waiting for the transfer...
2129 17:51:16.931648
2130 17:51:16.932419 00000000 # done.
2131 17:51:16.933381
2132 17:51:16.942225 Command line loaded dynamically from TFTP file: 11712639/tftp-deploy-dqdt0xrk/kernel/cmdline
2133 17:51:16.942492
2134 17:51:16.961968 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2135 17:51:16.965750
2136 17:51:16.968863 Shutting down all USB controllers.
2137 17:51:16.969163
2138 17:51:16.971403 Removing current net device
2139 17:51:16.975291
2140 17:51:16.977928 EC: exit firmware mode
2141 17:51:16.978575
2142 17:51:16.980315 Finalizing coreboot
2143 17:51:16.982232
2144 17:51:16.987107 Exiting depthcharge with code 4 at timestamp: 28274029
2145 17:51:16.988072
2146 17:51:16.988213
2147 17:51:16.989411 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2148 17:51:16.989580 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
2149 17:51:16.989684 Setting prompt string to ['Linux version [0-9]']
2150 17:51:16.989801 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2151 17:51:16.989899 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2152 17:51:16.990184 Starting kernel ...
2153 17:51:16.990301
2154 17:51:16.990644
2156 17:55:27.990457 end: 2.2.5 auto-login-action (duration 00:04:11) [common]
2158 17:55:27.992133 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
2160 17:55:27.993425 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2163 17:55:27.995440 end: 2 depthcharge-action (duration 00:05:00) [common]
2165 17:55:27.996780 Cleaning after the job
2166 17:55:27.997257 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/ramdisk
2167 17:55:28.003213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/kernel
2168 17:55:28.011557 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712639/tftp-deploy-dqdt0xrk/modules
2169 17:55:28.013852 start: 5.1 power-off (timeout 00:00:30) [common]
2170 17:55:28.015191 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
2171 17:55:33.166090 >> Command sent successfully.
2172 17:55:33.172206 Returned 0 in 5 seconds
2173 17:55:33.273020 end: 5.1 power-off (duration 00:00:05) [common]
2175 17:55:33.274650 start: 5.2 read-feedback (timeout 00:09:55) [common]
2176 17:55:33.276178 Listened to connection for namespace 'common' for up to 1s
2177 17:55:34.275663 Finalising connection for namespace 'common'
2178 17:55:34.276317 Disconnecting from shell: Finalise
2179 17:55:34.276715
2180 17:55:34.377699 end: 5.2 read-feedback (duration 00:00:01) [common]
2181 17:55:34.378293 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712639
2182 17:55:34.398331 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712639
2183 17:55:34.398482 JobError: Your job cannot terminate cleanly.