Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:57:17.562685 lava-dispatcher, installed at version: 2023.08
2 17:57:17.562939 start: 0 validate
3 17:57:17.563070 Start time: 2023-10-09 17:57:17.563062+00:00 (UTC)
4 17:57:17.563182 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:57:17.563344 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:57:17.838168 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:57:17.838338 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:57:18.105550 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:57:18.106271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:57:21.191399 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:57:21.191602 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:57:21.451045 validate duration: 3.89
14 17:57:21.451396 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:57:21.451495 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:57:21.451596 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:57:21.451731 Not decompressing ramdisk as can be used compressed.
18 17:57:21.451829 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:57:21.451894 saving as /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/ramdisk/initrd.cpio.gz
20 17:57:21.451958 total size: 5432690 (5 MB)
21 17:57:21.963965 progress 0 % (0 MB)
22 17:57:21.965821 progress 5 % (0 MB)
23 17:57:21.967429 progress 10 % (0 MB)
24 17:57:21.968985 progress 15 % (0 MB)
25 17:57:21.970763 progress 20 % (1 MB)
26 17:57:21.972373 progress 25 % (1 MB)
27 17:57:21.973943 progress 30 % (1 MB)
28 17:57:21.975696 progress 35 % (1 MB)
29 17:57:21.977237 progress 40 % (2 MB)
30 17:57:21.978839 progress 45 % (2 MB)
31 17:57:21.980394 progress 50 % (2 MB)
32 17:57:21.982098 progress 55 % (2 MB)
33 17:57:21.983653 progress 60 % (3 MB)
34 17:57:21.985129 progress 65 % (3 MB)
35 17:57:21.986920 progress 70 % (3 MB)
36 17:57:21.988425 progress 75 % (3 MB)
37 17:57:21.989971 progress 80 % (4 MB)
38 17:57:21.991528 progress 85 % (4 MB)
39 17:57:21.993206 progress 90 % (4 MB)
40 17:57:21.994832 progress 95 % (4 MB)
41 17:57:21.996333 progress 100 % (5 MB)
42 17:57:21.996574 5 MB downloaded in 0.54 s (9.51 MB/s)
43 17:57:21.996778 end: 1.1.1 http-download (duration 00:00:01) [common]
45 17:57:21.997156 end: 1.1 download-retry (duration 00:00:01) [common]
46 17:57:21.997273 start: 1.2 download-retry (timeout 00:09:59) [common]
47 17:57:21.997372 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 17:57:21.997536 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:57:21.997636 saving as /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/kernel/bzImage
50 17:57:21.997726 total size: 8490896 (8 MB)
51 17:57:21.997814 No compression specified
52 17:57:21.999403 progress 0 % (0 MB)
53 17:57:22.001619 progress 5 % (0 MB)
54 17:57:22.004050 progress 10 % (0 MB)
55 17:57:22.006447 progress 15 % (1 MB)
56 17:57:22.008814 progress 20 % (1 MB)
57 17:57:22.011233 progress 25 % (2 MB)
58 17:57:22.013619 progress 30 % (2 MB)
59 17:57:22.016086 progress 35 % (2 MB)
60 17:57:22.018559 progress 40 % (3 MB)
61 17:57:22.020981 progress 45 % (3 MB)
62 17:57:22.023427 progress 50 % (4 MB)
63 17:57:22.025822 progress 55 % (4 MB)
64 17:57:22.028191 progress 60 % (4 MB)
65 17:57:22.030548 progress 65 % (5 MB)
66 17:57:22.032937 progress 70 % (5 MB)
67 17:57:22.035446 progress 75 % (6 MB)
68 17:57:22.037825 progress 80 % (6 MB)
69 17:57:22.040190 progress 85 % (6 MB)
70 17:57:22.042531 progress 90 % (7 MB)
71 17:57:22.044920 progress 95 % (7 MB)
72 17:57:22.047303 progress 100 % (8 MB)
73 17:57:22.047423 8 MB downloaded in 0.05 s (162.95 MB/s)
74 17:57:22.047566 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:57:22.047792 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:57:22.047878 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:57:22.047966 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:57:22.048113 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:57:22.048206 saving as /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/nfsrootfs/full.rootfs.tar
81 17:57:22.048298 total size: 133380384 (127 MB)
82 17:57:22.048388 Using unxz to decompress xz
83 17:57:22.053039 progress 0 % (0 MB)
84 17:57:22.396981 progress 5 % (6 MB)
85 17:57:22.751082 progress 10 % (12 MB)
86 17:57:23.041839 progress 15 % (19 MB)
87 17:57:23.226735 progress 20 % (25 MB)
88 17:57:23.471583 progress 25 % (31 MB)
89 17:57:23.817611 progress 30 % (38 MB)
90 17:57:24.163896 progress 35 % (44 MB)
91 17:57:24.572601 progress 40 % (50 MB)
92 17:57:24.962456 progress 45 % (57 MB)
93 17:57:25.336209 progress 50 % (63 MB)
94 17:57:25.721482 progress 55 % (69 MB)
95 17:57:26.088089 progress 60 % (76 MB)
96 17:57:26.455584 progress 65 % (82 MB)
97 17:57:26.826665 progress 70 % (89 MB)
98 17:57:27.196867 progress 75 % (95 MB)
99 17:57:27.646157 progress 80 % (101 MB)
100 17:57:28.104220 progress 85 % (108 MB)
101 17:57:28.371872 progress 90 % (114 MB)
102 17:57:28.719683 progress 95 % (120 MB)
103 17:57:29.115222 progress 100 % (127 MB)
104 17:57:29.120547 127 MB downloaded in 7.07 s (17.99 MB/s)
105 17:57:29.120852 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:57:29.121267 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:57:29.121396 start: 1.4 download-retry (timeout 00:09:52) [common]
109 17:57:29.121526 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 17:57:29.121725 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:57:29.121805 saving as /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/modules/modules.tar
112 17:57:29.121905 total size: 250928 (0 MB)
113 17:57:29.122009 Using unxz to decompress xz
114 17:57:29.126416 progress 13 % (0 MB)
115 17:57:29.126890 progress 26 % (0 MB)
116 17:57:29.127169 progress 39 % (0 MB)
117 17:57:29.128736 progress 52 % (0 MB)
118 17:57:29.130561 progress 65 % (0 MB)
119 17:57:29.132483 progress 78 % (0 MB)
120 17:57:29.134364 progress 91 % (0 MB)
121 17:57:29.136169 progress 100 % (0 MB)
122 17:57:29.141718 0 MB downloaded in 0.02 s (12.08 MB/s)
123 17:57:29.141960 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:57:29.142216 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:57:29.142316 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 17:57:29.142413 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 17:57:31.446333 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712595/extract-nfsrootfs-o0y9z9_k
129 17:57:31.446526 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 17:57:31.446630 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 17:57:31.446843 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf
132 17:57:31.447020 makedir: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin
133 17:57:31.447128 makedir: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/tests
134 17:57:31.447230 makedir: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/results
135 17:57:31.447332 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-add-keys
136 17:57:31.447477 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-add-sources
137 17:57:31.447609 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-background-process-start
138 17:57:31.447740 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-background-process-stop
139 17:57:31.447870 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-common-functions
140 17:57:31.447997 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-echo-ipv4
141 17:57:31.448156 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-install-packages
142 17:57:31.448288 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-installed-packages
143 17:57:31.448414 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-os-build
144 17:57:31.448542 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-probe-channel
145 17:57:31.448668 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-probe-ip
146 17:57:31.448795 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-target-ip
147 17:57:31.448920 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-target-mac
148 17:57:31.449044 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-target-storage
149 17:57:31.449172 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-case
150 17:57:31.449300 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-event
151 17:57:31.449425 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-feedback
152 17:57:31.449582 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-raise
153 17:57:31.449707 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-reference
154 17:57:31.449833 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-runner
155 17:57:31.449958 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-set
156 17:57:31.450084 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-test-shell
157 17:57:31.450211 Updating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-install-packages (oe)
158 17:57:31.450366 Updating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/bin/lava-installed-packages (oe)
159 17:57:31.450508 Creating /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/environment
160 17:57:31.450624 LAVA metadata
161 17:57:31.450697 - LAVA_JOB_ID=11712595
162 17:57:31.450933 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:57:31.451041 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 17:57:31.451110 skipped lava-vland-overlay
165 17:57:31.451186 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:57:31.451283 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 17:57:31.451360 skipped lava-multinode-overlay
168 17:57:31.451434 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:57:31.451512 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 17:57:31.451587 Loading test definitions
171 17:57:31.451685 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 17:57:31.451756 Using /lava-11712595 at stage 0
173 17:57:31.452206 uuid=11712595_1.5.2.3.1 testdef=None
174 17:57:31.452296 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 17:57:31.452380 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 17:57:31.452913 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 17:57:31.453210 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 17:57:31.453879 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 17:57:31.454138 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 17:57:31.454836 runner path: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/0/tests/0_dmesg test_uuid 11712595_1.5.2.3.1
183 17:57:31.454995 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 17:57:31.455220 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 17:57:31.455293 Using /lava-11712595 at stage 1
187 17:57:31.455598 uuid=11712595_1.5.2.3.5 testdef=None
188 17:57:31.455687 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 17:57:31.455770 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 17:57:31.456331 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 17:57:31.456551 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 17:57:31.457195 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 17:57:31.457423 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 17:57:31.458189 runner path: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/1/tests/1_bootrr test_uuid 11712595_1.5.2.3.5
197 17:57:31.458359 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 17:57:31.458563 Creating lava-test-runner.conf files
200 17:57:31.458626 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/0 for stage 0
201 17:57:31.458717 - 0_dmesg
202 17:57:31.458835 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712595/lava-overlay-4epnclsf/lava-11712595/1 for stage 1
203 17:57:31.458928 - 1_bootrr
204 17:57:31.459022 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 17:57:31.459110 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 17:57:31.466649 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 17:57:31.466786 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 17:57:31.466888 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 17:57:31.466975 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 17:57:31.467060 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 17:57:31.604658 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 17:57:31.605058 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 17:57:31.605178 extracting modules file /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712595/extract-nfsrootfs-o0y9z9_k
214 17:57:31.618854 extracting modules file /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712595/extract-overlay-ramdisk-6_w3t4mk/ramdisk
215 17:57:31.632407 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 17:57:31.632533 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 17:57:31.632623 [common] Applying overlay to NFS
218 17:57:31.632694 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712595/compress-overlay-am8osm17/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712595/extract-nfsrootfs-o0y9z9_k
219 17:57:31.640857 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 17:57:31.640967 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 17:57:31.641057 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 17:57:31.641148 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 17:57:31.641225 Building ramdisk /var/lib/lava/dispatcher/tmp/11712595/extract-overlay-ramdisk-6_w3t4mk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712595/extract-overlay-ramdisk-6_w3t4mk/ramdisk
224 17:57:31.719677 >> 26159 blocks
225 17:57:32.252449 rename /var/lib/lava/dispatcher/tmp/11712595/extract-overlay-ramdisk-6_w3t4mk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/ramdisk/ramdisk.cpio.gz
226 17:57:32.252907 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 17:57:32.253040 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 17:57:32.253138 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 17:57:32.253235 No mkimage arch provided, not using FIT.
230 17:57:32.253327 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 17:57:32.253470 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 17:57:32.253603 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 17:57:32.253696 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 17:57:32.253778 No LXC device requested
235 17:57:32.253881 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 17:57:32.253982 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 17:57:32.254067 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 17:57:32.254143 Checking files for TFTP limit of 4294967296 bytes.
239 17:57:32.254556 end: 1 tftp-deploy (duration 00:00:11) [common]
240 17:57:32.254666 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 17:57:32.254809 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 17:57:32.254939 substitutions:
243 17:57:32.255005 - {DTB}: None
244 17:57:32.255067 - {INITRD}: 11712595/tftp-deploy-sgfxg_0h/ramdisk/ramdisk.cpio.gz
245 17:57:32.255126 - {KERNEL}: 11712595/tftp-deploy-sgfxg_0h/kernel/bzImage
246 17:57:32.255184 - {LAVA_MAC}: None
247 17:57:32.255240 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712595/extract-nfsrootfs-o0y9z9_k
248 17:57:32.255296 - {NFS_SERVER_IP}: 192.168.201.1
249 17:57:32.255352 - {PRESEED_CONFIG}: None
250 17:57:32.255407 - {PRESEED_LOCAL}: None
251 17:57:32.255461 - {RAMDISK}: 11712595/tftp-deploy-sgfxg_0h/ramdisk/ramdisk.cpio.gz
252 17:57:32.255517 - {ROOT_PART}: None
253 17:57:32.255572 - {ROOT}: None
254 17:57:32.255627 - {SERVER_IP}: 192.168.201.1
255 17:57:32.255681 - {TEE}: None
256 17:57:32.255735 Parsed boot commands:
257 17:57:32.255788 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 17:57:32.255971 Parsed boot commands: tftpboot 192.168.201.1 11712595/tftp-deploy-sgfxg_0h/kernel/bzImage 11712595/tftp-deploy-sgfxg_0h/kernel/cmdline 11712595/tftp-deploy-sgfxg_0h/ramdisk/ramdisk.cpio.gz
259 17:57:32.256062 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 17:57:32.256149 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 17:57:32.256245 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 17:57:32.256333 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 17:57:32.256402 Not connected, no need to disconnect.
264 17:57:32.256478 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 17:57:32.256561 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 17:57:32.256629 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-6'
267 17:57:32.260614 Setting prompt string to ['lava-test: # ']
268 17:57:32.260979 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 17:57:32.261085 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 17:57:32.261183 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 17:57:32.261275 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 17:57:32.261558 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
273 17:57:37.398845 >> Command sent successfully.
274 17:57:37.409771 Returned 0 in 5 seconds
275 17:57:37.511114 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 17:57:37.512535 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 17:57:37.513024 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 17:57:37.513487 Setting prompt string to 'Starting depthcharge on Voema...'
280 17:57:37.513831 Changing prompt to 'Starting depthcharge on Voema...'
281 17:57:37.514230 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 17:57:37.515482 [Enter `^Ec?' for help]
283 17:57:39.142173 ���˻1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
284 17:57:39.149164 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
285 17:57:39.153718 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
286 17:57:39.157470 CPU: AES supported, TXT NOT supported, VT supported
287 17:57:39.161518 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
288 17:57:39.169163 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
289 17:57:39.172925 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
290 17:57:39.176289 VBOOT: Loading verstage.
291 17:57:39.180230 FMAP: Found "FLASH" version 1.1 at 0x1804000.
292 17:57:39.184144 FMAP: base = 0x0 size = 0x2000000 #areas = 32
293 17:57:39.191866 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
294 17:57:39.199553 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
295 17:57:39.207635 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
296 17:57:39.207719
297 17:57:39.207784
298 17:57:39.217993 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
299 17:57:39.233463 Probing TPM: . done!
300 17:57:39.236711 TPM ready after 0 ms
301 17:57:39.240195 Connected to device vid:did:rid of 1ae0:0028:00
302 17:57:39.251460 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
303 17:57:39.258324 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 17:57:39.261304 Initialized TPM device CR50 revision 0
305 17:57:39.313068 tlcl_send_startup: Startup return code is 0
306 17:57:39.313349 TPM: setup succeeded
307 17:57:39.328666 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 17:57:39.342558 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 17:57:39.355997 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
310 17:57:39.365825 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 17:57:39.369834 Chrome EC: UHEPI supported
312 17:57:39.372877 Phase 1
313 17:57:39.376660 FMAP: area GBB found @ 1805000 (458752 bytes)
314 17:57:39.383133 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 17:57:39.393103 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 17:57:39.399442 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
317 17:57:39.405907 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
318 17:57:39.409166 Recovery requested (1009000e)
319 17:57:39.412830 TPM: Extending digest for VBOOT: boot mode into PCR 0
320 17:57:39.424166 tlcl_extend: response is 0
321 17:57:39.431222 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
322 17:57:39.441045 tlcl_extend: response is 0
323 17:57:39.447664 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
324 17:57:39.454429 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
325 17:57:39.460562 BS: verstage times (exec / console): total (unknown) / 142 ms
326 17:57:39.460994
327 17:57:39.461331
328 17:57:39.474340 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
329 17:57:39.480767 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
330 17:57:39.483648 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
331 17:57:39.487265 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
332 17:57:39.493764 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
333 17:57:39.497110 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
334 17:57:39.500799 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
335 17:57:39.503628 TCO_STS: 0000 0000
336 17:57:39.507197 GEN_PMCON: d0015038 00002200
337 17:57:39.510281 GBLRST_CAUSE: 00000000 00000000
338 17:57:39.510701 HPR_CAUSE0: 00000000
339 17:57:39.513771 prev_sleep_state 5
340 17:57:39.517393 Boot Count incremented to 23540
341 17:57:39.523711 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 17:57:39.530551 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 17:57:39.537045 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 17:57:39.543559 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
345 17:57:39.548490 Chrome EC: UHEPI supported
346 17:57:39.555071 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
347 17:57:39.567792 Probing TPM: done!
348 17:57:39.575163 Connected to device vid:did:rid of 1ae0:0028:00
349 17:57:39.585780 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
350 17:57:39.592597 Initialized TPM device CR50 revision 0
351 17:57:39.602619 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
352 17:57:39.609178 MRC: Hash idx 0x100b comparison successful.
353 17:57:39.612251 MRC cache found, size faa8
354 17:57:39.612738 bootmode is set to: 2
355 17:57:39.616197 SPD index = 0
356 17:57:39.622079 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
357 17:57:39.625690 SPD: module type is LPDDR4X
358 17:57:39.629106 SPD: module part number is MT53E512M64D4NW-046
359 17:57:39.635515 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
360 17:57:39.638921 SPD: device width 16 bits, bus width 16 bits
361 17:57:39.645482 SPD: module size is 1024 MB (per channel)
362 17:57:40.078623 CBMEM:
363 17:57:40.081617 IMD: root @ 0x76fff000 254 entries.
364 17:57:40.084637 IMD: root @ 0x76ffec00 62 entries.
365 17:57:40.088162 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
366 17:57:40.094708 FMAP: area RW_VPD found @ f35000 (8192 bytes)
367 17:57:40.098347 External stage cache:
368 17:57:40.101368 IMD: root @ 0x7b3ff000 254 entries.
369 17:57:40.104844 IMD: root @ 0x7b3fec00 62 entries.
370 17:57:40.120912 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
371 17:57:40.126975 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
372 17:57:40.133881 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
373 17:57:40.148035 MRC: 'RECOVERY_MRC_CACHE' does not need update.
374 17:57:40.154928 cse_lite: Skip switching to RW in the recovery path
375 17:57:40.155459 8 DIMMs found
376 17:57:40.155815 SMM Memory Map
377 17:57:40.158639 SMRAM : 0x7b000000 0x800000
378 17:57:40.162438 Subregion 0: 0x7b000000 0x200000
379 17:57:40.165711 Subregion 1: 0x7b200000 0x200000
380 17:57:40.168812 Subregion 2: 0x7b400000 0x400000
381 17:57:40.172114 top_of_ram = 0x77000000
382 17:57:40.179403 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
383 17:57:40.182550 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
384 17:57:40.188893 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
385 17:57:40.192286 MTRR Range: Start=ff000000 End=0 (Size 1000000)
386 17:57:40.202552 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
387 17:57:40.205741 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
388 17:57:40.217575 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
389 17:57:40.223927 Processing 211 relocs. Offset value of 0x74c0b000
390 17:57:40.230806 BS: romstage times (exec / console): total (unknown) / 277 ms
391 17:57:40.236585
392 17:57:40.237013
393 17:57:40.246890 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
394 17:57:40.250379 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
395 17:57:40.260220 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
396 17:57:40.267028 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
397 17:57:40.272996 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
398 17:57:40.279821 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
399 17:57:40.327364 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
400 17:57:40.333706 Processing 5008 relocs. Offset value of 0x75d98000
401 17:57:40.336854 BS: postcar times (exec / console): total (unknown) / 59 ms
402 17:57:40.337400
403 17:57:40.340337
404 17:57:40.350919 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 17:57:40.351360 Normal boot
406 17:57:40.353845 FW_CONFIG value is 0x804c02
407 17:57:40.357310 PCI: 00:07.0 disabled by fw_config
408 17:57:40.360291 PCI: 00:07.1 disabled by fw_config
409 17:57:40.364290 PCI: 00:0d.2 disabled by fw_config
410 17:57:40.367164 PCI: 00:1c.7 disabled by fw_config
411 17:57:40.373457 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 17:57:40.380542 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 17:57:40.383725 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 17:57:40.386699 GENERIC: 0.0 disabled by fw_config
415 17:57:40.390147 GENERIC: 1.0 disabled by fw_config
416 17:57:40.397096 fw_config match found: DB_USB=USB3_ACTIVE
417 17:57:40.400376 fw_config match found: DB_USB=USB3_ACTIVE
418 17:57:40.403766 fw_config match found: DB_USB=USB3_ACTIVE
419 17:57:40.407175 fw_config match found: DB_USB=USB3_ACTIVE
420 17:57:40.413390 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 17:57:40.419952 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 17:57:40.429848 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 17:57:40.436550 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 17:57:40.440120 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 17:57:40.446654 microcode: Update skipped, already up-to-date
426 17:57:40.452869 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 17:57:40.480111 Detected 4 core, 8 thread CPU.
428 17:57:40.483774 Setting up SMI for CPU
429 17:57:40.487237 IED base = 0x7b400000
430 17:57:40.487825 IED size = 0x00400000
431 17:57:40.490099 Will perform SMM setup.
432 17:57:40.496673 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
433 17:57:40.503446 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 17:57:40.509992 Processing 16 relocs. Offset value of 0x00030000
435 17:57:40.513539 Attempting to start 7 APs
436 17:57:40.516562 Waiting for 10ms after sending INIT.
437 17:57:40.532256 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 17:57:40.532839 done.
439 17:57:40.535650 AP: slot 2 apic_id 3.
440 17:57:40.539303 AP: slot 5 apic_id 2.
441 17:57:40.539704 AP: slot 4 apic_id 4.
442 17:57:40.545714 Waiting for 2nd SIPI to complete...done.
443 17:57:40.546126 AP: slot 7 apic_id 5.
444 17:57:40.549132 AP: slot 3 apic_id 7.
445 17:57:40.552273 AP: slot 6 apic_id 6.
446 17:57:40.559234 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 17:57:40.565557 Processing 13 relocs. Offset value of 0x00038000
448 17:57:40.568618 Unable to locate Global NVS
449 17:57:40.575643 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
450 17:57:40.579136 Installing permanent SMM handler to 0x7b000000
451 17:57:40.588926 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
452 17:57:40.592358 Processing 794 relocs. Offset value of 0x7b010000
453 17:57:40.602058 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
454 17:57:40.605400 Processing 13 relocs. Offset value of 0x7b008000
455 17:57:40.612352 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
456 17:57:40.618550 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
457 17:57:40.621463 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
458 17:57:40.628516 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
459 17:57:40.635137 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
460 17:57:40.641525 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
461 17:57:40.648074 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
462 17:57:40.648155 Unable to locate Global NVS
463 17:57:40.658095 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
464 17:57:40.661695 Clearing SMI status registers
465 17:57:40.661775 SMI_STS: PM1
466 17:57:40.665073 PM1_STS: PWRBTN
467 17:57:40.671665 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
468 17:57:40.674737 In relocation handler: CPU 0
469 17:57:40.678258 New SMBASE=0x7b000000 IEDBASE=0x7b400000
470 17:57:40.684580 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 17:57:40.684657 Relocation complete.
472 17:57:40.694911 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
473 17:57:40.695017 In relocation handler: CPU 1
474 17:57:40.701401 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
475 17:57:40.701485 Relocation complete.
476 17:57:40.708113 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
477 17:57:40.711602 In relocation handler: CPU 6
478 17:57:40.718233 New SMBASE=0x7affe800 IEDBASE=0x7b400000
479 17:57:40.721172 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 17:57:40.724805 Relocation complete.
481 17:57:40.731168 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 17:57:40.734669 In relocation handler: CPU 3
483 17:57:40.738317 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 17:57:40.741240 Relocation complete.
485 17:57:40.748393 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
486 17:57:40.751501 In relocation handler: CPU 4
487 17:57:40.754471 New SMBASE=0x7afff000 IEDBASE=0x7b400000
488 17:57:40.758091 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 17:57:40.761490 Relocation complete.
490 17:57:40.768093 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
491 17:57:40.771529 In relocation handler: CPU 7
492 17:57:40.774700 New SMBASE=0x7affe400 IEDBASE=0x7b400000
493 17:57:40.778050 Relocation complete.
494 17:57:40.784649 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
495 17:57:40.788234 In relocation handler: CPU 5
496 17:57:40.791251 New SMBASE=0x7affec00 IEDBASE=0x7b400000
497 17:57:40.797831 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 17:57:40.797915 Relocation complete.
499 17:57:40.808040 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
500 17:57:40.808125 In relocation handler: CPU 2
501 17:57:40.814686 New SMBASE=0x7afff800 IEDBASE=0x7b400000
502 17:57:40.814811 Relocation complete.
503 17:57:40.818491 Initializing CPU #0
504 17:57:40.822275 CPU: vendor Intel device 806c1
505 17:57:40.825020 CPU: family 06, model 8c, stepping 01
506 17:57:40.828546 Clearing out pending MCEs
507 17:57:40.831972 Setting up local APIC...
508 17:57:40.832059 apic_id: 0x00 done.
509 17:57:40.835082 Turbo is available but hidden
510 17:57:40.838675 Turbo is available and visible
511 17:57:40.841802 microcode: Update skipped, already up-to-date
512 17:57:40.845309 CPU #0 initialized
513 17:57:40.848689 Initializing CPU #6
514 17:57:40.848776 Initializing CPU #3
515 17:57:40.852303 CPU: vendor Intel device 806c1
516 17:57:40.855225 CPU: family 06, model 8c, stepping 01
517 17:57:40.858839 CPU: vendor Intel device 806c1
518 17:57:40.862272 CPU: family 06, model 8c, stepping 01
519 17:57:40.865654 Clearing out pending MCEs
520 17:57:40.868644 Clearing out pending MCEs
521 17:57:40.872203 Setting up local APIC...
522 17:57:40.872290 Initializing CPU #1
523 17:57:40.875293 apic_id: 0x06 done.
524 17:57:40.878694 Setting up local APIC...
525 17:57:40.878822 Initializing CPU #4
526 17:57:40.882229 Initializing CPU #5
527 17:57:40.885428 Initializing CPU #2
528 17:57:40.888530 CPU: vendor Intel device 806c1
529 17:57:40.892067 CPU: family 06, model 8c, stepping 01
530 17:57:40.895068 CPU: vendor Intel device 806c1
531 17:57:40.898755 CPU: family 06, model 8c, stepping 01
532 17:57:40.901712 Clearing out pending MCEs
533 17:57:40.901798 Clearing out pending MCEs
534 17:57:40.905642 Setting up local APIC...
535 17:57:40.909237 CPU: vendor Intel device 806c1
536 17:57:40.912048 CPU: family 06, model 8c, stepping 01
537 17:57:40.919042 microcode: Update skipped, already up-to-date
538 17:57:40.919490 apic_id: 0x07 done.
539 17:57:40.921941 CPU #6 initialized
540 17:57:40.925480 microcode: Update skipped, already up-to-date
541 17:57:40.928886 Setting up local APIC...
542 17:57:40.932140 CPU #3 initialized
543 17:57:40.932584 apic_id: 0x03 done.
544 17:57:40.935770 apic_id: 0x02 done.
545 17:57:40.938640 microcode: Update skipped, already up-to-date
546 17:57:40.945395 microcode: Update skipped, already up-to-date
547 17:57:40.945842 CPU #2 initialized
548 17:57:40.948818 CPU #5 initialized
549 17:57:40.952104 Initializing CPU #7
550 17:57:40.952549 CPU: vendor Intel device 806c1
551 17:57:40.958605 CPU: family 06, model 8c, stepping 01
552 17:57:40.962270 CPU: vendor Intel device 806c1
553 17:57:40.965227 CPU: family 06, model 8c, stepping 01
554 17:57:40.965673 Clearing out pending MCEs
555 17:57:40.968673 Clearing out pending MCEs
556 17:57:40.972312 Setting up local APIC...
557 17:57:40.975294 Clearing out pending MCEs
558 17:57:40.975724 apic_id: 0x04 done.
559 17:57:40.978822 Setting up local APIC...
560 17:57:40.985539 microcode: Update skipped, already up-to-date
561 17:57:40.986079 apic_id: 0x05 done.
562 17:57:40.988904 CPU #4 initialized
563 17:57:40.992130 microcode: Update skipped, already up-to-date
564 17:57:40.995367 Setting up local APIC...
565 17:57:40.998416 CPU #7 initialized
566 17:57:40.998955 apic_id: 0x01 done.
567 17:57:41.005534 microcode: Update skipped, already up-to-date
568 17:57:41.005982 CPU #1 initialized
569 17:57:41.011996 bsp_do_flight_plan done after 461 msecs.
570 17:57:41.012429 CPU: frequency set to 4000 MHz
571 17:57:41.015564 Enabling SMIs.
572 17:57:41.021954 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
573 17:57:41.037558 SATAXPCIE1 indicates PCIe NVMe is present
574 17:57:41.041050 Probing TPM: done!
575 17:57:41.044286 Connected to device vid:did:rid of 1ae0:0028:00
576 17:57:41.054987 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
577 17:57:41.058217 Initialized TPM device CR50 revision 0
578 17:57:41.061335 Enabling S0i3.4
579 17:57:41.068343 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
580 17:57:41.071472 Found a VBT of 8704 bytes after decompression
581 17:57:41.078039 cse_lite: CSE RO boot. HybridStorageMode disabled
582 17:57:41.084425 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
583 17:57:41.159801 FSPS returned 0
584 17:57:41.163323 Executing Phase 1 of FspMultiPhaseSiInit
585 17:57:41.173051 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
586 17:57:41.176388 port C0 DISC req: usage 1 usb3 1 usb2 5
587 17:57:41.179737 Raw Buffer output 0 00000511
588 17:57:41.182844 Raw Buffer output 1 00000000
589 17:57:41.186587 pmc_send_ipc_cmd succeeded
590 17:57:41.193299 port C1 DISC req: usage 1 usb3 2 usb2 3
591 17:57:41.193987 Raw Buffer output 0 00000321
592 17:57:41.196364 Raw Buffer output 1 00000000
593 17:57:41.200491 pmc_send_ipc_cmd succeeded
594 17:57:41.205700 Detected 4 core, 8 thread CPU.
595 17:57:41.209068 Detected 4 core, 8 thread CPU.
596 17:57:41.442577 Display FSP Version Info HOB
597 17:57:41.446082 Reference Code - CPU = a.0.4c.31
598 17:57:41.449691 uCode Version = 0.0.0.86
599 17:57:41.452474 TXT ACM version = ff.ff.ff.ffff
600 17:57:41.456062 Reference Code - ME = a.0.4c.31
601 17:57:41.459490 MEBx version = 0.0.0.0
602 17:57:41.462461 ME Firmware Version = Consumer SKU
603 17:57:41.465914 Reference Code - PCH = a.0.4c.31
604 17:57:41.469453 PCH-CRID Status = Disabled
605 17:57:41.472414 PCH-CRID Original Value = ff.ff.ff.ffff
606 17:57:41.475958 PCH-CRID New Value = ff.ff.ff.ffff
607 17:57:41.478984 OPROM - RST - RAID = ff.ff.ff.ffff
608 17:57:41.482467 PCH Hsio Version = 4.0.0.0
609 17:57:41.486054 Reference Code - SA - System Agent = a.0.4c.31
610 17:57:41.489407 Reference Code - MRC = 2.0.0.1
611 17:57:41.492712 SA - PCIe Version = a.0.4c.31
612 17:57:41.495614 SA-CRID Status = Disabled
613 17:57:41.499397 SA-CRID Original Value = 0.0.0.1
614 17:57:41.502548 SA-CRID New Value = 0.0.0.1
615 17:57:41.505868 OPROM - VBIOS = ff.ff.ff.ffff
616 17:57:41.509069 IO Manageability Engine FW Version = 11.1.4.0
617 17:57:41.512591 PHY Build Version = 0.0.0.e0
618 17:57:41.516060 Thunderbolt(TM) FW Version = 0.0.0.0
619 17:57:41.522470 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
620 17:57:41.526117 ITSS IRQ Polarities Before:
621 17:57:41.526201 IPC0: 0xffffffff
622 17:57:41.529094 IPC1: 0xffffffff
623 17:57:41.529189 IPC2: 0xffffffff
624 17:57:41.532530 IPC3: 0xffffffff
625 17:57:41.535797 ITSS IRQ Polarities After:
626 17:57:41.535880 IPC0: 0xffffffff
627 17:57:41.539427 IPC1: 0xffffffff
628 17:57:41.539510 IPC2: 0xffffffff
629 17:57:41.542389 IPC3: 0xffffffff
630 17:57:41.545622 Found PCIe Root Port #9 at PCI: 00:1d.0.
631 17:57:41.558748 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
632 17:57:41.568793 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
633 17:57:41.582501 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
634 17:57:41.589114 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
635 17:57:41.589199 Enumerating buses...
636 17:57:41.595629 Show all devs... Before device enumeration.
637 17:57:41.595713 Root Device: enabled 1
638 17:57:41.598896 DOMAIN: 0000: enabled 1
639 17:57:41.602231 CPU_CLUSTER: 0: enabled 1
640 17:57:41.605655 PCI: 00:00.0: enabled 1
641 17:57:41.605742 PCI: 00:02.0: enabled 1
642 17:57:41.608945 PCI: 00:04.0: enabled 1
643 17:57:41.612481 PCI: 00:05.0: enabled 1
644 17:57:41.615755 PCI: 00:06.0: enabled 0
645 17:57:41.615838 PCI: 00:07.0: enabled 0
646 17:57:41.619110 PCI: 00:07.1: enabled 0
647 17:57:41.622528 PCI: 00:07.2: enabled 0
648 17:57:41.625588 PCI: 00:07.3: enabled 0
649 17:57:41.625671 PCI: 00:08.0: enabled 1
650 17:57:41.629186 PCI: 00:09.0: enabled 0
651 17:57:41.632241 PCI: 00:0a.0: enabled 0
652 17:57:41.635299 PCI: 00:0d.0: enabled 1
653 17:57:41.635386 PCI: 00:0d.1: enabled 0
654 17:57:41.638783 PCI: 00:0d.2: enabled 0
655 17:57:41.642120 PCI: 00:0d.3: enabled 0
656 17:57:41.642204 PCI: 00:0e.0: enabled 0
657 17:57:41.645084 PCI: 00:10.2: enabled 1
658 17:57:41.648449 PCI: 00:10.6: enabled 0
659 17:57:41.651950 PCI: 00:10.7: enabled 0
660 17:57:41.652033 PCI: 00:12.0: enabled 0
661 17:57:41.655556 PCI: 00:12.6: enabled 0
662 17:57:41.659110 PCI: 00:13.0: enabled 0
663 17:57:41.661918 PCI: 00:14.0: enabled 1
664 17:57:41.662001 PCI: 00:14.1: enabled 0
665 17:57:41.665004 PCI: 00:14.2: enabled 1
666 17:57:41.668344 PCI: 00:14.3: enabled 1
667 17:57:41.672046 PCI: 00:15.0: enabled 1
668 17:57:41.672130 PCI: 00:15.1: enabled 1
669 17:57:41.675425 PCI: 00:15.2: enabled 1
670 17:57:41.678321 PCI: 00:15.3: enabled 1
671 17:57:41.682055 PCI: 00:16.0: enabled 1
672 17:57:41.682151 PCI: 00:16.1: enabled 0
673 17:57:41.685113 PCI: 00:16.2: enabled 0
674 17:57:41.688758 PCI: 00:16.3: enabled 0
675 17:57:41.692075 PCI: 00:16.4: enabled 0
676 17:57:41.692279 PCI: 00:16.5: enabled 0
677 17:57:41.695808 PCI: 00:17.0: enabled 1
678 17:57:41.698776 PCI: 00:19.0: enabled 0
679 17:57:41.699209 PCI: 00:19.1: enabled 1
680 17:57:41.702167 PCI: 00:19.2: enabled 0
681 17:57:41.705494 PCI: 00:1c.0: enabled 1
682 17:57:41.708804 PCI: 00:1c.1: enabled 0
683 17:57:41.709236 PCI: 00:1c.2: enabled 0
684 17:57:41.712296 PCI: 00:1c.3: enabled 0
685 17:57:41.715651 PCI: 00:1c.4: enabled 0
686 17:57:41.718824 PCI: 00:1c.5: enabled 0
687 17:57:41.719255 PCI: 00:1c.6: enabled 1
688 17:57:41.722055 PCI: 00:1c.7: enabled 0
689 17:57:41.725388 PCI: 00:1d.0: enabled 1
690 17:57:41.728613 PCI: 00:1d.1: enabled 0
691 17:57:41.729044 PCI: 00:1d.2: enabled 1
692 17:57:41.732043 PCI: 00:1d.3: enabled 0
693 17:57:41.735674 PCI: 00:1e.0: enabled 1
694 17:57:41.736105 PCI: 00:1e.1: enabled 0
695 17:57:41.738824 PCI: 00:1e.2: enabled 1
696 17:57:41.742377 PCI: 00:1e.3: enabled 1
697 17:57:41.745450 PCI: 00:1f.0: enabled 1
698 17:57:41.745893 PCI: 00:1f.1: enabled 0
699 17:57:41.749085 PCI: 00:1f.2: enabled 1
700 17:57:41.752085 PCI: 00:1f.3: enabled 1
701 17:57:41.755619 PCI: 00:1f.4: enabled 0
702 17:57:41.756060 PCI: 00:1f.5: enabled 1
703 17:57:41.758593 PCI: 00:1f.6: enabled 0
704 17:57:41.762077 PCI: 00:1f.7: enabled 0
705 17:57:41.762506 APIC: 00: enabled 1
706 17:57:41.766257 GENERIC: 0.0: enabled 1
707 17:57:41.768763 GENERIC: 0.0: enabled 1
708 17:57:41.772050 GENERIC: 1.0: enabled 1
709 17:57:41.772518 GENERIC: 0.0: enabled 1
710 17:57:41.774998 GENERIC: 1.0: enabled 1
711 17:57:41.778208 USB0 port 0: enabled 1
712 17:57:41.781721 GENERIC: 0.0: enabled 1
713 17:57:41.781805 USB0 port 0: enabled 1
714 17:57:41.785462 GENERIC: 0.0: enabled 1
715 17:57:41.788429 I2C: 00:1a: enabled 1
716 17:57:41.788600 I2C: 00:31: enabled 1
717 17:57:41.792281 I2C: 00:32: enabled 1
718 17:57:41.794996 I2C: 00:10: enabled 1
719 17:57:41.795186 I2C: 00:15: enabled 1
720 17:57:41.798939 GENERIC: 0.0: enabled 0
721 17:57:41.801987 GENERIC: 1.0: enabled 0
722 17:57:41.805295 GENERIC: 0.0: enabled 1
723 17:57:41.805469 SPI: 00: enabled 1
724 17:57:41.808384 SPI: 00: enabled 1
725 17:57:41.808592 PNP: 0c09.0: enabled 1
726 17:57:41.812059 GENERIC: 0.0: enabled 1
727 17:57:41.815516 USB3 port 0: enabled 1
728 17:57:41.818504 USB3 port 1: enabled 1
729 17:57:41.818769 USB3 port 2: enabled 0
730 17:57:41.821931 USB3 port 3: enabled 0
731 17:57:41.825414 USB2 port 0: enabled 0
732 17:57:41.825731 USB2 port 1: enabled 1
733 17:57:41.828345 USB2 port 2: enabled 1
734 17:57:41.832126 USB2 port 3: enabled 0
735 17:57:41.835190 USB2 port 4: enabled 1
736 17:57:41.835574 USB2 port 5: enabled 0
737 17:57:41.838565 USB2 port 6: enabled 0
738 17:57:41.841978 USB2 port 7: enabled 0
739 17:57:41.842487 USB2 port 8: enabled 0
740 17:57:41.845485 USB2 port 9: enabled 0
741 17:57:41.848782 USB3 port 0: enabled 0
742 17:57:41.849323 USB3 port 1: enabled 1
743 17:57:41.852349 USB3 port 2: enabled 0
744 17:57:41.855396 USB3 port 3: enabled 0
745 17:57:41.858812 GENERIC: 0.0: enabled 1
746 17:57:41.859350 GENERIC: 1.0: enabled 1
747 17:57:41.862482 APIC: 01: enabled 1
748 17:57:41.865672 APIC: 03: enabled 1
749 17:57:41.866212 APIC: 07: enabled 1
750 17:57:41.869121 APIC: 04: enabled 1
751 17:57:41.869664 APIC: 02: enabled 1
752 17:57:41.872192 APIC: 06: enabled 1
753 17:57:41.875152 APIC: 05: enabled 1
754 17:57:41.875583 Compare with tree...
755 17:57:41.878473 Root Device: enabled 1
756 17:57:41.882058 DOMAIN: 0000: enabled 1
757 17:57:41.885558 PCI: 00:00.0: enabled 1
758 17:57:41.886097 PCI: 00:02.0: enabled 1
759 17:57:41.888897 PCI: 00:04.0: enabled 1
760 17:57:41.892240 GENERIC: 0.0: enabled 1
761 17:57:41.895267 PCI: 00:05.0: enabled 1
762 17:57:41.898786 PCI: 00:06.0: enabled 0
763 17:57:41.899220 PCI: 00:07.0: enabled 0
764 17:57:41.902082 GENERIC: 0.0: enabled 1
765 17:57:41.905472 PCI: 00:07.1: enabled 0
766 17:57:41.908681 GENERIC: 1.0: enabled 1
767 17:57:41.912090 PCI: 00:07.2: enabled 0
768 17:57:41.912524 GENERIC: 0.0: enabled 1
769 17:57:41.914976 PCI: 00:07.3: enabled 0
770 17:57:41.918549 GENERIC: 1.0: enabled 1
771 17:57:41.921899 PCI: 00:08.0: enabled 1
772 17:57:41.925129 PCI: 00:09.0: enabled 0
773 17:57:41.925559 PCI: 00:0a.0: enabled 0
774 17:57:41.928874 PCI: 00:0d.0: enabled 1
775 17:57:41.931504 USB0 port 0: enabled 1
776 17:57:41.935035 USB3 port 0: enabled 1
777 17:57:41.938565 USB3 port 1: enabled 1
778 17:57:41.939049 USB3 port 2: enabled 0
779 17:57:41.942053 USB3 port 3: enabled 0
780 17:57:41.945071 PCI: 00:0d.1: enabled 0
781 17:57:41.948393 PCI: 00:0d.2: enabled 0
782 17:57:41.951618 GENERIC: 0.0: enabled 1
783 17:57:41.952084 PCI: 00:0d.3: enabled 0
784 17:57:41.955647 PCI: 00:0e.0: enabled 0
785 17:57:41.958703 PCI: 00:10.2: enabled 1
786 17:57:41.961936 PCI: 00:10.6: enabled 0
787 17:57:41.964915 PCI: 00:10.7: enabled 0
788 17:57:41.965339 PCI: 00:12.0: enabled 0
789 17:57:41.968612 PCI: 00:12.6: enabled 0
790 17:57:41.972230 PCI: 00:13.0: enabled 0
791 17:57:41.975126 PCI: 00:14.0: enabled 1
792 17:57:41.978455 USB0 port 0: enabled 1
793 17:57:41.979049 USB2 port 0: enabled 0
794 17:57:41.981642 USB2 port 1: enabled 1
795 17:57:41.985571 USB2 port 2: enabled 1
796 17:57:41.988260 USB2 port 3: enabled 0
797 17:57:41.992017 USB2 port 4: enabled 1
798 17:57:41.995282 USB2 port 5: enabled 0
799 17:57:41.995712 USB2 port 6: enabled 0
800 17:57:41.998517 USB2 port 7: enabled 0
801 17:57:42.001843 USB2 port 8: enabled 0
802 17:57:42.005818 USB2 port 9: enabled 0
803 17:57:42.008577 USB3 port 0: enabled 0
804 17:57:42.011248 USB3 port 1: enabled 1
805 17:57:42.011684 USB3 port 2: enabled 0
806 17:57:42.014947 USB3 port 3: enabled 0
807 17:57:42.017948 PCI: 00:14.1: enabled 0
808 17:57:42.021481 PCI: 00:14.2: enabled 1
809 17:57:42.024954 PCI: 00:14.3: enabled 1
810 17:57:42.025386 GENERIC: 0.0: enabled 1
811 17:57:42.028041 PCI: 00:15.0: enabled 1
812 17:57:42.031556 I2C: 00:1a: enabled 1
813 17:57:42.035084 I2C: 00:31: enabled 1
814 17:57:42.035511 I2C: 00:32: enabled 1
815 17:57:42.038156 PCI: 00:15.1: enabled 1
816 17:57:42.041372 I2C: 00:10: enabled 1
817 17:57:42.044872 PCI: 00:15.2: enabled 1
818 17:57:42.048204 PCI: 00:15.3: enabled 1
819 17:57:42.048630 PCI: 00:16.0: enabled 1
820 17:57:42.051578 PCI: 00:16.1: enabled 0
821 17:57:42.054933 PCI: 00:16.2: enabled 0
822 17:57:42.058057 PCI: 00:16.3: enabled 0
823 17:57:42.061348 PCI: 00:16.4: enabled 0
824 17:57:42.061775 PCI: 00:16.5: enabled 0
825 17:57:42.065608 PCI: 00:17.0: enabled 1
826 17:57:42.069187 PCI: 00:19.0: enabled 0
827 17:57:42.069731 PCI: 00:19.1: enabled 1
828 17:57:42.072839 I2C: 00:15: enabled 1
829 17:57:42.075765 PCI: 00:19.2: enabled 0
830 17:57:42.079411 PCI: 00:1d.0: enabled 1
831 17:57:42.082707 GENERIC: 0.0: enabled 1
832 17:57:42.083201 PCI: 00:1e.0: enabled 1
833 17:57:42.085637 PCI: 00:1e.1: enabled 0
834 17:57:42.089629 PCI: 00:1e.2: enabled 1
835 17:57:42.092342 SPI: 00: enabled 1
836 17:57:42.092774 PCI: 00:1e.3: enabled 1
837 17:57:42.096065 SPI: 00: enabled 1
838 17:57:42.098925 PCI: 00:1f.0: enabled 1
839 17:57:42.111566 PNP: 0c09.0: enabled 1
840 17:57:42.112108 PCI: 00:1f.1: enabled 0
841 17:57:42.112458 PCI: 00:1f.2: enabled 1
842 17:57:42.117242 GENERIC: 0.0: enabled 1
843 17:57:42.117792 GENERIC: 0.0: enabled 1
844 17:57:42.127099 GENERIC: 1.0: enabled 1
845 17:57:42.127636 PCI: 00:1f.3: enabled 1
846 17:57:42.128325 PCI: 00:1f.4: enabled 0
847 17:57:42.128673 PCI: 00:1f.5: enabled 1
848 17:57:42.128993 PCI: 00:1f.6: enabled 0
849 17:57:42.136851 PCI: 00:1f.7: enabled 0
850 17:57:42.137393 CPU_CLUSTER: 0: enabled 1
851 17:57:42.141014 APIC: 00: enabled 1
852 17:57:42.141551 APIC: 01: enabled 1
853 17:57:42.141898 APIC: 03: enabled 1
854 17:57:42.147478 APIC: 07: enabled 1
855 17:57:42.147911 APIC: 04: enabled 1
856 17:57:42.148254 APIC: 02: enabled 1
857 17:57:42.154181 APIC: 06: enabled 1
858 17:57:42.154835 APIC: 05: enabled 1
859 17:57:42.161647 Root Device scanning...
860 17:57:42.162200 scan_static_bus for Root Device
861 17:57:42.162549 DOMAIN: 0000 enabled
862 17:57:42.166513 CPU_CLUSTER: 0 enabled
863 17:57:42.166991 DOMAIN: 0000 scanning...
864 17:57:42.170476 PCI: pci_scan_bus for bus 00
865 17:57:42.170950 PCI: 00:00.0 [8086/0000] ops
866 17:57:42.178342 PCI: 00:00.0 [8086/9a12] enabled
867 17:57:42.178813 PCI: 00:02.0 [8086/0000] bus ops
868 17:57:42.188448 PCI: 00:02.0 [8086/9a40] enabled
869 17:57:42.189040 PCI: 00:04.0 [8086/0000] bus ops
870 17:57:42.189398 PCI: 00:04.0 [8086/9a03] enabled
871 17:57:42.189717 PCI: 00:05.0 [8086/9a19] enabled
872 17:57:42.195598 PCI: 00:07.0 [0000/0000] hidden
873 17:57:42.196026 PCI: 00:08.0 [8086/9a11] enabled
874 17:57:42.202937 PCI: 00:0a.0 [8086/9a0d] disabled
875 17:57:42.203465 PCI: 00:0d.0 [8086/0000] bus ops
876 17:57:42.251771 PCI: 00:0d.0 [8086/9a13] enabled
877 17:57:42.252299 PCI: 00:14.0 [8086/0000] bus ops
878 17:57:42.252640 PCI: 00:14.0 [8086/a0ed] enabled
879 17:57:42.252957 PCI: 00:14.2 [8086/a0ef] enabled
880 17:57:42.253259 PCI: 00:14.3 [8086/0000] bus ops
881 17:57:42.254470 PCI: 00:14.3 [8086/a0f0] enabled
882 17:57:42.254943 PCI: 00:15.0 [8086/0000] bus ops
883 17:57:42.255344 PCI: 00:15.0 [8086/a0e8] enabled
884 17:57:42.255676 PCI: 00:15.1 [8086/0000] bus ops
885 17:57:42.255983 PCI: 00:15.1 [8086/a0e9] enabled
886 17:57:42.256283 PCI: 00:15.2 [8086/0000] bus ops
887 17:57:42.256576 PCI: 00:15.2 [8086/a0ea] enabled
888 17:57:42.256865 PCI: 00:15.3 [8086/0000] bus ops
889 17:57:42.257474 PCI: 00:15.3 [8086/a0eb] enabled
890 17:57:42.257793 PCI: 00:16.0 [8086/0000] ops
891 17:57:42.293786 PCI: 00:16.0 [8086/a0e0] enabled
892 17:57:42.294385 PCI: Static device PCI: 00:17.0 not found, disabling it.
893 17:57:42.294915 PCI: 00:19.0 [8086/0000] bus ops
894 17:57:42.295251 PCI: 00:19.0 [8086/a0c5] disabled
895 17:57:42.295672 PCI: 00:19.1 [8086/0000] bus ops
896 17:57:42.296033 PCI: 00:19.1 [8086/a0c6] enabled
897 17:57:42.296372 PCI: 00:1d.0 [8086/0000] bus ops
898 17:57:42.297073 PCI: 00:1d.0 [8086/a0b0] enabled
899 17:57:42.297402 PCI: 00:1e.0 [8086/0000] ops
900 17:57:42.297811 PCI: 00:1e.0 [8086/a0a8] enabled
901 17:57:42.332230 PCI: 00:1e.2 [8086/0000] bus ops
902 17:57:42.333039 PCI: 00:1e.2 [8086/a0aa] enabled
903 17:57:42.333907 PCI: 00:1e.3 [8086/0000] bus ops
904 17:57:42.334398 PCI: 00:1e.3 [8086/a0ab] enabled
905 17:57:42.334905 PCI: 00:1f.0 [8086/0000] bus ops
906 17:57:42.335366 PCI: 00:1f.0 [8086/a087] enabled
907 17:57:42.335813 RTC Init
908 17:57:42.336266 Set power on after power failure.
909 17:57:42.336704 Disabling Deep S3
910 17:57:42.337138 Disabling Deep S3
911 17:57:42.337567 Disabling Deep S4
912 17:57:42.337996 Disabling Deep S4
913 17:57:42.338424 Disabling Deep S5
914 17:57:42.338891 Disabling Deep S5
915 17:57:42.339329 PCI: 00:1f.2 [0000/0000] hidden
916 17:57:42.339832 PCI: 00:1f.3 [8086/0000] bus ops
917 17:57:42.340270 PCI: 00:1f.3 [8086/a0c8] enabled
918 17:57:42.340718 PCI: 00:1f.5 [8086/0000] bus ops
919 17:57:42.341186 PCI: 00:1f.5 [8086/a0a4] enabled
920 17:57:42.343420 PCI: Leftover static devices:
921 17:57:42.346380 PCI: 00:10.2
922 17:57:42.346839 PCI: 00:10.6
923 17:57:42.347186 PCI: 00:10.7
924 17:57:42.350143 PCI: 00:06.0
925 17:57:42.350659 PCI: 00:07.1
926 17:57:42.353338 PCI: 00:07.2
927 17:57:42.353759 PCI: 00:07.3
928 17:57:42.354182 PCI: 00:09.0
929 17:57:42.356146 PCI: 00:0d.1
930 17:57:42.356565 PCI: 00:0d.2
931 17:57:42.359548 PCI: 00:0d.3
932 17:57:42.359969 PCI: 00:0e.0
933 17:57:42.360303 PCI: 00:12.0
934 17:57:42.363139 PCI: 00:12.6
935 17:57:42.363562 PCI: 00:13.0
936 17:57:42.366381 PCI: 00:14.1
937 17:57:42.366842 PCI: 00:16.1
938 17:57:42.369912 PCI: 00:16.2
939 17:57:42.370548 PCI: 00:16.3
940 17:57:42.370951 PCI: 00:16.4
941 17:57:42.372917 PCI: 00:16.5
942 17:57:42.373340 PCI: 00:17.0
943 17:57:42.376198 PCI: 00:19.2
944 17:57:42.376620 PCI: 00:1e.1
945 17:57:42.376958 PCI: 00:1f.1
946 17:57:42.379772 PCI: 00:1f.4
947 17:57:42.380191 PCI: 00:1f.6
948 17:57:42.383015 PCI: 00:1f.7
949 17:57:42.386329 PCI: Check your devicetree.cb.
950 17:57:42.386787 PCI: 00:02.0 scanning...
951 17:57:42.389516 scan_generic_bus for PCI: 00:02.0
952 17:57:42.396387 scan_generic_bus for PCI: 00:02.0 done
953 17:57:42.399967 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
954 17:57:42.402910 PCI: 00:04.0 scanning...
955 17:57:42.406649 scan_generic_bus for PCI: 00:04.0
956 17:57:42.409509 GENERIC: 0.0 enabled
957 17:57:42.412928 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
958 17:57:42.419418 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
959 17:57:42.423034 PCI: 00:0d.0 scanning...
960 17:57:42.426123 scan_static_bus for PCI: 00:0d.0
961 17:57:42.426616 USB0 port 0 enabled
962 17:57:42.429456 USB0 port 0 scanning...
963 17:57:42.433103 scan_static_bus for USB0 port 0
964 17:57:42.436089 USB3 port 0 enabled
965 17:57:42.436508 USB3 port 1 enabled
966 17:57:42.439500 USB3 port 2 disabled
967 17:57:42.442574 USB3 port 3 disabled
968 17:57:42.443051 USB3 port 0 scanning...
969 17:57:42.446371 scan_static_bus for USB3 port 0
970 17:57:42.449216 scan_static_bus for USB3 port 0 done
971 17:57:42.456030 scan_bus: bus USB3 port 0 finished in 6 msecs
972 17:57:42.459447 USB3 port 1 scanning...
973 17:57:42.462513 scan_static_bus for USB3 port 1
974 17:57:42.466125 scan_static_bus for USB3 port 1 done
975 17:57:42.469775 scan_bus: bus USB3 port 1 finished in 6 msecs
976 17:57:42.473190 scan_static_bus for USB0 port 0 done
977 17:57:42.479448 scan_bus: bus USB0 port 0 finished in 43 msecs
978 17:57:42.482415 scan_static_bus for PCI: 00:0d.0 done
979 17:57:42.486238 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
980 17:57:42.489473 PCI: 00:14.0 scanning...
981 17:57:42.492632 scan_static_bus for PCI: 00:14.0
982 17:57:42.496170 USB0 port 0 enabled
983 17:57:42.496592 USB0 port 0 scanning...
984 17:57:42.499460 scan_static_bus for USB0 port 0
985 17:57:42.502829 USB2 port 0 disabled
986 17:57:42.506294 USB2 port 1 enabled
987 17:57:42.506877 USB2 port 2 enabled
988 17:57:42.509225 USB2 port 3 disabled
989 17:57:42.512585 USB2 port 4 enabled
990 17:57:42.513231 USB2 port 5 disabled
991 17:57:42.515981 USB2 port 6 disabled
992 17:57:42.519773 USB2 port 7 disabled
993 17:57:42.520226 USB2 port 8 disabled
994 17:57:42.522650 USB2 port 9 disabled
995 17:57:42.523138 USB3 port 0 disabled
996 17:57:42.525677 USB3 port 1 enabled
997 17:57:42.529141 USB3 port 2 disabled
998 17:57:42.529568 USB3 port 3 disabled
999 17:57:42.532664 USB2 port 1 scanning...
1000 17:57:42.535518 scan_static_bus for USB2 port 1
1001 17:57:42.539050 scan_static_bus for USB2 port 1 done
1002 17:57:42.545678 scan_bus: bus USB2 port 1 finished in 6 msecs
1003 17:57:42.546105 USB2 port 2 scanning...
1004 17:57:42.549165 scan_static_bus for USB2 port 2
1005 17:57:42.555892 scan_static_bus for USB2 port 2 done
1006 17:57:42.559338 scan_bus: bus USB2 port 2 finished in 6 msecs
1007 17:57:42.562364 USB2 port 4 scanning...
1008 17:57:42.565507 scan_static_bus for USB2 port 4
1009 17:57:42.569112 scan_static_bus for USB2 port 4 done
1010 17:57:42.572470 scan_bus: bus USB2 port 4 finished in 6 msecs
1011 17:57:42.575867 USB3 port 1 scanning...
1012 17:57:42.578583 scan_static_bus for USB3 port 1
1013 17:57:42.582214 scan_static_bus for USB3 port 1 done
1014 17:57:42.589095 scan_bus: bus USB3 port 1 finished in 6 msecs
1015 17:57:42.592345 scan_static_bus for USB0 port 0 done
1016 17:57:42.595406 scan_bus: bus USB0 port 0 finished in 93 msecs
1017 17:57:42.599384 scan_static_bus for PCI: 00:14.0 done
1018 17:57:42.605709 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1019 17:57:42.606234 PCI: 00:14.3 scanning...
1020 17:57:42.608777 scan_static_bus for PCI: 00:14.3
1021 17:57:42.612069 GENERIC: 0.0 enabled
1022 17:57:42.615346 scan_static_bus for PCI: 00:14.3 done
1023 17:57:42.622241 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1024 17:57:42.622843 PCI: 00:15.0 scanning...
1025 17:57:42.625524 scan_static_bus for PCI: 00:15.0
1026 17:57:42.629626 I2C: 00:1a enabled
1027 17:57:42.632709 I2C: 00:31 enabled
1028 17:57:42.633129 I2C: 00:32 enabled
1029 17:57:42.635468 scan_static_bus for PCI: 00:15.0 done
1030 17:57:42.642921 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1031 17:57:42.643492 PCI: 00:15.1 scanning...
1032 17:57:42.646766 scan_static_bus for PCI: 00:15.1
1033 17:57:42.649815 I2C: 00:10 enabled
1034 17:57:42.653569 scan_static_bus for PCI: 00:15.1 done
1035 17:57:42.660176 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1036 17:57:42.660694 PCI: 00:15.2 scanning...
1037 17:57:42.662983 scan_static_bus for PCI: 00:15.2
1038 17:57:42.669869 scan_static_bus for PCI: 00:15.2 done
1039 17:57:42.673552 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1040 17:57:42.677164 PCI: 00:15.3 scanning...
1041 17:57:42.680235 scan_static_bus for PCI: 00:15.3
1042 17:57:42.682986 scan_static_bus for PCI: 00:15.3 done
1043 17:57:42.686717 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1044 17:57:42.689787 PCI: 00:19.1 scanning...
1045 17:57:42.693228 scan_static_bus for PCI: 00:19.1
1046 17:57:42.696172 I2C: 00:15 enabled
1047 17:57:42.699744 scan_static_bus for PCI: 00:19.1 done
1048 17:57:42.703004 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1049 17:57:42.706432 PCI: 00:1d.0 scanning...
1050 17:57:42.709888 do_pci_scan_bridge for PCI: 00:1d.0
1051 17:57:42.712996 PCI: pci_scan_bus for bus 01
1052 17:57:42.716900 PCI: 01:00.0 [1c5c/174a] enabled
1053 17:57:42.719674 GENERIC: 0.0 enabled
1054 17:57:42.723225 Enabling Common Clock Configuration
1055 17:57:42.726189 L1 Sub-State supported from root port 29
1056 17:57:42.730139 L1 Sub-State Support = 0xf
1057 17:57:42.732840 CommonModeRestoreTime = 0x28
1058 17:57:42.736874 Power On Value = 0x16, Power On Scale = 0x0
1059 17:57:42.739719 ASPM: Enabled L1
1060 17:57:42.743265 PCIe: Max_Payload_Size adjusted to 128
1061 17:57:42.746071 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1062 17:57:42.749506 PCI: 00:1e.2 scanning...
1063 17:57:42.753058 scan_generic_bus for PCI: 00:1e.2
1064 17:57:42.756179 SPI: 00 enabled
1065 17:57:42.763110 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1066 17:57:42.765992 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1067 17:57:42.769482 PCI: 00:1e.3 scanning...
1068 17:57:42.772876 scan_generic_bus for PCI: 00:1e.3
1069 17:57:42.773301 SPI: 00 enabled
1070 17:57:42.779511 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1071 17:57:42.786529 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1072 17:57:42.787120 PCI: 00:1f.0 scanning...
1073 17:57:42.789759 scan_static_bus for PCI: 00:1f.0
1074 17:57:42.792808 PNP: 0c09.0 enabled
1075 17:57:42.796003 PNP: 0c09.0 scanning...
1076 17:57:42.799647 scan_static_bus for PNP: 0c09.0
1077 17:57:42.802829 scan_static_bus for PNP: 0c09.0 done
1078 17:57:42.806318 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1079 17:57:42.812786 scan_static_bus for PCI: 00:1f.0 done
1080 17:57:42.816050 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1081 17:57:42.819622 PCI: 00:1f.2 scanning...
1082 17:57:42.823175 scan_static_bus for PCI: 00:1f.2
1083 17:57:42.823594 GENERIC: 0.0 enabled
1084 17:57:42.826032 GENERIC: 0.0 scanning...
1085 17:57:42.829382 scan_static_bus for GENERIC: 0.0
1086 17:57:42.832580 GENERIC: 0.0 enabled
1087 17:57:42.836071 GENERIC: 1.0 enabled
1088 17:57:42.839373 scan_static_bus for GENERIC: 0.0 done
1089 17:57:42.842875 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1090 17:57:42.845689 scan_static_bus for PCI: 00:1f.2 done
1091 17:57:42.852700 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1092 17:57:42.855982 PCI: 00:1f.3 scanning...
1093 17:57:42.859102 scan_static_bus for PCI: 00:1f.3
1094 17:57:42.862890 scan_static_bus for PCI: 00:1f.3 done
1095 17:57:42.865773 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1096 17:57:42.869273 PCI: 00:1f.5 scanning...
1097 17:57:42.872708 scan_generic_bus for PCI: 00:1f.5
1098 17:57:42.875680 scan_generic_bus for PCI: 00:1f.5 done
1099 17:57:42.882174 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1100 17:57:42.885624 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1101 17:57:42.888682 scan_static_bus for Root Device done
1102 17:57:42.895418 scan_bus: bus Root Device finished in 736 msecs
1103 17:57:42.895838 done
1104 17:57:42.902499 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1105 17:57:42.905924 Chrome EC: UHEPI supported
1106 17:57:42.912203 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1107 17:57:42.918886 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1108 17:57:42.922273 SPI flash protection: WPSW=1 SRP0=0
1109 17:57:42.925344 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1110 17:57:42.932163 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1111 17:57:42.935839 found VGA at PCI: 00:02.0
1112 17:57:42.938861 Setting up VGA for PCI: 00:02.0
1113 17:57:42.942373 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1114 17:57:42.948826 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1115 17:57:42.949326 Allocating resources...
1116 17:57:42.952672 Reading resources...
1117 17:57:42.955668 Root Device read_resources bus 0 link: 0
1118 17:57:42.961845 DOMAIN: 0000 read_resources bus 0 link: 0
1119 17:57:42.965365 PCI: 00:04.0 read_resources bus 1 link: 0
1120 17:57:42.971679 PCI: 00:04.0 read_resources bus 1 link: 0 done
1121 17:57:42.975266 PCI: 00:0d.0 read_resources bus 0 link: 0
1122 17:57:42.978512 USB0 port 0 read_resources bus 0 link: 0
1123 17:57:42.985979 USB0 port 0 read_resources bus 0 link: 0 done
1124 17:57:42.989203 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1125 17:57:42.996034 PCI: 00:14.0 read_resources bus 0 link: 0
1126 17:57:42.999501 USB0 port 0 read_resources bus 0 link: 0
1127 17:57:43.005972 USB0 port 0 read_resources bus 0 link: 0 done
1128 17:57:43.009092 PCI: 00:14.0 read_resources bus 0 link: 0 done
1129 17:57:43.016138 PCI: 00:14.3 read_resources bus 0 link: 0
1130 17:57:43.019109 PCI: 00:14.3 read_resources bus 0 link: 0 done
1131 17:57:43.025518 PCI: 00:15.0 read_resources bus 0 link: 0
1132 17:57:43.029507 PCI: 00:15.0 read_resources bus 0 link: 0 done
1133 17:57:43.035711 PCI: 00:15.1 read_resources bus 0 link: 0
1134 17:57:43.039569 PCI: 00:15.1 read_resources bus 0 link: 0 done
1135 17:57:43.046189 PCI: 00:19.1 read_resources bus 0 link: 0
1136 17:57:43.049235 PCI: 00:19.1 read_resources bus 0 link: 0 done
1137 17:57:43.056323 PCI: 00:1d.0 read_resources bus 1 link: 0
1138 17:57:43.059270 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1139 17:57:43.066223 PCI: 00:1e.2 read_resources bus 2 link: 0
1140 17:57:43.069817 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1141 17:57:43.076652 PCI: 00:1e.3 read_resources bus 3 link: 0
1142 17:57:43.079314 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1143 17:57:43.085816 PCI: 00:1f.0 read_resources bus 0 link: 0
1144 17:57:43.089748 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1145 17:57:43.092873 PCI: 00:1f.2 read_resources bus 0 link: 0
1146 17:57:43.099252 GENERIC: 0.0 read_resources bus 0 link: 0
1147 17:57:43.103274 GENERIC: 0.0 read_resources bus 0 link: 0 done
1148 17:57:43.109577 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1149 17:57:43.116228 DOMAIN: 0000 read_resources bus 0 link: 0 done
1150 17:57:43.119852 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1151 17:57:43.122551 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1152 17:57:43.129421 Root Device read_resources bus 0 link: 0 done
1153 17:57:43.133058 Done reading resources.
1154 17:57:43.136030 Show resources in subtree (Root Device)...After reading.
1155 17:57:43.142986 Root Device child on link 0 DOMAIN: 0000
1156 17:57:43.146095 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1157 17:57:43.155658 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1158 17:57:43.165660 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1159 17:57:43.166161 PCI: 00:00.0
1160 17:57:43.176202 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1161 17:57:43.185693 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1162 17:57:43.196159 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1163 17:57:43.205925 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1164 17:57:43.212327 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1165 17:57:43.222568 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1166 17:57:43.232089 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1167 17:57:43.242399 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1168 17:57:43.252563 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1169 17:57:43.262211 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1170 17:57:43.268465 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1171 17:57:43.278767 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1172 17:57:43.288684 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1173 17:57:43.298893 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1174 17:57:43.308516 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1175 17:57:43.315333 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1176 17:57:43.328670 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1177 17:57:43.335449 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1178 17:57:43.345122 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1179 17:57:43.354822 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1180 17:57:43.358489 PCI: 00:02.0
1181 17:57:43.367939 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1182 17:57:43.378225 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1183 17:57:43.384589 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1184 17:57:43.391549 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1185 17:57:43.401250 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1186 17:57:43.401872 GENERIC: 0.0
1187 17:57:43.404704 PCI: 00:05.0
1188 17:57:43.414899 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1189 17:57:43.417999 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1190 17:57:43.421878 GENERIC: 0.0
1191 17:57:43.422395 PCI: 00:08.0
1192 17:57:43.431657 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 17:57:43.434908 PCI: 00:0a.0
1194 17:57:43.437935 PCI: 00:0d.0 child on link 0 USB0 port 0
1195 17:57:43.448123 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1196 17:57:43.451053 USB0 port 0 child on link 0 USB3 port 0
1197 17:57:43.454707 USB3 port 0
1198 17:57:43.455171 USB3 port 1
1199 17:57:43.458033 USB3 port 2
1200 17:57:43.458451 USB3 port 3
1201 17:57:43.464275 PCI: 00:14.0 child on link 0 USB0 port 0
1202 17:57:43.474265 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1203 17:57:43.477886 USB0 port 0 child on link 0 USB2 port 0
1204 17:57:43.480774 USB2 port 0
1205 17:57:43.481398 USB2 port 1
1206 17:57:43.484206 USB2 port 2
1207 17:57:43.484838 USB2 port 3
1208 17:57:43.487891 USB2 port 4
1209 17:57:43.488309 USB2 port 5
1210 17:57:43.491102 USB2 port 6
1211 17:57:43.491545 USB2 port 7
1212 17:57:43.494237 USB2 port 8
1213 17:57:43.494656 USB2 port 9
1214 17:57:43.497777 USB3 port 0
1215 17:57:43.498311 USB3 port 1
1216 17:57:43.501154 USB3 port 2
1217 17:57:43.504227 USB3 port 3
1218 17:57:43.504733 PCI: 00:14.2
1219 17:57:43.514545 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 17:57:43.524339 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1221 17:57:43.527866 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1222 17:57:43.538072 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 17:57:43.541091 GENERIC: 0.0
1224 17:57:43.543946 PCI: 00:15.0 child on link 0 I2C: 00:1a
1225 17:57:43.553961 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 17:57:43.557647 I2C: 00:1a
1227 17:57:43.558179 I2C: 00:31
1228 17:57:43.561338 I2C: 00:32
1229 17:57:43.563995 PCI: 00:15.1 child on link 0 I2C: 00:10
1230 17:57:43.573661 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 17:57:43.573913 I2C: 00:10
1232 17:57:43.577183 PCI: 00:15.2
1233 17:57:43.587367 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 17:57:43.587495 PCI: 00:15.3
1235 17:57:43.596857 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 17:57:43.600497 PCI: 00:16.0
1237 17:57:43.610523 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 17:57:43.610676 PCI: 00:19.0
1239 17:57:43.617149 PCI: 00:19.1 child on link 0 I2C: 00:15
1240 17:57:43.627131 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 17:57:43.627248 I2C: 00:15
1242 17:57:43.630362 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1243 17:57:43.640832 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1244 17:57:43.650957 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1245 17:57:43.660478 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1246 17:57:43.660929 GENERIC: 0.0
1247 17:57:43.664007 PCI: 01:00.0
1248 17:57:43.674110 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 17:57:43.684181 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1250 17:57:43.690475 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1251 17:57:43.693442 PCI: 00:1e.0
1252 17:57:43.703928 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 17:57:43.710305 PCI: 00:1e.2 child on link 0 SPI: 00
1254 17:57:43.720210 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 17:57:43.720710 SPI: 00
1256 17:57:43.723608 PCI: 00:1e.3 child on link 0 SPI: 00
1257 17:57:43.733460 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 17:57:43.734090 SPI: 00
1259 17:57:43.740186 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 17:57:43.746643 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 17:57:43.750158 PNP: 0c09.0
1262 17:57:43.760304 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 17:57:43.763677 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 17:57:43.773352 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 17:57:43.782861 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 17:57:43.786320 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 17:57:43.786492 GENERIC: 0.0
1268 17:57:43.790151 GENERIC: 1.0
1269 17:57:43.793267 PCI: 00:1f.3
1270 17:57:43.802869 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 17:57:43.813411 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 17:57:43.813661 PCI: 00:1f.5
1273 17:57:43.823048 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 17:57:43.826653 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 17:57:43.827006 APIC: 00
1276 17:57:43.829924 APIC: 01
1277 17:57:43.830408 APIC: 03
1278 17:57:43.833335 APIC: 07
1279 17:57:43.833716 APIC: 04
1280 17:57:43.834026 APIC: 02
1281 17:57:43.836322 APIC: 06
1282 17:57:43.836734 APIC: 05
1283 17:57:43.846318 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 17:57:43.850017 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 17:57:43.856574 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 17:57:43.863298 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 17:57:43.866130 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 17:57:43.870165 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1289 17:57:43.876241 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1290 17:57:43.883458 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 17:57:43.890274 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 17:57:43.896481 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 17:57:43.906030 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 17:57:43.909768 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 17:57:43.919905 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 17:57:43.926632 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 17:57:43.932513 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 17:57:43.936155 DOMAIN: 0000: Resource ranges:
1299 17:57:43.939973 * Base: 1000, Size: 800, Tag: 100
1300 17:57:43.942566 * Base: 1900, Size: e700, Tag: 100
1301 17:57:43.949825 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 17:57:43.956230 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 17:57:43.962787 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 17:57:43.969154 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 17:57:43.979088 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 17:57:43.986084 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 17:57:43.992797 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 17:57:44.002318 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 17:57:44.009151 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 17:57:44.015738 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 17:57:44.025702 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 17:57:44.032688 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 17:57:44.038997 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 17:57:44.049217 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 17:57:44.055658 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 17:57:44.062360 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 17:57:44.072139 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 17:57:44.078826 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 17:57:44.085310 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 17:57:44.095535 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1321 17:57:44.102011 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 17:57:44.108700 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 17:57:44.118113 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 17:57:44.125051 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 17:57:44.131731 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 17:57:44.135066 DOMAIN: 0000: Resource ranges:
1327 17:57:44.141722 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 17:57:44.145208 * Base: d0000000, Size: 28000000, Tag: 200
1329 17:57:44.148857 * Base: fa000000, Size: 1000000, Tag: 200
1330 17:57:44.151942 * Base: fb001000, Size: 2fff000, Tag: 200
1331 17:57:44.158318 * Base: fe010000, Size: 2e000, Tag: 200
1332 17:57:44.161836 * Base: fe03f000, Size: d41000, Tag: 200
1333 17:57:44.165375 * Base: fed88000, Size: 8000, Tag: 200
1334 17:57:44.168442 * Base: fed93000, Size: d000, Tag: 200
1335 17:57:44.175318 * Base: feda2000, Size: 1e000, Tag: 200
1336 17:57:44.178212 * Base: fede0000, Size: 1220000, Tag: 200
1337 17:57:44.181905 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1338 17:57:44.188211 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 17:57:44.194930 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 17:57:44.201877 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 17:57:44.208294 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 17:57:44.215046 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 17:57:44.221354 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 17:57:44.228192 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 17:57:44.234548 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 17:57:44.241718 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 17:57:44.247986 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 17:57:44.254891 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 17:57:44.261091 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 17:57:44.268136 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 17:57:44.274652 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 17:57:44.284057 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 17:57:44.291218 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 17:57:44.297767 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 17:57:44.304144 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 17:57:44.310841 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 17:57:44.317522 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 17:57:44.324132 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 17:57:44.330754 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 17:57:44.337454 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 17:57:44.344151 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 17:57:44.347146 PCI: 00:1d.0: Resource ranges:
1363 17:57:44.350778 * Base: 7fc00000, Size: 100000, Tag: 200
1364 17:57:44.357330 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 17:57:44.363929 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1366 17:57:44.370768 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1367 17:57:44.380440 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1368 17:57:44.387389 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1369 17:57:44.390545 Root Device assign_resources, bus 0 link: 0
1370 17:57:44.396997 DOMAIN: 0000 assign_resources, bus 0 link: 0
1371 17:57:44.403689 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1372 17:57:44.414221 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1373 17:57:44.420673 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1374 17:57:44.430406 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1375 17:57:44.434044 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 17:57:44.437206 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 17:57:44.447151 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1378 17:57:44.453609 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1379 17:57:44.464094 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1380 17:57:44.466876 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 17:57:44.474111 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 17:57:44.480568 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1383 17:57:44.483559 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 17:57:44.490993 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 17:57:44.496970 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1386 17:57:44.507358 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1387 17:57:44.513968 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1388 17:57:44.520269 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 17:57:44.523741 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 17:57:44.530400 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1391 17:57:44.536922 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 17:57:44.540846 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 17:57:44.550269 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1394 17:57:44.553847 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 17:57:44.560204 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 17:57:44.567243 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1397 17:57:44.573726 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1398 17:57:44.584065 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1399 17:57:44.590457 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1400 17:57:44.597126 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 17:57:44.600497 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 17:57:44.610378 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1403 17:57:44.620829 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1404 17:57:44.627221 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1405 17:57:44.633706 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 17:57:44.640116 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1407 17:57:44.647120 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1408 17:57:44.656621 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1409 17:57:44.660162 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1410 17:57:44.670037 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1411 17:57:44.673388 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1412 17:57:44.680397 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 17:57:44.686489 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1414 17:57:44.690130 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1415 17:57:44.696842 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 17:57:44.700165 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1417 17:57:44.706617 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 17:57:44.710033 LPC: Trying to open IO window from 800 size 1ff
1419 17:57:44.719712 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1420 17:57:44.726494 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1421 17:57:44.736205 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1422 17:57:44.739581 DOMAIN: 0000 assign_resources, bus 0 link: 0
1423 17:57:44.746523 Root Device assign_resources, bus 0 link: 0
1424 17:57:44.747074 Done setting resources.
1425 17:57:44.752915 Show resources in subtree (Root Device)...After assigning values.
1426 17:57:44.755973 Root Device child on link 0 DOMAIN: 0000
1427 17:57:44.763016 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1428 17:57:44.772914 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1429 17:57:44.782806 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1430 17:57:44.783241 PCI: 00:00.0
1431 17:57:44.792920 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1432 17:57:44.802415 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1433 17:57:44.812438 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1434 17:57:44.819432 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1435 17:57:44.829744 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1436 17:57:44.839522 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1437 17:57:44.849153 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1438 17:57:44.859228 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1439 17:57:44.869065 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1440 17:57:44.876158 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1441 17:57:44.886229 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1442 17:57:44.895835 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1443 17:57:44.906042 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1444 17:57:44.912646 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1445 17:57:44.922329 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1446 17:57:44.932003 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1447 17:57:44.942876 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1448 17:57:44.952417 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1449 17:57:44.962230 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1450 17:57:44.972137 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1451 17:57:44.972879 PCI: 00:02.0
1452 17:57:44.985456 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1453 17:57:44.995198 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1454 17:57:45.004936 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1455 17:57:45.008648 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1456 17:57:45.018130 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1457 17:57:45.021831 GENERIC: 0.0
1458 17:57:45.022390 PCI: 00:05.0
1459 17:57:45.032052 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1460 17:57:45.039064 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1461 17:57:45.039587 GENERIC: 0.0
1462 17:57:45.042201 PCI: 00:08.0
1463 17:57:45.052004 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1464 17:57:45.052513 PCI: 00:0a.0
1465 17:57:45.058854 PCI: 00:0d.0 child on link 0 USB0 port 0
1466 17:57:45.068239 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1467 17:57:45.071722 USB0 port 0 child on link 0 USB3 port 0
1468 17:57:45.075215 USB3 port 0
1469 17:57:45.075638 USB3 port 1
1470 17:57:45.078351 USB3 port 2
1471 17:57:45.078808 USB3 port 3
1472 17:57:45.081426 PCI: 00:14.0 child on link 0 USB0 port 0
1473 17:57:45.094784 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1474 17:57:45.098355 USB0 port 0 child on link 0 USB2 port 0
1475 17:57:45.098930 USB2 port 0
1476 17:57:45.101912 USB2 port 1
1477 17:57:45.105017 USB2 port 2
1478 17:57:45.105436 USB2 port 3
1479 17:57:45.108497 USB2 port 4
1480 17:57:45.109144 USB2 port 5
1481 17:57:45.111540 USB2 port 6
1482 17:57:45.111960 USB2 port 7
1483 17:57:45.115154 USB2 port 8
1484 17:57:45.115570 USB2 port 9
1485 17:57:45.118020 USB3 port 0
1486 17:57:45.118435 USB3 port 1
1487 17:57:45.121489 USB3 port 2
1488 17:57:45.121905 USB3 port 3
1489 17:57:45.125008 PCI: 00:14.2
1490 17:57:45.134852 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1491 17:57:45.145106 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1492 17:57:45.147887 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1493 17:57:45.161809 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1494 17:57:45.162329 GENERIC: 0.0
1495 17:57:45.165144 PCI: 00:15.0 child on link 0 I2C: 00:1a
1496 17:57:45.174787 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1497 17:57:45.178171 I2C: 00:1a
1498 17:57:45.178700 I2C: 00:31
1499 17:57:45.181264 I2C: 00:32
1500 17:57:45.184635 PCI: 00:15.1 child on link 0 I2C: 00:10
1501 17:57:45.194450 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1502 17:57:45.198099 I2C: 00:10
1503 17:57:45.198530 PCI: 00:15.2
1504 17:57:45.207739 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1505 17:57:45.211464 PCI: 00:15.3
1506 17:57:45.221144 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1507 17:57:45.224470 PCI: 00:16.0
1508 17:57:45.234613 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1509 17:57:45.235069 PCI: 00:19.0
1510 17:57:45.237472 PCI: 00:19.1 child on link 0 I2C: 00:15
1511 17:57:45.250701 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1512 17:57:45.251148 I2C: 00:15
1513 17:57:45.254451 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1514 17:57:45.264193 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1515 17:57:45.277517 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1516 17:57:45.287744 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1517 17:57:45.288169 GENERIC: 0.0
1518 17:57:45.291006 PCI: 01:00.0
1519 17:57:45.300909 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1520 17:57:45.310580 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1521 17:57:45.320911 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1522 17:57:45.324259 PCI: 00:1e.0
1523 17:57:45.334317 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1524 17:57:45.337493 PCI: 00:1e.2 child on link 0 SPI: 00
1525 17:57:45.350520 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1526 17:57:45.351159 SPI: 00
1527 17:57:45.354068 PCI: 00:1e.3 child on link 0 SPI: 00
1528 17:57:45.363767 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1529 17:57:45.366877 SPI: 00
1530 17:57:45.370344 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1531 17:57:45.380548 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1532 17:57:45.381031 PNP: 0c09.0
1533 17:57:45.390186 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1534 17:57:45.393875 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1535 17:57:45.403731 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1536 17:57:45.414054 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1537 17:57:45.417252 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1538 17:57:45.420811 GENERIC: 0.0
1539 17:57:45.421331 GENERIC: 1.0
1540 17:57:45.423526 PCI: 00:1f.3
1541 17:57:45.434031 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1542 17:57:45.443430 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1543 17:57:45.443855 PCI: 00:1f.5
1544 17:57:45.456779 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1545 17:57:45.460327 CPU_CLUSTER: 0 child on link 0 APIC: 00
1546 17:57:45.460839 APIC: 00
1547 17:57:45.463580 APIC: 01
1548 17:57:45.464002 APIC: 03
1549 17:57:45.464339 APIC: 07
1550 17:57:45.466637 APIC: 04
1551 17:57:45.467131 APIC: 02
1552 17:57:45.470131 APIC: 06
1553 17:57:45.470718 APIC: 05
1554 17:57:45.473361 Done allocating resources.
1555 17:57:45.480051 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1556 17:57:45.483157 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1557 17:57:45.490035 Configure GPIOs for I2S audio on UP4.
1558 17:57:45.496598 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1559 17:57:45.497241 Enabling resources...
1560 17:57:45.503251 PCI: 00:00.0 subsystem <- 8086/9a12
1561 17:57:45.503671 PCI: 00:00.0 cmd <- 06
1562 17:57:45.506810 PCI: 00:02.0 subsystem <- 8086/9a40
1563 17:57:45.510042 PCI: 00:02.0 cmd <- 03
1564 17:57:45.513320 PCI: 00:04.0 subsystem <- 8086/9a03
1565 17:57:45.516859 PCI: 00:04.0 cmd <- 02
1566 17:57:45.520279 PCI: 00:05.0 subsystem <- 8086/9a19
1567 17:57:45.523485 PCI: 00:05.0 cmd <- 02
1568 17:57:45.526565 PCI: 00:08.0 subsystem <- 8086/9a11
1569 17:57:45.530014 PCI: 00:08.0 cmd <- 06
1570 17:57:45.533031 PCI: 00:0d.0 subsystem <- 8086/9a13
1571 17:57:45.536911 PCI: 00:0d.0 cmd <- 02
1572 17:57:45.540310 PCI: 00:14.0 subsystem <- 8086/a0ed
1573 17:57:45.540729 PCI: 00:14.0 cmd <- 02
1574 17:57:45.547056 PCI: 00:14.2 subsystem <- 8086/a0ef
1575 17:57:45.547576 PCI: 00:14.2 cmd <- 02
1576 17:57:45.549949 PCI: 00:14.3 subsystem <- 8086/a0f0
1577 17:57:45.553221 PCI: 00:14.3 cmd <- 02
1578 17:57:45.556508 PCI: 00:15.0 subsystem <- 8086/a0e8
1579 17:57:45.560352 PCI: 00:15.0 cmd <- 02
1580 17:57:45.563441 PCI: 00:15.1 subsystem <- 8086/a0e9
1581 17:57:45.566316 PCI: 00:15.1 cmd <- 02
1582 17:57:45.569825 PCI: 00:15.2 subsystem <- 8086/a0ea
1583 17:57:45.573089 PCI: 00:15.2 cmd <- 02
1584 17:57:45.576623 PCI: 00:15.3 subsystem <- 8086/a0eb
1585 17:57:45.579675 PCI: 00:15.3 cmd <- 02
1586 17:57:45.583302 PCI: 00:16.0 subsystem <- 8086/a0e0
1587 17:57:45.583809 PCI: 00:16.0 cmd <- 02
1588 17:57:45.590092 PCI: 00:19.1 subsystem <- 8086/a0c6
1589 17:57:45.590606 PCI: 00:19.1 cmd <- 02
1590 17:57:45.593553 PCI: 00:1d.0 bridge ctrl <- 0013
1591 17:57:45.596957 PCI: 00:1d.0 subsystem <- 8086/a0b0
1592 17:57:45.600016 PCI: 00:1d.0 cmd <- 06
1593 17:57:45.603454 PCI: 00:1e.0 subsystem <- 8086/a0a8
1594 17:57:45.606627 PCI: 00:1e.0 cmd <- 06
1595 17:57:45.610355 PCI: 00:1e.2 subsystem <- 8086/a0aa
1596 17:57:45.613350 PCI: 00:1e.2 cmd <- 06
1597 17:57:45.616996 PCI: 00:1e.3 subsystem <- 8086/a0ab
1598 17:57:45.620565 PCI: 00:1e.3 cmd <- 02
1599 17:57:45.623385 PCI: 00:1f.0 subsystem <- 8086/a087
1600 17:57:45.626699 PCI: 00:1f.0 cmd <- 407
1601 17:57:45.630056 PCI: 00:1f.3 subsystem <- 8086/a0c8
1602 17:57:45.633727 PCI: 00:1f.3 cmd <- 02
1603 17:57:45.636618 PCI: 00:1f.5 subsystem <- 8086/a0a4
1604 17:57:45.637035 PCI: 00:1f.5 cmd <- 406
1605 17:57:45.642662 PCI: 01:00.0 cmd <- 02
1606 17:57:45.646830 done.
1607 17:57:45.649921 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1608 17:57:45.653486 Initializing devices...
1609 17:57:45.657004 Root Device init
1610 17:57:45.660156 Chrome EC: Set SMI mask to 0x0000000000000000
1611 17:57:45.666961 Chrome EC: clear events_b mask to 0x0000000000000000
1612 17:57:45.673125 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1613 17:57:45.676503 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1614 17:57:45.683223 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1615 17:57:45.690237 Chrome EC: Set WAKE mask to 0x0000000000000000
1616 17:57:45.693183 fw_config match found: DB_USB=USB3_ACTIVE
1617 17:57:45.699626 Configure Right Type-C port orientation for retimer
1618 17:57:45.703601 Root Device init finished in 42 msecs
1619 17:57:45.707014 PCI: 00:00.0 init
1620 17:57:45.707528 CPU TDP = 9 Watts
1621 17:57:45.710143 CPU PL1 = 9 Watts
1622 17:57:45.713254 CPU PL2 = 40 Watts
1623 17:57:45.713761 CPU PL4 = 83 Watts
1624 17:57:45.716739 PCI: 00:00.0 init finished in 8 msecs
1625 17:57:45.719646 PCI: 00:02.0 init
1626 17:57:45.723246 GMA: Found VBT in CBFS
1627 17:57:45.726897 GMA: Found valid VBT in CBFS
1628 17:57:45.729912 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1629 17:57:45.739650 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1630 17:57:45.743300 PCI: 00:02.0 init finished in 18 msecs
1631 17:57:45.746148 PCI: 00:05.0 init
1632 17:57:45.750319 PCI: 00:05.0 init finished in 0 msecs
1633 17:57:45.750914 PCI: 00:08.0 init
1634 17:57:45.756493 PCI: 00:08.0 init finished in 0 msecs
1635 17:57:45.756986 PCI: 00:14.0 init
1636 17:57:45.763318 PCI: 00:14.0 init finished in 0 msecs
1637 17:57:45.763732 PCI: 00:14.2 init
1638 17:57:45.766169 PCI: 00:14.2 init finished in 0 msecs
1639 17:57:45.769851 PCI: 00:15.0 init
1640 17:57:45.773381 I2C bus 0 version 0x3230302a
1641 17:57:45.776242 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1642 17:57:45.779599 PCI: 00:15.0 init finished in 6 msecs
1643 17:57:45.783151 PCI: 00:15.1 init
1644 17:57:45.786789 I2C bus 1 version 0x3230302a
1645 17:57:45.790064 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1646 17:57:45.793302 PCI: 00:15.1 init finished in 6 msecs
1647 17:57:45.796369 PCI: 00:15.2 init
1648 17:57:45.800022 I2C bus 2 version 0x3230302a
1649 17:57:45.802943 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1650 17:57:45.806623 PCI: 00:15.2 init finished in 6 msecs
1651 17:57:45.807069 PCI: 00:15.3 init
1652 17:57:45.809988 I2C bus 3 version 0x3230302a
1653 17:57:45.813527 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1654 17:57:45.819833 PCI: 00:15.3 init finished in 6 msecs
1655 17:57:45.820339 PCI: 00:16.0 init
1656 17:57:45.822772 PCI: 00:16.0 init finished in 0 msecs
1657 17:57:45.826671 PCI: 00:19.1 init
1658 17:57:45.829816 I2C bus 5 version 0x3230302a
1659 17:57:45.833231 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1660 17:57:45.836913 PCI: 00:19.1 init finished in 6 msecs
1661 17:57:45.840148 PCI: 00:1d.0 init
1662 17:57:45.843088 Initializing PCH PCIe bridge.
1663 17:57:45.846832 PCI: 00:1d.0 init finished in 3 msecs
1664 17:57:45.849922 PCI: 00:1f.0 init
1665 17:57:45.853466 IOAPIC: Initializing IOAPIC at 0xfec00000
1666 17:57:45.856992 IOAPIC: Bootstrap Processor Local APIC = 0x00
1667 17:57:45.859932 IOAPIC: ID = 0x02
1668 17:57:45.863673 IOAPIC: Dumping registers
1669 17:57:45.866473 reg 0x0000: 0x02000000
1670 17:57:45.866928 reg 0x0001: 0x00770020
1671 17:57:45.870135 reg 0x0002: 0x00000000
1672 17:57:45.873111 PCI: 00:1f.0 init finished in 21 msecs
1673 17:57:45.876784 PCI: 00:1f.2 init
1674 17:57:45.880442 Disabling ACPI via APMC.
1675 17:57:45.883518 APMC done.
1676 17:57:45.886848 PCI: 00:1f.2 init finished in 5 msecs
1677 17:57:45.897421 PCI: 01:00.0 init
1678 17:57:45.900671 PCI: 01:00.0 init finished in 0 msecs
1679 17:57:45.904483 PNP: 0c09.0 init
1680 17:57:45.907671 Google Chrome EC uptime: 8.431 seconds
1681 17:57:45.914011 Google Chrome AP resets since EC boot: 1
1682 17:57:45.917658 Google Chrome most recent AP reset causes:
1683 17:57:45.920572 0.379: 32775 shutdown: entering G3
1684 17:57:45.927260 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1685 17:57:45.930778 PNP: 0c09.0 init finished in 22 msecs
1686 17:57:45.936523 Devices initialized
1687 17:57:45.939591 Show all devs... After init.
1688 17:57:45.942971 Root Device: enabled 1
1689 17:57:45.943196 DOMAIN: 0000: enabled 1
1690 17:57:45.946280 CPU_CLUSTER: 0: enabled 1
1691 17:57:45.949497 PCI: 00:00.0: enabled 1
1692 17:57:45.952705 PCI: 00:02.0: enabled 1
1693 17:57:45.952856 PCI: 00:04.0: enabled 1
1694 17:57:45.956242 PCI: 00:05.0: enabled 1
1695 17:57:45.959142 PCI: 00:06.0: enabled 0
1696 17:57:45.962667 PCI: 00:07.0: enabled 0
1697 17:57:45.962816 PCI: 00:07.1: enabled 0
1698 17:57:45.966112 PCI: 00:07.2: enabled 0
1699 17:57:45.969153 PCI: 00:07.3: enabled 0
1700 17:57:45.972784 PCI: 00:08.0: enabled 1
1701 17:57:45.972877 PCI: 00:09.0: enabled 0
1702 17:57:45.975966 PCI: 00:0a.0: enabled 0
1703 17:57:45.979475 PCI: 00:0d.0: enabled 1
1704 17:57:45.982446 PCI: 00:0d.1: enabled 0
1705 17:57:45.982605 PCI: 00:0d.2: enabled 0
1706 17:57:45.986108 PCI: 00:0d.3: enabled 0
1707 17:57:45.989606 PCI: 00:0e.0: enabled 0
1708 17:57:45.989761 PCI: 00:10.2: enabled 1
1709 17:57:45.992504 PCI: 00:10.6: enabled 0
1710 17:57:45.995989 PCI: 00:10.7: enabled 0
1711 17:57:45.999368 PCI: 00:12.0: enabled 0
1712 17:57:45.999463 PCI: 00:12.6: enabled 0
1713 17:57:46.002890 PCI: 00:13.0: enabled 0
1714 17:57:46.005939 PCI: 00:14.0: enabled 1
1715 17:57:46.009364 PCI: 00:14.1: enabled 0
1716 17:57:46.009471 PCI: 00:14.2: enabled 1
1717 17:57:46.012359 PCI: 00:14.3: enabled 1
1718 17:57:46.015776 PCI: 00:15.0: enabled 1
1719 17:57:46.019144 PCI: 00:15.1: enabled 1
1720 17:57:46.019282 PCI: 00:15.2: enabled 1
1721 17:57:46.022466 PCI: 00:15.3: enabled 1
1722 17:57:46.025600 PCI: 00:16.0: enabled 1
1723 17:57:46.025765 PCI: 00:16.1: enabled 0
1724 17:57:46.029249 PCI: 00:16.2: enabled 0
1725 17:57:46.032372 PCI: 00:16.3: enabled 0
1726 17:57:46.036032 PCI: 00:16.4: enabled 0
1727 17:57:46.036485 PCI: 00:16.5: enabled 0
1728 17:57:46.039164 PCI: 00:17.0: enabled 0
1729 17:57:46.042615 PCI: 00:19.0: enabled 0
1730 17:57:46.046102 PCI: 00:19.1: enabled 1
1731 17:57:46.046551 PCI: 00:19.2: enabled 0
1732 17:57:46.049515 PCI: 00:1c.0: enabled 1
1733 17:57:46.052713 PCI: 00:1c.1: enabled 0
1734 17:57:46.055966 PCI: 00:1c.2: enabled 0
1735 17:57:46.056385 PCI: 00:1c.3: enabled 0
1736 17:57:46.059241 PCI: 00:1c.4: enabled 0
1737 17:57:46.062757 PCI: 00:1c.5: enabled 0
1738 17:57:46.065871 PCI: 00:1c.6: enabled 1
1739 17:57:46.066441 PCI: 00:1c.7: enabled 0
1740 17:57:46.069261 PCI: 00:1d.0: enabled 1
1741 17:57:46.072717 PCI: 00:1d.1: enabled 0
1742 17:57:46.073174 PCI: 00:1d.2: enabled 1
1743 17:57:46.075919 PCI: 00:1d.3: enabled 0
1744 17:57:46.079398 PCI: 00:1e.0: enabled 1
1745 17:57:46.082615 PCI: 00:1e.1: enabled 0
1746 17:57:46.083063 PCI: 00:1e.2: enabled 1
1747 17:57:46.086369 PCI: 00:1e.3: enabled 1
1748 17:57:46.089202 PCI: 00:1f.0: enabled 1
1749 17:57:46.093269 PCI: 00:1f.1: enabled 0
1750 17:57:46.093784 PCI: 00:1f.2: enabled 1
1751 17:57:46.095909 PCI: 00:1f.3: enabled 1
1752 17:57:46.099040 PCI: 00:1f.4: enabled 0
1753 17:57:46.099474 PCI: 00:1f.5: enabled 1
1754 17:57:46.102630 PCI: 00:1f.6: enabled 0
1755 17:57:46.106206 PCI: 00:1f.7: enabled 0
1756 17:57:46.109441 APIC: 00: enabled 1
1757 17:57:46.109854 GENERIC: 0.0: enabled 1
1758 17:57:46.112514 GENERIC: 0.0: enabled 1
1759 17:57:46.115966 GENERIC: 1.0: enabled 1
1760 17:57:46.119491 GENERIC: 0.0: enabled 1
1761 17:57:46.119910 GENERIC: 1.0: enabled 1
1762 17:57:46.122829 USB0 port 0: enabled 1
1763 17:57:46.125826 GENERIC: 0.0: enabled 1
1764 17:57:46.126342 USB0 port 0: enabled 1
1765 17:57:46.129390 GENERIC: 0.0: enabled 1
1766 17:57:46.132579 I2C: 00:1a: enabled 1
1767 17:57:46.133073 I2C: 00:31: enabled 1
1768 17:57:46.135781 I2C: 00:32: enabled 1
1769 17:57:46.138780 I2C: 00:10: enabled 1
1770 17:57:46.142433 I2C: 00:15: enabled 1
1771 17:57:46.142934 GENERIC: 0.0: enabled 0
1772 17:57:46.145486 GENERIC: 1.0: enabled 0
1773 17:57:46.149099 GENERIC: 0.0: enabled 1
1774 17:57:46.149517 SPI: 00: enabled 1
1775 17:57:46.152598 SPI: 00: enabled 1
1776 17:57:46.156074 PNP: 0c09.0: enabled 1
1777 17:57:46.156592 GENERIC: 0.0: enabled 1
1778 17:57:46.159231 USB3 port 0: enabled 1
1779 17:57:46.162592 USB3 port 1: enabled 1
1780 17:57:46.163147 USB3 port 2: enabled 0
1781 17:57:46.165598 USB3 port 3: enabled 0
1782 17:57:46.169240 USB2 port 0: enabled 0
1783 17:57:46.172303 USB2 port 1: enabled 1
1784 17:57:46.172802 USB2 port 2: enabled 1
1785 17:57:46.175454 USB2 port 3: enabled 0
1786 17:57:46.178823 USB2 port 4: enabled 1
1787 17:57:46.179328 USB2 port 5: enabled 0
1788 17:57:46.182323 USB2 port 6: enabled 0
1789 17:57:46.185476 USB2 port 7: enabled 0
1790 17:57:46.188926 USB2 port 8: enabled 0
1791 17:57:46.189375 USB2 port 9: enabled 0
1792 17:57:46.192382 USB3 port 0: enabled 0
1793 17:57:46.195738 USB3 port 1: enabled 1
1794 17:57:46.196173 USB3 port 2: enabled 0
1795 17:57:46.198901 USB3 port 3: enabled 0
1796 17:57:46.201945 GENERIC: 0.0: enabled 1
1797 17:57:46.205571 GENERIC: 1.0: enabled 1
1798 17:57:46.205796 APIC: 01: enabled 1
1799 17:57:46.208472 APIC: 03: enabled 1
1800 17:57:46.208694 APIC: 07: enabled 1
1801 17:57:46.211836 APIC: 04: enabled 1
1802 17:57:46.215569 APIC: 02: enabled 1
1803 17:57:46.215795 APIC: 06: enabled 1
1804 17:57:46.219083 APIC: 05: enabled 1
1805 17:57:46.221904 PCI: 01:00.0: enabled 1
1806 17:57:46.225502 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1807 17:57:46.231678 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1808 17:57:46.235088 ELOG: NV offset 0xf30000 size 0x1000
1809 17:57:46.241646 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1810 17:57:46.248814 ELOG: Event(17) added with size 13 at 2023-10-09 17:57:42 UTC
1811 17:57:46.255065 ELOG: Event(92) added with size 9 at 2023-10-09 17:57:42 UTC
1812 17:57:46.261622 ELOG: Event(16) added with size 11 at 2023-10-09 17:57:42 UTC
1813 17:57:46.265097 Erasing flash addr f30000 + 4 KiB
1814 17:57:46.323138 ELOG: Event(93) added with size 9 at 2023-10-09 17:57:42 UTC
1815 17:57:46.329582 ELOG: Event(9E) added with size 10 at 2023-10-09 17:57:42 UTC
1816 17:57:46.336214 ELOG: Event(9F) added with size 14 at 2023-10-09 17:57:42 UTC
1817 17:57:46.343349 BS: BS_DEV_INIT exit times (exec / console): 31 / 55 ms
1818 17:57:46.349928 ELOG: Event(A1) added with size 10 at 2023-10-09 17:57:42 UTC
1819 17:57:46.356193 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 17:57:46.359500 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 17:57:46.363313 Finalize devices...
1822 17:57:46.363539 Devices finalized
1823 17:57:46.369785 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 17:57:46.376285 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 17:57:46.379595 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 17:57:46.386181 ME: HFSTS1 : 0x80030055
1827 17:57:46.389641 ME: HFSTS2 : 0x30280116
1828 17:57:46.395935 ME: HFSTS3 : 0x00000050
1829 17:57:46.399349 ME: HFSTS4 : 0x00004000
1830 17:57:46.402520 ME: HFSTS5 : 0x00000000
1831 17:57:46.409447 ME: HFSTS6 : 0x00400006
1832 17:57:46.412608 ME: Manufacturing Mode : YES
1833 17:57:46.416160 ME: SPI Protection Mode Enabled : NO
1834 17:57:46.419416 ME: FW Partition Table : OK
1835 17:57:46.422646 ME: Bringup Loader Failure : NO
1836 17:57:46.426238 ME: Firmware Init Complete : NO
1837 17:57:46.429675 ME: Boot Options Present : NO
1838 17:57:46.432616 ME: Update In Progress : NO
1839 17:57:46.439264 ME: D0i3 Support : YES
1840 17:57:46.442823 ME: Low Power State Enabled : NO
1841 17:57:46.445785 ME: CPU Replaced : YES
1842 17:57:46.449547 ME: CPU Replacement Valid : YES
1843 17:57:46.453159 ME: Current Working State : 5
1844 17:57:46.456129 ME: Current Operation State : 1
1845 17:57:46.459102 ME: Current Operation Mode : 3
1846 17:57:46.462710 ME: Error Code : 0
1847 17:57:46.465636 ME: Enhanced Debug Mode : NO
1848 17:57:46.472369 ME: CPU Debug Disabled : YES
1849 17:57:46.476193 ME: TXT Support : NO
1850 17:57:46.482494 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 17:57:46.489174 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 17:57:46.492213 CBFS: 'fallback/slic' not found.
1853 17:57:46.495667 ACPI: Writing ACPI tables at 76b01000.
1854 17:57:46.499115 ACPI: * FACS
1855 17:57:46.499436 ACPI: * DSDT
1856 17:57:46.502105 Ramoops buffer: 0x100000@0x76a00000.
1857 17:57:46.508799 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 17:57:46.512230 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 17:57:46.515777 Google Chrome EC: version:
1860 17:57:46.519278 ro: voema_v2.0.7540-147f8d37d1
1861 17:57:46.522591 rw: voema_v2.0.7540-147f8d37d1
1862 17:57:46.525843 running image: 2
1863 17:57:46.532316 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 17:57:46.535797 ACPI: * FADT
1865 17:57:46.536067 SCI is IRQ9
1866 17:57:46.538889 ACPI: added table 1/32, length now 40
1867 17:57:46.542187 ACPI: * SSDT
1868 17:57:46.545559 Found 1 CPU(s) with 8 core(s) each.
1869 17:57:46.549472 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 17:57:46.555848 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 17:57:46.559498 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 17:57:46.562405 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 17:57:46.569010 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 17:57:46.575703 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 17:57:46.579244 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 17:57:46.585390 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 17:57:46.592238 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 17:57:46.595525 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 17:57:46.599099 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 17:57:46.605432 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 17:57:46.609032 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 17:57:46.615639 PS2K: Passing 80 keymaps to kernel
1883 17:57:46.622044 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 17:57:46.625507 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 17:57:46.632228 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 17:57:46.638644 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 17:57:46.645203 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 17:57:46.651910 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 17:57:46.658984 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 17:57:46.665054 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 17:57:46.671704 ACPI: added table 2/32, length now 44
1892 17:57:46.671998 ACPI: * MCFG
1893 17:57:46.675239 ACPI: added table 3/32, length now 48
1894 17:57:46.678635 ACPI: * TPM2
1895 17:57:46.681549 TPM2 log created at 0x769f0000
1896 17:57:46.685163 ACPI: added table 4/32, length now 52
1897 17:57:46.685435 ACPI: * MADT
1898 17:57:46.688215 SCI is IRQ9
1899 17:57:46.691670 ACPI: added table 5/32, length now 56
1900 17:57:46.691943 current = 76b09850
1901 17:57:46.695064 ACPI: * DMAR
1902 17:57:46.698151 ACPI: added table 6/32, length now 60
1903 17:57:46.701498 ACPI: added table 7/32, length now 64
1904 17:57:46.704838 ACPI: * HPET
1905 17:57:46.708480 ACPI: added table 8/32, length now 68
1906 17:57:46.708858 ACPI: done.
1907 17:57:46.711873 ACPI tables: 35216 bytes.
1908 17:57:46.714976 smbios_write_tables: 769ef000
1909 17:57:46.718473 EC returned error result code 3
1910 17:57:46.721391 Couldn't obtain OEM name from CBI
1911 17:57:46.724877 Create SMBIOS type 16
1912 17:57:46.728224 Create SMBIOS type 17
1913 17:57:46.728497 GENERIC: 0.0 (WIFI Device)
1914 17:57:46.731075 SMBIOS tables: 1750 bytes.
1915 17:57:46.734767 Writing table forward entry at 0x00000500
1916 17:57:46.741688 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 17:57:46.745046 Writing coreboot table at 0x76b25000
1918 17:57:46.751162 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 17:57:46.758242 1. 0000000000001000-000000000009ffff: RAM
1920 17:57:46.761565 2. 00000000000a0000-00000000000fffff: RESERVED
1921 17:57:46.764870 3. 0000000000100000-00000000769eefff: RAM
1922 17:57:46.771540 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 17:57:46.774681 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 17:57:46.781163 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 17:57:46.787571 7. 0000000077000000-000000007fbfffff: RESERVED
1926 17:57:46.791200 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 17:57:46.797840 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 17:57:46.801058 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 17:57:46.804515 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 17:57:46.811048 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 17:57:46.814575 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 17:57:46.821128 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 17:57:46.824411 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 17:57:46.831633 16. 0000000100000000-00000002803fffff: RAM
1935 17:57:46.832063 Passing 4 GPIOs to payload:
1936 17:57:46.837580 NAME | PORT | POLARITY | VALUE
1937 17:57:46.844645 lid | undefined | high | high
1938 17:57:46.848111 power | undefined | high | low
1939 17:57:46.854480 oprom | undefined | high | low
1940 17:57:46.857995 EC in RW | 0x000000e5 | high | high
1941 17:57:46.864245 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2614
1942 17:57:46.867632 coreboot table: 1576 bytes.
1943 17:57:46.871264 IMD ROOT 0. 0x76fff000 0x00001000
1944 17:57:46.874273 IMD SMALL 1. 0x76ffe000 0x00001000
1945 17:57:46.877346 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 17:57:46.883965 VPD 3. 0x76c4d000 0x00000367
1947 17:57:46.887644 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 17:57:46.890748 CONSOLE 5. 0x76c2c000 0x00020000
1949 17:57:46.894437 FMAP 6. 0x76c2b000 0x00000578
1950 17:57:46.897528 TIME STAMP 7. 0x76c2a000 0x00000910
1951 17:57:46.901004 VBOOT WORK 8. 0x76c16000 0x00014000
1952 17:57:46.904580 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 17:57:46.907592 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 17:57:46.910686 RAMSTAGE 11. 0x76b97000 0x00073000
1955 17:57:46.917903 REFCODE 12. 0x76b42000 0x00055000
1956 17:57:46.921129 SMM BACKUP 13. 0x76b32000 0x00010000
1957 17:57:46.924332 4f444749 14. 0x76b30000 0x00002000
1958 17:57:46.927579 EXT VBT15. 0x76b2d000 0x0000219f
1959 17:57:46.931074 COREBOOT 16. 0x76b25000 0x00008000
1960 17:57:46.934235 ACPI 17. 0x76b01000 0x00024000
1961 17:57:46.937419 ACPI GNVS 18. 0x76b00000 0x00001000
1962 17:57:46.940828 RAMOOPS 19. 0x76a00000 0x00100000
1963 17:57:46.943953 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 17:57:46.950974 SMBIOS 21. 0x769ef000 0x00000800
1965 17:57:46.951145 IMD small region:
1966 17:57:46.954529 IMD ROOT 0. 0x76ffec00 0x00000400
1967 17:57:46.957348 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 17:57:46.964533 POWER STATE 2. 0x76ffeb80 0x00000044
1969 17:57:46.967274 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 17:57:46.970689 MEM INFO 4. 0x76ffe980 0x000001e0
1971 17:57:46.977800 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1972 17:57:46.980839 MTRR: Physical address space:
1973 17:57:46.987543 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 17:57:46.991127 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 17:57:46.997655 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 17:57:47.004280 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 17:57:47.011001 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 17:57:47.017697 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 17:57:47.024150 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 17:57:47.027167 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 17:57:47.030649 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 17:57:47.037128 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 17:57:47.040803 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 17:57:47.043763 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 17:57:47.047136 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 17:57:47.053879 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 17:57:47.056940 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 17:57:47.060668 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 17:57:47.063531 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 17:57:47.067232 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 17:57:47.071767 call enable_fixed_mtrr()
1992 17:57:47.074828 CPU physical address size: 39 bits
1993 17:57:47.081862 MTRR: default type WB/UC MTRR counts: 6/6.
1994 17:57:47.085271 MTRR: UC selected as default type.
1995 17:57:47.091848 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 17:57:47.094752 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 17:57:47.101340 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 17:57:47.108039 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 17:57:47.114597 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 17:57:47.121264 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 17:57:47.121524
2002 17:57:47.125418 MTRR check
2003 17:57:47.128057 Fixed MTRRs : Enabled
2004 17:57:47.128264 Variable MTRRs: Enabled
2005 17:57:47.128422
2006 17:57:47.134679 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 17:57:47.138384 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 17:57:47.141949 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 17:57:47.144640 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 17:57:47.148145 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 17:57:47.154783 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 17:57:47.158021 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 17:57:47.161414 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 17:57:47.164861 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 17:57:47.171538 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 17:57:47.174842 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 17:57:47.181610 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2018 17:57:47.184659 call enable_fixed_mtrr()
2019 17:57:47.188048 Checking cr50 for pending updates
2020 17:57:47.191594 CPU physical address size: 39 bits
2021 17:57:47.195289 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 17:57:47.198530 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 17:57:47.201821 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 17:57:47.208936 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 17:57:47.211778 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 17:57:47.215407 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 17:57:47.218510 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 17:57:47.225293 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 17:57:47.228143 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 17:57:47.231773 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 17:57:47.235066 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 17:57:47.238000 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 17:57:47.244969 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 17:57:47.248778 call enable_fixed_mtrr()
2035 17:57:47.251730 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 17:57:47.254975 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 17:57:47.258301 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 17:57:47.264852 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 17:57:47.267865 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 17:57:47.271272 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 17:57:47.274366 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 17:57:47.281421 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 17:57:47.285117 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 17:57:47.287739 CPU physical address size: 39 bits
2045 17:57:47.292046 call enable_fixed_mtrr()
2046 17:57:47.295019 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 17:57:47.302036 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 17:57:47.305234 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 17:57:47.308528 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 17:57:47.311857 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 17:57:47.318530 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 17:57:47.322088 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 17:57:47.325597 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 17:57:47.328448 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 17:57:47.331881 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 17:57:47.338308 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 17:57:47.341752 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 17:57:47.345283 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 17:57:47.349050 call enable_fixed_mtrr()
2060 17:57:47.352158 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 17:57:47.358317 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 17:57:47.361870 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 17:57:47.365373 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 17:57:47.368424 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 17:57:47.375107 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 17:57:47.378375 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 17:57:47.381611 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 17:57:47.384978 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 17:57:47.389143 CPU physical address size: 39 bits
2070 17:57:47.396310 call enable_fixed_mtrr()
2071 17:57:47.399046 CPU physical address size: 39 bits
2072 17:57:47.402452 CPU physical address size: 39 bits
2073 17:57:47.405754 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 17:57:47.409329 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 17:57:47.412485 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 17:57:47.419182 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 17:57:47.422373 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 17:57:47.425740 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 17:57:47.429656 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 17:57:47.435758 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 17:57:47.439311 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 17:57:47.442896 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 17:57:47.445626 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 17:57:47.449191 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 17:57:47.456218 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 17:57:47.459194 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 17:57:47.465396 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 17:57:47.468956 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 17:57:47.472433 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 17:57:47.475923 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 17:57:47.478669 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 17:57:47.485351 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 17:57:47.488665 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 17:57:47.492248 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 17:57:47.495548 call enable_fixed_mtrr()
2096 17:57:47.498846 call enable_fixed_mtrr()
2097 17:57:47.502905 Reading cr50 TPM mode
2098 17:57:47.503091 CPU physical address size: 39 bits
2099 17:57:47.507122 CPU physical address size: 39 bits
2100 17:57:47.513892 BS: BS_PAYLOAD_LOAD entry times (exec / console): 319 / 6 ms
2101 17:57:47.524087 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 17:57:47.527551 Checking segment from ROM address 0xffc02b38
2103 17:57:47.530493 Checking segment from ROM address 0xffc02b54
2104 17:57:47.537579 Loading segment from ROM address 0xffc02b38
2105 17:57:47.538092 code (compression=0)
2106 17:57:47.547343 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 17:57:47.554369 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 17:57:47.557871 it's not compressed!
2109 17:57:47.697115 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 17:57:47.703889 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 17:57:47.710336 Loading segment from ROM address 0xffc02b54
2112 17:57:47.710776 Entry Point 0x30000000
2113 17:57:47.713779 Loaded segments
2114 17:57:47.720326 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 17:57:47.763489 Finalizing chipset.
2116 17:57:47.766286 Finalizing SMM.
2117 17:57:47.766833 APMC done.
2118 17:57:47.773030 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 17:57:47.775927 mp_park_aps done after 0 msecs.
2120 17:57:47.780154 Jumping to boot code at 0x30000000(0x76b25000)
2121 17:57:47.789934 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 17:57:47.790462
2123 17:57:47.790844
2124 17:57:47.793053
2125 17:57:47.793477 Starting depthcharge on Voema...
2126 17:57:47.794948 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2127 17:57:47.795492 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2128 17:57:47.795940 Setting prompt string to ['volteer:']
2129 17:57:47.796360 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2130 17:57:47.797015
2131 17:57:47.802948 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 17:57:47.803365
2133 17:57:47.809563 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 17:57:47.810066
2135 17:57:47.816218 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 17:57:47.816726
2137 17:57:47.819150 Failed to find eMMC card reader
2138 17:57:47.819602
2139 17:57:47.819978 Wipe memory regions:
2140 17:57:47.822870
2141 17:57:47.825863 [0x00000000001000, 0x000000000a0000)
2142 17:57:47.826313
2143 17:57:47.829307 [0x00000000100000, 0x00000030000000)
2144 17:57:47.855434
2145 17:57:47.858413 [0x00000032662db0, 0x000000769ef000)
2146 17:57:47.894492
2147 17:57:47.897393 [0x00000100000000, 0x00000280400000)
2148 17:57:48.097951
2149 17:57:48.101170 ec_init: CrosEC protocol v3 supported (256, 256)
2150 17:57:48.101596
2151 17:57:48.107414 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 17:57:48.107847
2153 17:57:48.114101 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 17:57:48.119375
2155 17:57:48.122769 pmc_check_ipc_sts: STS_BUSY done after 2162 us
2156 17:57:48.123198
2157 17:57:48.125794 send_conn_disc_msg: pmc_send_cmd succeeded
2158 17:57:48.557945
2159 17:57:48.558473 R8152: Initializing
2160 17:57:48.558927
2161 17:57:48.560921 Version 6 (ocp_data = 5c30)
2162 17:57:48.561438
2163 17:57:48.563971 R8152: Done initializing
2164 17:57:48.564429
2165 17:57:48.567182 Adding net device
2166 17:57:48.869174
2167 17:57:48.872250 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 17:57:48.872768
2169 17:57:48.873107
2170 17:57:48.873423
2171 17:57:48.875682 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 17:57:48.977025 volteer: tftpboot 192.168.201.1 11712595/tftp-deploy-sgfxg_0h/kernel/bzImage 11712595/tftp-deploy-sgfxg_0h/kernel/cmdline 11712595/tftp-deploy-sgfxg_0h/ramdisk/ramdisk.cpio.gz
2174 17:57:48.977675 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 17:57:48.978137 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 17:57:48.982807 tftpboot 192.168.201.1 11712595/tftp-deploy-sgfxg_0h/kernel/bzIploy-sgfxg_0h/kernel/cmdline 11712595/tftp-deploy-sgfxg_0h/ramdisk/ramdisk.cpio.gz
2177 17:57:48.983259
2178 17:57:48.983601 Waiting for link
2179 17:57:49.187383
2180 17:57:49.187899 done.
2181 17:57:49.188242
2182 17:57:49.188560 MAC: 00:24:32:30:7e:47
2183 17:57:49.188865
2184 17:57:49.190020 Sending DHCP discover... done.
2185 17:57:49.190442
2186 17:57:49.193896 Waiting for reply... done.
2187 17:57:49.194442
2188 17:57:49.196897 Sending DHCP request... done.
2189 17:57:49.197415
2190 17:57:49.200322 Waiting for reply... done.
2191 17:57:49.200751
2192 17:57:49.203964 My ip is 192.168.201.19
2193 17:57:49.204382
2194 17:57:49.206991 The DHCP server ip is 192.168.201.1
2195 17:57:49.207549
2196 17:57:49.213268 TFTP server IP predefined by user: 192.168.201.1
2197 17:57:49.213875
2198 17:57:49.220497 Bootfile predefined by user: 11712595/tftp-deploy-sgfxg_0h/kernel/bzImage
2199 17:57:49.220919
2200 17:57:49.223358 Sending tftp read request... done.
2201 17:57:49.223821
2202 17:57:49.231230 Waiting for the transfer...
2203 17:57:49.231739
2204 17:57:49.961668 00000000 ################################################################
2205 17:57:49.962235
2206 17:57:50.656155 00080000 ################################################################
2207 17:57:50.656308
2208 17:57:51.304910 00100000 ################################################################
2209 17:57:51.305061
2210 17:57:51.992451 00180000 ################################################################
2211 17:57:51.992602
2212 17:57:52.652421 00200000 ################################################################
2213 17:57:52.652956
2214 17:57:53.389512 00280000 ################################################################
2215 17:57:53.390035
2216 17:57:54.107540 00300000 ################################################################
2217 17:57:54.108063
2218 17:57:54.821181 00380000 ################################################################
2219 17:57:54.821819
2220 17:57:55.543186 00400000 ################################################################
2221 17:57:55.543702
2222 17:57:56.247185 00480000 ################################################################
2223 17:57:56.247703
2224 17:57:56.832398 00500000 ################################################################
2225 17:57:56.832600
2226 17:57:57.533315 00580000 ################################################################
2227 17:57:57.533884
2228 17:57:58.174892 00600000 ################################################################
2229 17:57:58.175406
2230 17:57:58.878365 00680000 ################################################################
2231 17:57:58.878921
2232 17:57:59.605626 00700000 ################################################################
2233 17:57:59.606174
2234 17:58:00.336835 00780000 ################################################################
2235 17:58:00.337360
2236 17:58:00.478563 00800000 ############# done.
2237 17:58:00.479186
2238 17:58:00.481445 The bootfile was 8490896 bytes long.
2239 17:58:00.481870
2240 17:58:00.484865 Sending tftp read request... done.
2241 17:58:00.485305
2242 17:58:00.488622 Waiting for the transfer...
2243 17:58:00.489044
2244 17:58:01.130757 00000000 ################################################################
2245 17:58:01.130907
2246 17:58:01.725891 00080000 ################################################################
2247 17:58:01.726044
2248 17:58:02.310662 00100000 ################################################################
2249 17:58:02.310873
2250 17:58:02.985175 00180000 ################################################################
2251 17:58:02.985693
2252 17:58:03.664942 00200000 ################################################################
2253 17:58:03.665454
2254 17:58:04.343855 00280000 ################################################################
2255 17:58:04.344373
2256 17:58:05.041492 00300000 ################################################################
2257 17:58:05.041638
2258 17:58:05.703262 00380000 ################################################################
2259 17:58:05.703776
2260 17:58:06.383815 00400000 ################################################################
2261 17:58:06.384323
2262 17:58:07.026956 00480000 ################################################################
2263 17:58:07.027128
2264 17:58:07.616560 00500000 ################################################################ done.
2265 17:58:07.617116
2266 17:58:07.619632 Sending tftp read request... done.
2267 17:58:07.620100
2268 17:58:07.623365 Waiting for the transfer...
2269 17:58:07.623788
2270 17:58:07.624124 00000000 # done.
2271 17:58:07.626836
2272 17:58:07.633405 Command line loaded dynamically from TFTP file: 11712595/tftp-deploy-sgfxg_0h/kernel/cmdline
2273 17:58:07.633825
2274 17:58:07.660085 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712595/extract-nfsrootfs-o0y9z9_k,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2275 17:58:07.663968
2276 17:58:07.667298 Shutting down all USB controllers.
2277 17:58:07.667723
2278 17:58:07.668077 Removing current net device
2279 17:58:07.668422
2280 17:58:07.670628 Finalizing coreboot
2281 17:58:07.671099
2282 17:58:07.677088 Exiting depthcharge with code 4 at timestamp: 28582876
2283 17:58:07.677602
2284 17:58:07.677934
2285 17:58:07.678242 Starting kernel ...
2286 17:58:07.678539
2287 17:58:07.678888
2288 17:58:07.680037 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2289 17:58:07.680506 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2290 17:58:07.680873 Setting prompt string to ['Linux version [0-9]']
2291 17:58:07.681213 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 17:58:07.681563 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 18:02:32.681388 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2296 18:02:32.682425 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2298 18:02:32.683267 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 18:02:32.684543 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 18:02:32.685615 Cleaning after the job
2304 18:02:32.686044 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/ramdisk
2305 18:02:32.690195 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/kernel
2306 18:02:32.696714 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/nfsrootfs
2307 18:02:32.801216 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712595/tftp-deploy-sgfxg_0h/modules
2308 18:02:32.801689 start: 5.1 power-off (timeout 00:00:30) [common]
2309 18:02:32.801866 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2310 18:02:32.880050 >> Command sent successfully.
2311 18:02:32.885018 Returned 0 in 0 seconds
2312 18:02:32.985923 end: 5.1 power-off (duration 00:00:00) [common]
2314 18:02:32.987389 start: 5.2 read-feedback (timeout 00:10:00) [common]
2315 18:02:32.988562 Listened to connection for namespace 'common' for up to 1s
2316 18:02:33.989366 Finalising connection for namespace 'common'
2317 18:02:33.990040 Disconnecting from shell: Finalise
2318 18:02:33.990462
2319 18:02:34.091497 end: 5.2 read-feedback (duration 00:00:01) [common]
2320 18:02:34.092136 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712595
2321 18:02:34.447331 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712595
2322 18:02:34.447529 JobError: Your job cannot terminate cleanly.