Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 18:06:54.874025 lava-dispatcher, installed at version: 2023.08
2 18:06:54.874247 start: 0 validate
3 18:06:54.874371 Start time: 2023-10-09 18:06:54.874364+00:00 (UTC)
4 18:06:54.874491 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:06:54.874622 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 18:06:55.146505 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:06:55.147460 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:06:55.411353 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:06:55.412056 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:06:55.682786 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:06:55.683554 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:06:55.960169 validate duration: 1.09
14 18:06:55.961577 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:06:55.962139 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:06:55.962671 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:06:55.963331 Not decompressing ramdisk as can be used compressed.
18 18:06:55.963815 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 18:06:55.964191 saving as /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/ramdisk/initrd.cpio.gz
20 18:06:55.964542 total size: 5671549 (5 MB)
21 18:06:55.969816 progress 0 % (0 MB)
22 18:06:55.979454 progress 5 % (0 MB)
23 18:06:55.987002 progress 10 % (0 MB)
24 18:06:55.991514 progress 15 % (0 MB)
25 18:06:55.995586 progress 20 % (1 MB)
26 18:06:55.999165 progress 25 % (1 MB)
27 18:06:56.001925 progress 30 % (1 MB)
28 18:06:56.004753 progress 35 % (1 MB)
29 18:06:56.007302 progress 40 % (2 MB)
30 18:06:56.009503 progress 45 % (2 MB)
31 18:06:56.011741 progress 50 % (2 MB)
32 18:06:56.013924 progress 55 % (3 MB)
33 18:06:56.015697 progress 60 % (3 MB)
34 18:06:56.017665 progress 65 % (3 MB)
35 18:06:56.019559 progress 70 % (3 MB)
36 18:06:56.021163 progress 75 % (4 MB)
37 18:06:56.022980 progress 80 % (4 MB)
38 18:06:56.024726 progress 85 % (4 MB)
39 18:06:56.026190 progress 90 % (4 MB)
40 18:06:56.027814 progress 95 % (5 MB)
41 18:06:56.029403 progress 100 % (5 MB)
42 18:06:56.029507 5 MB downloaded in 0.06 s (83.23 MB/s)
43 18:06:56.029657 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:06:56.029885 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:06:56.029967 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:06:56.030048 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:06:56.030184 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:06:56.030256 saving as /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/kernel/bzImage
50 18:06:56.030314 total size: 8490896 (8 MB)
51 18:06:56.030372 No compression specified
52 18:06:56.031487 progress 0 % (0 MB)
53 18:06:56.033604 progress 5 % (0 MB)
54 18:06:56.035874 progress 10 % (0 MB)
55 18:06:56.038094 progress 15 % (1 MB)
56 18:06:56.040366 progress 20 % (1 MB)
57 18:06:56.042678 progress 25 % (2 MB)
58 18:06:56.044890 progress 30 % (2 MB)
59 18:06:56.047229 progress 35 % (2 MB)
60 18:06:56.049430 progress 40 % (3 MB)
61 18:06:56.051704 progress 45 % (3 MB)
62 18:06:56.053913 progress 50 % (4 MB)
63 18:06:56.056154 progress 55 % (4 MB)
64 18:06:56.058383 progress 60 % (4 MB)
65 18:06:56.060798 progress 65 % (5 MB)
66 18:06:56.063122 progress 70 % (5 MB)
67 18:06:56.065322 progress 75 % (6 MB)
68 18:06:56.067687 progress 80 % (6 MB)
69 18:06:56.069916 progress 85 % (6 MB)
70 18:06:56.072116 progress 90 % (7 MB)
71 18:06:56.074329 progress 95 % (7 MB)
72 18:06:56.076558 progress 100 % (8 MB)
73 18:06:56.076672 8 MB downloaded in 0.05 s (174.69 MB/s)
74 18:06:56.076811 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:06:56.077029 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:06:56.077111 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:06:56.077196 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:06:56.077330 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 18:06:56.077396 saving as /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/nfsrootfs/full.rootfs.tar
81 18:06:56.077453 total size: 126031368 (120 MB)
82 18:06:56.077518 Using unxz to decompress xz
83 18:06:56.082074 progress 0 % (0 MB)
84 18:06:56.561437 progress 5 % (6 MB)
85 18:06:57.046443 progress 10 % (12 MB)
86 18:06:57.541275 progress 15 % (18 MB)
87 18:06:58.053865 progress 20 % (24 MB)
88 18:06:58.395378 progress 25 % (30 MB)
89 18:06:58.732737 progress 30 % (36 MB)
90 18:06:58.998727 progress 35 % (42 MB)
91 18:06:59.180775 progress 40 % (48 MB)
92 18:06:59.543194 progress 45 % (54 MB)
93 18:06:59.912765 progress 50 % (60 MB)
94 18:07:00.253302 progress 55 % (66 MB)
95 18:07:00.610226 progress 60 % (72 MB)
96 18:07:00.946612 progress 65 % (78 MB)
97 18:07:01.334738 progress 70 % (84 MB)
98 18:07:01.764693 progress 75 % (90 MB)
99 18:07:02.182207 progress 80 % (96 MB)
100 18:07:02.282065 progress 85 % (102 MB)
101 18:07:02.441796 progress 90 % (108 MB)
102 18:07:02.789346 progress 95 % (114 MB)
103 18:07:03.163937 progress 100 % (120 MB)
104 18:07:03.168761 120 MB downloaded in 7.09 s (16.95 MB/s)
105 18:07:03.169011 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:07:03.169272 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:07:03.169369 start: 1.4 download-retry (timeout 00:09:53) [common]
109 18:07:03.169458 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 18:07:03.169619 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:07:03.169691 saving as /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/modules/modules.tar
112 18:07:03.169753 total size: 250928 (0 MB)
113 18:07:03.169816 Using unxz to decompress xz
114 18:07:03.174116 progress 13 % (0 MB)
115 18:07:03.174550 progress 26 % (0 MB)
116 18:07:03.174824 progress 39 % (0 MB)
117 18:07:03.176416 progress 52 % (0 MB)
118 18:07:03.178231 progress 65 % (0 MB)
119 18:07:03.180164 progress 78 % (0 MB)
120 18:07:03.182027 progress 91 % (0 MB)
121 18:07:03.183770 progress 100 % (0 MB)
122 18:07:03.189416 0 MB downloaded in 0.02 s (12.17 MB/s)
123 18:07:03.189658 end: 1.4.1 http-download (duration 00:00:00) [common]
125 18:07:03.189926 end: 1.4 download-retry (duration 00:00:00) [common]
126 18:07:03.190020 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 18:07:03.190119 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 18:07:06.153240 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11712618/extract-nfsrootfs-hqy7ndl3
129 18:07:06.153465 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 18:07:06.153610 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 18:07:06.153837 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea
132 18:07:06.154035 makedir: /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin
133 18:07:06.154190 makedir: /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/tests
134 18:07:06.154345 makedir: /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/results
135 18:07:06.154495 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-add-keys
136 18:07:06.154754 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-add-sources
137 18:07:06.154946 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-background-process-start
138 18:07:06.155084 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-background-process-stop
139 18:07:06.155215 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-common-functions
140 18:07:06.155381 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-echo-ipv4
141 18:07:06.155511 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-install-packages
142 18:07:06.155638 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-installed-packages
143 18:07:06.155766 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-os-build
144 18:07:06.155893 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-probe-channel
145 18:07:06.156021 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-probe-ip
146 18:07:06.156146 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-target-ip
147 18:07:06.156270 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-target-mac
148 18:07:06.156398 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-target-storage
149 18:07:06.156526 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-case
150 18:07:06.156653 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-event
151 18:07:06.156778 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-feedback
152 18:07:06.156904 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-raise
153 18:07:06.157029 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-reference
154 18:07:06.157155 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-runner
155 18:07:06.157282 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-set
156 18:07:06.157407 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-test-shell
157 18:07:06.157533 Updating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-install-packages (oe)
158 18:07:06.157689 Updating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/bin/lava-installed-packages (oe)
159 18:07:06.157811 Creating /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/environment
160 18:07:06.157915 LAVA metadata
161 18:07:06.157985 - LAVA_JOB_ID=11712618
162 18:07:06.158048 - LAVA_DISPATCHER_IP=192.168.201.1
163 18:07:06.158148 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 18:07:06.158215 skipped lava-vland-overlay
165 18:07:06.158289 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 18:07:06.158369 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 18:07:06.158431 skipped lava-multinode-overlay
168 18:07:06.158503 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 18:07:06.158896 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 18:07:06.158974 Loading test definitions
171 18:07:06.159065 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 18:07:06.159138 Using /lava-11712618 at stage 0
173 18:07:06.159236 Fetching tests from https://github.com/kernelci/test-definitions
174 18:07:06.159315 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/0/tests/0_ltp-timers'
175 18:07:09.272963 Running '/usr/bin/git checkout kernelci.org
176 18:07:09.421440 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
177 18:07:09.422195 uuid=11712618_1.5.2.3.1 testdef=None
178 18:07:09.422371 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
180 18:07:09.422722 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
181 18:07:09.423433 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 18:07:09.423713 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
184 18:07:09.424675 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 18:07:09.424949 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
187 18:07:09.426338 runner path: /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/0/tests/0_ltp-timers test_uuid 11712618_1.5.2.3.1
188 18:07:09.426463 GRP_TEST='TMR'
189 18:07:09.426598 SKIPFILE='skipfile-lkft.yaml'
190 18:07:09.426682 SKIP_INSTALL='true'
191 18:07:09.426760 TST_CMDFILES=''
192 18:07:09.426935 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 18:07:09.427167 Creating lava-test-runner.conf files
195 18:07:09.427271 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712618/lava-overlay-w0ssdlea/lava-11712618/0 for stage 0
196 18:07:09.427412 - 0_ltp-timers
197 18:07:09.427564 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
198 18:07:09.427693 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
199 18:07:17.208162 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
200 18:07:17.208319 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
201 18:07:17.208411 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 18:07:17.208513 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
203 18:07:17.208605 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
204 18:07:17.352402 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 18:07:17.352803 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
206 18:07:17.352926 extracting modules file /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712618/extract-nfsrootfs-hqy7ndl3
207 18:07:17.367249 extracting modules file /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712618/extract-overlay-ramdisk-2iqaruf6/ramdisk
208 18:07:17.381343 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 18:07:17.381477 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
210 18:07:17.381582 [common] Applying overlay to NFS
211 18:07:17.381683 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712618/compress-overlay-sc1r60y1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712618/extract-nfsrootfs-hqy7ndl3
212 18:07:18.307601 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
213 18:07:18.307770 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
214 18:07:18.307867 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 18:07:18.307956 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
216 18:07:18.308039 Building ramdisk /var/lib/lava/dispatcher/tmp/11712618/extract-overlay-ramdisk-2iqaruf6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712618/extract-overlay-ramdisk-2iqaruf6/ramdisk
217 18:07:18.389678 >> 27178 blocks
218 18:07:18.947659 rename /var/lib/lava/dispatcher/tmp/11712618/extract-overlay-ramdisk-2iqaruf6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/ramdisk/ramdisk.cpio.gz
219 18:07:18.948125 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 18:07:18.948245 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
221 18:07:18.948350 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
222 18:07:18.948449 No mkimage arch provided, not using FIT.
223 18:07:18.948544 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 18:07:18.948627 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 18:07:18.948730 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
226 18:07:18.948823 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
227 18:07:18.948936 No LXC device requested
228 18:07:18.949053 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 18:07:18.949159 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
230 18:07:18.949241 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 18:07:18.949316 Checking files for TFTP limit of 4294967296 bytes.
232 18:07:18.949722 end: 1 tftp-deploy (duration 00:00:23) [common]
233 18:07:18.949830 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 18:07:18.949923 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 18:07:18.950046 substitutions:
236 18:07:18.950116 - {DTB}: None
237 18:07:18.950175 - {INITRD}: 11712618/tftp-deploy-ss305k3k/ramdisk/ramdisk.cpio.gz
238 18:07:18.950233 - {KERNEL}: 11712618/tftp-deploy-ss305k3k/kernel/bzImage
239 18:07:18.950289 - {LAVA_MAC}: None
240 18:07:18.950343 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11712618/extract-nfsrootfs-hqy7ndl3
241 18:07:18.950400 - {NFS_SERVER_IP}: 192.168.201.1
242 18:07:18.950453 - {PRESEED_CONFIG}: None
243 18:07:18.950506 - {PRESEED_LOCAL}: None
244 18:07:18.950602 - {RAMDISK}: 11712618/tftp-deploy-ss305k3k/ramdisk/ramdisk.cpio.gz
245 18:07:18.950669 - {ROOT_PART}: None
246 18:07:18.950722 - {ROOT}: None
247 18:07:18.950774 - {SERVER_IP}: 192.168.201.1
248 18:07:18.950826 - {TEE}: None
249 18:07:18.950879 Parsed boot commands:
250 18:07:18.950933 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 18:07:18.951107 Parsed boot commands: tftpboot 192.168.201.1 11712618/tftp-deploy-ss305k3k/kernel/bzImage 11712618/tftp-deploy-ss305k3k/kernel/cmdline 11712618/tftp-deploy-ss305k3k/ramdisk/ramdisk.cpio.gz
252 18:07:18.951197 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 18:07:18.951281 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 18:07:18.951375 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 18:07:18.951457 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 18:07:18.951525 Not connected, no need to disconnect.
257 18:07:18.951597 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 18:07:18.951680 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 18:07:18.951747 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
260 18:07:18.955725 Setting prompt string to ['lava-test: # ']
261 18:07:18.956080 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 18:07:18.956188 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 18:07:18.956287 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 18:07:18.956420 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 18:07:18.956657 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
266 18:07:24.102078 >> Command sent successfully.
267 18:07:24.112518 Returned 0 in 5 seconds
268 18:07:24.213801 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 18:07:24.215236 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 18:07:24.215739 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 18:07:24.216196 Setting prompt string to 'Starting depthcharge on Helios...'
273 18:07:24.216555 Changing prompt to 'Starting depthcharge on Helios...'
274 18:07:24.216902 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
275 18:07:24.218111 [Enter `^Ec?' for help]
276 18:07:24.829175
277 18:07:24.829739
278 18:07:24.839441 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
279 18:07:24.842462 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
280 18:07:24.849416 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
281 18:07:24.852551 CPU: AES supported, TXT NOT supported, VT supported
282 18:07:24.859430 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
283 18:07:24.862771 PCH: device id 0284 (rev 00) is Cometlake-U Premium
284 18:07:24.869308 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
285 18:07:24.872930 VBOOT: Loading verstage.
286 18:07:24.876049 FMAP: Found "FLASH" version 1.1 at 0xc04000.
287 18:07:24.882927 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
288 18:07:24.885894 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
289 18:07:24.889354 CBFS @ c08000 size 3f8000
290 18:07:24.895803 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
291 18:07:24.899168 CBFS: Locating 'fallback/verstage'
292 18:07:24.902043 CBFS: Found @ offset 10fb80 size 1072c
293 18:07:24.902492
294 18:07:24.905960
295 18:07:24.915927 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
296 18:07:24.929382 Probing TPM: . done!
297 18:07:24.933087 TPM ready after 0 ms
298 18:07:24.936541 Connected to device vid:did:rid of 1ae0:0028:00
299 18:07:24.946488 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
300 18:07:24.950446 Initialized TPM device CR50 revision 0
301 18:07:24.998142 tlcl_send_startup: Startup return code is 0
302 18:07:24.998697 TPM: setup succeeded
303 18:07:25.011079 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
304 18:07:25.014853 Chrome EC: UHEPI supported
305 18:07:25.018114 Phase 1
306 18:07:25.021612 FMAP: area GBB found @ c05000 (12288 bytes)
307 18:07:25.028173 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
308 18:07:25.031785 Phase 2
309 18:07:25.032218 Phase 3
310 18:07:25.034675 FMAP: area GBB found @ c05000 (12288 bytes)
311 18:07:25.041602 VB2:vb2_report_dev_firmware() This is developer signed firmware
312 18:07:25.047938 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 18:07:25.051880 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
314 18:07:25.058420 VB2:vb2_verify_keyblock() Checking keyblock signature...
315 18:07:25.073772 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 18:07:25.076719 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
317 18:07:25.083359 VB2:vb2_verify_fw_preamble() Verifying preamble.
318 18:07:25.088203 Phase 4
319 18:07:25.091229 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
320 18:07:25.097520 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
321 18:07:25.277594 VB2:vb2_rsa_verify_digest() Digest check failed!
322 18:07:25.284303 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
323 18:07:25.284729 Saving nvdata
324 18:07:25.287114 Reboot requested (10020007)
325 18:07:25.290557 board_reset() called!
326 18:07:25.290996 full_reset() called!
327 18:07:29.796313
328 18:07:29.796878
329 18:07:29.805841 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
330 18:07:29.809000 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
331 18:07:29.816083 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
332 18:07:29.819125 CPU: AES supported, TXT NOT supported, VT supported
333 18:07:29.825723 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
334 18:07:29.829287 PCH: device id 0284 (rev 00) is Cometlake-U Premium
335 18:07:29.835835 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
336 18:07:29.838963 VBOOT: Loading verstage.
337 18:07:29.842393 FMAP: Found "FLASH" version 1.1 at 0xc04000.
338 18:07:29.849089 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
339 18:07:29.855538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 18:07:29.855853 CBFS @ c08000 size 3f8000
341 18:07:29.862507 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 18:07:29.865811 CBFS: Locating 'fallback/verstage'
343 18:07:29.869146 CBFS: Found @ offset 10fb80 size 1072c
344 18:07:29.873015
345 18:07:29.873441
346 18:07:29.883290 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
347 18:07:29.897567 Probing TPM: . done!
348 18:07:29.900474 TPM ready after 0 ms
349 18:07:29.904263 Connected to device vid:did:rid of 1ae0:0028:00
350 18:07:29.914405 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
351 18:07:29.918256 Initialized TPM device CR50 revision 0
352 18:07:29.964665 tlcl_send_startup: Startup return code is 0
353 18:07:29.965176 TPM: setup succeeded
354 18:07:29.977925 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
355 18:07:29.981424 Chrome EC: UHEPI supported
356 18:07:29.984414 Phase 1
357 18:07:29.988193 FMAP: area GBB found @ c05000 (12288 bytes)
358 18:07:29.995016 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
359 18:07:30.001228 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
360 18:07:30.004794 Recovery requested (1009000e)
361 18:07:30.010466 Saving nvdata
362 18:07:30.016868 tlcl_extend: response is 0
363 18:07:30.025388 tlcl_extend: response is 0
364 18:07:30.032684 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
365 18:07:30.035890 CBFS @ c08000 size 3f8000
366 18:07:30.042308 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
367 18:07:30.045767 CBFS: Locating 'fallback/romstage'
368 18:07:30.048665 CBFS: Found @ offset 80 size 145fc
369 18:07:30.052564 Accumulated console time in verstage 98 ms
370 18:07:30.053153
371 18:07:30.053531
372 18:07:30.065268 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
373 18:07:30.071843 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
374 18:07:30.075258 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
375 18:07:30.078370 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 18:07:30.084848 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
377 18:07:30.088487 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 18:07:30.091750 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
379 18:07:30.095504 TCO_STS: 0000 0000
380 18:07:30.098196 GEN_PMCON: e0015238 00000200
381 18:07:30.101469 GBLRST_CAUSE: 00000000 00000000
382 18:07:30.101894 prev_sleep_state 5
383 18:07:30.105013 Boot Count incremented to 71421
384 18:07:30.112054 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 18:07:30.114938 CBFS @ c08000 size 3f8000
386 18:07:30.121766 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 18:07:30.122194 CBFS: Locating 'fspm.bin'
388 18:07:30.128355 CBFS: Found @ offset 5ffc0 size 71000
389 18:07:30.131480 Chrome EC: UHEPI supported
390 18:07:30.137772 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
391 18:07:30.141902 Probing TPM: done!
392 18:07:30.148949 Connected to device vid:did:rid of 1ae0:0028:00
393 18:07:30.158663 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
394 18:07:30.164551 Initialized TPM device CR50 revision 0
395 18:07:30.173541 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 18:07:30.180035 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
397 18:07:30.183255 MRC cache found, size 1948
398 18:07:30.186636 bootmode is set to: 2
399 18:07:30.189902 PRMRR disabled by config.
400 18:07:30.193330 SPD INDEX = 1
401 18:07:30.196861 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 18:07:30.200329 CBFS @ c08000 size 3f8000
403 18:07:30.206464 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 18:07:30.206968 CBFS: Locating 'spd.bin'
405 18:07:30.209907 CBFS: Found @ offset 5fb80 size 400
406 18:07:30.213423 SPD: module type is LPDDR3
407 18:07:30.216798 SPD: module part is
408 18:07:30.223135 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
409 18:07:30.226434 SPD: device width 4 bits, bus width 8 bits
410 18:07:30.229505 SPD: module size is 4096 MB (per channel)
411 18:07:30.233227 memory slot: 0 configuration done.
412 18:07:30.236409 memory slot: 2 configuration done.
413 18:07:30.287898 CBMEM:
414 18:07:30.291419 IMD: root @ 99fff000 254 entries.
415 18:07:30.294442 IMD: root @ 99ffec00 62 entries.
416 18:07:30.297963 External stage cache:
417 18:07:30.301360 IMD: root @ 9abff000 254 entries.
418 18:07:30.304485 IMD: root @ 9abfec00 62 entries.
419 18:07:30.311279 Chrome EC: clear events_b mask to 0x0000000020004000
420 18:07:30.324463 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 18:07:30.337468 tlcl_write: response is 0
422 18:07:30.346582 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 18:07:30.353303 MRC: TPM MRC hash updated successfully.
424 18:07:30.353866 2 DIMMs found
425 18:07:30.356467 SMM Memory Map
426 18:07:30.359865 SMRAM : 0x9a000000 0x1000000
427 18:07:30.363044 Subregion 0: 0x9a000000 0xa00000
428 18:07:30.366592 Subregion 1: 0x9aa00000 0x200000
429 18:07:30.369771 Subregion 2: 0x9ac00000 0x400000
430 18:07:30.373567 top_of_ram = 0x9a000000
431 18:07:30.376516 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
432 18:07:30.382852 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
433 18:07:30.386404 MTRR Range: Start=ff000000 End=0 (Size 1000000)
434 18:07:30.393200 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 18:07:30.396378 CBFS @ c08000 size 3f8000
436 18:07:30.399523 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 18:07:30.402836 CBFS: Locating 'fallback/postcar'
438 18:07:30.409631 CBFS: Found @ offset 107000 size 4b44
439 18:07:30.412660 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
440 18:07:30.425592 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
441 18:07:30.428411 Processing 180 relocs. Offset value of 0x97c0c000
442 18:07:30.436974 Accumulated console time in romstage 286 ms
443 18:07:30.437058
444 18:07:30.437124
445 18:07:30.447226 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
446 18:07:30.453838 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 18:07:30.457539 CBFS @ c08000 size 3f8000
448 18:07:30.463667 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 18:07:30.466981 CBFS: Locating 'fallback/ramstage'
450 18:07:30.470981 CBFS: Found @ offset 43380 size 1b9e8
451 18:07:30.477022 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 18:07:30.509663 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 18:07:30.512697 Processing 3976 relocs. Offset value of 0x98db0000
454 18:07:30.519038 Accumulated console time in postcar 52 ms
455 18:07:30.519637
456 18:07:30.520009
457 18:07:30.529103 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 18:07:30.535344 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 18:07:30.538972 WARNING: RO_VPD is uninitialized or empty.
460 18:07:30.541919 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 18:07:30.548719 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 18:07:30.549251 Normal boot.
463 18:07:30.555139 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 18:07:30.558853 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 18:07:30.562120 CBFS @ c08000 size 3f8000
466 18:07:30.568815 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 18:07:30.571742 CBFS: Locating 'cpu_microcode_blob.bin'
468 18:07:30.575240 CBFS: Found @ offset 14700 size 2ec00
469 18:07:30.578489 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 18:07:30.582497 Skip microcode update
471 18:07:30.588234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 18:07:30.588690 CBFS @ c08000 size 3f8000
473 18:07:30.595330 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 18:07:30.598363 CBFS: Locating 'fsps.bin'
475 18:07:30.601410 CBFS: Found @ offset d1fc0 size 35000
476 18:07:30.627276 Detected 4 core, 8 thread CPU.
477 18:07:30.630934 Setting up SMI for CPU
478 18:07:30.634169 IED base = 0x9ac00000
479 18:07:30.634745 IED size = 0x00400000
480 18:07:30.637595 Will perform SMM setup.
481 18:07:30.643905 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 18:07:30.650492 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 18:07:30.653493 Processing 16 relocs. Offset value of 0x00030000
484 18:07:30.657791 Attempting to start 7 APs
485 18:07:30.661150 Waiting for 10ms after sending INIT.
486 18:07:30.677366 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
487 18:07:30.677876 done.
488 18:07:30.680552 AP: slot 2 apic_id 4.
489 18:07:30.683938 AP: slot 5 apic_id 5.
490 18:07:30.684466 AP: slot 1 apic_id 2.
491 18:07:30.687023 AP: slot 4 apic_id 3.
492 18:07:30.690612 Waiting for 2nd SIPI to complete...done.
493 18:07:30.693873 AP: slot 7 apic_id 6.
494 18:07:30.697191 AP: slot 6 apic_id 7.
495 18:07:30.703813 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 18:07:30.707078 Processing 13 relocs. Offset value of 0x00038000
497 18:07:30.713812 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 18:07:30.720266 Installing SMM handler to 0x9a000000
499 18:07:30.726948 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 18:07:30.730616 Processing 658 relocs. Offset value of 0x9a010000
501 18:07:30.740521 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 18:07:30.743280 Processing 13 relocs. Offset value of 0x9a008000
503 18:07:30.750120 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 18:07:30.756628 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 18:07:30.760031 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 18:07:30.766585 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 18:07:30.773355 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 18:07:30.779770 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 18:07:30.782883 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 18:07:30.789447 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 18:07:30.793175 Clearing SMI status registers
512 18:07:30.796518 SMI_STS: PM1
513 18:07:30.796961 PM1_STS: PWRBTN
514 18:07:30.799750 TCO_STS: SECOND_TO
515 18:07:30.802939 New SMBASE 0x9a000000
516 18:07:30.806597 In relocation handler: CPU 0
517 18:07:30.810001 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 18:07:30.813221 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 18:07:30.816664 Relocation complete.
520 18:07:30.819671 New SMBASE 0x99fff400
521 18:07:30.820147 In relocation handler: CPU 3
522 18:07:30.827088 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
523 18:07:30.830075 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 18:07:30.832793 Relocation complete.
525 18:07:30.836375 New SMBASE 0x99ffe400
526 18:07:30.836823 In relocation handler: CPU 7
527 18:07:30.843090 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
528 18:07:30.846648 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 18:07:30.849410 Relocation complete.
530 18:07:30.849853 New SMBASE 0x99ffe800
531 18:07:30.852654 In relocation handler: CPU 6
532 18:07:30.859676 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
533 18:07:30.863514 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 18:07:30.866884 Relocation complete.
535 18:07:30.867458 New SMBASE 0x99fff800
536 18:07:30.869558 In relocation handler: CPU 2
537 18:07:30.876175 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
538 18:07:30.879432 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 18:07:30.882751 Relocation complete.
540 18:07:30.883174 New SMBASE 0x99ffec00
541 18:07:30.886108 In relocation handler: CPU 5
542 18:07:30.892605 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
543 18:07:30.895823 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 18:07:30.899218 Relocation complete.
545 18:07:30.899658 New SMBASE 0x99fffc00
546 18:07:30.902398 In relocation handler: CPU 1
547 18:07:30.905789 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
548 18:07:30.912689 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 18:07:30.915523 Relocation complete.
550 18:07:30.915967 New SMBASE 0x99fff000
551 18:07:30.918838 In relocation handler: CPU 4
552 18:07:30.922402 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
553 18:07:30.929347 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 18:07:30.932235 Relocation complete.
555 18:07:30.932698 Initializing CPU #0
556 18:07:30.935501 CPU: vendor Intel device 806ec
557 18:07:30.938561 CPU: family 06, model 8e, stepping 0c
558 18:07:30.942047 Clearing out pending MCEs
559 18:07:30.945324 Setting up local APIC...
560 18:07:30.949330 apic_id: 0x00 done.
561 18:07:30.949864 Turbo is available but hidden
562 18:07:30.951870 Turbo is available and visible
563 18:07:30.955541 VMX status: enabled
564 18:07:30.959139 IA32_FEATURE_CONTROL status: locked
565 18:07:30.961877 Skip microcode update
566 18:07:30.962295 CPU #0 initialized
567 18:07:30.965721 Initializing CPU #3
568 18:07:30.968450 Initializing CPU #5
569 18:07:30.968872 Initializing CPU #2
570 18:07:30.972214 CPU: vendor Intel device 806ec
571 18:07:30.975122 CPU: family 06, model 8e, stepping 0c
572 18:07:30.978461 CPU: vendor Intel device 806ec
573 18:07:30.982103 CPU: family 06, model 8e, stepping 0c
574 18:07:30.985497 Clearing out pending MCEs
575 18:07:30.988430 Clearing out pending MCEs
576 18:07:30.991531 Setting up local APIC...
577 18:07:30.991976 Initializing CPU #6
578 18:07:30.995028 Initializing CPU #7
579 18:07:30.998018 CPU: vendor Intel device 806ec
580 18:07:31.001582 CPU: family 06, model 8e, stepping 0c
581 18:07:31.005091 CPU: vendor Intel device 806ec
582 18:07:31.008561 CPU: family 06, model 8e, stepping 0c
583 18:07:31.011737 Clearing out pending MCEs
584 18:07:31.014706 Clearing out pending MCEs
585 18:07:31.017977 Setting up local APIC...
586 18:07:31.018419 apic_id: 0x05 done.
587 18:07:31.021572 Setting up local APIC...
588 18:07:31.024991 CPU: vendor Intel device 806ec
589 18:07:31.028295 CPU: family 06, model 8e, stepping 0c
590 18:07:31.031492 Clearing out pending MCEs
591 18:07:31.034687 Initializing CPU #4
592 18:07:31.035259 Initializing CPU #1
593 18:07:31.037945 CPU: vendor Intel device 806ec
594 18:07:31.041086 CPU: family 06, model 8e, stepping 0c
595 18:07:31.044801 CPU: vendor Intel device 806ec
596 18:07:31.048046 CPU: family 06, model 8e, stepping 0c
597 18:07:31.051093 Clearing out pending MCEs
598 18:07:31.055048 Clearing out pending MCEs
599 18:07:31.057753 Setting up local APIC...
600 18:07:31.058235 Setting up local APIC...
601 18:07:31.061330 apic_id: 0x03 done.
602 18:07:31.064266 Setting up local APIC...
603 18:07:31.067904 apic_id: 0x01 done.
604 18:07:31.068353 VMX status: enabled
605 18:07:31.070991 apic_id: 0x04 done.
606 18:07:31.074205 IA32_FEATURE_CONTROL status: locked
607 18:07:31.074700 VMX status: enabled
608 18:07:31.077455 Skip microcode update
609 18:07:31.080807 IA32_FEATURE_CONTROL status: locked
610 18:07:31.084252 CPU #5 initialized
611 18:07:31.087588 Skip microcode update
612 18:07:31.088027 Setting up local APIC...
613 18:07:31.090670 VMX status: enabled
614 18:07:31.094012 apic_id: 0x02 done.
615 18:07:31.094457 VMX status: enabled
616 18:07:31.097463 VMX status: enabled
617 18:07:31.101352 IA32_FEATURE_CONTROL status: locked
618 18:07:31.103966 IA32_FEATURE_CONTROL status: locked
619 18:07:31.107468 Skip microcode update
620 18:07:31.108007 Skip microcode update
621 18:07:31.110997 CPU #4 initialized
622 18:07:31.111440 CPU #1 initialized
623 18:07:31.114040 CPU #2 initialized
624 18:07:31.117200 apic_id: 0x06 done.
625 18:07:31.117776 apic_id: 0x07 done.
626 18:07:31.120297 VMX status: enabled
627 18:07:31.123689 VMX status: enabled
628 18:07:31.127163 IA32_FEATURE_CONTROL status: locked
629 18:07:31.130664 IA32_FEATURE_CONTROL status: locked
630 18:07:31.131111 Skip microcode update
631 18:07:31.133631 Skip microcode update
632 18:07:31.136907 CPU #7 initialized
633 18:07:31.137328 CPU #6 initialized
634 18:07:31.140644 IA32_FEATURE_CONTROL status: locked
635 18:07:31.143690 Skip microcode update
636 18:07:31.146976 CPU #3 initialized
637 18:07:31.150834 bsp_do_flight_plan done after 457 msecs.
638 18:07:31.153870 CPU: frequency set to 4200 MHz
639 18:07:31.154405 Enabling SMIs.
640 18:07:31.157078 Locking SMM.
641 18:07:31.171573 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
642 18:07:31.174771 CBFS @ c08000 size 3f8000
643 18:07:31.181352 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
644 18:07:31.181904 CBFS: Locating 'vbt.bin'
645 18:07:31.184377 CBFS: Found @ offset 5f5c0 size 499
646 18:07:31.191228 Found a VBT of 4608 bytes after decompression
647 18:07:31.376144 Display FSP Version Info HOB
648 18:07:31.379049 Reference Code - CPU = 9.0.1e.30
649 18:07:31.382290 uCode Version = 0.0.0.ca
650 18:07:31.385858 TXT ACM version = ff.ff.ff.ffff
651 18:07:31.389226 Display FSP Version Info HOB
652 18:07:31.392347 Reference Code - ME = 9.0.1e.30
653 18:07:31.395926 MEBx version = 0.0.0.0
654 18:07:31.398990 ME Firmware Version = Consumer SKU
655 18:07:31.402346 Display FSP Version Info HOB
656 18:07:31.405337 Reference Code - CML PCH = 9.0.1e.30
657 18:07:31.409093 PCH-CRID Status = Disabled
658 18:07:31.412175 PCH-CRID Original Value = ff.ff.ff.ffff
659 18:07:31.415657 PCH-CRID New Value = ff.ff.ff.ffff
660 18:07:31.418834 OPROM - RST - RAID = ff.ff.ff.ffff
661 18:07:31.422415 ChipsetInit Base Version = ff.ff.ff.ffff
662 18:07:31.425237 ChipsetInit Oem Version = ff.ff.ff.ffff
663 18:07:31.428802 Display FSP Version Info HOB
664 18:07:31.435617 Reference Code - SA - System Agent = 9.0.1e.30
665 18:07:31.438643 Reference Code - MRC = 0.7.1.6c
666 18:07:31.439234 SA - PCIe Version = 9.0.1e.30
667 18:07:31.442114 SA-CRID Status = Disabled
668 18:07:31.445227 SA-CRID Original Value = 0.0.0.c
669 18:07:31.448860 SA-CRID New Value = 0.0.0.c
670 18:07:31.452222 OPROM - VBIOS = ff.ff.ff.ffff
671 18:07:31.455240 RTC Init
672 18:07:31.458753 Set power on after power failure.
673 18:07:31.459343 Disabling Deep S3
674 18:07:31.461625 Disabling Deep S3
675 18:07:31.462056 Disabling Deep S4
676 18:07:31.465322 Disabling Deep S4
677 18:07:31.465742 Disabling Deep S5
678 18:07:31.468756 Disabling Deep S5
679 18:07:31.475273 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
680 18:07:31.475733 Enumerating buses...
681 18:07:31.481660 Show all devs... Before device enumeration.
682 18:07:31.481742 Root Device: enabled 1
683 18:07:31.485004 CPU_CLUSTER: 0: enabled 1
684 18:07:31.487973 DOMAIN: 0000: enabled 1
685 18:07:31.491613 APIC: 00: enabled 1
686 18:07:31.491696 PCI: 00:00.0: enabled 1
687 18:07:31.494621 PCI: 00:02.0: enabled 1
688 18:07:31.498190 PCI: 00:04.0: enabled 0
689 18:07:31.501251 PCI: 00:05.0: enabled 0
690 18:07:31.501333 PCI: 00:12.0: enabled 1
691 18:07:31.504931 PCI: 00:12.5: enabled 0
692 18:07:31.507955 PCI: 00:12.6: enabled 0
693 18:07:31.508037 PCI: 00:14.0: enabled 1
694 18:07:31.511404 PCI: 00:14.1: enabled 0
695 18:07:31.515121 PCI: 00:14.3: enabled 1
696 18:07:31.518044 PCI: 00:14.5: enabled 0
697 18:07:31.518126 PCI: 00:15.0: enabled 1
698 18:07:31.521336 PCI: 00:15.1: enabled 1
699 18:07:31.524840 PCI: 00:15.2: enabled 0
700 18:07:31.527806 PCI: 00:15.3: enabled 0
701 18:07:31.527888 PCI: 00:16.0: enabled 1
702 18:07:31.531638 PCI: 00:16.1: enabled 0
703 18:07:31.534839 PCI: 00:16.2: enabled 0
704 18:07:31.534921 PCI: 00:16.3: enabled 0
705 18:07:31.537849 PCI: 00:16.4: enabled 0
706 18:07:31.541113 PCI: 00:16.5: enabled 0
707 18:07:31.544653 PCI: 00:17.0: enabled 1
708 18:07:31.544734 PCI: 00:19.0: enabled 1
709 18:07:31.548269 PCI: 00:19.1: enabled 0
710 18:07:31.551369 PCI: 00:19.2: enabled 0
711 18:07:31.554501 PCI: 00:1a.0: enabled 0
712 18:07:31.554597 PCI: 00:1c.0: enabled 0
713 18:07:31.557947 PCI: 00:1c.1: enabled 0
714 18:07:31.561731 PCI: 00:1c.2: enabled 0
715 18:07:31.564780 PCI: 00:1c.3: enabled 0
716 18:07:31.564962 PCI: 00:1c.4: enabled 0
717 18:07:31.568098 PCI: 00:1c.5: enabled 0
718 18:07:31.571292 PCI: 00:1c.6: enabled 0
719 18:07:31.574602 PCI: 00:1c.7: enabled 0
720 18:07:31.574786 PCI: 00:1d.0: enabled 1
721 18:07:31.577988 PCI: 00:1d.1: enabled 0
722 18:07:31.581628 PCI: 00:1d.2: enabled 0
723 18:07:31.582158 PCI: 00:1d.3: enabled 0
724 18:07:31.585120 PCI: 00:1d.4: enabled 0
725 18:07:31.588072 PCI: 00:1d.5: enabled 1
726 18:07:31.591383 PCI: 00:1e.0: enabled 1
727 18:07:31.591822 PCI: 00:1e.1: enabled 0
728 18:07:31.594898 PCI: 00:1e.2: enabled 1
729 18:07:31.598007 PCI: 00:1e.3: enabled 1
730 18:07:31.601035 PCI: 00:1f.0: enabled 1
731 18:07:31.601477 PCI: 00:1f.1: enabled 1
732 18:07:31.604575 PCI: 00:1f.2: enabled 1
733 18:07:31.608461 PCI: 00:1f.3: enabled 1
734 18:07:31.611347 PCI: 00:1f.4: enabled 1
735 18:07:31.611769 PCI: 00:1f.5: enabled 1
736 18:07:31.614762 PCI: 00:1f.6: enabled 0
737 18:07:31.617874 USB0 port 0: enabled 1
738 18:07:31.618293 I2C: 00:15: enabled 1
739 18:07:31.621656 I2C: 00:5d: enabled 1
740 18:07:31.624648 GENERIC: 0.0: enabled 1
741 18:07:31.625101 I2C: 00:1a: enabled 1
742 18:07:31.628436 I2C: 00:38: enabled 1
743 18:07:31.631199 I2C: 00:39: enabled 1
744 18:07:31.631621 I2C: 00:3a: enabled 1
745 18:07:31.634516 I2C: 00:3b: enabled 1
746 18:07:31.638224 PCI: 00:00.0: enabled 1
747 18:07:31.638685 SPI: 00: enabled 1
748 18:07:31.641260 SPI: 01: enabled 1
749 18:07:31.644668 PNP: 0c09.0: enabled 1
750 18:07:31.645088 USB2 port 0: enabled 1
751 18:07:31.648106 USB2 port 1: enabled 1
752 18:07:31.651115 USB2 port 2: enabled 0
753 18:07:31.654913 USB2 port 3: enabled 0
754 18:07:31.655333 USB2 port 5: enabled 0
755 18:07:31.657623 USB2 port 6: enabled 1
756 18:07:31.661060 USB2 port 9: enabled 1
757 18:07:31.661483 USB3 port 0: enabled 1
758 18:07:31.664870 USB3 port 1: enabled 1
759 18:07:31.667667 USB3 port 2: enabled 1
760 18:07:31.671221 USB3 port 3: enabled 1
761 18:07:31.671669 USB3 port 4: enabled 0
762 18:07:31.674099 APIC: 02: enabled 1
763 18:07:31.674550 APIC: 04: enabled 1
764 18:07:31.677731 APIC: 01: enabled 1
765 18:07:31.680995 APIC: 03: enabled 1
766 18:07:31.681571 APIC: 05: enabled 1
767 18:07:31.684330 APIC: 07: enabled 1
768 18:07:31.687579 APIC: 06: enabled 1
769 18:07:31.688008 Compare with tree...
770 18:07:31.691217 Root Device: enabled 1
771 18:07:31.694307 CPU_CLUSTER: 0: enabled 1
772 18:07:31.694823 APIC: 00: enabled 1
773 18:07:31.697446 APIC: 02: enabled 1
774 18:07:31.700897 APIC: 04: enabled 1
775 18:07:31.701402 APIC: 01: enabled 1
776 18:07:31.704368 APIC: 03: enabled 1
777 18:07:31.707605 APIC: 05: enabled 1
778 18:07:31.708025 APIC: 07: enabled 1
779 18:07:31.710715 APIC: 06: enabled 1
780 18:07:31.714330 DOMAIN: 0000: enabled 1
781 18:07:31.717312 PCI: 00:00.0: enabled 1
782 18:07:31.717729 PCI: 00:02.0: enabled 1
783 18:07:31.720896 PCI: 00:04.0: enabled 0
784 18:07:31.724464 PCI: 00:05.0: enabled 0
785 18:07:31.727545 PCI: 00:12.0: enabled 1
786 18:07:31.731039 PCI: 00:12.5: enabled 0
787 18:07:31.731462 PCI: 00:12.6: enabled 0
788 18:07:31.733882 PCI: 00:14.0: enabled 1
789 18:07:31.737412 USB0 port 0: enabled 1
790 18:07:31.740800 USB2 port 0: enabled 1
791 18:07:31.744142 USB2 port 1: enabled 1
792 18:07:31.744564 USB2 port 2: enabled 0
793 18:07:31.747177 USB2 port 3: enabled 0
794 18:07:31.750352 USB2 port 5: enabled 0
795 18:07:31.754274 USB2 port 6: enabled 1
796 18:07:31.757185 USB2 port 9: enabled 1
797 18:07:31.760437 USB3 port 0: enabled 1
798 18:07:31.760962 USB3 port 1: enabled 1
799 18:07:31.763921 USB3 port 2: enabled 1
800 18:07:31.767147 USB3 port 3: enabled 1
801 18:07:31.770465 USB3 port 4: enabled 0
802 18:07:31.773566 PCI: 00:14.1: enabled 0
803 18:07:31.773987 PCI: 00:14.3: enabled 1
804 18:07:31.777122 PCI: 00:14.5: enabled 0
805 18:07:31.780583 PCI: 00:15.0: enabled 1
806 18:07:31.783730 I2C: 00:15: enabled 1
807 18:07:31.786884 PCI: 00:15.1: enabled 1
808 18:07:31.787341 I2C: 00:5d: enabled 1
809 18:07:31.790345 GENERIC: 0.0: enabled 1
810 18:07:31.793858 PCI: 00:15.2: enabled 0
811 18:07:31.797129 PCI: 00:15.3: enabled 0
812 18:07:31.800452 PCI: 00:16.0: enabled 1
813 18:07:31.800897 PCI: 00:16.1: enabled 0
814 18:07:31.803906 PCI: 00:16.2: enabled 0
815 18:07:31.807094 PCI: 00:16.3: enabled 0
816 18:07:31.810305 PCI: 00:16.4: enabled 0
817 18:07:31.813613 PCI: 00:16.5: enabled 0
818 18:07:31.814058 PCI: 00:17.0: enabled 1
819 18:07:31.816787 PCI: 00:19.0: enabled 1
820 18:07:31.820284 I2C: 00:1a: enabled 1
821 18:07:31.823377 I2C: 00:38: enabled 1
822 18:07:31.823827 I2C: 00:39: enabled 1
823 18:07:31.827194 I2C: 00:3a: enabled 1
824 18:07:31.830125 I2C: 00:3b: enabled 1
825 18:07:31.833976 PCI: 00:19.1: enabled 0
826 18:07:31.837110 PCI: 00:19.2: enabled 0
827 18:07:31.837676 PCI: 00:1a.0: enabled 0
828 18:07:31.840115 PCI: 00:1c.0: enabled 0
829 18:07:31.843316 PCI: 00:1c.1: enabled 0
830 18:07:31.847000 PCI: 00:1c.2: enabled 0
831 18:07:31.847578 PCI: 00:1c.3: enabled 0
832 18:07:31.850062 PCI: 00:1c.4: enabled 0
833 18:07:31.853785 PCI: 00:1c.5: enabled 0
834 18:07:31.857165 PCI: 00:1c.6: enabled 0
835 18:07:31.860333 PCI: 00:1c.7: enabled 0
836 18:07:31.860780 PCI: 00:1d.0: enabled 1
837 18:07:31.863295 PCI: 00:1d.1: enabled 0
838 18:07:31.866803 PCI: 00:1d.2: enabled 0
839 18:07:31.869808 PCI: 00:1d.3: enabled 0
840 18:07:31.873304 PCI: 00:1d.4: enabled 0
841 18:07:31.873838 PCI: 00:1d.5: enabled 1
842 18:07:31.876950 PCI: 00:00.0: enabled 1
843 18:07:31.880030 PCI: 00:1e.0: enabled 1
844 18:07:31.883508 PCI: 00:1e.1: enabled 0
845 18:07:31.886969 PCI: 00:1e.2: enabled 1
846 18:07:31.887502 SPI: 00: enabled 1
847 18:07:31.890362 PCI: 00:1e.3: enabled 1
848 18:07:31.893375 SPI: 01: enabled 1
849 18:07:31.896533 PCI: 00:1f.0: enabled 1
850 18:07:31.896976 PNP: 0c09.0: enabled 1
851 18:07:31.899928 PCI: 00:1f.1: enabled 1
852 18:07:31.902987 PCI: 00:1f.2: enabled 1
853 18:07:31.906479 PCI: 00:1f.3: enabled 1
854 18:07:31.909665 PCI: 00:1f.4: enabled 1
855 18:07:31.910110 PCI: 00:1f.5: enabled 1
856 18:07:31.913207 PCI: 00:1f.6: enabled 0
857 18:07:31.917003 Root Device scanning...
858 18:07:31.919897 scan_static_bus for Root Device
859 18:07:31.922902 CPU_CLUSTER: 0 enabled
860 18:07:31.923348 DOMAIN: 0000 enabled
861 18:07:31.926320 DOMAIN: 0000 scanning...
862 18:07:31.929343 PCI: pci_scan_bus for bus 00
863 18:07:31.933001 PCI: 00:00.0 [8086/0000] ops
864 18:07:31.936357 PCI: 00:00.0 [8086/9b61] enabled
865 18:07:31.939364 PCI: 00:02.0 [8086/0000] bus ops
866 18:07:31.942979 PCI: 00:02.0 [8086/9b41] enabled
867 18:07:31.945963 PCI: 00:04.0 [8086/1903] disabled
868 18:07:31.949331 PCI: 00:08.0 [8086/1911] enabled
869 18:07:31.953209 PCI: 00:12.0 [8086/02f9] enabled
870 18:07:31.956461 PCI: 00:14.0 [8086/0000] bus ops
871 18:07:31.959994 PCI: 00:14.0 [8086/02ed] enabled
872 18:07:31.962993 PCI: 00:14.2 [8086/02ef] enabled
873 18:07:31.966687 PCI: 00:14.3 [8086/02f0] enabled
874 18:07:31.969832 PCI: 00:15.0 [8086/0000] bus ops
875 18:07:31.972789 PCI: 00:15.0 [8086/02e8] enabled
876 18:07:31.976530 PCI: 00:15.1 [8086/0000] bus ops
877 18:07:31.980085 PCI: 00:15.1 [8086/02e9] enabled
878 18:07:31.983196 PCI: 00:16.0 [8086/0000] ops
879 18:07:31.986612 PCI: 00:16.0 [8086/02e0] enabled
880 18:07:31.989500 PCI: 00:17.0 [8086/0000] ops
881 18:07:31.993462 PCI: 00:17.0 [8086/02d3] enabled
882 18:07:31.996323 PCI: 00:19.0 [8086/0000] bus ops
883 18:07:31.999321 PCI: 00:19.0 [8086/02c5] enabled
884 18:07:32.002900 PCI: 00:1d.0 [8086/0000] bus ops
885 18:07:32.005952 PCI: 00:1d.0 [8086/02b0] enabled
886 18:07:32.009490 PCI: Static device PCI: 00:1d.5 not found, disabling it.
887 18:07:32.013202 PCI: 00:1e.0 [8086/0000] ops
888 18:07:32.015768 PCI: 00:1e.0 [8086/02a8] enabled
889 18:07:32.019476 PCI: 00:1e.2 [8086/0000] bus ops
890 18:07:32.022831 PCI: 00:1e.2 [8086/02aa] enabled
891 18:07:32.026143 PCI: 00:1e.3 [8086/0000] bus ops
892 18:07:32.029625 PCI: 00:1e.3 [8086/02ab] enabled
893 18:07:32.032714 PCI: 00:1f.0 [8086/0000] bus ops
894 18:07:32.036055 PCI: 00:1f.0 [8086/0284] enabled
895 18:07:32.042833 PCI: Static device PCI: 00:1f.1 not found, disabling it.
896 18:07:32.049292 PCI: Static device PCI: 00:1f.2 not found, disabling it.
897 18:07:32.052312 PCI: 00:1f.3 [8086/0000] bus ops
898 18:07:32.056118 PCI: 00:1f.3 [8086/02c8] enabled
899 18:07:32.059179 PCI: 00:1f.4 [8086/0000] bus ops
900 18:07:32.062413 PCI: 00:1f.4 [8086/02a3] enabled
901 18:07:32.066113 PCI: 00:1f.5 [8086/0000] bus ops
902 18:07:32.068923 PCI: 00:1f.5 [8086/02a4] enabled
903 18:07:32.072543 PCI: Leftover static devices:
904 18:07:32.072970 PCI: 00:05.0
905 18:07:32.075604 PCI: 00:12.5
906 18:07:32.076029 PCI: 00:12.6
907 18:07:32.076403 PCI: 00:14.1
908 18:07:32.078968 PCI: 00:14.5
909 18:07:32.079393 PCI: 00:15.2
910 18:07:32.082218 PCI: 00:15.3
911 18:07:32.082784 PCI: 00:16.1
912 18:07:32.083128 PCI: 00:16.2
913 18:07:32.085532 PCI: 00:16.3
914 18:07:32.086057 PCI: 00:16.4
915 18:07:32.089046 PCI: 00:16.5
916 18:07:32.089523 PCI: 00:19.1
917 18:07:32.089923 PCI: 00:19.2
918 18:07:32.092395 PCI: 00:1a.0
919 18:07:32.092900 PCI: 00:1c.0
920 18:07:32.095481 PCI: 00:1c.1
921 18:07:32.095962 PCI: 00:1c.2
922 18:07:32.098970 PCI: 00:1c.3
923 18:07:32.099493 PCI: 00:1c.4
924 18:07:32.099917 PCI: 00:1c.5
925 18:07:32.101935 PCI: 00:1c.6
926 18:07:32.102376 PCI: 00:1c.7
927 18:07:32.105332 PCI: 00:1d.1
928 18:07:32.105802 PCI: 00:1d.2
929 18:07:32.106247 PCI: 00:1d.3
930 18:07:32.108639 PCI: 00:1d.4
931 18:07:32.109081 PCI: 00:1d.5
932 18:07:32.111733 PCI: 00:1e.1
933 18:07:32.112172 PCI: 00:1f.1
934 18:07:32.112621 PCI: 00:1f.2
935 18:07:32.115453 PCI: 00:1f.6
936 18:07:32.119089 PCI: Check your devicetree.cb.
937 18:07:32.121803 PCI: 00:02.0 scanning...
938 18:07:32.125619 scan_generic_bus for PCI: 00:02.0
939 18:07:32.129125 scan_generic_bus for PCI: 00:02.0 done
940 18:07:32.135153 scan_bus: scanning of bus PCI: 00:02.0 took 10201 usecs
941 18:07:32.135841 PCI: 00:14.0 scanning...
942 18:07:32.138879 scan_static_bus for PCI: 00:14.0
943 18:07:32.141853 USB0 port 0 enabled
944 18:07:32.145106 USB0 port 0 scanning...
945 18:07:32.148120 scan_static_bus for USB0 port 0
946 18:07:32.148723 USB2 port 0 enabled
947 18:07:32.151800 USB2 port 1 enabled
948 18:07:32.154826 USB2 port 2 disabled
949 18:07:32.155321 USB2 port 3 disabled
950 18:07:32.158267 USB2 port 5 disabled
951 18:07:32.161294 USB2 port 6 enabled
952 18:07:32.161871 USB2 port 9 enabled
953 18:07:32.164930 USB3 port 0 enabled
954 18:07:32.165484 USB3 port 1 enabled
955 18:07:32.168235 USB3 port 2 enabled
956 18:07:32.171527 USB3 port 3 enabled
957 18:07:32.171964 USB3 port 4 disabled
958 18:07:32.175137 USB2 port 0 scanning...
959 18:07:32.178352 scan_static_bus for USB2 port 0
960 18:07:32.181705 scan_static_bus for USB2 port 0 done
961 18:07:32.188361 scan_bus: scanning of bus USB2 port 0 took 9712 usecs
962 18:07:32.191495 USB2 port 1 scanning...
963 18:07:32.194751 scan_static_bus for USB2 port 1
964 18:07:32.197817 scan_static_bus for USB2 port 1 done
965 18:07:32.201383 scan_bus: scanning of bus USB2 port 1 took 9711 usecs
966 18:07:32.204795 USB2 port 6 scanning...
967 18:07:32.207760 scan_static_bus for USB2 port 6
968 18:07:32.211389 scan_static_bus for USB2 port 6 done
969 18:07:32.218285 scan_bus: scanning of bus USB2 port 6 took 9713 usecs
970 18:07:32.221202 USB2 port 9 scanning...
971 18:07:32.224821 scan_static_bus for USB2 port 9
972 18:07:32.227836 scan_static_bus for USB2 port 9 done
973 18:07:32.231352 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
974 18:07:32.234655 USB3 port 0 scanning...
975 18:07:32.237798 scan_static_bus for USB3 port 0
976 18:07:32.240950 scan_static_bus for USB3 port 0 done
977 18:07:32.247789 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
978 18:07:32.251181 USB3 port 1 scanning...
979 18:07:32.254125 scan_static_bus for USB3 port 1
980 18:07:32.257667 scan_static_bus for USB3 port 1 done
981 18:07:32.264319 scan_bus: scanning of bus USB3 port 1 took 9712 usecs
982 18:07:32.264770 USB3 port 2 scanning...
983 18:07:32.267794 scan_static_bus for USB3 port 2
984 18:07:32.270879 scan_static_bus for USB3 port 2 done
985 18:07:32.277548 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
986 18:07:32.280664 USB3 port 3 scanning...
987 18:07:32.284293 scan_static_bus for USB3 port 3
988 18:07:32.287882 scan_static_bus for USB3 port 3 done
989 18:07:32.294499 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
990 18:07:32.297254 scan_static_bus for USB0 port 0 done
991 18:07:32.300493 scan_bus: scanning of bus USB0 port 0 took 155423 usecs
992 18:07:32.307154 scan_static_bus for PCI: 00:14.0 done
993 18:07:32.310568 scan_bus: scanning of bus PCI: 00:14.0 took 173046 usecs
994 18:07:32.313637 PCI: 00:15.0 scanning...
995 18:07:32.317622 scan_generic_bus for PCI: 00:15.0
996 18:07:32.320584 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
997 18:07:32.327074 scan_generic_bus for PCI: 00:15.0 done
998 18:07:32.330375 scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs
999 18:07:32.333764 PCI: 00:15.1 scanning...
1000 18:07:32.336922 scan_generic_bus for PCI: 00:15.1
1001 18:07:32.340131 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1002 18:07:32.346795 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1003 18:07:32.350273 scan_generic_bus for PCI: 00:15.1 done
1004 18:07:32.357020 scan_bus: scanning of bus PCI: 00:15.1 took 18596 usecs
1005 18:07:32.357668 PCI: 00:19.0 scanning...
1006 18:07:32.360384 scan_generic_bus for PCI: 00:19.0
1007 18:07:32.367127 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1008 18:07:32.370139 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1009 18:07:32.373520 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1010 18:07:32.377384 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1011 18:07:32.383491 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1012 18:07:32.386549 scan_generic_bus for PCI: 00:19.0 done
1013 18:07:32.389986 scan_bus: scanning of bus PCI: 00:19.0 took 30760 usecs
1014 18:07:32.393201 PCI: 00:1d.0 scanning...
1015 18:07:32.396693 do_pci_scan_bridge for PCI: 00:1d.0
1016 18:07:32.399718 PCI: pci_scan_bus for bus 01
1017 18:07:32.402866 PCI: 01:00.0 [1c5c/1327] enabled
1018 18:07:32.406359 Enabling Common Clock Configuration
1019 18:07:32.413119 L1 Sub-State supported from root port 29
1020 18:07:32.416559 L1 Sub-State Support = 0xf
1021 18:07:32.416985 CommonModeRestoreTime = 0x28
1022 18:07:32.423100 Power On Value = 0x16, Power On Scale = 0x0
1023 18:07:32.423607 ASPM: Enabled L1
1024 18:07:32.429467 scan_bus: scanning of bus PCI: 00:1d.0 took 32805 usecs
1025 18:07:32.432824 PCI: 00:1e.2 scanning...
1026 18:07:32.436334 scan_generic_bus for PCI: 00:1e.2
1027 18:07:32.439727 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1028 18:07:32.442843 scan_generic_bus for PCI: 00:1e.2 done
1029 18:07:32.449341 scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs
1030 18:07:32.453292 PCI: 00:1e.3 scanning...
1031 18:07:32.456302 scan_generic_bus for PCI: 00:1e.3
1032 18:07:32.459442 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1033 18:07:32.463067 scan_generic_bus for PCI: 00:1e.3 done
1034 18:07:32.469278 scan_bus: scanning of bus PCI: 00:1e.3 took 14017 usecs
1035 18:07:32.472865 PCI: 00:1f.0 scanning...
1036 18:07:32.475707 scan_static_bus for PCI: 00:1f.0
1037 18:07:32.476121 PNP: 0c09.0 enabled
1038 18:07:32.479339 scan_static_bus for PCI: 00:1f.0 done
1039 18:07:32.485911 scan_bus: scanning of bus PCI: 00:1f.0 took 12040 usecs
1040 18:07:32.489027 PCI: 00:1f.3 scanning...
1041 18:07:32.495621 scan_bus: scanning of bus PCI: 00:1f.3 took 2863 usecs
1042 18:07:32.496042 PCI: 00:1f.4 scanning...
1043 18:07:32.502268 scan_generic_bus for PCI: 00:1f.4
1044 18:07:32.505250 scan_generic_bus for PCI: 00:1f.4 done
1045 18:07:32.509144 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1046 18:07:32.512427 PCI: 00:1f.5 scanning...
1047 18:07:32.515416 scan_generic_bus for PCI: 00:1f.5
1048 18:07:32.518747 scan_generic_bus for PCI: 00:1f.5 done
1049 18:07:32.526205 scan_bus: scanning of bus PCI: 00:1f.5 took 10202 usecs
1050 18:07:32.532126 scan_bus: scanning of bus DOMAIN: 0000 took 605261 usecs
1051 18:07:32.535535 scan_static_bus for Root Device done
1052 18:07:32.541979 scan_bus: scanning of bus Root Device took 625145 usecs
1053 18:07:32.542491 done
1054 18:07:32.545341 Chrome EC: UHEPI supported
1055 18:07:32.551721 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1056 18:07:32.555920 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 18:07:32.561506 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1058 18:07:32.569395 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1059 18:07:32.572454 SPI flash protection: WPSW=0 SRP0=0
1060 18:07:32.579586 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 18:07:32.582817 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1062 18:07:32.586327 found VGA at PCI: 00:02.0
1063 18:07:32.589355 Setting up VGA for PCI: 00:02.0
1064 18:07:32.596454 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1065 18:07:32.599089 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1066 18:07:32.602292 Allocating resources...
1067 18:07:32.605731 Reading resources...
1068 18:07:32.608673 Root Device read_resources bus 0 link: 0
1069 18:07:32.612466 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1070 18:07:32.619280 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1071 18:07:32.622148 DOMAIN: 0000 read_resources bus 0 link: 0
1072 18:07:32.629676 PCI: 00:14.0 read_resources bus 0 link: 0
1073 18:07:32.632837 USB0 port 0 read_resources bus 0 link: 0
1074 18:07:32.640946 USB0 port 0 read_resources bus 0 link: 0 done
1075 18:07:32.644106 PCI: 00:14.0 read_resources bus 0 link: 0 done
1076 18:07:32.651994 PCI: 00:15.0 read_resources bus 1 link: 0
1077 18:07:32.655063 PCI: 00:15.0 read_resources bus 1 link: 0 done
1078 18:07:32.661709 PCI: 00:15.1 read_resources bus 2 link: 0
1079 18:07:32.664889 PCI: 00:15.1 read_resources bus 2 link: 0 done
1080 18:07:32.672380 PCI: 00:19.0 read_resources bus 3 link: 0
1081 18:07:32.678988 PCI: 00:19.0 read_resources bus 3 link: 0 done
1082 18:07:32.682743 PCI: 00:1d.0 read_resources bus 1 link: 0
1083 18:07:32.689298 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1084 18:07:32.692785 PCI: 00:1e.2 read_resources bus 4 link: 0
1085 18:07:32.699027 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1086 18:07:32.702017 PCI: 00:1e.3 read_resources bus 5 link: 0
1087 18:07:32.708617 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1088 18:07:32.712001 PCI: 00:1f.0 read_resources bus 0 link: 0
1089 18:07:32.718827 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1090 18:07:32.725296 DOMAIN: 0000 read_resources bus 0 link: 0 done
1091 18:07:32.728663 Root Device read_resources bus 0 link: 0 done
1092 18:07:32.732288 Done reading resources.
1093 18:07:32.738630 Show resources in subtree (Root Device)...After reading.
1094 18:07:32.741602 Root Device child on link 0 CPU_CLUSTER: 0
1095 18:07:32.745341 CPU_CLUSTER: 0 child on link 0 APIC: 00
1096 18:07:32.745857 APIC: 00
1097 18:07:32.748333 APIC: 02
1098 18:07:32.748748 APIC: 04
1099 18:07:32.751586 APIC: 01
1100 18:07:32.752013 APIC: 03
1101 18:07:32.752345 APIC: 05
1102 18:07:32.755270 APIC: 07
1103 18:07:32.755690 APIC: 06
1104 18:07:32.758631 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1105 18:07:32.811688 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1106 18:07:32.812292 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1107 18:07:32.812662 PCI: 00:00.0
1108 18:07:32.813328 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1109 18:07:32.813667 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1110 18:07:32.814012 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1111 18:07:32.861163 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1112 18:07:32.862081 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1113 18:07:32.862566 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1114 18:07:32.863102 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1115 18:07:32.863470 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1116 18:07:32.871485 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1117 18:07:32.875134 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1118 18:07:32.881962 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1119 18:07:32.891480 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1120 18:07:32.901892 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1121 18:07:32.911309 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1122 18:07:32.921722 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1123 18:07:32.931328 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1124 18:07:32.931871 PCI: 00:02.0
1125 18:07:32.941426 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1126 18:07:32.954496 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1127 18:07:32.961288 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1128 18:07:32.964494 PCI: 00:04.0
1129 18:07:32.964910 PCI: 00:08.0
1130 18:07:32.974568 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 18:07:32.977807 PCI: 00:12.0
1132 18:07:32.987803 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 18:07:32.991503 PCI: 00:14.0 child on link 0 USB0 port 0
1134 18:07:33.001104 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1135 18:07:33.004645 USB0 port 0 child on link 0 USB2 port 0
1136 18:07:33.007352 USB2 port 0
1137 18:07:33.007769 USB2 port 1
1138 18:07:33.011036 USB2 port 2
1139 18:07:33.011453 USB2 port 3
1140 18:07:33.014236 USB2 port 5
1141 18:07:33.014786 USB2 port 6
1142 18:07:33.017852 USB2 port 9
1143 18:07:33.018366 USB3 port 0
1144 18:07:33.021568 USB3 port 1
1145 18:07:33.022082 USB3 port 2
1146 18:07:33.024347 USB3 port 3
1147 18:07:33.027917 USB3 port 4
1148 18:07:33.028430 PCI: 00:14.2
1149 18:07:33.037829 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1150 18:07:33.047452 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1151 18:07:33.050578 PCI: 00:14.3
1152 18:07:33.060663 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 18:07:33.064080 PCI: 00:15.0 child on link 0 I2C: 01:15
1154 18:07:33.073737 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 18:07:33.074186 I2C: 01:15
1156 18:07:33.080330 PCI: 00:15.1 child on link 0 I2C: 02:5d
1157 18:07:33.090157 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 18:07:33.090613 I2C: 02:5d
1159 18:07:33.093837 GENERIC: 0.0
1160 18:07:33.094270 PCI: 00:16.0
1161 18:07:33.103816 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 18:07:33.107207 PCI: 00:17.0
1163 18:07:33.113901 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1164 18:07:33.123808 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1165 18:07:33.133497 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1166 18:07:33.140180 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1167 18:07:33.150185 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1168 18:07:33.156804 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1169 18:07:33.163257 PCI: 00:19.0 child on link 0 I2C: 03:1a
1170 18:07:33.173339 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 18:07:33.173842 I2C: 03:1a
1172 18:07:33.176971 I2C: 03:38
1173 18:07:33.177496 I2C: 03:39
1174 18:07:33.177826 I2C: 03:3a
1175 18:07:33.179889 I2C: 03:3b
1176 18:07:33.183219 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1177 18:07:33.193350 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1178 18:07:33.203164 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1179 18:07:33.212859 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1180 18:07:33.213289 PCI: 01:00.0
1181 18:07:33.223416 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 18:07:33.226077 PCI: 00:1e.0
1183 18:07:33.236815 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1184 18:07:33.246212 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 18:07:33.249346 PCI: 00:1e.2 child on link 0 SPI: 00
1186 18:07:33.259535 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 18:07:33.262745 SPI: 00
1188 18:07:33.266373 PCI: 00:1e.3 child on link 0 SPI: 01
1189 18:07:33.276111 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 18:07:33.276629 SPI: 01
1191 18:07:33.279351 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1192 18:07:33.289462 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1193 18:07:33.299130 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1194 18:07:33.299665 PNP: 0c09.0
1195 18:07:33.308827 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1196 18:07:33.309252 PCI: 00:1f.3
1197 18:07:33.319217 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 18:07:33.332270 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1199 18:07:33.332824 PCI: 00:1f.4
1200 18:07:33.341893 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1201 18:07:33.352193 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1202 18:07:33.352613 PCI: 00:1f.5
1203 18:07:33.362305 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1204 18:07:33.368931 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1205 18:07:33.375387 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1206 18:07:33.382335 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1207 18:07:33.385758 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1208 18:07:33.388666 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1209 18:07:33.391897 PCI: 00:17.0 18 * [0x60 - 0x67] io
1210 18:07:33.395087 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1211 18:07:33.402038 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1212 18:07:33.408080 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1213 18:07:33.418312 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1214 18:07:33.424573 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1215 18:07:33.431845 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1216 18:07:33.434626 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1217 18:07:33.444718 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1218 18:07:33.448368 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1219 18:07:33.454919 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1220 18:07:33.457985 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1221 18:07:33.464658 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1222 18:07:33.467794 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1223 18:07:33.474329 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1224 18:07:33.477798 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1225 18:07:33.484724 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1226 18:07:33.487942 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1227 18:07:33.490969 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1228 18:07:33.497911 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1229 18:07:33.501094 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1230 18:07:33.508000 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1231 18:07:33.511088 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1232 18:07:33.517606 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1233 18:07:33.520584 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1234 18:07:33.527223 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1235 18:07:33.530695 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1236 18:07:33.537535 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1237 18:07:33.540741 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1238 18:07:33.547448 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1239 18:07:33.550625 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1240 18:07:33.557484 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1241 18:07:33.564384 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1242 18:07:33.567235 avoid_fixed_resources: DOMAIN: 0000
1243 18:07:33.573780 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1244 18:07:33.580340 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1245 18:07:33.587511 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1246 18:07:33.593843 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1247 18:07:33.603340 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1248 18:07:33.610332 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1249 18:07:33.616997 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1250 18:07:33.626952 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 18:07:33.633982 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1252 18:07:33.640454 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1253 18:07:33.646681 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1254 18:07:33.656873 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1255 18:07:33.657402 Setting resources...
1256 18:07:33.663263 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1257 18:07:33.666642 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1258 18:07:33.673126 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1259 18:07:33.676646 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1260 18:07:33.680069 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1261 18:07:33.686491 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1262 18:07:33.692956 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1263 18:07:33.699557 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1264 18:07:33.705944 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1265 18:07:33.713024 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1266 18:07:33.716452 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1267 18:07:33.722577 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1268 18:07:33.726156 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1269 18:07:33.732584 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1270 18:07:33.736139 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1271 18:07:33.739717 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1272 18:07:33.746045 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1273 18:07:33.749458 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1274 18:07:33.756378 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1275 18:07:33.758975 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1276 18:07:33.765936 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1277 18:07:33.769317 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1278 18:07:33.775713 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1279 18:07:33.778907 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1280 18:07:33.785901 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1281 18:07:33.789201 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1282 18:07:33.795942 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1283 18:07:33.798937 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1284 18:07:33.805285 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1285 18:07:33.808767 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1286 18:07:33.815211 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1287 18:07:33.818334 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1288 18:07:33.825007 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1289 18:07:33.835484 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1290 18:07:33.841958 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1291 18:07:33.848170 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1292 18:07:33.851402 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1293 18:07:33.861782 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1294 18:07:33.865253 Root Device assign_resources, bus 0 link: 0
1295 18:07:33.868063 DOMAIN: 0000 assign_resources, bus 0 link: 0
1296 18:07:33.878558 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1297 18:07:33.885481 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1298 18:07:33.895350 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1299 18:07:33.902197 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1300 18:07:33.911842 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1301 18:07:33.918694 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1302 18:07:33.925174 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 18:07:33.928329 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 18:07:33.937950 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1305 18:07:33.944836 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1306 18:07:33.954721 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1307 18:07:33.961611 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1308 18:07:33.964954 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 18:07:33.971157 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 18:07:33.978153 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1311 18:07:33.984916 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 18:07:33.987480 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 18:07:33.997884 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1314 18:07:34.004551 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1315 18:07:34.010971 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1316 18:07:34.021423 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1317 18:07:34.027418 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1318 18:07:34.034220 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1319 18:07:34.044127 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1320 18:07:34.050671 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1321 18:07:34.057194 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 18:07:34.060705 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 18:07:34.070285 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 18:07:34.079916 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 18:07:34.086808 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 18:07:34.090143 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 18:07:34.099974 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 18:07:34.103173 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 18:07:34.112906 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 18:07:34.119793 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 18:07:34.126179 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 18:07:34.129384 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 18:07:34.139705 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 18:07:34.143154 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 18:07:34.146237 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 18:07:34.153209 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 18:07:34.156531 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 18:07:34.162514 LPC: Trying to open IO window from 800 size 1ff
1339 18:07:34.169785 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1340 18:07:34.179377 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1341 18:07:34.185979 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1342 18:07:34.196071 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1343 18:07:34.199166 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 18:07:34.206137 Root Device assign_resources, bus 0 link: 0
1345 18:07:34.206703 Done setting resources.
1346 18:07:34.212450 Show resources in subtree (Root Device)...After assigning values.
1347 18:07:34.219594 Root Device child on link 0 CPU_CLUSTER: 0
1348 18:07:34.222385 CPU_CLUSTER: 0 child on link 0 APIC: 00
1349 18:07:34.222835 APIC: 00
1350 18:07:34.225882 APIC: 02
1351 18:07:34.226467 APIC: 04
1352 18:07:34.226893 APIC: 01
1353 18:07:34.228855 APIC: 03
1354 18:07:34.229269 APIC: 05
1355 18:07:34.232495 APIC: 07
1356 18:07:34.233011 APIC: 06
1357 18:07:34.236041 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1358 18:07:34.245555 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1359 18:07:34.259081 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1360 18:07:34.259615 PCI: 00:00.0
1361 18:07:34.269046 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 18:07:34.278587 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 18:07:34.289099 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 18:07:34.295337 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 18:07:34.305116 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 18:07:34.314880 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 18:07:34.324932 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 18:07:34.335342 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 18:07:34.344652 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 18:07:34.351262 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1371 18:07:34.361084 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1372 18:07:34.371362 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1373 18:07:34.381545 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1374 18:07:34.391156 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1375 18:07:34.401425 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1376 18:07:34.410632 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1377 18:07:34.411131 PCI: 00:02.0
1378 18:07:34.420605 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1379 18:07:34.430364 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1380 18:07:34.440519 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1381 18:07:34.443404 PCI: 00:04.0
1382 18:07:34.443823 PCI: 00:08.0
1383 18:07:34.453378 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1384 18:07:34.456658 PCI: 00:12.0
1385 18:07:34.466336 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1386 18:07:34.470079 PCI: 00:14.0 child on link 0 USB0 port 0
1387 18:07:34.483041 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1388 18:07:34.486067 USB0 port 0 child on link 0 USB2 port 0
1389 18:07:34.486267 USB2 port 0
1390 18:07:34.489934 USB2 port 1
1391 18:07:34.490203 USB2 port 2
1392 18:07:34.492730 USB2 port 3
1393 18:07:34.495813 USB2 port 5
1394 18:07:34.496013 USB2 port 6
1395 18:07:34.499658 USB2 port 9
1396 18:07:34.499987 USB3 port 0
1397 18:07:34.502557 USB3 port 1
1398 18:07:34.502803 USB3 port 2
1399 18:07:34.506483 USB3 port 3
1400 18:07:34.506914 USB3 port 4
1401 18:07:34.509667 PCI: 00:14.2
1402 18:07:34.519236 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1403 18:07:34.529544 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1404 18:07:34.532919 PCI: 00:14.3
1405 18:07:34.542566 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1406 18:07:34.546356 PCI: 00:15.0 child on link 0 I2C: 01:15
1407 18:07:34.555800 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1408 18:07:34.558919 I2C: 01:15
1409 18:07:34.562102 PCI: 00:15.1 child on link 0 I2C: 02:5d
1410 18:07:34.572054 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1411 18:07:34.572567 I2C: 02:5d
1412 18:07:34.575401 GENERIC: 0.0
1413 18:07:34.575817 PCI: 00:16.0
1414 18:07:34.588615 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1415 18:07:34.589127 PCI: 00:17.0
1416 18:07:34.598411 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1417 18:07:34.608453 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1418 18:07:34.618324 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1419 18:07:34.628278 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1420 18:07:34.634782 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1421 18:07:34.647942 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1422 18:07:34.651899 PCI: 00:19.0 child on link 0 I2C: 03:1a
1423 18:07:34.661578 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1424 18:07:34.662203 I2C: 03:1a
1425 18:07:34.664720 I2C: 03:38
1426 18:07:34.665165 I2C: 03:39
1427 18:07:34.668496 I2C: 03:3a
1428 18:07:34.669008 I2C: 03:3b
1429 18:07:34.674748 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1430 18:07:34.684735 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1431 18:07:34.694572 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1432 18:07:34.704853 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1433 18:07:34.705371 PCI: 01:00.0
1434 18:07:34.714374 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1435 18:07:34.717406 PCI: 00:1e.0
1436 18:07:34.727546 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1437 18:07:34.737809 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1438 18:07:34.744045 PCI: 00:1e.2 child on link 0 SPI: 00
1439 18:07:34.754333 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1440 18:07:34.754934 SPI: 00
1441 18:07:34.757295 PCI: 00:1e.3 child on link 0 SPI: 01
1442 18:07:34.767270 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1443 18:07:34.770661 SPI: 01
1444 18:07:34.773781 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1445 18:07:34.783660 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1446 18:07:34.790435 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1447 18:07:34.793977 PNP: 0c09.0
1448 18:07:34.803843 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1449 18:07:34.804470 PCI: 00:1f.3
1450 18:07:34.813574 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1451 18:07:34.823820 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1452 18:07:34.827337 PCI: 00:1f.4
1453 18:07:34.836734 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1454 18:07:34.846926 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1455 18:07:34.847447 PCI: 00:1f.5
1456 18:07:34.856999 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 18:07:34.859722 Done allocating resources.
1458 18:07:34.866649 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1459 18:07:34.870148 Enabling resources...
1460 18:07:34.873014 PCI: 00:00.0 subsystem <- 8086/9b61
1461 18:07:34.876488 PCI: 00:00.0 cmd <- 06
1462 18:07:34.879561 PCI: 00:02.0 subsystem <- 8086/9b41
1463 18:07:34.882996 PCI: 00:02.0 cmd <- 03
1464 18:07:34.883413 PCI: 00:08.0 cmd <- 06
1465 18:07:34.889465 PCI: 00:12.0 subsystem <- 8086/02f9
1466 18:07:34.889884 PCI: 00:12.0 cmd <- 02
1467 18:07:34.893345 PCI: 00:14.0 subsystem <- 8086/02ed
1468 18:07:34.896307 PCI: 00:14.0 cmd <- 02
1469 18:07:34.899644 PCI: 00:14.2 cmd <- 02
1470 18:07:34.902931 PCI: 00:14.3 subsystem <- 8086/02f0
1471 18:07:34.906287 PCI: 00:14.3 cmd <- 02
1472 18:07:34.909448 PCI: 00:15.0 subsystem <- 8086/02e8
1473 18:07:34.912925 PCI: 00:15.0 cmd <- 02
1474 18:07:34.916125 PCI: 00:15.1 subsystem <- 8086/02e9
1475 18:07:34.919184 PCI: 00:15.1 cmd <- 02
1476 18:07:34.922868 PCI: 00:16.0 subsystem <- 8086/02e0
1477 18:07:34.925943 PCI: 00:16.0 cmd <- 02
1478 18:07:34.929153 PCI: 00:17.0 subsystem <- 8086/02d3
1479 18:07:34.929574 PCI: 00:17.0 cmd <- 03
1480 18:07:34.936133 PCI: 00:19.0 subsystem <- 8086/02c5
1481 18:07:34.936562 PCI: 00:19.0 cmd <- 02
1482 18:07:34.939358 PCI: 00:1d.0 bridge ctrl <- 0013
1483 18:07:34.942715 PCI: 00:1d.0 subsystem <- 8086/02b0
1484 18:07:34.945681 PCI: 00:1d.0 cmd <- 06
1485 18:07:34.949373 PCI: 00:1e.0 subsystem <- 8086/02a8
1486 18:07:34.953061 PCI: 00:1e.0 cmd <- 06
1487 18:07:34.956259 PCI: 00:1e.2 subsystem <- 8086/02aa
1488 18:07:34.959108 PCI: 00:1e.2 cmd <- 06
1489 18:07:34.962753 PCI: 00:1e.3 subsystem <- 8086/02ab
1490 18:07:34.965851 PCI: 00:1e.3 cmd <- 02
1491 18:07:34.968860 PCI: 00:1f.0 subsystem <- 8086/0284
1492 18:07:34.972553 PCI: 00:1f.0 cmd <- 407
1493 18:07:34.975983 PCI: 00:1f.3 subsystem <- 8086/02c8
1494 18:07:34.979157 PCI: 00:1f.3 cmd <- 02
1495 18:07:34.982515 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 18:07:34.985545 PCI: 00:1f.4 cmd <- 03
1497 18:07:34.988795 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 18:07:34.992106 PCI: 00:1f.5 cmd <- 406
1499 18:07:35.000047 PCI: 01:00.0 cmd <- 02
1500 18:07:35.005089 done.
1501 18:07:35.015267 ME: Version: 14.0.39.1367
1502 18:07:35.021510 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1503 18:07:35.025207 Initializing devices...
1504 18:07:35.025624 Root Device init ...
1505 18:07:35.031982 Chrome EC: Set SMI mask to 0x0000000000000000
1506 18:07:35.035575 Chrome EC: clear events_b mask to 0x0000000000000000
1507 18:07:35.041828 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 18:07:35.048767 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 18:07:35.055085 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 18:07:35.058207 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 18:07:35.061562 Root Device init finished in 35209 usecs
1512 18:07:35.065073 CPU_CLUSTER: 0 init ...
1513 18:07:35.071519 CPU_CLUSTER: 0 init finished in 2448 usecs
1514 18:07:35.076037 PCI: 00:00.0 init ...
1515 18:07:35.079095 CPU TDP: 15 Watts
1516 18:07:35.082695 CPU PL2 = 64 Watts
1517 18:07:35.085877 PCI: 00:00.0 init finished in 7084 usecs
1518 18:07:35.089249 PCI: 00:02.0 init ...
1519 18:07:35.092438 PCI: 00:02.0 init finished in 2255 usecs
1520 18:07:35.095621 PCI: 00:08.0 init ...
1521 18:07:35.099058 PCI: 00:08.0 init finished in 2253 usecs
1522 18:07:35.102113 PCI: 00:12.0 init ...
1523 18:07:35.105639 PCI: 00:12.0 init finished in 2253 usecs
1524 18:07:35.108966 PCI: 00:14.0 init ...
1525 18:07:35.112111 PCI: 00:14.0 init finished in 2252 usecs
1526 18:07:35.115613 PCI: 00:14.2 init ...
1527 18:07:35.119041 PCI: 00:14.2 init finished in 2253 usecs
1528 18:07:35.122384 PCI: 00:14.3 init ...
1529 18:07:35.125684 PCI: 00:14.3 init finished in 2271 usecs
1530 18:07:35.128827 PCI: 00:15.0 init ...
1531 18:07:35.132491 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 18:07:35.135588 PCI: 00:15.0 init finished in 5980 usecs
1533 18:07:35.138789 PCI: 00:15.1 init ...
1534 18:07:35.142296 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 18:07:35.149193 PCI: 00:15.1 init finished in 5979 usecs
1536 18:07:35.149718 PCI: 00:16.0 init ...
1537 18:07:35.155828 PCI: 00:16.0 init finished in 2253 usecs
1538 18:07:35.158404 PCI: 00:19.0 init ...
1539 18:07:35.162676 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 18:07:35.165005 PCI: 00:19.0 init finished in 5980 usecs
1541 18:07:35.168999 PCI: 00:1d.0 init ...
1542 18:07:35.171593 Initializing PCH PCIe bridge.
1543 18:07:35.175013 PCI: 00:1d.0 init finished in 5286 usecs
1544 18:07:35.178398 PCI: 00:1f.0 init ...
1545 18:07:35.181652 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 18:07:35.187917 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 18:07:35.188542 IOAPIC: ID = 0x02
1548 18:07:35.191347 IOAPIC: Dumping registers
1549 18:07:35.195067 reg 0x0000: 0x02000000
1550 18:07:35.198551 reg 0x0001: 0x00770020
1551 18:07:35.198972 reg 0x0002: 0x00000000
1552 18:07:35.205313 PCI: 00:1f.0 init finished in 23547 usecs
1553 18:07:35.208811 PCI: 00:1f.4 init ...
1554 18:07:35.211276 PCI: 00:1f.4 init finished in 2263 usecs
1555 18:07:35.221969 PCI: 01:00.0 init ...
1556 18:07:35.225665 PCI: 01:00.0 init finished in 2253 usecs
1557 18:07:35.229786 PNP: 0c09.0 init ...
1558 18:07:35.232871 Google Chrome EC uptime: 11.094 seconds
1559 18:07:35.239439 Google Chrome AP resets since EC boot: 0
1560 18:07:35.242901 Google Chrome most recent AP reset causes:
1561 18:07:35.249681 Google Chrome EC reset flags at last EC boot: reset-pin
1562 18:07:35.253175 PNP: 0c09.0 init finished in 20610 usecs
1563 18:07:35.256048 Devices initialized
1564 18:07:35.259323 Show all devs... After init.
1565 18:07:35.259736 Root Device: enabled 1
1566 18:07:35.263047 CPU_CLUSTER: 0: enabled 1
1567 18:07:35.266228 DOMAIN: 0000: enabled 1
1568 18:07:35.266765 APIC: 00: enabled 1
1569 18:07:35.269258 PCI: 00:00.0: enabled 1
1570 18:07:35.272632 PCI: 00:02.0: enabled 1
1571 18:07:35.276164 PCI: 00:04.0: enabled 0
1572 18:07:35.276676 PCI: 00:05.0: enabled 0
1573 18:07:35.279034 PCI: 00:12.0: enabled 1
1574 18:07:35.282645 PCI: 00:12.5: enabled 0
1575 18:07:35.286010 PCI: 00:12.6: enabled 0
1576 18:07:35.286449 PCI: 00:14.0: enabled 1
1577 18:07:35.288821 PCI: 00:14.1: enabled 0
1578 18:07:35.292210 PCI: 00:14.3: enabled 1
1579 18:07:35.292624 PCI: 00:14.5: enabled 0
1580 18:07:35.295599 PCI: 00:15.0: enabled 1
1581 18:07:35.299279 PCI: 00:15.1: enabled 1
1582 18:07:35.302469 PCI: 00:15.2: enabled 0
1583 18:07:35.302915 PCI: 00:15.3: enabled 0
1584 18:07:35.305817 PCI: 00:16.0: enabled 1
1585 18:07:35.309385 PCI: 00:16.1: enabled 0
1586 18:07:35.312501 PCI: 00:16.2: enabled 0
1587 18:07:35.312971 PCI: 00:16.3: enabled 0
1588 18:07:35.315619 PCI: 00:16.4: enabled 0
1589 18:07:35.318899 PCI: 00:16.5: enabled 0
1590 18:07:35.322008 PCI: 00:17.0: enabled 1
1591 18:07:35.322419 PCI: 00:19.0: enabled 1
1592 18:07:35.325918 PCI: 00:19.1: enabled 0
1593 18:07:35.328602 PCI: 00:19.2: enabled 0
1594 18:07:35.329016 PCI: 00:1a.0: enabled 0
1595 18:07:35.332184 PCI: 00:1c.0: enabled 0
1596 18:07:35.335307 PCI: 00:1c.1: enabled 0
1597 18:07:35.338821 PCI: 00:1c.2: enabled 0
1598 18:07:35.339233 PCI: 00:1c.3: enabled 0
1599 18:07:35.342136 PCI: 00:1c.4: enabled 0
1600 18:07:35.344995 PCI: 00:1c.5: enabled 0
1601 18:07:35.348772 PCI: 00:1c.6: enabled 0
1602 18:07:35.349288 PCI: 00:1c.7: enabled 0
1603 18:07:35.351650 PCI: 00:1d.0: enabled 1
1604 18:07:35.355201 PCI: 00:1d.1: enabled 0
1605 18:07:35.358506 PCI: 00:1d.2: enabled 0
1606 18:07:35.358961 PCI: 00:1d.3: enabled 0
1607 18:07:35.362102 PCI: 00:1d.4: enabled 0
1608 18:07:35.365650 PCI: 00:1d.5: enabled 0
1609 18:07:35.368889 PCI: 00:1e.0: enabled 1
1610 18:07:35.369311 PCI: 00:1e.1: enabled 0
1611 18:07:35.372026 PCI: 00:1e.2: enabled 1
1612 18:07:35.375068 PCI: 00:1e.3: enabled 1
1613 18:07:35.375480 PCI: 00:1f.0: enabled 1
1614 18:07:35.378571 PCI: 00:1f.1: enabled 0
1615 18:07:35.381832 PCI: 00:1f.2: enabled 0
1616 18:07:35.385420 PCI: 00:1f.3: enabled 1
1617 18:07:35.385945 PCI: 00:1f.4: enabled 1
1618 18:07:35.388920 PCI: 00:1f.5: enabled 1
1619 18:07:35.391658 PCI: 00:1f.6: enabled 0
1620 18:07:35.395370 USB0 port 0: enabled 1
1621 18:07:35.395883 I2C: 01:15: enabled 1
1622 18:07:35.398500 I2C: 02:5d: enabled 1
1623 18:07:35.401925 GENERIC: 0.0: enabled 1
1624 18:07:35.402436 I2C: 03:1a: enabled 1
1625 18:07:35.405551 I2C: 03:38: enabled 1
1626 18:07:35.408460 I2C: 03:39: enabled 1
1627 18:07:35.408978 I2C: 03:3a: enabled 1
1628 18:07:35.411778 I2C: 03:3b: enabled 1
1629 18:07:35.414728 PCI: 00:00.0: enabled 1
1630 18:07:35.415320 SPI: 00: enabled 1
1631 18:07:35.418201 SPI: 01: enabled 1
1632 18:07:35.421808 PNP: 0c09.0: enabled 1
1633 18:07:35.422335 USB2 port 0: enabled 1
1634 18:07:35.425001 USB2 port 1: enabled 1
1635 18:07:35.428330 USB2 port 2: enabled 0
1636 18:07:35.428897 USB2 port 3: enabled 0
1637 18:07:35.432176 USB2 port 5: enabled 0
1638 18:07:35.434911 USB2 port 6: enabled 1
1639 18:07:35.437875 USB2 port 9: enabled 1
1640 18:07:35.438424 USB3 port 0: enabled 1
1641 18:07:35.441455 USB3 port 1: enabled 1
1642 18:07:35.444679 USB3 port 2: enabled 1
1643 18:07:35.445196 USB3 port 3: enabled 1
1644 18:07:35.448201 USB3 port 4: enabled 0
1645 18:07:35.451180 APIC: 02: enabled 1
1646 18:07:35.451601 APIC: 04: enabled 1
1647 18:07:35.454765 APIC: 01: enabled 1
1648 18:07:35.458170 APIC: 03: enabled 1
1649 18:07:35.458782 APIC: 05: enabled 1
1650 18:07:35.461219 APIC: 07: enabled 1
1651 18:07:35.461731 APIC: 06: enabled 1
1652 18:07:35.464682 PCI: 00:08.0: enabled 1
1653 18:07:35.467600 PCI: 00:14.2: enabled 1
1654 18:07:35.471336 PCI: 01:00.0: enabled 1
1655 18:07:35.475032 Disabling ACPI via APMC:
1656 18:07:35.478161 done.
1657 18:07:35.481736 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1658 18:07:35.484369 ELOG: NV offset 0xaf0000 size 0x4000
1659 18:07:35.491375 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1660 18:07:35.498221 ELOG: Event(17) added with size 13 at 2023-10-09 18:07:35 UTC
1661 18:07:35.505016 ELOG: Event(92) added with size 9 at 2023-10-09 18:07:35 UTC
1662 18:07:35.511322 ELOG: Event(93) added with size 9 at 2023-10-09 18:07:35 UTC
1663 18:07:35.518007 ELOG: Event(9A) added with size 9 at 2023-10-09 18:07:35 UTC
1664 18:07:35.524780 ELOG: Event(9E) added with size 10 at 2023-10-09 18:07:35 UTC
1665 18:07:35.530899 ELOG: Event(9F) added with size 14 at 2023-10-09 18:07:35 UTC
1666 18:07:35.534303 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1667 18:07:35.542097 ELOG: Event(A1) added with size 10 at 2023-10-09 18:07:35 UTC
1668 18:07:35.551869 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1669 18:07:35.558564 ELOG: Event(A0) added with size 9 at 2023-10-09 18:07:35 UTC
1670 18:07:35.561841 elog_add_boot_reason: Logged dev mode boot
1671 18:07:35.565208 Finalize devices...
1672 18:07:35.565748 PCI: 00:17.0 final
1673 18:07:35.568525 Devices finalized
1674 18:07:35.571820 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1675 18:07:35.578507 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1676 18:07:35.581299 ME: HFSTS1 : 0x90000245
1677 18:07:35.584882 ME: HFSTS2 : 0x3B850126
1678 18:07:35.592045 ME: HFSTS3 : 0x00000020
1679 18:07:35.594692 ME: HFSTS4 : 0x00004800
1680 18:07:35.598122 ME: HFSTS5 : 0x00000000
1681 18:07:35.601383 ME: HFSTS6 : 0x40400006
1682 18:07:35.604672 ME: Manufacturing Mode : NO
1683 18:07:35.608011 ME: FW Partition Table : OK
1684 18:07:35.611122 ME: Bringup Loader Failure : NO
1685 18:07:35.614667 ME: Firmware Init Complete : YES
1686 18:07:35.618045 ME: Boot Options Present : NO
1687 18:07:35.621005 ME: Update In Progress : NO
1688 18:07:35.625005 ME: D0i3 Support : YES
1689 18:07:35.627739 ME: Low Power State Enabled : NO
1690 18:07:35.631158 ME: CPU Replaced : NO
1691 18:07:35.634265 ME: CPU Replacement Valid : YES
1692 18:07:35.637350 ME: Current Working State : 5
1693 18:07:35.640751 ME: Current Operation State : 1
1694 18:07:35.644159 ME: Current Operation Mode : 0
1695 18:07:35.647399 ME: Error Code : 0
1696 18:07:35.650660 ME: CPU Debug Disabled : YES
1697 18:07:35.654004 ME: TXT Support : NO
1698 18:07:35.660553 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1699 18:07:35.667641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 18:07:35.668068 CBFS @ c08000 size 3f8000
1701 18:07:35.674006 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 18:07:35.677320 CBFS: Locating 'fallback/dsdt.aml'
1703 18:07:35.680779 CBFS: Found @ offset 10bb80 size 3fa5
1704 18:07:35.687267 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 18:07:35.690974 CBFS @ c08000 size 3f8000
1706 18:07:35.697033 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 18:07:35.697449 CBFS: Locating 'fallback/slic'
1708 18:07:35.702211 CBFS: 'fallback/slic' not found.
1709 18:07:35.708786 ACPI: Writing ACPI tables at 99b3e000.
1710 18:07:35.708867 ACPI: * FACS
1711 18:07:35.711711 ACPI: * DSDT
1712 18:07:35.715255 Ramoops buffer: 0x100000@0x99a3d000.
1713 18:07:35.718741 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1714 18:07:35.725314 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1715 18:07:35.728339 Google Chrome EC: version:
1716 18:07:35.731604 ro: helios_v2.0.2659-56403530b
1717 18:07:35.734964 rw: helios_v2.0.2849-c41de27e7d
1718 18:07:35.735044 running image: 1
1719 18:07:35.739313 ACPI: * FADT
1720 18:07:35.739393 SCI is IRQ9
1721 18:07:35.745864 ACPI: added table 1/32, length now 40
1722 18:07:35.745950 ACPI: * SSDT
1723 18:07:35.749183 Found 1 CPU(s) with 8 core(s) each.
1724 18:07:35.752739 Error: Could not locate 'wifi_sar' in VPD.
1725 18:07:35.759006 Checking CBFS for default SAR values
1726 18:07:35.762458 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1727 18:07:35.765621 CBFS @ c08000 size 3f8000
1728 18:07:35.772539 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1729 18:07:35.775606 CBFS: Locating 'wifi_sar_defaults.hex'
1730 18:07:35.779168 CBFS: Found @ offset 5fac0 size 77
1731 18:07:35.782371 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1732 18:07:35.788711 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1733 18:07:35.791943 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1734 18:07:35.798856 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1735 18:07:35.801811 failed to find key in VPD: dsm_calib_r0_0
1736 18:07:35.811872 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1737 18:07:35.815295 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1738 18:07:35.821800 failed to find key in VPD: dsm_calib_r0_1
1739 18:07:35.828353 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1740 18:07:35.834951 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1741 18:07:35.838509 failed to find key in VPD: dsm_calib_r0_2
1742 18:07:35.847956 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1743 18:07:35.851647 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1744 18:07:35.857815 failed to find key in VPD: dsm_calib_r0_3
1745 18:07:35.864680 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1746 18:07:35.871221 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1747 18:07:35.874247 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1748 18:07:35.880988 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1749 18:07:35.884681 EC returned error result code 1
1750 18:07:35.888119 EC returned error result code 1
1751 18:07:35.891789 EC returned error result code 1
1752 18:07:35.894819 PS2K: Bad resp from EC. Vivaldi disabled!
1753 18:07:35.901558 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1754 18:07:35.908353 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1755 18:07:35.911706 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1756 18:07:35.918185 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1757 18:07:35.921570 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1758 18:07:35.928335 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1759 18:07:35.934919 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1760 18:07:35.941188 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1761 18:07:35.944955 ACPI: added table 2/32, length now 44
1762 18:07:35.945037 ACPI: * MCFG
1763 18:07:35.950969 ACPI: added table 3/32, length now 48
1764 18:07:35.951050 ACPI: * TPM2
1765 18:07:35.954435 TPM2 log created at 99a2d000
1766 18:07:35.957801 ACPI: added table 4/32, length now 52
1767 18:07:35.961407 ACPI: * MADT
1768 18:07:35.961483 SCI is IRQ9
1769 18:07:35.964198 ACPI: added table 5/32, length now 56
1770 18:07:35.967992 current = 99b43ac0
1771 18:07:35.968074 ACPI: * DMAR
1772 18:07:35.970935 ACPI: added table 6/32, length now 60
1773 18:07:35.974831 ACPI: * IGD OpRegion
1774 18:07:35.977784 GMA: Found VBT in CBFS
1775 18:07:35.981214 GMA: Found valid VBT in CBFS
1776 18:07:35.984299 ACPI: added table 7/32, length now 64
1777 18:07:35.984376 ACPI: * HPET
1778 18:07:35.990759 ACPI: added table 8/32, length now 68
1779 18:07:35.990832 ACPI: done.
1780 18:07:35.993989 ACPI tables: 31744 bytes.
1781 18:07:35.997395 smbios_write_tables: 99a2c000
1782 18:07:36.000860 EC returned error result code 3
1783 18:07:36.004218 Couldn't obtain OEM name from CBI
1784 18:07:36.007618 Create SMBIOS type 17
1785 18:07:36.010507 PCI: 00:00.0 (Intel Cannonlake)
1786 18:07:36.010628 PCI: 00:14.3 (Intel WiFi)
1787 18:07:36.014099 SMBIOS tables: 939 bytes.
1788 18:07:36.020476 Writing table forward entry at 0x00000500
1789 18:07:36.023814 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1790 18:07:36.026993 Writing coreboot table at 0x99b62000
1791 18:07:36.033735 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1792 18:07:36.040290 1. 0000000000001000-000000000009ffff: RAM
1793 18:07:36.043466 2. 00000000000a0000-00000000000fffff: RESERVED
1794 18:07:36.046890 3. 0000000000100000-0000000099a2bfff: RAM
1795 18:07:36.053572 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1796 18:07:36.059952 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1797 18:07:36.063115 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1798 18:07:36.070382 7. 000000009a000000-000000009f7fffff: RESERVED
1799 18:07:36.073505 8. 00000000e0000000-00000000efffffff: RESERVED
1800 18:07:36.079588 9. 00000000fc000000-00000000fc000fff: RESERVED
1801 18:07:36.082860 10. 00000000fe000000-00000000fe00ffff: RESERVED
1802 18:07:36.089859 11. 00000000fed10000-00000000fed17fff: RESERVED
1803 18:07:36.092912 12. 00000000fed80000-00000000fed83fff: RESERVED
1804 18:07:36.096336 13. 00000000fed90000-00000000fed91fff: RESERVED
1805 18:07:36.103012 14. 00000000feda0000-00000000feda1fff: RESERVED
1806 18:07:36.106260 15. 0000000100000000-000000045e7fffff: RAM
1807 18:07:36.112896 Graphics framebuffer located at 0xc0000000
1808 18:07:36.112975 Passing 5 GPIOs to payload:
1809 18:07:36.119483 NAME | PORT | POLARITY | VALUE
1810 18:07:36.126028 write protect | undefined | high | low
1811 18:07:36.129427 lid | undefined | high | high
1812 18:07:36.136396 power | undefined | high | low
1813 18:07:36.139425 oprom | undefined | high | low
1814 18:07:36.145948 EC in RW | 0x000000cb | high | low
1815 18:07:36.146033 Board ID: 4
1816 18:07:36.152404 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1817 18:07:36.155890 CBFS @ c08000 size 3f8000
1818 18:07:36.159384 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1819 18:07:36.165723 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1820 18:07:36.169326 coreboot table: 1492 bytes.
1821 18:07:36.172140 IMD ROOT 0. 99fff000 00001000
1822 18:07:36.175817 IMD SMALL 1. 99ffe000 00001000
1823 18:07:36.178700 FSP MEMORY 2. 99c4e000 003b0000
1824 18:07:36.182153 CONSOLE 3. 99c2e000 00020000
1825 18:07:36.185148 FMAP 4. 99c2d000 0000054e
1826 18:07:36.188702 TIME STAMP 5. 99c2c000 00000910
1827 18:07:36.192098 VBOOT WORK 6. 99c18000 00014000
1828 18:07:36.195694 MRC DATA 7. 99c16000 00001958
1829 18:07:36.199099 ROMSTG STCK 8. 99c15000 00001000
1830 18:07:36.202112 AFTER CAR 9. 99c0b000 0000a000
1831 18:07:36.205654 RAMSTAGE 10. 99baf000 0005c000
1832 18:07:36.209586 REFCODE 11. 99b7a000 00035000
1833 18:07:36.212621 SMM BACKUP 12. 99b6a000 00010000
1834 18:07:36.215375 COREBOOT 13. 99b62000 00008000
1835 18:07:36.218846 ACPI 14. 99b3e000 00024000
1836 18:07:36.222144 ACPI GNVS 15. 99b3d000 00001000
1837 18:07:36.225838 RAMOOPS 16. 99a3d000 00100000
1838 18:07:36.229531 TPM2 TCGLOG17. 99a2d000 00010000
1839 18:07:36.232160 SMBIOS 18. 99a2c000 00000800
1840 18:07:36.235766 IMD small region:
1841 18:07:36.239225 IMD ROOT 0. 99ffec00 00000400
1842 18:07:36.241965 FSP RUNTIME 1. 99ffebe0 00000004
1843 18:07:36.245626 EC HOSTEVENT 2. 99ffebc0 00000008
1844 18:07:36.248578 POWER STATE 3. 99ffeb80 00000040
1845 18:07:36.252002 ROMSTAGE 4. 99ffeb60 00000004
1846 18:07:36.255537 MEM INFO 5. 99ffe9a0 000001b9
1847 18:07:36.258359 VPD 6. 99ffe920 0000006c
1848 18:07:36.262119 MTRR: Physical address space:
1849 18:07:36.268556 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1850 18:07:36.275178 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1851 18:07:36.282098 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1852 18:07:36.288290 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1853 18:07:36.295194 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1854 18:07:36.301867 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1855 18:07:36.305493 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1856 18:07:36.311343 MTRR: Fixed MSR 0x250 0x0606060606060606
1857 18:07:36.314994 MTRR: Fixed MSR 0x258 0x0606060606060606
1858 18:07:36.317963 MTRR: Fixed MSR 0x259 0x0000000000000000
1859 18:07:36.321572 MTRR: Fixed MSR 0x268 0x0606060606060606
1860 18:07:36.328793 MTRR: Fixed MSR 0x269 0x0606060606060606
1861 18:07:36.331279 MTRR: Fixed MSR 0x26a 0x0606060606060606
1862 18:07:36.334743 MTRR: Fixed MSR 0x26b 0x0606060606060606
1863 18:07:36.338082 MTRR: Fixed MSR 0x26c 0x0606060606060606
1864 18:07:36.344678 MTRR: Fixed MSR 0x26d 0x0606060606060606
1865 18:07:36.347847 MTRR: Fixed MSR 0x26e 0x0606060606060606
1866 18:07:36.351437 MTRR: Fixed MSR 0x26f 0x0606060606060606
1867 18:07:36.354814 call enable_fixed_mtrr()
1868 18:07:36.357936 CPU physical address size: 39 bits
1869 18:07:36.361010 MTRR: default type WB/UC MTRR counts: 6/8.
1870 18:07:36.364446 MTRR: WB selected as default type.
1871 18:07:36.371112 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1872 18:07:36.377859 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1873 18:07:36.384747 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1874 18:07:36.391141 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1875 18:07:36.397788 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1876 18:07:36.404641 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1877 18:07:36.407638 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 18:07:36.414206 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 18:07:36.417504 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 18:07:36.420894 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 18:07:36.423939 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 18:07:36.427512 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 18:07:36.434120 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 18:07:36.437719 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 18:07:36.440988 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 18:07:36.444031 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 18:07:36.450586 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 18:07:36.451008
1889 18:07:36.451338 MTRR check
1890 18:07:36.454048 Fixed MTRRs : Enabled
1891 18:07:36.457116 Variable MTRRs: Enabled
1892 18:07:36.457533
1893 18:07:36.457861 call enable_fixed_mtrr()
1894 18:07:36.463819 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1895 18:07:36.466469 CPU physical address size: 39 bits
1896 18:07:36.473061 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1897 18:07:36.476526 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 18:07:36.480011 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 18:07:36.483370 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 18:07:36.489662 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 18:07:36.493156 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 18:07:36.496692 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 18:07:36.499617 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 18:07:36.506270 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 18:07:36.509848 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 18:07:36.512877 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 18:07:36.516168 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 18:07:36.523094 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 18:07:36.523178 call enable_fixed_mtrr()
1910 18:07:36.530012 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 18:07:36.533303 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 18:07:36.536547 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 18:07:36.540121 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 18:07:36.546669 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 18:07:36.550018 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 18:07:36.552848 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 18:07:36.556070 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 18:07:36.559729 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 18:07:36.566428 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 18:07:36.569806 CPU physical address size: 39 bits
1921 18:07:36.573167 call enable_fixed_mtrr()
1922 18:07:36.576590 CBFS @ c08000 size 3f8000
1923 18:07:36.579496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1924 18:07:36.582958 CBFS: Locating 'fallback/payload'
1925 18:07:36.586447 CPU physical address size: 39 bits
1926 18:07:36.592867 CBFS: Found @ offset 1c96c0 size 3f798
1927 18:07:36.596254 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 18:07:36.599595 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 18:07:36.603092 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 18:07:36.606160 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 18:07:36.613147 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 18:07:36.616205 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 18:07:36.619636 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 18:07:36.623002 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 18:07:36.629257 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 18:07:36.632357 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 18:07:36.636042 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 18:07:36.639125 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 18:07:36.646076 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 18:07:36.646496 call enable_fixed_mtrr()
1941 18:07:36.652518 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 18:07:36.655907 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 18:07:36.658909 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 18:07:36.662492 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 18:07:36.669185 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 18:07:36.671965 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 18:07:36.675378 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 18:07:36.678432 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 18:07:36.685166 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 18:07:36.688919 CPU physical address size: 39 bits
1951 18:07:36.691847 call enable_fixed_mtrr()
1952 18:07:36.695291 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 18:07:36.698270 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 18:07:36.701831 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 18:07:36.708487 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 18:07:36.712079 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 18:07:36.715182 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 18:07:36.718647 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 18:07:36.725291 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 18:07:36.728348 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 18:07:36.731710 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 18:07:36.734918 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 18:07:36.741396 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 18:07:36.741818 call enable_fixed_mtrr()
1965 18:07:36.748206 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 18:07:36.751486 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 18:07:36.755113 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 18:07:36.758195 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 18:07:36.765117 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 18:07:36.768443 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 18:07:36.771587 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 18:07:36.774894 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 18:07:36.781463 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 18:07:36.785024 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 18:07:36.787930 CPU physical address size: 39 bits
1976 18:07:36.791036 call enable_fixed_mtrr()
1977 18:07:36.794485 CPU physical address size: 39 bits
1978 18:07:36.797597 Checking segment from ROM address 0xffdd16f8
1979 18:07:36.800853 CPU physical address size: 39 bits
1980 18:07:36.808157 Checking segment from ROM address 0xffdd1714
1981 18:07:36.811117 Loading segment from ROM address 0xffdd16f8
1982 18:07:36.814158 code (compression=0)
1983 18:07:36.820835 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1984 18:07:36.830865 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1985 18:07:36.831378 it's not compressed!
1986 18:07:36.924744 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1987 18:07:36.931516 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1988 18:07:36.935034 Loading segment from ROM address 0xffdd1714
1989 18:07:36.938047 Entry Point 0x30000000
1990 18:07:36.940913 Loaded segments
1991 18:07:36.947106 Finalizing chipset.
1992 18:07:36.949913 Finalizing SMM.
1993 18:07:36.953550 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1994 18:07:36.956367 mp_park_aps done after 0 msecs.
1995 18:07:36.963165 Jumping to boot code at 30000000(99b62000)
1996 18:07:36.970142 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1997 18:07:36.970768
1998 18:07:36.971138
1999 18:07:36.971596
2000 18:07:36.972621 Starting depthcharge on Helios...
2001 18:07:36.973041
2002 18:07:36.974159 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2003 18:07:36.974756 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2004 18:07:36.975220 Setting prompt string to ['hatch:']
2005 18:07:36.975672 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2006 18:07:36.982626 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2007 18:07:36.983193
2008 18:07:36.989544 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2009 18:07:36.990113
2010 18:07:36.995878 board_setup: Info: eMMC controller not present; skipping
2011 18:07:36.996294
2012 18:07:36.999094 New NVMe Controller 0x30053ac0 @ 00:1d:00
2013 18:07:36.999536
2014 18:07:37.006059 board_setup: Info: SDHCI controller not present; skipping
2015 18:07:37.006627
2016 18:07:37.012362 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2017 18:07:37.012899
2018 18:07:37.013226 Wipe memory regions:
2019 18:07:37.013533
2020 18:07:37.015749 [0x00000000001000, 0x000000000a0000)
2021 18:07:37.019101
2022 18:07:37.022155 [0x00000000100000, 0x00000030000000)
2023 18:07:37.085651
2024 18:07:37.088706 [0x00000030657430, 0x00000099a2c000)
2025 18:07:37.226179
2026 18:07:37.228894 [0x00000100000000, 0x0000045e800000)
2027 18:07:38.611282
2028 18:07:38.611440 R8152: Initializing
2029 18:07:38.611513
2030 18:07:38.614228 Version 9 (ocp_data = 6010)
2031 18:07:38.618861
2032 18:07:38.618963 R8152: Done initializing
2033 18:07:38.619037
2034 18:07:38.622163 Adding net device
2035 18:07:39.232194
2036 18:07:39.232744 R8152: Initializing
2037 18:07:39.233103
2038 18:07:39.235119 Version 6 (ocp_data = 5c30)
2039 18:07:39.235587
2040 18:07:39.238167 R8152: Done initializing
2041 18:07:39.238246
2042 18:07:39.244970 net_add_device: Attemp to include the same device
2043 18:07:39.245143
2044 18:07:39.251746 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2045 18:07:39.252220
2046 18:07:39.252633
2047 18:07:39.252981
2048 18:07:39.253810 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2050 18:07:39.355245 hatch: tftpboot 192.168.201.1 11712618/tftp-deploy-ss305k3k/kernel/bzImage 11712618/tftp-deploy-ss305k3k/kernel/cmdline 11712618/tftp-deploy-ss305k3k/ramdisk/ramdisk.cpio.gz
2051 18:07:39.355887 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2052 18:07:39.356362 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2053 18:07:39.360954 tftpboot 192.168.201.1 11712618/tftp-deploy-ss305k3k/kernel/bzImloy-ss305k3k/kernel/cmdline 11712618/tftp-deploy-ss305k3k/ramdisk/ramdisk.cpio.gz
2054 18:07:39.361441
2055 18:07:39.361799 Waiting for link
2056 18:07:39.561965
2057 18:07:39.562559 done.
2058 18:07:39.563044
2059 18:07:39.563749 MAC: 00:24:32:50:1a:5f
2060 18:07:39.564475
2061 18:07:39.565491 Sending DHCP discover... done.
2062 18:07:39.565886
2063 18:07:39.568101 Waiting for reply... done.
2064 18:07:39.568613
2065 18:07:39.572962 Sending DHCP request... done.
2066 18:07:39.573446
2067 18:07:39.590021 Waiting for reply... done.
2068 18:07:39.590463
2069 18:07:39.590864 My ip is 192.168.201.21
2070 18:07:39.591184
2071 18:07:39.592997 The DHCP server ip is 192.168.201.1
2072 18:07:39.596116
2073 18:07:39.599861 TFTP server IP predefined by user: 192.168.201.1
2074 18:07:39.600282
2075 18:07:39.606193 Bootfile predefined by user: 11712618/tftp-deploy-ss305k3k/kernel/bzImage
2076 18:07:39.606702
2077 18:07:39.609888 Sending tftp read request... done.
2078 18:07:39.610402
2079 18:07:39.618874 Waiting for the transfer...
2080 18:07:39.619390
2081 18:07:40.327380 00000000 ################################################################
2082 18:07:40.327946
2083 18:07:41.026229 00080000 ################################################################
2084 18:07:41.026770
2085 18:07:41.713031 00100000 ################################################################
2086 18:07:41.713603
2087 18:07:42.437155 00180000 ################################################################
2088 18:07:42.437681
2089 18:07:43.156032 00200000 ################################################################
2090 18:07:43.156602
2091 18:07:43.726264 00280000 ################################################################
2092 18:07:43.726437
2093 18:07:44.416029 00300000 ################################################################
2094 18:07:44.416572
2095 18:07:45.118958 00380000 ################################################################
2096 18:07:45.119588
2097 18:07:45.833303 00400000 ################################################################
2098 18:07:45.833905
2099 18:07:46.534301 00480000 ################################################################
2100 18:07:46.534957
2101 18:07:47.254980 00500000 ################################################################
2102 18:07:47.255508
2103 18:07:47.948563 00580000 ################################################################
2104 18:07:47.949079
2105 18:07:48.586356 00600000 ################################################################
2106 18:07:48.586581
2107 18:07:49.240274 00680000 ################################################################
2108 18:07:49.240788
2109 18:07:49.939661 00700000 ################################################################
2110 18:07:49.940182
2111 18:07:50.644322 00780000 ################################################################
2112 18:07:50.644843
2113 18:07:50.782988 00800000 ############# done.
2114 18:07:50.783498
2115 18:07:50.786321 The bootfile was 8490896 bytes long.
2116 18:07:50.787010
2117 18:07:50.789719 Sending tftp read request... done.
2118 18:07:50.790324
2119 18:07:50.793784 Waiting for the transfer...
2120 18:07:50.794194
2121 18:07:51.487019 00000000 ################################################################
2122 18:07:51.487543
2123 18:07:52.169153 00080000 ################################################################
2124 18:07:52.169664
2125 18:07:52.876843 00100000 ################################################################
2126 18:07:52.877368
2127 18:07:53.597010 00180000 ################################################################
2128 18:07:53.597162
2129 18:07:54.284658 00200000 ################################################################
2130 18:07:54.285227
2131 18:07:54.976024 00280000 ################################################################
2132 18:07:54.976545
2133 18:07:55.693979 00300000 ################################################################
2134 18:07:55.694553
2135 18:07:56.394606 00380000 ################################################################
2136 18:07:56.395124
2137 18:07:57.083693 00400000 ################################################################
2138 18:07:57.084354
2139 18:07:57.765985 00480000 ################################################################
2140 18:07:57.766591
2141 18:07:58.468723 00500000 ################################################################
2142 18:07:58.468897
2143 18:07:58.733664 00580000 ############################# done.
2144 18:07:58.733811
2145 18:07:58.736966 Sending tftp read request... done.
2146 18:07:58.737075
2147 18:07:58.740906 Waiting for the transfer...
2148 18:07:58.740990
2149 18:07:58.741073 00000000 # done.
2150 18:07:58.741174
2151 18:07:58.750888 Command line loaded dynamically from TFTP file: 11712618/tftp-deploy-ss305k3k/kernel/cmdline
2152 18:07:58.750974
2153 18:07:58.780186 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11712618/extract-nfsrootfs-hqy7ndl3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2154 18:07:58.780306
2155 18:07:58.783685 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 18:07:58.789662
2157 18:07:58.792929 Shutting down all USB controllers.
2158 18:07:58.793150
2159 18:07:58.793307 Removing current net device
2160 18:07:58.800481
2161 18:07:58.800755 Finalizing coreboot
2162 18:07:58.800960
2163 18:07:58.807461 Exiting depthcharge with code 4 at timestamp: 29190394
2164 18:07:58.807754
2165 18:07:58.807982
2166 18:07:58.808183 Starting kernel ...
2167 18:07:58.808373
2168 18:07:58.809073 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2169 18:07:58.809337 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2170 18:07:58.809538 Setting prompt string to ['Linux version [0-9]']
2171 18:07:58.809761 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 18:07:58.810098 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2173 18:07:58.810773
2175 18:12:18.810295 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2177 18:12:18.812030 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2179 18:12:18.813296 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 18:12:18.815472 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 18:12:18.817229 Cleaning after the job
2185 18:12:18.817856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/ramdisk
2186 18:12:18.822766 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/kernel
2187 18:12:18.828802 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/nfsrootfs
2188 18:12:18.966699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712618/tftp-deploy-ss305k3k/modules
2189 18:12:18.967192 start: 4.1 power-off (timeout 00:00:30) [common]
2190 18:12:18.967430 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2191 18:12:19.044098 >> Command sent successfully.
2192 18:12:19.048931 Returned 0 in 0 seconds
2193 18:12:19.149948 end: 4.1 power-off (duration 00:00:00) [common]
2195 18:12:19.151569 start: 4.2 read-feedback (timeout 00:10:00) [common]
2196 18:12:19.152793 Listened to connection for namespace 'common' for up to 1s
2198 18:12:19.154342 Listened to connection for namespace 'common' for up to 1s
2199 18:12:20.153474 Finalising connection for namespace 'common'
2200 18:12:20.154248 Disconnecting from shell: Finalise
2201 18:12:20.154816
2202 18:12:20.256075 end: 4.2 read-feedback (duration 00:00:01) [common]
2203 18:12:20.256660 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712618
2204 18:12:20.812777 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712618
2205 18:12:20.812978 JobError: Your job cannot terminate cleanly.