Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 06:43:41.724417 lava-dispatcher, installed at version: 2023.10
2 06:43:41.724630 start: 0 validate
3 06:43:41.724761 Start time: 2024-01-03 06:43:41.724751+00:00 (UTC)
4 06:43:41.724877 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:43:41.725006 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:43:41.727746 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:43:41.727868 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:43:45.231327 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:43:45.232117 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 06:43:45.739716 validate duration: 4.02
12 06:43:45.740016 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:43:45.740127 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:43:45.740217 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:43:45.740347 Not decompressing ramdisk as can be used compressed.
16 06:43:45.740437 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:43:45.740505 saving as /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/ramdisk/rootfs.cpio.gz
18 06:43:45.740571 total size: 8418130 (8 MB)
19 06:43:45.741639 progress 0 % (0 MB)
20 06:43:45.743936 progress 5 % (0 MB)
21 06:43:45.746199 progress 10 % (0 MB)
22 06:43:45.748474 progress 15 % (1 MB)
23 06:43:45.750760 progress 20 % (1 MB)
24 06:43:45.753017 progress 25 % (2 MB)
25 06:43:45.755283 progress 30 % (2 MB)
26 06:43:45.757383 progress 35 % (2 MB)
27 06:43:45.759644 progress 40 % (3 MB)
28 06:43:45.761928 progress 45 % (3 MB)
29 06:43:45.764245 progress 50 % (4 MB)
30 06:43:45.766496 progress 55 % (4 MB)
31 06:43:45.768766 progress 60 % (4 MB)
32 06:43:45.770830 progress 65 % (5 MB)
33 06:43:45.773165 progress 70 % (5 MB)
34 06:43:45.775458 progress 75 % (6 MB)
35 06:43:45.777682 progress 80 % (6 MB)
36 06:43:45.779981 progress 85 % (6 MB)
37 06:43:45.782202 progress 90 % (7 MB)
38 06:43:45.784459 progress 95 % (7 MB)
39 06:43:45.786531 progress 100 % (8 MB)
40 06:43:45.786758 8 MB downloaded in 0.05 s (173.82 MB/s)
41 06:43:45.786917 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:43:45.787160 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:43:45.787245 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:43:45.787327 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:43:45.787514 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 06:43:45.787589 saving as /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/kernel/bzImage
48 06:43:45.787651 total size: 8576912 (8 MB)
49 06:43:45.787711 No compression specified
50 06:43:45.788845 progress 0 % (0 MB)
51 06:43:45.791170 progress 5 % (0 MB)
52 06:43:45.793481 progress 10 % (0 MB)
53 06:43:45.795794 progress 15 % (1 MB)
54 06:43:45.798065 progress 20 % (1 MB)
55 06:43:45.800327 progress 25 % (2 MB)
56 06:43:45.802583 progress 30 % (2 MB)
57 06:43:45.804854 progress 35 % (2 MB)
58 06:43:45.807106 progress 40 % (3 MB)
59 06:43:45.809375 progress 45 % (3 MB)
60 06:43:45.811647 progress 50 % (4 MB)
61 06:43:45.813891 progress 55 % (4 MB)
62 06:43:45.816279 progress 60 % (4 MB)
63 06:43:45.818492 progress 65 % (5 MB)
64 06:43:45.820711 progress 70 % (5 MB)
65 06:43:45.822934 progress 75 % (6 MB)
66 06:43:45.825185 progress 80 % (6 MB)
67 06:43:45.827598 progress 85 % (6 MB)
68 06:43:45.829946 progress 90 % (7 MB)
69 06:43:45.832174 progress 95 % (7 MB)
70 06:43:45.834407 progress 100 % (8 MB)
71 06:43:45.834613 8 MB downloaded in 0.05 s (174.19 MB/s)
72 06:43:45.834760 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:43:45.834993 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:43:45.835082 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:43:45.835170 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:43:45.835297 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 06:43:45.835375 saving as /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/modules/modules.tar
79 06:43:45.835437 total size: 250972 (0 MB)
80 06:43:45.835499 Using unxz to decompress xz
81 06:43:45.839672 progress 13 % (0 MB)
82 06:43:45.840177 progress 26 % (0 MB)
83 06:43:45.840424 progress 39 % (0 MB)
84 06:43:45.842059 progress 52 % (0 MB)
85 06:43:45.844028 progress 65 % (0 MB)
86 06:43:45.845884 progress 78 % (0 MB)
87 06:43:45.847650 progress 91 % (0 MB)
88 06:43:45.849575 progress 100 % (0 MB)
89 06:43:45.854879 0 MB downloaded in 0.02 s (12.31 MB/s)
90 06:43:45.855122 end: 1.3.1 http-download (duration 00:00:00) [common]
92 06:43:45.855407 end: 1.3 download-retry (duration 00:00:00) [common]
93 06:43:45.855507 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 06:43:45.855607 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 06:43:45.855690 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 06:43:45.855777 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 06:43:45.856002 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn
98 06:43:45.856137 makedir: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin
99 06:43:45.856242 makedir: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/tests
100 06:43:45.856341 makedir: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/results
101 06:43:45.856458 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-add-keys
102 06:43:45.856604 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-add-sources
103 06:43:45.856736 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-background-process-start
104 06:43:45.856862 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-background-process-stop
105 06:43:45.856989 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-common-functions
106 06:43:45.857114 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-echo-ipv4
107 06:43:45.857239 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-install-packages
108 06:43:45.857363 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-installed-packages
109 06:43:45.857487 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-os-build
110 06:43:45.857612 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-probe-channel
111 06:43:45.857735 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-probe-ip
112 06:43:45.857859 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-target-ip
113 06:43:45.857983 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-target-mac
114 06:43:45.858106 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-target-storage
115 06:43:45.858234 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-case
116 06:43:45.858360 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-event
117 06:43:45.858483 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-feedback
118 06:43:45.858606 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-raise
119 06:43:45.858731 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-reference
120 06:43:45.858856 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-runner
121 06:43:45.858979 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-set
122 06:43:45.859103 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-test-shell
123 06:43:45.859230 Updating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-install-packages (oe)
124 06:43:45.859410 Updating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/bin/lava-installed-packages (oe)
125 06:43:45.859551 Creating /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/environment
126 06:43:45.859655 LAVA metadata
127 06:43:45.859728 - LAVA_JOB_ID=12434479
128 06:43:45.859795 - LAVA_DISPATCHER_IP=192.168.201.1
129 06:43:45.859896 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 06:43:45.859965 skipped lava-vland-overlay
131 06:43:45.860038 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 06:43:45.860119 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 06:43:45.860179 skipped lava-multinode-overlay
134 06:43:45.860249 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 06:43:45.860329 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 06:43:45.860404 Loading test definitions
137 06:43:45.860497 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 06:43:45.860572 Using /lava-12434479 at stage 0
139 06:43:45.860884 uuid=12434479_1.4.2.3.1 testdef=None
140 06:43:45.860973 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 06:43:45.861059 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 06:43:45.861597 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 06:43:45.861812 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 06:43:45.862438 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 06:43:45.862670 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 06:43:45.863290 runner path: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/0/tests/0_dmesg test_uuid 12434479_1.4.2.3.1
149 06:43:45.863485 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 06:43:45.863710 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 06:43:45.863781 Using /lava-12434479 at stage 1
153 06:43:45.864085 uuid=12434479_1.4.2.3.5 testdef=None
154 06:43:45.864171 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 06:43:45.864254 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 06:43:45.864725 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 06:43:45.864939 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 06:43:45.865590 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 06:43:45.865816 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 06:43:45.866432 runner path: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/1/tests/1_bootrr test_uuid 12434479_1.4.2.3.5
163 06:43:45.866581 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 06:43:45.866788 Creating lava-test-runner.conf files
166 06:43:45.866852 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/0 for stage 0
167 06:43:45.866941 - 0_dmesg
168 06:43:45.867022 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434479/lava-overlay-mizg9yqn/lava-12434479/1 for stage 1
169 06:43:45.867113 - 1_bootrr
170 06:43:45.867207 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 06:43:45.867292 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 06:43:45.875828 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 06:43:45.875946 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 06:43:45.876031 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 06:43:45.876116 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 06:43:45.876199 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 06:43:46.127858 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 06:43:46.128273 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 06:43:46.128427 extracting modules file /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434479/extract-overlay-ramdisk-3xqj7ndl/ramdisk
180 06:43:46.141402 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 06:43:46.141517 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 06:43:46.141606 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434479/compress-overlay-us_tlvy0/overlay-1.4.2.4.tar.gz to ramdisk
183 06:43:46.141676 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434479/compress-overlay-us_tlvy0/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12434479/extract-overlay-ramdisk-3xqj7ndl/ramdisk
184 06:43:46.150427 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 06:43:46.150537 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 06:43:46.150626 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 06:43:46.150716 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 06:43:46.150792 Building ramdisk /var/lib/lava/dispatcher/tmp/12434479/extract-overlay-ramdisk-3xqj7ndl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12434479/extract-overlay-ramdisk-3xqj7ndl/ramdisk
189 06:43:46.278194 >> 49788 blocks
190 06:43:47.112643 rename /var/lib/lava/dispatcher/tmp/12434479/extract-overlay-ramdisk-3xqj7ndl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/ramdisk/ramdisk.cpio.gz
191 06:43:47.113080 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 06:43:47.113201 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 06:43:47.113301 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 06:43:47.113398 No mkimage arch provided, not using FIT.
195 06:43:47.113489 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 06:43:47.113571 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 06:43:47.113673 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 06:43:47.113764 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 06:43:47.113845 No LXC device requested
200 06:43:47.113921 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 06:43:47.114006 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 06:43:47.114086 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 06:43:47.114156 Checking files for TFTP limit of 4294967296 bytes.
204 06:43:47.114559 end: 1 tftp-deploy (duration 00:00:01) [common]
205 06:43:47.114663 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 06:43:47.114752 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 06:43:47.114868 substitutions:
208 06:43:47.114931 - {DTB}: None
209 06:43:47.114992 - {INITRD}: 12434479/tftp-deploy-8hn82sqf/ramdisk/ramdisk.cpio.gz
210 06:43:47.115050 - {KERNEL}: 12434479/tftp-deploy-8hn82sqf/kernel/bzImage
211 06:43:47.115106 - {LAVA_MAC}: None
212 06:43:47.115160 - {PRESEED_CONFIG}: None
213 06:43:47.115214 - {PRESEED_LOCAL}: None
214 06:43:47.115267 - {RAMDISK}: 12434479/tftp-deploy-8hn82sqf/ramdisk/ramdisk.cpio.gz
215 06:43:47.115320 - {ROOT_PART}: None
216 06:43:47.115404 - {ROOT}: None
217 06:43:47.115471 - {SERVER_IP}: 192.168.201.1
218 06:43:47.115522 - {TEE}: None
219 06:43:47.115575 Parsed boot commands:
220 06:43:47.115627 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 06:43:47.115804 Parsed boot commands: tftpboot 192.168.201.1 12434479/tftp-deploy-8hn82sqf/kernel/bzImage 12434479/tftp-deploy-8hn82sqf/kernel/cmdline 12434479/tftp-deploy-8hn82sqf/ramdisk/ramdisk.cpio.gz
222 06:43:47.115890 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 06:43:47.115975 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 06:43:47.116064 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 06:43:47.116154 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 06:43:47.116223 Not connected, no need to disconnect.
227 06:43:47.116295 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 06:43:47.116377 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 06:43:47.116443 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
230 06:43:47.120609 Setting prompt string to ['lava-test: # ']
231 06:43:47.120963 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 06:43:47.121070 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 06:43:47.121167 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 06:43:47.121255 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 06:43:47.121441 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
236 06:43:52.267342 >> Command sent successfully.
237 06:43:52.278026 Returned 0 in 5 seconds
238 06:43:52.379308 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 06:43:52.380774 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 06:43:52.381259 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 06:43:52.381701 Setting prompt string to 'Starting depthcharge on Volmar...'
243 06:43:52.382049 Changing prompt to 'Starting depthcharge on Volmar...'
244 06:43:52.382372 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 06:43:52.383564 [Enter `^Ec?' for help]
246 06:43:53.746447
247 06:43:53.747022
248 06:43:53.754045 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 06:43:53.757962 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 06:43:53.761031 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 06:43:53.768708 CPU: AES supported, TXT NOT supported, VT supported
252 06:43:53.776616 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 06:43:53.777051 Cache size = 10 MiB
254 06:43:53.784282 MCH: device id 4609 (rev 04) is Alderlake-P
255 06:43:53.787882 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 06:43:53.791760 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 06:43:53.795885 VBOOT: Loading verstage.
258 06:43:53.799299 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 06:43:53.803479 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 06:43:53.810484 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 06:43:53.818581 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 06:43:53.826120 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 06:43:53.826692
264 06:43:53.827031
265 06:43:53.833703 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 06:43:53.841483 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 06:43:53.845544 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 06:43:53.849276 done! DID_VID 0x00281ae0
269 06:43:53.849732 TPM ready after 0 ms
270 06:43:53.853103 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
271 06:43:53.864807 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
272 06:43:53.871818 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
273 06:43:53.934163 tlcl_send_startup: Startup return code is 0
274 06:43:53.934740 TPM: setup succeeded
275 06:43:53.954480 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
276 06:43:53.976162 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 06:43:53.980292 Chrome EC: UHEPI supported
278 06:43:53.983657 Reading cr50 boot mode
279 06:43:53.998795 Cr50 says boot_mode is VERIFIED_RW(0x00).
280 06:43:53.999416 Phase 1
281 06:43:54.004859 FMAP: area GBB found @ 1805000 (458752 bytes)
282 06:43:54.012305 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
283 06:43:54.019746 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
284 06:43:54.026678 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 06:43:54.027272 Phase 2
286 06:43:54.027716 Phase 3
287 06:43:54.032660 FMAP: area GBB found @ 1805000 (458752 bytes)
288 06:43:54.036633 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
289 06:43:54.042947 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
290 06:43:54.049068 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 06:43:54.055813 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
292 06:43:54.062330 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
293 06:43:54.070477 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
294 06:43:54.083625 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
295 06:43:54.087374 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 06:43:54.094400 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 06:43:54.098284 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
298 06:43:54.104695 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
299 06:43:54.114743 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
300 06:43:54.115181 Phase 4
301 06:43:54.121050 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
302 06:43:54.127586 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
303 06:43:54.339555 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
304 06:43:54.345807 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
305 06:43:54.348993 Saving vboot hash.
306 06:43:54.356124 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
307 06:43:54.372309 tlcl_extend: response is 0
308 06:43:54.379206 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
309 06:43:54.382644 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
310 06:43:54.399775 tlcl_extend: response is 0
311 06:43:54.406801 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
312 06:43:54.422248 tlcl_lock_nv_write: response is 0
313 06:43:54.444419 tlcl_lock_nv_write: response is 0
314 06:43:54.445022 Slot A is selected
315 06:43:54.451119 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
316 06:43:54.457662 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
317 06:43:54.464365 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
318 06:43:54.471538 BS: verstage times (exec / console): total (unknown) / 256 ms
319 06:43:54.471972
320 06:43:54.472312
321 06:43:54.478198 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
322 06:43:54.483034 Google Chrome EC: version:
323 06:43:54.486571 ro: volmar_v2.0.14126-e605144e9c
324 06:43:54.489472 rw: volmar_v0.0.55-22d1557
325 06:43:54.493017 running image: 2
326 06:43:54.496459 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
327 06:43:54.506032 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 06:43:54.513014 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 06:43:54.519502 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
330 06:43:54.529892 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
331 06:43:54.539752 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
332 06:43:54.542918 EC took 967us to calculate image hash
333 06:43:54.553316 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 06:43:54.556345 VB2:sync_ec() select_rw=RW(active)
335 06:43:54.567996 Waited 269us to clear limit power flag.
336 06:43:54.571184 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
337 06:43:54.575241 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
338 06:43:54.578086 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
339 06:43:54.584669 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
340 06:43:54.588054 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
341 06:43:54.591510 TCO_STS: 0000 0000
342 06:43:54.592007 GEN_PMCON: d0015038 00002200
343 06:43:54.594459 GBLRST_CAUSE: 00000000 00000000
344 06:43:54.597562 HPR_CAUSE0: 00000000
345 06:43:54.601100 prev_sleep_state 5
346 06:43:54.604050 Abort disabling TXT, as CPU is not TXT capable.
347 06:43:54.611681 cse_lite: Number of partitions = 3
348 06:43:54.615101 cse_lite: Current partition = RO
349 06:43:54.615569 cse_lite: Next partition = RO
350 06:43:54.618644 cse_lite: Flags = 0x7
351 06:43:54.625402 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
352 06:43:54.635283 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
353 06:43:54.638282 FMAP: area SI_ME found @ 1000 (5238784 bytes)
354 06:43:54.644788 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
355 06:43:54.651817 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
356 06:43:54.658216 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
357 06:43:54.661802 cse_lite: CSE CBFS RW version : 16.1.25.2049
358 06:43:54.668273 cse_lite: Set Boot Partition Info Command (RW)
359 06:43:54.671394 HECI: Global Reset(Type:1) Command
360 06:43:56.114118 4
361 06:43:56.114943 Cache size = 10 MiB
362 06:43:56.120697 MCH: device id 4609 (rev 04) is Alderlake-P
363 06:43:56.124302 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
364 06:43:56.127506 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
365 06:43:56.131504 VBOOT: Loading verstage.
366 06:43:56.135126 FMAP: Found "FLASH" version 1.1 at 0x1804000.
367 06:43:56.142210 FMAP: base = 0x0 size = 0x2000000 #areas = 37
368 06:43:56.145147 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
369 06:43:56.152795 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
370 06:43:56.163076 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
371 06:43:56.163706
372 06:43:56.164086
373 06:43:56.172619 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
374 06:43:56.176301 Probing TPM I2C: I2C bus 1 version 0x3230302a
375 06:43:56.183054 DW I2C bus 1 at 0xfe022000 (400 KHz)
376 06:43:56.183701 done! DID_VID 0x00281ae0
377 06:43:56.186372 TPM ready after 0 ms
378 06:43:56.190469 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
379 06:43:56.201038 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
380 06:43:56.209002 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
381 06:43:56.263897 tlcl_send_startup: Startup return code is 0
382 06:43:56.264468 TPM: setup succeeded
383 06:43:56.284308 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
384 06:43:56.305939 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
385 06:43:56.309710 Chrome EC: UHEPI supported
386 06:43:56.313193 Reading cr50 boot mode
387 06:43:56.328422 Cr50 says boot_mode is VERIFIED_RW(0x00).
388 06:43:56.329077 Phase 1
389 06:43:56.335537 FMAP: area GBB found @ 1805000 (458752 bytes)
390 06:43:56.341779 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
391 06:43:56.348457 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
392 06:43:56.355257 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
393 06:43:56.355906 Phase 2
394 06:43:56.358454 Phase 3
395 06:43:56.361609 FMAP: area GBB found @ 1805000 (458752 bytes)
396 06:43:56.368300 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
397 06:43:56.371482 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
398 06:43:56.378103 VB2:vb2_verify_keyblock() Checking keyblock signature...
399 06:43:56.384824 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
400 06:43:56.391943 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
401 06:43:56.401718 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
402 06:43:56.412952 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
403 06:43:56.417052 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 06:43:56.422925 VB2:vb2_verify_fw_preamble() Verifying preamble.
405 06:43:56.429800 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
406 06:43:56.437359 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
407 06:43:56.443508 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
408 06:43:56.447183 Phase 4
409 06:43:56.450799 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
410 06:43:56.457100 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
411 06:43:56.669445 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
412 06:43:56.676201 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
413 06:43:56.679541 Saving vboot hash.
414 06:43:56.686381 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
415 06:43:56.702193 tlcl_extend: response is 0
416 06:43:56.708362 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
417 06:43:56.715165 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
418 06:43:56.730070 tlcl_extend: response is 0
419 06:43:56.735927 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
420 06:43:56.755908 tlcl_lock_nv_write: response is 0
421 06:43:56.775178 tlcl_lock_nv_write: response is 0
422 06:43:56.775824 Slot A is selected
423 06:43:56.782345 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
424 06:43:56.788435 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
425 06:43:56.795124 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
426 06:43:56.802275 BS: verstage times (exec / console): total (unknown) / 256 ms
427 06:43:56.802852
428 06:43:56.803228
429 06:43:56.809236 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
430 06:43:56.812867 Google Chrome EC: version:
431 06:43:56.815827 ro: volmar_v2.0.14126-e605144e9c
432 06:43:56.819113 rw: volmar_v0.0.55-22d1557
433 06:43:56.822390 running image: 2
434 06:43:56.825732 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
435 06:43:56.835331 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
436 06:43:56.842025 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
437 06:43:56.849176 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
438 06:43:56.858757 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
439 06:43:56.869094 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
440 06:43:56.872241 EC took 941us to calculate image hash
441 06:43:56.882407 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
442 06:43:56.885649 VB2:sync_ec() select_rw=RW(active)
443 06:43:56.898479 Waited 269us to clear limit power flag.
444 06:43:56.901522 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
445 06:43:56.905749 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
446 06:43:56.909367 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
447 06:43:56.912867 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
448 06:43:56.916349 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
449 06:43:56.919908 TCO_STS: 0000 0000
450 06:43:56.922736 GEN_PMCON: d1001038 00002200
451 06:43:56.926148 GBLRST_CAUSE: 00000040 00000000
452 06:43:56.929889 HPR_CAUSE0: 00000000
453 06:43:56.930459 prev_sleep_state 5
454 06:43:56.936394 Abort disabling TXT, as CPU is not TXT capable.
455 06:43:56.939674 cse_lite: Number of partitions = 3
456 06:43:56.943552 cse_lite: Current partition = RW
457 06:43:56.946375 cse_lite: Next partition = RW
458 06:43:56.949560 cse_lite: Flags = 0x7
459 06:43:56.955823 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
460 06:43:56.962892 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
461 06:43:56.969522 FMAP: area SI_ME found @ 1000 (5238784 bytes)
462 06:43:56.976457 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
463 06:43:56.982888 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
464 06:43:56.989837 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
465 06:43:56.992827 cse_lite: CSE CBFS RW version : 16.1.25.2049
466 06:43:56.996012 Boot Count incremented to 4305
467 06:43:57.002898 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
468 06:43:57.009377 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
469 06:43:57.021694 Probing TPM I2C: done! DID_VID 0x00281ae0
470 06:43:57.024600 Locality already claimed
471 06:43:57.027685 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
472 06:43:57.047498 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
473 06:43:57.054425 MRC: Hash idx 0x100d comparison successful.
474 06:43:57.057601 MRC cache found, size f6c8
475 06:43:57.058175 bootmode is set to: 2
476 06:43:57.062224 EC returned error result code 3
477 06:43:57.065384 FW_CONFIG value from CBI is 0x131
478 06:43:57.071928 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
479 06:43:57.075051 SPD index = 0
480 06:43:57.081900 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
481 06:43:57.082475 SPD: module type is LPDDR4X
482 06:43:57.088589 SPD: module part number is K4U6E3S4AB-MGCL
483 06:43:57.095055 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
484 06:43:57.098916 SPD: device width 16 bits, bus width 16 bits
485 06:43:57.101774 SPD: module size is 1024 MB (per channel)
486 06:43:57.170413 CBMEM:
487 06:43:57.173535 IMD: root @ 0x76fff000 254 entries.
488 06:43:57.176667 IMD: root @ 0x76ffec00 62 entries.
489 06:43:57.184713 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
490 06:43:57.187644 RO_VPD is uninitialized or empty.
491 06:43:57.191295 FMAP: area RW_VPD found @ f29000 (8192 bytes)
492 06:43:57.197964 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
493 06:43:57.201291 External stage cache:
494 06:43:57.204721 IMD: root @ 0x7bbff000 254 entries.
495 06:43:57.207430 IMD: root @ 0x7bbfec00 62 entries.
496 06:43:57.214450 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
497 06:43:57.220961 MRC: Checking cached data update for 'RW_MRC_CACHE'.
498 06:43:57.224584 MRC: 'RW_MRC_CACHE' does not need update.
499 06:43:57.225162 8 DIMMs found
500 06:43:57.227663 SMM Memory Map
501 06:43:57.231318 SMRAM : 0x7b800000 0x800000
502 06:43:57.233994 Subregion 0: 0x7b800000 0x200000
503 06:43:57.237870 Subregion 1: 0x7ba00000 0x200000
504 06:43:57.240944 Subregion 2: 0x7bc00000 0x400000
505 06:43:57.243974 top_of_ram = 0x77000000
506 06:43:57.247338 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
507 06:43:57.254130 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
508 06:43:57.261205 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
509 06:43:57.264018 MTRR Range: Start=ff000000 End=0 (Size 1000000)
510 06:43:57.264458 Normal boot
511 06:43:57.274675 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
512 06:43:57.280813 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
513 06:43:57.287612 Processing 237 relocs. Offset value of 0x74ab9000
514 06:43:57.295574 BS: romstage times (exec / console): total (unknown) / 377 ms
515 06:43:57.302963
516 06:43:57.303580
517 06:43:57.309906 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
518 06:43:57.310478 Normal boot
519 06:43:57.316161 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
520 06:43:57.322563 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
521 06:43:57.330103 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
522 06:43:57.339318 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
523 06:43:57.387891 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
524 06:43:57.394122 Processing 5931 relocs. Offset value of 0x72a2f000
525 06:43:57.397264 BS: postcar times (exec / console): total (unknown) / 51 ms
526 06:43:57.400674
527 06:43:57.401244
528 06:43:57.407535 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
529 06:43:57.410466 Reserving BERT start 76a1e000, size 10000
530 06:43:57.413842 Normal boot
531 06:43:57.417611 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
532 06:43:57.423952 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
533 06:43:57.434036 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
534 06:43:57.437083 FMAP: area RW_VPD found @ f29000 (8192 bytes)
535 06:43:57.440686 Google Chrome EC: version:
536 06:43:57.444218 ro: volmar_v2.0.14126-e605144e9c
537 06:43:57.447324 rw: volmar_v0.0.55-22d1557
538 06:43:57.447935 running image: 2
539 06:43:57.453815 ACPI _SWS is PM1 Index 8 GPE Index -1
540 06:43:57.457054 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
541 06:43:57.460815 EC returned error result code 3
542 06:43:57.464563 FW_CONFIG value from CBI is 0x131
543 06:43:57.471045 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
544 06:43:57.474698 PCI: 00:1c.2 disabled by fw_config
545 06:43:57.482044 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
546 06:43:57.484738 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
547 06:43:57.491784 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
548 06:43:57.495524 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
549 06:43:57.501769 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
550 06:43:57.509083 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
551 06:43:57.511700 microcode: sig=0x906a4 pf=0x80 revision=0x423
552 06:43:57.518886 microcode: Update skipped, already up-to-date
553 06:43:57.525433 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
554 06:43:57.557379 Detected 6 core, 8 thread CPU.
555 06:43:57.560685 Setting up SMI for CPU
556 06:43:57.563927 IED base = 0x7bc00000
557 06:43:57.564778 IED size = 0x00400000
558 06:43:57.566995 Will perform SMM setup.
559 06:43:57.570010 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
560 06:43:57.574021 LAPIC 0x0 in XAPIC mode.
561 06:43:57.584519 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
562 06:43:57.586843 Processing 18 relocs. Offset value of 0x00030000
563 06:43:57.591720 Attempting to start 7 APs
564 06:43:57.594787 Waiting for 10ms after sending INIT.
565 06:43:57.608099 Waiting for SIPI to complete...
566 06:43:57.611115 done.
567 06:43:57.611723 LAPIC 0x1 in XAPIC mode.
568 06:43:57.614781 Waiting for SIPI to complete...
569 06:43:57.617810 done.
570 06:43:57.618296 LAPIC 0x12 in XAPIC mode.
571 06:43:57.621297 LAPIC 0x9 in XAPIC mode.
572 06:43:57.624615 LAPIC 0x14 in XAPIC mode.
573 06:43:57.627899 LAPIC 0x10 in XAPIC mode.
574 06:43:57.631162 LAPIC 0x8 in XAPIC mode.
575 06:43:57.631822 LAPIC 0x16 in XAPIC mode.
576 06:43:57.637959 AP: slot 5 apic_id 9, MCU rev: 0x00000423
577 06:43:57.641158 AP: slot 1 apic_id 12, MCU rev: 0x00000423
578 06:43:57.644619 AP: slot 3 apic_id 16, MCU rev: 0x00000423
579 06:43:57.647557 AP: slot 6 apic_id 8, MCU rev: 0x00000423
580 06:43:57.654167 AP: slot 2 apic_id 14, MCU rev: 0x00000423
581 06:43:57.658021 AP: slot 4 apic_id 10, MCU rev: 0x00000423
582 06:43:57.660890 AP: slot 7 apic_id 1, MCU rev: 0x00000423
583 06:43:57.664595 smm_setup_relocation_handler: enter
584 06:43:57.668000 smm_setup_relocation_handler: exit
585 06:43:57.677996 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
586 06:43:57.681012 Processing 11 relocs. Offset value of 0x00038000
587 06:43:57.687879 smm_module_setup_stub: stack_top = 0x7b804000
588 06:43:57.691128 smm_module_setup_stub: per cpu stack_size = 0x800
589 06:43:57.698953 smm_module_setup_stub: runtime.start32_offset = 0x4c
590 06:43:57.701571 smm_module_setup_stub: runtime.smm_size = 0x10000
591 06:43:57.707658 SMM Module: stub loaded at 38000. Will call 0x76a52094
592 06:43:57.711226 Installing permanent SMM handler to 0x7b800000
593 06:43:57.717880 smm_load_module: total_smm_space_needed e468, available -> 200000
594 06:43:57.728158 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
595 06:43:57.731501 Processing 255 relocs. Offset value of 0x7b9f6000
596 06:43:57.734656 smm_load_module: smram_start: 0x7b800000
597 06:43:57.741151 smm_load_module: smram_end: 7ba00000
598 06:43:57.744211 smm_load_module: handler start 0x7b9f6d5f
599 06:43:57.747813 smm_load_module: handler_size 98d0
600 06:43:57.751102 smm_load_module: fxsave_area 0x7b9ff000
601 06:43:57.754145 smm_load_module: fxsave_size 1000
602 06:43:57.758003 smm_load_module: CONFIG_MSEG_SIZE 0x0
603 06:43:57.764156 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
604 06:43:57.771190 smm_load_module: handler_mod_params.smbase = 0x7b800000
605 06:43:57.774713 smm_load_module: per_cpu_save_state_size = 0x400
606 06:43:57.778272 smm_load_module: num_cpus = 0x8
607 06:43:57.784447 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
608 06:43:57.788281 smm_load_module: total_save_state_size = 0x2000
609 06:43:57.791187 smm_load_module: cpu0 entry: 7b9e6000
610 06:43:57.798650 smm_create_map: cpus allowed in one segment 30
611 06:43:57.801604 smm_create_map: min # of segments needed 1
612 06:43:57.802187 CPU 0x0
613 06:43:57.805471 smbase 7b9e6000 entry 7b9ee000
614 06:43:57.811504 ss_start 7b9f5c00 code_end 7b9ee208
615 06:43:57.812090 CPU 0x1
616 06:43:57.814542 smbase 7b9e5c00 entry 7b9edc00
617 06:43:57.821724 ss_start 7b9f5800 code_end 7b9ede08
618 06:43:57.822330 CPU 0x2
619 06:43:57.825092 smbase 7b9e5800 entry 7b9ed800
620 06:43:57.828380 ss_start 7b9f5400 code_end 7b9eda08
621 06:43:57.831564 CPU 0x3
622 06:43:57.835220 smbase 7b9e5400 entry 7b9ed400
623 06:43:57.837753 ss_start 7b9f5000 code_end 7b9ed608
624 06:43:57.838234 CPU 0x4
625 06:43:57.841231 smbase 7b9e5000 entry 7b9ed000
626 06:43:57.847820 ss_start 7b9f4c00 code_end 7b9ed208
627 06:43:57.848370 CPU 0x5
628 06:43:57.851431 smbase 7b9e4c00 entry 7b9ecc00
629 06:43:57.857785 ss_start 7b9f4800 code_end 7b9ece08
630 06:43:57.858367 CPU 0x6
631 06:43:57.861643 smbase 7b9e4800 entry 7b9ec800
632 06:43:57.864503 ss_start 7b9f4400 code_end 7b9eca08
633 06:43:57.867514 CPU 0x7
634 06:43:57.871454 smbase 7b9e4400 entry 7b9ec400
635 06:43:57.874481 ss_start 7b9f4000 code_end 7b9ec608
636 06:43:57.884417 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
637 06:43:57.887751 Processing 11 relocs. Offset value of 0x7b9ee000
638 06:43:57.894473 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
639 06:43:57.901208 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
640 06:43:57.907905 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
641 06:43:57.911255 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
642 06:43:57.917998 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
643 06:43:57.924782 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
644 06:43:57.931097 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
645 06:43:57.937843 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
646 06:43:57.944438 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
647 06:43:57.951069 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
648 06:43:57.958314 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
649 06:43:57.964447 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
650 06:43:57.970751 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
651 06:43:57.974445 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
652 06:43:57.980806 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
653 06:43:57.987676 smm_module_setup_stub: stack_top = 0x7b804000
654 06:43:57.991209 smm_module_setup_stub: per cpu stack_size = 0x800
655 06:43:57.997994 smm_module_setup_stub: runtime.start32_offset = 0x4c
656 06:43:58.001541 smm_module_setup_stub: runtime.smm_size = 0x200000
657 06:43:58.007884 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
658 06:43:58.011883 Clearing SMI status registers
659 06:43:58.015398 SMI_STS: PM1
660 06:43:58.015977 PM1_STS: WAK PWRBTN
661 06:43:58.024775 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
662 06:43:58.028261 In relocation handler: CPU 0
663 06:43:58.032278 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
664 06:43:58.035118 Writing SMRR. base = 0x7b800006, mask=0xff800c00
665 06:43:58.038242 Relocation complete.
666 06:43:58.045607 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
667 06:43:58.047986 In relocation handler: CPU 7
668 06:43:58.051817 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
669 06:43:58.054659 Relocation complete.
670 06:43:58.061861 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
671 06:43:58.065167 In relocation handler: CPU 1
672 06:43:58.068328 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
673 06:43:58.075237 Writing SMRR. base = 0x7b800006, mask=0xff800c00
674 06:43:58.075875 Relocation complete.
675 06:43:58.081959 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
676 06:43:58.084690 In relocation handler: CPU 2
677 06:43:58.088185 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
678 06:43:58.095010 Writing SMRR. base = 0x7b800006, mask=0xff800c00
679 06:43:58.098690 Relocation complete.
680 06:43:58.105136 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
681 06:43:58.108348 In relocation handler: CPU 3
682 06:43:58.111476 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
683 06:43:58.115095 Writing SMRR. base = 0x7b800006, mask=0xff800c00
684 06:43:58.118370 Relocation complete.
685 06:43:58.125697 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
686 06:43:58.128869 In relocation handler: CPU 4
687 06:43:58.132077 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
688 06:43:58.138150 Writing SMRR. base = 0x7b800006, mask=0xff800c00
689 06:43:58.138726 Relocation complete.
690 06:43:58.145196 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
691 06:43:58.148245 In relocation handler: CPU 5
692 06:43:58.154780 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
693 06:43:58.155385 Relocation complete.
694 06:43:58.160995 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
695 06:43:58.164302 In relocation handler: CPU 6
696 06:43:58.171083 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
697 06:43:58.174243 Writing SMRR. base = 0x7b800006, mask=0xff800c00
698 06:43:58.177807 Relocation complete.
699 06:43:58.177912 Initializing CPU #0
700 06:43:58.181038 CPU: vendor Intel device 906a4
701 06:43:58.184530 CPU: family 06, model 9a, stepping 04
702 06:43:58.187716 Clearing out pending MCEs
703 06:43:58.190969 cpu: energy policy set to 7
704 06:43:58.194406 Turbo is available but hidden
705 06:43:58.197705 Turbo is available and visible
706 06:43:58.201030 microcode: Update skipped, already up-to-date
707 06:43:58.204874 CPU #0 initialized
708 06:43:58.205113 Initializing CPU #7
709 06:43:58.207579 Initializing CPU #1
710 06:43:58.211126 Initializing CPU #3
711 06:43:58.214623 CPU: vendor Intel device 906a4
712 06:43:58.217761 CPU: family 06, model 9a, stepping 04
713 06:43:58.218169 Initializing CPU #5
714 06:43:58.220790 Initializing CPU #4
715 06:43:58.224170 Clearing out pending MCEs
716 06:43:58.227193 CPU: vendor Intel device 906a4
717 06:43:58.230464 CPU: family 06, model 9a, stepping 04
718 06:43:58.234079 CPU: vendor Intel device 906a4
719 06:43:58.237152 CPU: family 06, model 9a, stepping 04
720 06:43:58.240666 cpu: energy policy set to 7
721 06:43:58.244004 CPU: vendor Intel device 906a4
722 06:43:58.247531 CPU: family 06, model 9a, stepping 04
723 06:43:58.250320 Clearing out pending MCEs
724 06:43:58.254024 Clearing out pending MCEs
725 06:43:58.254163 Initializing CPU #2
726 06:43:58.257283 cpu: energy policy set to 7
727 06:43:58.260635 microcode: Update skipped, already up-to-date
728 06:43:58.263845 CPU #1 initialized
729 06:43:58.267198 CPU: vendor Intel device 906a4
730 06:43:58.270952 CPU: family 06, model 9a, stepping 04
731 06:43:58.273964 CPU: vendor Intel device 906a4
732 06:43:58.277376 CPU: family 06, model 9a, stepping 04
733 06:43:58.280507 cpu: energy policy set to 7
734 06:43:58.284022 Clearing out pending MCEs
735 06:43:58.287242 microcode: Update skipped, already up-to-date
736 06:43:58.290701 CPU #3 initialized
737 06:43:58.294193 Clearing out pending MCEs
738 06:43:58.297776 microcode: Update skipped, already up-to-date
739 06:43:58.298190 CPU #4 initialized
740 06:43:58.300908 cpu: energy policy set to 7
741 06:43:58.303978 Clearing out pending MCEs
742 06:43:58.310916 microcode: Update skipped, already up-to-date
743 06:43:58.311406 CPU #2 initialized
744 06:43:58.314254 Initializing CPU #6
745 06:43:58.317544 cpu: energy policy set to 7
746 06:43:58.320555 CPU: vendor Intel device 906a4
747 06:43:58.324012 CPU: family 06, model 9a, stepping 04
748 06:43:58.327582 microcode: Update skipped, already up-to-date
749 06:43:58.330760 CPU #5 initialized
750 06:43:58.331206 cpu: energy policy set to 7
751 06:43:58.333896 Clearing out pending MCEs
752 06:43:58.340872 microcode: Update skipped, already up-to-date
753 06:43:58.341350 CPU #7 initialized
754 06:43:58.343791 cpu: energy policy set to 7
755 06:43:58.347409 microcode: Update skipped, already up-to-date
756 06:43:58.350789 CPU #6 initialized
757 06:43:58.354050 bsp_do_flight_plan done after 734 msecs.
758 06:43:58.357597 CPU: frequency set to 4400 MHz
759 06:43:58.360851 Enabling SMIs.
760 06:43:58.367485 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
761 06:43:58.382224 Probing TPM I2C: done! DID_VID 0x00281ae0
762 06:43:58.385403 Locality already claimed
763 06:43:58.389140 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
764 06:43:58.400034 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
765 06:43:58.403322 Enabling GPIO PM b/c CR50 has long IRQ pulse support
766 06:43:58.409881 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
767 06:43:58.416986 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
768 06:43:58.420099 Found a VBT of 9216 bytes after decompression
769 06:43:58.423449 PCI 1.0, PIN A, using IRQ #16
770 06:43:58.426882 PCI 2.0, PIN A, using IRQ #17
771 06:43:58.429979 PCI 4.0, PIN A, using IRQ #18
772 06:43:58.433460 PCI 5.0, PIN A, using IRQ #16
773 06:43:58.437212 PCI 6.0, PIN A, using IRQ #16
774 06:43:58.440276 PCI 6.2, PIN C, using IRQ #18
775 06:43:58.443845 PCI 7.0, PIN A, using IRQ #19
776 06:43:58.446705 PCI 7.1, PIN B, using IRQ #20
777 06:43:58.450217 PCI 7.2, PIN C, using IRQ #21
778 06:43:58.453397 PCI 7.3, PIN D, using IRQ #22
779 06:43:58.456897 PCI 8.0, PIN A, using IRQ #23
780 06:43:58.460058 PCI D.0, PIN A, using IRQ #17
781 06:43:58.460363 PCI D.1, PIN B, using IRQ #19
782 06:43:58.463385 PCI 10.0, PIN A, using IRQ #24
783 06:43:58.466703 PCI 10.1, PIN B, using IRQ #25
784 06:43:58.470072 PCI 10.6, PIN C, using IRQ #20
785 06:43:58.473281 PCI 10.7, PIN D, using IRQ #21
786 06:43:58.476616 PCI 11.0, PIN A, using IRQ #26
787 06:43:58.480304 PCI 11.1, PIN B, using IRQ #27
788 06:43:58.482967 PCI 11.2, PIN C, using IRQ #28
789 06:43:58.486425 PCI 11.3, PIN D, using IRQ #29
790 06:43:58.489711 PCI 12.0, PIN A, using IRQ #30
791 06:43:58.493014 PCI 12.6, PIN B, using IRQ #31
792 06:43:58.496312 PCI 12.7, PIN C, using IRQ #22
793 06:43:58.499897 PCI 13.0, PIN A, using IRQ #32
794 06:43:58.503198 PCI 13.1, PIN B, using IRQ #33
795 06:43:58.506110 PCI 13.2, PIN C, using IRQ #34
796 06:43:58.510191 PCI 13.3, PIN D, using IRQ #35
797 06:43:58.512930 PCI 14.0, PIN B, using IRQ #23
798 06:43:58.513017 PCI 14.1, PIN A, using IRQ #36
799 06:43:58.516123 PCI 14.3, PIN C, using IRQ #17
800 06:43:58.519904 PCI 15.0, PIN A, using IRQ #37
801 06:43:58.522835 PCI 15.1, PIN B, using IRQ #38
802 06:43:58.526424 PCI 15.2, PIN C, using IRQ #39
803 06:43:58.529446 PCI 15.3, PIN D, using IRQ #40
804 06:43:58.533052 PCI 16.0, PIN A, using IRQ #18
805 06:43:58.536329 PCI 16.1, PIN B, using IRQ #19
806 06:43:58.539520 PCI 16.2, PIN C, using IRQ #20
807 06:43:58.542722 PCI 16.3, PIN D, using IRQ #21
808 06:43:58.546295 PCI 16.4, PIN A, using IRQ #18
809 06:43:58.549377 PCI 16.5, PIN B, using IRQ #19
810 06:43:58.552505 PCI 17.0, PIN A, using IRQ #22
811 06:43:58.556122 PCI 19.0, PIN A, using IRQ #41
812 06:43:58.559652 PCI 19.1, PIN B, using IRQ #42
813 06:43:58.562878 PCI 19.2, PIN C, using IRQ #43
814 06:43:58.565959 PCI 1C.0, PIN A, using IRQ #16
815 06:43:58.566073 PCI 1C.1, PIN B, using IRQ #17
816 06:43:58.569222 PCI 1C.2, PIN C, using IRQ #18
817 06:43:58.572711 PCI 1C.3, PIN D, using IRQ #19
818 06:43:58.576185 PCI 1C.4, PIN A, using IRQ #16
819 06:43:58.579502 PCI 1C.5, PIN B, using IRQ #17
820 06:43:58.582502 PCI 1C.6, PIN C, using IRQ #18
821 06:43:58.585737 PCI 1C.7, PIN D, using IRQ #19
822 06:43:58.589327 PCI 1D.0, PIN A, using IRQ #16
823 06:43:58.592529 PCI 1D.1, PIN B, using IRQ #17
824 06:43:58.595910 PCI 1D.2, PIN C, using IRQ #18
825 06:43:58.598999 PCI 1D.3, PIN D, using IRQ #19
826 06:43:58.603186 PCI 1E.0, PIN A, using IRQ #23
827 06:43:58.606465 PCI 1E.1, PIN B, using IRQ #20
828 06:43:58.609418 PCI 1E.2, PIN C, using IRQ #44
829 06:43:58.613179 PCI 1E.3, PIN D, using IRQ #45
830 06:43:58.616296 PCI 1F.3, PIN B, using IRQ #22
831 06:43:58.619313 PCI 1F.4, PIN C, using IRQ #23
832 06:43:58.619802 PCI 1F.6, PIN D, using IRQ #20
833 06:43:58.623012 PCI 1F.7, PIN A, using IRQ #21
834 06:43:58.629201 IRQ: Using dynamically assigned PCI IO-APIC IRQs
835 06:43:58.635782 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
836 06:43:58.818498 FSPS returned 0
837 06:43:58.822173 Executing Phase 1 of FspMultiPhaseSiInit
838 06:43:58.832018 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
839 06:43:58.835316 port C0 DISC req: usage 1 usb3 1 usb2 1
840 06:43:58.838738 Raw Buffer output 0 00000111
841 06:43:58.842008 Raw Buffer output 1 00000000
842 06:43:58.845304 pmc_send_ipc_cmd succeeded
843 06:43:58.851745 port C1 DISC req: usage 1 usb3 3 usb2 3
844 06:43:58.851829 Raw Buffer output 0 00000331
845 06:43:58.855212 Raw Buffer output 1 00000000
846 06:43:58.859754 pmc_send_ipc_cmd succeeded
847 06:43:58.863183 Detected 6 core, 8 thread CPU.
848 06:43:58.866109 Detected 6 core, 8 thread CPU.
849 06:43:58.871637 Detected 6 core, 8 thread CPU.
850 06:43:58.875272 Detected 6 core, 8 thread CPU.
851 06:43:58.878551 Detected 6 core, 8 thread CPU.
852 06:43:58.882031 Detected 6 core, 8 thread CPU.
853 06:43:58.884941 Detected 6 core, 8 thread CPU.
854 06:43:58.888201 Detected 6 core, 8 thread CPU.
855 06:43:58.892150 Detected 6 core, 8 thread CPU.
856 06:43:58.895138 Detected 6 core, 8 thread CPU.
857 06:43:58.898414 Detected 6 core, 8 thread CPU.
858 06:43:58.901478 Detected 6 core, 8 thread CPU.
859 06:43:58.904786 Detected 6 core, 8 thread CPU.
860 06:43:58.908339 Detected 6 core, 8 thread CPU.
861 06:43:58.911701 Detected 6 core, 8 thread CPU.
862 06:43:58.915498 Detected 6 core, 8 thread CPU.
863 06:43:58.918442 Detected 6 core, 8 thread CPU.
864 06:43:58.921836 Detected 6 core, 8 thread CPU.
865 06:43:58.925491 Detected 6 core, 8 thread CPU.
866 06:43:58.928767 Detected 6 core, 8 thread CPU.
867 06:43:58.931550 Detected 6 core, 8 thread CPU.
868 06:43:58.934900 Detected 6 core, 8 thread CPU.
869 06:43:59.224980 Detected 6 core, 8 thread CPU.
870 06:43:59.228611 Detected 6 core, 8 thread CPU.
871 06:43:59.231543 Detected 6 core, 8 thread CPU.
872 06:43:59.235170 Detected 6 core, 8 thread CPU.
873 06:43:59.238279 Detected 6 core, 8 thread CPU.
874 06:43:59.241736 Detected 6 core, 8 thread CPU.
875 06:43:59.245240 Detected 6 core, 8 thread CPU.
876 06:43:59.248542 Detected 6 core, 8 thread CPU.
877 06:43:59.252186 Detected 6 core, 8 thread CPU.
878 06:43:59.254731 Detected 6 core, 8 thread CPU.
879 06:43:59.258403 Detected 6 core, 8 thread CPU.
880 06:43:59.261809 Detected 6 core, 8 thread CPU.
881 06:43:59.265627 Detected 6 core, 8 thread CPU.
882 06:43:59.268165 Detected 6 core, 8 thread CPU.
883 06:43:59.271722 Detected 6 core, 8 thread CPU.
884 06:43:59.275235 Detected 6 core, 8 thread CPU.
885 06:43:59.278517 Detected 6 core, 8 thread CPU.
886 06:43:59.281722 Detected 6 core, 8 thread CPU.
887 06:43:59.285579 Detected 6 core, 8 thread CPU.
888 06:43:59.285967 Detected 6 core, 8 thread CPU.
889 06:43:59.288494 Display FSP Version Info HOB
890 06:43:59.291854 Reference Code - CPU = c.0.65.70
891 06:43:59.295425 uCode Version = 0.0.4.23
892 06:43:59.299213 TXT ACM version = ff.ff.ff.ffff
893 06:43:59.302240 Reference Code - ME = c.0.65.70
894 06:43:59.305495 MEBx version = 0.0.0.0
895 06:43:59.309049 ME Firmware Version = Lite SKU
896 06:43:59.312003 Reference Code - PCH = c.0.65.70
897 06:43:59.315679 PCH-CRID Status = Disabled
898 06:43:59.319238 PCH-CRID Original Value = ff.ff.ff.ffff
899 06:43:59.322542 PCH-CRID New Value = ff.ff.ff.ffff
900 06:43:59.325567 OPROM - RST - RAID = ff.ff.ff.ffff
901 06:43:59.328970 PCH Hsio Version = 4.0.0.0
902 06:43:59.332168 Reference Code - SA - System Agent = c.0.65.70
903 06:43:59.335622 Reference Code - MRC = 0.0.3.80
904 06:43:59.338880 SA - PCIe Version = c.0.65.70
905 06:43:59.342318 SA-CRID Status = Disabled
906 06:43:59.345327 SA-CRID Original Value = 0.0.0.4
907 06:43:59.348840 SA-CRID New Value = 0.0.0.4
908 06:43:59.349120 OPROM - VBIOS = ff.ff.ff.ffff
909 06:43:59.355323 IO Manageability Engine FW Version = 24.0.4.0
910 06:43:59.358966 PHY Build Version = 0.0.0.2016
911 06:43:59.362011 Thunderbolt(TM) FW Version = 0.0.0.0
912 06:43:59.368429 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
913 06:43:59.375971 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 506 ms
914 06:43:59.376349 Enumerating buses...
915 06:43:59.381836 Show all devs... Before device enumeration.
916 06:43:59.382125 Root Device: enabled 1
917 06:43:59.385458 CPU_CLUSTER: 0: enabled 1
918 06:43:59.388796 DOMAIN: 0000: enabled 1
919 06:43:59.391907 GPIO: 0: enabled 1
920 06:43:59.392204 PCI: 00:00.0: enabled 1
921 06:43:59.395385 PCI: 00:01.0: enabled 0
922 06:43:59.398660 PCI: 00:01.1: enabled 0
923 06:43:59.399052 PCI: 00:02.0: enabled 1
924 06:43:59.402001 PCI: 00:04.0: enabled 1
925 06:43:59.405313 PCI: 00:05.0: enabled 0
926 06:43:59.408841 PCI: 00:06.0: enabled 1
927 06:43:59.409123 PCI: 00:06.2: enabled 0
928 06:43:59.411743 PCI: 00:07.0: enabled 0
929 06:43:59.415363 PCI: 00:07.1: enabled 0
930 06:43:59.418615 PCI: 00:07.2: enabled 0
931 06:43:59.418698 PCI: 00:07.3: enabled 0
932 06:43:59.422024 PCI: 00:08.0: enabled 0
933 06:43:59.425640 PCI: 00:09.0: enabled 0
934 06:43:59.428458 PCI: 00:0a.0: enabled 1
935 06:43:59.428542 PCI: 00:0d.0: enabled 1
936 06:43:59.431856 PCI: 00:0d.1: enabled 0
937 06:43:59.435125 PCI: 00:0d.2: enabled 0
938 06:43:59.435209 PCI: 00:0d.3: enabled 0
939 06:43:59.438357 PCI: 00:0e.0: enabled 0
940 06:43:59.441732 PCI: 00:10.0: enabled 0
941 06:43:59.445126 PCI: 00:10.1: enabled 0
942 06:43:59.445213 PCI: 00:10.6: enabled 0
943 06:43:59.448429 PCI: 00:10.7: enabled 0
944 06:43:59.451674 PCI: 00:12.0: enabled 0
945 06:43:59.454868 PCI: 00:12.6: enabled 0
946 06:43:59.454952 PCI: 00:12.7: enabled 0
947 06:43:59.458388 PCI: 00:13.0: enabled 0
948 06:43:59.461792 PCI: 00:14.0: enabled 1
949 06:43:59.465074 PCI: 00:14.1: enabled 0
950 06:43:59.465157 PCI: 00:14.2: enabled 1
951 06:43:59.468679 PCI: 00:14.3: enabled 1
952 06:43:59.471684 PCI: 00:15.0: enabled 1
953 06:43:59.471768 PCI: 00:15.1: enabled 1
954 06:43:59.475227 PCI: 00:15.2: enabled 0
955 06:43:59.478275 PCI: 00:15.3: enabled 1
956 06:43:59.481794 PCI: 00:16.0: enabled 1
957 06:43:59.481878 PCI: 00:16.1: enabled 0
958 06:43:59.484811 PCI: 00:16.2: enabled 0
959 06:43:59.488334 PCI: 00:16.3: enabled 0
960 06:43:59.491990 PCI: 00:16.4: enabled 0
961 06:43:59.492087 PCI: 00:16.5: enabled 0
962 06:43:59.495231 PCI: 00:17.0: enabled 1
963 06:43:59.499309 PCI: 00:19.0: enabled 0
964 06:43:59.501775 PCI: 00:19.1: enabled 1
965 06:43:59.501888 PCI: 00:19.2: enabled 0
966 06:43:59.504846 PCI: 00:1a.0: enabled 0
967 06:43:59.508311 PCI: 00:1c.0: enabled 0
968 06:43:59.508449 PCI: 00:1c.1: enabled 0
969 06:43:59.512162 PCI: 00:1c.2: enabled 0
970 06:43:59.514767 PCI: 00:1c.3: enabled 0
971 06:43:59.518557 PCI: 00:1c.4: enabled 0
972 06:43:59.518734 PCI: 00:1c.5: enabled 0
973 06:43:59.521622 PCI: 00:1c.6: enabled 0
974 06:43:59.525291 PCI: 00:1c.7: enabled 0
975 06:43:59.528862 PCI: 00:1d.0: enabled 0
976 06:43:59.529291 PCI: 00:1d.1: enabled 0
977 06:43:59.532159 PCI: 00:1d.2: enabled 0
978 06:43:59.535011 PCI: 00:1d.3: enabled 0
979 06:43:59.538848 PCI: 00:1e.0: enabled 1
980 06:43:59.539291 PCI: 00:1e.1: enabled 0
981 06:43:59.541944 PCI: 00:1e.2: enabled 0
982 06:43:59.545516 PCI: 00:1e.3: enabled 1
983 06:43:59.546121 PCI: 00:1f.0: enabled 1
984 06:43:59.548507 PCI: 00:1f.1: enabled 0
985 06:43:59.552203 PCI: 00:1f.2: enabled 1
986 06:43:59.555399 PCI: 00:1f.3: enabled 1
987 06:43:59.556020 PCI: 00:1f.4: enabled 0
988 06:43:59.559050 PCI: 00:1f.5: enabled 1
989 06:43:59.562081 PCI: 00:1f.6: enabled 0
990 06:43:59.565282 PCI: 00:1f.7: enabled 0
991 06:43:59.565723 GENERIC: 0.0: enabled 1
992 06:43:59.568518 GENERIC: 0.0: enabled 1
993 06:43:59.572027 GENERIC: 1.0: enabled 1
994 06:43:59.575897 GENERIC: 0.0: enabled 1
995 06:43:59.576344 GENERIC: 1.0: enabled 1
996 06:43:59.579124 USB0 port 0: enabled 1
997 06:43:59.582458 USB0 port 0: enabled 1
998 06:43:59.582904 GENERIC: 0.0: enabled 1
999 06:43:59.585659 I2C: 00:1a: enabled 1
1000 06:43:59.588392 I2C: 00:31: enabled 1
1001 06:43:59.588838 I2C: 00:32: enabled 1
1002 06:43:59.592436 I2C: 00:50: enabled 1
1003 06:43:59.595282 I2C: 00:10: enabled 1
1004 06:43:59.595806 I2C: 00:15: enabled 1
1005 06:43:59.598529 I2C: 00:2c: enabled 1
1006 06:43:59.602107 GENERIC: 0.0: enabled 1
1007 06:43:59.602554 SPI: 00: enabled 1
1008 06:43:59.605119 PNP: 0c09.0: enabled 1
1009 06:43:59.608548 GENERIC: 0.0: enabled 1
1010 06:43:59.612097 USB3 port 0: enabled 1
1011 06:43:59.612544 USB3 port 1: enabled 0
1012 06:43:59.615147 USB3 port 2: enabled 1
1013 06:43:59.618447 USB3 port 3: enabled 0
1014 06:43:59.618892 USB2 port 0: enabled 1
1015 06:43:59.621558 USB2 port 1: enabled 0
1016 06:43:59.624960 USB2 port 2: enabled 1
1017 06:43:59.628705 USB2 port 3: enabled 0
1018 06:43:59.629151 USB2 port 4: enabled 0
1019 06:43:59.631805 USB2 port 5: enabled 1
1020 06:43:59.635021 USB2 port 6: enabled 0
1021 06:43:59.635511 USB2 port 7: enabled 0
1022 06:43:59.638712 USB2 port 8: enabled 1
1023 06:43:59.641545 USB2 port 9: enabled 1
1024 06:43:59.641988 USB3 port 0: enabled 1
1025 06:43:59.645331 USB3 port 1: enabled 0
1026 06:43:59.648517 USB3 port 2: enabled 0
1027 06:43:59.651649 USB3 port 3: enabled 0
1028 06:43:59.652071 GENERIC: 0.0: enabled 1
1029 06:43:59.655064 GENERIC: 1.0: enabled 1
1030 06:43:59.657887 APIC: 00: enabled 1
1031 06:43:59.658314 APIC: 12: enabled 1
1032 06:43:59.661470 APIC: 14: enabled 1
1033 06:43:59.664740 APIC: 16: enabled 1
1034 06:43:59.665305 APIC: 10: enabled 1
1035 06:43:59.668078 APIC: 09: enabled 1
1036 06:43:59.668503 APIC: 08: enabled 1
1037 06:43:59.671564 APIC: 01: enabled 1
1038 06:43:59.674985 Compare with tree...
1039 06:43:59.675467 Root Device: enabled 1
1040 06:43:59.678071 CPU_CLUSTER: 0: enabled 1
1041 06:43:59.681526 APIC: 00: enabled 1
1042 06:43:59.684660 APIC: 12: enabled 1
1043 06:43:59.685228 APIC: 14: enabled 1
1044 06:43:59.688162 APIC: 16: enabled 1
1045 06:43:59.691237 APIC: 10: enabled 1
1046 06:43:59.691809 APIC: 09: enabled 1
1047 06:43:59.694456 APIC: 08: enabled 1
1048 06:43:59.698096 APIC: 01: enabled 1
1049 06:43:59.698535 DOMAIN: 0000: enabled 1
1050 06:43:59.701468 GPIO: 0: enabled 1
1051 06:43:59.705245 PCI: 00:00.0: enabled 1
1052 06:43:59.708034 PCI: 00:01.0: enabled 0
1053 06:43:59.708599 PCI: 00:01.1: enabled 0
1054 06:43:59.711677 PCI: 00:02.0: enabled 1
1055 06:43:59.714859 PCI: 00:04.0: enabled 1
1056 06:43:59.718016 GENERIC: 0.0: enabled 1
1057 06:43:59.721517 PCI: 00:05.0: enabled 0
1058 06:43:59.722053 PCI: 00:06.0: enabled 1
1059 06:43:59.724898 PCI: 00:06.2: enabled 0
1060 06:43:59.728354 PCI: 00:08.0: enabled 0
1061 06:43:59.731392 PCI: 00:09.0: enabled 0
1062 06:43:59.734781 PCI: 00:0a.0: enabled 1
1063 06:43:59.735381 PCI: 00:0d.0: enabled 1
1064 06:43:59.738060 USB0 port 0: enabled 1
1065 06:43:59.741118 USB3 port 0: enabled 1
1066 06:43:59.744607 USB3 port 1: enabled 0
1067 06:43:59.748115 USB3 port 2: enabled 1
1068 06:43:59.748560 USB3 port 3: enabled 0
1069 06:43:59.751336 PCI: 00:0d.1: enabled 0
1070 06:43:59.754714 PCI: 00:0d.2: enabled 0
1071 06:43:59.757688 PCI: 00:0d.3: enabled 0
1072 06:43:59.760840 PCI: 00:0e.0: enabled 0
1073 06:43:59.761144 PCI: 00:10.0: enabled 0
1074 06:43:59.764090 PCI: 00:10.1: enabled 0
1075 06:43:59.767342 PCI: 00:10.6: enabled 0
1076 06:43:59.770964 PCI: 00:10.7: enabled 0
1077 06:43:59.773979 PCI: 00:12.0: enabled 0
1078 06:43:59.774166 PCI: 00:12.6: enabled 0
1079 06:43:59.777550 PCI: 00:12.7: enabled 0
1080 06:43:59.781128 PCI: 00:13.0: enabled 0
1081 06:43:59.784376 PCI: 00:14.0: enabled 1
1082 06:43:59.788026 USB0 port 0: enabled 1
1083 06:43:59.788207 USB2 port 0: enabled 1
1084 06:43:59.790961 USB2 port 1: enabled 0
1085 06:43:59.794025 USB2 port 2: enabled 1
1086 06:43:59.797448 USB2 port 3: enabled 0
1087 06:43:59.801043 USB2 port 4: enabled 0
1088 06:43:59.804286 USB2 port 5: enabled 1
1089 06:43:59.804496 USB2 port 6: enabled 0
1090 06:43:59.807531 USB2 port 7: enabled 0
1091 06:43:59.810681 USB2 port 8: enabled 1
1092 06:43:59.814657 USB2 port 9: enabled 1
1093 06:43:59.817791 USB3 port 0: enabled 1
1094 06:43:59.818209 USB3 port 1: enabled 0
1095 06:43:59.821159 USB3 port 2: enabled 0
1096 06:43:59.824552 USB3 port 3: enabled 0
1097 06:43:59.827592 PCI: 00:14.1: enabled 0
1098 06:43:59.830914 PCI: 00:14.2: enabled 1
1099 06:43:59.834289 PCI: 00:14.3: enabled 1
1100 06:43:59.834855 GENERIC: 0.0: enabled 1
1101 06:43:59.837467 PCI: 00:15.0: enabled 1
1102 06:43:59.841022 I2C: 00:1a: enabled 1
1103 06:43:59.844108 I2C: 00:31: enabled 1
1104 06:43:59.844775 I2C: 00:32: enabled 1
1105 06:43:59.847635 PCI: 00:15.1: enabled 1
1106 06:43:59.851444 I2C: 00:50: enabled 1
1107 06:43:59.854172 PCI: 00:15.2: enabled 0
1108 06:43:59.857650 PCI: 00:15.3: enabled 1
1109 06:43:59.858221 I2C: 00:10: enabled 1
1110 06:43:59.860730 PCI: 00:16.0: enabled 1
1111 06:43:59.864138 PCI: 00:16.1: enabled 0
1112 06:43:59.867804 PCI: 00:16.2: enabled 0
1113 06:43:59.870943 PCI: 00:16.3: enabled 0
1114 06:43:59.871553 PCI: 00:16.4: enabled 0
1115 06:43:59.874490 PCI: 00:16.5: enabled 0
1116 06:43:59.877752 PCI: 00:17.0: enabled 1
1117 06:43:59.880747 PCI: 00:19.0: enabled 0
1118 06:43:59.881313 PCI: 00:19.1: enabled 1
1119 06:43:59.883852 I2C: 00:15: enabled 1
1120 06:43:59.887852 I2C: 00:2c: enabled 1
1121 06:43:59.890761 PCI: 00:19.2: enabled 0
1122 06:43:59.894108 PCI: 00:1a.0: enabled 0
1123 06:43:59.894524 PCI: 00:1e.0: enabled 1
1124 06:43:59.897506 PCI: 00:1e.1: enabled 0
1125 06:43:59.900808 PCI: 00:1e.2: enabled 0
1126 06:43:59.904456 PCI: 00:1e.3: enabled 1
1127 06:43:59.904975 SPI: 00: enabled 1
1128 06:43:59.907625 PCI: 00:1f.0: enabled 1
1129 06:43:59.910741 PNP: 0c09.0: enabled 1
1130 06:43:59.913818 PCI: 00:1f.1: enabled 0
1131 06:43:59.917321 PCI: 00:1f.2: enabled 1
1132 06:43:59.917577 GENERIC: 0.0: enabled 1
1133 06:43:59.920583 GENERIC: 0.0: enabled 1
1134 06:43:59.923864 GENERIC: 1.0: enabled 1
1135 06:43:59.927137 PCI: 00:1f.3: enabled 1
1136 06:43:59.930462 PCI: 00:1f.4: enabled 0
1137 06:43:59.934025 PCI: 00:1f.5: enabled 1
1138 06:43:59.934316 PCI: 00:1f.6: enabled 0
1139 06:43:59.937366 PCI: 00:1f.7: enabled 0
1140 06:43:59.940544 Root Device scanning...
1141 06:43:59.943634 scan_static_bus for Root Device
1142 06:43:59.947241 CPU_CLUSTER: 0 enabled
1143 06:43:59.947560 DOMAIN: 0000 enabled
1144 06:43:59.950889 DOMAIN: 0000 scanning...
1145 06:43:59.953797 PCI: pci_scan_bus for bus 00
1146 06:43:59.957065 PCI: 00:00.0 [8086/0000] ops
1147 06:43:59.960395 PCI: 00:00.0 [8086/4609] enabled
1148 06:43:59.963839 PCI: 00:02.0 [8086/0000] bus ops
1149 06:43:59.967160 PCI: 00:02.0 [8086/46b3] enabled
1150 06:43:59.970182 PCI: 00:04.0 [8086/0000] bus ops
1151 06:43:59.973807 PCI: 00:04.0 [8086/461d] enabled
1152 06:43:59.977291 PCI: 00:06.0 [8086/0000] bus ops
1153 06:43:59.980408 PCI: 00:06.0 [8086/464d] enabled
1154 06:43:59.983647 PCI: 00:08.0 [8086/464f] disabled
1155 06:43:59.987105 PCI: 00:0a.0 [8086/467d] enabled
1156 06:43:59.990535 PCI: 00:0d.0 [8086/0000] bus ops
1157 06:43:59.993909 PCI: 00:0d.0 [8086/461e] enabled
1158 06:43:59.997165 PCI: 00:14.0 [8086/0000] bus ops
1159 06:44:00.000570 PCI: 00:14.0 [8086/51ed] enabled
1160 06:44:00.003637 PCI: 00:14.2 [8086/51ef] enabled
1161 06:44:00.007066 PCI: 00:14.3 [8086/0000] bus ops
1162 06:44:00.010531 PCI: 00:14.3 [8086/51f0] enabled
1163 06:44:00.013805 PCI: 00:15.0 [8086/0000] bus ops
1164 06:44:00.017168 PCI: 00:15.0 [8086/51e8] enabled
1165 06:44:00.020756 PCI: 00:15.1 [8086/0000] bus ops
1166 06:44:00.023962 PCI: 00:15.1 [8086/51e9] enabled
1167 06:44:00.027278 PCI: 00:15.2 [8086/0000] bus ops
1168 06:44:00.030533 PCI: 00:15.2 [8086/51ea] disabled
1169 06:44:00.033947 PCI: 00:15.3 [8086/0000] bus ops
1170 06:44:00.037069 PCI: 00:15.3 [8086/51eb] enabled
1171 06:44:00.040600 PCI: 00:16.0 [8086/0000] ops
1172 06:44:00.043548 PCI: 00:16.0 [8086/51e0] enabled
1173 06:44:00.050334 PCI: Static device PCI: 00:17.0 not found, disabling it.
1174 06:44:00.054045 PCI: 00:19.0 [8086/0000] bus ops
1175 06:44:00.057027 PCI: 00:19.0 [8086/51c5] disabled
1176 06:44:00.060334 PCI: 00:19.1 [8086/0000] bus ops
1177 06:44:00.063523 PCI: 00:19.1 [8086/51c6] enabled
1178 06:44:00.067146 PCI: 00:1e.0 [8086/0000] ops
1179 06:44:00.070516 PCI: 00:1e.0 [8086/51a8] enabled
1180 06:44:00.073792 PCI: 00:1e.3 [8086/0000] bus ops
1181 06:44:00.077107 PCI: 00:1e.3 [8086/51ab] enabled
1182 06:44:00.080276 PCI: 00:1f.0 [8086/0000] bus ops
1183 06:44:00.083554 PCI: 00:1f.0 [8086/5182] enabled
1184 06:44:00.083901 RTC Init
1185 06:44:00.086906 Set power on after power failure.
1186 06:44:00.090632 Disabling Deep S3
1187 06:44:00.093684 Disabling Deep S3
1188 06:44:00.093979 Disabling Deep S4
1189 06:44:00.096741 Disabling Deep S4
1190 06:44:00.097107 Disabling Deep S5
1191 06:44:00.100761 Disabling Deep S5
1192 06:44:00.103697 PCI: 00:1f.2 [0000/0000] hidden
1193 06:44:00.107161 PCI: 00:1f.3 [8086/0000] bus ops
1194 06:44:00.110062 PCI: 00:1f.3 [8086/51c8] enabled
1195 06:44:00.114002 PCI: 00:1f.5 [8086/0000] bus ops
1196 06:44:00.117679 PCI: 00:1f.5 [8086/51a4] enabled
1197 06:44:00.118044 GPIO: 0 enabled
1198 06:44:00.120625 PCI: Leftover static devices:
1199 06:44:00.123910 PCI: 00:01.0
1200 06:44:00.124270 PCI: 00:01.1
1201 06:44:00.124556 PCI: 00:05.0
1202 06:44:00.127104 PCI: 00:06.2
1203 06:44:00.127491 PCI: 00:09.0
1204 06:44:00.130430 PCI: 00:0d.1
1205 06:44:00.130788 PCI: 00:0d.2
1206 06:44:00.131096 PCI: 00:0d.3
1207 06:44:00.134096 PCI: 00:0e.0
1208 06:44:00.134375 PCI: 00:10.0
1209 06:44:00.136965 PCI: 00:10.1
1210 06:44:00.137316 PCI: 00:10.6
1211 06:44:00.140261 PCI: 00:10.7
1212 06:44:00.140618 PCI: 00:12.0
1213 06:44:00.140848 PCI: 00:12.6
1214 06:44:00.143543 PCI: 00:12.7
1215 06:44:00.143878 PCI: 00:13.0
1216 06:44:00.147420 PCI: 00:14.1
1217 06:44:00.147700 PCI: 00:16.1
1218 06:44:00.147962 PCI: 00:16.2
1219 06:44:00.150388 PCI: 00:16.3
1220 06:44:00.150764 PCI: 00:16.4
1221 06:44:00.153654 PCI: 00:16.5
1222 06:44:00.154024 PCI: 00:17.0
1223 06:44:00.154369 PCI: 00:19.2
1224 06:44:00.156797 PCI: 00:1a.0
1225 06:44:00.157198 PCI: 00:1e.1
1226 06:44:00.160221 PCI: 00:1e.2
1227 06:44:00.160538 PCI: 00:1f.1
1228 06:44:00.163560 PCI: 00:1f.4
1229 06:44:00.163894 PCI: 00:1f.6
1230 06:44:00.164154 PCI: 00:1f.7
1231 06:44:00.167252 PCI: Check your devicetree.cb.
1232 06:44:00.170367 PCI: 00:02.0 scanning...
1233 06:44:00.173748 scan_generic_bus for PCI: 00:02.0
1234 06:44:00.177288 scan_generic_bus for PCI: 00:02.0 done
1235 06:44:00.183653 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1236 06:44:00.183973 PCI: 00:04.0 scanning...
1237 06:44:00.187109 scan_generic_bus for PCI: 00:04.0
1238 06:44:00.190623 GENERIC: 0.0 enabled
1239 06:44:00.196976 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1240 06:44:00.200198 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1241 06:44:00.204113 PCI: 00:06.0 scanning...
1242 06:44:00.206989 do_pci_scan_bridge for PCI: 00:06.0
1243 06:44:00.210553 PCI: pci_scan_bus for bus 01
1244 06:44:00.213456 PCI: 01:00.0 [15b7/5009] enabled
1245 06:44:00.216922 Enabling Common Clock Configuration
1246 06:44:00.220088 L1 Sub-State supported from root port 6
1247 06:44:00.223377 L1 Sub-State Support = 0x5
1248 06:44:00.226671 CommonModeRestoreTime = 0x6e
1249 06:44:00.229992 Power On Value = 0x5, Power On Scale = 0x2
1250 06:44:00.233633 ASPM: Enabled L1
1251 06:44:00.236578 PCIe: Max_Payload_Size adjusted to 256
1252 06:44:00.240516 PCI: 01:00.0: Enabled LTR
1253 06:44:00.243608 PCI: 01:00.0: Programmed LTR max latencies
1254 06:44:00.249968 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1255 06:44:00.250050 PCI: 00:0d.0 scanning...
1256 06:44:00.253281 scan_static_bus for PCI: 00:0d.0
1257 06:44:00.257328 USB0 port 0 enabled
1258 06:44:00.260051 USB0 port 0 scanning...
1259 06:44:00.263150 scan_static_bus for USB0 port 0
1260 06:44:00.263226 USB3 port 0 enabled
1261 06:44:00.267038 USB3 port 1 disabled
1262 06:44:00.270165 USB3 port 2 enabled
1263 06:44:00.270248 USB3 port 3 disabled
1264 06:44:00.273070 USB3 port 0 scanning...
1265 06:44:00.276564 scan_static_bus for USB3 port 0
1266 06:44:00.280415 scan_static_bus for USB3 port 0 done
1267 06:44:00.283090 scan_bus: bus USB3 port 0 finished in 6 msecs
1268 06:44:00.286819 USB3 port 2 scanning...
1269 06:44:00.289770 scan_static_bus for USB3 port 2
1270 06:44:00.293514 scan_static_bus for USB3 port 2 done
1271 06:44:00.300201 scan_bus: bus USB3 port 2 finished in 6 msecs
1272 06:44:00.304156 scan_static_bus for USB0 port 0 done
1273 06:44:00.307599 scan_bus: bus USB0 port 0 finished in 43 msecs
1274 06:44:00.310268 scan_static_bus for PCI: 00:0d.0 done
1275 06:44:00.316636 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1276 06:44:00.320127 PCI: 00:14.0 scanning...
1277 06:44:00.323365 scan_static_bus for PCI: 00:14.0
1278 06:44:00.323545 USB0 port 0 enabled
1279 06:44:00.326761 USB0 port 0 scanning...
1280 06:44:00.330219 scan_static_bus for USB0 port 0
1281 06:44:00.330396 USB2 port 0 enabled
1282 06:44:00.333434 USB2 port 1 disabled
1283 06:44:00.336647 USB2 port 2 enabled
1284 06:44:00.336822 USB2 port 3 disabled
1285 06:44:00.340548 USB2 port 4 disabled
1286 06:44:00.343464 USB2 port 5 enabled
1287 06:44:00.343641 USB2 port 6 disabled
1288 06:44:00.346485 USB2 port 7 disabled
1289 06:44:00.349919 USB2 port 8 enabled
1290 06:44:00.350096 USB2 port 9 enabled
1291 06:44:00.353513 USB3 port 0 enabled
1292 06:44:00.353739 USB3 port 1 disabled
1293 06:44:00.356556 USB3 port 2 disabled
1294 06:44:00.360209 USB3 port 3 disabled
1295 06:44:00.360375 USB2 port 0 scanning...
1296 06:44:00.363263 scan_static_bus for USB2 port 0
1297 06:44:00.369715 scan_static_bus for USB2 port 0 done
1298 06:44:00.373283 scan_bus: bus USB2 port 0 finished in 6 msecs
1299 06:44:00.376691 USB2 port 2 scanning...
1300 06:44:00.379942 scan_static_bus for USB2 port 2
1301 06:44:00.383308 scan_static_bus for USB2 port 2 done
1302 06:44:00.386391 scan_bus: bus USB2 port 2 finished in 6 msecs
1303 06:44:00.390032 USB2 port 5 scanning...
1304 06:44:00.393555 scan_static_bus for USB2 port 5
1305 06:44:00.396609 scan_static_bus for USB2 port 5 done
1306 06:44:00.399682 scan_bus: bus USB2 port 5 finished in 6 msecs
1307 06:44:00.402973 USB2 port 8 scanning...
1308 06:44:00.406463 scan_static_bus for USB2 port 8
1309 06:44:00.409552 scan_static_bus for USB2 port 8 done
1310 06:44:00.416299 scan_bus: bus USB2 port 8 finished in 6 msecs
1311 06:44:00.416440 USB2 port 9 scanning...
1312 06:44:00.420138 scan_static_bus for USB2 port 9
1313 06:44:00.422977 scan_static_bus for USB2 port 9 done
1314 06:44:00.430213 scan_bus: bus USB2 port 9 finished in 6 msecs
1315 06:44:00.430424 USB3 port 0 scanning...
1316 06:44:00.433061 scan_static_bus for USB3 port 0
1317 06:44:00.439897 scan_static_bus for USB3 port 0 done
1318 06:44:00.443740 scan_bus: bus USB3 port 0 finished in 6 msecs
1319 06:44:00.446760 scan_static_bus for USB0 port 0 done
1320 06:44:00.450107 scan_bus: bus USB0 port 0 finished in 120 msecs
1321 06:44:00.456450 scan_static_bus for PCI: 00:14.0 done
1322 06:44:00.459847 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1323 06:44:00.463231 PCI: 00:14.3 scanning...
1324 06:44:00.466330 scan_static_bus for PCI: 00:14.3
1325 06:44:00.470004 GENERIC: 0.0 enabled
1326 06:44:00.473314 scan_static_bus for PCI: 00:14.3 done
1327 06:44:00.476374 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1328 06:44:00.479752 PCI: 00:15.0 scanning...
1329 06:44:00.483394 scan_static_bus for PCI: 00:15.0
1330 06:44:00.483839 I2C: 00:1a enabled
1331 06:44:00.486309 I2C: 00:31 enabled
1332 06:44:00.489658 I2C: 00:32 enabled
1333 06:44:00.493444 scan_static_bus for PCI: 00:15.0 done
1334 06:44:00.496748 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1335 06:44:00.499758 PCI: 00:15.1 scanning...
1336 06:44:00.503545 scan_static_bus for PCI: 00:15.1
1337 06:44:00.506551 I2C: 00:50 enabled
1338 06:44:00.509685 scan_static_bus for PCI: 00:15.1 done
1339 06:44:00.513586 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1340 06:44:00.516193 PCI: 00:15.3 scanning...
1341 06:44:00.519955 scan_static_bus for PCI: 00:15.3
1342 06:44:00.520394 I2C: 00:10 enabled
1343 06:44:00.526252 scan_static_bus for PCI: 00:15.3 done
1344 06:44:00.529866 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1345 06:44:00.533252 PCI: 00:19.1 scanning...
1346 06:44:00.536305 scan_static_bus for PCI: 00:19.1
1347 06:44:00.536747 I2C: 00:15 enabled
1348 06:44:00.540279 I2C: 00:2c enabled
1349 06:44:00.542989 scan_static_bus for PCI: 00:19.1 done
1350 06:44:00.546233 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1351 06:44:00.549588 PCI: 00:1e.3 scanning...
1352 06:44:00.552946 scan_generic_bus for PCI: 00:1e.3
1353 06:44:00.556527 SPI: 00 enabled
1354 06:44:00.563065 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1355 06:44:00.566524 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1356 06:44:00.570099 PCI: 00:1f.0 scanning...
1357 06:44:00.573481 scan_static_bus for PCI: 00:1f.0
1358 06:44:00.573993 PNP: 0c09.0 enabled
1359 06:44:00.576562 PNP: 0c09.0 scanning...
1360 06:44:00.579675 scan_static_bus for PNP: 0c09.0
1361 06:44:00.583407 scan_static_bus for PNP: 0c09.0 done
1362 06:44:00.590147 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1363 06:44:00.593096 scan_static_bus for PCI: 00:1f.0 done
1364 06:44:00.596656 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1365 06:44:00.599672 PCI: 00:1f.2 scanning...
1366 06:44:00.603049 scan_static_bus for PCI: 00:1f.2
1367 06:44:00.606371 GENERIC: 0.0 enabled
1368 06:44:00.606931 GENERIC: 0.0 scanning...
1369 06:44:00.609644 scan_static_bus for GENERIC: 0.0
1370 06:44:00.613269 GENERIC: 0.0 enabled
1371 06:44:00.616262 GENERIC: 1.0 enabled
1372 06:44:00.619525 scan_static_bus for GENERIC: 0.0 done
1373 06:44:00.622898 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1374 06:44:00.626670 scan_static_bus for PCI: 00:1f.2 done
1375 06:44:00.632737 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1376 06:44:00.636408 PCI: 00:1f.3 scanning...
1377 06:44:00.639468 scan_static_bus for PCI: 00:1f.3
1378 06:44:00.642920 scan_static_bus for PCI: 00:1f.3 done
1379 06:44:00.646091 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1380 06:44:00.649434 PCI: 00:1f.5 scanning...
1381 06:44:00.652776 scan_generic_bus for PCI: 00:1f.5
1382 06:44:00.656091 scan_generic_bus for PCI: 00:1f.5 done
1383 06:44:00.663042 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1384 06:44:00.666350 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1385 06:44:00.669745 scan_static_bus for Root Device done
1386 06:44:00.676620 scan_bus: bus Root Device finished in 729 msecs
1387 06:44:00.677044 done
1388 06:44:00.683248 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1389 06:44:00.686139 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1390 06:44:00.693045 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1391 06:44:00.696421 SPI flash protection: WPSW=0 SRP0=0
1392 06:44:00.702521 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1393 06:44:00.706210 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1394 06:44:00.709532 found VGA at PCI: 00:02.0
1395 06:44:00.713240 Setting up VGA for PCI: 00:02.0
1396 06:44:00.719128 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1397 06:44:00.722364 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1398 06:44:00.726059 Allocating resources...
1399 06:44:00.729243 Reading resources...
1400 06:44:00.732596 Root Device read_resources bus 0 link: 0
1401 06:44:00.735634 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1402 06:44:00.742123 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1403 06:44:00.745565 DOMAIN: 0000 read_resources bus 0 link: 0
1404 06:44:00.752250 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1405 06:44:00.758673 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1406 06:44:00.765505 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1407 06:44:00.768498 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1408 06:44:00.775108 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1409 06:44:00.782203 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1410 06:44:00.788863 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1411 06:44:00.795400 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1412 06:44:00.802219 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1413 06:44:00.808470 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1414 06:44:00.815037 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1415 06:44:00.822175 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1416 06:44:00.828264 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1417 06:44:00.835304 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1418 06:44:00.842034 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1419 06:44:00.845241 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1420 06:44:00.851707 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1421 06:44:00.858296 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1422 06:44:00.865522 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1423 06:44:00.872279 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1424 06:44:00.878821 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1425 06:44:00.881874 PCI: 00:04.0 read_resources bus 1 link: 0
1426 06:44:00.888611 PCI: 00:04.0 read_resources bus 1 link: 0 done
1427 06:44:00.891567 PCI: 00:06.0 read_resources bus 1 link: 0
1428 06:44:00.895068 PCI: 00:06.0 read_resources bus 1 link: 0 done
1429 06:44:00.902075 PCI: 00:0d.0 read_resources bus 0 link: 0
1430 06:44:00.904945 USB0 port 0 read_resources bus 0 link: 0
1431 06:44:00.908394 USB0 port 0 read_resources bus 0 link: 0 done
1432 06:44:00.914989 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1433 06:44:00.918503 PCI: 00:14.0 read_resources bus 0 link: 0
1434 06:44:00.922006 USB0 port 0 read_resources bus 0 link: 0
1435 06:44:00.925238 USB0 port 0 read_resources bus 0 link: 0 done
1436 06:44:00.931792 PCI: 00:14.0 read_resources bus 0 link: 0 done
1437 06:44:00.934904 PCI: 00:14.3 read_resources bus 0 link: 0
1438 06:44:00.941730 PCI: 00:14.3 read_resources bus 0 link: 0 done
1439 06:44:00.944933 PCI: 00:15.0 read_resources bus 0 link: 0
1440 06:44:00.948433 PCI: 00:15.0 read_resources bus 0 link: 0 done
1441 06:44:00.954614 PCI: 00:15.1 read_resources bus 0 link: 0
1442 06:44:00.958157 PCI: 00:15.1 read_resources bus 0 link: 0 done
1443 06:44:00.961407 PCI: 00:15.3 read_resources bus 0 link: 0
1444 06:44:00.968314 PCI: 00:15.3 read_resources bus 0 link: 0 done
1445 06:44:00.971487 PCI: 00:19.1 read_resources bus 0 link: 0
1446 06:44:00.975305 PCI: 00:19.1 read_resources bus 0 link: 0 done
1447 06:44:00.981878 PCI: 00:1e.3 read_resources bus 2 link: 0
1448 06:44:00.985157 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1449 06:44:00.988526 PCI: 00:1f.0 read_resources bus 0 link: 0
1450 06:44:00.994979 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1451 06:44:00.998805 PCI: 00:1f.2 read_resources bus 0 link: 0
1452 06:44:01.001906 GENERIC: 0.0 read_resources bus 0 link: 0
1453 06:44:01.008504 GENERIC: 0.0 read_resources bus 0 link: 0 done
1454 06:44:01.011567 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1455 06:44:01.018121 DOMAIN: 0000 read_resources bus 0 link: 0 done
1456 06:44:01.021529 Root Device read_resources bus 0 link: 0 done
1457 06:44:01.025450 Done reading resources.
1458 06:44:01.032009 Show resources in subtree (Root Device)...After reading.
1459 06:44:01.035595 Root Device child on link 0 CPU_CLUSTER: 0
1460 06:44:01.038390 CPU_CLUSTER: 0 child on link 0 APIC: 00
1461 06:44:01.038793 APIC: 00
1462 06:44:01.041554 APIC: 12
1463 06:44:01.042051 APIC: 14
1464 06:44:01.045355 APIC: 16
1465 06:44:01.045762 APIC: 10
1466 06:44:01.046211 APIC: 09
1467 06:44:01.048415 APIC: 08
1468 06:44:01.048965 APIC: 01
1469 06:44:01.052298 DOMAIN: 0000 child on link 0 GPIO: 0
1470 06:44:01.061657 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1471 06:44:01.071467 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1472 06:44:01.071854 GPIO: 0
1473 06:44:01.074934 PCI: 00:00.0
1474 06:44:01.084831 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1475 06:44:01.095315 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1476 06:44:01.101958 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1477 06:44:01.111417 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1478 06:44:01.122108 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1479 06:44:01.131231 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1480 06:44:01.141009 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1481 06:44:01.151432 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1482 06:44:01.157801 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1483 06:44:01.168730 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1484 06:44:01.177625 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1485 06:44:01.187502 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1486 06:44:01.197604 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1487 06:44:01.208177 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1488 06:44:01.214641 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1489 06:44:01.224508 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1490 06:44:01.234487 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1491 06:44:01.244527 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1492 06:44:01.254250 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1493 06:44:01.264659 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1494 06:44:01.274586 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1495 06:44:01.281070 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1496 06:44:01.290768 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1497 06:44:01.301102 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1498 06:44:01.311006 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1499 06:44:01.321453 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1500 06:44:01.331038 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1501 06:44:01.340862 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1502 06:44:01.340944 PCI: 00:02.0
1503 06:44:01.350732 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1504 06:44:01.360847 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1505 06:44:01.371015 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1506 06:44:01.374516 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1507 06:44:01.384940 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1508 06:44:01.387727 GENERIC: 0.0
1509 06:44:01.391034 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1510 06:44:01.401143 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1511 06:44:01.411480 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1512 06:44:01.421201 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1513 06:44:01.421624 PCI: 01:00.0
1514 06:44:01.431030 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1515 06:44:01.440539 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1516 06:44:01.444407 PCI: 00:08.0
1517 06:44:01.444621 PCI: 00:0a.0
1518 06:44:01.454045 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1519 06:44:01.458368 PCI: 00:0d.0 child on link 0 USB0 port 0
1520 06:44:01.467180 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1521 06:44:01.474207 USB0 port 0 child on link 0 USB3 port 0
1522 06:44:01.474502 USB3 port 0
1523 06:44:01.477127 USB3 port 1
1524 06:44:01.477393 USB3 port 2
1525 06:44:01.480809 USB3 port 3
1526 06:44:01.484160 PCI: 00:14.0 child on link 0 USB0 port 0
1527 06:44:01.494105 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1528 06:44:01.500616 USB0 port 0 child on link 0 USB2 port 0
1529 06:44:01.500841 USB2 port 0
1530 06:44:01.504019 USB2 port 1
1531 06:44:01.504311 USB2 port 2
1532 06:44:01.507544 USB2 port 3
1533 06:44:01.507800 USB2 port 4
1534 06:44:01.510428 USB2 port 5
1535 06:44:01.510690 USB2 port 6
1536 06:44:01.513705 USB2 port 7
1537 06:44:01.513788 USB2 port 8
1538 06:44:01.516875 USB2 port 9
1539 06:44:01.516945 USB3 port 0
1540 06:44:01.520328 USB3 port 1
1541 06:44:01.520425 USB3 port 2
1542 06:44:01.523926 USB3 port 3
1543 06:44:01.523996 PCI: 00:14.2
1544 06:44:01.533869 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1545 06:44:01.543642 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1546 06:44:01.550375 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1547 06:44:01.560307 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1548 06:44:01.560390 GENERIC: 0.0
1549 06:44:01.566961 PCI: 00:15.0 child on link 0 I2C: 00:1a
1550 06:44:01.577136 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1551 06:44:01.577219 I2C: 00:1a
1552 06:44:01.580322 I2C: 00:31
1553 06:44:01.580404 I2C: 00:32
1554 06:44:01.583595 PCI: 00:15.1 child on link 0 I2C: 00:50
1555 06:44:01.593636 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1556 06:44:01.597014 I2C: 00:50
1557 06:44:01.597090 PCI: 00:15.2
1558 06:44:01.603647 PCI: 00:15.3 child on link 0 I2C: 00:10
1559 06:44:01.613690 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1560 06:44:01.613770 I2C: 00:10
1561 06:44:01.616993 PCI: 00:16.0
1562 06:44:01.627182 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 06:44:01.627265 PCI: 00:19.0
1564 06:44:01.630517 PCI: 00:19.1 child on link 0 I2C: 00:15
1565 06:44:01.640167 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 06:44:01.643533 I2C: 00:15
1567 06:44:01.643622 I2C: 00:2c
1568 06:44:01.646991 PCI: 00:1e.0
1569 06:44:01.657214 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1570 06:44:01.659929 PCI: 00:1e.3 child on link 0 SPI: 00
1571 06:44:01.670104 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 06:44:01.673385 SPI: 00
1573 06:44:01.676850 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1574 06:44:01.687148 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1575 06:44:01.687224 PNP: 0c09.0
1576 06:44:01.697052 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1577 06:44:01.700043 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1578 06:44:01.710122 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1579 06:44:01.719985 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1580 06:44:01.723325 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1581 06:44:01.726582 GENERIC: 0.0
1582 06:44:01.726653 GENERIC: 1.0
1583 06:44:01.729845 PCI: 00:1f.3
1584 06:44:01.739789 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1585 06:44:01.749589 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1586 06:44:01.749697 PCI: 00:1f.5
1587 06:44:01.760297 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1588 06:44:01.766293 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1589 06:44:01.773201 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1590 06:44:01.779868 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1591 06:44:01.787026 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1592 06:44:01.789686 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1593 06:44:01.793196 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1594 06:44:01.799721 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1595 06:44:01.809507 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1596 06:44:01.816373 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1597 06:44:01.823495 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1598 06:44:01.829555 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1599 06:44:01.835927 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1600 06:44:01.842822 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1601 06:44:01.852562 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1602 06:44:01.855900 DOMAIN: 0000: Resource ranges:
1603 06:44:01.859321 * Base: 1000, Size: 800, Tag: 100
1604 06:44:01.862633 * Base: 1900, Size: e700, Tag: 100
1605 06:44:01.869607 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1606 06:44:01.876104 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1607 06:44:01.882740 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1608 06:44:01.889491 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1609 06:44:01.895932 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1610 06:44:01.905706 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1611 06:44:01.912535 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1612 06:44:01.919277 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1613 06:44:01.929157 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1614 06:44:01.935707 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1615 06:44:01.942599 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1616 06:44:01.951885 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1617 06:44:01.958930 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1618 06:44:01.965483 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1619 06:44:01.972194 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1620 06:44:01.981971 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1621 06:44:01.988709 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1622 06:44:01.995091 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1623 06:44:02.005531 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1624 06:44:02.011931 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1625 06:44:02.018829 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1626 06:44:02.028566 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1627 06:44:02.035751 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1628 06:44:02.042365 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1629 06:44:02.052027 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1630 06:44:02.058425 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1631 06:44:02.065011 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1632 06:44:02.075231 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1633 06:44:02.081769 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1634 06:44:02.088482 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1635 06:44:02.098428 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1636 06:44:02.105395 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1637 06:44:02.111957 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1638 06:44:02.114822 DOMAIN: 0000: Resource ranges:
1639 06:44:02.121985 * Base: 80400000, Size: 3fc00000, Tag: 200
1640 06:44:02.125211 * Base: d0000000, Size: 28000000, Tag: 200
1641 06:44:02.128218 * Base: fa000000, Size: 1000000, Tag: 200
1642 06:44:02.134786 * Base: fb001000, Size: 17ff000, Tag: 200
1643 06:44:02.138879 * Base: fe800000, Size: 300000, Tag: 200
1644 06:44:02.141677 * Base: feb80000, Size: 80000, Tag: 200
1645 06:44:02.144855 * Base: fed00000, Size: 40000, Tag: 200
1646 06:44:02.148849 * Base: fed70000, Size: 10000, Tag: 200
1647 06:44:02.154955 * Base: fed88000, Size: 8000, Tag: 200
1648 06:44:02.158300 * Base: fed93000, Size: d000, Tag: 200
1649 06:44:02.161829 * Base: feda2000, Size: 1e000, Tag: 200
1650 06:44:02.165263 * Base: fede0000, Size: 1220000, Tag: 200
1651 06:44:02.173553 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1652 06:44:02.178637 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1653 06:44:02.184758 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1654 06:44:02.191393 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1655 06:44:02.198445 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1656 06:44:02.205440 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1657 06:44:02.211915 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1658 06:44:02.218384 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1659 06:44:02.224568 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1660 06:44:02.231596 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1661 06:44:02.237821 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1662 06:44:02.244399 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1663 06:44:02.251149 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1664 06:44:02.257564 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1665 06:44:02.264650 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1666 06:44:02.271265 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1667 06:44:02.277515 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1668 06:44:02.284313 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1669 06:44:02.290792 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1670 06:44:02.297600 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1671 06:44:02.303941 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1672 06:44:02.314007 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1673 06:44:02.317632 PCI: 00:06.0: Resource ranges:
1674 06:44:02.320560 * Base: 80400000, Size: 100000, Tag: 200
1675 06:44:02.327268 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1676 06:44:02.334166 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1677 06:44:02.340761 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1678 06:44:02.350744 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1679 06:44:02.354103 Root Device assign_resources, bus 0 link: 0
1680 06:44:02.357370 DOMAIN: 0000 assign_resources, bus 0 link: 0
1681 06:44:02.367090 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1682 06:44:02.373636 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1683 06:44:02.380742 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1684 06:44:02.390491 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1685 06:44:02.393864 PCI: 00:04.0 assign_resources, bus 1 link: 0
1686 06:44:02.400372 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1687 06:44:02.407294 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1688 06:44:02.417140 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1689 06:44:02.427170 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1690 06:44:02.430345 PCI: 00:06.0 assign_resources, bus 1 link: 0
1691 06:44:02.439887 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1692 06:44:02.446829 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1693 06:44:02.453294 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1694 06:44:02.460073 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1695 06:44:02.466893 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1696 06:44:02.473719 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1697 06:44:02.477291 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1698 06:44:02.486665 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1699 06:44:02.490104 PCI: 00:14.0 assign_resources, bus 0 link: 0
1700 06:44:02.493196 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1701 06:44:02.503322 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1702 06:44:02.509633 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1703 06:44:02.519978 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1704 06:44:02.523062 PCI: 00:14.3 assign_resources, bus 0 link: 0
1705 06:44:02.529690 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1706 06:44:02.536314 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1707 06:44:02.539681 PCI: 00:15.0 assign_resources, bus 0 link: 0
1708 06:44:02.546170 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1709 06:44:02.552938 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1710 06:44:02.559386 PCI: 00:15.1 assign_resources, bus 0 link: 0
1711 06:44:02.563050 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1712 06:44:02.572820 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1713 06:44:02.576324 PCI: 00:15.3 assign_resources, bus 0 link: 0
1714 06:44:02.579298 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1715 06:44:02.589477 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1716 06:44:02.595999 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1717 06:44:02.602514 PCI: 00:19.1 assign_resources, bus 0 link: 0
1718 06:44:02.605796 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1719 06:44:02.612450 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1720 06:44:02.619228 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1721 06:44:02.622567 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1722 06:44:02.629552 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1723 06:44:02.632631 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1724 06:44:02.639550 LPC: Trying to open IO window from 800 size 1ff
1725 06:44:02.645869 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1726 06:44:02.652605 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1727 06:44:02.662478 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1728 06:44:02.665642 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1729 06:44:02.672367 Root Device assign_resources, bus 0 link: 0 done
1730 06:44:02.672451 Done setting resources.
1731 06:44:02.678987 Show resources in subtree (Root Device)...After assigning values.
1732 06:44:02.685745 Root Device child on link 0 CPU_CLUSTER: 0
1733 06:44:02.689568 CPU_CLUSTER: 0 child on link 0 APIC: 00
1734 06:44:02.689679 APIC: 00
1735 06:44:02.692509 APIC: 12
1736 06:44:02.692608 APIC: 14
1737 06:44:02.695807 APIC: 16
1738 06:44:02.695884 APIC: 10
1739 06:44:02.695947 APIC: 09
1740 06:44:02.699640 APIC: 08
1741 06:44:02.699708 APIC: 01
1742 06:44:02.702547 DOMAIN: 0000 child on link 0 GPIO: 0
1743 06:44:02.712583 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1744 06:44:02.722870 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1745 06:44:02.722991 GPIO: 0
1746 06:44:02.725998 PCI: 00:00.0
1747 06:44:02.735922 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1748 06:44:02.745781 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1749 06:44:02.752195 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1750 06:44:02.762270 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1751 06:44:02.772008 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1752 06:44:02.782136 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1753 06:44:02.791850 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1754 06:44:02.802279 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1755 06:44:02.811900 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1756 06:44:02.818668 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1757 06:44:02.828417 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1758 06:44:02.837968 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1759 06:44:02.848268 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1760 06:44:02.858222 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1761 06:44:02.867824 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1762 06:44:02.874455 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1763 06:44:02.884557 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1764 06:44:02.894421 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1765 06:44:02.904772 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1766 06:44:02.914369 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1767 06:44:02.924095 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1768 06:44:02.933986 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1769 06:44:02.943762 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1770 06:44:02.954044 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1771 06:44:02.963557 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1772 06:44:02.970604 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1773 06:44:02.980159 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1774 06:44:02.990409 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1775 06:44:02.993683 PCI: 00:02.0
1776 06:44:03.003333 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1777 06:44:03.013664 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1778 06:44:03.023213 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1779 06:44:03.026680 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1780 06:44:03.036707 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1781 06:44:03.040112 GENERIC: 0.0
1782 06:44:03.043324 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1783 06:44:03.053031 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1784 06:44:03.067246 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1785 06:44:03.076839 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1786 06:44:03.077286 PCI: 01:00.0
1787 06:44:03.089593 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1788 06:44:03.099506 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1789 06:44:03.099901 PCI: 00:08.0
1790 06:44:03.103179 PCI: 00:0a.0
1791 06:44:03.112924 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1792 06:44:03.116317 PCI: 00:0d.0 child on link 0 USB0 port 0
1793 06:44:03.126308 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1794 06:44:03.132960 USB0 port 0 child on link 0 USB3 port 0
1795 06:44:03.133491 USB3 port 0
1796 06:44:03.136128 USB3 port 1
1797 06:44:03.136614 USB3 port 2
1798 06:44:03.139615 USB3 port 3
1799 06:44:03.142697 PCI: 00:14.0 child on link 0 USB0 port 0
1800 06:44:03.153241 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1801 06:44:03.156167 USB0 port 0 child on link 0 USB2 port 0
1802 06:44:03.159419 USB2 port 0
1803 06:44:03.159932 USB2 port 1
1804 06:44:03.162908 USB2 port 2
1805 06:44:03.166258 USB2 port 3
1806 06:44:03.166676 USB2 port 4
1807 06:44:03.169448 USB2 port 5
1808 06:44:03.170038 USB2 port 6
1809 06:44:03.172910 USB2 port 7
1810 06:44:03.173354 USB2 port 8
1811 06:44:03.176135 USB2 port 9
1812 06:44:03.176553 USB3 port 0
1813 06:44:03.179499 USB3 port 1
1814 06:44:03.179921 USB3 port 2
1815 06:44:03.183096 USB3 port 3
1816 06:44:03.183544 PCI: 00:14.2
1817 06:44:03.193035 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1818 06:44:03.206161 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1819 06:44:03.209356 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1820 06:44:03.219629 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1821 06:44:03.222682 GENERIC: 0.0
1822 06:44:03.225997 PCI: 00:15.0 child on link 0 I2C: 00:1a
1823 06:44:03.236061 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1824 06:44:03.236491 I2C: 00:1a
1825 06:44:03.239266 I2C: 00:31
1826 06:44:03.239743 I2C: 00:32
1827 06:44:03.246224 PCI: 00:15.1 child on link 0 I2C: 00:50
1828 06:44:03.256054 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1829 06:44:03.256484 I2C: 00:50
1830 06:44:03.259317 PCI: 00:15.2
1831 06:44:03.262610 PCI: 00:15.3 child on link 0 I2C: 00:10
1832 06:44:03.272772 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1833 06:44:03.276251 I2C: 00:10
1834 06:44:03.276668 PCI: 00:16.0
1835 06:44:03.286010 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1836 06:44:03.289464 PCI: 00:19.0
1837 06:44:03.292859 PCI: 00:19.1 child on link 0 I2C: 00:15
1838 06:44:03.302492 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1839 06:44:03.305639 I2C: 00:15
1840 06:44:03.306057 I2C: 00:2c
1841 06:44:03.309254 PCI: 00:1e.0
1842 06:44:03.319069 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1843 06:44:03.322319 PCI: 00:1e.3 child on link 0 SPI: 00
1844 06:44:03.332423 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1845 06:44:03.336193 SPI: 00
1846 06:44:03.339143 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1847 06:44:03.349206 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1848 06:44:03.349637 PNP: 0c09.0
1849 06:44:03.359158 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1850 06:44:03.362619 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1851 06:44:03.372887 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1852 06:44:03.382218 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1853 06:44:03.385958 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1854 06:44:03.389131 GENERIC: 0.0
1855 06:44:03.389569 GENERIC: 1.0
1856 06:44:03.392989 PCI: 00:1f.3
1857 06:44:03.402482 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1858 06:44:03.412741 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1859 06:44:03.415865 PCI: 00:1f.5
1860 06:44:03.425480 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1861 06:44:03.426050 Done allocating resources.
1862 06:44:03.432408 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1863 06:44:03.439576 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1864 06:44:03.441977 Configure audio over I2S with MAX98373 NAU88L25B.
1865 06:44:03.447978 Enabling BT offload
1866 06:44:03.455343 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1867 06:44:03.459039 Enabling resources...
1868 06:44:03.461995 PCI: 00:00.0 subsystem <- 8086/4609
1869 06:44:03.465610 PCI: 00:00.0 cmd <- 06
1870 06:44:03.468416 PCI: 00:02.0 subsystem <- 8086/46b3
1871 06:44:03.472061 PCI: 00:02.0 cmd <- 03
1872 06:44:03.475062 PCI: 00:04.0 subsystem <- 8086/461d
1873 06:44:03.475584 PCI: 00:04.0 cmd <- 02
1874 06:44:03.478353 PCI: 00:06.0 bridge ctrl <- 0013
1875 06:44:03.482371 PCI: 00:06.0 subsystem <- 8086/464d
1876 06:44:03.485117 PCI: 00:06.0 cmd <- 106
1877 06:44:03.488327 PCI: 00:0a.0 subsystem <- 8086/467d
1878 06:44:03.491841 PCI: 00:0a.0 cmd <- 02
1879 06:44:03.495201 PCI: 00:0d.0 subsystem <- 8086/461e
1880 06:44:03.498592 PCI: 00:0d.0 cmd <- 02
1881 06:44:03.501841 PCI: 00:14.0 subsystem <- 8086/51ed
1882 06:44:03.504879 PCI: 00:14.0 cmd <- 02
1883 06:44:03.508633 PCI: 00:14.2 subsystem <- 8086/51ef
1884 06:44:03.509054 PCI: 00:14.2 cmd <- 02
1885 06:44:03.511578 PCI: 00:14.3 subsystem <- 8086/51f0
1886 06:44:03.515313 PCI: 00:14.3 cmd <- 02
1887 06:44:03.518659 PCI: 00:15.0 subsystem <- 8086/51e8
1888 06:44:03.521661 PCI: 00:15.0 cmd <- 02
1889 06:44:03.524841 PCI: 00:15.1 subsystem <- 8086/51e9
1890 06:44:03.528170 PCI: 00:15.1 cmd <- 06
1891 06:44:03.531427 PCI: 00:15.3 subsystem <- 8086/51eb
1892 06:44:03.534781 PCI: 00:15.3 cmd <- 02
1893 06:44:03.538290 PCI: 00:16.0 subsystem <- 8086/51e0
1894 06:44:03.538842 PCI: 00:16.0 cmd <- 02
1895 06:44:03.541415 PCI: 00:19.1 subsystem <- 8086/51c6
1896 06:44:03.544806 PCI: 00:19.1 cmd <- 02
1897 06:44:03.548109 PCI: 00:1e.0 subsystem <- 8086/51a8
1898 06:44:03.551628 PCI: 00:1e.0 cmd <- 06
1899 06:44:03.555039 PCI: 00:1e.3 subsystem <- 8086/51ab
1900 06:44:03.558288 PCI: 00:1e.3 cmd <- 02
1901 06:44:03.561579 PCI: 00:1f.0 subsystem <- 8086/5182
1902 06:44:03.564732 PCI: 00:1f.0 cmd <- 407
1903 06:44:03.568278 PCI: 00:1f.3 subsystem <- 8086/51c8
1904 06:44:03.568701 PCI: 00:1f.3 cmd <- 02
1905 06:44:03.571740 PCI: 00:1f.5 subsystem <- 8086/51a4
1906 06:44:03.575211 PCI: 00:1f.5 cmd <- 406
1907 06:44:03.578399 PCI: 01:00.0 cmd <- 02
1908 06:44:03.578818 done.
1909 06:44:03.585163 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1910 06:44:03.588149 ME: Version: Unavailable
1911 06:44:03.591745 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1912 06:44:03.595439 Initializing devices...
1913 06:44:03.598205 Root Device init
1914 06:44:03.598731 mainboard: EC init
1915 06:44:03.604736 Chrome EC: Set SMI mask to 0x0000000000000000
1916 06:44:03.605276 Chrome EC: UHEPI supported
1917 06:44:03.613209 Chrome EC: clear events_b mask to 0x0000000000000000
1918 06:44:03.620062 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1919 06:44:03.626148 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1920 06:44:03.633249 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1921 06:44:03.639737 Chrome EC: Set WAKE mask to 0x0000000000000000
1922 06:44:03.643338 Root Device init finished in 42 msecs
1923 06:44:03.646376 PCI: 00:00.0 init
1924 06:44:03.650166 CPU TDP = 15 Watts
1925 06:44:03.650732 CPU PL1 = 15 Watts
1926 06:44:03.653753 CPU PL2 = 55 Watts
1927 06:44:03.654314 CPU PL4 = 123 Watts
1928 06:44:03.659595 PCI: 00:00.0 init finished in 8 msecs
1929 06:44:03.660081 PCI: 00:02.0 init
1930 06:44:03.662886 GMA: Found VBT in CBFS
1931 06:44:03.666634 GMA: Found valid VBT in CBFS
1932 06:44:03.669564 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1933 06:44:03.680039 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1934 06:44:03.682995 PCI: 00:02.0 init finished in 18 msecs
1935 06:44:03.683607 PCI: 00:06.0 init
1936 06:44:03.686153 Initializing PCH PCIe bridge.
1937 06:44:03.692479 PCI: 00:06.0 init finished in 3 msecs
1938 06:44:03.693027 PCI: 00:0a.0 init
1939 06:44:03.696264 PCI: 00:0a.0 init finished in 0 msecs
1940 06:44:03.699728 PCI: 00:14.0 init
1941 06:44:03.702956 PCI: 00:14.0 init finished in 0 msecs
1942 06:44:03.706383 PCI: 00:14.2 init
1943 06:44:03.709648 PCI: 00:14.2 init finished in 0 msecs
1944 06:44:03.710216 PCI: 00:15.0 init
1945 06:44:03.712687 I2C bus 0 version 0x3230302a
1946 06:44:03.716316 DW I2C bus 0 at 0x80655000 (400 KHz)
1947 06:44:03.719324 PCI: 00:15.0 init finished in 6 msecs
1948 06:44:03.722656 PCI: 00:15.1 init
1949 06:44:03.726599 I2C bus 1 version 0x3230302a
1950 06:44:03.729506 DW I2C bus 1 at 0x80656000 (400 KHz)
1951 06:44:03.732704 PCI: 00:15.1 init finished in 6 msecs
1952 06:44:03.736306 PCI: 00:15.3 init
1953 06:44:03.740108 I2C bus 3 version 0x3230302a
1954 06:44:03.742834 DW I2C bus 3 at 0x80657000 (400 KHz)
1955 06:44:03.746631 PCI: 00:15.3 init finished in 6 msecs
1956 06:44:03.747199 PCI: 00:16.0 init
1957 06:44:03.749329 PCI: 00:16.0 init finished in 0 msecs
1958 06:44:03.753585 PCI: 00:19.1 init
1959 06:44:03.756304 I2C bus 5 version 0x3230302a
1960 06:44:03.759194 DW I2C bus 5 at 0x80659000 (400 KHz)
1961 06:44:03.762498 PCI: 00:19.1 init finished in 6 msecs
1962 06:44:03.766466 PCI: 00:1f.0 init
1963 06:44:03.769236 IOAPIC: Initializing IOAPIC at 0xfec00000
1964 06:44:03.772801 IOAPIC: ID = 0x02
1965 06:44:03.773370 IOAPIC: Dumping registers
1966 06:44:03.776053 reg 0x0000: 0x02000000
1967 06:44:03.779177 reg 0x0001: 0x00770020
1968 06:44:03.782614 reg 0x0002: 0x00000000
1969 06:44:03.783162 IOAPIC: 120 interrupts
1970 06:44:03.789342 IOAPIC: Clearing IOAPIC at 0xfec00000
1971 06:44:03.792635 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1972 06:44:03.795693 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1973 06:44:03.802947 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1974 06:44:03.806043 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1975 06:44:03.812606 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1976 06:44:03.815846 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1977 06:44:03.822343 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1978 06:44:03.826030 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1979 06:44:03.832973 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1980 06:44:03.835882 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1981 06:44:03.839106 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1982 06:44:03.846356 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1983 06:44:03.849494 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1984 06:44:03.855952 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1985 06:44:03.858907 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1986 06:44:03.866048 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1987 06:44:03.869252 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1988 06:44:03.875802 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1989 06:44:03.878926 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1990 06:44:03.882133 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1991 06:44:03.889491 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1992 06:44:03.892516 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1993 06:44:03.898708 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1994 06:44:03.902200 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1995 06:44:03.908944 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1996 06:44:03.912585 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1997 06:44:03.915722 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1998 06:44:03.922081 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1999 06:44:03.925413 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2000 06:44:03.932289 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2001 06:44:03.935069 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2002 06:44:03.942009 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2003 06:44:03.945478 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2004 06:44:03.951954 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2005 06:44:03.955527 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2006 06:44:03.958684 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2007 06:44:03.965999 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2008 06:44:03.968627 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2009 06:44:03.975243 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2010 06:44:03.979257 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2011 06:44:03.985604 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2012 06:44:03.988853 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2013 06:44:03.995492 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2014 06:44:03.998794 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2015 06:44:04.002394 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2016 06:44:04.008881 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2017 06:44:04.011659 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2018 06:44:04.018592 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2019 06:44:04.021857 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2020 06:44:04.028461 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2021 06:44:04.031797 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2022 06:44:04.038619 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2023 06:44:04.041929 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2024 06:44:04.045489 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2025 06:44:04.052258 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2026 06:44:04.055115 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2027 06:44:04.061527 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2028 06:44:04.065036 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2029 06:44:04.071934 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2030 06:44:04.075482 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2031 06:44:04.082185 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2032 06:44:04.085208 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2033 06:44:04.088657 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2034 06:44:04.095428 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2035 06:44:04.098542 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2036 06:44:04.105626 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2037 06:44:04.108917 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2038 06:44:04.115252 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2039 06:44:04.118377 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2040 06:44:04.121993 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2041 06:44:04.128456 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2042 06:44:04.131692 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2043 06:44:04.138218 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2044 06:44:04.141786 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2045 06:44:04.147916 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2046 06:44:04.151638 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2047 06:44:04.158261 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2048 06:44:04.161807 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2049 06:44:04.164814 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2050 06:44:04.171785 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2051 06:44:04.174946 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2052 06:44:04.181496 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2053 06:44:04.184998 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2054 06:44:04.191728 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2055 06:44:04.194886 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2056 06:44:04.201450 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2057 06:44:04.205272 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2058 06:44:04.208231 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2059 06:44:04.215124 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2060 06:44:04.218142 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2061 06:44:04.225052 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2062 06:44:04.228279 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2063 06:44:04.235141 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2064 06:44:04.238615 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2065 06:44:04.241807 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2066 06:44:04.247910 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2067 06:44:04.251740 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2068 06:44:04.258091 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2069 06:44:04.261260 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2070 06:44:04.267864 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2071 06:44:04.271630 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2072 06:44:04.278130 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2073 06:44:04.281879 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2074 06:44:04.285038 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2075 06:44:04.291520 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2076 06:44:04.295000 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2077 06:44:04.301097 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2078 06:44:04.304885 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2079 06:44:04.311610 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2080 06:44:04.314709 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2081 06:44:04.320850 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2082 06:44:04.324615 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2083 06:44:04.327940 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2084 06:44:04.335028 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2085 06:44:04.337941 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2086 06:44:04.344441 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2087 06:44:04.347727 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2088 06:44:04.354677 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2089 06:44:04.357914 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2090 06:44:04.364123 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2091 06:44:04.367485 IOAPIC: Bootstrap Processor Local APIC = 0x00
2092 06:44:04.370961 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2093 06:44:04.377948 PCI: 00:1f.0 init finished in 607 msecs
2094 06:44:04.378514 PCI: 00:1f.2 init
2095 06:44:04.380907 apm_control: Disabling ACPI.
2096 06:44:04.385467 APMC done.
2097 06:44:04.388899 PCI: 00:1f.2 init finished in 6 msecs
2098 06:44:04.392476 PCI: 00:1f.3 init
2099 06:44:04.395627 PCI: 00:1f.3 init finished in 0 msecs
2100 06:44:04.396096 PCI: 01:00.0 init
2101 06:44:04.398607 PCI: 01:00.0 init finished in 0 msecs
2102 06:44:04.402450 PNP: 0c09.0 init
2103 06:44:04.405304 Google Chrome EC uptime: 12.119 seconds
2104 06:44:04.412363 Google Chrome AP resets since EC boot: 1
2105 06:44:04.415759 Google Chrome most recent AP reset causes:
2106 06:44:04.418621 0.341: 32775 shutdown: entering G3
2107 06:44:04.425742 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2108 06:44:04.429335 PNP: 0c09.0 init finished in 23 msecs
2109 06:44:04.432253 GENERIC: 0.0 init
2110 06:44:04.435236 GENERIC: 0.0 init finished in 0 msecs
2111 06:44:04.435864 GENERIC: 1.0 init
2112 06:44:04.438753 GENERIC: 1.0 init finished in 0 msecs
2113 06:44:04.441973 Devices initialized
2114 06:44:04.445236 Show all devs... After init.
2115 06:44:04.448161 Root Device: enabled 1
2116 06:44:04.451874 CPU_CLUSTER: 0: enabled 1
2117 06:44:04.452342 DOMAIN: 0000: enabled 1
2118 06:44:04.454744 GPIO: 0: enabled 1
2119 06:44:04.458331 PCI: 00:00.0: enabled 1
2120 06:44:04.458904 PCI: 00:01.0: enabled 0
2121 06:44:04.461512 PCI: 00:01.1: enabled 0
2122 06:44:04.464632 PCI: 00:02.0: enabled 1
2123 06:44:04.468168 PCI: 00:04.0: enabled 1
2124 06:44:04.468633 PCI: 00:05.0: enabled 0
2125 06:44:04.472121 PCI: 00:06.0: enabled 1
2126 06:44:04.474972 PCI: 00:06.2: enabled 0
2127 06:44:04.478462 PCI: 00:07.0: enabled 0
2128 06:44:04.479031 PCI: 00:07.1: enabled 0
2129 06:44:04.481911 PCI: 00:07.2: enabled 0
2130 06:44:04.484745 PCI: 00:07.3: enabled 0
2131 06:44:04.485317 PCI: 00:08.0: enabled 0
2132 06:44:04.488995 PCI: 00:09.0: enabled 0
2133 06:44:04.491343 PCI: 00:0a.0: enabled 1
2134 06:44:04.494870 PCI: 00:0d.0: enabled 1
2135 06:44:04.495508 PCI: 00:0d.1: enabled 0
2136 06:44:04.498348 PCI: 00:0d.2: enabled 0
2137 06:44:04.501436 PCI: 00:0d.3: enabled 0
2138 06:44:04.504766 PCI: 00:0e.0: enabled 0
2139 06:44:04.505394 PCI: 00:10.0: enabled 0
2140 06:44:04.507846 PCI: 00:10.1: enabled 0
2141 06:44:04.511433 PCI: 00:10.6: enabled 0
2142 06:44:04.514683 PCI: 00:10.7: enabled 0
2143 06:44:04.515198 PCI: 00:12.0: enabled 0
2144 06:44:04.518006 PCI: 00:12.6: enabled 0
2145 06:44:04.521432 PCI: 00:12.7: enabled 0
2146 06:44:04.521893 PCI: 00:13.0: enabled 0
2147 06:44:04.524438 PCI: 00:14.0: enabled 1
2148 06:44:04.527921 PCI: 00:14.1: enabled 0
2149 06:44:04.531761 PCI: 00:14.2: enabled 1
2150 06:44:04.532223 PCI: 00:14.3: enabled 1
2151 06:44:04.534818 PCI: 00:15.0: enabled 1
2152 06:44:04.537702 PCI: 00:15.1: enabled 1
2153 06:44:04.541957 PCI: 00:15.2: enabled 0
2154 06:44:04.542477 PCI: 00:15.3: enabled 1
2155 06:44:04.544584 PCI: 00:16.0: enabled 1
2156 06:44:04.548369 PCI: 00:16.1: enabled 0
2157 06:44:04.551496 PCI: 00:16.2: enabled 0
2158 06:44:04.552057 PCI: 00:16.3: enabled 0
2159 06:44:04.554665 PCI: 00:16.4: enabled 0
2160 06:44:04.557840 PCI: 00:16.5: enabled 0
2161 06:44:04.561338 PCI: 00:17.0: enabled 0
2162 06:44:04.561854 PCI: 00:19.0: enabled 0
2163 06:44:04.564276 PCI: 00:19.1: enabled 1
2164 06:44:04.567726 PCI: 00:19.2: enabled 0
2165 06:44:04.568255 PCI: 00:1a.0: enabled 0
2166 06:44:04.571263 PCI: 00:1c.0: enabled 0
2167 06:44:04.574767 PCI: 00:1c.1: enabled 0
2168 06:44:04.578061 PCI: 00:1c.2: enabled 0
2169 06:44:04.578643 PCI: 00:1c.3: enabled 0
2170 06:44:04.581262 PCI: 00:1c.4: enabled 0
2171 06:44:04.584535 PCI: 00:1c.5: enabled 0
2172 06:44:04.588065 PCI: 00:1c.6: enabled 0
2173 06:44:04.588635 PCI: 00:1c.7: enabled 0
2174 06:44:04.591168 PCI: 00:1d.0: enabled 0
2175 06:44:04.594814 PCI: 00:1d.1: enabled 0
2176 06:44:04.597772 PCI: 00:1d.2: enabled 0
2177 06:44:04.598239 PCI: 00:1d.3: enabled 0
2178 06:44:04.600888 PCI: 00:1e.0: enabled 1
2179 06:44:04.604407 PCI: 00:1e.1: enabled 0
2180 06:44:04.604978 PCI: 00:1e.2: enabled 0
2181 06:44:04.607797 PCI: 00:1e.3: enabled 1
2182 06:44:04.611019 PCI: 00:1f.0: enabled 1
2183 06:44:04.614468 PCI: 00:1f.1: enabled 0
2184 06:44:04.615049 PCI: 00:1f.2: enabled 1
2185 06:44:04.617726 PCI: 00:1f.3: enabled 1
2186 06:44:04.620992 PCI: 00:1f.4: enabled 0
2187 06:44:04.624613 PCI: 00:1f.5: enabled 1
2188 06:44:04.625186 PCI: 00:1f.6: enabled 0
2189 06:44:04.627965 PCI: 00:1f.7: enabled 0
2190 06:44:04.631408 GENERIC: 0.0: enabled 1
2191 06:44:04.634580 GENERIC: 0.0: enabled 1
2192 06:44:04.635045 GENERIC: 1.0: enabled 1
2193 06:44:04.637993 GENERIC: 0.0: enabled 1
2194 06:44:04.640717 GENERIC: 1.0: enabled 1
2195 06:44:04.641185 USB0 port 0: enabled 1
2196 06:44:04.644243 USB0 port 0: enabled 1
2197 06:44:04.648070 GENERIC: 0.0: enabled 1
2198 06:44:04.651140 I2C: 00:1a: enabled 1
2199 06:44:04.651740 I2C: 00:31: enabled 1
2200 06:44:04.654613 I2C: 00:32: enabled 1
2201 06:44:04.657659 I2C: 00:50: enabled 1
2202 06:44:04.658212 I2C: 00:10: enabled 1
2203 06:44:04.661068 I2C: 00:15: enabled 1
2204 06:44:04.664153 I2C: 00:2c: enabled 1
2205 06:44:04.664621 GENERIC: 0.0: enabled 1
2206 06:44:04.667285 SPI: 00: enabled 1
2207 06:44:04.670983 PNP: 0c09.0: enabled 1
2208 06:44:04.671596 GENERIC: 0.0: enabled 1
2209 06:44:04.674382 USB3 port 0: enabled 1
2210 06:44:04.677297 USB3 port 1: enabled 0
2211 06:44:04.680754 USB3 port 2: enabled 1
2212 06:44:04.681310 USB3 port 3: enabled 0
2213 06:44:04.684440 USB2 port 0: enabled 1
2214 06:44:04.687688 USB2 port 1: enabled 0
2215 06:44:04.688157 USB2 port 2: enabled 1
2216 06:44:04.690647 USB2 port 3: enabled 0
2217 06:44:04.694470 USB2 port 4: enabled 0
2218 06:44:04.695031 USB2 port 5: enabled 1
2219 06:44:04.697579 USB2 port 6: enabled 0
2220 06:44:04.701046 USB2 port 7: enabled 0
2221 06:44:04.704452 USB2 port 8: enabled 1
2222 06:44:04.705012 USB2 port 9: enabled 1
2223 06:44:04.707910 USB3 port 0: enabled 1
2224 06:44:04.710622 USB3 port 1: enabled 0
2225 06:44:04.711087 USB3 port 2: enabled 0
2226 06:44:04.713978 USB3 port 3: enabled 0
2227 06:44:04.717618 GENERIC: 0.0: enabled 1
2228 06:44:04.720931 GENERIC: 1.0: enabled 1
2229 06:44:04.721491 APIC: 00: enabled 1
2230 06:44:04.724346 APIC: 12: enabled 1
2231 06:44:04.724907 APIC: 14: enabled 1
2232 06:44:04.727389 APIC: 16: enabled 1
2233 06:44:04.731024 APIC: 10: enabled 1
2234 06:44:04.731632 APIC: 09: enabled 1
2235 06:44:04.734103 APIC: 08: enabled 1
2236 06:44:04.737434 APIC: 01: enabled 1
2237 06:44:04.737997 PCI: 01:00.0: enabled 1
2238 06:44:04.744095 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2239 06:44:04.747736 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2240 06:44:04.754033 ELOG: NV offset 0xf20000 size 0x4000
2241 06:44:04.760422 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2242 06:44:04.767216 ELOG: Event(17) added with size 13 at 2024-01-03 06:44:05 UTC
2243 06:44:04.773782 ELOG: Event(9E) added with size 10 at 2024-01-03 06:44:05 UTC
2244 06:44:04.780743 ELOG: Event(9F) added with size 14 at 2024-01-03 06:44:05 UTC
2245 06:44:04.787206 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2246 06:44:04.790226 ELOG: Event(A0) added with size 9 at 2024-01-03 06:44:05 UTC
2247 06:44:04.796977 elog_add_boot_reason: Logged dev mode boot
2248 06:44:04.803657 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2249 06:44:04.804079 Finalize devices...
2250 06:44:04.807227 PCI: 00:16.0 final
2251 06:44:04.807721 PCI: 00:1f.2 final
2252 06:44:04.810238 GENERIC: 0.0 final
2253 06:44:04.816806 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2254 06:44:04.817235 GENERIC: 1.0 final
2255 06:44:04.823591 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2256 06:44:04.827241 Devices finalized
2257 06:44:04.830252 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2258 06:44:04.837235 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2259 06:44:04.843866 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2260 06:44:04.847062 ME: HFSTS1 : 0x90000245
2261 06:44:04.850346 ME: HFSTS2 : 0x82100116
2262 06:44:04.857088 ME: HFSTS3 : 0x00000050
2263 06:44:04.860635 ME: HFSTS4 : 0x00004000
2264 06:44:04.863476 ME: HFSTS5 : 0x00000000
2265 06:44:04.870320 ME: HFSTS6 : 0x40600006
2266 06:44:04.873634 ME: Manufacturing Mode : NO
2267 06:44:04.877139 ME: SPI Protection Mode Enabled : YES
2268 06:44:04.879960 ME: FPFs Committed : YES
2269 06:44:04.883682 ME: Manufacturing Vars Locked : YES
2270 06:44:04.890149 ME: FW Partition Table : OK
2271 06:44:04.893648 ME: Bringup Loader Failure : NO
2272 06:44:04.896955 ME: Firmware Init Complete : YES
2273 06:44:04.900268 ME: Boot Options Present : NO
2274 06:44:04.903644 ME: Update In Progress : NO
2275 06:44:04.906899 ME: D0i3 Support : YES
2276 06:44:04.910352 ME: Low Power State Enabled : NO
2277 06:44:04.913768 ME: CPU Replaced : YES
2278 06:44:04.920398 ME: CPU Replacement Valid : YES
2279 06:44:04.923820 ME: Current Working State : 5
2280 06:44:04.926880 ME: Current Operation State : 1
2281 06:44:04.930272 ME: Current Operation Mode : 0
2282 06:44:04.933501 ME: Error Code : 0
2283 06:44:04.937008 ME: Enhanced Debug Mode : NO
2284 06:44:04.939943 ME: CPU Debug Disabled : YES
2285 06:44:04.943295 ME: TXT Support : NO
2286 06:44:04.947098 ME: WP for RO is enabled : YES
2287 06:44:04.953540 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2288 06:44:04.959557 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2289 06:44:04.962737 Ramoops buffer: 0x100000@0x76899000.
2290 06:44:04.969545 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2291 06:44:04.976036 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2292 06:44:04.979816 CBFS: 'fallback/slic' not found.
2293 06:44:04.982584 ACPI: Writing ACPI tables at 7686d000.
2294 06:44:04.986044 ACPI: * FACS
2295 06:44:04.986125 ACPI: * DSDT
2296 06:44:04.992825 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2297 06:44:04.998050 ACPI: * FADT
2298 06:44:04.998132 SCI is IRQ9
2299 06:44:05.004290 ACPI: added table 1/32, length now 40
2300 06:44:05.004372 ACPI: * SSDT
2301 06:44:05.010723 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2302 06:44:05.014322 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2303 06:44:05.021142 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2304 06:44:05.024818 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2305 06:44:05.030910 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2306 06:44:05.034602 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2307 06:44:05.040661 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2308 06:44:05.047567 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2309 06:44:05.051288 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2310 06:44:05.057497 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2311 06:44:05.060639 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2312 06:44:05.067818 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2313 06:44:05.070785 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2314 06:44:05.077629 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2315 06:44:05.083916 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2316 06:44:05.087551 PS2K: Passing 80 keymaps to kernel
2317 06:44:05.093843 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2318 06:44:05.100472 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2319 06:44:05.107485 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2320 06:44:05.114736 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2321 06:44:05.118536 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2322 06:44:05.124012 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2323 06:44:05.130322 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2324 06:44:05.136967 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2325 06:44:05.143725 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2326 06:44:05.150612 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2327 06:44:05.153847 ACPI: added table 2/32, length now 44
2328 06:44:05.153929 ACPI: * MCFG
2329 06:44:05.160512 ACPI: added table 3/32, length now 48
2330 06:44:05.160594 ACPI: * TPM2
2331 06:44:05.163674 TPM2 log created at 0x7685d000
2332 06:44:05.167052 ACPI: added table 4/32, length now 52
2333 06:44:05.170142 ACPI: * LPIT
2334 06:44:05.174150 ACPI: added table 5/32, length now 56
2335 06:44:05.174233 ACPI: * MADT
2336 06:44:05.176906 SCI is IRQ9
2337 06:44:05.180460 ACPI: added table 6/32, length now 60
2338 06:44:05.183415 cmd_reg from pmc_make_ipc_cmd 1052838
2339 06:44:05.189979 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2340 06:44:05.197096 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2341 06:44:05.203525 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2342 06:44:05.207294 PMC CrashLog size in discovery mode: 0xC00
2343 06:44:05.209997 cpu crashlog bar addr: 0x80640000
2344 06:44:05.213222 cpu discovery table offset: 0x6030
2345 06:44:05.216606 cpu_crashlog_discovery_table buffer count: 0x3
2346 06:44:05.223455 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2347 06:44:05.230221 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2348 06:44:05.236606 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2349 06:44:05.243233 PMC crashLog size in discovery mode : 0xC00
2350 06:44:05.249643 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2351 06:44:05.253381 discover mode PMC crashlog size adjusted to: 0x200
2352 06:44:05.259928 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2353 06:44:05.266555 discover mode PMC crashlog size adjusted to: 0x0
2354 06:44:05.269982 m_cpu_crashLog_size : 0x3480 bytes
2355 06:44:05.270065 CPU crashLog present.
2356 06:44:05.276426 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2357 06:44:05.283196 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2358 06:44:05.286755 current = 76876550
2359 06:44:05.286837 ACPI: * DMAR
2360 06:44:05.289876 ACPI: added table 7/32, length now 64
2361 06:44:05.296799 ACPI: added table 8/32, length now 68
2362 06:44:05.296882 ACPI: * HPET
2363 06:44:05.299728 ACPI: added table 9/32, length now 72
2364 06:44:05.302992 ACPI: done.
2365 06:44:05.303074 ACPI tables: 38528 bytes.
2366 06:44:05.306581 smbios_write_tables: 76857000
2367 06:44:05.310642 EC returned error result code 3
2368 06:44:05.313721 Couldn't obtain OEM name from CBI
2369 06:44:05.317315 Create SMBIOS type 16
2370 06:44:05.320421 Create SMBIOS type 17
2371 06:44:05.320504 Create SMBIOS type 20
2372 06:44:05.323942 GENERIC: 0.0 (WIFI Device)
2373 06:44:05.327144 SMBIOS tables: 2156 bytes.
2374 06:44:05.330757 Writing table forward entry at 0x00000500
2375 06:44:05.337347 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2376 06:44:05.340581 Writing coreboot table at 0x76891000
2377 06:44:05.347208 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2378 06:44:05.350234 1. 0000000000001000-000000000009ffff: RAM
2379 06:44:05.356920 2. 00000000000a0000-00000000000fffff: RESERVED
2380 06:44:05.360496 3. 0000000000100000-0000000076856fff: RAM
2381 06:44:05.367113 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2382 06:44:05.370379 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2383 06:44:05.376897 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2384 06:44:05.383340 7. 0000000077000000-00000000803fffff: RESERVED
2385 06:44:05.387199 8. 00000000c0000000-00000000cfffffff: RESERVED
2386 06:44:05.393821 9. 00000000f8000000-00000000f9ffffff: RESERVED
2387 06:44:05.396851 10. 00000000fb000000-00000000fb000fff: RESERVED
2388 06:44:05.400281 11. 00000000fc800000-00000000fe7fffff: RESERVED
2389 06:44:05.406574 12. 00000000feb00000-00000000feb7ffff: RESERVED
2390 06:44:05.410094 13. 00000000fec00000-00000000fecfffff: RESERVED
2391 06:44:05.417012 14. 00000000fed40000-00000000fed6ffff: RESERVED
2392 06:44:05.419886 15. 00000000fed80000-00000000fed87fff: RESERVED
2393 06:44:05.426878 16. 00000000fed90000-00000000fed92fff: RESERVED
2394 06:44:05.429886 17. 00000000feda0000-00000000feda1fff: RESERVED
2395 06:44:05.436886 18. 00000000fedc0000-00000000feddffff: RESERVED
2396 06:44:05.439748 19. 0000000100000000-000000027fbfffff: RAM
2397 06:44:05.443610 Passing 4 GPIOs to payload:
2398 06:44:05.446536 NAME | PORT | POLARITY | VALUE
2399 06:44:05.453114 lid | undefined | high | high
2400 06:44:05.456752 power | undefined | high | low
2401 06:44:05.463723 oprom | undefined | high | low
2402 06:44:05.469747 EC in RW | 0x00000151 | high | high
2403 06:44:05.469832 Board ID: 3
2404 06:44:05.473123 FW config: 0x131
2405 06:44:05.476873 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 54b6
2406 06:44:05.479838 coreboot table: 1788 bytes.
2407 06:44:05.483498 IMD ROOT 0. 0x76fff000 0x00001000
2408 06:44:05.489808 IMD SMALL 1. 0x76ffe000 0x00001000
2409 06:44:05.493620 FSP MEMORY 2. 0x76afe000 0x00500000
2410 06:44:05.496593 CONSOLE 3. 0x76ade000 0x00020000
2411 06:44:05.499955 RW MCACHE 4. 0x76add000 0x0000043c
2412 06:44:05.503045 RO MCACHE 5. 0x76adc000 0x00000fd8
2413 06:44:05.506676 FMAP 6. 0x76adb000 0x0000064a
2414 06:44:05.510420 TIME STAMP 7. 0x76ada000 0x00000910
2415 06:44:05.513343 VBOOT WORK 8. 0x76ac6000 0x00014000
2416 06:44:05.517039 MEM INFO 9. 0x76ac5000 0x000003b8
2417 06:44:05.523392 ROMSTG STCK10. 0x76ac4000 0x00001000
2418 06:44:05.526584 AFTER CAR 11. 0x76ab8000 0x0000c000
2419 06:44:05.530222 RAMSTAGE 12. 0x76a2e000 0x0008a000
2420 06:44:05.533339 ACPI BERT 13. 0x76a1e000 0x00010000
2421 06:44:05.536846 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2422 06:44:05.539855 REFCODE 15. 0x769ae000 0x0006f000
2423 06:44:05.543275 SMM BACKUP 16. 0x7699e000 0x00010000
2424 06:44:05.546561 IGD OPREGION17. 0x76999000 0x00004203
2425 06:44:05.553193 RAMOOPS 18. 0x76899000 0x00100000
2426 06:44:05.556803 COREBOOT 19. 0x76891000 0x00008000
2427 06:44:05.560345 ACPI 20. 0x7686d000 0x00024000
2428 06:44:05.563386 TPM2 TCGLOG21. 0x7685d000 0x00010000
2429 06:44:05.566277 PMC CRASHLOG22. 0x7685c000 0x00000c00
2430 06:44:05.570096 CPU CRASHLOG23. 0x76858000 0x00003480
2431 06:44:05.573447 SMBIOS 24. 0x76857000 0x00001000
2432 06:44:05.576903 IMD small region:
2433 06:44:05.579881 IMD ROOT 0. 0x76ffec00 0x00000400
2434 06:44:05.583471 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2435 06:44:05.586353 VPD 2. 0x76ffeb80 0x00000058
2436 06:44:05.593093 POWER STATE 3. 0x76ffeb20 0x00000044
2437 06:44:05.596941 ROMSTAGE 4. 0x76ffeb00 0x00000004
2438 06:44:05.600064 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2439 06:44:05.603110 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2440 06:44:05.609757 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2441 06:44:05.612956 MTRR: Physical address space:
2442 06:44:05.619795 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2443 06:44:05.626236 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2444 06:44:05.633337 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2445 06:44:05.636610 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2446 06:44:05.643012 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2447 06:44:05.649844 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2448 06:44:05.656492 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2449 06:44:05.659775 MTRR: Fixed MSR 0x250 0x0606060606060606
2450 06:44:05.666578 MTRR: Fixed MSR 0x258 0x0606060606060606
2451 06:44:05.669514 MTRR: Fixed MSR 0x259 0x0000000000000000
2452 06:44:05.672910 MTRR: Fixed MSR 0x268 0x0606060606060606
2453 06:44:05.676311 MTRR: Fixed MSR 0x269 0x0606060606060606
2454 06:44:05.679529 MTRR: Fixed MSR 0x26a 0x0606060606060606
2455 06:44:05.686477 MTRR: Fixed MSR 0x26b 0x0606060606060606
2456 06:44:05.689577 MTRR: Fixed MSR 0x26c 0x0606060606060606
2457 06:44:05.693457 MTRR: Fixed MSR 0x26d 0x0606060606060606
2458 06:44:05.696090 MTRR: Fixed MSR 0x26e 0x0606060606060606
2459 06:44:05.702507 MTRR: Fixed MSR 0x26f 0x0606060606060606
2460 06:44:05.705981 call enable_fixed_mtrr()
2461 06:44:05.709251 CPU physical address size: 39 bits
2462 06:44:05.712889 MTRR: default type WB/UC MTRR counts: 6/6.
2463 06:44:05.715945 MTRR: UC selected as default type.
2464 06:44:05.722643 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2465 06:44:05.729443 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2466 06:44:05.736029 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2467 06:44:05.742337 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2468 06:44:05.749203 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2469 06:44:05.755876 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2470 06:44:05.758902 MTRR: Fixed MSR 0x250 0x0606060606060606
2471 06:44:05.765715 MTRR: Fixed MSR 0x258 0x0606060606060606
2472 06:44:05.768826 MTRR: Fixed MSR 0x259 0x0000000000000000
2473 06:44:05.772077 MTRR: Fixed MSR 0x268 0x0606060606060606
2474 06:44:05.775920 MTRR: Fixed MSR 0x269 0x0606060606060606
2475 06:44:05.779078 MTRR: Fixed MSR 0x26a 0x0606060606060606
2476 06:44:05.785507 MTRR: Fixed MSR 0x26b 0x0606060606060606
2477 06:44:05.789030 MTRR: Fixed MSR 0x26c 0x0606060606060606
2478 06:44:05.792581 MTRR: Fixed MSR 0x26d 0x0606060606060606
2479 06:44:05.795485 MTRR: Fixed MSR 0x26e 0x0606060606060606
2480 06:44:05.802161 MTRR: Fixed MSR 0x26f 0x0606060606060606
2481 06:44:05.805255 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 06:44:05.808874 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 06:44:05.811919 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 06:44:05.818887 MTRR: Fixed MSR 0x258 0x0606060606060606
2485 06:44:05.822583 MTRR: Fixed MSR 0x259 0x0000000000000000
2486 06:44:05.825711 MTRR: Fixed MSR 0x268 0x0606060606060606
2487 06:44:05.828455 MTRR: Fixed MSR 0x269 0x0606060606060606
2488 06:44:05.835174 MTRR: Fixed MSR 0x26a 0x0606060606060606
2489 06:44:05.838602 MTRR: Fixed MSR 0x26b 0x0606060606060606
2490 06:44:05.841658 MTRR: Fixed MSR 0x26c 0x0606060606060606
2491 06:44:05.845090 MTRR: Fixed MSR 0x26d 0x0606060606060606
2492 06:44:05.851630 MTRR: Fixed MSR 0x26e 0x0606060606060606
2493 06:44:05.855018 MTRR: Fixed MSR 0x26f 0x0606060606060606
2494 06:44:05.858731 MTRR: Fixed MSR 0x258 0x0606060606060606
2495 06:44:05.862021 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 06:44:05.864978 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 06:44:05.871534 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 06:44:05.875137 MTRR: Fixed MSR 0x259 0x0000000000000000
2499 06:44:05.878656 MTRR: Fixed MSR 0x268 0x0606060606060606
2500 06:44:05.881763 MTRR: Fixed MSR 0x269 0x0606060606060606
2501 06:44:05.888202 MTRR: Fixed MSR 0x26a 0x0606060606060606
2502 06:44:05.891449 MTRR: Fixed MSR 0x26b 0x0606060606060606
2503 06:44:05.894897 MTRR: Fixed MSR 0x26c 0x0606060606060606
2504 06:44:05.898203 MTRR: Fixed MSR 0x26d 0x0606060606060606
2505 06:44:05.905090 MTRR: Fixed MSR 0x26e 0x0606060606060606
2506 06:44:05.908261 MTRR: Fixed MSR 0x26f 0x0606060606060606
2507 06:44:05.911279 call enable_fixed_mtrr()
2508 06:44:05.914740 MTRR: Fixed MSR 0x258 0x0606060606060606
2509 06:44:05.918178 call enable_fixed_mtrr()
2510 06:44:05.921678 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 06:44:05.924759 call enable_fixed_mtrr()
2512 06:44:05.928049 CPU physical address size: 39 bits
2513 06:44:05.931839 MTRR: Fixed MSR 0x258 0x0606060606060606
2514 06:44:05.934676 MTRR: Fixed MSR 0x258 0x0606060606060606
2515 06:44:05.937947 CPU physical address size: 39 bits
2516 06:44:05.941692 MTRR: Fixed MSR 0x259 0x0000000000000000
2517 06:44:05.947904 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 06:44:05.951473 MTRR: Fixed MSR 0x268 0x0606060606060606
2519 06:44:05.954432 MTRR: Fixed MSR 0x269 0x0606060606060606
2520 06:44:05.957843 MTRR: Fixed MSR 0x26a 0x0606060606060606
2521 06:44:05.964701 MTRR: Fixed MSR 0x26b 0x0606060606060606
2522 06:44:05.967746 MTRR: Fixed MSR 0x26c 0x0606060606060606
2523 06:44:05.971253 MTRR: Fixed MSR 0x26d 0x0606060606060606
2524 06:44:05.974625 MTRR: Fixed MSR 0x26e 0x0606060606060606
2525 06:44:05.981362 MTRR: Fixed MSR 0x26f 0x0606060606060606
2526 06:44:05.984686 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 06:44:05.987772 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 06:44:05.991250 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 06:44:05.994398 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 06:44:06.001234 MTRR: Fixed MSR 0x26a 0x0606060606060606
2531 06:44:06.004628 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 06:44:06.007911 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 06:44:06.010889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 06:44:06.017997 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 06:44:06.021508 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 06:44:06.024817 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 06:44:06.027655 call enable_fixed_mtrr()
2538 06:44:06.031180 CPU physical address size: 39 bits
2539 06:44:06.034449 MTRR: Fixed MSR 0x268 0x0606060606060606
2540 06:44:06.037801 call enable_fixed_mtrr()
2541 06:44:06.042198 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 06:44:06.044799 CPU physical address size: 39 bits
2543 06:44:06.047844 MTRR: Fixed MSR 0x26a 0x0606060606060606
2544 06:44:06.050862 CPU physical address size: 39 bits
2545 06:44:06.057342 MTRR: Fixed MSR 0x26b 0x0606060606060606
2546 06:44:06.061178 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 06:44:06.064606 MTRR: Fixed MSR 0x26c 0x0606060606060606
2548 06:44:06.067302 MTRR: Fixed MSR 0x26d 0x0606060606060606
2549 06:44:06.074031 MTRR: Fixed MSR 0x26e 0x0606060606060606
2550 06:44:06.077426 MTRR: Fixed MSR 0x26f 0x0606060606060606
2551 06:44:06.081071 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 06:44:06.084013 call enable_fixed_mtrr()
2553 06:44:06.087421 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 06:44:06.090904 MTRR: Fixed MSR 0x26c 0x0606060606060606
2555 06:44:06.097665 MTRR: Fixed MSR 0x26d 0x0606060606060606
2556 06:44:06.100757 MTRR: Fixed MSR 0x26e 0x0606060606060606
2557 06:44:06.103960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2558 06:44:06.107269 CPU physical address size: 39 bits
2559 06:44:06.111154 call enable_fixed_mtrr()
2560 06:44:06.114030 CPU physical address size: 39 bits
2561 06:44:06.114128
2562 06:44:06.117344 MTRR check
2563 06:44:06.120609 Fixed MTRRs : Enabled
2564 06:44:06.120699 Variable MTRRs: Enabled
2565 06:44:06.120761
2566 06:44:06.127283 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2567 06:44:06.130507 Checking cr50 for pending updates
2568 06:44:06.142680 Reading cr50 TPM mode
2569 06:44:06.157806 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2570 06:44:06.168131 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2571 06:44:06.171994 Checking segment from ROM address 0xf96cbe6c
2572 06:44:06.175294 Checking segment from ROM address 0xf96cbe88
2573 06:44:06.181313 Loading segment from ROM address 0xf96cbe6c
2574 06:44:06.181397 code (compression=1)
2575 06:44:06.191253 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2576 06:44:06.197866 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2577 06:44:06.201230 using LZMA
2578 06:44:06.223299 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2579 06:44:06.229661 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2580 06:44:06.237754 Loading segment from ROM address 0xf96cbe88
2581 06:44:06.241153 Entry Point 0x30000000
2582 06:44:06.241236 Loaded segments
2583 06:44:06.248045 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2584 06:44:06.254222 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2585 06:44:06.258075 Finalizing chipset.
2586 06:44:06.258156 apm_control: Finalizing SMM.
2587 06:44:06.261131 APMC done.
2588 06:44:06.264402 HECI: CSE device 16.1 is disabled
2589 06:44:06.267782 HECI: CSE device 16.2 is disabled
2590 06:44:06.271432 HECI: CSE device 16.3 is disabled
2591 06:44:06.274613 HECI: CSE device 16.4 is disabled
2592 06:44:06.277848 HECI: CSE device 16.5 is disabled
2593 06:44:06.281211 HECI: Sending End-of-Post
2594 06:44:06.289635 CSE: EOP requested action: continue boot
2595 06:44:06.292858 CSE EOP successful, continuing boot
2596 06:44:06.299201 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2597 06:44:06.302987 mp_park_aps done after 0 msecs.
2598 06:44:06.307114 Jumping to boot code at 0x30000000(0x76891000)
2599 06:44:06.315706 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2600 06:44:06.320082
2601 06:44:06.320164
2602 06:44:06.320226
2603 06:44:06.323235 Starting depthcharge on Volmar...
2604 06:44:06.323306
2605 06:44:06.323737 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2606 06:44:06.323833 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2607 06:44:06.323923 Setting prompt string to ['brya:']
2608 06:44:06.324000 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2609 06:44:06.330037 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2610 06:44:06.330123
2611 06:44:06.336498 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2612 06:44:06.336575
2613 06:44:06.343238 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2614 06:44:06.343313
2615 06:44:06.346487 configure_storage: Failed to remap 1C:2
2616 06:44:06.346556
2617 06:44:06.349827 Wipe memory regions:
2618 06:44:06.349895
2619 06:44:06.353130 [0x00000000001000, 0x000000000a0000)
2620 06:44:06.353208
2621 06:44:06.356523 [0x00000000100000, 0x00000030000000)
2622 06:44:06.462218
2623 06:44:06.465752 [0x00000032668e60, 0x00000076857000)
2624 06:44:06.613461
2625 06:44:06.616809 [0x00000100000000, 0x0000027fc00000)
2626 06:44:07.444319
2627 06:44:07.447798 ec_init: CrosEC protocol v3 supported (256, 256)
2628 06:44:08.057896
2629 06:44:08.058047 R8152: Initializing
2630 06:44:08.058119
2631 06:44:08.061240 Version 9 (ocp_data = 6010)
2632 06:44:08.061322
2633 06:44:08.064524 R8152: Done initializing
2634 06:44:08.064598
2635 06:44:08.067863 Adding net device
2636 06:44:08.368991
2637 06:44:08.372036 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2638 06:44:08.372118
2639 06:44:08.372183
2640 06:44:08.372251
2641 06:44:08.372536 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2643 06:44:08.472830 brya: tftpboot 192.168.201.1 12434479/tftp-deploy-8hn82sqf/kernel/bzImage 12434479/tftp-deploy-8hn82sqf/kernel/cmdline 12434479/tftp-deploy-8hn82sqf/ramdisk/ramdisk.cpio.gz
2644 06:44:08.472950 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2645 06:44:08.473040 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2646 06:44:08.477063 tftpboot 192.168.201.1 12434479/tftp-deploy-8hn82sqf/kernel/bzIploy-8hn82sqf/kernel/cmdline 12434479/tftp-deploy-8hn82sqf/ramdisk/ramdisk.cpio.gz
2647 06:44:08.477145
2648 06:44:08.477217 Waiting for link
2649 06:44:08.680168
2650 06:44:08.680289 done.
2651 06:44:08.680356
2652 06:44:08.680423 MAC: 00:e0:4c:68:00:8b
2653 06:44:08.680483
2654 06:44:08.683274 Sending DHCP discover... done.
2655 06:44:08.683344
2656 06:44:08.686668 Waiting for reply... done.
2657 06:44:08.686736
2658 06:44:08.689808 Sending DHCP request... done.
2659 06:44:08.689904
2660 06:44:08.693235 Waiting for reply... done.
2661 06:44:08.696371
2662 06:44:08.696442 My ip is 192.168.201.16
2663 06:44:08.696509
2664 06:44:08.699785 The DHCP server ip is 192.168.201.1
2665 06:44:08.699856
2666 06:44:08.706094 TFTP server IP predefined by user: 192.168.201.1
2667 06:44:08.706170
2668 06:44:08.712635 Bootfile predefined by user: 12434479/tftp-deploy-8hn82sqf/kernel/bzImage
2669 06:44:08.712714
2670 06:44:08.716551 Sending tftp read request... done.
2671 06:44:08.716640
2672 06:44:08.719418 Waiting for the transfer...
2673 06:44:08.719501
2674 06:44:08.967453 00000000 ################################################################
2675 06:44:08.967576
2676 06:44:09.238796 00080000 ################################################################
2677 06:44:09.238936
2678 06:44:09.495522 00100000 ################################################################
2679 06:44:09.495666
2680 06:44:09.739763 00180000 ################################################################
2681 06:44:09.739903
2682 06:44:09.982269 00200000 ################################################################
2683 06:44:09.982409
2684 06:44:10.228674 00280000 ################################################################
2685 06:44:10.228807
2686 06:44:10.492919 00300000 ################################################################
2687 06:44:10.493064
2688 06:44:10.759344 00380000 ################################################################
2689 06:44:10.759491
2690 06:44:11.026994 00400000 ################################################################
2691 06:44:11.027124
2692 06:44:11.291655 00480000 ################################################################
2693 06:44:11.291807
2694 06:44:11.554654 00500000 ################################################################
2695 06:44:11.554780
2696 06:44:11.808662 00580000 ################################################################
2697 06:44:11.808798
2698 06:44:12.073647 00600000 ################################################################
2699 06:44:12.073785
2700 06:44:12.327996 00680000 ################################################################
2701 06:44:12.328130
2702 06:44:12.572463 00700000 ################################################################
2703 06:44:12.572594
2704 06:44:12.823574 00780000 ################################################################
2705 06:44:12.823714
2706 06:44:12.912344 00800000 ####################### done.
2707 06:44:12.912452
2708 06:44:12.915872 The bootfile was 8576912 bytes long.
2709 06:44:12.915957
2710 06:44:12.919319 Sending tftp read request... done.
2711 06:44:12.919437
2712 06:44:12.922310 Waiting for the transfer...
2713 06:44:12.922393
2714 06:44:13.185635 00000000 ################################################################
2715 06:44:13.185769
2716 06:44:13.434550 00080000 ################################################################
2717 06:44:13.434704
2718 06:44:13.684907 00100000 ################################################################
2719 06:44:13.685052
2720 06:44:13.939168 00180000 ################################################################
2721 06:44:13.939301
2722 06:44:14.187727 00200000 ################################################################
2723 06:44:14.187868
2724 06:44:14.437487 00280000 ################################################################
2725 06:44:14.437616
2726 06:44:14.693899 00300000 ################################################################
2727 06:44:14.694050
2728 06:44:14.964839 00380000 ################################################################
2729 06:44:14.964976
2730 06:44:15.223900 00400000 ################################################################
2731 06:44:15.224027
2732 06:44:15.499759 00480000 ################################################################
2733 06:44:15.499893
2734 06:44:15.795300 00500000 ################################################################
2735 06:44:15.795480
2736 06:44:16.056207 00580000 ################################################################
2737 06:44:16.056343
2738 06:44:16.309465 00600000 ################################################################
2739 06:44:16.309611
2740 06:44:16.568999 00680000 ################################################################
2741 06:44:16.569152
2742 06:44:16.817010 00700000 ################################################################
2743 06:44:16.817144
2744 06:44:17.070913 00780000 ################################################################
2745 06:44:17.071078
2746 06:44:17.279290 00800000 ###################################################### done.
2747 06:44:17.279461
2748 06:44:17.282793 Sending tftp read request... done.
2749 06:44:17.282888
2750 06:44:17.285836 Waiting for the transfer...
2751 06:44:17.285928
2752 06:44:17.289658 00000000 # done.
2753 06:44:17.289839
2754 06:44:17.299237 Command line loaded dynamically from TFTP file: 12434479/tftp-deploy-8hn82sqf/kernel/cmdline
2755 06:44:17.299447
2756 06:44:17.312326 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2757 06:44:17.318269
2758 06:44:17.321711 Shutting down all USB controllers.
2759 06:44:17.321990
2760 06:44:17.322224 Removing current net device
2761 06:44:17.322432
2762 06:44:17.324739 Finalizing coreboot
2763 06:44:17.324951
2764 06:44:17.331766 Exiting depthcharge with code 4 at timestamp: 21258641
2765 06:44:17.332143
2766 06:44:17.332477
2767 06:44:17.332780 Starting kernel ...
2768 06:44:17.333071
2769 06:44:17.333358
2770 06:44:17.334330 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2771 06:44:17.334728 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2772 06:44:17.335031 Setting prompt string to ['Linux version [0-9]']
2773 06:44:17.335342 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2774 06:44:17.335759 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2776 06:48:47.335557 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2778 06:48:47.337125 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2780 06:48:47.338415 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2783 06:48:47.340410 end: 2 depthcharge-action (duration 00:05:00) [common]
2785 06:48:47.341647 Cleaning after the job
2786 06:48:47.342103 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/ramdisk
2787 06:48:47.347922 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/kernel
2788 06:48:47.354752 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434479/tftp-deploy-8hn82sqf/modules
2789 06:48:47.357685 start: 5.1 power-off (timeout 00:00:30) [common]
2790 06:48:47.358961 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
2791 06:48:47.452829 >> Command sent successfully.
2792 06:48:47.456422 Returned 0 in 0 seconds
2793 06:48:47.557442 end: 5.1 power-off (duration 00:00:00) [common]
2795 06:48:47.559261 start: 5.2 read-feedback (timeout 00:10:00) [common]
2796 06:48:47.560705 Listened to connection for namespace 'common' for up to 1s
2798 06:48:47.562249 Listened to connection for namespace 'common' for up to 1s
2799 06:48:48.561034 Finalising connection for namespace 'common'
2800 06:48:48.561813 Disconnecting from shell: Finalise
2801 06:48:48.562257
2802 06:48:48.663319 end: 5.2 read-feedback (duration 00:00:01) [common]
2803 06:48:48.663957 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12434479
2804 06:48:48.683759 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12434479
2805 06:48:48.683894 JobError: Your job cannot terminate cleanly.