Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 06:44:00.685362 lava-dispatcher, installed at version: 2023.10
2 06:44:00.685570 start: 0 validate
3 06:44:00.685702 Start time: 2024-01-03 06:44:00.685695+00:00 (UTC)
4 06:44:00.685819 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:44:00.685955 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 06:44:00.955994 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:44:00.956744 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:44:01.219802 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:44:01.220540 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:44:04.137189 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:44:04.137970 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 06:44:04.407089 validate duration: 3.72
14 06:44:04.407368 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:44:04.407465 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:44:04.407551 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:44:04.407673 Not decompressing ramdisk as can be used compressed.
18 06:44:04.407760 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 06:44:04.407823 saving as /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/ramdisk/initrd.cpio.gz
20 06:44:04.407885 total size: 5432690 (5 MB)
21 06:44:04.918563 progress 0 % (0 MB)
22 06:44:04.928890 progress 5 % (0 MB)
23 06:44:04.937417 progress 10 % (0 MB)
24 06:44:04.945582 progress 15 % (0 MB)
25 06:44:04.951429 progress 20 % (1 MB)
26 06:44:04.955700 progress 25 % (1 MB)
27 06:44:04.959016 progress 30 % (1 MB)
28 06:44:04.962276 progress 35 % (1 MB)
29 06:44:04.964961 progress 40 % (2 MB)
30 06:44:04.967338 progress 45 % (2 MB)
31 06:44:04.969676 progress 50 % (2 MB)
32 06:44:04.972003 progress 55 % (2 MB)
33 06:44:04.974020 progress 60 % (3 MB)
34 06:44:04.975966 progress 65 % (3 MB)
35 06:44:04.977982 progress 70 % (3 MB)
36 06:44:04.979768 progress 75 % (3 MB)
37 06:44:04.981450 progress 80 % (4 MB)
38 06:44:04.983052 progress 85 % (4 MB)
39 06:44:04.984845 progress 90 % (4 MB)
40 06:44:04.986378 progress 95 % (4 MB)
41 06:44:04.987853 progress 100 % (5 MB)
42 06:44:04.988079 5 MB downloaded in 0.58 s (8.93 MB/s)
43 06:44:04.988252 end: 1.1.1 http-download (duration 00:00:01) [common]
45 06:44:04.988507 end: 1.1 download-retry (duration 00:00:01) [common]
46 06:44:04.988599 start: 1.2 download-retry (timeout 00:09:59) [common]
47 06:44:04.988688 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 06:44:04.988832 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 06:44:04.988908 saving as /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/kernel/bzImage
50 06:44:04.988975 total size: 8576912 (8 MB)
51 06:44:04.989039 No compression specified
52 06:44:04.990319 progress 0 % (0 MB)
53 06:44:04.992901 progress 5 % (0 MB)
54 06:44:04.995256 progress 10 % (0 MB)
55 06:44:04.997538 progress 15 % (1 MB)
56 06:44:04.999803 progress 20 % (1 MB)
57 06:44:05.002087 progress 25 % (2 MB)
58 06:44:05.004365 progress 30 % (2 MB)
59 06:44:05.006655 progress 35 % (2 MB)
60 06:44:05.008938 progress 40 % (3 MB)
61 06:44:05.011254 progress 45 % (3 MB)
62 06:44:05.013569 progress 50 % (4 MB)
63 06:44:05.015893 progress 55 % (4 MB)
64 06:44:05.018295 progress 60 % (4 MB)
65 06:44:05.020521 progress 65 % (5 MB)
66 06:44:05.022745 progress 70 % (5 MB)
67 06:44:05.024961 progress 75 % (6 MB)
68 06:44:05.027192 progress 80 % (6 MB)
69 06:44:05.029422 progress 85 % (6 MB)
70 06:44:05.031638 progress 90 % (7 MB)
71 06:44:05.033876 progress 95 % (7 MB)
72 06:44:05.036119 progress 100 % (8 MB)
73 06:44:05.036324 8 MB downloaded in 0.05 s (172.75 MB/s)
74 06:44:05.036468 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:44:05.036699 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:44:05.036786 start: 1.3 download-retry (timeout 00:09:59) [common]
78 06:44:05.036876 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 06:44:05.037053 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 06:44:05.037122 saving as /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/nfsrootfs/full.rootfs.tar
81 06:44:05.037183 total size: 133380384 (127 MB)
82 06:44:05.037245 Using unxz to decompress xz
83 06:44:05.041636 progress 0 % (0 MB)
84 06:44:05.384531 progress 5 % (6 MB)
85 06:44:05.740891 progress 10 % (12 MB)
86 06:44:06.030768 progress 15 % (19 MB)
87 06:44:06.215719 progress 20 % (25 MB)
88 06:44:06.458164 progress 25 % (31 MB)
89 06:44:06.803303 progress 30 % (38 MB)
90 06:44:07.145566 progress 35 % (44 MB)
91 06:44:07.548542 progress 40 % (50 MB)
92 06:44:07.937412 progress 45 % (57 MB)
93 06:44:08.302553 progress 50 % (63 MB)
94 06:44:08.693649 progress 55 % (69 MB)
95 06:44:09.073465 progress 60 % (76 MB)
96 06:44:09.454990 progress 65 % (82 MB)
97 06:44:09.837051 progress 70 % (89 MB)
98 06:44:10.214537 progress 75 % (95 MB)
99 06:44:10.668883 progress 80 % (101 MB)
100 06:44:11.100483 progress 85 % (108 MB)
101 06:44:11.365868 progress 90 % (114 MB)
102 06:44:11.729539 progress 95 % (120 MB)
103 06:44:12.127478 progress 100 % (127 MB)
104 06:44:12.133017 127 MB downloaded in 7.10 s (17.93 MB/s)
105 06:44:12.133319 end: 1.3.1 http-download (duration 00:00:07) [common]
107 06:44:12.133724 end: 1.3 download-retry (duration 00:00:07) [common]
108 06:44:12.133846 start: 1.4 download-retry (timeout 00:09:52) [common]
109 06:44:12.133971 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 06:44:12.134195 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 06:44:12.134297 saving as /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/modules/modules.tar
112 06:44:12.134396 total size: 250972 (0 MB)
113 06:44:12.134498 Using unxz to decompress xz
114 06:44:12.138604 progress 13 % (0 MB)
115 06:44:12.139005 progress 26 % (0 MB)
116 06:44:12.139251 progress 39 % (0 MB)
117 06:44:12.140872 progress 52 % (0 MB)
118 06:44:12.142812 progress 65 % (0 MB)
119 06:44:12.144669 progress 78 % (0 MB)
120 06:44:12.146435 progress 91 % (0 MB)
121 06:44:12.148349 progress 100 % (0 MB)
122 06:44:12.153718 0 MB downloaded in 0.02 s (12.39 MB/s)
123 06:44:12.153967 end: 1.4.1 http-download (duration 00:00:00) [common]
125 06:44:12.154265 end: 1.4 download-retry (duration 00:00:00) [common]
126 06:44:12.154375 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 06:44:12.154491 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 06:44:14.294464 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12434509/extract-nfsrootfs-6rsoakfb
129 06:44:14.294661 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 06:44:14.294770 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 06:44:14.294937 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e
132 06:44:14.295074 makedir: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin
133 06:44:14.295182 makedir: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/tests
134 06:44:14.295283 makedir: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/results
135 06:44:14.295386 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-add-keys
136 06:44:14.295531 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-add-sources
137 06:44:14.295662 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-background-process-start
138 06:44:14.295792 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-background-process-stop
139 06:44:14.295919 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-common-functions
140 06:44:14.296045 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-echo-ipv4
141 06:44:14.296206 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-install-packages
142 06:44:14.296333 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-installed-packages
143 06:44:14.296458 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-os-build
144 06:44:14.296588 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-probe-channel
145 06:44:14.296715 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-probe-ip
146 06:44:14.296840 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-target-ip
147 06:44:14.296966 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-target-mac
148 06:44:14.297131 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-target-storage
149 06:44:14.297263 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-case
150 06:44:14.297392 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-event
151 06:44:14.297517 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-feedback
152 06:44:14.297643 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-raise
153 06:44:14.297768 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-reference
154 06:44:14.297895 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-runner
155 06:44:14.298020 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-set
156 06:44:14.298144 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-test-shell
157 06:44:14.298271 Updating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-install-packages (oe)
158 06:44:14.298425 Updating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/bin/lava-installed-packages (oe)
159 06:44:14.298550 Creating /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/environment
160 06:44:14.298647 LAVA metadata
161 06:44:14.298718 - LAVA_JOB_ID=12434509
162 06:44:14.298782 - LAVA_DISPATCHER_IP=192.168.201.1
163 06:44:14.298885 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 06:44:14.298952 skipped lava-vland-overlay
165 06:44:14.299028 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 06:44:14.299108 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 06:44:14.299171 skipped lava-multinode-overlay
168 06:44:14.299244 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 06:44:14.299324 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 06:44:14.299398 Loading test definitions
171 06:44:14.299489 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 06:44:14.299560 Using /lava-12434509 at stage 0
173 06:44:14.299873 uuid=12434509_1.5.2.3.1 testdef=None
174 06:44:14.299962 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 06:44:14.300047 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 06:44:14.300583 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 06:44:14.300802 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 06:44:14.301478 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 06:44:14.301705 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 06:44:14.302318 runner path: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/0/tests/0_dmesg test_uuid 12434509_1.5.2.3.1
183 06:44:14.302473 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 06:44:14.302695 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 06:44:14.302769 Using /lava-12434509 at stage 1
187 06:44:14.303065 uuid=12434509_1.5.2.3.5 testdef=None
188 06:44:14.303154 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 06:44:14.303240 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 06:44:14.303703 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 06:44:14.303915 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 06:44:14.304553 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 06:44:14.304776 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 06:44:14.305500 runner path: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/1/tests/1_bootrr test_uuid 12434509_1.5.2.3.5
197 06:44:14.305659 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 06:44:14.305860 Creating lava-test-runner.conf files
200 06:44:14.305923 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/0 for stage 0
201 06:44:14.306012 - 0_dmesg
202 06:44:14.306091 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434509/lava-overlay-dwprup0e/lava-12434509/1 for stage 1
203 06:44:14.306207 - 1_bootrr
204 06:44:14.306364 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 06:44:14.306466 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 06:44:14.313670 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 06:44:14.313773 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 06:44:14.313859 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 06:44:14.313945 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 06:44:14.314031 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 06:44:14.449447 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 06:44:14.449820 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 06:44:14.449932 extracting modules file /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434509/extract-nfsrootfs-6rsoakfb
214 06:44:14.463695 extracting modules file /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434509/extract-overlay-ramdisk-pff40b45/ramdisk
215 06:44:14.477997 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 06:44:14.478127 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 06:44:14.478213 [common] Applying overlay to NFS
218 06:44:14.478283 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434509/compress-overlay-86cr0r_l/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12434509/extract-nfsrootfs-6rsoakfb
219 06:44:14.486822 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 06:44:14.486933 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 06:44:14.487025 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 06:44:14.487116 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 06:44:14.487197 Building ramdisk /var/lib/lava/dispatcher/tmp/12434509/extract-overlay-ramdisk-pff40b45/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12434509/extract-overlay-ramdisk-pff40b45/ramdisk
224 06:44:14.565243 >> 26160 blocks
225 06:44:15.098099 rename /var/lib/lava/dispatcher/tmp/12434509/extract-overlay-ramdisk-pff40b45/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/ramdisk/ramdisk.cpio.gz
226 06:44:15.098525 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 06:44:15.098644 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 06:44:15.098744 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 06:44:15.098840 No mkimage arch provided, not using FIT.
230 06:44:15.098927 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 06:44:15.099015 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 06:44:15.099115 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 06:44:15.099208 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 06:44:15.099317 No LXC device requested
235 06:44:15.099395 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 06:44:15.099481 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 06:44:15.099566 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 06:44:15.099641 Checking files for TFTP limit of 4294967296 bytes.
239 06:44:15.100075 end: 1 tftp-deploy (duration 00:00:11) [common]
240 06:44:15.100180 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 06:44:15.100268 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 06:44:15.100389 substitutions:
243 06:44:15.100483 - {DTB}: None
244 06:44:15.100545 - {INITRD}: 12434509/tftp-deploy-u45h3z7v/ramdisk/ramdisk.cpio.gz
245 06:44:15.100602 - {KERNEL}: 12434509/tftp-deploy-u45h3z7v/kernel/bzImage
246 06:44:15.100659 - {LAVA_MAC}: None
247 06:44:15.100714 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12434509/extract-nfsrootfs-6rsoakfb
248 06:44:15.100783 - {NFS_SERVER_IP}: 192.168.201.1
249 06:44:15.100865 - {PRESEED_CONFIG}: None
250 06:44:15.100920 - {PRESEED_LOCAL}: None
251 06:44:15.101000 - {RAMDISK}: 12434509/tftp-deploy-u45h3z7v/ramdisk/ramdisk.cpio.gz
252 06:44:15.101070 - {ROOT_PART}: None
253 06:44:15.101125 - {ROOT}: None
254 06:44:15.101192 - {SERVER_IP}: 192.168.201.1
255 06:44:15.101245 - {TEE}: None
256 06:44:15.101298 Parsed boot commands:
257 06:44:15.101350 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 06:44:15.101530 Parsed boot commands: tftpboot 192.168.201.1 12434509/tftp-deploy-u45h3z7v/kernel/bzImage 12434509/tftp-deploy-u45h3z7v/kernel/cmdline 12434509/tftp-deploy-u45h3z7v/ramdisk/ramdisk.cpio.gz
259 06:44:15.101633 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 06:44:15.101761 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 06:44:15.101856 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 06:44:15.101940 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 06:44:15.102008 Not connected, no need to disconnect.
264 06:44:15.102080 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 06:44:15.102165 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 06:44:15.102274 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
267 06:44:15.106284 Setting prompt string to ['lava-test: # ']
268 06:44:15.106631 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 06:44:15.106736 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 06:44:15.106847 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 06:44:15.106966 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 06:44:15.107210 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
273 06:44:20.255320 >> Command sent successfully.
274 06:44:20.266369 Returned 0 in 5 seconds
275 06:44:20.367648 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 06:44:20.369203 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 06:44:20.369667 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 06:44:20.370147 Setting prompt string to 'Starting depthcharge on Volmar...'
280 06:44:20.370482 Changing prompt to 'Starting depthcharge on Volmar...'
281 06:44:20.370808 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 06:44:20.372037 [Enter `^Ec?' for help]
283 06:44:21.737118
284 06:44:21.737677
285 06:44:21.744819 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 06:44:21.748350 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 06:44:21.752422 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 06:44:21.760504 CPU: AES supported, TXT NOT supported, VT supported
289 06:44:21.764175 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 06:44:21.767818 Cache size = 10 MiB
291 06:44:21.771365 MCH: device id 4609 (rev 04) is Alderlake-P
292 06:44:21.778893 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 06:44:21.782278 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 06:44:21.785587 VBOOT: Loading verstage.
295 06:44:21.789817 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 06:44:21.792697 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 06:44:21.800102 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 06:44:21.806478 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 06:44:21.816666 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 06:44:21.817176
301 06:44:21.817554
302 06:44:21.822862 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 06:44:21.831693 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 06:44:21.835253 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 06:44:21.838678 I2C TX abort detected (00000001)
306 06:44:21.842099 cr50_i2c_read: Address write failed
307 06:44:21.853019 .done! DID_VID 0x00281ae0
308 06:44:21.856910 TPM ready after 0 ms
309 06:44:21.860228 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
310 06:44:21.873743 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
311 06:44:21.880043 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 06:44:21.969100 tlcl_send_startup: Startup return code is 0
313 06:44:21.969687 TPM: setup succeeded
314 06:44:21.988341 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 06:44:22.010895 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 06:44:22.014275 Chrome EC: UHEPI supported
317 06:44:22.017742 Reading cr50 boot mode
318 06:44:22.033149 Cr50 says boot_mode is VERIFIED_RW(0x00).
319 06:44:22.033676 Phase 1
320 06:44:22.038987 FMAP: area GBB found @ 1805000 (458752 bytes)
321 06:44:22.045480 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
322 06:44:22.052491 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
323 06:44:22.059652 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
324 06:44:22.060132 Phase 2
325 06:44:22.063552 Phase 3
326 06:44:22.066884 FMAP: area GBB found @ 1805000 (458752 bytes)
327 06:44:22.070698 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 06:44:22.077803 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 06:44:22.081312 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 06:44:22.087957 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
331 06:44:22.098436 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
332 06:44:22.105211 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
333 06:44:22.117681 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
334 06:44:22.120852 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 06:44:22.127491 VB2:vb2_verify_fw_preamble() Verifying preamble.
336 06:44:22.134673 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
337 06:44:22.140732 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
338 06:44:22.147675 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
339 06:44:22.151438 Phase 4
340 06:44:22.154900 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
341 06:44:22.161393 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
342 06:44:22.373967 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
343 06:44:22.380729 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
344 06:44:22.383949 Saving vboot hash.
345 06:44:22.390594 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
346 06:44:22.406461 tlcl_extend: response is 0
347 06:44:22.413196 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
348 06:44:22.416909 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
349 06:44:22.434064 tlcl_extend: response is 0
350 06:44:22.440876 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
351 06:44:22.459163 tlcl_lock_nv_write: response is 0
352 06:44:22.477052 tlcl_lock_nv_write: response is 0
353 06:44:22.477604 Slot A is selected
354 06:44:22.483848 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
355 06:44:22.490273 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
356 06:44:22.497501 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
357 06:44:22.503895 BS: verstage times (exec / console): total (unknown) / 264 ms
358 06:44:22.504470
359 06:44:22.504852
360 06:44:22.510616 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
361 06:44:22.514007 Google Chrome EC: version:
362 06:44:22.517463 ro: volmar_v2.0.14126-e605144e9c
363 06:44:22.520922 rw: volmar_v0.0.55-22d1557
364 06:44:22.524150 running image: 2
365 06:44:22.527429 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
366 06:44:22.537502 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 06:44:22.544027 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 06:44:22.550832 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
369 06:44:22.561032 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
370 06:44:22.571069 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
371 06:44:22.574401 EC took 942us to calculate image hash
372 06:44:22.584664 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
373 06:44:22.587594 VB2:sync_ec() select_rw=RW(active)
374 06:44:22.600309 Waited 1944us to clear limit power flag.
375 06:44:22.603392 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 06:44:22.606712 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 06:44:22.610105 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 06:44:22.616747 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 06:44:22.620136 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
380 06:44:22.623246 TCO_STS: 0000 0000
381 06:44:22.627072 GEN_PMCON: d0015038 00002200
382 06:44:22.630331 GBLRST_CAUSE: 00000000 00000000
383 06:44:22.630808 HPR_CAUSE0: 00000000
384 06:44:22.633440 prev_sleep_state 5
385 06:44:22.636611 Abort disabling TXT, as CPU is not TXT capable.
386 06:44:22.644651 cse_lite: Number of partitions = 3
387 06:44:22.648824 cse_lite: Current partition = RO
388 06:44:22.649447 cse_lite: Next partition = RO
389 06:44:22.652202 cse_lite: Flags = 0x7
390 06:44:22.658323 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
391 06:44:22.667985 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
392 06:44:22.671252 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 06:44:22.677920 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 06:44:22.684859 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
395 06:44:22.691650 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
396 06:44:22.694665 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 06:44:22.701483 cse_lite: Set Boot Partition Info Command (RW)
398 06:44:22.704841 HECI: Global Reset(Type:1) Command
399 06:44:24.148148 ڡ
400 06:44:24.151459 MCH: device id 4609 (rev 04) is Alderlake-P
401 06:44:24.154657 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
402 06:44:24.161834 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
403 06:44:24.164850 VBOOT: Loading verstage.
404 06:44:24.169040 FMAP: Found "FLASH" version 1.1 at 0x1804000.
405 06:44:24.172198 FMAP: base = 0x0 size = 0x2000000 #areas = 37
406 06:44:24.178996 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
407 06:44:24.185889 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
408 06:44:24.192714 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
409 06:44:24.196567
410 06:44:24.197095
411 06:44:24.203123 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
412 06:44:24.209959 Probing TPM I2C: I2C bus 1 version 0x3230302a
413 06:44:24.213052 DW I2C bus 1 at 0xfe022000 (400 KHz)
414 06:44:24.216302 done! DID_VID 0x00281ae0
415 06:44:24.219631 TPM ready after 0 ms
416 06:44:24.223267 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
417 06:44:24.232248 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
418 06:44:24.239640 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
419 06:44:24.327248 tlcl_send_startup: Startup return code is 0
420 06:44:24.327795 TPM: setup succeeded
421 06:44:24.347340 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
422 06:44:24.369064 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
423 06:44:24.373185 Chrome EC: UHEPI supported
424 06:44:24.376465 Reading cr50 boot mode
425 06:44:24.391033 Cr50 says boot_mode is VERIFIED_RW(0x00).
426 06:44:24.391654 Phase 1
427 06:44:24.397962 FMAP: area GBB found @ 1805000 (458752 bytes)
428 06:44:24.404651 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
429 06:44:24.411303 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
430 06:44:24.417677 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
431 06:44:24.421520 Phase 2
432 06:44:24.421991 Phase 3
433 06:44:24.424401 FMAP: area GBB found @ 1805000 (458752 bytes)
434 06:44:24.431394 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
435 06:44:24.434413 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
436 06:44:24.441374 VB2:vb2_verify_keyblock() Checking keyblock signature...
437 06:44:24.447610 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
438 06:44:24.454347 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
439 06:44:24.464739 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
440 06:44:24.476196 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
441 06:44:24.479867 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
442 06:44:24.486364 VB2:vb2_verify_fw_preamble() Verifying preamble.
443 06:44:24.492810 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
444 06:44:24.499431 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
445 06:44:24.506153 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
446 06:44:24.510613 Phase 4
447 06:44:24.513921 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
448 06:44:24.520628 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
449 06:44:24.733181 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
450 06:44:24.739968 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
451 06:44:24.743005 Saving vboot hash.
452 06:44:24.749589 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
453 06:44:24.765205 tlcl_extend: response is 0
454 06:44:24.771902 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
455 06:44:24.778324 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
456 06:44:24.793053 tlcl_extend: response is 0
457 06:44:24.799694 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
458 06:44:24.818357 tlcl_lock_nv_write: response is 0
459 06:44:24.836091 tlcl_lock_nv_write: response is 0
460 06:44:24.836567 Slot A is selected
461 06:44:24.842740 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
462 06:44:24.849529 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
463 06:44:24.856099 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
464 06:44:24.862339 BS: verstage times (exec / console): total (unknown) / 257 ms
465 06:44:24.862816
466 06:44:24.863187
467 06:44:24.869144 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
468 06:44:24.873436 Google Chrome EC: version:
469 06:44:24.876366 ro: volmar_v2.0.14126-e605144e9c
470 06:44:24.879767 rw: volmar_v0.0.55-22d1557
471 06:44:24.883532 running image: 2
472 06:44:24.886328 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
473 06:44:24.896399 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
474 06:44:24.903297 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
475 06:44:24.909911 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
476 06:44:24.920186 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
477 06:44:24.930758 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
478 06:44:24.934140 EC took 1887us to calculate image hash
479 06:44:24.944120 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
480 06:44:24.947310 VB2:sync_ec() select_rw=RW(active)
481 06:44:24.959785 Waited 275us to clear limit power flag.
482 06:44:24.962794 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
483 06:44:24.966329 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
484 06:44:24.969740 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
485 06:44:24.976114 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
486 06:44:24.979680 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
487 06:44:24.982816 TCO_STS: 0000 0000
488 06:44:24.986479 GEN_PMCON: d1001038 00002200
489 06:44:24.989316 GBLRST_CAUSE: 00000040 00000000
490 06:44:24.989785 HPR_CAUSE0: 00000000
491 06:44:24.992617 prev_sleep_state 5
492 06:44:24.995966 Abort disabling TXT, as CPU is not TXT capable.
493 06:44:25.004559 cse_lite: Number of partitions = 3
494 06:44:25.007748 cse_lite: Current partition = RW
495 06:44:25.008170 cse_lite: Next partition = RW
496 06:44:25.011137 cse_lite: Flags = 0x7
497 06:44:25.017844 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
498 06:44:25.027953 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
499 06:44:25.031579 FMAP: area SI_ME found @ 1000 (5238784 bytes)
500 06:44:25.038125 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
501 06:44:25.044332 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
502 06:44:25.051559 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
503 06:44:25.054431 cse_lite: CSE CBFS RW version : 16.1.25.2049
504 06:44:25.057934 Boot Count incremented to 6299
505 06:44:25.064684 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
506 06:44:25.070881 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
507 06:44:25.084183 Probing TPM I2C: done! DID_VID 0x00281ae0
508 06:44:25.087483 Locality already claimed
509 06:44:25.090544 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
510 06:44:25.110192 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
511 06:44:25.116549 MRC: Hash idx 0x100d comparison successful.
512 06:44:25.119851 MRC cache found, size f6c8
513 06:44:25.120283 bootmode is set to: 2
514 06:44:25.123889 EC returned error result code 3
515 06:44:25.126933 FW_CONFIG value from CBI is 0x131
516 06:44:25.133853 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
517 06:44:25.137169 SPD index = 0
518 06:44:25.143546 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
519 06:44:25.144118 SPD: module type is LPDDR4X
520 06:44:25.150948 SPD: module part number is K4U6E3S4AB-MGCL
521 06:44:25.157228 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
522 06:44:25.160364 SPD: device width 16 bits, bus width 16 bits
523 06:44:25.163777 SPD: module size is 1024 MB (per channel)
524 06:44:25.232958 CBMEM:
525 06:44:25.236146 IMD: root @ 0x76fff000 254 entries.
526 06:44:25.239447 IMD: root @ 0x76ffec00 62 entries.
527 06:44:25.247693 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
528 06:44:25.251296 RO_VPD is uninitialized or empty.
529 06:44:25.254555 FMAP: area RW_VPD found @ f29000 (8192 bytes)
530 06:44:25.261358 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
531 06:44:25.264429 External stage cache:
532 06:44:25.267679 IMD: root @ 0x7bbff000 254 entries.
533 06:44:25.270910 IMD: root @ 0x7bbfec00 62 entries.
534 06:44:25.277842 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
535 06:44:25.284693 MRC: Checking cached data update for 'RW_MRC_CACHE'.
536 06:44:25.287703 MRC: 'RW_MRC_CACHE' does not need update.
537 06:44:25.288196 8 DIMMs found
538 06:44:25.291212 SMM Memory Map
539 06:44:25.294274 SMRAM : 0x7b800000 0x800000
540 06:44:25.298136 Subregion 0: 0x7b800000 0x200000
541 06:44:25.300852 Subregion 1: 0x7ba00000 0x200000
542 06:44:25.304526 Subregion 2: 0x7bc00000 0x400000
543 06:44:25.307825 top_of_ram = 0x77000000
544 06:44:25.311454 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
545 06:44:25.317782 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
546 06:44:25.324561 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
547 06:44:25.327656 MTRR Range: Start=ff000000 End=0 (Size 1000000)
548 06:44:25.328222 Normal boot
549 06:44:25.337699 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
550 06:44:25.344539 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
551 06:44:25.350988 Processing 237 relocs. Offset value of 0x74ab9000
552 06:44:25.359218 BS: romstage times (exec / console): total (unknown) / 377 ms
553 06:44:25.366493
554 06:44:25.366938
555 06:44:25.373258 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
556 06:44:25.373730 Normal boot
557 06:44:25.379560 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
558 06:44:25.386083 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
559 06:44:25.393249 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
560 06:44:25.402713 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
561 06:44:25.451263 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
562 06:44:25.457950 Processing 5931 relocs. Offset value of 0x72a2f000
563 06:44:25.460940 BS: postcar times (exec / console): total (unknown) / 51 ms
564 06:44:25.461472
565 06:44:25.464584
566 06:44:25.471481 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
567 06:44:25.474680 Reserving BERT start 76a1e000, size 10000
568 06:44:25.477962 Normal boot
569 06:44:25.481083 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
570 06:44:25.488040 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
571 06:44:25.497631 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
572 06:44:25.501660 FMAP: area RW_VPD found @ f29000 (8192 bytes)
573 06:44:25.505031 Google Chrome EC: version:
574 06:44:25.508393 ro: volmar_v2.0.14126-e605144e9c
575 06:44:25.512086 rw: volmar_v0.0.55-22d1557
576 06:44:25.512523 running image: 2
577 06:44:25.515579 ACPI _SWS is PM1 Index 8 GPE Index -1
578 06:44:25.522729 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
579 06:44:25.526116 EC returned error result code 3
580 06:44:25.529144 FW_CONFIG value from CBI is 0x131
581 06:44:25.535773 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
582 06:44:25.539018 PCI: 00:1c.2 disabled by fw_config
583 06:44:25.542575 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
584 06:44:25.549043 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
585 06:44:25.555972 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
586 06:44:25.559119 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
587 06:44:25.562442 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
588 06:44:25.572457 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
589 06:44:25.575955 microcode: sig=0x906a4 pf=0x80 revision=0x423
590 06:44:25.583116 microcode: Update skipped, already up-to-date
591 06:44:25.589223 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
592 06:44:25.620690 Detected 6 core, 8 thread CPU.
593 06:44:25.623723 Setting up SMI for CPU
594 06:44:25.627019 IED base = 0x7bc00000
595 06:44:25.627623 IED size = 0x00400000
596 06:44:25.630461 Will perform SMM setup.
597 06:44:25.633927 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
598 06:44:25.637125 LAPIC 0x0 in XAPIC mode.
599 06:44:25.647368 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
600 06:44:25.650528 Processing 18 relocs. Offset value of 0x00030000
601 06:44:25.655115 Attempting to start 7 APs
602 06:44:25.658284 Waiting for 10ms after sending INIT.
603 06:44:25.671278 Waiting for SIPI to complete...
604 06:44:25.674835 LAPIC 0x1 in XAPIC mode.
605 06:44:25.678146 LAPIC 0x1c in XAPIC mode.
606 06:44:25.681585 LAPIC 0x8 in XAPIC mode.
607 06:44:25.684689 LAPIC 0x1a in XAPIC mode.
608 06:44:25.688084 AP: slot 7 apic_id 8, MCU rev: 0x00000423
609 06:44:25.691434 LAPIC 0x9 in XAPIC mode.
610 06:44:25.691932 done.
611 06:44:25.694714 AP: slot 1 apic_id 1a, MCU rev: 0x00000423
612 06:44:25.697949 LAPIC 0x1e in XAPIC mode.
613 06:44:25.701321 AP: slot 2 apic_id 1c, MCU rev: 0x00000423
614 06:44:25.704641 LAPIC 0x18 in XAPIC mode.
615 06:44:25.708097 AP: slot 3 apic_id 1e, MCU rev: 0x00000423
616 06:44:25.714897 AP: slot 4 apic_id 18, MCU rev: 0x00000423
617 06:44:25.718089 AP: slot 5 apic_id 9, MCU rev: 0x00000423
618 06:44:25.721615 AP: slot 6 apic_id 1, MCU rev: 0x00000423
619 06:44:25.724396 Waiting for SIPI to complete...
620 06:44:25.724879 done.
621 06:44:25.727821 smm_setup_relocation_handler: enter
622 06:44:25.731202 smm_setup_relocation_handler: exit
623 06:44:25.741022 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
624 06:44:25.744312 Processing 11 relocs. Offset value of 0x00038000
625 06:44:25.751164 smm_module_setup_stub: stack_top = 0x7b804000
626 06:44:25.755354 smm_module_setup_stub: per cpu stack_size = 0x800
627 06:44:25.761002 smm_module_setup_stub: runtime.start32_offset = 0x4c
628 06:44:25.764398 smm_module_setup_stub: runtime.smm_size = 0x10000
629 06:44:25.771168 SMM Module: stub loaded at 38000. Will call 0x76a52094
630 06:44:25.774363 Installing permanent SMM handler to 0x7b800000
631 06:44:25.781338 smm_load_module: total_smm_space_needed e468, available -> 200000
632 06:44:25.791027 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
633 06:44:25.794391 Processing 255 relocs. Offset value of 0x7b9f6000
634 06:44:25.801013 smm_load_module: smram_start: 0x7b800000
635 06:44:25.804509 smm_load_module: smram_end: 7ba00000
636 06:44:25.808123 smm_load_module: handler start 0x7b9f6d5f
637 06:44:25.811036 smm_load_module: handler_size 98d0
638 06:44:25.814442 smm_load_module: fxsave_area 0x7b9ff000
639 06:44:25.817687 smm_load_module: fxsave_size 1000
640 06:44:25.821014 smm_load_module: CONFIG_MSEG_SIZE 0x0
641 06:44:25.827741 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
642 06:44:25.834095 smm_load_module: handler_mod_params.smbase = 0x7b800000
643 06:44:25.837647 smm_load_module: per_cpu_save_state_size = 0x400
644 06:44:25.841102 smm_load_module: num_cpus = 0x8
645 06:44:25.847459 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
646 06:44:25.851579 smm_load_module: total_save_state_size = 0x2000
647 06:44:25.854776 smm_load_module: cpu0 entry: 7b9e6000
648 06:44:25.861076 smm_create_map: cpus allowed in one segment 30
649 06:44:25.864725 smm_create_map: min # of segments needed 1
650 06:44:25.865425 CPU 0x0
651 06:44:25.867629 smbase 7b9e6000 entry 7b9ee000
652 06:44:25.874442 ss_start 7b9f5c00 code_end 7b9ee208
653 06:44:25.874975 CPU 0x1
654 06:44:25.877733 smbase 7b9e5c00 entry 7b9edc00
655 06:44:25.884320 ss_start 7b9f5800 code_end 7b9ede08
656 06:44:25.884954 CPU 0x2
657 06:44:25.887464 smbase 7b9e5800 entry 7b9ed800
658 06:44:25.891068 ss_start 7b9f5400 code_end 7b9eda08
659 06:44:25.894191 CPU 0x3
660 06:44:25.897645 smbase 7b9e5400 entry 7b9ed400
661 06:44:25.900768 ss_start 7b9f5000 code_end 7b9ed608
662 06:44:25.901297 CPU 0x4
663 06:44:25.907417 smbase 7b9e5000 entry 7b9ed000
664 06:44:25.910852 ss_start 7b9f4c00 code_end 7b9ed208
665 06:44:25.911434 CPU 0x5
666 06:44:25.914364 smbase 7b9e4c00 entry 7b9ecc00
667 06:44:25.921026 ss_start 7b9f4800 code_end 7b9ece08
668 06:44:25.921597 CPU 0x6
669 06:44:25.924401 smbase 7b9e4800 entry 7b9ec800
670 06:44:25.930695 ss_start 7b9f4400 code_end 7b9eca08
671 06:44:25.931178 CPU 0x7
672 06:44:25.934323 smbase 7b9e4400 entry 7b9ec400
673 06:44:25.937892 ss_start 7b9f4000 code_end 7b9ec608
674 06:44:25.947903 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
675 06:44:25.950976 Processing 11 relocs. Offset value of 0x7b9ee000
676 06:44:25.957800 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
677 06:44:25.964552 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
678 06:44:25.970967 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
679 06:44:25.977367 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
680 06:44:25.984594 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
681 06:44:25.987595 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
682 06:44:25.994448 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
683 06:44:26.000832 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
684 06:44:26.007735 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
685 06:44:26.014180 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
686 06:44:26.021031 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
687 06:44:26.027416 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
688 06:44:26.033945 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
689 06:44:26.037524 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
690 06:44:26.043960 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
691 06:44:26.051121 smm_module_setup_stub: stack_top = 0x7b804000
692 06:44:26.054172 smm_module_setup_stub: per cpu stack_size = 0x800
693 06:44:26.060553 smm_module_setup_stub: runtime.start32_offset = 0x4c
694 06:44:26.064668 smm_module_setup_stub: runtime.smm_size = 0x200000
695 06:44:26.070497 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
696 06:44:26.075526 Clearing SMI status registers
697 06:44:26.078863 SMI_STS: PM1
698 06:44:26.079332 PM1_STS: WAK PWRBTN
699 06:44:26.088910 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
700 06:44:26.091815 In relocation handler: CPU 0
701 06:44:26.095282 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
702 06:44:26.098373 Writing SMRR. base = 0x7b800006, mask=0xff800c00
703 06:44:26.101946 Relocation complete.
704 06:44:26.108689 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
705 06:44:26.112424 In relocation handler: CPU 6
706 06:44:26.115189 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
707 06:44:26.118481 Relocation complete.
708 06:44:26.125166 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
709 06:44:26.128734 In relocation handler: CPU 2
710 06:44:26.132183 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
711 06:44:26.138655 Writing SMRR. base = 0x7b800006, mask=0xff800c00
712 06:44:26.139226 Relocation complete.
713 06:44:26.145679 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
714 06:44:26.149100 In relocation handler: CPU 3
715 06:44:26.152113 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
716 06:44:26.158791 Writing SMRR. base = 0x7b800006, mask=0xff800c00
717 06:44:26.161648 Relocation complete.
718 06:44:26.168623 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
719 06:44:26.171898 In relocation handler: CPU 4
720 06:44:26.175601 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
721 06:44:26.178946 Writing SMRR. base = 0x7b800006, mask=0xff800c00
722 06:44:26.182132 Relocation complete.
723 06:44:26.188555 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
724 06:44:26.192400 In relocation handler: CPU 1
725 06:44:26.195097 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
726 06:44:26.202272 Writing SMRR. base = 0x7b800006, mask=0xff800c00
727 06:44:26.202892 Relocation complete.
728 06:44:26.208703 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
729 06:44:26.211988 In relocation handler: CPU 5
730 06:44:26.218424 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
731 06:44:26.218997 Relocation complete.
732 06:44:26.225350 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
733 06:44:26.228275 In relocation handler: CPU 7
734 06:44:26.231644 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
735 06:44:26.238580 Writing SMRR. base = 0x7b800006, mask=0xff800c00
736 06:44:26.241892 Relocation complete.
737 06:44:26.242364 Initializing CPU #0
738 06:44:26.244904 CPU: vendor Intel device 906a4
739 06:44:26.248635 CPU: family 06, model 9a, stepping 04
740 06:44:26.251635 Clearing out pending MCEs
741 06:44:26.255220 cpu: energy policy set to 7
742 06:44:26.258399 Turbo is available but hidden
743 06:44:26.261999 Turbo is available and visible
744 06:44:26.265344 microcode: Update skipped, already up-to-date
745 06:44:26.268811 CPU #0 initialized
746 06:44:26.269445 Initializing CPU #6
747 06:44:26.271840 Initializing CPU #4
748 06:44:26.275426 Initializing CPU #5
749 06:44:26.278527 CPU: vendor Intel device 906a4
750 06:44:26.281897 CPU: family 06, model 9a, stepping 04
751 06:44:26.285354 CPU: vendor Intel device 906a4
752 06:44:26.288520 CPU: family 06, model 9a, stepping 04
753 06:44:26.289145 Initializing CPU #2
754 06:44:26.292024 Initializing CPU #3
755 06:44:26.295184 Initializing CPU #1
756 06:44:26.295690 Clearing out pending MCEs
757 06:44:26.298826 CPU: vendor Intel device 906a4
758 06:44:26.305108 CPU: family 06, model 9a, stepping 04
759 06:44:26.305689 CPU: vendor Intel device 906a4
760 06:44:26.311938 CPU: family 06, model 9a, stepping 04
761 06:44:26.312508 cpu: energy policy set to 7
762 06:44:26.315085 Clearing out pending MCEs
763 06:44:26.318776 CPU: vendor Intel device 906a4
764 06:44:26.322470 CPU: family 06, model 9a, stepping 04
765 06:44:26.328845 microcode: Update skipped, already up-to-date
766 06:44:26.329471 CPU #4 initialized
767 06:44:26.332011 Clearing out pending MCEs
768 06:44:26.335476 cpu: energy policy set to 7
769 06:44:26.338704 Clearing out pending MCEs
770 06:44:26.339269 Clearing out pending MCEs
771 06:44:26.341839 cpu: energy policy set to 7
772 06:44:26.345539 cpu: energy policy set to 7
773 06:44:26.352097 microcode: Update skipped, already up-to-date
774 06:44:26.352667 CPU #1 initialized
775 06:44:26.355551 microcode: Update skipped, already up-to-date
776 06:44:26.358777 CPU #2 initialized
777 06:44:26.361940 microcode: Update skipped, already up-to-date
778 06:44:26.365185 CPU #3 initialized
779 06:44:26.368530 Initializing CPU #7
780 06:44:26.372113 CPU: vendor Intel device 906a4
781 06:44:26.375618 CPU: family 06, model 9a, stepping 04
782 06:44:26.378320 CPU: vendor Intel device 906a4
783 06:44:26.382182 CPU: family 06, model 9a, stepping 04
784 06:44:26.385497 cpu: energy policy set to 7
785 06:44:26.386247 Clearing out pending MCEs
786 06:44:26.391791 microcode: Update skipped, already up-to-date
787 06:44:26.392349 CPU #6 initialized
788 06:44:26.395098 Clearing out pending MCEs
789 06:44:26.398362 cpu: energy policy set to 7
790 06:44:26.402243 cpu: energy policy set to 7
791 06:44:26.405010 microcode: Update skipped, already up-to-date
792 06:44:26.408613 CPU #7 initialized
793 06:44:26.411961 microcode: Update skipped, already up-to-date
794 06:44:26.415751 CPU #5 initialized
795 06:44:26.419058 bsp_do_flight_plan done after 689 msecs.
796 06:44:26.421881 CPU: frequency set to 4400 MHz
797 06:44:26.422382 Enabling SMIs.
798 06:44:26.428590 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
799 06:44:26.446170 Probing TPM I2C: done! DID_VID 0x00281ae0
800 06:44:26.449578 Locality already claimed
801 06:44:26.452634 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
802 06:44:26.463991 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
803 06:44:26.467226 Enabling GPIO PM b/c CR50 has long IRQ pulse support
804 06:44:26.474069 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
805 06:44:26.480928 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
806 06:44:26.484245 Found a VBT of 9216 bytes after decompression
807 06:44:26.487400 PCI 1.0, PIN A, using IRQ #16
808 06:44:26.490804 PCI 2.0, PIN A, using IRQ #17
809 06:44:26.494381 PCI 4.0, PIN A, using IRQ #18
810 06:44:26.497545 PCI 5.0, PIN A, using IRQ #16
811 06:44:26.501241 PCI 6.0, PIN A, using IRQ #16
812 06:44:26.504067 PCI 6.2, PIN C, using IRQ #18
813 06:44:26.507834 PCI 7.0, PIN A, using IRQ #19
814 06:44:26.511198 PCI 7.1, PIN B, using IRQ #20
815 06:44:26.514326 PCI 7.2, PIN C, using IRQ #21
816 06:44:26.517364 PCI 7.3, PIN D, using IRQ #22
817 06:44:26.521107 PCI 8.0, PIN A, using IRQ #23
818 06:44:26.524437 PCI D.0, PIN A, using IRQ #17
819 06:44:26.525101 PCI D.1, PIN B, using IRQ #19
820 06:44:26.527272 PCI 10.0, PIN A, using IRQ #24
821 06:44:26.531159 PCI 10.1, PIN B, using IRQ #25
822 06:44:26.534747 PCI 10.6, PIN C, using IRQ #20
823 06:44:26.537298 PCI 10.7, PIN D, using IRQ #21
824 06:44:26.541400 PCI 11.0, PIN A, using IRQ #26
825 06:44:26.544296 PCI 11.1, PIN B, using IRQ #27
826 06:44:26.547830 PCI 11.2, PIN C, using IRQ #28
827 06:44:26.551117 PCI 11.3, PIN D, using IRQ #29
828 06:44:26.554499 PCI 12.0, PIN A, using IRQ #30
829 06:44:26.557692 PCI 12.6, PIN B, using IRQ #31
830 06:44:26.561255 PCI 12.7, PIN C, using IRQ #22
831 06:44:26.564580 PCI 13.0, PIN A, using IRQ #32
832 06:44:26.568227 PCI 13.1, PIN B, using IRQ #33
833 06:44:26.571424 PCI 13.2, PIN C, using IRQ #34
834 06:44:26.571991 PCI 13.3, PIN D, using IRQ #35
835 06:44:26.574304 PCI 14.0, PIN B, using IRQ #23
836 06:44:26.577681 PCI 14.1, PIN A, using IRQ #36
837 06:44:26.581203 PCI 14.3, PIN C, using IRQ #17
838 06:44:26.584368 PCI 15.0, PIN A, using IRQ #37
839 06:44:26.587630 PCI 15.1, PIN B, using IRQ #38
840 06:44:26.590708 PCI 15.2, PIN C, using IRQ #39
841 06:44:26.594186 PCI 15.3, PIN D, using IRQ #40
842 06:44:26.597457 PCI 16.0, PIN A, using IRQ #18
843 06:44:26.601211 PCI 16.1, PIN B, using IRQ #19
844 06:44:26.604161 PCI 16.2, PIN C, using IRQ #20
845 06:44:26.607749 PCI 16.3, PIN D, using IRQ #21
846 06:44:26.610594 PCI 16.4, PIN A, using IRQ #18
847 06:44:26.614060 PCI 16.5, PIN B, using IRQ #19
848 06:44:26.617667 PCI 17.0, PIN A, using IRQ #22
849 06:44:26.620701 PCI 19.0, PIN A, using IRQ #41
850 06:44:26.624077 PCI 19.1, PIN B, using IRQ #42
851 06:44:26.624640 PCI 19.2, PIN C, using IRQ #43
852 06:44:26.627303 PCI 1C.0, PIN A, using IRQ #16
853 06:44:26.630508 PCI 1C.1, PIN B, using IRQ #17
854 06:44:26.633845 PCI 1C.2, PIN C, using IRQ #18
855 06:44:26.637021 PCI 1C.3, PIN D, using IRQ #19
856 06:44:26.640320 PCI 1C.4, PIN A, using IRQ #16
857 06:44:26.643984 PCI 1C.5, PIN B, using IRQ #17
858 06:44:26.647017 PCI 1C.6, PIN C, using IRQ #18
859 06:44:26.651018 PCI 1C.7, PIN D, using IRQ #19
860 06:44:26.654010 PCI 1D.0, PIN A, using IRQ #16
861 06:44:26.657591 PCI 1D.1, PIN B, using IRQ #17
862 06:44:26.660673 PCI 1D.2, PIN C, using IRQ #18
863 06:44:26.664515 PCI 1D.3, PIN D, using IRQ #19
864 06:44:26.667156 PCI 1E.0, PIN A, using IRQ #23
865 06:44:26.670492 PCI 1E.1, PIN B, using IRQ #20
866 06:44:26.673642 PCI 1E.2, PIN C, using IRQ #44
867 06:44:26.677451 PCI 1E.3, PIN D, using IRQ #45
868 06:44:26.678017 PCI 1F.3, PIN B, using IRQ #22
869 06:44:26.680608 PCI 1F.4, PIN C, using IRQ #23
870 06:44:26.683877 PCI 1F.6, PIN D, using IRQ #20
871 06:44:26.687373 PCI 1F.7, PIN A, using IRQ #21
872 06:44:26.694186 IRQ: Using dynamically assigned PCI IO-APIC IRQs
873 06:44:26.700919 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
874 06:44:26.879022 FSPS returned 0
875 06:44:26.882377 Executing Phase 1 of FspMultiPhaseSiInit
876 06:44:26.892054 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
877 06:44:26.895577 port C0 DISC req: usage 1 usb3 1 usb2 1
878 06:44:26.898786 Raw Buffer output 0 00000111
879 06:44:26.902843 Raw Buffer output 1 00000000
880 06:44:26.905902 pmc_send_ipc_cmd succeeded
881 06:44:26.912890 port C1 DISC req: usage 1 usb3 3 usb2 3
882 06:44:26.913501 Raw Buffer output 0 00000331
883 06:44:26.915893 Raw Buffer output 1 00000000
884 06:44:26.920148 pmc_send_ipc_cmd succeeded
885 06:44:26.924185 Detected 6 core, 8 thread CPU.
886 06:44:26.927202 Detected 6 core, 8 thread CPU.
887 06:44:26.932399 Detected 6 core, 8 thread CPU.
888 06:44:26.935697 Detected 6 core, 8 thread CPU.
889 06:44:26.939743 Detected 6 core, 8 thread CPU.
890 06:44:26.942525 Detected 6 core, 8 thread CPU.
891 06:44:26.945645 Detected 6 core, 8 thread CPU.
892 06:44:26.949173 Detected 6 core, 8 thread CPU.
893 06:44:26.952519 Detected 6 core, 8 thread CPU.
894 06:44:26.955764 Detected 6 core, 8 thread CPU.
895 06:44:26.959596 Detected 6 core, 8 thread CPU.
896 06:44:26.962440 Detected 6 core, 8 thread CPU.
897 06:44:26.965656 Detected 6 core, 8 thread CPU.
898 06:44:26.969509 Detected 6 core, 8 thread CPU.
899 06:44:26.972710 Detected 6 core, 8 thread CPU.
900 06:44:26.976280 Detected 6 core, 8 thread CPU.
901 06:44:26.979445 Detected 6 core, 8 thread CPU.
902 06:44:26.982344 Detected 6 core, 8 thread CPU.
903 06:44:26.986111 Detected 6 core, 8 thread CPU.
904 06:44:26.989537 Detected 6 core, 8 thread CPU.
905 06:44:26.990105 Detected 6 core, 8 thread CPU.
906 06:44:26.992643 Detected 6 core, 8 thread CPU.
907 06:44:27.285898 Detected 6 core, 8 thread CPU.
908 06:44:27.289167 Detected 6 core, 8 thread CPU.
909 06:44:27.292866 Detected 6 core, 8 thread CPU.
910 06:44:27.296115 Detected 6 core, 8 thread CPU.
911 06:44:27.298890 Detected 6 core, 8 thread CPU.
912 06:44:27.302584 Detected 6 core, 8 thread CPU.
913 06:44:27.305825 Detected 6 core, 8 thread CPU.
914 06:44:27.309501 Detected 6 core, 8 thread CPU.
915 06:44:27.312618 Detected 6 core, 8 thread CPU.
916 06:44:27.316182 Detected 6 core, 8 thread CPU.
917 06:44:27.319176 Detected 6 core, 8 thread CPU.
918 06:44:27.322526 Detected 6 core, 8 thread CPU.
919 06:44:27.326105 Detected 6 core, 8 thread CPU.
920 06:44:27.329226 Detected 6 core, 8 thread CPU.
921 06:44:27.332574 Detected 6 core, 8 thread CPU.
922 06:44:27.335815 Detected 6 core, 8 thread CPU.
923 06:44:27.339147 Detected 6 core, 8 thread CPU.
924 06:44:27.339618 Detected 6 core, 8 thread CPU.
925 06:44:27.342817 Detected 6 core, 8 thread CPU.
926 06:44:27.345815 Detected 6 core, 8 thread CPU.
927 06:44:27.349614 Display FSP Version Info HOB
928 06:44:27.352689 Reference Code - CPU = c.0.65.70
929 06:44:27.356238 uCode Version = 0.0.4.23
930 06:44:27.359630 TXT ACM version = ff.ff.ff.ffff
931 06:44:27.362963 Reference Code - ME = c.0.65.70
932 06:44:27.366189 MEBx version = 0.0.0.0
933 06:44:27.369197 ME Firmware Version = Lite SKU
934 06:44:27.372938 Reference Code - PCH = c.0.65.70
935 06:44:27.376420 PCH-CRID Status = Disabled
936 06:44:27.379513 PCH-CRID Original Value = ff.ff.ff.ffff
937 06:44:27.382730 PCH-CRID New Value = ff.ff.ff.ffff
938 06:44:27.385924 OPROM - RST - RAID = ff.ff.ff.ffff
939 06:44:27.389366 PCH Hsio Version = 4.0.0.0
940 06:44:27.392463 Reference Code - SA - System Agent = c.0.65.70
941 06:44:27.396076 Reference Code - MRC = 0.0.3.80
942 06:44:27.399338 SA - PCIe Version = c.0.65.70
943 06:44:27.402485 SA-CRID Status = Disabled
944 06:44:27.406133 SA-CRID Original Value = 0.0.0.4
945 06:44:27.409568 SA-CRID New Value = 0.0.0.4
946 06:44:27.412634 OPROM - VBIOS = ff.ff.ff.ffff
947 06:44:27.415997 IO Manageability Engine FW Version = 24.0.4.0
948 06:44:27.419592 PHY Build Version = 0.0.0.2016
949 06:44:27.422609 Thunderbolt(TM) FW Version = 0.0.0.0
950 06:44:27.429615 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
951 06:44:27.436557 BS: BS_DEV_INIT_CHIPS run times (exec / console): 491 / 507 ms
952 06:44:27.437139 Enumerating buses...
953 06:44:27.442634 Show all devs... Before device enumeration.
954 06:44:27.443241 Root Device: enabled 1
955 06:44:27.446200 CPU_CLUSTER: 0: enabled 1
956 06:44:27.449145 DOMAIN: 0000: enabled 1
957 06:44:27.452607 GPIO: 0: enabled 1
958 06:44:27.453123 PCI: 00:00.0: enabled 1
959 06:44:27.456022 PCI: 00:01.0: enabled 0
960 06:44:27.459177 PCI: 00:01.1: enabled 0
961 06:44:27.462350 PCI: 00:02.0: enabled 1
962 06:44:27.462823 PCI: 00:04.0: enabled 1
963 06:44:27.465948 PCI: 00:05.0: enabled 0
964 06:44:27.469608 PCI: 00:06.0: enabled 1
965 06:44:27.470173 PCI: 00:06.2: enabled 0
966 06:44:27.472902 PCI: 00:07.0: enabled 0
967 06:44:27.476195 PCI: 00:07.1: enabled 0
968 06:44:27.479603 PCI: 00:07.2: enabled 0
969 06:44:27.480167 PCI: 00:07.3: enabled 0
970 06:44:27.483045 PCI: 00:08.0: enabled 0
971 06:44:27.486064 PCI: 00:09.0: enabled 0
972 06:44:27.489555 PCI: 00:0a.0: enabled 1
973 06:44:27.490117 PCI: 00:0d.0: enabled 1
974 06:44:27.492844 PCI: 00:0d.1: enabled 0
975 06:44:27.496257 PCI: 00:0d.2: enabled 0
976 06:44:27.496820 PCI: 00:0d.3: enabled 0
977 06:44:27.499430 PCI: 00:0e.0: enabled 0
978 06:44:27.502702 PCI: 00:10.0: enabled 0
979 06:44:27.505981 PCI: 00:10.1: enabled 0
980 06:44:27.506539 PCI: 00:10.6: enabled 0
981 06:44:27.508801 PCI: 00:10.7: enabled 0
982 06:44:27.512503 PCI: 00:12.0: enabled 0
983 06:44:27.515914 PCI: 00:12.6: enabled 0
984 06:44:27.516484 PCI: 00:12.7: enabled 0
985 06:44:27.519079 PCI: 00:13.0: enabled 0
986 06:44:27.522547 PCI: 00:14.0: enabled 1
987 06:44:27.525908 PCI: 00:14.1: enabled 0
988 06:44:27.526447 PCI: 00:14.2: enabled 1
989 06:44:27.529086 PCI: 00:14.3: enabled 1
990 06:44:27.532568 PCI: 00:15.0: enabled 1
991 06:44:27.535555 PCI: 00:15.1: enabled 1
992 06:44:27.536006 PCI: 00:15.2: enabled 0
993 06:44:27.539328 PCI: 00:15.3: enabled 1
994 06:44:27.542469 PCI: 00:16.0: enabled 1
995 06:44:27.543035 PCI: 00:16.1: enabled 0
996 06:44:27.545730 PCI: 00:16.2: enabled 0
997 06:44:27.549368 PCI: 00:16.3: enabled 0
998 06:44:27.552521 PCI: 00:16.4: enabled 0
999 06:44:27.553031 PCI: 00:16.5: enabled 0
1000 06:44:27.555626 PCI: 00:17.0: enabled 1
1001 06:44:27.559278 PCI: 00:19.0: enabled 0
1002 06:44:27.562120 PCI: 00:19.1: enabled 1
1003 06:44:27.562613 PCI: 00:19.2: enabled 0
1004 06:44:27.565845 PCI: 00:1a.0: enabled 0
1005 06:44:27.569454 PCI: 00:1c.0: enabled 0
1006 06:44:27.572124 PCI: 00:1c.1: enabled 0
1007 06:44:27.572598 PCI: 00:1c.2: enabled 0
1008 06:44:27.576325 PCI: 00:1c.3: enabled 0
1009 06:44:27.579099 PCI: 00:1c.4: enabled 0
1010 06:44:27.579677 PCI: 00:1c.5: enabled 0
1011 06:44:27.582638 PCI: 00:1c.6: enabled 0
1012 06:44:27.586240 PCI: 00:1c.7: enabled 0
1013 06:44:27.589039 PCI: 00:1d.0: enabled 0
1014 06:44:27.589619 PCI: 00:1d.1: enabled 0
1015 06:44:27.592559 PCI: 00:1d.2: enabled 0
1016 06:44:27.595840 PCI: 00:1d.3: enabled 0
1017 06:44:27.599162 PCI: 00:1e.0: enabled 1
1018 06:44:27.599742 PCI: 00:1e.1: enabled 0
1019 06:44:27.602078 PCI: 00:1e.2: enabled 0
1020 06:44:27.605441 PCI: 00:1e.3: enabled 1
1021 06:44:27.609294 PCI: 00:1f.0: enabled 1
1022 06:44:27.609886 PCI: 00:1f.1: enabled 0
1023 06:44:27.612593 PCI: 00:1f.2: enabled 1
1024 06:44:27.615435 PCI: 00:1f.3: enabled 1
1025 06:44:27.616025 PCI: 00:1f.4: enabled 0
1026 06:44:27.619005 PCI: 00:1f.5: enabled 1
1027 06:44:27.622636 PCI: 00:1f.6: enabled 0
1028 06:44:27.625498 PCI: 00:1f.7: enabled 0
1029 06:44:27.626069 GENERIC: 0.0: enabled 1
1030 06:44:27.629020 GENERIC: 0.0: enabled 1
1031 06:44:27.631948 GENERIC: 1.0: enabled 1
1032 06:44:27.635341 GENERIC: 0.0: enabled 1
1033 06:44:27.635816 GENERIC: 1.0: enabled 1
1034 06:44:27.638867 USB0 port 0: enabled 1
1035 06:44:27.642194 USB0 port 0: enabled 1
1036 06:44:27.645769 GENERIC: 0.0: enabled 1
1037 06:44:27.646336 I2C: 00:1a: enabled 1
1038 06:44:27.648950 I2C: 00:31: enabled 1
1039 06:44:27.652366 I2C: 00:32: enabled 1
1040 06:44:27.652938 I2C: 00:50: enabled 1
1041 06:44:27.655473 I2C: 00:10: enabled 1
1042 06:44:27.659205 I2C: 00:15: enabled 1
1043 06:44:27.659787 I2C: 00:2c: enabled 1
1044 06:44:27.661787 GENERIC: 0.0: enabled 1
1045 06:44:27.665166 SPI: 00: enabled 1
1046 06:44:27.665647 PNP: 0c09.0: enabled 1
1047 06:44:27.668541 GENERIC: 0.0: enabled 1
1048 06:44:27.671926 USB3 port 0: enabled 1
1049 06:44:27.672495 USB3 port 1: enabled 0
1050 06:44:27.675679 USB3 port 2: enabled 1
1051 06:44:27.678672 USB3 port 3: enabled 0
1052 06:44:27.682360 USB2 port 0: enabled 1
1053 06:44:27.682935 USB2 port 1: enabled 0
1054 06:44:27.685402 USB2 port 2: enabled 1
1055 06:44:27.688741 USB2 port 3: enabled 0
1056 06:44:27.689356 USB2 port 4: enabled 0
1057 06:44:27.691790 USB2 port 5: enabled 1
1058 06:44:27.695704 USB2 port 6: enabled 0
1059 06:44:27.696269 USB2 port 7: enabled 0
1060 06:44:27.698923 USB2 port 8: enabled 1
1061 06:44:27.702196 USB2 port 9: enabled 1
1062 06:44:27.705705 USB3 port 0: enabled 1
1063 06:44:27.706277 USB3 port 1: enabled 0
1064 06:44:27.709218 USB3 port 2: enabled 0
1065 06:44:27.712060 USB3 port 3: enabled 0
1066 06:44:27.712627 GENERIC: 0.0: enabled 1
1067 06:44:27.715445 GENERIC: 1.0: enabled 1
1068 06:44:27.719033 APIC: 00: enabled 1
1069 06:44:27.719599 APIC: 1a: enabled 1
1070 06:44:27.722390 APIC: 1c: enabled 1
1071 06:44:27.725689 APIC: 1e: enabled 1
1072 06:44:27.726258 APIC: 18: enabled 1
1073 06:44:27.728802 APIC: 09: enabled 1
1074 06:44:27.729311 APIC: 01: enabled 1
1075 06:44:27.732044 APIC: 08: enabled 1
1076 06:44:27.735329 Compare with tree...
1077 06:44:27.735807 Root Device: enabled 1
1078 06:44:27.738618 CPU_CLUSTER: 0: enabled 1
1079 06:44:27.741811 APIC: 00: enabled 1
1080 06:44:27.745883 APIC: 1a: enabled 1
1081 06:44:27.746449 APIC: 1c: enabled 1
1082 06:44:27.748523 APIC: 1e: enabled 1
1083 06:44:27.752364 APIC: 18: enabled 1
1084 06:44:27.752932 APIC: 09: enabled 1
1085 06:44:27.755414 APIC: 01: enabled 1
1086 06:44:27.759286 APIC: 08: enabled 1
1087 06:44:27.759855 DOMAIN: 0000: enabled 1
1088 06:44:27.762190 GPIO: 0: enabled 1
1089 06:44:27.765238 PCI: 00:00.0: enabled 1
1090 06:44:27.768465 PCI: 00:01.0: enabled 0
1091 06:44:27.768945 PCI: 00:01.1: enabled 0
1092 06:44:27.771852 PCI: 00:02.0: enabled 1
1093 06:44:27.775281 PCI: 00:04.0: enabled 1
1094 06:44:27.778931 GENERIC: 0.0: enabled 1
1095 06:44:27.782162 PCI: 00:05.0: enabled 0
1096 06:44:27.782730 PCI: 00:06.0: enabled 1
1097 06:44:27.785287 PCI: 00:06.2: enabled 0
1098 06:44:27.788687 PCI: 00:08.0: enabled 0
1099 06:44:27.791859 PCI: 00:09.0: enabled 0
1100 06:44:27.794963 PCI: 00:0a.0: enabled 1
1101 06:44:27.795527 PCI: 00:0d.0: enabled 1
1102 06:44:27.798007 USB0 port 0: enabled 1
1103 06:44:27.801833 USB3 port 0: enabled 1
1104 06:44:27.805094 USB3 port 1: enabled 0
1105 06:44:27.808020 USB3 port 2: enabled 1
1106 06:44:27.811964 USB3 port 3: enabled 0
1107 06:44:27.812529 PCI: 00:0d.1: enabled 0
1108 06:44:27.815588 PCI: 00:0d.2: enabled 0
1109 06:44:27.818308 PCI: 00:0d.3: enabled 0
1110 06:44:27.821826 PCI: 00:0e.0: enabled 0
1111 06:44:27.825332 PCI: 00:10.0: enabled 0
1112 06:44:27.825893 PCI: 00:10.1: enabled 0
1113 06:44:27.828337 PCI: 00:10.6: enabled 0
1114 06:44:27.831688 PCI: 00:10.7: enabled 0
1115 06:44:27.834748 PCI: 00:12.0: enabled 0
1116 06:44:27.837853 PCI: 00:12.6: enabled 0
1117 06:44:27.838342 PCI: 00:12.7: enabled 0
1118 06:44:27.841183 PCI: 00:13.0: enabled 0
1119 06:44:27.844850 PCI: 00:14.0: enabled 1
1120 06:44:27.848069 USB0 port 0: enabled 1
1121 06:44:27.851396 USB2 port 0: enabled 1
1122 06:44:27.851865 USB2 port 1: enabled 0
1123 06:44:27.854947 USB2 port 2: enabled 1
1124 06:44:27.857937 USB2 port 3: enabled 0
1125 06:44:27.861635 USB2 port 4: enabled 0
1126 06:44:27.865087 USB2 port 5: enabled 1
1127 06:44:27.865652 USB2 port 6: enabled 0
1128 06:44:27.868003 USB2 port 7: enabled 0
1129 06:44:27.871504 USB2 port 8: enabled 1
1130 06:44:27.874934 USB2 port 9: enabled 1
1131 06:44:27.878227 USB3 port 0: enabled 1
1132 06:44:27.881379 USB3 port 1: enabled 0
1133 06:44:27.882004 USB3 port 2: enabled 0
1134 06:44:27.884612 USB3 port 3: enabled 0
1135 06:44:27.888055 PCI: 00:14.1: enabled 0
1136 06:44:27.891446 PCI: 00:14.2: enabled 1
1137 06:44:27.894989 PCI: 00:14.3: enabled 1
1138 06:44:27.895553 GENERIC: 0.0: enabled 1
1139 06:44:27.898012 PCI: 00:15.0: enabled 1
1140 06:44:27.901146 I2C: 00:1a: enabled 1
1141 06:44:27.904702 I2C: 00:31: enabled 1
1142 06:44:27.908319 I2C: 00:32: enabled 1
1143 06:44:27.908874 PCI: 00:15.1: enabled 1
1144 06:44:27.911128 I2C: 00:50: enabled 1
1145 06:44:27.914613 PCI: 00:15.2: enabled 0
1146 06:44:27.917654 PCI: 00:15.3: enabled 1
1147 06:44:27.918113 I2C: 00:10: enabled 1
1148 06:44:27.921341 PCI: 00:16.0: enabled 1
1149 06:44:27.924527 PCI: 00:16.1: enabled 0
1150 06:44:27.928070 PCI: 00:16.2: enabled 0
1151 06:44:27.931028 PCI: 00:16.3: enabled 0
1152 06:44:27.931586 PCI: 00:16.4: enabled 0
1153 06:44:27.934675 PCI: 00:16.5: enabled 0
1154 06:44:27.937806 PCI: 00:17.0: enabled 1
1155 06:44:27.941168 PCI: 00:19.0: enabled 0
1156 06:44:27.944466 PCI: 00:19.1: enabled 1
1157 06:44:27.945072 I2C: 00:15: enabled 1
1158 06:44:27.948243 I2C: 00:2c: enabled 1
1159 06:44:27.951088 PCI: 00:19.2: enabled 0
1160 06:44:27.954419 PCI: 00:1a.0: enabled 0
1161 06:44:27.954945 PCI: 00:1e.0: enabled 1
1162 06:44:27.957500 PCI: 00:1e.1: enabled 0
1163 06:44:27.961415 PCI: 00:1e.2: enabled 0
1164 06:44:27.964332 PCI: 00:1e.3: enabled 1
1165 06:44:27.967915 SPI: 00: enabled 1
1166 06:44:27.968474 PCI: 00:1f.0: enabled 1
1167 06:44:27.970915 PNP: 0c09.0: enabled 1
1168 06:44:27.974207 PCI: 00:1f.1: enabled 0
1169 06:44:27.977752 PCI: 00:1f.2: enabled 1
1170 06:44:27.981342 GENERIC: 0.0: enabled 1
1171 06:44:27.981930 GENERIC: 0.0: enabled 1
1172 06:44:27.984630 GENERIC: 1.0: enabled 1
1173 06:44:27.987852 PCI: 00:1f.3: enabled 1
1174 06:44:27.991612 PCI: 00:1f.4: enabled 0
1175 06:44:27.994772 PCI: 00:1f.5: enabled 1
1176 06:44:27.995327 PCI: 00:1f.6: enabled 0
1177 06:44:27.998313 PCI: 00:1f.7: enabled 0
1178 06:44:28.001184 Root Device scanning...
1179 06:44:28.004763 scan_static_bus for Root Device
1180 06:44:28.007820 CPU_CLUSTER: 0 enabled
1181 06:44:28.008278 DOMAIN: 0000 enabled
1182 06:44:28.011458 DOMAIN: 0000 scanning...
1183 06:44:28.014292 PCI: pci_scan_bus for bus 00
1184 06:44:28.017953 PCI: 00:00.0 [8086/0000] ops
1185 06:44:28.021074 PCI: 00:00.0 [8086/4609] enabled
1186 06:44:28.024581 PCI: 00:02.0 [8086/0000] bus ops
1187 06:44:28.027851 PCI: 00:02.0 [8086/46b3] enabled
1188 06:44:28.031189 PCI: 00:04.0 [8086/0000] bus ops
1189 06:44:28.034287 PCI: 00:04.0 [8086/461d] enabled
1190 06:44:28.037718 PCI: 00:06.0 [8086/0000] bus ops
1191 06:44:28.040883 PCI: 00:06.0 [8086/464d] enabled
1192 06:44:28.044264 PCI: 00:08.0 [8086/464f] disabled
1193 06:44:28.047650 PCI: 00:0a.0 [8086/467d] enabled
1194 06:44:28.050687 PCI: 00:0d.0 [8086/0000] bus ops
1195 06:44:28.054567 PCI: 00:0d.0 [8086/461e] enabled
1196 06:44:28.057946 PCI: 00:14.0 [8086/0000] bus ops
1197 06:44:28.060916 PCI: 00:14.0 [8086/51ed] enabled
1198 06:44:28.064314 PCI: 00:14.2 [8086/51ef] enabled
1199 06:44:28.067560 PCI: 00:14.3 [8086/0000] bus ops
1200 06:44:28.071432 PCI: 00:14.3 [8086/51f0] enabled
1201 06:44:28.074253 PCI: 00:15.0 [8086/0000] bus ops
1202 06:44:28.077922 PCI: 00:15.0 [8086/51e8] enabled
1203 06:44:28.081404 PCI: 00:15.1 [8086/0000] bus ops
1204 06:44:28.084962 PCI: 00:15.1 [8086/51e9] enabled
1205 06:44:28.087589 PCI: 00:15.2 [8086/0000] bus ops
1206 06:44:28.091046 PCI: 00:15.2 [8086/51ea] disabled
1207 06:44:28.094392 PCI: 00:15.3 [8086/0000] bus ops
1208 06:44:28.097431 PCI: 00:15.3 [8086/51eb] enabled
1209 06:44:28.100816 PCI: 00:16.0 [8086/0000] ops
1210 06:44:28.104110 PCI: 00:16.0 [8086/51e0] enabled
1211 06:44:28.110574 PCI: Static device PCI: 00:17.0 not found, disabling it.
1212 06:44:28.114053 PCI: 00:19.0 [8086/0000] bus ops
1213 06:44:28.117585 PCI: 00:19.0 [8086/51c5] disabled
1214 06:44:28.121029 PCI: 00:19.1 [8086/0000] bus ops
1215 06:44:28.124288 PCI: 00:19.1 [8086/51c6] enabled
1216 06:44:28.127376 PCI: 00:1e.0 [8086/0000] ops
1217 06:44:28.130953 PCI: 00:1e.0 [8086/51a8] enabled
1218 06:44:28.134051 PCI: 00:1e.3 [8086/0000] bus ops
1219 06:44:28.137702 PCI: 00:1e.3 [8086/51ab] enabled
1220 06:44:28.140660 PCI: 00:1f.0 [8086/0000] bus ops
1221 06:44:28.144160 PCI: 00:1f.0 [8086/5182] enabled
1222 06:44:28.144715 RTC Init
1223 06:44:28.147611 Set power on after power failure.
1224 06:44:28.150957 Disabling Deep S3
1225 06:44:28.154410 Disabling Deep S3
1226 06:44:28.154868 Disabling Deep S4
1227 06:44:28.157712 Disabling Deep S4
1228 06:44:28.158171 Disabling Deep S5
1229 06:44:28.161238 Disabling Deep S5
1230 06:44:28.164387 PCI: 00:1f.2 [0000/0000] hidden
1231 06:44:28.167599 PCI: 00:1f.3 [8086/0000] bus ops
1232 06:44:28.171461 PCI: 00:1f.3 [8086/51c8] enabled
1233 06:44:28.174312 PCI: 00:1f.5 [8086/0000] bus ops
1234 06:44:28.177623 PCI: 00:1f.5 [8086/51a4] enabled
1235 06:44:28.178172 GPIO: 0 enabled
1236 06:44:28.181115 PCI: Leftover static devices:
1237 06:44:28.184267 PCI: 00:01.0
1238 06:44:28.184820 PCI: 00:01.1
1239 06:44:28.185246 PCI: 00:05.0
1240 06:44:28.187753 PCI: 00:06.2
1241 06:44:28.188304 PCI: 00:09.0
1242 06:44:28.190999 PCI: 00:0d.1
1243 06:44:28.191546 PCI: 00:0d.2
1244 06:44:28.194365 PCI: 00:0d.3
1245 06:44:28.194918 PCI: 00:0e.0
1246 06:44:28.195287 PCI: 00:10.0
1247 06:44:28.197699 PCI: 00:10.1
1248 06:44:28.198253 PCI: 00:10.6
1249 06:44:28.201115 PCI: 00:10.7
1250 06:44:28.201574 PCI: 00:12.0
1251 06:44:28.201932 PCI: 00:12.6
1252 06:44:28.204114 PCI: 00:12.7
1253 06:44:28.204568 PCI: 00:13.0
1254 06:44:28.207577 PCI: 00:14.1
1255 06:44:28.208134 PCI: 00:16.1
1256 06:44:28.208503 PCI: 00:16.2
1257 06:44:28.210743 PCI: 00:16.3
1258 06:44:28.211395 PCI: 00:16.4
1259 06:44:28.214283 PCI: 00:16.5
1260 06:44:28.214840 PCI: 00:17.0
1261 06:44:28.217704 PCI: 00:19.2
1262 06:44:28.218268 PCI: 00:1a.0
1263 06:44:28.218638 PCI: 00:1e.1
1264 06:44:28.220922 PCI: 00:1e.2
1265 06:44:28.221413 PCI: 00:1f.1
1266 06:44:28.223897 PCI: 00:1f.4
1267 06:44:28.223986 PCI: 00:1f.6
1268 06:44:28.224051 PCI: 00:1f.7
1269 06:44:28.226958 PCI: Check your devicetree.cb.
1270 06:44:28.230576 PCI: 00:02.0 scanning...
1271 06:44:28.233971 scan_generic_bus for PCI: 00:02.0
1272 06:44:28.237163 scan_generic_bus for PCI: 00:02.0 done
1273 06:44:28.244370 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1274 06:44:28.244944 PCI: 00:04.0 scanning...
1275 06:44:28.250976 scan_generic_bus for PCI: 00:04.0
1276 06:44:28.251472 GENERIC: 0.0 enabled
1277 06:44:28.257556 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1278 06:44:28.260944 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1279 06:44:28.264194 PCI: 00:06.0 scanning...
1280 06:44:28.267840 do_pci_scan_bridge for PCI: 00:06.0
1281 06:44:28.270942 PCI: pci_scan_bus for bus 01
1282 06:44:28.274081 PCI: 01:00.0 [15b7/5009] enabled
1283 06:44:28.277663 Enabling Common Clock Configuration
1284 06:44:28.280665 L1 Sub-State supported from root port 6
1285 06:44:28.284112 L1 Sub-State Support = 0x5
1286 06:44:28.287657 CommonModeRestoreTime = 0x6e
1287 06:44:28.291131 Power On Value = 0x5, Power On Scale = 0x2
1288 06:44:28.293989 ASPM: Enabled L1
1289 06:44:28.297678 PCIe: Max_Payload_Size adjusted to 256
1290 06:44:28.301044 PCI: 01:00.0: Enabled LTR
1291 06:44:28.303985 PCI: 01:00.0: Programmed LTR max latencies
1292 06:44:28.310629 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1293 06:44:28.311110 PCI: 00:0d.0 scanning...
1294 06:44:28.314258 scan_static_bus for PCI: 00:0d.0
1295 06:44:28.317301 USB0 port 0 enabled
1296 06:44:28.321139 USB0 port 0 scanning...
1297 06:44:28.324020 scan_static_bus for USB0 port 0
1298 06:44:28.324607 USB3 port 0 enabled
1299 06:44:28.327445 USB3 port 1 disabled
1300 06:44:28.330572 USB3 port 2 enabled
1301 06:44:28.331076 USB3 port 3 disabled
1302 06:44:28.333799 USB3 port 0 scanning...
1303 06:44:28.337480 scan_static_bus for USB3 port 0
1304 06:44:28.341049 scan_static_bus for USB3 port 0 done
1305 06:44:28.343961 scan_bus: bus USB3 port 0 finished in 6 msecs
1306 06:44:28.347624 USB3 port 2 scanning...
1307 06:44:28.350925 scan_static_bus for USB3 port 2
1308 06:44:28.354333 scan_static_bus for USB3 port 2 done
1309 06:44:28.360767 scan_bus: bus USB3 port 2 finished in 6 msecs
1310 06:44:28.364245 scan_static_bus for USB0 port 0 done
1311 06:44:28.367492 scan_bus: bus USB0 port 0 finished in 43 msecs
1312 06:44:28.371023 scan_static_bus for PCI: 00:0d.0 done
1313 06:44:28.377322 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1314 06:44:28.380792 PCI: 00:14.0 scanning...
1315 06:44:28.384138 scan_static_bus for PCI: 00:14.0
1316 06:44:28.384664 USB0 port 0 enabled
1317 06:44:28.387365 USB0 port 0 scanning...
1318 06:44:28.390748 scan_static_bus for USB0 port 0
1319 06:44:28.391211 USB2 port 0 enabled
1320 06:44:28.394090 USB2 port 1 disabled
1321 06:44:28.397618 USB2 port 2 enabled
1322 06:44:28.398162 USB2 port 3 disabled
1323 06:44:28.400585 USB2 port 4 disabled
1324 06:44:28.403987 USB2 port 5 enabled
1325 06:44:28.404564 USB2 port 6 disabled
1326 06:44:28.407304 USB2 port 7 disabled
1327 06:44:28.410380 USB2 port 8 enabled
1328 06:44:28.410857 USB2 port 9 enabled
1329 06:44:28.414045 USB3 port 0 enabled
1330 06:44:28.414630 USB3 port 1 disabled
1331 06:44:28.417481 USB3 port 2 disabled
1332 06:44:28.420669 USB3 port 3 disabled
1333 06:44:28.421169 USB2 port 0 scanning...
1334 06:44:28.423921 scan_static_bus for USB2 port 0
1335 06:44:28.430390 scan_static_bus for USB2 port 0 done
1336 06:44:28.433718 scan_bus: bus USB2 port 0 finished in 6 msecs
1337 06:44:28.437417 USB2 port 2 scanning...
1338 06:44:28.440235 scan_static_bus for USB2 port 2
1339 06:44:28.443880 scan_static_bus for USB2 port 2 done
1340 06:44:28.447196 scan_bus: bus USB2 port 2 finished in 6 msecs
1341 06:44:28.450364 USB2 port 5 scanning...
1342 06:44:28.454015 scan_static_bus for USB2 port 5
1343 06:44:28.456925 scan_static_bus for USB2 port 5 done
1344 06:44:28.460341 scan_bus: bus USB2 port 5 finished in 6 msecs
1345 06:44:28.464073 USB2 port 8 scanning...
1346 06:44:28.467279 scan_static_bus for USB2 port 8
1347 06:44:28.470518 scan_static_bus for USB2 port 8 done
1348 06:44:28.476816 scan_bus: bus USB2 port 8 finished in 6 msecs
1349 06:44:28.477394 USB2 port 9 scanning...
1350 06:44:28.480111 scan_static_bus for USB2 port 9
1351 06:44:28.483814 scan_static_bus for USB2 port 9 done
1352 06:44:28.490519 scan_bus: bus USB2 port 9 finished in 6 msecs
1353 06:44:28.493427 USB3 port 0 scanning...
1354 06:44:28.493904 scan_static_bus for USB3 port 0
1355 06:44:28.500360 scan_static_bus for USB3 port 0 done
1356 06:44:28.503486 scan_bus: bus USB3 port 0 finished in 6 msecs
1357 06:44:28.506624 scan_static_bus for USB0 port 0 done
1358 06:44:28.513832 scan_bus: bus USB0 port 0 finished in 120 msecs
1359 06:44:28.516942 scan_static_bus for PCI: 00:14.0 done
1360 06:44:28.520398 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1361 06:44:28.523503 PCI: 00:14.3 scanning...
1362 06:44:28.526831 scan_static_bus for PCI: 00:14.3
1363 06:44:28.530237 GENERIC: 0.0 enabled
1364 06:44:28.533551 scan_static_bus for PCI: 00:14.3 done
1365 06:44:28.537166 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1366 06:44:28.540434 PCI: 00:15.0 scanning...
1367 06:44:28.543475 scan_static_bus for PCI: 00:15.0
1368 06:44:28.543953 I2C: 00:1a enabled
1369 06:44:28.546922 I2C: 00:31 enabled
1370 06:44:28.550226 I2C: 00:32 enabled
1371 06:44:28.553552 scan_static_bus for PCI: 00:15.0 done
1372 06:44:28.556853 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1373 06:44:28.560571 PCI: 00:15.1 scanning...
1374 06:44:28.563864 scan_static_bus for PCI: 00:15.1
1375 06:44:28.567109 I2C: 00:50 enabled
1376 06:44:28.570341 scan_static_bus for PCI: 00:15.1 done
1377 06:44:28.573319 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1378 06:44:28.577201 PCI: 00:15.3 scanning...
1379 06:44:28.580192 scan_static_bus for PCI: 00:15.3
1380 06:44:28.580666 I2C: 00:10 enabled
1381 06:44:28.586565 scan_static_bus for PCI: 00:15.3 done
1382 06:44:28.590508 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1383 06:44:28.593658 PCI: 00:19.1 scanning...
1384 06:44:28.596869 scan_static_bus for PCI: 00:19.1
1385 06:44:28.597393 I2C: 00:15 enabled
1386 06:44:28.600121 I2C: 00:2c enabled
1387 06:44:28.603435 scan_static_bus for PCI: 00:19.1 done
1388 06:44:28.610128 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1389 06:44:28.610704 PCI: 00:1e.3 scanning...
1390 06:44:28.613521 scan_generic_bus for PCI: 00:1e.3
1391 06:44:28.617232 SPI: 00 enabled
1392 06:44:28.623321 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1393 06:44:28.626638 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1394 06:44:28.630102 PCI: 00:1f.0 scanning...
1395 06:44:28.633644 scan_static_bus for PCI: 00:1f.0
1396 06:44:28.634210 PNP: 0c09.0 enabled
1397 06:44:28.637112 PNP: 0c09.0 scanning...
1398 06:44:28.639925 scan_static_bus for PNP: 0c09.0
1399 06:44:28.643395 scan_static_bus for PNP: 0c09.0 done
1400 06:44:28.649962 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1401 06:44:28.653282 scan_static_bus for PCI: 00:1f.0 done
1402 06:44:28.656456 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1403 06:44:28.659738 PCI: 00:1f.2 scanning...
1404 06:44:28.663597 scan_static_bus for PCI: 00:1f.2
1405 06:44:28.666576 GENERIC: 0.0 enabled
1406 06:44:28.667057 GENERIC: 0.0 scanning...
1407 06:44:28.669843 scan_static_bus for GENERIC: 0.0
1408 06:44:28.673232 GENERIC: 0.0 enabled
1409 06:44:28.676724 GENERIC: 1.0 enabled
1410 06:44:28.680226 scan_static_bus for GENERIC: 0.0 done
1411 06:44:28.683079 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1412 06:44:28.686612 scan_static_bus for PCI: 00:1f.2 done
1413 06:44:28.693415 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1414 06:44:28.696922 PCI: 00:1f.3 scanning...
1415 06:44:28.699919 scan_static_bus for PCI: 00:1f.3
1416 06:44:28.703422 scan_static_bus for PCI: 00:1f.3 done
1417 06:44:28.706584 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1418 06:44:28.709981 PCI: 00:1f.5 scanning...
1419 06:44:28.713435 scan_generic_bus for PCI: 00:1f.5
1420 06:44:28.716505 scan_generic_bus for PCI: 00:1f.5 done
1421 06:44:28.723215 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1422 06:44:28.726946 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1423 06:44:28.729859 scan_static_bus for Root Device done
1424 06:44:28.736695 scan_bus: bus Root Device finished in 729 msecs
1425 06:44:28.737337 done
1426 06:44:28.743205 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1427 06:44:28.746490 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1428 06:44:28.753018 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1429 06:44:28.756694 SPI flash protection: WPSW=1 SRP0=0
1430 06:44:28.763397 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1431 06:44:28.767068 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1432 06:44:28.769697 found VGA at PCI: 00:02.0
1433 06:44:28.773203 Setting up VGA for PCI: 00:02.0
1434 06:44:28.780041 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1435 06:44:28.783445 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1436 06:44:28.786292 Allocating resources...
1437 06:44:28.789755 Reading resources...
1438 06:44:28.793096 Root Device read_resources bus 0 link: 0
1439 06:44:28.796869 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1440 06:44:28.803322 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1441 06:44:28.806602 DOMAIN: 0000 read_resources bus 0 link: 0
1442 06:44:28.813298 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1443 06:44:28.820005 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1444 06:44:28.823824 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1445 06:44:28.829759 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1446 06:44:28.836223 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1447 06:44:28.842926 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1448 06:44:28.849591 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1449 06:44:28.856251 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1450 06:44:28.862829 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1451 06:44:28.869734 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1452 06:44:28.876327 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1453 06:44:28.882777 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1454 06:44:28.889695 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1455 06:44:28.896537 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1456 06:44:28.899457 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1457 06:44:28.906314 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1458 06:44:28.912773 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1459 06:44:28.919771 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1460 06:44:28.926431 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1461 06:44:28.933063 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1462 06:44:28.939882 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1463 06:44:28.942859 PCI: 00:04.0 read_resources bus 1 link: 0
1464 06:44:28.946068 PCI: 00:04.0 read_resources bus 1 link: 0 done
1465 06:44:28.953088 PCI: 00:06.0 read_resources bus 1 link: 0
1466 06:44:28.956190 PCI: 00:06.0 read_resources bus 1 link: 0 done
1467 06:44:28.959629 PCI: 00:0d.0 read_resources bus 0 link: 0
1468 06:44:28.966469 USB0 port 0 read_resources bus 0 link: 0
1469 06:44:28.969708 USB0 port 0 read_resources bus 0 link: 0 done
1470 06:44:28.973420 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1471 06:44:28.979578 PCI: 00:14.0 read_resources bus 0 link: 0
1472 06:44:28.983079 USB0 port 0 read_resources bus 0 link: 0
1473 06:44:28.986190 USB0 port 0 read_resources bus 0 link: 0 done
1474 06:44:28.992875 PCI: 00:14.0 read_resources bus 0 link: 0 done
1475 06:44:28.996080 PCI: 00:14.3 read_resources bus 0 link: 0
1476 06:44:28.999336 PCI: 00:14.3 read_resources bus 0 link: 0 done
1477 06:44:29.006094 PCI: 00:15.0 read_resources bus 0 link: 0
1478 06:44:29.009468 PCI: 00:15.0 read_resources bus 0 link: 0 done
1479 06:44:29.012628 PCI: 00:15.1 read_resources bus 0 link: 0
1480 06:44:29.019596 PCI: 00:15.1 read_resources bus 0 link: 0 done
1481 06:44:29.023045 PCI: 00:15.3 read_resources bus 0 link: 0
1482 06:44:29.029369 PCI: 00:15.3 read_resources bus 0 link: 0 done
1483 06:44:29.032764 PCI: 00:19.1 read_resources bus 0 link: 0
1484 06:44:29.036199 PCI: 00:19.1 read_resources bus 0 link: 0 done
1485 06:44:29.042911 PCI: 00:1e.3 read_resources bus 2 link: 0
1486 06:44:29.046197 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1487 06:44:29.049607 PCI: 00:1f.0 read_resources bus 0 link: 0
1488 06:44:29.056382 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1489 06:44:29.059296 PCI: 00:1f.2 read_resources bus 0 link: 0
1490 06:44:29.062884 GENERIC: 0.0 read_resources bus 0 link: 0
1491 06:44:29.069231 GENERIC: 0.0 read_resources bus 0 link: 0 done
1492 06:44:29.072525 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1493 06:44:29.079597 DOMAIN: 0000 read_resources bus 0 link: 0 done
1494 06:44:29.082746 Root Device read_resources bus 0 link: 0 done
1495 06:44:29.086340 Done reading resources.
1496 06:44:29.089347 Show resources in subtree (Root Device)...After reading.
1497 06:44:29.096203 Root Device child on link 0 CPU_CLUSTER: 0
1498 06:44:29.099373 CPU_CLUSTER: 0 child on link 0 APIC: 00
1499 06:44:29.099852 APIC: 00
1500 06:44:29.102652 APIC: 1a
1501 06:44:29.103125 APIC: 1c
1502 06:44:29.106076 APIC: 1e
1503 06:44:29.106550 APIC: 18
1504 06:44:29.107038 APIC: 09
1505 06:44:29.109525 APIC: 01
1506 06:44:29.110002 APIC: 08
1507 06:44:29.112660 DOMAIN: 0000 child on link 0 GPIO: 0
1508 06:44:29.122665 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1509 06:44:29.132887 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1510 06:44:29.133473 GPIO: 0
1511 06:44:29.136318 PCI: 00:00.0
1512 06:44:29.145894 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1513 06:44:29.152768 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1514 06:44:29.162473 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1515 06:44:29.172360 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1516 06:44:29.182621 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1517 06:44:29.192939 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1518 06:44:29.202380 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1519 06:44:29.209146 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1520 06:44:29.219639 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1521 06:44:29.229076 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1522 06:44:29.239056 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1523 06:44:29.249243 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1524 06:44:29.259277 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1525 06:44:29.269142 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1526 06:44:29.275650 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1527 06:44:29.285816 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1528 06:44:29.295419 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1529 06:44:29.305174 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1530 06:44:29.315687 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1531 06:44:29.325433 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1532 06:44:29.335461 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1533 06:44:29.341942 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1534 06:44:29.351935 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1535 06:44:29.362021 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1536 06:44:29.371693 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1537 06:44:29.382062 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1538 06:44:29.391984 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1539 06:44:29.401574 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1540 06:44:29.402108 PCI: 00:02.0
1541 06:44:29.411969 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1542 06:44:29.421650 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1543 06:44:29.431611 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1544 06:44:29.434952 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1545 06:44:29.445560 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1546 06:44:29.448271 GENERIC: 0.0
1547 06:44:29.451662 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1548 06:44:29.461540 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1549 06:44:29.471272 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1550 06:44:29.481712 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1551 06:44:29.482252 PCI: 01:00.0
1552 06:44:29.491835 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1553 06:44:29.501500 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1554 06:44:29.504677 PCI: 00:08.0
1555 06:44:29.505278 PCI: 00:0a.0
1556 06:44:29.514811 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1557 06:44:29.517700 PCI: 00:0d.0 child on link 0 USB0 port 0
1558 06:44:29.528074 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1559 06:44:29.534800 USB0 port 0 child on link 0 USB3 port 0
1560 06:44:29.535369 USB3 port 0
1561 06:44:29.538261 USB3 port 1
1562 06:44:29.538819 USB3 port 2
1563 06:44:29.541314 USB3 port 3
1564 06:44:29.544862 PCI: 00:14.0 child on link 0 USB0 port 0
1565 06:44:29.554916 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1566 06:44:29.561335 USB0 port 0 child on link 0 USB2 port 0
1567 06:44:29.561840 USB2 port 0
1568 06:44:29.564702 USB2 port 1
1569 06:44:29.565381 USB2 port 2
1570 06:44:29.568061 USB2 port 3
1571 06:44:29.568694 USB2 port 4
1572 06:44:29.571654 USB2 port 5
1573 06:44:29.572340 USB2 port 6
1574 06:44:29.574835 USB2 port 7
1575 06:44:29.575531 USB2 port 8
1576 06:44:29.577789 USB2 port 9
1577 06:44:29.578393 USB3 port 0
1578 06:44:29.581476 USB3 port 1
1579 06:44:29.582153 USB3 port 2
1580 06:44:29.584821 USB3 port 3
1581 06:44:29.585323 PCI: 00:14.2
1582 06:44:29.594739 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1583 06:44:29.604416 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1584 06:44:29.611114 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1585 06:44:29.621088 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1586 06:44:29.621658 GENERIC: 0.0
1587 06:44:29.627639 PCI: 00:15.0 child on link 0 I2C: 00:1a
1588 06:44:29.637810 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1589 06:44:29.638369 I2C: 00:1a
1590 06:44:29.640899 I2C: 00:31
1591 06:44:29.641391 I2C: 00:32
1592 06:44:29.644864 PCI: 00:15.1 child on link 0 I2C: 00:50
1593 06:44:29.654594 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1594 06:44:29.657729 I2C: 00:50
1595 06:44:29.658192 PCI: 00:15.2
1596 06:44:29.664653 PCI: 00:15.3 child on link 0 I2C: 00:10
1597 06:44:29.674331 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1598 06:44:29.674924 I2C: 00:10
1599 06:44:29.677737 PCI: 00:16.0
1600 06:44:29.687531 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1601 06:44:29.688061 PCI: 00:19.0
1602 06:44:29.690857 PCI: 00:19.1 child on link 0 I2C: 00:15
1603 06:44:29.700870 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1604 06:44:29.704164 I2C: 00:15
1605 06:44:29.704622 I2C: 00:2c
1606 06:44:29.707497 PCI: 00:1e.0
1607 06:44:29.717813 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1608 06:44:29.720918 PCI: 00:1e.3 child on link 0 SPI: 00
1609 06:44:29.730862 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1610 06:44:29.734302 SPI: 00
1611 06:44:29.737391 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1612 06:44:29.747178 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1613 06:44:29.747896 PNP: 0c09.0
1614 06:44:29.757076 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1615 06:44:29.760838 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1616 06:44:29.770671 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1617 06:44:29.780270 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1618 06:44:29.783789 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1619 06:44:29.786857 GENERIC: 0.0
1620 06:44:29.787319 GENERIC: 1.0
1621 06:44:29.790430 PCI: 00:1f.3
1622 06:44:29.800372 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1623 06:44:29.810461 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1624 06:44:29.810935 PCI: 00:1f.5
1625 06:44:29.820319 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1626 06:44:29.827091 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1627 06:44:29.834127 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1628 06:44:29.840373 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1629 06:44:29.847348 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1630 06:44:29.850462 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1631 06:44:29.853730 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1632 06:44:29.860575 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1633 06:44:29.870254 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1634 06:44:29.877031 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1635 06:44:29.883684 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1636 06:44:29.890139 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1637 06:44:29.897073 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1638 06:44:29.907511 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1639 06:44:29.913383 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1640 06:44:29.916633 DOMAIN: 0000: Resource ranges:
1641 06:44:29.920054 * Base: 1000, Size: 800, Tag: 100
1642 06:44:29.923272 * Base: 1900, Size: e700, Tag: 100
1643 06:44:29.929604 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1644 06:44:29.936630 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1645 06:44:29.943271 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1646 06:44:29.950151 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1647 06:44:29.956424 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1648 06:44:29.966632 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1649 06:44:29.973378 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1650 06:44:29.979806 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1651 06:44:29.986741 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1652 06:44:29.997227 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1653 06:44:30.003216 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1654 06:44:30.009754 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1655 06:44:30.020005 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1656 06:44:30.026383 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1657 06:44:30.033220 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1658 06:44:30.042830 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1659 06:44:30.049443 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1660 06:44:30.056374 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1661 06:44:30.066326 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1662 06:44:30.073088 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1663 06:44:30.079433 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1664 06:44:30.089794 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1665 06:44:30.096171 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1666 06:44:30.102625 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1667 06:44:30.112374 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1668 06:44:30.119440 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1669 06:44:30.126133 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1670 06:44:30.136288 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1671 06:44:30.142751 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1672 06:44:30.149353 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1673 06:44:30.159032 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1674 06:44:30.165839 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1675 06:44:30.172746 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1676 06:44:30.175923 DOMAIN: 0000: Resource ranges:
1677 06:44:30.182857 * Base: 80400000, Size: 3fc00000, Tag: 200
1678 06:44:30.186046 * Base: d0000000, Size: 28000000, Tag: 200
1679 06:44:30.189697 * Base: fa000000, Size: 1000000, Tag: 200
1680 06:44:30.192510 * Base: fb001000, Size: 17ff000, Tag: 200
1681 06:44:30.199531 * Base: fe800000, Size: 300000, Tag: 200
1682 06:44:30.202653 * Base: feb80000, Size: 80000, Tag: 200
1683 06:44:30.206069 * Base: fed00000, Size: 40000, Tag: 200
1684 06:44:30.209352 * Base: fed70000, Size: 10000, Tag: 200
1685 06:44:30.215957 * Base: fed88000, Size: 8000, Tag: 200
1686 06:44:30.219147 * Base: fed93000, Size: d000, Tag: 200
1687 06:44:30.222186 * Base: feda2000, Size: 1e000, Tag: 200
1688 06:44:30.226045 * Base: fede0000, Size: 1220000, Tag: 200
1689 06:44:30.232401 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1690 06:44:30.239147 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1691 06:44:30.245563 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1692 06:44:30.252085 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1693 06:44:30.258860 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1694 06:44:30.265457 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1695 06:44:30.272029 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1696 06:44:30.278966 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1697 06:44:30.285529 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1698 06:44:30.292385 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1699 06:44:30.298587 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1700 06:44:30.305317 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1701 06:44:30.312159 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1702 06:44:30.318448 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1703 06:44:30.325307 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1704 06:44:30.331579 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1705 06:44:30.338702 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1706 06:44:30.345779 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1707 06:44:30.351618 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1708 06:44:30.358515 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1709 06:44:30.364708 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1710 06:44:30.375391 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1711 06:44:30.377970 PCI: 00:06.0: Resource ranges:
1712 06:44:30.381611 * Base: 80400000, Size: 100000, Tag: 200
1713 06:44:30.388077 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1714 06:44:30.395021 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1715 06:44:30.401671 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1716 06:44:30.411230 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1717 06:44:30.414935 Root Device assign_resources, bus 0 link: 0
1718 06:44:30.417790 DOMAIN: 0000 assign_resources, bus 0 link: 0
1719 06:44:30.428056 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1720 06:44:30.434511 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1721 06:44:30.441332 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1722 06:44:30.450903 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1723 06:44:30.454374 PCI: 00:04.0 assign_resources, bus 1 link: 0
1724 06:44:30.461150 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1725 06:44:30.467557 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1726 06:44:30.477558 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1727 06:44:30.487940 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1728 06:44:30.490881 PCI: 00:06.0 assign_resources, bus 1 link: 0
1729 06:44:30.500947 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1730 06:44:30.507922 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1731 06:44:30.513806 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1732 06:44:30.521069 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1733 06:44:30.527501 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1734 06:44:30.534354 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1735 06:44:30.537362 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1736 06:44:30.547442 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1737 06:44:30.550529 PCI: 00:14.0 assign_resources, bus 0 link: 0
1738 06:44:30.557035 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1739 06:44:30.563815 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1740 06:44:30.570448 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1741 06:44:30.580252 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1742 06:44:30.583295 PCI: 00:14.3 assign_resources, bus 0 link: 0
1743 06:44:30.589983 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1744 06:44:30.596583 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1745 06:44:30.600235 PCI: 00:15.0 assign_resources, bus 0 link: 0
1746 06:44:30.607127 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1747 06:44:30.613618 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1748 06:44:30.620235 PCI: 00:15.1 assign_resources, bus 0 link: 0
1749 06:44:30.623791 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1750 06:44:30.633504 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1751 06:44:30.636812 PCI: 00:15.3 assign_resources, bus 0 link: 0
1752 06:44:30.639810 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1753 06:44:30.650207 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1754 06:44:30.656579 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1755 06:44:30.663403 PCI: 00:19.1 assign_resources, bus 0 link: 0
1756 06:44:30.666653 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1757 06:44:30.676735 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1758 06:44:30.679543 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1759 06:44:30.683105 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1760 06:44:30.689622 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1761 06:44:30.692849 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1762 06:44:30.699682 LPC: Trying to open IO window from 800 size 1ff
1763 06:44:30.706249 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1764 06:44:30.716407 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1765 06:44:30.722969 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1766 06:44:30.726341 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1767 06:44:30.733522 Root Device assign_resources, bus 0 link: 0 done
1768 06:44:30.736620 Done setting resources.
1769 06:44:30.743411 Show resources in subtree (Root Device)...After assigning values.
1770 06:44:30.746174 Root Device child on link 0 CPU_CLUSTER: 0
1771 06:44:30.749962 CPU_CLUSTER: 0 child on link 0 APIC: 00
1772 06:44:30.752686 APIC: 00
1773 06:44:30.753195 APIC: 1a
1774 06:44:30.753567 APIC: 1c
1775 06:44:30.756073 APIC: 1e
1776 06:44:30.756534 APIC: 18
1777 06:44:30.757061 APIC: 09
1778 06:44:30.759371 APIC: 01
1779 06:44:30.759906 APIC: 08
1780 06:44:30.762707 DOMAIN: 0000 child on link 0 GPIO: 0
1781 06:44:30.772491 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1782 06:44:30.782645 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1783 06:44:30.786327 GPIO: 0
1784 06:44:30.786886 PCI: 00:00.0
1785 06:44:30.796000 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1786 06:44:30.805869 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1787 06:44:30.816150 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1788 06:44:30.822723 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1789 06:44:30.832514 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1790 06:44:30.842758 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1791 06:44:30.852864 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1792 06:44:30.862579 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1793 06:44:30.872078 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1794 06:44:30.882175 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1795 06:44:30.889261 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1796 06:44:30.899114 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1797 06:44:30.908856 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1798 06:44:30.918540 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1799 06:44:30.928454 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1800 06:44:30.935220 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1801 06:44:30.945545 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1802 06:44:30.954982 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1803 06:44:30.965124 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1804 06:44:30.975050 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1805 06:44:30.985044 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1806 06:44:30.995283 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1807 06:44:31.004818 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1808 06:44:31.014658 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1809 06:44:31.024779 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1810 06:44:31.031574 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1811 06:44:31.041644 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1812 06:44:31.051669 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1813 06:44:31.054746 PCI: 00:02.0
1814 06:44:31.064686 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1815 06:44:31.074939 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1816 06:44:31.084474 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1817 06:44:31.088087 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1818 06:44:31.097907 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1819 06:44:31.101620 GENERIC: 0.0
1820 06:44:31.104556 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1821 06:44:31.114335 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1822 06:44:31.124556 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1823 06:44:31.137709 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1824 06:44:31.138248 PCI: 01:00.0
1825 06:44:31.147519 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1826 06:44:31.157572 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1827 06:44:31.160743 PCI: 00:08.0
1828 06:44:31.161431 PCI: 00:0a.0
1829 06:44:31.174640 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1830 06:44:31.177705 PCI: 00:0d.0 child on link 0 USB0 port 0
1831 06:44:31.187677 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1832 06:44:31.191040 USB0 port 0 child on link 0 USB3 port 0
1833 06:44:31.194278 USB3 port 0
1834 06:44:31.194844 USB3 port 1
1835 06:44:31.197589 USB3 port 2
1836 06:44:31.198154 USB3 port 3
1837 06:44:31.204002 PCI: 00:14.0 child on link 0 USB0 port 0
1838 06:44:31.213850 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1839 06:44:31.217409 USB0 port 0 child on link 0 USB2 port 0
1840 06:44:31.220593 USB2 port 0
1841 06:44:31.221081 USB2 port 1
1842 06:44:31.223995 USB2 port 2
1843 06:44:31.224540 USB2 port 3
1844 06:44:31.227621 USB2 port 4
1845 06:44:31.228104 USB2 port 5
1846 06:44:31.230994 USB2 port 6
1847 06:44:31.231551 USB2 port 7
1848 06:44:31.234000 USB2 port 8
1849 06:44:31.237588 USB2 port 9
1850 06:44:31.238146 USB3 port 0
1851 06:44:31.240592 USB3 port 1
1852 06:44:31.241085 USB3 port 2
1853 06:44:31.243961 USB3 port 3
1854 06:44:31.244464 PCI: 00:14.2
1855 06:44:31.254120 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1856 06:44:31.263667 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1857 06:44:31.270574 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1858 06:44:31.280448 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1859 06:44:31.281003 GENERIC: 0.0
1860 06:44:31.287205 PCI: 00:15.0 child on link 0 I2C: 00:1a
1861 06:44:31.297426 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1862 06:44:31.297989 I2C: 00:1a
1863 06:44:31.300681 I2C: 00:31
1864 06:44:31.301259 I2C: 00:32
1865 06:44:31.303647 PCI: 00:15.1 child on link 0 I2C: 00:50
1866 06:44:31.317021 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1867 06:44:31.317494 I2C: 00:50
1868 06:44:31.320394 PCI: 00:15.2
1869 06:44:31.323638 PCI: 00:15.3 child on link 0 I2C: 00:10
1870 06:44:31.333590 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1871 06:44:31.334137 I2C: 00:10
1872 06:44:31.337029 PCI: 00:16.0
1873 06:44:31.347079 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1874 06:44:31.349839 PCI: 00:19.0
1875 06:44:31.353574 PCI: 00:19.1 child on link 0 I2C: 00:15
1876 06:44:31.363562 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1877 06:44:31.367159 I2C: 00:15
1878 06:44:31.367713 I2C: 00:2c
1879 06:44:31.368080 PCI: 00:1e.0
1880 06:44:31.379968 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1881 06:44:31.383341 PCI: 00:1e.3 child on link 0 SPI: 00
1882 06:44:31.393424 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1883 06:44:31.396400 SPI: 00
1884 06:44:31.400129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1885 06:44:31.406591 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1886 06:44:31.409867 PNP: 0c09.0
1887 06:44:31.419894 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1888 06:44:31.423529 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1889 06:44:31.433141 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1890 06:44:31.443592 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1891 06:44:31.446607 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1892 06:44:31.449663 GENERIC: 0.0
1893 06:44:31.450127 GENERIC: 1.0
1894 06:44:31.453305 PCI: 00:1f.3
1895 06:44:31.463073 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1896 06:44:31.473213 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1897 06:44:31.473683 PCI: 00:1f.5
1898 06:44:31.483176 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1899 06:44:31.486425 Done allocating resources.
1900 06:44:31.493042 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1901 06:44:31.499393 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1902 06:44:31.502828 Configure audio over I2S with MAX98373 NAU88L25B.
1903 06:44:31.508345 Enabling BT offload
1904 06:44:31.515302 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1905 06:44:31.518725 Enabling resources...
1906 06:44:31.522185 PCI: 00:00.0 subsystem <- 8086/4609
1907 06:44:31.525664 PCI: 00:00.0 cmd <- 06
1908 06:44:31.529178 PCI: 00:02.0 subsystem <- 8086/46b3
1909 06:44:31.532481 PCI: 00:02.0 cmd <- 03
1910 06:44:31.535974 PCI: 00:04.0 subsystem <- 8086/461d
1911 06:44:31.536536 PCI: 00:04.0 cmd <- 02
1912 06:44:31.539309 PCI: 00:06.0 bridge ctrl <- 0013
1913 06:44:31.542727 PCI: 00:06.0 subsystem <- 8086/464d
1914 06:44:31.545653 PCI: 00:06.0 cmd <- 106
1915 06:44:31.549100 PCI: 00:0a.0 subsystem <- 8086/467d
1916 06:44:31.552218 PCI: 00:0a.0 cmd <- 02
1917 06:44:31.555868 PCI: 00:0d.0 subsystem <- 8086/461e
1918 06:44:31.558686 PCI: 00:0d.0 cmd <- 02
1919 06:44:31.562311 PCI: 00:14.0 subsystem <- 8086/51ed
1920 06:44:31.565467 PCI: 00:14.0 cmd <- 02
1921 06:44:31.569291 PCI: 00:14.2 subsystem <- 8086/51ef
1922 06:44:31.569834 PCI: 00:14.2 cmd <- 02
1923 06:44:31.572406 PCI: 00:14.3 subsystem <- 8086/51f0
1924 06:44:31.575845 PCI: 00:14.3 cmd <- 02
1925 06:44:31.578721 PCI: 00:15.0 subsystem <- 8086/51e8
1926 06:44:31.582356 PCI: 00:15.0 cmd <- 02
1927 06:44:31.585711 PCI: 00:15.1 subsystem <- 8086/51e9
1928 06:44:31.588900 PCI: 00:15.1 cmd <- 06
1929 06:44:31.592193 PCI: 00:15.3 subsystem <- 8086/51eb
1930 06:44:31.595776 PCI: 00:15.3 cmd <- 02
1931 06:44:31.599126 PCI: 00:16.0 subsystem <- 8086/51e0
1932 06:44:31.599676 PCI: 00:16.0 cmd <- 02
1933 06:44:31.602415 PCI: 00:19.1 subsystem <- 8086/51c6
1934 06:44:31.605352 PCI: 00:19.1 cmd <- 02
1935 06:44:31.608855 PCI: 00:1e.0 subsystem <- 8086/51a8
1936 06:44:31.612068 PCI: 00:1e.0 cmd <- 06
1937 06:44:31.615184 PCI: 00:1e.3 subsystem <- 8086/51ab
1938 06:44:31.618688 PCI: 00:1e.3 cmd <- 02
1939 06:44:31.622225 PCI: 00:1f.0 subsystem <- 8086/5182
1940 06:44:31.625301 PCI: 00:1f.0 cmd <- 407
1941 06:44:31.629033 PCI: 00:1f.3 subsystem <- 8086/51c8
1942 06:44:31.629652 PCI: 00:1f.3 cmd <- 02
1943 06:44:31.631746 PCI: 00:1f.5 subsystem <- 8086/51a4
1944 06:44:31.635395 PCI: 00:1f.5 cmd <- 406
1945 06:44:31.638778 PCI: 01:00.0 cmd <- 02
1946 06:44:31.639254 done.
1947 06:44:31.645269 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1948 06:44:31.648852 ME: Version: Unavailable
1949 06:44:31.652042 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1950 06:44:31.655213 Initializing devices...
1951 06:44:31.658400 Root Device init
1952 06:44:31.658867 mainboard: EC init
1953 06:44:31.665179 Chrome EC: Set SMI mask to 0x0000000000000000
1954 06:44:31.665712 Chrome EC: UHEPI supported
1955 06:44:31.673093 Chrome EC: clear events_b mask to 0x0000000000000000
1956 06:44:31.679700 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1957 06:44:31.686218 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1958 06:44:31.692810 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1959 06:44:31.696183 Chrome EC: Set WAKE mask to 0x0000000000000000
1960 06:44:31.704900 Root Device init finished in 42 msecs
1961 06:44:31.705757 PCI: 00:00.0 init
1962 06:44:31.708233 CPU TDP = 15 Watts
1963 06:44:31.711735 CPU PL1 = 15 Watts
1964 06:44:31.712263 CPU PL2 = 55 Watts
1965 06:44:31.714773 CPU PL4 = 123 Watts
1966 06:44:31.718078 PCI: 00:00.0 init finished in 8 msecs
1967 06:44:31.721552 PCI: 00:02.0 init
1968 06:44:31.722101 GMA: Found VBT in CBFS
1969 06:44:31.725136 GMA: Found valid VBT in CBFS
1970 06:44:31.731689 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1971 06:44:31.738269 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1972 06:44:31.741134 PCI: 00:02.0 init finished in 18 msecs
1973 06:44:31.745022 PCI: 00:06.0 init
1974 06:44:31.748029 Initializing PCH PCIe bridge.
1975 06:44:31.751576 PCI: 00:06.0 init finished in 3 msecs
1976 06:44:31.754962 PCI: 00:0a.0 init
1977 06:44:31.757922 PCI: 00:0a.0 init finished in 0 msecs
1978 06:44:31.758402 PCI: 00:14.0 init
1979 06:44:31.761254 PCI: 00:14.0 init finished in 0 msecs
1980 06:44:31.765107 PCI: 00:14.2 init
1981 06:44:31.768189 PCI: 00:14.2 init finished in 0 msecs
1982 06:44:31.771452 PCI: 00:15.0 init
1983 06:44:31.774783 I2C bus 0 version 0x3230302a
1984 06:44:31.777986 DW I2C bus 0 at 0x80655000 (400 KHz)
1985 06:44:31.781398 PCI: 00:15.0 init finished in 6 msecs
1986 06:44:31.781859 PCI: 00:15.1 init
1987 06:44:31.784593 I2C bus 1 version 0x3230302a
1988 06:44:31.787996 DW I2C bus 1 at 0x80656000 (400 KHz)
1989 06:44:31.794474 PCI: 00:15.1 init finished in 6 msecs
1990 06:44:31.795134 PCI: 00:15.3 init
1991 06:44:31.797853 I2C bus 3 version 0x3230302a
1992 06:44:31.801302 DW I2C bus 3 at 0x80657000 (400 KHz)
1993 06:44:31.804488 PCI: 00:15.3 init finished in 6 msecs
1994 06:44:31.807942 PCI: 00:16.0 init
1995 06:44:31.811177 PCI: 00:16.0 init finished in 0 msecs
1996 06:44:31.811651 PCI: 00:19.1 init
1997 06:44:31.814367 I2C bus 5 version 0x3230302a
1998 06:44:31.820963 DW I2C bus 5 at 0x80659000 (400 KHz)
1999 06:44:31.824125 PCI: 00:19.1 init finished in 6 msecs
2000 06:44:31.824593 PCI: 00:1f.0 init
2001 06:44:31.831352 IOAPIC: Initializing IOAPIC at 0xfec00000
2002 06:44:31.831902 IOAPIC: ID = 0x02
2003 06:44:31.834520 IOAPIC: Dumping registers
2004 06:44:31.837527 reg 0x0000: 0x02000000
2005 06:44:31.837994 reg 0x0001: 0x00770020
2006 06:44:31.841266 reg 0x0002: 0x00000000
2007 06:44:31.844263 IOAPIC: 120 interrupts
2008 06:44:31.847786 IOAPIC: Clearing IOAPIC at 0xfec00000
2009 06:44:31.854276 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2010 06:44:31.857576 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2011 06:44:31.860665 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2012 06:44:31.867720 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2013 06:44:31.871046 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2014 06:44:31.877430 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2015 06:44:31.880546 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2016 06:44:31.887721 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2017 06:44:31.890686 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2018 06:44:31.893899 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2019 06:44:31.900698 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2020 06:44:31.904120 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2021 06:44:31.910605 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2022 06:44:31.913903 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2023 06:44:31.920777 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2024 06:44:31.923934 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2025 06:44:31.930869 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2026 06:44:31.934314 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2027 06:44:31.937666 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2028 06:44:31.944040 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2029 06:44:31.947209 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2030 06:44:31.954129 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2031 06:44:31.957267 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2032 06:44:31.963797 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2033 06:44:31.967017 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2034 06:44:31.973670 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2035 06:44:31.977301 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2036 06:44:31.980718 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2037 06:44:31.987115 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2038 06:44:31.990300 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2039 06:44:31.997202 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2040 06:44:32.000329 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2041 06:44:32.006625 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2042 06:44:32.010159 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2043 06:44:32.016927 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2044 06:44:32.020473 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2045 06:44:32.023467 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2046 06:44:32.030170 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2047 06:44:32.033245 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2048 06:44:32.040136 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2049 06:44:32.043388 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2050 06:44:32.050487 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2051 06:44:32.053364 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2052 06:44:32.060082 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2053 06:44:32.063217 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2054 06:44:32.066844 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2055 06:44:32.073301 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2056 06:44:32.076774 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2057 06:44:32.083255 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2058 06:44:32.086446 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2059 06:44:32.093132 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2060 06:44:32.096457 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2061 06:44:32.103184 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2062 06:44:32.106468 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2063 06:44:32.109676 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2064 06:44:32.116623 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2065 06:44:32.119664 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2066 06:44:32.126611 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2067 06:44:32.129813 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2068 06:44:32.136487 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2069 06:44:32.139965 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2070 06:44:32.146046 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2071 06:44:32.149579 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2072 06:44:32.153046 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2073 06:44:32.159607 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2074 06:44:32.162734 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2075 06:44:32.170023 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2076 06:44:32.172623 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2077 06:44:32.180045 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2078 06:44:32.182628 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2079 06:44:32.189423 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2080 06:44:32.192804 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2081 06:44:32.196083 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2082 06:44:32.202513 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2083 06:44:32.206044 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2084 06:44:32.212362 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2085 06:44:32.216004 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2086 06:44:32.222577 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2087 06:44:32.225754 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2088 06:44:32.232335 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2089 06:44:32.235704 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2090 06:44:32.239569 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2091 06:44:32.245734 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2092 06:44:32.249247 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2093 06:44:32.256067 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2094 06:44:32.259049 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2095 06:44:32.265811 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2096 06:44:32.269259 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2097 06:44:32.275977 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2098 06:44:32.279248 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2099 06:44:32.282133 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2100 06:44:32.289034 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2101 06:44:32.292257 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2102 06:44:32.298886 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2103 06:44:32.302037 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2104 06:44:32.309027 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2105 06:44:32.312109 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2106 06:44:32.318980 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2107 06:44:32.322071 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2108 06:44:32.325254 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2109 06:44:32.332328 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2110 06:44:32.335779 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2111 06:44:32.341801 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2112 06:44:32.345378 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2113 06:44:32.352381 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2114 06:44:32.355370 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2115 06:44:32.361582 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2116 06:44:32.365064 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2117 06:44:32.368432 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2118 06:44:32.375280 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2119 06:44:32.378829 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2120 06:44:32.385515 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2121 06:44:32.388420 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2122 06:44:32.395059 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2123 06:44:32.398406 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2124 06:44:32.405369 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2125 06:44:32.408068 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2126 06:44:32.411397 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2127 06:44:32.418377 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2128 06:44:32.421736 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2129 06:44:32.428218 IOAPIC: Bootstrap Processor Local APIC = 0x00
2130 06:44:32.431429 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2131 06:44:32.434898 PCI: 00:1f.0 init finished in 607 msecs
2132 06:44:32.438531 PCI: 00:1f.2 init
2133 06:44:32.441501 apm_control: Disabling ACPI.
2134 06:44:32.446324 APMC done.
2135 06:44:32.449921 PCI: 00:1f.2 init finished in 7 msecs
2136 06:44:32.452861 PCI: 00:1f.3 init
2137 06:44:32.456197 PCI: 00:1f.3 init finished in 0 msecs
2138 06:44:32.456745 PCI: 01:00.0 init
2139 06:44:32.459307 PCI: 01:00.0 init finished in 0 msecs
2140 06:44:32.462683 PNP: 0c09.0 init
2141 06:44:32.466285 Google Chrome EC uptime: 12.096 seconds
2142 06:44:32.472905 Google Chrome AP resets since EC boot: 1
2143 06:44:32.476063 Google Chrome most recent AP reset causes:
2144 06:44:32.479753 0.338: 32775 shutdown: entering G3
2145 06:44:32.486563 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2146 06:44:32.489525 PNP: 0c09.0 init finished in 23 msecs
2147 06:44:32.493447 GENERIC: 0.0 init
2148 06:44:32.496844 GENERIC: 0.0 init finished in 0 msecs
2149 06:44:32.497439 GENERIC: 1.0 init
2150 06:44:32.499486 GENERIC: 1.0 init finished in 0 msecs
2151 06:44:32.503050 Devices initialized
2152 06:44:32.506052 Show all devs... After init.
2153 06:44:32.509682 Root Device: enabled 1
2154 06:44:32.510239 CPU_CLUSTER: 0: enabled 1
2155 06:44:32.513026 DOMAIN: 0000: enabled 1
2156 06:44:32.516316 GPIO: 0: enabled 1
2157 06:44:32.519383 PCI: 00:00.0: enabled 1
2158 06:44:32.519849 PCI: 00:01.0: enabled 0
2159 06:44:32.522651 PCI: 00:01.1: enabled 0
2160 06:44:32.526147 PCI: 00:02.0: enabled 1
2161 06:44:32.526612 PCI: 00:04.0: enabled 1
2162 06:44:32.529698 PCI: 00:05.0: enabled 0
2163 06:44:32.533111 PCI: 00:06.0: enabled 1
2164 06:44:32.536316 PCI: 00:06.2: enabled 0
2165 06:44:32.536866 PCI: 00:07.0: enabled 0
2166 06:44:32.539539 PCI: 00:07.1: enabled 0
2167 06:44:32.543327 PCI: 00:07.2: enabled 0
2168 06:44:32.546194 PCI: 00:07.3: enabled 0
2169 06:44:32.546656 PCI: 00:08.0: enabled 0
2170 06:44:32.549579 PCI: 00:09.0: enabled 0
2171 06:44:32.553123 PCI: 00:0a.0: enabled 1
2172 06:44:32.556091 PCI: 00:0d.0: enabled 1
2173 06:44:32.556642 PCI: 00:0d.1: enabled 0
2174 06:44:32.559611 PCI: 00:0d.2: enabled 0
2175 06:44:32.562699 PCI: 00:0d.3: enabled 0
2176 06:44:32.566338 PCI: 00:0e.0: enabled 0
2177 06:44:32.566891 PCI: 00:10.0: enabled 0
2178 06:44:32.569526 PCI: 00:10.1: enabled 0
2179 06:44:32.572750 PCI: 00:10.6: enabled 0
2180 06:44:32.573355 PCI: 00:10.7: enabled 0
2181 06:44:32.576098 PCI: 00:12.0: enabled 0
2182 06:44:32.579769 PCI: 00:12.6: enabled 0
2183 06:44:32.582486 PCI: 00:12.7: enabled 0
2184 06:44:32.582951 PCI: 00:13.0: enabled 0
2185 06:44:32.586343 PCI: 00:14.0: enabled 1
2186 06:44:32.589627 PCI: 00:14.1: enabled 0
2187 06:44:32.593259 PCI: 00:14.2: enabled 1
2188 06:44:32.593820 PCI: 00:14.3: enabled 1
2189 06:44:32.596163 PCI: 00:15.0: enabled 1
2190 06:44:32.599609 PCI: 00:15.1: enabled 1
2191 06:44:32.602733 PCI: 00:15.2: enabled 0
2192 06:44:32.603293 PCI: 00:15.3: enabled 1
2193 06:44:32.605910 PCI: 00:16.0: enabled 1
2194 06:44:32.609066 PCI: 00:16.1: enabled 0
2195 06:44:32.609586 PCI: 00:16.2: enabled 0
2196 06:44:32.612408 PCI: 00:16.3: enabled 0
2197 06:44:32.615727 PCI: 00:16.4: enabled 0
2198 06:44:32.619080 PCI: 00:16.5: enabled 0
2199 06:44:32.619544 PCI: 00:17.0: enabled 0
2200 06:44:32.622941 PCI: 00:19.0: enabled 0
2201 06:44:32.625741 PCI: 00:19.1: enabled 1
2202 06:44:32.629348 PCI: 00:19.2: enabled 0
2203 06:44:32.629904 PCI: 00:1a.0: enabled 0
2204 06:44:32.632904 PCI: 00:1c.0: enabled 0
2205 06:44:32.635968 PCI: 00:1c.1: enabled 0
2206 06:44:32.639067 PCI: 00:1c.2: enabled 0
2207 06:44:32.639532 PCI: 00:1c.3: enabled 0
2208 06:44:32.642594 PCI: 00:1c.4: enabled 0
2209 06:44:32.646407 PCI: 00:1c.5: enabled 0
2210 06:44:32.646963 PCI: 00:1c.6: enabled 0
2211 06:44:32.649150 PCI: 00:1c.7: enabled 0
2212 06:44:32.652497 PCI: 00:1d.0: enabled 0
2213 06:44:32.655839 PCI: 00:1d.1: enabled 0
2214 06:44:32.656394 PCI: 00:1d.2: enabled 0
2215 06:44:32.659060 PCI: 00:1d.3: enabled 0
2216 06:44:32.662505 PCI: 00:1e.0: enabled 1
2217 06:44:32.665759 PCI: 00:1e.1: enabled 0
2218 06:44:32.666218 PCI: 00:1e.2: enabled 0
2219 06:44:32.669103 PCI: 00:1e.3: enabled 1
2220 06:44:32.672715 PCI: 00:1f.0: enabled 1
2221 06:44:32.675870 PCI: 00:1f.1: enabled 0
2222 06:44:32.676328 PCI: 00:1f.2: enabled 1
2223 06:44:32.679290 PCI: 00:1f.3: enabled 1
2224 06:44:32.682349 PCI: 00:1f.4: enabled 0
2225 06:44:32.685740 PCI: 00:1f.5: enabled 1
2226 06:44:32.686203 PCI: 00:1f.6: enabled 0
2227 06:44:32.689315 PCI: 00:1f.7: enabled 0
2228 06:44:32.692629 GENERIC: 0.0: enabled 1
2229 06:44:32.693403 GENERIC: 0.0: enabled 1
2230 06:44:32.695772 GENERIC: 1.0: enabled 1
2231 06:44:32.699037 GENERIC: 0.0: enabled 1
2232 06:44:32.702374 GENERIC: 1.0: enabled 1
2233 06:44:32.702930 USB0 port 0: enabled 1
2234 06:44:32.705497 USB0 port 0: enabled 1
2235 06:44:32.709000 GENERIC: 0.0: enabled 1
2236 06:44:32.709566 I2C: 00:1a: enabled 1
2237 06:44:32.712290 I2C: 00:31: enabled 1
2238 06:44:32.715659 I2C: 00:32: enabled 1
2239 06:44:32.718935 I2C: 00:50: enabled 1
2240 06:44:32.719394 I2C: 00:10: enabled 1
2241 06:44:32.722232 I2C: 00:15: enabled 1
2242 06:44:32.725978 I2C: 00:2c: enabled 1
2243 06:44:32.726531 GENERIC: 0.0: enabled 1
2244 06:44:32.729339 SPI: 00: enabled 1
2245 06:44:32.732251 PNP: 0c09.0: enabled 1
2246 06:44:32.732804 GENERIC: 0.0: enabled 1
2247 06:44:32.735840 USB3 port 0: enabled 1
2248 06:44:32.739383 USB3 port 1: enabled 0
2249 06:44:32.739963 USB3 port 2: enabled 1
2250 06:44:32.742157 USB3 port 3: enabled 0
2251 06:44:32.745957 USB2 port 0: enabled 1
2252 06:44:32.748873 USB2 port 1: enabled 0
2253 06:44:32.749466 USB2 port 2: enabled 1
2254 06:44:32.752197 USB2 port 3: enabled 0
2255 06:44:32.755337 USB2 port 4: enabled 0
2256 06:44:32.755797 USB2 port 5: enabled 1
2257 06:44:32.759116 USB2 port 6: enabled 0
2258 06:44:32.762086 USB2 port 7: enabled 0
2259 06:44:32.762545 USB2 port 8: enabled 1
2260 06:44:32.765301 USB2 port 9: enabled 1
2261 06:44:32.768434 USB3 port 0: enabled 1
2262 06:44:32.772142 USB3 port 1: enabled 0
2263 06:44:32.772764 USB3 port 2: enabled 0
2264 06:44:32.775137 USB3 port 3: enabled 0
2265 06:44:32.778641 GENERIC: 0.0: enabled 1
2266 06:44:32.779196 GENERIC: 1.0: enabled 1
2267 06:44:32.782186 APIC: 00: enabled 1
2268 06:44:32.785535 APIC: 1a: enabled 1
2269 06:44:32.786095 APIC: 1c: enabled 1
2270 06:44:32.788870 APIC: 1e: enabled 1
2271 06:44:32.792003 APIC: 18: enabled 1
2272 06:44:32.792579 APIC: 09: enabled 1
2273 06:44:32.795252 APIC: 01: enabled 1
2274 06:44:32.795849 APIC: 08: enabled 1
2275 06:44:32.799069 PCI: 01:00.0: enabled 1
2276 06:44:32.805561 BS: BS_DEV_INIT run times (exec / console): 13 / 1133 ms
2277 06:44:32.808789 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2278 06:44:32.811654 ELOG: NV offset 0xf20000 size 0x4000
2279 06:44:32.820465 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2280 06:44:32.827106 ELOG: Event(17) added with size 13 at 2024-01-03 06:44:33 UTC
2281 06:44:32.833790 ELOG: Event(9E) added with size 10 at 2024-01-03 06:44:33 UTC
2282 06:44:32.840784 ELOG: Event(9F) added with size 14 at 2024-01-03 06:44:33 UTC
2283 06:44:32.846963 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2284 06:44:32.853659 ELOG: Event(A0) added with size 9 at 2024-01-03 06:44:33 UTC
2285 06:44:32.857013 elog_add_boot_reason: Logged dev mode boot
2286 06:44:32.863402 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2287 06:44:32.863876 Finalize devices...
2288 06:44:32.867279 PCI: 00:16.0 final
2289 06:44:32.870237 PCI: 00:1f.2 final
2290 06:44:32.870698 GENERIC: 0.0 final
2291 06:44:32.876852 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2292 06:44:32.880137 GENERIC: 1.0 final
2293 06:44:32.886947 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2294 06:44:32.887504 Devices finalized
2295 06:44:32.893402 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2296 06:44:32.896695 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2297 06:44:32.903859 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2298 06:44:32.906735 ME: HFSTS1 : 0x90000245
2299 06:44:32.913186 ME: HFSTS2 : 0x82100116
2300 06:44:32.916554 ME: HFSTS3 : 0x00000050
2301 06:44:32.923622 ME: HFSTS4 : 0x00004000
2302 06:44:32.926632 ME: HFSTS5 : 0x00000000
2303 06:44:32.930233 ME: HFSTS6 : 0x40600006
2304 06:44:32.933423 ME: Manufacturing Mode : NO
2305 06:44:32.940205 ME: SPI Protection Mode Enabled : YES
2306 06:44:32.943398 ME: FPFs Committed : YES
2307 06:44:32.946624 ME: Manufacturing Vars Locked : YES
2308 06:44:32.949745 ME: FW Partition Table : OK
2309 06:44:32.952904 ME: Bringup Loader Failure : NO
2310 06:44:32.956270 ME: Firmware Init Complete : YES
2311 06:44:32.959808 ME: Boot Options Present : NO
2312 06:44:32.962965 ME: Update In Progress : NO
2313 06:44:32.969698 ME: D0i3 Support : YES
2314 06:44:32.972933 ME: Low Power State Enabled : NO
2315 06:44:32.975990 ME: CPU Replaced : YES
2316 06:44:32.979473 ME: CPU Replacement Valid : YES
2317 06:44:32.983330 ME: Current Working State : 5
2318 06:44:32.986775 ME: Current Operation State : 1
2319 06:44:32.989513 ME: Current Operation Mode : 0
2320 06:44:32.993510 ME: Error Code : 0
2321 06:44:32.996294 ME: Enhanced Debug Mode : NO
2322 06:44:33.003108 ME: CPU Debug Disabled : YES
2323 06:44:33.006247 ME: TXT Support : NO
2324 06:44:33.009285 ME: WP for RO is enabled : YES
2325 06:44:33.016354 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2326 06:44:33.023045 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2327 06:44:33.026580 Ramoops buffer: 0x100000@0x76899000.
2328 06:44:33.029257 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2329 06:44:33.039835 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2330 06:44:33.042707 CBFS: 'fallback/slic' not found.
2331 06:44:33.045779 ACPI: Writing ACPI tables at 7686d000.
2332 06:44:33.046247 ACPI: * FACS
2333 06:44:33.049713 ACPI: * DSDT
2334 06:44:33.055997 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2335 06:44:33.059417 ACPI: * FADT
2336 06:44:33.059974 SCI is IRQ9
2337 06:44:33.062345 ACPI: added table 1/32, length now 40
2338 06:44:33.065809 ACPI: * SSDT
2339 06:44:33.072413 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2340 06:44:33.075571 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2341 06:44:33.082584 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2342 06:44:33.086384 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2343 06:44:33.092307 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2344 06:44:33.095749 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2345 06:44:33.102411 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2346 06:44:33.109152 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2347 06:44:33.112453 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2348 06:44:33.119074 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2349 06:44:33.122311 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2350 06:44:33.128671 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2351 06:44:33.132464 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2352 06:44:33.139251 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2353 06:44:33.145212 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2354 06:44:33.148966 PS2K: Passing 80 keymaps to kernel
2355 06:44:33.155624 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2356 06:44:33.162165 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2357 06:44:33.168619 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2358 06:44:33.174968 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2359 06:44:33.178622 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2360 06:44:33.185452 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2361 06:44:33.191864 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2362 06:44:33.198879 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2363 06:44:33.205207 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2364 06:44:33.211954 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2365 06:44:33.214865 ACPI: added table 2/32, length now 44
2366 06:44:33.215335 ACPI: * MCFG
2367 06:44:33.221930 ACPI: added table 3/32, length now 48
2368 06:44:33.222486 ACPI: * TPM2
2369 06:44:33.224755 TPM2 log created at 0x7685d000
2370 06:44:33.228550 ACPI: added table 4/32, length now 52
2371 06:44:33.231937 ACPI: * LPIT
2372 06:44:33.235422 ACPI: added table 5/32, length now 56
2373 06:44:33.235977 ACPI: * MADT
2374 06:44:33.238399 SCI is IRQ9
2375 06:44:33.241701 ACPI: added table 6/32, length now 60
2376 06:44:33.245445 cmd_reg from pmc_make_ipc_cmd 1052838
2377 06:44:33.251806 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2378 06:44:33.258476 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2379 06:44:33.265190 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2380 06:44:33.268023 PMC CrashLog size in discovery mode: 0xC00
2381 06:44:33.271816 cpu crashlog bar addr: 0x80640000
2382 06:44:33.274903 cpu discovery table offset: 0x6030
2383 06:44:33.278163 cpu_crashlog_discovery_table buffer count: 0x3
2384 06:44:33.285390 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2385 06:44:33.291568 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2386 06:44:33.298274 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2387 06:44:33.304953 PMC crashLog size in discovery mode : 0xC00
2388 06:44:33.311153 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2389 06:44:33.314879 discover mode PMC crashlog size adjusted to: 0x200
2390 06:44:33.321244 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2391 06:44:33.327984 discover mode PMC crashlog size adjusted to: 0x0
2392 06:44:33.331043 m_cpu_crashLog_size : 0x3480 bytes
2393 06:44:33.331510 CPU crashLog present.
2394 06:44:33.337894 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2395 06:44:33.344361 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2396 06:44:33.347837 current = 76876550
2397 06:44:33.348389 ACPI: * DMAR
2398 06:44:33.350929 ACPI: added table 7/32, length now 64
2399 06:44:33.357903 ACPI: added table 8/32, length now 68
2400 06:44:33.358468 ACPI: * HPET
2401 06:44:33.361094 ACPI: added table 9/32, length now 72
2402 06:44:33.364427 ACPI: done.
2403 06:44:33.365025 ACPI tables: 38528 bytes.
2404 06:44:33.367691 smbios_write_tables: 76857000
2405 06:44:33.371881 EC returned error result code 3
2406 06:44:33.374964 Couldn't obtain OEM name from CBI
2407 06:44:33.378660 Create SMBIOS type 16
2408 06:44:33.381511 Create SMBIOS type 17
2409 06:44:33.385132 Create SMBIOS type 20
2410 06:44:33.385693 GENERIC: 0.0 (WIFI Device)
2411 06:44:33.388929 SMBIOS tables: 2156 bytes.
2412 06:44:33.392074 Writing table forward entry at 0x00000500
2413 06:44:33.398748 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2414 06:44:33.401751 Writing coreboot table at 0x76891000
2415 06:44:33.408373 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2416 06:44:33.415071 1. 0000000000001000-000000000009ffff: RAM
2417 06:44:33.418120 2. 00000000000a0000-00000000000fffff: RESERVED
2418 06:44:33.421377 3. 0000000000100000-0000000076856fff: RAM
2419 06:44:33.427998 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2420 06:44:33.431617 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2421 06:44:33.438065 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2422 06:44:33.444921 7. 0000000077000000-00000000803fffff: RESERVED
2423 06:44:33.448315 8. 00000000c0000000-00000000cfffffff: RESERVED
2424 06:44:33.455086 9. 00000000f8000000-00000000f9ffffff: RESERVED
2425 06:44:33.458181 10. 00000000fb000000-00000000fb000fff: RESERVED
2426 06:44:33.461252 11. 00000000fc800000-00000000fe7fffff: RESERVED
2427 06:44:33.468120 12. 00000000feb00000-00000000feb7ffff: RESERVED
2428 06:44:33.471373 13. 00000000fec00000-00000000fecfffff: RESERVED
2429 06:44:33.478315 14. 00000000fed40000-00000000fed6ffff: RESERVED
2430 06:44:33.481570 15. 00000000fed80000-00000000fed87fff: RESERVED
2431 06:44:33.488244 16. 00000000fed90000-00000000fed92fff: RESERVED
2432 06:44:33.491378 17. 00000000feda0000-00000000feda1fff: RESERVED
2433 06:44:33.497887 18. 00000000fedc0000-00000000feddffff: RESERVED
2434 06:44:33.501244 19. 0000000100000000-000000027fbfffff: RAM
2435 06:44:33.504894 Passing 4 GPIOs to payload:
2436 06:44:33.507855 NAME | PORT | POLARITY | VALUE
2437 06:44:33.514309 lid | undefined | high | high
2438 06:44:33.517912 power | undefined | high | low
2439 06:44:33.524605 oprom | undefined | high | low
2440 06:44:33.531429 EC in RW | 0x00000151 | high | high
2441 06:44:33.531982 Board ID: 3
2442 06:44:33.534885 FW config: 0x131
2443 06:44:33.537965 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 650
2444 06:44:33.541530 coreboot table: 1788 bytes.
2445 06:44:33.544614 IMD ROOT 0. 0x76fff000 0x00001000
2446 06:44:33.551217 IMD SMALL 1. 0x76ffe000 0x00001000
2447 06:44:33.554914 FSP MEMORY 2. 0x76afe000 0x00500000
2448 06:44:33.557860 CONSOLE 3. 0x76ade000 0x00020000
2449 06:44:33.561435 RW MCACHE 4. 0x76add000 0x0000043c
2450 06:44:33.564243 RO MCACHE 5. 0x76adc000 0x00000fd8
2451 06:44:33.567921 FMAP 6. 0x76adb000 0x0000064a
2452 06:44:33.571270 TIME STAMP 7. 0x76ada000 0x00000910
2453 06:44:33.574726 VBOOT WORK 8. 0x76ac6000 0x00014000
2454 06:44:33.578343 MEM INFO 9. 0x76ac5000 0x000003b8
2455 06:44:33.584584 ROMSTG STCK10. 0x76ac4000 0x00001000
2456 06:44:33.588193 AFTER CAR 11. 0x76ab8000 0x0000c000
2457 06:44:33.591215 RAMSTAGE 12. 0x76a2e000 0x0008a000
2458 06:44:33.594819 ACPI BERT 13. 0x76a1e000 0x00010000
2459 06:44:33.597562 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2460 06:44:33.601874 REFCODE 15. 0x769ae000 0x0006f000
2461 06:44:33.605132 SMM BACKUP 16. 0x7699e000 0x00010000
2462 06:44:33.607908 IGD OPREGION17. 0x76999000 0x00004203
2463 06:44:33.614579 RAMOOPS 18. 0x76899000 0x00100000
2464 06:44:33.617954 COREBOOT 19. 0x76891000 0x00008000
2465 06:44:33.621085 ACPI 20. 0x7686d000 0x00024000
2466 06:44:33.624914 TPM2 TCGLOG21. 0x7685d000 0x00010000
2467 06:44:33.628149 PMC CRASHLOG22. 0x7685c000 0x00000c00
2468 06:44:33.631551 CPU CRASHLOG23. 0x76858000 0x00003480
2469 06:44:33.634754 SMBIOS 24. 0x76857000 0x00001000
2470 06:44:33.637928 IMD small region:
2471 06:44:33.641368 IMD ROOT 0. 0x76ffec00 0x00000400
2472 06:44:33.644800 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2473 06:44:33.648023 VPD 2. 0x76ffeb60 0x0000006c
2474 06:44:33.654624 POWER STATE 3. 0x76ffeb00 0x00000044
2475 06:44:33.657891 ROMSTAGE 4. 0x76ffeae0 0x00000004
2476 06:44:33.661323 ACPI GNVS 5. 0x76ffea80 0x00000048
2477 06:44:33.664425 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2478 06:44:33.671449 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2479 06:44:33.674169 MTRR: Physical address space:
2480 06:44:33.681227 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2481 06:44:33.687955 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2482 06:44:33.694728 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2483 06:44:33.698103 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2484 06:44:33.704934 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2485 06:44:33.710887 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2486 06:44:33.717881 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2487 06:44:33.720758 MTRR: Fixed MSR 0x250 0x0606060606060606
2488 06:44:33.727439 MTRR: Fixed MSR 0x258 0x0606060606060606
2489 06:44:33.731039 MTRR: Fixed MSR 0x259 0x0000000000000000
2490 06:44:33.734111 MTRR: Fixed MSR 0x268 0x0606060606060606
2491 06:44:33.737609 MTRR: Fixed MSR 0x269 0x0606060606060606
2492 06:44:33.740908 MTRR: Fixed MSR 0x26a 0x0606060606060606
2493 06:44:33.747709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2494 06:44:33.750967 MTRR: Fixed MSR 0x26c 0x0606060606060606
2495 06:44:33.754064 MTRR: Fixed MSR 0x26d 0x0606060606060606
2496 06:44:33.757644 MTRR: Fixed MSR 0x26e 0x0606060606060606
2497 06:44:33.764405 MTRR: Fixed MSR 0x26f 0x0606060606060606
2498 06:44:33.767457 call enable_fixed_mtrr()
2499 06:44:33.770519 CPU physical address size: 39 bits
2500 06:44:33.773886 MTRR: default type WB/UC MTRR counts: 6/6.
2501 06:44:33.777194 MTRR: UC selected as default type.
2502 06:44:33.784129 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2503 06:44:33.790856 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2504 06:44:33.797778 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2505 06:44:33.804054 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2506 06:44:33.810525 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2507 06:44:33.817313 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2508 06:44:33.820234 MTRR: Fixed MSR 0x250 0x0606060606060606
2509 06:44:33.827180 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 06:44:33.830526 MTRR: Fixed MSR 0x259 0x0000000000000000
2511 06:44:33.833776 MTRR: Fixed MSR 0x268 0x0606060606060606
2512 06:44:33.836949 MTRR: Fixed MSR 0x269 0x0606060606060606
2513 06:44:33.840025 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 06:44:33.846632 MTRR: Fixed MSR 0x26b 0x0606060606060606
2515 06:44:33.850321 MTRR: Fixed MSR 0x26c 0x0606060606060606
2516 06:44:33.853402 MTRR: Fixed MSR 0x26d 0x0606060606060606
2517 06:44:33.857132 MTRR: Fixed MSR 0x26e 0x0606060606060606
2518 06:44:33.863579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2519 06:44:33.866799 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 06:44:33.870077 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 06:44:33.873422 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 06:44:33.879845 MTRR: Fixed MSR 0x250 0x0606060606060606
2523 06:44:33.883522 MTRR: Fixed MSR 0x250 0x0606060606060606
2524 06:44:33.887087 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 06:44:33.890262 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 06:44:33.896631 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 06:44:33.900248 MTRR: Fixed MSR 0x269 0x0606060606060606
2528 06:44:33.903523 MTRR: Fixed MSR 0x26a 0x0606060606060606
2529 06:44:33.906661 MTRR: Fixed MSR 0x26b 0x0606060606060606
2530 06:44:33.910116 MTRR: Fixed MSR 0x26c 0x0606060606060606
2531 06:44:33.916954 MTRR: Fixed MSR 0x26d 0x0606060606060606
2532 06:44:33.920303 MTRR: Fixed MSR 0x26e 0x0606060606060606
2533 06:44:33.923270 MTRR: Fixed MSR 0x26f 0x0606060606060606
2534 06:44:33.927247 MTRR: Fixed MSR 0x258 0x0606060606060606
2535 06:44:33.933529 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 06:44:33.936633 MTRR: Fixed MSR 0x258 0x0606060606060606
2537 06:44:33.940398 MTRR: Fixed MSR 0x259 0x0000000000000000
2538 06:44:33.943320 MTRR: Fixed MSR 0x268 0x0606060606060606
2539 06:44:33.950367 MTRR: Fixed MSR 0x269 0x0606060606060606
2540 06:44:33.953524 MTRR: Fixed MSR 0x259 0x0000000000000000
2541 06:44:33.956666 MTRR: Fixed MSR 0x268 0x0606060606060606
2542 06:44:33.959938 MTRR: Fixed MSR 0x269 0x0606060606060606
2543 06:44:33.966559 MTRR: Fixed MSR 0x26a 0x0606060606060606
2544 06:44:33.970114 MTRR: Fixed MSR 0x26b 0x0606060606060606
2545 06:44:33.972868 MTRR: Fixed MSR 0x26c 0x0606060606060606
2546 06:44:33.976813 MTRR: Fixed MSR 0x26d 0x0606060606060606
2547 06:44:33.980021 MTRR: Fixed MSR 0x26e 0x0606060606060606
2548 06:44:33.986446 MTRR: Fixed MSR 0x26f 0x0606060606060606
2549 06:44:33.990123 MTRR: Fixed MSR 0x258 0x0606060606060606
2550 06:44:33.993221 MTRR: Fixed MSR 0x259 0x0000000000000000
2551 06:44:33.996432 call enable_fixed_mtrr()
2552 06:44:33.999816 call enable_fixed_mtrr()
2553 06:44:34.003063 MTRR: Fixed MSR 0x259 0x0000000000000000
2554 06:44:34.006252 MTRR: Fixed MSR 0x268 0x0606060606060606
2555 06:44:34.009562 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 06:44:34.016330 MTRR: Fixed MSR 0x26a 0x0606060606060606
2557 06:44:34.019597 MTRR: Fixed MSR 0x26b 0x0606060606060606
2558 06:44:34.022948 MTRR: Fixed MSR 0x26c 0x0606060606060606
2559 06:44:34.026562 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 06:44:34.032715 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 06:44:34.036157 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 06:44:34.039348 CPU physical address size: 39 bits
2563 06:44:34.043216 call enable_fixed_mtrr()
2564 06:44:34.046181 MTRR: Fixed MSR 0x26a 0x0606060606060606
2565 06:44:34.049538 MTRR: Fixed MSR 0x250 0x0606060606060606
2566 06:44:34.052945 MTRR: Fixed MSR 0x26b 0x0606060606060606
2567 06:44:34.059368 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 06:44:34.062880 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 06:44:34.066310 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 06:44:34.069262 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 06:44:34.072435 call enable_fixed_mtrr()
2572 06:44:34.076298 CPU physical address size: 39 bits
2573 06:44:34.079159 CPU physical address size: 39 bits
2574 06:44:34.083142 call enable_fixed_mtrr()
2575 06:44:34.085788 MTRR: Fixed MSR 0x268 0x0606060606060606
2576 06:44:34.089434 MTRR: Fixed MSR 0x269 0x0606060606060606
2577 06:44:34.096362 MTRR: Fixed MSR 0x26a 0x0606060606060606
2578 06:44:34.099482 MTRR: Fixed MSR 0x26b 0x0606060606060606
2579 06:44:34.102553 MTRR: Fixed MSR 0x26c 0x0606060606060606
2580 06:44:34.105978 MTRR: Fixed MSR 0x26d 0x0606060606060606
2581 06:44:34.112679 MTRR: Fixed MSR 0x26e 0x0606060606060606
2582 06:44:34.116162 MTRR: Fixed MSR 0x26f 0x0606060606060606
2583 06:44:34.119145 CPU physical address size: 39 bits
2584 06:44:34.122477 call enable_fixed_mtrr()
2585 06:44:34.125978 CPU physical address size: 39 bits
2586 06:44:34.129163 CPU physical address size: 39 bits
2587 06:44:34.132674 MTRR: Fixed MSR 0x258 0x0606060606060606
2588 06:44:34.136120 MTRR: Fixed MSR 0x259 0x0000000000000000
2589 06:44:34.139365 MTRR: Fixed MSR 0x268 0x0606060606060606
2590 06:44:34.145545 MTRR: Fixed MSR 0x269 0x0606060606060606
2591 06:44:34.149019 MTRR: Fixed MSR 0x26a 0x0606060606060606
2592 06:44:34.152398 MTRR: Fixed MSR 0x26b 0x0606060606060606
2593 06:44:34.155691 MTRR: Fixed MSR 0x26c 0x0606060606060606
2594 06:44:34.162505 MTRR: Fixed MSR 0x26d 0x0606060606060606
2595 06:44:34.165702 MTRR: Fixed MSR 0x26e 0x0606060606060606
2596 06:44:34.168908 MTRR: Fixed MSR 0x26f 0x0606060606060606
2597 06:44:34.172355 call enable_fixed_mtrr()
2598 06:44:34.175672 CPU physical address size: 39 bits
2599 06:44:34.180125
2600 06:44:34.180679 MTRR check
2601 06:44:34.183788 Fixed MTRRs : Enabled
2602 06:44:34.184352 Variable MTRRs: Enabled
2603 06:44:34.184718
2604 06:44:34.190422 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2605 06:44:34.193578 Checking cr50 for pending updates
2606 06:44:34.206226 Reading cr50 TPM mode
2607 06:44:34.221049 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2608 06:44:34.231254 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2609 06:44:34.234265 Checking segment from ROM address 0xf96cbe6c
2610 06:44:34.237714 Checking segment from ROM address 0xf96cbe88
2611 06:44:34.244666 Loading segment from ROM address 0xf96cbe6c
2612 06:44:34.245259 code (compression=1)
2613 06:44:34.254454 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2614 06:44:34.261132 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2615 06:44:34.264227 using LZMA
2616 06:44:34.287766 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2617 06:44:34.294397 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2618 06:44:34.302693 Loading segment from ROM address 0xf96cbe88
2619 06:44:34.305721 Entry Point 0x30000000
2620 06:44:34.306183 Loaded segments
2621 06:44:34.312036 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2622 06:44:34.319339 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2623 06:44:34.322398 Finalizing chipset.
2624 06:44:34.322863 apm_control: Finalizing SMM.
2625 06:44:34.326165 APMC done.
2626 06:44:34.329418 HECI: CSE device 16.1 is disabled
2627 06:44:34.332175 HECI: CSE device 16.2 is disabled
2628 06:44:34.335317 HECI: CSE device 16.3 is disabled
2629 06:44:34.339203 HECI: CSE device 16.4 is disabled
2630 06:44:34.342575 HECI: CSE device 16.5 is disabled
2631 06:44:34.345906 HECI: Sending End-of-Post
2632 06:44:34.353786 CSE: EOP requested action: continue boot
2633 06:44:34.357035 CSE EOP successful, continuing boot
2634 06:44:34.363994 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2635 06:44:34.367030 mp_park_aps done after 0 msecs.
2636 06:44:34.370295 Jumping to boot code at 0x30000000(0x76891000)
2637 06:44:34.380723 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2638 06:44:34.384532
2639 06:44:34.385160
2640 06:44:34.385537
2641 06:44:34.387739 Starting depthcharge on Volmar...
2642 06:44:34.388221
2643 06:44:34.390084 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2644 06:44:34.390637 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2645 06:44:34.391244 Setting prompt string to ['brya:']
2646 06:44:34.391702 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2647 06:44:34.394652 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2648 06:44:34.395222
2649 06:44:34.400795 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2650 06:44:34.401310
2651 06:44:34.407750 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2652 06:44:34.408313
2653 06:44:34.411078 configure_storage: Failed to remap 1C:2
2654 06:44:34.411542
2655 06:44:34.414180 Wipe memory regions:
2656 06:44:34.414642
2657 06:44:34.417633 [0x00000000001000, 0x000000000a0000)
2658 06:44:34.418096
2659 06:44:34.420915 [0x00000000100000, 0x00000030000000)
2660 06:44:34.529807
2661 06:44:34.532888 [0x00000032668e60, 0x00000076857000)
2662 06:44:34.685056
2663 06:44:34.688526 [0x00000100000000, 0x0000027fc00000)
2664 06:44:35.542250
2665 06:44:35.545610 ec_init: CrosEC protocol v3 supported (256, 256)
2666 06:44:36.153493
2667 06:44:36.154020 R8152: Initializing
2668 06:44:36.154386
2669 06:44:36.156665 Version 9 (ocp_data = 6010)
2670 06:44:36.157177
2671 06:44:36.159951 R8152: Done initializing
2672 06:44:36.160458
2673 06:44:36.163022 Adding net device
2674 06:44:36.463687
2675 06:44:36.467285 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2676 06:44:36.467375
2677 06:44:36.467440
2678 06:44:36.467500
2679 06:44:36.467782 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2681 06:44:36.568198 brya: tftpboot 192.168.201.1 12434509/tftp-deploy-u45h3z7v/kernel/bzImage 12434509/tftp-deploy-u45h3z7v/kernel/cmdline 12434509/tftp-deploy-u45h3z7v/ramdisk/ramdisk.cpio.gz
2682 06:44:36.568352 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2683 06:44:36.568433 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2684 06:44:36.572919 tftpboot 192.168.201.1 12434509/tftp-deploy-u45h3z7v/kernel/bzImploy-u45h3z7v/kernel/cmdline 12434509/tftp-deploy-u45h3z7v/ramdisk/ramdisk.cpio.gz
2685 06:44:36.573041
2686 06:44:36.573108 Waiting for link
2687 06:44:36.775930
2688 06:44:36.776493 done.
2689 06:44:36.776861
2690 06:44:36.777261 MAC: 00:e0:4c:68:05:c6
2691 06:44:36.777598
2692 06:44:36.779017 Sending DHCP discover... done.
2693 06:44:36.779475
2694 06:44:36.782405 Waiting for reply... done.
2695 06:44:36.782867
2696 06:44:36.786658 Sending DHCP request... done.
2697 06:44:36.787312
2698 06:44:36.792184 Waiting for reply... done.
2699 06:44:36.792657
2700 06:44:36.793066 My ip is 192.168.201.17
2701 06:44:36.793417
2702 06:44:36.795898 The DHCP server ip is 192.168.201.1
2703 06:44:36.799039
2704 06:44:36.801999 TFTP server IP predefined by user: 192.168.201.1
2705 06:44:36.802464
2706 06:44:36.809227 Bootfile predefined by user: 12434509/tftp-deploy-u45h3z7v/kernel/bzImage
2707 06:44:36.809760
2708 06:44:36.812204 Sending tftp read request... done.
2709 06:44:36.812660
2710 06:44:36.821654 Waiting for the transfer...
2711 06:44:36.822208
2712 06:44:37.094741 00000000 ################################################################
2713 06:44:37.094903
2714 06:44:37.344602 00080000 ################################################################
2715 06:44:37.344740
2716 06:44:37.657760 00100000 ################################################################
2717 06:44:37.657911
2718 06:44:38.016035 00180000 ################################################################
2719 06:44:38.016181
2720 06:44:38.373724 00200000 ################################################################
2721 06:44:38.373872
2722 06:44:38.724438 00280000 ################################################################
2723 06:44:38.724588
2724 06:44:38.999841 00300000 ################################################################
2725 06:44:38.999971
2726 06:44:39.272534 00380000 ################################################################
2727 06:44:39.272668
2728 06:44:39.545807 00400000 ################################################################
2729 06:44:39.545973
2730 06:44:39.820590 00480000 ################################################################
2731 06:44:39.820719
2732 06:44:40.090798 00500000 ################################################################
2733 06:44:40.090932
2734 06:44:40.358840 00580000 ################################################################
2735 06:44:40.358982
2736 06:44:40.631991 00600000 ################################################################
2737 06:44:40.632137
2738 06:44:40.889648 00680000 ################################################################
2739 06:44:40.889779
2740 06:44:41.157152 00700000 ################################################################
2741 06:44:41.157294
2742 06:44:41.404611 00780000 ################################################################
2743 06:44:41.404751
2744 06:44:41.494819 00800000 ####################### done.
2745 06:44:41.494949
2746 06:44:41.498035 The bootfile was 8576912 bytes long.
2747 06:44:41.498125
2748 06:44:41.501746 Sending tftp read request... done.
2749 06:44:41.501912
2750 06:44:41.504545 Waiting for the transfer...
2751 06:44:41.504720
2752 06:44:41.812013 00000000 ################################################################
2753 06:44:41.812163
2754 06:44:42.112310 00080000 ################################################################
2755 06:44:42.112435
2756 06:44:42.414917 00100000 ################################################################
2757 06:44:42.415044
2758 06:44:42.671316 00180000 ################################################################
2759 06:44:42.671450
2760 06:44:42.939614 00200000 ################################################################
2761 06:44:42.939746
2762 06:44:43.286164 00280000 ################################################################
2763 06:44:43.286310
2764 06:44:43.647231 00300000 ################################################################
2765 06:44:43.647380
2766 06:44:44.008860 00380000 ################################################################
2767 06:44:44.009065
2768 06:44:44.279271 00400000 ################################################################
2769 06:44:44.279409
2770 06:44:44.532937 00480000 ################################################################
2771 06:44:44.533073
2772 06:44:44.787854 00500000 ################################################################ done.
2773 06:44:44.788340
2774 06:44:44.791020 Sending tftp read request... done.
2775 06:44:44.791436
2776 06:44:44.794455 Waiting for the transfer...
2777 06:44:44.794915
2778 06:44:44.795275 00000000 # done.
2779 06:44:44.795646
2780 06:44:44.804690 Command line loaded dynamically from TFTP file: 12434509/tftp-deploy-u45h3z7v/kernel/cmdline
2781 06:44:44.805354
2782 06:44:44.827691 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12434509/extract-nfsrootfs-6rsoakfb,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2783 06:44:44.835169
2784 06:44:44.838567 Shutting down all USB controllers.
2785 06:44:44.839124
2786 06:44:44.839484 Removing current net device
2787 06:44:44.839821
2788 06:44:44.841755 Finalizing coreboot
2789 06:44:44.842214
2790 06:44:44.848685 Exiting depthcharge with code 4 at timestamp: 20743562
2791 06:44:44.849296
2792 06:44:44.849665
2793 06:44:44.850000 Starting kernel ...
2794 06:44:44.850318
2795 06:44:44.850630
2796 06:44:44.851856 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2797 06:44:44.852370 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2798 06:44:44.852766 Setting prompt string to ['Linux version [0-9]']
2799 06:44:44.853174 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2800 06:44:44.853545 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2802 06:49:14.853442 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2804 06:49:14.854517 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2806 06:49:14.855665 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2809 06:49:14.857200 end: 2 depthcharge-action (duration 00:05:00) [common]
2811 06:49:14.858352 Cleaning after the job
2812 06:49:14.858482 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/ramdisk
2813 06:49:14.859363 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/kernel
2814 06:49:14.860770 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/nfsrootfs
2815 06:49:14.937605 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434509/tftp-deploy-u45h3z7v/modules
2816 06:49:14.938064 start: 5.1 power-off (timeout 00:00:30) [common]
2817 06:49:14.938233 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2818 06:49:15.021336 >> Command sent successfully.
2819 06:49:15.032818 Returned 0 in 0 seconds
2820 06:49:15.134160 end: 5.1 power-off (duration 00:00:00) [common]
2822 06:49:15.135644 start: 5.2 read-feedback (timeout 00:10:00) [common]
2823 06:49:15.136925 Listened to connection for namespace 'common' for up to 1s
2825 06:49:15.138311 Listened to connection for namespace 'common' for up to 1s
2826 06:49:16.137047 Finalising connection for namespace 'common'
2827 06:49:16.137231 Disconnecting from shell: Finalise
2828 06:49:16.137317
2829 06:49:16.237985 end: 5.2 read-feedback (duration 00:00:01) [common]
2830 06:49:16.238638 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12434509
2831 06:49:16.547327 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12434509
2832 06:49:16.547519 JobError: Your job cannot terminate cleanly.