Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 06:50:33.630408 lava-dispatcher, installed at version: 2023.10
2 06:50:33.630652 start: 0 validate
3 06:50:33.630808 Start time: 2024-01-03 06:50:33.630799+00:00 (UTC)
4 06:50:33.630940 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:50:33.631095 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 06:50:33.898553 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:50:33.898736 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:50:34.164799 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:50:34.164985 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:50:34.434636 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:50:34.434841 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 06:50:34.702101 validate duration: 1.07
14 06:50:34.702417 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:50:34.702550 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:50:34.702700 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:50:34.702878 Not decompressing ramdisk as can be used compressed.
18 06:50:34.702990 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 06:50:34.703072 saving as /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/ramdisk/initrd.cpio.gz
20 06:50:34.703151 total size: 5671549 (5 MB)
21 06:50:34.704424 progress 0 % (0 MB)
22 06:50:34.706520 progress 5 % (0 MB)
23 06:50:34.708628 progress 10 % (0 MB)
24 06:50:34.710567 progress 15 % (0 MB)
25 06:50:34.712733 progress 20 % (1 MB)
26 06:50:34.715017 progress 25 % (1 MB)
27 06:50:34.717049 progress 30 % (1 MB)
28 06:50:34.719268 progress 35 % (1 MB)
29 06:50:34.721435 progress 40 % (2 MB)
30 06:50:34.723358 progress 45 % (2 MB)
31 06:50:34.725475 progress 50 % (2 MB)
32 06:50:34.727619 progress 55 % (3 MB)
33 06:50:34.729519 progress 60 % (3 MB)
34 06:50:34.731642 progress 65 % (3 MB)
35 06:50:34.733657 progress 70 % (3 MB)
36 06:50:34.735339 progress 75 % (4 MB)
37 06:50:34.737221 progress 80 % (4 MB)
38 06:50:34.739053 progress 85 % (4 MB)
39 06:50:34.740748 progress 90 % (4 MB)
40 06:50:34.742536 progress 95 % (5 MB)
41 06:50:34.744354 progress 100 % (5 MB)
42 06:50:34.744480 5 MB downloaded in 0.04 s (130.87 MB/s)
43 06:50:34.744672 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:50:34.744944 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:50:34.745050 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:50:34.745152 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:50:34.745305 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 06:50:34.745386 saving as /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/kernel/bzImage
50 06:50:34.745453 total size: 8576912 (8 MB)
51 06:50:34.745519 No compression specified
52 06:50:34.746740 progress 0 % (0 MB)
53 06:50:34.749493 progress 5 % (0 MB)
54 06:50:34.752155 progress 10 % (0 MB)
55 06:50:34.754786 progress 15 % (1 MB)
56 06:50:34.757474 progress 20 % (1 MB)
57 06:50:34.760143 progress 25 % (2 MB)
58 06:50:34.762762 progress 30 % (2 MB)
59 06:50:34.765398 progress 35 % (2 MB)
60 06:50:34.768017 progress 40 % (3 MB)
61 06:50:34.770659 progress 45 % (3 MB)
62 06:50:34.773418 progress 50 % (4 MB)
63 06:50:34.776135 progress 55 % (4 MB)
64 06:50:34.778992 progress 60 % (4 MB)
65 06:50:34.781724 progress 65 % (5 MB)
66 06:50:34.784354 progress 70 % (5 MB)
67 06:50:34.786999 progress 75 % (6 MB)
68 06:50:34.789709 progress 80 % (6 MB)
69 06:50:34.792310 progress 85 % (6 MB)
70 06:50:34.794893 progress 90 % (7 MB)
71 06:50:34.797587 progress 95 % (7 MB)
72 06:50:34.800194 progress 100 % (8 MB)
73 06:50:34.800475 8 MB downloaded in 0.06 s (148.67 MB/s)
74 06:50:34.800687 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:50:34.801097 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:50:34.801231 start: 1.3 download-retry (timeout 00:10:00) [common]
78 06:50:34.801369 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 06:50:34.801553 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 06:50:34.801658 saving as /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/nfsrootfs/full.rootfs.tar
81 06:50:34.801756 total size: 126031368 (120 MB)
82 06:50:34.801867 Using unxz to decompress xz
83 06:50:34.806389 progress 0 % (0 MB)
84 06:50:35.344904 progress 5 % (6 MB)
85 06:50:35.888698 progress 10 % (12 MB)
86 06:50:36.438933 progress 15 % (18 MB)
87 06:50:37.007504 progress 20 % (24 MB)
88 06:50:37.389275 progress 25 % (30 MB)
89 06:50:37.765867 progress 30 % (36 MB)
90 06:50:38.060606 progress 35 % (42 MB)
91 06:50:38.263447 progress 40 % (48 MB)
92 06:50:38.673635 progress 45 % (54 MB)
93 06:50:39.084721 progress 50 % (60 MB)
94 06:50:39.459725 progress 55 % (66 MB)
95 06:50:39.854631 progress 60 % (72 MB)
96 06:50:40.228118 progress 65 % (78 MB)
97 06:50:40.656132 progress 70 % (84 MB)
98 06:50:41.115710 progress 75 % (90 MB)
99 06:50:41.574916 progress 80 % (96 MB)
100 06:50:41.684523 progress 85 % (102 MB)
101 06:50:41.856344 progress 90 % (108 MB)
102 06:50:42.226782 progress 95 % (114 MB)
103 06:50:42.637679 progress 100 % (120 MB)
104 06:50:42.643080 120 MB downloaded in 7.84 s (15.33 MB/s)
105 06:50:42.643363 end: 1.3.1 http-download (duration 00:00:08) [common]
107 06:50:42.643683 end: 1.3 download-retry (duration 00:00:08) [common]
108 06:50:42.643787 start: 1.4 download-retry (timeout 00:09:52) [common]
109 06:50:42.643887 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 06:50:42.644071 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 06:50:42.644152 saving as /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/modules/modules.tar
112 06:50:42.644222 total size: 250972 (0 MB)
113 06:50:42.644309 Using unxz to decompress xz
114 06:50:42.648893 progress 13 % (0 MB)
115 06:50:42.649366 progress 26 % (0 MB)
116 06:50:42.649645 progress 39 % (0 MB)
117 06:50:42.651503 progress 52 % (0 MB)
118 06:50:42.653631 progress 65 % (0 MB)
119 06:50:42.655718 progress 78 % (0 MB)
120 06:50:42.657698 progress 91 % (0 MB)
121 06:50:42.659841 progress 100 % (0 MB)
122 06:50:42.665783 0 MB downloaded in 0.02 s (11.10 MB/s)
123 06:50:42.666048 end: 1.4.1 http-download (duration 00:00:00) [common]
125 06:50:42.666362 end: 1.4 download-retry (duration 00:00:00) [common]
126 06:50:42.666473 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 06:50:42.666584 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 06:50:45.988199 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12434513/extract-nfsrootfs-zgn172n2
129 06:50:45.988456 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 06:50:45.988566 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 06:50:45.988744 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq
132 06:50:45.988889 makedir: /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin
133 06:50:45.989001 makedir: /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/tests
134 06:50:45.989111 makedir: /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/results
135 06:50:45.989222 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-add-keys
136 06:50:45.989382 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-add-sources
137 06:50:45.989541 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-background-process-start
138 06:50:45.989692 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-background-process-stop
139 06:50:45.989843 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-common-functions
140 06:50:45.989982 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-echo-ipv4
141 06:50:45.990123 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-install-packages
142 06:50:45.990260 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-installed-packages
143 06:50:45.990402 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-os-build
144 06:50:45.990541 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-probe-channel
145 06:50:45.990681 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-probe-ip
146 06:50:45.990821 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-target-ip
147 06:50:45.990958 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-target-mac
148 06:50:45.991095 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-target-storage
149 06:50:45.991234 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-case
150 06:50:45.991373 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-event
151 06:50:45.991509 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-feedback
152 06:50:45.991645 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-raise
153 06:50:45.991781 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-reference
154 06:50:45.991919 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-runner
155 06:50:45.992060 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-set
156 06:50:45.992196 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-test-shell
157 06:50:45.992489 Updating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-install-packages (oe)
158 06:50:45.992661 Updating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/bin/lava-installed-packages (oe)
159 06:50:45.992798 Creating /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/environment
160 06:50:45.992904 LAVA metadata
161 06:50:45.992982 - LAVA_JOB_ID=12434513
162 06:50:45.993051 - LAVA_DISPATCHER_IP=192.168.201.1
163 06:50:45.993161 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 06:50:45.993234 skipped lava-vland-overlay
165 06:50:45.993316 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 06:50:45.993404 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 06:50:45.993470 skipped lava-multinode-overlay
168 06:50:45.993550 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 06:50:45.993633 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 06:50:45.993711 Loading test definitions
171 06:50:45.993808 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
172 06:50:45.993915 Using /lava-12434513 at stage 0
173 06:50:45.994108 Fetching tests from https://github.com/kernelci/test-definitions
174 06:50:45.994193 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/0/tests/0_ltp-ipc'
175 06:50:49.393596 Running '/usr/bin/git checkout kernelci.org
176 06:50:49.556920 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 06:50:49.557800 uuid=12434513_1.5.2.3.1 testdef=None
178 06:50:49.557982 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 06:50:49.558284 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
181 06:50:49.559226 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 06:50:49.559534 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
184 06:50:49.560773 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 06:50:49.561082 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
187 06:50:49.562262 runner path: /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/0/tests/0_ltp-ipc test_uuid 12434513_1.5.2.3.1
188 06:50:49.562375 SKIPFILE='skipfile-lkft.yaml'
189 06:50:49.562462 SKIP_INSTALL='true'
190 06:50:49.562554 TST_CMDFILES='ipc'
191 06:50:49.562782 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 06:50:49.563140 Creating lava-test-runner.conf files
194 06:50:49.563237 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434513/lava-overlay-f0eirigq/lava-12434513/0 for stage 0
195 06:50:49.563374 - 0_ltp-ipc
196 06:50:49.563536 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
197 06:50:49.563656 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
198 06:50:57.959284 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 06:50:57.959468 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
200 06:50:57.959592 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 06:50:57.959728 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
202 06:50:57.959852 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
203 06:50:58.117994 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 06:50:58.118445 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
205 06:50:58.118604 extracting modules file /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434513/extract-nfsrootfs-zgn172n2
206 06:50:58.133803 extracting modules file /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434513/extract-overlay-ramdisk-8ymsuorb/ramdisk
207 06:50:58.149038 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 06:50:58.149185 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
209 06:50:58.149296 [common] Applying overlay to NFS
210 06:50:58.149391 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434513/compress-overlay-cmo6xot3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12434513/extract-nfsrootfs-zgn172n2
211 06:50:59.180389 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 06:50:59.180561 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
213 06:50:59.180666 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 06:50:59.180769 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
215 06:50:59.180859 Building ramdisk /var/lib/lava/dispatcher/tmp/12434513/extract-overlay-ramdisk-8ymsuorb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12434513/extract-overlay-ramdisk-8ymsuorb/ramdisk
216 06:50:59.261398 >> 27178 blocks
217 06:50:59.878524 rename /var/lib/lava/dispatcher/tmp/12434513/extract-overlay-ramdisk-8ymsuorb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/ramdisk/ramdisk.cpio.gz
218 06:50:59.879032 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 06:50:59.879169 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
220 06:50:59.879285 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
221 06:50:59.879391 No mkimage arch provided, not using FIT.
222 06:50:59.879494 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 06:50:59.879590 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 06:50:59.879707 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
225 06:50:59.879814 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
226 06:50:59.879905 No LXC device requested
227 06:50:59.879999 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 06:50:59.880104 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
229 06:50:59.880202 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 06:50:59.880292 Checking files for TFTP limit of 4294967296 bytes.
231 06:50:59.880745 end: 1 tftp-deploy (duration 00:00:25) [common]
232 06:50:59.880862 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 06:50:59.880965 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 06:50:59.881106 substitutions:
235 06:50:59.881182 - {DTB}: None
236 06:50:59.881250 - {INITRD}: 12434513/tftp-deploy-3at_gv9c/ramdisk/ramdisk.cpio.gz
237 06:50:59.881319 - {KERNEL}: 12434513/tftp-deploy-3at_gv9c/kernel/bzImage
238 06:50:59.881385 - {LAVA_MAC}: None
239 06:50:59.881448 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12434513/extract-nfsrootfs-zgn172n2
240 06:50:59.881514 - {NFS_SERVER_IP}: 192.168.201.1
241 06:50:59.881577 - {PRESEED_CONFIG}: None
242 06:50:59.881638 - {PRESEED_LOCAL}: None
243 06:50:59.881699 - {RAMDISK}: 12434513/tftp-deploy-3at_gv9c/ramdisk/ramdisk.cpio.gz
244 06:50:59.881761 - {ROOT_PART}: None
245 06:50:59.881822 - {ROOT}: None
246 06:50:59.881883 - {SERVER_IP}: 192.168.201.1
247 06:50:59.881943 - {TEE}: None
248 06:50:59.882004 Parsed boot commands:
249 06:50:59.882064 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 06:50:59.882261 Parsed boot commands: tftpboot 192.168.201.1 12434513/tftp-deploy-3at_gv9c/kernel/bzImage 12434513/tftp-deploy-3at_gv9c/kernel/cmdline 12434513/tftp-deploy-3at_gv9c/ramdisk/ramdisk.cpio.gz
251 06:50:59.882362 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 06:50:59.882460 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 06:50:59.882560 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 06:50:59.882655 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 06:50:59.882732 Not connected, no need to disconnect.
256 06:50:59.882813 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 06:50:59.882900 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 06:50:59.882974 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
259 06:50:59.887192 Setting prompt string to ['lava-test: # ']
260 06:50:59.887592 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 06:50:59.887710 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 06:50:59.887820 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 06:50:59.887917 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 06:50:59.888132 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
265 06:51:05.035632 >> Command sent successfully.
266 06:51:05.046903 Returned 0 in 5 seconds
267 06:51:05.148186 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 06:51:05.149758 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 06:51:05.150275 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 06:51:05.150724 Setting prompt string to 'Starting depthcharge on Helios...'
272 06:51:05.151072 Changing prompt to 'Starting depthcharge on Helios...'
273 06:51:05.151528 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 06:51:05.153189 [Enter `^Ec?' for help]
275 06:51:05.823577
276 06:51:05.824439
277 06:51:05.833766 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 06:51:05.836569 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 06:51:05.843330 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 06:51:05.846677 CPU: AES supported, TXT NOT supported, VT supported
281 06:51:05.853358 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 06:51:05.856308 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 06:51:05.863421 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 06:51:05.867117 VBOOT: Loading verstage.
285 06:51:05.870159 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 06:51:05.876700 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 06:51:05.879718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 06:51:05.883742 CBFS @ c08000 size 3f8000
289 06:51:05.889893 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 06:51:05.892916 CBFS: Locating 'fallback/verstage'
291 06:51:05.896858 CBFS: Found @ offset 10fb80 size 1072c
292 06:51:05.900196
293 06:51:05.900775
294 06:51:05.910168 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 06:51:05.923801 Probing TPM: . done!
296 06:51:05.927407 TPM ready after 0 ms
297 06:51:05.931027 Connected to device vid:did:rid of 1ae0:0028:00
298 06:51:05.941030 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
299 06:51:05.944552 Initialized TPM device CR50 revision 0
300 06:51:05.990118 tlcl_send_startup: Startup return code is 0
301 06:51:05.990634 TPM: setup succeeded
302 06:51:06.002861 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 06:51:06.006396 Chrome EC: UHEPI supported
304 06:51:06.009843 Phase 1
305 06:51:06.013424 FMAP: area GBB found @ c05000 (12288 bytes)
306 06:51:06.019441 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 06:51:06.020010 Phase 2
308 06:51:06.022885 Phase 3
309 06:51:06.026391 FMAP: area GBB found @ c05000 (12288 bytes)
310 06:51:06.032787 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 06:51:06.039813 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 06:51:06.042778 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 06:51:06.049326 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 06:51:06.064815 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 06:51:06.067739 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 06:51:06.074502 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 06:51:06.078961 Phase 4
318 06:51:06.082180 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
319 06:51:06.088736 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 06:51:06.268585 VB2:vb2_rsa_verify_digest() Digest check failed!
321 06:51:06.275579 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 06:51:06.276016 Saving nvdata
323 06:51:06.278754 Reboot requested (10020007)
324 06:51:06.281937 board_reset() called!
325 06:51:06.282390 full_reset() called!
326 06:51:10.789761
327 06:51:10.790282
328 06:51:10.799817 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 06:51:10.803301 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 06:51:10.810028 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 06:51:10.813002 CPU: AES supported, TXT NOT supported, VT supported
332 06:51:10.819951 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 06:51:10.823126 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 06:51:10.829927 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 06:51:10.833557 VBOOT: Loading verstage.
336 06:51:10.836227 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 06:51:10.843249 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 06:51:10.846873 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 06:51:10.849889 CBFS @ c08000 size 3f8000
340 06:51:10.856311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 06:51:10.859843 CBFS: Locating 'fallback/verstage'
342 06:51:10.862796 CBFS: Found @ offset 10fb80 size 1072c
343 06:51:10.866745
344 06:51:10.867266
345 06:51:10.876442 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 06:51:10.890789 Probing TPM: . done!
347 06:51:10.893948 TPM ready after 0 ms
348 06:51:10.897496 Connected to device vid:did:rid of 1ae0:0028:00
349 06:51:10.907915 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
350 06:51:10.911415 Initialized TPM device CR50 revision 0
351 06:51:10.956891 tlcl_send_startup: Startup return code is 0
352 06:51:10.957422 TPM: setup succeeded
353 06:51:10.970137 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 06:51:10.973619 Chrome EC: UHEPI supported
355 06:51:10.976635 Phase 1
356 06:51:10.980680 FMAP: area GBB found @ c05000 (12288 bytes)
357 06:51:10.986660 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 06:51:10.993275 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 06:51:10.996968 Recovery requested (1009000e)
360 06:51:11.002634 Saving nvdata
361 06:51:11.008726 tlcl_extend: response is 0
362 06:51:11.017455 tlcl_extend: response is 0
363 06:51:11.024479 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 06:51:11.027777 CBFS @ c08000 size 3f8000
365 06:51:11.034796 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 06:51:11.037577 CBFS: Locating 'fallback/romstage'
367 06:51:11.040714 CBFS: Found @ offset 80 size 145fc
368 06:51:11.044462 Accumulated console time in verstage 98 ms
369 06:51:11.044889
370 06:51:11.045226
371 06:51:11.057773 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 06:51:11.064535 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 06:51:11.067769 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 06:51:11.071225 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 06:51:11.078347 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 06:51:11.081123 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 06:51:11.084226 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
378 06:51:11.087417 TCO_STS: 0000 0000
379 06:51:11.090798 GEN_PMCON: e0015238 00000200
380 06:51:11.094430 GBLRST_CAUSE: 00000000 00000000
381 06:51:11.094993 prev_sleep_state 5
382 06:51:11.097785 Boot Count incremented to 67990
383 06:51:11.104285 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 06:51:11.107565 CBFS @ c08000 size 3f8000
385 06:51:11.113839 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 06:51:11.114285 CBFS: Locating 'fspm.bin'
387 06:51:11.117267 CBFS: Found @ offset 5ffc0 size 71000
388 06:51:11.122040 Chrome EC: UHEPI supported
389 06:51:11.128996 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 06:51:11.134476 Probing TPM: done!
391 06:51:11.140999 Connected to device vid:did:rid of 1ae0:0028:00
392 06:51:11.151105 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
393 06:51:11.156653 Initialized TPM device CR50 revision 0
394 06:51:11.165793 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 06:51:11.172912 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 06:51:11.175121 MRC cache found, size 1948
397 06:51:11.179554 bootmode is set to: 2
398 06:51:11.181991 PRMRR disabled by config.
399 06:51:11.182419 SPD INDEX = 1
400 06:51:11.188780 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 06:51:11.192484 CBFS @ c08000 size 3f8000
402 06:51:11.198586 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 06:51:11.199013 CBFS: Locating 'spd.bin'
404 06:51:11.202392 CBFS: Found @ offset 5fb80 size 400
405 06:51:11.205238 SPD: module type is LPDDR3
406 06:51:11.208719 SPD: module part is
407 06:51:11.215756 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 06:51:11.219105 SPD: device width 4 bits, bus width 8 bits
409 06:51:11.222179 SPD: module size is 4096 MB (per channel)
410 06:51:11.225262 memory slot: 0 configuration done.
411 06:51:11.228832 memory slot: 2 configuration done.
412 06:51:11.280520 CBMEM:
413 06:51:11.283359 IMD: root @ 99fff000 254 entries.
414 06:51:11.286861 IMD: root @ 99ffec00 62 entries.
415 06:51:11.290573 External stage cache:
416 06:51:11.293739 IMD: root @ 9abff000 254 entries.
417 06:51:11.296530 IMD: root @ 9abfec00 62 entries.
418 06:51:11.299978 Chrome EC: clear events_b mask to 0x0000000020004000
419 06:51:11.316069 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 06:51:11.329799 tlcl_write: response is 0
421 06:51:11.338449 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 06:51:11.345245 MRC: TPM MRC hash updated successfully.
423 06:51:11.345786 2 DIMMs found
424 06:51:11.348317 SMM Memory Map
425 06:51:11.351831 SMRAM : 0x9a000000 0x1000000
426 06:51:11.354650 Subregion 0: 0x9a000000 0xa00000
427 06:51:11.358355 Subregion 1: 0x9aa00000 0x200000
428 06:51:11.361512 Subregion 2: 0x9ac00000 0x400000
429 06:51:11.365177 top_of_ram = 0x9a000000
430 06:51:11.368732 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 06:51:11.375449 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 06:51:11.378519 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 06:51:11.385324 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 06:51:11.388472 CBFS @ c08000 size 3f8000
435 06:51:11.391747 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 06:51:11.395615 CBFS: Locating 'fallback/postcar'
437 06:51:11.398337 CBFS: Found @ offset 107000 size 4b44
438 06:51:11.405136 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 06:51:11.417158 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 06:51:11.420403 Processing 180 relocs. Offset value of 0x97c0c000
441 06:51:11.428849 Accumulated console time in romstage 286 ms
442 06:51:11.429372
443 06:51:11.429712
444 06:51:11.439070 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 06:51:11.445439 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 06:51:11.448831 CBFS @ c08000 size 3f8000
447 06:51:11.452446 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 06:51:11.455255 CBFS: Locating 'fallback/ramstage'
449 06:51:11.462247 CBFS: Found @ offset 43380 size 1b9e8
450 06:51:11.469147 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 06:51:11.500491 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 06:51:11.504416 Processing 3976 relocs. Offset value of 0x98db0000
453 06:51:11.510612 Accumulated console time in postcar 52 ms
454 06:51:11.511169
455 06:51:11.511513
456 06:51:11.520342 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 06:51:11.527042 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 06:51:11.530324 WARNING: RO_VPD is uninitialized or empty.
459 06:51:11.533500 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 06:51:11.540539 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 06:51:11.541075 Normal boot.
462 06:51:11.547099 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 06:51:11.550339 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 06:51:11.554018 CBFS @ c08000 size 3f8000
465 06:51:11.560516 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 06:51:11.563491 CBFS: Locating 'cpu_microcode_blob.bin'
467 06:51:11.566567 CBFS: Found @ offset 14700 size 2ec00
468 06:51:11.570403 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 06:51:11.573567 Skip microcode update
470 06:51:11.576554 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 06:51:11.580228 CBFS @ c08000 size 3f8000
472 06:51:11.587039 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 06:51:11.590207 CBFS: Locating 'fsps.bin'
474 06:51:11.593298 CBFS: Found @ offset d1fc0 size 35000
475 06:51:11.618327 Detected 4 core, 8 thread CPU.
476 06:51:11.622023 Setting up SMI for CPU
477 06:51:11.625309 IED base = 0x9ac00000
478 06:51:11.625766 IED size = 0x00400000
479 06:51:11.628752 Will perform SMM setup.
480 06:51:11.635102 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 06:51:11.642138 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 06:51:11.645648 Processing 16 relocs. Offset value of 0x00030000
483 06:51:11.648786 Attempting to start 7 APs
484 06:51:11.652510 Waiting for 10ms after sending INIT.
485 06:51:11.668414 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
486 06:51:11.668927 done.
487 06:51:11.671974 AP: slot 6 apic_id 5.
488 06:51:11.675598 AP: slot 5 apic_id 4.
489 06:51:11.676145 AP: slot 1 apic_id 2.
490 06:51:11.678539 AP: slot 4 apic_id 3.
491 06:51:11.681846 AP: slot 2 apic_id 7.
492 06:51:11.682269 AP: slot 7 apic_id 6.
493 06:51:11.688309 Waiting for 2nd SIPI to complete...done.
494 06:51:11.695147 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 06:51:11.698241 Processing 13 relocs. Offset value of 0x00038000
496 06:51:11.704725 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 06:51:11.711744 Installing SMM handler to 0x9a000000
498 06:51:11.718781 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 06:51:11.721527 Processing 658 relocs. Offset value of 0x9a010000
500 06:51:11.731667 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 06:51:11.734593 Processing 13 relocs. Offset value of 0x9a008000
502 06:51:11.741369 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 06:51:11.748345 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 06:51:11.751484 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 06:51:11.758031 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 06:51:11.764835 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 06:51:11.771347 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 06:51:11.774712 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 06:51:11.781541 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 06:51:11.784534 Clearing SMI status registers
511 06:51:11.787807 SMI_STS: PM1
512 06:51:11.788393 PM1_STS: PWRBTN
513 06:51:11.791243 TCO_STS: SECOND_TO
514 06:51:11.794660 New SMBASE 0x9a000000
515 06:51:11.797725 In relocation handler: CPU 0
516 06:51:11.801634 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 06:51:11.804663 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 06:51:11.807687 Relocation complete.
519 06:51:11.811452 New SMBASE 0x99fff400
520 06:51:11.814655 In relocation handler: CPU 3
521 06:51:11.817575 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
522 06:51:11.820862 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 06:51:11.824406 Relocation complete.
524 06:51:11.827446 New SMBASE 0x99fff800
525 06:51:11.828023 In relocation handler: CPU 2
526 06:51:11.834278 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
527 06:51:11.837878 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 06:51:11.841129 Relocation complete.
529 06:51:11.844173 New SMBASE 0x99ffec00
530 06:51:11.844644 In relocation handler: CPU 5
531 06:51:11.851029 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
532 06:51:11.854464 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 06:51:11.857542 Relocation complete.
534 06:51:11.858069 New SMBASE 0x99ffe800
535 06:51:11.861208 In relocation handler: CPU 6
536 06:51:11.867532 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
537 06:51:11.871257 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 06:51:11.873964 Relocation complete.
539 06:51:11.874397 New SMBASE 0x99fff000
540 06:51:11.877332 In relocation handler: CPU 4
541 06:51:11.884219 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
542 06:51:11.887084 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 06:51:11.891150 Relocation complete.
544 06:51:11.891676 New SMBASE 0x99fffc00
545 06:51:11.893796 In relocation handler: CPU 1
546 06:51:11.896944 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
547 06:51:11.903798 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 06:51:11.907071 Relocation complete.
549 06:51:11.907494 New SMBASE 0x99ffe400
550 06:51:11.911003 In relocation handler: CPU 7
551 06:51:11.913637 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
552 06:51:11.920540 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 06:51:11.921073 Relocation complete.
554 06:51:11.923967 Initializing CPU #0
555 06:51:11.927692 CPU: vendor Intel device 806ec
556 06:51:11.930801 CPU: family 06, model 8e, stepping 0c
557 06:51:11.934225 Clearing out pending MCEs
558 06:51:11.937345 Setting up local APIC...
559 06:51:11.937809 apic_id: 0x00 done.
560 06:51:11.940146 Turbo is available but hidden
561 06:51:11.943772 Turbo is available and visible
562 06:51:11.946965 VMX status: enabled
563 06:51:11.950782 IA32_FEATURE_CONTROL status: locked
564 06:51:11.954148 Skip microcode update
565 06:51:11.954675 CPU #0 initialized
566 06:51:11.957376 Initializing CPU #3
567 06:51:11.960025 Initializing CPU #6
568 06:51:11.964030 CPU: vendor Intel device 806ec
569 06:51:11.966975 CPU: family 06, model 8e, stepping 0c
570 06:51:11.967506 Clearing out pending MCEs
571 06:51:11.970374 Initializing CPU #1
572 06:51:11.973470 Initializing CPU #4
573 06:51:11.976759 CPU: vendor Intel device 806ec
574 06:51:11.980659 CPU: family 06, model 8e, stepping 0c
575 06:51:11.983328 CPU: vendor Intel device 806ec
576 06:51:11.986928 CPU: family 06, model 8e, stepping 0c
577 06:51:11.989870 Clearing out pending MCEs
578 06:51:11.990304 Clearing out pending MCEs
579 06:51:11.993251 Setting up local APIC...
580 06:51:11.996725 Setting up local APIC...
581 06:51:11.999899 Setting up local APIC...
582 06:51:12.000354 Initializing CPU #2
583 06:51:12.003095 Initializing CPU #7
584 06:51:12.006765 CPU: vendor Intel device 806ec
585 06:51:12.009706 CPU: family 06, model 8e, stepping 0c
586 06:51:12.013233 apic_id: 0x01 done.
587 06:51:12.013674 apic_id: 0x03 done.
588 06:51:12.016687 apic_id: 0x02 done.
589 06:51:12.019618 VMX status: enabled
590 06:51:12.020043 VMX status: enabled
591 06:51:12.023050 IA32_FEATURE_CONTROL status: locked
592 06:51:12.026734 IA32_FEATURE_CONTROL status: locked
593 06:51:12.029875 Skip microcode update
594 06:51:12.033862 Skip microcode update
595 06:51:12.034398 CPU #4 initialized
596 06:51:12.036770 CPU #1 initialized
597 06:51:12.039866 CPU: vendor Intel device 806ec
598 06:51:12.043471 CPU: family 06, model 8e, stepping 0c
599 06:51:12.046879 Initializing CPU #5
600 06:51:12.047415 Clearing out pending MCEs
601 06:51:12.049883 CPU: vendor Intel device 806ec
602 06:51:12.053331 CPU: family 06, model 8e, stepping 0c
603 06:51:12.056501 Setting up local APIC...
604 06:51:12.060087 VMX status: enabled
605 06:51:12.063318 Clearing out pending MCEs
606 06:51:12.066500 CPU: vendor Intel device 806ec
607 06:51:12.070331 CPU: family 06, model 8e, stepping 0c
608 06:51:12.070867 Setting up local APIC...
609 06:51:12.076680 IA32_FEATURE_CONTROL status: locked
610 06:51:12.077270 apic_id: 0x05 done.
611 06:51:12.080319 Clearing out pending MCEs
612 06:51:12.083382 VMX status: enabled
613 06:51:12.083812 Setting up local APIC...
614 06:51:12.086320 apic_id: 0x07 done.
615 06:51:12.090093 Clearing out pending MCEs
616 06:51:12.090519 VMX status: enabled
617 06:51:12.093330 Setting up local APIC...
618 06:51:12.096565 Skip microcode update
619 06:51:12.100033 IA32_FEATURE_CONTROL status: locked
620 06:51:12.103249 apic_id: 0x06 done.
621 06:51:12.103791 Skip microcode update
622 06:51:12.107049 VMX status: enabled
623 06:51:12.107474 CPU #2 initialized
624 06:51:12.109829 IA32_FEATURE_CONTROL status: locked
625 06:51:12.113514 apic_id: 0x04 done.
626 06:51:12.116279 IA32_FEATURE_CONTROL status: locked
627 06:51:12.119856 VMX status: enabled
628 06:51:12.122995 Skip microcode update
629 06:51:12.126926 IA32_FEATURE_CONTROL status: locked
630 06:51:12.127458 CPU #6 initialized
631 06:51:12.129562 Skip microcode update
632 06:51:12.133002 Skip microcode update
633 06:51:12.133428 CPU #5 initialized
634 06:51:12.136066 CPU #3 initialized
635 06:51:12.136525 CPU #7 initialized
636 06:51:12.143393 bsp_do_flight_plan done after 452 msecs.
637 06:51:12.143946 CPU: frequency set to 4200 MHz
638 06:51:12.146943 Enabling SMIs.
639 06:51:12.147471 Locking SMM.
640 06:51:12.163400 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 06:51:12.166062 CBFS @ c08000 size 3f8000
642 06:51:12.172571 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 06:51:12.173004 CBFS: Locating 'vbt.bin'
644 06:51:12.175846 CBFS: Found @ offset 5f5c0 size 499
645 06:51:12.182695 Found a VBT of 4608 bytes after decompression
646 06:51:12.363991 Display FSP Version Info HOB
647 06:51:12.367618 Reference Code - CPU = 9.0.1e.30
648 06:51:12.370829 uCode Version = 0.0.0.ca
649 06:51:12.374481 TXT ACM version = ff.ff.ff.ffff
650 06:51:12.377371 Display FSP Version Info HOB
651 06:51:12.380477 Reference Code - ME = 9.0.1e.30
652 06:51:12.384138 MEBx version = 0.0.0.0
653 06:51:12.386982 ME Firmware Version = Consumer SKU
654 06:51:12.390383 Display FSP Version Info HOB
655 06:51:12.394294 Reference Code - CML PCH = 9.0.1e.30
656 06:51:12.397161 PCH-CRID Status = Disabled
657 06:51:12.400536 PCH-CRID Original Value = ff.ff.ff.ffff
658 06:51:12.403858 PCH-CRID New Value = ff.ff.ff.ffff
659 06:51:12.407440 OPROM - RST - RAID = ff.ff.ff.ffff
660 06:51:12.410443 ChipsetInit Base Version = ff.ff.ff.ffff
661 06:51:12.413552 ChipsetInit Oem Version = ff.ff.ff.ffff
662 06:51:12.417198 Display FSP Version Info HOB
663 06:51:12.423571 Reference Code - SA - System Agent = 9.0.1e.30
664 06:51:12.427054 Reference Code - MRC = 0.7.1.6c
665 06:51:12.427483 SA - PCIe Version = 9.0.1e.30
666 06:51:12.430187 SA-CRID Status = Disabled
667 06:51:12.433713 SA-CRID Original Value = 0.0.0.c
668 06:51:12.436794 SA-CRID New Value = 0.0.0.c
669 06:51:12.440844 OPROM - VBIOS = ff.ff.ff.ffff
670 06:51:12.443716 RTC Init
671 06:51:12.447239 Set power on after power failure.
672 06:51:12.447787 Disabling Deep S3
673 06:51:12.450257 Disabling Deep S3
674 06:51:12.450680 Disabling Deep S4
675 06:51:12.453898 Disabling Deep S4
676 06:51:12.454433 Disabling Deep S5
677 06:51:12.457020 Disabling Deep S5
678 06:51:12.463825 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
679 06:51:12.464392 Enumerating buses...
680 06:51:12.470578 Show all devs... Before device enumeration.
681 06:51:12.471117 Root Device: enabled 1
682 06:51:12.473838 CPU_CLUSTER: 0: enabled 1
683 06:51:12.476837 DOMAIN: 0000: enabled 1
684 06:51:12.480097 APIC: 00: enabled 1
685 06:51:12.480705 PCI: 00:00.0: enabled 1
686 06:51:12.483301 PCI: 00:02.0: enabled 1
687 06:51:12.486786 PCI: 00:04.0: enabled 0
688 06:51:12.489920 PCI: 00:05.0: enabled 0
689 06:51:12.490349 PCI: 00:12.0: enabled 1
690 06:51:12.493233 PCI: 00:12.5: enabled 0
691 06:51:12.496532 PCI: 00:12.6: enabled 0
692 06:51:12.496957 PCI: 00:14.0: enabled 1
693 06:51:12.499872 PCI: 00:14.1: enabled 0
694 06:51:12.503547 PCI: 00:14.3: enabled 1
695 06:51:12.506684 PCI: 00:14.5: enabled 0
696 06:51:12.507262 PCI: 00:15.0: enabled 1
697 06:51:12.509760 PCI: 00:15.1: enabled 1
698 06:51:12.513765 PCI: 00:15.2: enabled 0
699 06:51:12.516874 PCI: 00:15.3: enabled 0
700 06:51:12.517304 PCI: 00:16.0: enabled 1
701 06:51:12.519872 PCI: 00:16.1: enabled 0
702 06:51:12.523534 PCI: 00:16.2: enabled 0
703 06:51:12.526528 PCI: 00:16.3: enabled 0
704 06:51:12.526956 PCI: 00:16.4: enabled 0
705 06:51:12.530169 PCI: 00:16.5: enabled 0
706 06:51:12.533377 PCI: 00:17.0: enabled 1
707 06:51:12.533807 PCI: 00:19.0: enabled 1
708 06:51:12.536602 PCI: 00:19.1: enabled 0
709 06:51:12.539740 PCI: 00:19.2: enabled 0
710 06:51:12.543523 PCI: 00:1a.0: enabled 0
711 06:51:12.544052 PCI: 00:1c.0: enabled 0
712 06:51:12.546672 PCI: 00:1c.1: enabled 0
713 06:51:12.549756 PCI: 00:1c.2: enabled 0
714 06:51:12.553289 PCI: 00:1c.3: enabled 0
715 06:51:12.553823 PCI: 00:1c.4: enabled 0
716 06:51:12.556439 PCI: 00:1c.5: enabled 0
717 06:51:12.560128 PCI: 00:1c.6: enabled 0
718 06:51:12.563391 PCI: 00:1c.7: enabled 0
719 06:51:12.563936 PCI: 00:1d.0: enabled 1
720 06:51:12.566280 PCI: 00:1d.1: enabled 0
721 06:51:12.569719 PCI: 00:1d.2: enabled 0
722 06:51:12.570147 PCI: 00:1d.3: enabled 0
723 06:51:12.573430 PCI: 00:1d.4: enabled 0
724 06:51:12.576405 PCI: 00:1d.5: enabled 1
725 06:51:12.579600 PCI: 00:1e.0: enabled 1
726 06:51:12.580030 PCI: 00:1e.1: enabled 0
727 06:51:12.582712 PCI: 00:1e.2: enabled 1
728 06:51:12.586744 PCI: 00:1e.3: enabled 1
729 06:51:12.589597 PCI: 00:1f.0: enabled 1
730 06:51:12.590031 PCI: 00:1f.1: enabled 1
731 06:51:12.592916 PCI: 00:1f.2: enabled 1
732 06:51:12.596219 PCI: 00:1f.3: enabled 1
733 06:51:12.599990 PCI: 00:1f.4: enabled 1
734 06:51:12.600466 PCI: 00:1f.5: enabled 1
735 06:51:12.603421 PCI: 00:1f.6: enabled 0
736 06:51:12.606390 USB0 port 0: enabled 1
737 06:51:12.606825 I2C: 00:15: enabled 1
738 06:51:12.609808 I2C: 00:5d: enabled 1
739 06:51:12.612984 GENERIC: 0.0: enabled 1
740 06:51:12.613436 I2C: 00:1a: enabled 1
741 06:51:12.616444 I2C: 00:38: enabled 1
742 06:51:12.619601 I2C: 00:39: enabled 1
743 06:51:12.620026 I2C: 00:3a: enabled 1
744 06:51:12.623361 I2C: 00:3b: enabled 1
745 06:51:12.625928 PCI: 00:00.0: enabled 1
746 06:51:12.626642 SPI: 00: enabled 1
747 06:51:12.629327 SPI: 01: enabled 1
748 06:51:12.632542 PNP: 0c09.0: enabled 1
749 06:51:12.633231 USB2 port 0: enabled 1
750 06:51:12.636073 USB2 port 1: enabled 1
751 06:51:12.639023 USB2 port 2: enabled 0
752 06:51:12.642771 USB2 port 3: enabled 0
753 06:51:12.643198 USB2 port 5: enabled 0
754 06:51:12.645889 USB2 port 6: enabled 1
755 06:51:12.649436 USB2 port 9: enabled 1
756 06:51:12.649972 USB3 port 0: enabled 1
757 06:51:12.652453 USB3 port 1: enabled 1
758 06:51:12.656017 USB3 port 2: enabled 1
759 06:51:12.659635 USB3 port 3: enabled 1
760 06:51:12.660165 USB3 port 4: enabled 0
761 06:51:12.662971 APIC: 02: enabled 1
762 06:51:12.663499 APIC: 07: enabled 1
763 06:51:12.666148 APIC: 01: enabled 1
764 06:51:12.669699 APIC: 03: enabled 1
765 06:51:12.670235 APIC: 04: enabled 1
766 06:51:12.672426 APIC: 05: enabled 1
767 06:51:12.672853 APIC: 06: enabled 1
768 06:51:12.675836 Compare with tree...
769 06:51:12.679481 Root Device: enabled 1
770 06:51:12.682766 CPU_CLUSTER: 0: enabled 1
771 06:51:12.683193 APIC: 00: enabled 1
772 06:51:12.685963 APIC: 02: enabled 1
773 06:51:12.689083 APIC: 07: enabled 1
774 06:51:12.689514 APIC: 01: enabled 1
775 06:51:12.693288 APIC: 03: enabled 1
776 06:51:12.696410 APIC: 04: enabled 1
777 06:51:12.696973 APIC: 05: enabled 1
778 06:51:12.699561 APIC: 06: enabled 1
779 06:51:12.702733 DOMAIN: 0000: enabled 1
780 06:51:12.705737 PCI: 00:00.0: enabled 1
781 06:51:12.706165 PCI: 00:02.0: enabled 1
782 06:51:12.709346 PCI: 00:04.0: enabled 0
783 06:51:12.712931 PCI: 00:05.0: enabled 0
784 06:51:12.716627 PCI: 00:12.0: enabled 1
785 06:51:12.719083 PCI: 00:12.5: enabled 0
786 06:51:12.719521 PCI: 00:12.6: enabled 0
787 06:51:12.722093 PCI: 00:14.0: enabled 1
788 06:51:12.725509 USB0 port 0: enabled 1
789 06:51:12.729123 USB2 port 0: enabled 1
790 06:51:12.732608 USB2 port 1: enabled 1
791 06:51:12.733033 USB2 port 2: enabled 0
792 06:51:12.735931 USB2 port 3: enabled 0
793 06:51:12.739152 USB2 port 5: enabled 0
794 06:51:12.742590 USB2 port 6: enabled 1
795 06:51:12.745592 USB2 port 9: enabled 1
796 06:51:12.748772 USB3 port 0: enabled 1
797 06:51:12.749201 USB3 port 1: enabled 1
798 06:51:12.752148 USB3 port 2: enabled 1
799 06:51:12.755687 USB3 port 3: enabled 1
800 06:51:12.758871 USB3 port 4: enabled 0
801 06:51:12.762466 PCI: 00:14.1: enabled 0
802 06:51:12.762992 PCI: 00:14.3: enabled 1
803 06:51:12.765335 PCI: 00:14.5: enabled 0
804 06:51:12.768895 PCI: 00:15.0: enabled 1
805 06:51:12.772108 I2C: 00:15: enabled 1
806 06:51:12.775366 PCI: 00:15.1: enabled 1
807 06:51:12.775891 I2C: 00:5d: enabled 1
808 06:51:12.778776 GENERIC: 0.0: enabled 1
809 06:51:12.781952 PCI: 00:15.2: enabled 0
810 06:51:12.784997 PCI: 00:15.3: enabled 0
811 06:51:12.788374 PCI: 00:16.0: enabled 1
812 06:51:12.788802 PCI: 00:16.1: enabled 0
813 06:51:12.791837 PCI: 00:16.2: enabled 0
814 06:51:12.795273 PCI: 00:16.3: enabled 0
815 06:51:12.798891 PCI: 00:16.4: enabled 0
816 06:51:12.801965 PCI: 00:16.5: enabled 0
817 06:51:12.802396 PCI: 00:17.0: enabled 1
818 06:51:12.805212 PCI: 00:19.0: enabled 1
819 06:51:12.809033 I2C: 00:1a: enabled 1
820 06:51:12.811891 I2C: 00:38: enabled 1
821 06:51:12.812443 I2C: 00:39: enabled 1
822 06:51:12.814973 I2C: 00:3a: enabled 1
823 06:51:12.817980 I2C: 00:3b: enabled 1
824 06:51:12.821334 PCI: 00:19.1: enabled 0
825 06:51:12.824935 PCI: 00:19.2: enabled 0
826 06:51:12.825381 PCI: 00:1a.0: enabled 0
827 06:51:12.828005 PCI: 00:1c.0: enabled 0
828 06:51:12.831700 PCI: 00:1c.1: enabled 0
829 06:51:12.834846 PCI: 00:1c.2: enabled 0
830 06:51:12.835375 PCI: 00:1c.3: enabled 0
831 06:51:12.838114 PCI: 00:1c.4: enabled 0
832 06:51:12.841386 PCI: 00:1c.5: enabled 0
833 06:51:12.844700 PCI: 00:1c.6: enabled 0
834 06:51:12.848223 PCI: 00:1c.7: enabled 0
835 06:51:12.848815 PCI: 00:1d.0: enabled 1
836 06:51:12.851586 PCI: 00:1d.1: enabled 0
837 06:51:12.854761 PCI: 00:1d.2: enabled 0
838 06:51:12.857963 PCI: 00:1d.3: enabled 0
839 06:51:12.861902 PCI: 00:1d.4: enabled 0
840 06:51:12.862429 PCI: 00:1d.5: enabled 1
841 06:51:12.864838 PCI: 00:00.0: enabled 1
842 06:51:12.868449 PCI: 00:1e.0: enabled 1
843 06:51:12.871562 PCI: 00:1e.1: enabled 0
844 06:51:12.874993 PCI: 00:1e.2: enabled 1
845 06:51:12.875520 SPI: 00: enabled 1
846 06:51:12.877937 PCI: 00:1e.3: enabled 1
847 06:51:12.881069 SPI: 01: enabled 1
848 06:51:12.884927 PCI: 00:1f.0: enabled 1
849 06:51:12.885356 PNP: 0c09.0: enabled 1
850 06:51:12.887921 PCI: 00:1f.1: enabled 1
851 06:51:12.891485 PCI: 00:1f.2: enabled 1
852 06:51:12.894809 PCI: 00:1f.3: enabled 1
853 06:51:12.895242 PCI: 00:1f.4: enabled 1
854 06:51:12.898249 PCI: 00:1f.5: enabled 1
855 06:51:12.900957 PCI: 00:1f.6: enabled 0
856 06:51:12.904156 Root Device scanning...
857 06:51:12.908319 scan_static_bus for Root Device
858 06:51:12.911748 CPU_CLUSTER: 0 enabled
859 06:51:12.912322 DOMAIN: 0000 enabled
860 06:51:12.914564 DOMAIN: 0000 scanning...
861 06:51:12.917636 PCI: pci_scan_bus for bus 00
862 06:51:12.921382 PCI: 00:00.0 [8086/0000] ops
863 06:51:12.924325 PCI: 00:00.0 [8086/9b61] enabled
864 06:51:12.928090 PCI: 00:02.0 [8086/0000] bus ops
865 06:51:12.931465 PCI: 00:02.0 [8086/9b41] enabled
866 06:51:12.934434 PCI: 00:04.0 [8086/1903] disabled
867 06:51:12.938013 PCI: 00:08.0 [8086/1911] enabled
868 06:51:12.940751 PCI: 00:12.0 [8086/02f9] enabled
869 06:51:12.944502 PCI: 00:14.0 [8086/0000] bus ops
870 06:51:12.947985 PCI: 00:14.0 [8086/02ed] enabled
871 06:51:12.951045 PCI: 00:14.2 [8086/02ef] enabled
872 06:51:12.954367 PCI: 00:14.3 [8086/02f0] enabled
873 06:51:12.957890 PCI: 00:15.0 [8086/0000] bus ops
874 06:51:12.961130 PCI: 00:15.0 [8086/02e8] enabled
875 06:51:12.964879 PCI: 00:15.1 [8086/0000] bus ops
876 06:51:12.967849 PCI: 00:15.1 [8086/02e9] enabled
877 06:51:12.970937 PCI: 00:16.0 [8086/0000] ops
878 06:51:12.974632 PCI: 00:16.0 [8086/02e0] enabled
879 06:51:12.977739 PCI: 00:17.0 [8086/0000] ops
880 06:51:12.981577 PCI: 00:17.0 [8086/02d3] enabled
881 06:51:12.984110 PCI: 00:19.0 [8086/0000] bus ops
882 06:51:12.988063 PCI: 00:19.0 [8086/02c5] enabled
883 06:51:12.991135 PCI: 00:1d.0 [8086/0000] bus ops
884 06:51:12.994595 PCI: 00:1d.0 [8086/02b0] enabled
885 06:51:12.997526 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 06:51:13.001091 PCI: 00:1e.0 [8086/0000] ops
887 06:51:13.004363 PCI: 00:1e.0 [8086/02a8] enabled
888 06:51:13.007901 PCI: 00:1e.2 [8086/0000] bus ops
889 06:51:13.010981 PCI: 00:1e.2 [8086/02aa] enabled
890 06:51:13.014308 PCI: 00:1e.3 [8086/0000] bus ops
891 06:51:13.017815 PCI: 00:1e.3 [8086/02ab] enabled
892 06:51:13.021016 PCI: 00:1f.0 [8086/0000] bus ops
893 06:51:13.024160 PCI: 00:1f.0 [8086/0284] enabled
894 06:51:13.031205 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 06:51:13.037858 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 06:51:13.040892 PCI: 00:1f.3 [8086/0000] bus ops
897 06:51:13.044787 PCI: 00:1f.3 [8086/02c8] enabled
898 06:51:13.047472 PCI: 00:1f.4 [8086/0000] bus ops
899 06:51:13.051153 PCI: 00:1f.4 [8086/02a3] enabled
900 06:51:13.054285 PCI: 00:1f.5 [8086/0000] bus ops
901 06:51:13.058130 PCI: 00:1f.5 [8086/02a4] enabled
902 06:51:13.058658 PCI: Leftover static devices:
903 06:51:13.060644 PCI: 00:05.0
904 06:51:13.061236 PCI: 00:12.5
905 06:51:13.064427 PCI: 00:12.6
906 06:51:13.064850 PCI: 00:14.1
907 06:51:13.067941 PCI: 00:14.5
908 06:51:13.068525 PCI: 00:15.2
909 06:51:13.068879 PCI: 00:15.3
910 06:51:13.071063 PCI: 00:16.1
911 06:51:13.071480 PCI: 00:16.2
912 06:51:13.074229 PCI: 00:16.3
913 06:51:13.074755 PCI: 00:16.4
914 06:51:13.075091 PCI: 00:16.5
915 06:51:13.077717 PCI: 00:19.1
916 06:51:13.078139 PCI: 00:19.2
917 06:51:13.080756 PCI: 00:1a.0
918 06:51:13.081175 PCI: 00:1c.0
919 06:51:13.081509 PCI: 00:1c.1
920 06:51:13.083860 PCI: 00:1c.2
921 06:51:13.084400 PCI: 00:1c.3
922 06:51:13.087792 PCI: 00:1c.4
923 06:51:13.088362 PCI: 00:1c.5
924 06:51:13.090922 PCI: 00:1c.6
925 06:51:13.091343 PCI: 00:1c.7
926 06:51:13.091681 PCI: 00:1d.1
927 06:51:13.094928 PCI: 00:1d.2
928 06:51:13.095451 PCI: 00:1d.3
929 06:51:13.097668 PCI: 00:1d.4
930 06:51:13.098090 PCI: 00:1d.5
931 06:51:13.098423 PCI: 00:1e.1
932 06:51:13.100759 PCI: 00:1f.1
933 06:51:13.101181 PCI: 00:1f.2
934 06:51:13.104818 PCI: 00:1f.6
935 06:51:13.107820 PCI: Check your devicetree.cb.
936 06:51:13.108391 PCI: 00:02.0 scanning...
937 06:51:13.110788 scan_generic_bus for PCI: 00:02.0
938 06:51:13.117281 scan_generic_bus for PCI: 00:02.0 done
939 06:51:13.120565 scan_bus: scanning of bus PCI: 00:02.0 took 10172 usecs
940 06:51:13.124369 PCI: 00:14.0 scanning...
941 06:51:13.127601 scan_static_bus for PCI: 00:14.0
942 06:51:13.130868 USB0 port 0 enabled
943 06:51:13.131385 USB0 port 0 scanning...
944 06:51:13.134573 scan_static_bus for USB0 port 0
945 06:51:13.137715 USB2 port 0 enabled
946 06:51:13.140580 USB2 port 1 enabled
947 06:51:13.141003 USB2 port 2 disabled
948 06:51:13.144506 USB2 port 3 disabled
949 06:51:13.147551 USB2 port 5 disabled
950 06:51:13.148090 USB2 port 6 enabled
951 06:51:13.150905 USB2 port 9 enabled
952 06:51:13.151426 USB3 port 0 enabled
953 06:51:13.154215 USB3 port 1 enabled
954 06:51:13.157672 USB3 port 2 enabled
955 06:51:13.158265 USB3 port 3 enabled
956 06:51:13.160733 USB3 port 4 disabled
957 06:51:13.164420 USB2 port 0 scanning...
958 06:51:13.167535 scan_static_bus for USB2 port 0
959 06:51:13.170843 scan_static_bus for USB2 port 0 done
960 06:51:13.174541 scan_bus: scanning of bus USB2 port 0 took 9688 usecs
961 06:51:13.177562 USB2 port 1 scanning...
962 06:51:13.180354 scan_static_bus for USB2 port 1
963 06:51:13.184072 scan_static_bus for USB2 port 1 done
964 06:51:13.191073 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
965 06:51:13.193992 USB2 port 6 scanning...
966 06:51:13.197139 scan_static_bus for USB2 port 6
967 06:51:13.200499 scan_static_bus for USB2 port 6 done
968 06:51:13.203865 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
969 06:51:13.207309 USB2 port 9 scanning...
970 06:51:13.210415 scan_static_bus for USB2 port 9
971 06:51:13.213653 scan_static_bus for USB2 port 9 done
972 06:51:13.220308 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
973 06:51:13.223409 USB3 port 0 scanning...
974 06:51:13.226987 scan_static_bus for USB3 port 0
975 06:51:13.230491 scan_static_bus for USB3 port 0 done
976 06:51:13.236989 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
977 06:51:13.237516 USB3 port 1 scanning...
978 06:51:13.240184 scan_static_bus for USB3 port 1
979 06:51:13.243762 scan_static_bus for USB3 port 1 done
980 06:51:13.250467 scan_bus: scanning of bus USB3 port 1 took 9687 usecs
981 06:51:13.253960 USB3 port 2 scanning...
982 06:51:13.256969 scan_static_bus for USB3 port 2
983 06:51:13.260040 scan_static_bus for USB3 port 2 done
984 06:51:13.263501 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
985 06:51:13.267182 USB3 port 3 scanning...
986 06:51:13.270597 scan_static_bus for USB3 port 3
987 06:51:13.273416 scan_static_bus for USB3 port 3 done
988 06:51:13.280015 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
989 06:51:13.283500 scan_static_bus for USB0 port 0 done
990 06:51:13.290148 scan_bus: scanning of bus USB0 port 0 took 155292 usecs
991 06:51:13.293939 scan_static_bus for PCI: 00:14.0 done
992 06:51:13.300104 scan_bus: scanning of bus PCI: 00:14.0 took 172905 usecs
993 06:51:13.300516 PCI: 00:15.0 scanning...
994 06:51:13.303852 scan_generic_bus for PCI: 00:15.0
995 06:51:13.310207 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 06:51:13.314038 scan_generic_bus for PCI: 00:15.0 done
997 06:51:13.320067 scan_bus: scanning of bus PCI: 00:15.0 took 14278 usecs
998 06:51:13.320417 PCI: 00:15.1 scanning...
999 06:51:13.323581 scan_generic_bus for PCI: 00:15.1
1000 06:51:13.330293 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 06:51:13.333865 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 06:51:13.337003 scan_generic_bus for PCI: 00:15.1 done
1003 06:51:13.344003 scan_bus: scanning of bus PCI: 00:15.1 took 18600 usecs
1004 06:51:13.347237 PCI: 00:19.0 scanning...
1005 06:51:13.350801 scan_generic_bus for PCI: 00:19.0
1006 06:51:13.353948 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 06:51:13.356950 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 06:51:13.359974 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 06:51:13.367215 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 06:51:13.370200 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 06:51:13.373632 scan_generic_bus for PCI: 00:19.0 done
1012 06:51:13.379874 scan_bus: scanning of bus PCI: 00:19.0 took 30729 usecs
1013 06:51:13.380408 PCI: 00:1d.0 scanning...
1014 06:51:13.387174 do_pci_scan_bridge for PCI: 00:1d.0
1015 06:51:13.387703 PCI: pci_scan_bus for bus 01
1016 06:51:13.390616 PCI: 01:00.0 [1c5c/1327] enabled
1017 06:51:13.397057 Enabling Common Clock Configuration
1018 06:51:13.400142 L1 Sub-State supported from root port 29
1019 06:51:13.403883 L1 Sub-State Support = 0xf
1020 06:51:13.407529 CommonModeRestoreTime = 0x28
1021 06:51:13.410339 Power On Value = 0x16, Power On Scale = 0x0
1022 06:51:13.410843 ASPM: Enabled L1
1023 06:51:13.417117 scan_bus: scanning of bus PCI: 00:1d.0 took 32758 usecs
1024 06:51:13.420186 PCI: 00:1e.2 scanning...
1025 06:51:13.423728 scan_generic_bus for PCI: 00:1e.2
1026 06:51:13.426935 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 06:51:13.430263 scan_generic_bus for PCI: 00:1e.2 done
1028 06:51:13.436776 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1029 06:51:13.440152 PCI: 00:1e.3 scanning...
1030 06:51:13.443518 scan_generic_bus for PCI: 00:1e.3
1031 06:51:13.446464 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 06:51:13.449955 scan_generic_bus for PCI: 00:1e.3 done
1033 06:51:13.456536 scan_bus: scanning of bus PCI: 00:1e.3 took 13993 usecs
1034 06:51:13.460000 PCI: 00:1f.0 scanning...
1035 06:51:13.463187 scan_static_bus for PCI: 00:1f.0
1036 06:51:13.463685 PNP: 0c09.0 enabled
1037 06:51:13.467024 scan_static_bus for PCI: 00:1f.0 done
1038 06:51:13.473055 scan_bus: scanning of bus PCI: 00:1f.0 took 12026 usecs
1039 06:51:13.476598 PCI: 00:1f.3 scanning...
1040 06:51:13.483365 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1041 06:51:13.483981 PCI: 00:1f.4 scanning...
1042 06:51:13.489731 scan_generic_bus for PCI: 00:1f.4
1043 06:51:13.493122 scan_generic_bus for PCI: 00:1f.4 done
1044 06:51:13.496511 scan_bus: scanning of bus PCI: 00:1f.4 took 10180 usecs
1045 06:51:13.499481 PCI: 00:1f.5 scanning...
1046 06:51:13.503285 scan_generic_bus for PCI: 00:1f.5
1047 06:51:13.506328 scan_generic_bus for PCI: 00:1f.5 done
1048 06:51:13.513031 scan_bus: scanning of bus PCI: 00:1f.5 took 10171 usecs
1049 06:51:13.519388 scan_bus: scanning of bus DOMAIN: 0000 took 604655 usecs
1050 06:51:13.523249 scan_static_bus for Root Device done
1051 06:51:13.529295 scan_bus: scanning of bus Root Device took 624567 usecs
1052 06:51:13.529816 done
1053 06:51:13.533065 Chrome EC: UHEPI supported
1054 06:51:13.540160 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 06:51:13.542844 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 06:51:13.549155 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 06:51:13.556693 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 06:51:13.560335 SPI flash protection: WPSW=0 SRP0=0
1059 06:51:13.566791 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 06:51:13.569641 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1061 06:51:13.572874 found VGA at PCI: 00:02.0
1062 06:51:13.576474 Setting up VGA for PCI: 00:02.0
1063 06:51:13.583112 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 06:51:13.586391 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 06:51:13.589987 Allocating resources...
1066 06:51:13.593711 Reading resources...
1067 06:51:13.596699 Root Device read_resources bus 0 link: 0
1068 06:51:13.599975 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 06:51:13.606408 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 06:51:13.610255 DOMAIN: 0000 read_resources bus 0 link: 0
1071 06:51:13.616716 PCI: 00:14.0 read_resources bus 0 link: 0
1072 06:51:13.620177 USB0 port 0 read_resources bus 0 link: 0
1073 06:51:13.628034 USB0 port 0 read_resources bus 0 link: 0 done
1074 06:51:13.631392 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 06:51:13.638919 PCI: 00:15.0 read_resources bus 1 link: 0
1076 06:51:13.642640 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 06:51:13.648687 PCI: 00:15.1 read_resources bus 2 link: 0
1078 06:51:13.651981 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 06:51:13.659156 PCI: 00:19.0 read_resources bus 3 link: 0
1080 06:51:13.666328 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 06:51:13.669140 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 06:51:13.675819 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 06:51:13.679501 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 06:51:13.685810 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 06:51:13.689174 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 06:51:13.696011 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 06:51:13.699089 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 06:51:13.706200 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 06:51:13.709079 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 06:51:13.716028 Root Device read_resources bus 0 link: 0 done
1091 06:51:13.719773 Done reading resources.
1092 06:51:13.723246 Show resources in subtree (Root Device)...After reading.
1093 06:51:13.729476 Root Device child on link 0 CPU_CLUSTER: 0
1094 06:51:13.732880 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 06:51:13.733297 APIC: 00
1096 06:51:13.736476 APIC: 02
1097 06:51:13.736889 APIC: 07
1098 06:51:13.737218 APIC: 01
1099 06:51:13.739653 APIC: 03
1100 06:51:13.740091 APIC: 04
1101 06:51:13.742694 APIC: 05
1102 06:51:13.743221 APIC: 06
1103 06:51:13.746202 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 06:51:13.756799 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 06:51:13.809269 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 06:51:13.809901 PCI: 00:00.0
1107 06:51:13.810347 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 06:51:13.811262 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 06:51:13.811735 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 06:51:13.812287 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 06:51:13.855001 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 06:51:13.856043 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 06:51:13.856551 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 06:51:13.857124 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 06:51:13.857533 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 06:51:13.863157 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 06:51:13.869767 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 06:51:13.879703 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 06:51:13.889885 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 06:51:13.899375 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 06:51:13.909333 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 06:51:13.916284 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 06:51:13.919498 PCI: 00:02.0
1124 06:51:13.929785 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 06:51:13.939661 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 06:51:13.949037 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 06:51:13.949582 PCI: 00:04.0
1128 06:51:13.952695 PCI: 00:08.0
1129 06:51:13.962771 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 06:51:13.963303 PCI: 00:12.0
1131 06:51:13.972406 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 06:51:13.975861 PCI: 00:14.0 child on link 0 USB0 port 0
1133 06:51:13.985611 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 06:51:13.992429 USB0 port 0 child on link 0 USB2 port 0
1135 06:51:13.992967 USB2 port 0
1136 06:51:13.995730 USB2 port 1
1137 06:51:13.996242 USB2 port 2
1138 06:51:13.999270 USB2 port 3
1139 06:51:13.999693 USB2 port 5
1140 06:51:14.002218 USB2 port 6
1141 06:51:14.005685 USB2 port 9
1142 06:51:14.006203 USB3 port 0
1143 06:51:14.008740 USB3 port 1
1144 06:51:14.009150 USB3 port 2
1145 06:51:14.012162 USB3 port 3
1146 06:51:14.012599 USB3 port 4
1147 06:51:14.016072 PCI: 00:14.2
1148 06:51:14.025653 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 06:51:14.035534 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 06:51:14.036113 PCI: 00:14.3
1151 06:51:14.045303 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 06:51:14.049086 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 06:51:14.058680 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 06:51:14.062117 I2C: 01:15
1155 06:51:14.064936 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 06:51:14.075291 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 06:51:14.078537 I2C: 02:5d
1158 06:51:14.078967 GENERIC: 0.0
1159 06:51:14.081898 PCI: 00:16.0
1160 06:51:14.091516 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 06:51:14.091949 PCI: 00:17.0
1162 06:51:14.101735 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 06:51:14.111623 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 06:51:14.118590 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 06:51:14.128374 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 06:51:14.134713 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 06:51:14.145233 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 06:51:14.148077 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 06:51:14.158595 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 06:51:14.161640 I2C: 03:1a
1171 06:51:14.162105 I2C: 03:38
1172 06:51:14.162462 I2C: 03:39
1173 06:51:14.165269 I2C: 03:3a
1174 06:51:14.165696 I2C: 03:3b
1175 06:51:14.171721 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 06:51:14.178596 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 06:51:14.188212 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 06:51:14.198141 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 06:51:14.201690 PCI: 01:00.0
1180 06:51:14.211266 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 06:51:14.211692 PCI: 00:1e.0
1182 06:51:14.221132 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 06:51:14.231070 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 06:51:14.237934 PCI: 00:1e.2 child on link 0 SPI: 00
1185 06:51:14.248336 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 06:51:14.248767 SPI: 00
1187 06:51:14.251337 PCI: 00:1e.3 child on link 0 SPI: 01
1188 06:51:14.261132 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 06:51:14.264297 SPI: 01
1190 06:51:14.268102 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 06:51:14.274689 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 06:51:14.284198 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 06:51:14.287244 PNP: 0c09.0
1194 06:51:14.294170 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 06:51:14.297514 PCI: 00:1f.3
1196 06:51:14.307763 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 06:51:14.317741 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 06:51:14.318198 PCI: 00:1f.4
1199 06:51:14.327132 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 06:51:14.337125 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 06:51:14.337514 PCI: 00:1f.5
1202 06:51:14.347012 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 06:51:14.354008 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 06:51:14.360219 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 06:51:14.366924 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 06:51:14.370265 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 06:51:14.373571 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 06:51:14.377091 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 06:51:14.380161 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 06:51:14.389822 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 06:51:14.396437 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 06:51:14.403412 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 06:51:14.410238 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 06:51:14.416367 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 06:51:14.423237 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 06:51:14.430090 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 06:51:14.433128 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 06:51:14.439682 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 06:51:14.443094 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 06:51:14.449779 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 06:51:14.453411 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 06:51:14.459770 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 06:51:14.463063 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 06:51:14.469813 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 06:51:14.473048 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 06:51:14.479351 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 06:51:14.482871 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 06:51:14.489984 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 06:51:14.493061 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 06:51:14.496084 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 06:51:14.502925 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 06:51:14.506252 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 06:51:14.513120 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 06:51:14.515825 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 06:51:14.522892 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 06:51:14.526023 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 06:51:14.532963 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 06:51:14.536116 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 06:51:14.542861 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 06:51:14.549548 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 06:51:14.553142 avoid_fixed_resources: DOMAIN: 0000
1242 06:51:14.559370 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 06:51:14.566141 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 06:51:14.573050 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 06:51:14.579466 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 06:51:14.589748 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 06:51:14.596383 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 06:51:14.602711 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 06:51:14.612416 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 06:51:14.619414 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 06:51:14.625996 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 06:51:14.632684 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 06:51:14.642916 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 06:51:14.643015 Setting resources...
1255 06:51:14.649716 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 06:51:14.652680 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 06:51:14.656065 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 06:51:14.662435 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 06:51:14.665965 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 06:51:14.672839 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 06:51:14.679317 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 06:51:14.685473 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 06:51:14.692142 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 06:51:14.695787 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 06:51:14.702421 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 06:51:14.705864 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 06:51:14.712323 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 06:51:14.715373 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 06:51:14.722353 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 06:51:14.725340 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 06:51:14.732416 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 06:51:14.735286 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 06:51:14.742611 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 06:51:14.745747 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 06:51:14.752188 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 06:51:14.755236 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 06:51:14.758770 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 06:51:14.765506 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 06:51:14.768604 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 06:51:14.775423 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 06:51:14.778917 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 06:51:14.785270 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 06:51:14.788795 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 06:51:14.795467 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 06:51:14.798641 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 06:51:14.805777 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 06:51:14.811926 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 06:51:14.819057 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 06:51:14.825950 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 06:51:14.832508 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 06:51:14.839440 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 06:51:14.845699 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 06:51:14.848848 Root Device assign_resources, bus 0 link: 0
1294 06:51:14.855929 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 06:51:14.862509 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 06:51:14.872451 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 06:51:14.878792 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 06:51:14.888866 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 06:51:14.895254 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 06:51:14.905214 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 06:51:14.908975 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 06:51:14.915350 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 06:51:14.921423 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 06:51:14.931757 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 06:51:14.938431 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 06:51:14.948549 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 06:51:14.951984 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 06:51:14.955010 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 06:51:14.965112 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 06:51:14.968668 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 06:51:14.974946 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 06:51:14.981429 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 06:51:14.991665 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 06:51:14.998558 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 06:51:15.004806 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 06:51:15.014727 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 06:51:15.021072 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 06:51:15.027945 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 06:51:15.037902 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 06:51:15.040810 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 06:51:15.047350 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 06:51:15.054047 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 06:51:15.064429 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 06:51:15.070822 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 06:51:15.077610 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 06:51:15.084237 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 06:51:15.090841 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 06:51:15.097197 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 06:51:15.107470 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 06:51:15.110460 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 06:51:15.113974 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 06:51:15.124707 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 06:51:15.127568 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 06:51:15.134705 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 06:51:15.137565 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 06:51:15.144288 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 06:51:15.147598 LPC: Trying to open IO window from 800 size 1ff
1338 06:51:15.157113 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 06:51:15.163607 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 06:51:15.187765 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 06:51:15.188296 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 06:51:15.188646 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 06:51:15.190295 Root Device assign_resources, bus 0 link: 0
1344 06:51:15.194123 Done setting resources.
1345 06:51:15.199914 Show resources in subtree (Root Device)...After assigning values.
1346 06:51:15.203768 Root Device child on link 0 CPU_CLUSTER: 0
1347 06:51:15.207145 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 06:51:15.207236 APIC: 00
1349 06:51:15.209985 APIC: 02
1350 06:51:15.210076 APIC: 07
1351 06:51:15.213620 APIC: 01
1352 06:51:15.213711 APIC: 03
1353 06:51:15.213783 APIC: 04
1354 06:51:15.216986 APIC: 05
1355 06:51:15.217076 APIC: 06
1356 06:51:15.220048 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 06:51:15.229913 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 06:51:15.243312 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 06:51:15.243472 PCI: 00:00.0
1360 06:51:15.253453 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 06:51:15.263539 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 06:51:15.273361 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 06:51:15.283018 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 06:51:15.289658 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 06:51:15.300027 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 06:51:15.309902 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 06:51:15.320139 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 06:51:15.329565 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 06:51:15.336131 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 06:51:15.346099 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 06:51:15.356512 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 06:51:15.365979 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 06:51:15.376028 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 06:51:15.386136 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 06:51:15.395671 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 06:51:15.396218 PCI: 00:02.0
1377 06:51:15.405808 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 06:51:15.419352 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 06:51:15.426050 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 06:51:15.428668 PCI: 00:04.0
1381 06:51:15.429156 PCI: 00:08.0
1382 06:51:15.439153 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 06:51:15.442331 PCI: 00:12.0
1384 06:51:15.451779 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 06:51:15.455168 PCI: 00:14.0 child on link 0 USB0 port 0
1386 06:51:15.468413 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 06:51:15.471832 USB0 port 0 child on link 0 USB2 port 0
1388 06:51:15.472338 USB2 port 0
1389 06:51:15.474978 USB2 port 1
1390 06:51:15.475395 USB2 port 2
1391 06:51:15.478696 USB2 port 3
1392 06:51:15.481525 USB2 port 5
1393 06:51:15.481961 USB2 port 6
1394 06:51:15.485202 USB2 port 9
1395 06:51:15.485623 USB3 port 0
1396 06:51:15.488198 USB3 port 1
1397 06:51:15.488791 USB3 port 2
1398 06:51:15.491935 USB3 port 3
1399 06:51:15.492512 USB3 port 4
1400 06:51:15.495105 PCI: 00:14.2
1401 06:51:15.504792 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 06:51:15.514962 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 06:51:15.515522 PCI: 00:14.3
1404 06:51:15.528097 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 06:51:15.531495 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 06:51:15.541125 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 06:51:15.541679 I2C: 01:15
1408 06:51:15.547927 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 06:51:15.557814 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 06:51:15.558343 I2C: 02:5d
1411 06:51:15.560990 GENERIC: 0.0
1412 06:51:15.561534 PCI: 00:16.0
1413 06:51:15.574208 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 06:51:15.574735 PCI: 00:17.0
1415 06:51:15.583922 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 06:51:15.593917 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 06:51:15.604073 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 06:51:15.614027 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 06:51:15.620781 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 06:51:15.633868 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 06:51:15.636897 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 06:51:15.646804 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 06:51:15.647361 I2C: 03:1a
1424 06:51:15.650572 I2C: 03:38
1425 06:51:15.651142 I2C: 03:39
1426 06:51:15.654132 I2C: 03:3a
1427 06:51:15.654867 I2C: 03:3b
1428 06:51:15.660559 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 06:51:15.667281 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 06:51:15.677022 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 06:51:15.690261 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 06:51:15.690788 PCI: 01:00.0
1433 06:51:15.700226 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 06:51:15.702984 PCI: 00:1e.0
1435 06:51:15.713008 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 06:51:15.723054 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 06:51:15.726123 PCI: 00:1e.2 child on link 0 SPI: 00
1438 06:51:15.740033 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 06:51:15.740518 SPI: 00
1440 06:51:15.742955 PCI: 00:1e.3 child on link 0 SPI: 01
1441 06:51:15.752703 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 06:51:15.756130 SPI: 01
1443 06:51:15.759891 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 06:51:15.769252 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 06:51:15.775817 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 06:51:15.779119 PNP: 0c09.0
1447 06:51:15.786206 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 06:51:15.789165 PCI: 00:1f.3
1449 06:51:15.798688 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 06:51:15.809104 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 06:51:15.812229 PCI: 00:1f.4
1452 06:51:15.822215 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 06:51:15.832230 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 06:51:15.832815 PCI: 00:1f.5
1455 06:51:15.842393 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 06:51:15.845999 Done allocating resources.
1457 06:51:15.851992 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 06:51:15.852571 Enabling resources...
1459 06:51:15.860007 PCI: 00:00.0 subsystem <- 8086/9b61
1460 06:51:15.860626 PCI: 00:00.0 cmd <- 06
1461 06:51:15.862928 PCI: 00:02.0 subsystem <- 8086/9b41
1462 06:51:15.866297 PCI: 00:02.0 cmd <- 03
1463 06:51:15.869717 PCI: 00:08.0 cmd <- 06
1464 06:51:15.872928 PCI: 00:12.0 subsystem <- 8086/02f9
1465 06:51:15.876639 PCI: 00:12.0 cmd <- 02
1466 06:51:15.880037 PCI: 00:14.0 subsystem <- 8086/02ed
1467 06:51:15.883052 PCI: 00:14.0 cmd <- 02
1468 06:51:15.885971 PCI: 00:14.2 cmd <- 02
1469 06:51:15.889947 PCI: 00:14.3 subsystem <- 8086/02f0
1470 06:51:15.890461 PCI: 00:14.3 cmd <- 02
1471 06:51:15.896036 PCI: 00:15.0 subsystem <- 8086/02e8
1472 06:51:15.896591 PCI: 00:15.0 cmd <- 02
1473 06:51:15.899808 PCI: 00:15.1 subsystem <- 8086/02e9
1474 06:51:15.902903 PCI: 00:15.1 cmd <- 02
1475 06:51:15.906424 PCI: 00:16.0 subsystem <- 8086/02e0
1476 06:51:15.909473 PCI: 00:16.0 cmd <- 02
1477 06:51:15.912983 PCI: 00:17.0 subsystem <- 8086/02d3
1478 06:51:15.916412 PCI: 00:17.0 cmd <- 03
1479 06:51:15.919896 PCI: 00:19.0 subsystem <- 8086/02c5
1480 06:51:15.922811 PCI: 00:19.0 cmd <- 02
1481 06:51:15.926730 PCI: 00:1d.0 bridge ctrl <- 0013
1482 06:51:15.929674 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 06:51:15.932709 PCI: 00:1d.0 cmd <- 06
1484 06:51:15.936310 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 06:51:15.939657 PCI: 00:1e.0 cmd <- 06
1486 06:51:15.942796 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 06:51:15.943315 PCI: 00:1e.2 cmd <- 06
1488 06:51:15.949761 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 06:51:15.950268 PCI: 00:1e.3 cmd <- 02
1490 06:51:15.952946 PCI: 00:1f.0 subsystem <- 8086/0284
1491 06:51:15.956850 PCI: 00:1f.0 cmd <- 407
1492 06:51:15.959849 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 06:51:15.963439 PCI: 00:1f.3 cmd <- 02
1494 06:51:15.966657 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 06:51:15.969384 PCI: 00:1f.4 cmd <- 03
1496 06:51:15.972805 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 06:51:15.975861 PCI: 00:1f.5 cmd <- 406
1498 06:51:15.984539 PCI: 01:00.0 cmd <- 02
1499 06:51:15.989642 done.
1500 06:51:15.998584 ME: Version: 14.0.39.1367
1501 06:51:16.004908 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1502 06:51:16.008616 Initializing devices...
1503 06:51:16.009226 Root Device init ...
1504 06:51:16.015087 Chrome EC: Set SMI mask to 0x0000000000000000
1505 06:51:16.018403 Chrome EC: clear events_b mask to 0x0000000000000000
1506 06:51:16.024677 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 06:51:16.031698 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 06:51:16.038176 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 06:51:16.041157 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 06:51:16.044769 Root Device init finished in 35300 usecs
1511 06:51:16.048640 CPU_CLUSTER: 0 init ...
1512 06:51:16.054956 CPU_CLUSTER: 0 init finished in 2449 usecs
1513 06:51:16.059016 PCI: 00:00.0 init ...
1514 06:51:16.062224 CPU TDP: 15 Watts
1515 06:51:16.065737 CPU PL2 = 64 Watts
1516 06:51:16.069528 PCI: 00:00.0 init finished in 7081 usecs
1517 06:51:16.072424 PCI: 00:02.0 init ...
1518 06:51:16.075626 PCI: 00:02.0 init finished in 2253 usecs
1519 06:51:16.079313 PCI: 00:08.0 init ...
1520 06:51:16.082008 PCI: 00:08.0 init finished in 2252 usecs
1521 06:51:16.085360 PCI: 00:12.0 init ...
1522 06:51:16.089417 PCI: 00:12.0 init finished in 2253 usecs
1523 06:51:16.092138 PCI: 00:14.0 init ...
1524 06:51:16.095329 PCI: 00:14.0 init finished in 2252 usecs
1525 06:51:16.099466 PCI: 00:14.2 init ...
1526 06:51:16.102331 PCI: 00:14.2 init finished in 2254 usecs
1527 06:51:16.105571 PCI: 00:14.3 init ...
1528 06:51:16.108662 PCI: 00:14.3 init finished in 2271 usecs
1529 06:51:16.112655 PCI: 00:15.0 init ...
1530 06:51:16.116125 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 06:51:16.119152 PCI: 00:15.0 init finished in 5979 usecs
1532 06:51:16.122048 PCI: 00:15.1 init ...
1533 06:51:16.125721 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 06:51:16.128722 PCI: 00:15.1 init finished in 5978 usecs
1535 06:51:16.132933 PCI: 00:16.0 init ...
1536 06:51:16.136033 PCI: 00:16.0 init finished in 2253 usecs
1537 06:51:16.139629 PCI: 00:19.0 init ...
1538 06:51:16.142845 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 06:51:16.149347 PCI: 00:19.0 init finished in 5978 usecs
1540 06:51:16.149860 PCI: 00:1d.0 init ...
1541 06:51:16.152654 Initializing PCH PCIe bridge.
1542 06:51:16.155900 PCI: 00:1d.0 init finished in 5277 usecs
1543 06:51:16.160743 PCI: 00:1f.0 init ...
1544 06:51:16.164083 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 06:51:16.170985 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 06:51:16.171531 IOAPIC: ID = 0x02
1547 06:51:16.174121 IOAPIC: Dumping registers
1548 06:51:16.177357 reg 0x0000: 0x02000000
1549 06:51:16.180536 reg 0x0001: 0x00770020
1550 06:51:16.180959 reg 0x0002: 0x00000000
1551 06:51:16.188221 PCI: 00:1f.0 init finished in 23554 usecs
1552 06:51:16.190944 PCI: 00:1f.4 init ...
1553 06:51:16.194308 PCI: 00:1f.4 init finished in 2264 usecs
1554 06:51:16.205663 PCI: 01:00.0 init ...
1555 06:51:16.208650 PCI: 01:00.0 init finished in 2254 usecs
1556 06:51:16.213132 PNP: 0c09.0 init ...
1557 06:51:16.215773 Google Chrome EC uptime: 11.073 seconds
1558 06:51:16.222596 Google Chrome AP resets since EC boot: 0
1559 06:51:16.226156 Google Chrome most recent AP reset causes:
1560 06:51:16.232972 Google Chrome EC reset flags at last EC boot: reset-pin
1561 06:51:16.236023 PNP: 0c09.0 init finished in 20567 usecs
1562 06:51:16.239884 Devices initialized
1563 06:51:16.240474 Show all devs... After init.
1564 06:51:16.243098 Root Device: enabled 1
1565 06:51:16.246046 CPU_CLUSTER: 0: enabled 1
1566 06:51:16.249428 DOMAIN: 0000: enabled 1
1567 06:51:16.249853 APIC: 00: enabled 1
1568 06:51:16.252475 PCI: 00:00.0: enabled 1
1569 06:51:16.255971 PCI: 00:02.0: enabled 1
1570 06:51:16.258925 PCI: 00:04.0: enabled 0
1571 06:51:16.259350 PCI: 00:05.0: enabled 0
1572 06:51:16.262253 PCI: 00:12.0: enabled 1
1573 06:51:16.266129 PCI: 00:12.5: enabled 0
1574 06:51:16.266832 PCI: 00:12.6: enabled 0
1575 06:51:16.269427 PCI: 00:14.0: enabled 1
1576 06:51:16.272328 PCI: 00:14.1: enabled 0
1577 06:51:16.275925 PCI: 00:14.3: enabled 1
1578 06:51:16.276394 PCI: 00:14.5: enabled 0
1579 06:51:16.279036 PCI: 00:15.0: enabled 1
1580 06:51:16.282020 PCI: 00:15.1: enabled 1
1581 06:51:16.285814 PCI: 00:15.2: enabled 0
1582 06:51:16.286274 PCI: 00:15.3: enabled 0
1583 06:51:16.289056 PCI: 00:16.0: enabled 1
1584 06:51:16.292163 PCI: 00:16.1: enabled 0
1585 06:51:16.295207 PCI: 00:16.2: enabled 0
1586 06:51:16.295626 PCI: 00:16.3: enabled 0
1587 06:51:16.299038 PCI: 00:16.4: enabled 0
1588 06:51:16.301769 PCI: 00:16.5: enabled 0
1589 06:51:16.305207 PCI: 00:17.0: enabled 1
1590 06:51:16.305437 PCI: 00:19.0: enabled 1
1591 06:51:16.308586 PCI: 00:19.1: enabled 0
1592 06:51:16.311748 PCI: 00:19.2: enabled 0
1593 06:51:16.311929 PCI: 00:1a.0: enabled 0
1594 06:51:16.314761 PCI: 00:1c.0: enabled 0
1595 06:51:16.318261 PCI: 00:1c.1: enabled 0
1596 06:51:16.321522 PCI: 00:1c.2: enabled 0
1597 06:51:16.321654 PCI: 00:1c.3: enabled 0
1598 06:51:16.325046 PCI: 00:1c.4: enabled 0
1599 06:51:16.328080 PCI: 00:1c.5: enabled 0
1600 06:51:16.332072 PCI: 00:1c.6: enabled 0
1601 06:51:16.332431 PCI: 00:1c.7: enabled 0
1602 06:51:16.335095 PCI: 00:1d.0: enabled 1
1603 06:51:16.338171 PCI: 00:1d.1: enabled 0
1604 06:51:16.341573 PCI: 00:1d.2: enabled 0
1605 06:51:16.341774 PCI: 00:1d.3: enabled 0
1606 06:51:16.344913 PCI: 00:1d.4: enabled 0
1607 06:51:16.348582 PCI: 00:1d.5: enabled 0
1608 06:51:16.348828 PCI: 00:1e.0: enabled 1
1609 06:51:16.351733 PCI: 00:1e.1: enabled 0
1610 06:51:16.355354 PCI: 00:1e.2: enabled 1
1611 06:51:16.358797 PCI: 00:1e.3: enabled 1
1612 06:51:16.359031 PCI: 00:1f.0: enabled 1
1613 06:51:16.361433 PCI: 00:1f.1: enabled 0
1614 06:51:16.364821 PCI: 00:1f.2: enabled 0
1615 06:51:16.367945 PCI: 00:1f.3: enabled 1
1616 06:51:16.368186 PCI: 00:1f.4: enabled 1
1617 06:51:16.371842 PCI: 00:1f.5: enabled 1
1618 06:51:16.374791 PCI: 00:1f.6: enabled 0
1619 06:51:16.378679 USB0 port 0: enabled 1
1620 06:51:16.378942 I2C: 01:15: enabled 1
1621 06:51:16.381620 I2C: 02:5d: enabled 1
1622 06:51:16.384768 GENERIC: 0.0: enabled 1
1623 06:51:16.385122 I2C: 03:1a: enabled 1
1624 06:51:16.387941 I2C: 03:38: enabled 1
1625 06:51:16.391702 I2C: 03:39: enabled 1
1626 06:51:16.392057 I2C: 03:3a: enabled 1
1627 06:51:16.394935 I2C: 03:3b: enabled 1
1628 06:51:16.398481 PCI: 00:00.0: enabled 1
1629 06:51:16.398897 SPI: 00: enabled 1
1630 06:51:16.401825 SPI: 01: enabled 1
1631 06:51:16.404601 PNP: 0c09.0: enabled 1
1632 06:51:16.405020 USB2 port 0: enabled 1
1633 06:51:16.408399 USB2 port 1: enabled 1
1634 06:51:16.411402 USB2 port 2: enabled 0
1635 06:51:16.411926 USB2 port 3: enabled 0
1636 06:51:16.414805 USB2 port 5: enabled 0
1637 06:51:16.417974 USB2 port 6: enabled 1
1638 06:51:16.421379 USB2 port 9: enabled 1
1639 06:51:16.421797 USB3 port 0: enabled 1
1640 06:51:16.424753 USB3 port 1: enabled 1
1641 06:51:16.427947 USB3 port 2: enabled 1
1642 06:51:16.428505 USB3 port 3: enabled 1
1643 06:51:16.431421 USB3 port 4: enabled 0
1644 06:51:16.435040 APIC: 02: enabled 1
1645 06:51:16.435483 APIC: 07: enabled 1
1646 06:51:16.438102 APIC: 01: enabled 1
1647 06:51:16.441305 APIC: 03: enabled 1
1648 06:51:16.441832 APIC: 04: enabled 1
1649 06:51:16.444698 APIC: 05: enabled 1
1650 06:51:16.445117 APIC: 06: enabled 1
1651 06:51:16.448339 PCI: 00:08.0: enabled 1
1652 06:51:16.451552 PCI: 00:14.2: enabled 1
1653 06:51:16.454867 PCI: 01:00.0: enabled 1
1654 06:51:16.458443 Disabling ACPI via APMC:
1655 06:51:16.458968 done.
1656 06:51:16.464314 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 06:51:16.467887 ELOG: NV offset 0xaf0000 size 0x4000
1658 06:51:16.475021 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 06:51:16.481817 ELOG: Event(17) added with size 13 at 2024-01-03 06:50:44 UTC
1660 06:51:16.487757 ELOG: Event(92) added with size 9 at 2024-01-03 06:50:44 UTC
1661 06:51:16.494602 ELOG: Event(93) added with size 9 at 2024-01-03 06:50:44 UTC
1662 06:51:16.501015 ELOG: Event(9A) added with size 9 at 2024-01-03 06:50:44 UTC
1663 06:51:16.507863 ELOG: Event(9E) added with size 10 at 2024-01-03 06:50:44 UTC
1664 06:51:16.514203 ELOG: Event(9F) added with size 14 at 2024-01-03 06:50:44 UTC
1665 06:51:16.517348 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1666 06:51:16.525005 ELOG: Event(A1) added with size 10 at 2024-01-03 06:50:44 UTC
1667 06:51:16.534631 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 06:51:16.541526 ELOG: Event(A0) added with size 9 at 2024-01-03 06:50:44 UTC
1669 06:51:16.544967 elog_add_boot_reason: Logged dev mode boot
1670 06:51:16.545388 Finalize devices...
1671 06:51:16.547747 PCI: 00:17.0 final
1672 06:51:16.551340 Devices finalized
1673 06:51:16.554828 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 06:51:16.561060 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 06:51:16.564609 ME: HFSTS1 : 0x90000245
1676 06:51:16.567709 ME: HFSTS2 : 0x3B850126
1677 06:51:16.574860 ME: HFSTS3 : 0x00000020
1678 06:51:16.577478 ME: HFSTS4 : 0x00004800
1679 06:51:16.581454 ME: HFSTS5 : 0x00000000
1680 06:51:16.584216 ME: HFSTS6 : 0x40400006
1681 06:51:16.588209 ME: Manufacturing Mode : NO
1682 06:51:16.591179 ME: FW Partition Table : OK
1683 06:51:16.594219 ME: Bringup Loader Failure : NO
1684 06:51:16.597869 ME: Firmware Init Complete : YES
1685 06:51:16.601365 ME: Boot Options Present : NO
1686 06:51:16.604593 ME: Update In Progress : NO
1687 06:51:16.607514 ME: D0i3 Support : YES
1688 06:51:16.611182 ME: Low Power State Enabled : NO
1689 06:51:16.614591 ME: CPU Replaced : NO
1690 06:51:16.617725 ME: CPU Replacement Valid : YES
1691 06:51:16.620809 ME: Current Working State : 5
1692 06:51:16.624147 ME: Current Operation State : 1
1693 06:51:16.627385 ME: Current Operation Mode : 0
1694 06:51:16.630653 ME: Error Code : 0
1695 06:51:16.634252 ME: CPU Debug Disabled : YES
1696 06:51:16.637878 ME: TXT Support : NO
1697 06:51:16.644446 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 06:51:16.647817 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 06:51:16.650884 CBFS @ c08000 size 3f8000
1700 06:51:16.657563 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 06:51:16.660366 CBFS: Locating 'fallback/dsdt.aml'
1702 06:51:16.663806 CBFS: Found @ offset 10bb80 size 3fa5
1703 06:51:16.671361 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 06:51:16.673939 CBFS @ c08000 size 3f8000
1705 06:51:16.677070 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 06:51:16.680165 CBFS: Locating 'fallback/slic'
1707 06:51:16.685235 CBFS: 'fallback/slic' not found.
1708 06:51:16.692222 ACPI: Writing ACPI tables at 99b3e000.
1709 06:51:16.692758 ACPI: * FACS
1710 06:51:16.695283 ACPI: * DSDT
1711 06:51:16.698462 Ramoops buffer: 0x100000@0x99a3d000.
1712 06:51:16.702489 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 06:51:16.708468 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 06:51:16.712295 Google Chrome EC: version:
1715 06:51:16.715412 ro: helios_v2.0.2659-56403530b
1716 06:51:16.718518 rw: helios_v2.0.2849-c41de27e7d
1717 06:51:16.719036 running image: 1
1718 06:51:16.722926 ACPI: * FADT
1719 06:51:16.723439 SCI is IRQ9
1720 06:51:16.729234 ACPI: added table 1/32, length now 40
1721 06:51:16.729763 ACPI: * SSDT
1722 06:51:16.732522 Found 1 CPU(s) with 8 core(s) each.
1723 06:51:16.735727 Error: Could not locate 'wifi_sar' in VPD.
1724 06:51:16.742700 Checking CBFS for default SAR values
1725 06:51:16.745474 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 06:51:16.749231 CBFS @ c08000 size 3f8000
1727 06:51:16.755600 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 06:51:16.759005 CBFS: Locating 'wifi_sar_defaults.hex'
1729 06:51:16.762134 CBFS: Found @ offset 5fac0 size 77
1730 06:51:16.765850 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 06:51:16.772422 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 06:51:16.776219 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 06:51:16.782505 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 06:51:16.785500 failed to find key in VPD: dsm_calib_r0_0
1735 06:51:16.795336 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 06:51:16.799115 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 06:51:16.802072 failed to find key in VPD: dsm_calib_r0_1
1738 06:51:16.811960 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 06:51:16.818905 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 06:51:16.822065 failed to find key in VPD: dsm_calib_r0_2
1741 06:51:16.831596 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 06:51:16.835812 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 06:51:16.842122 failed to find key in VPD: dsm_calib_r0_3
1744 06:51:16.848835 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 06:51:16.855507 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 06:51:16.858501 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 06:51:16.861621 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 06:51:16.865583 EC returned error result code 1
1749 06:51:16.869586 EC returned error result code 1
1750 06:51:16.873334 EC returned error result code 1
1751 06:51:16.880328 PS2K: Bad resp from EC. Vivaldi disabled!
1752 06:51:16.883477 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 06:51:16.889636 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 06:51:16.896346 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 06:51:16.899713 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 06:51:16.906307 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 06:51:16.913078 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 06:51:16.919637 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 06:51:16.923061 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 06:51:16.929390 ACPI: added table 2/32, length now 44
1761 06:51:16.930096 ACPI: * MCFG
1762 06:51:16.932487 ACPI: added table 3/32, length now 48
1763 06:51:16.936073 ACPI: * TPM2
1764 06:51:16.939546 TPM2 log created at 99a2d000
1765 06:51:16.942460 ACPI: added table 4/32, length now 52
1766 06:51:16.942879 ACPI: * MADT
1767 06:51:16.946250 SCI is IRQ9
1768 06:51:16.949521 ACPI: added table 5/32, length now 56
1769 06:51:16.949963 current = 99b43ac0
1770 06:51:16.952612 ACPI: * DMAR
1771 06:51:16.955790 ACPI: added table 6/32, length now 60
1772 06:51:16.959314 ACPI: * IGD OpRegion
1773 06:51:16.959835 GMA: Found VBT in CBFS
1774 06:51:16.962691 GMA: Found valid VBT in CBFS
1775 06:51:16.965756 ACPI: added table 7/32, length now 64
1776 06:51:16.969539 ACPI: * HPET
1777 06:51:16.972346 ACPI: added table 8/32, length now 68
1778 06:51:16.972786 ACPI: done.
1779 06:51:16.975951 ACPI tables: 31744 bytes.
1780 06:51:16.979689 smbios_write_tables: 99a2c000
1781 06:51:16.982527 EC returned error result code 3
1782 06:51:16.985940 Couldn't obtain OEM name from CBI
1783 06:51:16.989535 Create SMBIOS type 17
1784 06:51:16.992975 PCI: 00:00.0 (Intel Cannonlake)
1785 06:51:16.996335 PCI: 00:14.3 (Intel WiFi)
1786 06:51:16.999378 SMBIOS tables: 939 bytes.
1787 06:51:17.002559 Writing table forward entry at 0x00000500
1788 06:51:17.009455 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 06:51:17.012427 Writing coreboot table at 0x99b62000
1790 06:51:17.019410 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 06:51:17.022617 1. 0000000000001000-000000000009ffff: RAM
1792 06:51:17.025770 2. 00000000000a0000-00000000000fffff: RESERVED
1793 06:51:17.032628 3. 0000000000100000-0000000099a2bfff: RAM
1794 06:51:17.035727 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 06:51:17.042314 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 06:51:17.048796 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 06:51:17.052322 7. 000000009a000000-000000009f7fffff: RESERVED
1798 06:51:17.058992 8. 00000000e0000000-00000000efffffff: RESERVED
1799 06:51:17.062110 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 06:51:17.065262 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 06:51:17.072239 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 06:51:17.075252 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 06:51:17.081545 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 06:51:17.084964 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 06:51:17.092110 15. 0000000100000000-000000045e7fffff: RAM
1806 06:51:17.095210 Graphics framebuffer located at 0xc0000000
1807 06:51:17.098188 Passing 5 GPIOs to payload:
1808 06:51:17.102256 NAME | PORT | POLARITY | VALUE
1809 06:51:17.108302 write protect | undefined | high | low
1810 06:51:17.112144 lid | undefined | high | high
1811 06:51:17.118188 power | undefined | high | low
1812 06:51:17.125261 oprom | undefined | high | low
1813 06:51:17.128405 EC in RW | 0x000000cb | high | low
1814 06:51:17.131634 Board ID: 4
1815 06:51:17.135113 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 06:51:17.138097 CBFS @ c08000 size 3f8000
1817 06:51:17.144834 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 06:51:17.147949 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1819 06:51:17.151415 coreboot table: 1492 bytes.
1820 06:51:17.154886 IMD ROOT 0. 99fff000 00001000
1821 06:51:17.158403 IMD SMALL 1. 99ffe000 00001000
1822 06:51:17.161637 FSP MEMORY 2. 99c4e000 003b0000
1823 06:51:17.165249 CONSOLE 3. 99c2e000 00020000
1824 06:51:17.167942 FMAP 4. 99c2d000 0000054e
1825 06:51:17.171353 TIME STAMP 5. 99c2c000 00000910
1826 06:51:17.174776 VBOOT WORK 6. 99c18000 00014000
1827 06:51:17.178220 MRC DATA 7. 99c16000 00001958
1828 06:51:17.181537 ROMSTG STCK 8. 99c15000 00001000
1829 06:51:17.185083 AFTER CAR 9. 99c0b000 0000a000
1830 06:51:17.188171 RAMSTAGE 10. 99baf000 0005c000
1831 06:51:17.191474 REFCODE 11. 99b7a000 00035000
1832 06:51:17.194740 SMM BACKUP 12. 99b6a000 00010000
1833 06:51:17.198133 COREBOOT 13. 99b62000 00008000
1834 06:51:17.201482 ACPI 14. 99b3e000 00024000
1835 06:51:17.204777 ACPI GNVS 15. 99b3d000 00001000
1836 06:51:17.207873 RAMOOPS 16. 99a3d000 00100000
1837 06:51:17.211537 TPM2 TCGLOG17. 99a2d000 00010000
1838 06:51:17.214619 SMBIOS 18. 99a2c000 00000800
1839 06:51:17.218384 IMD small region:
1840 06:51:17.221572 IMD ROOT 0. 99ffec00 00000400
1841 06:51:17.224884 FSP RUNTIME 1. 99ffebe0 00000004
1842 06:51:17.228322 EC HOSTEVENT 2. 99ffebc0 00000008
1843 06:51:17.231746 POWER STATE 3. 99ffeb80 00000040
1844 06:51:17.234696 ROMSTAGE 4. 99ffeb60 00000004
1845 06:51:17.237825 MEM INFO 5. 99ffe9a0 000001b9
1846 06:51:17.241380 VPD 6. 99ffe920 0000006c
1847 06:51:17.244506 MTRR: Physical address space:
1848 06:51:17.251650 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 06:51:17.257721 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 06:51:17.264681 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 06:51:17.270929 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 06:51:17.277544 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 06:51:17.284216 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 06:51:17.287885 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 06:51:17.294069 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 06:51:17.297385 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 06:51:17.300673 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 06:51:17.304053 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 06:51:17.310723 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 06:51:17.313936 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 06:51:17.317203 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 06:51:17.320352 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 06:51:17.327356 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 06:51:17.330726 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 06:51:17.333699 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 06:51:17.337211 call enable_fixed_mtrr()
1867 06:51:17.340306 CPU physical address size: 39 bits
1868 06:51:17.343677 MTRR: default type WB/UC MTRR counts: 6/8.
1869 06:51:17.350607 MTRR: WB selected as default type.
1870 06:51:17.353704 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 06:51:17.360724 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 06:51:17.366931 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 06:51:17.373663 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 06:51:17.380471 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 06:51:17.386506 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 06:51:17.390221 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 06:51:17.396783 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 06:51:17.400302 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 06:51:17.403382 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 06:51:17.406290 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 06:51:17.409928 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 06:51:17.416966 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 06:51:17.419931 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 06:51:17.423192 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 06:51:17.426493 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 06:51:17.433378 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 06:51:17.433899
1888 06:51:17.434238 MTRR check
1889 06:51:17.436240 Fixed MTRRs : Enabled
1890 06:51:17.439230 Variable MTRRs: Enabled
1891 06:51:17.439668
1892 06:51:17.442747 call enable_fixed_mtrr()
1893 06:51:17.446120 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 06:51:17.470842 CPU physical address size: 39 bits
1895 06:51:17.471358 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 06:51:17.471705 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 06:51:17.472027 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 06:51:17.472485 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 06:51:17.473156 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 06:51:17.475892 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 06:51:17.479098 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 06:51:17.485566 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 06:51:17.488967 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 06:51:17.492300 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 06:51:17.495568 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 06:51:17.502835 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 06:51:17.505450 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 06:51:17.508575 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 06:51:17.512682 call enable_fixed_mtrr()
1910 06:51:17.515594 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 06:51:17.518572 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 06:51:17.525112 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 06:51:17.528951 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 06:51:17.531890 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 06:51:17.535215 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 06:51:17.541639 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 06:51:17.545139 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 06:51:17.549145 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 06:51:17.551664 CPU physical address size: 39 bits
1920 06:51:17.554629 call enable_fixed_mtrr()
1921 06:51:17.558273 CBFS @ c08000 size 3f8000
1922 06:51:17.564756 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1923 06:51:17.568157 CBFS: Locating 'fallback/payload'
1924 06:51:17.571272 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 06:51:17.574644 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 06:51:17.578116 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 06:51:17.584943 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 06:51:17.587983 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 06:51:17.591177 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 06:51:17.594261 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 06:51:17.597211 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 06:51:17.604106 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 06:51:17.607391 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 06:51:17.610826 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 06:51:17.613744 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 06:51:17.620525 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 06:51:17.623867 call enable_fixed_mtrr()
1938 06:51:17.627039 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 06:51:17.630626 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 06:51:17.633899 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 06:51:17.636909 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 06:51:17.643716 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 06:51:17.647468 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 06:51:17.650317 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 06:51:17.653358 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 06:51:17.660552 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 06:51:17.664031 CPU physical address size: 39 bits
1948 06:51:17.666849 call enable_fixed_mtrr()
1949 06:51:17.670611 CBFS: Found @ offset 1c96c0 size 3f798
1950 06:51:17.673583 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 06:51:17.677164 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 06:51:17.683198 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 06:51:17.687273 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 06:51:17.689858 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 06:51:17.693381 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 06:51:17.699868 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 06:51:17.703131 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 06:51:17.706364 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 06:51:17.710000 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 06:51:17.713229 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 06:51:17.719905 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 06:51:17.723453 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 06:51:17.726507 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 06:51:17.732799 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 06:51:17.736484 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 06:51:17.739280 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 06:51:17.742912 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 06:51:17.746587 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 06:51:17.752644 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 06:51:17.756295 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 06:51:17.759394 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 06:51:17.762975 call enable_fixed_mtrr()
1973 06:51:17.766133 call enable_fixed_mtrr()
1974 06:51:17.769167 CPU physical address size: 39 bits
1975 06:51:17.772710 CPU physical address size: 39 bits
1976 06:51:17.776431 CPU physical address size: 39 bits
1977 06:51:17.779137 CPU physical address size: 39 bits
1978 06:51:17.782585 Checking segment from ROM address 0xffdd16f8
1979 06:51:17.789351 Checking segment from ROM address 0xffdd1714
1980 06:51:17.792725 Loading segment from ROM address 0xffdd16f8
1981 06:51:17.796136 code (compression=0)
1982 06:51:17.802636 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 06:51:17.812404 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 06:51:17.816085 it's not compressed!
1985 06:51:17.907079 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 06:51:17.913145 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 06:51:17.916947 Loading segment from ROM address 0xffdd1714
1988 06:51:17.919819 Entry Point 0x30000000
1989 06:51:17.923126 Loaded segments
1990 06:51:17.928514 Finalizing chipset.
1991 06:51:17.931845 Finalizing SMM.
1992 06:51:17.935558 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1993 06:51:17.938704 mp_park_aps done after 0 msecs.
1994 06:51:17.945383 Jumping to boot code at 30000000(99b62000)
1995 06:51:17.952097 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 06:51:17.952193
1997 06:51:17.952276
1998 06:51:17.952345
1999 06:51:17.955344 Starting depthcharge on Helios...
2000 06:51:17.955436
2001 06:51:17.955797 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 06:51:17.955905 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 06:51:17.955999 Setting prompt string to ['hatch:']
2004 06:51:17.956088 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 06:51:17.965324 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 06:51:17.965419
2007 06:51:17.971907 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 06:51:17.972000
2009 06:51:17.978362 board_setup: Info: eMMC controller not present; skipping
2010 06:51:17.978455
2011 06:51:17.981701 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 06:51:17.981793
2013 06:51:17.988121 board_setup: Info: SDHCI controller not present; skipping
2014 06:51:17.988214
2015 06:51:17.994591 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 06:51:17.994687
2017 06:51:17.994760 Wipe memory regions:
2018 06:51:17.994828
2019 06:51:17.998305 [0x00000000001000, 0x000000000a0000)
2020 06:51:17.998399
2021 06:51:18.001186 [0x00000000100000, 0x00000030000000)
2022 06:51:18.067621
2023 06:51:18.071140 [0x00000030657430, 0x00000099a2c000)
2024 06:51:18.217762
2025 06:51:18.221051 [0x00000100000000, 0x0000045e800000)
2026 06:51:19.677771
2027 06:51:19.678284 R8152: Initializing
2028 06:51:19.678621
2029 06:51:19.681069 Version 9 (ocp_data = 6010)
2030 06:51:19.685242
2031 06:51:19.685814 R8152: Done initializing
2032 06:51:19.686178
2033 06:51:19.688445 Adding net device
2034 06:51:20.171758
2035 06:51:20.172362 R8152: Initializing
2036 06:51:20.172894
2037 06:51:20.174471 Version 6 (ocp_data = 5c30)
2038 06:51:20.174996
2039 06:51:20.177472 R8152: Done initializing
2040 06:51:20.177988
2041 06:51:20.180968 net_add_device: Attemp to include the same device
2042 06:51:20.184681
2043 06:51:20.192021 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 06:51:20.192649
2045 06:51:20.193168
2046 06:51:20.193685
2047 06:51:20.194716 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 06:51:20.296189 hatch: tftpboot 192.168.201.1 12434513/tftp-deploy-3at_gv9c/kernel/bzImage 12434513/tftp-deploy-3at_gv9c/kernel/cmdline 12434513/tftp-deploy-3at_gv9c/ramdisk/ramdisk.cpio.gz
2050 06:51:20.296532 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 06:51:20.296709 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 06:51:20.301023 tftpboot 192.168.201.1 12434513/tftp-deploy-3at_gv9c/kernel/bzIploy-3at_gv9c/kernel/cmdline 12434513/tftp-deploy-3at_gv9c/ramdisk/ramdisk.cpio.gz
2053 06:51:20.301233
2054 06:51:20.301351 Waiting for link
2055 06:51:20.502783
2056 06:51:20.503346 done.
2057 06:51:20.503815
2058 06:51:20.504231 MAC: 00:24:32:50:1a:59
2059 06:51:20.504675
2060 06:51:20.505429 Sending DHCP discover... done.
2061 06:51:20.505787
2062 06:51:20.508898 Waiting for reply... done.
2063 06:51:20.509447
2064 06:51:20.512384 Sending DHCP request... done.
2065 06:51:20.512840
2066 06:51:20.515369 Waiting for reply... done.
2067 06:51:20.515798
2068 06:51:20.518896 My ip is 192.168.201.14
2069 06:51:20.519429
2070 06:51:20.522376 The DHCP server ip is 192.168.201.1
2071 06:51:20.522807
2072 06:51:20.529204 TFTP server IP predefined by user: 192.168.201.1
2073 06:51:20.529741
2074 06:51:20.535482 Bootfile predefined by user: 12434513/tftp-deploy-3at_gv9c/kernel/bzImage
2075 06:51:20.536049
2076 06:51:20.538300 Sending tftp read request... done.
2077 06:51:20.538753
2078 06:51:20.546750 Waiting for the transfer...
2079 06:51:20.547309
2080 06:51:21.207644 00000000 ################################################################
2081 06:51:21.208325
2082 06:51:21.867282 00080000 ################################################################
2083 06:51:21.867828
2084 06:51:22.461381 00100000 ################################################################
2085 06:51:22.461537
2086 06:51:23.123672 00180000 ################################################################
2087 06:51:23.124194
2088 06:51:23.783602 00200000 ################################################################
2089 06:51:23.784120
2090 06:51:24.413484 00280000 ################################################################
2091 06:51:24.413647
2092 06:51:25.016795 00300000 ################################################################
2093 06:51:25.017317
2094 06:51:25.699336 00380000 ################################################################
2095 06:51:25.699852
2096 06:51:26.379585 00400000 ################################################################
2097 06:51:26.380102
2098 06:51:27.056225 00480000 ################################################################
2099 06:51:27.056769
2100 06:51:27.726514 00500000 ################################################################
2101 06:51:27.727035
2102 06:51:28.404751 00580000 ################################################################
2103 06:51:28.405522
2104 06:51:29.017966 00600000 ################################################################
2105 06:51:29.018130
2106 06:51:29.597309 00680000 ################################################################
2107 06:51:29.597492
2108 06:51:30.197596 00700000 ################################################################
2109 06:51:30.197783
2110 06:51:30.789931 00780000 ################################################################
2111 06:51:30.790090
2112 06:51:31.003928 00800000 ####################### done.
2113 06:51:31.004076
2114 06:51:31.007673 The bootfile was 8576912 bytes long.
2115 06:51:31.007774
2116 06:51:31.011087 Sending tftp read request... done.
2117 06:51:31.011272
2118 06:51:31.013768 Waiting for the transfer...
2119 06:51:31.013953
2120 06:51:31.692684 00000000 ################################################################
2121 06:51:31.693215
2122 06:51:32.361737 00080000 ################################################################
2123 06:51:32.362237
2124 06:51:33.057835 00100000 ################################################################
2125 06:51:33.058342
2126 06:51:33.760235 00180000 ################################################################
2127 06:51:33.760784
2128 06:51:34.458290 00200000 ################################################################
2129 06:51:34.458880
2130 06:51:35.148355 00280000 ################################################################
2131 06:51:35.148907
2132 06:51:35.829364 00300000 ################################################################
2133 06:51:35.830110
2134 06:51:36.533830 00380000 ################################################################
2135 06:51:36.534360
2136 06:51:37.184606 00400000 ################################################################
2137 06:51:37.185159
2138 06:51:37.861661 00480000 ################################################################
2139 06:51:37.862175
2140 06:51:38.544068 00500000 ################################################################
2141 06:51:38.544607
2142 06:51:38.849160 00580000 ############################# done.
2143 06:51:38.849750
2144 06:51:38.852662 Sending tftp read request... done.
2145 06:51:38.853078
2146 06:51:38.855631 Waiting for the transfer...
2147 06:51:38.856057
2148 06:51:38.856440 00000000 # done.
2149 06:51:38.856778
2150 06:51:38.866344 Command line loaded dynamically from TFTP file: 12434513/tftp-deploy-3at_gv9c/kernel/cmdline
2151 06:51:38.866896
2152 06:51:38.895779 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12434513/extract-nfsrootfs-zgn172n2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 06:51:38.896396
2154 06:51:38.902590 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 06:51:38.905850
2156 06:51:38.909391 Shutting down all USB controllers.
2157 06:51:38.909970
2158 06:51:38.910326 Removing current net device
2159 06:51:38.913401
2160 06:51:38.913916 Finalizing coreboot
2161 06:51:38.914266
2162 06:51:38.920305 Exiting depthcharge with code 4 at timestamp: 28303810
2163 06:51:38.920845
2164 06:51:38.921192
2165 06:51:38.921548 Starting kernel ...
2166 06:51:38.921978
2167 06:51:38.922431
2168 06:51:38.923619 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2169 06:51:38.924104 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2170 06:51:38.924530 Setting prompt string to ['Linux version [0-9]']
2171 06:51:38.924882 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 06:51:38.925230 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 06:55:59.924360 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2176 06:55:59.924598 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2178 06:55:59.924774 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 06:55:59.925071 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 06:55:59.925318 Cleaning after the job
2184 06:55:59.925422 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/ramdisk
2185 06:55:59.926429 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/kernel
2186 06:55:59.927868 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/nfsrootfs
2187 06:56:00.052610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434513/tftp-deploy-3at_gv9c/modules
2188 06:56:00.053126 start: 4.1 power-off (timeout 00:00:30) [common]
2189 06:56:00.053333 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2190 06:56:00.133089 >> Command sent successfully.
2191 06:56:00.136205 Returned 0 in 0 seconds
2192 06:56:00.236646 end: 4.1 power-off (duration 00:00:00) [common]
2194 06:56:00.237157 start: 4.2 read-feedback (timeout 00:10:00) [common]
2195 06:56:00.237484 Listened to connection for namespace 'common' for up to 1s
2197 06:56:00.237911 Listened to connection for namespace 'common' for up to 1s
2198 06:56:01.238427 Finalising connection for namespace 'common'
2199 06:56:01.238615 Disconnecting from shell: Finalise
2200 06:56:01.238702
2201 06:56:01.339030 end: 4.2 read-feedback (duration 00:00:01) [common]
2202 06:56:01.339193 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12434513
2203 06:56:01.896897 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12434513
2204 06:56:01.897139 JobError: Your job cannot terminate cleanly.