Boot log: acer-cbv514-1h-34uz-brya

    1 13:46:49.816643  lava-dispatcher, installed at version: 2024.01
    2 13:46:49.816814  start: 0 validate
    3 13:46:49.816915  Start time: 2024-05-08 13:46:49.816908+00:00 (UTC)
    4 13:46:49.817021  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:46:49.817136  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 13:46:50.085865  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:46:50.086400  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2482-gc729d2d07124%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:46:50.345974  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:46:50.346660  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2482-gc729d2d07124%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:46:58.818602  validate duration: 9.00
   12 13:46:58.818861  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:46:58.818953  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:46:58.819042  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:46:58.819182  Not decompressing ramdisk as can be used compressed.
   16 13:46:58.819257  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 13:46:58.819307  saving as /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/ramdisk/rootfs.cpio.gz
   18 13:46:58.819357  total size: 8417901 (8 MB)
   19 13:46:59.465957  progress   0 % (0 MB)
   20 13:46:59.467722  progress   5 % (0 MB)
   21 13:46:59.471364  progress  10 % (0 MB)
   22 13:46:59.472899  progress  15 % (1 MB)
   23 13:46:59.474385  progress  20 % (1 MB)
   24 13:46:59.475928  progress  25 % (2 MB)
   25 13:46:59.477513  progress  30 % (2 MB)
   26 13:46:59.478902  progress  35 % (2 MB)
   27 13:46:59.480399  progress  40 % (3 MB)
   28 13:46:59.481866  progress  45 % (3 MB)
   29 13:46:59.483398  progress  50 % (4 MB)
   30 13:46:59.484886  progress  55 % (4 MB)
   31 13:46:59.486352  progress  60 % (4 MB)
   32 13:46:59.487675  progress  65 % (5 MB)
   33 13:46:59.489198  progress  70 % (5 MB)
   34 13:46:59.490628  progress  75 % (6 MB)
   35 13:46:59.492064  progress  80 % (6 MB)
   36 13:46:59.493580  progress  85 % (6 MB)
   37 13:46:59.495023  progress  90 % (7 MB)
   38 13:46:59.496480  progress  95 % (7 MB)
   39 13:46:59.497889  progress 100 % (8 MB)
   40 13:46:59.498105  8 MB downloaded in 0.68 s (11.83 MB/s)
   41 13:46:59.498266  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 13:46:59.498490  end: 1.1 download-retry (duration 00:00:01) [common]
   44 13:46:59.498554  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 13:46:59.498613  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 13:46:59.498741  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2482-gc729d2d07124/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 13:46:59.498798  saving as /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/kernel/bzImage
   48 13:46:59.498842  total size: 14122896 (13 MB)
   49 13:46:59.498887  No compression specified
   50 13:46:59.499840  progress   0 % (0 MB)
   51 13:46:59.502431  progress   5 % (0 MB)
   52 13:46:59.504929  progress  10 % (1 MB)
   53 13:46:59.507345  progress  15 % (2 MB)
   54 13:46:59.509921  progress  20 % (2 MB)
   55 13:46:59.512326  progress  25 % (3 MB)
   56 13:46:59.514802  progress  30 % (4 MB)
   57 13:46:59.517245  progress  35 % (4 MB)
   58 13:46:59.519765  progress  40 % (5 MB)
   59 13:46:59.522146  progress  45 % (6 MB)
   60 13:46:59.524718  progress  50 % (6 MB)
   61 13:46:59.527195  progress  55 % (7 MB)
   62 13:46:59.529603  progress  60 % (8 MB)
   63 13:46:59.532110  progress  65 % (8 MB)
   64 13:46:59.534484  progress  70 % (9 MB)
   65 13:46:59.536987  progress  75 % (10 MB)
   66 13:46:59.539341  progress  80 % (10 MB)
   67 13:46:59.541804  progress  85 % (11 MB)
   68 13:46:59.544118  progress  90 % (12 MB)
   69 13:46:59.546658  progress  95 % (12 MB)
   70 13:46:59.549028  progress 100 % (13 MB)
   71 13:46:59.549226  13 MB downloaded in 0.05 s (267.34 MB/s)
   72 13:46:59.549379  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:46:59.549594  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:46:59.549688  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 13:46:59.549777  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 13:46:59.549890  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2482-gc729d2d07124/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 13:46:59.549943  saving as /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/modules/modules.tar
   79 13:46:59.549986  total size: 483852 (0 MB)
   80 13:46:59.550031  Using unxz to decompress xz
   81 13:46:59.551252  progress   6 % (0 MB)
   82 13:46:59.551445  progress  13 % (0 MB)
   83 13:46:59.551621  progress  20 % (0 MB)
   84 13:46:59.553224  progress  27 % (0 MB)
   85 13:46:59.554790  progress  33 % (0 MB)
   86 13:46:59.556298  progress  40 % (0 MB)
   87 13:46:59.557853  progress  47 % (0 MB)
   88 13:46:59.559361  progress  54 % (0 MB)
   89 13:46:59.560947  progress  60 % (0 MB)
   90 13:46:59.562332  progress  67 % (0 MB)
   91 13:46:59.563772  progress  74 % (0 MB)
   92 13:46:59.565347  progress  81 % (0 MB)
   93 13:46:59.566721  progress  88 % (0 MB)
   94 13:46:59.568281  progress  94 % (0 MB)
   95 13:46:59.569830  progress 100 % (0 MB)
   96 13:46:59.574438  0 MB downloaded in 0.02 s (18.88 MB/s)
   97 13:46:59.574601  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 13:46:59.574797  end: 1.3 download-retry (duration 00:00:00) [common]
  100 13:46:59.574866  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 13:46:59.574935  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 13:46:59.574997  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 13:46:59.575059  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 13:46:59.575216  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1
  105 13:46:59.575310  makedir: /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin
  106 13:46:59.575389  makedir: /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/tests
  107 13:46:59.575462  makedir: /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/results
  108 13:46:59.575535  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-add-keys
  109 13:46:59.575634  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-add-sources
  110 13:46:59.575726  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-background-process-start
  111 13:46:59.575815  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-background-process-stop
  112 13:46:59.575912  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-common-functions
  113 13:46:59.576020  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-echo-ipv4
  114 13:46:59.576126  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-install-packages
  115 13:46:59.576213  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-installed-packages
  116 13:46:59.576300  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-os-build
  117 13:46:59.576388  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-probe-channel
  118 13:46:59.576476  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-probe-ip
  119 13:46:59.576562  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-target-ip
  120 13:46:59.576676  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-target-mac
  121 13:46:59.576763  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-target-storage
  122 13:46:59.576852  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-case
  123 13:46:59.576938  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-event
  124 13:46:59.577025  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-feedback
  125 13:46:59.577111  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-raise
  126 13:46:59.577200  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-reference
  127 13:46:59.577287  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-runner
  128 13:46:59.577372  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-set
  129 13:46:59.577462  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-test-shell
  130 13:46:59.577550  Updating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-install-packages (oe)
  131 13:46:59.577662  Updating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/bin/lava-installed-packages (oe)
  132 13:46:59.577748  Creating /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/environment
  133 13:46:59.577825  LAVA metadata
  134 13:46:59.577880  - LAVA_JOB_ID=13693411
  135 13:46:59.577926  - LAVA_DISPATCHER_IP=192.168.201.1
  136 13:46:59.577999  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 13:46:59.578048  skipped lava-vland-overlay
  138 13:46:59.578101  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 13:46:59.578159  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 13:46:59.578204  skipped lava-multinode-overlay
  141 13:46:59.578256  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 13:46:59.578312  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 13:46:59.578361  Loading test definitions
  144 13:46:59.578422  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 13:46:59.578471  Using /lava-13693411 at stage 0
  146 13:46:59.578707  uuid=13693411_1.4.2.3.1 testdef=None
  147 13:46:59.578772  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 13:46:59.578830  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 13:46:59.579188  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 13:46:59.579347  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 13:46:59.579815  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 13:46:59.579980  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 13:46:59.580415  runner path: /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/0/tests/0_dmesg test_uuid 13693411_1.4.2.3.1
  156 13:46:59.580527  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 13:46:59.580700  Creating lava-test-runner.conf files
  159 13:46:59.580744  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13693411/lava-overlay-0lnndbf1/lava-13693411/0 for stage 0
  160 13:46:59.580808  - 0_dmesg
  161 13:46:59.580881  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 13:46:59.580943  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  163 13:46:59.585667  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 13:46:59.585752  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  165 13:46:59.585821  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 13:46:59.585884  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 13:46:59.585946  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  168 13:46:59.747464  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  169 13:46:59.747637  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  170 13:46:59.747724  extracting modules file /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13693411/extract-overlay-ramdisk-h1sagakx/ramdisk
  171 13:46:59.757451  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 13:46:59.757541  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  173 13:46:59.757604  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13693411/compress-overlay-gjiiobbg/overlay-1.4.2.4.tar.gz to ramdisk
  174 13:46:59.757652  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13693411/compress-overlay-gjiiobbg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13693411/extract-overlay-ramdisk-h1sagakx/ramdisk
  175 13:46:59.762054  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 13:46:59.762139  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  177 13:46:59.762205  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 13:46:59.762265  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  179 13:46:59.762316  Building ramdisk /var/lib/lava/dispatcher/tmp/13693411/extract-overlay-ramdisk-h1sagakx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13693411/extract-overlay-ramdisk-h1sagakx/ramdisk
  180 13:46:59.817609  >> 51653 blocks

  181 13:47:00.596862  rename /var/lib/lava/dispatcher/tmp/13693411/extract-overlay-ramdisk-h1sagakx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/ramdisk/ramdisk.cpio.gz
  182 13:47:00.597040  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  183 13:47:00.597126  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  184 13:47:00.597199  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  185 13:47:00.597263  No mkimage arch provided, not using FIT.
  186 13:47:00.597328  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 13:47:00.597399  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 13:47:00.597469  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  189 13:47:00.597537  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  190 13:47:00.597591  No LXC device requested
  191 13:47:00.597653  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 13:47:00.597717  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  193 13:47:00.597781  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 13:47:00.597834  Checking files for TFTP limit of 4294967296 bytes.
  195 13:47:00.598105  end: 1 tftp-deploy (duration 00:00:02) [common]
  196 13:47:00.598174  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 13:47:00.598242  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 13:47:00.598361  substitutions:
  199 13:47:00.598429  - {DTB}: None
  200 13:47:00.598474  - {INITRD}: 13693411/tftp-deploy-zfu_pu3r/ramdisk/ramdisk.cpio.gz
  201 13:47:00.598516  - {KERNEL}: 13693411/tftp-deploy-zfu_pu3r/kernel/bzImage
  202 13:47:00.598557  - {LAVA_MAC}: None
  203 13:47:00.598597  - {PRESEED_CONFIG}: None
  204 13:47:00.598637  - {PRESEED_LOCAL}: None
  205 13:47:00.598677  - {RAMDISK}: 13693411/tftp-deploy-zfu_pu3r/ramdisk/ramdisk.cpio.gz
  206 13:47:00.598724  - {ROOT_PART}: None
  207 13:47:00.598766  - {ROOT}: None
  208 13:47:00.598805  - {SERVER_IP}: 192.168.201.1
  209 13:47:00.598845  - {TEE}: None
  210 13:47:00.598885  Parsed boot commands:
  211 13:47:00.598923  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 13:47:00.599041  Parsed boot commands: tftpboot 192.168.201.1 13693411/tftp-deploy-zfu_pu3r/kernel/bzImage 13693411/tftp-deploy-zfu_pu3r/kernel/cmdline 13693411/tftp-deploy-zfu_pu3r/ramdisk/ramdisk.cpio.gz
  213 13:47:00.599111  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 13:47:00.599171  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 13:47:00.599241  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 13:47:00.599314  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 13:47:00.599363  Not connected, no need to disconnect.
  218 13:47:00.599417  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 13:47:00.599472  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 13:47:00.599517  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
  221 13:47:00.602607  Setting prompt string to ['lava-test: # ']
  222 13:47:00.602842  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 13:47:00.602934  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 13:47:00.603011  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 13:47:00.603076  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 13:47:00.603219  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
  227 13:47:05.740109  >> Command sent successfully.

  228 13:47:05.750253  Returned 0 in 5 seconds
  229 13:47:05.851207  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 13:47:05.852229  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 13:47:05.852570  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 13:47:05.852938  Setting prompt string to 'Starting depthcharge on Volmar...'
  234 13:47:05.853236  Changing prompt to 'Starting depthcharge on Volmar...'
  235 13:47:05.853491  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  236 13:47:05.854253  [Enter `^Ec?' for help]

  237 13:47:07.218682  

  238 13:47:07.219102  

  239 13:47:07.226205  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  240 13:47:07.229652  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  241 13:47:07.233624  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  242 13:47:07.240224  CPU: AES supported, TXT NOT supported, VT supported

  243 13:47:07.246855  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  244 13:47:07.249546  Cache size = 10 MiB

  245 13:47:07.253428  MCH: device id 4609 (rev 04) is Alderlake-P

  246 13:47:07.260224  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  247 13:47:07.263180  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  248 13:47:07.266450  VBOOT: Loading verstage.

  249 13:47:07.270675  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  250 13:47:07.274595  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  251 13:47:07.281766  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  252 13:47:07.289104  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  253 13:47:07.295509  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  254 13:47:07.299606  

  255 13:47:07.300026  

  256 13:47:07.306169  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  257 13:47:07.312915  Probing TPM I2C: I2C bus 1 version 0x3230302a

  258 13:47:07.316179  DW I2C bus 1 at 0xfe022000 (400 KHz)

  259 13:47:07.319627  I2C TX abort detected (00000001)

  260 13:47:07.322726  cr50_i2c_read: Address write failed

  261 13:47:07.334880  .done! DID_VID 0x00281ae0

  262 13:47:07.338498  TPM ready after 0 ms

  263 13:47:07.342799  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  264 13:47:07.355553  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  265 13:47:07.362169  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  266 13:47:07.423756  tlcl_send_startup: Startup return code is 0

  267 13:47:07.423878  TPM: setup succeeded

  268 13:47:07.446012  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  269 13:47:07.469816  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  270 13:47:07.472527  Chrome EC: UHEPI supported

  271 13:47:07.476010  Reading cr50 boot mode

  272 13:47:07.491640  Cr50 says boot_mode is VERIFIED_RW(0x00).

  273 13:47:07.492072  Phase 1

  274 13:47:07.498186  FMAP: area GBB found @ 1805000 (458752 bytes)

  275 13:47:07.504471  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  276 13:47:07.511123  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  277 13:47:07.517752  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 13:47:07.521013  Phase 2

  279 13:47:07.521370  Phase 3

  280 13:47:07.524433  FMAP: area GBB found @ 1805000 (458752 bytes)

  281 13:47:07.531467  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  282 13:47:07.533995  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  283 13:47:07.541037  VB2:vb2_verify_keyblock() Checking keyblock signature...

  284 13:47:07.547999  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  285 13:47:07.554263  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  286 13:47:07.557113  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  287 13:47:07.572885  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  288 13:47:07.575422  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  289 13:47:07.582585  VB2:vb2_verify_fw_preamble() Verifying preamble.

  290 13:47:07.588705  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  291 13:47:07.591618  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  292 13:47:07.599111  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  293 13:47:07.602981  Phase 4

  294 13:47:07.606203  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  295 13:47:07.612571  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  296 13:47:07.836783  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  297 13:47:07.843329  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  298 13:47:07.846691  Saving vboot hash.

  299 13:47:07.853041  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  300 13:47:07.869112  tlcl_extend: response is 0

  301 13:47:07.875357  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  302 13:47:07.879491  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  303 13:47:07.897557  tlcl_extend: response is 0

  304 13:47:07.903559  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  305 13:47:07.923584  tlcl_lock_nv_write: response is 0

  306 13:47:07.939272  tlcl_lock_nv_write: response is 0

  307 13:47:07.942771  Slot A is selected

  308 13:47:07.949202  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  309 13:47:07.956115  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  310 13:47:07.962540  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  311 13:47:07.969420  BS: verstage times (exec / console): total (unknown) / 253 ms

  312 13:47:07.969896  

  313 13:47:07.970151  

  314 13:47:07.975567  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  315 13:47:07.980791  Google Chrome EC: version:

  316 13:47:07.984474  	ro: volmar_v2.0.14126-e605144e9c

  317 13:47:07.987709  	rw: volmar_v0.0.55-22d1557

  318 13:47:07.991471    running image: 2

  319 13:47:07.994055  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  320 13:47:08.004459  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  321 13:47:08.011044  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  322 13:47:08.017986  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  323 13:47:08.027880  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  324 13:47:08.037372  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  325 13:47:08.041103  EC took 941us to calculate image hash

  326 13:47:08.054367  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  327 13:47:08.057075  VB2:sync_ec() select_rw=RW(active)

  328 13:47:08.065941  Waited 269us to clear limit power flag.

  329 13:47:08.068917  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  330 13:47:08.072197  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  331 13:47:08.075476  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  332 13:47:08.082322  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  333 13:47:08.085948  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  334 13:47:08.088857  TCO_STS:   0000 0000

  335 13:47:08.088912  GEN_PMCON: d0015038 00002200

  336 13:47:08.092384  GBLRST_CAUSE: 00000000 00000000

  337 13:47:08.095452  HPR_CAUSE0: 00000000

  338 13:47:08.099063  prev_sleep_state 5

  339 13:47:08.102470  Abort disabling TXT, as CPU is not TXT capable.

  340 13:47:08.110075  cse_lite: Number of partitions = 3

  341 13:47:08.113698  cse_lite: Current partition = RO

  342 13:47:08.113753  cse_lite: Next partition = RO

  343 13:47:08.117242  cse_lite: Flags = 0x7

  344 13:47:08.123690  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  345 13:47:08.134492  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  346 13:47:08.137174  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  347 13:47:08.144106  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  348 13:47:08.150312  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  349 13:47:08.156985  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  350 13:47:08.160583  cse_lite: CSE CBFS RW version : 16.1.25.2049

  351 13:47:08.167454  cse_lite: Set Boot Partition Info Command (RW)

  352 13:47:08.170563  HECI: Global Reset(Type:1) Command

  353 13:47:09.594106  

  354 13:47:09.596801  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  355 13:47:09.603513  CPU: AES supported, TXT NOT supported, VT supported

  356 13:47:09.610136  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  357 13:47:09.613655  Cache size = 10 MiB

  358 13:47:09.617411  MCH: device id 4609 (rev 04) is Alderlake-P

  359 13:47:09.620013  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  360 13:47:09.626986  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  361 13:47:09.629974  VBOOT: Loading verstage.

  362 13:47:09.634539  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  363 13:47:09.637556  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  364 13:47:09.644403  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  365 13:47:09.651653  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  366 13:47:09.657833  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  367 13:47:09.661945  

  368 13:47:09.662023  

  369 13:47:09.668880  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  370 13:47:09.675327  Probing TPM I2C: I2C bus 1 version 0x3230302a

  371 13:47:09.678544  DW I2C bus 1 at 0xfe022000 (400 KHz)

  372 13:47:09.682412  done! DID_VID 0x00281ae0

  373 13:47:09.685040  TPM ready after 0 ms

  374 13:47:09.688222  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  375 13:47:09.697587  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  376 13:47:09.704913  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  377 13:47:09.772770  tlcl_send_startup: Startup return code is 0

  378 13:47:09.773178  TPM: setup succeeded

  379 13:47:09.793673  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  380 13:47:09.815457  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  381 13:47:09.820146  Chrome EC: UHEPI supported

  382 13:47:09.822914  Reading cr50 boot mode

  383 13:47:09.838372  Cr50 says boot_mode is VERIFIED_RW(0x00).

  384 13:47:09.838795  Phase 1

  385 13:47:09.845245  FMAP: area GBB found @ 1805000 (458752 bytes)

  386 13:47:09.851350  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  387 13:47:09.858350  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  388 13:47:09.864499  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  389 13:47:09.868277  Phase 2

  390 13:47:09.868759  Phase 3

  391 13:47:09.870964  FMAP: area GBB found @ 1805000 (458752 bytes)

  392 13:47:09.877326  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  393 13:47:09.880469  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  394 13:47:09.887428  VB2:vb2_verify_keyblock() Checking keyblock signature...

  395 13:47:09.893856  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  396 13:47:09.900541  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  397 13:47:09.903978  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  398 13:47:09.918330  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  399 13:47:09.922099  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  400 13:47:09.928600  VB2:vb2_verify_fw_preamble() Verifying preamble.

  401 13:47:09.934932  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  402 13:47:09.938534  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  403 13:47:09.945408  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  404 13:47:09.949514  Phase 4

  405 13:47:09.952842  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  406 13:47:09.959358  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  407 13:47:10.185150  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  408 13:47:10.191858  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  409 13:47:10.195492  Saving vboot hash.

  410 13:47:10.201916  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  411 13:47:10.217870  tlcl_extend: response is 0

  412 13:47:10.224609  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  413 13:47:10.230962  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  414 13:47:10.245752  tlcl_extend: response is 0

  415 13:47:10.251789  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  416 13:47:10.271838  tlcl_lock_nv_write: response is 0

  417 13:47:10.291013  tlcl_lock_nv_write: response is 0

  418 13:47:10.291084  Slot A is selected

  419 13:47:10.297712  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  420 13:47:10.304477  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  421 13:47:10.310978  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  422 13:47:10.317571  BS: verstage times (exec / console): total (unknown) / 246 ms

  423 13:47:10.317637  

  424 13:47:10.317684  

  425 13:47:10.324148  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  426 13:47:10.328815  Google Chrome EC: version:

  427 13:47:10.331971  	ro: volmar_v2.0.14126-e605144e9c

  428 13:47:10.335082  	rw: volmar_v0.0.55-22d1557

  429 13:47:10.338650    running image: 2

  430 13:47:10.341540  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  431 13:47:10.351933  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  432 13:47:10.358399  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  433 13:47:10.365094  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  434 13:47:10.375591  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  435 13:47:10.385677  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  436 13:47:10.396862  EC took 6551us to calculate image hash

  437 13:47:10.406971  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  438 13:47:10.410508  VB2:sync_ec() select_rw=RW(active)

  439 13:47:10.420428  Waited 269us to clear limit power flag.

  440 13:47:10.423357  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  441 13:47:10.427259  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  442 13:47:10.433711  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  443 13:47:10.437208  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  444 13:47:10.440758  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  445 13:47:10.443783  TCO_STS:   0000 0000

  446 13:47:10.447372  GEN_PMCON: d1001038 00002200

  447 13:47:10.450399  GBLRST_CAUSE: 00000040 00000000

  448 13:47:10.450851  HPR_CAUSE0: 00000000

  449 13:47:10.453848  prev_sleep_state 5

  450 13:47:10.460029  Abort disabling TXT, as CPU is not TXT capable.

  451 13:47:10.463372  cse_lite: Number of partitions = 3

  452 13:47:10.466647  cse_lite: Current partition = RW

  453 13:47:10.470374  cse_lite: Next partition = RW

  454 13:47:10.473393  cse_lite: Flags = 0x7

  455 13:47:10.479526  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  456 13:47:10.486507  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  457 13:47:10.493017  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  458 13:47:10.500071  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  459 13:47:10.506453  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  460 13:47:10.513329  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  461 13:47:10.516394  cse_lite: CSE CBFS RW version : 16.1.25.2049

  462 13:47:10.520108  Boot Count incremented to 981

  463 13:47:10.526523  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  464 13:47:10.533189  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  465 13:47:10.544680  Probing TPM I2C: done! DID_VID 0x00281ae0

  466 13:47:10.548377  Locality already claimed

  467 13:47:10.551112  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  468 13:47:10.570892  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  469 13:47:10.577742  MRC: Hash idx 0x100d comparison successful.

  470 13:47:10.580645  MRC cache found, size f6c8

  471 13:47:10.580969  bootmode is set to: 2

  472 13:47:10.584924  EC returned error result code 3

  473 13:47:10.587463  FW_CONFIG value from CBI is 0x131

  474 13:47:10.594460  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  475 13:47:10.597611  SPD index = 0

  476 13:47:10.604306  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  477 13:47:10.604725  SPD: module type is LPDDR4X

  478 13:47:10.611439  SPD: module part number is K4U6E3S4AB-MGCL

  479 13:47:10.617493  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  480 13:47:10.620861  SPD: device width 16 bits, bus width 16 bits

  481 13:47:10.624145  SPD: module size is 1024 MB (per channel)

  482 13:47:10.693918  CBMEM:

  483 13:47:10.697467  IMD: root @ 0x76fff000 254 entries.

  484 13:47:10.700562  IMD: root @ 0x76ffec00 62 entries.

  485 13:47:10.708067  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  486 13:47:10.712411  RO_VPD is uninitialized or empty.

  487 13:47:10.715006  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  488 13:47:10.721679  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  489 13:47:10.724438  External stage cache:

  490 13:47:10.728242  IMD: root @ 0x7bbff000 254 entries.

  491 13:47:10.731663  IMD: root @ 0x7bbfec00 62 entries.

  492 13:47:10.738644  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  493 13:47:10.744920  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  494 13:47:10.748047  MRC: 'RW_MRC_CACHE' does not need update.

  495 13:47:10.748396  8 DIMMs found

  496 13:47:10.751520  SMM Memory Map

  497 13:47:10.755212  SMRAM       : 0x7b800000 0x800000

  498 13:47:10.758305   Subregion 0: 0x7b800000 0x200000

  499 13:47:10.761550   Subregion 1: 0x7ba00000 0x200000

  500 13:47:10.764414   Subregion 2: 0x7bc00000 0x400000

  501 13:47:10.767910  top_of_ram = 0x77000000

  502 13:47:10.771266  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  503 13:47:10.777830  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  504 13:47:10.784130  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  505 13:47:10.787781  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  506 13:47:10.787841  Normal boot

  507 13:47:10.797628  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  508 13:47:10.804393  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  509 13:47:10.810938  Processing 237 relocs. Offset value of 0x74ab9000

  510 13:47:10.819695  BS: romstage times (exec / console): total (unknown) / 377 ms

  511 13:47:10.827321  

  512 13:47:10.827699  

  513 13:47:10.833506  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  514 13:47:10.833895  Normal boot

  515 13:47:10.840178  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  516 13:47:10.846650  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  517 13:47:10.852729  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  518 13:47:10.862925  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  519 13:47:10.910874  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  520 13:47:10.917732  Processing 5931 relocs. Offset value of 0x72a2f000

  521 13:47:10.920354  BS: postcar times (exec / console): total (unknown) / 51 ms

  522 13:47:10.924110  

  523 13:47:10.924179  

  524 13:47:10.931039  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  525 13:47:10.934261  Reserving BERT start 76a1e000, size 10000

  526 13:47:10.937180  Normal boot

  527 13:47:10.940875  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  528 13:47:10.947375  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  529 13:47:10.957191  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  530 13:47:10.960601  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  531 13:47:10.967048  Google Chrome EC: version:

  532 13:47:10.969995  	ro: volmar_v2.0.14126-e605144e9c

  533 13:47:10.973676  	rw: volmar_v0.0.55-22d1557

  534 13:47:10.976830    running image: 2

  535 13:47:10.980826  ACPI _SWS is PM1 Index 8 GPE Index -1

  536 13:47:10.987444  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  537 13:47:10.991109  EC returned error result code 3

  538 13:47:10.994123  FW_CONFIG value from CBI is 0x131

  539 13:47:10.997292  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  540 13:47:11.003712  PCI: 00:1c.2 disabled by fw_config

  541 13:47:11.006923  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  542 13:47:11.013934  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  543 13:47:11.016851  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  544 13:47:11.024213  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  545 13:47:11.027749  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  546 13:47:11.036973  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  547 13:47:11.040877  microcode: sig=0x906a4 pf=0x80 revision=0x423

  548 13:47:11.043328  microcode: Update skipped, already up-to-date

  549 13:47:11.050473  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  550 13:47:11.084561  Detected 6 core, 8 thread CPU.

  551 13:47:11.088324  Setting up SMI for CPU

  552 13:47:11.091355  IED base = 0x7bc00000

  553 13:47:11.091768  IED size = 0x00400000

  554 13:47:11.095014  Will perform SMM setup.

  555 13:47:11.101385  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  556 13:47:11.101766  LAPIC 0x0 in XAPIC mode.

  557 13:47:11.111225  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  558 13:47:11.113966  Processing 18 relocs. Offset value of 0x00030000

  559 13:47:11.119375  Attempting to start 7 APs

  560 13:47:11.122415  Waiting for 10ms after sending INIT.

  561 13:47:11.135405  Waiting for SIPI to complete...

  562 13:47:11.139045  LAPIC 0x1 in XAPIC mode.

  563 13:47:11.142499  LAPIC 0x16 in XAPIC mode.

  564 13:47:11.145374  LAPIC 0x9 in XAPIC mode.

  565 13:47:11.149183  LAPIC 0x12 in XAPIC mode.

  566 13:47:11.149516  LAPIC 0x14 in XAPIC mode.

  567 13:47:11.151716  LAPIC 0x8 in XAPIC mode.

  568 13:47:11.155370  AP: slot 3 apic_id 16, MCU rev: 0x00000423

  569 13:47:11.158889  LAPIC 0x10 in XAPIC mode.

  570 13:47:11.161725  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  571 13:47:11.168383  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  572 13:47:11.171728  AP: slot 2 apic_id 14, MCU rev: 0x00000423

  573 13:47:11.175143  AP: slot 1 apic_id 12, MCU rev: 0x00000423

  574 13:47:11.178104  done.

  575 13:47:11.181305  AP: slot 7 apic_id 1, MCU rev: 0x00000423

  576 13:47:11.185136  Waiting for SIPI to complete...

  577 13:47:11.185196  done.

  578 13:47:11.188210  AP: slot 6 apic_id 8, MCU rev: 0x00000423

  579 13:47:11.191773  smm_setup_relocation_handler: enter

  580 13:47:11.194737  smm_setup_relocation_handler: exit

  581 13:47:11.204571  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  582 13:47:11.208093  Processing 11 relocs. Offset value of 0x00038000

  583 13:47:11.214631  smm_module_setup_stub: stack_top = 0x7b804000

  584 13:47:11.218088  smm_module_setup_stub: per cpu stack_size = 0x800

  585 13:47:11.224824  smm_module_setup_stub: runtime.start32_offset = 0x4c

  586 13:47:11.228316  smm_module_setup_stub: runtime.smm_size = 0x10000

  587 13:47:11.234685  SMM Module: stub loaded at 38000. Will call 0x76a52094

  588 13:47:11.238391  Installing permanent SMM handler to 0x7b800000

  589 13:47:11.244712  smm_load_module: total_smm_space_needed e468, available -> 200000

  590 13:47:11.254669  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  591 13:47:11.258101  Processing 255 relocs. Offset value of 0x7b9f6000

  592 13:47:11.264320  smm_load_module: smram_start: 0x7b800000

  593 13:47:11.267979  smm_load_module: smram_end: 7ba00000

  594 13:47:11.271442  smm_load_module: handler start 0x7b9f6d5f

  595 13:47:11.275206  smm_load_module: handler_size 98d0

  596 13:47:11.277707  smm_load_module: fxsave_area 0x7b9ff000

  597 13:47:11.281164  smm_load_module: fxsave_size 1000

  598 13:47:11.284939  smm_load_module: CONFIG_MSEG_SIZE 0x0

  599 13:47:11.290985  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  600 13:47:11.298032  smm_load_module: handler_mod_params.smbase = 0x7b800000

  601 13:47:11.301023  smm_load_module: per_cpu_save_state_size = 0x400

  602 13:47:11.304564  smm_load_module: num_cpus = 0x8

  603 13:47:11.311136  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  604 13:47:11.314494  smm_load_module: total_save_state_size = 0x2000

  605 13:47:11.320975  smm_load_module: cpu0 entry: 7b9e6000

  606 13:47:11.324433  smm_create_map: cpus allowed in one segment 30

  607 13:47:11.327946  smm_create_map: min # of segments needed 1

  608 13:47:11.328017  CPU 0x0

  609 13:47:11.334544      smbase 7b9e6000  entry 7b9ee000

  610 13:47:11.337882             ss_start 7b9f5c00  code_end 7b9ee208

  611 13:47:11.337959  CPU 0x1

  612 13:47:11.340802      smbase 7b9e5c00  entry 7b9edc00

  613 13:47:11.347329             ss_start 7b9f5800  code_end 7b9ede08

  614 13:47:11.347402  CPU 0x2

  615 13:47:11.350974      smbase 7b9e5800  entry 7b9ed800

  616 13:47:11.357780             ss_start 7b9f5400  code_end 7b9eda08

  617 13:47:11.357851  CPU 0x3

  618 13:47:11.360802      smbase 7b9e5400  entry 7b9ed400

  619 13:47:11.364118             ss_start 7b9f5000  code_end 7b9ed608

  620 13:47:11.367532  CPU 0x4

  621 13:47:11.371459      smbase 7b9e5000  entry 7b9ed000

  622 13:47:11.374712             ss_start 7b9f4c00  code_end 7b9ed208

  623 13:47:11.375020  CPU 0x5

  624 13:47:11.381054      smbase 7b9e4c00  entry 7b9ecc00

  625 13:47:11.384519             ss_start 7b9f4800  code_end 7b9ece08

  626 13:47:11.384880  CPU 0x6

  627 13:47:11.387374      smbase 7b9e4800  entry 7b9ec800

  628 13:47:11.394103             ss_start 7b9f4400  code_end 7b9eca08

  629 13:47:11.394177  CPU 0x7

  630 13:47:11.397429      smbase 7b9e4400  entry 7b9ec400

  631 13:47:11.404165             ss_start 7b9f4000  code_end 7b9ec608

  632 13:47:11.410718  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  633 13:47:11.417161  Processing 11 relocs. Offset value of 0x7b9ee000

  634 13:47:11.420852  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  635 13:47:11.427582  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  636 13:47:11.433901  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  637 13:47:11.440963  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  638 13:47:11.446854  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  639 13:47:11.453920  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  640 13:47:11.460499  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  641 13:47:11.463400  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  642 13:47:11.470069  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  643 13:47:11.476669  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  644 13:47:11.483287  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  645 13:47:11.490071  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  646 13:47:11.496555  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  647 13:47:11.503499  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  648 13:47:11.510308  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  649 13:47:11.514068  smm_module_setup_stub: stack_top = 0x7b804000

  650 13:47:11.520580  smm_module_setup_stub: per cpu stack_size = 0x800

  651 13:47:11.523670  smm_module_setup_stub: runtime.start32_offset = 0x4c

  652 13:47:11.530499  smm_module_setup_stub: runtime.smm_size = 0x200000

  653 13:47:11.537149  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  654 13:47:11.540308  Clearing SMI status registers

  655 13:47:11.543548  SMI_STS: PM1 

  656 13:47:11.543884  PM1_STS: WAK PWRBTN 

  657 13:47:11.550385  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  658 13:47:11.553174  In relocation handler: CPU 0

  659 13:47:11.556659  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  660 13:47:11.564056  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  661 13:47:11.567279  Relocation complete.

  662 13:47:11.573784  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  663 13:47:11.576911  In relocation handler: CPU 7

  664 13:47:11.580423  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  665 13:47:11.583256  Relocation complete.

  666 13:47:11.590183  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  667 13:47:11.593175  In relocation handler: CPU 3

  668 13:47:11.596566  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  669 13:47:11.600068  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  670 13:47:11.603325  Relocation complete.

  671 13:47:11.610026  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  672 13:47:11.613690  In relocation handler: CPU 2

  673 13:47:11.616973  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  674 13:47:11.623628  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  675 13:47:11.624028  Relocation complete.

  676 13:47:11.630491  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  677 13:47:11.634254  In relocation handler: CPU 1

  678 13:47:11.640458  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  679 13:47:11.643624  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  680 13:47:11.646345  Relocation complete.

  681 13:47:11.653085  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  682 13:47:11.656845  In relocation handler: CPU 4

  683 13:47:11.660267  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  684 13:47:11.663319  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  685 13:47:11.666754  Relocation complete.

  686 13:47:11.673407  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  687 13:47:11.676090  In relocation handler: CPU 5

  688 13:47:11.679854  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  689 13:47:11.682835  Relocation complete.

  690 13:47:11.689452  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  691 13:47:11.693148  In relocation handler: CPU 6

  692 13:47:11.696941  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  693 13:47:11.702768  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  694 13:47:11.703148  Relocation complete.

  695 13:47:11.706570  Initializing CPU #0

  696 13:47:11.709205  CPU: vendor Intel device 906a4

  697 13:47:11.712903  CPU: family 06, model 9a, stepping 04

  698 13:47:11.716218  Clearing out pending MCEs

  699 13:47:11.719579  cpu: energy policy set to 7

  700 13:47:11.722882  Turbo is available but hidden

  701 13:47:11.726530  Turbo is available and visible

  702 13:47:11.729428  microcode: Update skipped, already up-to-date

  703 13:47:11.732992  CPU #0 initialized

  704 13:47:11.733322  Initializing CPU #7

  705 13:47:11.736281  Initializing CPU #1

  706 13:47:11.739669  Initializing CPU #3

  707 13:47:11.740001  Initializing CPU #4

  708 13:47:11.742921  CPU: vendor Intel device 906a4

  709 13:47:11.746394  CPU: family 06, model 9a, stepping 04

  710 13:47:11.749251  CPU: vendor Intel device 906a4

  711 13:47:11.752395  CPU: family 06, model 9a, stepping 04

  712 13:47:11.756349  Clearing out pending MCEs

  713 13:47:11.759322  Initializing CPU #5

  714 13:47:11.762750  Clearing out pending MCEs

  715 13:47:11.763093  Initializing CPU #2

  716 13:47:11.765998  cpu: energy policy set to 7

  717 13:47:11.769531  CPU: vendor Intel device 906a4

  718 13:47:11.772482  CPU: family 06, model 9a, stepping 04

  719 13:47:11.775400  CPU: vendor Intel device 906a4

  720 13:47:11.778863  CPU: family 06, model 9a, stepping 04

  721 13:47:11.785844  microcode: Update skipped, already up-to-date

  722 13:47:11.785913  CPU #1 initialized

  723 13:47:11.789267  cpu: energy policy set to 7

  724 13:47:11.792145  Clearing out pending MCEs

  725 13:47:11.796194  microcode: Update skipped, already up-to-date

  726 13:47:11.799282  CPU #3 initialized

  727 13:47:11.802939  CPU: vendor Intel device 906a4

  728 13:47:11.806052  CPU: family 06, model 9a, stepping 04

  729 13:47:11.809124  Clearing out pending MCEs

  730 13:47:11.809473  Clearing out pending MCEs

  731 13:47:11.812681  CPU: vendor Intel device 906a4

  732 13:47:11.819322  CPU: family 06, model 9a, stepping 04

  733 13:47:11.819808  cpu: energy policy set to 7

  734 13:47:11.822426  cpu: energy policy set to 7

  735 13:47:11.829268  microcode: Update skipped, already up-to-date

  736 13:47:11.829696  CPU #2 initialized

  737 13:47:11.835445  microcode: Update skipped, already up-to-date

  738 13:47:11.835774  CPU #4 initialized

  739 13:47:11.839373  Clearing out pending MCEs

  740 13:47:11.842265  cpu: energy policy set to 7

  741 13:47:11.842696  Initializing CPU #6

  742 13:47:11.845645  cpu: energy policy set to 7

  743 13:47:11.852269  microcode: Update skipped, already up-to-date

  744 13:47:11.852750  CPU #5 initialized

  745 13:47:11.856137  CPU: vendor Intel device 906a4

  746 13:47:11.859155  CPU: family 06, model 9a, stepping 04

  747 13:47:11.865641  microcode: Update skipped, already up-to-date

  748 13:47:11.866110  CPU #7 initialized

  749 13:47:11.868549  Clearing out pending MCEs

  750 13:47:11.872190  cpu: energy policy set to 7

  751 13:47:11.875157  microcode: Update skipped, already up-to-date

  752 13:47:11.878125  CPU #6 initialized

  753 13:47:11.881901  bsp_do_flight_plan done after 693 msecs.

  754 13:47:11.885107  CPU: frequency set to 4400 MHz

  755 13:47:11.888714  Enabling SMIs.

  756 13:47:11.895378  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms

  757 13:47:11.910351  Probing TPM I2C: done! DID_VID 0x00281ae0

  758 13:47:11.913824  Locality already claimed

  759 13:47:11.916998  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  760 13:47:11.928376  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  761 13:47:11.932007  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  762 13:47:11.938261  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  763 13:47:11.945009  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  764 13:47:11.947965  Found a VBT of 9216 bytes after decompression

  765 13:47:11.951630  PCI  1.0, PIN A, using IRQ #16

  766 13:47:11.954686  PCI  2.0, PIN A, using IRQ #17

  767 13:47:11.958184  PCI  4.0, PIN A, using IRQ #18

  768 13:47:11.961183  PCI  5.0, PIN A, using IRQ #16

  769 13:47:11.964344  PCI  6.0, PIN A, using IRQ #16

  770 13:47:11.967742  PCI  6.2, PIN C, using IRQ #18

  771 13:47:11.971427  PCI  7.0, PIN A, using IRQ #19

  772 13:47:11.974989  PCI  7.1, PIN B, using IRQ #20

  773 13:47:11.977779  PCI  7.2, PIN C, using IRQ #21

  774 13:47:11.981409  PCI  7.3, PIN D, using IRQ #22

  775 13:47:11.984552  PCI  8.0, PIN A, using IRQ #23

  776 13:47:11.987897  PCI  D.0, PIN A, using IRQ #17

  777 13:47:11.991776  PCI  D.1, PIN B, using IRQ #19

  778 13:47:11.992190  PCI 10.0, PIN A, using IRQ #24

  779 13:47:11.994795  PCI 10.1, PIN B, using IRQ #25

  780 13:47:11.998052  PCI 10.6, PIN C, using IRQ #20

  781 13:47:12.001654  PCI 10.7, PIN D, using IRQ #21

  782 13:47:12.004555  PCI 11.0, PIN A, using IRQ #26

  783 13:47:12.007905  PCI 11.1, PIN B, using IRQ #27

  784 13:47:12.011803  PCI 11.2, PIN C, using IRQ #28

  785 13:47:12.014521  PCI 11.3, PIN D, using IRQ #29

  786 13:47:12.017652  PCI 12.0, PIN A, using IRQ #30

  787 13:47:12.021126  PCI 12.6, PIN B, using IRQ #31

  788 13:47:12.024067  PCI 12.7, PIN C, using IRQ #22

  789 13:47:12.027666  PCI 13.0, PIN A, using IRQ #32

  790 13:47:12.030781  PCI 13.1, PIN B, using IRQ #33

  791 13:47:12.034450  PCI 13.2, PIN C, using IRQ #34

  792 13:47:12.037765  PCI 13.3, PIN D, using IRQ #35

  793 13:47:12.041236  PCI 14.0, PIN B, using IRQ #23

  794 13:47:12.044259  PCI 14.1, PIN A, using IRQ #36

  795 13:47:12.044604  PCI 14.3, PIN C, using IRQ #17

  796 13:47:12.047817  PCI 15.0, PIN A, using IRQ #37

  797 13:47:12.050930  PCI 15.1, PIN B, using IRQ #38

  798 13:47:12.055035  PCI 15.2, PIN C, using IRQ #39

  799 13:47:12.057489  PCI 15.3, PIN D, using IRQ #40

  800 13:47:12.061148  PCI 16.0, PIN A, using IRQ #18

  801 13:47:12.063812  PCI 16.1, PIN B, using IRQ #19

  802 13:47:12.067289  PCI 16.2, PIN C, using IRQ #20

  803 13:47:12.070742  PCI 16.3, PIN D, using IRQ #21

  804 13:47:12.074403  PCI 16.4, PIN A, using IRQ #18

  805 13:47:12.077253  PCI 16.5, PIN B, using IRQ #19

  806 13:47:12.080615  PCI 17.0, PIN A, using IRQ #22

  807 13:47:12.084102  PCI 19.0, PIN A, using IRQ #41

  808 13:47:12.087868  PCI 19.1, PIN B, using IRQ #42

  809 13:47:12.090833  PCI 19.2, PIN C, using IRQ #43

  810 13:47:12.094859  PCI 1C.0, PIN A, using IRQ #16

  811 13:47:12.095316  PCI 1C.1, PIN B, using IRQ #17

  812 13:47:12.097978  PCI 1C.2, PIN C, using IRQ #18

  813 13:47:12.100702  PCI 1C.3, PIN D, using IRQ #19

  814 13:47:12.104179  PCI 1C.4, PIN A, using IRQ #16

  815 13:47:12.107526  PCI 1C.5, PIN B, using IRQ #17

  816 13:47:12.110825  PCI 1C.6, PIN C, using IRQ #18

  817 13:47:12.114579  PCI 1C.7, PIN D, using IRQ #19

  818 13:47:12.117547  PCI 1D.0, PIN A, using IRQ #16

  819 13:47:12.121167  PCI 1D.1, PIN B, using IRQ #17

  820 13:47:12.124605  PCI 1D.2, PIN C, using IRQ #18

  821 13:47:12.127723  PCI 1D.3, PIN D, using IRQ #19

  822 13:47:12.131161  PCI 1E.0, PIN A, using IRQ #23

  823 13:47:12.133853  PCI 1E.1, PIN B, using IRQ #20

  824 13:47:12.137242  PCI 1E.2, PIN C, using IRQ #44

  825 13:47:12.140782  PCI 1E.3, PIN D, using IRQ #45

  826 13:47:12.143768  PCI 1F.3, PIN B, using IRQ #22

  827 13:47:12.147364  PCI 1F.4, PIN C, using IRQ #23

  828 13:47:12.147434  PCI 1F.6, PIN D, using IRQ #20

  829 13:47:12.150740  PCI 1F.7, PIN A, using IRQ #21

  830 13:47:12.156833  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  831 13:47:12.163805  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  832 13:47:12.346875  FSPS returned 0

  833 13:47:12.350139  Executing Phase 1 of FspMultiPhaseSiInit

  834 13:47:12.359729  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  835 13:47:12.363411  port C0 DISC req: usage 1 usb3 1 usb2 1

  836 13:47:12.366213  Raw Buffer output 0 00000111

  837 13:47:12.369403  Raw Buffer output 1 00000000

  838 13:47:12.373382  pmc_send_ipc_cmd succeeded

  839 13:47:12.380264  port C1 DISC req: usage 1 usb3 3 usb2 3

  840 13:47:12.380341  Raw Buffer output 0 00000331

  841 13:47:12.383074  Raw Buffer output 1 00000000

  842 13:47:12.387596  pmc_send_ipc_cmd succeeded

  843 13:47:12.391556  Detected 6 core, 8 thread CPU.

  844 13:47:12.394509  Detected 6 core, 8 thread CPU.

  845 13:47:12.399690  Detected 6 core, 8 thread CPU.

  846 13:47:12.403213  Detected 6 core, 8 thread CPU.

  847 13:47:12.406255  Detected 6 core, 8 thread CPU.

  848 13:47:12.409714  Detected 6 core, 8 thread CPU.

  849 13:47:12.413069  Detected 6 core, 8 thread CPU.

  850 13:47:12.416143  Detected 6 core, 8 thread CPU.

  851 13:47:12.419686  Detected 6 core, 8 thread CPU.

  852 13:47:12.422795  Detected 6 core, 8 thread CPU.

  853 13:47:12.426287  Detected 6 core, 8 thread CPU.

  854 13:47:12.429252  Detected 6 core, 8 thread CPU.

  855 13:47:12.432836  Detected 6 core, 8 thread CPU.

  856 13:47:12.436204  Detected 6 core, 8 thread CPU.

  857 13:47:12.439107  Detected 6 core, 8 thread CPU.

  858 13:47:12.442475  Detected 6 core, 8 thread CPU.

  859 13:47:12.446050  Detected 6 core, 8 thread CPU.

  860 13:47:12.449012  Detected 6 core, 8 thread CPU.

  861 13:47:12.452861  Detected 6 core, 8 thread CPU.

  862 13:47:12.456375  Detected 6 core, 8 thread CPU.

  863 13:47:12.459000  Detected 6 core, 8 thread CPU.

  864 13:47:12.462840  Detected 6 core, 8 thread CPU.

  865 13:47:12.753221  Detected 6 core, 8 thread CPU.

  866 13:47:12.756816  Detected 6 core, 8 thread CPU.

  867 13:47:12.759702  Detected 6 core, 8 thread CPU.

  868 13:47:12.763406  Detected 6 core, 8 thread CPU.

  869 13:47:12.766237  Detected 6 core, 8 thread CPU.

  870 13:47:12.769817  Detected 6 core, 8 thread CPU.

  871 13:47:12.772896  Detected 6 core, 8 thread CPU.

  872 13:47:12.775933  Detected 6 core, 8 thread CPU.

  873 13:47:12.779353  Detected 6 core, 8 thread CPU.

  874 13:47:12.782478  Detected 6 core, 8 thread CPU.

  875 13:47:12.786309  Detected 6 core, 8 thread CPU.

  876 13:47:12.789055  Detected 6 core, 8 thread CPU.

  877 13:47:12.792926  Detected 6 core, 8 thread CPU.

  878 13:47:12.795781  Detected 6 core, 8 thread CPU.

  879 13:47:12.799275  Detected 6 core, 8 thread CPU.

  880 13:47:12.802318  Detected 6 core, 8 thread CPU.

  881 13:47:12.805672  Detected 6 core, 8 thread CPU.

  882 13:47:12.808975  Detected 6 core, 8 thread CPU.

  883 13:47:12.812942  Detected 6 core, 8 thread CPU.

  884 13:47:12.816322  Detected 6 core, 8 thread CPU.

  885 13:47:12.819194  Display FSP Version Info HOB

  886 13:47:12.822656  Reference Code - CPU = c.0.65.70

  887 13:47:12.822752  uCode Version = 0.0.4.23

  888 13:47:12.825839  TXT ACM version = ff.ff.ff.ffff

  889 13:47:12.829287  Reference Code - ME = c.0.65.70

  890 13:47:12.832388  MEBx version = 0.0.0.0

  891 13:47:12.835545  ME Firmware Version = Lite SKU

  892 13:47:12.839516  Reference Code - PCH = c.0.65.70

  893 13:47:12.842786  PCH-CRID Status = Disabled

  894 13:47:12.845813  PCH-CRID Original Value = ff.ff.ff.ffff

  895 13:47:12.849386  PCH-CRID New Value = ff.ff.ff.ffff

  896 13:47:12.852130  OPROM - RST - RAID = ff.ff.ff.ffff

  897 13:47:12.855921  PCH Hsio Version = 4.0.0.0

  898 13:47:12.859724  Reference Code - SA - System Agent = c.0.65.70

  899 13:47:12.862700  Reference Code - MRC = 0.0.3.80

  900 13:47:12.866036  SA - PCIe Version = c.0.65.70

  901 13:47:12.868684  SA-CRID Status = Disabled

  902 13:47:12.872165  SA-CRID Original Value = 0.0.0.4

  903 13:47:12.875270  SA-CRID New Value = 0.0.0.4

  904 13:47:12.878755  OPROM - VBIOS = ff.ff.ff.ffff

  905 13:47:12.882263  IO Manageability Engine FW Version = 24.0.4.0

  906 13:47:12.885528  PHY Build Version = 0.0.0.2016

  907 13:47:12.888629  Thunderbolt(TM) FW Version = 0.0.0.0

  908 13:47:12.895189  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  909 13:47:12.901730  BS: BS_DEV_INIT_CHIPS run times (exec / console): 494 / 507 ms

  910 13:47:12.905209  Enumerating buses...

  911 13:47:12.908523  Show all devs... Before device enumeration.

  912 13:47:12.912387  Root Device: enabled 1

  913 13:47:12.915382  CPU_CLUSTER: 0: enabled 1

  914 13:47:12.915706  DOMAIN: 0000: enabled 1

  915 13:47:12.918757  GPIO: 0: enabled 1

  916 13:47:12.922334  PCI: 00:00.0: enabled 1

  917 13:47:12.922752  PCI: 00:01.0: enabled 0

  918 13:47:12.925203  PCI: 00:01.1: enabled 0

  919 13:47:12.928724  PCI: 00:02.0: enabled 1

  920 13:47:12.932186  PCI: 00:04.0: enabled 1

  921 13:47:12.932288  PCI: 00:05.0: enabled 0

  922 13:47:12.935331  PCI: 00:06.0: enabled 1

  923 13:47:12.939191  PCI: 00:06.2: enabled 0

  924 13:47:12.942202  PCI: 00:07.0: enabled 0

  925 13:47:12.942621  PCI: 00:07.1: enabled 0

  926 13:47:12.945736  PCI: 00:07.2: enabled 0

  927 13:47:12.948463  PCI: 00:07.3: enabled 0

  928 13:47:12.948835  PCI: 00:08.0: enabled 0

  929 13:47:12.952153  PCI: 00:09.0: enabled 0

  930 13:47:12.955504  PCI: 00:0a.0: enabled 1

  931 13:47:12.958793  PCI: 00:0d.0: enabled 1

  932 13:47:12.959175  PCI: 00:0d.1: enabled 0

  933 13:47:12.962334  PCI: 00:0d.2: enabled 0

  934 13:47:12.965996  PCI: 00:0d.3: enabled 0

  935 13:47:12.968726  PCI: 00:0e.0: enabled 0

  936 13:47:12.969202  PCI: 00:10.0: enabled 0

  937 13:47:12.972648  PCI: 00:10.1: enabled 0

  938 13:47:12.975338  PCI: 00:10.6: enabled 0

  939 13:47:12.978987  PCI: 00:10.7: enabled 0

  940 13:47:12.979404  PCI: 00:12.0: enabled 0

  941 13:47:12.981947  PCI: 00:12.6: enabled 0

  942 13:47:12.985778  PCI: 00:12.7: enabled 0

  943 13:47:12.986123  PCI: 00:13.0: enabled 0

  944 13:47:12.988391  PCI: 00:14.0: enabled 1

  945 13:47:12.991916  PCI: 00:14.1: enabled 0

  946 13:47:12.995734  PCI: 00:14.2: enabled 1

  947 13:47:12.996234  PCI: 00:14.3: enabled 1

  948 13:47:12.998942  PCI: 00:15.0: enabled 1

  949 13:47:13.002019  PCI: 00:15.1: enabled 1

  950 13:47:13.005219  PCI: 00:15.2: enabled 0

  951 13:47:13.005490  PCI: 00:15.3: enabled 1

  952 13:47:13.008626  PCI: 00:16.0: enabled 1

  953 13:47:13.012083  PCI: 00:16.1: enabled 0

  954 13:47:13.015523  PCI: 00:16.2: enabled 0

  955 13:47:13.015858  PCI: 00:16.3: enabled 0

  956 13:47:13.018451  PCI: 00:16.4: enabled 0

  957 13:47:13.022030  PCI: 00:16.5: enabled 0

  958 13:47:13.022359  PCI: 00:17.0: enabled 1

  959 13:47:13.025371  PCI: 00:19.0: enabled 0

  960 13:47:13.028652  PCI: 00:19.1: enabled 1

  961 13:47:13.031423  PCI: 00:19.2: enabled 0

  962 13:47:13.031481  PCI: 00:1a.0: enabled 0

  963 13:47:13.035159  PCI: 00:1c.0: enabled 0

  964 13:47:13.038084  PCI: 00:1c.1: enabled 0

  965 13:47:13.041644  PCI: 00:1c.2: enabled 0

  966 13:47:13.041702  PCI: 00:1c.3: enabled 0

  967 13:47:13.044689  PCI: 00:1c.4: enabled 0

  968 13:47:13.048378  PCI: 00:1c.5: enabled 0

  969 13:47:13.051303  PCI: 00:1c.6: enabled 0

  970 13:47:13.051354  PCI: 00:1c.7: enabled 0

  971 13:47:13.054872  PCI: 00:1d.0: enabled 0

  972 13:47:13.058397  PCI: 00:1d.1: enabled 0

  973 13:47:13.061415  PCI: 00:1d.2: enabled 0

  974 13:47:13.061469  PCI: 00:1d.3: enabled 0

  975 13:47:13.064949  PCI: 00:1e.0: enabled 1

  976 13:47:13.068355  PCI: 00:1e.1: enabled 0

  977 13:47:13.068420  PCI: 00:1e.2: enabled 0

  978 13:47:13.071202  PCI: 00:1e.3: enabled 1

  979 13:47:13.074787  PCI: 00:1f.0: enabled 1

  980 13:47:13.077842  PCI: 00:1f.1: enabled 0

  981 13:47:13.077900  PCI: 00:1f.2: enabled 1

  982 13:47:13.081495  PCI: 00:1f.3: enabled 1

  983 13:47:13.084514  PCI: 00:1f.4: enabled 0

  984 13:47:13.088105  PCI: 00:1f.5: enabled 1

  985 13:47:13.088158  PCI: 00:1f.6: enabled 0

  986 13:47:13.091244  PCI: 00:1f.7: enabled 0

  987 13:47:13.094873  GENERIC: 0.0: enabled 1

  988 13:47:13.097735  GENERIC: 0.0: enabled 1

  989 13:47:13.097790  GENERIC: 1.0: enabled 1

  990 13:47:13.101359  GENERIC: 0.0: enabled 1

  991 13:47:13.104750  GENERIC: 1.0: enabled 1

  992 13:47:13.104803  USB0 port 0: enabled 1

  993 13:47:13.108135  USB0 port 0: enabled 1

  994 13:47:13.111164  GENERIC: 0.0: enabled 1

  995 13:47:13.114799  I2C: 00:1a: enabled 1

  996 13:47:13.114850  I2C: 00:31: enabled 1

  997 13:47:13.117842  I2C: 00:32: enabled 1

  998 13:47:13.121495  I2C: 00:50: enabled 1

  999 13:47:13.121545  I2C: 00:10: enabled 1

 1000 13:47:13.124944  I2C: 00:15: enabled 1

 1001 13:47:13.128453  I2C: 00:2c: enabled 1

 1002 13:47:13.128867  GENERIC: 0.0: enabled 1

 1003 13:47:13.131600  SPI: 00: enabled 1

 1004 13:47:13.134988  PNP: 0c09.0: enabled 1

 1005 13:47:13.135283  GENERIC: 0.0: enabled 1

 1006 13:47:13.138328  USB3 port 0: enabled 1

 1007 13:47:13.141719  USB3 port 1: enabled 0

 1008 13:47:13.144568  USB3 port 2: enabled 1

 1009 13:47:13.144936  USB3 port 3: enabled 0

 1010 13:47:13.148557  USB2 port 0: enabled 1

 1011 13:47:13.151791  USB2 port 1: enabled 0

 1012 13:47:13.152328  USB2 port 2: enabled 1

 1013 13:47:13.154993  USB2 port 3: enabled 0

 1014 13:47:13.157832  USB2 port 4: enabled 0

 1015 13:47:13.157906  USB2 port 5: enabled 1

 1016 13:47:13.161338  USB2 port 6: enabled 0

 1017 13:47:13.164507  USB2 port 7: enabled 0

 1018 13:47:13.167861  USB2 port 8: enabled 1

 1019 13:47:13.168185  USB2 port 9: enabled 1

 1020 13:47:13.171425  USB3 port 0: enabled 1

 1021 13:47:13.174542  USB3 port 1: enabled 0

 1022 13:47:13.174875  USB3 port 2: enabled 0

 1023 13:47:13.178597  USB3 port 3: enabled 0

 1024 13:47:13.181134  GENERIC: 0.0: enabled 1

 1025 13:47:13.184982  GENERIC: 1.0: enabled 1

 1026 13:47:13.185404  APIC: 00: enabled 1

 1027 13:47:13.188288  APIC: 12: enabled 1

 1028 13:47:13.188719  APIC: 14: enabled 1

 1029 13:47:13.191046  APIC: 16: enabled 1

 1030 13:47:13.194610  APIC: 10: enabled 1

 1031 13:47:13.194940  APIC: 09: enabled 1

 1032 13:47:13.198091  APIC: 08: enabled 1

 1033 13:47:13.201334  APIC: 01: enabled 1

 1034 13:47:13.201615  Compare with tree...

 1035 13:47:13.204454  Root Device: enabled 1

 1036 13:47:13.207673   CPU_CLUSTER: 0: enabled 1

 1037 13:47:13.207782    APIC: 00: enabled 1

 1038 13:47:13.211045    APIC: 12: enabled 1

 1039 13:47:13.214418    APIC: 14: enabled 1

 1040 13:47:13.214507    APIC: 16: enabled 1

 1041 13:47:13.217470    APIC: 10: enabled 1

 1042 13:47:13.221177    APIC: 09: enabled 1

 1043 13:47:13.221261    APIC: 08: enabled 1

 1044 13:47:13.224071    APIC: 01: enabled 1

 1045 13:47:13.227678   DOMAIN: 0000: enabled 1

 1046 13:47:13.230680    GPIO: 0: enabled 1

 1047 13:47:13.230751    PCI: 00:00.0: enabled 1

 1048 13:47:13.234359    PCI: 00:01.0: enabled 0

 1049 13:47:13.237422    PCI: 00:01.1: enabled 0

 1050 13:47:13.241036    PCI: 00:02.0: enabled 1

 1051 13:47:13.243870    PCI: 00:04.0: enabled 1

 1052 13:47:13.243942     GENERIC: 0.0: enabled 1

 1053 13:47:13.247232    PCI: 00:05.0: enabled 0

 1054 13:47:13.250443    PCI: 00:06.0: enabled 1

 1055 13:47:13.254177    PCI: 00:06.2: enabled 0

 1056 13:47:13.257784    PCI: 00:08.0: enabled 0

 1057 13:47:13.257861    PCI: 00:09.0: enabled 0

 1058 13:47:13.260469    PCI: 00:0a.0: enabled 1

 1059 13:47:13.264121    PCI: 00:0d.0: enabled 1

 1060 13:47:13.267238     USB0 port 0: enabled 1

 1061 13:47:13.270744      USB3 port 0: enabled 1

 1062 13:47:13.270817      USB3 port 1: enabled 0

 1063 13:47:13.274102      USB3 port 2: enabled 1

 1064 13:47:13.277103      USB3 port 3: enabled 0

 1065 13:47:13.280581    PCI: 00:0d.1: enabled 0

 1066 13:47:13.284092    PCI: 00:0d.2: enabled 0

 1067 13:47:13.284160    PCI: 00:0d.3: enabled 0

 1068 13:47:13.287171    PCI: 00:0e.0: enabled 0

 1069 13:47:13.290805    PCI: 00:10.0: enabled 0

 1070 13:47:13.294013    PCI: 00:10.1: enabled 0

 1071 13:47:13.297664    PCI: 00:10.6: enabled 0

 1072 13:47:13.297714    PCI: 00:10.7: enabled 0

 1073 13:47:13.300671    PCI: 00:12.0: enabled 0

 1074 13:47:13.304316    PCI: 00:12.6: enabled 0

 1075 13:47:13.307382    PCI: 00:12.7: enabled 0

 1076 13:47:13.311080    PCI: 00:13.0: enabled 0

 1077 13:47:13.311215    PCI: 00:14.0: enabled 1

 1078 13:47:13.314192     USB0 port 0: enabled 1

 1079 13:47:13.317343      USB2 port 0: enabled 1

 1080 13:47:13.320749      USB2 port 1: enabled 0

 1081 13:47:13.324030      USB2 port 2: enabled 1

 1082 13:47:13.324446      USB2 port 3: enabled 0

 1083 13:47:13.327240      USB2 port 4: enabled 0

 1084 13:47:13.330172      USB2 port 5: enabled 1

 1085 13:47:13.333707      USB2 port 6: enabled 0

 1086 13:47:13.337419      USB2 port 7: enabled 0

 1087 13:47:13.340544      USB2 port 8: enabled 1

 1088 13:47:13.340600      USB2 port 9: enabled 1

 1089 13:47:13.343983      USB3 port 0: enabled 1

 1090 13:47:13.347042      USB3 port 1: enabled 0

 1091 13:47:13.350693      USB3 port 2: enabled 0

 1092 13:47:13.354556      USB3 port 3: enabled 0

 1093 13:47:13.355013    PCI: 00:14.1: enabled 0

 1094 13:47:13.357672    PCI: 00:14.2: enabled 1

 1095 13:47:13.360862    PCI: 00:14.3: enabled 1

 1096 13:47:13.364459     GENERIC: 0.0: enabled 1

 1097 13:47:13.367278    PCI: 00:15.0: enabled 1

 1098 13:47:13.367699     I2C: 00:1a: enabled 1

 1099 13:47:13.370624     I2C: 00:31: enabled 1

 1100 13:47:13.374085     I2C: 00:32: enabled 1

 1101 13:47:13.377503    PCI: 00:15.1: enabled 1

 1102 13:47:13.377830     I2C: 00:50: enabled 1

 1103 13:47:13.380365    PCI: 00:15.2: enabled 0

 1104 13:47:13.383850    PCI: 00:15.3: enabled 1

 1105 13:47:13.387276     I2C: 00:10: enabled 1

 1106 13:47:13.390672    PCI: 00:16.0: enabled 1

 1107 13:47:13.391001    PCI: 00:16.1: enabled 0

 1108 13:47:13.394324    PCI: 00:16.2: enabled 0

 1109 13:47:13.397369    PCI: 00:16.3: enabled 0

 1110 13:47:13.400515    PCI: 00:16.4: enabled 0

 1111 13:47:13.404235    PCI: 00:16.5: enabled 0

 1112 13:47:13.404578    PCI: 00:17.0: enabled 1

 1113 13:47:13.406863    PCI: 00:19.0: enabled 0

 1114 13:47:13.410333    PCI: 00:19.1: enabled 1

 1115 13:47:13.413638     I2C: 00:15: enabled 1

 1116 13:47:13.416630     I2C: 00:2c: enabled 1

 1117 13:47:13.416686    PCI: 00:19.2: enabled 0

 1118 13:47:13.420290    PCI: 00:1a.0: enabled 0

 1119 13:47:13.423215    PCI: 00:1e.0: enabled 1

 1120 13:47:13.426865    PCI: 00:1e.1: enabled 0

 1121 13:47:13.426916    PCI: 00:1e.2: enabled 0

 1122 13:47:13.430424    PCI: 00:1e.3: enabled 1

 1123 13:47:13.433425     SPI: 00: enabled 1

 1124 13:47:13.436941    PCI: 00:1f.0: enabled 1

 1125 13:47:13.440568     PNP: 0c09.0: enabled 1

 1126 13:47:13.440935    PCI: 00:1f.1: enabled 0

 1127 13:47:13.443460    PCI: 00:1f.2: enabled 1

 1128 13:47:13.447014     GENERIC: 0.0: enabled 1

 1129 13:47:13.450741      GENERIC: 0.0: enabled 1

 1130 13:47:13.453433      GENERIC: 1.0: enabled 1

 1131 13:47:13.453490    PCI: 00:1f.3: enabled 1

 1132 13:47:13.456791    PCI: 00:1f.4: enabled 0

 1133 13:47:13.459645    PCI: 00:1f.5: enabled 1

 1134 13:47:13.463373    PCI: 00:1f.6: enabled 0

 1135 13:47:13.466656    PCI: 00:1f.7: enabled 0

 1136 13:47:13.466706  Root Device scanning...

 1137 13:47:13.470096  scan_static_bus for Root Device

 1138 13:47:13.473189  CPU_CLUSTER: 0 enabled

 1139 13:47:13.476760  DOMAIN: 0000 enabled

 1140 13:47:13.477059  DOMAIN: 0000 scanning...

 1141 13:47:13.480726  PCI: pci_scan_bus for bus 00

 1142 13:47:13.483657  PCI: 00:00.0 [8086/0000] ops

 1143 13:47:13.487046  PCI: 00:00.0 [8086/4609] enabled

 1144 13:47:13.490843  PCI: 00:02.0 [8086/0000] bus ops

 1145 13:47:13.493635  PCI: 00:02.0 [8086/46b3] enabled

 1146 13:47:13.497345  PCI: 00:04.0 [8086/0000] bus ops

 1147 13:47:13.500225  PCI: 00:04.0 [8086/461d] enabled

 1148 13:47:13.503754  PCI: 00:06.0 [8086/0000] bus ops

 1149 13:47:13.506900  PCI: 00:06.0 [8086/464d] enabled

 1150 13:47:13.510252  PCI: 00:08.0 [8086/464f] disabled

 1151 13:47:13.513291  PCI: 00:0a.0 [8086/467d] enabled

 1152 13:47:13.516989  PCI: 00:0d.0 [8086/0000] bus ops

 1153 13:47:13.520299  PCI: 00:0d.0 [8086/461e] enabled

 1154 13:47:13.523852  PCI: 00:14.0 [8086/0000] bus ops

 1155 13:47:13.527444  PCI: 00:14.0 [8086/51ed] enabled

 1156 13:47:13.530802  PCI: 00:14.2 [8086/51ef] enabled

 1157 13:47:13.534169  PCI: 00:14.3 [8086/0000] bus ops

 1158 13:47:13.537701  PCI: 00:14.3 [8086/51f0] enabled

 1159 13:47:13.541100  PCI: 00:15.0 [8086/0000] bus ops

 1160 13:47:13.543777  PCI: 00:15.0 [8086/51e8] enabled

 1161 13:47:13.547158  PCI: 00:15.1 [8086/0000] bus ops

 1162 13:47:13.550527  PCI: 00:15.1 [8086/51e9] enabled

 1163 13:47:13.553332  PCI: 00:15.2 [8086/0000] bus ops

 1164 13:47:13.560210  PCI: 00:15.2 [8086/51ea] disabled

 1165 13:47:13.564622  PCI: 00:15.3 [8086/0000] bus ops

 1166 13:47:13.566950  PCI: 00:15.3 [8086/51eb] enabled

 1167 13:47:13.567280  PCI: 00:16.0 [8086/0000] ops

 1168 13:47:13.570297  PCI: 00:16.0 [8086/51e0] enabled

 1169 13:47:13.577172  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1170 13:47:13.579903  PCI: 00:19.0 [8086/0000] bus ops

 1171 13:47:13.583863  PCI: 00:19.0 [8086/51c5] disabled

 1172 13:47:13.586717  PCI: 00:19.1 [8086/0000] bus ops

 1173 13:47:13.590466  PCI: 00:19.1 [8086/51c6] enabled

 1174 13:47:13.593348  PCI: 00:1e.0 [8086/0000] ops

 1175 13:47:13.597006  PCI: 00:1e.0 [8086/51a8] enabled

 1176 13:47:13.599998  PCI: 00:1e.3 [8086/0000] bus ops

 1177 13:47:13.603951  PCI: 00:1e.3 [8086/51ab] enabled

 1178 13:47:13.606784  PCI: 00:1f.0 [8086/0000] bus ops

 1179 13:47:13.610021  PCI: 00:1f.0 [8086/5182] enabled

 1180 13:47:13.613498  RTC Init

 1181 13:47:13.617110  Set power on after power failure.

 1182 13:47:13.619756  Disabling Deep S3

 1183 13:47:13.620085  Disabling Deep S3

 1184 13:47:13.623233  Disabling Deep S4

 1185 13:47:13.623304  Disabling Deep S4

 1186 13:47:13.626602  Disabling Deep S5

 1187 13:47:13.626676  Disabling Deep S5

 1188 13:47:13.630566  PCI: 00:1f.2 [0000/0000] hidden

 1189 13:47:13.633214  PCI: 00:1f.3 [8086/0000] bus ops

 1190 13:47:13.636735  PCI: 00:1f.3 [8086/51c8] enabled

 1191 13:47:13.639771  PCI: 00:1f.5 [8086/0000] bus ops

 1192 13:47:13.643407  PCI: 00:1f.5 [8086/51a4] enabled

 1193 13:47:13.646791  GPIO: 0 enabled

 1194 13:47:13.649733  PCI: Leftover static devices:

 1195 13:47:13.650072  PCI: 00:01.0

 1196 13:47:13.653391  PCI: 00:01.1

 1197 13:47:13.653811  PCI: 00:05.0

 1198 13:47:13.654037  PCI: 00:06.2

 1199 13:47:13.657145  PCI: 00:09.0

 1200 13:47:13.657570  PCI: 00:0d.1

 1201 13:47:13.660185  PCI: 00:0d.2

 1202 13:47:13.660642  PCI: 00:0d.3

 1203 13:47:13.660909  PCI: 00:0e.0

 1204 13:47:13.663823  PCI: 00:10.0

 1205 13:47:13.664252  PCI: 00:10.1

 1206 13:47:13.666665  PCI: 00:10.6

 1207 13:47:13.667067  PCI: 00:10.7

 1208 13:47:13.670100  PCI: 00:12.0

 1209 13:47:13.670431  PCI: 00:12.6

 1210 13:47:13.670658  PCI: 00:12.7

 1211 13:47:13.673103  PCI: 00:13.0

 1212 13:47:13.673433  PCI: 00:14.1

 1213 13:47:13.676370  PCI: 00:16.1

 1214 13:47:13.676730  PCI: 00:16.2

 1215 13:47:13.676958  PCI: 00:16.3

 1216 13:47:13.680137  PCI: 00:16.4

 1217 13:47:13.680565  PCI: 00:16.5

 1218 13:47:13.682972  PCI: 00:17.0

 1219 13:47:13.683303  PCI: 00:19.2

 1220 13:47:13.686741  PCI: 00:1a.0

 1221 13:47:13.687069  PCI: 00:1e.1

 1222 13:47:13.687298  PCI: 00:1e.2

 1223 13:47:13.690152  PCI: 00:1f.1

 1224 13:47:13.690579  PCI: 00:1f.4

 1225 13:47:13.693062  PCI: 00:1f.6

 1226 13:47:13.693394  PCI: 00:1f.7

 1227 13:47:13.696737  PCI: Check your devicetree.cb.

 1228 13:47:13.699982  PCI: 00:02.0 scanning...

 1229 13:47:13.703544  scan_generic_bus for PCI: 00:02.0

 1230 13:47:13.706647  scan_generic_bus for PCI: 00:02.0 done

 1231 13:47:13.710159  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1232 13:47:13.713156  PCI: 00:04.0 scanning...

 1233 13:47:13.716655  scan_generic_bus for PCI: 00:04.0

 1234 13:47:13.719702  GENERIC: 0.0 enabled

 1235 13:47:13.726672  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1236 13:47:13.729694  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1237 13:47:13.732769  PCI: 00:06.0 scanning...

 1238 13:47:13.736433  do_pci_scan_bridge for PCI: 00:06.0

 1239 13:47:13.740058  PCI: pci_scan_bus for bus 01

 1240 13:47:13.742858  PCI: 01:00.0 [15b7/5009] enabled

 1241 13:47:13.746533  Enabling Common Clock Configuration

 1242 13:47:13.749454  L1 Sub-State supported from root port 6

 1243 13:47:13.752851  L1 Sub-State Support = 0x5

 1244 13:47:13.755994  CommonModeRestoreTime = 0x6e

 1245 13:47:13.759539  Power On Value = 0x5, Power On Scale = 0x2

 1246 13:47:13.762542  ASPM: Enabled L1

 1247 13:47:13.766220  PCIe: Max_Payload_Size adjusted to 256

 1248 13:47:13.769451  PCI: 01:00.0: Enabled LTR

 1249 13:47:13.772642  PCI: 01:00.0: Programmed LTR max latencies

 1250 13:47:13.776048  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1251 13:47:13.778991  PCI: 00:0d.0 scanning...

 1252 13:47:13.782783  scan_static_bus for PCI: 00:0d.0

 1253 13:47:13.785648  USB0 port 0 enabled

 1254 13:47:13.785719  USB0 port 0 scanning...

 1255 13:47:13.789136  scan_static_bus for USB0 port 0

 1256 13:47:13.792288  USB3 port 0 enabled

 1257 13:47:13.795569  USB3 port 1 disabled

 1258 13:47:13.795654  USB3 port 2 enabled

 1259 13:47:13.799499  USB3 port 3 disabled

 1260 13:47:13.802194  USB3 port 0 scanning...

 1261 13:47:13.805732  scan_static_bus for USB3 port 0

 1262 13:47:13.809297  scan_static_bus for USB3 port 0 done

 1263 13:47:13.812321  scan_bus: bus USB3 port 0 finished in 6 msecs

 1264 13:47:13.815995  USB3 port 2 scanning...

 1265 13:47:13.819403  scan_static_bus for USB3 port 2

 1266 13:47:13.822595  scan_static_bus for USB3 port 2 done

 1267 13:47:13.826205  scan_bus: bus USB3 port 2 finished in 6 msecs

 1268 13:47:13.832699  scan_static_bus for USB0 port 0 done

 1269 13:47:13.836119  scan_bus: bus USB0 port 0 finished in 43 msecs

 1270 13:47:13.839285  scan_static_bus for PCI: 00:0d.0 done

 1271 13:47:13.846114  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1272 13:47:13.846567  PCI: 00:14.0 scanning...

 1273 13:47:13.849620  scan_static_bus for PCI: 00:14.0

 1274 13:47:13.852623  USB0 port 0 enabled

 1275 13:47:13.856368  USB0 port 0 scanning...

 1276 13:47:13.859180  scan_static_bus for USB0 port 0

 1277 13:47:13.859623  USB2 port 0 enabled

 1278 13:47:13.862760  USB2 port 1 disabled

 1279 13:47:13.863110  USB2 port 2 enabled

 1280 13:47:13.865802  USB2 port 3 disabled

 1281 13:47:13.869119  USB2 port 4 disabled

 1282 13:47:13.869485  USB2 port 5 enabled

 1283 13:47:13.872276  USB2 port 6 disabled

 1284 13:47:13.875456  USB2 port 7 disabled

 1285 13:47:13.875618  USB2 port 8 enabled

 1286 13:47:13.878740  USB2 port 9 enabled

 1287 13:47:13.882347  USB3 port 0 enabled

 1288 13:47:13.882427  USB3 port 1 disabled

 1289 13:47:13.885341  USB3 port 2 disabled

 1290 13:47:13.885411  USB3 port 3 disabled

 1291 13:47:13.889195  USB2 port 0 scanning...

 1292 13:47:13.892131  scan_static_bus for USB2 port 0

 1293 13:47:13.896234  scan_static_bus for USB2 port 0 done

 1294 13:47:13.902430  scan_bus: bus USB2 port 0 finished in 6 msecs

 1295 13:47:13.902826  USB2 port 2 scanning...

 1296 13:47:13.905349  scan_static_bus for USB2 port 2

 1297 13:47:13.912356  scan_static_bus for USB2 port 2 done

 1298 13:47:13.915684  scan_bus: bus USB2 port 2 finished in 6 msecs

 1299 13:47:13.919022  USB2 port 5 scanning...

 1300 13:47:13.922189  scan_static_bus for USB2 port 5

 1301 13:47:13.925270  scan_static_bus for USB2 port 5 done

 1302 13:47:13.929190  scan_bus: bus USB2 port 5 finished in 6 msecs

 1303 13:47:13.932233  USB2 port 8 scanning...

 1304 13:47:13.935770  scan_static_bus for USB2 port 8

 1305 13:47:13.938764  scan_static_bus for USB2 port 8 done

 1306 13:47:13.942034  scan_bus: bus USB2 port 8 finished in 6 msecs

 1307 13:47:13.945598  USB2 port 9 scanning...

 1308 13:47:13.948916  scan_static_bus for USB2 port 9

 1309 13:47:13.952246  scan_static_bus for USB2 port 9 done

 1310 13:47:13.958767  scan_bus: bus USB2 port 9 finished in 6 msecs

 1311 13:47:13.959186  USB3 port 0 scanning...

 1312 13:47:13.962279  scan_static_bus for USB3 port 0

 1313 13:47:13.965213  scan_static_bus for USB3 port 0 done

 1314 13:47:13.971674  scan_bus: bus USB3 port 0 finished in 6 msecs

 1315 13:47:13.975163  scan_static_bus for USB0 port 0 done

 1316 13:47:13.978213  scan_bus: bus USB0 port 0 finished in 120 msecs

 1317 13:47:13.981594  scan_static_bus for PCI: 00:14.0 done

 1318 13:47:13.988369  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1319 13:47:13.992487  PCI: 00:14.3 scanning...

 1320 13:47:13.995531  scan_static_bus for PCI: 00:14.3

 1321 13:47:13.995954  GENERIC: 0.0 enabled

 1322 13:47:13.998229  scan_static_bus for PCI: 00:14.3 done

 1323 13:47:14.005310  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1324 13:47:14.008372  PCI: 00:15.0 scanning...

 1325 13:47:14.011977  scan_static_bus for PCI: 00:15.0

 1326 13:47:14.012440  I2C: 00:1a enabled

 1327 13:47:14.014812  I2C: 00:31 enabled

 1328 13:47:14.015137  I2C: 00:32 enabled

 1329 13:47:14.021582  scan_static_bus for PCI: 00:15.0 done

 1330 13:47:14.025163  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1331 13:47:14.028238  PCI: 00:15.1 scanning...

 1332 13:47:14.032091  scan_static_bus for PCI: 00:15.1

 1333 13:47:14.032552  I2C: 00:50 enabled

 1334 13:47:14.038604  scan_static_bus for PCI: 00:15.1 done

 1335 13:47:14.041491  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1336 13:47:14.045177  PCI: 00:15.3 scanning...

 1337 13:47:14.048141  scan_static_bus for PCI: 00:15.3

 1338 13:47:14.048633  I2C: 00:10 enabled

 1339 13:47:14.051429  scan_static_bus for PCI: 00:15.3 done

 1340 13:47:14.058345  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1341 13:47:14.061281  PCI: 00:19.1 scanning...

 1342 13:47:14.064696  scan_static_bus for PCI: 00:19.1

 1343 13:47:14.065020  I2C: 00:15 enabled

 1344 13:47:14.067678  I2C: 00:2c enabled

 1345 13:47:14.071263  scan_static_bus for PCI: 00:19.1 done

 1346 13:47:14.074632  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1347 13:47:14.077863  PCI: 00:1e.3 scanning...

 1348 13:47:14.081450  scan_generic_bus for PCI: 00:1e.3

 1349 13:47:14.084486  SPI: 00 enabled

 1350 13:47:14.088201  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1351 13:47:14.094445  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1352 13:47:14.097601  PCI: 00:1f.0 scanning...

 1353 13:47:14.100949  scan_static_bus for PCI: 00:1f.0

 1354 13:47:14.101022  PNP: 0c09.0 enabled

 1355 13:47:14.104520  PNP: 0c09.0 scanning...

 1356 13:47:14.107697  scan_static_bus for PNP: 0c09.0

 1357 13:47:14.111037  scan_static_bus for PNP: 0c09.0 done

 1358 13:47:14.114436  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1359 13:47:14.121280  scan_static_bus for PCI: 00:1f.0 done

 1360 13:47:14.124205  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1361 13:47:14.127796  PCI: 00:1f.2 scanning...

 1362 13:47:14.131161  scan_static_bus for PCI: 00:1f.2

 1363 13:47:14.131232  GENERIC: 0.0 enabled

 1364 13:47:14.134844  GENERIC: 0.0 scanning...

 1365 13:47:14.138101  scan_static_bus for GENERIC: 0.0

 1366 13:47:14.141355  GENERIC: 0.0 enabled

 1367 13:47:14.144645  GENERIC: 1.0 enabled

 1368 13:47:14.147924  scan_static_bus for GENERIC: 0.0 done

 1369 13:47:14.151379  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1370 13:47:14.154574  scan_static_bus for PCI: 00:1f.2 done

 1371 13:47:14.161003  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1372 13:47:14.161339  PCI: 00:1f.3 scanning...

 1373 13:47:14.164668  scan_static_bus for PCI: 00:1f.3

 1374 13:47:14.171210  scan_static_bus for PCI: 00:1f.3 done

 1375 13:47:14.174139  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1376 13:47:14.177368  PCI: 00:1f.5 scanning...

 1377 13:47:14.181036  scan_generic_bus for PCI: 00:1f.5

 1378 13:47:14.184527  scan_generic_bus for PCI: 00:1f.5 done

 1379 13:47:14.187298  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1380 13:47:14.194136  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1381 13:47:14.197224  scan_static_bus for Root Device done

 1382 13:47:14.204013  scan_bus: bus Root Device finished in 729 msecs

 1383 13:47:14.204448  done

 1384 13:47:14.210891  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms

 1385 13:47:14.214234  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1386 13:47:14.220430  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1387 13:47:14.224297  SPI flash protection: WPSW=0 SRP0=0

 1388 13:47:14.230544  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1389 13:47:14.234176  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1390 13:47:14.237309  found VGA at PCI: 00:02.0

 1391 13:47:14.241198  Setting up VGA for PCI: 00:02.0

 1392 13:47:14.247458  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1393 13:47:14.250784  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1394 13:47:14.254333  Allocating resources...

 1395 13:47:14.257304  Reading resources...

 1396 13:47:14.260886  Root Device read_resources bus 0 link: 0

 1397 13:47:14.263914  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1398 13:47:14.271209  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1399 13:47:14.273912  DOMAIN: 0000 read_resources bus 0 link: 0

 1400 13:47:14.280485  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1401 13:47:14.287055  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1402 13:47:14.290940  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1403 13:47:14.297262  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1404 13:47:14.303787  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1405 13:47:14.310407  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1406 13:47:14.316894  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1407 13:47:14.323832  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1408 13:47:14.330692  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1409 13:47:14.336962  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1410 13:47:14.343190  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1411 13:47:14.349722  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1412 13:47:14.356444  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1413 13:47:14.363210  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1414 13:47:14.366711  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1415 13:47:14.373213  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1416 13:47:14.379734  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1417 13:47:14.386124  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1418 13:47:14.393133  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1419 13:47:14.399634  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1420 13:47:14.406260  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1421 13:47:14.409692  PCI: 00:04.0 read_resources bus 1 link: 0

 1422 13:47:14.412730  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1423 13:47:14.419388  PCI: 00:06.0 read_resources bus 1 link: 0

 1424 13:47:14.422955  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1425 13:47:14.425987  PCI: 00:0d.0 read_resources bus 0 link: 0

 1426 13:47:14.432702  USB0 port 0 read_resources bus 0 link: 0

 1427 13:47:14.436001  USB0 port 0 read_resources bus 0 link: 0 done

 1428 13:47:14.439526  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1429 13:47:14.446308  PCI: 00:14.0 read_resources bus 0 link: 0

 1430 13:47:14.449778  USB0 port 0 read_resources bus 0 link: 0

 1431 13:47:14.452904  USB0 port 0 read_resources bus 0 link: 0 done

 1432 13:47:14.459309  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1433 13:47:14.462778  PCI: 00:14.3 read_resources bus 0 link: 0

 1434 13:47:14.469214  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1435 13:47:14.472714  PCI: 00:15.0 read_resources bus 0 link: 0

 1436 13:47:14.475778  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1437 13:47:14.482574  PCI: 00:15.1 read_resources bus 0 link: 0

 1438 13:47:14.486228  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1439 13:47:14.489427  PCI: 00:15.3 read_resources bus 0 link: 0

 1440 13:47:14.495901  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1441 13:47:14.499149  PCI: 00:19.1 read_resources bus 0 link: 0

 1442 13:47:14.502536  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1443 13:47:14.509201  PCI: 00:1e.3 read_resources bus 2 link: 0

 1444 13:47:14.512797  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1445 13:47:14.516277  PCI: 00:1f.0 read_resources bus 0 link: 0

 1446 13:47:14.523013  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1447 13:47:14.526290  PCI: 00:1f.2 read_resources bus 0 link: 0

 1448 13:47:14.529703  GENERIC: 0.0 read_resources bus 0 link: 0

 1449 13:47:14.536125  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1450 13:47:14.539625  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1451 13:47:14.546125  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1452 13:47:14.549500  Root Device read_resources bus 0 link: 0 done

 1453 13:47:14.552351  Done reading resources.

 1454 13:47:14.559396  Show resources in subtree (Root Device)...After reading.

 1455 13:47:14.562536   Root Device child on link 0 CPU_CLUSTER: 0

 1456 13:47:14.566348    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1457 13:47:14.569634     APIC: 00

 1458 13:47:14.569968     APIC: 12

 1459 13:47:14.570201     APIC: 14

 1460 13:47:14.572410     APIC: 16

 1461 13:47:14.572803     APIC: 10

 1462 13:47:14.573042     APIC: 09

 1463 13:47:14.575759     APIC: 08

 1464 13:47:14.576138     APIC: 01

 1465 13:47:14.579289    DOMAIN: 0000 child on link 0 GPIO: 0

 1466 13:47:14.589593    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1467 13:47:14.599650    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1468 13:47:14.602342     GPIO: 0

 1469 13:47:14.602676     PCI: 00:00.0

 1470 13:47:14.612366     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1471 13:47:14.622690     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1472 13:47:14.632303     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1473 13:47:14.638863     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1474 13:47:14.648427     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1475 13:47:14.658896     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1476 13:47:14.668892     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1477 13:47:14.678903     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1478 13:47:14.688629     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1479 13:47:14.698820     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1480 13:47:14.705319     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1481 13:47:14.714946     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1482 13:47:14.724703     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1483 13:47:14.735159     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1484 13:47:14.745523     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1485 13:47:14.751704     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1486 13:47:14.761829     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1487 13:47:14.771341     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1488 13:47:14.781014     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1489 13:47:14.791140     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1490 13:47:14.801255     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1491 13:47:14.811153     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1492 13:47:14.820830     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1493 13:47:14.831192     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1494 13:47:14.841383     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1495 13:47:14.848624     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1496 13:47:14.858096     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1497 13:47:14.867975     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1498 13:47:14.870773     PCI: 00:02.0

 1499 13:47:14.880815     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1500 13:47:14.890931     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1501 13:47:14.897610     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1502 13:47:14.904940     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1503 13:47:14.914491     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1504 13:47:14.914912      GENERIC: 0.0

 1505 13:47:14.921272     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1506 13:47:14.928026     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1507 13:47:14.937848     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1508 13:47:14.947959     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1509 13:47:14.948371      PCI: 01:00.0

 1510 13:47:14.957320      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1511 13:47:14.968019      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1512 13:47:14.970648     PCI: 00:08.0

 1513 13:47:14.970951     PCI: 00:0a.0

 1514 13:47:14.980401     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1515 13:47:14.987500     PCI: 00:0d.0 child on link 0 USB0 port 0

 1516 13:47:14.997785     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1517 13:47:15.000950      USB0 port 0 child on link 0 USB3 port 0

 1518 13:47:15.004699       USB3 port 0

 1519 13:47:15.005111       USB3 port 1

 1520 13:47:15.007515       USB3 port 2

 1521 13:47:15.007834       USB3 port 3

 1522 13:47:15.014210     PCI: 00:14.0 child on link 0 USB0 port 0

 1523 13:47:15.024206     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1524 13:47:15.027469      USB0 port 0 child on link 0 USB2 port 0

 1525 13:47:15.027805       USB2 port 0

 1526 13:47:15.031299       USB2 port 1

 1527 13:47:15.031632       USB2 port 2

 1528 13:47:15.034381       USB2 port 3

 1529 13:47:15.037606       USB2 port 4

 1530 13:47:15.038015       USB2 port 5

 1531 13:47:15.041260       USB2 port 6

 1532 13:47:15.041678       USB2 port 7

 1533 13:47:15.044000       USB2 port 8

 1534 13:47:15.044412       USB2 port 9

 1535 13:47:15.047480       USB3 port 0

 1536 13:47:15.047818       USB3 port 1

 1537 13:47:15.050343       USB3 port 2

 1538 13:47:15.050605       USB3 port 3

 1539 13:47:15.053588     PCI: 00:14.2

 1540 13:47:15.063753     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1541 13:47:15.073614     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1542 13:47:15.076900     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1543 13:47:15.086655     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1544 13:47:15.090315      GENERIC: 0.0

 1545 13:47:15.093484     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1546 13:47:15.103770     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1547 13:47:15.104173      I2C: 00:1a

 1548 13:47:15.106951      I2C: 00:31

 1549 13:47:15.107273      I2C: 00:32

 1550 13:47:15.113829     PCI: 00:15.1 child on link 0 I2C: 00:50

 1551 13:47:15.123946     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1552 13:47:15.124364      I2C: 00:50

 1553 13:47:15.127515     PCI: 00:15.2

 1554 13:47:15.130372     PCI: 00:15.3 child on link 0 I2C: 00:10

 1555 13:47:15.140151     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1556 13:47:15.140576      I2C: 00:10

 1557 13:47:15.143751     PCI: 00:16.0

 1558 13:47:15.153478     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1559 13:47:15.153874     PCI: 00:19.0

 1560 13:47:15.160200     PCI: 00:19.1 child on link 0 I2C: 00:15

 1561 13:47:15.170620     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1562 13:47:15.171109      I2C: 00:15

 1563 13:47:15.173541      I2C: 00:2c

 1564 13:47:15.173897     PCI: 00:1e.0

 1565 13:47:15.186818     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1566 13:47:15.190405     PCI: 00:1e.3 child on link 0 SPI: 00

 1567 13:47:15.200284     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1568 13:47:15.200770      SPI: 00

 1569 13:47:15.204091     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1570 13:47:15.213723     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1571 13:47:15.216435      PNP: 0c09.0

 1572 13:47:15.223160      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1573 13:47:15.230234     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1574 13:47:15.236659     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1575 13:47:15.246457     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1576 13:47:15.253213      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1577 13:47:15.253536       GENERIC: 0.0

 1578 13:47:15.256419       GENERIC: 1.0

 1579 13:47:15.256855     PCI: 00:1f.3

 1580 13:47:15.266023     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1581 13:47:15.276174     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1582 13:47:15.279995     PCI: 00:1f.5

 1583 13:47:15.286248     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1584 13:47:15.296736  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1585 13:47:15.299907   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1586 13:47:15.306404   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1587 13:47:15.313062   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1588 13:47:15.316360    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1589 13:47:15.323181    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1590 13:47:15.329866   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1591 13:47:15.336735   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1592 13:47:15.342829   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1593 13:47:15.352987  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1594 13:47:15.355738  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1595 13:47:15.365948   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1596 13:47:15.372800   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1597 13:47:15.379836   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1598 13:47:15.382506   DOMAIN: 0000: Resource ranges:

 1599 13:47:15.385743   * Base: 1000, Size: 800, Tag: 100

 1600 13:47:15.388976   * Base: 1900, Size: e700, Tag: 100

 1601 13:47:15.395625    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1602 13:47:15.402298  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1603 13:47:15.408827  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1604 13:47:15.415400   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1605 13:47:15.425605   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1606 13:47:15.432290   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1607 13:47:15.438922   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1608 13:47:15.449092   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1609 13:47:15.455800   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1610 13:47:15.461810   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1611 13:47:15.471916   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1612 13:47:15.478301   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1613 13:47:15.485321   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1614 13:47:15.495304   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1615 13:47:15.501847   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1616 13:47:15.508370   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1617 13:47:15.515543   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1618 13:47:15.525313   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1619 13:47:15.532867   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1620 13:47:15.538917   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1621 13:47:15.548275   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1622 13:47:15.554761   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1623 13:47:15.561243   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1624 13:47:15.572173   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1625 13:47:15.578388   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1626 13:47:15.584826   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1627 13:47:15.595216   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1628 13:47:15.601367   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1629 13:47:15.608095   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1630 13:47:15.618224   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1631 13:47:15.624740   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1632 13:47:15.631944   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1633 13:47:15.641683   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1634 13:47:15.645256   DOMAIN: 0000: Resource ranges:

 1635 13:47:15.648376   * Base: 80400000, Size: 3fc00000, Tag: 200

 1636 13:47:15.651878   * Base: d0000000, Size: 28000000, Tag: 200

 1637 13:47:15.658201   * Base: fa000000, Size: 1000000, Tag: 200

 1638 13:47:15.661395   * Base: fb001000, Size: 17ff000, Tag: 200

 1639 13:47:15.664872   * Base: fe800000, Size: 300000, Tag: 200

 1640 13:47:15.668318   * Base: feb80000, Size: 80000, Tag: 200

 1641 13:47:15.674812   * Base: fed00000, Size: 40000, Tag: 200

 1642 13:47:15.677697   * Base: fed70000, Size: 10000, Tag: 200

 1643 13:47:15.681379   * Base: fed88000, Size: 8000, Tag: 200

 1644 13:47:15.684878   * Base: fed93000, Size: d000, Tag: 200

 1645 13:47:15.691409   * Base: feda2000, Size: 1e000, Tag: 200

 1646 13:47:15.694556   * Base: fede0000, Size: 1220000, Tag: 200

 1647 13:47:15.697900   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1648 13:47:15.704417    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1649 13:47:15.711217    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1650 13:47:15.717827    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1651 13:47:15.724451    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1652 13:47:15.731001    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1653 13:47:15.737933    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1654 13:47:15.744099    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1655 13:47:15.750949    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1656 13:47:15.757589    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1657 13:47:15.764005    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1658 13:47:15.771044    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1659 13:47:15.776893    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1660 13:47:15.783523    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1661 13:47:15.790651    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1662 13:47:15.797140    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1663 13:47:15.803783    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1664 13:47:15.810231    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1665 13:47:15.816906    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1666 13:47:15.823731    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1667 13:47:15.833907  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1668 13:47:15.840094  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1669 13:47:15.843670   PCI: 00:06.0: Resource ranges:

 1670 13:47:15.847094   * Base: 80400000, Size: 100000, Tag: 200

 1671 13:47:15.853938    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1672 13:47:15.860405    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1673 13:47:15.870536  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1674 13:47:15.876448  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1675 13:47:15.879691  Root Device assign_resources, bus 0 link: 0

 1676 13:47:15.886403  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1677 13:47:15.892978  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1678 13:47:15.903022  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1679 13:47:15.909597  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1680 13:47:15.916498  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1681 13:47:15.923057  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1682 13:47:15.926545  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1683 13:47:15.936669  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1684 13:47:15.946650  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1685 13:47:15.953608  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1686 13:47:15.959617  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1687 13:47:15.966467  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1688 13:47:15.976269  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1689 13:47:15.979323  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1690 13:47:15.989476  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1691 13:47:15.995887  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1692 13:47:15.998957  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1693 13:47:16.005819  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1694 13:47:16.012352  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1695 13:47:16.019737  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1696 13:47:16.022436  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1697 13:47:16.032168  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1698 13:47:16.039286  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1699 13:47:16.045954  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1700 13:47:16.052522  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1701 13:47:16.055906  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1702 13:47:16.065546  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1703 13:47:16.068568  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1704 13:47:16.072352  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1705 13:47:16.082156  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1706 13:47:16.085312  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1707 13:47:16.091798  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1708 13:47:16.098725  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1709 13:47:16.105085  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1710 13:47:16.108931  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1711 13:47:16.115795  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1712 13:47:16.125457  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1713 13:47:16.128312  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1714 13:47:16.135183  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1715 13:47:16.141864  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1716 13:47:16.148676  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1717 13:47:16.151417  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1718 13:47:16.154965  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1719 13:47:16.161555  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1720 13:47:16.165035  LPC: Trying to open IO window from 800 size 1ff

 1721 13:47:16.174927  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1722 13:47:16.181421  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1723 13:47:16.191444  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1724 13:47:16.194916  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1725 13:47:16.201294  Root Device assign_resources, bus 0 link: 0 done

 1726 13:47:16.201638  Done setting resources.

 1727 13:47:16.207590  Show resources in subtree (Root Device)...After assigning values.

 1728 13:47:16.214205   Root Device child on link 0 CPU_CLUSTER: 0

 1729 13:47:16.217499    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1730 13:47:16.217562     APIC: 00

 1731 13:47:16.220557     APIC: 12

 1732 13:47:16.220615     APIC: 14

 1733 13:47:16.220675     APIC: 16

 1734 13:47:16.224150     APIC: 10

 1735 13:47:16.224202     APIC: 09

 1736 13:47:16.227904     APIC: 08

 1737 13:47:16.228038     APIC: 01

 1738 13:47:16.230655    DOMAIN: 0000 child on link 0 GPIO: 0

 1739 13:47:16.240708    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1740 13:47:16.250487    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1741 13:47:16.250763     GPIO: 0

 1742 13:47:16.254000     PCI: 00:00.0

 1743 13:47:16.263904     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1744 13:47:16.270317     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1745 13:47:16.280163     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1746 13:47:16.290329     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1747 13:47:16.300512     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1748 13:47:16.310373     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1749 13:47:16.320270     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1750 13:47:16.330452     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1751 13:47:16.336870     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1752 13:47:16.346679     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1753 13:47:16.356250     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1754 13:47:16.366316     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1755 13:47:16.376274     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1756 13:47:16.386460     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1757 13:47:16.393047     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1758 13:47:16.403291     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1759 13:47:16.412765     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1760 13:47:16.422777     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1761 13:47:16.432501     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1762 13:47:16.442652     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1763 13:47:16.452392     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1764 13:47:16.462530     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1765 13:47:16.469130     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1766 13:47:16.479535     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1767 13:47:16.489085     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1768 13:47:16.499227     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1769 13:47:16.508964     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1770 13:47:16.519688     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1771 13:47:16.520069     PCI: 00:02.0

 1772 13:47:16.531882     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1773 13:47:16.542029     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1774 13:47:16.552172     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1775 13:47:16.555521     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1776 13:47:16.565711     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1777 13:47:16.568946      GENERIC: 0.0

 1778 13:47:16.571891     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1779 13:47:16.582188     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1780 13:47:16.592067     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1781 13:47:16.601890     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1782 13:47:16.605670      PCI: 01:00.0

 1783 13:47:16.615951      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1784 13:47:16.625271      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1785 13:47:16.628288     PCI: 00:08.0

 1786 13:47:16.628667     PCI: 00:0a.0

 1787 13:47:16.638730     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1788 13:47:16.645244     PCI: 00:0d.0 child on link 0 USB0 port 0

 1789 13:47:16.655522     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1790 13:47:16.658315      USB0 port 0 child on link 0 USB3 port 0

 1791 13:47:16.661739       USB3 port 0

 1792 13:47:16.662147       USB3 port 1

 1793 13:47:16.664948       USB3 port 2

 1794 13:47:16.665198       USB3 port 3

 1795 13:47:16.671554     PCI: 00:14.0 child on link 0 USB0 port 0

 1796 13:47:16.681687     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1797 13:47:16.684450      USB0 port 0 child on link 0 USB2 port 0

 1798 13:47:16.688060       USB2 port 0

 1799 13:47:16.688118       USB2 port 1

 1800 13:47:16.691460       USB2 port 2

 1801 13:47:16.691518       USB2 port 3

 1802 13:47:16.694592       USB2 port 4

 1803 13:47:16.694649       USB2 port 5

 1804 13:47:16.698176       USB2 port 6

 1805 13:47:16.698224       USB2 port 7

 1806 13:47:16.701161       USB2 port 8

 1807 13:47:16.701227       USB2 port 9

 1808 13:47:16.704728       USB3 port 0

 1809 13:47:16.707674       USB3 port 1

 1810 13:47:16.707748       USB3 port 2

 1811 13:47:16.711334       USB3 port 3

 1812 13:47:16.711679     PCI: 00:14.2

 1813 13:47:16.721178     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1814 13:47:16.731602     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1815 13:47:16.737805     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1816 13:47:16.748105     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1817 13:47:16.748529      GENERIC: 0.0

 1818 13:47:16.754684     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1819 13:47:16.764378     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1820 13:47:16.764901      I2C: 00:1a

 1821 13:47:16.767491      I2C: 00:31

 1822 13:47:16.767814      I2C: 00:32

 1823 13:47:16.774277     PCI: 00:15.1 child on link 0 I2C: 00:50

 1824 13:47:16.783954     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1825 13:47:16.784046      I2C: 00:50

 1826 13:47:16.787577     PCI: 00:15.2

 1827 13:47:16.790768     PCI: 00:15.3 child on link 0 I2C: 00:10

 1828 13:47:16.800180     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1829 13:47:16.803631      I2C: 00:10

 1830 13:47:16.803690     PCI: 00:16.0

 1831 13:47:16.813847     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1832 13:47:16.817254     PCI: 00:19.0

 1833 13:47:16.820551     PCI: 00:19.1 child on link 0 I2C: 00:15

 1834 13:47:16.830679     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1835 13:47:16.834098      I2C: 00:15

 1836 13:47:16.834541      I2C: 00:2c

 1837 13:47:16.837445     PCI: 00:1e.0

 1838 13:47:16.847133     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1839 13:47:16.850704     PCI: 00:1e.3 child on link 0 SPI: 00

 1840 13:47:16.860627     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1841 13:47:16.863980      SPI: 00

 1842 13:47:16.866881     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1843 13:47:16.876776     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1844 13:47:16.876932      PNP: 0c09.0

 1845 13:47:16.886620      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1846 13:47:16.890092     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1847 13:47:16.899825     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1848 13:47:16.909394     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1849 13:47:16.912985      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1850 13:47:16.915917       GENERIC: 0.0

 1851 13:47:16.915974       GENERIC: 1.0

 1852 13:47:16.919565     PCI: 00:1f.3

 1853 13:47:16.929460     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1854 13:47:16.939385     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1855 13:47:16.942866     PCI: 00:1f.5

 1856 13:47:16.952820     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1857 13:47:16.956159  Done allocating resources.

 1858 13:47:16.959166  BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms

 1859 13:47:16.965711  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1860 13:47:16.972355  Configure audio over I2S with MAX98373 NAU88L25B.

 1861 13:47:16.975270  Enabling BT offload

 1862 13:47:16.982441  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1863 13:47:16.985939  Enabling resources...

 1864 13:47:16.989033  PCI: 00:00.0 subsystem <- 8086/4609

 1865 13:47:16.992434  PCI: 00:00.0 cmd <- 06

 1866 13:47:16.995551  PCI: 00:02.0 subsystem <- 8086/46b3

 1867 13:47:16.999041  PCI: 00:02.0 cmd <- 03

 1868 13:47:17.002122  PCI: 00:04.0 subsystem <- 8086/461d

 1869 13:47:17.002197  PCI: 00:04.0 cmd <- 02

 1870 13:47:17.006115  PCI: 00:06.0 bridge ctrl <- 0013

 1871 13:47:17.009180  PCI: 00:06.0 subsystem <- 8086/464d

 1872 13:47:17.012247  PCI: 00:06.0 cmd <- 106

 1873 13:47:17.016028  PCI: 00:0a.0 subsystem <- 8086/467d

 1874 13:47:17.019191  PCI: 00:0a.0 cmd <- 02

 1875 13:47:17.022144  PCI: 00:0d.0 subsystem <- 8086/461e

 1876 13:47:17.025699  PCI: 00:0d.0 cmd <- 02

 1877 13:47:17.029226  PCI: 00:14.0 subsystem <- 8086/51ed

 1878 13:47:17.032508  PCI: 00:14.0 cmd <- 02

 1879 13:47:17.035668  PCI: 00:14.2 subsystem <- 8086/51ef

 1880 13:47:17.035749  PCI: 00:14.2 cmd <- 02

 1881 13:47:17.042131  PCI: 00:14.3 subsystem <- 8086/51f0

 1882 13:47:17.042206  PCI: 00:14.3 cmd <- 02

 1883 13:47:17.045895  PCI: 00:15.0 subsystem <- 8086/51e8

 1884 13:47:17.048821  PCI: 00:15.0 cmd <- 02

 1885 13:47:17.051861  PCI: 00:15.1 subsystem <- 8086/51e9

 1886 13:47:17.055359  PCI: 00:15.1 cmd <- 06

 1887 13:47:17.058804  PCI: 00:15.3 subsystem <- 8086/51eb

 1888 13:47:17.061886  PCI: 00:15.3 cmd <- 02

 1889 13:47:17.065078  PCI: 00:16.0 subsystem <- 8086/51e0

 1890 13:47:17.065148  PCI: 00:16.0 cmd <- 02

 1891 13:47:17.072107  PCI: 00:19.1 subsystem <- 8086/51c6

 1892 13:47:17.072182  PCI: 00:19.1 cmd <- 02

 1893 13:47:17.074935  PCI: 00:1e.0 subsystem <- 8086/51a8

 1894 13:47:17.078258  PCI: 00:1e.0 cmd <- 06

 1895 13:47:17.081590  PCI: 00:1e.3 subsystem <- 8086/51ab

 1896 13:47:17.085351  PCI: 00:1e.3 cmd <- 02

 1897 13:47:17.088461  PCI: 00:1f.0 subsystem <- 8086/5182

 1898 13:47:17.092125  PCI: 00:1f.0 cmd <- 407

 1899 13:47:17.095033  PCI: 00:1f.3 subsystem <- 8086/51c8

 1900 13:47:17.098286  PCI: 00:1f.3 cmd <- 02

 1901 13:47:17.101734  PCI: 00:1f.5 subsystem <- 8086/51a4

 1902 13:47:17.101805  PCI: 00:1f.5 cmd <- 406

 1903 13:47:17.105141  PCI: 01:00.0 cmd <- 02

 1904 13:47:17.105211  done.

 1905 13:47:17.111397  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1906 13:47:17.114872  ME: Version: Unavailable

 1907 13:47:17.118341  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1908 13:47:17.121428  Initializing devices...

 1909 13:47:17.124443  Root Device init

 1910 13:47:17.124512  mainboard: EC init

 1911 13:47:17.131544  Chrome EC: Set SMI mask to 0x0000000000000000

 1912 13:47:17.134714  Chrome EC: UHEPI supported

 1913 13:47:17.138301  Chrome EC: clear events_b mask to 0x0000000000000000

 1914 13:47:17.145128  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1915 13:47:17.151704  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1916 13:47:17.158413  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1917 13:47:17.164781  Chrome EC: Set WAKE mask to 0x0000000000000000

 1918 13:47:17.168183  Root Device init finished in 41 msecs

 1919 13:47:17.171468  PCI: 00:00.0 init

 1920 13:47:17.174968  CPU TDP = 15 Watts

 1921 13:47:17.175039  CPU PL1 = 15 Watts

 1922 13:47:17.177801  CPU PL2 = 55 Watts

 1923 13:47:17.181752  CPU PL4 = 123 Watts

 1924 13:47:17.184729  PCI: 00:00.0 init finished in 8 msecs

 1925 13:47:17.184807  PCI: 00:02.0 init

 1926 13:47:17.187776  GMA: Found VBT in CBFS

 1927 13:47:17.191336  GMA: Found valid VBT in CBFS

 1928 13:47:17.197819  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1929 13:47:17.204084                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1930 13:47:17.207528  PCI: 00:02.0 init finished in 18 msecs

 1931 13:47:17.211167  PCI: 00:06.0 init

 1932 13:47:17.213929  Initializing PCH PCIe bridge.

 1933 13:47:17.217450  PCI: 00:06.0 init finished in 3 msecs

 1934 13:47:17.217523  PCI: 00:0a.0 init

 1935 13:47:17.220859  PCI: 00:0a.0 init finished in 0 msecs

 1936 13:47:17.224028  PCI: 00:14.0 init

 1937 13:47:17.227675  PCI: 00:14.0 init finished in 0 msecs

 1938 13:47:17.231061  PCI: 00:14.2 init

 1939 13:47:17.234315  PCI: 00:14.2 init finished in 0 msecs

 1940 13:47:17.234610  PCI: 00:15.0 init

 1941 13:47:17.237769  I2C bus 0 version 0x3230302a

 1942 13:47:17.241098  DW I2C bus 0 at 0x80655000 (400 KHz)

 1943 13:47:17.247759  PCI: 00:15.0 init finished in 6 msecs

 1944 13:47:17.247900  PCI: 00:15.1 init

 1945 13:47:17.251202  I2C bus 1 version 0x3230302a

 1946 13:47:17.254652  DW I2C bus 1 at 0x80656000 (400 KHz)

 1947 13:47:17.257713  PCI: 00:15.1 init finished in 6 msecs

 1948 13:47:17.261564  PCI: 00:15.3 init

 1949 13:47:17.264381  I2C bus 3 version 0x3230302a

 1950 13:47:17.267854  DW I2C bus 3 at 0x80657000 (400 KHz)

 1951 13:47:17.270753  PCI: 00:15.3 init finished in 6 msecs

 1952 13:47:17.274375  PCI: 00:16.0 init

 1953 13:47:17.277580  PCI: 00:16.0 init finished in 0 msecs

 1954 13:47:17.277940  PCI: 00:19.1 init

 1955 13:47:17.280525  I2C bus 5 version 0x3230302a

 1956 13:47:17.284100  DW I2C bus 5 at 0x80659000 (400 KHz)

 1957 13:47:17.287921  PCI: 00:19.1 init finished in 6 msecs

 1958 13:47:17.291057  PCI: 00:1f.0 init

 1959 13:47:17.294202  IOAPIC: Initializing IOAPIC at 0xfec00000

 1960 13:47:17.297079  IOAPIC: ID = 0x02

 1961 13:47:17.300600  IOAPIC: Dumping registers

 1962 13:47:17.300671    reg 0x0000: 0x02000000

 1963 13:47:17.303641    reg 0x0001: 0x00770020

 1964 13:47:17.306920    reg 0x0002: 0x00000000

 1965 13:47:17.310337  IOAPIC: 120 interrupts

 1966 13:47:17.313496  IOAPIC: Clearing IOAPIC at 0xfec00000

 1967 13:47:17.317079  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1968 13:47:17.324118  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1969 13:47:17.327303  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1970 13:47:17.333830  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1971 13:47:17.336897  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1972 13:47:17.343470  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1973 13:47:17.347417  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1974 13:47:17.350489  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1975 13:47:17.357363  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1976 13:47:17.360648  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1977 13:47:17.367151  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1978 13:47:17.370231  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1979 13:47:17.376651  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1980 13:47:17.380149  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1981 13:47:17.386751  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 1982 13:47:17.389630  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 1983 13:47:17.396338  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 1984 13:47:17.399898  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 1985 13:47:17.402872  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 1986 13:47:17.409555  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 1987 13:47:17.413452  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 1988 13:47:17.419767  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 1989 13:47:17.422868  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 1990 13:47:17.429988  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 1991 13:47:17.433338  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 1992 13:47:17.439731  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 1993 13:47:17.442653  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 1994 13:47:17.449398  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 1995 13:47:17.453318  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 1996 13:47:17.456161  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 1997 13:47:17.462807  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 1998 13:47:17.465703  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 1999 13:47:17.472514  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2000 13:47:17.475620  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2001 13:47:17.482757  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2002 13:47:17.485560  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2003 13:47:17.492438  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2004 13:47:17.495580  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2005 13:47:17.499440  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2006 13:47:17.505744  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2007 13:47:17.509398  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2008 13:47:17.516096  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2009 13:47:17.519082  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2010 13:47:17.526057  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2011 13:47:17.528689  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2012 13:47:17.536232  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2013 13:47:17.538777  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2014 13:47:17.542262  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2015 13:47:17.548704  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2016 13:47:17.552338  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2017 13:47:17.559248  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2018 13:47:17.562450  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2019 13:47:17.569577  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2020 13:47:17.571798  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2021 13:47:17.578880  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2022 13:47:17.581815  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2023 13:47:17.585512  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2024 13:47:17.592335  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2025 13:47:17.595539  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2026 13:47:17.602077  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2027 13:47:17.605076  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2028 13:47:17.611486  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2029 13:47:17.614907  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2030 13:47:17.621509  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2031 13:47:17.625068  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2032 13:47:17.628656  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2033 13:47:17.635517  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2034 13:47:17.638402  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2035 13:47:17.644985  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2036 13:47:17.648476  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2037 13:47:17.654953  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2038 13:47:17.658110  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2039 13:47:17.664548  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2040 13:47:17.668082  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2041 13:47:17.674463  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2042 13:47:17.678007  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2043 13:47:17.681147  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2044 13:47:17.687951  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2045 13:47:17.691657  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2046 13:47:17.697901  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2047 13:47:17.701267  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2048 13:47:17.707850  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2049 13:47:17.711491  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2050 13:47:17.717490  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2051 13:47:17.720983  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2052 13:47:17.724265  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2053 13:47:17.730767  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2054 13:47:17.734365  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2055 13:47:17.740971  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2056 13:47:17.743992  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2057 13:47:17.750753  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2058 13:47:17.754169  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2059 13:47:17.760628  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2060 13:47:17.763886  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2061 13:47:17.767359  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2062 13:47:17.773871  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2063 13:47:17.776423  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2064 13:47:17.783596  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2065 13:47:17.786496  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2066 13:47:17.793553  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2067 13:47:17.797232  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2068 13:47:17.803076  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2069 13:47:17.806543  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2070 13:47:17.813101  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2071 13:47:17.817073  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2072 13:47:17.820336  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2073 13:47:17.827043  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2074 13:47:17.830247  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2075 13:47:17.836332  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2076 13:47:17.839878  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2077 13:47:17.846703  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2078 13:47:17.850277  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2079 13:47:17.857002  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2080 13:47:17.859883  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2081 13:47:17.863542  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2082 13:47:17.869927  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2083 13:47:17.873001  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2084 13:47:17.879206  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2085 13:47:17.882716  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2086 13:47:17.889286  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2087 13:47:17.892698  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2088 13:47:17.899081  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2089 13:47:17.902122  PCI: 00:1f.0 init finished in 607 msecs

 2090 13:47:17.902177  PCI: 00:1f.2 init

 2091 13:47:17.905615  apm_control: Disabling ACPI.

 2092 13:47:17.911088  APMC done.

 2093 13:47:17.914448  PCI: 00:1f.2 init finished in 6 msecs

 2094 13:47:17.917447  PCI: 00:1f.3 init

 2095 13:47:17.921174  PCI: 00:1f.3 init finished in 0 msecs

 2096 13:47:17.921249  PCI: 01:00.0 init

 2097 13:47:17.924256  PCI: 01:00.0 init finished in 0 msecs

 2098 13:47:17.927566  PNP: 0c09.0 init

 2099 13:47:17.930561  Google Chrome EC uptime: 12.161 seconds

 2100 13:47:17.937380  Google Chrome AP resets since EC boot: 1

 2101 13:47:17.940699  Google Chrome most recent AP reset causes:

 2102 13:47:17.944059  	0.341: 32775 shutdown: entering G3

 2103 13:47:17.950498  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2104 13:47:17.954079  PNP: 0c09.0 init finished in 23 msecs

 2105 13:47:17.957094  GENERIC: 0.0 init

 2106 13:47:17.960584  GENERIC: 0.0 init finished in 0 msecs

 2107 13:47:17.960659  GENERIC: 1.0 init

 2108 13:47:17.967361  GENERIC: 1.0 init finished in 0 msecs

 2109 13:47:17.967440  Devices initialized

 2110 13:47:17.970371  Show all devs... After init.

 2111 13:47:17.973906  Root Device: enabled 1

 2112 13:47:17.977314  CPU_CLUSTER: 0: enabled 1

 2113 13:47:17.977384  DOMAIN: 0000: enabled 1

 2114 13:47:17.980597  GPIO: 0: enabled 1

 2115 13:47:17.983369  PCI: 00:00.0: enabled 1

 2116 13:47:17.983431  PCI: 00:01.0: enabled 0

 2117 13:47:17.986944  PCI: 00:01.1: enabled 0

 2118 13:47:17.990586  PCI: 00:02.0: enabled 1

 2119 13:47:17.993432  PCI: 00:04.0: enabled 1

 2120 13:47:17.993496  PCI: 00:05.0: enabled 0

 2121 13:47:17.997042  PCI: 00:06.0: enabled 1

 2122 13:47:17.999953  PCI: 00:06.2: enabled 0

 2123 13:47:18.003528  PCI: 00:07.0: enabled 0

 2124 13:47:18.003577  PCI: 00:07.1: enabled 0

 2125 13:47:18.007073  PCI: 00:07.2: enabled 0

 2126 13:47:18.010109  PCI: 00:07.3: enabled 0

 2127 13:47:18.013490  PCI: 00:08.0: enabled 0

 2128 13:47:18.013549  PCI: 00:09.0: enabled 0

 2129 13:47:18.017022  PCI: 00:0a.0: enabled 1

 2130 13:47:18.020201  PCI: 00:0d.0: enabled 1

 2131 13:47:18.020250  PCI: 00:0d.1: enabled 0

 2132 13:47:18.023091  PCI: 00:0d.2: enabled 0

 2133 13:47:18.026635  PCI: 00:0d.3: enabled 0

 2134 13:47:18.030121  PCI: 00:0e.0: enabled 0

 2135 13:47:18.030172  PCI: 00:10.0: enabled 0

 2136 13:47:18.033263  PCI: 00:10.1: enabled 0

 2137 13:47:18.036510  PCI: 00:10.6: enabled 0

 2138 13:47:18.039961  PCI: 00:10.7: enabled 0

 2139 13:47:18.040015  PCI: 00:12.0: enabled 0

 2140 13:47:18.043408  PCI: 00:12.6: enabled 0

 2141 13:47:18.046717  PCI: 00:12.7: enabled 0

 2142 13:47:18.049675  PCI: 00:13.0: enabled 0

 2143 13:47:18.049734  PCI: 00:14.0: enabled 1

 2144 13:47:18.053040  PCI: 00:14.1: enabled 0

 2145 13:47:18.056465  PCI: 00:14.2: enabled 1

 2146 13:47:18.060124  PCI: 00:14.3: enabled 1

 2147 13:47:18.060173  PCI: 00:15.0: enabled 1

 2148 13:47:18.063102  PCI: 00:15.1: enabled 1

 2149 13:47:18.066557  PCI: 00:15.2: enabled 0

 2150 13:47:18.066612  PCI: 00:15.3: enabled 1

 2151 13:47:18.069532  PCI: 00:16.0: enabled 1

 2152 13:47:18.073190  PCI: 00:16.1: enabled 0

 2153 13:47:18.076591  PCI: 00:16.2: enabled 0

 2154 13:47:18.076690  PCI: 00:16.3: enabled 0

 2155 13:47:18.079804  PCI: 00:16.4: enabled 0

 2156 13:47:18.083333  PCI: 00:16.5: enabled 0

 2157 13:47:18.086178  PCI: 00:17.0: enabled 0

 2158 13:47:18.086248  PCI: 00:19.0: enabled 0

 2159 13:47:18.089784  PCI: 00:19.1: enabled 1

 2160 13:47:18.093106  PCI: 00:19.2: enabled 0

 2161 13:47:18.096012  PCI: 00:1a.0: enabled 0

 2162 13:47:18.096081  PCI: 00:1c.0: enabled 0

 2163 13:47:18.099674  PCI: 00:1c.1: enabled 0

 2164 13:47:18.103139  PCI: 00:1c.2: enabled 0

 2165 13:47:18.106210  PCI: 00:1c.3: enabled 0

 2166 13:47:18.106262  PCI: 00:1c.4: enabled 0

 2167 13:47:18.109657  PCI: 00:1c.5: enabled 0

 2168 13:47:18.113395  PCI: 00:1c.6: enabled 0

 2169 13:47:18.113450  PCI: 00:1c.7: enabled 0

 2170 13:47:18.116161  PCI: 00:1d.0: enabled 0

 2171 13:47:18.119499  PCI: 00:1d.1: enabled 0

 2172 13:47:18.122830  PCI: 00:1d.2: enabled 0

 2173 13:47:18.122882  PCI: 00:1d.3: enabled 0

 2174 13:47:18.126239  PCI: 00:1e.0: enabled 1

 2175 13:47:18.129579  PCI: 00:1e.1: enabled 0

 2176 13:47:18.132544  PCI: 00:1e.2: enabled 0

 2177 13:47:18.132599  PCI: 00:1e.3: enabled 1

 2178 13:47:18.136095  PCI: 00:1f.0: enabled 1

 2179 13:47:18.139285  PCI: 00:1f.1: enabled 0

 2180 13:47:18.142676  PCI: 00:1f.2: enabled 1

 2181 13:47:18.142732  PCI: 00:1f.3: enabled 1

 2182 13:47:18.146135  PCI: 00:1f.4: enabled 0

 2183 13:47:18.149102  PCI: 00:1f.5: enabled 1

 2184 13:47:18.152514  PCI: 00:1f.6: enabled 0

 2185 13:47:18.152563  PCI: 00:1f.7: enabled 0

 2186 13:47:18.156020  GENERIC: 0.0: enabled 1

 2187 13:47:18.159280  GENERIC: 0.0: enabled 1

 2188 13:47:18.159348  GENERIC: 1.0: enabled 1

 2189 13:47:18.162856  GENERIC: 0.0: enabled 1

 2190 13:47:18.165786  GENERIC: 1.0: enabled 1

 2191 13:47:18.169479  USB0 port 0: enabled 1

 2192 13:47:18.169554  USB0 port 0: enabled 1

 2193 13:47:18.173104  GENERIC: 0.0: enabled 1

 2194 13:47:18.176410  I2C: 00:1a: enabled 1

 2195 13:47:18.176882  I2C: 00:31: enabled 1

 2196 13:47:18.179654  I2C: 00:32: enabled 1

 2197 13:47:18.183244  I2C: 00:50: enabled 1

 2198 13:47:18.183664  I2C: 00:10: enabled 1

 2199 13:47:18.186630  I2C: 00:15: enabled 1

 2200 13:47:18.189439  I2C: 00:2c: enabled 1

 2201 13:47:18.192938  GENERIC: 0.0: enabled 1

 2202 13:47:18.193350  SPI: 00: enabled 1

 2203 13:47:18.196050  PNP: 0c09.0: enabled 1

 2204 13:47:18.199902  GENERIC: 0.0: enabled 1

 2205 13:47:18.200350  USB3 port 0: enabled 1

 2206 13:47:18.202750  USB3 port 1: enabled 0

 2207 13:47:18.206012  USB3 port 2: enabled 1

 2208 13:47:18.206345  USB3 port 3: enabled 0

 2209 13:47:18.209392  USB2 port 0: enabled 1

 2210 13:47:18.212565  USB2 port 1: enabled 0

 2211 13:47:18.215630  USB2 port 2: enabled 1

 2212 13:47:18.215704  USB2 port 3: enabled 0

 2213 13:47:18.219367  USB2 port 4: enabled 0

 2214 13:47:18.222931  USB2 port 5: enabled 1

 2215 13:47:18.223353  USB2 port 6: enabled 0

 2216 13:47:18.226349  USB2 port 7: enabled 0

 2217 13:47:18.229039  USB2 port 8: enabled 1

 2218 13:47:18.232961  USB2 port 9: enabled 1

 2219 13:47:18.233370  USB3 port 0: enabled 1

 2220 13:47:18.235587  USB3 port 1: enabled 0

 2221 13:47:18.239253  USB3 port 2: enabled 0

 2222 13:47:18.239575  USB3 port 3: enabled 0

 2223 13:47:18.242987  GENERIC: 0.0: enabled 1

 2224 13:47:18.245498  GENERIC: 1.0: enabled 1

 2225 13:47:18.245860  APIC: 00: enabled 1

 2226 13:47:18.248686  APIC: 12: enabled 1

 2227 13:47:18.252217  APIC: 14: enabled 1

 2228 13:47:18.252287  APIC: 16: enabled 1

 2229 13:47:18.255258  APIC: 10: enabled 1

 2230 13:47:18.258806  APIC: 09: enabled 1

 2231 13:47:18.258874  APIC: 08: enabled 1

 2232 13:47:18.261607  APIC: 01: enabled 1

 2233 13:47:18.265447  PCI: 01:00.0: enabled 1

 2234 13:47:18.268816  BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms

 2235 13:47:18.275704  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2236 13:47:18.278760  ELOG: NV offset 0xf20000 size 0x4000

 2237 13:47:18.285118  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2238 13:47:18.291975  ELOG: Event(17) added with size 13 at 2024-05-08 13:47:18 UTC

 2239 13:47:18.298722  ELOG: Event(9E) added with size 10 at 2024-05-08 13:47:18 UTC

 2240 13:47:18.305252  ELOG: Event(9F) added with size 14 at 2024-05-08 13:47:18 UTC

 2241 13:47:18.311656  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2242 13:47:18.318164  ELOG: Event(A0) added with size 9 at 2024-05-08 13:47:18 UTC

 2243 13:47:18.321205  elog_add_boot_reason: Logged dev mode boot

 2244 13:47:18.328142  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2245 13:47:18.331134  Finalize devices...

 2246 13:47:18.331219  PCI: 00:16.0 final

 2247 13:47:18.335212  PCI: 00:1f.2 final

 2248 13:47:18.335281  GENERIC: 0.0 final

 2249 13:47:18.341172  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2250 13:47:18.344744  GENERIC: 1.0 final

 2251 13:47:18.351037  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2252 13:47:18.351118  Devices finalized

 2253 13:47:18.358226  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2254 13:47:18.361421  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2255 13:47:18.368131  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2256 13:47:18.374585  ME: HFSTS1                      : 0x90000245

 2257 13:47:18.378112  ME: HFSTS2                      : 0x82100116

 2258 13:47:18.381695  ME: HFSTS3                      : 0x00000050

 2259 13:47:18.387587  ME: HFSTS4                      : 0x00004000

 2260 13:47:18.390937  ME: HFSTS5                      : 0x00000000

 2261 13:47:18.394044  ME: HFSTS6                      : 0x40600006

 2262 13:47:18.397713  ME: Manufacturing Mode          : NO

 2263 13:47:18.404270  ME: SPI Protection Mode Enabled : YES

 2264 13:47:18.407596  ME: FPFs Committed              : YES

 2265 13:47:18.411095  ME: Manufacturing Vars Locked   : YES

 2266 13:47:18.414420  ME: FW Partition Table          : OK

 2267 13:47:18.417234  ME: Bringup Loader Failure      : NO

 2268 13:47:18.420956  ME: Firmware Init Complete      : YES

 2269 13:47:18.424236  ME: Boot Options Present        : NO

 2270 13:47:18.430660  ME: Update In Progress          : NO

 2271 13:47:18.433979  ME: D0i3 Support                : YES

 2272 13:47:18.437492  ME: Low Power State Enabled     : NO

 2273 13:47:18.440272  ME: CPU Replaced                : YES

 2274 13:47:18.444108  ME: CPU Replacement Valid       : YES

 2275 13:47:18.447813  ME: Current Working State       : 5

 2276 13:47:18.450787  ME: Current Operation State     : 1

 2277 13:47:18.454163  ME: Current Operation Mode      : 0

 2278 13:47:18.456888  ME: Error Code                  : 0

 2279 13:47:18.464169  ME: Enhanced Debug Mode         : NO

 2280 13:47:18.467579  ME: CPU Debug Disabled          : YES

 2281 13:47:18.470524  ME: TXT Support                 : NO

 2282 13:47:18.473977  ME: WP for RO is enabled        : YES

 2283 13:47:18.480729  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2284 13:47:18.487232  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2285 13:47:18.490348  Ramoops buffer: 0x100000@0x76899000.

 2286 13:47:18.496852  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2287 13:47:18.503507  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2288 13:47:18.507269  CBFS: 'fallback/slic' not found.

 2289 13:47:18.510536  ACPI: Writing ACPI tables at 7686d000.

 2290 13:47:18.513758  ACPI:    * FACS

 2291 13:47:18.514094  ACPI:    * DSDT

 2292 13:47:18.520385  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2293 13:47:18.524394  ACPI:    * FADT

 2294 13:47:18.524841  SCI is IRQ9

 2295 13:47:18.527485  ACPI: added table 1/32, length now 40

 2296 13:47:18.530805  ACPI:     * SSDT

 2297 13:47:18.537264  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2298 13:47:18.540738  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2299 13:47:18.547146  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2300 13:47:18.550678  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2301 13:47:18.556648  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2302 13:47:18.560183  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2303 13:47:18.566583  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2304 13:47:18.573439  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2305 13:47:18.576440  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2306 13:47:18.583006  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2307 13:47:18.586372  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2308 13:47:18.592847  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2309 13:47:18.596188  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2310 13:47:18.602682  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2311 13:47:18.609311  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2312 13:47:18.612809  PS2K: Passing 80 keymaps to kernel

 2313 13:47:18.619441  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2314 13:47:18.626143  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2315 13:47:18.632460  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2316 13:47:18.639064  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2317 13:47:18.645547  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2318 13:47:18.652079  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2319 13:47:18.655518  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2320 13:47:18.662095  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2321 13:47:18.668548  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2322 13:47:18.675762  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2323 13:47:18.678639  ACPI: added table 2/32, length now 44

 2324 13:47:18.682151  ACPI:    * MCFG

 2325 13:47:18.685267  ACPI: added table 3/32, length now 48

 2326 13:47:18.685320  ACPI:    * TPM2

 2327 13:47:18.688670  TPM2 log created at 0x7685d000

 2328 13:47:18.695516  ACPI: added table 4/32, length now 52

 2329 13:47:18.695674  ACPI:     * LPIT

 2330 13:47:18.698377  ACPI: added table 5/32, length now 56

 2331 13:47:18.701923  ACPI:    * MADT

 2332 13:47:18.701978  SCI is IRQ9

 2333 13:47:18.705280  ACPI: added table 6/32, length now 60

 2334 13:47:18.708789  cmd_reg from pmc_make_ipc_cmd 1052838

 2335 13:47:18.715028  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2336 13:47:18.721440  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2337 13:47:18.728623  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2338 13:47:18.731677  PMC CrashLog size in discovery mode: 0xC00

 2339 13:47:18.735223  cpu crashlog bar addr: 0x80640000

 2340 13:47:18.738568  cpu discovery table offset: 0x6030

 2341 13:47:18.745423  cpu_crashlog_discovery_table buffer count: 0x3

 2342 13:47:18.751536  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2343 13:47:18.758548  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2344 13:47:18.765141  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2345 13:47:18.768686  PMC crashLog size in discovery mode : 0xC00

 2346 13:47:18.774857  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2347 13:47:18.781389  discover mode PMC crashlog size adjusted to: 0x200

 2348 13:47:18.787865  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2349 13:47:18.791248  discover mode PMC crashlog size adjusted to: 0x0

 2350 13:47:18.794554  m_cpu_crashLog_size : 0x3480 bytes

 2351 13:47:18.797895  CPU crashLog present.

 2352 13:47:18.804529  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2353 13:47:18.811058  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2354 13:47:18.811134  current = 76876550

 2355 13:47:18.815163  ACPI:    * DMAR

 2356 13:47:18.817732  ACPI: added table 7/32, length now 64

 2357 13:47:18.821417  ACPI: added table 8/32, length now 68

 2358 13:47:18.824502  ACPI:    * HPET

 2359 13:47:18.828487  ACPI: added table 9/32, length now 72

 2360 13:47:18.828955  ACPI: done.

 2361 13:47:18.831444  ACPI tables: 38528 bytes.

 2362 13:47:18.835727  smbios_write_tables: 76857000

 2363 13:47:18.838430  EC returned error result code 3

 2364 13:47:18.842087  Couldn't obtain OEM name from CBI

 2365 13:47:18.844941  Create SMBIOS type 16

 2366 13:47:18.845276  Create SMBIOS type 17

 2367 13:47:18.848447  Create SMBIOS type 20

 2368 13:47:18.851895  GENERIC: 0.0 (WIFI Device)

 2369 13:47:18.854926  SMBIOS tables: 2156 bytes.

 2370 13:47:18.858726  Writing table forward entry at 0x00000500

 2371 13:47:18.865138  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2372 13:47:18.868348  Writing coreboot table at 0x76891000

 2373 13:47:18.874862   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2374 13:47:18.878189   1. 0000000000001000-000000000009ffff: RAM

 2375 13:47:18.884442   2. 00000000000a0000-00000000000fffff: RESERVED

 2376 13:47:18.887745   3. 0000000000100000-0000000076856fff: RAM

 2377 13:47:18.894492   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2378 13:47:18.897482   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2379 13:47:18.904164   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2380 13:47:18.907894   7. 0000000077000000-00000000803fffff: RESERVED

 2381 13:47:18.914417   8. 00000000c0000000-00000000cfffffff: RESERVED

 2382 13:47:18.917441   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2383 13:47:18.924082  10. 00000000fb000000-00000000fb000fff: RESERVED

 2384 13:47:18.927398  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2385 13:47:18.934437  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2386 13:47:18.937581  13. 00000000fec00000-00000000fecfffff: RESERVED

 2387 13:47:18.941299  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2388 13:47:18.947533  15. 00000000fed80000-00000000fed87fff: RESERVED

 2389 13:47:18.951314  16. 00000000fed90000-00000000fed92fff: RESERVED

 2390 13:47:18.957454  17. 00000000feda0000-00000000feda1fff: RESERVED

 2391 13:47:18.961092  18. 00000000fedc0000-00000000feddffff: RESERVED

 2392 13:47:18.968184  19. 0000000100000000-000000027fbfffff: RAM

 2393 13:47:18.968661  Passing 4 GPIOs to payload:

 2394 13:47:18.974484              NAME |       PORT | POLARITY |     VALUE

 2395 13:47:18.980928               lid |  undefined |     high |      high

 2396 13:47:18.984243             power |  undefined |     high |       low

 2397 13:47:18.990643             oprom |  undefined |     high |       low

 2398 13:47:18.993830          EC in RW | 0x00000151 |     high |      high

 2399 13:47:18.997976  Board ID: 3

 2400 13:47:18.998407  FW config: 0x131

 2401 13:47:19.003648  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641

 2402 13:47:19.007590  coreboot table: 1788 bytes.

 2403 13:47:19.010599  IMD ROOT    0. 0x76fff000 0x00001000

 2404 13:47:19.013716  IMD SMALL   1. 0x76ffe000 0x00001000

 2405 13:47:19.017439  FSP MEMORY  2. 0x76afe000 0x00500000

 2406 13:47:19.024069  CONSOLE     3. 0x76ade000 0x00020000

 2407 13:47:19.026868  RW MCACHE   4. 0x76add000 0x0000043c

 2408 13:47:19.030166  RO MCACHE   5. 0x76adc000 0x00000fd8

 2409 13:47:19.033017  FMAP        6. 0x76adb000 0x0000064a

 2410 13:47:19.036373  TIME STAMP  7. 0x76ada000 0x00000910

 2411 13:47:19.039709  VBOOT WORK  8. 0x76ac6000 0x00014000

 2412 13:47:19.043150  MEM INFO    9. 0x76ac5000 0x000003b8

 2413 13:47:19.049668  ROMSTG STCK10. 0x76ac4000 0x00001000

 2414 13:47:19.053293  AFTER CAR  11. 0x76ab8000 0x0000c000

 2415 13:47:19.056201  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2416 13:47:19.059655  ACPI BERT  13. 0x76a1e000 0x00010000

 2417 13:47:19.062509  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2418 13:47:19.065961  REFCODE    15. 0x769ae000 0x0006f000

 2419 13:47:19.069849  SMM BACKUP 16. 0x7699e000 0x00010000

 2420 13:47:19.076579  IGD OPREGION17. 0x76999000 0x00004203

 2421 13:47:19.079697  RAMOOPS    18. 0x76899000 0x00100000

 2422 13:47:19.083493  COREBOOT   19. 0x76891000 0x00008000

 2423 13:47:19.086068  ACPI       20. 0x7686d000 0x00024000

 2424 13:47:19.089717  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2425 13:47:19.092531  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2426 13:47:19.096084  CPU CRASHLOG23. 0x76858000 0x00003480

 2427 13:47:19.102925  SMBIOS     24. 0x76857000 0x00001000

 2428 13:47:19.103335  IMD small region:

 2429 13:47:19.106367    IMD ROOT    0. 0x76ffec00 0x00000400

 2430 13:47:19.109603    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2431 13:47:19.115586    VPD         2. 0x76ffeb80 0x00000058

 2432 13:47:19.119228    POWER STATE 3. 0x76ffeb20 0x00000044

 2433 13:47:19.122431    ROMSTAGE    4. 0x76ffeb00 0x00000004

 2434 13:47:19.125665    ACPI GNVS   5. 0x76ffeaa0 0x00000048

 2435 13:47:19.128653    TYPE_C INFO 6. 0x76ffea80 0x0000000c

 2436 13:47:19.135515  BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms

 2437 13:47:19.138531  MTRR: Physical address space:

 2438 13:47:19.145411  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2439 13:47:19.152067  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2440 13:47:19.158680  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2441 13:47:19.165815  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2442 13:47:19.172176  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2443 13:47:19.175691  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2444 13:47:19.182470  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2445 13:47:19.188788  MTRR: Fixed MSR 0x250 0x0606060606060606

 2446 13:47:19.192147  MTRR: Fixed MSR 0x258 0x0606060606060606

 2447 13:47:19.195887  MTRR: Fixed MSR 0x259 0x0000000000000000

 2448 13:47:19.198827  MTRR: Fixed MSR 0x268 0x0606060606060606

 2449 13:47:19.205054  MTRR: Fixed MSR 0x269 0x0606060606060606

 2450 13:47:19.209037  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2451 13:47:19.211931  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2452 13:47:19.215448  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2453 13:47:19.219102  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2454 13:47:19.225057  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2455 13:47:19.228571  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2456 13:47:19.232055  call enable_fixed_mtrr()

 2457 13:47:19.235303  CPU physical address size: 39 bits

 2458 13:47:19.242172  MTRR: default type WB/UC MTRR counts: 6/6.

 2459 13:47:19.245562  MTRR: UC selected as default type.

 2460 13:47:19.248448  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2461 13:47:19.255277  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2462 13:47:19.261767  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2463 13:47:19.268454  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2464 13:47:19.275005  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2465 13:47:19.281767  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2466 13:47:19.287676  MTRR: Fixed MSR 0x250 0x0606060606060606

 2467 13:47:19.291404  MTRR: Fixed MSR 0x258 0x0606060606060606

 2468 13:47:19.295212  MTRR: Fixed MSR 0x259 0x0000000000000000

 2469 13:47:19.298086  MTRR: Fixed MSR 0x268 0x0606060606060606

 2470 13:47:19.304940  MTRR: Fixed MSR 0x269 0x0606060606060606

 2471 13:47:19.308340  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2472 13:47:19.311172  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2473 13:47:19.314856  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2474 13:47:19.321108  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2475 13:47:19.324729  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2476 13:47:19.327660  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2477 13:47:19.331363  MTRR: Fixed MSR 0x250 0x0606060606060606

 2478 13:47:19.334562  MTRR: Fixed MSR 0x250 0x0606060606060606

 2479 13:47:19.337661  call enable_fixed_mtrr()

 2480 13:47:19.341308  MTRR: Fixed MSR 0x250 0x0606060606060606

 2481 13:47:19.347589  CPU physical address size: 39 bits

 2482 13:47:19.351266  MTRR: Fixed MSR 0x250 0x0606060606060606

 2483 13:47:19.354611  MTRR: Fixed MSR 0x258 0x0606060606060606

 2484 13:47:19.357722  MTRR: Fixed MSR 0x258 0x0606060606060606

 2485 13:47:19.361271  MTRR: Fixed MSR 0x259 0x0000000000000000

 2486 13:47:19.367867  MTRR: Fixed MSR 0x268 0x0606060606060606

 2487 13:47:19.370422  MTRR: Fixed MSR 0x269 0x0606060606060606

 2488 13:47:19.374076  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2489 13:47:19.377214  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2490 13:47:19.383625  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2491 13:47:19.387322  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2492 13:47:19.390331  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2493 13:47:19.393802  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2494 13:47:19.400768  MTRR: Fixed MSR 0x250 0x0606060606060606

 2495 13:47:19.403756  MTRR: Fixed MSR 0x259 0x0000000000000000

 2496 13:47:19.407346  MTRR: Fixed MSR 0x258 0x0606060606060606

 2497 13:47:19.410452  MTRR: Fixed MSR 0x258 0x0606060606060606

 2498 13:47:19.417530  MTRR: Fixed MSR 0x258 0x0606060606060606

 2499 13:47:19.420398  MTRR: Fixed MSR 0x259 0x0000000000000000

 2500 13:47:19.423785  MTRR: Fixed MSR 0x268 0x0606060606060606

 2501 13:47:19.426833  MTRR: Fixed MSR 0x269 0x0606060606060606

 2502 13:47:19.430361  call enable_fixed_mtrr()

 2503 13:47:19.433833  MTRR: Fixed MSR 0x259 0x0000000000000000

 2504 13:47:19.440335  MTRR: Fixed MSR 0x268 0x0606060606060606

 2505 13:47:19.443423  MTRR: Fixed MSR 0x269 0x0606060606060606

 2506 13:47:19.447165  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2507 13:47:19.450545  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2508 13:47:19.453484  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2509 13:47:19.460626  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2510 13:47:19.463375  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2511 13:47:19.466795  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2512 13:47:19.469811  MTRR: Fixed MSR 0x259 0x0000000000000000

 2513 13:47:19.476386  MTRR: Fixed MSR 0x268 0x0606060606060606

 2514 13:47:19.479862  MTRR: Fixed MSR 0x269 0x0606060606060606

 2515 13:47:19.483112  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2516 13:47:19.486571  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2517 13:47:19.493262  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2518 13:47:19.496605  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2519 13:47:19.499574  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2520 13:47:19.503147  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2521 13:47:19.509914  MTRR: Fixed MSR 0x268 0x0606060606060606

 2522 13:47:19.509983  call enable_fixed_mtrr()

 2523 13:47:19.512884  call enable_fixed_mtrr()

 2524 13:47:19.516482  MTRR: Fixed MSR 0x250 0x0606060606060606

 2525 13:47:19.520072  CPU physical address size: 39 bits

 2526 13:47:19.523058  CPU physical address size: 39 bits

 2527 13:47:19.529585  MTRR: Fixed MSR 0x269 0x0606060606060606

 2528 13:47:19.533278  CPU physical address size: 39 bits

 2529 13:47:19.536253  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2530 13:47:19.539958  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2531 13:47:19.543014  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2532 13:47:19.549503  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2533 13:47:19.553095  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2534 13:47:19.556851  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2535 13:47:19.559442  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2536 13:47:19.566048  MTRR: Fixed MSR 0x258 0x0606060606060606

 2537 13:47:19.566119  call enable_fixed_mtrr()

 2538 13:47:19.573215  MTRR: Fixed MSR 0x259 0x0000000000000000

 2539 13:47:19.576177  MTRR: Fixed MSR 0x268 0x0606060606060606

 2540 13:47:19.579797  MTRR: Fixed MSR 0x269 0x0606060606060606

 2541 13:47:19.583075  CPU physical address size: 39 bits

 2542 13:47:19.586487  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2543 13:47:19.592626  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2544 13:47:19.595928  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2545 13:47:19.599316  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2546 13:47:19.602985  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2547 13:47:19.609421  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2548 13:47:19.613039  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2549 13:47:19.615946  call enable_fixed_mtrr()

 2550 13:47:19.619765  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2551 13:47:19.622884  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2552 13:47:19.626268  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2553 13:47:19.632330  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2554 13:47:19.635351  CPU physical address size: 39 bits

 2555 13:47:19.639181  call enable_fixed_mtrr()

 2556 13:47:19.642656  CPU physical address size: 39 bits

 2557 13:47:19.646162  

 2558 13:47:19.646583  MTRR check

 2559 13:47:19.649723  Fixed MTRRs   : Enabled

 2560 13:47:19.650135  Variable MTRRs: Enabled

 2561 13:47:19.650358  

 2562 13:47:19.656286  BS: BS_WRITE_TABLES exit times (exec / console): 246 / 150 ms

 2563 13:47:19.659254  Checking cr50 for pending updates

 2564 13:47:19.672122  Reading cr50 TPM mode

 2565 13:47:19.687141  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2566 13:47:19.697129  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2567 13:47:19.701017  Checking segment from ROM address 0xf96cbe6c

 2568 13:47:19.703746  Checking segment from ROM address 0xf96cbe88

 2569 13:47:19.710055  Loading segment from ROM address 0xf96cbe6c

 2570 13:47:19.710434    code (compression=1)

 2571 13:47:19.720450    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2572 13:47:19.730008  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2573 13:47:19.730464  using LZMA

 2574 13:47:19.753198  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2575 13:47:19.760097  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2576 13:47:19.768329  Loading segment from ROM address 0xf96cbe88

 2577 13:47:19.771206    Entry Point 0x30000000

 2578 13:47:19.771515  Loaded segments

 2579 13:47:19.777595  BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms

 2580 13:47:19.784713  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2581 13:47:19.787382  Finalizing chipset.

 2582 13:47:19.791006  apm_control: Finalizing SMM.

 2583 13:47:19.791353  APMC done.

 2584 13:47:19.794581  HECI: CSE device 16.1 is disabled

 2585 13:47:19.797855  HECI: CSE device 16.2 is disabled

 2586 13:47:19.800857  HECI: CSE device 16.3 is disabled

 2587 13:47:19.804061  HECI: CSE device 16.4 is disabled

 2588 13:47:19.807358  HECI: CSE device 16.5 is disabled

 2589 13:47:19.810661  HECI: Sending End-of-Post

 2590 13:47:19.819897  CSE: EOP requested action: continue boot

 2591 13:47:19.823011  CSE EOP successful, continuing boot

 2592 13:47:19.829222  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2593 13:47:19.833113  mp_park_aps done after 0 msecs.

 2594 13:47:19.836231  Jumping to boot code at 0x30000000(0x76891000)

 2595 13:47:19.846105  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2596 13:47:19.850768  

 2597 13:47:19.851180  

 2598 13:47:19.851396  

 2599 13:47:19.853624  Starting depthcharge on Volmar...

 2600 13:47:19.854037  

 2601 13:47:19.854888  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2602 13:47:19.855217  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2603 13:47:19.855478  Setting prompt string to ['brya:']
 2604 13:47:19.855723  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2605 13:47:19.860012  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2606 13:47:19.860339  

 2607 13:47:19.867022  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2608 13:47:19.867447  

 2609 13:47:19.873427  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2610 13:47:19.873821  

 2611 13:47:19.876947  configure_storage: Failed to remap 1C:2

 2612 13:47:19.877185  

 2613 13:47:19.879722  Wipe memory regions:

 2614 13:47:19.879792  

 2615 13:47:19.883491  	[0x00000000001000, 0x000000000a0000)

 2616 13:47:19.883569  

 2617 13:47:19.886600  	[0x00000000100000, 0x00000030000000)

 2618 13:47:20.001402  

 2619 13:47:20.005132  	[0x00000032668e60, 0x00000076857000)

 2620 13:47:20.165881  

 2621 13:47:20.169286  	[0x00000100000000, 0x0000027fc00000)

 2622 13:47:21.082605  

 2623 13:47:21.085117  ec_init: CrosEC protocol v3 supported (256, 256)

 2624 13:47:21.694203  

 2625 13:47:21.694602  R8152: Initializing

 2626 13:47:21.694829  

 2627 13:47:21.697505  Version 9 (ocp_data = 6010)

 2628 13:47:21.697826  

 2629 13:47:21.700467  R8152: Done initializing

 2630 13:47:21.700838  

 2631 13:47:21.704061  Adding net device

 2632 13:47:22.005309  

 2633 13:47:22.008221  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2634 13:47:22.008632  

 2635 13:47:22.008900  

 2636 13:47:22.009121  

 2637 13:47:22.009662  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2639 13:47:22.110663  brya: tftpboot 192.168.201.1 13693411/tftp-deploy-zfu_pu3r/kernel/bzImage 13693411/tftp-deploy-zfu_pu3r/kernel/cmdline 13693411/tftp-deploy-zfu_pu3r/ramdisk/ramdisk.cpio.gz

 2640 13:47:22.111246  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2641 13:47:22.111751  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
 2642 13:47:22.115694  tftpboot 192.168.201.1 13693411/tftp-deploy-zfu_pu3r/kernel/bzIploy-zfu_pu3r/kernel/cmdline 13693411/tftp-deploy-zfu_pu3r/ramdisk/ramdisk.cpio.gz

 2643 13:47:22.116030  

 2644 13:47:22.116256  Waiting for link

 2645 13:47:22.318900  

 2646 13:47:22.319352  done.

 2647 13:47:22.319616  

 2648 13:47:22.319911  MAC: 00:e0:4c:68:02:ef

 2649 13:47:22.320230  

 2650 13:47:22.322066  Sending DHCP discover... done.

 2651 13:47:22.322430  

 2652 13:47:22.325013  Waiting for reply... done.

 2653 13:47:22.325435  

 2654 13:47:22.330362  Sending DHCP request... done.

 2655 13:47:22.330701  

 2656 13:47:22.335114  Waiting for reply... done.

 2657 13:47:22.335450  

 2658 13:47:22.335677  My ip is 192.168.201.16

 2659 13:47:22.335869  

 2660 13:47:22.339004  The DHCP server ip is 192.168.201.1

 2661 13:47:22.342247  

 2662 13:47:22.345310  TFTP server IP predefined by user: 192.168.201.1

 2663 13:47:22.345629  

 2664 13:47:22.351984  Bootfile predefined by user: 13693411/tftp-deploy-zfu_pu3r/kernel/bzImage

 2665 13:47:22.352310  

 2666 13:47:22.355362  Sending tftp read request... done.

 2667 13:47:22.355805  

 2668 13:47:22.363025  Waiting for the transfer... 

 2669 13:47:22.363099  

 2670 13:47:22.595213  00000000 ################################################################

 2671 13:47:22.595350  

 2672 13:47:22.870865  00080000 ################################################################

 2673 13:47:22.870996  

 2674 13:47:23.097945  00100000 ################################################################

 2675 13:47:23.098064  

 2676 13:47:23.326939  00180000 ################################################################

 2677 13:47:23.327079  

 2678 13:47:23.572086  00200000 ################################################################

 2679 13:47:23.572207  

 2680 13:47:23.850151  00280000 ################################################################

 2681 13:47:23.850270  

 2682 13:47:24.081046  00300000 ################################################################

 2683 13:47:24.081163  

 2684 13:47:24.314420  00380000 ################################################################

 2685 13:47:24.314554  

 2686 13:47:24.545580  00400000 ################################################################

 2687 13:47:24.545704  

 2688 13:47:24.775418  00480000 ################################################################

 2689 13:47:24.775543  

 2690 13:47:25.003004  00500000 ################################################################

 2691 13:47:25.003134  

 2692 13:47:25.232388  00580000 ################################################################

 2693 13:47:25.232506  

 2694 13:47:25.463314  00600000 ################################################################

 2695 13:47:25.463446  

 2696 13:47:25.697139  00680000 ################################################################

 2697 13:47:25.697266  

 2698 13:47:25.931217  00700000 ################################################################

 2699 13:47:25.931346  

 2700 13:47:26.157757  00780000 ################################################################

 2701 13:47:26.157881  

 2702 13:47:26.386445  00800000 ################################################################

 2703 13:47:26.386568  

 2704 13:47:26.612841  00880000 ################################################################

 2705 13:47:26.612975  

 2706 13:47:26.893317  00900000 ################################################################

 2707 13:47:26.893446  

 2708 13:47:27.129259  00980000 ################################################################

 2709 13:47:27.129387  

 2710 13:47:27.360240  00a00000 ################################################################

 2711 13:47:27.360367  

 2712 13:47:27.590414  00a80000 ################################################################

 2713 13:47:27.590551  

 2714 13:47:27.819799  00b00000 ################################################################

 2715 13:47:27.819916  

 2716 13:47:28.105703  00b80000 ################################################################

 2717 13:47:28.105820  

 2718 13:47:28.336404  00c00000 ################################################################

 2719 13:47:28.336527  

 2720 13:47:28.564781  00c80000 ################################################################

 2721 13:47:28.564902  

 2722 13:47:28.780285  00d00000 ############################################################ done.

 2723 13:47:28.780410  

 2724 13:47:28.783749  The bootfile was 14122896 bytes long.

 2725 13:47:28.783828  

 2726 13:47:28.787266  Sending tftp read request... done.

 2727 13:47:28.787339  

 2728 13:47:28.790033  Waiting for the transfer... 

 2729 13:47:28.790107  

 2730 13:47:29.019018  00000000 ################################################################

 2731 13:47:29.019142  

 2732 13:47:29.246375  00080000 ################################################################

 2733 13:47:29.246508  

 2734 13:47:29.482283  00100000 ################################################################

 2735 13:47:29.482408  

 2736 13:47:29.713214  00180000 ################################################################

 2737 13:47:29.713349  

 2738 13:47:29.997920  00200000 ################################################################

 2739 13:47:29.998045  

 2740 13:47:30.229559  00280000 ################################################################

 2741 13:47:30.229687  

 2742 13:47:30.458318  00300000 ################################################################

 2743 13:47:30.458459  

 2744 13:47:30.690886  00380000 ################################################################

 2745 13:47:30.691021  

 2746 13:47:30.924094  00400000 ################################################################

 2747 13:47:30.924214  

 2748 13:47:31.154863  00480000 ################################################################

 2749 13:47:31.154988  

 2750 13:47:31.385757  00500000 ################################################################

 2751 13:47:31.385887  

 2752 13:47:31.613223  00580000 ################################################################

 2753 13:47:31.613353  

 2754 13:47:31.842244  00600000 ################################################################

 2755 13:47:31.842370  

 2756 13:47:32.072398  00680000 ################################################################

 2757 13:47:32.072508  

 2758 13:47:32.298502  00700000 ################################################################

 2759 13:47:32.298625  

 2760 13:47:32.526597  00780000 ################################################################

 2761 13:47:32.526724  

 2762 13:47:32.758332  00800000 ################################################################

 2763 13:47:32.758460  

 2764 13:47:32.852707  00880000 ########################### done.

 2765 13:47:32.852837  

 2766 13:47:32.856023  Sending tftp read request... done.

 2767 13:47:32.856100  

 2768 13:47:32.859223  Waiting for the transfer... 

 2769 13:47:32.859303  

 2770 13:47:32.862294  00000000 # done.

 2771 13:47:32.862359  

 2772 13:47:32.872325  Command line loaded dynamically from TFTP file: 13693411/tftp-deploy-zfu_pu3r/kernel/cmdline

 2773 13:47:32.872414  

 2774 13:47:32.885482  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2775 13:47:32.892458  

 2776 13:47:32.895982  Shutting down all USB controllers.

 2777 13:47:32.896039  

 2778 13:47:32.896099  Removing current net device

 2779 13:47:32.896140  

 2780 13:47:32.899156  Finalizing coreboot

 2781 13:47:32.899471  

 2782 13:47:32.905737  Exiting depthcharge with code 4 at timestamp: 23335065

 2783 13:47:32.906033  

 2784 13:47:32.906235  

 2785 13:47:32.906411  Starting kernel ...

 2786 13:47:32.906577  

 2787 13:47:32.906745  

 2788 13:47:32.907708  end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
 2789 13:47:32.908123  start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
 2790 13:47:32.908378  Setting prompt string to ['Linux version [0-9]']
 2791 13:47:32.908620  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2792 13:47:32.908851  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2794 13:52:00.908983  end: 2.2.5 auto-login-action (duration 00:04:28) [common]
 2796 13:52:00.909784  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
 2798 13:52:00.910389  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2801 13:52:00.911356  end: 2 depthcharge-action (duration 00:05:00) [common]
 2803 13:52:00.912197  Cleaning after the job
 2804 13:52:00.912514  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/ramdisk
 2805 13:52:00.913853  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/kernel
 2806 13:52:00.915055  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693411/tftp-deploy-zfu_pu3r/modules
 2807 13:52:00.915350  start: 4.1 power-off (timeout 00:00:30) [common]
 2808 13:52:00.915473  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
 2809 13:52:01.004772  >> Command sent successfully.

 2810 13:52:01.014774  Returned 0 in 0 seconds
 2811 13:52:01.115715  end: 4.1 power-off (duration 00:00:00) [common]
 2813 13:52:01.116817  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2814 13:52:01.117560  Listened to connection for namespace 'common' for up to 1s
 2816 13:52:01.118525  Listened to connection for namespace 'common' for up to 1s
 2817 13:52:02.118515  Finalising connection for namespace 'common'
 2818 13:52:02.119202  Disconnecting from shell: Finalise
 2819 13:52:02.119560  
 2820 13:52:02.220379  end: 4.2 read-feedback (duration 00:00:01) [common]
 2821 13:52:02.220898  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13693411
 2822 13:52:02.232633  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13693411
 2823 13:52:02.232771  JobError: Your job cannot terminate cleanly.