Boot log: acer-cp514-2h-1130g7-volteer

    1 13:49:47.631619  lava-dispatcher, installed at version: 2024.01
    2 13:49:47.631828  start: 0 validate
    3 13:49:47.631955  Start time: 2024-05-08 13:49:47.631945+00:00 (UTC)
    4 13:49:47.632069  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:49:47.632194  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 13:49:47.892345  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:49:47.892561  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2482-gc729d2d07124%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:49:48.152131  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:49:48.152889  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2482-gc729d2d07124%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:49:53.045253  validate duration: 5.41
   12 13:49:53.045531  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:49:53.045638  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:49:53.045736  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:49:53.045856  Not decompressing ramdisk as can be used compressed.
   16 13:49:53.045936  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 13:49:53.045997  saving as /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/ramdisk/rootfs.cpio.gz
   18 13:49:53.046058  total size: 8417901 (8 MB)
   19 13:49:53.796162  progress   0 % (0 MB)
   20 13:49:53.809168  progress   5 % (0 MB)
   21 13:49:53.822118  progress  10 % (0 MB)
   22 13:49:53.825697  progress  15 % (1 MB)
   23 13:49:53.827910  progress  20 % (1 MB)
   24 13:49:53.830152  progress  25 % (2 MB)
   25 13:49:53.832574  progress  30 % (2 MB)
   26 13:49:53.834642  progress  35 % (2 MB)
   27 13:49:53.837002  progress  40 % (3 MB)
   28 13:49:53.839474  progress  45 % (3 MB)
   29 13:49:53.841741  progress  50 % (4 MB)
   30 13:49:53.843997  progress  55 % (4 MB)
   31 13:49:53.846314  progress  60 % (4 MB)
   32 13:49:53.848729  progress  65 % (5 MB)
   33 13:49:53.850971  progress  70 % (5 MB)
   34 13:49:53.853185  progress  75 % (6 MB)
   35 13:49:53.855327  progress  80 % (6 MB)
   36 13:49:53.857864  progress  85 % (6 MB)
   37 13:49:53.860136  progress  90 % (7 MB)
   38 13:49:53.862396  progress  95 % (7 MB)
   39 13:49:53.864513  progress 100 % (8 MB)
   40 13:49:53.864767  8 MB downloaded in 0.82 s (9.81 MB/s)
   41 13:49:53.864969  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 13:49:53.865254  end: 1.1 download-retry (duration 00:00:01) [common]
   44 13:49:53.865460  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 13:49:53.865585  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 13:49:53.865720  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2482-gc729d2d07124/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 13:49:53.865833  saving as /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/kernel/bzImage
   48 13:49:53.865985  total size: 14122896 (13 MB)
   49 13:49:53.866086  No compression specified
   50 13:49:53.867182  progress   0 % (0 MB)
   51 13:49:53.871138  progress   5 % (0 MB)
   52 13:49:53.875080  progress  10 % (1 MB)
   53 13:49:53.878545  progress  15 % (2 MB)
   54 13:49:53.882222  progress  20 % (2 MB)
   55 13:49:53.885765  progress  25 % (3 MB)
   56 13:49:53.889447  progress  30 % (4 MB)
   57 13:49:53.893003  progress  35 % (4 MB)
   58 13:49:53.896719  progress  40 % (5 MB)
   59 13:49:53.900198  progress  45 % (6 MB)
   60 13:49:53.903895  progress  50 % (6 MB)
   61 13:49:53.907588  progress  55 % (7 MB)
   62 13:49:53.911093  progress  60 % (8 MB)
   63 13:49:53.914737  progress  65 % (8 MB)
   64 13:49:53.918208  progress  70 % (9 MB)
   65 13:49:53.921825  progress  75 % (10 MB)
   66 13:49:53.925334  progress  80 % (10 MB)
   67 13:49:53.928954  progress  85 % (11 MB)
   68 13:49:53.932469  progress  90 % (12 MB)
   69 13:49:53.936058  progress  95 % (12 MB)
   70 13:49:53.939526  progress 100 % (13 MB)
   71 13:49:53.939764  13 MB downloaded in 0.07 s (182.56 MB/s)
   72 13:49:53.939908  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:49:53.940137  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:49:53.940224  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 13:49:53.940310  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 13:49:53.940517  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2482-gc729d2d07124/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 13:49:53.940586  saving as /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/modules/modules.tar
   79 13:49:53.940646  total size: 483852 (0 MB)
   80 13:49:53.940707  Using unxz to decompress xz
   81 13:49:53.944676  progress   6 % (0 MB)
   82 13:49:53.945086  progress  13 % (0 MB)
   83 13:49:53.945319  progress  20 % (0 MB)
   84 13:49:53.946923  progress  27 % (0 MB)
   85 13:49:53.948840  progress  33 % (0 MB)
   86 13:49:53.950657  progress  40 % (0 MB)
   87 13:49:53.952467  progress  47 % (0 MB)
   88 13:49:53.954291  progress  54 % (0 MB)
   89 13:49:53.956146  progress  60 % (0 MB)
   90 13:49:53.957759  progress  67 % (0 MB)
   91 13:49:53.959474  progress  74 % (0 MB)
   92 13:49:53.961360  progress  81 % (0 MB)
   93 13:49:53.963003  progress  88 % (0 MB)
   94 13:49:53.964900  progress  94 % (0 MB)
   95 13:49:53.966749  progress 100 % (0 MB)
   96 13:49:53.972139  0 MB downloaded in 0.03 s (14.66 MB/s)
   97 13:49:53.972382  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 13:49:53.972646  end: 1.3 download-retry (duration 00:00:00) [common]
  100 13:49:53.972736  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 13:49:53.972829  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 13:49:53.972907  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 13:49:53.972990  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 13:49:53.973221  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp
  105 13:49:53.973394  makedir: /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin
  106 13:49:53.973500  makedir: /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/tests
  107 13:49:53.973598  makedir: /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/results
  108 13:49:53.973709  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-add-keys
  109 13:49:53.973853  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-add-sources
  110 13:49:53.973981  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-background-process-start
  111 13:49:53.974109  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-background-process-stop
  112 13:49:53.974232  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-common-functions
  113 13:49:53.974353  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-echo-ipv4
  114 13:49:53.974475  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-install-packages
  115 13:49:53.974596  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-installed-packages
  116 13:49:53.974716  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-os-build
  117 13:49:53.974835  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-probe-channel
  118 13:49:53.974956  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-probe-ip
  119 13:49:53.975077  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-target-ip
  120 13:49:53.975201  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-target-mac
  121 13:49:53.975322  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-target-storage
  122 13:49:53.975447  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-case
  123 13:49:53.975568  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-event
  124 13:49:53.975688  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-feedback
  125 13:49:53.975808  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-raise
  126 13:49:53.975929  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-reference
  127 13:49:53.976053  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-runner
  128 13:49:53.976175  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-set
  129 13:49:53.976296  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-test-shell
  130 13:49:53.976461  Updating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-install-packages (oe)
  131 13:49:53.976607  Updating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/bin/lava-installed-packages (oe)
  132 13:49:53.976726  Creating /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/environment
  133 13:49:53.976824  LAVA metadata
  134 13:49:53.976897  - LAVA_JOB_ID=13693438
  135 13:49:53.976962  - LAVA_DISPATCHER_IP=192.168.201.1
  136 13:49:53.977069  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 13:49:53.977135  skipped lava-vland-overlay
  138 13:49:53.977211  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 13:49:53.977292  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 13:49:53.977353  skipped lava-multinode-overlay
  141 13:49:53.977424  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 13:49:53.977504  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 13:49:53.977577  Loading test definitions
  144 13:49:53.977669  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 13:49:53.977745  Using /lava-13693438 at stage 0
  146 13:49:53.978058  uuid=13693438_1.4.2.3.1 testdef=None
  147 13:49:53.978144  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 13:49:53.978227  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 13:49:53.978755  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 13:49:53.978974  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 13:49:53.979601  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 13:49:53.979826  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 13:49:53.980466  runner path: /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/0/tests/0_dmesg test_uuid 13693438_1.4.2.3.1
  156 13:49:53.980621  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 13:49:53.980832  Creating lava-test-runner.conf files
  159 13:49:53.980895  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13693438/lava-overlay-vrnjn8mp/lava-13693438/0 for stage 0
  160 13:49:53.980983  - 0_dmesg
  161 13:49:53.981076  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 13:49:53.981158  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  163 13:49:53.988140  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 13:49:53.988239  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  165 13:49:53.988322  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 13:49:53.988448  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 13:49:53.988530  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  168 13:49:54.230196  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  169 13:49:54.230584  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  170 13:49:54.230710  extracting modules file /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13693438/extract-overlay-ramdisk-a6s3in68/ramdisk
  171 13:49:54.245479  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 13:49:54.245608  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  173 13:49:54.245699  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13693438/compress-overlay-11hhnwgs/overlay-1.4.2.4.tar.gz to ramdisk
  174 13:49:54.245771  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13693438/compress-overlay-11hhnwgs/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13693438/extract-overlay-ramdisk-a6s3in68/ramdisk
  175 13:49:54.252374  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 13:49:54.252483  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  177 13:49:54.252576  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 13:49:54.252664  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  179 13:49:54.252741  Building ramdisk /var/lib/lava/dispatcher/tmp/13693438/extract-overlay-ramdisk-a6s3in68/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13693438/extract-overlay-ramdisk-a6s3in68/ramdisk
  180 13:49:54.378630  >> 51653 blocks

  181 13:49:55.255202  rename /var/lib/lava/dispatcher/tmp/13693438/extract-overlay-ramdisk-a6s3in68/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/ramdisk/ramdisk.cpio.gz
  182 13:49:55.255644  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  183 13:49:55.255773  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  184 13:49:55.255876  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  185 13:49:55.255969  No mkimage arch provided, not using FIT.
  186 13:49:55.256055  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 13:49:55.256142  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 13:49:55.256241  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  189 13:49:55.256332  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  190 13:49:55.256425  No LXC device requested
  191 13:49:55.256504  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 13:49:55.256597  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  193 13:49:55.256678  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 13:49:55.256754  Checking files for TFTP limit of 4294967296 bytes.
  195 13:49:55.257148  end: 1 tftp-deploy (duration 00:00:02) [common]
  196 13:49:55.257251  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 13:49:55.257341  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 13:49:55.257462  substitutions:
  199 13:49:55.257528  - {DTB}: None
  200 13:49:55.257589  - {INITRD}: 13693438/tftp-deploy-nrtu8m_2/ramdisk/ramdisk.cpio.gz
  201 13:49:55.257646  - {KERNEL}: 13693438/tftp-deploy-nrtu8m_2/kernel/bzImage
  202 13:49:55.257703  - {LAVA_MAC}: None
  203 13:49:55.257759  - {PRESEED_CONFIG}: None
  204 13:49:55.257814  - {PRESEED_LOCAL}: None
  205 13:49:55.257868  - {RAMDISK}: 13693438/tftp-deploy-nrtu8m_2/ramdisk/ramdisk.cpio.gz
  206 13:49:55.257923  - {ROOT_PART}: None
  207 13:49:55.257976  - {ROOT}: None
  208 13:49:55.258030  - {SERVER_IP}: 192.168.201.1
  209 13:49:55.258082  - {TEE}: None
  210 13:49:55.258135  Parsed boot commands:
  211 13:49:55.258187  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 13:49:55.258358  Parsed boot commands: tftpboot 192.168.201.1 13693438/tftp-deploy-nrtu8m_2/kernel/bzImage 13693438/tftp-deploy-nrtu8m_2/kernel/cmdline 13693438/tftp-deploy-nrtu8m_2/ramdisk/ramdisk.cpio.gz
  213 13:49:55.258442  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 13:49:55.258528  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 13:49:55.258617  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 13:49:55.258702  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 13:49:55.258769  Not connected, no need to disconnect.
  218 13:49:55.258844  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 13:49:55.258923  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 13:49:55.258996  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-6'
  221 13:49:55.262676  Setting prompt string to ['lava-test: # ']
  222 13:49:55.263022  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 13:49:55.263128  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 13:49:55.263225  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 13:49:55.263462  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 13:49:55.263640  Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-6'
  227 13:50:04.044620  Returned 0 in 8 seconds
  228 13:50:04.145304  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  230 13:50:04.145630  end: 2.2.2 reset-device (duration 00:00:09) [common]
  231 13:50:04.145726  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  232 13:50:04.145817  Setting prompt string to 'Starting depthcharge on Voema...'
  233 13:50:04.145888  Changing prompt to 'Starting depthcharge on Voema...'
  234 13:50:04.145957  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  235 13:50:04.146323  [Enter `^Ec?' for help]

  236 13:50:04.146431  

  237 13:50:04.146586  

  238 13:50:04.146685  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  239 13:50:04.146778  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  240 13:50:04.146866  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  241 13:50:04.146955  CPU: AES supported, TXT NOT supported, VT supported

  242 13:50:04.147045  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  243 13:50:04.147132  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  244 13:50:04.147218  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  245 13:50:04.147301  VBOOT: Loading verstage.

  246 13:50:04.147384  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  247 13:50:04.147468  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  248 13:50:04.147553  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  249 13:50:04.147637  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  250 13:50:04.147722  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  251 13:50:04.147807  

  252 13:50:04.147891  

  253 13:50:04.147977  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  254 13:50:04.148061  Probing TPM: . done!

  255 13:50:04.148143  TPM ready after 0 ms

  256 13:50:04.148230  Connected to device vid:did:rid of 1ae0:0028:00

  257 13:50:04.148317  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  258 13:50:04.148416  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  259 13:50:04.148518  Initialized TPM device CR50 revision 0

  260 13:50:04.148615  tlcl_send_startup: Startup return code is 0

  261 13:50:04.148700  TPM: setup succeeded

  262 13:50:04.148787  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  263 13:50:04.148873  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  264 13:50:04.148957  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  265 13:50:04.149041  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  266 13:50:04.149126  Chrome EC: UHEPI supported

  267 13:50:04.149210  Phase 1

  268 13:50:04.149293  FMAP: area GBB found @ 1805000 (458752 bytes)

  269 13:50:04.149379  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  270 13:50:04.149465  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  271 13:50:04.149549  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  272 13:50:04.149633  VB2:vb2_check_recovery() Recovery was requested manually

  273 13:50:04.149717  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  274 13:50:04.149803  Recovery requested (1009000e)

  275 13:50:04.149886  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 13:50:04.149970  tlcl_extend: response is 0

  277 13:50:04.150053  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 13:50:04.150136  tlcl_extend: response is 0

  279 13:50:04.150219  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 13:50:04.150303  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 13:50:04.150387  BS: verstage times (exec / console): total (unknown) / 148 ms

  282 13:50:04.150469  

  283 13:50:04.150550  

  284 13:50:04.150634  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 13:50:04.150718  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 13:50:04.150801  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 13:50:04.150884  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 13:50:04.150967  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 13:50:04.151049  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 13:50:04.151134  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  291 13:50:04.151218  TCO_STS:   0000 0000

  292 13:50:04.151301  GEN_PMCON: d0015038 00002200

  293 13:50:04.151383  GBLRST_CAUSE: 00000000 00000000

  294 13:50:04.151461  HPR_CAUSE0: 00000000

  295 13:50:04.151516  prev_sleep_state 5

  296 13:50:04.151569  Boot Count incremented to 29181

  297 13:50:04.151622  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 13:50:04.151675  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 13:50:04.151729  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 13:50:04.151782  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 13:50:04.151835  Chrome EC: UHEPI supported

  302 13:50:04.151913  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 13:50:04.151997  Probing TPM:  done!

  304 13:50:04.152081  Connected to device vid:did:rid of 1ae0:0028:00

  305 13:50:04.152164  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  306 13:50:04.152248  Initialized TPM device CR50 revision 0

  307 13:50:04.152332  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 13:50:04.152405  MRC: Hash idx 0x100b comparison successful.

  309 13:50:04.152462  MRC cache found, size faa8

  310 13:50:04.152515  bootmode is set to: 2

  311 13:50:04.152568  SPD index = 0

  312 13:50:04.152621  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 13:50:04.152675  SPD: module type is LPDDR4X

  314 13:50:04.152727  SPD: module part number is MT53E512M64D4NW-046

  315 13:50:04.152781  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 13:50:04.152838  SPD: device width 16 bits, bus width 16 bits

  317 13:50:04.152893  SPD: module size is 1024 MB (per channel)

  318 13:50:04.152947  CBMEM:

  319 13:50:04.152999  IMD: root @ 0x76fff000 254 entries.

  320 13:50:04.153051  IMD: root @ 0x76ffec00 62 entries.

  321 13:50:04.153103  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 13:50:04.153344  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 13:50:04.153425  External stage cache:

  324 13:50:04.153497  IMD: root @ 0x7b3ff000 254 entries.

  325 13:50:04.153550  IMD: root @ 0x7b3fec00 62 entries.

  326 13:50:04.153602  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 13:50:04.153655  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 13:50:04.153708  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 13:50:04.153761  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 13:50:04.153812  cse_lite: Skip switching to RW in the recovery path

  331 13:50:04.153865  8 DIMMs found

  332 13:50:04.153918  SMM Memory Map

  333 13:50:04.153970  SMRAM       : 0x7b000000 0x800000

  334 13:50:04.154027   Subregion 0: 0x7b000000 0x200000

  335 13:50:04.154082   Subregion 1: 0x7b200000 0x200000

  336 13:50:04.154134   Subregion 2: 0x7b400000 0x400000

  337 13:50:04.154186  top_of_ram = 0x77000000

  338 13:50:04.154239  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 13:50:04.154292  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 13:50:04.154344  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 13:50:04.154397  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 13:50:04.154450  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 13:50:04.154502  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 13:50:04.154555  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 13:50:04.154608  Processing 211 relocs. Offset value of 0x74c0b000

  346 13:50:04.154668  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 13:50:04.154752  

  348 13:50:04.154834  

  349 13:50:04.154918  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 13:50:04.155002  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 13:50:04.155087  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 13:50:04.155174  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 13:50:04.155260  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 13:50:04.155346  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 13:50:04.155430  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 13:50:04.155514  Processing 5008 relocs. Offset value of 0x75d98000

  357 13:50:04.155597  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 13:50:04.155655  

  359 13:50:04.155710  

  360 13:50:04.155763  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 13:50:04.155816  Normal boot

  362 13:50:04.155870  FW_CONFIG value is 0x804c02

  363 13:50:04.155923  PCI: 00:07.0 disabled by fw_config

  364 13:50:04.155975  PCI: 00:07.1 disabled by fw_config

  365 13:50:04.156027  PCI: 00:0d.2 disabled by fw_config

  366 13:50:04.156111  PCI: 00:1c.7 disabled by fw_config

  367 13:50:04.156194  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 13:50:04.156278  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 13:50:04.156369  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 13:50:04.156458  GENERIC: 0.0 disabled by fw_config

  371 13:50:04.156512  GENERIC: 1.0 disabled by fw_config

  372 13:50:04.156564  fw_config match found: DB_USB=USB3_ACTIVE

  373 13:50:04.156616  fw_config match found: DB_USB=USB3_ACTIVE

  374 13:50:04.156672  fw_config match found: DB_USB=USB3_ACTIVE

  375 13:50:04.156730  fw_config match found: DB_USB=USB3_ACTIVE

  376 13:50:04.156814  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 13:50:04.156898  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 13:50:04.156983  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 13:50:04.157066  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 13:50:04.157149  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 13:50:04.157232  microcode: Update skipped, already up-to-date

  382 13:50:04.157317  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 13:50:04.157401  Detected 4 core, 8 thread CPU.

  384 13:50:04.157484  Setting up SMI for CPU

  385 13:50:04.157566  IED base = 0x7b400000

  386 13:50:04.157648  IED size = 0x00400000

  387 13:50:04.157729  Will perform SMM setup.

  388 13:50:04.157810  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 13:50:04.157867  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 13:50:04.157921  Processing 16 relocs. Offset value of 0x00030000

  391 13:50:04.157974  Attempting to start 7 APs

  392 13:50:04.158029  Waiting for 10ms after sending INIT.

  393 13:50:04.158082  Waiting for 1st SIPI to complete...done.

  394 13:50:04.158134  AP: slot 1 apic_id 1.

  395 13:50:04.158186  AP: slot 3 apic_id 7.

  396 13:50:04.158238  AP: slot 7 apic_id 6.

  397 13:50:04.158321  AP: slot 5 apic_id 4.

  398 13:50:04.158403  AP: slot 4 apic_id 5.

  399 13:50:04.158485  AP: slot 6 apic_id 2.

  400 13:50:04.158566  AP: slot 2 apic_id 3.

  401 13:50:04.158648  Waiting for 2nd SIPI to complete...done.

  402 13:50:04.158732  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 13:50:04.158828  Processing 13 relocs. Offset value of 0x00038000

  404 13:50:04.158911  Unable to locate Global NVS

  405 13:50:04.158995  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 13:50:04.159081  Installing permanent SMM handler to 0x7b000000

  407 13:50:04.159166  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 13:50:04.159250  Processing 794 relocs. Offset value of 0x7b010000

  409 13:50:04.159523  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 13:50:04.159616  Processing 13 relocs. Offset value of 0x7b008000

  411 13:50:04.159675  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 13:50:04.159730  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 13:50:04.159784  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 13:50:04.159837  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 13:50:04.159917  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 13:50:04.159969  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 13:50:04.160083  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 13:50:04.160204  Unable to locate Global NVS

  419 13:50:04.160287  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 13:50:04.160418  Clearing SMI status registers

  421 13:50:04.160479  SMI_STS: PM1 

  422 13:50:04.160536  PM1_STS: PWRBTN 

  423 13:50:04.160590  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 13:50:04.160643  In relocation handler: CPU 0

  425 13:50:04.160695  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 13:50:04.160748  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 13:50:04.160801  Relocation complete.

  428 13:50:04.160874  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 13:50:04.160929  In relocation handler: CPU 1

  430 13:50:04.160981  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 13:50:04.161034  Relocation complete.

  432 13:50:04.161091  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  433 13:50:04.161146  In relocation handler: CPU 6

  434 13:50:04.161198  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  435 13:50:04.161251  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  436 13:50:04.161303  Relocation complete.

  437 13:50:04.161355  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  438 13:50:04.161407  In relocation handler: CPU 2

  439 13:50:04.161459  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  440 13:50:04.161514  Relocation complete.

  441 13:50:04.161576  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  442 13:50:04.161663  In relocation handler: CPU 7

  443 13:50:04.161746  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  444 13:50:04.161829  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  445 13:50:04.161911  Relocation complete.

  446 13:50:04.161998  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  447 13:50:04.162081  In relocation handler: CPU 3

  448 13:50:04.162167  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  449 13:50:04.162250  Relocation complete.

  450 13:50:04.162333  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  451 13:50:04.162416  In relocation handler: CPU 5

  452 13:50:04.162498  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  453 13:50:04.162584  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 13:50:04.162668  Relocation complete.

  455 13:50:04.162752  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  456 13:50:04.162843  In relocation handler: CPU 4

  457 13:50:04.162941  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  458 13:50:04.163029  Relocation complete.

  459 13:50:04.163114  Initializing CPU #0

  460 13:50:04.163198  CPU: vendor Intel device 806c1

  461 13:50:04.163281  CPU: family 06, model 8c, stepping 01

  462 13:50:04.163363  Clearing out pending MCEs

  463 13:50:04.163435  Setting up local APIC...

  464 13:50:04.163492   apic_id: 0x00 done.

  465 13:50:04.163545  Turbo is available but hidden

  466 13:50:04.163598  Turbo is available and visible

  467 13:50:04.163653  microcode: Update skipped, already up-to-date

  468 13:50:04.163707  CPU #0 initialized

  469 13:50:04.163789  Initializing CPU #6

  470 13:50:04.163871  Initializing CPU #2

  471 13:50:04.163953  CPU: vendor Intel device 806c1

  472 13:50:04.164039  CPU: family 06, model 8c, stepping 01

  473 13:50:04.164124  CPU: vendor Intel device 806c1

  474 13:50:04.164208  CPU: family 06, model 8c, stepping 01

  475 13:50:04.164290  Clearing out pending MCEs

  476 13:50:04.164429  Clearing out pending MCEs

  477 13:50:04.164492  Setting up local APIC...

  478 13:50:04.164555  Initializing CPU #3

  479 13:50:04.164637  Initializing CPU #7

  480 13:50:04.164718  CPU: vendor Intel device 806c1

  481 13:50:04.164779  CPU: family 06, model 8c, stepping 01

  482 13:50:04.164859  Initializing CPU #4

  483 13:50:04.164941  Initializing CPU #5

  484 13:50:04.165026  CPU: vendor Intel device 806c1

  485 13:50:04.165109  CPU: family 06, model 8c, stepping 01

  486 13:50:04.165191  CPU: vendor Intel device 806c1

  487 13:50:04.165273  CPU: family 06, model 8c, stepping 01

  488 13:50:04.165355  Clearing out pending MCEs

  489 13:50:04.165437  Clearing out pending MCEs

  490 13:50:04.165522  Setting up local APIC...

  491 13:50:04.165605   apic_id: 0x02 done.

  492 13:50:04.165688  Setting up local APIC...

  493 13:50:04.165771  Initializing CPU #1

  494 13:50:04.165855  Setting up local APIC...

  495 13:50:04.165939  microcode: Update skipped, already up-to-date

  496 13:50:04.166023   apic_id: 0x03 done.

  497 13:50:04.166105  CPU #6 initialized

  498 13:50:04.166191  microcode: Update skipped, already up-to-date

  499 13:50:04.166275  CPU: vendor Intel device 806c1

  500 13:50:04.166359  CPU: family 06, model 8c, stepping 01

  501 13:50:04.166441   apic_id: 0x04 done.

  502 13:50:04.166523   apic_id: 0x05 done.

  503 13:50:04.166607  microcode: Update skipped, already up-to-date

  504 13:50:04.166692  microcode: Update skipped, already up-to-date

  505 13:50:04.166774  CPU #5 initialized

  506 13:50:04.166858  CPU #4 initialized

  507 13:50:04.166939  CPU #2 initialized

  508 13:50:04.167025  Clearing out pending MCEs

  509 13:50:04.167108  Clearing out pending MCEs

  510 13:50:04.167190  CPU: vendor Intel device 806c1

  511 13:50:04.167272  CPU: family 06, model 8c, stepping 01

  512 13:50:04.167354  Setting up local APIC...

  513 13:50:04.167439  Setting up local APIC...

  514 13:50:04.167524  Clearing out pending MCEs

  515 13:50:04.167606   apic_id: 0x07 done.

  516 13:50:04.167688  Setting up local APIC...

  517 13:50:04.167770   apic_id: 0x01 done.

  518 13:50:04.167851   apic_id: 0x06 done.

  519 13:50:04.167934  microcode: Update skipped, already up-to-date

  520 13:50:04.168000  microcode: Update skipped, already up-to-date

  521 13:50:04.168072  microcode: Update skipped, already up-to-date

  522 13:50:04.168155  CPU #3 initialized

  523 13:50:04.168478  CPU #7 initialized

  524 13:50:04.168571  CPU #1 initialized

  525 13:50:04.168691  bsp_do_flight_plan done after 454 msecs.

  526 13:50:04.168798  CPU: frequency set to 4000 MHz

  527 13:50:04.168887  Enabling SMIs.

  528 13:50:04.168975  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  529 13:50:04.169059  SATAXPCIE1 indicates PCIe NVMe is present

  530 13:50:04.169142  Probing TPM:  done!

  531 13:50:04.169224  Connected to device vid:did:rid of 1ae0:0028:00

  532 13:50:04.169309  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  533 13:50:04.169392  Initialized TPM device CR50 revision 0

  534 13:50:04.169474  Enabling S0i3.4

  535 13:50:04.169558  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 13:50:04.169643  Found a VBT of 8704 bytes after decompression

  537 13:50:04.169729  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 13:50:04.169815  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 13:50:04.169897  FSPS returned 0

  540 13:50:04.169980  Executing Phase 1 of FspMultiPhaseSiInit

  541 13:50:04.170066  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 13:50:04.170153  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 13:50:04.170235  Raw Buffer output 0 00000511

  544 13:50:04.170318  Raw Buffer output 1 00000000

  545 13:50:04.170399  pmc_send_ipc_cmd succeeded

  546 13:50:04.170484  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 13:50:04.170568  Raw Buffer output 0 00000321

  548 13:50:04.170653  Raw Buffer output 1 00000000

  549 13:50:04.170735  pmc_send_ipc_cmd succeeded

  550 13:50:04.170817  Detected 4 core, 8 thread CPU.

  551 13:50:04.170900  Detected 4 core, 8 thread CPU.

  552 13:50:04.170982  Display FSP Version Info HOB

  553 13:50:04.171064  Reference Code - CPU = a.0.4c.31

  554 13:50:04.171146  uCode Version = 0.0.0.86

  555 13:50:04.171228  TXT ACM version = ff.ff.ff.ffff

  556 13:50:04.171310  Reference Code - ME = a.0.4c.31

  557 13:50:04.171392  MEBx version = 0.0.0.0

  558 13:50:04.171477  ME Firmware Version = Consumer SKU

  559 13:50:04.171562  Reference Code - PCH = a.0.4c.31

  560 13:50:04.171644  PCH-CRID Status = Disabled

  561 13:50:04.171727  PCH-CRID Original Value = ff.ff.ff.ffff

  562 13:50:04.171810  PCH-CRID New Value = ff.ff.ff.ffff

  563 13:50:04.171892  OPROM - RST - RAID = ff.ff.ff.ffff

  564 13:50:04.171978  PCH Hsio Version = 4.0.0.0

  565 13:50:04.172062  Reference Code - SA - System Agent = a.0.4c.31

  566 13:50:04.172144  Reference Code - MRC = 2.0.0.1

  567 13:50:04.172227  SA - PCIe Version = a.0.4c.31

  568 13:50:04.172309  SA-CRID Status = Disabled

  569 13:50:04.172432  SA-CRID Original Value = 0.0.0.1

  570 13:50:04.172516  SA-CRID New Value = 0.0.0.1

  571 13:50:04.172602  OPROM - VBIOS = ff.ff.ff.ffff

  572 13:50:04.172687  IO Manageability Engine FW Version = 11.1.4.0

  573 13:50:04.172769  PHY Build Version = 0.0.0.e0

  574 13:50:04.172855  Thunderbolt(TM) FW Version = 0.0.0.0

  575 13:50:04.172989  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 13:50:04.173075  ITSS IRQ Polarities Before:

  577 13:50:04.173157  IPC0: 0xffffffff

  578 13:50:04.173239  IPC1: 0xffffffff

  579 13:50:04.173321  IPC2: 0xffffffff

  580 13:50:04.173403  IPC3: 0xffffffff

  581 13:50:04.173488  ITSS IRQ Polarities After:

  582 13:50:04.173572  IPC0: 0xffffffff

  583 13:50:04.173654  IPC1: 0xffffffff

  584 13:50:04.173735  IPC2: 0xffffffff

  585 13:50:04.173821  IPC3: 0xffffffff

  586 13:50:04.173883  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 13:50:04.173937  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 13:50:04.173993  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 13:50:04.174050  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 13:50:04.174106  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 237 ms

  591 13:50:04.174162  Enumerating buses...

  592 13:50:04.174218  Show all devs... Before device enumeration.

  593 13:50:04.174271  Root Device: enabled 1

  594 13:50:04.174324  DOMAIN: 0000: enabled 1

  595 13:50:04.174376  CPU_CLUSTER: 0: enabled 1

  596 13:50:04.174428  PCI: 00:00.0: enabled 1

  597 13:50:04.174483  PCI: 00:02.0: enabled 1

  598 13:50:04.174539  PCI: 00:04.0: enabled 1

  599 13:50:04.174593  PCI: 00:05.0: enabled 1

  600 13:50:04.174645  PCI: 00:06.0: enabled 0

  601 13:50:04.174698  PCI: 00:07.0: enabled 0

  602 13:50:04.174750  PCI: 00:07.1: enabled 0

  603 13:50:04.174801  PCI: 00:07.2: enabled 0

  604 13:50:04.174856  PCI: 00:07.3: enabled 0

  605 13:50:04.174940  PCI: 00:08.0: enabled 1

  606 13:50:04.175024  PCI: 00:09.0: enabled 0

  607 13:50:04.175108  PCI: 00:0a.0: enabled 0

  608 13:50:04.175190  PCI: 00:0d.0: enabled 1

  609 13:50:04.175272  PCI: 00:0d.1: enabled 0

  610 13:50:04.175354  PCI: 00:0d.2: enabled 0

  611 13:50:04.175436  PCI: 00:0d.3: enabled 0

  612 13:50:04.175521  PCI: 00:0e.0: enabled 0

  613 13:50:04.175603  PCI: 00:10.2: enabled 1

  614 13:50:04.175685  PCI: 00:10.6: enabled 0

  615 13:50:04.175766  PCI: 00:10.7: enabled 0

  616 13:50:04.175848  PCI: 00:12.0: enabled 0

  617 13:50:04.175933  PCI: 00:12.6: enabled 0

  618 13:50:04.176017  PCI: 00:13.0: enabled 0

  619 13:50:04.176099  PCI: 00:14.0: enabled 1

  620 13:50:04.176181  PCI: 00:14.1: enabled 0

  621 13:50:04.176263  PCI: 00:14.2: enabled 1

  622 13:50:04.176346  PCI: 00:14.3: enabled 1

  623 13:50:04.176447  PCI: 00:15.0: enabled 1

  624 13:50:04.176503  PCI: 00:15.1: enabled 1

  625 13:50:04.176558  PCI: 00:15.2: enabled 1

  626 13:50:04.176610  PCI: 00:15.3: enabled 1

  627 13:50:04.176663  PCI: 00:16.0: enabled 1

  628 13:50:04.176715  PCI: 00:16.1: enabled 0

  629 13:50:04.176767  PCI: 00:16.2: enabled 0

  630 13:50:04.176823  PCI: 00:16.3: enabled 0

  631 13:50:04.176899  PCI: 00:16.4: enabled 0

  632 13:50:04.176993  PCI: 00:16.5: enabled 0

  633 13:50:04.177078  PCI: 00:17.0: enabled 1

  634 13:50:04.177160  PCI: 00:19.0: enabled 0

  635 13:50:04.177245  PCI: 00:19.1: enabled 1

  636 13:50:04.177329  PCI: 00:19.2: enabled 0

  637 13:50:04.177411  PCI: 00:1c.0: enabled 1

  638 13:50:04.177493  PCI: 00:1c.1: enabled 0

  639 13:50:04.177575  PCI: 00:1c.2: enabled 0

  640 13:50:04.177657  PCI: 00:1c.3: enabled 0

  641 13:50:04.177739  PCI: 00:1c.4: enabled 0

  642 13:50:04.177821  PCI: 00:1c.5: enabled 0

  643 13:50:04.177903  PCI: 00:1c.6: enabled 1

  644 13:50:04.177988  PCI: 00:1c.7: enabled 0

  645 13:50:04.178072  PCI: 00:1d.0: enabled 1

  646 13:50:04.178349  PCI: 00:1d.1: enabled 0

  647 13:50:04.178436  PCI: 00:1d.2: enabled 1

  648 13:50:04.178522  PCI: 00:1d.3: enabled 0

  649 13:50:04.178646  PCI: 00:1e.0: enabled 1

  650 13:50:04.178728  PCI: 00:1e.1: enabled 0

  651 13:50:04.178810  PCI: 00:1e.2: enabled 1

  652 13:50:04.178893  PCI: 00:1e.3: enabled 1

  653 13:50:04.178976  PCI: 00:1f.0: enabled 1

  654 13:50:04.179060  PCI: 00:1f.1: enabled 0

  655 13:50:04.179143  PCI: 00:1f.2: enabled 1

  656 13:50:04.179225  PCI: 00:1f.3: enabled 1

  657 13:50:04.179307  PCI: 00:1f.4: enabled 0

  658 13:50:04.179389  PCI: 00:1f.5: enabled 1

  659 13:50:04.179450  PCI: 00:1f.6: enabled 0

  660 13:50:04.179506  PCI: 00:1f.7: enabled 0

  661 13:50:04.179559  APIC: 00: enabled 1

  662 13:50:04.179612  GENERIC: 0.0: enabled 1

  663 13:50:04.179664  GENERIC: 0.0: enabled 1

  664 13:50:04.179715  GENERIC: 1.0: enabled 1

  665 13:50:04.179767  GENERIC: 0.0: enabled 1

  666 13:50:04.179818  GENERIC: 1.0: enabled 1

  667 13:50:04.179870  USB0 port 0: enabled 1

  668 13:50:04.179922  GENERIC: 0.0: enabled 1

  669 13:50:04.179974  USB0 port 0: enabled 1

  670 13:50:04.180025  GENERIC: 0.0: enabled 1

  671 13:50:04.180079  I2C: 00:1a: enabled 1

  672 13:50:04.180164  I2C: 00:31: enabled 1

  673 13:50:04.180247  I2C: 00:32: enabled 1

  674 13:50:04.180329  I2C: 00:10: enabled 1

  675 13:50:04.180421  I2C: 00:15: enabled 1

  676 13:50:04.180504  GENERIC: 0.0: enabled 0

  677 13:50:04.180589  GENERIC: 1.0: enabled 0

  678 13:50:04.180673  GENERIC: 0.0: enabled 1

  679 13:50:04.180755  SPI: 00: enabled 1

  680 13:50:04.180837  SPI: 00: enabled 1

  681 13:50:04.180919  PNP: 0c09.0: enabled 1

  682 13:50:04.181002  GENERIC: 0.0: enabled 1

  683 13:50:04.181087  USB3 port 0: enabled 1

  684 13:50:04.181169  USB3 port 1: enabled 1

  685 13:50:04.181251  USB3 port 2: enabled 0

  686 13:50:04.181333  USB3 port 3: enabled 0

  687 13:50:04.181414  USB2 port 0: enabled 0

  688 13:50:04.181496  USB2 port 1: enabled 1

  689 13:50:04.181578  USB2 port 2: enabled 1

  690 13:50:04.181660  USB2 port 3: enabled 0

  691 13:50:04.181742  USB2 port 4: enabled 1

  692 13:50:04.181824  USB2 port 5: enabled 0

  693 13:50:04.181905  USB2 port 6: enabled 0

  694 13:50:04.181987  USB2 port 7: enabled 0

  695 13:50:04.182069  USB2 port 8: enabled 0

  696 13:50:04.182151  USB2 port 9: enabled 0

  697 13:50:04.182210  USB3 port 0: enabled 0

  698 13:50:04.182267  USB3 port 1: enabled 1

  699 13:50:04.182320  USB3 port 2: enabled 0

  700 13:50:04.182372  USB3 port 3: enabled 0

  701 13:50:04.182424  GENERIC: 0.0: enabled 1

  702 13:50:04.182476  GENERIC: 1.0: enabled 1

  703 13:50:04.182528  APIC: 01: enabled 1

  704 13:50:04.182580  APIC: 03: enabled 1

  705 13:50:04.182632  APIC: 07: enabled 1

  706 13:50:04.182684  APIC: 05: enabled 1

  707 13:50:04.182736  APIC: 04: enabled 1

  708 13:50:04.182789  APIC: 02: enabled 1

  709 13:50:04.182844  APIC: 06: enabled 1

  710 13:50:04.182898  Compare with tree...

  711 13:50:04.182951  Root Device: enabled 1

  712 13:50:04.183003   DOMAIN: 0000: enabled 1

  713 13:50:04.183090    PCI: 00:00.0: enabled 1

  714 13:50:04.183173    PCI: 00:02.0: enabled 1

  715 13:50:04.183255    PCI: 00:04.0: enabled 1

  716 13:50:04.183339     GENERIC: 0.0: enabled 1

  717 13:50:04.183423    PCI: 00:05.0: enabled 1

  718 13:50:04.183505    PCI: 00:06.0: enabled 0

  719 13:50:04.183587    PCI: 00:07.0: enabled 0

  720 13:50:04.183669     GENERIC: 0.0: enabled 1

  721 13:50:04.183751    PCI: 00:07.1: enabled 0

  722 13:50:04.183833     GENERIC: 1.0: enabled 1

  723 13:50:04.183915    PCI: 00:07.2: enabled 0

  724 13:50:04.183997     GENERIC: 0.0: enabled 1

  725 13:50:04.184079    PCI: 00:07.3: enabled 0

  726 13:50:04.184161     GENERIC: 1.0: enabled 1

  727 13:50:04.184243    PCI: 00:08.0: enabled 1

  728 13:50:04.184324    PCI: 00:09.0: enabled 0

  729 13:50:04.184395    PCI: 00:0a.0: enabled 0

  730 13:50:04.184448    PCI: 00:0d.0: enabled 1

  731 13:50:04.184501     USB0 port 0: enabled 1

  732 13:50:04.184553      USB3 port 0: enabled 1

  733 13:50:04.184606      USB3 port 1: enabled 1

  734 13:50:04.184660      USB3 port 2: enabled 0

  735 13:50:04.184714      USB3 port 3: enabled 0

  736 13:50:04.184766    PCI: 00:0d.1: enabled 0

  737 13:50:04.184818    PCI: 00:0d.2: enabled 0

  738 13:50:04.184871     GENERIC: 0.0: enabled 1

  739 13:50:04.184922    PCI: 00:0d.3: enabled 0

  740 13:50:04.184974    PCI: 00:0e.0: enabled 0

  741 13:50:04.185026    PCI: 00:10.2: enabled 1

  742 13:50:04.185078    PCI: 00:10.6: enabled 0

  743 13:50:04.185133    PCI: 00:10.7: enabled 0

  744 13:50:04.185188    PCI: 00:12.0: enabled 0

  745 13:50:04.185240    PCI: 00:12.6: enabled 0

  746 13:50:04.185292    PCI: 00:13.0: enabled 0

  747 13:50:04.185344    PCI: 00:14.0: enabled 1

  748 13:50:04.185396     USB0 port 0: enabled 1

  749 13:50:04.185448      USB2 port 0: enabled 0

  750 13:50:04.185500      USB2 port 1: enabled 1

  751 13:50:04.185552      USB2 port 2: enabled 1

  752 13:50:04.185603      USB2 port 3: enabled 0

  753 13:50:04.185655      USB2 port 4: enabled 1

  754 13:50:04.185706      USB2 port 5: enabled 0

  755 13:50:04.185758      USB2 port 6: enabled 0

  756 13:50:04.185809      USB2 port 7: enabled 0

  757 13:50:04.185861      USB2 port 8: enabled 0

  758 13:50:04.185913      USB2 port 9: enabled 0

  759 13:50:04.185964      USB3 port 0: enabled 0

  760 13:50:04.186016      USB3 port 1: enabled 1

  761 13:50:04.186068      USB3 port 2: enabled 0

  762 13:50:04.186120      USB3 port 3: enabled 0

  763 13:50:04.186172    PCI: 00:14.1: enabled 0

  764 13:50:04.186223    PCI: 00:14.2: enabled 1

  765 13:50:04.186275    PCI: 00:14.3: enabled 1

  766 13:50:04.186326     GENERIC: 0.0: enabled 1

  767 13:50:04.186378    PCI: 00:15.0: enabled 1

  768 13:50:04.186430     I2C: 00:1a: enabled 1

  769 13:50:04.186482     I2C: 00:31: enabled 1

  770 13:50:04.186533     I2C: 00:32: enabled 1

  771 13:50:04.186585    PCI: 00:15.1: enabled 1

  772 13:50:04.186637     I2C: 00:10: enabled 1

  773 13:50:04.186689    PCI: 00:15.2: enabled 1

  774 13:50:04.186740    PCI: 00:15.3: enabled 1

  775 13:50:04.186792    PCI: 00:16.0: enabled 1

  776 13:50:04.186844    PCI: 00:16.1: enabled 0

  777 13:50:04.186898    PCI: 00:16.2: enabled 0

  778 13:50:04.186949    PCI: 00:16.3: enabled 0

  779 13:50:04.187001    PCI: 00:16.4: enabled 0

  780 13:50:04.187053    PCI: 00:16.5: enabled 0

  781 13:50:04.187104    PCI: 00:17.0: enabled 1

  782 13:50:04.187158    PCI: 00:19.0: enabled 0

  783 13:50:04.187212    PCI: 00:19.1: enabled 1

  784 13:50:04.187265     I2C: 00:15: enabled 1

  785 13:50:04.187316    PCI: 00:19.2: enabled 0

  786 13:50:04.187368    PCI: 00:1d.0: enabled 1

  787 13:50:04.187419     GENERIC: 0.0: enabled 1

  788 13:50:04.187471    PCI: 00:1e.0: enabled 1

  789 13:50:04.187523    PCI: 00:1e.1: enabled 0

  790 13:50:04.187574    PCI: 00:1e.2: enabled 1

  791 13:50:04.187626     SPI: 00: enabled 1

  792 13:50:04.187678    PCI: 00:1e.3: enabled 1

  793 13:50:04.187730     SPI: 00: enabled 1

  794 13:50:04.187782    PCI: 00:1f.0: enabled 1

  795 13:50:04.187834     PNP: 0c09.0: enabled 1

  796 13:50:04.187886    PCI: 00:1f.1: enabled 0

  797 13:50:04.187937    PCI: 00:1f.2: enabled 1

  798 13:50:04.187989     GENERIC: 0.0: enabled 1

  799 13:50:04.188040      GENERIC: 0.0: enabled 1

  800 13:50:04.188092      GENERIC: 1.0: enabled 1

  801 13:50:04.188144    PCI: 00:1f.3: enabled 1

  802 13:50:04.188196    PCI: 00:1f.4: enabled 0

  803 13:50:04.188247    PCI: 00:1f.5: enabled 1

  804 13:50:04.188298    PCI: 00:1f.6: enabled 0

  805 13:50:04.188544    PCI: 00:1f.7: enabled 0

  806 13:50:04.188606   CPU_CLUSTER: 0: enabled 1

  807 13:50:04.188659    APIC: 00: enabled 1

  808 13:50:04.188712    APIC: 01: enabled 1

  809 13:50:04.188763    APIC: 03: enabled 1

  810 13:50:04.188815    APIC: 07: enabled 1

  811 13:50:04.188867    APIC: 05: enabled 1

  812 13:50:04.188918    APIC: 04: enabled 1

  813 13:50:04.188970    APIC: 02: enabled 1

  814 13:50:04.189022    APIC: 06: enabled 1

  815 13:50:04.189074  Root Device scanning...

  816 13:50:04.189126  scan_static_bus for Root Device

  817 13:50:04.189178  DOMAIN: 0000 enabled

  818 13:50:04.189230  CPU_CLUSTER: 0 enabled

  819 13:50:04.189282  DOMAIN: 0000 scanning...

  820 13:50:04.189334  PCI: pci_scan_bus for bus 00

  821 13:50:04.189386  PCI: 00:00.0 [8086/0000] ops

  822 13:50:04.189438  PCI: 00:00.0 [8086/9a12] enabled

  823 13:50:04.189490  PCI: 00:02.0 [8086/0000] bus ops

  824 13:50:04.189542  PCI: 00:02.0 [8086/9a40] enabled

  825 13:50:04.189593  PCI: 00:04.0 [8086/0000] bus ops

  826 13:50:04.189645  PCI: 00:04.0 [8086/9a03] enabled

  827 13:50:04.189697  PCI: 00:05.0 [8086/9a19] enabled

  828 13:50:04.189749  PCI: 00:07.0 [0000/0000] hidden

  829 13:50:04.189801  PCI: 00:08.0 [8086/9a11] enabled

  830 13:50:04.189852  PCI: 00:0a.0 [8086/9a0d] disabled

  831 13:50:04.189904  PCI: 00:0d.0 [8086/0000] bus ops

  832 13:50:04.189957  PCI: 00:0d.0 [8086/9a13] enabled

  833 13:50:04.190009  PCI: 00:14.0 [8086/0000] bus ops

  834 13:50:04.190061  PCI: 00:14.0 [8086/a0ed] enabled

  835 13:50:04.190113  PCI: 00:14.2 [8086/a0ef] enabled

  836 13:50:04.190165  PCI: 00:14.3 [8086/0000] bus ops

  837 13:50:04.190217  PCI: 00:14.3 [8086/a0f0] enabled

  838 13:50:04.190270  PCI: 00:15.0 [8086/0000] bus ops

  839 13:50:04.190322  PCI: 00:15.0 [8086/a0e8] enabled

  840 13:50:04.190374  PCI: 00:15.1 [8086/0000] bus ops

  841 13:50:04.190426  PCI: 00:15.1 [8086/a0e9] enabled

  842 13:50:04.190478  PCI: 00:15.2 [8086/0000] bus ops

  843 13:50:04.190530  PCI: 00:15.2 [8086/a0ea] enabled

  844 13:50:04.190582  PCI: 00:15.3 [8086/0000] bus ops

  845 13:50:04.190634  PCI: 00:15.3 [8086/a0eb] enabled

  846 13:50:04.190686  PCI: 00:16.0 [8086/0000] ops

  847 13:50:04.190738  PCI: 00:16.0 [8086/a0e0] enabled

  848 13:50:04.190790  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 13:50:04.190843  PCI: 00:19.0 [8086/0000] bus ops

  850 13:50:04.190895  PCI: 00:19.0 [8086/a0c5] disabled

  851 13:50:04.190947  PCI: 00:19.1 [8086/0000] bus ops

  852 13:50:04.190999  PCI: 00:19.1 [8086/a0c6] enabled

  853 13:50:04.191051  PCI: 00:1d.0 [8086/0000] bus ops

  854 13:50:04.191102  PCI: 00:1d.0 [8086/a0b0] enabled

  855 13:50:04.191154  PCI: 00:1e.0 [8086/0000] ops

  856 13:50:04.191206  PCI: 00:1e.0 [8086/a0a8] enabled

  857 13:50:04.191257  PCI: 00:1e.2 [8086/0000] bus ops

  858 13:50:04.191309  PCI: 00:1e.2 [8086/a0aa] enabled

  859 13:50:04.191361  PCI: 00:1e.3 [8086/0000] bus ops

  860 13:50:04.191413  PCI: 00:1e.3 [8086/a0ab] enabled

  861 13:50:04.191465  PCI: 00:1f.0 [8086/0000] bus ops

  862 13:50:04.191517  PCI: 00:1f.0 [8086/a087] enabled

  863 13:50:04.191569  RTC Init

  864 13:50:04.191621  Set power on after power failure.

  865 13:50:04.191673  Disabling Deep S3

  866 13:50:04.191725  Disabling Deep S3

  867 13:50:04.191777  Disabling Deep S4

  868 13:50:04.191828  Disabling Deep S4

  869 13:50:04.191880  Disabling Deep S5

  870 13:50:04.191932  Disabling Deep S5

  871 13:50:04.191984  PCI: 00:1f.2 [0000/0000] hidden

  872 13:50:04.192036  PCI: 00:1f.3 [8086/0000] bus ops

  873 13:50:04.192088  PCI: 00:1f.3 [8086/a0c8] enabled

  874 13:50:04.192140  PCI: 00:1f.5 [8086/0000] bus ops

  875 13:50:04.192192  PCI: 00:1f.5 [8086/a0a4] enabled

  876 13:50:04.192244  PCI: Leftover static devices:

  877 13:50:04.192296  PCI: 00:10.2

  878 13:50:04.192348  PCI: 00:10.6

  879 13:50:04.192448  PCI: 00:10.7

  880 13:50:04.192500  PCI: 00:06.0

  881 13:50:04.192552  PCI: 00:07.1

  882 13:50:04.192604  PCI: 00:07.2

  883 13:50:04.192655  PCI: 00:07.3

  884 13:50:04.192707  PCI: 00:09.0

  885 13:50:04.192759  PCI: 00:0d.1

  886 13:50:04.192811  PCI: 00:0d.2

  887 13:50:04.192863  PCI: 00:0d.3

  888 13:50:04.192915  PCI: 00:0e.0

  889 13:50:04.193028  PCI: 00:12.0

  890 13:50:04.193080  PCI: 00:12.6

  891 13:50:04.193132  PCI: 00:13.0

  892 13:50:04.193183  PCI: 00:14.1

  893 13:50:04.193235  PCI: 00:16.1

  894 13:50:04.193287  PCI: 00:16.2

  895 13:50:04.193339  PCI: 00:16.3

  896 13:50:04.193389  PCI: 00:16.4

  897 13:50:04.193441  PCI: 00:16.5

  898 13:50:04.193493  PCI: 00:17.0

  899 13:50:04.193544  PCI: 00:19.2

  900 13:50:04.193596  PCI: 00:1e.1

  901 13:50:04.193647  PCI: 00:1f.1

  902 13:50:04.193699  PCI: 00:1f.4

  903 13:50:04.193751  PCI: 00:1f.6

  904 13:50:04.193801  PCI: 00:1f.7

  905 13:50:04.193853  PCI: Check your devicetree.cb.

  906 13:50:04.193905  PCI: 00:02.0 scanning...

  907 13:50:04.193956  scan_generic_bus for PCI: 00:02.0

  908 13:50:04.194008  scan_generic_bus for PCI: 00:02.0 done

  909 13:50:04.194060  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 13:50:04.194112  PCI: 00:04.0 scanning...

  911 13:50:04.194164  scan_generic_bus for PCI: 00:04.0

  912 13:50:04.194216  GENERIC: 0.0 enabled

  913 13:50:04.194268  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 13:50:04.194320  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 13:50:04.194373  PCI: 00:0d.0 scanning...

  916 13:50:04.194425  scan_static_bus for PCI: 00:0d.0

  917 13:50:04.194477  USB0 port 0 enabled

  918 13:50:04.194529  USB0 port 0 scanning...

  919 13:50:04.194581  scan_static_bus for USB0 port 0

  920 13:50:04.194633  USB3 port 0 enabled

  921 13:50:04.194685  USB3 port 1 enabled

  922 13:50:04.194737  USB3 port 2 disabled

  923 13:50:04.194789  USB3 port 3 disabled

  924 13:50:04.194840  USB3 port 0 scanning...

  925 13:50:04.194892  scan_static_bus for USB3 port 0

  926 13:50:04.194944  scan_static_bus for USB3 port 0 done

  927 13:50:04.194996  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 13:50:04.195048  USB3 port 1 scanning...

  929 13:50:04.195100  scan_static_bus for USB3 port 1

  930 13:50:04.195152  scan_static_bus for USB3 port 1 done

  931 13:50:04.195203  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 13:50:04.195255  scan_static_bus for USB0 port 0 done

  933 13:50:04.195308  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 13:50:04.195360  scan_static_bus for PCI: 00:0d.0 done

  935 13:50:04.195411  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 13:50:04.195463  PCI: 00:14.0 scanning...

  937 13:50:04.195515  scan_static_bus for PCI: 00:14.0

  938 13:50:04.195567  USB0 port 0 enabled

  939 13:50:04.195618  USB0 port 0 scanning...

  940 13:50:04.195670  scan_static_bus for USB0 port 0

  941 13:50:04.195722  USB2 port 0 disabled

  942 13:50:04.195774  USB2 port 1 enabled

  943 13:50:04.195826  USB2 port 2 enabled

  944 13:50:04.195877  USB2 port 3 disabled

  945 13:50:04.195928  USB2 port 4 enabled

  946 13:50:04.195980  USB2 port 5 disabled

  947 13:50:04.196033  USB2 port 6 disabled

  948 13:50:04.196086  USB2 port 7 disabled

  949 13:50:04.196137  USB2 port 8 disabled

  950 13:50:04.196188  USB2 port 9 disabled

  951 13:50:04.196240  USB3 port 0 disabled

  952 13:50:04.196291  USB3 port 1 enabled

  953 13:50:04.196343  USB3 port 2 disabled

  954 13:50:04.196439  USB3 port 3 disabled

  955 13:50:04.196681  USB2 port 1 scanning...

  956 13:50:04.196739  scan_static_bus for USB2 port 1

  957 13:50:04.196792  scan_static_bus for USB2 port 1 done

  958 13:50:04.196845  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 13:50:04.196897  USB2 port 2 scanning...

  960 13:50:04.196949  scan_static_bus for USB2 port 2

  961 13:50:04.197001  scan_static_bus for USB2 port 2 done

  962 13:50:04.197053  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 13:50:04.197105  USB2 port 4 scanning...

  964 13:50:04.197157  scan_static_bus for USB2 port 4

  965 13:50:04.197208  scan_static_bus for USB2 port 4 done

  966 13:50:04.197260  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 13:50:04.197312  USB3 port 1 scanning...

  968 13:50:04.197364  scan_static_bus for USB3 port 1

  969 13:50:04.197415  scan_static_bus for USB3 port 1 done

  970 13:50:04.197467  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 13:50:04.197519  scan_static_bus for USB0 port 0 done

  972 13:50:04.197571  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 13:50:04.197622  scan_static_bus for PCI: 00:14.0 done

  974 13:50:04.197674  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  975 13:50:04.197725  PCI: 00:14.3 scanning...

  976 13:50:04.197776  scan_static_bus for PCI: 00:14.3

  977 13:50:04.197828  GENERIC: 0.0 enabled

  978 13:50:04.197879  scan_static_bus for PCI: 00:14.3 done

  979 13:50:04.197930  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 13:50:04.197982  PCI: 00:15.0 scanning...

  981 13:50:04.198033  scan_static_bus for PCI: 00:15.0

  982 13:50:04.198085  I2C: 00:1a enabled

  983 13:50:04.198136  I2C: 00:31 enabled

  984 13:50:04.198188  I2C: 00:32 enabled

  985 13:50:04.198240  scan_static_bus for PCI: 00:15.0 done

  986 13:50:04.198291  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  987 13:50:04.198343  PCI: 00:15.1 scanning...

  988 13:50:04.198395  scan_static_bus for PCI: 00:15.1

  989 13:50:04.198447  I2C: 00:10 enabled

  990 13:50:04.198498  scan_static_bus for PCI: 00:15.1 done

  991 13:50:04.198550  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 13:50:04.198602  PCI: 00:15.2 scanning...

  993 13:50:04.198654  scan_static_bus for PCI: 00:15.2

  994 13:50:04.198706  scan_static_bus for PCI: 00:15.2 done

  995 13:50:04.198757  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 13:50:04.198809  PCI: 00:15.3 scanning...

  997 13:50:04.198861  scan_static_bus for PCI: 00:15.3

  998 13:50:04.198913  scan_static_bus for PCI: 00:15.3 done

  999 13:50:04.198964  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 13:50:04.199016  PCI: 00:19.1 scanning...

 1001 13:50:04.199068  scan_static_bus for PCI: 00:19.1

 1002 13:50:04.199120  I2C: 00:15 enabled

 1003 13:50:04.199174  scan_static_bus for PCI: 00:19.1 done

 1004 13:50:04.199226  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 13:50:04.199277  PCI: 00:1d.0 scanning...

 1006 13:50:04.199329  do_pci_scan_bridge for PCI: 00:1d.0

 1007 13:50:04.199380  PCI: pci_scan_bus for bus 01

 1008 13:50:04.199433  PCI: 01:00.0 [1c5c/174a] enabled

 1009 13:50:04.199485  GENERIC: 0.0 enabled

 1010 13:50:04.199537  Enabling Common Clock Configuration

 1011 13:50:04.199589  L1 Sub-State supported from root port 29

 1012 13:50:04.199642  L1 Sub-State Support = 0xf

 1013 13:50:04.199693  CommonModeRestoreTime = 0x28

 1014 13:50:04.199745  Power On Value = 0x16, Power On Scale = 0x0

 1015 13:50:04.199797  ASPM: Enabled L1

 1016 13:50:04.199848  PCIe: Max_Payload_Size adjusted to 128

 1017 13:50:04.199901  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 13:50:04.199954  PCI: 00:1e.2 scanning...

 1019 13:50:04.200006  scan_generic_bus for PCI: 00:1e.2

 1020 13:50:04.200058  SPI: 00 enabled

 1021 13:50:04.200110  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 13:50:04.200162  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 13:50:04.200214  PCI: 00:1e.3 scanning...

 1024 13:50:04.200266  scan_generic_bus for PCI: 00:1e.3

 1025 13:50:04.200326  SPI: 00 enabled

 1026 13:50:04.200392  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 13:50:04.200449  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 13:50:04.200503  PCI: 00:1f.0 scanning...

 1029 13:50:04.200555  scan_static_bus for PCI: 00:1f.0

 1030 13:50:04.200607  PNP: 0c09.0 enabled

 1031 13:50:04.200658  PNP: 0c09.0 scanning...

 1032 13:50:04.200709  scan_static_bus for PNP: 0c09.0

 1033 13:50:04.200760  scan_static_bus for PNP: 0c09.0 done

 1034 13:50:04.200812  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 13:50:04.200862  scan_static_bus for PCI: 00:1f.0 done

 1036 13:50:04.200914  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 13:50:04.200966  PCI: 00:1f.2 scanning...

 1038 13:50:04.201017  scan_static_bus for PCI: 00:1f.2

 1039 13:50:04.201067  GENERIC: 0.0 enabled

 1040 13:50:04.201118  GENERIC: 0.0 scanning...

 1041 13:50:04.201169  scan_static_bus for GENERIC: 0.0

 1042 13:50:04.201220  GENERIC: 0.0 enabled

 1043 13:50:04.201271  GENERIC: 1.0 enabled

 1044 13:50:04.201322  scan_static_bus for GENERIC: 0.0 done

 1045 13:50:04.201374  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 13:50:04.201425  scan_static_bus for PCI: 00:1f.2 done

 1047 13:50:04.201477  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 13:50:04.201528  PCI: 00:1f.3 scanning...

 1049 13:50:04.201580  scan_static_bus for PCI: 00:1f.3

 1050 13:50:04.201631  scan_static_bus for PCI: 00:1f.3 done

 1051 13:50:04.201682  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 13:50:04.201733  PCI: 00:1f.5 scanning...

 1053 13:50:04.201784  scan_generic_bus for PCI: 00:1f.5

 1054 13:50:04.201835  scan_generic_bus for PCI: 00:1f.5 done

 1055 13:50:04.201887  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 13:50:04.201938  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1057 13:50:04.201989  scan_static_bus for Root Device done

 1058 13:50:04.202040  scan_bus: bus Root Device finished in 737 msecs

 1059 13:50:04.202092  done

 1060 13:50:04.202143  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 13:50:04.202194  Chrome EC: UHEPI supported

 1062 13:50:04.202246  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 13:50:04.202298  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 13:50:04.202350  SPI flash protection: WPSW=1 SRP0=0

 1065 13:50:04.202401  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 13:50:04.202453  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 13:50:04.202505  found VGA at PCI: 00:02.0

 1068 13:50:04.202556  Setting up VGA for PCI: 00:02.0

 1069 13:50:04.202798  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 13:50:04.202855  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 13:50:04.202911  Allocating resources...

 1072 13:50:04.202999  Reading resources...

 1073 13:50:04.203051  Root Device read_resources bus 0 link: 0

 1074 13:50:04.203104  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 13:50:04.203156  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 13:50:04.203207  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 13:50:04.203260  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 13:50:04.203311  USB0 port 0 read_resources bus 0 link: 0

 1079 13:50:04.203363  USB0 port 0 read_resources bus 0 link: 0 done

 1080 13:50:04.203415  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 13:50:04.203466  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 13:50:04.203518  USB0 port 0 read_resources bus 0 link: 0

 1083 13:50:04.203569  USB0 port 0 read_resources bus 0 link: 0 done

 1084 13:50:04.203621  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 13:50:04.203672  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 13:50:04.203724  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 13:50:04.203775  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 13:50:04.203827  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 13:50:04.203878  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 13:50:04.203930  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 13:50:04.203981  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 13:50:04.204033  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 13:50:04.204084  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 13:50:04.204136  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 13:50:04.204188  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 13:50:04.204239  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 13:50:04.204290  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 13:50:04.204342  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 13:50:04.204399  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 13:50:04.204451  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 13:50:04.204502  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 13:50:04.204553  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 13:50:04.204605  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 13:50:04.204657  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 13:50:04.204708  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 13:50:04.204760  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 13:50:04.204812  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 13:50:04.204863  Root Device read_resources bus 0 link: 0 done

 1109 13:50:04.204914  Done reading resources.

 1110 13:50:04.204965  Show resources in subtree (Root Device)...After reading.

 1111 13:50:04.205017   Root Device child on link 0 DOMAIN: 0000

 1112 13:50:04.205069    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 13:50:04.205120    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 13:50:04.205172    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 13:50:04.205225     PCI: 00:00.0

 1116 13:50:04.205276     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 13:50:04.205328     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 13:50:04.205380     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 13:50:04.205432     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 13:50:04.205484     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 13:50:04.205536     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 13:50:04.205588     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 13:50:04.205641     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 13:50:04.205693     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 13:50:04.205745     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 13:50:04.205797     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 13:50:04.205849     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 13:50:04.205902     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 13:50:04.205953     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 13:50:04.206005     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 13:50:04.206057     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 13:50:04.206109     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 13:50:04.206161     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 13:50:04.206213     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 13:50:04.206453     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 13:50:04.206515     PCI: 00:02.0

 1137 13:50:04.206568     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 13:50:04.206620     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 13:50:04.206673     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 13:50:04.206725     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 13:50:04.206777     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 13:50:04.206830      GENERIC: 0.0

 1143 13:50:04.206881     PCI: 00:05.0

 1144 13:50:04.206991     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 13:50:04.207106     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 13:50:04.207161      GENERIC: 0.0

 1147 13:50:04.207213     PCI: 00:08.0

 1148 13:50:04.207264     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 13:50:04.207317     PCI: 00:0a.0

 1150 13:50:04.207368     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 13:50:04.207420     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 13:50:04.207472      USB0 port 0 child on link 0 USB3 port 0

 1153 13:50:04.207524       USB3 port 0

 1154 13:50:04.207575       USB3 port 1

 1155 13:50:04.207626       USB3 port 2

 1156 13:50:04.207677       USB3 port 3

 1157 13:50:04.207728     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 13:50:04.207779     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 13:50:04.207844      USB0 port 0 child on link 0 USB2 port 0

 1160 13:50:04.210435       USB2 port 0

 1161 13:50:04.210753       USB2 port 1

 1162 13:50:04.213787       USB2 port 2

 1163 13:50:04.214063       USB2 port 3

 1164 13:50:04.217427       USB2 port 4

 1165 13:50:04.217763       USB2 port 5

 1166 13:50:04.220782       USB2 port 6

 1167 13:50:04.221109       USB2 port 7

 1168 13:50:04.223845       USB2 port 8

 1169 13:50:04.227280       USB2 port 9

 1170 13:50:04.227607       USB3 port 0

 1171 13:50:04.230396       USB3 port 1

 1172 13:50:04.230639       USB3 port 2

 1173 13:50:04.233934       USB3 port 3

 1174 13:50:04.234172     PCI: 00:14.2

 1175 13:50:04.243491     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 13:50:04.253651     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 13:50:04.260082     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 13:50:04.270383     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 13:50:04.270540      GENERIC: 0.0

 1180 13:50:04.273330     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 13:50:04.283518     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 13:50:04.286512      I2C: 00:1a

 1183 13:50:04.286687      I2C: 00:31

 1184 13:50:04.289677      I2C: 00:32

 1185 13:50:04.293434     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 13:50:04.303244     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 13:50:04.306435      I2C: 00:10

 1188 13:50:04.306850     PCI: 00:15.2

 1189 13:50:04.316481     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 13:50:04.319896     PCI: 00:15.3

 1191 13:50:04.329785     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 13:50:04.330233     PCI: 00:16.0

 1193 13:50:04.339801     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 13:50:04.343210     PCI: 00:19.0

 1195 13:50:04.346898     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 13:50:04.356510     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 13:50:04.357032      I2C: 00:15

 1198 13:50:04.363188     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 13:50:04.369355     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 13:50:04.379619     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 13:50:04.389327     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 13:50:04.392557      GENERIC: 0.0

 1203 13:50:04.392976      PCI: 01:00.0

 1204 13:50:04.402992      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 13:50:04.412913      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 13:50:04.422663      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 13:50:04.423183     PCI: 00:1e.0

 1208 13:50:04.435735     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 13:50:04.438943     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 13:50:04.448946     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 13:50:04.449363      SPI: 00

 1212 13:50:04.455867     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 13:50:04.465557     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 13:50:04.465985      SPI: 00

 1215 13:50:04.468967     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 13:50:04.479042     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 13:50:04.479549      PNP: 0c09.0

 1218 13:50:04.488289      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 13:50:04.491861     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 13:50:04.502056     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 13:50:04.511749     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 13:50:04.515653      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 13:50:04.519092       GENERIC: 0.0

 1224 13:50:04.519612       GENERIC: 1.0

 1225 13:50:04.522510     PCI: 00:1f.3

 1226 13:50:04.531714     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 13:50:04.541487     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 13:50:04.544935     PCI: 00:1f.5

 1229 13:50:04.551430     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 13:50:04.558059    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 13:50:04.558478     APIC: 00

 1232 13:50:04.558805     APIC: 01

 1233 13:50:04.561415     APIC: 03

 1234 13:50:04.561710     APIC: 07

 1235 13:50:04.564801     APIC: 05

 1236 13:50:04.565095     APIC: 04

 1237 13:50:04.565328     APIC: 02

 1238 13:50:04.567899     APIC: 06

 1239 13:50:04.574712  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 13:50:04.581472   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 13:50:04.587738   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 13:50:04.591593   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 13:50:04.598137    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 13:50:04.601009    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 13:50:04.605129    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 13:50:04.611579   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 13:50:04.621235   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 13:50:04.628098   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 13:50:04.634930  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 13:50:04.640707  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 13:50:04.647547   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 13:50:04.657815   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 13:50:04.663881   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 13:50:04.667576   DOMAIN: 0000: Resource ranges:

 1255 13:50:04.670452   * Base: 1000, Size: 800, Tag: 100

 1256 13:50:04.673867   * Base: 1900, Size: e700, Tag: 100

 1257 13:50:04.681021    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 13:50:04.687218  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 13:50:04.693972  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 13:50:04.700517   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 13:50:04.707818   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 13:50:04.716945   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 13:50:04.724181   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 13:50:04.730569   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 13:50:04.740134   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 13:50:04.747003   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 13:50:04.753700   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 13:50:04.764008   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 13:50:04.770265   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 13:50:04.776972   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 13:50:04.786710   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 13:50:04.793475   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 13:50:04.799973   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 13:50:04.809534   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 13:50:04.816405   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 13:50:04.823093   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 13:50:04.832885   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 13:50:04.839658   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 13:50:04.846474   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 13:50:04.856287   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 13:50:04.863115   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 13:50:04.865920   DOMAIN: 0000: Resource ranges:

 1283 13:50:04.869703   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 13:50:04.875802   * Base: d0000000, Size: 28000000, Tag: 200

 1285 13:50:04.879246   * Base: fa000000, Size: 1000000, Tag: 200

 1286 13:50:04.882703   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 13:50:04.885699   * Base: fe010000, Size: 2e000, Tag: 200

 1288 13:50:04.892278   * Base: fe03f000, Size: d41000, Tag: 200

 1289 13:50:04.895785   * Base: fed88000, Size: 8000, Tag: 200

 1290 13:50:04.899119   * Base: fed93000, Size: d000, Tag: 200

 1291 13:50:04.902623   * Base: feda2000, Size: 1e000, Tag: 200

 1292 13:50:04.908748   * Base: fede0000, Size: 1220000, Tag: 200

 1293 13:50:04.912095   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 13:50:04.918659    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 13:50:04.925506    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 13:50:04.932298    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 13:50:04.938625    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 13:50:04.945002    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 13:50:04.951926    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 13:50:04.958261    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 13:50:04.965332    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 13:50:04.971756    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 13:50:04.978416    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 13:50:04.984684    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 13:50:04.991534    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 13:50:04.998235    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 13:50:05.004688    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 13:50:05.011622    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 13:50:05.018011    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 13:50:05.024775    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 13:50:05.031089    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 13:50:05.037750    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 13:50:05.044239    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 13:50:05.051354    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 13:50:05.058023    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 13:50:05.068023  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 13:50:05.074635  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 13:50:05.078177   PCI: 00:1d.0: Resource ranges:

 1319 13:50:05.081501   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 13:50:05.088169    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 13:50:05.095199    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 13:50:05.101242    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 13:50:05.111483  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 13:50:05.118122  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 13:50:05.121173  Root Device assign_resources, bus 0 link: 0

 1326 13:50:05.127921  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 13:50:05.134394  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 13:50:05.143909  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 13:50:05.150684  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 13:50:05.160713  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 13:50:05.164002  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 13:50:05.167205  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 13:50:05.177020  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 13:50:05.183624  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 13:50:05.193247  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 13:50:05.196654  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 13:50:05.203743  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 13:50:05.209945  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 13:50:05.216693  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 13:50:05.219651  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 13:50:05.226502  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 13:50:05.236682  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 13:50:05.242800  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 13:50:05.249429  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 13:50:05.252904  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 13:50:05.262876  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 13:50:05.266581  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 13:50:05.269866  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 13:50:05.280148  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 13:50:05.282908  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 13:50:05.289793  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 13:50:05.296127  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 13:50:05.305669  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 13:50:05.312625  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 13:50:05.322763  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 13:50:05.325909  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 13:50:05.329088  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 13:50:05.339126  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 13:50:05.349317  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 13:50:05.358989  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 13:50:05.362419  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 13:50:05.372027  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 13:50:05.378538  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 13:50:05.385103  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 13:50:05.391887  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 13:50:05.398270  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 13:50:05.404502  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 13:50:05.408413  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 13:50:05.418179  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 13:50:05.421463  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 13:50:05.424804  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 13:50:05.431668  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 13:50:05.434397  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 13:50:05.441191  LPC: Trying to open IO window from 800 size 1ff

 1375 13:50:05.447916  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 13:50:05.458279  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 13:50:05.464400  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 13:50:05.470960  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 13:50:05.473874  Root Device assign_resources, bus 0 link: 0

 1380 13:50:05.478097  Done setting resources.

 1381 13:50:05.484116  Show resources in subtree (Root Device)...After assigning values.

 1382 13:50:05.487556   Root Device child on link 0 DOMAIN: 0000

 1383 13:50:05.490574    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 13:50:05.500831    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 13:50:05.510822    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 13:50:05.513754     PCI: 00:00.0

 1387 13:50:05.524264     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 13:50:05.530475     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 13:50:05.540247     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 13:50:05.551102     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 13:50:05.560693     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 13:50:05.570051     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 13:50:05.580313     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 13:50:05.590103     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 13:50:05.596659     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 13:50:05.606245     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 13:50:05.616118     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 13:50:05.626409     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 13:50:05.635933     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 13:50:05.642854     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 13:50:05.652669     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 13:50:05.662245     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 13:50:05.672219     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 13:50:05.682178     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 13:50:05.692125     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 13:50:05.701978     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 13:50:05.702481     PCI: 00:02.0

 1408 13:50:05.715512     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 13:50:05.725299     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 13:50:05.735112     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 13:50:05.738126     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 13:50:05.748185     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 13:50:05.751513      GENERIC: 0.0

 1414 13:50:05.751696     PCI: 00:05.0

 1415 13:50:05.761054     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 13:50:05.767705     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 13:50:05.767808      GENERIC: 0.0

 1418 13:50:05.771167     PCI: 00:08.0

 1419 13:50:05.781002     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 13:50:05.781088     PCI: 00:0a.0

 1421 13:50:05.787765     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 13:50:05.797495     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 13:50:05.800757      USB0 port 0 child on link 0 USB3 port 0

 1424 13:50:05.803669       USB3 port 0

 1425 13:50:05.803750       USB3 port 1

 1426 13:50:05.807494       USB3 port 2

 1427 13:50:05.807647       USB3 port 3

 1428 13:50:05.813985     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 13:50:05.823671     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 13:50:05.827398      USB0 port 0 child on link 0 USB2 port 0

 1431 13:50:05.830413       USB2 port 0

 1432 13:50:05.830596       USB2 port 1

 1433 13:50:05.834018       USB2 port 2

 1434 13:50:05.834183       USB2 port 3

 1435 13:50:05.837333       USB2 port 4

 1436 13:50:05.837468       USB2 port 5

 1437 13:50:05.840654       USB2 port 6

 1438 13:50:05.840781       USB2 port 7

 1439 13:50:05.843352       USB2 port 8

 1440 13:50:05.843445       USB2 port 9

 1441 13:50:05.847473       USB3 port 0

 1442 13:50:05.850571       USB3 port 1

 1443 13:50:05.850992       USB3 port 2

 1444 13:50:05.854562       USB3 port 3

 1445 13:50:05.855091     PCI: 00:14.2

 1446 13:50:05.863601     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 13:50:05.873556     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 13:50:05.880644     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 13:50:05.890203     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 13:50:05.890718      GENERIC: 0.0

 1451 13:50:05.897278     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 13:50:05.906592     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 13:50:05.907299      I2C: 00:1a

 1454 13:50:05.910004      I2C: 00:31

 1455 13:50:05.910417      I2C: 00:32

 1456 13:50:05.916569     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 13:50:05.926986     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 13:50:05.927557      I2C: 00:10

 1459 13:50:05.930423     PCI: 00:15.2

 1460 13:50:05.939951     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 13:50:05.940520     PCI: 00:15.3

 1462 13:50:05.949675     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 13:50:05.953062     PCI: 00:16.0

 1464 13:50:05.963573     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 13:50:05.966423     PCI: 00:19.0

 1466 13:50:05.969775     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 13:50:05.979624     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 13:50:05.980154      I2C: 00:15

 1469 13:50:05.986278     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 13:50:05.996062     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 13:50:06.006147     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 13:50:06.016003     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 13:50:06.019606      GENERIC: 0.0

 1474 13:50:06.020127      PCI: 01:00.0

 1475 13:50:06.032791      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 13:50:06.042275      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 13:50:06.053082      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 13:50:06.053610     PCI: 00:1e.0

 1479 13:50:06.065359     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 13:50:06.068556     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 13:50:06.078860     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 13:50:06.079310      SPI: 00

 1483 13:50:06.085444     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 13:50:06.095350     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 13:50:06.095893      SPI: 00

 1486 13:50:06.098687     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 13:50:06.108385     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 13:50:06.111828      PNP: 0c09.0

 1489 13:50:06.119212      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 13:50:06.125494     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 13:50:06.132021     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 13:50:06.142059     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 13:50:06.148766      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 13:50:06.149196       GENERIC: 0.0

 1495 13:50:06.151640       GENERIC: 1.0

 1496 13:50:06.152057     PCI: 00:1f.3

 1497 13:50:06.162003     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 13:50:06.172054     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 13:50:06.175085     PCI: 00:1f.5

 1500 13:50:06.185536     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 13:50:06.188312    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 13:50:06.191802     APIC: 00

 1503 13:50:06.192415     APIC: 01

 1504 13:50:06.195208     APIC: 03

 1505 13:50:06.195621     APIC: 07

 1506 13:50:06.195943     APIC: 05

 1507 13:50:06.198586     APIC: 04

 1508 13:50:06.199101     APIC: 02

 1509 13:50:06.199430     APIC: 06

 1510 13:50:06.201746  Done allocating resources.

 1511 13:50:06.208443  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 13:50:06.214715  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 13:50:06.218658  Configure GPIOs for I2S audio on UP4.

 1514 13:50:06.225297  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 13:50:06.228499  Enabling resources...

 1516 13:50:06.232072  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 13:50:06.235244  PCI: 00:00.0 cmd <- 06

 1518 13:50:06.238419  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 13:50:06.241734  PCI: 00:02.0 cmd <- 03

 1520 13:50:06.244963  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 13:50:06.245491  PCI: 00:04.0 cmd <- 02

 1522 13:50:06.251914  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 13:50:06.252538  PCI: 00:05.0 cmd <- 02

 1524 13:50:06.255327  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 13:50:06.258206  PCI: 00:08.0 cmd <- 06

 1526 13:50:06.261633  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 13:50:06.264973  PCI: 00:0d.0 cmd <- 02

 1528 13:50:06.268403  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 13:50:06.271135  PCI: 00:14.0 cmd <- 02

 1530 13:50:06.274724  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 13:50:06.278107  PCI: 00:14.2 cmd <- 02

 1532 13:50:06.281576  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 13:50:06.284859  PCI: 00:14.3 cmd <- 02

 1534 13:50:06.288230  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 13:50:06.291426  PCI: 00:15.0 cmd <- 02

 1536 13:50:06.294854  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 13:50:06.295390  PCI: 00:15.1 cmd <- 02

 1538 13:50:06.301491  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 13:50:06.302026  PCI: 00:15.2 cmd <- 02

 1540 13:50:06.304758  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 13:50:06.308007  PCI: 00:15.3 cmd <- 02

 1542 13:50:06.311095  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 13:50:06.314944  PCI: 00:16.0 cmd <- 02

 1544 13:50:06.318439  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 13:50:06.321215  PCI: 00:19.1 cmd <- 02

 1546 13:50:06.324720  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 13:50:06.327582  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 13:50:06.331044  PCI: 00:1d.0 cmd <- 06

 1549 13:50:06.334606  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 13:50:06.337894  PCI: 00:1e.0 cmd <- 06

 1551 13:50:06.341460  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 13:50:06.344095  PCI: 00:1e.2 cmd <- 06

 1553 13:50:06.347478  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 13:50:06.347912  PCI: 00:1e.3 cmd <- 02

 1555 13:50:06.354774  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 13:50:06.355307  PCI: 00:1f.0 cmd <- 407

 1557 13:50:06.357622  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 13:50:06.360925  PCI: 00:1f.3 cmd <- 02

 1559 13:50:06.364418  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 13:50:06.368012  PCI: 00:1f.5 cmd <- 406

 1561 13:50:06.372414  PCI: 01:00.0 cmd <- 02

 1562 13:50:06.376581  done.

 1563 13:50:06.379973  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 13:50:06.383464  Initializing devices...

 1565 13:50:06.386786  Root Device init

 1566 13:50:06.390281  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 13:50:06.396751  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 13:50:06.402952  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 13:50:06.410050  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 13:50:06.416470  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 13:50:06.419625  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 13:50:06.427366  fw_config match found: DB_USB=USB3_ACTIVE

 1573 13:50:06.430219  Configure Right Type-C port orientation for retimer

 1574 13:50:06.433714  Root Device init finished in 45 msecs

 1575 13:50:06.437710  PCI: 00:00.0 init

 1576 13:50:06.441142  CPU TDP = 9 Watts

 1577 13:50:06.441633  CPU PL1 = 9 Watts

 1578 13:50:06.444256  CPU PL2 = 40 Watts

 1579 13:50:06.447782  CPU PL4 = 83 Watts

 1580 13:50:06.451254  PCI: 00:00.0 init finished in 8 msecs

 1581 13:50:06.451685  PCI: 00:02.0 init

 1582 13:50:06.454229  GMA: Found VBT in CBFS

 1583 13:50:06.457606  GMA: Found valid VBT in CBFS

 1584 13:50:06.464105  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 13:50:06.470741                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 13:50:06.474134  PCI: 00:02.0 init finished in 18 msecs

 1587 13:50:06.477588  PCI: 00:05.0 init

 1588 13:50:06.481092  PCI: 00:05.0 init finished in 0 msecs

 1589 13:50:06.484280  PCI: 00:08.0 init

 1590 13:50:06.487713  PCI: 00:08.0 init finished in 0 msecs

 1591 13:50:06.491227  PCI: 00:14.0 init

 1592 13:50:06.494072  PCI: 00:14.0 init finished in 0 msecs

 1593 13:50:06.497373  PCI: 00:14.2 init

 1594 13:50:06.500942  PCI: 00:14.2 init finished in 0 msecs

 1595 13:50:06.503780  PCI: 00:15.0 init

 1596 13:50:06.507286  I2C bus 0 version 0x3230302a

 1597 13:50:06.510604  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 13:50:06.514115  PCI: 00:15.0 init finished in 6 msecs

 1599 13:50:06.517302  PCI: 00:15.1 init

 1600 13:50:06.517714  I2C bus 1 version 0x3230302a

 1601 13:50:06.523986  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 13:50:06.527472  PCI: 00:15.1 init finished in 6 msecs

 1603 13:50:06.528011  PCI: 00:15.2 init

 1604 13:50:06.530342  I2C bus 2 version 0x3230302a

 1605 13:50:06.533610  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 13:50:06.540449  PCI: 00:15.2 init finished in 6 msecs

 1607 13:50:06.540964  PCI: 00:15.3 init

 1608 13:50:06.543459  I2C bus 3 version 0x3230302a

 1609 13:50:06.546536  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 13:50:06.550361  PCI: 00:15.3 init finished in 6 msecs

 1611 13:50:06.552976  PCI: 00:16.0 init

 1612 13:50:06.556485  PCI: 00:16.0 init finished in 0 msecs

 1613 13:50:06.559930  PCI: 00:19.1 init

 1614 13:50:06.563289  I2C bus 5 version 0x3230302a

 1615 13:50:06.566763  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 13:50:06.569657  PCI: 00:19.1 init finished in 6 msecs

 1617 13:50:06.572873  PCI: 00:1d.0 init

 1618 13:50:06.576206  Initializing PCH PCIe bridge.

 1619 13:50:06.579667  PCI: 00:1d.0 init finished in 3 msecs

 1620 13:50:06.582544  PCI: 00:1f.0 init

 1621 13:50:06.586307  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 13:50:06.589547  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 13:50:06.593114  IOAPIC: ID = 0x02

 1624 13:50:06.596386  IOAPIC: Dumping registers

 1625 13:50:06.599476    reg 0x0000: 0x02000000

 1626 13:50:06.599898    reg 0x0001: 0x00770020

 1627 13:50:06.603123    reg 0x0002: 0x00000000

 1628 13:50:06.605989  PCI: 00:1f.0 init finished in 21 msecs

 1629 13:50:06.609122  PCI: 00:1f.2 init

 1630 13:50:06.613322  Disabling ACPI via APMC.

 1631 13:50:06.616822  APMC done.

 1632 13:50:06.620005  PCI: 00:1f.2 init finished in 6 msecs

 1633 13:50:06.631949  PCI: 01:00.0 init

 1634 13:50:06.635372  PCI: 01:00.0 init finished in 0 msecs

 1635 13:50:06.638737  PNP: 0c09.0 init

 1636 13:50:06.644988  Google Chrome EC uptime: 10.182 seconds

 1637 13:50:06.648269  Google Chrome AP resets since EC boot: 0

 1638 13:50:06.651686  Google Chrome most recent AP reset causes:

 1639 13:50:06.658314  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1640 13:50:06.661676  PNP: 0c09.0 init finished in 20 msecs

 1641 13:50:06.667658  Devices initialized

 1642 13:50:06.671212  Show all devs... After init.

 1643 13:50:06.674640  Root Device: enabled 1

 1644 13:50:06.675158  DOMAIN: 0000: enabled 1

 1645 13:50:06.677886  CPU_CLUSTER: 0: enabled 1

 1646 13:50:06.680693  PCI: 00:00.0: enabled 1

 1647 13:50:06.684109  PCI: 00:02.0: enabled 1

 1648 13:50:06.684562  PCI: 00:04.0: enabled 1

 1649 13:50:06.687719  PCI: 00:05.0: enabled 1

 1650 13:50:06.691220  PCI: 00:06.0: enabled 0

 1651 13:50:06.694647  PCI: 00:07.0: enabled 0

 1652 13:50:06.695157  PCI: 00:07.1: enabled 0

 1653 13:50:06.697757  PCI: 00:07.2: enabled 0

 1654 13:50:06.700832  PCI: 00:07.3: enabled 0

 1655 13:50:06.704208  PCI: 00:08.0: enabled 1

 1656 13:50:06.704765  PCI: 00:09.0: enabled 0

 1657 13:50:06.707421  PCI: 00:0a.0: enabled 0

 1658 13:50:06.711208  PCI: 00:0d.0: enabled 1

 1659 13:50:06.714569  PCI: 00:0d.1: enabled 0

 1660 13:50:06.715086  PCI: 00:0d.2: enabled 0

 1661 13:50:06.717293  PCI: 00:0d.3: enabled 0

 1662 13:50:06.720515  PCI: 00:0e.0: enabled 0

 1663 13:50:06.720900  PCI: 00:10.2: enabled 1

 1664 13:50:06.723960  PCI: 00:10.6: enabled 0

 1665 13:50:06.727123  PCI: 00:10.7: enabled 0

 1666 13:50:06.730978  PCI: 00:12.0: enabled 0

 1667 13:50:06.731391  PCI: 00:12.6: enabled 0

 1668 13:50:06.733989  PCI: 00:13.0: enabled 0

 1669 13:50:06.737362  PCI: 00:14.0: enabled 1

 1670 13:50:06.740126  PCI: 00:14.1: enabled 0

 1671 13:50:06.740587  PCI: 00:14.2: enabled 1

 1672 13:50:06.743513  PCI: 00:14.3: enabled 1

 1673 13:50:06.747240  PCI: 00:15.0: enabled 1

 1674 13:50:06.750396  PCI: 00:15.1: enabled 1

 1675 13:50:06.750811  PCI: 00:15.2: enabled 1

 1676 13:50:06.753837  PCI: 00:15.3: enabled 1

 1677 13:50:06.756700  PCI: 00:16.0: enabled 1

 1678 13:50:06.760243  PCI: 00:16.1: enabled 0

 1679 13:50:06.760704  PCI: 00:16.2: enabled 0

 1680 13:50:06.763639  PCI: 00:16.3: enabled 0

 1681 13:50:06.766849  PCI: 00:16.4: enabled 0

 1682 13:50:06.770160  PCI: 00:16.5: enabled 0

 1683 13:50:06.770584  PCI: 00:17.0: enabled 0

 1684 13:50:06.773437  PCI: 00:19.0: enabled 0

 1685 13:50:06.776653  PCI: 00:19.1: enabled 1

 1686 13:50:06.777079  PCI: 00:19.2: enabled 0

 1687 13:50:06.779995  PCI: 00:1c.0: enabled 1

 1688 13:50:06.783216  PCI: 00:1c.1: enabled 0

 1689 13:50:06.786665  PCI: 00:1c.2: enabled 0

 1690 13:50:06.787089  PCI: 00:1c.3: enabled 0

 1691 13:50:06.790103  PCI: 00:1c.4: enabled 0

 1692 13:50:06.793125  PCI: 00:1c.5: enabled 0

 1693 13:50:06.796399  PCI: 00:1c.6: enabled 1

 1694 13:50:06.796827  PCI: 00:1c.7: enabled 0

 1695 13:50:06.800007  PCI: 00:1d.0: enabled 1

 1696 13:50:06.803535  PCI: 00:1d.1: enabled 0

 1697 13:50:06.806585  PCI: 00:1d.2: enabled 1

 1698 13:50:06.807009  PCI: 00:1d.3: enabled 0

 1699 13:50:06.810187  PCI: 00:1e.0: enabled 1

 1700 13:50:06.812927  PCI: 00:1e.1: enabled 0

 1701 13:50:06.816324  PCI: 00:1e.2: enabled 1

 1702 13:50:06.816792  PCI: 00:1e.3: enabled 1

 1703 13:50:06.819688  PCI: 00:1f.0: enabled 1

 1704 13:50:06.823097  PCI: 00:1f.1: enabled 0

 1705 13:50:06.826074  PCI: 00:1f.2: enabled 1

 1706 13:50:06.826593  PCI: 00:1f.3: enabled 1

 1707 13:50:06.829398  PCI: 00:1f.4: enabled 0

 1708 13:50:06.832477  PCI: 00:1f.5: enabled 1

 1709 13:50:06.836207  PCI: 00:1f.6: enabled 0

 1710 13:50:06.836678  PCI: 00:1f.7: enabled 0

 1711 13:50:06.839421  APIC: 00: enabled 1

 1712 13:50:06.842499  GENERIC: 0.0: enabled 1

 1713 13:50:06.842915  GENERIC: 0.0: enabled 1

 1714 13:50:06.845824  GENERIC: 1.0: enabled 1

 1715 13:50:06.849212  GENERIC: 0.0: enabled 1

 1716 13:50:06.852550  GENERIC: 1.0: enabled 1

 1717 13:50:06.852967  USB0 port 0: enabled 1

 1718 13:50:06.856125  GENERIC: 0.0: enabled 1

 1719 13:50:06.859288  USB0 port 0: enabled 1

 1720 13:50:06.862787  GENERIC: 0.0: enabled 1

 1721 13:50:06.863334  I2C: 00:1a: enabled 1

 1722 13:50:06.865648  I2C: 00:31: enabled 1

 1723 13:50:06.869302  I2C: 00:32: enabled 1

 1724 13:50:06.869714  I2C: 00:10: enabled 1

 1725 13:50:06.872488  I2C: 00:15: enabled 1

 1726 13:50:06.875687  GENERIC: 0.0: enabled 0

 1727 13:50:06.876231  GENERIC: 1.0: enabled 0

 1728 13:50:06.878974  GENERIC: 0.0: enabled 1

 1729 13:50:06.882145  SPI: 00: enabled 1

 1730 13:50:06.882641  SPI: 00: enabled 1

 1731 13:50:06.885368  PNP: 0c09.0: enabled 1

 1732 13:50:06.888728  GENERIC: 0.0: enabled 1

 1733 13:50:06.889143  USB3 port 0: enabled 1

 1734 13:50:06.892113  USB3 port 1: enabled 1

 1735 13:50:06.895364  USB3 port 2: enabled 0

 1736 13:50:06.898408  USB3 port 3: enabled 0

 1737 13:50:06.899053  USB2 port 0: enabled 0

 1738 13:50:06.902084  USB2 port 1: enabled 1

 1739 13:50:06.905395  USB2 port 2: enabled 1

 1740 13:50:06.905691  USB2 port 3: enabled 0

 1741 13:50:06.908166  USB2 port 4: enabled 1

 1742 13:50:06.911567  USB2 port 5: enabled 0

 1743 13:50:06.914973  USB2 port 6: enabled 0

 1744 13:50:06.915152  USB2 port 7: enabled 0

 1745 13:50:06.918295  USB2 port 8: enabled 0

 1746 13:50:06.921749  USB2 port 9: enabled 0

 1747 13:50:06.921899  USB3 port 0: enabled 0

 1748 13:50:06.924590  USB3 port 1: enabled 1

 1749 13:50:06.927898  USB3 port 2: enabled 0

 1750 13:50:06.931396  USB3 port 3: enabled 0

 1751 13:50:06.931508  GENERIC: 0.0: enabled 1

 1752 13:50:06.934848  GENERIC: 1.0: enabled 1

 1753 13:50:06.938450  APIC: 01: enabled 1

 1754 13:50:06.938541  APIC: 03: enabled 1

 1755 13:50:06.941145  APIC: 07: enabled 1

 1756 13:50:06.944693  APIC: 05: enabled 1

 1757 13:50:06.944775  APIC: 04: enabled 1

 1758 13:50:06.947609  APIC: 02: enabled 1

 1759 13:50:06.947691  APIC: 06: enabled 1

 1760 13:50:06.950957  PCI: 01:00.0: enabled 1

 1761 13:50:06.957743  BS: BS_DEV_INIT run times (exec / console): 34 / 537 ms

 1762 13:50:06.960977  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1763 13:50:06.964115  ELOG: NV offset 0xf30000 size 0x1000

 1764 13:50:06.972661  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1765 13:50:06.979556  ELOG: Event(17) added with size 13 at 2024-05-08 13:50:07 UTC

 1766 13:50:06.986322  ELOG: Event(92) added with size 9 at 2024-05-08 13:50:07 UTC

 1767 13:50:06.992372  ELOG: Event(93) added with size 9 at 2024-05-08 13:50:07 UTC

 1768 13:50:06.999152  ELOG: Event(9E) added with size 10 at 2024-05-08 13:50:07 UTC

 1769 13:50:07.005589  ELOG: Event(9F) added with size 14 at 2024-05-08 13:50:07 UTC

 1770 13:50:07.012422  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1771 13:50:07.018719  ELOG: Event(A1) added with size 10 at 2024-05-08 13:50:07 UTC

 1772 13:50:07.025600  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 1773 13:50:07.031933  ELOG: Event(A0) added with size 9 at 2024-05-08 13:50:07 UTC

 1774 13:50:07.035479  elog_add_boot_reason: Logged dev mode boot

 1775 13:50:07.041868  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1776 13:50:07.045715  Finalize devices...

 1777 13:50:07.046269  Devices finalized

 1778 13:50:07.051667  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1779 13:50:07.055330  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1780 13:50:07.062543  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1781 13:50:07.065189  ME: HFSTS1                      : 0x80030055

 1782 13:50:07.071645  ME: HFSTS2                      : 0x30280116

 1783 13:50:07.075205  ME: HFSTS3                      : 0x00000050

 1784 13:50:07.082089  ME: HFSTS4                      : 0x00004000

 1785 13:50:07.084991  ME: HFSTS5                      : 0x00000000

 1786 13:50:07.088881  ME: HFSTS6                      : 0x00400006

 1787 13:50:07.091595  ME: Manufacturing Mode          : YES

 1788 13:50:07.098192  ME: SPI Protection Mode Enabled : NO

 1789 13:50:07.101732  ME: FW Partition Table          : OK

 1790 13:50:07.105226  ME: Bringup Loader Failure      : NO

 1791 13:50:07.108198  ME: Firmware Init Complete      : NO

 1792 13:50:07.111451  ME: Boot Options Present        : NO

 1793 13:50:07.114575  ME: Update In Progress          : NO

 1794 13:50:07.118275  ME: D0i3 Support                : YES

 1795 13:50:07.121273  ME: Low Power State Enabled     : NO

 1796 13:50:07.128344  ME: CPU Replaced                : YES

 1797 13:50:07.131418  ME: CPU Replacement Valid       : YES

 1798 13:50:07.134433  ME: Current Working State       : 5

 1799 13:50:07.137750  ME: Current Operation State     : 1

 1800 13:50:07.141159  ME: Current Operation Mode      : 3

 1801 13:50:07.144626  ME: Error Code                  : 0

 1802 13:50:07.148132  ME: Enhanced Debug Mode         : NO

 1803 13:50:07.150955  ME: CPU Debug Disabled          : YES

 1804 13:50:07.154640  ME: TXT Support                 : NO

 1805 13:50:07.160913  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1806 13:50:07.168178  ELOG: Event(91) added with size 10 at 2024-05-08 13:50:07 UTC

 1807 13:50:07.174630  Chrome EC: clear events_b mask to 0x0000000020004000

 1808 13:50:07.181186  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1809 13:50:07.188029  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1810 13:50:07.191390  CBFS: 'fallback/slic' not found.

 1811 13:50:07.194426  ACPI: Writing ACPI tables at 76b01000.

 1812 13:50:07.198011  ACPI:    * FACS

 1813 13:50:07.198437  ACPI:    * DSDT

 1814 13:50:07.204428  Ramoops buffer: 0x100000@0x76a00000.

 1815 13:50:07.207701  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1816 13:50:07.210519  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1817 13:50:07.214955  Google Chrome EC: version:

 1818 13:50:07.217823  	ro: voema_v2.0.10114-a447f03e46

 1819 13:50:07.220976  	rw: voema_v2.0.10114-a447f03e46

 1820 13:50:07.224165    running image: 1

 1821 13:50:07.230734  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1822 13:50:07.234332  ACPI:    * FADT

 1823 13:50:07.234955  SCI is IRQ9

 1824 13:50:07.241073  ACPI: added table 1/32, length now 40

 1825 13:50:07.241376  ACPI:     * SSDT

 1826 13:50:07.243980  Found 1 CPU(s) with 8 core(s) each.

 1827 13:50:07.250609  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1828 13:50:07.254028  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1829 13:50:07.257382  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1830 13:50:07.260184  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1831 13:50:07.266754  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1832 13:50:07.273509  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1833 13:50:07.276856  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1834 13:50:07.283706  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1835 13:50:07.290594  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1836 13:50:07.293847  \_SB.PCI0.RP09: Added StorageD3Enable property

 1837 13:50:07.300336  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1838 13:50:07.303168  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1839 13:50:07.310050  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1840 13:50:07.313115  PS2K: Passing 80 keymaps to kernel

 1841 13:50:07.319866  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1842 13:50:07.326439  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1843 13:50:07.332976  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1844 13:50:07.339599  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1845 13:50:07.346804  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1846 13:50:07.352980  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1847 13:50:07.359373  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1848 13:50:07.366075  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1849 13:50:07.369444  ACPI: added table 2/32, length now 44

 1850 13:50:07.369527  ACPI:    * MCFG

 1851 13:50:07.372795  ACPI: added table 3/32, length now 48

 1852 13:50:07.376211  ACPI:    * TPM2

 1853 13:50:07.379588  TPM2 log created at 0x769f0000

 1854 13:50:07.383170  ACPI: added table 4/32, length now 52

 1855 13:50:07.386503  ACPI:    * MADT

 1856 13:50:07.386616  SCI is IRQ9

 1857 13:50:07.389383  ACPI: added table 5/32, length now 56

 1858 13:50:07.392905  current = 76b09850

 1859 13:50:07.392986  ACPI:    * DMAR

 1860 13:50:07.396255  ACPI: added table 6/32, length now 60

 1861 13:50:07.402568  ACPI: added table 7/32, length now 64

 1862 13:50:07.402649  ACPI:    * HPET

 1863 13:50:07.405769  ACPI: added table 8/32, length now 68

 1864 13:50:07.409505  ACPI: done.

 1865 13:50:07.409586  ACPI tables: 35216 bytes.

 1866 13:50:07.412647  smbios_write_tables: 769ef000

 1867 13:50:07.416774  EC returned error result code 3

 1868 13:50:07.420132  Couldn't obtain OEM name from CBI

 1869 13:50:07.424262  Create SMBIOS type 16

 1870 13:50:07.428405  Create SMBIOS type 17

 1871 13:50:07.431160  GENERIC: 0.0 (WIFI Device)

 1872 13:50:07.434321  SMBIOS tables: 1750 bytes.

 1873 13:50:07.437967  Writing table forward entry at 0x00000500

 1874 13:50:07.444035  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1875 13:50:07.447131  Writing coreboot table at 0x76b25000

 1876 13:50:07.453795   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1877 13:50:07.457269   1. 0000000000001000-000000000009ffff: RAM

 1878 13:50:07.460821   2. 00000000000a0000-00000000000fffff: RESERVED

 1879 13:50:07.467118   3. 0000000000100000-00000000769eefff: RAM

 1880 13:50:07.473988   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1881 13:50:07.477634   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1882 13:50:07.483765   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1883 13:50:07.487816   7. 0000000077000000-000000007fbfffff: RESERVED

 1884 13:50:07.493689   8. 00000000c0000000-00000000cfffffff: RESERVED

 1885 13:50:07.497108   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1886 13:50:07.503802  10. 00000000fb000000-00000000fb000fff: RESERVED

 1887 13:50:07.507553  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1888 13:50:07.510138  12. 00000000fed80000-00000000fed87fff: RESERVED

 1889 13:50:07.516997  13. 00000000fed90000-00000000fed92fff: RESERVED

 1890 13:50:07.520295  14. 00000000feda0000-00000000feda1fff: RESERVED

 1891 13:50:07.526733  15. 00000000fedc0000-00000000feddffff: RESERVED

 1892 13:50:07.530018  16. 0000000100000000-00000002803fffff: RAM

 1893 13:50:07.533609  Passing 4 GPIOs to payload:

 1894 13:50:07.537045              NAME |       PORT | POLARITY |     VALUE

 1895 13:50:07.543436               lid |  undefined |     high |      high

 1896 13:50:07.549826             power |  undefined |     high |       low

 1897 13:50:07.553296             oprom |  undefined |     high |       low

 1898 13:50:07.559880          EC in RW | 0x000000e5 |     high |       low

 1899 13:50:07.566711  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1ed4

 1900 13:50:07.570337  coreboot table: 1576 bytes.

 1901 13:50:07.572856  IMD ROOT    0. 0x76fff000 0x00001000

 1902 13:50:07.576303  IMD SMALL   1. 0x76ffe000 0x00001000

 1903 13:50:07.579085  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1904 13:50:07.582732  VPD         3. 0x76c4d000 0x00000367

 1905 13:50:07.586207  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1906 13:50:07.592882  CONSOLE     5. 0x76c2c000 0x00020000

 1907 13:50:07.595735  FMAP        6. 0x76c2b000 0x00000578

 1908 13:50:07.598906  TIME STAMP  7. 0x76c2a000 0x00000910

 1909 13:50:07.602143  VBOOT WORK  8. 0x76c16000 0x00014000

 1910 13:50:07.605643  ROMSTG STCK 9. 0x76c15000 0x00001000

 1911 13:50:07.609065  AFTER CAR  10. 0x76c0a000 0x0000b000

 1912 13:50:07.612556  RAMSTAGE   11. 0x76b97000 0x00073000

 1913 13:50:07.615895  REFCODE    12. 0x76b42000 0x00055000

 1914 13:50:07.622480  SMM BACKUP 13. 0x76b32000 0x00010000

 1915 13:50:07.625463  4f444749   14. 0x76b30000 0x00002000

 1916 13:50:07.628963  EXT VBT15. 0x76b2d000 0x0000219f

 1917 13:50:07.632266  COREBOOT   16. 0x76b25000 0x00008000

 1918 13:50:07.635199  ACPI       17. 0x76b01000 0x00024000

 1919 13:50:07.638795  ACPI GNVS  18. 0x76b00000 0x00001000

 1920 13:50:07.641839  RAMOOPS    19. 0x76a00000 0x00100000

 1921 13:50:07.645244  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1922 13:50:07.651469  SMBIOS     21. 0x769ef000 0x00000800

 1923 13:50:07.651907  IMD small region:

 1924 13:50:07.655146    IMD ROOT    0. 0x76ffec00 0x00000400

 1925 13:50:07.658504    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1926 13:50:07.664915    POWER STATE 2. 0x76ffeb80 0x00000044

 1927 13:50:07.668324    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1928 13:50:07.671236    MEM INFO    4. 0x76ffe980 0x000001e0

 1929 13:50:07.678049  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1930 13:50:07.681463  MTRR: Physical address space:

 1931 13:50:07.688234  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1932 13:50:07.694456  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1933 13:50:07.698034  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1934 13:50:07.704339  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1935 13:50:07.710576  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1936 13:50:07.717412  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1937 13:50:07.724139  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1938 13:50:07.727481  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 13:50:07.734409  MTRR: Fixed MSR 0x258 0x0606060606060606

 1940 13:50:07.737845  MTRR: Fixed MSR 0x259 0x0000000000000000

 1941 13:50:07.741177  MTRR: Fixed MSR 0x268 0x0606060606060606

 1942 13:50:07.744334  MTRR: Fixed MSR 0x269 0x0606060606060606

 1943 13:50:07.747227  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1944 13:50:07.754253  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1945 13:50:07.757094  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1946 13:50:07.760328  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1947 13:50:07.763818  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1948 13:50:07.770903  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1949 13:50:07.774019  call enable_fixed_mtrr()

 1950 13:50:07.776894  CPU physical address size: 39 bits

 1951 13:50:07.780349  MTRR: default type WB/UC MTRR counts: 6/6.

 1952 13:50:07.783918  MTRR: UC selected as default type.

 1953 13:50:07.790363  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1954 13:50:07.797334  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1955 13:50:07.803981  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1956 13:50:07.809983  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1957 13:50:07.817022  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1958 13:50:07.823765  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1959 13:50:07.824285  

 1960 13:50:07.824669  MTRR check

 1961 13:50:07.826726  Fixed MTRRs   : Enabled

 1962 13:50:07.829994  Variable MTRRs: Enabled

 1963 13:50:07.830548  

 1964 13:50:07.833118  MTRR: Fixed MSR 0x250 0x0606060606060606

 1965 13:50:07.839551  MTRR: Fixed MSR 0x258 0x0606060606060606

 1966 13:50:07.843155  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 13:50:07.846795  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 13:50:07.849948  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 13:50:07.852869  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 13:50:07.859775  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 13:50:07.863277  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 13:50:07.866271  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 13:50:07.869691  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 13:50:07.875799  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 13:50:07.882654  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1976 13:50:07.885800  call enable_fixed_mtrr()

 1977 13:50:07.892667  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 1978 13:50:07.895458  CPU physical address size: 39 bits

 1979 13:50:07.901990  Checking segment from ROM address 0xffc02b38

 1980 13:50:07.905106  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 13:50:07.908245  MTRR: Fixed MSR 0x250 0x0606060606060606

 1982 13:50:07.912042  MTRR: Fixed MSR 0x258 0x0606060606060606

 1983 13:50:07.918413  MTRR: Fixed MSR 0x259 0x0000000000000000

 1984 13:50:07.921910  MTRR: Fixed MSR 0x268 0x0606060606060606

 1985 13:50:07.924996  MTRR: Fixed MSR 0x269 0x0606060606060606

 1986 13:50:07.928396  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1987 13:50:07.935189  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1988 13:50:07.939033  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1989 13:50:07.941551  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1990 13:50:07.944914  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1991 13:50:07.951765  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1992 13:50:07.954745  MTRR: Fixed MSR 0x258 0x0606060606060606

 1993 13:50:07.958304  call enable_fixed_mtrr()

 1994 13:50:07.961289  MTRR: Fixed MSR 0x259 0x0000000000000000

 1995 13:50:07.964789  MTRR: Fixed MSR 0x268 0x0606060606060606

 1996 13:50:07.971345  MTRR: Fixed MSR 0x269 0x0606060606060606

 1997 13:50:07.974948  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1998 13:50:07.978198  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1999 13:50:07.981132  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2000 13:50:07.987610  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2001 13:50:07.991007  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2002 13:50:07.994486  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2003 13:50:07.997812  CPU physical address size: 39 bits

 2004 13:50:08.004450  call enable_fixed_mtrr()

 2005 13:50:08.007793  MTRR: Fixed MSR 0x250 0x0606060606060606

 2006 13:50:08.010998  MTRR: Fixed MSR 0x250 0x0606060606060606

 2007 13:50:08.014076  MTRR: Fixed MSR 0x258 0x0606060606060606

 2008 13:50:08.020708  MTRR: Fixed MSR 0x259 0x0000000000000000

 2009 13:50:08.024033  MTRR: Fixed MSR 0x268 0x0606060606060606

 2010 13:50:08.027072  MTRR: Fixed MSR 0x269 0x0606060606060606

 2011 13:50:08.030778  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2012 13:50:08.034054  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2013 13:50:08.040662  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2014 13:50:08.043636  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2015 13:50:08.046859  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2016 13:50:08.050207  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2017 13:50:08.056928  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 13:50:08.060227  call enable_fixed_mtrr()

 2019 13:50:08.063579  MTRR: Fixed MSR 0x259 0x0000000000000000

 2020 13:50:08.066982  MTRR: Fixed MSR 0x268 0x0606060606060606

 2021 13:50:08.073633  MTRR: Fixed MSR 0x269 0x0606060606060606

 2022 13:50:08.077021  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2023 13:50:08.079880  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2024 13:50:08.083283  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2025 13:50:08.086521  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2026 13:50:08.093107  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2027 13:50:08.096648  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2028 13:50:08.099810  CPU physical address size: 39 bits

 2029 13:50:08.103921  call enable_fixed_mtrr()

 2030 13:50:08.110660  Checking segment from ROM address 0xffc02b54

 2031 13:50:08.113936  CPU physical address size: 39 bits

 2032 13:50:08.117301  MTRR: Fixed MSR 0x250 0x0606060606060606

 2033 13:50:08.120667  MTRR: Fixed MSR 0x250 0x0606060606060606

 2034 13:50:08.124215  MTRR: Fixed MSR 0x258 0x0606060606060606

 2035 13:50:08.130197  MTRR: Fixed MSR 0x259 0x0000000000000000

 2036 13:50:08.133612  MTRR: Fixed MSR 0x268 0x0606060606060606

 2037 13:50:08.137319  MTRR: Fixed MSR 0x269 0x0606060606060606

 2038 13:50:08.140385  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2039 13:50:08.146760  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2040 13:50:08.150047  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2041 13:50:08.153655  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2042 13:50:08.156919  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2043 13:50:08.163361  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2044 13:50:08.166745  MTRR: Fixed MSR 0x258 0x0606060606060606

 2045 13:50:08.170125  call enable_fixed_mtrr()

 2046 13:50:08.172966  MTRR: Fixed MSR 0x259 0x0000000000000000

 2047 13:50:08.176294  MTRR: Fixed MSR 0x268 0x0606060606060606

 2048 13:50:08.182997  MTRR: Fixed MSR 0x269 0x0606060606060606

 2049 13:50:08.186797  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2050 13:50:08.189614  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2051 13:50:08.193006  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2052 13:50:08.199726  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2053 13:50:08.203136  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2054 13:50:08.206758  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2055 13:50:08.209522  CPU physical address size: 39 bits

 2056 13:50:08.213902  call enable_fixed_mtrr()

 2057 13:50:08.220382  Loading segment from ROM address 0xffc02b38

 2058 13:50:08.223621  CPU physical address size: 39 bits

 2059 13:50:08.223706    code (compression=0)

 2060 13:50:08.227015  CPU physical address size: 39 bits

 2061 13:50:08.236733    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2062 13:50:08.246717  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2063 13:50:08.246806  it's not compressed!

 2064 13:50:08.386340  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2065 13:50:08.393056  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2066 13:50:08.399794  Loading segment from ROM address 0xffc02b54

 2067 13:50:08.403003    Entry Point 0x30000000

 2068 13:50:08.403156  Loaded segments

 2069 13:50:08.409539  BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms

 2070 13:50:08.452521  Finalizing chipset.

 2071 13:50:08.455724  Finalizing SMM.

 2072 13:50:08.455837  APMC done.

 2073 13:50:08.462840  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2074 13:50:08.465857  mp_park_aps done after 0 msecs.

 2075 13:50:08.469241  Jumping to boot code at 0x30000000(0x76b25000)

 2076 13:50:08.479295  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2077 13:50:08.479575  

 2078 13:50:08.479735  

 2079 13:50:08.482601  

 2080 13:50:08.482842  Starting depthcharge on Voema...

 2081 13:50:08.483492  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2082 13:50:08.483772  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2083 13:50:08.484020  Setting prompt string to ['volteer:']
 2084 13:50:08.484258  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2085 13:50:08.486013  

 2086 13:50:08.492388  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2087 13:50:08.492791  

 2088 13:50:08.498913  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2089 13:50:08.499476  

 2090 13:50:08.505859  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2091 13:50:08.506402  

 2092 13:50:08.508688  Failed to find eMMC card reader

 2093 13:50:08.509114  

 2094 13:50:08.511953  Wipe memory regions:

 2095 13:50:08.512413  

 2096 13:50:08.515686  	[0x00000000001000, 0x000000000a0000)

 2097 13:50:08.516212  

 2098 13:50:08.518974  	[0x00000000100000, 0x00000030000000)

 2099 13:50:08.544526  

 2100 13:50:08.547428  	[0x00000032662db0, 0x000000769ef000)

 2101 13:50:08.582727  

 2102 13:50:08.586278  	[0x00000100000000, 0x00000280400000)

 2103 13:50:08.787267  

 2104 13:50:08.790246  ec_init: CrosEC protocol v3 supported (256, 256)

 2105 13:50:09.220912  

 2106 13:50:09.221470  R8152: Initializing

 2107 13:50:09.221840  

 2108 13:50:09.224416  Version 6 (ocp_data = 5c30)

 2109 13:50:09.224916  

 2110 13:50:09.227479  R8152: Done initializing

 2111 13:50:09.227936  

 2112 13:50:09.231345  Adding net device

 2113 13:50:09.532197  

 2114 13:50:09.535158  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2115 13:50:09.535578  

 2116 13:50:09.535903  

 2117 13:50:09.536208  

 2118 13:50:09.539143  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2120 13:50:09.640424  volteer: tftpboot 192.168.201.1 13693438/tftp-deploy-nrtu8m_2/kernel/bzImage 13693438/tftp-deploy-nrtu8m_2/kernel/cmdline 13693438/tftp-deploy-nrtu8m_2/ramdisk/ramdisk.cpio.gz

 2121 13:50:09.640607  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2122 13:50:09.640694  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2123 13:50:09.645640  tftpboot 192.168.201.1 13693438/tftp-deploy-nrtu8m_2/kernel/bzIploy-nrtu8m_2/kernel/cmdline 13693438/tftp-deploy-nrtu8m_2/ramdisk/ramdisk.cpio.gz

 2124 13:50:09.645737  

 2125 13:50:09.645810  Waiting for link

 2126 13:50:09.849087  

 2127 13:50:09.849592  done.

 2128 13:50:09.849918  

 2129 13:50:09.850228  MAC: 00:24:32:30:77:76

 2130 13:50:09.850523  

 2131 13:50:09.852335  Sending DHCP discover... done.

 2132 13:50:09.852771  

 2133 13:50:09.855530  Waiting for reply... done.

 2134 13:50:09.856049  

 2135 13:50:09.860039  Sending DHCP request... done.

 2136 13:50:09.860572  

 2137 13:50:09.880984  Waiting for reply... done.

 2138 13:50:09.881430  

 2139 13:50:09.881767  My ip is 192.168.201.16

 2140 13:50:09.882080  

 2141 13:50:09.884488  The DHCP server ip is 192.168.201.1

 2142 13:50:09.887864  

 2143 13:50:09.891240  TFTP server IP predefined by user: 192.168.201.1

 2144 13:50:09.891786  

 2145 13:50:09.898001  Bootfile predefined by user: 13693438/tftp-deploy-nrtu8m_2/kernel/bzImage

 2146 13:50:09.898529  

 2147 13:50:09.901038  Sending tftp read request... done.

 2148 13:50:09.901460  

 2149 13:50:09.910069  Waiting for the transfer... 

 2150 13:50:09.910492  

 2151 13:50:10.600343  00000000 ################################################################

 2152 13:50:10.600921  

 2153 13:50:11.303436  00080000 ################################################################

 2154 13:50:11.303814  

 2155 13:50:11.913116  00100000 ################################################################

 2156 13:50:11.913637  

 2157 13:50:12.570584  00180000 ################################################################

 2158 13:50:12.570718  

 2159 13:50:13.259506  00200000 ################################################################

 2160 13:50:13.260109  

 2161 13:50:13.967821  00280000 ################################################################

 2162 13:50:13.968330  

 2163 13:50:14.648384  00300000 ################################################################

 2164 13:50:14.649003  

 2165 13:50:15.330834  00380000 ################################################################

 2166 13:50:15.331499  

 2167 13:50:16.020426  00400000 ################################################################

 2168 13:50:16.020568  

 2169 13:50:16.678461  00480000 ################################################################

 2170 13:50:16.678963  

 2171 13:50:17.391206  00500000 ################################################################

 2172 13:50:17.391716  

 2173 13:50:18.108232  00580000 ################################################################

 2174 13:50:18.108770  

 2175 13:50:18.822936  00600000 ################################################################

 2176 13:50:18.823454  

 2177 13:50:19.551786  00680000 ################################################################

 2178 13:50:19.552311  

 2179 13:50:20.231850  00700000 ################################################################

 2180 13:50:20.232444  

 2181 13:50:20.924029  00780000 ################################################################

 2182 13:50:20.924603  

 2183 13:50:21.634533  00800000 ################################################################

 2184 13:50:21.635046  

 2185 13:50:22.329975  00880000 ################################################################

 2186 13:50:22.330507  

 2187 13:50:23.042308  00900000 ################################################################

 2188 13:50:23.042826  

 2189 13:50:23.759537  00980000 ################################################################

 2190 13:50:23.760083  

 2191 13:50:24.325318  00a00000 ################################################################

 2192 13:50:24.325453  

 2193 13:50:24.907637  00a80000 ################################################################

 2194 13:50:24.908185  

 2195 13:50:25.578442  00b00000 ################################################################

 2196 13:50:25.578952  

 2197 13:50:26.267292  00b80000 ################################################################

 2198 13:50:26.267809  

 2199 13:50:26.939487  00c00000 ################################################################

 2200 13:50:26.939636  

 2201 13:50:27.606604  00c80000 ################################################################

 2202 13:50:27.607152  

 2203 13:50:28.273541  00d00000 ############################################################ done.

 2204 13:50:28.274186  

 2205 13:50:28.276747  The bootfile was 14122896 bytes long.

 2206 13:50:28.277279  

 2207 13:50:28.280135  Sending tftp read request... done.

 2208 13:50:28.280685  

 2209 13:50:28.283457  Waiting for the transfer... 

 2210 13:50:28.283970  

 2211 13:50:28.894480  00000000 ################################################################

 2212 13:50:28.895043  

 2213 13:50:29.609764  00080000 ################################################################

 2214 13:50:29.610374  

 2215 13:50:30.326174  00100000 ################################################################

 2216 13:50:30.326683  

 2217 13:50:31.007192  00180000 ################################################################

 2218 13:50:31.007721  

 2219 13:50:31.701424  00200000 ################################################################

 2220 13:50:31.701956  

 2221 13:50:32.410715  00280000 ################################################################

 2222 13:50:32.411306  

 2223 13:50:33.129681  00300000 ################################################################

 2224 13:50:33.130251  

 2225 13:50:33.836974  00380000 ################################################################

 2226 13:50:33.837527  

 2227 13:50:34.513833  00400000 ################################################################

 2228 13:50:34.514334  

 2229 13:50:35.225160  00480000 ################################################################

 2230 13:50:35.225669  

 2231 13:50:35.942220  00500000 ################################################################

 2232 13:50:35.942740  

 2233 13:50:36.662177  00580000 ################################################################

 2234 13:50:36.662688  

 2235 13:50:37.370683  00600000 ################################################################

 2236 13:50:37.371188  

 2237 13:50:38.084005  00680000 ################################################################

 2238 13:50:38.084629  

 2239 13:50:38.791080  00700000 ################################################################

 2240 13:50:38.791757  

 2241 13:50:39.497947  00780000 ################################################################

 2242 13:50:39.498546  

 2243 13:50:40.222021  00800000 ################################################################

 2244 13:50:40.222552  

 2245 13:50:40.495938  00880000 ########################## done.

 2246 13:50:40.496495  

 2247 13:50:40.499083  Sending tftp read request... done.

 2248 13:50:40.499504  

 2249 13:50:40.503136  Waiting for the transfer... 

 2250 13:50:40.503555  

 2251 13:50:40.503881  00000000 # done.

 2252 13:50:40.504197  

 2253 13:50:40.512803  Command line loaded dynamically from TFTP file: 13693438/tftp-deploy-nrtu8m_2/kernel/cmdline

 2254 13:50:40.513228  

 2255 13:50:40.526422  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2256 13:50:40.533714  

 2257 13:50:40.537045  Shutting down all USB controllers.

 2258 13:50:40.537463  

 2259 13:50:40.537791  Removing current net device

 2260 13:50:40.538103  

 2261 13:50:40.540024  Finalizing coreboot

 2262 13:50:40.540468  

 2263 13:50:40.546711  Exiting depthcharge with code 4 at timestamp: 40738471

 2264 13:50:40.547128  

 2265 13:50:40.547453  

 2266 13:50:40.547761  Starting kernel ...

 2267 13:50:40.548059  

 2268 13:50:40.548346  

 2269 13:50:40.549678  end: 2.2.4 bootloader-commands (duration 00:00:32) [common]
 2270 13:50:40.550160  start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
 2271 13:50:40.550553  Setting prompt string to ['Linux version [0-9]']
 2272 13:50:40.550917  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2273 13:50:40.551263  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2275 13:54:55.550411  end: 2.2.5 auto-login-action (duration 00:04:15) [common]
 2277 13:54:55.550812  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
 2279 13:54:55.551081  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2282 13:54:55.551544  end: 2 depthcharge-action (duration 00:05:00) [common]
 2284 13:54:55.551887  Cleaning after the job
 2285 13:54:55.552013  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/ramdisk
 2286 13:54:55.553151  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/kernel
 2287 13:54:55.554980  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693438/tftp-deploy-nrtu8m_2/modules
 2288 13:54:55.555584  start: 4.1 power-off (timeout 00:00:30) [common]
 2289 13:54:55.555904  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6' '--port=1' '--command=off'
 2290 13:54:56.347814  >> Command sent successfully.

 2291 13:54:56.350280  Returned 0 in 0 seconds
 2292 13:54:56.450686  end: 4.1 power-off (duration 00:00:01) [common]
 2294 13:54:56.451134  start: 4.2 read-feedback (timeout 00:09:59) [common]
 2295 13:54:56.451459  Listened to connection for namespace 'common' for up to 1s
 2297 13:54:56.451925  Listened to connection for namespace 'common' for up to 1s
 2298 13:54:57.452370  Finalising connection for namespace 'common'
 2299 13:54:57.452547  Disconnecting from shell: Finalise
 2300 13:54:57.452630  
 2301 13:54:57.552959  end: 4.2 read-feedback (duration 00:00:01) [common]
 2302 13:54:57.553141  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13693438
 2303 13:54:57.570305  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13693438
 2304 13:54:57.570454  JobError: Your job cannot terminate cleanly.