Boot log: acer-cp514-2h-1130g7-volteer

    1 13:57:09.301786  lava-dispatcher, installed at version: 2024.01
    2 13:57:09.301987  start: 0 validate
    3 13:57:09.302118  Start time: 2024-05-08 13:57:09.302110+00:00 (UTC)
    4 13:57:09.302237  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:57:09.302363  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
    6 13:57:09.555869  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:57:09.556602  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2482-gc729d2d07124%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:57:09.817810  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:57:09.818003  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 13:57:10.078665  Using caching service: 'http://localhost/cache/?uri=%s'
   11 13:57:10.079347  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2482-gc729d2d07124%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 13:57:10.349622  validate duration: 1.05
   14 13:57:10.350984  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 13:57:10.351504  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 13:57:10.351968  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 13:57:10.352605  Not decompressing ramdisk as can be used compressed.
   18 13:57:10.353066  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
   19 13:57:10.353413  saving as /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/ramdisk/initrd.cpio.gz
   20 13:57:10.353757  total size: 6464291 (6 MB)
   21 13:57:10.359223  progress   0 % (0 MB)
   22 13:57:10.368604  progress   5 % (0 MB)
   23 13:57:10.376311  progress  10 % (0 MB)
   24 13:57:10.381566  progress  15 % (0 MB)
   25 13:57:10.385734  progress  20 % (1 MB)
   26 13:57:10.389420  progress  25 % (1 MB)
   27 13:57:10.392573  progress  30 % (1 MB)
   28 13:57:10.395457  progress  35 % (2 MB)
   29 13:57:10.397950  progress  40 % (2 MB)
   30 13:57:10.400413  progress  45 % (2 MB)
   31 13:57:10.402767  progress  50 % (3 MB)
   32 13:57:10.404984  progress  55 % (3 MB)
   33 13:57:10.407067  progress  60 % (3 MB)
   34 13:57:10.409140  progress  65 % (4 MB)
   35 13:57:10.411023  progress  70 % (4 MB)
   36 13:57:10.412723  progress  75 % (4 MB)
   37 13:57:10.414544  progress  80 % (4 MB)
   38 13:57:10.416249  progress  85 % (5 MB)
   39 13:57:10.417968  progress  90 % (5 MB)
   40 13:57:10.419713  progress  95 % (5 MB)
   41 13:57:10.421465  progress 100 % (6 MB)
   42 13:57:10.421643  6 MB downloaded in 0.07 s (90.78 MB/s)
   43 13:57:10.421797  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 13:57:10.422031  end: 1.1 download-retry (duration 00:00:00) [common]
   46 13:57:10.422114  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 13:57:10.422194  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 13:57:10.422322  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2482-gc729d2d07124/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 13:57:10.422391  saving as /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/kernel/bzImage
   50 13:57:10.422450  total size: 14122896 (13 MB)
   51 13:57:10.422509  No compression specified
   52 13:57:10.423599  progress   0 % (0 MB)
   53 13:57:10.427302  progress   5 % (0 MB)
   54 13:57:10.431122  progress  10 % (1 MB)
   55 13:57:10.434751  progress  15 % (2 MB)
   56 13:57:10.438508  progress  20 % (2 MB)
   57 13:57:10.442116  progress  25 % (3 MB)
   58 13:57:10.445811  progress  30 % (4 MB)
   59 13:57:10.449508  progress  35 % (4 MB)
   60 13:57:10.453219  progress  40 % (5 MB)
   61 13:57:10.456832  progress  45 % (6 MB)
   62 13:57:10.460645  progress  50 % (6 MB)
   63 13:57:10.464364  progress  55 % (7 MB)
   64 13:57:10.467940  progress  60 % (8 MB)
   65 13:57:10.471629  progress  65 % (8 MB)
   66 13:57:10.475168  progress  70 % (9 MB)
   67 13:57:10.478862  progress  75 % (10 MB)
   68 13:57:10.482335  progress  80 % (10 MB)
   69 13:57:10.486108  progress  85 % (11 MB)
   70 13:57:10.489653  progress  90 % (12 MB)
   71 13:57:10.493412  progress  95 % (12 MB)
   72 13:57:10.496959  progress 100 % (13 MB)
   73 13:57:10.497209  13 MB downloaded in 0.07 s (180.17 MB/s)
   74 13:57:10.497355  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 13:57:10.497583  end: 1.2 download-retry (duration 00:00:00) [common]
   77 13:57:10.497668  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 13:57:10.497753  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 13:57:10.497885  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
   80 13:57:10.497955  saving as /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/nfsrootfs/full.rootfs.tar
   81 13:57:10.498023  total size: 100036868 (95 MB)
   82 13:57:10.498084  Using unxz to decompress xz
   83 13:57:10.502281  progress   0 % (0 MB)
   84 13:57:10.881471  progress   5 % (4 MB)
   85 13:57:11.252184  progress  10 % (9 MB)
   86 13:57:11.637663  progress  15 % (14 MB)
   87 13:57:12.023327  progress  20 % (19 MB)
   88 13:57:12.419528  progress  25 % (23 MB)
   89 13:57:12.701222  progress  30 % (28 MB)
   90 13:57:12.973083  progress  35 % (33 MB)
   91 13:57:13.254152  progress  40 % (38 MB)
   92 13:57:13.491611  progress  45 % (42 MB)
   93 13:57:13.778512  progress  50 % (47 MB)
   94 13:57:13.954913  progress  55 % (52 MB)
   95 13:57:14.142283  progress  60 % (57 MB)
   96 13:57:14.439042  progress  65 % (62 MB)
   97 13:57:14.747005  progress  70 % (66 MB)
   98 13:57:15.024657  progress  75 % (71 MB)
   99 13:57:15.303081  progress  80 % (76 MB)
  100 13:57:15.594750  progress  85 % (81 MB)
  101 13:57:15.848089  progress  90 % (85 MB)
  102 13:57:16.129399  progress  95 % (90 MB)
  103 13:57:16.419021  progress 100 % (95 MB)
  104 13:57:16.425269  95 MB downloaded in 5.93 s (16.10 MB/s)
  105 13:57:16.425578  end: 1.3.1 http-download (duration 00:00:06) [common]
  107 13:57:16.425970  end: 1.3 download-retry (duration 00:00:06) [common]
  108 13:57:16.426086  start: 1.4 download-retry (timeout 00:09:54) [common]
  109 13:57:16.426202  start: 1.4.1 http-download (timeout 00:09:54) [common]
  110 13:57:16.426381  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2482-gc729d2d07124/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 13:57:16.426477  saving as /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/modules/modules.tar
  112 13:57:16.426618  total size: 483852 (0 MB)
  113 13:57:16.426766  Using unxz to decompress xz
  114 13:57:16.431325  progress   6 % (0 MB)
  115 13:57:16.431765  progress  13 % (0 MB)
  116 13:57:16.432032  progress  20 % (0 MB)
  117 13:57:16.433719  progress  27 % (0 MB)
  118 13:57:16.435607  progress  33 % (0 MB)
  119 13:57:16.437415  progress  40 % (0 MB)
  120 13:57:16.439453  progress  47 % (0 MB)
  121 13:57:16.441271  progress  54 % (0 MB)
  122 13:57:16.443121  progress  60 % (0 MB)
  123 13:57:16.444786  progress  67 % (0 MB)
  124 13:57:16.446651  progress  74 % (0 MB)
  125 13:57:16.448773  progress  81 % (0 MB)
  126 13:57:16.450373  progress  88 % (0 MB)
  127 13:57:16.452275  progress  94 % (0 MB)
  128 13:57:16.454238  progress 100 % (0 MB)
  129 13:57:16.459936  0 MB downloaded in 0.03 s (13.85 MB/s)
  130 13:57:16.460200  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 13:57:16.460547  end: 1.4 download-retry (duration 00:00:00) [common]
  133 13:57:16.460641  start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
  134 13:57:16.460742  start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
  135 13:57:19.329789  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13693415/extract-nfsrootfs-4n9x6ix0
  136 13:57:19.330009  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 13:57:19.330131  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  138 13:57:19.330317  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o
  139 13:57:19.330465  makedir: /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin
  140 13:57:19.330582  makedir: /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/tests
  141 13:57:19.330696  makedir: /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/results
  142 13:57:19.330810  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-add-keys
  143 13:57:19.330990  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-add-sources
  144 13:57:19.331157  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-background-process-start
  145 13:57:19.331320  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-background-process-stop
  146 13:57:19.331459  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-common-functions
  147 13:57:19.331598  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-echo-ipv4
  148 13:57:19.331762  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-install-packages
  149 13:57:19.331899  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-installed-packages
  150 13:57:19.332040  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-os-build
  151 13:57:19.332180  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-probe-channel
  152 13:57:19.332321  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-probe-ip
  153 13:57:19.332532  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-target-ip
  154 13:57:19.332692  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-target-mac
  155 13:57:19.332831  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-target-storage
  156 13:57:19.332994  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-case
  157 13:57:19.333131  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-event
  158 13:57:19.333267  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-feedback
  159 13:57:19.333404  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-raise
  160 13:57:19.333542  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-reference
  161 13:57:19.333702  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-runner
  162 13:57:19.333841  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-set
  163 13:57:19.334004  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-test-shell
  164 13:57:19.334170  Updating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-install-packages (oe)
  165 13:57:19.334355  Updating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/bin/lava-installed-packages (oe)
  166 13:57:19.334487  Creating /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/environment
  167 13:57:19.334593  LAVA metadata
  168 13:57:19.334669  - LAVA_JOB_ID=13693415
  169 13:57:19.334746  - LAVA_DISPATCHER_IP=192.168.201.1
  170 13:57:19.334868  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  171 13:57:19.334938  skipped lava-vland-overlay
  172 13:57:19.335053  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 13:57:19.335172  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  174 13:57:19.335264  skipped lava-multinode-overlay
  175 13:57:19.335378  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 13:57:19.335497  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  177 13:57:19.335613  Loading test definitions
  178 13:57:19.335742  start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
  179 13:57:19.335846  Using /lava-13693415 at stage 0
  180 13:57:19.335989  Fetching tests from https://github.com/kernelci/test-definitions
  181 13:57:19.336113  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/0/tests/0_ltp-ipc'
  182 13:57:22.566356  Running '/usr/bin/git checkout kernelci.org
  183 13:57:22.714074  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  184 13:57:22.714861  uuid=13693415_1.5.2.3.1 testdef=None
  185 13:57:22.715042  end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
  187 13:57:22.715320  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  188 13:57:22.716096  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 13:57:22.716474  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  191 13:57:22.717492  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 13:57:22.717753  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  194 13:57:22.718708  runner path: /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/0/tests/0_ltp-ipc test_uuid 13693415_1.5.2.3.1
  195 13:57:22.718803  SKIPFILE='skipfile-lkft.yaml'
  196 13:57:22.718878  SKIP_INSTALL='true'
  197 13:57:22.718955  TST_CMDFILES='ipc'
  198 13:57:22.719153  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 13:57:22.719401  Creating lava-test-runner.conf files
  201 13:57:22.719501  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13693415/lava-overlay-banji47o/lava-13693415/0 for stage 0
  202 13:57:22.719635  - 0_ltp-ipc
  203 13:57:22.719776  end: 1.5.2.3 test-definition (duration 00:00:03) [common]
  204 13:57:22.719901  start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
  205 13:57:30.421211  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  206 13:57:30.421370  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
  207 13:57:30.421460  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 13:57:30.421554  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  209 13:57:30.421645  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
  210 13:57:30.586087  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 13:57:30.586500  start: 1.5.4 extract-modules (timeout 00:09:40) [common]
  212 13:57:30.586644  extracting modules file /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13693415/extract-nfsrootfs-4n9x6ix0
  213 13:57:30.608418  extracting modules file /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13693415/extract-overlay-ramdisk-7a07ybt9/ramdisk
  214 13:57:30.629176  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 13:57:30.629349  start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
  216 13:57:30.629466  [common] Applying overlay to NFS
  217 13:57:30.629565  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13693415/compress-overlay-wujmf6di/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13693415/extract-nfsrootfs-4n9x6ix0
  218 13:57:31.549293  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 13:57:31.549462  start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
  220 13:57:31.549555  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 13:57:31.549640  start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
  222 13:57:31.549716  Building ramdisk /var/lib/lava/dispatcher/tmp/13693415/extract-overlay-ramdisk-7a07ybt9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13693415/extract-overlay-ramdisk-7a07ybt9/ramdisk
  223 13:57:31.630542  >> 34111 blocks

  224 13:57:32.331684  rename /var/lib/lava/dispatcher/tmp/13693415/extract-overlay-ramdisk-7a07ybt9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/ramdisk/ramdisk.cpio.gz
  225 13:57:32.332131  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 13:57:32.332252  start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
  227 13:57:32.332350  start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
  228 13:57:32.332485  No mkimage arch provided, not using FIT.
  229 13:57:32.332572  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 13:57:32.332655  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 13:57:32.332757  end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
  232 13:57:32.332845  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
  233 13:57:32.332925  No LXC device requested
  234 13:57:32.333003  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 13:57:32.333091  start: 1.7 deploy-device-env (timeout 00:09:38) [common]
  236 13:57:32.333172  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 13:57:32.333241  Checking files for TFTP limit of 4294967296 bytes.
  238 13:57:32.333674  end: 1 tftp-deploy (duration 00:00:22) [common]
  239 13:57:32.333775  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 13:57:32.333865  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 13:57:32.333989  substitutions:
  242 13:57:32.334055  - {DTB}: None
  243 13:57:32.334115  - {INITRD}: 13693415/tftp-deploy-nctvp8j4/ramdisk/ramdisk.cpio.gz
  244 13:57:32.334173  - {KERNEL}: 13693415/tftp-deploy-nctvp8j4/kernel/bzImage
  245 13:57:32.334228  - {LAVA_MAC}: None
  246 13:57:32.334282  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13693415/extract-nfsrootfs-4n9x6ix0
  247 13:57:32.334335  - {NFS_SERVER_IP}: 192.168.201.1
  248 13:57:32.334388  - {PRESEED_CONFIG}: None
  249 13:57:32.334439  - {PRESEED_LOCAL}: None
  250 13:57:32.334491  - {RAMDISK}: 13693415/tftp-deploy-nctvp8j4/ramdisk/ramdisk.cpio.gz
  251 13:57:32.334542  - {ROOT_PART}: None
  252 13:57:32.334593  - {ROOT}: None
  253 13:57:32.334645  - {SERVER_IP}: 192.168.201.1
  254 13:57:32.334696  - {TEE}: None
  255 13:57:32.334748  Parsed boot commands:
  256 13:57:32.334798  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 13:57:32.334967  Parsed boot commands: tftpboot 192.168.201.1 13693415/tftp-deploy-nctvp8j4/kernel/bzImage 13693415/tftp-deploy-nctvp8j4/kernel/cmdline 13693415/tftp-deploy-nctvp8j4/ramdisk/ramdisk.cpio.gz
  258 13:57:32.335049  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 13:57:32.335131  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 13:57:32.335218  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 13:57:32.335301  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 13:57:32.335372  Not connected, no need to disconnect.
  263 13:57:32.335442  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 13:57:32.335520  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 13:57:32.335587  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-6'
  266 13:57:32.339411  Setting prompt string to ['lava-test: # ']
  267 13:57:32.339756  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 13:57:32.339862  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 13:57:32.339956  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 13:57:32.340046  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 13:57:32.340223  Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-6'
  272 13:57:41.100367  Returned 0 in 8 seconds
  273 13:57:41.201444  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  275 13:57:41.202830  end: 2.2.2 reset-device (duration 00:00:09) [common]
  276 13:57:41.203523  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  277 13:57:41.203987  Setting prompt string to 'Starting depthcharge on Voema...'
  278 13:57:41.204332  Changing prompt to 'Starting depthcharge on Voema...'
  279 13:57:41.204739  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  280 13:57:41.206062  [Enter `^Ec?' for help]

  281 13:57:41.206886  

  282 13:57:41.207607  

  283 13:57:41.208321  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  284 13:57:41.209079  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  285 13:57:41.209426  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  286 13:57:41.209733  CPU: AES supported, TXT NOT supported, VT supported

  287 13:57:41.210024  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  288 13:57:41.210302  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  289 13:57:41.210588  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  290 13:57:41.210860  VBOOT: Loading verstage.

  291 13:57:41.211134  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  292 13:57:41.211409  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  293 13:57:41.211677  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  294 13:57:41.211944  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  295 13:57:41.212223  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  296 13:57:41.212526  

  297 13:57:41.212793  

  298 13:57:41.213072  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  299 13:57:41.213347  Probing TPM: . done!

  300 13:57:41.213652  TPM ready after 0 ms

  301 13:57:41.214117  Connected to device vid:did:rid of 1ae0:0028:00

  302 13:57:41.214457  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  303 13:57:41.214755  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  304 13:57:41.215032  Initialized TPM device CR50 revision 0

  305 13:57:41.215302  tlcl_send_startup: Startup return code is 0

  306 13:57:41.215579  TPM: setup succeeded

  307 13:57:41.215850  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  308 13:57:41.216123  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  309 13:57:41.216415  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  310 13:57:41.216693  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  311 13:57:41.216961  Chrome EC: UHEPI supported

  312 13:57:41.217229  Phase 1

  313 13:57:41.217501  FMAP: area GBB found @ 1805000 (458752 bytes)

  314 13:57:41.217774  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  315 13:57:41.218049  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  316 13:57:41.218326  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  317 13:57:41.218597  VB2:vb2_check_recovery() Recovery was requested manually

  318 13:57:41.218865  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  319 13:57:41.219132  Recovery requested (1009000e)

  320 13:57:41.219399  TPM: Extending digest for VBOOT: boot mode into PCR 0

  321 13:57:41.219669  tlcl_extend: response is 0

  322 13:57:41.219937  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  323 13:57:41.220208  tlcl_extend: response is 0

  324 13:57:41.220495  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  325 13:57:41.220852  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  326 13:57:41.221170  BS: verstage times (exec / console): total (unknown) / 148 ms

  327 13:57:41.221444  

  328 13:57:41.221709  

  329 13:57:41.221974  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  330 13:57:41.222246  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  331 13:57:41.222516  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  332 13:57:41.222783  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  333 13:57:41.223049  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  334 13:57:41.223312  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  335 13:57:41.223577  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  336 13:57:41.223847  TCO_STS:   0000 0000

  337 13:57:41.224176  GEN_PMCON: d0015038 00002200

  338 13:57:41.224659  GBLRST_CAUSE: 00000000 00000000

  339 13:57:41.224978  HPR_CAUSE0: 00000000

  340 13:57:41.225250  prev_sleep_state 5

  341 13:57:41.225518  Boot Count incremented to 29183

  342 13:57:41.225786  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  343 13:57:41.226061  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  344 13:57:41.226334  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  345 13:57:41.226607  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  346 13:57:41.226878  Chrome EC: UHEPI supported

  347 13:57:41.227147  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  348 13:57:41.227415  Probing TPM:  done!

  349 13:57:41.227684  Connected to device vid:did:rid of 1ae0:0028:00

  350 13:57:41.227952  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  351 13:57:41.228227  Initialized TPM device CR50 revision 0

  352 13:57:41.228560  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  353 13:57:41.228841  MRC: Hash idx 0x100b comparison successful.

  354 13:57:41.229110  MRC cache found, size faa8

  355 13:57:41.229377  bootmode is set to: 2

  356 13:57:41.229647  SPD index = 0

  357 13:57:41.229914  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  358 13:57:41.230184  SPD: module type is LPDDR4X

  359 13:57:41.230451  SPD: module part number is MT53E512M64D4NW-046

  360 13:57:41.230720  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  361 13:57:41.230988  SPD: device width 16 bits, bus width 16 bits

  362 13:57:41.231255  SPD: module size is 1024 MB (per channel)

  363 13:57:41.231524  CBMEM:

  364 13:57:41.231791  IMD: root @ 0x76fff000 254 entries.

  365 13:57:41.232056  IMD: root @ 0x76ffec00 62 entries.

  366 13:57:41.232336  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  367 13:57:41.232998  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  368 13:57:41.233317  External stage cache:

  369 13:57:41.233513  IMD: root @ 0x7b3ff000 254 entries.

  370 13:57:41.233706  IMD: root @ 0x7b3fec00 62 entries.

  371 13:57:41.233897  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  372 13:57:41.234089  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  373 13:57:41.234283  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  374 13:57:41.234475  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  375 13:57:41.234791  cse_lite: Skip switching to RW in the recovery path

  376 13:57:41.235087  8 DIMMs found

  377 13:57:41.235295  SMM Memory Map

  378 13:57:41.235491  SMRAM       : 0x7b000000 0x800000

  379 13:57:41.235686   Subregion 0: 0x7b000000 0x200000

  380 13:57:41.235876   Subregion 1: 0x7b200000 0x200000

  381 13:57:41.236066   Subregion 2: 0x7b400000 0x400000

  382 13:57:41.236254  top_of_ram = 0x77000000

  383 13:57:41.236485  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  384 13:57:41.236681  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  385 13:57:41.236883  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  386 13:57:41.237074  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  387 13:57:41.237266  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  388 13:57:41.237459  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  389 13:57:41.237678  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  390 13:57:41.237884  Processing 211 relocs. Offset value of 0x74c0b000

  391 13:57:41.238077  BS: romstage times (exec / console): total (unknown) / 277 ms

  392 13:57:41.238267  

  393 13:57:41.238444  

  394 13:57:41.238587  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  395 13:57:41.238734  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  396 13:57:41.238878  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  397 13:57:41.239023  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  398 13:57:41.239167  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  399 13:57:41.239311  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  400 13:57:41.239454  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  401 13:57:41.239599  Processing 5008 relocs. Offset value of 0x75d98000

  402 13:57:41.239743  BS: postcar times (exec / console): total (unknown) / 59 ms

  403 13:57:41.239886  

  404 13:57:41.240027  

  405 13:57:41.240169  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  406 13:57:41.240315  Normal boot

  407 13:57:41.240492  FW_CONFIG value is 0x804c02

  408 13:57:41.240661  PCI: 00:07.0 disabled by fw_config

  409 13:57:41.240806  PCI: 00:07.1 disabled by fw_config

  410 13:57:41.240950  PCI: 00:0d.2 disabled by fw_config

  411 13:57:41.241091  PCI: 00:1c.7 disabled by fw_config

  412 13:57:41.241234  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  413 13:57:41.241379  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  414 13:57:41.241542  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  415 13:57:41.241687  GENERIC: 0.0 disabled by fw_config

  416 13:57:41.241831  GENERIC: 1.0 disabled by fw_config

  417 13:57:41.241975  fw_config match found: DB_USB=USB3_ACTIVE

  418 13:57:41.242120  fw_config match found: DB_USB=USB3_ACTIVE

  419 13:57:41.242262  fw_config match found: DB_USB=USB3_ACTIVE

  420 13:57:41.242405  fw_config match found: DB_USB=USB3_ACTIVE

  421 13:57:41.242548  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  422 13:57:41.242691  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  423 13:57:41.242835  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  424 13:57:41.242978  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  425 13:57:41.243153  microcode: sig=0x806c1 pf=0x80 revision=0x86

  426 13:57:41.243315  microcode: Update skipped, already up-to-date

  427 13:57:41.243432  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  428 13:57:41.243548  Detected 4 core, 8 thread CPU.

  429 13:57:41.243662  Setting up SMI for CPU

  430 13:57:41.243777  IED base = 0x7b400000

  431 13:57:41.243898  IED size = 0x00400000

  432 13:57:41.244019  Will perform SMM setup.

  433 13:57:41.244133  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  434 13:57:41.244249  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  435 13:57:41.244388  Processing 16 relocs. Offset value of 0x00030000

  436 13:57:41.244510  Attempting to start 7 APs

  437 13:57:41.244629  Waiting for 10ms after sending INIT.

  438 13:57:41.244754  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  439 13:57:41.244953  AP: slot 2 apic_id 2.

  440 13:57:41.245137  AP: slot 7 apic_id 4.

  441 13:57:41.245263  AP: slot 3 apic_id 5.

  442 13:57:41.245379  AP: slot 4 apic_id 7.

  443 13:57:41.245495  AP: slot 5 apic_id 6.

  444 13:57:41.245611  done.

  445 13:57:41.245740  AP: slot 6 apic_id 3.

  446 13:57:41.245857  Waiting for 2nd SIPI to complete...done.

  447 13:57:41.245974  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  448 13:57:41.246091  Processing 13 relocs. Offset value of 0x00038000

  449 13:57:41.246207  Unable to locate Global NVS

  450 13:57:41.246322  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  451 13:57:41.246446  Installing permanent SMM handler to 0x7b000000

  452 13:57:41.246570  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  453 13:57:41.246689  Processing 794 relocs. Offset value of 0x7b010000

  454 13:57:41.247049  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  455 13:57:41.247363  Processing 13 relocs. Offset value of 0x7b008000

  456 13:57:41.247662  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  457 13:57:41.247958  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  458 13:57:41.248252  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  459 13:57:41.248533  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  460 13:57:41.248775  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  461 13:57:41.249017  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  462 13:57:41.249259  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  463 13:57:41.249498  Unable to locate Global NVS

  464 13:57:41.249609  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  465 13:57:41.249711  Clearing SMI status registers

  466 13:57:41.249811  SMI_STS: PM1 

  467 13:57:41.249909  PM1_STS: PWRBTN 

  468 13:57:41.250006  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  469 13:57:41.250105  In relocation handler: CPU 0

  470 13:57:41.250214  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  471 13:57:41.250315  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  472 13:57:41.250412  Relocation complete.

  473 13:57:41.250509  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  474 13:57:41.250607  In relocation handler: CPU 1

  475 13:57:41.250704  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  476 13:57:41.250802  Relocation complete.

  477 13:57:41.250903  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  478 13:57:41.251006  In relocation handler: CPU 2

  479 13:57:41.251103  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  480 13:57:41.251201  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  481 13:57:41.251299  Relocation complete.

  482 13:57:41.251394  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  483 13:57:41.251491  In relocation handler: CPU 6

  484 13:57:41.251585  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  485 13:57:41.251682  Relocation complete.

  486 13:57:41.251778  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  487 13:57:41.251875  In relocation handler: CPU 3

  488 13:57:41.251970  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  489 13:57:41.252067  Relocation complete.

  490 13:57:41.252162  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  491 13:57:41.252259  In relocation handler: CPU 7

  492 13:57:41.252367  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  493 13:57:41.252472  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  494 13:57:41.252569  Relocation complete.

  495 13:57:41.252663  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  496 13:57:41.252760  In relocation handler: CPU 5

  497 13:57:41.252856  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  498 13:57:41.252953  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  499 13:57:41.253049  Relocation complete.

  500 13:57:41.253144  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  501 13:57:41.253241  In relocation handler: CPU 4

  502 13:57:41.253350  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  503 13:57:41.253457  Relocation complete.

  504 13:57:41.253539  Initializing CPU #0

  505 13:57:41.253621  CPU: vendor Intel device 806c1

  506 13:57:41.253703  CPU: family 06, model 8c, stepping 01

  507 13:57:41.253785  Clearing out pending MCEs

  508 13:57:41.253878  Setting up local APIC...

  509 13:57:41.253973   apic_id: 0x00 done.

  510 13:57:41.254055  Turbo is available but hidden

  511 13:57:41.254138  Turbo is available and visible

  512 13:57:41.254222  microcode: Update skipped, already up-to-date

  513 13:57:41.254305  CPU #0 initialized

  514 13:57:41.254392  Initializing CPU #5

  515 13:57:41.254478  Initializing CPU #4

  516 13:57:41.254562  CPU: vendor Intel device 806c1

  517 13:57:41.254655  CPU: family 06, model 8c, stepping 01

  518 13:57:41.254794  CPU: vendor Intel device 806c1

  519 13:57:41.254931  CPU: family 06, model 8c, stepping 01

  520 13:57:41.255026  Clearing out pending MCEs

  521 13:57:41.255122  Clearing out pending MCEs

  522 13:57:41.255207  Setting up local APIC...

  523 13:57:41.255290  Initializing CPU #1

  524 13:57:41.255372  Setting up local APIC...

  525 13:57:41.255455  Initializing CPU #7

  526 13:57:41.255537  Initializing CPU #3

  527 13:57:41.255619  CPU: vendor Intel device 806c1

  528 13:57:41.255702  CPU: family 06, model 8c, stepping 01

  529 13:57:41.255785  CPU: vendor Intel device 806c1

  530 13:57:41.255876  CPU: family 06, model 8c, stepping 01

  531 13:57:41.255959  Clearing out pending MCEs

  532 13:57:41.256041  Clearing out pending MCEs

  533 13:57:41.256124  Setting up local APIC...

  534 13:57:41.256205  Initializing CPU #6

  535 13:57:41.256287  Initializing CPU #2

  536 13:57:41.256378  CPU: vendor Intel device 806c1

  537 13:57:41.256462  CPU: family 06, model 8c, stepping 01

  538 13:57:41.256546  CPU: vendor Intel device 806c1

  539 13:57:41.256628  CPU: family 06, model 8c, stepping 01

  540 13:57:41.256723  Clearing out pending MCEs

  541 13:57:41.256807  Clearing out pending MCEs

  542 13:57:41.256889  Setting up local APIC...

  543 13:57:41.256971   apic_id: 0x07 done.

  544 13:57:41.257053   apic_id: 0x06 done.

  545 13:57:41.257135  microcode: Update skipped, already up-to-date

  546 13:57:41.257219  microcode: Update skipped, already up-to-date

  547 13:57:41.257305  CPU #4 initialized

  548 13:57:41.257386  CPU #5 initialized

  549 13:57:41.257467  Setting up local APIC...

  550 13:57:41.257579  Setting up local APIC...

  551 13:57:41.257709   apic_id: 0x04 done.

  552 13:57:41.257837   apic_id: 0x05 done.

  553 13:57:41.257967  microcode: Update skipped, already up-to-date

  554 13:57:41.258102  microcode: Update skipped, already up-to-date

  555 13:57:41.258231  CPU #7 initialized

  556 13:57:41.258360  CPU #3 initialized

  557 13:57:41.258489  CPU: vendor Intel device 806c1

  558 13:57:41.258603  CPU: family 06, model 8c, stepping 01

  559 13:57:41.258719   apic_id: 0x02 done.

  560 13:57:41.258803   apic_id: 0x03 done.

  561 13:57:41.258876  microcode: Update skipped, already up-to-date

  562 13:57:41.258949  microcode: Update skipped, already up-to-date

  563 13:57:41.259022  CPU #2 initialized

  564 13:57:41.259093  CPU #6 initialized

  565 13:57:41.259165  Clearing out pending MCEs

  566 13:57:41.259237  Setting up local APIC...

  567 13:57:41.259309   apic_id: 0x01 done.

  568 13:57:41.259623  microcode: Update skipped, already up-to-date

  569 13:57:41.259815  CPU #1 initialized

  570 13:57:41.259995  bsp_do_flight_plan done after 455 msecs.

  571 13:57:41.260102  CPU: frequency set to 4000 MHz

  572 13:57:41.260181  Enabling SMIs.

  573 13:57:41.260256  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  574 13:57:41.260330  SATAXPCIE1 indicates PCIe NVMe is present

  575 13:57:41.260433  Probing TPM:  done!

  576 13:57:41.260510  Connected to device vid:did:rid of 1ae0:0028:00

  577 13:57:41.260585  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  578 13:57:41.260659  Initialized TPM device CR50 revision 0

  579 13:57:41.260732  Enabling S0i3.4

  580 13:57:41.260833  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  581 13:57:41.260910  Found a VBT of 8704 bytes after decompression

  582 13:57:41.260983  cse_lite: CSE RO boot. HybridStorageMode disabled

  583 13:57:41.261056  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  584 13:57:41.261129  FSPS returned 0

  585 13:57:41.261201  Executing Phase 1 of FspMultiPhaseSiInit

  586 13:57:41.261274  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  587 13:57:41.261348  port C0 DISC req: usage 1 usb3 1 usb2 5

  588 13:57:41.261420  Raw Buffer output 0 00000511

  589 13:57:41.261492  Raw Buffer output 1 00000000

  590 13:57:41.261563  pmc_send_ipc_cmd succeeded

  591 13:57:41.261635  port C1 DISC req: usage 1 usb3 2 usb2 3

  592 13:57:41.261707  Raw Buffer output 0 00000321

  593 13:57:41.261778  Raw Buffer output 1 00000000

  594 13:57:41.261849  pmc_send_ipc_cmd succeeded

  595 13:57:41.261920  Detected 4 core, 8 thread CPU.

  596 13:57:41.261993  Detected 4 core, 8 thread CPU.

  597 13:57:41.262064  Display FSP Version Info HOB

  598 13:57:41.262136  Reference Code - CPU = a.0.4c.31

  599 13:57:41.262208  uCode Version = 0.0.0.86

  600 13:57:41.262280  TXT ACM version = ff.ff.ff.ffff

  601 13:57:41.262352  Reference Code - ME = a.0.4c.31

  602 13:57:41.262425  MEBx version = 0.0.0.0

  603 13:57:41.262497  ME Firmware Version = Consumer SKU

  604 13:57:41.262568  Reference Code - PCH = a.0.4c.31

  605 13:57:41.262639  PCH-CRID Status = Disabled

  606 13:57:41.262711  PCH-CRID Original Value = ff.ff.ff.ffff

  607 13:57:41.262815  PCH-CRID New Value = ff.ff.ff.ffff

  608 13:57:41.262934  OPROM - RST - RAID = ff.ff.ff.ffff

  609 13:57:41.263049  PCH Hsio Version = 4.0.0.0

  610 13:57:41.263128  Reference Code - SA - System Agent = a.0.4c.31

  611 13:57:41.263202  Reference Code - MRC = 2.0.0.1

  612 13:57:41.263275  SA - PCIe Version = a.0.4c.31

  613 13:57:41.263361  SA-CRID Status = Disabled

  614 13:57:41.263425  SA-CRID Original Value = 0.0.0.1

  615 13:57:41.263489  SA-CRID New Value = 0.0.0.1

  616 13:57:41.263554  OPROM - VBIOS = ff.ff.ff.ffff

  617 13:57:41.263619  IO Manageability Engine FW Version = 11.1.4.0

  618 13:57:41.263683  PHY Build Version = 0.0.0.e0

  619 13:57:41.263753  Thunderbolt(TM) FW Version = 0.0.0.0

  620 13:57:41.263835  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  621 13:57:41.263902  ITSS IRQ Polarities Before:

  622 13:57:41.263966  IPC0: 0xffffffff

  623 13:57:41.264030  IPC1: 0xffffffff

  624 13:57:41.264094  IPC2: 0xffffffff

  625 13:57:41.264157  IPC3: 0xffffffff

  626 13:57:41.264220  ITSS IRQ Polarities After:

  627 13:57:41.264285  IPC0: 0xffffffff

  628 13:57:41.264348  IPC1: 0xffffffff

  629 13:57:41.264418  IPC2: 0xffffffff

  630 13:57:41.264481  IPC3: 0xffffffff

  631 13:57:41.264545  Found PCIe Root Port #9 at PCI: 00:1d.0.

  632 13:57:41.264610  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  633 13:57:41.264679  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  634 13:57:41.264744  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  635 13:57:41.264810  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  636 13:57:41.264875  Enumerating buses...

  637 13:57:41.264939  Show all devs... Before device enumeration.

  638 13:57:41.265003  Root Device: enabled 1

  639 13:57:41.265068  DOMAIN: 0000: enabled 1

  640 13:57:41.265131  CPU_CLUSTER: 0: enabled 1

  641 13:57:41.265195  PCI: 00:00.0: enabled 1

  642 13:57:41.265258  PCI: 00:02.0: enabled 1

  643 13:57:41.265322  PCI: 00:04.0: enabled 1

  644 13:57:41.265386  PCI: 00:05.0: enabled 1

  645 13:57:41.265450  PCI: 00:06.0: enabled 0

  646 13:57:41.265513  PCI: 00:07.0: enabled 0

  647 13:57:41.265577  PCI: 00:07.1: enabled 0

  648 13:57:41.265641  PCI: 00:07.2: enabled 0

  649 13:57:41.265704  PCI: 00:07.3: enabled 0

  650 13:57:41.265767  PCI: 00:08.0: enabled 1

  651 13:57:41.265832  PCI: 00:09.0: enabled 0

  652 13:57:41.265895  PCI: 00:0a.0: enabled 0

  653 13:57:41.265959  PCI: 00:0d.0: enabled 1

  654 13:57:41.266023  PCI: 00:0d.1: enabled 0

  655 13:57:41.266087  PCI: 00:0d.2: enabled 0

  656 13:57:41.266151  PCI: 00:0d.3: enabled 0

  657 13:57:41.266215  PCI: 00:0e.0: enabled 0

  658 13:57:41.266278  PCI: 00:10.2: enabled 1

  659 13:57:41.266342  PCI: 00:10.6: enabled 0

  660 13:57:41.266406  PCI: 00:10.7: enabled 0

  661 13:57:41.266471  PCI: 00:12.0: enabled 0

  662 13:57:41.266534  PCI: 00:12.6: enabled 0

  663 13:57:41.266598  PCI: 00:13.0: enabled 0

  664 13:57:41.266662  PCI: 00:14.0: enabled 1

  665 13:57:41.266725  PCI: 00:14.1: enabled 0

  666 13:57:41.266789  PCI: 00:14.2: enabled 1

  667 13:57:41.266853  PCI: 00:14.3: enabled 1

  668 13:57:41.266917  PCI: 00:15.0: enabled 1

  669 13:57:41.266993  PCI: 00:15.1: enabled 1

  670 13:57:41.267080  PCI: 00:15.2: enabled 1

  671 13:57:41.267146  PCI: 00:15.3: enabled 1

  672 13:57:41.267211  PCI: 00:16.0: enabled 1

  673 13:57:41.267275  PCI: 00:16.1: enabled 0

  674 13:57:41.267339  PCI: 00:16.2: enabled 0

  675 13:57:41.267403  PCI: 00:16.3: enabled 0

  676 13:57:41.267467  PCI: 00:16.4: enabled 0

  677 13:57:41.267530  PCI: 00:16.5: enabled 0

  678 13:57:41.267594  PCI: 00:17.0: enabled 1

  679 13:57:41.267658  PCI: 00:19.0: enabled 0

  680 13:57:41.267722  PCI: 00:19.1: enabled 1

  681 13:57:41.267786  PCI: 00:19.2: enabled 0

  682 13:57:41.267850  PCI: 00:1c.0: enabled 1

  683 13:57:41.267913  PCI: 00:1c.1: enabled 0

  684 13:57:41.267978  PCI: 00:1c.2: enabled 0

  685 13:57:41.268041  PCI: 00:1c.3: enabled 0

  686 13:57:41.268105  PCI: 00:1c.4: enabled 0

  687 13:57:41.268169  PCI: 00:1c.5: enabled 0

  688 13:57:41.268232  PCI: 00:1c.6: enabled 1

  689 13:57:41.268296  PCI: 00:1c.7: enabled 0

  690 13:57:41.268374  PCI: 00:1d.0: enabled 1

  691 13:57:41.268631  PCI: 00:1d.1: enabled 0

  692 13:57:41.268697  PCI: 00:1d.2: enabled 1

  693 13:57:41.268757  PCI: 00:1d.3: enabled 0

  694 13:57:41.268822  PCI: 00:1e.0: enabled 1

  695 13:57:41.268885  PCI: 00:1e.1: enabled 0

  696 13:57:41.268944  PCI: 00:1e.2: enabled 1

  697 13:57:41.269001  PCI: 00:1e.3: enabled 1

  698 13:57:41.269059  PCI: 00:1f.0: enabled 1

  699 13:57:41.269117  PCI: 00:1f.1: enabled 0

  700 13:57:41.269174  PCI: 00:1f.2: enabled 1

  701 13:57:41.269230  PCI: 00:1f.3: enabled 1

  702 13:57:41.269288  PCI: 00:1f.4: enabled 0

  703 13:57:41.269346  PCI: 00:1f.5: enabled 1

  704 13:57:41.269403  PCI: 00:1f.6: enabled 0

  705 13:57:41.269460  PCI: 00:1f.7: enabled 0

  706 13:57:41.269518  APIC: 00: enabled 1

  707 13:57:41.269576  GENERIC: 0.0: enabled 1

  708 13:57:41.269634  GENERIC: 0.0: enabled 1

  709 13:57:41.269694  GENERIC: 1.0: enabled 1

  710 13:57:41.269755  GENERIC: 0.0: enabled 1

  711 13:57:41.269814  GENERIC: 1.0: enabled 1

  712 13:57:41.269871  USB0 port 0: enabled 1

  713 13:57:41.269929  GENERIC: 0.0: enabled 1

  714 13:57:41.269986  USB0 port 0: enabled 1

  715 13:57:41.270044  GENERIC: 0.0: enabled 1

  716 13:57:41.270102  I2C: 00:1a: enabled 1

  717 13:57:41.270160  I2C: 00:31: enabled 1

  718 13:57:41.270217  I2C: 00:32: enabled 1

  719 13:57:41.270274  I2C: 00:10: enabled 1

  720 13:57:41.270331  I2C: 00:15: enabled 1

  721 13:57:41.270389  GENERIC: 0.0: enabled 0

  722 13:57:41.270485  GENERIC: 1.0: enabled 0

  723 13:57:41.270546  GENERIC: 0.0: enabled 1

  724 13:57:41.270604  SPI: 00: enabled 1

  725 13:57:41.270662  SPI: 00: enabled 1

  726 13:57:41.270720  PNP: 0c09.0: enabled 1

  727 13:57:41.270778  GENERIC: 0.0: enabled 1

  728 13:57:41.270835  USB3 port 0: enabled 1

  729 13:57:41.270892  USB3 port 1: enabled 1

  730 13:57:41.270949  USB3 port 2: enabled 0

  731 13:57:41.271007  USB3 port 3: enabled 0

  732 13:57:41.271064  USB2 port 0: enabled 0

  733 13:57:41.271127  USB2 port 1: enabled 1

  734 13:57:41.271190  USB2 port 2: enabled 1

  735 13:57:41.271248  USB2 port 3: enabled 0

  736 13:57:41.271305  USB2 port 4: enabled 1

  737 13:57:41.271362  USB2 port 5: enabled 0

  738 13:57:41.271419  USB2 port 6: enabled 0

  739 13:57:41.271476  USB2 port 7: enabled 0

  740 13:57:41.271533  USB2 port 8: enabled 0

  741 13:57:41.271590  USB2 port 9: enabled 0

  742 13:57:41.271648  USB3 port 0: enabled 0

  743 13:57:41.271705  USB3 port 1: enabled 1

  744 13:57:41.271765  USB3 port 2: enabled 0

  745 13:57:41.271864  USB3 port 3: enabled 0

  746 13:57:41.271960  GENERIC: 0.0: enabled 1

  747 13:57:41.272047  GENERIC: 1.0: enabled 1

  748 13:57:41.272108  APIC: 01: enabled 1

  749 13:57:41.272168  APIC: 02: enabled 1

  750 13:57:41.272263  APIC: 05: enabled 1

  751 13:57:41.272362  APIC: 07: enabled 1

  752 13:57:41.272425  APIC: 06: enabled 1

  753 13:57:41.272483  APIC: 03: enabled 1

  754 13:57:41.272541  APIC: 04: enabled 1

  755 13:57:41.272600  Compare with tree...

  756 13:57:41.272659  Root Device: enabled 1

  757 13:57:41.272716   DOMAIN: 0000: enabled 1

  758 13:57:41.272774    PCI: 00:00.0: enabled 1

  759 13:57:41.272832    PCI: 00:02.0: enabled 1

  760 13:57:41.272889    PCI: 00:04.0: enabled 1

  761 13:57:41.272947     GENERIC: 0.0: enabled 1

  762 13:57:41.273009    PCI: 00:05.0: enabled 1

  763 13:57:41.273071    PCI: 00:06.0: enabled 0

  764 13:57:41.273129    PCI: 00:07.0: enabled 0

  765 13:57:41.273186     GENERIC: 0.0: enabled 1

  766 13:57:41.273244    PCI: 00:07.1: enabled 0

  767 13:57:41.273315     GENERIC: 1.0: enabled 1

  768 13:57:41.273367    PCI: 00:07.2: enabled 0

  769 13:57:41.273419     GENERIC: 0.0: enabled 1

  770 13:57:41.273472    PCI: 00:07.3: enabled 0

  771 13:57:41.273524     GENERIC: 1.0: enabled 1

  772 13:57:41.273576    PCI: 00:08.0: enabled 1

  773 13:57:41.273629    PCI: 00:09.0: enabled 0

  774 13:57:41.273685    PCI: 00:0a.0: enabled 0

  775 13:57:41.273741    PCI: 00:0d.0: enabled 1

  776 13:57:41.273793     USB0 port 0: enabled 1

  777 13:57:41.273845      USB3 port 0: enabled 1

  778 13:57:41.273898      USB3 port 1: enabled 1

  779 13:57:41.273982      USB3 port 2: enabled 0

  780 13:57:41.274039      USB3 port 3: enabled 0

  781 13:57:41.274092    PCI: 00:0d.1: enabled 0

  782 13:57:41.274146    PCI: 00:0d.2: enabled 0

  783 13:57:41.274199     GENERIC: 0.0: enabled 1

  784 13:57:41.274251    PCI: 00:0d.3: enabled 0

  785 13:57:41.274304    PCI: 00:0e.0: enabled 0

  786 13:57:41.274357    PCI: 00:10.2: enabled 1

  787 13:57:41.274409    PCI: 00:10.6: enabled 0

  788 13:57:41.274462    PCI: 00:10.7: enabled 0

  789 13:57:41.274514    PCI: 00:12.0: enabled 0

  790 13:57:41.274570    PCI: 00:12.6: enabled 0

  791 13:57:41.274625    PCI: 00:13.0: enabled 0

  792 13:57:41.274679    PCI: 00:14.0: enabled 1

  793 13:57:41.274731     USB0 port 0: enabled 1

  794 13:57:41.274784      USB2 port 0: enabled 0

  795 13:57:41.274837      USB2 port 1: enabled 1

  796 13:57:41.274890      USB2 port 2: enabled 1

  797 13:57:41.274942      USB2 port 3: enabled 0

  798 13:57:41.274994      USB2 port 4: enabled 1

  799 13:57:41.275047      USB2 port 5: enabled 0

  800 13:57:41.275099      USB2 port 6: enabled 0

  801 13:57:41.275151      USB2 port 7: enabled 0

  802 13:57:41.275203      USB2 port 8: enabled 0

  803 13:57:41.275255      USB2 port 9: enabled 0

  804 13:57:41.275306      USB3 port 0: enabled 0

  805 13:57:41.275359      USB3 port 1: enabled 1

  806 13:57:41.275412      USB3 port 2: enabled 0

  807 13:57:41.275467      USB3 port 3: enabled 0

  808 13:57:41.275523    PCI: 00:14.1: enabled 0

  809 13:57:41.275576    PCI: 00:14.2: enabled 1

  810 13:57:41.275629    PCI: 00:14.3: enabled 1

  811 13:57:41.275681     GENERIC: 0.0: enabled 1

  812 13:57:41.275734    PCI: 00:15.0: enabled 1

  813 13:57:41.275786     I2C: 00:1a: enabled 1

  814 13:57:41.275839     I2C: 00:31: enabled 1

  815 13:57:41.275891     I2C: 00:32: enabled 1

  816 13:57:41.275944    PCI: 00:15.1: enabled 1

  817 13:57:41.275997     I2C: 00:10: enabled 1

  818 13:57:41.276049    PCI: 00:15.2: enabled 1

  819 13:57:41.276101    PCI: 00:15.3: enabled 1

  820 13:57:41.276154    PCI: 00:16.0: enabled 1

  821 13:57:41.276237    PCI: 00:16.1: enabled 0

  822 13:57:41.276321    PCI: 00:16.2: enabled 0

  823 13:57:41.276399    PCI: 00:16.3: enabled 0

  824 13:57:41.276453    PCI: 00:16.4: enabled 0

  825 13:57:41.276507    PCI: 00:16.5: enabled 0

  826 13:57:41.276560    PCI: 00:17.0: enabled 1

  827 13:57:41.276613    PCI: 00:19.0: enabled 0

  828 13:57:41.276665    PCI: 00:19.1: enabled 1

  829 13:57:41.276718     I2C: 00:15: enabled 1

  830 13:57:41.276770    PCI: 00:19.2: enabled 0

  831 13:57:41.276823    PCI: 00:1d.0: enabled 1

  832 13:57:41.276880     GENERIC: 0.0: enabled 1

  833 13:57:41.276936    PCI: 00:1e.0: enabled 1

  834 13:57:41.276990    PCI: 00:1e.1: enabled 0

  835 13:57:41.277043    PCI: 00:1e.2: enabled 1

  836 13:57:41.277095     SPI: 00: enabled 1

  837 13:57:41.277147    PCI: 00:1e.3: enabled 1

  838 13:57:41.277200     SPI: 00: enabled 1

  839 13:57:41.277266    PCI: 00:1f.0: enabled 1

  840 13:57:41.277332     PNP: 0c09.0: enabled 1

  841 13:57:41.277386    PCI: 00:1f.1: enabled 0

  842 13:57:41.277438    PCI: 00:1f.2: enabled 1

  843 13:57:41.277491     GENERIC: 0.0: enabled 1

  844 13:57:41.277544      GENERIC: 0.0: enabled 1

  845 13:57:41.277596      GENERIC: 1.0: enabled 1

  846 13:57:41.277649    PCI: 00:1f.3: enabled 1

  847 13:57:41.277702    PCI: 00:1f.4: enabled 0

  848 13:57:41.277755    PCI: 00:1f.5: enabled 1

  849 13:57:41.277807    PCI: 00:1f.6: enabled 0

  850 13:57:41.278057    PCI: 00:1f.7: enabled 0

  851 13:57:41.278116   CPU_CLUSTER: 0: enabled 1

  852 13:57:41.278170    APIC: 00: enabled 1

  853 13:57:41.278223    APIC: 01: enabled 1

  854 13:57:41.278276    APIC: 02: enabled 1

  855 13:57:41.278328    APIC: 05: enabled 1

  856 13:57:41.278393    APIC: 07: enabled 1

  857 13:57:41.278449    APIC: 06: enabled 1

  858 13:57:41.278503    APIC: 03: enabled 1

  859 13:57:41.278555    APIC: 04: enabled 1

  860 13:57:41.278607  Root Device scanning...

  861 13:57:41.278658  scan_static_bus for Root Device

  862 13:57:41.278710  DOMAIN: 0000 enabled

  863 13:57:41.278761  CPU_CLUSTER: 0 enabled

  864 13:57:41.278813  DOMAIN: 0000 scanning...

  865 13:57:41.278864  PCI: pci_scan_bus for bus 00

  866 13:57:41.278916  PCI: 00:00.0 [8086/0000] ops

  867 13:57:41.278967  PCI: 00:00.0 [8086/9a12] enabled

  868 13:57:41.279019  PCI: 00:02.0 [8086/0000] bus ops

  869 13:57:41.279070  PCI: 00:02.0 [8086/9a40] enabled

  870 13:57:41.279122  PCI: 00:04.0 [8086/0000] bus ops

  871 13:57:41.279178  PCI: 00:04.0 [8086/9a03] enabled

  872 13:57:41.279233  PCI: 00:05.0 [8086/9a19] enabled

  873 13:57:41.279284  PCI: 00:07.0 [0000/0000] hidden

  874 13:57:41.279336  PCI: 00:08.0 [8086/9a11] enabled

  875 13:57:41.279388  PCI: 00:0a.0 [8086/9a0d] disabled

  876 13:57:41.279440  PCI: 00:0d.0 [8086/0000] bus ops

  877 13:57:41.279492  PCI: 00:0d.0 [8086/9a13] enabled

  878 13:57:41.279543  PCI: 00:14.0 [8086/0000] bus ops

  879 13:57:41.279595  PCI: 00:14.0 [8086/a0ed] enabled

  880 13:57:41.279646  PCI: 00:14.2 [8086/a0ef] enabled

  881 13:57:41.279698  PCI: 00:14.3 [8086/0000] bus ops

  882 13:57:41.279749  PCI: 00:14.3 [8086/a0f0] enabled

  883 13:57:41.279800  PCI: 00:15.0 [8086/0000] bus ops

  884 13:57:41.279852  PCI: 00:15.0 [8086/a0e8] enabled

  885 13:57:41.279903  PCI: 00:15.1 [8086/0000] bus ops

  886 13:57:41.279955  PCI: 00:15.1 [8086/a0e9] enabled

  887 13:57:41.280007  PCI: 00:15.2 [8086/0000] bus ops

  888 13:57:41.280063  PCI: 00:15.2 [8086/a0ea] enabled

  889 13:57:41.280118  PCI: 00:15.3 [8086/0000] bus ops

  890 13:57:41.280170  PCI: 00:15.3 [8086/a0eb] enabled

  891 13:57:41.280230  PCI: 00:16.0 [8086/0000] ops

  892 13:57:41.280341  PCI: 00:16.0 [8086/a0e0] enabled

  893 13:57:41.280451  PCI: Static device PCI: 00:17.0 not found, disabling it.

  894 13:57:41.280540  PCI: 00:19.0 [8086/0000] bus ops

  895 13:57:41.280611  PCI: 00:19.0 [8086/a0c5] disabled

  896 13:57:41.280666  PCI: 00:19.1 [8086/0000] bus ops

  897 13:57:41.280719  PCI: 00:19.1 [8086/a0c6] enabled

  898 13:57:41.280801  PCI: 00:1d.0 [8086/0000] bus ops

  899 13:57:41.280884  PCI: 00:1d.0 [8086/a0b0] enabled

  900 13:57:41.280965  PCI: 00:1e.0 [8086/0000] ops

  901 13:57:41.281048  PCI: 00:1e.0 [8086/a0a8] enabled

  902 13:57:41.281129  PCI: 00:1e.2 [8086/0000] bus ops

  903 13:57:41.281211  PCI: 00:1e.2 [8086/a0aa] enabled

  904 13:57:41.281293  PCI: 00:1e.3 [8086/0000] bus ops

  905 13:57:41.281377  PCI: 00:1e.3 [8086/a0ab] enabled

  906 13:57:41.281460  PCI: 00:1f.0 [8086/0000] bus ops

  907 13:57:41.281542  PCI: 00:1f.0 [8086/a087] enabled

  908 13:57:41.281623  RTC Init

  909 13:57:41.281704  Set power on after power failure.

  910 13:57:41.281786  Disabling Deep S3

  911 13:57:41.281867  Disabling Deep S3

  912 13:57:41.281948  Disabling Deep S4

  913 13:57:41.282029  Disabling Deep S4

  914 13:57:41.282110  Disabling Deep S5

  915 13:57:41.282191  Disabling Deep S5

  916 13:57:41.282272  PCI: 00:1f.2 [0000/0000] hidden

  917 13:57:41.282331  PCI: 00:1f.3 [8086/0000] bus ops

  918 13:57:41.282386  PCI: 00:1f.3 [8086/a0c8] enabled

  919 13:57:41.282437  PCI: 00:1f.5 [8086/0000] bus ops

  920 13:57:41.282489  PCI: 00:1f.5 [8086/a0a4] enabled

  921 13:57:41.282539  PCI: Leftover static devices:

  922 13:57:41.282591  PCI: 00:10.2

  923 13:57:41.282642  PCI: 00:10.6

  924 13:57:41.282693  PCI: 00:10.7

  925 13:57:41.282744  PCI: 00:06.0

  926 13:57:41.282795  PCI: 00:07.1

  927 13:57:41.282846  PCI: 00:07.2

  928 13:57:41.282896  PCI: 00:07.3

  929 13:57:41.282947  PCI: 00:09.0

  930 13:57:41.283003  PCI: 00:0d.1

  931 13:57:41.283057  PCI: 00:0d.2

  932 13:57:41.283108  PCI: 00:0d.3

  933 13:57:41.283159  PCI: 00:0e.0

  934 13:57:41.283210  PCI: 00:12.0

  935 13:57:41.283260  PCI: 00:12.6

  936 13:57:41.283311  PCI: 00:13.0

  937 13:57:41.283362  PCI: 00:14.1

  938 13:57:41.283414  PCI: 00:16.1

  939 13:57:41.283492  PCI: 00:16.2

  940 13:57:41.283546  PCI: 00:16.3

  941 13:57:41.283602  PCI: 00:16.4

  942 13:57:41.283657  PCI: 00:16.5

  943 13:57:41.283708  PCI: 00:17.0

  944 13:57:41.283759  PCI: 00:19.2

  945 13:57:41.283810  PCI: 00:1e.1

  946 13:57:41.283861  PCI: 00:1f.1

  947 13:57:41.283912  PCI: 00:1f.4

  948 13:57:41.283964  PCI: 00:1f.6

  949 13:57:41.284015  PCI: 00:1f.7

  950 13:57:41.284066  PCI: Check your devicetree.cb.

  951 13:57:41.284118  PCI: 00:02.0 scanning...

  952 13:57:41.284170  scan_generic_bus for PCI: 00:02.0

  953 13:57:41.284221  scan_generic_bus for PCI: 00:02.0 done

  954 13:57:41.284273  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  955 13:57:41.284325  PCI: 00:04.0 scanning...

  956 13:57:41.284417  scan_generic_bus for PCI: 00:04.0

  957 13:57:41.284470  GENERIC: 0.0 enabled

  958 13:57:41.284521  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  959 13:57:41.284573  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  960 13:57:41.284625  PCI: 00:0d.0 scanning...

  961 13:57:41.284676  scan_static_bus for PCI: 00:0d.0

  962 13:57:41.284727  USB0 port 0 enabled

  963 13:57:41.284778  USB0 port 0 scanning...

  964 13:57:41.284830  scan_static_bus for USB0 port 0

  965 13:57:41.284881  USB3 port 0 enabled

  966 13:57:41.284933  USB3 port 1 enabled

  967 13:57:41.284984  USB3 port 2 disabled

  968 13:57:41.285035  USB3 port 3 disabled

  969 13:57:41.285086  USB3 port 0 scanning...

  970 13:57:41.285137  scan_static_bus for USB3 port 0

  971 13:57:41.285189  scan_static_bus for USB3 port 0 done

  972 13:57:41.285245  scan_bus: bus USB3 port 0 finished in 6 msecs

  973 13:57:41.285299  USB3 port 1 scanning...

  974 13:57:41.285351  scan_static_bus for USB3 port 1

  975 13:57:41.285402  scan_static_bus for USB3 port 1 done

  976 13:57:41.285454  scan_bus: bus USB3 port 1 finished in 6 msecs

  977 13:57:41.285506  scan_static_bus for USB0 port 0 done

  978 13:57:41.285558  scan_bus: bus USB0 port 0 finished in 43 msecs

  979 13:57:41.285609  scan_static_bus for PCI: 00:0d.0 done

  980 13:57:41.285661  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  981 13:57:41.285713  PCI: 00:14.0 scanning...

  982 13:57:41.285765  scan_static_bus for PCI: 00:14.0

  983 13:57:41.285816  USB0 port 0 enabled

  984 13:57:41.285867  USB0 port 0 scanning...

  985 13:57:41.285918  scan_static_bus for USB0 port 0

  986 13:57:41.285972  USB2 port 0 disabled

  987 13:57:41.286026  USB2 port 1 enabled

  988 13:57:41.286079  USB2 port 2 enabled

  989 13:57:41.286130  USB2 port 3 disabled

  990 13:57:41.286181  USB2 port 4 enabled

  991 13:57:41.286232  USB2 port 5 disabled

  992 13:57:41.286283  USB2 port 6 disabled

  993 13:57:41.286333  USB2 port 7 disabled

  994 13:57:41.286384  USB2 port 8 disabled

  995 13:57:41.286435  USB2 port 9 disabled

  996 13:57:41.286486  USB3 port 0 disabled

  997 13:57:41.286537  USB3 port 1 enabled

  998 13:57:41.286588  USB3 port 2 disabled

  999 13:57:41.286638  USB3 port 3 disabled

 1000 13:57:41.286889  USB2 port 1 scanning...

 1001 13:57:41.286952  scan_static_bus for USB2 port 1

 1002 13:57:41.287005  scan_static_bus for USB2 port 1 done

 1003 13:57:41.287057  scan_bus: bus USB2 port 1 finished in 6 msecs

 1004 13:57:41.287109  USB2 port 2 scanning...

 1005 13:57:41.287161  scan_static_bus for USB2 port 2

 1006 13:57:41.287213  scan_static_bus for USB2 port 2 done

 1007 13:57:41.287265  scan_bus: bus USB2 port 2 finished in 6 msecs

 1008 13:57:41.287317  USB2 port 4 scanning...

 1009 13:57:41.287372  scan_static_bus for USB2 port 4

 1010 13:57:41.287426  scan_static_bus for USB2 port 4 done

 1011 13:57:41.287479  scan_bus: bus USB2 port 4 finished in 6 msecs

 1012 13:57:41.287531  USB3 port 1 scanning...

 1013 13:57:41.287582  scan_static_bus for USB3 port 1

 1014 13:57:41.287633  scan_static_bus for USB3 port 1 done

 1015 13:57:41.287684  scan_bus: bus USB3 port 1 finished in 6 msecs

 1016 13:57:41.287736  scan_static_bus for USB0 port 0 done

 1017 13:57:41.287788  scan_bus: bus USB0 port 0 finished in 93 msecs

 1018 13:57:41.287840  scan_static_bus for PCI: 00:14.0 done

 1019 13:57:41.287892  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1020 13:57:41.287944  PCI: 00:14.3 scanning...

 1021 13:57:41.287996  scan_static_bus for PCI: 00:14.3

 1022 13:57:41.288051  GENERIC: 0.0 enabled

 1023 13:57:41.288106  scan_static_bus for PCI: 00:14.3 done

 1024 13:57:41.288158  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1025 13:57:41.288218  PCI: 00:15.0 scanning...

 1026 13:57:41.288273  scan_static_bus for PCI: 00:15.0

 1027 13:57:41.288325  I2C: 00:1a enabled

 1028 13:57:41.288387  I2C: 00:31 enabled

 1029 13:57:41.288439  I2C: 00:32 enabled

 1030 13:57:41.288490  scan_static_bus for PCI: 00:15.0 done

 1031 13:57:41.288541  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1032 13:57:41.288592  PCI: 00:15.1 scanning...

 1033 13:57:41.288642  scan_static_bus for PCI: 00:15.1

 1034 13:57:41.288693  I2C: 00:10 enabled

 1035 13:57:41.288744  scan_static_bus for PCI: 00:15.1 done

 1036 13:57:41.288794  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1037 13:57:41.288845  PCI: 00:15.2 scanning...

 1038 13:57:41.288895  scan_static_bus for PCI: 00:15.2

 1039 13:57:41.288946  scan_static_bus for PCI: 00:15.2 done

 1040 13:57:41.288997  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1041 13:57:41.289047  PCI: 00:15.3 scanning...

 1042 13:57:41.289098  scan_static_bus for PCI: 00:15.3

 1043 13:57:41.289149  scan_static_bus for PCI: 00:15.3 done

 1044 13:57:41.289199  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1045 13:57:41.289250  PCI: 00:19.1 scanning...

 1046 13:57:41.289301  scan_static_bus for PCI: 00:19.1

 1047 13:57:41.289352  I2C: 00:15 enabled

 1048 13:57:41.289404  scan_static_bus for PCI: 00:19.1 done

 1049 13:57:41.289488  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1050 13:57:41.289571  PCI: 00:1d.0 scanning...

 1051 13:57:41.289657  do_pci_scan_bridge for PCI: 00:1d.0

 1052 13:57:41.289715  PCI: pci_scan_bus for bus 01

 1053 13:57:41.289768  PCI: 01:00.0 [1c5c/174a] enabled

 1054 13:57:41.289820  GENERIC: 0.0 enabled

 1055 13:57:41.289871  Enabling Common Clock Configuration

 1056 13:57:41.289922  L1 Sub-State supported from root port 29

 1057 13:57:41.289974  L1 Sub-State Support = 0xf

 1058 13:57:41.290025  CommonModeRestoreTime = 0x28

 1059 13:57:41.290105  Power On Value = 0x16, Power On Scale = 0x0

 1060 13:57:41.290164  ASPM: Enabled L1

 1061 13:57:41.290216  PCIe: Max_Payload_Size adjusted to 128

 1062 13:57:41.290267  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1063 13:57:41.290319  PCI: 00:1e.2 scanning...

 1064 13:57:41.290370  scan_generic_bus for PCI: 00:1e.2

 1065 13:57:41.290421  SPI: 00 enabled

 1066 13:57:41.290473  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1067 13:57:41.290524  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1068 13:57:41.290576  PCI: 00:1e.3 scanning...

 1069 13:57:41.290626  scan_generic_bus for PCI: 00:1e.3

 1070 13:57:41.290719  SPI: 00 enabled

 1071 13:57:41.290772  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1072 13:57:41.290823  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1073 13:57:41.290875  PCI: 00:1f.0 scanning...

 1074 13:57:41.290926  scan_static_bus for PCI: 00:1f.0

 1075 13:57:41.290976  PNP: 0c09.0 enabled

 1076 13:57:41.291027  PNP: 0c09.0 scanning...

 1077 13:57:41.291079  scan_static_bus for PNP: 0c09.0

 1078 13:57:41.291129  scan_static_bus for PNP: 0c09.0 done

 1079 13:57:41.291180  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1080 13:57:41.291231  scan_static_bus for PCI: 00:1f.0 done

 1081 13:57:41.291282  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1082 13:57:41.291333  PCI: 00:1f.2 scanning...

 1083 13:57:41.291386  scan_static_bus for PCI: 00:1f.2

 1084 13:57:41.291437  GENERIC: 0.0 enabled

 1085 13:57:41.291488  GENERIC: 0.0 scanning...

 1086 13:57:41.291539  scan_static_bus for GENERIC: 0.0

 1087 13:57:41.291589  GENERIC: 0.0 enabled

 1088 13:57:41.291640  GENERIC: 1.0 enabled

 1089 13:57:41.291690  scan_static_bus for GENERIC: 0.0 done

 1090 13:57:41.291740  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1091 13:57:41.291790  scan_static_bus for PCI: 00:1f.2 done

 1092 13:57:41.291841  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1093 13:57:41.291892  PCI: 00:1f.3 scanning...

 1094 13:57:41.291942  scan_static_bus for PCI: 00:1f.3

 1095 13:57:41.291993  scan_static_bus for PCI: 00:1f.3 done

 1096 13:57:41.292048  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1097 13:57:41.292103  PCI: 00:1f.5 scanning...

 1098 13:57:41.292154  scan_generic_bus for PCI: 00:1f.5

 1099 13:57:41.292205  scan_generic_bus for PCI: 00:1f.5 done

 1100 13:57:41.292256  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1101 13:57:41.292307  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1102 13:57:41.292384  scan_static_bus for Root Device done

 1103 13:57:41.292451  scan_bus: bus Root Device finished in 736 msecs

 1104 13:57:41.292502  done

 1105 13:57:41.292556  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1106 13:57:41.292610  Chrome EC: UHEPI supported

 1107 13:57:41.292662  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1108 13:57:41.292714  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1109 13:57:41.292765  SPI flash protection: WPSW=1 SRP0=0

 1110 13:57:41.292816  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1111 13:57:41.292867  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1112 13:57:41.292918  found VGA at PCI: 00:02.0

 1113 13:57:41.292971  Setting up VGA for PCI: 00:02.0

 1114 13:57:41.293217  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1115 13:57:41.293278  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1116 13:57:41.293361  Allocating resources...

 1117 13:57:41.293417  Reading resources...

 1118 13:57:41.293469  Root Device read_resources bus 0 link: 0

 1119 13:57:41.293521  DOMAIN: 0000 read_resources bus 0 link: 0

 1120 13:57:41.293573  PCI: 00:04.0 read_resources bus 1 link: 0

 1121 13:57:41.293624  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1122 13:57:41.293676  PCI: 00:0d.0 read_resources bus 0 link: 0

 1123 13:57:41.293727  USB0 port 0 read_resources bus 0 link: 0

 1124 13:57:41.293779  USB0 port 0 read_resources bus 0 link: 0 done

 1125 13:57:41.293829  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1126 13:57:41.293880  PCI: 00:14.0 read_resources bus 0 link: 0

 1127 13:57:41.293931  USB0 port 0 read_resources bus 0 link: 0

 1128 13:57:41.293982  USB0 port 0 read_resources bus 0 link: 0 done

 1129 13:57:41.294033  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1130 13:57:41.294083  PCI: 00:14.3 read_resources bus 0 link: 0

 1131 13:57:41.294134  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1132 13:57:41.294185  PCI: 00:15.0 read_resources bus 0 link: 0

 1133 13:57:41.294236  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1134 13:57:41.294287  PCI: 00:15.1 read_resources bus 0 link: 0

 1135 13:57:41.294338  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1136 13:57:41.294389  PCI: 00:19.1 read_resources bus 0 link: 0

 1137 13:57:41.294440  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1138 13:57:41.294490  PCI: 00:1d.0 read_resources bus 1 link: 0

 1139 13:57:41.294540  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1140 13:57:41.294597  PCI: 00:1e.2 read_resources bus 2 link: 0

 1141 13:57:41.294651  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1142 13:57:41.294703  PCI: 00:1e.3 read_resources bus 3 link: 0

 1143 13:57:41.294754  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1144 13:57:41.294805  PCI: 00:1f.0 read_resources bus 0 link: 0

 1145 13:57:41.294856  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1146 13:57:41.294907  PCI: 00:1f.2 read_resources bus 0 link: 0

 1147 13:57:41.294958  GENERIC: 0.0 read_resources bus 0 link: 0

 1148 13:57:41.295009  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1149 13:57:41.295060  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1150 13:57:41.295110  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1151 13:57:41.295161  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1152 13:57:41.295212  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1153 13:57:41.295263  Root Device read_resources bus 0 link: 0 done

 1154 13:57:41.295313  Done reading resources.

 1155 13:57:41.295364  Show resources in subtree (Root Device)...After reading.

 1156 13:57:41.295419   Root Device child on link 0 DOMAIN: 0000

 1157 13:57:41.295474    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1158 13:57:41.295526    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1159 13:57:41.295578    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1160 13:57:41.295629     PCI: 00:00.0

 1161 13:57:41.295679     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1162 13:57:41.295731     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1163 13:57:41.295782     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1164 13:57:41.295834     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1165 13:57:41.295885     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1166 13:57:41.295937     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1167 13:57:41.295989     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1168 13:57:41.296040     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1169 13:57:41.296094     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1170 13:57:41.296149     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1171 13:57:41.296201     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1172 13:57:41.296252     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1173 13:57:41.296304     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1174 13:57:41.296362     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1175 13:57:41.296448     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1176 13:57:41.296500     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1177 13:57:41.296552     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1178 13:57:41.296604     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1179 13:57:41.296656     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1180 13:57:41.296899     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1181 13:57:41.296961     PCI: 00:02.0

 1182 13:57:41.297014     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1183 13:57:41.297067     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1184 13:57:41.297120     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1185 13:57:41.297172     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1186 13:57:41.297223     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1187 13:57:41.297278      GENERIC: 0.0

 1188 13:57:41.297331     PCI: 00:05.0

 1189 13:57:41.297383     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1190 13:57:41.297435     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1191 13:57:41.297487      GENERIC: 0.0

 1192 13:57:41.297537     PCI: 00:08.0

 1193 13:57:41.297588     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 13:57:41.297639     PCI: 00:0a.0

 1195 13:57:41.297689     PCI: 00:0d.0 child on link 0 USB0 port 0

 1196 13:57:41.297741     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1197 13:57:41.297792      USB0 port 0 child on link 0 USB3 port 0

 1198 13:57:41.297843       USB3 port 0

 1199 13:57:41.297893       USB3 port 1

 1200 13:57:41.297943       USB3 port 2

 1201 13:57:41.297993       USB3 port 3

 1202 13:57:41.298043     PCI: 00:14.0 child on link 0 USB0 port 0

 1203 13:57:41.298095     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1204 13:57:41.298147      USB0 port 0 child on link 0 USB2 port 0

 1205 13:57:41.298230       USB2 port 0

 1206 13:57:41.298312       USB2 port 1

 1207 13:57:41.298396       USB2 port 2

 1208 13:57:41.298465       USB2 port 3

 1209 13:57:41.298517       USB2 port 4

 1210 13:57:41.298568       USB2 port 5

 1211 13:57:41.298619       USB2 port 6

 1212 13:57:41.298709       USB2 port 7

 1213 13:57:41.298760       USB2 port 8

 1214 13:57:41.298811       USB2 port 9

 1215 13:57:41.298866       USB3 port 0

 1216 13:57:41.298920       USB3 port 1

 1217 13:57:41.298971       USB3 port 2

 1218 13:57:41.299021       USB3 port 3

 1219 13:57:41.299071     PCI: 00:14.2

 1220 13:57:41.299121     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1221 13:57:41.299173     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1222 13:57:41.299225     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1223 13:57:41.299276     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1224 13:57:41.299327      GENERIC: 0.0

 1225 13:57:41.299381     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1226 13:57:41.299435     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1227 13:57:41.300270      I2C: 00:1a

 1228 13:57:41.300380      I2C: 00:31

 1229 13:57:41.303496      I2C: 00:32

 1230 13:57:41.307103     PCI: 00:15.1 child on link 0 I2C: 00:10

 1231 13:57:41.316854     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1232 13:57:41.316939      I2C: 00:10

 1233 13:57:41.320125     PCI: 00:15.2

 1234 13:57:41.330535     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1235 13:57:41.330616     PCI: 00:15.3

 1236 13:57:41.339976     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1237 13:57:41.343462     PCI: 00:16.0

 1238 13:57:41.353223     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1239 13:57:41.353339     PCI: 00:19.0

 1240 13:57:41.360240     PCI: 00:19.1 child on link 0 I2C: 00:15

 1241 13:57:41.370328     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1242 13:57:41.370460      I2C: 00:15

 1243 13:57:41.373532     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1244 13:57:41.383194     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1245 13:57:41.393576     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1246 13:57:41.403408     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1247 13:57:41.403875      GENERIC: 0.0

 1248 13:57:41.406977      PCI: 01:00.0

 1249 13:57:41.416492      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1250 13:57:41.426487      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1251 13:57:41.436791      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1252 13:57:41.437211     PCI: 00:1e.0

 1253 13:57:41.446810     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1254 13:57:41.453074     PCI: 00:1e.2 child on link 0 SPI: 00

 1255 13:57:41.463092     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1256 13:57:41.463589      SPI: 00

 1257 13:57:41.466663     PCI: 00:1e.3 child on link 0 SPI: 00

 1258 13:57:41.476464     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1259 13:57:41.479972      SPI: 00

 1260 13:57:41.482754     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1261 13:57:41.492875     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1262 13:57:41.493526      PNP: 0c09.0

 1263 13:57:41.502618      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1264 13:57:41.505942     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1265 13:57:41.515892     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1266 13:57:41.525988     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1267 13:57:41.529109      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1268 13:57:41.532550       GENERIC: 0.0

 1269 13:57:41.532976       GENERIC: 1.0

 1270 13:57:41.536074     PCI: 00:1f.3

 1271 13:57:41.546136     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1272 13:57:41.555831     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1273 13:57:41.556250     PCI: 00:1f.5

 1274 13:57:41.566043     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1275 13:57:41.569247    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1276 13:57:41.572132     APIC: 00

 1277 13:57:41.572560     APIC: 01

 1278 13:57:41.572935     APIC: 02

 1279 13:57:41.575490     APIC: 05

 1280 13:57:41.575762     APIC: 07

 1281 13:57:41.578721     APIC: 06

 1282 13:57:41.578896     APIC: 03

 1283 13:57:41.579034     APIC: 04

 1284 13:57:41.589156  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1285 13:57:41.592401   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1286 13:57:41.598820   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1287 13:57:41.605760   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1288 13:57:41.608930    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1289 13:57:41.615550    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1290 13:57:41.619208    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1291 13:57:41.625388   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1292 13:57:41.632094   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1293 13:57:41.642302   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1294 13:57:41.648418  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1295 13:57:41.654916  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1296 13:57:41.661625   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1297 13:57:41.668506   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1298 13:57:41.675335   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1299 13:57:41.678010   DOMAIN: 0000: Resource ranges:

 1300 13:57:41.681857   * Base: 1000, Size: 800, Tag: 100

 1301 13:57:41.688078   * Base: 1900, Size: e700, Tag: 100

 1302 13:57:41.691551    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1303 13:57:41.698632  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1304 13:57:41.705080  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1305 13:57:41.715454   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1306 13:57:41.722070   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1307 13:57:41.728429   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1308 13:57:41.738094   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1309 13:57:41.745127   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1310 13:57:41.751845   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1311 13:57:41.761258   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1312 13:57:41.768414   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1313 13:57:41.774532   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1314 13:57:41.784997   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1315 13:57:41.791291   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1316 13:57:41.798096   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1317 13:57:41.804432   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1318 13:57:41.814847   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1319 13:57:41.820977   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1320 13:57:41.827696   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1321 13:57:41.837686   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1322 13:57:41.844094   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1323 13:57:41.854301   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1324 13:57:41.860914   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1325 13:57:41.867318   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1326 13:57:41.874160   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1327 13:57:41.877157   DOMAIN: 0000: Resource ranges:

 1328 13:57:41.884007   * Base: 7fc00000, Size: 40400000, Tag: 200

 1329 13:57:41.887612   * Base: d0000000, Size: 28000000, Tag: 200

 1330 13:57:41.890512   * Base: fa000000, Size: 1000000, Tag: 200

 1331 13:57:41.896944   * Base: fb001000, Size: 2fff000, Tag: 200

 1332 13:57:41.900227   * Base: fe010000, Size: 2e000, Tag: 200

 1333 13:57:41.903663   * Base: fe03f000, Size: d41000, Tag: 200

 1334 13:57:41.906906   * Base: fed88000, Size: 8000, Tag: 200

 1335 13:57:41.913778   * Base: fed93000, Size: d000, Tag: 200

 1336 13:57:41.917153   * Base: feda2000, Size: 1e000, Tag: 200

 1337 13:57:41.920706   * Base: fede0000, Size: 1220000, Tag: 200

 1338 13:57:41.927398   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1339 13:57:41.933458    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1340 13:57:41.940155    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1341 13:57:41.947093    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1342 13:57:41.953483    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1343 13:57:41.959809    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1344 13:57:41.966781    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1345 13:57:41.973199    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1346 13:57:41.979603    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1347 13:57:41.986371    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1348 13:57:41.992723    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1349 13:57:41.999745    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1350 13:57:42.006144    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1351 13:57:42.012826    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1352 13:57:42.019952    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1353 13:57:42.026138    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1354 13:57:42.033075    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1355 13:57:42.039727    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1356 13:57:42.046051    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1357 13:57:42.052884    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1358 13:57:42.059187    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1359 13:57:42.066247    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1360 13:57:42.072826    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1361 13:57:42.079371  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1362 13:57:42.085684  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1363 13:57:42.088886   PCI: 00:1d.0: Resource ranges:

 1364 13:57:42.095610   * Base: 7fc00000, Size: 100000, Tag: 200

 1365 13:57:42.102291    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1366 13:57:42.109020    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1367 13:57:42.115710    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1368 13:57:42.122156  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1369 13:57:42.129041  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1370 13:57:42.135464  Root Device assign_resources, bus 0 link: 0

 1371 13:57:42.138930  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 13:57:42.148697  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1373 13:57:42.155721  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1374 13:57:42.165523  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1375 13:57:42.172027  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1376 13:57:42.175275  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1377 13:57:42.182055  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1378 13:57:42.188077  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1379 13:57:42.197895  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1380 13:57:42.204694  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1381 13:57:42.211659  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1382 13:57:42.214288  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1383 13:57:42.224736  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1384 13:57:42.227876  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1385 13:57:42.231114  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1386 13:57:42.241299  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1387 13:57:42.247585  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1388 13:57:42.258061  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1389 13:57:42.261313  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1390 13:57:42.268086  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1391 13:57:42.274879  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1392 13:57:42.277645  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1393 13:57:42.284828  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1394 13:57:42.290941  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1395 13:57:42.297467  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1396 13:57:42.300839  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1397 13:57:42.310739  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1398 13:57:42.317192  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1399 13:57:42.327312  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1400 13:57:42.334113  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1401 13:57:42.340665  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1402 13:57:42.343848  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1403 13:57:42.354036  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1404 13:57:42.363760  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1405 13:57:42.370523  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1406 13:57:42.377207  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1407 13:57:42.383919  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1408 13:57:42.390438  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1409 13:57:42.400016  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1410 13:57:42.403461  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1411 13:57:42.413560  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1412 13:57:42.416951  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1413 13:57:42.423436  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1414 13:57:42.429397  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1415 13:57:42.432941  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1416 13:57:42.439507  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1417 13:57:42.442941  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1418 13:57:42.449350  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1419 13:57:42.452706  LPC: Trying to open IO window from 800 size 1ff

 1420 13:57:42.462611  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1421 13:57:42.469452  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1422 13:57:42.479227  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1423 13:57:42.482616  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1424 13:57:42.486320  Root Device assign_resources, bus 0 link: 0

 1425 13:57:42.489540  Done setting resources.

 1426 13:57:42.495758  Show resources in subtree (Root Device)...After assigning values.

 1427 13:57:42.499116   Root Device child on link 0 DOMAIN: 0000

 1428 13:57:42.505880    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1429 13:57:42.515754    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1430 13:57:42.525993    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1431 13:57:42.526484     PCI: 00:00.0

 1432 13:57:42.535783     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1433 13:57:42.545554     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1434 13:57:42.555733     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1435 13:57:42.565843     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1436 13:57:42.572019     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1437 13:57:42.581940     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1438 13:57:42.591760     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1439 13:57:42.602012     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1440 13:57:42.611613     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1441 13:57:42.618823     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1442 13:57:42.628312     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1443 13:57:42.638346     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1444 13:57:42.648121     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1445 13:57:42.658070     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1446 13:57:42.664321     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1447 13:57:42.674511     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1448 13:57:42.684607     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1449 13:57:42.694541     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1450 13:57:42.704401     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1451 13:57:42.713975     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1452 13:57:42.714098     PCI: 00:02.0

 1453 13:57:42.727650     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1454 13:57:42.737782     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1455 13:57:42.748048     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1456 13:57:42.751357     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1457 13:57:42.761054     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1458 13:57:42.764474      GENERIC: 0.0

 1459 13:57:42.764896     PCI: 00:05.0

 1460 13:57:42.773925     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1461 13:57:42.780914     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1462 13:57:42.781331      GENERIC: 0.0

 1463 13:57:42.784211     PCI: 00:08.0

 1464 13:57:42.793902     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1465 13:57:42.794320     PCI: 00:0a.0

 1466 13:57:42.800744     PCI: 00:0d.0 child on link 0 USB0 port 0

 1467 13:57:42.810939     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1468 13:57:42.814086      USB0 port 0 child on link 0 USB3 port 0

 1469 13:57:42.817418       USB3 port 0

 1470 13:57:42.817828       USB3 port 1

 1471 13:57:42.820730       USB3 port 2

 1472 13:57:42.821143       USB3 port 3

 1473 13:57:42.826978     PCI: 00:14.0 child on link 0 USB0 port 0

 1474 13:57:42.836885     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1475 13:57:42.840140      USB0 port 0 child on link 0 USB2 port 0

 1476 13:57:42.843422       USB2 port 0

 1477 13:57:42.843835       USB2 port 1

 1478 13:57:42.847073       USB2 port 2

 1479 13:57:42.847487       USB2 port 3

 1480 13:57:42.850427       USB2 port 4

 1481 13:57:42.850837       USB2 port 5

 1482 13:57:42.853465       USB2 port 6

 1483 13:57:42.853876       USB2 port 7

 1484 13:57:42.856843       USB2 port 8

 1485 13:57:42.860049       USB2 port 9

 1486 13:57:42.860489       USB3 port 0

 1487 13:57:42.863827       USB3 port 1

 1488 13:57:42.864407       USB3 port 2

 1489 13:57:42.866830       USB3 port 3

 1490 13:57:42.867240     PCI: 00:14.2

 1491 13:57:42.876705     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1492 13:57:42.886868     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1493 13:57:42.893071     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1494 13:57:42.903406     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1495 13:57:42.903837      GENERIC: 0.0

 1496 13:57:42.909969     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1497 13:57:42.919555     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1498 13:57:42.920043      I2C: 00:1a

 1499 13:57:42.923094      I2C: 00:31

 1500 13:57:42.923539      I2C: 00:32

 1501 13:57:42.929483     PCI: 00:15.1 child on link 0 I2C: 00:10

 1502 13:57:42.939780     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1503 13:57:42.940209      I2C: 00:10

 1504 13:57:42.943176     PCI: 00:15.2

 1505 13:57:42.952906     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1506 13:57:42.953441     PCI: 00:15.3

 1507 13:57:42.963089     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1508 13:57:42.966176     PCI: 00:16.0

 1509 13:57:42.975981     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1510 13:57:42.979502     PCI: 00:19.0

 1511 13:57:42.982675     PCI: 00:19.1 child on link 0 I2C: 00:15

 1512 13:57:42.992823     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1513 13:57:42.993318      I2C: 00:15

 1514 13:57:42.999479     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1515 13:57:43.008930     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1516 13:57:43.019101     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1517 13:57:43.029154     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1518 13:57:43.032489      GENERIC: 0.0

 1519 13:57:43.032901      PCI: 01:00.0

 1520 13:57:43.045646      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1521 13:57:43.055393      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1522 13:57:43.065341      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1523 13:57:43.065792     PCI: 00:1e.0

 1524 13:57:43.078716     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1525 13:57:43.081962     PCI: 00:1e.2 child on link 0 SPI: 00

 1526 13:57:43.091859     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1527 13:57:43.092277      SPI: 00

 1528 13:57:43.098754     PCI: 00:1e.3 child on link 0 SPI: 00

 1529 13:57:43.108407     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1530 13:57:43.108827      SPI: 00

 1531 13:57:43.112058     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1532 13:57:43.121922     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1533 13:57:43.125218      PNP: 0c09.0

 1534 13:57:43.131599      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1535 13:57:43.138586     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1536 13:57:43.144912     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1537 13:57:43.155095     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1538 13:57:43.161390      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1539 13:57:43.161804       GENERIC: 0.0

 1540 13:57:43.164761       GENERIC: 1.0

 1541 13:57:43.165172     PCI: 00:1f.3

 1542 13:57:43.174839     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1543 13:57:43.187747     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1544 13:57:43.188166     PCI: 00:1f.5

 1545 13:57:43.198155     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1546 13:57:43.201186    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1547 13:57:43.204288     APIC: 00

 1548 13:57:43.204752     APIC: 01

 1549 13:57:43.207783     APIC: 02

 1550 13:57:43.208195     APIC: 05

 1551 13:57:43.208598     APIC: 07

 1552 13:57:43.211032     APIC: 06

 1553 13:57:43.211443     APIC: 03

 1554 13:57:43.214376     APIC: 04

 1555 13:57:43.214789  Done allocating resources.

 1556 13:57:43.221086  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1557 13:57:43.227491  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1558 13:57:43.231108  Configure GPIOs for I2S audio on UP4.

 1559 13:57:43.238030  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1560 13:57:43.241544  Enabling resources...

 1561 13:57:43.244268  PCI: 00:00.0 subsystem <- 8086/9a12

 1562 13:57:43.247729  PCI: 00:00.0 cmd <- 06

 1563 13:57:43.251107  PCI: 00:02.0 subsystem <- 8086/9a40

 1564 13:57:43.254465  PCI: 00:02.0 cmd <- 03

 1565 13:57:43.257794  PCI: 00:04.0 subsystem <- 8086/9a03

 1566 13:57:43.261307  PCI: 00:04.0 cmd <- 02

 1567 13:57:43.264059  PCI: 00:05.0 subsystem <- 8086/9a19

 1568 13:57:43.264515  PCI: 00:05.0 cmd <- 02

 1569 13:57:43.271145  PCI: 00:08.0 subsystem <- 8086/9a11

 1570 13:57:43.271556  PCI: 00:08.0 cmd <- 06

 1571 13:57:43.274443  PCI: 00:0d.0 subsystem <- 8086/9a13

 1572 13:57:43.277329  PCI: 00:0d.0 cmd <- 02

 1573 13:57:43.280835  PCI: 00:14.0 subsystem <- 8086/a0ed

 1574 13:57:43.284185  PCI: 00:14.0 cmd <- 02

 1575 13:57:43.287592  PCI: 00:14.2 subsystem <- 8086/a0ef

 1576 13:57:43.290910  PCI: 00:14.2 cmd <- 02

 1577 13:57:43.293931  PCI: 00:14.3 subsystem <- 8086/a0f0

 1578 13:57:43.296789  PCI: 00:14.3 cmd <- 02

 1579 13:57:43.300248  PCI: 00:15.0 subsystem <- 8086/a0e8

 1580 13:57:43.303749  PCI: 00:15.0 cmd <- 02

 1581 13:57:43.307137  PCI: 00:15.1 subsystem <- 8086/a0e9

 1582 13:57:43.310374  PCI: 00:15.1 cmd <- 02

 1583 13:57:43.313481  PCI: 00:15.2 subsystem <- 8086/a0ea

 1584 13:57:43.316669  PCI: 00:15.2 cmd <- 02

 1585 13:57:43.319805  PCI: 00:15.3 subsystem <- 8086/a0eb

 1586 13:57:43.319885  PCI: 00:15.3 cmd <- 02

 1587 13:57:43.326516  PCI: 00:16.0 subsystem <- 8086/a0e0

 1588 13:57:43.326596  PCI: 00:16.0 cmd <- 02

 1589 13:57:43.329959  PCI: 00:19.1 subsystem <- 8086/a0c6

 1590 13:57:43.333157  PCI: 00:19.1 cmd <- 02

 1591 13:57:43.336382  PCI: 00:1d.0 bridge ctrl <- 0013

 1592 13:57:43.339661  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1593 13:57:43.343051  PCI: 00:1d.0 cmd <- 06

 1594 13:57:43.346455  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1595 13:57:43.349690  PCI: 00:1e.0 cmd <- 06

 1596 13:57:43.353076  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1597 13:57:43.355936  PCI: 00:1e.2 cmd <- 06

 1598 13:57:43.359353  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1599 13:57:43.362682  PCI: 00:1e.3 cmd <- 02

 1600 13:57:43.366052  PCI: 00:1f.0 subsystem <- 8086/a087

 1601 13:57:43.368956  PCI: 00:1f.0 cmd <- 407

 1602 13:57:43.372485  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1603 13:57:43.375995  PCI: 00:1f.3 cmd <- 02

 1604 13:57:43.378851  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1605 13:57:43.378932  PCI: 00:1f.5 cmd <- 406

 1606 13:57:43.384667  PCI: 01:00.0 cmd <- 02

 1607 13:57:43.389264  done.

 1608 13:57:43.392598  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1609 13:57:43.395919  Initializing devices...

 1610 13:57:43.399318  Root Device init

 1611 13:57:43.402632  Chrome EC: Set SMI mask to 0x0000000000000000

 1612 13:57:43.408950  Chrome EC: clear events_b mask to 0x0000000000000000

 1613 13:57:43.415709  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1614 13:57:43.419052  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1615 13:57:43.425646  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1616 13:57:43.432253  Chrome EC: Set WAKE mask to 0x0000000000000000

 1617 13:57:43.435804  fw_config match found: DB_USB=USB3_ACTIVE

 1618 13:57:43.442522  Configure Right Type-C port orientation for retimer

 1619 13:57:43.445794  Root Device init finished in 42 msecs

 1620 13:57:43.449027  PCI: 00:00.0 init

 1621 13:57:43.452068  CPU TDP = 9 Watts

 1622 13:57:43.452172  CPU PL1 = 9 Watts

 1623 13:57:43.455215  CPU PL2 = 40 Watts

 1624 13:57:43.455314  CPU PL4 = 83 Watts

 1625 13:57:43.458782  PCI: 00:00.0 init finished in 8 msecs

 1626 13:57:43.462270  PCI: 00:02.0 init

 1627 13:57:43.465970  GMA: Found VBT in CBFS

 1628 13:57:43.468695  GMA: Found valid VBT in CBFS

 1629 13:57:43.472047  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1630 13:57:43.482572                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1631 13:57:43.485234  PCI: 00:02.0 init finished in 18 msecs

 1632 13:57:43.488533  PCI: 00:05.0 init

 1633 13:57:43.491857  PCI: 00:05.0 init finished in 0 msecs

 1634 13:57:43.495278  PCI: 00:08.0 init

 1635 13:57:43.498586  PCI: 00:08.0 init finished in 0 msecs

 1636 13:57:43.501939  PCI: 00:14.0 init

 1637 13:57:43.505144  PCI: 00:14.0 init finished in 0 msecs

 1638 13:57:43.505248  PCI: 00:14.2 init

 1639 13:57:43.508610  PCI: 00:14.2 init finished in 0 msecs

 1640 13:57:43.512541  PCI: 00:15.0 init

 1641 13:57:43.515908  I2C bus 0 version 0x3230302a

 1642 13:57:43.519396  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1643 13:57:43.522456  PCI: 00:15.0 init finished in 6 msecs

 1644 13:57:43.525608  PCI: 00:15.1 init

 1645 13:57:43.529026  I2C bus 1 version 0x3230302a

 1646 13:57:43.532508  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1647 13:57:43.535599  PCI: 00:15.1 init finished in 6 msecs

 1648 13:57:43.538643  PCI: 00:15.2 init

 1649 13:57:43.542232  I2C bus 2 version 0x3230302a

 1650 13:57:43.545741  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1651 13:57:43.548920  PCI: 00:15.2 init finished in 6 msecs

 1652 13:57:43.551815  PCI: 00:15.3 init

 1653 13:57:43.551883  I2C bus 3 version 0x3230302a

 1654 13:57:43.558634  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1655 13:57:43.561785  PCI: 00:15.3 init finished in 6 msecs

 1656 13:57:43.561861  PCI: 00:16.0 init

 1657 13:57:43.568282  PCI: 00:16.0 init finished in 0 msecs

 1658 13:57:43.568402  PCI: 00:19.1 init

 1659 13:57:43.571672  I2C bus 5 version 0x3230302a

 1660 13:57:43.575051  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1661 13:57:43.578533  PCI: 00:19.1 init finished in 6 msecs

 1662 13:57:43.581975  PCI: 00:1d.0 init

 1663 13:57:43.585264  Initializing PCH PCIe bridge.

 1664 13:57:43.588718  PCI: 00:1d.0 init finished in 3 msecs

 1665 13:57:43.591576  PCI: 00:1f.0 init

 1666 13:57:43.595065  IOAPIC: Initializing IOAPIC at 0xfec00000

 1667 13:57:43.601890  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1668 13:57:43.601975  IOAPIC: ID = 0x02

 1669 13:57:43.605159  IOAPIC: Dumping registers

 1670 13:57:43.608724    reg 0x0000: 0x02000000

 1671 13:57:43.612049    reg 0x0001: 0x00770020

 1672 13:57:43.612225    reg 0x0002: 0x00000000

 1673 13:57:43.618337  PCI: 00:1f.0 init finished in 21 msecs

 1674 13:57:43.618536  PCI: 00:1f.2 init

 1675 13:57:43.621920  Disabling ACPI via APMC.

 1676 13:57:43.626284  APMC done.

 1677 13:57:43.629592  PCI: 00:1f.2 init finished in 6 msecs

 1678 13:57:43.641760  PCI: 01:00.0 init

 1679 13:57:43.644594  PCI: 01:00.0 init finished in 0 msecs

 1680 13:57:43.648454  PNP: 0c09.0 init

 1681 13:57:43.655210  Google Chrome EC uptime: 10.162 seconds

 1682 13:57:43.658407  Google Chrome AP resets since EC boot: 0

 1683 13:57:43.661446  Google Chrome most recent AP reset causes:

 1684 13:57:43.668048  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1685 13:57:43.671260  PNP: 0c09.0 init finished in 20 msecs

 1686 13:57:43.678129  Devices initialized

 1687 13:57:43.681528  Show all devs... After init.

 1688 13:57:43.684404  Root Device: enabled 1

 1689 13:57:43.684817  DOMAIN: 0000: enabled 1

 1690 13:57:43.687766  CPU_CLUSTER: 0: enabled 1

 1691 13:57:43.691068  PCI: 00:00.0: enabled 1

 1692 13:57:43.694588  PCI: 00:02.0: enabled 1

 1693 13:57:43.694997  PCI: 00:04.0: enabled 1

 1694 13:57:43.697674  PCI: 00:05.0: enabled 1

 1695 13:57:43.701193  PCI: 00:06.0: enabled 0

 1696 13:57:43.704606  PCI: 00:07.0: enabled 0

 1697 13:57:43.705019  PCI: 00:07.1: enabled 0

 1698 13:57:43.707581  PCI: 00:07.2: enabled 0

 1699 13:57:43.710966  PCI: 00:07.3: enabled 0

 1700 13:57:43.714200  PCI: 00:08.0: enabled 1

 1701 13:57:43.714601  PCI: 00:09.0: enabled 0

 1702 13:57:43.717506  PCI: 00:0a.0: enabled 0

 1703 13:57:43.721036  PCI: 00:0d.0: enabled 1

 1704 13:57:43.724300  PCI: 00:0d.1: enabled 0

 1705 13:57:43.724789  PCI: 00:0d.2: enabled 0

 1706 13:57:43.727707  PCI: 00:0d.3: enabled 0

 1707 13:57:43.731045  PCI: 00:0e.0: enabled 0

 1708 13:57:43.733904  PCI: 00:10.2: enabled 1

 1709 13:57:43.734321  PCI: 00:10.6: enabled 0

 1710 13:57:43.737304  PCI: 00:10.7: enabled 0

 1711 13:57:43.740832  PCI: 00:12.0: enabled 0

 1712 13:57:43.741517  PCI: 00:12.6: enabled 0

 1713 13:57:43.744229  PCI: 00:13.0: enabled 0

 1714 13:57:43.747135  PCI: 00:14.0: enabled 1

 1715 13:57:43.750560  PCI: 00:14.1: enabled 0

 1716 13:57:43.751131  PCI: 00:14.2: enabled 1

 1717 13:57:43.754068  PCI: 00:14.3: enabled 1

 1718 13:57:43.757504  PCI: 00:15.0: enabled 1

 1719 13:57:43.760605  PCI: 00:15.1: enabled 1

 1720 13:57:43.761270  PCI: 00:15.2: enabled 1

 1721 13:57:43.763670  PCI: 00:15.3: enabled 1

 1722 13:57:43.767149  PCI: 00:16.0: enabled 1

 1723 13:57:43.770888  PCI: 00:16.1: enabled 0

 1724 13:57:43.771308  PCI: 00:16.2: enabled 0

 1725 13:57:43.773712  PCI: 00:16.3: enabled 0

 1726 13:57:43.776970  PCI: 00:16.4: enabled 0

 1727 13:57:43.780350  PCI: 00:16.5: enabled 0

 1728 13:57:43.780815  PCI: 00:17.0: enabled 0

 1729 13:57:43.783529  PCI: 00:19.0: enabled 0

 1730 13:57:43.786815  PCI: 00:19.1: enabled 1

 1731 13:57:43.789990  PCI: 00:19.2: enabled 0

 1732 13:57:43.790406  PCI: 00:1c.0: enabled 1

 1733 13:57:43.793322  PCI: 00:1c.1: enabled 0

 1734 13:57:43.796609  PCI: 00:1c.2: enabled 0

 1735 13:57:43.799934  PCI: 00:1c.3: enabled 0

 1736 13:57:43.800343  PCI: 00:1c.4: enabled 0

 1737 13:57:43.803288  PCI: 00:1c.5: enabled 0

 1738 13:57:43.806808  PCI: 00:1c.6: enabled 1

 1739 13:57:43.807097  PCI: 00:1c.7: enabled 0

 1740 13:57:43.809856  PCI: 00:1d.0: enabled 1

 1741 13:57:43.813320  PCI: 00:1d.1: enabled 0

 1742 13:57:43.816090  PCI: 00:1d.2: enabled 1

 1743 13:57:43.816287  PCI: 00:1d.3: enabled 0

 1744 13:57:43.819366  PCI: 00:1e.0: enabled 1

 1745 13:57:43.822878  PCI: 00:1e.1: enabled 0

 1746 13:57:43.826253  PCI: 00:1e.2: enabled 1

 1747 13:57:43.826380  PCI: 00:1e.3: enabled 1

 1748 13:57:43.829705  PCI: 00:1f.0: enabled 1

 1749 13:57:43.833007  PCI: 00:1f.1: enabled 0

 1750 13:57:43.836579  PCI: 00:1f.2: enabled 1

 1751 13:57:43.836713  PCI: 00:1f.3: enabled 1

 1752 13:57:43.839788  PCI: 00:1f.4: enabled 0

 1753 13:57:43.842730  PCI: 00:1f.5: enabled 1

 1754 13:57:43.846106  PCI: 00:1f.6: enabled 0

 1755 13:57:43.846274  PCI: 00:1f.7: enabled 0

 1756 13:57:43.849753  APIC: 00: enabled 1

 1757 13:57:43.852507  GENERIC: 0.0: enabled 1

 1758 13:57:43.852622  GENERIC: 0.0: enabled 1

 1759 13:57:43.855861  GENERIC: 1.0: enabled 1

 1760 13:57:43.859314  GENERIC: 0.0: enabled 1

 1761 13:57:43.862707  GENERIC: 1.0: enabled 1

 1762 13:57:43.862918  USB0 port 0: enabled 1

 1763 13:57:43.866153  GENERIC: 0.0: enabled 1

 1764 13:57:43.868934  USB0 port 0: enabled 1

 1765 13:57:43.872369  GENERIC: 0.0: enabled 1

 1766 13:57:43.872575  I2C: 00:1a: enabled 1

 1767 13:57:43.875935  I2C: 00:31: enabled 1

 1768 13:57:43.878952  I2C: 00:32: enabled 1

 1769 13:57:43.879440  I2C: 00:10: enabled 1

 1770 13:57:43.882175  I2C: 00:15: enabled 1

 1771 13:57:43.885695  GENERIC: 0.0: enabled 0

 1772 13:57:43.885808  GENERIC: 1.0: enabled 0

 1773 13:57:43.888881  GENERIC: 0.0: enabled 1

 1774 13:57:43.891906  SPI: 00: enabled 1

 1775 13:57:43.892006  SPI: 00: enabled 1

 1776 13:57:43.895457  PNP: 0c09.0: enabled 1

 1777 13:57:43.898494  GENERIC: 0.0: enabled 1

 1778 13:57:43.898601  USB3 port 0: enabled 1

 1779 13:57:43.902121  USB3 port 1: enabled 1

 1780 13:57:43.905113  USB3 port 2: enabled 0

 1781 13:57:43.908382  USB3 port 3: enabled 0

 1782 13:57:43.908481  USB2 port 0: enabled 0

 1783 13:57:43.911864  USB2 port 1: enabled 1

 1784 13:57:43.915155  USB2 port 2: enabled 1

 1785 13:57:43.915254  USB2 port 3: enabled 0

 1786 13:57:43.918617  USB2 port 4: enabled 1

 1787 13:57:43.922077  USB2 port 5: enabled 0

 1788 13:57:43.925520  USB2 port 6: enabled 0

 1789 13:57:43.925599  USB2 port 7: enabled 0

 1790 13:57:43.928486  USB2 port 8: enabled 0

 1791 13:57:43.931750  USB2 port 9: enabled 0

 1792 13:57:43.931829  USB3 port 0: enabled 0

 1793 13:57:43.935285  USB3 port 1: enabled 1

 1794 13:57:43.938522  USB3 port 2: enabled 0

 1795 13:57:43.941842  USB3 port 3: enabled 0

 1796 13:57:43.941921  GENERIC: 0.0: enabled 1

 1797 13:57:43.944778  GENERIC: 1.0: enabled 1

 1798 13:57:43.948238  APIC: 01: enabled 1

 1799 13:57:43.948317  APIC: 02: enabled 1

 1800 13:57:43.951652  APIC: 05: enabled 1

 1801 13:57:43.951731  APIC: 07: enabled 1

 1802 13:57:43.954823  APIC: 06: enabled 1

 1803 13:57:43.958197  APIC: 03: enabled 1

 1804 13:57:43.958276  APIC: 04: enabled 1

 1805 13:57:43.961626  PCI: 01:00.0: enabled 1

 1806 13:57:43.968210  BS: BS_DEV_INIT run times (exec / console): 31 / 537 ms

 1807 13:57:43.971637  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1808 13:57:43.974531  ELOG: NV offset 0xf30000 size 0x1000

 1809 13:57:43.983128  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1810 13:57:43.989330  ELOG: Event(17) added with size 13 at 2024-05-08 13:57:43 UTC

 1811 13:57:43.996031  ELOG: Event(92) added with size 9 at 2024-05-08 13:57:43 UTC

 1812 13:57:44.002867  ELOG: Event(93) added with size 9 at 2024-05-08 13:57:43 UTC

 1813 13:57:44.009086  ELOG: Event(9E) added with size 10 at 2024-05-08 13:57:43 UTC

 1814 13:57:44.015847  ELOG: Event(9F) added with size 14 at 2024-05-08 13:57:43 UTC

 1815 13:57:44.022093  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1816 13:57:44.028808  ELOG: Event(A1) added with size 10 at 2024-05-08 13:57:43 UTC

 1817 13:57:44.035703  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 1818 13:57:44.041879  ELOG: Event(A0) added with size 9 at 2024-05-08 13:57:43 UTC

 1819 13:57:44.045329  elog_add_boot_reason: Logged dev mode boot

 1820 13:57:44.052240  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1821 13:57:44.054986  Finalize devices...

 1822 13:57:44.055439  Devices finalized

 1823 13:57:44.062085  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1824 13:57:44.065078  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1825 13:57:44.071682  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1826 13:57:44.078142  ME: HFSTS1                      : 0x80030055

 1827 13:57:44.081702  ME: HFSTS2                      : 0x30280116

 1828 13:57:44.085187  ME: HFSTS3                      : 0x00000050

 1829 13:57:44.091391  ME: HFSTS4                      : 0x00004000

 1830 13:57:44.094671  ME: HFSTS5                      : 0x00000000

 1831 13:57:44.097870  ME: HFSTS6                      : 0x00400006

 1832 13:57:44.104750  ME: Manufacturing Mode          : YES

 1833 13:57:44.108043  ME: SPI Protection Mode Enabled : NO

 1834 13:57:44.111600  ME: FW Partition Table          : OK

 1835 13:57:44.114827  ME: Bringup Loader Failure      : NO

 1836 13:57:44.118179  ME: Firmware Init Complete      : NO

 1837 13:57:44.121501  ME: Boot Options Present        : NO

 1838 13:57:44.124715  ME: Update In Progress          : NO

 1839 13:57:44.127622  ME: D0i3 Support                : YES

 1840 13:57:44.134880  ME: Low Power State Enabled     : NO

 1841 13:57:44.137656  ME: CPU Replaced                : YES

 1842 13:57:44.141333  ME: CPU Replacement Valid       : YES

 1843 13:57:44.144266  ME: Current Working State       : 5

 1844 13:57:44.147522  ME: Current Operation State     : 1

 1845 13:57:44.150888  ME: Current Operation Mode      : 3

 1846 13:57:44.154311  ME: Error Code                  : 0

 1847 13:57:44.157883  ME: Enhanced Debug Mode         : NO

 1848 13:57:44.161227  ME: CPU Debug Disabled          : YES

 1849 13:57:44.167717  ME: TXT Support                 : NO

 1850 13:57:44.171133  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1851 13:57:44.177985  ELOG: Event(91) added with size 10 at 2024-05-08 13:57:43 UTC

 1852 13:57:44.184592  Chrome EC: clear events_b mask to 0x0000000020004000

 1853 13:57:44.191453  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1854 13:57:44.197885  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1855 13:57:44.201234  CBFS: 'fallback/slic' not found.

 1856 13:57:44.204727  ACPI: Writing ACPI tables at 76b01000.

 1857 13:57:44.208044  ACPI:    * FACS

 1858 13:57:44.208576  ACPI:    * DSDT

 1859 13:57:44.214307  Ramoops buffer: 0x100000@0x76a00000.

 1860 13:57:44.217964  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1861 13:57:44.220749  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1862 13:57:44.224689  Google Chrome EC: version:

 1863 13:57:44.228070  	ro: voema_v2.0.10114-a447f03e46

 1864 13:57:44.231588  	rw: voema_v2.0.10114-a447f03e46

 1865 13:57:44.234467    running image: 1

 1866 13:57:44.241118  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1867 13:57:44.244570  ACPI:    * FADT

 1868 13:57:44.245188  SCI is IRQ9

 1869 13:57:44.251379  ACPI: added table 1/32, length now 40

 1870 13:57:44.251952  ACPI:     * SSDT

 1871 13:57:44.254328  Found 1 CPU(s) with 8 core(s) each.

 1872 13:57:44.261570  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1873 13:57:44.264834  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1874 13:57:44.267900  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1875 13:57:44.271467  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1876 13:57:44.277667  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1877 13:57:44.284419  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1878 13:57:44.287881  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1879 13:57:44.294602  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1880 13:57:44.300936  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1881 13:57:44.304019  \_SB.PCI0.RP09: Added StorageD3Enable property

 1882 13:57:44.310963  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1883 13:57:44.314218  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1884 13:57:44.320296  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1885 13:57:44.323717  PS2K: Passing 80 keymaps to kernel

 1886 13:57:44.330442  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1887 13:57:44.337170  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1888 13:57:44.343277  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1889 13:57:44.350349  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1890 13:57:44.356517  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1891 13:57:44.363338  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1892 13:57:44.369979  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1893 13:57:44.376394  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1894 13:57:44.379521  ACPI: added table 2/32, length now 44

 1895 13:57:44.383340  ACPI:    * MCFG

 1896 13:57:44.386512  ACPI: added table 3/32, length now 48

 1897 13:57:44.386585  ACPI:    * TPM2

 1898 13:57:44.389632  TPM2 log created at 0x769f0000

 1899 13:57:44.393004  ACPI: added table 4/32, length now 52

 1900 13:57:44.396345  ACPI:    * MADT

 1901 13:57:44.396453  SCI is IRQ9

 1902 13:57:44.399643  ACPI: added table 5/32, length now 56

 1903 13:57:44.402467  current = 76b09850

 1904 13:57:44.402564  ACPI:    * DMAR

 1905 13:57:44.409117  ACPI: added table 6/32, length now 60

 1906 13:57:44.412541  ACPI: added table 7/32, length now 64

 1907 13:57:44.412615  ACPI:    * HPET

 1908 13:57:44.416008  ACPI: added table 8/32, length now 68

 1909 13:57:44.419347  ACPI: done.

 1910 13:57:44.422854  ACPI tables: 35216 bytes.

 1911 13:57:44.426043  smbios_write_tables: 769ef000

 1912 13:57:44.428773  EC returned error result code 3

 1913 13:57:44.432078  Couldn't obtain OEM name from CBI

 1914 13:57:44.435547  Create SMBIOS type 16

 1915 13:57:44.438815  Create SMBIOS type 17

 1916 13:57:44.438914  GENERIC: 0.0 (WIFI Device)

 1917 13:57:44.442218  SMBIOS tables: 1750 bytes.

 1918 13:57:44.448601  Writing table forward entry at 0x00000500

 1919 13:57:44.452093  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1920 13:57:44.458335  Writing coreboot table at 0x76b25000

 1921 13:57:44.462091   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1922 13:57:44.468496   1. 0000000000001000-000000000009ffff: RAM

 1923 13:57:44.471717   2. 00000000000a0000-00000000000fffff: RESERVED

 1924 13:57:44.475161   3. 0000000000100000-00000000769eefff: RAM

 1925 13:57:44.481807   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1926 13:57:44.488244   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1927 13:57:44.491852   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1928 13:57:44.498201   7. 0000000077000000-000000007fbfffff: RESERVED

 1929 13:57:44.501930   8. 00000000c0000000-00000000cfffffff: RESERVED

 1930 13:57:44.508021   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1931 13:57:44.511413  10. 00000000fb000000-00000000fb000fff: RESERVED

 1932 13:57:44.518215  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1933 13:57:44.521095  12. 00000000fed80000-00000000fed87fff: RESERVED

 1934 13:57:44.527722  13. 00000000fed90000-00000000fed92fff: RESERVED

 1935 13:57:44.531303  14. 00000000feda0000-00000000feda1fff: RESERVED

 1936 13:57:44.534589  15. 00000000fedc0000-00000000feddffff: RESERVED

 1937 13:57:44.541325  16. 0000000100000000-00000002803fffff: RAM

 1938 13:57:44.544716  Passing 4 GPIOs to payload:

 1939 13:57:44.548064              NAME |       PORT | POLARITY |     VALUE

 1940 13:57:44.554334               lid |  undefined |     high |      high

 1941 13:57:44.557773             power |  undefined |     high |       low

 1942 13:57:44.564339             oprom |  undefined |     high |       low

 1943 13:57:44.571163          EC in RW | 0x000000e5 |     high |       low

 1944 13:57:44.577337  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ab9

 1945 13:57:44.577439  coreboot table: 1576 bytes.

 1946 13:57:44.583966  IMD ROOT    0. 0x76fff000 0x00001000

 1947 13:57:44.587583  IMD SMALL   1. 0x76ffe000 0x00001000

 1948 13:57:44.590493  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1949 13:57:44.594089  VPD         3. 0x76c4d000 0x00000367

 1950 13:57:44.597432  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1951 13:57:44.600679  CONSOLE     5. 0x76c2c000 0x00020000

 1952 13:57:44.604145  FMAP        6. 0x76c2b000 0x00000578

 1953 13:57:44.607067  TIME STAMP  7. 0x76c2a000 0x00000910

 1954 13:57:44.613881  VBOOT WORK  8. 0x76c16000 0x00014000

 1955 13:57:44.616877  ROMSTG STCK 9. 0x76c15000 0x00001000

 1956 13:57:44.620389  AFTER CAR  10. 0x76c0a000 0x0000b000

 1957 13:57:44.623374  RAMSTAGE   11. 0x76b97000 0x00073000

 1958 13:57:44.626741  REFCODE    12. 0x76b42000 0x00055000

 1959 13:57:44.629923  SMM BACKUP 13. 0x76b32000 0x00010000

 1960 13:57:44.633252  4f444749   14. 0x76b30000 0x00002000

 1961 13:57:44.636483  EXT VBT15. 0x76b2d000 0x0000219f

 1962 13:57:44.643095  COREBOOT   16. 0x76b25000 0x00008000

 1963 13:57:44.646313  ACPI       17. 0x76b01000 0x00024000

 1964 13:57:44.650041  ACPI GNVS  18. 0x76b00000 0x00001000

 1965 13:57:44.653347  RAMOOPS    19. 0x76a00000 0x00100000

 1966 13:57:44.656675  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1967 13:57:44.659783  SMBIOS     21. 0x769ef000 0x00000800

 1968 13:57:44.663008  IMD small region:

 1969 13:57:44.666348    IMD ROOT    0. 0x76ffec00 0x00000400

 1970 13:57:44.669870    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1971 13:57:44.672865    POWER STATE 2. 0x76ffeb80 0x00000044

 1972 13:57:44.679623    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1973 13:57:44.682586    MEM INFO    4. 0x76ffe980 0x000001e0

 1974 13:57:44.685913  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1975 13:57:44.689400  MTRR: Physical address space:

 1976 13:57:44.696170  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1977 13:57:44.702520  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1978 13:57:44.709685  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1979 13:57:44.716473  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1980 13:57:44.722902  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1981 13:57:44.729926  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1982 13:57:44.736321  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1983 13:57:44.739305  MTRR: Fixed MSR 0x250 0x0606060606060606

 1984 13:57:44.743100  MTRR: Fixed MSR 0x258 0x0606060606060606

 1985 13:57:44.746040  MTRR: Fixed MSR 0x259 0x0000000000000000

 1986 13:57:44.753082  MTRR: Fixed MSR 0x268 0x0606060606060606

 1987 13:57:44.756222  MTRR: Fixed MSR 0x269 0x0606060606060606

 1988 13:57:44.759241  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1989 13:57:44.762709  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1990 13:57:44.769188  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1991 13:57:44.772483  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1992 13:57:44.775966  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1993 13:57:44.779042  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1994 13:57:44.783222  call enable_fixed_mtrr()

 1995 13:57:44.786574  CPU physical address size: 39 bits

 1996 13:57:44.793055  MTRR: default type WB/UC MTRR counts: 6/6.

 1997 13:57:44.796164  MTRR: UC selected as default type.

 1998 13:57:44.803306  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1999 13:57:44.806266  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2000 13:57:44.812976  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2001 13:57:44.819764  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2002 13:57:44.826097  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2003 13:57:44.833044  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2004 13:57:44.833490  

 2005 13:57:44.835799  MTRR check

 2006 13:57:44.839493  Fixed MTRRs   : Enabled

 2007 13:57:44.839939  Variable MTRRs: Enabled

 2008 13:57:44.840413  

 2009 13:57:44.845866  MTRR: Fixed MSR 0x250 0x0606060606060606

 2010 13:57:44.849130  MTRR: Fixed MSR 0x258 0x0606060606060606

 2011 13:57:44.852636  MTRR: Fixed MSR 0x259 0x0000000000000000

 2012 13:57:44.856136  MTRR: Fixed MSR 0x268 0x0606060606060606

 2013 13:57:44.862372  MTRR: Fixed MSR 0x269 0x0606060606060606

 2014 13:57:44.865645  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2015 13:57:44.868987  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2016 13:57:44.872421  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2017 13:57:44.875638  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2018 13:57:44.882375  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2019 13:57:44.886103  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2020 13:57:44.892250  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2021 13:57:44.895306  call enable_fixed_mtrr()

 2022 13:57:44.901971  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2023 13:57:44.905190  CPU physical address size: 39 bits

 2024 13:57:44.912350  Checking segment from ROM address 0xffc02b38

 2025 13:57:44.915774  MTRR: Fixed MSR 0x250 0x0606060606060606

 2026 13:57:44.919110  MTRR: Fixed MSR 0x250 0x0606060606060606

 2027 13:57:44.922723  MTRR: Fixed MSR 0x258 0x0606060606060606

 2028 13:57:44.929127  MTRR: Fixed MSR 0x259 0x0000000000000000

 2029 13:57:44.932433  MTRR: Fixed MSR 0x268 0x0606060606060606

 2030 13:57:44.935246  MTRR: Fixed MSR 0x269 0x0606060606060606

 2031 13:57:44.938827  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2032 13:57:44.945393  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2033 13:57:44.948677  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2034 13:57:44.952093  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2035 13:57:44.955331  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2036 13:57:44.962260  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2037 13:57:44.965738  MTRR: Fixed MSR 0x258 0x0606060606060606

 2038 13:57:44.968343  MTRR: Fixed MSR 0x259 0x0000000000000000

 2039 13:57:44.975114  MTRR: Fixed MSR 0x268 0x0606060606060606

 2040 13:57:44.978452  MTRR: Fixed MSR 0x269 0x0606060606060606

 2041 13:57:44.982850  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2042 13:57:44.985318  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2043 13:57:44.991739  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2044 13:57:44.995520  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2045 13:57:44.998222  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2046 13:57:45.001554  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2047 13:57:45.006055  call enable_fixed_mtrr()

 2048 13:57:45.008886  call enable_fixed_mtrr()

 2049 13:57:45.012595  MTRR: Fixed MSR 0x250 0x0606060606060606

 2050 13:57:45.015851  MTRR: Fixed MSR 0x250 0x0606060606060606

 2051 13:57:45.022429  MTRR: Fixed MSR 0x258 0x0606060606060606

 2052 13:57:45.025248  MTRR: Fixed MSR 0x259 0x0000000000000000

 2053 13:57:45.028977  MTRR: Fixed MSR 0x268 0x0606060606060606

 2054 13:57:45.031924  MTRR: Fixed MSR 0x269 0x0606060606060606

 2055 13:57:45.038935  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2056 13:57:45.042347  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2057 13:57:45.045131  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2058 13:57:45.048652  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2059 13:57:45.055055  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2060 13:57:45.058429  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2061 13:57:45.064789  MTRR: Fixed MSR 0x258 0x0606060606060606

 2062 13:57:45.065211  call enable_fixed_mtrr()

 2063 13:57:45.071515  MTRR: Fixed MSR 0x259 0x0000000000000000

 2064 13:57:45.074840  MTRR: Fixed MSR 0x268 0x0606060606060606

 2065 13:57:45.078129  MTRR: Fixed MSR 0x269 0x0606060606060606

 2066 13:57:45.081585  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2067 13:57:45.085057  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2068 13:57:45.091263  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2069 13:57:45.094587  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2070 13:57:45.097967  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2071 13:57:45.101175  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2072 13:57:45.108740  CPU physical address size: 39 bits

 2073 13:57:45.111859  call enable_fixed_mtrr()

 2074 13:57:45.115293  MTRR: Fixed MSR 0x250 0x0606060606060606

 2075 13:57:45.118670  MTRR: Fixed MSR 0x250 0x0606060606060606

 2076 13:57:45.122172  MTRR: Fixed MSR 0x258 0x0606060606060606

 2077 13:57:45.128737  MTRR: Fixed MSR 0x259 0x0000000000000000

 2078 13:57:45.131987  MTRR: Fixed MSR 0x268 0x0606060606060606

 2079 13:57:45.134970  MTRR: Fixed MSR 0x269 0x0606060606060606

 2080 13:57:45.138540  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2081 13:57:45.145232  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2082 13:57:45.148449  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2083 13:57:45.151832  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2084 13:57:45.155197  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2085 13:57:45.158602  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2086 13:57:45.164863  MTRR: Fixed MSR 0x258 0x0606060606060606

 2087 13:57:45.168419  call enable_fixed_mtrr()

 2088 13:57:45.171669  MTRR: Fixed MSR 0x259 0x0000000000000000

 2089 13:57:45.175160  MTRR: Fixed MSR 0x268 0x0606060606060606

 2090 13:57:45.181696  MTRR: Fixed MSR 0x269 0x0606060606060606

 2091 13:57:45.185202  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2092 13:57:45.188539  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2093 13:57:45.191484  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2094 13:57:45.194652  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2095 13:57:45.201322  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2096 13:57:45.204805  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2097 13:57:45.207988  CPU physical address size: 39 bits

 2098 13:57:45.212141  call enable_fixed_mtrr()

 2099 13:57:45.215467  CPU physical address size: 39 bits

 2100 13:57:45.218621  CPU physical address size: 39 bits

 2101 13:57:45.225459  Checking segment from ROM address 0xffc02b54

 2102 13:57:45.228922  CPU physical address size: 39 bits

 2103 13:57:45.231766  CPU physical address size: 39 bits

 2104 13:57:45.235235  Loading segment from ROM address 0xffc02b38

 2105 13:57:45.238545    code (compression=0)

 2106 13:57:45.248661    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2107 13:57:45.254792  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2108 13:57:45.258449  it's not compressed!

 2109 13:57:45.397203  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2110 13:57:45.403778  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2111 13:57:45.410123  Loading segment from ROM address 0xffc02b54

 2112 13:57:45.413517    Entry Point 0x30000000

 2113 13:57:45.413598  Loaded segments

 2114 13:57:45.420274  BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms

 2115 13:57:45.463492  Finalizing chipset.

 2116 13:57:45.466685  Finalizing SMM.

 2117 13:57:45.466767  APMC done.

 2118 13:57:45.473093  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2119 13:57:45.476620  mp_park_aps done after 0 msecs.

 2120 13:57:45.479466  Jumping to boot code at 0x30000000(0x76b25000)

 2121 13:57:45.489625  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2122 13:57:45.489707  

 2123 13:57:45.489770  

 2124 13:57:45.492962  

 2125 13:57:45.493041  Starting depthcharge on Voema...

 2126 13:57:45.493386  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2127 13:57:45.493481  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2128 13:57:45.493563  Setting prompt string to ['volteer:']
 2129 13:57:45.493664  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2130 13:57:45.496256  

 2131 13:57:45.502696  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2132 13:57:45.502777  

 2133 13:57:45.509272  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2134 13:57:45.509352  

 2135 13:57:45.516014  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2136 13:57:45.516094  

 2137 13:57:45.519447  Failed to find eMMC card reader

 2138 13:57:45.519527  

 2139 13:57:45.519590  Wipe memory regions:

 2140 13:57:45.522437  

 2141 13:57:45.525765  	[0x00000000001000, 0x000000000a0000)

 2142 13:57:45.525846  

 2143 13:57:45.528960  	[0x00000000100000, 0x00000030000000)

 2144 13:57:45.554525  

 2145 13:57:45.558162  	[0x00000032662db0, 0x000000769ef000)

 2146 13:57:45.594135  

 2147 13:57:45.597493  	[0x00000100000000, 0x00000280400000)

 2148 13:57:45.801055  

 2149 13:57:45.804244  ec_init: CrosEC protocol v3 supported (256, 256)

 2150 13:57:46.235339  

 2151 13:57:46.235486  R8152: Initializing

 2152 13:57:46.235555  

 2153 13:57:46.238164  Version 6 (ocp_data = 5c30)

 2154 13:57:46.238244  

 2155 13:57:46.241514  R8152: Done initializing

 2156 13:57:46.241594  

 2157 13:57:46.244803  Adding net device

 2158 13:57:46.545959  

 2159 13:57:46.549667  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2160 13:57:46.549756  

 2161 13:57:46.549827  

 2162 13:57:46.549886  

 2163 13:57:46.552710  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2165 13:57:46.653066  volteer: tftpboot 192.168.201.1 13693415/tftp-deploy-nctvp8j4/kernel/bzImage 13693415/tftp-deploy-nctvp8j4/kernel/cmdline 13693415/tftp-deploy-nctvp8j4/ramdisk/ramdisk.cpio.gz

 2166 13:57:46.653204  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2167 13:57:46.653289  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2168 13:57:46.657893  tftpboot 192.168.201.1 13693415/tftp-deploy-nctvp8j4/kernel/bzIploy-nctvp8j4/kernel/cmdline 13693415/tftp-deploy-nctvp8j4/ramdisk/ramdisk.cpio.gz

 2169 13:57:46.657977  

 2170 13:57:46.658050  Waiting for link

 2171 13:57:46.862026  

 2172 13:57:46.862178  done.

 2173 13:57:46.862250  

 2174 13:57:46.862313  MAC: 00:24:32:30:77:76

 2175 13:57:46.862374  

 2176 13:57:46.864885  Sending DHCP discover... done.

 2177 13:57:46.864979  

 2178 13:57:46.868320  Waiting for reply... done.

 2179 13:57:46.868447  

 2180 13:57:46.872481  Sending DHCP request... done.

 2181 13:57:46.872581  

 2182 13:57:46.877918  Waiting for reply... done.

 2183 13:57:46.878028  

 2184 13:57:46.878113  My ip is 192.168.201.16

 2185 13:57:46.878193  

 2186 13:57:46.881713  The DHCP server ip is 192.168.201.1

 2187 13:57:46.881856  

 2188 13:57:46.888325  TFTP server IP predefined by user: 192.168.201.1

 2189 13:57:46.888502  

 2190 13:57:46.894699  Bootfile predefined by user: 13693415/tftp-deploy-nctvp8j4/kernel/bzImage

 2191 13:57:46.894870  

 2192 13:57:46.898228  Sending tftp read request... done.

 2193 13:57:46.898455  

 2194 13:57:46.904483  Waiting for the transfer... 

 2195 13:57:46.904719  

 2196 13:57:47.476150  00000000 ################################################################

 2197 13:57:47.476297  

 2198 13:57:48.006146  00080000 ################################################################

 2199 13:57:48.006294  

 2200 13:57:48.556378  00100000 ################################################################

 2201 13:57:48.556538  

 2202 13:57:49.130554  00180000 ################################################################

 2203 13:57:49.130699  

 2204 13:57:49.735762  00200000 ################################################################

 2205 13:57:49.735904  

 2206 13:57:50.317788  00280000 ################################################################

 2207 13:57:50.317941  

 2208 13:57:50.847846  00300000 ################################################################

 2209 13:57:50.848000  

 2210 13:57:51.430688  00380000 ################################################################

 2211 13:57:51.430836  

 2212 13:57:51.987247  00400000 ################################################################

 2213 13:57:51.987397  

 2214 13:57:52.570843  00480000 ################################################################

 2215 13:57:52.570987  

 2216 13:57:53.155014  00500000 ################################################################

 2217 13:57:53.155160  

 2218 13:57:53.669609  00580000 ################################################################

 2219 13:57:53.669770  

 2220 13:57:54.198850  00600000 ################################################################

 2221 13:57:54.199005  

 2222 13:57:54.776252  00680000 ################################################################

 2223 13:57:54.776465  

 2224 13:57:55.350287  00700000 ################################################################

 2225 13:57:55.350799  

 2226 13:57:55.949265  00780000 ################################################################

 2227 13:57:55.949415  

 2228 13:57:56.535042  00800000 ################################################################

 2229 13:57:56.535197  

 2230 13:57:57.123617  00880000 ################################################################

 2231 13:57:57.123761  

 2232 13:57:57.750529  00900000 ################################################################

 2233 13:57:57.750669  

 2234 13:57:58.310235  00980000 ################################################################

 2235 13:57:58.310389  

 2236 13:57:58.910449  00a00000 ################################################################

 2237 13:57:58.910580  

 2238 13:57:59.493594  00a80000 ################################################################

 2239 13:57:59.493732  

 2240 13:58:00.061286  00b00000 ################################################################

 2241 13:58:00.061428  

 2242 13:58:00.652390  00b80000 ################################################################

 2243 13:58:00.652699  

 2244 13:58:01.300483  00c00000 ################################################################

 2245 13:58:01.300626  

 2246 13:58:01.895219  00c80000 ################################################################

 2247 13:58:01.895376  

 2248 13:58:02.449294  00d00000 ############################################################ done.

 2249 13:58:02.449432  

 2250 13:58:02.452501  The bootfile was 14122896 bytes long.

 2251 13:58:02.452587  

 2252 13:58:02.456064  Sending tftp read request... done.

 2253 13:58:02.456146  

 2254 13:58:02.459399  Waiting for the transfer... 

 2255 13:58:02.459508  

 2256 13:58:03.032095  00000000 ################################################################

 2257 13:58:03.032258  

 2258 13:58:03.605172  00080000 ################################################################

 2259 13:58:03.605309  

 2260 13:58:04.179059  00100000 ################################################################

 2261 13:58:04.179198  

 2262 13:58:04.712961  00180000 ################################################################

 2263 13:58:04.713106  

 2264 13:58:05.290678  00200000 ################################################################

 2265 13:58:05.290820  

 2266 13:58:05.870438  00280000 ################################################################

 2267 13:58:05.870586  

 2268 13:58:06.436529  00300000 ################################################################

 2269 13:58:06.436669  

 2270 13:58:06.972778  00380000 ################################################################

 2271 13:58:06.972917  

 2272 13:58:07.557895  00400000 ################################################################

 2273 13:58:07.558054  

 2274 13:58:08.112637  00480000 ################################################################

 2275 13:58:08.112777  

 2276 13:58:08.684483  00500000 ################################################################

 2277 13:58:08.684628  

 2278 13:58:09.249205  00580000 ################################################################

 2279 13:58:09.249341  

 2280 13:58:09.819100  00600000 ################################################################

 2281 13:58:09.819264  

 2282 13:58:10.131587  00680000 ################################### done.

 2283 13:58:10.131742  

 2284 13:58:10.134880  Sending tftp read request... done.

 2285 13:58:10.134960  

 2286 13:58:10.138347  Waiting for the transfer... 

 2287 13:58:10.138431  

 2288 13:58:10.141603  00000000 # done.

 2289 13:58:10.141686  

 2290 13:58:10.151442  Command line loaded dynamically from TFTP file: 13693415/tftp-deploy-nctvp8j4/kernel/cmdline

 2291 13:58:10.151524  

 2292 13:58:10.174474  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13693415/extract-nfsrootfs-4n9x6ix0,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2293 13:58:10.182030  

 2294 13:58:10.184697  Shutting down all USB controllers.

 2295 13:58:10.184777  

 2296 13:58:10.184842  Removing current net device

 2297 13:58:10.184919  

 2298 13:58:10.188310  Finalizing coreboot

 2299 13:58:10.188440  

 2300 13:58:10.195200  Exiting depthcharge with code 4 at timestamp: 33367068

 2301 13:58:10.195281  

 2302 13:58:10.195344  

 2303 13:58:10.195402  Starting kernel ...

 2304 13:58:10.195458  

 2305 13:58:10.195512  

 2306 13:58:10.195890  end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
 2307 13:58:10.195984  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2308 13:58:10.196061  Setting prompt string to ['Linux version [0-9]']
 2309 13:58:10.196127  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2310 13:58:10.196214  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2312 14:02:32.197876  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2314 14:02:32.199530  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2316 14:02:32.200894  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2319 14:02:32.202970  end: 2 depthcharge-action (duration 00:05:00) [common]
 2321 14:02:32.204262  Cleaning after the job
 2322 14:02:32.204745  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/ramdisk
 2323 14:02:32.209511  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/kernel
 2324 14:02:32.218025  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/nfsrootfs
 2325 14:02:32.317470  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13693415/tftp-deploy-nctvp8j4/modules
 2326 14:02:32.318080  start: 4.1 power-off (timeout 00:00:30) [common]
 2327 14:02:32.318269  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6' '--port=1' '--command=off'
 2328 14:02:33.091098  >> Command sent successfully.

 2329 14:02:33.093495  Returned 0 in 0 seconds
 2330 14:02:33.193882  end: 4.1 power-off (duration 00:00:01) [common]
 2332 14:02:33.194183  start: 4.2 read-feedback (timeout 00:09:59) [common]
 2333 14:02:33.194448  Listened to connection for namespace 'common' for up to 1s
 2335 14:02:33.194854  Listened to connection for namespace 'common' for up to 1s
 2336 14:02:34.195376  Finalising connection for namespace 'common'
 2337 14:02:34.195539  Disconnecting from shell: Finalise
 2338 14:02:34.195622  
 2339 14:02:34.295922  end: 4.2 read-feedback (duration 00:00:01) [common]
 2340 14:02:34.296060  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13693415
 2341 14:02:34.716092  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13693415
 2342 14:02:34.716310  JobError: Your job cannot terminate cleanly.