Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 09:44:32.096532 lava-dispatcher, installed at version: 2024.03
2 09:44:32.096752 start: 0 validate
3 09:44:32.096867 Start time: 2024-06-17 09:44:32.096861+00:00 (UTC)
4 09:44:32.096998 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:44:32.097188 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 09:44:32.100314 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:44:32.100439 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2561-g409c5ed72dea9%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:44:36.104549 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:44:36.104738 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2561-g409c5ed72dea9%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 09:44:37.107097 validate duration: 5.01
12 09:44:37.107438 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:44:37.107584 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:44:37.107706 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:44:37.107927 Not decompressing ramdisk as can be used compressed.
16 09:44:37.108076 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 09:44:37.108157 saving as /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/ramdisk/rootfs.cpio.gz
18 09:44:37.108283 total size: 8417901 (8 MB)
19 09:44:37.109952 progress 0 % (0 MB)
20 09:44:37.112427 progress 5 % (0 MB)
21 09:44:37.114787 progress 10 % (0 MB)
22 09:44:37.117184 progress 15 % (1 MB)
23 09:44:37.119521 progress 20 % (1 MB)
24 09:44:37.121803 progress 25 % (2 MB)
25 09:44:37.124053 progress 30 % (2 MB)
26 09:44:37.126107 progress 35 % (2 MB)
27 09:44:37.128462 progress 40 % (3 MB)
28 09:44:37.130725 progress 45 % (3 MB)
29 09:44:37.132918 progress 50 % (4 MB)
30 09:44:37.135223 progress 55 % (4 MB)
31 09:44:37.137436 progress 60 % (4 MB)
32 09:44:37.139485 progress 65 % (5 MB)
33 09:44:37.141671 progress 70 % (5 MB)
34 09:44:37.143826 progress 75 % (6 MB)
35 09:44:37.146011 progress 80 % (6 MB)
36 09:44:37.148130 progress 85 % (6 MB)
37 09:44:37.150337 progress 90 % (7 MB)
38 09:44:37.152454 progress 95 % (7 MB)
39 09:44:37.154601 progress 100 % (8 MB)
40 09:44:37.154826 8 MB downloaded in 0.05 s (172.51 MB/s)
41 09:44:37.155017 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:44:37.155247 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:44:37.155326 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:44:37.155401 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:44:37.155518 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2561-g409c5ed72dea9/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 09:44:37.155616 saving as /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/kernel/bzImage
48 09:44:37.155669 total size: 14155664 (13 MB)
49 09:44:37.155723 No compression specified
50 09:44:37.156850 progress 0 % (0 MB)
51 09:44:37.160627 progress 5 % (0 MB)
52 09:44:37.165341 progress 10 % (1 MB)
53 09:44:37.168915 progress 15 % (2 MB)
54 09:44:37.172684 progress 20 % (2 MB)
55 09:44:37.176228 progress 25 % (3 MB)
56 09:44:37.179882 progress 30 % (4 MB)
57 09:44:37.183616 progress 35 % (4 MB)
58 09:44:37.187443 progress 40 % (5 MB)
59 09:44:37.191274 progress 45 % (6 MB)
60 09:44:37.195146 progress 50 % (6 MB)
61 09:44:37.198977 progress 55 % (7 MB)
62 09:44:37.202772 progress 60 % (8 MB)
63 09:44:37.206278 progress 65 % (8 MB)
64 09:44:37.209933 progress 70 % (9 MB)
65 09:44:37.213441 progress 75 % (10 MB)
66 09:44:37.217049 progress 80 % (10 MB)
67 09:44:37.220675 progress 85 % (11 MB)
68 09:44:37.224166 progress 90 % (12 MB)
69 09:44:37.227790 progress 95 % (12 MB)
70 09:44:37.231208 progress 100 % (13 MB)
71 09:44:37.231457 13 MB downloaded in 0.08 s (178.13 MB/s)
72 09:44:37.231605 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:44:37.231809 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:44:37.231889 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:44:37.231963 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:44:37.232087 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2561-g409c5ed72dea9/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 09:44:37.232147 saving as /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/modules/modules.tar
79 09:44:37.232200 total size: 714764 (0 MB)
80 09:44:37.232254 Using unxz to decompress xz
81 09:44:37.233665 progress 4 % (0 MB)
82 09:44:37.233981 progress 9 % (0 MB)
83 09:44:37.235961 progress 18 % (0 MB)
84 09:44:37.239755 progress 27 % (0 MB)
85 09:44:37.241625 progress 32 % (0 MB)
86 09:44:37.245285 progress 41 % (0 MB)
87 09:44:37.248524 progress 50 % (0 MB)
88 09:44:37.250453 progress 55 % (0 MB)
89 09:44:37.254161 progress 64 % (0 MB)
90 09:44:37.257724 progress 73 % (0 MB)
91 09:44:37.261101 progress 82 % (0 MB)
92 09:44:37.262865 progress 87 % (0 MB)
93 09:44:37.266633 progress 96 % (0 MB)
94 09:44:37.274091 0 MB downloaded in 0.04 s (16.27 MB/s)
95 09:44:37.274242 end: 1.3.1 http-download (duration 00:00:00) [common]
97 09:44:37.274492 end: 1.3 download-retry (duration 00:00:00) [common]
98 09:44:37.274570 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
99 09:44:37.274672 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
100 09:44:37.274755 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
101 09:44:37.274827 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
102 09:44:37.275023 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf
103 09:44:37.275152 makedir: /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin
104 09:44:37.275271 makedir: /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/tests
105 09:44:37.275370 makedir: /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/results
106 09:44:37.275454 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-add-keys
107 09:44:37.275612 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-add-sources
108 09:44:37.275724 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-background-process-start
109 09:44:37.275850 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-background-process-stop
110 09:44:37.275985 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-common-functions
111 09:44:37.276096 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-echo-ipv4
112 09:44:37.276206 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-install-packages
113 09:44:37.276356 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-installed-packages
114 09:44:37.276508 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-os-build
115 09:44:37.276616 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-probe-channel
116 09:44:37.276739 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-probe-ip
117 09:44:37.276862 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-target-ip
118 09:44:37.276969 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-target-mac
119 09:44:37.277116 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-target-storage
120 09:44:37.277226 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-case
121 09:44:37.277362 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-event
122 09:44:37.277469 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-feedback
123 09:44:37.277591 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-raise
124 09:44:37.277717 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-reference
125 09:44:37.277839 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-runner
126 09:44:37.277963 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-set
127 09:44:37.278070 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-test-shell
128 09:44:37.278207 Updating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-install-packages (oe)
129 09:44:37.278345 Updating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/bin/lava-installed-packages (oe)
130 09:44:37.278481 Creating /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/environment
131 09:44:37.278565 LAVA metadata
132 09:44:37.278646 - LAVA_JOB_ID=14392697
133 09:44:37.278716 - LAVA_DISPATCHER_IP=192.168.201.1
134 09:44:37.278804 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
135 09:44:37.278859 skipped lava-vland-overlay
136 09:44:37.278939 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
137 09:44:37.279022 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
138 09:44:37.279077 skipped lava-multinode-overlay
139 09:44:37.279141 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
140 09:44:37.279261 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
141 09:44:37.279324 Loading test definitions
142 09:44:37.279398 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
143 09:44:37.279516 Using /lava-14392697 at stage 0
144 09:44:37.279838 uuid=14392697_1.4.2.3.1 testdef=None
145 09:44:37.279933 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
146 09:44:37.280024 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
147 09:44:37.280552 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
149 09:44:37.280773 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
150 09:44:37.281479 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
152 09:44:37.281744 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
153 09:44:37.282392 runner path: /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/0/tests/0_dmesg test_uuid 14392697_1.4.2.3.1
154 09:44:37.282549 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
156 09:44:37.282766 Creating lava-test-runner.conf files
157 09:44:37.282824 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14392697/lava-overlay-oej3zssf/lava-14392697/0 for stage 0
158 09:44:37.282942 - 0_dmesg
159 09:44:37.283034 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
160 09:44:37.283110 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
161 09:44:37.289756 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
162 09:44:37.289878 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
163 09:44:37.289989 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
164 09:44:37.290099 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
165 09:44:37.290205 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
166 09:44:37.549459 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
167 09:44:37.549629 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
168 09:44:37.549726 extracting modules file /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14392697/extract-overlay-ramdisk-13hpovi4/ramdisk
169 09:44:37.572737 end: 1.4.4 extract-modules (duration 00:00:00) [common]
170 09:44:37.572868 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
171 09:44:37.572952 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14392697/compress-overlay-git_f_vy/overlay-1.4.2.4.tar.gz to ramdisk
172 09:44:37.573022 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14392697/compress-overlay-git_f_vy/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14392697/extract-overlay-ramdisk-13hpovi4/ramdisk
173 09:44:37.579830 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
174 09:44:37.579939 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
175 09:44:37.580023 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
176 09:44:37.580102 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
177 09:44:37.580174 Building ramdisk /var/lib/lava/dispatcher/tmp/14392697/extract-overlay-ramdisk-13hpovi4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14392697/extract-overlay-ramdisk-13hpovi4/ramdisk
178 09:44:37.710636 >> 53732 blocks
179 09:44:38.697953 rename /var/lib/lava/dispatcher/tmp/14392697/extract-overlay-ramdisk-13hpovi4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/ramdisk/ramdisk.cpio.gz
180 09:44:38.698122 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
181 09:44:38.698213 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
182 09:44:38.698296 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
183 09:44:38.698366 No mkimage arch provided, not using FIT.
184 09:44:38.698440 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
185 09:44:38.698512 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
186 09:44:38.698588 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
187 09:44:38.698662 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
188 09:44:38.698724 No LXC device requested
189 09:44:38.698798 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
190 09:44:38.698871 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
191 09:44:38.698954 end: 1.6 deploy-device-env (duration 00:00:00) [common]
192 09:44:38.699018 Checking files for TFTP limit of 4294967296 bytes.
193 09:44:38.699327 end: 1 tftp-deploy (duration 00:00:02) [common]
194 09:44:38.699453 start: 2 depthcharge-action (timeout 00:05:00) [common]
195 09:44:38.699579 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
196 09:44:38.699716 substitutions:
197 09:44:38.699808 - {DTB}: None
198 09:44:38.699892 - {INITRD}: 14392697/tftp-deploy-ddklckz4/ramdisk/ramdisk.cpio.gz
199 09:44:38.699974 - {KERNEL}: 14392697/tftp-deploy-ddklckz4/kernel/bzImage
200 09:44:38.700054 - {LAVA_MAC}: None
201 09:44:38.700134 - {PRESEED_CONFIG}: None
202 09:44:38.700214 - {PRESEED_LOCAL}: None
203 09:44:38.700293 - {RAMDISK}: 14392697/tftp-deploy-ddklckz4/ramdisk/ramdisk.cpio.gz
204 09:44:38.700382 - {ROOT_PART}: None
205 09:44:38.700458 - {ROOT}: None
206 09:44:38.700512 - {SERVER_IP}: 192.168.201.1
207 09:44:38.700563 - {TEE}: None
208 09:44:38.700641 Parsed boot commands:
209 09:44:38.700719 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
210 09:44:38.700903 Parsed boot commands: tftpboot 192.168.201.1 14392697/tftp-deploy-ddklckz4/kernel/bzImage 14392697/tftp-deploy-ddklckz4/kernel/cmdline 14392697/tftp-deploy-ddklckz4/ramdisk/ramdisk.cpio.gz
211 09:44:38.701021 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
212 09:44:38.701102 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
213 09:44:38.701178 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
214 09:44:38.701252 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
215 09:44:38.701309 Not connected, no need to disconnect.
216 09:44:38.701375 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
217 09:44:38.701446 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
218 09:44:38.701507 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-4'
219 09:44:38.704871 Setting prompt string to ['lava-test: # ']
220 09:44:38.705198 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
221 09:44:38.705300 end: 2.2.1 reset-connection (duration 00:00:00) [common]
222 09:44:38.705394 start: 2.2.2 reset-device (timeout 00:05:00) [common]
223 09:44:38.705478 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
224 09:44:38.705646 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-4']
225 09:44:52.243813 Returned 0 in 13 seconds
226 09:44:52.344611 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
228 09:44:52.345795 end: 2.2.2 reset-device (duration 00:00:14) [common]
229 09:44:52.346141 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
230 09:44:52.346448 Setting prompt string to 'Starting depthcharge on Volmar...'
231 09:44:52.346678 Changing prompt to 'Starting depthcharge on Volmar...'
232 09:44:52.347013 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
233 09:44:52.348582 [Enter `^Ec?' for help]
234 09:44:52.349167
235 09:44:52.349661
236 09:44:52.350087 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
237 09:44:52.350499 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
238 09:44:52.350968 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
239 09:44:52.351387 CPU: AES supported, TXT NOT supported, VT supported
240 09:44:52.351952 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
241 09:44:52.352461 Cache size = 10 MiB
242 09:44:52.352898 MCH: device id 4609 (rev 04) is Alderlake-P
243 09:44:52.353354 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
244 09:44:52.353801 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
245 09:44:52.354127 VBOOT: Loading verstage.
246 09:44:52.354521 FMAP: Found "FLASH" version 1.1 at 0x1804000.
247 09:44:52.354941 FMAP: base = 0x0 size = 0x2000000 #areas = 37
248 09:44:52.355359 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
249 09:44:52.355798 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
250 09:44:52.356208 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
251 09:44:52.356529
252 09:44:52.356971
253 09:44:52.357354 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
254 09:44:52.357627 Probing TPM I2C: I2C bus 1 version 0x3230302a
255 09:44:52.357886 DW I2C bus 1 at 0xfe022000 (400 KHz)
256 09:44:52.358156 I2C TX abort detected (00000001)
257 09:44:52.358417 cr50_i2c_read: Address write failed
258 09:44:52.358715 .done! DID_VID 0x00281ae0
259 09:44:52.359014 TPM ready after 0 ms
260 09:44:52.359291 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
261 09:44:52.359562 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
262 09:44:52.359866 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 09:44:52.360149 tlcl_send_startup: Startup return code is 0
264 09:44:52.360409 TPM: setup succeeded
265 09:44:52.360669 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
266 09:44:52.360928 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 09:44:52.361231 Chrome EC: UHEPI supported
268 09:44:52.361488 Reading cr50 boot mode
269 09:44:52.361747 Cr50 says boot_mode is VERIFIED_RW(0x00).
270 09:44:52.362002 Phase 1
271 09:44:52.362260 FMAP: area GBB found @ 1805000 (458752 bytes)
272 09:44:52.362517 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
273 09:44:52.362775 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
274 09:44:52.363031 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
275 09:44:52.363285 VB2:vb2_check_recovery() Recovery was requested manually
276 09:44:52.363537 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
277 09:44:52.363790 Recovery requested (1009000e)
278 09:44:52.364048 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
279 09:44:52.364306 tlcl_extend: response is 0
280 09:44:52.364559 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
281 09:44:52.364814 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
282 09:44:52.365118 tlcl_extend: response is 0
283 09:44:52.365526 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
284 09:44:52.365891 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 09:44:52.366339 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
286 09:44:52.366627 BS: verstage times (exec / console): total (unknown) / 156 ms
287 09:44:52.366886
288 09:44:52.367139
289 09:44:52.367389 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
290 09:44:52.367646 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 09:44:52.367901 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 09:44:52.368159 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
293 09:44:52.368414 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 09:44:52.368668 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
295 09:44:52.368920 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
296 09:44:52.369208 TCO_STS: 0000 0000
297 09:44:52.369471 GEN_PMCON: d0015038 00002200
298 09:44:52.369725 GBLRST_CAUSE: 00000000 00000000
299 09:44:52.370012 HPR_CAUSE0: 00000000
300 09:44:52.370267 prev_sleep_state 5
301 09:44:52.370520 Abort disabling TXT, as CPU is not TXT capable.
302 09:44:52.370778 cse_lite: Skip switching to RW in the recovery path
303 09:44:52.371033 Boot Count incremented to 11341
304 09:44:52.371286 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
305 09:44:52.371547 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
306 09:44:52.371810 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
307 09:44:52.372172 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
308 09:44:52.372561 Chrome EC: UHEPI supported
309 09:44:52.372948 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
310 09:44:52.373378 Probing TPM I2C: done! DID_VID 0x00281ae0
311 09:44:52.373783 Locality already claimed
312 09:44:52.374178 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
313 09:44:52.374563 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
314 09:44:52.374977 MRC: Hash idx 0x100b comparison successful.
315 09:44:52.375330 MRC cache found, size f6c8
316 09:44:52.375605 bootmode is set to: 2
317 09:44:52.375871 EC returned error result code 3
318 09:44:52.376132 FW_CONFIG value from CBI is 0x131
319 09:44:52.376393 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
320 09:44:52.376654 SPD index = 0
321 09:44:52.376880 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
322 09:44:52.377089 SPD: module type is LPDDR4X
323 09:44:52.377278 SPD: module part number is K4U6E3S4AB-MGCL
324 09:44:52.377459 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 09:44:52.377959 SPD: device width 16 bits, bus width 16 bits
326 09:44:52.378290 SPD: module size is 1024 MB (per channel)
327 09:44:52.378530 CBMEM:
328 09:44:52.378720 IMD: root @ 0x76fff000 254 entries.
329 09:44:52.379018 IMD: root @ 0x76ffec00 62 entries.
330 09:44:52.379301 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 09:44:52.379613 RO_VPD is uninitialized or empty.
332 09:44:52.379976 FMAP: area RW_VPD found @ f29000 (8192 bytes)
333 09:44:52.380351 External stage cache:
334 09:44:52.380688 IMD: root @ 0x7bbff000 254 entries.
335 09:44:52.380977 IMD: root @ 0x7bbfec00 62 entries.
336 09:44:52.381305 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
337 09:44:52.381600 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
338 09:44:52.381870 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
339 09:44:52.382086 MRC: 'RECOVERY_MRC_CACHE' does not need update.
340 09:44:52.382296 8 DIMMs found
341 09:44:52.382518 SMM Memory Map
342 09:44:52.382729 SMRAM : 0x7b800000 0x800000
343 09:44:52.382941 Subregion 0: 0x7b800000 0x200000
344 09:44:52.383152 Subregion 1: 0x7ba00000 0x200000
345 09:44:52.383364 Subregion 2: 0x7bc00000 0x400000
346 09:44:52.383575 top_of_ram = 0x77000000
347 09:44:52.383789 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 09:44:52.384003 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
349 09:44:52.384216 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 09:44:52.384428 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 09:44:52.384636 Normal boot
352 09:44:52.384852 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
353 09:44:52.385076 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
354 09:44:52.385224 Processing 237 relocs. Offset value of 0x74aba000
355 09:44:52.385363 BS: romstage times (exec / console): total (unknown) / 280 ms
356 09:44:52.385501
357 09:44:52.385651
358 09:44:52.385869 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
359 09:44:52.386097 Normal boot
360 09:44:52.386316 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
361 09:44:52.386533 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
362 09:44:52.386769 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
363 09:44:52.386888 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
364 09:44:52.387001 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
365 09:44:52.387116 Processing 5931 relocs. Offset value of 0x72a30000
366 09:44:52.387226 BS: postcar times (exec / console): total (unknown) / 51 ms
367 09:44:52.387337
368 09:44:52.387444
369 09:44:52.387551 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
370 09:44:52.387663 Reserving BERT start 76a1f000, size 10000
371 09:44:52.387771 Normal boot
372 09:44:52.387882 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
373 09:44:52.387993 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
374 09:44:52.388105 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
375 09:44:52.388215 FMAP: area RW_VPD found @ f29000 (8192 bytes)
376 09:44:52.388325 Google Chrome EC: version:
377 09:44:52.388432 ro: volmar_v2.0.14126-e605144e9c
378 09:44:52.388540 rw: volmar_v0.0.55-22d1557
379 09:44:52.388649 running image: 1
380 09:44:52.388758 ACPI _SWS is PM1 Index 8 GPE Index -1
381 09:44:52.388890 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
382 09:44:52.389069 EC returned error result code 3
383 09:44:52.389185 FW_CONFIG value from CBI is 0x131
384 09:44:52.389297 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
385 09:44:52.389407 PCI: 00:1c.2 disabled by fw_config
386 09:44:52.389515 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
387 09:44:52.389623 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
388 09:44:52.389732 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
389 09:44:52.389841 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
390 09:44:52.389950 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 09:44:52.390060 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
392 09:44:52.390170 microcode: sig=0x906a4 pf=0x80 revision=0x423
393 09:44:52.390278 microcode: Update skipped, already up-to-date
394 09:44:52.390385 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
395 09:44:52.390494 Detected 6 core, 8 thread CPU.
396 09:44:52.390602 Setting up SMI for CPU
397 09:44:52.390711 IED base = 0x7bc00000
398 09:44:52.390820 IED size = 0x00400000
399 09:44:52.390927 Will perform SMM setup.
400 09:44:52.391036 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
401 09:44:52.391145 LAPIC 0x0 in XAPIC mode.
402 09:44:52.391255 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
403 09:44:52.391365 Processing 18 relocs. Offset value of 0x00030000
404 09:44:52.391474 Attempting to start 7 APs
405 09:44:52.391582 Waiting for 10ms after sending INIT.
406 09:44:52.391693 Waiting for SIPI to complete...
407 09:44:52.391801 done.
408 09:44:52.391891 LAPIC 0x10 in XAPIC mode.
409 09:44:52.391983 LAPIC 0x12 in XAPIC mode.
410 09:44:52.392073 LAPIC 0x16 in XAPIC mode.
411 09:44:52.392164 AP: slot 4 apic_id 10, MCU rev: 0x00000423
412 09:44:52.392255 LAPIC 0x14 in XAPIC mode.
413 09:44:52.392346 LAPIC 0x9 in XAPIC mode.
414 09:44:52.392437 AP: slot 2 apic_id 14, MCU rev: 0x00000423
415 09:44:52.392527 AP: slot 1 apic_id 12, MCU rev: 0x00000423
416 09:44:52.392618 AP: slot 3 apic_id 16, MCU rev: 0x00000423
417 09:44:52.392710 AP: slot 7 apic_id 9, MCU rev: 0x00000423
418 09:44:52.392810 LAPIC 0x8 in XAPIC mode.
419 09:44:52.392958 LAPIC 0x1 in XAPIC mode.
420 09:44:52.393088 Waiting for SIPI to complete...
421 09:44:52.393184 done.
422 09:44:52.393493 AP: slot 5 apic_id 1, MCU rev: 0x00000423
423 09:44:52.393601 AP: slot 6 apic_id 8, MCU rev: 0x00000423
424 09:44:52.393696 smm_setup_relocation_handler: enter
425 09:44:52.393790 smm_setup_relocation_handler: exit
426 09:44:52.393884 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
427 09:44:52.393979 Processing 11 relocs. Offset value of 0x00038000
428 09:44:52.394072 smm_module_setup_stub: stack_top = 0x7b804000
429 09:44:52.394165 smm_module_setup_stub: per cpu stack_size = 0x800
430 09:44:52.394257 smm_module_setup_stub: runtime.start32_offset = 0x4c
431 09:44:52.394349 smm_module_setup_stub: runtime.smm_size = 0x10000
432 09:44:52.394441 SMM Module: stub loaded at 38000. Will call 0x76a53094
433 09:44:52.394533 Installing permanent SMM handler to 0x7b800000
434 09:44:52.394625 smm_load_module: total_smm_space_needed e468, available -> 200000
435 09:44:52.394717 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
436 09:44:52.394809 Processing 255 relocs. Offset value of 0x7b9f6000
437 09:44:52.394901 smm_load_module: smram_start: 0x7b800000
438 09:44:52.394994 smm_load_module: smram_end: 7ba00000
439 09:44:52.395086 smm_load_module: handler start 0x7b9f6d5f
440 09:44:52.395177 smm_load_module: handler_size 98d0
441 09:44:52.395268 smm_load_module: fxsave_area 0x7b9ff000
442 09:44:52.395360 smm_load_module: fxsave_size 1000
443 09:44:52.395452 smm_load_module: CONFIG_MSEG_SIZE 0x0
444 09:44:52.395544 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
445 09:44:52.395635 smm_load_module: handler_mod_params.smbase = 0x7b800000
446 09:44:52.395727 smm_load_module: per_cpu_save_state_size = 0x400
447 09:44:52.395819 smm_load_module: num_cpus = 0x8
448 09:44:52.395910 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
449 09:44:52.396001 smm_load_module: total_save_state_size = 0x2000
450 09:44:52.396092 smm_load_module: cpu0 entry: 7b9e6000
451 09:44:52.396184 smm_create_map: cpus allowed in one segment 30
452 09:44:52.396275 smm_create_map: min # of segments needed 1
453 09:44:52.396367 CPU 0x0
454 09:44:52.396458 smbase 7b9e6000 entry 7b9ee000
455 09:44:52.396550 ss_start 7b9f5c00 code_end 7b9ee208
456 09:44:52.396642 CPU 0x1
457 09:44:52.396748 smbase 7b9e5c00 entry 7b9edc00
458 09:44:52.396828 ss_start 7b9f5800 code_end 7b9ede08
459 09:44:52.396907 CPU 0x2
460 09:44:52.396987 smbase 7b9e5800 entry 7b9ed800
461 09:44:52.397082 ss_start 7b9f5400 code_end 7b9eda08
462 09:44:52.397162 CPU 0x3
463 09:44:52.397241 smbase 7b9e5400 entry 7b9ed400
464 09:44:52.397320 ss_start 7b9f5000 code_end 7b9ed608
465 09:44:52.397399 CPU 0x4
466 09:44:52.397477 smbase 7b9e5000 entry 7b9ed000
467 09:44:52.397555 ss_start 7b9f4c00 code_end 7b9ed208
468 09:44:52.397634 CPU 0x5
469 09:44:52.397712 smbase 7b9e4c00 entry 7b9ecc00
470 09:44:52.397791 ss_start 7b9f4800 code_end 7b9ece08
471 09:44:52.397870 CPU 0x6
472 09:44:52.397947 smbase 7b9e4800 entry 7b9ec800
473 09:44:52.398025 ss_start 7b9f4400 code_end 7b9eca08
474 09:44:52.398104 CPU 0x7
475 09:44:52.398182 smbase 7b9e4400 entry 7b9ec400
476 09:44:52.398261 ss_start 7b9f4000 code_end 7b9ec608
477 09:44:52.398341 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
478 09:44:52.398420 Processing 11 relocs. Offset value of 0x7b9ee000
479 09:44:52.398500 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
480 09:44:52.398579 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
481 09:44:52.398659 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
482 09:44:52.398738 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
483 09:44:52.398816 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
484 09:44:52.398895 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
485 09:44:52.398974 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
486 09:44:52.399054 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
487 09:44:52.399133 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
488 09:44:52.399212 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
489 09:44:52.399291 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
490 09:44:52.399368 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
491 09:44:52.399446 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
492 09:44:52.399525 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
493 09:44:52.399605 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
494 09:44:52.399684 smm_module_setup_stub: stack_top = 0x7b804000
495 09:44:52.399762 smm_module_setup_stub: per cpu stack_size = 0x800
496 09:44:52.399840 smm_module_setup_stub: runtime.start32_offset = 0x4c
497 09:44:52.399919 smm_module_setup_stub: runtime.smm_size = 0x200000
498 09:44:52.399997 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
499 09:44:52.400075 Clearing SMI status registers
500 09:44:52.400153 SMI_STS: PM1
501 09:44:52.400231 PM1_STS: PWRBTN
502 09:44:52.400310 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
503 09:44:52.400390 In relocation handler: CPU 0
504 09:44:52.400470 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
505 09:44:52.400551 Writing SMRR. base = 0x7b800006, mask=0xff800c00
506 09:44:52.400630 Relocation complete.
507 09:44:52.400709 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
508 09:44:52.400788 In relocation handler: CPU 5
509 09:44:52.400865 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
510 09:44:52.400946 Relocation complete.
511 09:44:52.401277 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
512 09:44:52.401368 In relocation handler: CPU 4
513 09:44:52.401449 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
514 09:44:52.401529 Writing SMRR. base = 0x7b800006, mask=0xff800c00
515 09:44:52.401607 Relocation complete.
516 09:44:52.401686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
517 09:44:52.401773 In relocation handler: CPU 2
518 09:44:52.401843 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
519 09:44:52.401912 Writing SMRR. base = 0x7b800006, mask=0xff800c00
520 09:44:52.401980 Relocation complete.
521 09:44:52.402049 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
522 09:44:52.402117 In relocation handler: CPU 1
523 09:44:52.402185 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
524 09:44:52.402255 Writing SMRR. base = 0x7b800006, mask=0xff800c00
525 09:44:52.402324 Relocation complete.
526 09:44:52.402392 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
527 09:44:52.402461 In relocation handler: CPU 3
528 09:44:52.402529 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
529 09:44:52.402599 Writing SMRR. base = 0x7b800006, mask=0xff800c00
530 09:44:52.402666 Relocation complete.
531 09:44:52.402734 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
532 09:44:52.402802 In relocation handler: CPU 6
533 09:44:52.402870 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
534 09:44:52.402939 Writing SMRR. base = 0x7b800006, mask=0xff800c00
535 09:44:52.403008 Relocation complete.
536 09:44:52.403077 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
537 09:44:52.403146 In relocation handler: CPU 7
538 09:44:52.403215 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
539 09:44:52.403283 Relocation complete.
540 09:44:52.403350 Initializing CPU #0
541 09:44:52.403419 CPU: vendor Intel device 906a4
542 09:44:52.403488 CPU: family 06, model 9a, stepping 04
543 09:44:52.403557 Clearing out pending MCEs
544 09:44:52.403625 cpu: energy policy set to 7
545 09:44:52.403693 Turbo is available but hidden
546 09:44:52.403761 Turbo is available and visible
547 09:44:52.403830 microcode: Update skipped, already up-to-date
548 09:44:52.403898 CPU #0 initialized
549 09:44:52.403966 Initializing CPU #5
550 09:44:52.404034 Initializing CPU #4
551 09:44:52.404101 Initializing CPU #2
552 09:44:52.404170 Initializing CPU #1
553 09:44:52.404238 CPU: vendor Intel device 906a4
554 09:44:52.404306 CPU: family 06, model 9a, stepping 04
555 09:44:52.404374 CPU: vendor Intel device 906a4
556 09:44:52.404442 CPU: family 06, model 9a, stepping 04
557 09:44:52.404511 CPU: vendor Intel device 906a4
558 09:44:52.404578 CPU: family 06, model 9a, stepping 04
559 09:44:52.404645 Clearing out pending MCEs
560 09:44:52.404713 Clearing out pending MCEs
561 09:44:52.404780 cpu: energy policy set to 7
562 09:44:52.404847 Initializing CPU #3
563 09:44:52.404915 Clearing out pending MCEs
564 09:44:52.404982 cpu: energy policy set to 7
565 09:44:52.405064 cpu: energy policy set to 7
566 09:44:52.405133 microcode: Update skipped, already up-to-date
567 09:44:52.405202 CPU #4 initialized
568 09:44:52.405270 microcode: Update skipped, already up-to-date
569 09:44:52.405337 CPU #1 initialized
570 09:44:52.405404 CPU: vendor Intel device 906a4
571 09:44:52.405472 CPU: family 06, model 9a, stepping 04
572 09:44:52.405541 CPU: vendor Intel device 906a4
573 09:44:52.405608 CPU: family 06, model 9a, stepping 04
574 09:44:52.405675 Initializing CPU #7
575 09:44:52.405742 microcode: Update skipped, already up-to-date
576 09:44:52.405811 CPU #2 initialized
577 09:44:52.405879 Clearing out pending MCEs
578 09:44:52.405947 Clearing out pending MCEs
579 09:44:52.406014 cpu: energy policy set to 7
580 09:44:52.406083 Initializing CPU #6
581 09:44:52.406150 microcode: Update skipped, already up-to-date
582 09:44:52.406219 CPU #3 initialized
583 09:44:52.406287 CPU: vendor Intel device 906a4
584 09:44:52.406354 CPU: family 06, model 9a, stepping 04
585 09:44:52.406422 CPU: vendor Intel device 906a4
586 09:44:52.406490 CPU: family 06, model 9a, stepping 04
587 09:44:52.406558 cpu: energy policy set to 7
588 09:44:52.406626 Clearing out pending MCEs
589 09:44:52.406694 Clearing out pending MCEs
590 09:44:52.406769 cpu: energy policy set to 7
591 09:44:52.406830 microcode: Update skipped, already up-to-date
592 09:44:52.406891 CPU #5 initialized
593 09:44:52.406951 microcode: Update skipped, already up-to-date
594 09:44:52.407011 CPU #7 initialized
595 09:44:52.407071 cpu: energy policy set to 7
596 09:44:52.407132 microcode: Update skipped, already up-to-date
597 09:44:52.407193 CPU #6 initialized
598 09:44:52.407253 bsp_do_flight_plan done after 696 msecs.
599 09:44:52.407314 CPU: frequency set to 4400 MHz
600 09:44:52.407374 Enabling SMIs.
601 09:44:52.407435 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
602 09:44:52.407497 Probing TPM I2C: done! DID_VID 0x00281ae0
603 09:44:52.407557 Locality already claimed
604 09:44:52.407618 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
605 09:44:52.407679 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
606 09:44:52.407741 Enabling GPIO PM b/c CR50 has long IRQ pulse support
607 09:44:52.407803 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
608 09:44:52.407864 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
609 09:44:52.407929 Found a VBT of 9216 bytes after decompression
610 09:44:52.407990 PCI 1.0, PIN A, using IRQ #16
611 09:44:52.408051 PCI 2.0, PIN A, using IRQ #17
612 09:44:52.408112 PCI 4.0, PIN A, using IRQ #18
613 09:44:52.408173 PCI 5.0, PIN A, using IRQ #16
614 09:44:52.408233 PCI 6.0, PIN A, using IRQ #16
615 09:44:52.408294 PCI 6.2, PIN C, using IRQ #18
616 09:44:52.408353 PCI 7.0, PIN A, using IRQ #19
617 09:44:52.408413 PCI 7.1, PIN B, using IRQ #20
618 09:44:52.408473 PCI 7.2, PIN C, using IRQ #21
619 09:44:52.408533 PCI 7.3, PIN D, using IRQ #22
620 09:44:52.408593 PCI 8.0, PIN A, using IRQ #23
621 09:44:52.408653 PCI D.0, PIN A, using IRQ #17
622 09:44:52.408715 PCI D.1, PIN B, using IRQ #19
623 09:44:52.408775 PCI 10.0, PIN A, using IRQ #24
624 09:44:52.408835 PCI 10.1, PIN B, using IRQ #25
625 09:44:52.408896 PCI 10.6, PIN C, using IRQ #20
626 09:44:52.408956 PCI 10.7, PIN D, using IRQ #21
627 09:44:52.409222 PCI 11.0, PIN A, using IRQ #26
628 09:44:52.409292 PCI 11.1, PIN B, using IRQ #27
629 09:44:52.409354 PCI 11.2, PIN C, using IRQ #28
630 09:44:52.409414 PCI 11.3, PIN D, using IRQ #29
631 09:44:52.409475 PCI 12.0, PIN A, using IRQ #30
632 09:44:52.409536 PCI 12.6, PIN B, using IRQ #31
633 09:44:52.409597 PCI 12.7, PIN C, using IRQ #22
634 09:44:52.409657 PCI 13.0, PIN A, using IRQ #32
635 09:44:52.409717 PCI 13.1, PIN B, using IRQ #33
636 09:44:52.409777 PCI 13.2, PIN C, using IRQ #34
637 09:44:52.409838 PCI 13.3, PIN D, using IRQ #35
638 09:44:52.409899 PCI 14.0, PIN B, using IRQ #23
639 09:44:52.409959 PCI 14.1, PIN A, using IRQ #36
640 09:44:52.410019 PCI 14.3, PIN C, using IRQ #17
641 09:44:52.410079 PCI 15.0, PIN A, using IRQ #37
642 09:44:52.410141 PCI 15.1, PIN B, using IRQ #38
643 09:44:52.410200 PCI 15.2, PIN C, using IRQ #39
644 09:44:52.410260 PCI 15.3, PIN D, using IRQ #40
645 09:44:52.410319 PCI 16.0, PIN A, using IRQ #18
646 09:44:52.410379 PCI 16.1, PIN B, using IRQ #19
647 09:44:52.410439 PCI 16.2, PIN C, using IRQ #20
648 09:44:52.410499 PCI 16.3, PIN D, using IRQ #21
649 09:44:52.410559 PCI 16.4, PIN A, using IRQ #18
650 09:44:52.410618 PCI 16.5, PIN B, using IRQ #19
651 09:44:52.410678 PCI 17.0, PIN A, using IRQ #22
652 09:44:52.410738 PCI 19.0, PIN A, using IRQ #41
653 09:44:52.410797 PCI 19.1, PIN B, using IRQ #42
654 09:44:52.410856 PCI 19.2, PIN C, using IRQ #43
655 09:44:52.410916 PCI 1C.0, PIN A, using IRQ #16
656 09:44:52.410977 PCI 1C.1, PIN B, using IRQ #17
657 09:44:52.411037 PCI 1C.2, PIN C, using IRQ #18
658 09:44:52.411096 PCI 1C.3, PIN D, using IRQ #19
659 09:44:52.411156 PCI 1C.4, PIN A, using IRQ #16
660 09:44:52.411216 PCI 1C.5, PIN B, using IRQ #17
661 09:44:52.411276 PCI 1C.6, PIN C, using IRQ #18
662 09:44:52.411358 PCI 1C.7, PIN D, using IRQ #19
663 09:44:52.411420 PCI 1D.0, PIN A, using IRQ #16
664 09:44:52.411480 PCI 1D.1, PIN B, using IRQ #17
665 09:44:52.411540 PCI 1D.2, PIN C, using IRQ #18
666 09:44:52.411600 PCI 1D.3, PIN D, using IRQ #19
667 09:44:52.411661 PCI 1E.0, PIN A, using IRQ #23
668 09:44:52.411732 PCI 1E.1, PIN B, using IRQ #20
669 09:44:52.411787 PCI 1E.2, PIN C, using IRQ #44
670 09:44:52.411841 PCI 1E.3, PIN D, using IRQ #45
671 09:44:52.411896 PCI 1F.3, PIN B, using IRQ #22
672 09:44:52.411950 PCI 1F.4, PIN C, using IRQ #23
673 09:44:52.412004 PCI 1F.6, PIN D, using IRQ #20
674 09:44:52.412059 PCI 1F.7, PIN A, using IRQ #21
675 09:44:52.412115 IRQ: Using dynamically assigned PCI IO-APIC IRQs
676 09:44:52.412170 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
677 09:44:52.412226 FSPS returned 0
678 09:44:52.412280 Executing Phase 1 of FspMultiPhaseSiInit
679 09:44:52.412336 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
680 09:44:52.412392 port C0 DISC req: usage 1 usb3 1 usb2 1
681 09:44:52.412447 Raw Buffer output 0 00000111
682 09:44:52.412502 Raw Buffer output 1 00000000
683 09:44:52.412556 pmc_send_ipc_cmd succeeded
684 09:44:52.412611 port C1 DISC req: usage 1 usb3 3 usb2 3
685 09:44:52.412666 Raw Buffer output 0 00000331
686 09:44:52.412721 Raw Buffer output 1 00000000
687 09:44:52.412775 pmc_send_ipc_cmd succeeded
688 09:44:52.412830 Detected 6 core, 8 thread CPU.
689 09:44:52.412885 Detected 6 core, 8 thread CPU.
690 09:44:52.412940 Detected 6 core, 8 thread CPU.
691 09:44:52.412994 Detected 6 core, 8 thread CPU.
692 09:44:52.413061 Detected 6 core, 8 thread CPU.
693 09:44:52.413116 Detected 6 core, 8 thread CPU.
694 09:44:52.413171 Detected 6 core, 8 thread CPU.
695 09:44:52.413226 Detected 6 core, 8 thread CPU.
696 09:44:52.413281 Detected 6 core, 8 thread CPU.
697 09:44:52.413334 Detected 6 core, 8 thread CPU.
698 09:44:52.413389 Detected 6 core, 8 thread CPU.
699 09:44:52.413443 Detected 6 core, 8 thread CPU.
700 09:44:52.413497 Detected 6 core, 8 thread CPU.
701 09:44:52.413550 Detected 6 core, 8 thread CPU.
702 09:44:52.413604 Detected 6 core, 8 thread CPU.
703 09:44:52.413658 Detected 6 core, 8 thread CPU.
704 09:44:52.413713 Detected 6 core, 8 thread CPU.
705 09:44:52.413768 Detected 6 core, 8 thread CPU.
706 09:44:52.413823 Detected 6 core, 8 thread CPU.
707 09:44:52.413877 Detected 6 core, 8 thread CPU.
708 09:44:52.413931 Detected 6 core, 8 thread CPU.
709 09:44:52.413986 Detected 6 core, 8 thread CPU.
710 09:44:52.414040 Detected 6 core, 8 thread CPU.
711 09:44:52.414095 Detected 6 core, 8 thread CPU.
712 09:44:52.414149 Detected 6 core, 8 thread CPU.
713 09:44:52.414203 Detected 6 core, 8 thread CPU.
714 09:44:52.414258 Detected 6 core, 8 thread CPU.
715 09:44:52.414312 Detected 6 core, 8 thread CPU.
716 09:44:52.414366 Detected 6 core, 8 thread CPU.
717 09:44:52.414420 Detected 6 core, 8 thread CPU.
718 09:44:52.414475 Detected 6 core, 8 thread CPU.
719 09:44:52.414528 Detected 6 core, 8 thread CPU.
720 09:44:52.414582 Detected 6 core, 8 thread CPU.
721 09:44:52.414636 Detected 6 core, 8 thread CPU.
722 09:44:52.414690 Detected 6 core, 8 thread CPU.
723 09:44:52.414745 Detected 6 core, 8 thread CPU.
724 09:44:52.414800 Detected 6 core, 8 thread CPU.
725 09:44:52.414854 Detected 6 core, 8 thread CPU.
726 09:44:52.414909 Detected 6 core, 8 thread CPU.
727 09:44:52.414963 Detected 6 core, 8 thread CPU.
728 09:44:52.415017 Detected 6 core, 8 thread CPU.
729 09:44:52.415071 Detected 6 core, 8 thread CPU.
730 09:44:52.415125 Display FSP Version Info HOB
731 09:44:52.415179 Reference Code - CPU = c.0.65.70
732 09:44:52.415246 uCode Version = 0.0.4.23
733 09:44:52.415308 TXT ACM version = ff.ff.ff.ffff
734 09:44:52.415363 Reference Code - ME = c.0.65.70
735 09:44:52.415418 MEBx version = 0.0.0.0
736 09:44:52.415472 ME Firmware Version = Consumer SKU
737 09:44:52.415526 Reference Code - PCH = c.0.65.70
738 09:44:52.415581 PCH-CRID Status = Disabled
739 09:44:52.415635 PCH-CRID Original Value = ff.ff.ff.ffff
740 09:44:52.415689 PCH-CRID New Value = ff.ff.ff.ffff
741 09:44:52.415743 OPROM - RST - RAID = ff.ff.ff.ffff
742 09:44:52.415799 PCH Hsio Version = 4.0.0.0
743 09:44:52.415853 Reference Code - SA - System Agent = c.0.65.70
744 09:44:52.415908 Reference Code - MRC = 0.0.3.80
745 09:44:52.415963 SA - PCIe Version = c.0.65.70
746 09:44:52.416018 SA-CRID Status = Disabled
747 09:44:52.416073 SA-CRID Original Value = 0.0.0.4
748 09:44:52.416128 SA-CRID New Value = 0.0.0.4
749 09:44:52.416182 OPROM - VBIOS = ff.ff.ff.ffff
750 09:44:52.416439 IO Manageability Engine FW Version = 24.0.4.0
751 09:44:52.416501 PHY Build Version = 0.0.0.2016
752 09:44:52.416556 Thunderbolt(TM) FW Version = 0.0.0.0
753 09:44:52.416612 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
754 09:44:52.416668 BS: BS_DEV_INIT_CHIPS run times (exec / console): 463 / 507 ms
755 09:44:52.416723 Enumerating buses...
756 09:44:52.416788 Show all devs... Before device enumeration.
757 09:44:52.416838 Root Device: enabled 1
758 09:44:52.416888 CPU_CLUSTER: 0: enabled 1
759 09:44:52.416939 DOMAIN: 0000: enabled 1
760 09:44:52.416989 GPIO: 0: enabled 1
761 09:44:52.417045 PCI: 00:00.0: enabled 1
762 09:44:52.417094 PCI: 00:01.0: enabled 0
763 09:44:52.417144 PCI: 00:01.1: enabled 0
764 09:44:52.417193 PCI: 00:02.0: enabled 1
765 09:44:52.417242 PCI: 00:04.0: enabled 1
766 09:44:52.417291 PCI: 00:05.0: enabled 0
767 09:44:52.417340 PCI: 00:06.0: enabled 1
768 09:44:52.417389 PCI: 00:06.2: enabled 0
769 09:44:52.417438 PCI: 00:07.0: enabled 0
770 09:44:52.417487 PCI: 00:07.1: enabled 0
771 09:44:52.417536 PCI: 00:07.2: enabled 0
772 09:44:52.417586 PCI: 00:07.3: enabled 0
773 09:44:52.417635 PCI: 00:08.0: enabled 0
774 09:44:52.417684 PCI: 00:09.0: enabled 0
775 09:44:52.417734 PCI: 00:0a.0: enabled 1
776 09:44:52.417783 PCI: 00:0d.0: enabled 1
777 09:44:52.417832 PCI: 00:0d.1: enabled 0
778 09:44:52.417880 PCI: 00:0d.2: enabled 0
779 09:44:52.417929 PCI: 00:0d.3: enabled 0
780 09:44:52.417979 PCI: 00:0e.0: enabled 0
781 09:44:52.418029 PCI: 00:10.0: enabled 0
782 09:44:52.418078 PCI: 00:10.1: enabled 0
783 09:44:52.418127 PCI: 00:10.6: enabled 0
784 09:44:52.418176 PCI: 00:10.7: enabled 0
785 09:44:52.418225 PCI: 00:12.0: enabled 0
786 09:44:52.418274 PCI: 00:12.6: enabled 0
787 09:44:52.418324 PCI: 00:12.7: enabled 0
788 09:44:52.418373 PCI: 00:13.0: enabled 0
789 09:44:52.418422 PCI: 00:14.0: enabled 1
790 09:44:52.418472 PCI: 00:14.1: enabled 0
791 09:44:52.418521 PCI: 00:14.2: enabled 1
792 09:44:52.418570 PCI: 00:14.3: enabled 1
793 09:44:52.418619 PCI: 00:15.0: enabled 1
794 09:44:52.418668 PCI: 00:15.1: enabled 1
795 09:44:52.418717 PCI: 00:15.2: enabled 0
796 09:44:52.418767 PCI: 00:15.3: enabled 1
797 09:44:52.418815 PCI: 00:16.0: enabled 1
798 09:44:52.418864 PCI: 00:16.1: enabled 0
799 09:44:52.418913 PCI: 00:16.2: enabled 0
800 09:44:52.418962 PCI: 00:16.3: enabled 0
801 09:44:52.419012 PCI: 00:16.4: enabled 0
802 09:44:52.419061 PCI: 00:16.5: enabled 0
803 09:44:52.419113 PCI: 00:17.0: enabled 1
804 09:44:52.419162 PCI: 00:19.0: enabled 0
805 09:44:52.419211 PCI: 00:19.1: enabled 1
806 09:44:52.419261 PCI: 00:19.2: enabled 0
807 09:44:52.419310 PCI: 00:1a.0: enabled 0
808 09:44:52.419359 PCI: 00:1c.0: enabled 0
809 09:44:52.419408 PCI: 00:1c.1: enabled 0
810 09:44:52.419457 PCI: 00:1c.2: enabled 0
811 09:44:52.419507 PCI: 00:1c.3: enabled 0
812 09:44:52.419557 PCI: 00:1c.4: enabled 0
813 09:44:52.419606 PCI: 00:1c.5: enabled 0
814 09:44:52.419655 PCI: 00:1c.6: enabled 0
815 09:44:52.419704 PCI: 00:1c.7: enabled 0
816 09:44:52.419753 PCI: 00:1d.0: enabled 0
817 09:44:52.419802 PCI: 00:1d.1: enabled 0
818 09:44:52.419851 PCI: 00:1d.2: enabled 0
819 09:44:52.419900 PCI: 00:1d.3: enabled 0
820 09:44:52.419948 PCI: 00:1e.0: enabled 1
821 09:44:52.419997 PCI: 00:1e.1: enabled 0
822 09:44:52.420046 PCI: 00:1e.2: enabled 0
823 09:44:52.420095 PCI: 00:1e.3: enabled 1
824 09:44:52.420144 PCI: 00:1f.0: enabled 1
825 09:44:52.420192 PCI: 00:1f.1: enabled 0
826 09:44:52.420241 PCI: 00:1f.2: enabled 1
827 09:44:52.420290 PCI: 00:1f.3: enabled 1
828 09:44:52.420340 PCI: 00:1f.4: enabled 0
829 09:44:52.420389 PCI: 00:1f.5: enabled 1
830 09:44:52.420438 PCI: 00:1f.6: enabled 0
831 09:44:52.420487 PCI: 00:1f.7: enabled 0
832 09:44:52.420536 GENERIC: 0.0: enabled 1
833 09:44:52.420586 GENERIC: 0.0: enabled 1
834 09:44:52.420635 GENERIC: 1.0: enabled 1
835 09:44:52.420684 GENERIC: 0.0: enabled 1
836 09:44:52.420733 GENERIC: 1.0: enabled 1
837 09:44:52.420783 USB0 port 0: enabled 1
838 09:44:52.420833 USB0 port 0: enabled 1
839 09:44:52.420882 GENERIC: 0.0: enabled 1
840 09:44:52.420931 I2C: 00:1a: enabled 1
841 09:44:52.420980 I2C: 00:31: enabled 1
842 09:44:52.421039 I2C: 00:32: enabled 1
843 09:44:52.421089 I2C: 00:50: enabled 1
844 09:44:52.421139 I2C: 00:10: enabled 1
845 09:44:52.421188 I2C: 00:15: enabled 1
846 09:44:52.421237 I2C: 00:2c: enabled 1
847 09:44:52.421286 GENERIC: 0.0: enabled 1
848 09:44:52.421336 SPI: 00: enabled 1
849 09:44:52.421385 PNP: 0c09.0: enabled 1
850 09:44:52.421434 GENERIC: 0.0: enabled 1
851 09:44:52.421482 USB3 port 0: enabled 1
852 09:44:52.421531 USB3 port 1: enabled 0
853 09:44:52.421581 USB3 port 2: enabled 1
854 09:44:52.421639 USB3 port 3: enabled 0
855 09:44:52.421689 USB2 port 0: enabled 1
856 09:44:52.421753 USB2 port 1: enabled 0
857 09:44:52.421802 USB2 port 2: enabled 1
858 09:44:52.421851 USB2 port 3: enabled 0
859 09:44:52.421900 USB2 port 4: enabled 0
860 09:44:52.421947 USB2 port 5: enabled 1
861 09:44:52.421995 USB2 port 6: enabled 0
862 09:44:52.422044 USB2 port 7: enabled 0
863 09:44:52.422092 USB2 port 8: enabled 1
864 09:44:52.422141 USB2 port 9: enabled 1
865 09:44:52.422190 USB3 port 0: enabled 1
866 09:44:52.422239 USB3 port 1: enabled 0
867 09:44:52.422287 USB3 port 2: enabled 0
868 09:44:52.422336 USB3 port 3: enabled 0
869 09:44:52.422384 GENERIC: 0.0: enabled 1
870 09:44:52.422432 GENERIC: 1.0: enabled 1
871 09:44:52.422481 APIC: 00: enabled 1
872 09:44:52.422528 APIC: 12: enabled 1
873 09:44:52.422577 APIC: 14: enabled 1
874 09:44:52.422626 APIC: 16: enabled 1
875 09:44:52.422674 APIC: 10: enabled 1
876 09:44:52.422722 APIC: 01: enabled 1
877 09:44:52.422769 APIC: 08: enabled 1
878 09:44:52.422817 APIC: 09: enabled 1
879 09:44:52.422865 Compare with tree...
880 09:44:52.422914 Root Device: enabled 1
881 09:44:52.422963 CPU_CLUSTER: 0: enabled 1
882 09:44:52.423011 APIC: 00: enabled 1
883 09:44:52.423059 APIC: 12: enabled 1
884 09:44:52.423108 APIC: 14: enabled 1
885 09:44:52.423157 APIC: 16: enabled 1
886 09:44:52.423206 APIC: 10: enabled 1
887 09:44:52.423254 APIC: 01: enabled 1
888 09:44:52.423303 APIC: 08: enabled 1
889 09:44:52.423351 APIC: 09: enabled 1
890 09:44:52.423399 DOMAIN: 0000: enabled 1
891 09:44:52.423447 GPIO: 0: enabled 1
892 09:44:52.423495 PCI: 00:00.0: enabled 1
893 09:44:52.423544 PCI: 00:01.0: enabled 0
894 09:44:52.423592 PCI: 00:01.1: enabled 0
895 09:44:52.423641 PCI: 00:02.0: enabled 1
896 09:44:52.423691 PCI: 00:04.0: enabled 1
897 09:44:52.423739 GENERIC: 0.0: enabled 1
898 09:44:52.423788 PCI: 00:05.0: enabled 0
899 09:44:52.423837 PCI: 00:06.0: enabled 1
900 09:44:52.423885 PCI: 00:06.2: enabled 0
901 09:44:52.423933 PCI: 00:08.0: enabled 0
902 09:44:52.423981 PCI: 00:09.0: enabled 0
903 09:44:52.424029 PCI: 00:0a.0: enabled 1
904 09:44:52.424078 PCI: 00:0d.0: enabled 1
905 09:44:52.424126 USB0 port 0: enabled 1
906 09:44:52.424175 USB3 port 0: enabled 1
907 09:44:52.424223 USB3 port 1: enabled 0
908 09:44:52.424272 USB3 port 2: enabled 1
909 09:44:52.424320 USB3 port 3: enabled 0
910 09:44:52.424368 PCI: 00:0d.1: enabled 0
911 09:44:52.424626 PCI: 00:0d.2: enabled 0
912 09:44:52.424684 PCI: 00:0d.3: enabled 0
913 09:44:52.424736 PCI: 00:0e.0: enabled 0
914 09:44:52.424803 PCI: 00:10.0: enabled 0
915 09:44:52.424866 PCI: 00:10.1: enabled 0
916 09:44:52.424915 PCI: 00:10.6: enabled 0
917 09:44:52.424982 PCI: 00:10.7: enabled 0
918 09:44:52.425058 PCI: 00:12.0: enabled 0
919 09:44:52.425108 PCI: 00:12.6: enabled 0
920 09:44:52.425157 PCI: 00:12.7: enabled 0
921 09:44:52.425206 PCI: 00:13.0: enabled 0
922 09:44:52.425256 PCI: 00:14.0: enabled 1
923 09:44:52.425305 USB0 port 0: enabled 1
924 09:44:52.425354 USB2 port 0: enabled 1
925 09:44:52.425403 USB2 port 1: enabled 0
926 09:44:52.425453 USB2 port 2: enabled 1
927 09:44:52.425502 USB2 port 3: enabled 0
928 09:44:52.425551 USB2 port 4: enabled 0
929 09:44:52.425599 USB2 port 5: enabled 1
930 09:44:52.425647 USB2 port 6: enabled 0
931 09:44:52.425696 USB2 port 7: enabled 0
932 09:44:52.425744 USB2 port 8: enabled 1
933 09:44:52.425793 USB2 port 9: enabled 1
934 09:44:52.425842 USB3 port 0: enabled 1
935 09:44:52.425890 USB3 port 1: enabled 0
936 09:44:52.425939 USB3 port 2: enabled 0
937 09:44:52.425987 USB3 port 3: enabled 0
938 09:44:52.426036 PCI: 00:14.1: enabled 0
939 09:44:52.426084 PCI: 00:14.2: enabled 1
940 09:44:52.426133 PCI: 00:14.3: enabled 1
941 09:44:52.426182 GENERIC: 0.0: enabled 1
942 09:44:52.426231 PCI: 00:15.0: enabled 1
943 09:44:52.426280 I2C: 00:1a: enabled 1
944 09:44:52.426329 I2C: 00:31: enabled 1
945 09:44:52.426378 I2C: 00:32: enabled 1
946 09:44:52.426427 PCI: 00:15.1: enabled 1
947 09:44:52.426476 I2C: 00:50: enabled 1
948 09:44:52.426525 PCI: 00:15.2: enabled 0
949 09:44:52.426574 PCI: 00:15.3: enabled 1
950 09:44:52.426623 I2C: 00:10: enabled 1
951 09:44:52.426672 PCI: 00:16.0: enabled 1
952 09:44:52.426721 PCI: 00:16.1: enabled 0
953 09:44:52.426769 PCI: 00:16.2: enabled 0
954 09:44:52.426818 PCI: 00:16.3: enabled 0
955 09:44:52.426866 PCI: 00:16.4: enabled 0
956 09:44:52.426915 PCI: 00:16.5: enabled 0
957 09:44:52.426963 PCI: 00:17.0: enabled 1
958 09:44:52.427012 PCI: 00:19.0: enabled 0
959 09:44:52.427060 PCI: 00:19.1: enabled 1
960 09:44:52.427109 I2C: 00:15: enabled 1
961 09:44:52.427158 I2C: 00:2c: enabled 1
962 09:44:52.427207 PCI: 00:19.2: enabled 0
963 09:44:52.427256 PCI: 00:1a.0: enabled 0
964 09:44:52.427305 PCI: 00:1e.0: enabled 1
965 09:44:52.427354 PCI: 00:1e.1: enabled 0
966 09:44:52.427403 PCI: 00:1e.2: enabled 0
967 09:44:52.427452 PCI: 00:1e.3: enabled 1
968 09:44:52.427500 SPI: 00: enabled 1
969 09:44:52.427549 PCI: 00:1f.0: enabled 1
970 09:44:52.427598 PNP: 0c09.0: enabled 1
971 09:44:52.427647 PCI: 00:1f.1: enabled 0
972 09:44:52.427695 PCI: 00:1f.2: enabled 1
973 09:44:52.427744 GENERIC: 0.0: enabled 1
974 09:44:52.427793 GENERIC: 0.0: enabled 1
975 09:44:52.427842 GENERIC: 1.0: enabled 1
976 09:44:52.427890 PCI: 00:1f.3: enabled 1
977 09:44:52.427939 PCI: 00:1f.4: enabled 0
978 09:44:52.427988 PCI: 00:1f.5: enabled 1
979 09:44:52.428036 PCI: 00:1f.6: enabled 0
980 09:44:52.428085 PCI: 00:1f.7: enabled 0
981 09:44:52.428133 Root Device scanning...
982 09:44:52.428181 scan_static_bus for Root Device
983 09:44:52.428230 CPU_CLUSTER: 0 enabled
984 09:44:52.428279 DOMAIN: 0000 enabled
985 09:44:52.428327 DOMAIN: 0000 scanning...
986 09:44:52.428375 PCI: pci_scan_bus for bus 00
987 09:44:52.428424 PCI: 00:00.0 [8086/0000] ops
988 09:44:52.428472 PCI: 00:00.0 [8086/4609] enabled
989 09:44:52.428520 PCI: 00:02.0 [8086/0000] bus ops
990 09:44:52.428568 PCI: 00:02.0 [8086/46b3] enabled
991 09:44:52.428616 PCI: 00:04.0 [8086/0000] bus ops
992 09:44:52.428665 PCI: 00:04.0 [8086/461d] enabled
993 09:44:52.428714 PCI: 00:06.0 [8086/0000] bus ops
994 09:44:52.428762 PCI: 00:06.0 [8086/464d] enabled
995 09:44:52.428810 PCI: 00:08.0 [8086/464f] disabled
996 09:44:52.428858 PCI: 00:0a.0 [8086/467d] enabled
997 09:44:52.428907 PCI: 00:0d.0 [8086/0000] bus ops
998 09:44:52.428955 PCI: 00:0d.0 [8086/461e] enabled
999 09:44:52.429002 PCI: 00:14.0 [8086/0000] bus ops
1000 09:44:52.429093 PCI: 00:14.0 [8086/51ed] enabled
1001 09:44:52.429143 PCI: 00:14.2 [8086/51ef] enabled
1002 09:44:52.429191 PCI: 00:14.3 [8086/0000] bus ops
1003 09:44:52.429240 PCI: 00:14.3 [8086/51f0] enabled
1004 09:44:52.429289 PCI: 00:15.0 [8086/0000] bus ops
1005 09:44:52.429338 PCI: 00:15.0 [8086/51e8] enabled
1006 09:44:52.429387 PCI: 00:15.1 [8086/0000] bus ops
1007 09:44:52.429435 PCI: 00:15.1 [8086/51e9] enabled
1008 09:44:52.429484 PCI: 00:15.2 [8086/0000] bus ops
1009 09:44:52.429533 PCI: 00:15.2 [8086/51ea] disabled
1010 09:44:52.429582 PCI: 00:15.3 [8086/0000] bus ops
1011 09:44:52.429631 PCI: 00:15.3 [8086/51eb] enabled
1012 09:44:52.429679 PCI: 00:16.0 [8086/0000] ops
1013 09:44:52.429728 PCI: 00:16.0 [8086/51e0] enabled
1014 09:44:52.429777 PCI: Static device PCI: 00:17.0 not found, disabling it.
1015 09:44:52.429851 PCI: 00:19.0 [8086/0000] bus ops
1016 09:44:52.429934 PCI: 00:19.0 [8086/51c5] disabled
1017 09:44:52.429987 PCI: 00:19.1 [8086/0000] bus ops
1018 09:44:52.430037 PCI: 00:19.1 [8086/51c6] enabled
1019 09:44:52.430086 PCI: 00:1e.0 [8086/0000] ops
1020 09:44:52.430135 PCI: 00:1e.0 [8086/51a8] enabled
1021 09:44:52.430184 PCI: 00:1e.3 [8086/0000] bus ops
1022 09:44:52.430235 PCI: 00:1e.3 [8086/51ab] enabled
1023 09:44:52.430284 PCI: 00:1f.0 [8086/0000] bus ops
1024 09:44:52.430333 PCI: 00:1f.0 [8086/5182] enabled
1025 09:44:52.430381 RTC Init
1026 09:44:52.430430 Set power on after power failure.
1027 09:44:52.430479 Disabling Deep S3
1028 09:44:52.430528 Disabling Deep S3
1029 09:44:52.430577 Disabling Deep S4
1030 09:44:52.430626 Disabling Deep S4
1031 09:44:52.430675 Disabling Deep S5
1032 09:44:52.430724 Disabling Deep S5
1033 09:44:52.430772 PCI: 00:1f.2 [0000/0000] hidden
1034 09:44:52.430821 PCI: 00:1f.3 [8086/0000] bus ops
1035 09:44:52.430870 PCI: 00:1f.3 [8086/51c8] enabled
1036 09:44:52.430918 PCI: 00:1f.5 [8086/0000] bus ops
1037 09:44:52.430967 PCI: 00:1f.5 [8086/51a4] enabled
1038 09:44:52.431015 GPIO: 0 enabled
1039 09:44:52.431064 PCI: Leftover static devices:
1040 09:44:52.431112 PCI: 00:01.0
1041 09:44:52.431160 PCI: 00:01.1
1042 09:44:52.431209 PCI: 00:05.0
1043 09:44:52.431257 PCI: 00:06.2
1044 09:44:52.431305 PCI: 00:09.0
1045 09:44:52.431353 PCI: 00:0d.1
1046 09:44:52.431401 PCI: 00:0d.2
1047 09:44:52.431452 PCI: 00:0d.3
1048 09:44:52.431501 PCI: 00:0e.0
1049 09:44:52.431549 PCI: 00:10.0
1050 09:44:52.431597 PCI: 00:10.1
1051 09:44:52.431645 PCI: 00:10.6
1052 09:44:52.431694 PCI: 00:10.7
1053 09:44:52.431743 PCI: 00:12.0
1054 09:44:52.431790 PCI: 00:12.6
1055 09:44:52.431838 PCI: 00:12.7
1056 09:44:52.431886 PCI: 00:13.0
1057 09:44:52.431934 PCI: 00:14.1
1058 09:44:52.431983 PCI: 00:16.1
1059 09:44:52.432031 PCI: 00:16.2
1060 09:44:52.432079 PCI: 00:16.3
1061 09:44:52.432127 PCI: 00:16.4
1062 09:44:52.432175 PCI: 00:16.5
1063 09:44:52.432224 PCI: 00:17.0
1064 09:44:52.432272 PCI: 00:19.2
1065 09:44:52.432512 PCI: 00:1a.0
1066 09:44:52.432566 PCI: 00:1e.1
1067 09:44:52.432637 PCI: 00:1e.2
1068 09:44:52.432732 PCI: 00:1f.1
1069 09:44:52.432781 PCI: 00:1f.4
1070 09:44:52.432829 PCI: 00:1f.6
1071 09:44:52.432877 PCI: 00:1f.7
1072 09:44:52.432924 PCI: Check your devicetree.cb.
1073 09:44:52.432973 PCI: 00:02.0 scanning...
1074 09:44:52.433044 scan_generic_bus for PCI: 00:02.0
1075 09:44:52.433110 scan_generic_bus for PCI: 00:02.0 done
1076 09:44:52.433159 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1077 09:44:52.433207 PCI: 00:04.0 scanning...
1078 09:44:52.433274 scan_generic_bus for PCI: 00:04.0
1079 09:44:52.433337 GENERIC: 0.0 enabled
1080 09:44:52.433404 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1081 09:44:52.433468 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1082 09:44:52.433517 PCI: 00:06.0 scanning...
1083 09:44:52.433566 do_pci_scan_bridge for PCI: 00:06.0
1084 09:44:52.433614 PCI: pci_scan_bus for bus 01
1085 09:44:52.433662 PCI: 01:00.0 [15b7/5009] enabled
1086 09:44:52.433711 Enabling Common Clock Configuration
1087 09:44:52.433760 L1 Sub-State supported from root port 6
1088 09:44:52.433809 L1 Sub-State Support = 0x5
1089 09:44:52.433858 CommonModeRestoreTime = 0x6e
1090 09:44:52.433907 Power On Value = 0x5, Power On Scale = 0x2
1091 09:44:52.433955 ASPM: Enabled L1
1092 09:44:52.434003 PCIe: Max_Payload_Size adjusted to 256
1093 09:44:52.434053 PCI: 01:00.0: Enabled LTR
1094 09:44:52.434101 PCI: 01:00.0: Programmed LTR max latencies
1095 09:44:52.434150 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1096 09:44:52.434199 PCI: 00:0d.0 scanning...
1097 09:44:52.434248 scan_static_bus for PCI: 00:0d.0
1098 09:44:52.434296 USB0 port 0 enabled
1099 09:44:52.434345 USB0 port 0 scanning...
1100 09:44:52.434392 scan_static_bus for USB0 port 0
1101 09:44:52.434441 USB3 port 0 enabled
1102 09:44:52.434490 USB3 port 1 disabled
1103 09:44:52.434537 USB3 port 2 enabled
1104 09:44:52.434585 USB3 port 3 disabled
1105 09:44:52.434633 USB3 port 0 scanning...
1106 09:44:52.434681 scan_static_bus for USB3 port 0
1107 09:44:52.434729 scan_static_bus for USB3 port 0 done
1108 09:44:52.434778 scan_bus: bus USB3 port 0 finished in 6 msecs
1109 09:44:52.434828 USB3 port 2 scanning...
1110 09:44:52.434876 scan_static_bus for USB3 port 2
1111 09:44:52.434925 scan_static_bus for USB3 port 2 done
1112 09:44:52.434973 scan_bus: bus USB3 port 2 finished in 6 msecs
1113 09:44:52.435021 scan_static_bus for USB0 port 0 done
1114 09:44:52.435069 scan_bus: bus USB0 port 0 finished in 43 msecs
1115 09:44:52.435117 scan_static_bus for PCI: 00:0d.0 done
1116 09:44:52.435166 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1117 09:44:52.435215 PCI: 00:14.0 scanning...
1118 09:44:52.435263 scan_static_bus for PCI: 00:14.0
1119 09:44:52.435312 USB0 port 0 enabled
1120 09:44:52.435360 USB0 port 0 scanning...
1121 09:44:52.435408 scan_static_bus for USB0 port 0
1122 09:44:52.435456 USB2 port 0 enabled
1123 09:44:52.435504 USB2 port 1 disabled
1124 09:44:52.435552 USB2 port 2 enabled
1125 09:44:52.435599 USB2 port 3 disabled
1126 09:44:52.435648 USB2 port 4 disabled
1127 09:44:52.435696 USB2 port 5 enabled
1128 09:44:52.435744 USB2 port 6 disabled
1129 09:44:52.435792 USB2 port 7 disabled
1130 09:44:52.435840 USB2 port 8 enabled
1131 09:44:52.435888 USB2 port 9 enabled
1132 09:44:52.435936 USB3 port 0 enabled
1133 09:44:52.435984 USB3 port 1 disabled
1134 09:44:52.436032 USB3 port 2 disabled
1135 09:44:52.436079 USB3 port 3 disabled
1136 09:44:52.436127 USB2 port 0 scanning...
1137 09:44:52.436176 scan_static_bus for USB2 port 0
1138 09:44:52.436225 scan_static_bus for USB2 port 0 done
1139 09:44:52.436273 scan_bus: bus USB2 port 0 finished in 6 msecs
1140 09:44:52.436321 USB2 port 2 scanning...
1141 09:44:52.436370 scan_static_bus for USB2 port 2
1142 09:44:52.436418 scan_static_bus for USB2 port 2 done
1143 09:44:52.436467 scan_bus: bus USB2 port 2 finished in 6 msecs
1144 09:44:52.436515 USB2 port 5 scanning...
1145 09:44:52.436563 scan_static_bus for USB2 port 5
1146 09:44:52.436612 scan_static_bus for USB2 port 5 done
1147 09:44:52.436660 scan_bus: bus USB2 port 5 finished in 6 msecs
1148 09:44:52.436718 USB2 port 8 scanning...
1149 09:44:52.436796 scan_static_bus for USB2 port 8
1150 09:44:52.436873 scan_static_bus for USB2 port 8 done
1151 09:44:52.436950 scan_bus: bus USB2 port 8 finished in 6 msecs
1152 09:44:52.437048 USB2 port 9 scanning...
1153 09:44:52.437115 scan_static_bus for USB2 port 9
1154 09:44:52.437164 scan_static_bus for USB2 port 9 done
1155 09:44:52.437213 scan_bus: bus USB2 port 9 finished in 6 msecs
1156 09:44:52.437264 USB3 port 0 scanning...
1157 09:44:52.437313 scan_static_bus for USB3 port 0
1158 09:44:52.437362 scan_static_bus for USB3 port 0 done
1159 09:44:52.437410 scan_bus: bus USB3 port 0 finished in 6 msecs
1160 09:44:52.437459 scan_static_bus for USB0 port 0 done
1161 09:44:52.437507 scan_bus: bus USB0 port 0 finished in 120 msecs
1162 09:44:52.437555 scan_static_bus for PCI: 00:14.0 done
1163 09:44:52.437603 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1164 09:44:52.437652 PCI: 00:14.3 scanning...
1165 09:44:52.437701 scan_static_bus for PCI: 00:14.3
1166 09:44:52.437749 GENERIC: 0.0 enabled
1167 09:44:52.437797 scan_static_bus for PCI: 00:14.3 done
1168 09:44:52.437845 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1169 09:44:52.437894 PCI: 00:15.0 scanning...
1170 09:44:52.437943 scan_static_bus for PCI: 00:15.0
1171 09:44:52.437991 I2C: 00:1a enabled
1172 09:44:52.438039 I2C: 00:31 enabled
1173 09:44:52.438087 I2C: 00:32 enabled
1174 09:44:52.438135 scan_static_bus for PCI: 00:15.0 done
1175 09:44:52.438183 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1176 09:44:52.438232 PCI: 00:15.1 scanning...
1177 09:44:52.438281 scan_static_bus for PCI: 00:15.1
1178 09:44:52.438329 I2C: 00:50 enabled
1179 09:44:52.438378 scan_static_bus for PCI: 00:15.1 done
1180 09:44:52.438427 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1181 09:44:52.438475 PCI: 00:15.3 scanning...
1182 09:44:52.438522 scan_static_bus for PCI: 00:15.3
1183 09:44:52.438571 I2C: 00:10 enabled
1184 09:44:52.438639 scan_static_bus for PCI: 00:15.3 done
1185 09:44:52.438691 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1186 09:44:52.438741 PCI: 00:19.1 scanning...
1187 09:44:52.438816 scan_static_bus for PCI: 00:19.1
1188 09:44:52.438917 I2C: 00:15 enabled
1189 09:44:52.439040 I2C: 00:2c enabled
1190 09:44:52.439131 scan_static_bus for PCI: 00:19.1 done
1191 09:44:52.439214 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1192 09:44:52.439298 PCI: 00:1e.3 scanning...
1193 09:44:52.439383 scan_generic_bus for PCI: 00:1e.3
1194 09:44:52.439467 SPI: 00 enabled
1195 09:44:52.439750 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1196 09:44:52.439839 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1197 09:44:52.439922 PCI: 00:1f.0 scanning...
1198 09:44:52.440004 scan_static_bus for PCI: 00:1f.0
1199 09:44:52.440087 PNP: 0c09.0 enabled
1200 09:44:52.440170 PNP: 0c09.0 scanning...
1201 09:44:52.440252 scan_static_bus for PNP: 0c09.0
1202 09:44:52.440335 scan_static_bus for PNP: 0c09.0 done
1203 09:44:52.440418 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1204 09:44:52.440501 scan_static_bus for PCI: 00:1f.0 done
1205 09:44:52.440584 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1206 09:44:52.440707 PCI: 00:1f.2 scanning...
1207 09:44:52.440784 scan_static_bus for PCI: 00:1f.2
1208 09:44:52.440861 GENERIC: 0.0 enabled
1209 09:44:52.440937 GENERIC: 0.0 scanning...
1210 09:44:52.441040 scan_static_bus for GENERIC: 0.0
1211 09:44:52.441134 GENERIC: 0.0 enabled
1212 09:44:52.441226 GENERIC: 1.0 enabled
1213 09:44:52.441342 scan_static_bus for GENERIC: 0.0 done
1214 09:44:52.441430 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1215 09:44:52.441480 scan_static_bus for PCI: 00:1f.2 done
1216 09:44:52.441529 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1217 09:44:52.441578 PCI: 00:1f.3 scanning...
1218 09:44:52.441627 scan_static_bus for PCI: 00:1f.3
1219 09:44:52.441676 scan_static_bus for PCI: 00:1f.3 done
1220 09:44:52.441725 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1221 09:44:52.441779 PCI: 00:1f.5 scanning...
1222 09:44:52.441829 scan_generic_bus for PCI: 00:1f.5
1223 09:44:52.441882 scan_generic_bus for PCI: 00:1f.5 done
1224 09:44:52.441938 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1225 09:44:52.442011 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1226 09:44:52.442100 scan_static_bus for Root Device done
1227 09:44:52.442218 scan_bus: bus Root Device finished in 729 msecs
1228 09:44:52.442309 done
1229 09:44:52.442398 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1230 09:44:52.442504 Chrome EC: UHEPI supported
1231 09:44:52.442592 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1232 09:44:52.442670 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1233 09:44:52.442740 SPI flash protection: WPSW=0 SRP0=0
1234 09:44:52.442793 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1235 09:44:52.442843 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1236 09:44:52.442892 found VGA at PCI: 00:02.0
1237 09:44:52.442941 Setting up VGA for PCI: 00:02.0
1238 09:44:52.442990 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1239 09:44:52.443039 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1240 09:44:52.443087 Allocating resources...
1241 09:44:52.443134 Reading resources...
1242 09:44:52.443198 Root Device read_resources bus 0 link: 0
1243 09:44:52.443261 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1244 09:44:52.443309 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1245 09:44:52.443357 DOMAIN: 0000 read_resources bus 0 link: 0
1246 09:44:52.443405 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1247 09:44:52.443453 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1248 09:44:52.443502 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1249 09:44:52.443551 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1250 09:44:52.443599 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1251 09:44:52.443648 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1252 09:44:52.443697 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1253 09:44:52.443745 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1254 09:44:52.443793 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1255 09:44:52.443841 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1256 09:44:52.443928 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1257 09:44:52.443977 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1258 09:44:52.444025 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1259 09:44:52.444073 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1260 09:44:52.444144 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1261 09:44:52.444207 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1262 09:44:52.444256 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1263 09:44:52.444304 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1264 09:44:52.444352 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1265 09:44:52.444400 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1266 09:44:52.444448 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1267 09:44:52.444496 PCI: 00:04.0 read_resources bus 1 link: 0
1268 09:44:52.444545 PCI: 00:04.0 read_resources bus 1 link: 0 done
1269 09:44:52.444592 PCI: 00:06.0 read_resources bus 1 link: 0
1270 09:44:52.444640 PCI: 00:06.0 read_resources bus 1 link: 0 done
1271 09:44:52.444724 PCI: 00:0d.0 read_resources bus 0 link: 0
1272 09:44:52.444772 USB0 port 0 read_resources bus 0 link: 0
1273 09:44:52.444820 USB0 port 0 read_resources bus 0 link: 0 done
1274 09:44:52.444867 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1275 09:44:52.444939 PCI: 00:14.0 read_resources bus 0 link: 0
1276 09:44:52.444988 USB0 port 0 read_resources bus 0 link: 0
1277 09:44:52.445063 USB0 port 0 read_resources bus 0 link: 0 done
1278 09:44:52.445112 PCI: 00:14.0 read_resources bus 0 link: 0 done
1279 09:44:52.445160 PCI: 00:14.3 read_resources bus 0 link: 0
1280 09:44:52.445226 PCI: 00:14.3 read_resources bus 0 link: 0 done
1281 09:44:52.445290 PCI: 00:15.0 read_resources bus 0 link: 0
1282 09:44:52.445339 PCI: 00:15.0 read_resources bus 0 link: 0 done
1283 09:44:52.445387 PCI: 00:15.1 read_resources bus 0 link: 0
1284 09:44:52.445628 PCI: 00:15.1 read_resources bus 0 link: 0 done
1285 09:44:52.445687 PCI: 00:15.3 read_resources bus 0 link: 0
1286 09:44:52.445744 PCI: 00:15.3 read_resources bus 0 link: 0 done
1287 09:44:52.445802 PCI: 00:19.1 read_resources bus 0 link: 0
1288 09:44:52.445851 PCI: 00:19.1 read_resources bus 0 link: 0 done
1289 09:44:52.445914 PCI: 00:1e.3 read_resources bus 2 link: 0
1290 09:44:52.445963 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1291 09:44:52.446013 PCI: 00:1f.0 read_resources bus 0 link: 0
1292 09:44:52.446070 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1293 09:44:52.446130 PCI: 00:1f.2 read_resources bus 0 link: 0
1294 09:44:52.446182 GENERIC: 0.0 read_resources bus 0 link: 0
1295 09:44:52.446231 GENERIC: 0.0 read_resources bus 0 link: 0 done
1296 09:44:52.446281 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1297 09:44:52.446331 DOMAIN: 0000 read_resources bus 0 link: 0 done
1298 09:44:52.446380 Root Device read_resources bus 0 link: 0 done
1299 09:44:52.446430 Done reading resources.
1300 09:44:52.446479 Show resources in subtree (Root Device)...After reading.
1301 09:44:52.446528 Root Device child on link 0 CPU_CLUSTER: 0
1302 09:44:52.446617 CPU_CLUSTER: 0 child on link 0 APIC: 00
1303 09:44:52.446681 APIC: 00
1304 09:44:52.446729 APIC: 12
1305 09:44:52.446778 APIC: 14
1306 09:44:52.446826 APIC: 16
1307 09:44:52.446875 APIC: 10
1308 09:44:52.446923 APIC: 01
1309 09:44:52.446970 APIC: 08
1310 09:44:52.447017 APIC: 09
1311 09:44:52.447065 DOMAIN: 0000 child on link 0 GPIO: 0
1312 09:44:52.447114 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1313 09:44:52.447164 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1314 09:44:52.447212 GPIO: 0
1315 09:44:52.447261 PCI: 00:00.0
1316 09:44:52.447310 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1317 09:44:52.447359 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1318 09:44:52.447408 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1319 09:44:52.447458 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1320 09:44:52.447508 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1321 09:44:52.447557 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1322 09:44:52.447606 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1323 09:44:52.447655 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1324 09:44:52.447704 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1325 09:44:52.447753 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1326 09:44:52.447801 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1327 09:44:52.447851 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1328 09:44:52.447900 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1329 09:44:52.447948 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1330 09:44:52.447997 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1331 09:44:52.448045 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1332 09:44:52.448094 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1333 09:44:52.448143 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1334 09:44:52.448192 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1335 09:44:52.448241 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1336 09:44:52.448290 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1337 09:44:52.448339 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1338 09:44:52.448388 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1339 09:44:52.448437 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1340 09:44:52.448485 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1341 09:44:52.448534 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1342 09:44:52.448583 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1343 09:44:52.448632 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1344 09:44:52.448680 PCI: 00:02.0
1345 09:44:52.448729 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1346 09:44:52.448967 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1347 09:44:52.449081 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1348 09:44:52.449134 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1349 09:44:52.449193 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1350 09:44:52.449314 GENERIC: 0.0
1351 09:44:52.449414 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1352 09:44:52.449510 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1353 09:44:52.449577 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1354 09:44:52.449628 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1355 09:44:52.449677 PCI: 01:00.0
1356 09:44:52.449726 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1357 09:44:52.449776 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1358 09:44:52.449824 PCI: 00:08.0
1359 09:44:52.449873 PCI: 00:0a.0
1360 09:44:52.449921 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1361 09:44:52.449971 PCI: 00:0d.0 child on link 0 USB0 port 0
1362 09:44:52.450020 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1363 09:44:52.450069 USB0 port 0 child on link 0 USB3 port 0
1364 09:44:52.450117 USB3 port 0
1365 09:44:52.450165 USB3 port 1
1366 09:44:52.450213 USB3 port 2
1367 09:44:52.450261 USB3 port 3
1368 09:44:52.450308 PCI: 00:14.0 child on link 0 USB0 port 0
1369 09:44:52.450356 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1370 09:44:52.450405 USB0 port 0 child on link 0 USB2 port 0
1371 09:44:52.450468 USB2 port 0
1372 09:44:52.450517 USB2 port 1
1373 09:44:52.450566 USB2 port 2
1374 09:44:52.450614 USB2 port 3
1375 09:44:52.450663 USB2 port 4
1376 09:44:52.450712 USB2 port 5
1377 09:44:52.450761 USB2 port 6
1378 09:44:52.450809 USB2 port 7
1379 09:44:52.450857 USB2 port 8
1380 09:44:52.450905 USB2 port 9
1381 09:44:52.450954 USB3 port 0
1382 09:44:52.451003 USB3 port 1
1383 09:44:52.451051 USB3 port 2
1384 09:44:52.451100 USB3 port 3
1385 09:44:52.451148 PCI: 00:14.2
1386 09:44:52.451197 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1387 09:44:52.451247 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1388 09:44:52.451297 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1389 09:44:52.451348 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1390 09:44:52.451403 GENERIC: 0.0
1391 09:44:52.451453 PCI: 00:15.0 child on link 0 I2C: 00:1a
1392 09:44:52.451503 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1393 09:44:52.451553 I2C: 00:1a
1394 09:44:52.451602 I2C: 00:31
1395 09:44:52.451651 I2C: 00:32
1396 09:44:52.451701 PCI: 00:15.1 child on link 0 I2C: 00:50
1397 09:44:52.451751 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1398 09:44:52.451800 I2C: 00:50
1399 09:44:52.451853 PCI: 00:15.2
1400 09:44:52.451904 PCI: 00:15.3 child on link 0 I2C: 00:10
1401 09:44:52.451954 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1402 09:44:52.452012 I2C: 00:10
1403 09:44:52.452062 PCI: 00:16.0
1404 09:44:52.452111 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1405 09:44:52.452161 PCI: 00:19.0
1406 09:44:52.452226 PCI: 00:19.1 child on link 0 I2C: 00:15
1407 09:44:52.452278 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1408 09:44:52.452328 I2C: 00:15
1409 09:44:52.452377 I2C: 00:2c
1410 09:44:52.452426 PCI: 00:1e.0
1411 09:44:52.452475 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1412 09:44:52.452525 PCI: 00:1e.3 child on link 0 SPI: 00
1413 09:44:52.452574 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1414 09:44:52.452656 SPI: 00
1415 09:44:52.452741 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1416 09:44:52.452822 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1417 09:44:52.452900 PNP: 0c09.0
1418 09:44:52.452980 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 09:44:52.453055 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1420 09:44:52.453108 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1421 09:44:52.453159 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1422 09:44:52.453210 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1423 09:44:52.453260 GENERIC: 0.0
1424 09:44:52.453308 GENERIC: 1.0
1425 09:44:52.453363 PCI: 00:1f.3
1426 09:44:52.453427 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1427 09:44:52.453508 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1428 09:44:52.453587 PCI: 00:1f.5
1429 09:44:52.453859 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1430 09:44:52.453941 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1431 09:44:52.454047 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1432 09:44:52.454142 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1433 09:44:52.454230 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1434 09:44:52.454316 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1435 09:44:52.454370 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1436 09:44:52.454420 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1437 09:44:52.454470 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1438 09:44:52.454520 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1439 09:44:52.454571 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1440 09:44:52.454621 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1441 09:44:52.454671 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1442 09:44:52.454732 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1443 09:44:52.454811 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1444 09:44:52.454865 DOMAIN: 0000: Resource ranges:
1445 09:44:52.454915 * Base: 1000, Size: 800, Tag: 100
1446 09:44:52.454965 * Base: 1900, Size: e700, Tag: 100
1447 09:44:52.455015 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1448 09:44:52.455065 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1449 09:44:52.455114 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1450 09:44:52.455164 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1451 09:44:52.455214 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1452 09:44:52.455264 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1453 09:44:52.455314 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1454 09:44:52.455364 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1455 09:44:52.455420 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1456 09:44:52.455474 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1457 09:44:52.455531 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1458 09:44:52.455585 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1459 09:44:52.455636 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1460 09:44:52.455686 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1461 09:44:52.455735 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1462 09:44:52.455792 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1463 09:44:52.455849 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1464 09:44:52.455932 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1465 09:44:52.456017 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1466 09:44:52.456103 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1467 09:44:52.456183 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1468 09:44:52.456274 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1469 09:44:52.456355 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1470 09:44:52.456434 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1471 09:44:52.456513 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1472 09:44:52.456593 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1473 09:44:52.456673 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1474 09:44:52.456752 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1475 09:44:52.456832 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1476 09:44:52.456911 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1477 09:44:52.456990 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1478 09:44:52.457061 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1479 09:44:52.457113 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1480 09:44:52.457162 DOMAIN: 0000: Resource ranges:
1481 09:44:52.457212 * Base: 80400000, Size: 3fc00000, Tag: 200
1482 09:44:52.457262 * Base: d0000000, Size: 28000000, Tag: 200
1483 09:44:52.457311 * Base: fa000000, Size: 1000000, Tag: 200
1484 09:44:52.457361 * Base: fb001000, Size: 17ff000, Tag: 200
1485 09:44:52.457410 * Base: fe800000, Size: 300000, Tag: 200
1486 09:44:52.457459 * Base: feb80000, Size: 80000, Tag: 200
1487 09:44:52.457508 * Base: fed00000, Size: 40000, Tag: 200
1488 09:44:52.457557 * Base: fed70000, Size: 10000, Tag: 200
1489 09:44:52.457796 * Base: fed88000, Size: 8000, Tag: 200
1490 09:44:52.457854 * Base: fed93000, Size: d000, Tag: 200
1491 09:44:52.457905 * Base: feda2000, Size: 1e000, Tag: 200
1492 09:44:52.457954 * Base: fede0000, Size: 1220000, Tag: 200
1493 09:44:52.458003 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1494 09:44:52.458053 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1495 09:44:52.458103 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1496 09:44:52.458154 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1497 09:44:52.458205 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1498 09:44:52.458255 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1499 09:44:52.458304 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1500 09:44:52.458354 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1501 09:44:52.458404 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1502 09:44:52.458453 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1503 09:44:52.458503 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1504 09:44:52.458551 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1505 09:44:52.458601 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1506 09:44:52.458650 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1507 09:44:52.458700 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1508 09:44:52.458749 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1509 09:44:52.458799 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1510 09:44:52.458849 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1511 09:44:52.458898 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1512 09:44:52.458947 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1513 09:44:52.458997 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1514 09:44:52.459047 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1515 09:44:52.459097 PCI: 00:06.0: Resource ranges:
1516 09:44:52.459147 * Base: 80400000, Size: 100000, Tag: 200
1517 09:44:52.459196 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1518 09:44:52.459246 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1519 09:44:52.459296 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1520 09:44:52.459345 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1521 09:44:52.459395 Root Device assign_resources, bus 0 link: 0
1522 09:44:52.459445 DOMAIN: 0000 assign_resources, bus 0 link: 0
1523 09:44:52.459495 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1524 09:44:52.459545 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1525 09:44:52.459595 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1526 09:44:52.459644 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1527 09:44:52.459692 PCI: 00:04.0 assign_resources, bus 1 link: 0
1528 09:44:52.459741 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1529 09:44:52.459791 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1530 09:44:52.459840 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1531 09:44:52.459890 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1532 09:44:52.459940 PCI: 00:06.0 assign_resources, bus 1 link: 0
1533 09:44:52.459989 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1534 09:44:52.460039 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1535 09:44:52.460088 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1536 09:44:52.460137 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1537 09:44:52.460187 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1538 09:44:52.460237 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1539 09:44:52.460287 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1540 09:44:52.460336 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1541 09:44:52.460385 PCI: 00:14.0 assign_resources, bus 0 link: 0
1542 09:44:52.460434 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1543 09:44:52.460483 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1544 09:44:52.460532 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1545 09:44:52.460581 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1546 09:44:52.460632 PCI: 00:14.3 assign_resources, bus 0 link: 0
1547 09:44:52.460681 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1548 09:44:52.460730 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1549 09:44:52.460780 PCI: 00:15.0 assign_resources, bus 0 link: 0
1550 09:44:52.460828 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1551 09:44:52.461052 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1552 09:44:52.461108 PCI: 00:15.1 assign_resources, bus 0 link: 0
1553 09:44:52.461159 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1554 09:44:52.461209 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1555 09:44:52.461259 PCI: 00:15.3 assign_resources, bus 0 link: 0
1556 09:44:52.461309 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1557 09:44:52.461359 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1558 09:44:52.461408 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1559 09:44:52.461457 PCI: 00:19.1 assign_resources, bus 0 link: 0
1560 09:44:52.461507 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1561 09:44:52.461556 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1562 09:44:52.461606 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1563 09:44:52.461655 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1564 09:44:52.461704 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1565 09:44:52.461754 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1566 09:44:52.461803 LPC: Trying to open IO window from 800 size 1ff
1567 09:44:52.461867 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1568 09:44:52.461944 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1569 09:44:52.462022 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1570 09:44:52.462092 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1571 09:44:52.462170 Root Device assign_resources, bus 0 link: 0 done
1572 09:44:52.462250 Done setting resources.
1573 09:44:52.462331 Show resources in subtree (Root Device)...After assigning values.
1574 09:44:52.462390 Root Device child on link 0 CPU_CLUSTER: 0
1575 09:44:52.462443 CPU_CLUSTER: 0 child on link 0 APIC: 00
1576 09:44:52.462493 APIC: 00
1577 09:44:52.462543 APIC: 12
1578 09:44:52.462592 APIC: 14
1579 09:44:52.462641 APIC: 16
1580 09:44:52.462690 APIC: 10
1581 09:44:52.462739 APIC: 01
1582 09:44:52.462788 APIC: 08
1583 09:44:52.462836 APIC: 09
1584 09:44:52.462884 DOMAIN: 0000 child on link 0 GPIO: 0
1585 09:44:52.462935 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1586 09:44:52.462985 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1587 09:44:52.463035 GPIO: 0
1588 09:44:52.463084 PCI: 00:00.0
1589 09:44:52.463134 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1590 09:44:52.463184 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1591 09:44:52.463234 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1592 09:44:52.463283 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1593 09:44:52.463333 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1594 09:44:52.463383 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1595 09:44:52.463432 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1596 09:44:52.463482 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1597 09:44:52.463532 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1598 09:44:52.463582 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1599 09:44:52.463632 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1600 09:44:52.463684 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1601 09:44:52.463733 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1602 09:44:52.463783 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1603 09:44:52.463833 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1604 09:44:52.463883 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1605 09:44:52.463933 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1606 09:44:52.463982 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1607 09:44:52.464032 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1608 09:44:52.464082 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1609 09:44:52.464131 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1610 09:44:52.464181 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1611 09:44:52.464231 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1612 09:44:52.464470 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1613 09:44:52.464526 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1614 09:44:52.464578 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1615 09:44:52.464629 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1616 09:44:52.464679 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1617 09:44:52.464730 PCI: 00:02.0
1618 09:44:52.464779 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1619 09:44:52.464829 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1620 09:44:52.464879 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1621 09:44:52.464928 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1622 09:44:52.464978 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1623 09:44:52.465037 GENERIC: 0.0
1624 09:44:52.465088 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1625 09:44:52.465138 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1626 09:44:52.465188 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1627 09:44:52.465239 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1628 09:44:52.465289 PCI: 01:00.0
1629 09:44:52.465337 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1630 09:44:52.465388 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1631 09:44:52.465438 PCI: 00:08.0
1632 09:44:52.465487 PCI: 00:0a.0
1633 09:44:52.465536 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1634 09:44:52.465586 PCI: 00:0d.0 child on link 0 USB0 port 0
1635 09:44:52.465635 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1636 09:44:52.465685 USB0 port 0 child on link 0 USB3 port 0
1637 09:44:52.465735 USB3 port 0
1638 09:44:52.465784 USB3 port 1
1639 09:44:52.465833 USB3 port 2
1640 09:44:52.465882 USB3 port 3
1641 09:44:52.465931 PCI: 00:14.0 child on link 0 USB0 port 0
1642 09:44:52.465980 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1643 09:44:52.466031 USB0 port 0 child on link 0 USB2 port 0
1644 09:44:52.466080 USB2 port 0
1645 09:44:52.466129 USB2 port 1
1646 09:44:52.466177 USB2 port 2
1647 09:44:52.466230 USB2 port 3
1648 09:44:52.466292 USB2 port 4
1649 09:44:52.466342 USB2 port 5
1650 09:44:52.466391 USB2 port 6
1651 09:44:52.466440 USB2 port 7
1652 09:44:52.466489 USB2 port 8
1653 09:44:52.466538 USB2 port 9
1654 09:44:52.466587 USB3 port 0
1655 09:44:52.466636 USB3 port 1
1656 09:44:52.466684 USB3 port 2
1657 09:44:52.466733 USB3 port 3
1658 09:44:52.466781 PCI: 00:14.2
1659 09:44:52.466830 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1660 09:44:52.466882 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1661 09:44:52.466933 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1662 09:44:52.466982 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1663 09:44:52.467032 GENERIC: 0.0
1664 09:44:52.467080 PCI: 00:15.0 child on link 0 I2C: 00:1a
1665 09:44:52.467129 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1666 09:44:52.467178 I2C: 00:1a
1667 09:44:52.467227 I2C: 00:31
1668 09:44:52.467276 I2C: 00:32
1669 09:44:52.467325 PCI: 00:15.1 child on link 0 I2C: 00:50
1670 09:44:52.467374 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1671 09:44:52.467424 I2C: 00:50
1672 09:44:52.467473 PCI: 00:15.2
1673 09:44:52.467522 PCI: 00:15.3 child on link 0 I2C: 00:10
1674 09:44:52.467571 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1675 09:44:52.467620 I2C: 00:10
1676 09:44:52.467669 PCI: 00:16.0
1677 09:44:52.467718 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1678 09:44:52.467769 PCI: 00:19.0
1679 09:44:52.467817 PCI: 00:19.1 child on link 0 I2C: 00:15
1680 09:44:52.467866 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1681 09:44:52.467916 I2C: 00:15
1682 09:44:52.467966 I2C: 00:2c
1683 09:44:52.468015 PCI: 00:1e.0
1684 09:44:52.468064 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1685 09:44:52.468114 PCI: 00:1e.3 child on link 0 SPI: 00
1686 09:44:52.468164 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1687 09:44:52.468214 SPI: 00
1688 09:44:52.468262 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1689 09:44:52.468312 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1690 09:44:52.468361 PNP: 0c09.0
1691 09:44:52.468600 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1692 09:44:52.468659 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1693 09:44:52.468711 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1694 09:44:52.468763 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1695 09:44:52.468812 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1696 09:44:52.468861 GENERIC: 0.0
1697 09:44:52.468911 GENERIC: 1.0
1698 09:44:52.468959 PCI: 00:1f.3
1699 09:44:52.469008 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1700 09:44:52.469071 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1701 09:44:52.469122 PCI: 00:1f.5
1702 09:44:52.469173 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1703 09:44:52.469223 Done allocating resources.
1704 09:44:52.469273 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1705 09:44:52.469324 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1706 09:44:52.469374 Configure audio over I2S with MAX98373 NAU88L25B.
1707 09:44:52.469424 Enabling BT offload
1708 09:44:52.469473 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1709 09:44:52.469523 Enabling resources...
1710 09:44:52.469572 PCI: 00:00.0 subsystem <- 8086/4609
1711 09:44:52.469622 PCI: 00:00.0 cmd <- 06
1712 09:44:52.469671 PCI: 00:02.0 subsystem <- 8086/46b3
1713 09:44:52.469720 PCI: 00:02.0 cmd <- 03
1714 09:44:52.469769 PCI: 00:04.0 subsystem <- 8086/461d
1715 09:44:52.469819 PCI: 00:04.0 cmd <- 02
1716 09:44:52.469867 PCI: 00:06.0 bridge ctrl <- 0013
1717 09:44:52.469916 PCI: 00:06.0 subsystem <- 8086/464d
1718 09:44:52.469965 PCI: 00:06.0 cmd <- 106
1719 09:44:52.470014 PCI: 00:0a.0 subsystem <- 8086/467d
1720 09:44:52.470064 PCI: 00:0a.0 cmd <- 02
1721 09:44:52.470113 PCI: 00:0d.0 subsystem <- 8086/461e
1722 09:44:52.470162 PCI: 00:0d.0 cmd <- 02
1723 09:44:52.470232 PCI: 00:14.0 subsystem <- 8086/51ed
1724 09:44:52.470286 PCI: 00:14.0 cmd <- 02
1725 09:44:52.470335 PCI: 00:14.2 subsystem <- 8086/51ef
1726 09:44:52.470385 PCI: 00:14.2 cmd <- 02
1727 09:44:52.470433 PCI: 00:14.3 subsystem <- 8086/51f0
1728 09:44:52.470482 PCI: 00:14.3 cmd <- 02
1729 09:44:52.717709 PCI: 00:15.0 subsystem <- 8086/51e8
1730 09:44:52.717841 PCI: 00:15.0 cmd <- 02
1731 09:44:52.717902 PCI: 00:15.1 subsystem <- 8086/51e9
1732 09:44:52.717976 PCI: 00:15.1 cmd <- 06
1733 09:44:52.718030 PCI: 00:15.3 subsystem <- 8086/51eb
1734 09:44:52.718082 PCI: 00:15.3 cmd <- 02
1735 09:44:52.718133 PCI: 00:16.0 subsystem <- 8086/51e0
1736 09:44:52.718198 PCI: 00:16.0 cmd <- 02
1737 09:44:52.718247 PCI: 00:19.1 subsystem <- 8086/51c6
1738 09:44:52.718296 PCI: 00:19.1 cmd <- 02
1739 09:44:52.718345 PCI: 00:1e.0 subsystem <- 8086/51a8
1740 09:44:52.718394 PCI: 00:1e.0 cmd <- 06
1741 09:44:52.718475 PCI: 00:1e.3 subsystem <- 8086/51ab
1742 09:44:52.718523 PCI: 00:1e.3 cmd <- 02
1743 09:44:52.718603 PCI: 00:1f.0 subsystem <- 8086/5182
1744 09:44:52.718650 PCI: 00:1f.0 cmd <- 407
1745 09:44:52.718698 PCI: 00:1f.3 subsystem <- 8086/51c8
1746 09:44:52.718745 PCI: 00:1f.3 cmd <- 02
1747 09:44:52.718793 PCI: 00:1f.5 subsystem <- 8086/51a4
1748 09:44:52.718842 PCI: 00:1f.5 cmd <- 406
1749 09:44:52.718889 PCI: 01:00.0 cmd <- 02
1750 09:44:52.718937 done.
1751 09:44:52.718986 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1752 09:44:52.719035 ME: Version: Unavailable
1753 09:44:52.719084 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1754 09:44:52.719133 Initializing devices...
1755 09:44:52.719213 Root Device init
1756 09:44:52.719261 mainboard: EC init
1757 09:44:52.719309 Chrome EC: Set SMI mask to 0x0000000000000000
1758 09:44:52.719357 Chrome EC: clear events_b mask to 0x0000000000000000
1759 09:44:52.719405 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1760 09:44:52.719453 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1761 09:44:52.719501 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1762 09:44:52.719549 Chrome EC: Set WAKE mask to 0x0000000000000000
1763 09:44:52.719597 Root Device init finished in 35 msecs
1764 09:44:52.719645 PCI: 00:00.0 init
1765 09:44:52.719692 CPU TDP = 15 Watts
1766 09:44:52.719787 CPU PL1 = 15 Watts
1767 09:44:52.719851 CPU PL2 = 55 Watts
1768 09:44:52.719899 CPU PL4 = 123 Watts
1769 09:44:52.719947 PCI: 00:00.0 init finished in 8 msecs
1770 09:44:52.719996 PCI: 00:02.0 init
1771 09:44:52.720044 GMA: Found VBT in CBFS
1772 09:44:52.720092 GMA: Found valid VBT in CBFS
1773 09:44:52.720141 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1774 09:44:52.720190 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1775 09:44:52.720239 PCI: 00:02.0 init finished in 18 msecs
1776 09:44:52.720323 PCI: 00:06.0 init
1777 09:44:52.720406 Initializing PCH PCIe bridge.
1778 09:44:52.720454 PCI: 00:06.0 init finished in 3 msecs
1779 09:44:52.720502 PCI: 00:0a.0 init
1780 09:44:52.720550 PCI: 00:0a.0 init finished in 0 msecs
1781 09:44:52.720600 PCI: 00:14.0 init
1782 09:44:52.720648 PCI: 00:14.0 init finished in 0 msecs
1783 09:44:52.720703 PCI: 00:14.2 init
1784 09:44:52.720777 PCI: 00:14.2 init finished in 0 msecs
1785 09:44:52.720870 PCI: 00:15.0 init
1786 09:44:52.720949 I2C bus 0 version 0x3230302a
1787 09:44:52.721063 DW I2C bus 0 at 0x80655000 (400 KHz)
1788 09:44:52.721115 PCI: 00:15.0 init finished in 6 msecs
1789 09:44:52.721164 PCI: 00:15.1 init
1790 09:44:52.721213 I2C bus 1 version 0x3230302a
1791 09:44:52.721260 DW I2C bus 1 at 0x80656000 (400 KHz)
1792 09:44:52.721309 PCI: 00:15.1 init finished in 6 msecs
1793 09:44:52.721356 PCI: 00:15.3 init
1794 09:44:52.721404 I2C bus 3 version 0x3230302a
1795 09:44:52.721452 DW I2C bus 3 at 0x80657000 (400 KHz)
1796 09:44:52.721501 PCI: 00:15.3 init finished in 6 msecs
1797 09:44:52.721548 PCI: 00:16.0 init
1798 09:44:52.721597 PCI: 00:16.0 init finished in 0 msecs
1799 09:44:52.721645 PCI: 00:19.1 init
1800 09:44:52.721694 I2C bus 5 version 0x3230302a
1801 09:44:52.721743 DW I2C bus 5 at 0x80659000 (400 KHz)
1802 09:44:52.721791 PCI: 00:19.1 init finished in 6 msecs
1803 09:44:52.721840 PCI: 00:1f.0 init
1804 09:44:52.722090 IOAPIC: Initializing IOAPIC at 0xfec00000
1805 09:44:52.722180 IOAPIC: ID = 0x02
1806 09:44:52.722275 IOAPIC: Dumping registers
1807 09:44:52.722362 reg 0x0000: 0x02000000
1808 09:44:52.722457 reg 0x0001: 0x00770020
1809 09:44:52.722555 reg 0x0002: 0x00000000
1810 09:44:52.722651 IOAPIC: 120 interrupts
1811 09:44:52.722748 IOAPIC: Clearing IOAPIC at 0xfec00000
1812 09:44:52.722827 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1813 09:44:52.722905 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1814 09:44:52.722985 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1815 09:44:52.723065 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1816 09:44:52.723143 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1817 09:44:52.723222 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1818 09:44:52.723300 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1819 09:44:52.723376 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1820 09:44:52.723454 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1821 09:44:52.723531 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1822 09:44:52.723595 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1823 09:44:52.723676 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1824 09:44:52.723759 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1825 09:44:52.723809 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1826 09:44:52.723889 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1827 09:44:52.723953 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1828 09:44:52.724001 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1829 09:44:52.724050 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1830 09:44:52.724099 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1831 09:44:52.724148 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1832 09:44:52.724196 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1833 09:44:52.724271 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1834 09:44:52.724351 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1835 09:44:52.724433 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1836 09:44:52.724549 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1837 09:44:52.724628 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1838 09:44:52.724705 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1839 09:44:52.724782 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1840 09:44:52.724859 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1841 09:44:52.724936 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1842 09:44:52.725038 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1843 09:44:52.725138 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1844 09:44:52.725217 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1845 09:44:52.725294 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1846 09:44:52.725371 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1847 09:44:52.725448 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1848 09:44:52.725525 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1849 09:44:52.725602 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1850 09:44:52.725664 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1851 09:44:52.725742 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1852 09:44:52.725819 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1853 09:44:52.725896 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1854 09:44:52.725973 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1855 09:44:52.726050 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1856 09:44:52.726127 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1857 09:44:52.726204 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1858 09:44:52.726279 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1859 09:44:52.726331 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1860 09:44:52.726428 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1861 09:44:52.726522 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1862 09:44:52.726597 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1863 09:44:52.726667 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1864 09:44:52.726762 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1865 09:44:52.726846 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1866 09:44:52.726930 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1867 09:44:52.727013 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1868 09:44:52.727093 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1869 09:44:52.727165 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1870 09:44:52.727221 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1871 09:44:52.727275 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1872 09:44:52.727328 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1873 09:44:52.727381 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1874 09:44:52.727433 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1875 09:44:52.727485 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1876 09:44:52.727538 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1877 09:44:52.727589 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1878 09:44:52.727642 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1879 09:44:52.727694 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1880 09:44:52.727746 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1881 09:44:52.727798 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1882 09:44:52.727850 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1883 09:44:52.727902 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1884 09:44:52.727954 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1885 09:44:52.728006 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1886 09:44:52.728058 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1887 09:44:52.728110 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1888 09:44:52.728162 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1889 09:44:52.728214 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1890 09:44:52.728265 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1891 09:44:52.728509 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1892 09:44:52.728568 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1893 09:44:52.728621 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1894 09:44:52.728673 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1895 09:44:52.728725 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1896 09:44:52.728777 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1897 09:44:52.728828 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1898 09:44:52.728880 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1899 09:44:52.728931 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1900 09:44:52.728983 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1901 09:44:52.729056 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1902 09:44:52.729139 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1903 09:44:52.729221 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1904 09:44:52.729303 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1905 09:44:52.729385 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1906 09:44:52.729467 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1907 09:44:52.729550 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1908 09:44:52.729632 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1909 09:44:52.729714 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1910 09:44:52.729796 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1911 09:44:52.729878 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1912 09:44:52.729960 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1913 09:44:52.730042 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1914 09:44:52.730124 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1915 09:44:52.730206 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1916 09:44:52.730289 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1917 09:44:52.730387 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1918 09:44:52.730454 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1919 09:44:52.730508 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1920 09:44:52.730560 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1921 09:44:52.730635 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1922 09:44:52.730688 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1923 09:44:52.730741 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1924 09:44:52.730793 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1925 09:44:52.730846 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1926 09:44:52.730898 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1927 09:44:52.730950 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1928 09:44:52.731001 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1929 09:44:52.731054 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1930 09:44:52.731106 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1931 09:44:52.731157 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1932 09:44:52.731209 IOAPIC: Bootstrap Processor Local APIC = 0x00
1933 09:44:52.731262 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1934 09:44:52.731314 PCI: 00:1f.0 init finished in 607 msecs
1935 09:44:52.731366 PCI: 00:1f.2 init
1936 09:44:52.731418 apm_control: Disabling ACPI.
1937 09:44:52.731470 APMC done.
1938 09:44:52.731523 PCI: 00:1f.2 init finished in 6 msecs
1939 09:44:52.731575 PCI: 00:1f.3 init
1940 09:44:52.731627 PCI: 00:1f.3 init finished in 0 msecs
1941 09:44:52.731679 PCI: 01:00.0 init
1942 09:44:52.731731 PCI: 01:00.0 init finished in 0 msecs
1943 09:44:52.731784 PNP: 0c09.0 init
1944 09:44:52.731836 Google Chrome EC uptime: 10.925 seconds
1945 09:44:52.731888 Google Chrome AP resets since EC boot: 0
1946 09:44:52.731941 Google Chrome most recent AP reset causes:
1947 09:44:52.731993 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1948 09:44:52.732046 PNP: 0c09.0 init finished in 19 msecs
1949 09:44:52.732098 GENERIC: 0.0 init
1950 09:44:52.732150 GENERIC: 0.0 init finished in 0 msecs
1951 09:44:52.732202 GENERIC: 1.0 init
1952 09:44:52.732254 GENERIC: 1.0 init finished in 0 msecs
1953 09:44:52.732306 Devices initialized
1954 09:44:52.732357 Show all devs... After init.
1955 09:44:52.732409 Root Device: enabled 1
1956 09:44:52.732461 CPU_CLUSTER: 0: enabled 1
1957 09:44:52.732512 DOMAIN: 0000: enabled 1
1958 09:44:52.732566 GPIO: 0: enabled 1
1959 09:44:52.732651 PCI: 00:00.0: enabled 1
1960 09:44:52.732733 PCI: 00:01.0: enabled 0
1961 09:44:52.732815 PCI: 00:01.1: enabled 0
1962 09:44:52.732896 PCI: 00:02.0: enabled 1
1963 09:44:52.732977 PCI: 00:04.0: enabled 1
1964 09:44:52.733053 PCI: 00:05.0: enabled 0
1965 09:44:52.733107 PCI: 00:06.0: enabled 1
1966 09:44:52.733159 PCI: 00:06.2: enabled 0
1967 09:44:52.733211 PCI: 00:07.0: enabled 0
1968 09:44:52.733262 PCI: 00:07.1: enabled 0
1969 09:44:52.733314 PCI: 00:07.2: enabled 0
1970 09:44:52.733367 PCI: 00:07.3: enabled 0
1971 09:44:52.733418 PCI: 00:08.0: enabled 0
1972 09:44:52.733469 PCI: 00:09.0: enabled 0
1973 09:44:52.733520 PCI: 00:0a.0: enabled 1
1974 09:44:52.733572 PCI: 00:0d.0: enabled 1
1975 09:44:52.733623 PCI: 00:0d.1: enabled 0
1976 09:44:52.733674 PCI: 00:0d.2: enabled 0
1977 09:44:52.733726 PCI: 00:0d.3: enabled 0
1978 09:44:52.733778 PCI: 00:0e.0: enabled 0
1979 09:44:52.733829 PCI: 00:10.0: enabled 0
1980 09:44:52.733880 PCI: 00:10.1: enabled 0
1981 09:44:52.733932 PCI: 00:10.6: enabled 0
1982 09:44:52.733984 PCI: 00:10.7: enabled 0
1983 09:44:52.734035 PCI: 00:12.0: enabled 0
1984 09:44:52.734087 PCI: 00:12.6: enabled 0
1985 09:44:52.734138 PCI: 00:12.7: enabled 0
1986 09:44:52.734190 PCI: 00:13.0: enabled 0
1987 09:44:52.734241 PCI: 00:14.0: enabled 1
1988 09:44:52.734293 PCI: 00:14.1: enabled 0
1989 09:44:52.734344 PCI: 00:14.2: enabled 1
1990 09:44:52.734396 PCI: 00:14.3: enabled 1
1991 09:44:52.734448 PCI: 00:15.0: enabled 1
1992 09:44:52.734500 PCI: 00:15.1: enabled 1
1993 09:44:52.734551 PCI: 00:15.2: enabled 0
1994 09:44:52.734603 PCI: 00:15.3: enabled 1
1995 09:44:52.734654 PCI: 00:16.0: enabled 1
1996 09:44:52.734705 PCI: 00:16.1: enabled 0
1997 09:44:52.734756 PCI: 00:16.2: enabled 0
1998 09:44:52.734807 PCI: 00:16.3: enabled 0
1999 09:44:52.734858 PCI: 00:16.4: enabled 0
2000 09:44:52.734909 PCI: 00:16.5: enabled 0
2001 09:44:52.734960 PCI: 00:17.0: enabled 0
2002 09:44:52.735012 PCI: 00:19.0: enabled 0
2003 09:44:52.735064 PCI: 00:19.1: enabled 1
2004 09:44:52.735115 PCI: 00:19.2: enabled 0
2005 09:44:52.735166 PCI: 00:1a.0: enabled 0
2006 09:44:52.735218 PCI: 00:1c.0: enabled 0
2007 09:44:52.735270 PCI: 00:1c.1: enabled 0
2008 09:44:52.735514 PCI: 00:1c.2: enabled 0
2009 09:44:52.735573 PCI: 00:1c.3: enabled 0
2010 09:44:52.735625 PCI: 00:1c.4: enabled 0
2011 09:44:52.735677 PCI: 00:1c.5: enabled 0
2012 09:44:52.735729 PCI: 00:1c.6: enabled 0
2013 09:44:52.735780 PCI: 00:1c.7: enabled 0
2014 09:44:52.735831 PCI: 00:1d.0: enabled 0
2015 09:44:52.735883 PCI: 00:1d.1: enabled 0
2016 09:44:52.735934 PCI: 00:1d.2: enabled 0
2017 09:44:52.735985 PCI: 00:1d.3: enabled 0
2018 09:44:52.736036 PCI: 00:1e.0: enabled 1
2019 09:44:52.736087 PCI: 00:1e.1: enabled 0
2020 09:44:52.736139 PCI: 00:1e.2: enabled 0
2021 09:44:52.736191 PCI: 00:1e.3: enabled 1
2022 09:44:52.736242 PCI: 00:1f.0: enabled 1
2023 09:44:52.736293 PCI: 00:1f.1: enabled 0
2024 09:44:52.736344 PCI: 00:1f.2: enabled 1
2025 09:44:52.736396 PCI: 00:1f.3: enabled 1
2026 09:44:52.736447 PCI: 00:1f.4: enabled 0
2027 09:44:52.736499 PCI: 00:1f.5: enabled 1
2028 09:44:52.736550 PCI: 00:1f.6: enabled 0
2029 09:44:52.736601 PCI: 00:1f.7: enabled 0
2030 09:44:52.736652 GENERIC: 0.0: enabled 1
2031 09:44:52.736704 GENERIC: 0.0: enabled 1
2032 09:44:52.736755 GENERIC: 1.0: enabled 1
2033 09:44:52.736806 GENERIC: 0.0: enabled 1
2034 09:44:52.736858 GENERIC: 1.0: enabled 1
2035 09:44:52.736910 USB0 port 0: enabled 1
2036 09:44:52.736962 USB0 port 0: enabled 1
2037 09:44:52.737022 GENERIC: 0.0: enabled 1
2038 09:44:52.737085 I2C: 00:1a: enabled 1
2039 09:44:52.737138 I2C: 00:31: enabled 1
2040 09:44:52.737190 I2C: 00:32: enabled 1
2041 09:44:52.737242 I2C: 00:50: enabled 1
2042 09:44:52.737294 I2C: 00:10: enabled 1
2043 09:44:52.737345 I2C: 00:15: enabled 1
2044 09:44:52.737397 I2C: 00:2c: enabled 1
2045 09:44:52.737451 GENERIC: 0.0: enabled 1
2046 09:44:52.737504 SPI: 00: enabled 1
2047 09:44:52.737557 PNP: 0c09.0: enabled 1
2048 09:44:52.737608 GENERIC: 0.0: enabled 1
2049 09:44:52.737659 USB3 port 0: enabled 1
2050 09:44:52.737711 USB3 port 1: enabled 0
2051 09:44:52.737762 USB3 port 2: enabled 1
2052 09:44:52.737813 USB3 port 3: enabled 0
2053 09:44:52.737865 USB2 port 0: enabled 1
2054 09:44:52.737916 USB2 port 1: enabled 0
2055 09:44:52.737968 USB2 port 2: enabled 1
2056 09:44:52.738020 USB2 port 3: enabled 0
2057 09:44:52.738072 USB2 port 4: enabled 0
2058 09:44:52.738123 USB2 port 5: enabled 1
2059 09:44:52.738174 USB2 port 6: enabled 0
2060 09:44:52.738225 USB2 port 7: enabled 0
2061 09:44:52.738278 USB2 port 8: enabled 1
2062 09:44:52.738330 USB2 port 9: enabled 1
2063 09:44:52.738381 USB3 port 0: enabled 1
2064 09:44:52.738433 USB3 port 1: enabled 0
2065 09:44:52.738484 USB3 port 2: enabled 0
2066 09:44:52.738536 USB3 port 3: enabled 0
2067 09:44:52.738604 GENERIC: 0.0: enabled 1
2068 09:44:52.738687 GENERIC: 1.0: enabled 1
2069 09:44:52.738768 APIC: 00: enabled 1
2070 09:44:52.738849 APIC: 12: enabled 1
2071 09:44:52.738931 APIC: 14: enabled 1
2072 09:44:52.739015 APIC: 16: enabled 1
2073 09:44:52.739080 APIC: 10: enabled 1
2074 09:44:52.739134 APIC: 01: enabled 1
2075 09:44:52.739186 APIC: 08: enabled 1
2076 09:44:52.739237 APIC: 09: enabled 1
2077 09:44:52.739288 PCI: 01:00.0: enabled 1
2078 09:44:52.739341 BS: BS_DEV_INIT run times (exec / console): 8 / 1127 ms
2079 09:44:52.739394 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2080 09:44:52.739447 ELOG: NV offset 0xf20000 size 0x4000
2081 09:44:52.739499 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2082 09:44:52.739552 ELOG: Event(17) added with size 13 at 2024-06-17 09:44:51 UTC
2083 09:44:52.739605 ELOG: Event(16) added with size 11 at 2024-06-17 09:44:51 UTC
2084 09:44:52.739656 Erasing flash addr f20000 + 4 KiB
2085 09:44:52.739708 ELOG: Event(92) added with size 9 at 2024-06-17 09:44:51 UTC
2086 09:44:52.739761 ELOG: Event(93) added with size 9 at 2024-06-17 09:44:51 UTC
2087 09:44:52.739812 ELOG: Event(9E) added with size 10 at 2024-06-17 09:44:51 UTC
2088 09:44:52.739864 ELOG: Event(9F) added with size 14 at 2024-06-17 09:44:51 UTC
2089 09:44:52.739916 BS: BS_DEV_INIT exit times (exec / console): 48 / 55 ms
2090 09:44:52.739968 ELOG: Event(A1) added with size 10 at 2024-06-17 09:44:51 UTC
2091 09:44:52.740020 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2092 09:44:52.740073 ELOG: Event(A0) added with size 9 at 2024-06-17 09:44:51 UTC
2093 09:44:52.740125 elog_add_boot_reason: Logged dev mode boot
2094 09:44:52.740177 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2095 09:44:52.740230 Finalize devices...
2096 09:44:52.740282 PCI: 00:16.0 final
2097 09:44:52.740334 PCI: 00:1f.2 final
2098 09:44:52.740386 GENERIC: 0.0 final
2099 09:44:52.740437 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2100 09:44:52.740490 GENERIC: 1.0 final
2101 09:44:52.740546 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2102 09:44:52.740622 Devices finalized
2103 09:44:52.740718 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2104 09:44:52.740803 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2105 09:44:52.740887 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2106 09:44:52.740970 ME: HFSTS1 : 0x80030045
2107 09:44:52.741052 ME: HFSTS2 : 0x30280116
2108 09:44:52.741107 ME: HFSTS3 : 0x00000050
2109 09:44:52.741159 ME: HFSTS4 : 0x00004000
2110 09:44:52.741212 ME: HFSTS5 : 0x00000000
2111 09:44:52.741264 ME: HFSTS6 : 0x40400006
2112 09:44:52.741317 ME: Manufacturing Mode : YES
2113 09:44:52.741370 ME: SPI Protection Mode Enabled : YES
2114 09:44:52.741422 ME: FPFs Committed : YES
2115 09:44:52.741473 ME: Manufacturing Vars Locked : NO
2116 09:44:52.741526 ME: FW Partition Table : OK
2117 09:44:52.741579 ME: Bringup Loader Failure : NO
2118 09:44:52.741631 ME: Firmware Init Complete : NO
2119 09:44:52.741683 ME: Boot Options Present : NO
2120 09:44:52.741735 ME: Update In Progress : NO
2121 09:44:52.741787 ME: D0i3 Support : YES
2122 09:44:52.741839 ME: Low Power State Enabled : NO
2123 09:44:52.741891 ME: CPU Replaced : YES
2124 09:44:52.741943 ME: CPU Replacement Valid : YES
2125 09:44:52.741995 ME: Current Working State : 5
2126 09:44:52.742048 ME: Current Operation State : 1
2127 09:44:52.742101 ME: Current Operation Mode : 3
2128 09:44:52.742153 ME: Error Code : 0
2129 09:44:52.742206 ME: Enhanced Debug Mode : NO
2130 09:44:52.742258 ME: CPU Debug Disabled : YES
2131 09:44:52.742503 ME: TXT Support : NO
2132 09:44:52.742562 ME: WP for RO is enabled : YES
2133 09:44:52.742616 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2134 09:44:52.742670 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2135 09:44:52.742723 ELOG: Event(91) added with size 10 at 2024-06-17 09:44:51 UTC
2136 09:44:52.742776 Chrome EC: clear events_b mask to 0x0000000020004000
2137 09:44:52.742829 Ramoops buffer: 0x100000@0x7689a000.
2138 09:44:52.742881 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2139 09:44:52.742934 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2140 09:44:52.742987 CBFS: 'fallback/slic' not found.
2141 09:44:52.743039 ACPI: Writing ACPI tables at 7686e000.
2142 09:44:52.743092 ACPI: * FACS
2143 09:44:52.743144 ACPI: * DSDT
2144 09:44:52.743195 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2145 09:44:52.743248 ACPI: * FADT
2146 09:44:52.743300 SCI is IRQ9
2147 09:44:52.743353 ACPI: added table 1/32, length now 40
2148 09:44:52.743405 ACPI: * SSDT
2149 09:44:52.743457 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2150 09:44:52.743510 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2151 09:44:52.743563 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2152 09:44:52.743616 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2153 09:44:52.743689 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2154 09:44:52.743745 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2155 09:44:52.743797 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2156 09:44:52.743851 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2157 09:44:52.743904 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2158 09:44:52.743956 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2159 09:44:52.744008 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2160 09:44:52.744060 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2161 09:44:52.744112 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2162 09:44:52.744164 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2163 09:44:52.744216 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2164 09:44:52.744269 PS2K: Passing 80 keymaps to kernel
2165 09:44:52.744321 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2166 09:44:52.744373 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2167 09:44:52.744425 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2168 09:44:52.744478 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2169 09:44:52.744530 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2170 09:44:52.744583 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2171 09:44:52.744635 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2172 09:44:52.744686 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2173 09:44:52.744739 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2174 09:44:52.744791 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2175 09:44:52.744843 ACPI: added table 2/32, length now 44
2176 09:44:52.744895 ACPI: * MCFG
2177 09:44:52.744947 ACPI: added table 3/32, length now 48
2178 09:44:52.744998 ACPI: * TPM2
2179 09:44:52.745064 TPM2 log created at 0x7685e000
2180 09:44:52.745117 ACPI: added table 4/32, length now 52
2181 09:44:52.745169 ACPI: * LPIT
2182 09:44:52.745222 ACPI: added table 5/32, length now 56
2183 09:44:52.745273 ACPI: * MADT
2184 09:44:52.745324 SCI is IRQ9
2185 09:44:52.745377 ACPI: added table 6/32, length now 60
2186 09:44:52.745429 cmd_reg from pmc_make_ipc_cmd 1052838
2187 09:44:52.745482 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2188 09:44:52.745535 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2189 09:44:52.745588 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2190 09:44:52.745640 PMC CrashLog size in discovery mode: 0xC00
2191 09:44:52.745693 cpu crashlog bar addr: 0x80640000
2192 09:44:52.745745 cpu discovery table offset: 0x6030
2193 09:44:52.745797 cpu_crashlog_discovery_table buffer count: 0x3
2194 09:44:52.745850 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2195 09:44:52.745924 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2196 09:44:52.746005 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2197 09:44:52.746086 PMC crashLog size in discovery mode : 0xC00
2198 09:44:52.746167 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2199 09:44:52.746249 discover mode PMC crashlog size adjusted to: 0x200
2200 09:44:52.746332 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2201 09:44:52.746416 discover mode PMC crashlog size adjusted to: 0x0
2202 09:44:52.746474 m_cpu_crashLog_size : 0x3480 bytes
2203 09:44:52.746530 CPU crashLog present.
2204 09:44:52.746584 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2205 09:44:52.746638 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2206 09:44:52.746691 current = 76877550
2207 09:44:52.746743 ACPI: * DMAR
2208 09:44:52.746795 ACPI: added table 7/32, length now 64
2209 09:44:52.746847 ACPI: added table 8/32, length now 68
2210 09:44:52.746898 ACPI: * HPET
2211 09:44:52.746949 ACPI: added table 9/32, length now 72
2212 09:44:52.747001 ACPI: done.
2213 09:44:52.747052 ACPI tables: 38528 bytes.
2214 09:44:52.747105 smbios_write_tables: 76858000
2215 09:44:52.747158 EC returned error result code 3
2216 09:44:52.747210 Couldn't obtain OEM name from CBI
2217 09:44:52.747262 Create SMBIOS type 16
2218 09:44:52.747314 Create SMBIOS type 17
2219 09:44:52.747366 Create SMBIOS type 20
2220 09:44:52.747417 GENERIC: 0.0 (WIFI Device)
2221 09:44:52.747468 SMBIOS tables: 2156 bytes.
2222 09:44:52.747520 Writing table forward entry at 0x00000500
2223 09:44:52.747572 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2224 09:44:52.747819 Writing coreboot table at 0x76892000
2225 09:44:52.747877 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2226 09:44:52.747931 1. 0000000000001000-000000000009ffff: RAM
2227 09:44:52.747984 2. 00000000000a0000-00000000000fffff: RESERVED
2228 09:44:52.748036 3. 0000000000100000-0000000076857fff: RAM
2229 09:44:52.748087 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2230 09:44:52.748138 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2231 09:44:52.748191 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2232 09:44:52.748243 7. 0000000077000000-00000000803fffff: RESERVED
2233 09:44:52.748294 8. 00000000c0000000-00000000cfffffff: RESERVED
2234 09:44:52.748345 9. 00000000f8000000-00000000f9ffffff: RESERVED
2235 09:44:52.748396 10. 00000000fb000000-00000000fb000fff: RESERVED
2236 09:44:52.748449 11. 00000000fc800000-00000000fe7fffff: RESERVED
2237 09:44:52.748501 12. 00000000feb00000-00000000feb7ffff: RESERVED
2238 09:44:52.748553 13. 00000000fec00000-00000000fecfffff: RESERVED
2239 09:44:52.748606 14. 00000000fed40000-00000000fed6ffff: RESERVED
2240 09:44:52.748685 15. 00000000fed80000-00000000fed87fff: RESERVED
2241 09:44:52.748774 16. 00000000fed90000-00000000fed92fff: RESERVED
2242 09:44:52.748832 17. 00000000feda0000-00000000feda1fff: RESERVED
2243 09:44:52.748887 18. 00000000fedc0000-00000000feddffff: RESERVED
2244 09:44:52.748940 19. 0000000100000000-000000027fbfffff: RAM
2245 09:44:52.748992 Passing 4 GPIOs to payload:
2246 09:44:52.749052 NAME | PORT | POLARITY | VALUE
2247 09:44:52.749105 lid | undefined | high | high
2248 09:44:52.749156 power | undefined | high | low
2249 09:44:52.749207 oprom | undefined | high | low
2250 09:44:52.749258 EC in RW | 0x00000151 | high | low
2251 09:44:52.749310 Board ID: 3
2252 09:44:52.749361 FW config: 0x131
2253 09:44:52.749413 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 7a07
2254 09:44:52.749464 coreboot table: 1764 bytes.
2255 09:44:52.749515 IMD ROOT 0. 0x76fff000 0x00001000
2256 09:44:52.749566 IMD SMALL 1. 0x76ffe000 0x00001000
2257 09:44:52.749617 FSP MEMORY 2. 0x76afe000 0x00500000
2258 09:44:52.749673 CONSOLE 3. 0x76ade000 0x00020000
2259 09:44:52.749731 RO MCACHE 4. 0x76add000 0x00000fd8
2260 09:44:52.749790 FMAP 5. 0x76adc000 0x0000064a
2261 09:44:52.749859 TIME STAMP 6. 0x76adb000 0x00000910
2262 09:44:52.749945 VBOOT WORK 7. 0x76ac7000 0x00014000
2263 09:44:52.750031 MEM INFO 8. 0x76ac6000 0x000003b8
2264 09:44:52.750107 ROMSTG STCK 9. 0x76ac5000 0x00001000
2265 09:44:52.750183 AFTER CAR 10. 0x76ab9000 0x0000c000
2266 09:44:52.750266 RAMSTAGE 11. 0x76a2f000 0x0008a000
2267 09:44:52.750330 ACPI BERT 12. 0x76a1f000 0x00010000
2268 09:44:52.750383 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2269 09:44:52.750434 REFCODE 14. 0x769af000 0x0006f000
2270 09:44:52.750490 SMM BACKUP 15. 0x7699f000 0x00010000
2271 09:44:52.750547 IGD OPREGION16. 0x7699a000 0x00004203
2272 09:44:52.750598 RAMOOPS 17. 0x7689a000 0x00100000
2273 09:44:52.750649 COREBOOT 18. 0x76892000 0x00008000
2274 09:44:52.750703 ACPI 19. 0x7686e000 0x00024000
2275 09:44:52.750772 TPM2 TCGLOG20. 0x7685e000 0x00010000
2276 09:44:52.750826 PMC CRASHLOG21. 0x7685d000 0x00000c00
2277 09:44:52.750878 CPU CRASHLOG22. 0x76859000 0x00003480
2278 09:44:52.750929 SMBIOS 23. 0x76858000 0x00001000
2279 09:44:52.750980 IMD small region:
2280 09:44:52.751031 IMD ROOT 0. 0x76ffec00 0x00000400
2281 09:44:52.751082 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2282 09:44:52.751134 VPD 2. 0x76ffeb60 0x0000006c
2283 09:44:52.751185 POWER STATE 3. 0x76ffeb00 0x00000044
2284 09:44:52.751237 ROMSTAGE 4. 0x76ffeae0 0x00000004
2285 09:44:52.751289 ACPI GNVS 5. 0x76ffea80 0x00000048
2286 09:44:52.751340 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2287 09:44:52.751392 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2288 09:44:52.751444 MTRR: Physical address space:
2289 09:44:52.751496 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2290 09:44:52.751550 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2291 09:44:52.751603 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2292 09:44:52.751656 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2293 09:44:52.751709 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2294 09:44:52.751777 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2295 09:44:52.751827 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2296 09:44:52.751877 MTRR: Fixed MSR 0x250 0x0606060606060606
2297 09:44:52.751925 MTRR: Fixed MSR 0x258 0x0606060606060606
2298 09:44:52.751976 MTRR: Fixed MSR 0x259 0x0000000000000000
2299 09:44:52.752025 MTRR: Fixed MSR 0x268 0x0606060606060606
2300 09:44:52.752074 MTRR: Fixed MSR 0x269 0x0606060606060606
2301 09:44:52.752123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2302 09:44:52.752172 MTRR: Fixed MSR 0x26b 0x0606060606060606
2303 09:44:52.752221 MTRR: Fixed MSR 0x26c 0x0606060606060606
2304 09:44:52.752269 MTRR: Fixed MSR 0x26d 0x0606060606060606
2305 09:44:52.752318 MTRR: Fixed MSR 0x26e 0x0606060606060606
2306 09:44:52.752367 MTRR: Fixed MSR 0x26f 0x0606060606060606
2307 09:44:52.752416 call enable_fixed_mtrr()
2308 09:44:52.752465 CPU physical address size: 39 bits
2309 09:44:52.752514 MTRR: default type WB/UC MTRR counts: 6/6.
2310 09:44:52.752563 MTRR: UC selected as default type.
2311 09:44:52.752611 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2312 09:44:52.752661 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2313 09:44:52.752710 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2314 09:44:52.752759 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2315 09:44:52.752999 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2316 09:44:52.753066 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2317 09:44:52.753117 MTRR: Fixed MSR 0x250 0x0606060606060606
2318 09:44:52.753167 MTRR: Fixed MSR 0x258 0x0606060606060606
2319 09:44:52.753217 MTRR: Fixed MSR 0x259 0x0000000000000000
2320 09:44:52.753267 MTRR: Fixed MSR 0x268 0x0606060606060606
2321 09:44:52.753316 MTRR: Fixed MSR 0x269 0x0606060606060606
2322 09:44:52.753365 MTRR: Fixed MSR 0x26a 0x0606060606060606
2323 09:44:52.753414 MTRR: Fixed MSR 0x26b 0x0606060606060606
2324 09:44:52.753463 MTRR: Fixed MSR 0x26c 0x0606060606060606
2325 09:44:52.753513 MTRR: Fixed MSR 0x26d 0x0606060606060606
2326 09:44:52.753561 MTRR: Fixed MSR 0x26e 0x0606060606060606
2327 09:44:52.753610 MTRR: Fixed MSR 0x26f 0x0606060606060606
2328 09:44:52.753659 MTRR: Fixed MSR 0x250 0x0606060606060606
2329 09:44:52.753707 MTRR: Fixed MSR 0x250 0x0606060606060606
2330 09:44:52.753756 MTRR: Fixed MSR 0x250 0x0606060606060606
2331 09:44:52.753805 MTRR: Fixed MSR 0x250 0x0606060606060606
2332 09:44:52.753853 MTRR: Fixed MSR 0x258 0x0606060606060606
2333 09:44:52.753903 MTRR: Fixed MSR 0x259 0x0000000000000000
2334 09:44:52.753952 MTRR: Fixed MSR 0x268 0x0606060606060606
2335 09:44:52.754001 MTRR: Fixed MSR 0x269 0x0606060606060606
2336 09:44:52.754050 MTRR: Fixed MSR 0x26a 0x0606060606060606
2337 09:44:52.754099 MTRR: Fixed MSR 0x26b 0x0606060606060606
2338 09:44:52.754147 MTRR: Fixed MSR 0x26c 0x0606060606060606
2339 09:44:52.754196 MTRR: Fixed MSR 0x26d 0x0606060606060606
2340 09:44:52.754244 MTRR: Fixed MSR 0x26e 0x0606060606060606
2341 09:44:52.754292 MTRR: Fixed MSR 0x26f 0x0606060606060606
2342 09:44:52.754341 MTRR: Fixed MSR 0x258 0x0606060606060606
2343 09:44:52.754390 call enable_fixed_mtrr()
2344 09:44:52.754439 MTRR: Fixed MSR 0x250 0x0606060606060606
2345 09:44:52.754487 MTRR: Fixed MSR 0x258 0x0606060606060606
2346 09:44:52.754536 MTRR: Fixed MSR 0x259 0x0000000000000000
2347 09:44:52.754584 MTRR: Fixed MSR 0x268 0x0606060606060606
2348 09:44:52.754633 MTRR: Fixed MSR 0x269 0x0606060606060606
2349 09:44:52.754681 MTRR: Fixed MSR 0x258 0x0606060606060606
2350 09:44:52.754729 MTRR: Fixed MSR 0x259 0x0000000000000000
2351 09:44:52.754777 MTRR: Fixed MSR 0x268 0x0606060606060606
2352 09:44:52.754826 MTRR: Fixed MSR 0x269 0x0606060606060606
2353 09:44:52.754875 MTRR: Fixed MSR 0x26a 0x0606060606060606
2354 09:44:52.754925 MTRR: Fixed MSR 0x26b 0x0606060606060606
2355 09:44:52.754973 MTRR: Fixed MSR 0x26c 0x0606060606060606
2356 09:44:52.755022 MTRR: Fixed MSR 0x26d 0x0606060606060606
2357 09:44:52.755071 MTRR: Fixed MSR 0x26e 0x0606060606060606
2358 09:44:52.755120 MTRR: Fixed MSR 0x26f 0x0606060606060606
2359 09:44:52.755168 MTRR: Fixed MSR 0x259 0x0000000000000000
2360 09:44:52.755216 MTRR: Fixed MSR 0x26a 0x0606060606060606
2361 09:44:52.755266 MTRR: Fixed MSR 0x268 0x0606060606060606
2362 09:44:52.755315 MTRR: Fixed MSR 0x269 0x0606060606060606
2363 09:44:52.755364 call enable_fixed_mtrr()
2364 09:44:52.755413 call enable_fixed_mtrr()
2365 09:44:52.755461 MTRR: Fixed MSR 0x26b 0x0606060606060606
2366 09:44:52.755510 MTRR: Fixed MSR 0x26c 0x0606060606060606
2367 09:44:52.755559 MTRR: Fixed MSR 0x26d 0x0606060606060606
2368 09:44:52.755607 MTRR: Fixed MSR 0x26e 0x0606060606060606
2369 09:44:52.755656 MTRR: Fixed MSR 0x26f 0x0606060606060606
2370 09:44:52.755706 MTRR: Fixed MSR 0x26a 0x0606060606060606
2371 09:44:52.755755 CPU physical address size: 39 bits
2372 09:44:52.755805 CPU physical address size: 39 bits
2373 09:44:52.755854 call enable_fixed_mtrr()
2374 09:44:52.755903 CPU physical address size: 39 bits
2375 09:44:52.755951 CPU physical address size: 39 bits
2376 09:44:52.756000 MTRR: Fixed MSR 0x26b 0x0606060606060606
2377 09:44:52.756049 MTRR: Fixed MSR 0x26c 0x0606060606060606
2378 09:44:52.756097 MTRR: Fixed MSR 0x26d 0x0606060606060606
2379 09:44:52.756146 MTRR: Fixed MSR 0x26e 0x0606060606060606
2380 09:44:52.756195 MTRR: Fixed MSR 0x26f 0x0606060606060606
2381 09:44:52.756243 MTRR: Fixed MSR 0x258 0x0606060606060606
2382 09:44:52.756292 call enable_fixed_mtrr()
2383 09:44:52.756341 MTRR: Fixed MSR 0x250 0x0606060606060606
2384 09:44:52.756390 CPU physical address size: 39 bits
2385 09:44:52.756438 MTRR: Fixed MSR 0x259 0x0000000000000000
2386 09:44:52.756488 MTRR: Fixed MSR 0x258 0x0606060606060606
2387 09:44:52.756537 MTRR: Fixed MSR 0x268 0x0606060606060606
2388 09:44:52.756585 MTRR: Fixed MSR 0x269 0x0606060606060606
2389 09:44:52.756633 MTRR: Fixed MSR 0x259 0x0000000000000000
2390 09:44:52.756683 MTRR: Fixed MSR 0x268 0x0606060606060606
2391 09:44:52.756732 MTRR: Fixed MSR 0x269 0x0606060606060606
2392 09:44:52.756781 MTRR: Fixed MSR 0x26a 0x0606060606060606
2393 09:44:52.756829 MTRR: Fixed MSR 0x26b 0x0606060606060606
2394 09:44:52.756878 MTRR: Fixed MSR 0x26c 0x0606060606060606
2395 09:44:52.756927 MTRR: Fixed MSR 0x26d 0x0606060606060606
2396 09:44:52.756975 MTRR: Fixed MSR 0x26e 0x0606060606060606
2397 09:44:52.757028 MTRR: Fixed MSR 0x26f 0x0606060606060606
2398 09:44:52.757078 MTRR: Fixed MSR 0x26a 0x0606060606060606
2399 09:44:52.757126 call enable_fixed_mtrr()
2400 09:44:52.757175 MTRR: Fixed MSR 0x26b 0x0606060606060606
2401 09:44:52.757225 MTRR: Fixed MSR 0x26c 0x0606060606060606
2402 09:44:52.757274 MTRR: Fixed MSR 0x26d 0x0606060606060606
2403 09:44:52.757323 MTRR: Fixed MSR 0x26e 0x0606060606060606
2404 09:44:52.757372 MTRR: Fixed MSR 0x26f 0x0606060606060606
2405 09:44:52.757421 CPU physical address size: 39 bits
2406 09:44:52.757469 call enable_fixed_mtrr()
2407 09:44:52.757519 CPU physical address size: 39 bits
2408 09:44:52.757567
2409 09:44:52.757616 MTRR check
2410 09:44:52.757665 Fixed MTRRs : Enabled
2411 09:44:52.757714 Variable MTRRs: Enabled
2412 09:44:52.757762
2413 09:44:52.757811 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2414 09:44:52.757861 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2415 09:44:52.757911 Checking segment from ROM address 0xffc26dac
2416 09:44:52.757960 Checking segment from ROM address 0xffc26dc8
2417 09:44:52.758197 Loading segment from ROM address 0xffc26dac
2418 09:44:52.758256 code (compression=1)
2419 09:44:52.758307 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2420 09:44:52.758358 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2421 09:44:52.758408 using LZMA
2422 09:44:52.758457 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2423 09:44:52.758507 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2424 09:44:52.758555 Loading segment from ROM address 0xffc26dc8
2425 09:44:52.758604 Entry Point 0x30000000
2426 09:44:52.758652 Loaded segments
2427 09:44:52.758701 BS: BS_PAYLOAD_LOAD run times (exec / console): 86 / 62 ms
2428 09:44:52.758751 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2429 09:44:52.758801 Finalizing chipset.
2430 09:44:52.758850 apm_control: Finalizing SMM.
2431 09:44:52.758899 APMC done.
2432 09:44:52.758948 HECI: CSE device 16.0 is hidden
2433 09:44:52.758997 HECI: CSE device 16.1 is disabled
2434 09:44:52.759046 HECI: CSE device 16.2 is disabled
2435 09:44:52.759095 HECI: CSE device 16.3 is disabled
2436 09:44:52.759143 HECI: CSE device 16.4 is disabled
2437 09:44:52.759193 HECI: CSE device 16.5 is disabled
2438 09:44:52.759242 HECI: CSE device 16.0 is hidden
2439 09:44:52.759291 CSE is disabled, cannot send End-of-Post (EOP) message
2440 09:44:52.759341 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2441 09:44:52.759390 mp_park_aps done after 0 msecs.
2442 09:44:52.759439 Jumping to boot code at 0x30000000(0x76892000)
2443 09:44:52.759488 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2444 09:44:52.759538
2445 09:44:52.759587
2446 09:44:52.759636
2447 09:44:52.759684 Starting depthcharge on Volmar...
2448 09:44:52.759733
2449 09:44:52.759781 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2450 09:44:52.759831
2451 09:44:52.759880 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2452 09:44:52.759929
2453 09:44:52.759978 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2454 09:44:52.760027
2455 09:44:52.760076 configure_storage: Failed to remap 1C:2
2456 09:44:52.760126
2457 09:44:52.760174 Wipe memory regions:
2458 09:44:52.760223
2459 09:44:52.760272 [0x00000000001000, 0x000000000a0000)
2460 09:44:52.760322
2461 09:44:52.760371 [0x00000000100000, 0x00000030000000)
2462 09:44:52.760687 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2463 09:44:52.760774 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2464 09:44:52.760843 Setting prompt string to ['brya:']
2465 09:44:52.760912 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2466 09:44:52.844886
2467 09:44:52.848027 [0x00000032668e60, 0x00000076858000)
2468 09:44:52.992022
2469 09:44:52.995321 [0x00000100000000, 0x0000027fc00000)
2470 09:44:53.812762
2471 09:44:53.815917 ec_init: CrosEC protocol v3 supported (256, 256)
2472 09:44:54.424263
2473 09:44:54.424402 R8152: Initializing
2474 09:44:54.424492
2475 09:44:54.427490 Version 9 (ocp_data = 6010)
2476 09:44:54.427589
2477 09:44:54.430886 R8152: Done initializing
2478 09:44:54.431040
2479 09:44:54.434153 Adding net device
2480 09:44:54.735450
2481 09:44:54.738770 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2482 09:44:54.738854
2483 09:44:54.738916
2484 09:44:54.739186 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2486 09:44:54.839494 brya: tftpboot 192.168.201.1 14392697/tftp-deploy-ddklckz4/kernel/bzImage 14392697/tftp-deploy-ddklckz4/kernel/cmdline 14392697/tftp-deploy-ddklckz4/ramdisk/ramdisk.cpio.gz
2487 09:44:54.839724 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2488 09:44:54.839804 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2489 09:44:54.844008 tftpboot 192.168.201.1 14392697/tftp-deploy-ddklckz4/kernel/bzImploy-ddklckz4/kernel/cmdline 14392697/tftp-deploy-ddklckz4/ramdisk/ramdisk.cpio.gz
2490 09:44:54.844091
2491 09:44:54.844152 Waiting for link
2492 09:44:55.046798
2493 09:44:55.046922 done.
2494 09:44:55.046984
2495 09:44:55.047041 MAC: 00:e0:4c:68:01:22
2496 09:44:55.047095
2497 09:44:55.049747 Sending DHCP discover... done.
2498 09:44:55.049824
2499 09:44:55.053546 Waiting for reply... done.
2500 09:44:55.053624
2501 09:44:55.058148 Sending DHCP request... done.
2502 09:44:55.058225
2503 09:44:55.063272 Waiting for reply... done.
2504 09:44:55.063349
2505 09:44:55.063408 My ip is 192.168.201.15
2506 09:44:55.063463
2507 09:44:55.066537 The DHCP server ip is 192.168.201.1
2508 09:44:55.066615
2509 09:44:55.073249 TFTP server IP predefined by user: 192.168.201.1
2510 09:44:55.073328
2511 09:44:55.079955 Bootfile predefined by user: 14392697/tftp-deploy-ddklckz4/kernel/bzImage
2512 09:44:55.080033
2513 09:44:55.083053 Sending tftp read request... done.
2514 09:44:55.083130
2515 09:44:55.086757 Waiting for the transfer...
2516 09:44:55.086836
2517 09:44:55.367341 00000000 ################################################################
2518 09:44:55.367459
2519 09:44:55.626530 00080000 ################################################################
2520 09:44:55.626651
2521 09:44:55.890658 00100000 ################################################################
2522 09:44:55.890775
2523 09:44:56.154075 00180000 ################################################################
2524 09:44:56.154199
2525 09:44:56.412842 00200000 ################################################################
2526 09:44:56.412987
2527 09:44:56.673469 00280000 ################################################################
2528 09:44:56.673586
2529 09:44:56.931546 00300000 ################################################################
2530 09:44:56.931695
2531 09:44:57.194890 00380000 ################################################################
2532 09:44:57.195008
2533 09:44:57.456896 00400000 ################################################################
2534 09:44:57.457084
2535 09:44:57.713664 00480000 ################################################################
2536 09:44:57.713775
2537 09:44:57.966371 00500000 ################################################################
2538 09:44:57.966485
2539 09:44:58.237979 00580000 ################################################################
2540 09:44:58.238095
2541 09:44:58.499953 00600000 ################################################################
2542 09:44:58.500073
2543 09:44:58.762694 00680000 ################################################################
2544 09:44:58.762808
2545 09:44:59.033617 00700000 ################################################################
2546 09:44:59.033737
2547 09:44:59.280348 00780000 ################################################################
2548 09:44:59.280465
2549 09:44:59.534250 00800000 ################################################################
2550 09:44:59.534385
2551 09:44:59.781370 00880000 ################################################################
2552 09:44:59.781569
2553 09:45:00.034410 00900000 ################################################################
2554 09:45:00.034529
2555 09:45:00.294350 00980000 ################################################################
2556 09:45:00.294478
2557 09:45:00.551291 00a00000 ################################################################
2558 09:45:00.551409
2559 09:45:00.813278 00a80000 ################################################################
2560 09:45:00.813403
2561 09:45:01.070779 00b00000 ################################################################
2562 09:45:01.070907
2563 09:45:01.324451 00b80000 ################################################################
2564 09:45:01.324569
2565 09:45:01.582006 00c00000 ################################################################
2566 09:45:01.582130
2567 09:45:01.832774 00c80000 ################################################################
2568 09:45:01.832898
2569 09:45:02.087691 00d00000 ################################################################ done.
2570 09:45:02.087840
2571 09:45:02.091105 The bootfile was 14155664 bytes long.
2572 09:45:02.091190
2573 09:45:02.094351 Sending tftp read request... done.
2574 09:45:02.094445
2575 09:45:02.097684 Waiting for the transfer...
2576 09:45:02.097762
2577 09:45:02.349945 00000000 ################################################################
2578 09:45:02.350075
2579 09:45:02.598695 00080000 ################################################################
2580 09:45:02.598817
2581 09:45:02.850248 00100000 ################################################################
2582 09:45:02.850406
2583 09:45:03.102253 00180000 ################################################################
2584 09:45:03.102375
2585 09:45:03.355329 00200000 ################################################################
2586 09:45:03.355461
2587 09:45:03.605686 00280000 ################################################################
2588 09:45:03.605813
2589 09:45:03.854003 00300000 ################################################################
2590 09:45:03.854131
2591 09:45:04.101572 00380000 ################################################################
2592 09:45:04.101691
2593 09:45:04.338807 00400000 ################################################################
2594 09:45:04.338971
2595 09:45:04.592969 00480000 ################################################################
2596 09:45:04.593130
2597 09:45:04.855928 00500000 ################################################################
2598 09:45:04.856058
2599 09:45:05.108950 00580000 ################################################################
2600 09:45:05.109149
2601 09:45:05.369521 00600000 ################################################################
2602 09:45:05.369681
2603 09:45:05.618889 00680000 ################################################################
2604 09:45:05.619020
2605 09:45:05.866747 00700000 ################################################################
2606 09:45:05.866872
2607 09:45:06.113933 00780000 ################################################################
2608 09:45:06.114060
2609 09:45:06.363738 00800000 ################################################################
2610 09:45:06.363857
2611 09:45:06.612547 00880000 ################################################################
2612 09:45:06.612676
2613 09:45:06.617801 00900000 ## done.
2614 09:45:06.617881
2615 09:45:06.621136 Sending tftp read request... done.
2616 09:45:06.621214
2617 09:45:06.624377 Waiting for the transfer...
2618 09:45:06.624464
2619 09:45:06.627610 00000000 # done.
2620 09:45:06.627690
2621 09:45:06.637208 Command line loaded dynamically from TFTP file: 14392697/tftp-deploy-ddklckz4/kernel/cmdline
2622 09:45:06.637288
2623 09:45:06.650937 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2624 09:45:06.657934
2625 09:45:06.661577 Shutting down all USB controllers.
2626 09:45:06.661656
2627 09:45:06.661715 Removing current net device
2628 09:45:06.661771
2629 09:45:06.664941 Finalizing coreboot
2630 09:45:06.665075
2631 09:45:06.671274 Exiting depthcharge with code 4 at timestamp: 23886076
2632 09:45:06.671377
2633 09:45:06.671494
2634 09:45:06.671575 Starting kernel ...
2635 09:45:06.671655
2636 09:45:06.671734
2637 09:45:06.672504 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2638 09:45:06.672641 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2639 09:45:06.672744 Setting prompt string to ['Linux version [0-9]']
2640 09:45:06.672807 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2641 09:45:06.672869 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2643 09:49:38.673546 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2645 09:49:38.674526 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2647 09:49:38.675335 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2650 09:49:38.676690 end: 2 depthcharge-action (duration 00:05:00) [common]
2652 09:49:38.677804 Cleaning after the job
2653 09:49:38.678232 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/ramdisk
2654 09:49:38.683787 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/kernel
2655 09:49:38.691666 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392697/tftp-deploy-ddklckz4/modules
2656 09:49:38.694016 start: 4.1 power-off (timeout 00:00:30) [common]
2657 09:49:38.694667 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-4', '--port=1', '--command=off']
2658 09:49:39.627428 >> Command sent successfully.
2659 09:49:39.637759 Returned 0 in 0 seconds
2660 09:49:39.738905 end: 4.1 power-off (duration 00:00:01) [common]
2662 09:49:39.740661 start: 4.2 read-feedback (timeout 00:09:59) [common]
2663 09:49:39.742202 Listened to connection for namespace 'common' for up to 1s
2665 09:49:39.743654 Listened to connection for namespace 'common' for up to 1s
2666 09:49:40.742513 Finalising connection for namespace 'common'
2667 09:49:40.743182 Disconnecting from shell: Finalise
2668 09:49:40.743586
2669 09:49:40.844181 end: 4.2 read-feedback (duration 00:00:01) [common]
2670 09:49:40.844313 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14392697
2671 09:49:40.860342 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14392697
2672 09:49:40.860536 JobError: Your job cannot terminate cleanly.