Boot log: acer-cp514-2h-1130g7-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 09:44:31.843032 lava-dispatcher, installed at version: 2024.03
2 09:44:31.843246 start: 0 validate
3 09:44:31.843379 Start time: 2024-06-17 09:44:31.843372+00:00 (UTC)
4 09:44:31.843506 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:44:31.843637 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 09:44:32.099459 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:44:32.100136 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2561-g409c5ed72dea9%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:44:32.354094 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:44:32.354804 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2561-g409c5ed72dea9%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 09:44:41.969383 validate duration: 10.13
12 09:44:41.970635 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:44:41.971327 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:44:41.972024 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:44:41.972658 Not decompressing ramdisk as can be used compressed.
16 09:44:41.973089 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 09:44:41.973159 saving as /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/ramdisk/rootfs.cpio.gz
18 09:44:41.973223 total size: 8417901 (8 MB)
19 09:44:43.650801 progress 0 % (0 MB)
20 09:44:43.663686 progress 5 % (0 MB)
21 09:44:43.676646 progress 10 % (0 MB)
22 09:44:43.684113 progress 15 % (1 MB)
23 09:44:43.689683 progress 20 % (1 MB)
24 09:44:43.694142 progress 25 % (2 MB)
25 09:44:43.698359 progress 30 % (2 MB)
26 09:44:43.701783 progress 35 % (2 MB)
27 09:44:43.704998 progress 40 % (3 MB)
28 09:44:43.708088 progress 45 % (3 MB)
29 09:44:43.710995 progress 50 % (4 MB)
30 09:44:43.713665 progress 55 % (4 MB)
31 09:44:43.716313 progress 60 % (4 MB)
32 09:44:43.718627 progress 65 % (5 MB)
33 09:44:43.721163 progress 70 % (5 MB)
34 09:44:43.723953 progress 75 % (6 MB)
35 09:44:43.726590 progress 80 % (6 MB)
36 09:44:43.728828 progress 85 % (6 MB)
37 09:44:43.731132 progress 90 % (7 MB)
38 09:44:43.733363 progress 95 % (7 MB)
39 09:44:43.735571 progress 100 % (8 MB)
40 09:44:43.735797 8 MB downloaded in 1.76 s (4.55 MB/s)
41 09:44:43.735950 end: 1.1.1 http-download (duration 00:00:02) [common]
43 09:44:43.736180 end: 1.1 download-retry (duration 00:00:02) [common]
44 09:44:43.736264 start: 1.2 download-retry (timeout 00:09:58) [common]
45 09:44:43.736349 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 09:44:43.736481 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2561-g409c5ed72dea9/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 09:44:43.736560 saving as /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/kernel/bzImage
48 09:44:43.736630 total size: 14155664 (13 MB)
49 09:44:43.736707 No compression specified
50 09:44:43.988407 progress 0 % (0 MB)
51 09:44:44.010138 progress 5 % (0 MB)
52 09:44:44.024552 progress 10 % (1 MB)
53 09:44:44.032340 progress 15 % (2 MB)
54 09:44:44.038761 progress 20 % (2 MB)
55 09:44:44.043983 progress 25 % (3 MB)
56 09:44:44.048826 progress 30 % (4 MB)
57 09:44:44.053140 progress 35 % (4 MB)
58 09:44:44.056969 progress 40 % (5 MB)
59 09:44:44.060765 progress 45 % (6 MB)
60 09:44:44.064289 progress 50 % (6 MB)
61 09:44:44.067961 progress 55 % (7 MB)
62 09:44:44.071720 progress 60 % (8 MB)
63 09:44:44.075249 progress 65 % (8 MB)
64 09:44:44.078990 progress 70 % (9 MB)
65 09:44:44.082467 progress 75 % (10 MB)
66 09:44:44.086018 progress 80 % (10 MB)
67 09:44:44.089616 progress 85 % (11 MB)
68 09:44:44.093106 progress 90 % (12 MB)
69 09:44:44.096743 progress 95 % (12 MB)
70 09:44:44.100231 progress 100 % (13 MB)
71 09:44:44.100469 13 MB downloaded in 0.36 s (37.10 MB/s)
72 09:44:44.100613 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:44:44.100848 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:44:44.100933 start: 1.3 download-retry (timeout 00:09:58) [common]
76 09:44:44.101015 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 09:44:44.101146 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2561-g409c5ed72dea9/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 09:44:44.101213 saving as /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/modules/modules.tar
79 09:44:44.101272 total size: 714764 (0 MB)
80 09:44:44.101331 Using unxz to decompress xz
81 09:44:44.105317 progress 4 % (0 MB)
82 09:44:44.105741 progress 9 % (0 MB)
83 09:44:44.107577 progress 18 % (0 MB)
84 09:44:44.111214 progress 27 % (0 MB)
85 09:44:44.113114 progress 32 % (0 MB)
86 09:44:44.116780 progress 41 % (0 MB)
87 09:44:44.120087 progress 50 % (0 MB)
88 09:44:44.122019 progress 55 % (0 MB)
89 09:44:44.125773 progress 64 % (0 MB)
90 09:44:44.129369 progress 73 % (0 MB)
91 09:44:44.132775 progress 82 % (0 MB)
92 09:44:44.134532 progress 87 % (0 MB)
93 09:44:44.138317 progress 96 % (0 MB)
94 09:44:44.145662 0 MB downloaded in 0.04 s (15.36 MB/s)
95 09:44:44.145896 end: 1.3.1 http-download (duration 00:00:00) [common]
97 09:44:44.146175 end: 1.3 download-retry (duration 00:00:00) [common]
98 09:44:44.146271 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
99 09:44:44.146366 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
100 09:44:44.146453 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
101 09:44:44.146536 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
102 09:44:44.146771 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv
103 09:44:44.146901 makedir: /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin
104 09:44:44.147003 makedir: /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/tests
105 09:44:44.147101 makedir: /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/results
106 09:44:44.147233 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-add-keys
107 09:44:44.147381 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-add-sources
108 09:44:44.147509 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-background-process-start
109 09:44:44.147635 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-background-process-stop
110 09:44:44.147756 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-common-functions
111 09:44:44.147879 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-echo-ipv4
112 09:44:44.148001 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-install-packages
113 09:44:44.148123 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-installed-packages
114 09:44:44.148243 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-os-build
115 09:44:44.148366 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-probe-channel
116 09:44:44.148487 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-probe-ip
117 09:44:44.148608 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-target-ip
118 09:44:44.148728 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-target-mac
119 09:44:44.148848 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-target-storage
120 09:44:44.148973 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-case
121 09:44:44.149096 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-event
122 09:44:44.149230 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-feedback
123 09:44:44.149352 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-raise
124 09:44:44.149473 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-reference
125 09:44:44.149596 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-runner
126 09:44:44.149716 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-set
127 09:44:44.149839 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-test-shell
128 09:44:44.149963 Updating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-install-packages (oe)
129 09:44:44.150111 Updating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/bin/lava-installed-packages (oe)
130 09:44:44.150302 Creating /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/environment
131 09:44:44.150399 LAVA metadata
132 09:44:44.150472 - LAVA_JOB_ID=14392700
133 09:44:44.150534 - LAVA_DISPATCHER_IP=192.168.201.1
134 09:44:44.150632 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
135 09:44:44.150697 skipped lava-vland-overlay
136 09:44:44.150772 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
137 09:44:44.150851 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
138 09:44:44.150912 skipped lava-multinode-overlay
139 09:44:44.150981 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
140 09:44:44.151063 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
141 09:44:44.151134 Loading test definitions
142 09:44:44.151241 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
143 09:44:44.151317 Using /lava-14392700 at stage 0
144 09:44:44.151632 uuid=14392700_1.4.2.3.1 testdef=None
145 09:44:44.151719 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
146 09:44:44.151803 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
147 09:44:44.152329 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
149 09:44:44.152549 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
150 09:44:44.153168 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
152 09:44:44.153405 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
153 09:44:44.154005 runner path: /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/0/tests/0_dmesg test_uuid 14392700_1.4.2.3.1
154 09:44:44.154158 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
156 09:44:44.154369 Creating lava-test-runner.conf files
157 09:44:44.154431 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14392700/lava-overlay-i4ya3rdv/lava-14392700/0 for stage 0
158 09:44:44.154519 - 0_dmesg
159 09:44:44.154613 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
160 09:44:44.154697 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
161 09:44:44.164375 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
162 09:44:44.164537 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
163 09:44:44.164654 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
164 09:44:44.164792 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
165 09:44:44.164906 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
166 09:44:44.408497 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
167 09:44:44.408880 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
168 09:44:44.409009 extracting modules file /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14392700/extract-overlay-ramdisk-nkztrerh/ramdisk
169 09:44:44.431154 end: 1.4.4 extract-modules (duration 00:00:00) [common]
170 09:44:44.431311 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
171 09:44:44.431408 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14392700/compress-overlay-f729wbll/overlay-1.4.2.4.tar.gz to ramdisk
172 09:44:44.431479 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14392700/compress-overlay-f729wbll/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14392700/extract-overlay-ramdisk-nkztrerh/ramdisk
173 09:44:44.438179 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
174 09:44:44.438335 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
175 09:44:44.438427 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
176 09:44:44.438517 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
177 09:44:44.438594 Building ramdisk /var/lib/lava/dispatcher/tmp/14392700/extract-overlay-ramdisk-nkztrerh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14392700/extract-overlay-ramdisk-nkztrerh/ramdisk
178 09:44:44.578991 >> 53732 blocks
179 09:44:45.502799 rename /var/lib/lava/dispatcher/tmp/14392700/extract-overlay-ramdisk-nkztrerh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/ramdisk/ramdisk.cpio.gz
180 09:44:45.503247 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
181 09:44:45.503374 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
182 09:44:45.503486 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
183 09:44:45.503580 No mkimage arch provided, not using FIT.
184 09:44:45.503666 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
185 09:44:45.503749 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
186 09:44:45.503846 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
187 09:44:45.503933 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
188 09:44:45.504009 No LXC device requested
189 09:44:45.504132 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
190 09:44:45.504249 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
191 09:44:45.504335 end: 1.6 deploy-device-env (duration 00:00:00) [common]
192 09:44:45.504402 Checking files for TFTP limit of 4294967296 bytes.
193 09:44:45.504802 end: 1 tftp-deploy (duration 00:00:04) [common]
194 09:44:45.504903 start: 2 depthcharge-action (timeout 00:05:00) [common]
195 09:44:45.504997 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
196 09:44:45.505126 substitutions:
197 09:44:45.505194 - {DTB}: None
198 09:44:45.505255 - {INITRD}: 14392700/tftp-deploy-hn32_1xy/ramdisk/ramdisk.cpio.gz
199 09:44:45.505317 - {KERNEL}: 14392700/tftp-deploy-hn32_1xy/kernel/bzImage
200 09:44:45.505374 - {LAVA_MAC}: None
201 09:44:45.505429 - {PRESEED_CONFIG}: None
202 09:44:45.505482 - {PRESEED_LOCAL}: None
203 09:44:45.505561 - {RAMDISK}: 14392700/tftp-deploy-hn32_1xy/ramdisk/ramdisk.cpio.gz
204 09:44:45.505629 - {ROOT_PART}: None
205 09:44:45.505711 - {ROOT}: None
206 09:44:45.505794 - {SERVER_IP}: 192.168.201.1
207 09:44:45.505846 - {TEE}: None
208 09:44:45.505899 Parsed boot commands:
209 09:44:45.505952 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
210 09:44:45.506129 Parsed boot commands: tftpboot 192.168.201.1 14392700/tftp-deploy-hn32_1xy/kernel/bzImage 14392700/tftp-deploy-hn32_1xy/kernel/cmdline 14392700/tftp-deploy-hn32_1xy/ramdisk/ramdisk.cpio.gz
211 09:44:45.506264 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
212 09:44:45.506348 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
213 09:44:45.506444 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
214 09:44:45.506525 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
215 09:44:45.506592 Not connected, no need to disconnect.
216 09:44:45.506663 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
217 09:44:45.506777 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
218 09:44:45.506878 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-8'
219 09:44:45.510523 Setting prompt string to ['lava-test: # ']
220 09:44:45.510886 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
221 09:44:45.510994 end: 2.2.1 reset-connection (duration 00:00:00) [common]
222 09:44:45.511092 start: 2.2.2 reset-device (timeout 00:05:00) [common]
223 09:44:45.511178 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
224 09:44:45.511470 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-8']
225 09:44:54.154957 Returned 0 in 8 seconds
226 09:44:54.255710 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
228 09:44:54.256152 end: 2.2.2 reset-device (duration 00:00:09) [common]
229 09:44:54.256292 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
230 09:44:54.256408 Setting prompt string to 'Starting depthcharge on Voema...'
231 09:44:54.256529 Changing prompt to 'Starting depthcharge on Voema...'
232 09:44:54.256628 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
233 09:44:54.257223 [Enter `^Ec?' for help]
234 09:44:54.257313
235 09:44:54.257382
236 09:44:54.257475 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
237 09:44:54.257579 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
238 09:44:54.257689 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
239 09:44:54.257784 CPU: AES supported, TXT NOT supported, VT supported
240 09:44:54.257875 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
241 09:44:54.257964 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
242 09:44:54.258052 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
243 09:44:54.258169 VBOOT: Loading verstage.
244 09:44:54.258262 FMAP: Found "FLASH" version 1.1 at 0x1804000.
245 09:44:54.258319 FMAP: base = 0x0 size = 0x2000000 #areas = 32
246 09:44:54.258411 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
247 09:44:54.258469 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
248 09:44:54.258532 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
249 09:44:54.258623
250 09:44:54.258678
251 09:44:54.258743 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
252 09:44:54.258828 Probing TPM: . done!
253 09:44:54.258912 TPM ready after 0 ms
254 09:44:54.258997 Connected to device vid:did:rid of 1ae0:0028:00
255 09:44:54.259081 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
256 09:44:54.259170 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
257 09:44:54.259264 Initialized TPM device CR50 revision 0
258 09:44:54.259370 tlcl_send_startup: Startup return code is 0
259 09:44:54.259502 TPM: setup succeeded
260 09:44:54.259597 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
261 09:44:54.259693 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
262 09:44:54.259792 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
263 09:44:54.259884 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
264 09:44:54.259976 Chrome EC: UHEPI supported
265 09:44:54.260064 Phase 1
266 09:44:54.260149 FMAP: area GBB found @ 1805000 (458752 bytes)
267 09:44:54.260234 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
268 09:44:54.260321 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
269 09:44:54.260413 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
270 09:44:54.260498 VB2:vb2_check_recovery() Recovery was requested manually
271 09:44:54.260605 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
272 09:44:54.260690 Recovery requested (1009000e)
273 09:44:54.260775 TPM: Extending digest for VBOOT: boot mode into PCR 0
274 09:44:54.260859 tlcl_extend: response is 0
275 09:44:54.260943 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
276 09:44:54.261026 tlcl_extend: response is 0
277 09:44:54.261110 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
278 09:44:54.261202 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
279 09:44:54.261295 BS: verstage times (exec / console): total (unknown) / 148 ms
280 09:44:54.261394
281 09:44:54.261489
282 09:44:54.261583 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
283 09:44:54.261668 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
284 09:44:54.261766 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
285 09:44:54.261851 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
286 09:44:54.261955 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
287 09:44:54.262042 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
288 09:44:54.262127 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
289 09:44:54.262204 TCO_STS: 0000 0000
290 09:44:54.262263 GEN_PMCON: d0015038 00002200
291 09:44:54.262346 GBLRST_CAUSE: 00000000 00000000
292 09:44:54.262429 HPR_CAUSE0: 00000000
293 09:44:54.262538 prev_sleep_state 5
294 09:44:54.262626 Boot Count incremented to 31464
295 09:44:54.262710 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 09:44:54.262822 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
297 09:44:54.262908 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
298 09:44:54.263022 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
299 09:44:54.263100 Chrome EC: UHEPI supported
300 09:44:54.263156 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
301 09:44:54.263234 Probing TPM: done!
302 09:44:54.263290 Connected to device vid:did:rid of 1ae0:0028:00
303 09:44:54.263344 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
304 09:44:54.263430 Initialized TPM device CR50 revision 0
305 09:44:54.263537 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
306 09:44:54.263633 MRC: Hash idx 0x100b comparison successful.
307 09:44:54.263689 MRC cache found, size faa8
308 09:44:54.263753 bootmode is set to: 2
309 09:44:54.263833 SPD index = 0
310 09:44:54.263887 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
311 09:44:54.263961 SPD: module type is LPDDR4X
312 09:44:54.264029 SPD: module part number is MT53E512M64D4NW-046
313 09:44:54.264083 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
314 09:44:54.264157 SPD: device width 16 bits, bus width 16 bits
315 09:44:54.264214 SPD: module size is 1024 MB (per channel)
316 09:44:54.264267 CBMEM:
317 09:44:54.264341 IMD: root @ 0x76fff000 254 entries.
318 09:44:54.264401 IMD: root @ 0x76ffec00 62 entries.
319 09:44:54.264454 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
320 09:44:54.264721 FMAP: area RW_VPD found @ f35000 (8192 bytes)
321 09:44:54.264815 External stage cache:
322 09:44:54.264902 IMD: root @ 0x7b3ff000 254 entries.
323 09:44:54.264985 IMD: root @ 0x7b3fec00 62 entries.
324 09:44:54.265067 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
325 09:44:54.265123 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
326 09:44:54.265176 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
327 09:44:54.265230 MRC: 'RECOVERY_MRC_CACHE' does not need update.
328 09:44:54.265308 cse_lite: Skip switching to RW in the recovery path
329 09:44:54.265413 8 DIMMs found
330 09:44:54.265512 SMM Memory Map
331 09:44:54.265606 SMRAM : 0x7b000000 0x800000
332 09:44:54.265690 Subregion 0: 0x7b000000 0x200000
333 09:44:54.265787 Subregion 1: 0x7b200000 0x200000
334 09:44:54.265872 Subregion 2: 0x7b400000 0x400000
335 09:44:54.265974 top_of_ram = 0x77000000
336 09:44:54.266065 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
337 09:44:54.266151 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
338 09:44:54.266247 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
339 09:44:54.266304 MTRR Range: Start=ff000000 End=0 (Size 1000000)
340 09:44:54.266358 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
341 09:44:54.266412 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
342 09:44:54.266465 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
343 09:44:54.266541 Processing 211 relocs. Offset value of 0x74c0b000
344 09:44:54.266596 BS: romstage times (exec / console): total (unknown) / 277 ms
345 09:44:54.266657
346 09:44:54.266772
347 09:44:54.266860 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
348 09:44:54.266962 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
349 09:44:54.267052 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
350 09:44:54.267147 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
351 09:44:54.267247 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
352 09:44:54.267334 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
353 09:44:54.267419 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
354 09:44:54.267482 Processing 5008 relocs. Offset value of 0x75d98000
355 09:44:54.267541 BS: postcar times (exec / console): total (unknown) / 59 ms
356 09:44:54.267629
357 09:44:54.267683
358 09:44:54.267761 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
359 09:44:54.267848 Normal boot
360 09:44:54.267944 FW_CONFIG value is 0x804c02
361 09:44:54.268002 PCI: 00:07.0 disabled by fw_config
362 09:44:54.268055 PCI: 00:07.1 disabled by fw_config
363 09:44:54.268127 PCI: 00:0d.2 disabled by fw_config
364 09:44:54.268185 PCI: 00:1c.7 disabled by fw_config
365 09:44:54.268239 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
366 09:44:54.268303 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
367 09:44:54.268383 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 09:44:54.268438 GENERIC: 0.0 disabled by fw_config
369 09:44:54.268501 GENERIC: 1.0 disabled by fw_config
370 09:44:54.268584 fw_config match found: DB_USB=USB3_ACTIVE
371 09:44:54.268639 fw_config match found: DB_USB=USB3_ACTIVE
372 09:44:54.268721 fw_config match found: DB_USB=USB3_ACTIVE
373 09:44:54.268809 fw_config match found: DB_USB=USB3_ACTIVE
374 09:44:54.268905 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
375 09:44:54.268990 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
376 09:44:54.269084 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
377 09:44:54.269170 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
378 09:44:54.269264 microcode: sig=0x806c1 pf=0x80 revision=0x86
379 09:44:54.269356 microcode: Update skipped, already up-to-date
380 09:44:54.269417 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
381 09:44:54.269507 Detected 4 core, 8 thread CPU.
382 09:44:54.269576 Setting up SMI for CPU
383 09:44:54.269629 IED base = 0x7b400000
384 09:44:54.269684 IED size = 0x00400000
385 09:44:54.269737 Will perform SMM setup.
386 09:44:54.269789 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
387 09:44:54.269843 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
388 09:44:54.269897 Processing 16 relocs. Offset value of 0x00030000
389 09:44:54.269950 Attempting to start 7 APs
390 09:44:54.270002 Waiting for 10ms after sending INIT.
391 09:44:54.270054 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
392 09:44:54.270107 AP: slot 4 apic_id 6.
393 09:44:54.270158 AP: slot 5 apic_id 7.
394 09:44:54.270287 AP: slot 2 apic_id 3.
395 09:44:54.270349 AP: slot 6 apic_id 2.
396 09:44:54.270402 AP: slot 3 apic_id 5.
397 09:44:54.270455 AP: slot 7 apic_id 4.
398 09:44:54.270513 done.
399 09:44:54.270597 Waiting for 2nd SIPI to complete...done.
400 09:44:54.270651 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
401 09:44:54.270719 Processing 13 relocs. Offset value of 0x00038000
402 09:44:54.270800 Unable to locate Global NVS
403 09:44:54.270854 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
404 09:44:54.270907 Installing permanent SMM handler to 0x7b000000
405 09:44:54.270995 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
406 09:44:54.271053 Processing 794 relocs. Offset value of 0x7b010000
407 09:44:54.271294 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
408 09:44:54.271362 Processing 13 relocs. Offset value of 0x7b008000
409 09:44:54.271450 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
410 09:44:54.271531 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
411 09:44:54.271631 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
412 09:44:54.271704 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
413 09:44:54.271843 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
414 09:44:54.271914 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
415 09:44:54.272009 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
416 09:44:54.272065 Unable to locate Global NVS
417 09:44:54.272121 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
418 09:44:54.272175 Clearing SMI status registers
419 09:44:54.272228 SMI_STS: PM1
420 09:44:54.272281 PM1_STS: PWRBTN
421 09:44:54.272370 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
422 09:44:54.272426 In relocation handler: CPU 0
423 09:44:54.272479 New SMBASE=0x7b000000 IEDBASE=0x7b400000
424 09:44:54.272566 Writing SMRR. base = 0x7b000006, mask=0xff800c00
425 09:44:54.272622 Relocation complete.
426 09:44:54.272674 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
427 09:44:54.272781 In relocation handler: CPU 1
428 09:44:54.272870 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
429 09:44:54.272971 Relocation complete.
430 09:44:54.273058 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
431 09:44:54.273185 In relocation handler: CPU 2
432 09:44:54.273280 New SMBASE=0x7afff800 IEDBASE=0x7b400000
433 09:44:54.273365 Relocation complete.
434 09:44:54.273466 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
435 09:44:54.273562 In relocation handler: CPU 6
436 09:44:54.273676 New SMBASE=0x7affe800 IEDBASE=0x7b400000
437 09:44:54.273760 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 09:44:54.273835 Relocation complete.
439 09:44:54.273889 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
440 09:44:54.273942 In relocation handler: CPU 7
441 09:44:54.273995 New SMBASE=0x7affe400 IEDBASE=0x7b400000
442 09:44:54.274078 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 09:44:54.274166 Relocation complete.
444 09:44:54.274254 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
445 09:44:54.274331 In relocation handler: CPU 3
446 09:44:54.274406 New SMBASE=0x7afff400 IEDBASE=0x7b400000
447 09:44:54.274481 Relocation complete.
448 09:44:54.274535 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 09:44:54.274588 In relocation handler: CPU 4
450 09:44:54.274674 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 09:44:54.274730 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 09:44:54.274783 Relocation complete.
453 09:44:54.274856 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
454 09:44:54.274911 In relocation handler: CPU 5
455 09:44:54.274964 New SMBASE=0x7affec00 IEDBASE=0x7b400000
456 09:44:54.275049 Relocation complete.
457 09:44:54.275105 Initializing CPU #0
458 09:44:54.275157 CPU: vendor Intel device 806c1
459 09:44:54.275232 CPU: family 06, model 8c, stepping 01
460 09:44:54.275286 Clearing out pending MCEs
461 09:44:54.275338 Setting up local APIC...
462 09:44:54.275429 apic_id: 0x00 done.
463 09:44:54.275532 Turbo is available but hidden
464 09:44:54.275706 Turbo is available and visible
465 09:44:54.275779 microcode: Update skipped, already up-to-date
466 09:44:54.275852 CPU #0 initialized
467 09:44:54.275918 Initializing CPU #4
468 09:44:54.275997 Initializing CPU #5
469 09:44:54.276075 CPU: vendor Intel device 806c1
470 09:44:54.276136 CPU: family 06, model 8c, stepping 01
471 09:44:54.276220 CPU: vendor Intel device 806c1
472 09:44:54.276273 CPU: family 06, model 8c, stepping 01
473 09:44:54.276348 Clearing out pending MCEs
474 09:44:54.276416 Clearing out pending MCEs
475 09:44:54.276469 Setting up local APIC...
476 09:44:54.276546 Initializing CPU #7
477 09:44:54.276613 Initializing CPU #3
478 09:44:54.276666 CPU: vendor Intel device 806c1
479 09:44:54.276721 CPU: family 06, model 8c, stepping 01
480 09:44:54.276774 CPU: vendor Intel device 806c1
481 09:44:54.276826 CPU: family 06, model 8c, stepping 01
482 09:44:54.276878 Clearing out pending MCEs
483 09:44:54.276934 Clearing out pending MCEs
484 09:44:54.276986 Setting up local APIC...
485 09:44:54.277038 Initializing CPU #2
486 09:44:54.277093 Initializing CPU #6
487 09:44:54.277144 CPU: vendor Intel device 806c1
488 09:44:54.277197 CPU: family 06, model 8c, stepping 01
489 09:44:54.277249 CPU: vendor Intel device 806c1
490 09:44:54.277324 CPU: family 06, model 8c, stepping 01
491 09:44:54.277417 Clearing out pending MCEs
492 09:44:54.277513 Clearing out pending MCEs
493 09:44:54.277600 Setting up local APIC...
494 09:44:54.277712 apic_id: 0x04 done.
495 09:44:54.277798 Setting up local APIC...
496 09:44:54.277910 apic_id: 0x07 done.
497 09:44:54.277993 Setting up local APIC...
498 09:44:54.278076 microcode: Update skipped, already up-to-date
499 09:44:54.278158 apic_id: 0x05 done.
500 09:44:54.278287 CPU #7 initialized
501 09:44:54.278340 microcode: Update skipped, already up-to-date
502 09:44:54.278416 apic_id: 0x03 done.
503 09:44:54.278483 Setting up local APIC...
504 09:44:54.278535 CPU #3 initialized
505 09:44:54.278587 microcode: Update skipped, already up-to-date
506 09:44:54.278646 apic_id: 0x06 done.
507 09:44:54.278698 CPU #5 initialized
508 09:44:54.278750 microcode: Update skipped, already up-to-date
509 09:44:54.278818 Initializing CPU #1
510 09:44:54.278871 apic_id: 0x02 done.
511 09:44:54.278923 microcode: Update skipped, already up-to-date
512 09:44:54.278978 microcode: Update skipped, already up-to-date
513 09:44:54.279031 CPU #2 initialized
514 09:44:54.279083 CPU #6 initialized
515 09:44:54.279135 CPU: vendor Intel device 806c1
516 09:44:54.279187 CPU: family 06, model 8c, stepping 01
517 09:44:54.279239 CPU #4 initialized
518 09:44:54.279291 Clearing out pending MCEs
519 09:44:54.279343 Setting up local APIC...
520 09:44:54.279394 apic_id: 0x01 done.
521 09:44:54.279648 microcode: Update skipped, already up-to-date
522 09:44:54.279710 CPU #1 initialized
523 09:44:54.279769 bsp_do_flight_plan done after 455 msecs.
524 09:44:54.279844 CPU: frequency set to 4000 MHz
525 09:44:54.279954 Enabling SMIs.
526 09:44:54.280030 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
527 09:44:54.280121 SATAXPCIE1 indicates PCIe NVMe is present
528 09:44:54.280174 Probing TPM: done!
529 09:44:54.280264 Connected to device vid:did:rid of 1ae0:0028:00
530 09:44:54.280318 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
531 09:44:54.280372 Initialized TPM device CR50 revision 0
532 09:44:54.280460 Enabling S0i3.4
533 09:44:54.280513 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
534 09:44:54.280570 Found a VBT of 8704 bytes after decompression
535 09:44:54.280647 cse_lite: CSE RO boot. HybridStorageMode disabled
536 09:44:54.280721 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
537 09:44:54.280799 FSPS returned 0
538 09:44:54.280883 Executing Phase 1 of FspMultiPhaseSiInit
539 09:44:54.280937 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
540 09:44:54.281002 port C0 DISC req: usage 1 usb3 1 usb2 5
541 09:44:54.281056 Raw Buffer output 0 00000511
542 09:44:54.281110 Raw Buffer output 1 00000000
543 09:44:54.281172 pmc_send_ipc_cmd succeeded
544 09:44:54.281226 port C1 DISC req: usage 1 usb3 2 usb2 3
545 09:44:54.281281 Raw Buffer output 0 00000321
546 09:44:54.281349 Raw Buffer output 1 00000000
547 09:44:54.281434 pmc_send_ipc_cmd succeeded
548 09:44:54.281523 Detected 4 core, 8 thread CPU.
549 09:44:54.281608 Detected 4 core, 8 thread CPU.
550 09:44:54.281693 Display FSP Version Info HOB
551 09:44:54.281781 Reference Code - CPU = a.0.4c.31
552 09:44:54.281865 uCode Version = 0.0.0.86
553 09:44:54.281933 TXT ACM version = ff.ff.ff.ffff
554 09:44:54.281989 Reference Code - ME = a.0.4c.31
555 09:44:54.282043 MEBx version = 0.0.0.0
556 09:44:54.282118 ME Firmware Version = Consumer SKU
557 09:44:54.282207 Reference Code - PCH = a.0.4c.31
558 09:44:54.282263 PCH-CRID Status = Disabled
559 09:44:54.282324 PCH-CRID Original Value = ff.ff.ff.ffff
560 09:44:54.282378 PCH-CRID New Value = ff.ff.ff.ffff
561 09:44:54.282432 OPROM - RST - RAID = ff.ff.ff.ffff
562 09:44:54.282496 PCH Hsio Version = 4.0.0.0
563 09:44:54.282561 Reference Code - SA - System Agent = a.0.4c.31
564 09:44:54.282615 Reference Code - MRC = 2.0.0.1
565 09:44:54.282674 SA - PCIe Version = a.0.4c.31
566 09:44:54.282728 SA-CRID Status = Disabled
567 09:44:54.282781 SA-CRID Original Value = 0.0.0.1
568 09:44:54.282838 SA-CRID New Value = 0.0.0.1
569 09:44:54.282923 OPROM - VBIOS = ff.ff.ff.ffff
570 09:44:54.283007 IO Manageability Engine FW Version = 11.1.4.0
571 09:44:54.283091 PHY Build Version = 0.0.0.e0
572 09:44:54.283176 Thunderbolt(TM) FW Version = 0.0.0.0
573 09:44:54.283254 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
574 09:44:54.283323 ITSS IRQ Polarities Before:
575 09:44:54.283381 IPC0: 0xffffffff
576 09:44:54.283434 IPC1: 0xffffffff
577 09:44:54.283487 IPC2: 0xffffffff
578 09:44:54.283540 IPC3: 0xffffffff
579 09:44:54.283603 ITSS IRQ Polarities After:
580 09:44:54.283657 IPC0: 0xffffffff
581 09:44:54.283710 IPC1: 0xffffffff
582 09:44:54.283770 IPC2: 0xffffffff
583 09:44:54.283825 IPC3: 0xffffffff
584 09:44:54.283878 Found PCIe Root Port #9 at PCI: 00:1d.0.
585 09:44:54.283939 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
586 09:44:54.284000 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
587 09:44:54.284055 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
588 09:44:54.284109 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
589 09:44:54.284167 Enumerating buses...
590 09:44:54.284221 Show all devs... Before device enumeration.
591 09:44:54.284275 Root Device: enabled 1
592 09:44:54.284327 DOMAIN: 0000: enabled 1
593 09:44:54.284380 CPU_CLUSTER: 0: enabled 1
594 09:44:54.284439 PCI: 00:00.0: enabled 1
595 09:44:54.284494 PCI: 00:02.0: enabled 1
596 09:44:54.284547 PCI: 00:04.0: enabled 1
597 09:44:54.284607 PCI: 00:05.0: enabled 1
598 09:44:54.284668 PCI: 00:06.0: enabled 0
599 09:44:54.284723 PCI: 00:07.0: enabled 0
600 09:44:54.284776 PCI: 00:07.1: enabled 0
601 09:44:54.284828 PCI: 00:07.2: enabled 0
602 09:44:54.284915 PCI: 00:07.3: enabled 0
603 09:44:54.284999 PCI: 00:08.0: enabled 1
604 09:44:54.285088 PCI: 00:09.0: enabled 0
605 09:44:54.285173 PCI: 00:0a.0: enabled 0
606 09:44:54.285264 PCI: 00:0d.0: enabled 1
607 09:44:54.285348 PCI: 00:0d.1: enabled 0
608 09:44:54.285436 PCI: 00:0d.2: enabled 0
609 09:44:54.285521 PCI: 00:0d.3: enabled 0
610 09:44:54.285609 PCI: 00:0e.0: enabled 0
611 09:44:54.285694 PCI: 00:10.2: enabled 1
612 09:44:54.285780 PCI: 00:10.6: enabled 0
613 09:44:54.285875 PCI: 00:10.7: enabled 0
614 09:44:54.285976 PCI: 00:12.0: enabled 0
615 09:44:54.286075 PCI: 00:12.6: enabled 0
616 09:44:54.286166 PCI: 00:13.0: enabled 0
617 09:44:54.286265 PCI: 00:14.0: enabled 1
618 09:44:54.286349 PCI: 00:14.1: enabled 0
619 09:44:54.286433 PCI: 00:14.2: enabled 1
620 09:44:54.286515 PCI: 00:14.3: enabled 1
621 09:44:54.286599 PCI: 00:15.0: enabled 1
622 09:44:54.286681 PCI: 00:15.1: enabled 1
623 09:44:54.286764 PCI: 00:15.2: enabled 1
624 09:44:54.286845 PCI: 00:15.3: enabled 1
625 09:44:54.286927 PCI: 00:16.0: enabled 1
626 09:44:54.287012 PCI: 00:16.1: enabled 0
627 09:44:54.287071 PCI: 00:16.2: enabled 0
628 09:44:54.287124 PCI: 00:16.3: enabled 0
629 09:44:54.287176 PCI: 00:16.4: enabled 0
630 09:44:54.287228 PCI: 00:16.5: enabled 0
631 09:44:54.287285 PCI: 00:17.0: enabled 1
632 09:44:54.287337 PCI: 00:19.0: enabled 0
633 09:44:54.287389 PCI: 00:19.1: enabled 1
634 09:44:54.287458 PCI: 00:19.2: enabled 0
635 09:44:54.287541 PCI: 00:1c.0: enabled 1
636 09:44:54.287623 PCI: 00:1c.1: enabled 0
637 09:44:54.287704 PCI: 00:1c.2: enabled 0
638 09:44:54.287786 PCI: 00:1c.3: enabled 0
639 09:44:54.287867 PCI: 00:1c.4: enabled 0
640 09:44:54.287949 PCI: 00:1c.5: enabled 0
641 09:44:54.288030 PCI: 00:1c.6: enabled 1
642 09:44:54.288111 PCI: 00:1c.7: enabled 0
643 09:44:54.288193 PCI: 00:1d.0: enabled 1
644 09:44:54.288278 PCI: 00:1d.1: enabled 0
645 09:44:54.288557 PCI: 00:1d.2: enabled 1
646 09:44:54.288644 PCI: 00:1d.3: enabled 0
647 09:44:54.288732 PCI: 00:1e.0: enabled 1
648 09:44:54.288854 PCI: 00:1e.1: enabled 0
649 09:44:54.288960 PCI: 00:1e.2: enabled 1
650 09:44:54.289045 PCI: 00:1e.3: enabled 1
651 09:44:54.289162 PCI: 00:1f.0: enabled 1
652 09:44:54.289315 PCI: 00:1f.1: enabled 0
653 09:44:54.289413 PCI: 00:1f.2: enabled 1
654 09:44:54.289504 PCI: 00:1f.3: enabled 1
655 09:44:54.289572 PCI: 00:1f.4: enabled 0
656 09:44:54.289625 PCI: 00:1f.5: enabled 1
657 09:44:54.289714 PCI: 00:1f.6: enabled 0
658 09:44:54.289798 PCI: 00:1f.7: enabled 0
659 09:44:54.289887 APIC: 00: enabled 1
660 09:44:54.289971 GENERIC: 0.0: enabled 1
661 09:44:54.290068 GENERIC: 0.0: enabled 1
662 09:44:54.290169 GENERIC: 1.0: enabled 1
663 09:44:54.290286 GENERIC: 0.0: enabled 1
664 09:44:54.290382 GENERIC: 1.0: enabled 1
665 09:44:54.290483 USB0 port 0: enabled 1
666 09:44:54.290540 GENERIC: 0.0: enabled 1
667 09:44:54.290595 USB0 port 0: enabled 1
668 09:44:54.290653 GENERIC: 0.0: enabled 1
669 09:44:54.290706 I2C: 00:1a: enabled 1
670 09:44:54.290759 I2C: 00:31: enabled 1
671 09:44:54.290825 I2C: 00:32: enabled 1
672 09:44:54.290879 I2C: 00:10: enabled 1
673 09:44:54.290932 I2C: 00:15: enabled 1
674 09:44:54.290987 GENERIC: 0.0: enabled 0
675 09:44:54.291040 GENERIC: 1.0: enabled 0
676 09:44:54.291092 GENERIC: 0.0: enabled 1
677 09:44:54.291144 SPI: 00: enabled 1
678 09:44:54.291224 SPI: 00: enabled 1
679 09:44:54.291305 PNP: 0c09.0: enabled 1
680 09:44:54.291388 GENERIC: 0.0: enabled 1
681 09:44:54.291470 USB3 port 0: enabled 1
682 09:44:54.291552 USB3 port 1: enabled 1
683 09:44:54.291633 USB3 port 2: enabled 0
684 09:44:54.291714 USB3 port 3: enabled 0
685 09:44:54.291796 USB2 port 0: enabled 0
686 09:44:54.291877 USB2 port 1: enabled 1
687 09:44:54.291958 USB2 port 2: enabled 1
688 09:44:54.292042 USB2 port 3: enabled 0
689 09:44:54.292127 USB2 port 4: enabled 1
690 09:44:54.292215 USB2 port 5: enabled 0
691 09:44:54.292297 USB2 port 6: enabled 0
692 09:44:54.292382 USB2 port 7: enabled 0
693 09:44:54.292487 USB2 port 8: enabled 0
694 09:44:54.292573 USB2 port 9: enabled 0
695 09:44:54.292657 USB3 port 0: enabled 0
696 09:44:54.292741 USB3 port 1: enabled 1
697 09:44:54.292826 USB3 port 2: enabled 0
698 09:44:54.292907 USB3 port 3: enabled 0
699 09:44:54.292993 GENERIC: 0.0: enabled 1
700 09:44:54.293075 GENERIC: 1.0: enabled 1
701 09:44:54.293162 APIC: 01: enabled 1
702 09:44:54.293245 APIC: 03: enabled 1
703 09:44:54.293330 APIC: 05: enabled 1
704 09:44:54.293412 APIC: 06: enabled 1
705 09:44:54.293496 APIC: 07: enabled 1
706 09:44:54.293581 APIC: 02: enabled 1
707 09:44:54.293662 APIC: 04: enabled 1
708 09:44:54.293748 Compare with tree...
709 09:44:54.293830 Root Device: enabled 1
710 09:44:54.293917 DOMAIN: 0000: enabled 1
711 09:44:54.293999 PCI: 00:00.0: enabled 1
712 09:44:54.294085 PCI: 00:02.0: enabled 1
713 09:44:54.294189 PCI: 00:04.0: enabled 1
714 09:44:54.294278 GENERIC: 0.0: enabled 1
715 09:44:54.294332 PCI: 00:05.0: enabled 1
716 09:44:54.294419 PCI: 00:06.0: enabled 0
717 09:44:54.294505 PCI: 00:07.0: enabled 0
718 09:44:54.294611 GENERIC: 0.0: enabled 1
719 09:44:54.294708 PCI: 00:07.1: enabled 0
720 09:44:54.294805 GENERIC: 1.0: enabled 1
721 09:44:54.294890 PCI: 00:07.2: enabled 0
722 09:44:54.294989 GENERIC: 0.0: enabled 1
723 09:44:54.295105 PCI: 00:07.3: enabled 0
724 09:44:54.295203 GENERIC: 1.0: enabled 1
725 09:44:54.295288 PCI: 00:08.0: enabled 1
726 09:44:54.295403 PCI: 00:09.0: enabled 0
727 09:44:54.295500 PCI: 00:0a.0: enabled 0
728 09:44:54.295603 PCI: 00:0d.0: enabled 1
729 09:44:54.295688 USB0 port 0: enabled 1
730 09:44:54.295785 USB3 port 0: enabled 1
731 09:44:54.295871 USB3 port 1: enabled 1
732 09:44:54.295953 USB3 port 2: enabled 0
733 09:44:54.296038 USB3 port 3: enabled 0
734 09:44:54.296140 PCI: 00:0d.1: enabled 0
735 09:44:54.296235 PCI: 00:0d.2: enabled 0
736 09:44:54.296350 GENERIC: 0.0: enabled 1
737 09:44:54.296435 PCI: 00:0d.3: enabled 0
738 09:44:54.296518 PCI: 00:0e.0: enabled 0
739 09:44:54.296600 PCI: 00:10.2: enabled 1
740 09:44:54.296693 PCI: 00:10.6: enabled 0
741 09:44:54.296776 PCI: 00:10.7: enabled 0
742 09:44:54.296894 PCI: 00:12.0: enabled 0
743 09:44:54.296983 PCI: 00:12.6: enabled 0
744 09:44:54.297090 PCI: 00:13.0: enabled 0
745 09:44:54.297202 PCI: 00:14.0: enabled 1
746 09:44:54.297352 USB0 port 0: enabled 1
747 09:44:54.297431 USB2 port 0: enabled 0
748 09:44:54.297528 USB2 port 1: enabled 1
749 09:44:54.297651 USB2 port 2: enabled 1
750 09:44:54.297738 USB2 port 3: enabled 0
751 09:44:54.297824 USB2 port 4: enabled 1
752 09:44:54.297947 USB2 port 5: enabled 0
753 09:44:54.298032 USB2 port 6: enabled 0
754 09:44:54.298137 USB2 port 7: enabled 0
755 09:44:54.298230 USB2 port 8: enabled 0
756 09:44:54.298323 USB2 port 9: enabled 0
757 09:44:54.298378 USB3 port 0: enabled 0
758 09:44:54.298442 USB3 port 1: enabled 1
759 09:44:54.298518 USB3 port 2: enabled 0
760 09:44:54.298573 USB3 port 3: enabled 0
761 09:44:54.298625 PCI: 00:14.1: enabled 0
762 09:44:54.298686 PCI: 00:14.2: enabled 1
763 09:44:54.298786 PCI: 00:14.3: enabled 1
764 09:44:54.298869 GENERIC: 0.0: enabled 1
765 09:44:54.298974 PCI: 00:15.0: enabled 1
766 09:44:54.299062 I2C: 00:1a: enabled 1
767 09:44:54.299167 I2C: 00:31: enabled 1
768 09:44:54.299254 I2C: 00:32: enabled 1
769 09:44:54.299351 PCI: 00:15.1: enabled 1
770 09:44:54.299435 I2C: 00:10: enabled 1
771 09:44:54.299520 PCI: 00:15.2: enabled 1
772 09:44:54.299602 PCI: 00:15.3: enabled 1
773 09:44:54.299685 PCI: 00:16.0: enabled 1
774 09:44:54.299767 PCI: 00:16.1: enabled 0
775 09:44:54.299849 PCI: 00:16.2: enabled 0
776 09:44:54.299940 PCI: 00:16.3: enabled 0
777 09:44:54.300022 PCI: 00:16.4: enabled 0
778 09:44:54.300116 PCI: 00:16.5: enabled 0
779 09:44:54.300206 PCI: 00:17.0: enabled 1
780 09:44:54.300289 PCI: 00:19.0: enabled 0
781 09:44:54.300380 PCI: 00:19.1: enabled 1
782 09:44:54.300475 I2C: 00:15: enabled 1
783 09:44:54.300560 PCI: 00:19.2: enabled 0
784 09:44:54.300642 PCI: 00:1d.0: enabled 1
785 09:44:54.300732 GENERIC: 0.0: enabled 1
786 09:44:54.300815 PCI: 00:1e.0: enabled 1
787 09:44:54.300917 PCI: 00:1e.1: enabled 0
788 09:44:54.301004 PCI: 00:1e.2: enabled 1
789 09:44:54.301085 SPI: 00: enabled 1
790 09:44:54.301179 PCI: 00:1e.3: enabled 1
791 09:44:54.301268 SPI: 00: enabled 1
792 09:44:54.301394 PCI: 00:1f.0: enabled 1
793 09:44:54.301464 PNP: 0c09.0: enabled 1
794 09:44:54.301516 PCI: 00:1f.1: enabled 0
795 09:44:54.301602 PCI: 00:1f.2: enabled 1
796 09:44:54.301686 GENERIC: 0.0: enabled 1
797 09:44:54.301820 GENERIC: 0.0: enabled 1
798 09:44:54.301942 GENERIC: 1.0: enabled 1
799 09:44:54.302060 PCI: 00:1f.3: enabled 1
800 09:44:54.302146 PCI: 00:1f.4: enabled 0
801 09:44:54.302240 PCI: 00:1f.5: enabled 1
802 09:44:54.302333 PCI: 00:1f.6: enabled 0
803 09:44:54.302720 PCI: 00:1f.7: enabled 0
804 09:44:54.302820 CPU_CLUSTER: 0: enabled 1
805 09:44:54.302907 APIC: 00: enabled 1
806 09:44:54.303008 APIC: 01: enabled 1
807 09:44:54.303102 APIC: 03: enabled 1
808 09:44:54.303207 APIC: 05: enabled 1
809 09:44:54.303293 APIC: 06: enabled 1
810 09:44:54.303434 APIC: 07: enabled 1
811 09:44:54.303521 APIC: 02: enabled 1
812 09:44:54.303631 APIC: 04: enabled 1
813 09:44:54.303738 Root Device scanning...
814 09:44:54.303823 scan_static_bus for Root Device
815 09:44:54.303948 DOMAIN: 0000 enabled
816 09:44:54.304033 CPU_CLUSTER: 0 enabled
817 09:44:54.304167 DOMAIN: 0000 scanning...
818 09:44:54.304255 PCI: pci_scan_bus for bus 00
819 09:44:54.304379 PCI: 00:00.0 [8086/0000] ops
820 09:44:54.304462 PCI: 00:00.0 [8086/9a12] enabled
821 09:44:54.304549 PCI: 00:02.0 [8086/0000] bus ops
822 09:44:54.304645 PCI: 00:02.0 [8086/9a40] enabled
823 09:44:54.304729 PCI: 00:04.0 [8086/0000] bus ops
824 09:44:54.304821 PCI: 00:04.0 [8086/9a03] enabled
825 09:44:54.304904 PCI: 00:05.0 [8086/9a19] enabled
826 09:44:54.304985 PCI: 00:07.0 [0000/0000] hidden
827 09:44:54.305068 PCI: 00:08.0 [8086/9a11] enabled
828 09:44:54.305150 PCI: 00:0a.0 [8086/9a0d] disabled
829 09:44:54.305232 PCI: 00:0d.0 [8086/0000] bus ops
830 09:44:54.305321 PCI: 00:0d.0 [8086/9a13] enabled
831 09:44:54.305421 PCI: 00:14.0 [8086/0000] bus ops
832 09:44:54.305506 PCI: 00:14.0 [8086/a0ed] enabled
833 09:44:54.305604 PCI: 00:14.2 [8086/a0ef] enabled
834 09:44:54.305704 PCI: 00:14.3 [8086/0000] bus ops
835 09:44:54.305795 PCI: 00:14.3 [8086/a0f0] enabled
836 09:44:54.305885 PCI: 00:15.0 [8086/0000] bus ops
837 09:44:54.305969 PCI: 00:15.0 [8086/a0e8] enabled
838 09:44:54.306052 PCI: 00:15.1 [8086/0000] bus ops
839 09:44:54.306135 PCI: 00:15.1 [8086/a0e9] enabled
840 09:44:54.306237 PCI: 00:15.2 [8086/0000] bus ops
841 09:44:54.306292 PCI: 00:15.2 [8086/a0ea] enabled
842 09:44:54.306361 PCI: 00:15.3 [8086/0000] bus ops
843 09:44:54.306443 PCI: 00:15.3 [8086/a0eb] enabled
844 09:44:54.306522 PCI: 00:16.0 [8086/0000] ops
845 09:44:54.306590 PCI: 00:16.0 [8086/a0e0] enabled
846 09:44:54.306680 PCI: Static device PCI: 00:17.0 not found, disabling it.
847 09:44:54.306780 PCI: 00:19.0 [8086/0000] bus ops
848 09:44:54.306834 PCI: 00:19.0 [8086/a0c5] disabled
849 09:44:54.306926 PCI: 00:19.1 [8086/0000] bus ops
850 09:44:54.306994 PCI: 00:19.1 [8086/a0c6] enabled
851 09:44:54.307060 PCI: 00:1d.0 [8086/0000] bus ops
852 09:44:54.307188 PCI: 00:1d.0 [8086/a0b0] enabled
853 09:44:54.307320 PCI: 00:1e.0 [8086/0000] ops
854 09:44:54.307405 PCI: 00:1e.0 [8086/a0a8] enabled
855 09:44:54.307584 PCI: 00:1e.2 [8086/0000] bus ops
856 09:44:54.307700 PCI: 00:1e.2 [8086/a0aa] enabled
857 09:44:54.307784 PCI: 00:1e.3 [8086/0000] bus ops
858 09:44:54.307868 PCI: 00:1e.3 [8086/a0ab] enabled
859 09:44:54.307950 PCI: 00:1f.0 [8086/0000] bus ops
860 09:44:54.308044 PCI: 00:1f.0 [8086/a087] enabled
861 09:44:54.308127 RTC Init
862 09:44:54.308211 Set power on after power failure.
863 09:44:54.308293 Disabling Deep S3
864 09:44:54.308375 Disabling Deep S3
865 09:44:54.308456 Disabling Deep S4
866 09:44:54.308538 Disabling Deep S4
867 09:44:54.308620 Disabling Deep S5
868 09:44:54.308710 Disabling Deep S5
869 09:44:54.308792 PCI: 00:1f.2 [0000/0000] hidden
870 09:44:54.308884 PCI: 00:1f.3 [8086/0000] bus ops
871 09:44:54.308967 PCI: 00:1f.3 [8086/a0c8] enabled
872 09:44:54.309063 PCI: 00:1f.5 [8086/0000] bus ops
873 09:44:54.309194 PCI: 00:1f.5 [8086/a0a4] enabled
874 09:44:54.309321 PCI: Leftover static devices:
875 09:44:54.309379 PCI: 00:10.2
876 09:44:54.309432 PCI: 00:10.6
877 09:44:54.309557 PCI: 00:10.7
878 09:44:54.309642 PCI: 00:06.0
879 09:44:54.309752 PCI: 00:07.1
880 09:44:54.309835 PCI: 00:07.2
881 09:44:54.309917 PCI: 00:07.3
882 09:44:54.310019 PCI: 00:09.0
883 09:44:54.310114 PCI: 00:0d.1
884 09:44:54.310227 PCI: 00:0d.2
885 09:44:54.310311 PCI: 00:0d.3
886 09:44:54.310366 PCI: 00:0e.0
887 09:44:54.310418 PCI: 00:12.0
888 09:44:54.310509 PCI: 00:12.6
889 09:44:54.310573 PCI: 00:13.0
890 09:44:54.310686 PCI: 00:14.1
891 09:44:54.310777 PCI: 00:16.1
892 09:44:54.310876 PCI: 00:16.2
893 09:44:54.310960 PCI: 00:16.3
894 09:44:54.311050 PCI: 00:16.4
895 09:44:54.311133 PCI: 00:16.5
896 09:44:54.311226 PCI: 00:17.0
897 09:44:54.311317 PCI: 00:19.2
898 09:44:54.311445 PCI: 00:1e.1
899 09:44:54.311529 PCI: 00:1f.1
900 09:44:54.311652 PCI: 00:1f.4
901 09:44:54.311735 PCI: 00:1f.6
902 09:44:54.311836 PCI: 00:1f.7
903 09:44:54.311966 PCI: Check your devicetree.cb.
904 09:44:54.312077 PCI: 00:02.0 scanning...
905 09:44:54.312170 scan_generic_bus for PCI: 00:02.0
906 09:44:54.312255 scan_generic_bus for PCI: 00:02.0 done
907 09:44:54.312367 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
908 09:44:54.312450 PCI: 00:04.0 scanning...
909 09:44:54.312540 scan_generic_bus for PCI: 00:04.0
910 09:44:54.312622 GENERIC: 0.0 enabled
911 09:44:54.312729 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
912 09:44:54.312820 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
913 09:44:54.312920 PCI: 00:0d.0 scanning...
914 09:44:54.313004 scan_static_bus for PCI: 00:0d.0
915 09:44:54.313118 USB0 port 0 enabled
916 09:44:54.313233 USB0 port 0 scanning...
917 09:44:54.313290 scan_static_bus for USB0 port 0
918 09:44:54.313344 USB3 port 0 enabled
919 09:44:54.313397 USB3 port 1 enabled
920 09:44:54.313472 USB3 port 2 disabled
921 09:44:54.313528 USB3 port 3 disabled
922 09:44:54.313582 USB3 port 0 scanning...
923 09:44:54.313667 scan_static_bus for USB3 port 0
924 09:44:54.313754 scan_static_bus for USB3 port 0 done
925 09:44:54.313856 scan_bus: bus USB3 port 0 finished in 6 msecs
926 09:44:54.313945 USB3 port 1 scanning...
927 09:44:54.314061 scan_static_bus for USB3 port 1
928 09:44:54.314147 scan_static_bus for USB3 port 1 done
929 09:44:54.314271 scan_bus: bus USB3 port 1 finished in 6 msecs
930 09:44:54.314327 scan_static_bus for USB0 port 0 done
931 09:44:54.314388 scan_bus: bus USB0 port 0 finished in 43 msecs
932 09:44:54.314452 scan_static_bus for PCI: 00:0d.0 done
933 09:44:54.314506 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
934 09:44:54.314565 PCI: 00:14.0 scanning...
935 09:44:54.314663 scan_static_bus for PCI: 00:14.0
936 09:44:54.314746 USB0 port 0 enabled
937 09:44:54.314843 USB0 port 0 scanning...
938 09:44:54.314926 scan_static_bus for USB0 port 0
939 09:44:54.315024 USB2 port 0 disabled
940 09:44:54.315107 USB2 port 1 enabled
941 09:44:54.315212 USB2 port 2 enabled
942 09:44:54.315331 USB2 port 3 disabled
943 09:44:54.315420 USB2 port 4 enabled
944 09:44:54.315503 USB2 port 5 disabled
945 09:44:54.315602 USB2 port 6 disabled
946 09:44:54.315686 USB2 port 7 disabled
947 09:44:54.315787 USB2 port 8 disabled
948 09:44:54.315870 USB2 port 9 disabled
949 09:44:54.315959 USB3 port 0 disabled
950 09:44:54.316041 USB3 port 1 enabled
951 09:44:54.316145 USB3 port 2 disabled
952 09:44:54.316231 USB3 port 3 disabled
953 09:44:54.316530 USB2 port 1 scanning...
954 09:44:54.316622 scan_static_bus for USB2 port 1
955 09:44:54.316720 scan_static_bus for USB2 port 1 done
956 09:44:54.316805 scan_bus: bus USB2 port 1 finished in 6 msecs
957 09:44:54.316891 USB2 port 2 scanning...
958 09:44:54.316973 scan_static_bus for USB2 port 2
959 09:44:54.317057 scan_static_bus for USB2 port 2 done
960 09:44:54.317139 scan_bus: bus USB2 port 2 finished in 6 msecs
961 09:44:54.317221 USB2 port 4 scanning...
962 09:44:54.317303 scan_static_bus for USB2 port 4
963 09:44:54.317384 scan_static_bus for USB2 port 4 done
964 09:44:54.317473 scan_bus: bus USB2 port 4 finished in 6 msecs
965 09:44:54.317530 USB3 port 1 scanning...
966 09:44:54.317582 scan_static_bus for USB3 port 1
967 09:44:54.317635 scan_static_bus for USB3 port 1 done
968 09:44:54.317738 scan_bus: bus USB3 port 1 finished in 6 msecs
969 09:44:54.317827 scan_static_bus for USB0 port 0 done
970 09:44:54.317923 scan_bus: bus USB0 port 0 finished in 93 msecs
971 09:44:54.318044 scan_static_bus for PCI: 00:14.0 done
972 09:44:54.318158 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
973 09:44:54.318305 PCI: 00:14.3 scanning...
974 09:44:54.318411 scan_static_bus for PCI: 00:14.3
975 09:44:54.318495 GENERIC: 0.0 enabled
976 09:44:54.318551 scan_static_bus for PCI: 00:14.3 done
977 09:44:54.318604 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
978 09:44:54.318671 PCI: 00:15.0 scanning...
979 09:44:54.318770 scan_static_bus for PCI: 00:15.0
980 09:44:54.318824 I2C: 00:1a enabled
981 09:44:54.318918 I2C: 00:31 enabled
982 09:44:54.319001 I2C: 00:32 enabled
983 09:44:54.319095 scan_static_bus for PCI: 00:15.0 done
984 09:44:54.319179 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
985 09:44:54.319273 PCI: 00:15.1 scanning...
986 09:44:54.319356 scan_static_bus for PCI: 00:15.1
987 09:44:54.319450 I2C: 00:10 enabled
988 09:44:54.319563 scan_static_bus for PCI: 00:15.1 done
989 09:44:54.319649 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
990 09:44:54.319720 PCI: 00:15.2 scanning...
991 09:44:54.319777 scan_static_bus for PCI: 00:15.2
992 09:44:54.319878 scan_static_bus for PCI: 00:15.2 done
993 09:44:54.319963 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
994 09:44:54.320068 PCI: 00:15.3 scanning...
995 09:44:54.320123 scan_static_bus for PCI: 00:15.3
996 09:44:54.320207 scan_static_bus for PCI: 00:15.3 done
997 09:44:54.320263 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
998 09:44:54.320316 PCI: 00:19.1 scanning...
999 09:44:54.320404 scan_static_bus for PCI: 00:19.1
1000 09:44:54.320523 I2C: 00:15 enabled
1001 09:44:54.320581 scan_static_bus for PCI: 00:19.1 done
1002 09:44:54.320649 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1003 09:44:54.320701 PCI: 00:1d.0 scanning...
1004 09:44:54.320757 do_pci_scan_bridge for PCI: 00:1d.0
1005 09:44:54.320809 PCI: pci_scan_bus for bus 01
1006 09:44:54.320861 PCI: 01:00.0 [1c5c/174a] enabled
1007 09:44:54.320914 GENERIC: 0.0 enabled
1008 09:44:54.320997 Enabling Common Clock Configuration
1009 09:44:54.321079 L1 Sub-State supported from root port 29
1010 09:44:54.321161 L1 Sub-State Support = 0xf
1011 09:44:54.321242 CommonModeRestoreTime = 0x28
1012 09:44:54.321324 Power On Value = 0x16, Power On Scale = 0x0
1013 09:44:54.321405 ASPM: Enabled L1
1014 09:44:54.321498 PCIe: Max_Payload_Size adjusted to 128
1015 09:44:54.321582 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1016 09:44:54.321665 PCI: 00:1e.2 scanning...
1017 09:44:54.321761 scan_generic_bus for PCI: 00:1e.2
1018 09:44:54.321846 SPI: 00 enabled
1019 09:44:54.321901 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1020 09:44:54.321992 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1021 09:44:54.322047 PCI: 00:1e.3 scanning...
1022 09:44:54.322109 scan_generic_bus for PCI: 00:1e.3
1023 09:44:54.322225 SPI: 00 enabled
1024 09:44:54.322279 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1025 09:44:54.322365 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1026 09:44:54.322429 PCI: 00:1f.0 scanning...
1027 09:44:54.322498 scan_static_bus for PCI: 00:1f.0
1028 09:44:54.322561 PNP: 0c09.0 enabled
1029 09:44:54.322615 PNP: 0c09.0 scanning...
1030 09:44:54.322673 scan_static_bus for PNP: 0c09.0
1031 09:44:54.322738 scan_static_bus for PNP: 0c09.0 done
1032 09:44:54.322790 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1033 09:44:54.322843 scan_static_bus for PCI: 00:1f.0 done
1034 09:44:54.322941 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1035 09:44:54.322998 PCI: 00:1f.2 scanning...
1036 09:44:54.323064 scan_static_bus for PCI: 00:1f.2
1037 09:44:54.323150 GENERIC: 0.0 enabled
1038 09:44:54.323232 GENERIC: 0.0 scanning...
1039 09:44:54.323329 scan_static_bus for GENERIC: 0.0
1040 09:44:54.323411 GENERIC: 0.0 enabled
1041 09:44:54.323500 GENERIC: 1.0 enabled
1042 09:44:54.323555 scan_static_bus for GENERIC: 0.0 done
1043 09:44:54.323614 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1044 09:44:54.323711 scan_static_bus for PCI: 00:1f.2 done
1045 09:44:54.323794 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1046 09:44:54.323881 PCI: 00:1f.3 scanning...
1047 09:44:54.323935 scan_static_bus for PCI: 00:1f.3
1048 09:44:54.323987 scan_static_bus for PCI: 00:1f.3 done
1049 09:44:54.324067 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1050 09:44:54.324122 PCI: 00:1f.5 scanning...
1051 09:44:54.324174 scan_generic_bus for PCI: 00:1f.5
1052 09:44:54.324266 scan_generic_bus for PCI: 00:1f.5 done
1053 09:44:54.324321 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1054 09:44:54.324379 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1055 09:44:54.324462 scan_static_bus for Root Device done
1056 09:44:54.324516 scan_bus: bus Root Device finished in 737 msecs
1057 09:44:54.324595 done
1058 09:44:54.324666 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1059 09:44:54.324719 Chrome EC: UHEPI supported
1060 09:44:54.324815 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1061 09:44:54.324899 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1062 09:44:54.324984 SPI flash protection: WPSW=0 SRP0=0
1063 09:44:54.325066 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1064 09:44:54.325149 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1065 09:44:54.325203 found VGA at PCI: 00:02.0
1066 09:44:54.325256 Setting up VGA for PCI: 00:02.0
1067 09:44:54.325510 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1068 09:44:54.325572 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1069 09:44:54.325650 Allocating resources...
1070 09:44:54.325707 Reading resources...
1071 09:44:54.325760 Root Device read_resources bus 0 link: 0
1072 09:44:54.325820 DOMAIN: 0000 read_resources bus 0 link: 0
1073 09:44:54.325872 PCI: 00:04.0 read_resources bus 1 link: 0
1074 09:44:54.325924 PCI: 00:04.0 read_resources bus 1 link: 0 done
1075 09:44:54.325976 PCI: 00:0d.0 read_resources bus 0 link: 0
1076 09:44:54.326028 USB0 port 0 read_resources bus 0 link: 0
1077 09:44:54.326079 USB0 port 0 read_resources bus 0 link: 0 done
1078 09:44:54.326131 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1079 09:44:54.326221 PCI: 00:14.0 read_resources bus 0 link: 0
1080 09:44:54.326274 USB0 port 0 read_resources bus 0 link: 0
1081 09:44:54.326347 USB0 port 0 read_resources bus 0 link: 0 done
1082 09:44:54.326400 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 09:44:54.326453 PCI: 00:14.3 read_resources bus 0 link: 0
1084 09:44:54.326527 PCI: 00:14.3 read_resources bus 0 link: 0 done
1085 09:44:54.326609 PCI: 00:15.0 read_resources bus 0 link: 0
1086 09:44:54.326663 PCI: 00:15.0 read_resources bus 0 link: 0 done
1087 09:44:54.326719 PCI: 00:15.1 read_resources bus 0 link: 0
1088 09:44:54.326809 PCI: 00:15.1 read_resources bus 0 link: 0 done
1089 09:44:54.326863 PCI: 00:19.1 read_resources bus 0 link: 0
1090 09:44:54.326929 PCI: 00:19.1 read_resources bus 0 link: 0 done
1091 09:44:54.326999 PCI: 00:1d.0 read_resources bus 1 link: 0
1092 09:44:54.327052 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1093 09:44:54.327104 PCI: 00:1e.2 read_resources bus 2 link: 0
1094 09:44:54.327193 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1095 09:44:54.327247 PCI: 00:1e.3 read_resources bus 3 link: 0
1096 09:44:54.327301 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1097 09:44:54.327353 PCI: 00:1f.0 read_resources bus 0 link: 0
1098 09:44:54.327404 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1099 09:44:54.327455 PCI: 00:1f.2 read_resources bus 0 link: 0
1100 09:44:54.327510 GENERIC: 0.0 read_resources bus 0 link: 0
1101 09:44:54.327562 GENERIC: 0.0 read_resources bus 0 link: 0 done
1102 09:44:54.327614 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1103 09:44:54.327665 DOMAIN: 0000 read_resources bus 0 link: 0 done
1104 09:44:54.327743 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1105 09:44:54.327796 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1106 09:44:54.327851 Root Device read_resources bus 0 link: 0 done
1107 09:44:54.327949 Done reading resources.
1108 09:44:54.328004 Show resources in subtree (Root Device)...After reading.
1109 09:44:54.328057 Root Device child on link 0 DOMAIN: 0000
1110 09:44:54.328116 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 09:44:54.328211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 09:44:54.328298 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1113 09:44:54.328419 PCI: 00:00.0
1114 09:44:54.328552 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 09:44:54.328644 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 09:44:54.328729 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 09:44:54.328794 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 09:44:54.328848 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 09:44:54.328900 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 09:44:54.328996 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 09:44:54.329080 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 09:44:54.329180 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 09:44:54.329236 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1124 09:44:54.329294 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1125 09:44:54.329375 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1126 09:44:54.329429 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1127 09:44:54.329487 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1128 09:44:54.329570 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1129 09:44:54.329623 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1130 09:44:54.329679 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1131 09:44:54.329739 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1132 09:44:54.329792 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1133 09:44:54.330034 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1134 09:44:54.330116 PCI: 00:02.0
1135 09:44:54.330239 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1136 09:44:54.330296 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1137 09:44:54.330350 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1138 09:44:54.330462 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1139 09:44:54.330526 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1140 09:44:54.330655 GENERIC: 0.0
1141 09:44:54.330711 PCI: 00:05.0
1142 09:44:54.330763 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1143 09:44:54.330842 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1144 09:44:54.330938 GENERIC: 0.0
1145 09:44:54.330996 PCI: 00:08.0
1146 09:44:54.331109 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 09:44:54.331163 PCI: 00:0a.0
1148 09:44:54.331232 PCI: 00:0d.0 child on link 0 USB0 port 0
1149 09:44:54.331301 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1150 09:44:54.331355 USB0 port 0 child on link 0 USB3 port 0
1151 09:44:54.331406 USB3 port 0
1152 09:44:54.331499 USB3 port 1
1153 09:44:54.331609 USB3 port 2
1154 09:44:54.331695 USB3 port 3
1155 09:44:54.331780 PCI: 00:14.0 child on link 0 USB0 port 0
1156 09:44:54.331864 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1157 09:44:54.331947 USB0 port 0 child on link 0 USB2 port 0
1158 09:44:54.332035 USB2 port 0
1159 09:44:54.332119 USB2 port 1
1160 09:44:54.332204 USB2 port 2
1161 09:44:54.332258 USB2 port 3
1162 09:44:54.332331 USB2 port 4
1163 09:44:54.332386 USB2 port 5
1164 09:44:54.332451 USB2 port 6
1165 09:44:54.332525 USB2 port 7
1166 09:44:54.332592 USB2 port 8
1167 09:44:54.332646 USB2 port 9
1168 09:44:54.335525 USB3 port 0
1169 09:44:54.335608 USB3 port 1
1170 09:44:54.338631 USB3 port 2
1171 09:44:54.338747 USB3 port 3
1172 09:44:54.341961 PCI: 00:14.2
1173 09:44:54.351920 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 09:44:54.361745 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1175 09:44:54.364815 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1176 09:44:54.375132 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1177 09:44:54.378391 GENERIC: 0.0
1178 09:44:54.381411 PCI: 00:15.0 child on link 0 I2C: 00:1a
1179 09:44:54.391360 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 09:44:54.394510 I2C: 00:1a
1181 09:44:54.394632 I2C: 00:31
1182 09:44:54.397630 I2C: 00:32
1183 09:44:54.401590 PCI: 00:15.1 child on link 0 I2C: 00:10
1184 09:44:54.410798 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 09:44:54.410886 I2C: 00:10
1186 09:44:54.414734 PCI: 00:15.2
1187 09:44:54.424207 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 09:44:54.424315 PCI: 00:15.3
1189 09:44:54.434635 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 09:44:54.437155 PCI: 00:16.0
1191 09:44:54.447300 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 09:44:54.447407 PCI: 00:19.0
1193 09:44:54.453982 PCI: 00:19.1 child on link 0 I2C: 00:15
1194 09:44:54.464054 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 09:44:54.464143 I2C: 00:15
1196 09:44:54.470515 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1197 09:44:54.476916 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1198 09:44:54.487410 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1199 09:44:54.496725 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1200 09:44:54.496895 GENERIC: 0.0
1201 09:44:54.500121 PCI: 01:00.0
1202 09:44:54.510261 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 09:44:54.519980 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1204 09:44:54.530118 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1205 09:44:54.530528 PCI: 00:1e.0
1206 09:44:54.543194 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1207 09:44:54.546632 PCI: 00:1e.2 child on link 0 SPI: 00
1208 09:44:54.556420 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 09:44:54.556731 SPI: 00
1210 09:44:54.559594 PCI: 00:1e.3 child on link 0 SPI: 00
1211 09:44:54.569463 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 09:44:54.572715 SPI: 00
1213 09:44:54.575954 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1214 09:44:54.586068 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1215 09:44:54.586233 PNP: 0c09.0
1216 09:44:54.595890 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 09:44:54.598936 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1218 09:44:54.608911 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1219 09:44:54.619082 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1220 09:44:54.622118 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1221 09:44:54.625876 GENERIC: 0.0
1222 09:44:54.625998 GENERIC: 1.0
1223 09:44:54.628685 PCI: 00:1f.3
1224 09:44:54.639113 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 09:44:54.649015 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1226 09:44:54.652130 PCI: 00:1f.5
1227 09:44:54.659118 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1228 09:44:54.665363 CPU_CLUSTER: 0 child on link 0 APIC: 00
1229 09:44:54.665653 APIC: 00
1230 09:44:54.665867 APIC: 01
1231 09:44:54.668771 APIC: 03
1232 09:44:54.668980 APIC: 05
1233 09:44:54.671747 APIC: 06
1234 09:44:54.671917 APIC: 07
1235 09:44:54.672051 APIC: 02
1236 09:44:54.674744 APIC: 04
1237 09:44:54.681741 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1238 09:44:54.688111 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1239 09:44:54.695093 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1240 09:44:54.698229 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1241 09:44:54.704728 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1242 09:44:54.708168 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1243 09:44:54.711623 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1244 09:44:54.718067 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1245 09:44:54.727860 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1246 09:44:54.734563 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1247 09:44:54.741945 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1248 09:44:54.748018 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1249 09:44:54.754426 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 09:44:54.764610 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1251 09:44:54.771038 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1252 09:44:54.774076 DOMAIN: 0000: Resource ranges:
1253 09:44:54.777274 * Base: 1000, Size: 800, Tag: 100
1254 09:44:54.781013 * Base: 1900, Size: e700, Tag: 100
1255 09:44:54.787281 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1256 09:44:54.794074 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1257 09:44:54.800595 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1258 09:44:54.807096 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1259 09:44:54.813998 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1260 09:44:54.824425 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1261 09:44:54.830704 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1262 09:44:54.837201 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1263 09:44:54.846991 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1264 09:44:54.853721 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1265 09:44:54.860459 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1266 09:44:54.870257 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1267 09:44:54.876497 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1268 09:44:54.883516 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1269 09:44:54.893398 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1270 09:44:54.899767 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1271 09:44:54.906345 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1272 09:44:54.916631 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1273 09:44:54.923069 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1274 09:44:54.929740 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1275 09:44:54.939757 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1276 09:44:54.946047 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1277 09:44:54.952940 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1278 09:44:54.962539 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1279 09:44:54.969733 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1280 09:44:54.972896 DOMAIN: 0000: Resource ranges:
1281 09:44:54.976129 * Base: 7fc00000, Size: 40400000, Tag: 200
1282 09:44:54.982978 * Base: d0000000, Size: 28000000, Tag: 200
1283 09:44:54.985759 * Base: fa000000, Size: 1000000, Tag: 200
1284 09:44:54.989257 * Base: fb001000, Size: 2fff000, Tag: 200
1285 09:44:54.995591 * Base: fe010000, Size: 2e000, Tag: 200
1286 09:44:54.999168 * Base: fe03f000, Size: d41000, Tag: 200
1287 09:44:55.002298 * Base: fed88000, Size: 8000, Tag: 200
1288 09:44:55.006047 * Base: fed93000, Size: d000, Tag: 200
1289 09:44:55.012612 * Base: feda2000, Size: 1e000, Tag: 200
1290 09:44:55.015959 * Base: fede0000, Size: 1220000, Tag: 200
1291 09:44:55.019209 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1292 09:44:55.025776 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1293 09:44:55.031773 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1294 09:44:55.038370 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1295 09:44:55.045183 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1296 09:44:55.051720 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1297 09:44:55.061835 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1298 09:44:55.068492 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1299 09:44:55.074932 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1300 09:44:55.081497 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1301 09:44:55.087893 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1302 09:44:55.094934 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1303 09:44:55.101404 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1304 09:44:55.107799 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1305 09:44:55.114653 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1306 09:44:55.121202 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1307 09:44:55.127577 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1308 09:44:55.134636 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1309 09:44:55.140769 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1310 09:44:55.147434 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1311 09:44:55.154224 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1312 09:44:55.160718 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1313 09:44:55.167586 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1314 09:44:55.173981 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1315 09:44:55.180585 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1316 09:44:55.183987 PCI: 00:1d.0: Resource ranges:
1317 09:44:55.190960 * Base: 7fc00000, Size: 100000, Tag: 200
1318 09:44:55.196942 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1319 09:44:55.204132 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1320 09:44:55.210666 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1321 09:44:55.217267 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1322 09:44:55.223307 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1323 09:44:55.230415 Root Device assign_resources, bus 0 link: 0
1324 09:44:55.233411 DOMAIN: 0000 assign_resources, bus 0 link: 0
1325 09:44:55.243329 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1326 09:44:55.249641 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1327 09:44:55.256482 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1328 09:44:55.266347 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1329 09:44:55.270152 PCI: 00:04.0 assign_resources, bus 1 link: 0
1330 09:44:55.276677 PCI: 00:04.0 assign_resources, bus 1 link: 0
1331 09:44:55.283183 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1332 09:44:55.293184 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1333 09:44:55.299604 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1334 09:44:55.305953 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1335 09:44:55.309334 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1336 09:44:55.319519 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1337 09:44:55.322654 PCI: 00:14.0 assign_resources, bus 0 link: 0
1338 09:44:55.326265 PCI: 00:14.0 assign_resources, bus 0 link: 0
1339 09:44:55.335971 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1340 09:44:55.342596 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1341 09:44:55.352341 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1342 09:44:55.355672 PCI: 00:14.3 assign_resources, bus 0 link: 0
1343 09:44:55.361905 PCI: 00:14.3 assign_resources, bus 0 link: 0
1344 09:44:55.368548 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1345 09:44:55.371778 PCI: 00:15.0 assign_resources, bus 0 link: 0
1346 09:44:55.378452 PCI: 00:15.0 assign_resources, bus 0 link: 0
1347 09:44:55.385432 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1348 09:44:55.391382 PCI: 00:15.1 assign_resources, bus 0 link: 0
1349 09:44:55.395253 PCI: 00:15.1 assign_resources, bus 0 link: 0
1350 09:44:55.404662 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1351 09:44:55.411560 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1352 09:44:55.421493 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1353 09:44:55.427883 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1354 09:44:55.434330 PCI: 00:19.1 assign_resources, bus 0 link: 0
1355 09:44:55.437832 PCI: 00:19.1 assign_resources, bus 0 link: 0
1356 09:44:55.447561 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1357 09:44:55.457969 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1358 09:44:55.464377 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1359 09:44:55.470734 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1360 09:44:55.477341 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1361 09:44:55.483929 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1362 09:44:55.493616 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1363 09:44:55.496761 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1364 09:44:55.506616 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1365 09:44:55.510115 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1366 09:44:55.516528 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 09:44:55.523325 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1368 09:44:55.529947 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1369 09:44:55.532988 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 09:44:55.536082 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1371 09:44:55.543267 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 09:44:55.546625 LPC: Trying to open IO window from 800 size 1ff
1373 09:44:55.556843 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1374 09:44:55.562975 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1375 09:44:55.572673 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1376 09:44:55.575970 DOMAIN: 0000 assign_resources, bus 0 link: 0
1377 09:44:55.582991 Root Device assign_resources, bus 0 link: 0
1378 09:44:55.583076 Done setting resources.
1379 09:44:55.589662 Show resources in subtree (Root Device)...After assigning values.
1380 09:44:55.596255 Root Device child on link 0 DOMAIN: 0000
1381 09:44:55.599510 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1382 09:44:55.609111 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1383 09:44:55.618998 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1384 09:44:55.619139 PCI: 00:00.0
1385 09:44:55.629264 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1386 09:44:55.638816 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1387 09:44:55.648873 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1388 09:44:55.658867 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1389 09:44:55.665350 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1390 09:44:55.675633 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1391 09:44:55.685631 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1392 09:44:55.695156 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1393 09:44:55.705076 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1394 09:44:55.715235 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1395 09:44:55.722039 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1396 09:44:55.731813 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1397 09:44:55.741710 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1398 09:44:55.751470 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1399 09:44:55.761182 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1400 09:44:55.771693 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1401 09:44:55.781385 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1402 09:44:55.788010 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1403 09:44:55.798320 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1404 09:44:55.808033 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1405 09:44:55.811183 PCI: 00:02.0
1406 09:44:55.821131 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1407 09:44:55.831121 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1408 09:44:55.841336 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1409 09:44:55.844534 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1410 09:44:55.854325 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1411 09:44:55.857321 GENERIC: 0.0
1412 09:44:55.857401 PCI: 00:05.0
1413 09:44:55.871026 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1414 09:44:55.874128 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1415 09:44:55.874246 GENERIC: 0.0
1416 09:44:55.877496 PCI: 00:08.0
1417 09:44:55.887120 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1418 09:44:55.890956 PCI: 00:0a.0
1419 09:44:55.894278 PCI: 00:0d.0 child on link 0 USB0 port 0
1420 09:44:55.904170 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1421 09:44:55.907428 USB0 port 0 child on link 0 USB3 port 0
1422 09:44:55.910743 USB3 port 0
1423 09:44:55.910847 USB3 port 1
1424 09:44:55.913877 USB3 port 2
1425 09:44:55.916992 USB3 port 3
1426 09:44:55.920306 PCI: 00:14.0 child on link 0 USB0 port 0
1427 09:44:55.930402 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1428 09:44:55.933792 USB0 port 0 child on link 0 USB2 port 0
1429 09:44:55.936914 USB2 port 0
1430 09:44:55.936990 USB2 port 1
1431 09:44:55.940326 USB2 port 2
1432 09:44:55.943526 USB2 port 3
1433 09:44:55.943614 USB2 port 4
1434 09:44:55.946842 USB2 port 5
1435 09:44:55.946948 USB2 port 6
1436 09:44:55.949995 USB2 port 7
1437 09:44:55.950108 USB2 port 8
1438 09:44:55.953346 USB2 port 9
1439 09:44:55.953426 USB3 port 0
1440 09:44:55.957050 USB3 port 1
1441 09:44:55.957124 USB3 port 2
1442 09:44:55.960215 USB3 port 3
1443 09:44:55.960321 PCI: 00:14.2
1444 09:44:55.970058 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1445 09:44:55.983389 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1446 09:44:55.986523 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1447 09:44:55.996798 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1448 09:44:55.999449 GENERIC: 0.0
1449 09:44:56.003234 PCI: 00:15.0 child on link 0 I2C: 00:1a
1450 09:44:56.012903 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1451 09:44:56.016162 I2C: 00:1a
1452 09:44:56.016296 I2C: 00:31
1453 09:44:56.019412 I2C: 00:32
1454 09:44:56.022647 PCI: 00:15.1 child on link 0 I2C: 00:10
1455 09:44:56.032495 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1456 09:44:56.032629 I2C: 00:10
1457 09:44:56.035819 PCI: 00:15.2
1458 09:44:56.046330 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1459 09:44:56.049219 PCI: 00:15.3
1460 09:44:56.059016 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1461 09:44:56.059110 PCI: 00:16.0
1462 09:44:56.069263 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1463 09:44:56.072314 PCI: 00:19.0
1464 09:44:56.075375 PCI: 00:19.1 child on link 0 I2C: 00:15
1465 09:44:56.085181 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1466 09:44:56.088852 I2C: 00:15
1467 09:44:56.091903 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1468 09:44:56.102092 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1469 09:44:56.111810 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1470 09:44:56.125354 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1471 09:44:56.125517 GENERIC: 0.0
1472 09:44:56.128592 PCI: 01:00.0
1473 09:44:56.138303 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1474 09:44:56.148185 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1475 09:44:56.158280 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1476 09:44:56.161293 PCI: 00:1e.0
1477 09:44:56.171491 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 09:44:56.174662 PCI: 00:1e.2 child on link 0 SPI: 00
1479 09:44:56.184622 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 09:44:56.188104 SPI: 00
1481 09:44:56.191334 PCI: 00:1e.3 child on link 0 SPI: 00
1482 09:44:56.201158 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 09:44:56.203985 SPI: 00
1484 09:44:56.207362 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 09:44:56.214312 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 09:44:56.217597 PNP: 0c09.0
1487 09:44:56.227219 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 09:44:56.230579 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 09:44:56.240385 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 09:44:56.250683 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 09:44:56.253946 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 09:44:56.257036 GENERIC: 0.0
1493 09:44:56.257142 GENERIC: 1.0
1494 09:44:56.260132 PCI: 00:1f.3
1495 09:44:56.270513 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 09:44:56.280227 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 09:44:56.280340 PCI: 00:1f.5
1498 09:44:56.293734 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 09:44:56.296984 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 09:44:56.297239 APIC: 00
1501 09:44:56.300110 APIC: 01
1502 09:44:56.300283 APIC: 03
1503 09:44:56.300418 APIC: 05
1504 09:44:56.303547 APIC: 06
1505 09:44:56.303720 APIC: 07
1506 09:44:56.306901 APIC: 02
1507 09:44:56.307204 APIC: 04
1508 09:44:56.309959 Done allocating resources.
1509 09:44:56.316420 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1510 09:44:56.320000 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 09:44:56.326177 Configure GPIOs for I2S audio on UP4.
1512 09:44:56.333292 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 09:44:56.336508 Enabling resources...
1514 09:44:56.339789 PCI: 00:00.0 subsystem <- 8086/9a12
1515 09:44:56.339944 PCI: 00:00.0 cmd <- 06
1516 09:44:56.346343 PCI: 00:02.0 subsystem <- 8086/9a40
1517 09:44:56.346475 PCI: 00:02.0 cmd <- 03
1518 09:44:56.349681 PCI: 00:04.0 subsystem <- 8086/9a03
1519 09:44:56.352895 PCI: 00:04.0 cmd <- 02
1520 09:44:56.356174 PCI: 00:05.0 subsystem <- 8086/9a19
1521 09:44:56.359309 PCI: 00:05.0 cmd <- 02
1522 09:44:56.362625 PCI: 00:08.0 subsystem <- 8086/9a11
1523 09:44:56.365783 PCI: 00:08.0 cmd <- 06
1524 09:44:56.369079 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 09:44:56.372804 PCI: 00:0d.0 cmd <- 02
1526 09:44:56.376011 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 09:44:56.379387 PCI: 00:14.0 cmd <- 02
1528 09:44:56.382497 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 09:44:56.385586 PCI: 00:14.2 cmd <- 02
1530 09:44:56.388844 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 09:44:56.388925 PCI: 00:14.3 cmd <- 02
1532 09:44:56.395687 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 09:44:56.395799 PCI: 00:15.0 cmd <- 02
1534 09:44:56.399060 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 09:44:56.402376 PCI: 00:15.1 cmd <- 02
1536 09:44:56.405998 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 09:44:56.408802 PCI: 00:15.2 cmd <- 02
1538 09:44:56.411980 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 09:44:56.415375 PCI: 00:15.3 cmd <- 02
1540 09:44:56.418905 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 09:44:56.421987 PCI: 00:16.0 cmd <- 02
1542 09:44:56.425704 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 09:44:56.428661 PCI: 00:19.1 cmd <- 02
1544 09:44:56.432231 PCI: 00:1d.0 bridge ctrl <- 0013
1545 09:44:56.435224 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 09:44:56.438490 PCI: 00:1d.0 cmd <- 06
1547 09:44:56.441658 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 09:44:56.444934 PCI: 00:1e.0 cmd <- 06
1549 09:44:56.448781 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 09:44:56.448868 PCI: 00:1e.2 cmd <- 06
1551 09:44:56.455328 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 09:44:56.455441 PCI: 00:1e.3 cmd <- 02
1553 09:44:56.458552 PCI: 00:1f.0 subsystem <- 8086/a087
1554 09:44:56.461729 PCI: 00:1f.0 cmd <- 407
1555 09:44:56.465026 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 09:44:56.468364 PCI: 00:1f.3 cmd <- 02
1557 09:44:56.471612 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 09:44:56.474786 PCI: 00:1f.5 cmd <- 406
1559 09:44:56.479230 PCI: 01:00.0 cmd <- 02
1560 09:44:56.483570 done.
1561 09:44:56.486782 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 09:44:56.490124 Initializing devices...
1563 09:44:56.493416 Root Device init
1564 09:44:56.496598 Chrome EC: Set SMI mask to 0x0000000000000000
1565 09:44:56.503590 Chrome EC: clear events_b mask to 0x0000000000000000
1566 09:44:56.509830 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 09:44:56.516549 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 09:44:56.523286 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 09:44:56.529573 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 09:44:56.533039 fw_config match found: DB_USB=USB3_ACTIVE
1571 09:44:56.539783 Configure Right Type-C port orientation for retimer
1572 09:44:56.543215 Root Device init finished in 46 msecs
1573 09:44:56.546620 PCI: 00:00.0 init
1574 09:44:56.549885 CPU TDP = 9 Watts
1575 09:44:56.549967 CPU PL1 = 9 Watts
1576 09:44:56.553073 CPU PL2 = 40 Watts
1577 09:44:56.553154 CPU PL4 = 83 Watts
1578 09:44:56.559505 PCI: 00:00.0 init finished in 8 msecs
1579 09:44:56.559606 PCI: 00:02.0 init
1580 09:44:56.562839 GMA: Found VBT in CBFS
1581 09:44:56.565866 GMA: Found valid VBT in CBFS
1582 09:44:56.573030 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 09:44:56.579386 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 09:44:56.582598 PCI: 00:02.0 init finished in 18 msecs
1585 09:44:56.585750 PCI: 00:05.0 init
1586 09:44:56.588787 PCI: 00:05.0 init finished in 0 msecs
1587 09:44:56.591979 PCI: 00:08.0 init
1588 09:44:56.595341 PCI: 00:08.0 init finished in 0 msecs
1589 09:44:56.598640 PCI: 00:14.0 init
1590 09:44:56.602426 PCI: 00:14.0 init finished in 0 msecs
1591 09:44:56.605715 PCI: 00:14.2 init
1592 09:44:56.608677 PCI: 00:14.2 init finished in 0 msecs
1593 09:44:56.611897 PCI: 00:15.0 init
1594 09:44:56.611985 I2C bus 0 version 0x3230302a
1595 09:44:56.618759 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 09:44:56.621901 PCI: 00:15.0 init finished in 6 msecs
1597 09:44:56.622028 PCI: 00:15.1 init
1598 09:44:56.625037 I2C bus 1 version 0x3230302a
1599 09:44:56.628399 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 09:44:56.634646 PCI: 00:15.1 init finished in 6 msecs
1601 09:44:56.634737 PCI: 00:15.2 init
1602 09:44:56.638144 I2C bus 2 version 0x3230302a
1603 09:44:56.640977 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 09:44:56.647839 PCI: 00:15.2 init finished in 6 msecs
1605 09:44:56.647954 PCI: 00:15.3 init
1606 09:44:56.650929 I2C bus 3 version 0x3230302a
1607 09:44:56.654403 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 09:44:56.657737 PCI: 00:15.3 init finished in 6 msecs
1609 09:44:56.660779 PCI: 00:16.0 init
1610 09:44:56.663903 PCI: 00:16.0 init finished in 0 msecs
1611 09:44:56.667696 PCI: 00:19.1 init
1612 09:44:56.670843 I2C bus 5 version 0x3230302a
1613 09:44:56.674093 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 09:44:56.677354 PCI: 00:19.1 init finished in 6 msecs
1615 09:44:56.680630 PCI: 00:1d.0 init
1616 09:44:56.683906 Initializing PCH PCIe bridge.
1617 09:44:56.687168 PCI: 00:1d.0 init finished in 3 msecs
1618 09:44:56.690429 PCI: 00:1f.0 init
1619 09:44:56.693423 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 09:44:56.700046 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 09:44:56.700160 IOAPIC: ID = 0x02
1622 09:44:56.703931 IOAPIC: Dumping registers
1623 09:44:56.707053 reg 0x0000: 0x02000000
1624 09:44:56.707142 reg 0x0001: 0x00770020
1625 09:44:56.710182 reg 0x0002: 0x00000000
1626 09:44:56.716619 PCI: 00:1f.0 init finished in 21 msecs
1627 09:44:56.716702 PCI: 00:1f.2 init
1628 09:44:56.720228 Disabling ACPI via APMC.
1629 09:44:56.723524 APMC done.
1630 09:44:56.726577 PCI: 00:1f.2 init finished in 5 msecs
1631 09:44:56.738032 PCI: 01:00.0 init
1632 09:44:56.741286 PCI: 01:00.0 init finished in 0 msecs
1633 09:44:56.744895 PNP: 0c09.0 init
1634 09:44:56.748460 Google Chrome EC uptime: 10.156 seconds
1635 09:44:56.755047 Google Chrome AP resets since EC boot: 0
1636 09:44:56.757695 Google Chrome most recent AP reset causes:
1637 09:44:56.764601 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1638 09:44:56.767415 PNP: 0c09.0 init finished in 19 msecs
1639 09:44:56.773207 Devices initialized
1640 09:44:56.777084 Show all devs... After init.
1641 09:44:56.779693 Root Device: enabled 1
1642 09:44:56.779774 DOMAIN: 0000: enabled 1
1643 09:44:56.782817 CPU_CLUSTER: 0: enabled 1
1644 09:44:56.786287 PCI: 00:00.0: enabled 1
1645 09:44:56.789473 PCI: 00:02.0: enabled 1
1646 09:44:56.792714 PCI: 00:04.0: enabled 1
1647 09:44:56.792822 PCI: 00:05.0: enabled 1
1648 09:44:56.795966 PCI: 00:06.0: enabled 0
1649 09:44:56.799212 PCI: 00:07.0: enabled 0
1650 09:44:56.799293 PCI: 00:07.1: enabled 0
1651 09:44:56.802486 PCI: 00:07.2: enabled 0
1652 09:44:56.805880 PCI: 00:07.3: enabled 0
1653 09:44:56.808981 PCI: 00:08.0: enabled 1
1654 09:44:56.809061 PCI: 00:09.0: enabled 0
1655 09:44:56.812253 PCI: 00:0a.0: enabled 0
1656 09:44:56.816033 PCI: 00:0d.0: enabled 1
1657 09:44:56.819045 PCI: 00:0d.1: enabled 0
1658 09:44:56.819126 PCI: 00:0d.2: enabled 0
1659 09:44:56.822423 PCI: 00:0d.3: enabled 0
1660 09:44:56.825556 PCI: 00:0e.0: enabled 0
1661 09:44:56.829167 PCI: 00:10.2: enabled 1
1662 09:44:56.829248 PCI: 00:10.6: enabled 0
1663 09:44:56.832040 PCI: 00:10.7: enabled 0
1664 09:44:56.835294 PCI: 00:12.0: enabled 0
1665 09:44:56.838965 PCI: 00:12.6: enabled 0
1666 09:44:56.839046 PCI: 00:13.0: enabled 0
1667 09:44:56.842297 PCI: 00:14.0: enabled 1
1668 09:44:56.845518 PCI: 00:14.1: enabled 0
1669 09:44:56.848627 PCI: 00:14.2: enabled 1
1670 09:44:56.848744 PCI: 00:14.3: enabled 1
1671 09:44:56.852040 PCI: 00:15.0: enabled 1
1672 09:44:56.855174 PCI: 00:15.1: enabled 1
1673 09:44:56.858264 PCI: 00:15.2: enabled 1
1674 09:44:56.858341 PCI: 00:15.3: enabled 1
1675 09:44:56.861742 PCI: 00:16.0: enabled 1
1676 09:44:56.865075 PCI: 00:16.1: enabled 0
1677 09:44:56.868392 PCI: 00:16.2: enabled 0
1678 09:44:56.868465 PCI: 00:16.3: enabled 0
1679 09:44:56.871417 PCI: 00:16.4: enabled 0
1680 09:44:56.874486 PCI: 00:16.5: enabled 0
1681 09:44:56.878154 PCI: 00:17.0: enabled 0
1682 09:44:56.878262 PCI: 00:19.0: enabled 0
1683 09:44:56.881043 PCI: 00:19.1: enabled 1
1684 09:44:56.884514 PCI: 00:19.2: enabled 0
1685 09:44:56.887791 PCI: 00:1c.0: enabled 1
1686 09:44:56.887873 PCI: 00:1c.1: enabled 0
1687 09:44:56.891386 PCI: 00:1c.2: enabled 0
1688 09:44:56.894573 PCI: 00:1c.3: enabled 0
1689 09:44:56.897842 PCI: 00:1c.4: enabled 0
1690 09:44:56.897969 PCI: 00:1c.5: enabled 0
1691 09:44:56.900748 PCI: 00:1c.6: enabled 1
1692 09:44:56.904045 PCI: 00:1c.7: enabled 0
1693 09:44:56.907324 PCI: 00:1d.0: enabled 1
1694 09:44:56.907412 PCI: 00:1d.1: enabled 0
1695 09:44:56.910579 PCI: 00:1d.2: enabled 1
1696 09:44:56.914288 PCI: 00:1d.3: enabled 0
1697 09:44:56.917129 PCI: 00:1e.0: enabled 1
1698 09:44:56.917210 PCI: 00:1e.1: enabled 0
1699 09:44:56.920814 PCI: 00:1e.2: enabled 1
1700 09:44:56.923806 PCI: 00:1e.3: enabled 1
1701 09:44:56.927096 PCI: 00:1f.0: enabled 1
1702 09:44:56.927177 PCI: 00:1f.1: enabled 0
1703 09:44:56.930335 PCI: 00:1f.2: enabled 1
1704 09:44:56.933337 PCI: 00:1f.3: enabled 1
1705 09:44:56.936948 PCI: 00:1f.4: enabled 0
1706 09:44:56.937029 PCI: 00:1f.5: enabled 1
1707 09:44:56.940109 PCI: 00:1f.6: enabled 0
1708 09:44:56.943338 PCI: 00:1f.7: enabled 0
1709 09:44:56.943420 APIC: 00: enabled 1
1710 09:44:56.946562 GENERIC: 0.0: enabled 1
1711 09:44:56.949873 GENERIC: 0.0: enabled 1
1712 09:44:56.953059 GENERIC: 1.0: enabled 1
1713 09:44:56.953140 GENERIC: 0.0: enabled 1
1714 09:44:56.956323 GENERIC: 1.0: enabled 1
1715 09:44:56.959621 USB0 port 0: enabled 1
1716 09:44:56.963424 GENERIC: 0.0: enabled 1
1717 09:44:56.963505 USB0 port 0: enabled 1
1718 09:44:56.966429 GENERIC: 0.0: enabled 1
1719 09:44:56.969855 I2C: 00:1a: enabled 1
1720 09:44:56.969940 I2C: 00:31: enabled 1
1721 09:44:56.972915 I2C: 00:32: enabled 1
1722 09:44:56.976146 I2C: 00:10: enabled 1
1723 09:44:56.976236 I2C: 00:15: enabled 1
1724 09:44:56.979401 GENERIC: 0.0: enabled 0
1725 09:44:56.982815 GENERIC: 1.0: enabled 0
1726 09:44:56.985874 GENERIC: 0.0: enabled 1
1727 09:44:56.985956 SPI: 00: enabled 1
1728 09:44:56.989613 SPI: 00: enabled 1
1729 09:44:56.992547 PNP: 0c09.0: enabled 1
1730 09:44:56.992640 GENERIC: 0.0: enabled 1
1731 09:44:56.995783 USB3 port 0: enabled 1
1732 09:44:56.999335 USB3 port 1: enabled 1
1733 09:44:56.999416 USB3 port 2: enabled 0
1734 09:44:57.002878 USB3 port 3: enabled 0
1735 09:44:57.005833 USB2 port 0: enabled 0
1736 09:44:57.009327 USB2 port 1: enabled 1
1737 09:44:57.009408 USB2 port 2: enabled 1
1738 09:44:57.012639 USB2 port 3: enabled 0
1739 09:44:57.015771 USB2 port 4: enabled 1
1740 09:44:57.015852 USB2 port 5: enabled 0
1741 09:44:57.019137 USB2 port 6: enabled 0
1742 09:44:57.022106 USB2 port 7: enabled 0
1743 09:44:57.025424 USB2 port 8: enabled 0
1744 09:44:57.025505 USB2 port 9: enabled 0
1745 09:44:57.029093 USB3 port 0: enabled 0
1746 09:44:57.032363 USB3 port 1: enabled 1
1747 09:44:57.032443 USB3 port 2: enabled 0
1748 09:44:57.035643 USB3 port 3: enabled 0
1749 09:44:57.038913 GENERIC: 0.0: enabled 1
1750 09:44:57.041917 GENERIC: 1.0: enabled 1
1751 09:44:57.042023 APIC: 01: enabled 1
1752 09:44:57.044895 APIC: 03: enabled 1
1753 09:44:57.044976 APIC: 05: enabled 1
1754 09:44:57.048794 APIC: 06: enabled 1
1755 09:44:57.051998 APIC: 07: enabled 1
1756 09:44:57.052079 APIC: 02: enabled 1
1757 09:44:57.055146 APIC: 04: enabled 1
1758 09:44:57.058404 PCI: 01:00.0: enabled 1
1759 09:44:57.061737 BS: BS_DEV_INIT run times (exec / console): 32 / 537 ms
1760 09:44:57.068058 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1761 09:44:57.071282 ELOG: NV offset 0xf30000 size 0x1000
1762 09:44:57.078078 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1763 09:44:57.084701 ELOG: Event(17) added with size 13 at 2024-06-17 09:44:56 UTC
1764 09:44:57.091859 ELOG: Event(92) added with size 9 at 2024-06-17 09:44:56 UTC
1765 09:44:57.098027 ELOG: Event(93) added with size 9 at 2024-06-17 09:44:56 UTC
1766 09:44:57.104406 ELOG: Event(9E) added with size 10 at 2024-06-17 09:44:56 UTC
1767 09:44:57.111310 ELOG: Event(9F) added with size 14 at 2024-06-17 09:44:56 UTC
1768 09:44:57.117434 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1769 09:44:57.124533 ELOG: Event(A1) added with size 10 at 2024-06-17 09:44:56 UTC
1770 09:44:57.130724 elog_add_boot_reason: Logged recovery mode boot, reason: 0x02
1771 09:44:57.134665 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1772 09:44:57.137253 Finalize devices...
1773 09:44:57.137335 Devices finalized
1774 09:44:57.144193 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1775 09:44:57.150804 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1776 09:44:57.153943 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1777 09:44:57.160839 ME: HFSTS1 : 0x80030055
1778 09:44:57.164199 ME: HFSTS2 : 0x30280116
1779 09:44:57.170469 ME: HFSTS3 : 0x00000050
1780 09:44:57.173627 ME: HFSTS4 : 0x00004000
1781 09:44:57.176773 ME: HFSTS5 : 0x00000000
1782 09:44:57.183384 ME: HFSTS6 : 0x00400006
1783 09:44:57.186992 ME: Manufacturing Mode : YES
1784 09:44:57.190028 ME: SPI Protection Mode Enabled : NO
1785 09:44:57.193601 ME: FW Partition Table : OK
1786 09:44:57.196760 ME: Bringup Loader Failure : NO
1787 09:44:57.199989 ME: Firmware Init Complete : NO
1788 09:44:57.203013 ME: Boot Options Present : NO
1789 09:44:57.210060 ME: Update In Progress : NO
1790 09:44:57.212972 ME: D0i3 Support : YES
1791 09:44:57.216228 ME: Low Power State Enabled : NO
1792 09:44:57.219429 ME: CPU Replaced : YES
1793 09:44:57.223075 ME: CPU Replacement Valid : YES
1794 09:44:57.225956 ME: Current Working State : 5
1795 09:44:57.229568 ME: Current Operation State : 1
1796 09:44:57.235751 ME: Current Operation Mode : 3
1797 09:44:57.239034 ME: Error Code : 0
1798 09:44:57.242784 ME: Enhanced Debug Mode : NO
1799 09:44:57.245912 ME: CPU Debug Disabled : YES
1800 09:44:57.249144 ME: TXT Support : NO
1801 09:44:57.255394 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1802 09:44:57.262542 ELOG: Event(91) added with size 10 at 2024-06-17 09:44:56 UTC
1803 09:44:57.268798 Chrome EC: clear events_b mask to 0x0000000020004000
1804 09:44:57.275875 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1805 09:44:57.282115 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 09:44:57.285416 CBFS: 'fallback/slic' not found.
1807 09:44:57.288802 ACPI: Writing ACPI tables at 76b01000.
1808 09:44:57.291960 ACPI: * FACS
1809 09:44:57.292037 ACPI: * DSDT
1810 09:44:57.295051 Ramoops buffer: 0x100000@0x76a00000.
1811 09:44:57.301774 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 09:44:57.304764 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 09:44:57.308607 Google Chrome EC: version:
1814 09:44:57.311887 ro: voema_v2.0.7540-147f8d37d1
1815 09:44:57.314498 rw: voema_v2.0.7540-147f8d37d1
1816 09:44:57.318202 running image: 1
1817 09:44:57.324629 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1818 09:44:57.327841 ACPI: * FADT
1819 09:44:57.327922 SCI is IRQ9
1820 09:44:57.331546 ACPI: added table 1/32, length now 40
1821 09:44:57.334438 ACPI: * SSDT
1822 09:44:57.337442 Found 1 CPU(s) with 8 core(s) each.
1823 09:44:57.344225 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 09:44:57.347598 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 09:44:57.350792 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 09:44:57.354008 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 09:44:57.360647 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 09:44:57.367623 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 09:44:57.370468 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 09:44:57.377464 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 09:44:57.383482 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 09:44:57.387231 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 09:44:57.393146 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 09:44:57.396404 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 09:44:57.403512 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 09:44:57.406964 PS2K: Passing 80 keymaps to kernel
1837 09:44:57.413641 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 09:44:57.420013 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 09:44:57.426777 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 09:44:57.433131 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 09:44:57.440014 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 09:44:57.446776 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 09:44:57.452799 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 09:44:57.459402 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 09:44:57.462469 ACPI: added table 2/32, length now 44
1846 09:44:57.466442 ACPI: * MCFG
1847 09:44:57.469537 ACPI: added table 3/32, length now 48
1848 09:44:57.469619 ACPI: * TPM2
1849 09:44:57.472845 TPM2 log created at 0x769f0000
1850 09:44:57.478943 ACPI: added table 4/32, length now 52
1851 09:44:57.479025 ACPI: * MADT
1852 09:44:57.479088 SCI is IRQ9
1853 09:44:57.485626 ACPI: added table 5/32, length now 56
1854 09:44:57.485714 current = 76b09850
1855 09:44:57.488883 ACPI: * DMAR
1856 09:44:57.492375 ACPI: added table 6/32, length now 60
1857 09:44:57.495481 ACPI: added table 7/32, length now 64
1858 09:44:57.498808 ACPI: * HPET
1859 09:44:57.502010 ACPI: added table 8/32, length now 68
1860 09:44:57.502108 ACPI: done.
1861 09:44:57.505200 ACPI tables: 35216 bytes.
1862 09:44:57.508495 smbios_write_tables: 769ef000
1863 09:44:57.512219 EC returned error result code 3
1864 09:44:57.515172 Couldn't obtain OEM name from CBI
1865 09:44:57.518570 Create SMBIOS type 16
1866 09:44:57.522054 Create SMBIOS type 17
1867 09:44:57.524833 GENERIC: 0.0 (WIFI Device)
1868 09:44:57.524914 SMBIOS tables: 1750 bytes.
1869 09:44:57.531607 Writing table forward entry at 0x00000500
1870 09:44:57.537877 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 09:44:57.541112 Writing coreboot table at 0x76b25000
1872 09:44:57.547964 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 09:44:57.551220 1. 0000000000001000-000000000009ffff: RAM
1874 09:44:57.554411 2. 00000000000a0000-00000000000fffff: RESERVED
1875 09:44:57.560974 3. 0000000000100000-00000000769eefff: RAM
1876 09:44:57.567457 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 09:44:57.570650 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 09:44:57.577229 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 09:44:57.580383 7. 0000000077000000-000000007fbfffff: RESERVED
1880 09:44:57.586895 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 09:44:57.590577 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 09:44:57.596782 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 09:44:57.600002 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 09:44:57.606657 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 09:44:57.609929 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 09:44:57.613148 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 09:44:57.619700 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 09:44:57.623292 16. 0000000100000000-00000002803fffff: RAM
1889 09:44:57.626207 Passing 4 GPIOs to payload:
1890 09:44:57.632805 NAME | PORT | POLARITY | VALUE
1891 09:44:57.636459 lid | undefined | high | high
1892 09:44:57.642655 power | undefined | high | low
1893 09:44:57.649001 oprom | undefined | high | low
1894 09:44:57.652280 EC in RW | 0x000000e5 | high | low
1895 09:44:57.659524 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5318
1896 09:44:57.662424 coreboot table: 1576 bytes.
1897 09:44:57.665941 IMD ROOT 0. 0x76fff000 0x00001000
1898 09:44:57.669046 IMD SMALL 1. 0x76ffe000 0x00001000
1899 09:44:57.672275 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 09:44:57.678717 VPD 3. 0x76c4d000 0x00000367
1901 09:44:57.681992 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 09:44:57.685161 CONSOLE 5. 0x76c2c000 0x00020000
1903 09:44:57.688411 FMAP 6. 0x76c2b000 0x00000578
1904 09:44:57.691760 TIME STAMP 7. 0x76c2a000 0x00000910
1905 09:44:57.695020 VBOOT WORK 8. 0x76c16000 0x00014000
1906 09:44:57.698312 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 09:44:57.702003 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 09:44:57.708501 RAMSTAGE 11. 0x76b97000 0x00073000
1909 09:44:57.711408 REFCODE 12. 0x76b42000 0x00055000
1910 09:44:57.715133 SMM BACKUP 13. 0x76b32000 0x00010000
1911 09:44:57.718533 4f444749 14. 0x76b30000 0x00002000
1912 09:44:57.721602 EXT VBT15. 0x76b2d000 0x0000219f
1913 09:44:57.724942 COREBOOT 16. 0x76b25000 0x00008000
1914 09:44:57.728283 ACPI 17. 0x76b01000 0x00024000
1915 09:44:57.731470 ACPI GNVS 18. 0x76b00000 0x00001000
1916 09:44:57.738092 RAMOOPS 19. 0x76a00000 0x00100000
1917 09:44:57.740975 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 09:44:57.744402 SMBIOS 21. 0x769ef000 0x00000800
1919 09:44:57.744478 IMD small region:
1920 09:44:57.751057 IMD ROOT 0. 0x76ffec00 0x00000400
1921 09:44:57.754464 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 09:44:57.757421 POWER STATE 2. 0x76ffeb80 0x00000044
1923 09:44:57.761313 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 09:44:57.764689 MEM INFO 4. 0x76ffe980 0x000001e0
1925 09:44:57.770956 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1926 09:44:57.773853 MTRR: Physical address space:
1927 09:44:57.780796 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 09:44:57.787253 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 09:44:57.793858 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 09:44:57.800185 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 09:44:57.806746 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 09:44:57.813648 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 09:44:57.816572 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1934 09:44:57.823418 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 09:44:57.826790 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 09:44:57.829977 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 09:44:57.833182 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 09:44:57.839728 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 09:44:57.842770 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 09:44:57.846521 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 09:44:57.849535 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 09:44:57.856225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 09:44:57.859862 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 09:44:57.862683 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 09:44:57.866346 call enable_fixed_mtrr()
1946 09:44:57.869571 CPU physical address size: 39 bits
1947 09:44:57.875875 MTRR: default type WB/UC MTRR counts: 6/6.
1948 09:44:57.879559 MTRR: UC selected as default type.
1949 09:44:57.886152 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1950 09:44:57.892545 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1951 09:44:57.895826 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1952 09:44:57.902151 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1953 09:44:57.908728 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1954 09:44:57.915665 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1955 09:44:57.918947
1956 09:44:57.919028 MTRR check
1957 09:44:57.922112 Fixed MTRRs : Enabled
1958 09:44:57.922234 Variable MTRRs: Enabled
1959 09:44:57.922299
1960 09:44:57.928702 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 09:44:57.932242 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 09:44:57.935381 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 09:44:57.938683 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 09:44:57.945387 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 09:44:57.948418 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 09:44:57.951656 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 09:44:57.954754 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 09:44:57.961367 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 09:44:57.965082 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 09:44:57.968389 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 09:44:57.974858 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1972 09:44:57.978391 call enable_fixed_mtrr()
1973 09:44:57.984956 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
1974 09:44:57.987994 CPU physical address size: 39 bits
1975 09:44:57.995859 Checking segment from ROM address 0xffc02b38
1976 09:44:57.998961 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 09:44:58.002224 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 09:44:58.008812 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 09:44:58.012208 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 09:44:58.015557 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 09:44:58.018825 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 09:44:58.025386 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 09:44:58.028607 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 09:44:58.031669 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 09:44:58.034802 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 09:44:58.038100 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 09:44:58.045152 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 09:44:58.048438 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 09:44:58.051648 call enable_fixed_mtrr()
1990 09:44:58.054620 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 09:44:58.061214 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 09:44:58.064530 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 09:44:58.067577 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 09:44:58.071079 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 09:44:58.077578 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 09:44:58.080775 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 09:44:58.084178 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 09:44:58.087176 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 09:44:58.094940 CPU physical address size: 39 bits
2000 09:44:58.098235 call enable_fixed_mtrr()
2001 09:44:58.101150 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 09:44:58.104897 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 09:44:58.107663 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 09:44:58.114662 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 09:44:58.117733 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 09:44:58.120830 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 09:44:58.123961 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 09:44:58.130567 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 09:44:58.134427 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 09:44:58.137548 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 09:44:58.140548 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 09:44:58.147164 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 09:44:58.150537 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 09:44:58.153822 call enable_fixed_mtrr()
2015 09:44:58.156976 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 09:44:58.160074 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 09:44:58.166577 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 09:44:58.170484 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 09:44:58.173778 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 09:44:58.176882 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 09:44:58.183705 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 09:44:58.186628 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 09:44:58.190304 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 09:44:58.193753 CPU physical address size: 39 bits
2025 09:44:58.199760 call enable_fixed_mtrr()
2026 09:44:58.203024 CPU physical address size: 39 bits
2027 09:44:58.206428 Checking segment from ROM address 0xffc02b54
2028 09:44:58.210083 CPU physical address size: 39 bits
2029 09:44:58.213160 Loading segment from ROM address 0xffc02b38
2030 09:44:58.219679 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 09:44:58.222752 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 09:44:58.225958 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 09:44:58.229425 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 09:44:58.235915 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 09:44:58.239100 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 09:44:58.242299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 09:44:58.245973 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 09:44:58.252409 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 09:44:58.255523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 09:44:58.258763 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 09:44:58.261996 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 09:44:58.268928 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 09:44:58.272197 call enable_fixed_mtrr()
2044 09:44:58.275492 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 09:44:58.278726 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 09:44:58.285042 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 09:44:58.288822 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 09:44:58.291912 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 09:44:58.294995 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 09:44:58.301721 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 09:44:58.305159 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 09:44:58.308344 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 09:44:58.311401 CPU physical address size: 39 bits
2054 09:44:58.315478 call enable_fixed_mtrr()
2055 09:44:58.319160 code (compression=0)
2056 09:44:58.322745 CPU physical address size: 39 bits
2057 09:44:58.331872 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2058 09:44:58.338282 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2059 09:44:58.341667 it's not compressed!
2060 09:44:58.480455 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2061 09:44:58.486979 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2062 09:44:58.493438 Loading segment from ROM address 0xffc02b54
2063 09:44:58.496739 Entry Point 0x30000000
2064 09:44:58.496821 Loaded segments
2065 09:44:58.503332 BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms
2066 09:44:58.546493 Finalizing chipset.
2067 09:44:58.549859 Finalizing SMM.
2068 09:44:58.549946 APMC done.
2069 09:44:58.556620 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2070 09:44:58.559752 mp_park_aps done after 0 msecs.
2071 09:44:58.563053 Jumping to boot code at 0x30000000(0x76b25000)
2072 09:44:58.572900 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2073 09:44:58.572982
2074 09:44:58.575939
2075 09:44:58.576021
2076 09:44:58.579347 Starting depthcharge on Voema...
2077 09:44:58.579435
2078 09:44:58.579763 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2079 09:44:58.579865 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2080 09:44:58.579948 Setting prompt string to ['volteer:']
2081 09:44:58.580032 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2082 09:44:58.586094 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2083 09:44:58.586190
2084 09:44:58.592408 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2085 09:44:58.592490
2086 09:44:58.598891 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2087 09:44:58.598976
2088 09:44:58.602686 Failed to find eMMC card reader
2089 09:44:58.602767
2090 09:44:58.605902 Wipe memory regions:
2091 09:44:58.605983
2092 09:44:58.609268 [0x00000000001000, 0x000000000a0000)
2093 09:44:58.609350
2094 09:44:58.612493 [0x00000000100000, 0x00000030000000)
2095 09:44:58.638454
2096 09:44:58.641523 [0x00000032662db0, 0x000000769ef000)
2097 09:44:58.677494
2098 09:44:58.680736 [0x00000100000000, 0x00000280400000)
2099 09:44:58.881687
2100 09:44:58.884759 ec_init: CrosEC protocol v3 supported (256, 256)
2101 09:44:58.884843
2102 09:44:58.891785 update_port_state: port C0 state: usb enable 1 mux conn 0
2103 09:44:58.891872
2104 09:44:58.901407 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2105 09:44:58.901494
2106 09:44:58.904615 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2107 09:44:58.904698
2108 09:44:58.910954 send_conn_disc_msg: pmc_send_cmd succeeded
2109 09:44:59.341270
2110 09:44:59.341421 R8152: Initializing
2111 09:44:59.341487
2112 09:44:59.344487 Version 6 (ocp_data = 5c30)
2113 09:44:59.344571
2114 09:44:59.348070 R8152: Done initializing
2115 09:44:59.348208
2116 09:44:59.351033 Adding net device
2117 09:44:59.660618
2118 09:44:59.661119 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2119 09:44:59.661587
2120 09:44:59.662029
2121 09:44:59.662973 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2123 09:44:59.764083 volteer: tftpboot 192.168.201.1 14392700/tftp-deploy-hn32_1xy/kernel/bzImage 14392700/tftp-deploy-hn32_1xy/kernel/cmdline 14392700/tftp-deploy-hn32_1xy/ramdisk/ramdisk.cpio.gz
2124 09:44:59.764265 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 09:44:59.764370 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2126 09:44:59.768351 tftpboot 192.168.201.1 14392700/tftp-deploy-hn32_1xy/kernel/bzIploy-hn32_1xy/kernel/cmdline 14392700/tftp-deploy-hn32_1xy/ramdisk/ramdisk.cpio.gz
2127 09:44:59.768463
2128 09:44:59.768573 Waiting for link
2129 09:44:59.970998
2130 09:44:59.971144 done.
2131 09:44:59.971210
2132 09:44:59.971270 MAC: 00:24:32:30:79:42
2133 09:44:59.971333
2134 09:44:59.974485 Sending DHCP discover... done.
2135 09:44:59.974569
2136 09:44:59.977647 Waiting for reply... done.
2137 09:44:59.977763
2138 09:44:59.980982 Sending DHCP request... done.
2139 09:44:59.981122
2140 09:45:00.071170 Waiting for reply... done.
2141 09:45:00.071349
2142 09:45:00.071444 My ip is 192.168.201.13
2143 09:45:00.071533
2144 09:45:00.077451 The DHCP server ip is 192.168.201.1
2145 09:45:00.077582
2146 09:45:00.080990 TFTP server IP predefined by user: 192.168.201.1
2147 09:45:00.081082
2148 09:45:00.087603 Bootfile predefined by user: 14392700/tftp-deploy-hn32_1xy/kernel/bzImage
2149 09:45:00.087727
2150 09:45:00.090757 Sending tftp read request... done.
2151 09:45:00.090849
2152 09:45:00.097690 Waiting for the transfer...
2153 09:45:00.097810
2154 09:45:00.664422 00000000 ################################################################
2155 09:45:00.664574
2156 09:45:01.222568 00080000 ################################################################
2157 09:45:01.222715
2158 09:45:01.779432 00100000 ################################################################
2159 09:45:01.779565
2160 09:45:02.332851 00180000 ################################################################
2161 09:45:02.332997
2162 09:45:02.899393 00200000 ################################################################
2163 09:45:02.899546
2164 09:45:03.487477 00280000 ################################################################
2165 09:45:03.487710
2166 09:45:04.049845 00300000 ################################################################
2167 09:45:04.049995
2168 09:45:04.598591 00380000 ################################################################
2169 09:45:04.598729
2170 09:45:05.136041 00400000 ################################################################
2171 09:45:05.136206
2172 09:45:05.695669 00480000 ################################################################
2173 09:45:05.695821
2174 09:45:06.276950 00500000 ################################################################
2175 09:45:06.277097
2176 09:45:06.937717 00580000 ################################################################
2177 09:45:06.937867
2178 09:45:07.628380 00600000 ################################################################
2179 09:45:07.628851
2180 09:45:08.331150 00680000 ################################################################
2181 09:45:08.331682
2182 09:45:09.026159 00700000 ################################################################
2183 09:45:09.026710
2184 09:45:09.735513 00780000 ################################################################
2185 09:45:09.736157
2186 09:45:10.423396 00800000 ################################################################
2187 09:45:10.423921
2188 09:45:11.115327 00880000 ################################################################
2189 09:45:11.115843
2190 09:45:11.770404 00900000 ################################################################
2191 09:45:11.770975
2192 09:45:12.430519 00980000 ################################################################
2193 09:45:12.431047
2194 09:45:13.077174 00a00000 ################################################################
2195 09:45:13.077767
2196 09:45:13.734402 00a80000 ################################################################
2197 09:45:13.735115
2198 09:45:14.406775 00b00000 ################################################################
2199 09:45:14.407285
2200 09:45:14.983677 00b80000 ################################################################
2201 09:45:14.983822
2202 09:45:15.558712 00c00000 ################################################################
2203 09:45:15.559375
2204 09:45:16.198719 00c80000 ################################################################
2205 09:45:16.199452
2206 09:45:16.803250 00d00000 ################################################################ done.
2207 09:45:16.803402
2208 09:45:16.806713 The bootfile was 14155664 bytes long.
2209 09:45:16.806797
2210 09:45:16.810462 Sending tftp read request... done.
2211 09:45:16.810547
2212 09:45:16.813081 Waiting for the transfer...
2213 09:45:16.813162
2214 09:45:17.421461 00000000 ################################################################
2215 09:45:17.421611
2216 09:45:17.981988 00080000 ################################################################
2217 09:45:17.982170
2218 09:45:18.532264 00100000 ################################################################
2219 09:45:18.532433
2220 09:45:19.100517 00180000 ################################################################
2221 09:45:19.100700
2222 09:45:19.675009 00200000 ################################################################
2223 09:45:19.675148
2224 09:45:20.304550 00280000 ################################################################
2225 09:45:20.304712
2226 09:45:20.856729 00300000 ################################################################
2227 09:45:20.856873
2228 09:45:21.395395 00380000 ################################################################
2229 09:45:21.395530
2230 09:45:21.939371 00400000 ################################################################
2231 09:45:21.939507
2232 09:45:22.473413 00480000 ################################################################
2233 09:45:22.473556
2234 09:45:23.014113 00500000 ################################################################
2235 09:45:23.014324
2236 09:45:23.567979 00580000 ################################################################
2237 09:45:23.568120
2238 09:45:24.107599 00600000 ################################################################
2239 09:45:24.107747
2240 09:45:24.638228 00680000 ################################################################
2241 09:45:24.638379
2242 09:45:25.161118 00700000 ################################################################
2243 09:45:25.161293
2244 09:45:25.704220 00780000 ################################################################
2245 09:45:25.704374
2246 09:45:26.229216 00800000 ################################################################
2247 09:45:26.229347
2248 09:45:26.744398 00880000 ################################################################
2249 09:45:26.744554
2250 09:45:26.758315 00900000 ## done.
2251 09:45:26.758430
2252 09:45:26.761750 Sending tftp read request... done.
2253 09:45:26.761856
2254 09:45:26.764829 Waiting for the transfer...
2255 09:45:26.764932
2256 09:45:26.765021 00000000 # done.
2257 09:45:26.765118
2258 09:45:26.774995 Command line loaded dynamically from TFTP file: 14392700/tftp-deploy-hn32_1xy/kernel/cmdline
2259 09:45:26.775081
2260 09:45:26.790933 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2261 09:45:26.795796
2262 09:45:26.799004 Shutting down all USB controllers.
2263 09:45:26.799082
2264 09:45:26.799158 Removing current net device
2265 09:45:26.799219
2266 09:45:26.802076 Finalizing coreboot
2267 09:45:26.802199
2268 09:45:26.808839 Exiting depthcharge with code 4 at timestamp: 36888275
2269 09:45:26.808926
2270 09:45:26.808997
2271 09:45:26.809060 Starting kernel ...
2272 09:45:26.809129
2273 09:45:26.809542 end: 2.2.4 bootloader-commands (duration 00:00:28) [common]
2274 09:45:26.809638 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2275 09:45:26.809728 Setting prompt string to ['Linux version [0-9]']
2276 09:45:26.809796 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2277 09:45:26.809862 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2278 09:45:26.811859
2280 09:49:45.809912 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2282 09:49:45.810241 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2284 09:49:45.810498 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2287 09:49:45.810931 end: 2 depthcharge-action (duration 00:05:00) [common]
2289 09:49:45.811247 Cleaning after the job
2290 09:49:45.811398 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/ramdisk
2291 09:49:45.812709 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/kernel
2292 09:49:45.814473 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392700/tftp-deploy-hn32_1xy/modules
2293 09:49:45.815036 start: 4.1 power-off (timeout 00:00:30) [common]
2294 09:49:45.815358 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-8', '--port=1', '--command=off']
2295 09:49:46.710266 >> Command sent successfully.
2296 09:49:46.712575 Returned 0 in 0 seconds
2297 09:49:46.812980 end: 4.1 power-off (duration 00:00:01) [common]
2299 09:49:46.813300 start: 4.2 read-feedback (timeout 00:09:59) [common]
2300 09:49:46.813553 Listened to connection for namespace 'common' for up to 1s
2302 09:49:46.813917 Listened to connection for namespace 'common' for up to 1s
2303 09:49:47.814252 Finalising connection for namespace 'common'
2304 09:49:47.814427 Disconnecting from shell: Finalise
2305 09:49:47.814505
2306 09:49:47.914845 end: 4.2 read-feedback (duration 00:00:01) [common]
2307 09:49:47.915025 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14392700
2308 09:49:47.932733 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14392700
2309 09:49:47.932932 JobError: Your job cannot terminate cleanly.