Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 09:50:51.603488 lava-dispatcher, installed at version: 2024.03
2 09:50:51.603707 start: 0 validate
3 09:50:51.603851 Start time: 2024-06-17 09:50:51.603843+00:00 (UTC)
4 09:50:51.603986 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:50:51.604149 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 09:50:51.869652 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:50:51.869830 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2561-g409c5ed72dea9%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:50:52.118263 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:50:52.118441 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2561-g409c5ed72dea9%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 09:50:52.369156 validate duration: 0.77
12 09:50:52.369483 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:50:52.369620 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:50:52.369741 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:50:52.369898 Not decompressing ramdisk as can be used compressed.
16 09:50:52.370013 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 09:50:52.370089 saving as /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/ramdisk/rootfs.cpio.gz
18 09:50:52.370169 total size: 8417901 (8 MB)
19 09:50:52.371377 progress 0 % (0 MB)
20 09:50:52.374081 progress 5 % (0 MB)
21 09:50:52.376708 progress 10 % (0 MB)
22 09:50:52.379400 progress 15 % (1 MB)
23 09:50:52.382132 progress 20 % (1 MB)
24 09:50:52.384879 progress 25 % (2 MB)
25 09:50:52.387602 progress 30 % (2 MB)
26 09:50:52.390083 progress 35 % (2 MB)
27 09:50:52.392790 progress 40 % (3 MB)
28 09:50:52.395561 progress 45 % (3 MB)
29 09:50:52.398269 progress 50 % (4 MB)
30 09:50:52.400983 progress 55 % (4 MB)
31 09:50:52.403605 progress 60 % (4 MB)
32 09:50:52.405952 progress 65 % (5 MB)
33 09:50:52.408559 progress 70 % (5 MB)
34 09:50:52.411183 progress 75 % (6 MB)
35 09:50:52.413822 progress 80 % (6 MB)
36 09:50:52.416451 progress 85 % (6 MB)
37 09:50:52.419122 progress 90 % (7 MB)
38 09:50:52.421772 progress 95 % (7 MB)
39 09:50:52.424251 progress 100 % (8 MB)
40 09:50:52.424517 8 MB downloaded in 0.05 s (147.70 MB/s)
41 09:50:52.424699 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:50:52.424971 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:50:52.425072 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:50:52.425173 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:50:52.425325 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2561-g409c5ed72dea9/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 09:50:52.425413 saving as /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/kernel/bzImage
48 09:50:52.425484 total size: 14155664 (13 MB)
49 09:50:52.425553 No compression specified
50 09:50:52.426774 progress 0 % (0 MB)
51 09:50:52.431182 progress 5 % (0 MB)
52 09:50:52.435740 progress 10 % (1 MB)
53 09:50:52.440026 progress 15 % (2 MB)
54 09:50:52.444517 progress 20 % (2 MB)
55 09:50:52.448825 progress 25 % (3 MB)
56 09:50:52.453394 progress 30 % (4 MB)
57 09:50:52.457939 progress 35 % (4 MB)
58 09:50:52.462111 progress 40 % (5 MB)
59 09:50:52.466493 progress 45 % (6 MB)
60 09:50:52.470591 progress 50 % (6 MB)
61 09:50:52.475060 progress 55 % (7 MB)
62 09:50:52.479593 progress 60 % (8 MB)
63 09:50:52.483933 progress 65 % (8 MB)
64 09:50:52.488418 progress 70 % (9 MB)
65 09:50:52.492771 progress 75 % (10 MB)
66 09:50:52.497342 progress 80 % (10 MB)
67 09:50:52.501598 progress 85 % (11 MB)
68 09:50:52.505696 progress 90 % (12 MB)
69 09:50:52.510024 progress 95 % (12 MB)
70 09:50:52.513995 progress 100 % (13 MB)
71 09:50:52.514310 13 MB downloaded in 0.09 s (151.99 MB/s)
72 09:50:52.514492 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:50:52.514768 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:50:52.514871 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:50:52.514967 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:50:52.515124 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2561-g409c5ed72dea9/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 09:50:52.515203 saving as /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/modules/modules.tar
79 09:50:52.515274 total size: 714764 (0 MB)
80 09:50:52.515344 Using unxz to decompress xz
81 09:50:52.519928 progress 4 % (0 MB)
82 09:50:52.520379 progress 9 % (0 MB)
83 09:50:52.522498 progress 18 % (0 MB)
84 09:50:52.526832 progress 27 % (0 MB)
85 09:50:52.529042 progress 32 % (0 MB)
86 09:50:52.533338 progress 41 % (0 MB)
87 09:50:52.537069 progress 50 % (0 MB)
88 09:50:52.539263 progress 55 % (0 MB)
89 09:50:52.543600 progress 64 % (0 MB)
90 09:50:52.547715 progress 73 % (0 MB)
91 09:50:52.551617 progress 82 % (0 MB)
92 09:50:52.553639 progress 87 % (0 MB)
93 09:50:52.558081 progress 96 % (0 MB)
94 09:50:52.566679 0 MB downloaded in 0.05 s (13.26 MB/s)
95 09:50:52.566935 end: 1.3.1 http-download (duration 00:00:00) [common]
97 09:50:52.567332 end: 1.3 download-retry (duration 00:00:00) [common]
98 09:50:52.567476 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
99 09:50:52.567606 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
100 09:50:52.567709 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
101 09:50:52.567807 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
102 09:50:52.568055 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6
103 09:50:52.568228 makedir: /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin
104 09:50:52.568348 makedir: /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/tests
105 09:50:52.568460 makedir: /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/results
106 09:50:52.568593 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-add-keys
107 09:50:52.568778 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-add-sources
108 09:50:52.568929 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-background-process-start
109 09:50:52.569083 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-background-process-stop
110 09:50:52.569236 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-common-functions
111 09:50:52.569390 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-echo-ipv4
112 09:50:52.569531 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-install-packages
113 09:50:52.569687 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-installed-packages
114 09:50:52.569833 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-os-build
115 09:50:52.569974 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-probe-channel
116 09:50:52.570160 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-probe-ip
117 09:50:52.570347 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-target-ip
118 09:50:52.570523 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-target-mac
119 09:50:52.570698 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-target-storage
120 09:50:52.570883 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-case
121 09:50:52.571059 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-event
122 09:50:52.571235 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-feedback
123 09:50:52.571418 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-raise
124 09:50:52.571565 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-reference
125 09:50:52.571708 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-runner
126 09:50:52.571848 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-set
127 09:50:52.571989 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-test-shell
128 09:50:52.572133 Updating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-install-packages (oe)
129 09:50:52.572300 Updating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/bin/lava-installed-packages (oe)
130 09:50:52.572442 Creating /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/environment
131 09:50:52.572555 LAVA metadata
132 09:50:52.572636 - LAVA_JOB_ID=14392715
133 09:50:52.572707 - LAVA_DISPATCHER_IP=192.168.201.1
134 09:50:52.572823 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
135 09:50:52.572899 skipped lava-vland-overlay
136 09:50:52.572982 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
137 09:50:52.573071 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
138 09:50:52.573142 skipped lava-multinode-overlay
139 09:50:52.573245 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
140 09:50:52.573342 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
141 09:50:52.573439 Loading test definitions
142 09:50:52.573559 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
143 09:50:52.573649 Using /lava-14392715 at stage 0
144 09:50:52.574033 uuid=14392715_1.4.2.3.1 testdef=None
145 09:50:52.574135 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
146 09:50:52.574246 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
147 09:50:52.574905 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
149 09:50:52.575197 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
150 09:50:52.576047 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
152 09:50:52.576331 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
153 09:50:52.577094 runner path: /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/0/tests/0_dmesg test_uuid 14392715_1.4.2.3.1
154 09:50:52.577283 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
156 09:50:52.577538 Creating lava-test-runner.conf files
157 09:50:52.577620 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14392715/lava-overlay-cfnidyj6/lava-14392715/0 for stage 0
158 09:50:52.577721 - 0_dmesg
159 09:50:52.577880 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
160 09:50:52.578022 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
161 09:50:52.587771 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
162 09:50:52.587890 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
163 09:50:52.588029 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
164 09:50:52.588137 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
165 09:50:52.588236 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
166 09:50:52.864822 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
167 09:50:52.865261 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
168 09:50:52.865392 extracting modules file /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14392715/extract-overlay-ramdisk-k4tyhizo/ramdisk
169 09:50:52.891184 end: 1.4.4 extract-modules (duration 00:00:00) [common]
170 09:50:52.891398 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
171 09:50:52.891523 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14392715/compress-overlay-7__eb6b6/overlay-1.4.2.4.tar.gz to ramdisk
172 09:50:52.891611 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14392715/compress-overlay-7__eb6b6/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14392715/extract-overlay-ramdisk-k4tyhizo/ramdisk
173 09:50:52.900262 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
174 09:50:52.900388 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
175 09:50:52.900500 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
176 09:50:52.900609 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
177 09:50:52.900697 Building ramdisk /var/lib/lava/dispatcher/tmp/14392715/extract-overlay-ramdisk-k4tyhizo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14392715/extract-overlay-ramdisk-k4tyhizo/ramdisk
178 09:50:53.050637 >> 53732 blocks
179 09:50:54.093843 rename /var/lib/lava/dispatcher/tmp/14392715/extract-overlay-ramdisk-k4tyhizo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/ramdisk/ramdisk.cpio.gz
180 09:50:54.094359 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
181 09:50:54.094502 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
182 09:50:54.094637 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
183 09:50:54.094743 No mkimage arch provided, not using FIT.
184 09:50:54.094856 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
185 09:50:54.094954 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
186 09:50:54.095080 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
187 09:50:54.095187 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
188 09:50:54.095289 No LXC device requested
189 09:50:54.095386 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
190 09:50:54.095520 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
191 09:50:54.095616 end: 1.6 deploy-device-env (duration 00:00:00) [common]
192 09:50:54.095704 Checking files for TFTP limit of 4294967296 bytes.
193 09:50:54.096185 end: 1 tftp-deploy (duration 00:00:02) [common]
194 09:50:54.096321 start: 2 depthcharge-action (timeout 00:05:00) [common]
195 09:50:54.096430 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
196 09:50:54.096582 substitutions:
197 09:50:54.096658 - {DTB}: None
198 09:50:54.096747 - {INITRD}: 14392715/tftp-deploy-e3za51x0/ramdisk/ramdisk.cpio.gz
199 09:50:54.096816 - {KERNEL}: 14392715/tftp-deploy-e3za51x0/kernel/bzImage
200 09:50:54.096893 - {LAVA_MAC}: None
201 09:50:54.096959 - {PRESEED_CONFIG}: None
202 09:50:54.097022 - {PRESEED_LOCAL}: None
203 09:50:54.097096 - {RAMDISK}: 14392715/tftp-deploy-e3za51x0/ramdisk/ramdisk.cpio.gz
204 09:50:54.097159 - {ROOT_PART}: None
205 09:50:54.097222 - {ROOT}: None
206 09:50:54.097303 - {SERVER_IP}: 192.168.201.1
207 09:50:54.097367 - {TEE}: None
208 09:50:54.097429 Parsed boot commands:
209 09:50:54.097501 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
210 09:50:54.097709 Parsed boot commands: tftpboot 192.168.201.1 14392715/tftp-deploy-e3za51x0/kernel/bzImage 14392715/tftp-deploy-e3za51x0/kernel/cmdline 14392715/tftp-deploy-e3za51x0/ramdisk/ramdisk.cpio.gz
211 09:50:54.097808 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
212 09:50:54.097924 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
213 09:50:54.098029 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
214 09:50:54.098133 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
215 09:50:54.098212 Not connected, no need to disconnect.
216 09:50:54.098307 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
217 09:50:54.098401 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
218 09:50:54.098494 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
219 09:50:54.102513 Setting prompt string to ['lava-test: # ']
220 09:50:54.102935 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
221 09:50:54.103059 end: 2.2.1 reset-connection (duration 00:00:00) [common]
222 09:50:54.103182 start: 2.2.2 reset-device (timeout 00:05:00) [common]
223 09:50:54.103300 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
224 09:50:54.103518 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'asus-C436FA-Flip-hatch-cbg-4']
225 09:51:03.078915 Returned 0 in 8 seconds
226 09:51:03.179563 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
228 09:51:03.179924 end: 2.2.2 reset-device (duration 00:00:09) [common]
229 09:51:03.180043 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
230 09:51:03.180152 Setting prompt string to 'Starting depthcharge on Helios...'
231 09:51:03.180230 Changing prompt to 'Starting depthcharge on Helios...'
232 09:51:03.180308 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
233 09:51:03.180757 [Enter `^Ec?' for help]
234 09:51:03.180849
235 09:51:03.180923
236 09:51:03.180994 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
237 09:51:03.181066 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
238 09:51:03.181133 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
239 09:51:03.181200 CPU: AES supported, TXT NOT supported, VT supported
240 09:51:03.181265 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
241 09:51:03.181333 PCH: device id 0284 (rev 00) is Cometlake-U Premium
242 09:51:03.181401 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
243 09:51:03.181463 VBOOT: Loading verstage.
244 09:51:03.181524 FMAP: Found "FLASH" version 1.1 at 0xc04000.
245 09:51:03.181586 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
246 09:51:03.181648 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
247 09:51:03.181709 CBFS @ c08000 size 3f8000
248 09:51:03.181770 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
249 09:51:03.181830 CBFS: Locating 'fallback/verstage'
250 09:51:03.181891 CBFS: Found @ offset 10fb80 size 1072c
251 09:51:03.181952
252 09:51:03.182012
253 09:51:03.182071 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
254 09:51:03.182133 Probing TPM: . done!
255 09:51:03.182194 TPM ready after 0 ms
256 09:51:03.182254 Connected to device vid:did:rid of 1ae0:0028:00
257 09:51:03.182315 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
258 09:51:03.182379 Initialized TPM device CR50 revision 0
259 09:51:03.182439 tlcl_send_startup: Startup return code is 0
260 09:51:03.182499 TPM: setup succeeded
261 09:51:03.182560 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
262 09:51:03.182621 Chrome EC: UHEPI supported
263 09:51:03.182681 Phase 1
264 09:51:03.182740 FMAP: area GBB found @ c05000 (12288 bytes)
265 09:51:03.182802 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
266 09:51:03.182862 VB2:vb2_check_recovery() Recovery was requested manually
267 09:51:03.182923 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
268 09:51:03.182983 Recovery requested (1009000e)
269 09:51:03.183043 tlcl_extend: response is 0
270 09:51:03.183103 tlcl_extend: response is 0
271 09:51:03.183163 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
272 09:51:03.183223 CBFS @ c08000 size 3f8000
273 09:51:03.183283 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
274 09:51:03.183343 CBFS: Locating 'fallback/romstage'
275 09:51:03.183412 CBFS: Found @ offset 80 size 145fc
276 09:51:03.183483 Accumulated console time in verstage 102 ms
277 09:51:03.183551
278 09:51:03.183612
279 09:51:03.183671 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
280 09:51:03.183732 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
281 09:51:03.183793 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
282 09:51:03.183879 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
283 09:51:03.183945 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
284 09:51:03.184006 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
285 09:51:03.184067 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
286 09:51:03.184126 TCO_STS: 0000 0000
287 09:51:03.184196 GEN_PMCON: e0015038 00000200
288 09:51:03.184272 GBLRST_CAUSE: 00000000 00000000
289 09:51:03.184341 prev_sleep_state 5
290 09:51:03.184402 Boot Count incremented to 9158
291 09:51:03.184462 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
292 09:51:03.184523 CBFS @ c08000 size 3f8000
293 09:51:03.184582 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
294 09:51:03.184642 CBFS: Locating 'fspm.bin'
295 09:51:03.184758 CBFS: Found @ offset 5ffc0 size 71000
296 09:51:03.184853 Chrome EC: UHEPI supported
297 09:51:03.184944 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
298 09:51:03.185008 Probing TPM: done!
299 09:51:03.185069 Connected to device vid:did:rid of 1ae0:0028:00
300 09:51:03.185137 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
301 09:51:03.185199 Initialized TPM device CR50 revision 0
302 09:51:03.185260 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
303 09:51:03.185320 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
304 09:51:03.185385 MRC cache found, size 1948
305 09:51:03.185448 bootmode is set to: 2
306 09:51:03.185520 PRMRR disabled by config.
307 09:51:03.185584 SPD INDEX = 1
308 09:51:03.185645 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
309 09:51:03.185706 CBFS @ c08000 size 3f8000
310 09:51:03.185765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
311 09:51:03.185833 CBFS: Locating 'spd.bin'
312 09:51:03.185893 CBFS: Found @ offset 5fb80 size 400
313 09:51:03.185954 SPD: module type is LPDDR3
314 09:51:03.186014 SPD: module part is
315 09:51:03.186073 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
316 09:51:03.186134 SPD: device width 4 bits, bus width 8 bits
317 09:51:03.186199 SPD: module size is 4096 MB (per channel)
318 09:51:03.186261 memory slot: 0 configuration done.
319 09:51:03.186321 memory slot: 2 configuration done.
320 09:51:03.186381 CBMEM:
321 09:51:03.186440 IMD: root @ 99fff000 254 entries.
322 09:51:03.186499 IMD: root @ 99ffec00 62 entries.
323 09:51:03.186562 External stage cache:
324 09:51:03.186624 IMD: root @ 9abff000 254 entries.
325 09:51:03.186684 IMD: root @ 9abfec00 62 entries.
326 09:51:03.186754 Chrome EC: clear events_b mask to 0x0000000020004000
327 09:51:03.186823 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
328 09:51:03.186886 tlcl_write: response is 0
329 09:51:03.186946 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
330 09:51:03.187007 MRC: TPM MRC hash updated successfully.
331 09:51:03.187067 2 DIMMs found
332 09:51:03.187128 SMM Memory Map
333 09:51:03.187188 SMRAM : 0x9a000000 0x1000000
334 09:51:03.187456 Subregion 0: 0x9a000000 0xa00000
335 09:51:03.187532 Subregion 1: 0x9aa00000 0x200000
336 09:51:03.187595 Subregion 2: 0x9ac00000 0x400000
337 09:51:03.187655 top_of_ram = 0x9a000000
338 09:51:03.187716 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
339 09:51:03.187776 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
340 09:51:03.187837 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 09:51:03.187897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 09:51:03.187958 CBFS @ c08000 size 3f8000
343 09:51:03.188018 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 09:51:03.188079 CBFS: Locating 'fallback/postcar'
345 09:51:03.188138 CBFS: Found @ offset 107000 size 4b44
346 09:51:03.188199 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
347 09:51:03.188260 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
348 09:51:03.188321 Processing 180 relocs. Offset value of 0x97c0c000
349 09:51:03.188382 Accumulated console time in romstage 286 ms
350 09:51:03.188442
351 09:51:03.188502
352 09:51:03.188561 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
353 09:51:03.188622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 09:51:03.188682 CBFS @ c08000 size 3f8000
355 09:51:03.188743 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 09:51:03.188802 CBFS: Locating 'fallback/ramstage'
357 09:51:03.188861 CBFS: Found @ offset 43380 size 1b9e8
358 09:51:03.188921 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
359 09:51:03.188981 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
360 09:51:03.189042 Processing 3976 relocs. Offset value of 0x98db0000
361 09:51:03.189102 Accumulated console time in postcar 52 ms
362 09:51:03.189161
363 09:51:03.189220
364 09:51:03.189279 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
365 09:51:03.189341 FMAP: area RO_VPD found @ c00000 (16384 bytes)
366 09:51:03.189401 WARNING: RO_VPD is uninitialized or empty.
367 09:51:03.189461 FMAP: area RW_VPD found @ af8000 (8192 bytes)
368 09:51:03.189521 FMAP: area RW_VPD found @ af8000 (8192 bytes)
369 09:51:03.189581 Normal boot.
370 09:51:03.189642 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
371 09:51:03.189702 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 09:51:03.189762 CBFS @ c08000 size 3f8000
373 09:51:03.189822 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 09:51:03.189882 CBFS: Locating 'cpu_microcode_blob.bin'
375 09:51:03.189942 CBFS: Found @ offset 14700 size 2ec00
376 09:51:03.190002 microcode: sig=0x806ec pf=0x4 revision=0xc9
377 09:51:03.190062 Skip microcode update
378 09:51:03.190125 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 09:51:03.190185 CBFS @ c08000 size 3f8000
380 09:51:03.190245 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 09:51:03.190305 CBFS: Locating 'fsps.bin'
382 09:51:03.190365 CBFS: Found @ offset d1fc0 size 35000
383 09:51:03.190425 Detected 4 core, 8 thread CPU.
384 09:51:03.190485 Setting up SMI for CPU
385 09:51:03.190545 IED base = 0x9ac00000
386 09:51:03.190604 IED size = 0x00400000
387 09:51:03.190663 Will perform SMM setup.
388 09:51:03.190722 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
389 09:51:03.190782 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
390 09:51:03.190842 Processing 16 relocs. Offset value of 0x00030000
391 09:51:03.190902 Attempting to start 7 APs
392 09:51:03.190962 Waiting for 10ms after sending INIT.
393 09:51:03.191021 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
394 09:51:03.191080 done.
395 09:51:03.191139 AP: slot 6 apic_id 6.
396 09:51:03.191199 AP: slot 7 apic_id 7.
397 09:51:03.191257 AP: slot 5 apic_id 5.
398 09:51:03.191316 AP: slot 3 apic_id 4.
399 09:51:03.191375 AP: slot 1 apic_id 2.
400 09:51:03.191463 AP: slot 2 apic_id 3.
401 09:51:03.191564 Waiting for 2nd SIPI to complete...done.
402 09:51:03.191669 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
403 09:51:03.191738 Processing 13 relocs. Offset value of 0x00038000
404 09:51:03.191800 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
405 09:51:03.191862 Installing SMM handler to 0x9a000000
406 09:51:03.191922 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
407 09:51:03.191982 Processing 658 relocs. Offset value of 0x9a010000
408 09:51:03.192043 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
409 09:51:03.192103 Processing 13 relocs. Offset value of 0x9a008000
410 09:51:03.192163 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
411 09:51:03.192223 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
412 09:51:03.192284 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
413 09:51:03.192344 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
414 09:51:03.192403 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
415 09:51:03.192466 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
416 09:51:03.192526 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
417 09:51:03.192586 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
418 09:51:03.192645 Clearing SMI status registers
419 09:51:03.192705 SMI_STS: PM1
420 09:51:03.192764 PM1_STS: PWRBTN
421 09:51:03.192827 TCO_STS: SECOND_TO
422 09:51:03.192887 New SMBASE 0x9a000000
423 09:51:03.192947 In relocation handler: CPU 0
424 09:51:03.193006 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
425 09:51:03.193067 Writing SMRR. base = 0x9a000006, mask=0xff000800
426 09:51:03.193126 Relocation complete.
427 09:51:03.193186 New SMBASE 0x99fff000
428 09:51:03.193246 In relocation handler: CPU 4
429 09:51:03.193498 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
430 09:51:03.193567 Writing SMRR. base = 0x9a000006, mask=0xff000800
431 09:51:03.193629 Relocation complete.
432 09:51:03.193689 New SMBASE 0x99fff800
433 09:51:03.193750 In relocation handler: CPU 2
434 09:51:03.193810 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
435 09:51:03.193871 Writing SMRR. base = 0x9a000006, mask=0xff000800
436 09:51:03.193931 Relocation complete.
437 09:51:03.193990 New SMBASE 0x99fffc00
438 09:51:03.194051 In relocation handler: CPU 1
439 09:51:03.194111 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
440 09:51:03.194171 Writing SMRR. base = 0x9a000006, mask=0xff000800
441 09:51:03.194231 Relocation complete.
442 09:51:03.194290 New SMBASE 0x99ffe800
443 09:51:03.194350 In relocation handler: CPU 6
444 09:51:03.194409 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
445 09:51:03.194470 Writing SMRR. base = 0x9a000006, mask=0xff000800
446 09:51:03.194530 Relocation complete.
447 09:51:03.194589 New SMBASE 0x99ffe400
448 09:51:03.194648 In relocation handler: CPU 7
449 09:51:03.194707 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
450 09:51:03.194767 Writing SMRR. base = 0x9a000006, mask=0xff000800
451 09:51:03.194827 Relocation complete.
452 09:51:03.194886 New SMBASE 0x99fff400
453 09:51:03.194945 In relocation handler: CPU 3
454 09:51:03.195005 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
455 09:51:03.195065 Writing SMRR. base = 0x9a000006, mask=0xff000800
456 09:51:03.195125 Relocation complete.
457 09:51:03.195185 New SMBASE 0x99ffec00
458 09:51:03.195244 In relocation handler: CPU 5
459 09:51:03.195304 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
460 09:51:03.195364 Writing SMRR. base = 0x9a000006, mask=0xff000800
461 09:51:03.195440 Relocation complete.
462 09:51:03.195503 Initializing CPU #0
463 09:51:03.195562 CPU: vendor Intel device 806ec
464 09:51:03.195623 CPU: family 06, model 8e, stepping 0c
465 09:51:03.195683 Clearing out pending MCEs
466 09:51:03.195743 Setting up local APIC...
467 09:51:03.195802 apic_id: 0x00 done.
468 09:51:03.195862 Turbo is available but hidden
469 09:51:03.195922 Turbo is available and visible
470 09:51:03.195982 VMX status: enabled
471 09:51:03.196040 IA32_FEATURE_CONTROL status: locked
472 09:51:03.196100 Skip microcode update
473 09:51:03.196159 CPU #0 initialized
474 09:51:03.196218 Initializing CPU #4
475 09:51:03.196277 Initializing CPU #5
476 09:51:03.196335 Initializing CPU #3
477 09:51:03.196394 CPU: vendor Intel device 806ec
478 09:51:03.196453 CPU: family 06, model 8e, stepping 0c
479 09:51:03.196512 CPU: vendor Intel device 806ec
480 09:51:03.196571 CPU: family 06, model 8e, stepping 0c
481 09:51:03.196631 Clearing out pending MCEs
482 09:51:03.196689 Clearing out pending MCEs
483 09:51:03.196748 Setting up local APIC...
484 09:51:03.196807 Initializing CPU #6
485 09:51:03.196866 Initializing CPU #7
486 09:51:03.196925 CPU: vendor Intel device 806ec
487 09:51:03.196983 CPU: family 06, model 8e, stepping 0c
488 09:51:03.197042 CPU: vendor Intel device 806ec
489 09:51:03.197102 CPU: family 06, model 8e, stepping 0c
490 09:51:03.197160 Clearing out pending MCEs
491 09:51:03.197219 CPU: vendor Intel device 806ec
492 09:51:03.197279 CPU: family 06, model 8e, stepping 0c
493 09:51:03.197337 Clearing out pending MCEs
494 09:51:03.197397 Initializing CPU #2
495 09:51:03.197456 Initializing CPU #1
496 09:51:03.197515 CPU: vendor Intel device 806ec
497 09:51:03.197574 CPU: family 06, model 8e, stepping 0c
498 09:51:03.197633 CPU: vendor Intel device 806ec
499 09:51:03.197691 CPU: family 06, model 8e, stepping 0c
500 09:51:03.197750 Clearing out pending MCEs
501 09:51:03.197809 Clearing out pending MCEs
502 09:51:03.197868 Setting up local APIC...
503 09:51:03.197927 apic_id: 0x05 done.
504 09:51:03.197986 Setting up local APIC...
505 09:51:03.198045 Clearing out pending MCEs
506 09:51:03.198105 Setting up local APIC...
507 09:51:03.198163 apic_id: 0x03 done.
508 09:51:03.198222 Setting up local APIC...
509 09:51:03.198281 Setting up local APIC...
510 09:51:03.198340 apic_id: 0x04 done.
511 09:51:03.198398 VMX status: enabled
512 09:51:03.198457 VMX status: enabled
513 09:51:03.198516 IA32_FEATURE_CONTROL status: locked
514 09:51:03.198574 IA32_FEATURE_CONTROL status: locked
515 09:51:03.198633 Skip microcode update
516 09:51:03.198692 VMX status: enabled
517 09:51:03.198751 apic_id: 0x02 done.
518 09:51:03.198810 IA32_FEATURE_CONTROL status: locked
519 09:51:03.198869 VMX status: enabled
520 09:51:03.198928 Skip microcode update
521 09:51:03.198987 IA32_FEATURE_CONTROL status: locked
522 09:51:03.199046 CPU #2 initialized
523 09:51:03.199141 Skip microcode update
524 09:51:03.199238 apic_id: 0x01 done.
525 09:51:03.199332 CPU #5 initialized
526 09:51:03.199429 Skip microcode update
527 09:51:03.199492 apic_id: 0x06 done.
528 09:51:03.199552 Setting up local APIC...
529 09:51:03.199612 VMX status: enabled
530 09:51:03.199671 CPU #1 initialized
531 09:51:03.199731 CPU #3 initialized
532 09:51:03.199791 VMX status: enabled
533 09:51:03.199850 apic_id: 0x07 done.
534 09:51:03.199909 IA32_FEATURE_CONTROL status: locked
535 09:51:03.199969 VMX status: enabled
536 09:51:03.200028 Skip microcode update
537 09:51:03.200087 IA32_FEATURE_CONTROL status: locked
538 09:51:03.200147 CPU #6 initialized
539 09:51:03.200207 Skip microcode update
540 09:51:03.200265 IA32_FEATURE_CONTROL status: locked
541 09:51:03.200325 CPU #7 initialized
542 09:51:03.200383 Skip microcode update
543 09:51:03.200442 CPU #4 initialized
544 09:51:03.200501 bsp_do_flight_plan done after 452 msecs.
545 09:51:03.200561 CPU: frequency set to 4200 MHz
546 09:51:03.200620 Enabling SMIs.
547 09:51:03.200679 Locking SMM.
548 09:51:03.200738 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
549 09:51:03.200809 CBFS @ c08000 size 3f8000
550 09:51:03.200875 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
551 09:51:03.200940 CBFS: Locating 'vbt.bin'
552 09:51:03.201000 CBFS: Found @ offset 5f5c0 size 499
553 09:51:03.201059 Found a VBT of 4608 bytes after decompression
554 09:51:03.201119 Display FSP Version Info HOB
555 09:51:03.201179 Reference Code - CPU = 9.0.1e.30
556 09:51:03.201239 uCode Version = 0.0.0.ca
557 09:51:03.201298 TXT ACM version = ff.ff.ff.ffff
558 09:51:03.201358 Display FSP Version Info HOB
559 09:51:03.201417 Reference Code - ME = 9.0.1e.30
560 09:51:03.201477 MEBx version = 0.0.0.0
561 09:51:03.201536 ME Firmware Version = Consumer SKU
562 09:51:03.201595 Display FSP Version Info HOB
563 09:51:03.201654 Reference Code - CML PCH = 9.0.1e.30
564 09:51:03.201713 PCH-CRID Status = Disabled
565 09:51:03.201771 PCH-CRID Original Value = ff.ff.ff.ffff
566 09:51:03.201830 PCH-CRID New Value = ff.ff.ff.ffff
567 09:51:03.202096 OPROM - RST - RAID = ff.ff.ff.ffff
568 09:51:03.202166 ChipsetInit Base Version = ff.ff.ff.ffff
569 09:51:03.202227 ChipsetInit Oem Version = ff.ff.ff.ffff
570 09:51:03.202288 Display FSP Version Info HOB
571 09:51:03.202348 Reference Code - SA - System Agent = 9.0.1e.30
572 09:51:03.202408 Reference Code - MRC = 0.7.1.6c
573 09:51:03.202467 SA - PCIe Version = 9.0.1e.30
574 09:51:03.202526 SA-CRID Status = Disabled
575 09:51:03.202586 SA-CRID Original Value = 0.0.0.c
576 09:51:03.202645 SA-CRID New Value = 0.0.0.c
577 09:51:03.202704 OPROM - VBIOS = ff.ff.ff.ffff
578 09:51:03.202763 RTC Init
579 09:51:03.202823 Set power on after power failure.
580 09:51:03.202882 Disabling Deep S3
581 09:51:03.202941 Disabling Deep S3
582 09:51:03.203001 Disabling Deep S4
583 09:51:03.203060 Disabling Deep S4
584 09:51:03.203118 Disabling Deep S5
585 09:51:03.203177 Disabling Deep S5
586 09:51:03.203236 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
587 09:51:03.203296 Enumerating buses...
588 09:51:03.203355 Show all devs... Before device enumeration.
589 09:51:03.203425 Root Device: enabled 1
590 09:51:03.203486 CPU_CLUSTER: 0: enabled 1
591 09:51:03.203546 DOMAIN: 0000: enabled 1
592 09:51:03.203606 APIC: 00: enabled 1
593 09:51:03.203665 PCI: 00:00.0: enabled 1
594 09:51:03.203724 PCI: 00:02.0: enabled 1
595 09:51:03.203783 PCI: 00:04.0: enabled 0
596 09:51:03.203842 PCI: 00:05.0: enabled 0
597 09:51:03.203901 PCI: 00:12.0: enabled 1
598 09:51:03.203960 PCI: 00:12.5: enabled 0
599 09:51:03.204018 PCI: 00:12.6: enabled 0
600 09:51:03.204077 PCI: 00:14.0: enabled 1
601 09:51:03.204136 PCI: 00:14.1: enabled 0
602 09:51:03.204194 PCI: 00:14.3: enabled 1
603 09:51:03.204253 PCI: 00:14.5: enabled 0
604 09:51:03.204312 PCI: 00:15.0: enabled 1
605 09:51:03.204371 PCI: 00:15.1: enabled 1
606 09:51:03.204430 PCI: 00:15.2: enabled 0
607 09:51:03.204488 PCI: 00:15.3: enabled 0
608 09:51:03.204548 PCI: 00:16.0: enabled 1
609 09:51:03.204607 PCI: 00:16.1: enabled 0
610 09:51:03.204666 PCI: 00:16.2: enabled 0
611 09:51:03.204725 PCI: 00:16.3: enabled 0
612 09:51:03.204784 PCI: 00:16.4: enabled 0
613 09:51:03.204843 PCI: 00:16.5: enabled 0
614 09:51:03.204901 PCI: 00:17.0: enabled 1
615 09:51:03.204960 PCI: 00:19.0: enabled 1
616 09:51:03.205018 PCI: 00:19.1: enabled 0
617 09:51:03.205077 PCI: 00:19.2: enabled 0
618 09:51:03.205136 PCI: 00:1a.0: enabled 0
619 09:51:03.205194 PCI: 00:1c.0: enabled 0
620 09:51:03.205253 PCI: 00:1c.1: enabled 0
621 09:51:03.205311 PCI: 00:1c.2: enabled 0
622 09:51:03.205370 PCI: 00:1c.3: enabled 0
623 09:51:03.205428 PCI: 00:1c.4: enabled 0
624 09:51:03.205487 PCI: 00:1c.5: enabled 0
625 09:51:03.205546 PCI: 00:1c.6: enabled 0
626 09:51:03.205621 PCI: 00:1c.7: enabled 0
627 09:51:03.205682 PCI: 00:1d.0: enabled 1
628 09:51:03.205742 PCI: 00:1d.1: enabled 0
629 09:51:03.205801 PCI: 00:1d.2: enabled 0
630 09:51:03.205860 PCI: 00:1d.3: enabled 0
631 09:51:03.205919 PCI: 00:1d.4: enabled 0
632 09:51:03.205978 PCI: 00:1d.5: enabled 1
633 09:51:03.206042 PCI: 00:1e.0: enabled 1
634 09:51:03.206104 PCI: 00:1e.1: enabled 0
635 09:51:03.206163 PCI: 00:1e.2: enabled 1
636 09:51:03.206222 PCI: 00:1e.3: enabled 1
637 09:51:03.206281 PCI: 00:1f.0: enabled 1
638 09:51:03.206340 PCI: 00:1f.1: enabled 1
639 09:51:03.206399 PCI: 00:1f.2: enabled 1
640 09:51:03.206458 PCI: 00:1f.3: enabled 1
641 09:51:03.206517 PCI: 00:1f.4: enabled 1
642 09:51:03.206576 PCI: 00:1f.5: enabled 1
643 09:51:03.206635 PCI: 00:1f.6: enabled 0
644 09:51:03.206694 USB0 port 0: enabled 1
645 09:51:03.206753 I2C: 00:15: enabled 1
646 09:51:03.206812 I2C: 00:5d: enabled 1
647 09:51:03.206871 GENERIC: 0.0: enabled 1
648 09:51:03.206931 I2C: 00:1a: enabled 1
649 09:51:03.206989 I2C: 00:38: enabled 1
650 09:51:03.207048 I2C: 00:39: enabled 1
651 09:51:03.207107 I2C: 00:3a: enabled 1
652 09:51:03.207166 I2C: 00:3b: enabled 1
653 09:51:03.207225 PCI: 00:00.0: enabled 1
654 09:51:03.207284 SPI: 00: enabled 1
655 09:51:03.207343 SPI: 01: enabled 1
656 09:51:03.207418 PNP: 0c09.0: enabled 1
657 09:51:03.207483 USB2 port 0: enabled 1
658 09:51:03.207543 USB2 port 1: enabled 1
659 09:51:03.207602 USB2 port 2: enabled 0
660 09:51:03.207662 USB2 port 3: enabled 0
661 09:51:03.207721 USB2 port 5: enabled 0
662 09:51:03.207779 USB2 port 6: enabled 1
663 09:51:03.207838 USB2 port 9: enabled 1
664 09:51:03.207897 USB3 port 0: enabled 1
665 09:51:03.207956 USB3 port 1: enabled 1
666 09:51:03.208015 USB3 port 2: enabled 1
667 09:51:03.208073 USB3 port 3: enabled 1
668 09:51:03.208132 USB3 port 4: enabled 0
669 09:51:03.208191 APIC: 02: enabled 1
670 09:51:03.208249 APIC: 03: enabled 1
671 09:51:03.208309 APIC: 04: enabled 1
672 09:51:03.208367 APIC: 01: enabled 1
673 09:51:03.208426 APIC: 05: enabled 1
674 09:51:03.208484 APIC: 06: enabled 1
675 09:51:03.208544 APIC: 07: enabled 1
676 09:51:03.208602 Compare with tree...
677 09:51:03.208662 Root Device: enabled 1
678 09:51:03.208720 CPU_CLUSTER: 0: enabled 1
679 09:51:03.208779 APIC: 00: enabled 1
680 09:51:03.208838 APIC: 02: enabled 1
681 09:51:03.208897 APIC: 03: enabled 1
682 09:51:03.208956 APIC: 04: enabled 1
683 09:51:03.209015 APIC: 01: enabled 1
684 09:51:03.209074 APIC: 05: enabled 1
685 09:51:03.209133 APIC: 06: enabled 1
686 09:51:03.209191 APIC: 07: enabled 1
687 09:51:03.209250 DOMAIN: 0000: enabled 1
688 09:51:03.209309 PCI: 00:00.0: enabled 1
689 09:51:03.209367 PCI: 00:02.0: enabled 1
690 09:51:03.209426 PCI: 00:04.0: enabled 0
691 09:51:03.209485 PCI: 00:05.0: enabled 0
692 09:51:03.209544 PCI: 00:12.0: enabled 1
693 09:51:03.209602 PCI: 00:12.5: enabled 0
694 09:51:03.209661 PCI: 00:12.6: enabled 0
695 09:51:03.209720 PCI: 00:14.0: enabled 1
696 09:51:03.209779 USB0 port 0: enabled 1
697 09:51:03.209838 USB2 port 0: enabled 1
698 09:51:03.209897 USB2 port 1: enabled 1
699 09:51:03.209955 USB2 port 2: enabled 0
700 09:51:03.210014 USB2 port 3: enabled 0
701 09:51:03.210072 USB2 port 5: enabled 0
702 09:51:03.210131 USB2 port 6: enabled 1
703 09:51:03.210190 USB2 port 9: enabled 1
704 09:51:03.210249 USB3 port 0: enabled 1
705 09:51:03.210308 USB3 port 1: enabled 1
706 09:51:03.210366 USB3 port 2: enabled 1
707 09:51:03.210425 USB3 port 3: enabled 1
708 09:51:03.210484 USB3 port 4: enabled 0
709 09:51:03.210543 PCI: 00:14.1: enabled 0
710 09:51:03.210602 PCI: 00:14.3: enabled 1
711 09:51:03.210661 PCI: 00:14.5: enabled 0
712 09:51:03.210719 PCI: 00:15.0: enabled 1
713 09:51:03.210778 I2C: 00:15: enabled 1
714 09:51:03.210837 PCI: 00:15.1: enabled 1
715 09:51:03.210896 I2C: 00:5d: enabled 1
716 09:51:03.210954 GENERIC: 0.0: enabled 1
717 09:51:03.211013 PCI: 00:15.2: enabled 0
718 09:51:03.211073 PCI: 00:15.3: enabled 0
719 09:51:03.211131 PCI: 00:16.0: enabled 1
720 09:51:03.211190 PCI: 00:16.1: enabled 0
721 09:51:03.211249 PCI: 00:16.2: enabled 0
722 09:51:03.211308 PCI: 00:16.3: enabled 0
723 09:51:03.211366 PCI: 00:16.4: enabled 0
724 09:51:03.211447 PCI: 00:16.5: enabled 0
725 09:51:03.211547 PCI: 00:17.0: enabled 1
726 09:51:03.211854 PCI: 00:19.0: enabled 1
727 09:51:03.211953 I2C: 00:1a: enabled 1
728 09:51:03.212048 I2C: 00:38: enabled 1
729 09:51:03.212149 I2C: 00:39: enabled 1
730 09:51:03.212244 I2C: 00:3a: enabled 1
731 09:51:03.212337 I2C: 00:3b: enabled 1
732 09:51:03.212429 PCI: 00:19.1: enabled 0
733 09:51:03.212522 PCI: 00:19.2: enabled 0
734 09:51:03.212615 PCI: 00:1a.0: enabled 0
735 09:51:03.212708 PCI: 00:1c.0: enabled 0
736 09:51:03.212801 PCI: 00:1c.1: enabled 0
737 09:51:03.212893 PCI: 00:1c.2: enabled 0
738 09:51:03.212986 PCI: 00:1c.3: enabled 0
739 09:51:03.213078 PCI: 00:1c.4: enabled 0
740 09:51:03.213171 PCI: 00:1c.5: enabled 0
741 09:51:03.213264 PCI: 00:1c.6: enabled 0
742 09:51:03.213356 PCI: 00:1c.7: enabled 0
743 09:51:03.213449 PCI: 00:1d.0: enabled 1
744 09:51:03.213542 PCI: 00:1d.1: enabled 0
745 09:51:03.213649 PCI: 00:1d.2: enabled 0
746 09:51:03.213744 PCI: 00:1d.3: enabled 0
747 09:51:03.213836 PCI: 00:1d.4: enabled 0
748 09:51:03.213929 PCI: 00:1d.5: enabled 1
749 09:51:03.214022 PCI: 00:00.0: enabled 1
750 09:51:03.214114 PCI: 00:1e.0: enabled 1
751 09:51:03.214207 PCI: 00:1e.1: enabled 0
752 09:51:03.214300 PCI: 00:1e.2: enabled 1
753 09:51:03.214392 SPI: 00: enabled 1
754 09:51:03.214484 PCI: 00:1e.3: enabled 1
755 09:51:03.214577 SPI: 01: enabled 1
756 09:51:03.214670 PCI: 00:1f.0: enabled 1
757 09:51:03.214762 PNP: 0c09.0: enabled 1
758 09:51:03.214855 PCI: 00:1f.1: enabled 1
759 09:51:03.214950 PCI: 00:1f.2: enabled 1
760 09:51:03.215017 PCI: 00:1f.3: enabled 1
761 09:51:03.215081 PCI: 00:1f.4: enabled 1
762 09:51:03.215141 PCI: 00:1f.5: enabled 1
763 09:51:03.215201 PCI: 00:1f.6: enabled 0
764 09:51:03.215260 Root Device scanning...
765 09:51:03.215320 scan_static_bus for Root Device
766 09:51:03.215379 CPU_CLUSTER: 0 enabled
767 09:51:03.215462 DOMAIN: 0000 enabled
768 09:51:03.215523 DOMAIN: 0000 scanning...
769 09:51:03.215583 PCI: pci_scan_bus for bus 00
770 09:51:03.215642 PCI: 00:00.0 [8086/0000] ops
771 09:51:03.215702 PCI: 00:00.0 [8086/9b61] enabled
772 09:51:03.215762 PCI: 00:02.0 [8086/0000] bus ops
773 09:51:03.215822 PCI: 00:02.0 [8086/9b41] enabled
774 09:51:03.215882 PCI: 00:04.0 [8086/1903] disabled
775 09:51:03.215941 PCI: 00:08.0 [8086/1911] enabled
776 09:51:03.216001 PCI: 00:12.0 [8086/02f9] enabled
777 09:51:03.216060 PCI: 00:14.0 [8086/0000] bus ops
778 09:51:03.216119 PCI: 00:14.0 [8086/02ed] enabled
779 09:51:03.216178 PCI: 00:14.2 [8086/02ef] enabled
780 09:51:03.216238 PCI: 00:14.3 [8086/02f0] enabled
781 09:51:03.216298 PCI: 00:15.0 [8086/0000] bus ops
782 09:51:03.216357 PCI: 00:15.0 [8086/02e8] enabled
783 09:51:03.216416 PCI: 00:15.1 [8086/0000] bus ops
784 09:51:03.216475 PCI: 00:15.1 [8086/02e9] enabled
785 09:51:03.216534 PCI: 00:16.0 [8086/0000] ops
786 09:51:03.216594 PCI: 00:16.0 [8086/02e0] enabled
787 09:51:03.216652 PCI: 00:17.0 [8086/0000] ops
788 09:51:03.216712 PCI: 00:17.0 [8086/02d3] enabled
789 09:51:03.216771 PCI: 00:19.0 [8086/0000] bus ops
790 09:51:03.216830 PCI: 00:19.0 [8086/02c5] enabled
791 09:51:03.216889 PCI: 00:1d.0 [8086/0000] bus ops
792 09:51:03.216948 PCI: 00:1d.0 [8086/02b0] enabled
793 09:51:03.217008 PCI: Static device PCI: 00:1d.5 not found, disabling it.
794 09:51:03.217067 PCI: 00:1e.0 [8086/0000] ops
795 09:51:03.217127 PCI: 00:1e.0 [8086/02a8] enabled
796 09:51:03.217186 PCI: 00:1e.2 [8086/0000] bus ops
797 09:51:03.217244 PCI: 00:1e.2 [8086/02aa] enabled
798 09:51:03.217304 PCI: 00:1e.3 [8086/0000] bus ops
799 09:51:03.217362 PCI: 00:1e.3 [8086/02ab] enabled
800 09:51:03.217422 PCI: 00:1f.0 [8086/0000] bus ops
801 09:51:03.217481 PCI: 00:1f.0 [8086/0284] enabled
802 09:51:03.217540 PCI: Static device PCI: 00:1f.1 not found, disabling it.
803 09:51:03.217600 PCI: Static device PCI: 00:1f.2 not found, disabling it.
804 09:51:03.217660 PCI: 00:1f.3 [8086/0000] bus ops
805 09:51:03.217720 PCI: 00:1f.3 [8086/02c8] enabled
806 09:51:03.217781 PCI: 00:1f.4 [8086/0000] bus ops
807 09:51:03.217840 PCI: 00:1f.4 [8086/02a3] enabled
808 09:51:03.217899 PCI: 00:1f.5 [8086/0000] bus ops
809 09:51:03.217958 PCI: 00:1f.5 [8086/02a4] enabled
810 09:51:03.218018 PCI: Leftover static devices:
811 09:51:03.218078 PCI: 00:05.0
812 09:51:03.218137 PCI: 00:12.5
813 09:51:03.218196 PCI: 00:12.6
814 09:51:03.218255 PCI: 00:14.1
815 09:51:03.218314 PCI: 00:14.5
816 09:51:03.218373 PCI: 00:15.2
817 09:51:03.218432 PCI: 00:15.3
818 09:51:03.218491 PCI: 00:16.1
819 09:51:03.218555 PCI: 00:16.2
820 09:51:03.218617 PCI: 00:16.3
821 09:51:03.218682 PCI: 00:16.4
822 09:51:03.218742 PCI: 00:16.5
823 09:51:03.218800 PCI: 00:19.1
824 09:51:03.218859 PCI: 00:19.2
825 09:51:03.218918 PCI: 00:1a.0
826 09:51:03.218976 PCI: 00:1c.0
827 09:51:03.219035 PCI: 00:1c.1
828 09:51:03.219120 PCI: 00:1c.2
829 09:51:03.219215 PCI: 00:1c.3
830 09:51:03.219307 PCI: 00:1c.4
831 09:51:03.219400 PCI: 00:1c.5
832 09:51:03.219475 PCI: 00:1c.6
833 09:51:03.219536 PCI: 00:1c.7
834 09:51:03.219636 PCI: 00:1d.1
835 09:51:03.219729 PCI: 00:1d.2
836 09:51:03.219821 PCI: 00:1d.3
837 09:51:03.219913 PCI: 00:1d.4
838 09:51:03.220005 PCI: 00:1d.5
839 09:51:03.220097 PCI: 00:1e.1
840 09:51:03.220189 PCI: 00:1f.1
841 09:51:03.220281 PCI: 00:1f.2
842 09:51:03.220373 PCI: 00:1f.6
843 09:51:03.220465 PCI: Check your devicetree.cb.
844 09:51:03.220558 PCI: 00:02.0 scanning...
845 09:51:03.220652 scan_generic_bus for PCI: 00:02.0
846 09:51:03.220745 scan_generic_bus for PCI: 00:02.0 done
847 09:51:03.220839 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
848 09:51:03.220933 PCI: 00:14.0 scanning...
849 09:51:03.221026 scan_static_bus for PCI: 00:14.0
850 09:51:03.221118 USB0 port 0 enabled
851 09:51:03.221211 USB0 port 0 scanning...
852 09:51:03.221303 scan_static_bus for USB0 port 0
853 09:51:03.221396 USB2 port 0 enabled
854 09:51:03.221488 USB2 port 1 enabled
855 09:51:03.221580 USB2 port 2 disabled
856 09:51:03.221643 USB2 port 3 disabled
857 09:51:03.221703 USB2 port 5 disabled
858 09:51:03.221762 USB2 port 6 enabled
859 09:51:03.221821 USB2 port 9 enabled
860 09:51:03.221880 USB3 port 0 enabled
861 09:51:03.221942 USB3 port 1 enabled
862 09:51:03.222009 USB3 port 2 enabled
863 09:51:03.222071 USB3 port 3 enabled
864 09:51:03.222130 USB3 port 4 disabled
865 09:51:03.222191 USB2 port 0 scanning...
866 09:51:03.222250 scan_static_bus for USB2 port 0
867 09:51:03.222315 scan_static_bus for USB2 port 0 done
868 09:51:03.222390 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
869 09:51:03.222459 USB2 port 1 scanning...
870 09:51:03.222518 scan_static_bus for USB2 port 1
871 09:51:03.222578 scan_static_bus for USB2 port 1 done
872 09:51:03.222637 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
873 09:51:03.222696 USB2 port 6 scanning...
874 09:51:03.222755 scan_static_bus for USB2 port 6
875 09:51:03.222815 scan_static_bus for USB2 port 6 done
876 09:51:03.222874 scan_bus: scanning of bus USB2 port 6 took 9691 usecs
877 09:51:03.223130 USB2 port 9 scanning...
878 09:51:03.223197 scan_static_bus for USB2 port 9
879 09:51:03.223258 scan_static_bus for USB2 port 9 done
880 09:51:03.223318 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
881 09:51:03.223378 USB3 port 0 scanning...
882 09:51:03.223461 scan_static_bus for USB3 port 0
883 09:51:03.223523 scan_static_bus for USB3 port 0 done
884 09:51:03.223605 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
885 09:51:03.223702 USB3 port 1 scanning...
886 09:51:03.223796 scan_static_bus for USB3 port 1
887 09:51:03.223890 scan_static_bus for USB3 port 1 done
888 09:51:03.223983 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
889 09:51:03.224059 USB3 port 2 scanning...
890 09:51:03.224125 scan_static_bus for USB3 port 2
891 09:51:03.224220 scan_static_bus for USB3 port 2 done
892 09:51:03.224314 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
893 09:51:03.224407 USB3 port 3 scanning...
894 09:51:03.224500 scan_static_bus for USB3 port 3
895 09:51:03.224593 scan_static_bus for USB3 port 3 done
896 09:51:03.224687 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
897 09:51:03.224762 scan_static_bus for USB0 port 0 done
898 09:51:03.224828 scan_bus: scanning of bus USB0 port 0 took 155325 usecs
899 09:51:03.224921 scan_static_bus for PCI: 00:14.0 done
900 09:51:03.225015 scan_bus: scanning of bus PCI: 00:14.0 took 172937 usecs
901 09:51:03.225095 PCI: 00:15.0 scanning...
902 09:51:03.225165 scan_generic_bus for PCI: 00:15.0
903 09:51:03.225260 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
904 09:51:03.225352 scan_generic_bus for PCI: 00:15.0 done
905 09:51:03.225422 scan_bus: scanning of bus PCI: 00:15.0 took 14281 usecs
906 09:51:03.225521 PCI: 00:15.1 scanning...
907 09:51:03.225629 scan_generic_bus for PCI: 00:15.1
908 09:51:03.225726 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
909 09:51:03.225824 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
910 09:51:03.225922 scan_generic_bus for PCI: 00:15.1 done
911 09:51:03.226016 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
912 09:51:03.226110 PCI: 00:19.0 scanning...
913 09:51:03.226203 scan_generic_bus for PCI: 00:19.0
914 09:51:03.226296 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
915 09:51:03.226390 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
916 09:51:03.226490 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
917 09:51:03.226585 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
918 09:51:03.226679 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
919 09:51:03.226776 scan_generic_bus for PCI: 00:19.0 done
920 09:51:03.226874 scan_bus: scanning of bus PCI: 00:19.0 took 30716 usecs
921 09:51:03.226967 PCI: 00:1d.0 scanning...
922 09:51:03.227060 do_pci_scan_bridge for PCI: 00:1d.0
923 09:51:03.227153 PCI: pci_scan_bus for bus 01
924 09:51:03.227247 PCI: 01:00.0 [1c5c/1327] enabled
925 09:51:03.227346 Enabling Common Clock Configuration
926 09:51:03.227442 L1 Sub-State supported from root port 29
927 09:51:03.227505 L1 Sub-State Support = 0xf
928 09:51:03.227565 CommonModeRestoreTime = 0x28
929 09:51:03.227636 Power On Value = 0x16, Power On Scale = 0x0
930 09:51:03.227737 ASPM: Enabled L1
931 09:51:03.227801 scan_bus: scanning of bus PCI: 00:1d.0 took 32773 usecs
932 09:51:03.227863 PCI: 00:1e.2 scanning...
933 09:51:03.227935 scan_generic_bus for PCI: 00:1e.2
934 09:51:03.227999 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
935 09:51:03.228060 scan_generic_bus for PCI: 00:1e.2 done
936 09:51:03.228120 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
937 09:51:03.228180 PCI: 00:1e.3 scanning...
938 09:51:03.228240 scan_generic_bus for PCI: 00:1e.3
939 09:51:03.228299 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
940 09:51:03.228358 scan_generic_bus for PCI: 00:1e.3 done
941 09:51:03.228426 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
942 09:51:03.228491 PCI: 00:1f.0 scanning...
943 09:51:03.228555 scan_static_bus for PCI: 00:1f.0
944 09:51:03.228614 PNP: 0c09.0 enabled
945 09:51:03.228673 scan_static_bus for PCI: 00:1f.0 done
946 09:51:03.228732 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
947 09:51:03.228796 PCI: 00:1f.3 scanning...
948 09:51:03.228856 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
949 09:51:03.228915 PCI: 00:1f.4 scanning...
950 09:51:03.228974 scan_generic_bus for PCI: 00:1f.4
951 09:51:03.229044 scan_generic_bus for PCI: 00:1f.4 done
952 09:51:03.229112 scan_bus: scanning of bus PCI: 00:1f.4 took 10180 usecs
953 09:51:03.229205 PCI: 00:1f.5 scanning...
954 09:51:03.229298 scan_generic_bus for PCI: 00:1f.5
955 09:51:03.229391 scan_generic_bus for PCI: 00:1f.5 done
956 09:51:03.229484 scan_bus: scanning of bus PCI: 00:1f.5 took 10181 usecs
957 09:51:03.229579 scan_bus: scanning of bus DOMAIN: 0000 took 604719 usecs
958 09:51:03.229648 scan_static_bus for Root Device done
959 09:51:03.229729 scan_bus: scanning of bus Root Device took 624567 usecs
960 09:51:03.229821 done
961 09:51:03.229914 Chrome EC: UHEPI supported
962 09:51:03.230007 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
963 09:51:03.230102 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
964 09:51:03.230195 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
965 09:51:03.230289 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
966 09:51:03.230383 SPI flash protection: WPSW=0 SRP0=0
967 09:51:03.230476 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
968 09:51:03.230569 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
969 09:51:03.230662 found VGA at PCI: 00:02.0
970 09:51:03.230755 Setting up VGA for PCI: 00:02.0
971 09:51:03.230848 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
972 09:51:03.230941 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
973 09:51:03.231033 Allocating resources...
974 09:51:03.231125 Reading resources...
975 09:51:03.231218 Root Device read_resources bus 0 link: 0
976 09:51:03.231311 CPU_CLUSTER: 0 read_resources bus 0 link: 0
977 09:51:03.231418 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
978 09:51:03.231484 DOMAIN: 0000 read_resources bus 0 link: 0
979 09:51:03.231742 PCI: 00:14.0 read_resources bus 0 link: 0
980 09:51:03.231810 USB0 port 0 read_resources bus 0 link: 0
981 09:51:03.231877 USB0 port 0 read_resources bus 0 link: 0 done
982 09:51:03.231939 PCI: 00:14.0 read_resources bus 0 link: 0 done
983 09:51:03.231999 PCI: 00:15.0 read_resources bus 1 link: 0
984 09:51:03.232058 PCI: 00:15.0 read_resources bus 1 link: 0 done
985 09:51:03.232118 PCI: 00:15.1 read_resources bus 2 link: 0
986 09:51:03.232177 PCI: 00:15.1 read_resources bus 2 link: 0 done
987 09:51:03.232237 PCI: 00:19.0 read_resources bus 3 link: 0
988 09:51:03.232297 PCI: 00:19.0 read_resources bus 3 link: 0 done
989 09:51:03.232357 PCI: 00:1d.0 read_resources bus 1 link: 0
990 09:51:03.232416 PCI: 00:1d.0 read_resources bus 1 link: 0 done
991 09:51:03.232476 PCI: 00:1e.2 read_resources bus 4 link: 0
992 09:51:03.232535 PCI: 00:1e.2 read_resources bus 4 link: 0 done
993 09:51:03.232594 PCI: 00:1e.3 read_resources bus 5 link: 0
994 09:51:03.232653 PCI: 00:1e.3 read_resources bus 5 link: 0 done
995 09:51:03.232713 PCI: 00:1f.0 read_resources bus 0 link: 0
996 09:51:03.232772 PCI: 00:1f.0 read_resources bus 0 link: 0 done
997 09:51:03.232831 DOMAIN: 0000 read_resources bus 0 link: 0 done
998 09:51:03.232890 Root Device read_resources bus 0 link: 0 done
999 09:51:03.232949 Done reading resources.
1000 09:51:03.233008 Show resources in subtree (Root Device)...After reading.
1001 09:51:03.233068 Root Device child on link 0 CPU_CLUSTER: 0
1002 09:51:03.233127 CPU_CLUSTER: 0 child on link 0 APIC: 00
1003 09:51:03.233186 APIC: 00
1004 09:51:03.233245 APIC: 02
1005 09:51:03.233304 APIC: 03
1006 09:51:03.233365 APIC: 04
1007 09:51:03.233428 APIC: 01
1008 09:51:03.233489 APIC: 05
1009 09:51:03.233547 APIC: 06
1010 09:51:03.233607 APIC: 07
1011 09:51:03.233666 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1012 09:51:03.233726 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1013 09:51:03.233786 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1014 09:51:03.233847 PCI: 00:00.0
1015 09:51:03.233907 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1016 09:51:03.233967 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1017 09:51:03.234027 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1018 09:51:03.234088 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1019 09:51:03.234148 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1020 09:51:03.234208 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1021 09:51:03.234271 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1022 09:51:03.234331 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1023 09:51:03.234392 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1024 09:51:03.234451 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1025 09:51:03.234519 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1026 09:51:03.234592 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1027 09:51:03.234659 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1028 09:51:03.234726 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1029 09:51:03.234787 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1030 09:51:03.234846 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1031 09:51:03.234905 PCI: 00:02.0
1032 09:51:03.234974 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1033 09:51:03.235039 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1034 09:51:03.235135 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1035 09:51:03.235227 PCI: 00:04.0
1036 09:51:03.235319 PCI: 00:08.0
1037 09:51:03.235419 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 09:51:03.235484 PCI: 00:12.0
1039 09:51:03.235543 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 09:51:03.235604 PCI: 00:14.0 child on link 0 USB0 port 0
1041 09:51:03.235663 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1042 09:51:03.235723 USB0 port 0 child on link 0 USB2 port 0
1043 09:51:03.235782 USB2 port 0
1044 09:51:03.235841 USB2 port 1
1045 09:51:03.235900 USB2 port 2
1046 09:51:03.235958 USB2 port 3
1047 09:51:03.236016 USB2 port 5
1048 09:51:03.236074 USB2 port 6
1049 09:51:03.236133 USB2 port 9
1050 09:51:03.236191 USB3 port 0
1051 09:51:03.236249 USB3 port 1
1052 09:51:03.236312 USB3 port 2
1053 09:51:03.236375 USB3 port 3
1054 09:51:03.236434 USB3 port 4
1055 09:51:03.236491 PCI: 00:14.2
1056 09:51:03.236550 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1057 09:51:03.236812 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1058 09:51:03.236912 PCI: 00:14.3
1059 09:51:03.237007 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1060 09:51:03.237107 PCI: 00:15.0 child on link 0 I2C: 01:15
1061 09:51:03.237204 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 09:51:03.237297 I2C: 01:15
1063 09:51:03.237389 PCI: 00:15.1 child on link 0 I2C: 02:5d
1064 09:51:03.237483 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1065 09:51:03.237575 I2C: 02:5d
1066 09:51:03.237667 GENERIC: 0.0
1067 09:51:03.237758 PCI: 00:16.0
1068 09:51:03.237851 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1069 09:51:03.237943 PCI: 00:17.0
1070 09:51:03.238036 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1071 09:51:03.238129 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1072 09:51:03.238223 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1073 09:51:03.238316 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1074 09:51:03.238409 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1075 09:51:03.238503 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1076 09:51:03.238595 PCI: 00:19.0 child on link 0 I2C: 03:1a
1077 09:51:03.238688 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1078 09:51:03.238779 I2C: 03:1a
1079 09:51:03.238870 I2C: 03:38
1080 09:51:03.238961 I2C: 03:39
1081 09:51:03.239060 I2C: 03:3a
1082 09:51:03.239124 I2C: 03:3b
1083 09:51:03.239183 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1084 09:51:03.239242 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1085 09:51:03.239303 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1086 09:51:03.239370 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1087 09:51:03.239458 PCI: 01:00.0
1088 09:51:03.239520 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1089 09:51:03.239580 PCI: 00:1e.0
1090 09:51:03.239639 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1091 09:51:03.239699 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1092 09:51:03.239759 PCI: 00:1e.2 child on link 0 SPI: 00
1093 09:51:03.239818 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1094 09:51:03.239877 SPI: 00
1095 09:51:03.239936 PCI: 00:1e.3 child on link 0 SPI: 01
1096 09:51:03.240000 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 09:51:03.240066 SPI: 01
1098 09:51:03.240128 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1099 09:51:03.240187 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1100 09:51:03.240246 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1101 09:51:03.240305 PNP: 0c09.0
1102 09:51:03.240364 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1103 09:51:03.240423 PCI: 00:1f.3
1104 09:51:03.240481 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1105 09:51:03.240542 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1106 09:51:03.240601 PCI: 00:1f.4
1107 09:51:03.240659 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1108 09:51:03.240717 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1109 09:51:03.240776 PCI: 00:1f.5
1110 09:51:03.240835 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1111 09:51:03.240894 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1112 09:51:03.240966 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1113 09:51:03.241029 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1114 09:51:03.241089 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1115 09:51:03.241148 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1116 09:51:03.241206 PCI: 00:17.0 18 * [0x60 - 0x67] io
1117 09:51:03.241265 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1118 09:51:03.241323 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1119 09:51:03.241382 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1120 09:51:03.241445 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1121 09:51:03.241504 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1122 09:51:03.241563 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1123 09:51:03.241622 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1124 09:51:03.241883 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1125 09:51:03.241985 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1126 09:51:03.242079 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1127 09:51:03.242172 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1128 09:51:03.242265 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1129 09:51:03.242357 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1130 09:51:03.242449 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1131 09:51:03.242542 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1132 09:51:03.242634 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1133 09:51:03.242726 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1134 09:51:03.242817 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1135 09:51:03.242912 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1136 09:51:03.243004 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1137 09:51:03.243096 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1138 09:51:03.243188 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1139 09:51:03.243280 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1140 09:51:03.243372 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1141 09:51:03.243456 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1142 09:51:03.243516 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1143 09:51:03.243575 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1144 09:51:03.243634 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1145 09:51:03.243692 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1146 09:51:03.243751 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1147 09:51:03.243822 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1148 09:51:03.243885 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1149 09:51:03.243946 avoid_fixed_resources: DOMAIN: 0000
1150 09:51:03.244005 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1151 09:51:03.244064 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1152 09:51:03.244123 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1153 09:51:03.244183 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1154 09:51:03.244242 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1155 09:51:03.244305 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1156 09:51:03.244367 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1157 09:51:03.244426 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1158 09:51:03.244485 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1159 09:51:03.244544 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1160 09:51:03.244602 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1161 09:51:03.244661 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1162 09:51:03.244719 Setting resources...
1163 09:51:03.244787 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1164 09:51:03.244852 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1165 09:51:03.244914 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1166 09:51:03.244972 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1167 09:51:03.245030 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1168 09:51:03.245089 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1169 09:51:03.245148 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1170 09:51:03.245208 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1171 09:51:03.245267 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1172 09:51:03.245326 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1173 09:51:03.245385 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1174 09:51:03.245444 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1175 09:51:03.245502 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1176 09:51:03.245561 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1177 09:51:03.245620 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1178 09:51:03.245679 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1179 09:51:03.245737 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1180 09:51:03.245795 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1181 09:51:03.245859 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1182 09:51:03.245956 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1183 09:51:03.246050 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1184 09:51:03.246142 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1185 09:51:03.246234 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1186 09:51:03.246326 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1187 09:51:03.246417 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1188 09:51:03.246509 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1189 09:51:03.246601 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1190 09:51:03.246693 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1191 09:51:03.246774 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1192 09:51:03.246840 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1193 09:51:03.246933 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1194 09:51:03.247025 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1195 09:51:03.247118 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1196 09:51:03.247211 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1197 09:51:03.247503 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1198 09:51:03.247615 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1199 09:51:03.247717 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1200 09:51:03.247782 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1201 09:51:03.247844 Root Device assign_resources, bus 0 link: 0
1202 09:51:03.247906 DOMAIN: 0000 assign_resources, bus 0 link: 0
1203 09:51:03.247966 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1204 09:51:03.248026 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1205 09:51:03.248086 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1206 09:51:03.248146 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1207 09:51:03.248220 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1208 09:51:03.248283 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1209 09:51:03.248343 PCI: 00:14.0 assign_resources, bus 0 link: 0
1210 09:51:03.248402 PCI: 00:14.0 assign_resources, bus 0 link: 0
1211 09:51:03.248461 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1212 09:51:03.248520 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1213 09:51:03.248579 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1214 09:51:03.248638 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1215 09:51:03.248697 PCI: 00:15.0 assign_resources, bus 1 link: 0
1216 09:51:03.248755 PCI: 00:15.0 assign_resources, bus 1 link: 0
1217 09:51:03.248814 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1218 09:51:03.248873 PCI: 00:15.1 assign_resources, bus 2 link: 0
1219 09:51:03.248931 PCI: 00:15.1 assign_resources, bus 2 link: 0
1220 09:51:03.248990 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1221 09:51:03.249049 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1222 09:51:03.249115 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1223 09:51:03.249188 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1224 09:51:03.249259 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1225 09:51:03.249353 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1226 09:51:03.249446 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1227 09:51:03.249539 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1228 09:51:03.249631 PCI: 00:19.0 assign_resources, bus 3 link: 0
1229 09:51:03.249723 PCI: 00:19.0 assign_resources, bus 3 link: 0
1230 09:51:03.249815 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1231 09:51:03.249908 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1232 09:51:03.250001 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1233 09:51:03.250093 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1234 09:51:03.250185 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1235 09:51:03.250284 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1236 09:51:03.250378 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1237 09:51:03.250471 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1238 09:51:03.250562 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1239 09:51:03.250653 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1240 09:51:03.250746 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1241 09:51:03.250837 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1242 09:51:03.250929 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1243 09:51:03.251020 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1244 09:51:03.251111 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1245 09:51:03.251205 LPC: Trying to open IO window from 800 size 1ff
1246 09:51:03.251301 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1247 09:51:03.251395 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1248 09:51:03.251499 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1249 09:51:03.251592 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1250 09:51:03.251683 DOMAIN: 0000 assign_resources, bus 0 link: 0
1251 09:51:03.251775 Root Device assign_resources, bus 0 link: 0
1252 09:51:03.251866 Done setting resources.
1253 09:51:03.251958 Show resources in subtree (Root Device)...After assigning values.
1254 09:51:03.252050 Root Device child on link 0 CPU_CLUSTER: 0
1255 09:51:03.252141 CPU_CLUSTER: 0 child on link 0 APIC: 00
1256 09:51:03.252234 APIC: 00
1257 09:51:03.252324 APIC: 02
1258 09:51:03.252414 APIC: 03
1259 09:51:03.252483 APIC: 04
1260 09:51:03.252575 APIC: 01
1261 09:51:03.252665 APIC: 05
1262 09:51:03.252755 APIC: 06
1263 09:51:03.252845 APIC: 07
1264 09:51:03.252936 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1265 09:51:03.253229 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1266 09:51:03.253330 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1267 09:51:03.253423 PCI: 00:00.0
1268 09:51:03.253517 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1269 09:51:03.253598 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1270 09:51:03.253695 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1271 09:51:03.253788 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1272 09:51:03.253881 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1273 09:51:03.253974 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1274 09:51:03.254067 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1275 09:51:03.254161 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1276 09:51:03.254254 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1277 09:51:03.254346 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1278 09:51:03.254439 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1279 09:51:03.254531 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1280 09:51:03.254598 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1281 09:51:03.254682 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1282 09:51:03.254777 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1283 09:51:03.254870 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1284 09:51:03.254961 PCI: 00:02.0
1285 09:51:03.255054 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1286 09:51:03.255149 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1287 09:51:03.255243 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1288 09:51:03.255334 PCI: 00:04.0
1289 09:51:03.255430 PCI: 00:08.0
1290 09:51:03.255493 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1291 09:51:03.255568 PCI: 00:12.0
1292 09:51:03.255662 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1293 09:51:03.255754 PCI: 00:14.0 child on link 0 USB0 port 0
1294 09:51:03.255847 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1295 09:51:03.255940 USB0 port 0 child on link 0 USB2 port 0
1296 09:51:03.256030 USB2 port 0
1297 09:51:03.256121 USB2 port 1
1298 09:51:03.256212 USB2 port 2
1299 09:51:03.256302 USB2 port 3
1300 09:51:03.256392 USB2 port 5
1301 09:51:03.256484 USB2 port 6
1302 09:51:03.256566 USB2 port 9
1303 09:51:03.256659 USB3 port 0
1304 09:51:03.256749 USB3 port 1
1305 09:51:03.256840 USB3 port 2
1306 09:51:03.256929 USB3 port 3
1307 09:51:03.257019 USB3 port 4
1308 09:51:03.257109 PCI: 00:14.2
1309 09:51:03.257202 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1310 09:51:03.257296 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1311 09:51:03.257389 PCI: 00:14.3
1312 09:51:03.257461 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1313 09:51:03.257556 PCI: 00:15.0 child on link 0 I2C: 01:15
1314 09:51:03.257649 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1315 09:51:03.257740 I2C: 01:15
1316 09:51:03.257832 PCI: 00:15.1 child on link 0 I2C: 02:5d
1317 09:51:03.257925 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1318 09:51:03.258016 I2C: 02:5d
1319 09:51:03.258106 GENERIC: 0.0
1320 09:51:03.258198 PCI: 00:16.0
1321 09:51:03.258291 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1322 09:51:03.258382 PCI: 00:17.0
1323 09:51:03.258475 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1324 09:51:03.258542 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1325 09:51:03.258617 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1326 09:51:03.258711 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1327 09:51:03.258804 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1328 09:51:03.259096 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1329 09:51:03.259194 PCI: 00:19.0 child on link 0 I2C: 03:1a
1330 09:51:03.259289 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1331 09:51:03.259380 I2C: 03:1a
1332 09:51:03.259488 I2C: 03:38
1333 09:51:03.259582 I2C: 03:39
1334 09:51:03.259672 I2C: 03:3a
1335 09:51:03.259761 I2C: 03:3b
1336 09:51:03.259837 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1337 09:51:03.259933 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1338 09:51:03.260027 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1339 09:51:03.260122 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1340 09:51:03.260214 PCI: 01:00.0
1341 09:51:03.260307 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1342 09:51:03.260399 PCI: 00:1e.0
1343 09:51:03.260492 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1344 09:51:03.260571 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1345 09:51:03.260638 PCI: 00:1e.2 child on link 0 SPI: 00
1346 09:51:03.260733 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1347 09:51:03.260824 SPI: 00
1348 09:51:03.260916 PCI: 00:1e.3 child on link 0 SPI: 01
1349 09:51:03.261008 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1350 09:51:03.261101 SPI: 01
1351 09:51:03.261193 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1352 09:51:03.261286 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1353 09:51:03.261377 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1354 09:51:03.261441 PNP: 0c09.0
1355 09:51:03.261524 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1356 09:51:03.261618 PCI: 00:1f.3
1357 09:51:03.261711 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1358 09:51:03.261805 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1359 09:51:03.261897 PCI: 00:1f.4
1360 09:51:03.261989 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1361 09:51:03.262083 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1362 09:51:03.262174 PCI: 00:1f.5
1363 09:51:03.262266 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1364 09:51:03.262358 Done allocating resources.
1365 09:51:03.262449 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1366 09:51:03.262544 Enabling resources...
1367 09:51:03.262639 PCI: 00:00.0 subsystem <- 8086/9b61
1368 09:51:03.262730 PCI: 00:00.0 cmd <- 06
1369 09:51:03.262821 PCI: 00:02.0 subsystem <- 8086/9b41
1370 09:51:03.262911 PCI: 00:02.0 cmd <- 03
1371 09:51:03.263002 PCI: 00:08.0 cmd <- 06
1372 09:51:03.263093 PCI: 00:12.0 subsystem <- 8086/02f9
1373 09:51:03.263183 PCI: 00:12.0 cmd <- 02
1374 09:51:03.263274 PCI: 00:14.0 subsystem <- 8086/02ed
1375 09:51:03.263364 PCI: 00:14.0 cmd <- 02
1376 09:51:03.263474 PCI: 00:14.2 cmd <- 02
1377 09:51:03.263572 PCI: 00:14.3 subsystem <- 8086/02f0
1378 09:51:03.263665 PCI: 00:14.3 cmd <- 02
1379 09:51:03.263756 PCI: 00:15.0 subsystem <- 8086/02e8
1380 09:51:03.263847 PCI: 00:15.0 cmd <- 02
1381 09:51:03.263938 PCI: 00:15.1 subsystem <- 8086/02e9
1382 09:51:03.264028 PCI: 00:15.1 cmd <- 02
1383 09:51:03.264119 PCI: 00:16.0 subsystem <- 8086/02e0
1384 09:51:03.264209 PCI: 00:16.0 cmd <- 02
1385 09:51:03.264301 PCI: 00:17.0 subsystem <- 8086/02d3
1386 09:51:03.264392 PCI: 00:17.0 cmd <- 03
1387 09:51:03.264483 PCI: 00:19.0 subsystem <- 8086/02c5
1388 09:51:03.264555 PCI: 00:19.0 cmd <- 02
1389 09:51:03.264648 PCI: 00:1d.0 bridge ctrl <- 0013
1390 09:51:03.264740 PCI: 00:1d.0 subsystem <- 8086/02b0
1391 09:51:03.264831 PCI: 00:1d.0 cmd <- 06
1392 09:51:03.264921 PCI: 00:1e.0 subsystem <- 8086/02a8
1393 09:51:03.265012 PCI: 00:1e.0 cmd <- 06
1394 09:51:03.265103 PCI: 00:1e.2 subsystem <- 8086/02aa
1395 09:51:03.265194 PCI: 00:1e.2 cmd <- 06
1396 09:51:03.265285 PCI: 00:1e.3 subsystem <- 8086/02ab
1397 09:51:03.265376 PCI: 00:1e.3 cmd <- 02
1398 09:51:03.265467 PCI: 00:1f.0 subsystem <- 8086/0284
1399 09:51:03.265558 PCI: 00:1f.0 cmd <- 407
1400 09:51:03.265644 PCI: 00:1f.3 subsystem <- 8086/02c8
1401 09:51:03.265734 PCI: 00:1f.3 cmd <- 02
1402 09:51:03.265825 PCI: 00:1f.4 subsystem <- 8086/02a3
1403 09:51:03.265915 PCI: 00:1f.4 cmd <- 03
1404 09:51:03.266006 PCI: 00:1f.5 subsystem <- 8086/02a4
1405 09:51:03.266096 PCI: 00:1f.5 cmd <- 406
1406 09:51:03.266187 PCI: 01:00.0 cmd <- 02
1407 09:51:03.266277 done.
1408 09:51:03.266367 ME: Version: 14.0.39.1367
1409 09:51:03.266459 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1410 09:51:03.266566 Initializing devices...
1411 09:51:03.266659 Root Device init ...
1412 09:51:03.267915 Chrome EC: Set SMI mask to 0x0000000000000000
1413 09:51:03.271146 Chrome EC: clear events_b mask to 0x0000000000000000
1414 09:51:03.277616 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1415 09:51:03.284378 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1416 09:51:03.290753 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1417 09:51:03.293891 Chrome EC: Set WAKE mask to 0x0000000000000000
1418 09:51:03.297696 Root Device init finished in 35169 usecs
1419 09:51:03.300599 CPU_CLUSTER: 0 init ...
1420 09:51:03.307300 CPU_CLUSTER: 0 init finished in 2447 usecs
1421 09:51:03.311328 PCI: 00:00.0 init ...
1422 09:51:03.314767 CPU TDP: 15 Watts
1423 09:51:03.317982 CPU PL2 = 64 Watts
1424 09:51:03.321947 PCI: 00:00.0 init finished in 7079 usecs
1425 09:51:03.325125 PCI: 00:02.0 init ...
1426 09:51:03.328133 PCI: 00:02.0 init finished in 2254 usecs
1427 09:51:03.331789 PCI: 00:08.0 init ...
1428 09:51:03.334797 PCI: 00:08.0 init finished in 2251 usecs
1429 09:51:03.338024 PCI: 00:12.0 init ...
1430 09:51:03.341720 PCI: 00:12.0 init finished in 2251 usecs
1431 09:51:03.344849 PCI: 00:14.0 init ...
1432 09:51:03.348133 PCI: 00:14.0 init finished in 2253 usecs
1433 09:51:03.351393 PCI: 00:14.2 init ...
1434 09:51:03.354697 PCI: 00:14.2 init finished in 2252 usecs
1435 09:51:03.358063 PCI: 00:14.3 init ...
1436 09:51:03.361358 PCI: 00:14.3 init finished in 2273 usecs
1437 09:51:03.364989 PCI: 00:15.0 init ...
1438 09:51:03.368214 DW I2C bus 0 at 0xd121f000 (400 KHz)
1439 09:51:03.371557 PCI: 00:15.0 init finished in 5974 usecs
1440 09:51:03.374833 PCI: 00:15.1 init ...
1441 09:51:03.378023 DW I2C bus 1 at 0xd1220000 (400 KHz)
1442 09:51:03.381269 PCI: 00:15.1 init finished in 5978 usecs
1443 09:51:03.385044 PCI: 00:16.0 init ...
1444 09:51:03.388248 PCI: 00:16.0 init finished in 2252 usecs
1445 09:51:03.391992 PCI: 00:19.0 init ...
1446 09:51:03.395695 DW I2C bus 4 at 0xd1222000 (400 KHz)
1447 09:51:03.402238 PCI: 00:19.0 init finished in 5976 usecs
1448 09:51:03.402365 PCI: 00:1d.0 init ...
1449 09:51:03.405505 Initializing PCH PCIe bridge.
1450 09:51:03.408605 PCI: 00:1d.0 init finished in 5277 usecs
1451 09:51:03.413629 PCI: 00:1f.0 init ...
1452 09:51:03.416652 IOAPIC: Initializing IOAPIC at 0xfec00000
1453 09:51:03.423557 IOAPIC: Bootstrap Processor Local APIC = 0x00
1454 09:51:03.423654 IOAPIC: ID = 0x02
1455 09:51:03.426923 IOAPIC: Dumping registers
1456 09:51:03.429971 reg 0x0000: 0x02000000
1457 09:51:03.433516 reg 0x0001: 0x00770020
1458 09:51:03.433639 reg 0x0002: 0x00000000
1459 09:51:03.440495 PCI: 00:1f.0 init finished in 23549 usecs
1460 09:51:03.443839 PCI: 00:1f.4 init ...
1461 09:51:03.446684 PCI: 00:1f.4 init finished in 2263 usecs
1462 09:51:03.458114 PCI: 01:00.0 init ...
1463 09:51:03.461313 PCI: 01:00.0 init finished in 2251 usecs
1464 09:51:03.465188 PNP: 0c09.0 init ...
1465 09:51:03.468467 Google Chrome EC uptime: 8.166 seconds
1466 09:51:03.475545 Google Chrome AP resets since EC boot: 0
1467 09:51:03.478837 Google Chrome most recent AP reset causes:
1468 09:51:03.485172 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1469 09:51:03.488590 PNP: 0c09.0 init finished in 22051 usecs
1470 09:51:03.491720 Devices initialized
1471 09:51:03.495205 Show all devs... After init.
1472 09:51:03.498306 Root Device: enabled 1
1473 09:51:03.498420 CPU_CLUSTER: 0: enabled 1
1474 09:51:03.501583 DOMAIN: 0000: enabled 1
1475 09:51:03.504833 APIC: 00: enabled 1
1476 09:51:03.504949 PCI: 00:00.0: enabled 1
1477 09:51:03.508657 PCI: 00:02.0: enabled 1
1478 09:51:03.511906 PCI: 00:04.0: enabled 0
1479 09:51:03.515059 PCI: 00:05.0: enabled 0
1480 09:51:03.515181 PCI: 00:12.0: enabled 1
1481 09:51:03.518466 PCI: 00:12.5: enabled 0
1482 09:51:03.521818 PCI: 00:12.6: enabled 0
1483 09:51:03.525049 PCI: 00:14.0: enabled 1
1484 09:51:03.525165 PCI: 00:14.1: enabled 0
1485 09:51:03.528846 PCI: 00:14.3: enabled 1
1486 09:51:03.531876 PCI: 00:14.5: enabled 0
1487 09:51:03.534878 PCI: 00:15.0: enabled 1
1488 09:51:03.535003 PCI: 00:15.1: enabled 1
1489 09:51:03.538379 PCI: 00:15.2: enabled 0
1490 09:51:03.541219 PCI: 00:15.3: enabled 0
1491 09:51:03.544816 PCI: 00:16.0: enabled 1
1492 09:51:03.544942 PCI: 00:16.1: enabled 0
1493 09:51:03.548043 PCI: 00:16.2: enabled 0
1494 09:51:03.551584 PCI: 00:16.3: enabled 0
1495 09:51:03.551687 PCI: 00:16.4: enabled 0
1496 09:51:03.554869 PCI: 00:16.5: enabled 0
1497 09:51:03.558346 PCI: 00:17.0: enabled 1
1498 09:51:03.561293 PCI: 00:19.0: enabled 1
1499 09:51:03.561415 PCI: 00:19.1: enabled 0
1500 09:51:03.564800 PCI: 00:19.2: enabled 0
1501 09:51:03.568147 PCI: 00:1a.0: enabled 0
1502 09:51:03.571384 PCI: 00:1c.0: enabled 0
1503 09:51:03.571486 PCI: 00:1c.1: enabled 0
1504 09:51:03.575050 PCI: 00:1c.2: enabled 0
1505 09:51:03.578238 PCI: 00:1c.3: enabled 0
1506 09:51:03.578355 PCI: 00:1c.4: enabled 0
1507 09:51:03.581512 PCI: 00:1c.5: enabled 0
1508 09:51:03.584855 PCI: 00:1c.6: enabled 0
1509 09:51:03.588136 PCI: 00:1c.7: enabled 0
1510 09:51:03.588254 PCI: 00:1d.0: enabled 1
1511 09:51:03.591527 PCI: 00:1d.1: enabled 0
1512 09:51:03.594865 PCI: 00:1d.2: enabled 0
1513 09:51:03.597973 PCI: 00:1d.3: enabled 0
1514 09:51:03.598085 PCI: 00:1d.4: enabled 0
1515 09:51:03.601584 PCI: 00:1d.5: enabled 0
1516 09:51:03.604532 PCI: 00:1e.0: enabled 1
1517 09:51:03.607763 PCI: 00:1e.1: enabled 0
1518 09:51:03.607845 PCI: 00:1e.2: enabled 1
1519 09:51:03.610995 PCI: 00:1e.3: enabled 1
1520 09:51:03.614915 PCI: 00:1f.0: enabled 1
1521 09:51:03.615020 PCI: 00:1f.1: enabled 0
1522 09:51:03.618106 PCI: 00:1f.2: enabled 0
1523 09:51:03.621531 PCI: 00:1f.3: enabled 1
1524 09:51:03.624827 PCI: 00:1f.4: enabled 1
1525 09:51:03.624923 PCI: 00:1f.5: enabled 1
1526 09:51:03.628090 PCI: 00:1f.6: enabled 0
1527 09:51:03.630846 USB0 port 0: enabled 1
1528 09:51:03.634661 I2C: 01:15: enabled 1
1529 09:51:03.634746 I2C: 02:5d: enabled 1
1530 09:51:03.637937 GENERIC: 0.0: enabled 1
1531 09:51:03.641002 I2C: 03:1a: enabled 1
1532 09:51:03.641094 I2C: 03:38: enabled 1
1533 09:51:03.644149 I2C: 03:39: enabled 1
1534 09:51:03.647338 I2C: 03:3a: enabled 1
1535 09:51:03.647453 I2C: 03:3b: enabled 1
1536 09:51:03.651047 PCI: 00:00.0: enabled 1
1537 09:51:03.654127 SPI: 00: enabled 1
1538 09:51:03.654214 SPI: 01: enabled 1
1539 09:51:03.657557 PNP: 0c09.0: enabled 1
1540 09:51:03.660690 USB2 port 0: enabled 1
1541 09:51:03.660772 USB2 port 1: enabled 1
1542 09:51:03.664136 USB2 port 2: enabled 0
1543 09:51:03.667771 USB2 port 3: enabled 0
1544 09:51:03.667863 USB2 port 5: enabled 0
1545 09:51:03.670950 USB2 port 6: enabled 1
1546 09:51:03.674105 USB2 port 9: enabled 1
1547 09:51:03.677204 USB3 port 0: enabled 1
1548 09:51:03.677291 USB3 port 1: enabled 1
1549 09:51:03.681050 USB3 port 2: enabled 1
1550 09:51:03.683910 USB3 port 3: enabled 1
1551 09:51:03.684017 USB3 port 4: enabled 0
1552 09:51:03.687286 APIC: 02: enabled 1
1553 09:51:03.690862 APIC: 03: enabled 1
1554 09:51:03.690992 APIC: 04: enabled 1
1555 09:51:03.694028 APIC: 01: enabled 1
1556 09:51:03.694115 APIC: 05: enabled 1
1557 09:51:03.697413 APIC: 06: enabled 1
1558 09:51:03.700571 APIC: 07: enabled 1
1559 09:51:03.700656 PCI: 00:08.0: enabled 1
1560 09:51:03.704207 PCI: 00:14.2: enabled 1
1561 09:51:03.707250 PCI: 01:00.0: enabled 1
1562 09:51:03.710368 Disabling ACPI via APMC:
1563 09:51:03.713968 done.
1564 09:51:03.717843 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1565 09:51:03.720447 ELOG: NV offset 0xaf0000 size 0x4000
1566 09:51:03.728187 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1567 09:51:03.734714 ELOG: Event(17) added with size 13 at 2024-06-17 09:50:04 UTC
1568 09:51:03.741108 ELOG: Event(92) added with size 9 at 2024-06-17 09:50:04 UTC
1569 09:51:03.748066 ELOG: Event(93) added with size 9 at 2024-06-17 09:50:04 UTC
1570 09:51:03.754441 ELOG: Event(9E) added with size 10 at 2024-06-17 09:50:04 UTC
1571 09:51:03.761071 ELOG: Event(9F) added with size 14 at 2024-06-17 09:50:04 UTC
1572 09:51:03.767609 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1573 09:51:03.774292 ELOG: Event(A1) added with size 10 at 2024-06-17 09:50:04 UTC
1574 09:51:03.780765 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1575 09:51:03.787373 ELOG: Event(A0) added with size 9 at 2024-06-17 09:50:04 UTC
1576 09:51:03.791147 elog_add_boot_reason: Logged dev mode boot
1577 09:51:03.794298 Finalize devices...
1578 09:51:03.794419 PCI: 00:17.0 final
1579 09:51:03.797514 Devices finalized
1580 09:51:03.804151 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1581 09:51:03.807375 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1582 09:51:03.810387 ME: HFSTS1 : 0x90000245
1583 09:51:03.817052 ME: HFSTS2 : 0x30850126
1584 09:51:03.820596 ME: HFSTS3 : 0x00000020
1585 09:51:03.823899 ME: HFSTS4 : 0x00004800
1586 09:51:03.827094 ME: HFSTS5 : 0x00000000
1587 09:51:03.833601 ME: HFSTS6 : 0x40400006
1588 09:51:03.836952 ME: Manufacturing Mode : NO
1589 09:51:03.840255 ME: FW Partition Table : OK
1590 09:51:03.843422 ME: Bringup Loader Failure : NO
1591 09:51:03.846870 ME: Firmware Init Complete : YES
1592 09:51:03.850561 ME: Boot Options Present : NO
1593 09:51:03.853798 ME: Update In Progress : NO
1594 09:51:03.857150 ME: D0i3 Support : YES
1595 09:51:03.860479 ME: Low Power State Enabled : NO
1596 09:51:03.863388 ME: CPU Replaced : NO
1597 09:51:03.866477 ME: CPU Replacement Valid : YES
1598 09:51:03.870260 ME: Current Working State : 5
1599 09:51:03.873543 ME: Current Operation State : 1
1600 09:51:03.876798 ME: Current Operation Mode : 0
1601 09:51:03.879969 ME: Error Code : 0
1602 09:51:03.883727 ME: CPU Debug Disabled : YES
1603 09:51:03.886386 ME: TXT Support : NO
1604 09:51:03.890142 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1605 09:51:03.896177 ELOG: Event(91) added with size 10 at 2024-06-17 09:50:05 UTC
1606 09:51:03.903129 ELOG: Event(16) added with size 11 at 2024-06-17 09:50:05 UTC
1607 09:51:03.906351 Erasing flash addr af0000 + 4 KiB
1608 09:51:03.977836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1609 09:51:03.981060 CBFS @ c08000 size 3f8000
1610 09:51:03.987587 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1611 09:51:03.991234 CBFS: Locating 'fallback/dsdt.aml'
1612 09:51:03.994303 CBFS: Found @ offset 10bb80 size 3fa5
1613 09:51:03.997993 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1614 09:51:04.001015 CBFS @ c08000 size 3f8000
1615 09:51:04.007540 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1616 09:51:04.010869 CBFS: Locating 'fallback/slic'
1617 09:51:04.014121 CBFS: 'fallback/slic' not found.
1618 09:51:04.020772 ACPI: Writing ACPI tables at 99b3e000.
1619 09:51:04.020898 ACPI: * FACS
1620 09:51:04.024376 ACPI: * DSDT
1621 09:51:04.027689 Ramoops buffer: 0x100000@0x99a3d000.
1622 09:51:04.030972 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1623 09:51:04.037751 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1624 09:51:04.040773 Google Chrome EC: version:
1625 09:51:04.044222 ro: helios_v2.0.2659-56403530b
1626 09:51:04.047479 rw: helios_v2.0.2849-c41de27e7d
1627 09:51:04.047607 running image: 1
1628 09:51:04.051769 ACPI: * FADT
1629 09:51:04.051859 SCI is IRQ9
1630 09:51:04.058039 ACPI: added table 1/32, length now 40
1631 09:51:04.058135 ACPI: * SSDT
1632 09:51:04.061470 Found 1 CPU(s) with 8 core(s) each.
1633 09:51:04.064842 Error: Could not locate 'wifi_sar' in VPD.
1634 09:51:04.071327 Checking CBFS for default SAR values
1635 09:51:04.074634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1636 09:51:04.077871 CBFS @ c08000 size 3f8000
1637 09:51:04.084901 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1638 09:51:04.087783 CBFS: Locating 'wifi_sar_defaults.hex'
1639 09:51:04.090969 CBFS: Found @ offset 5fac0 size 77
1640 09:51:04.094667 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1641 09:51:04.101213 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1642 09:51:04.104352 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1643 09:51:04.111134 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1644 09:51:04.114494 failed to find key in VPD: dsm_calib_r0_0
1645 09:51:04.124152 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1646 09:51:04.127811 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1647 09:51:04.130658 failed to find key in VPD: dsm_calib_r0_1
1648 09:51:04.140937 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1649 09:51:04.147353 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1650 09:51:04.150597 failed to find key in VPD: dsm_calib_r0_2
1651 09:51:04.161020 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1652 09:51:04.164030 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1653 09:51:04.170645 failed to find key in VPD: dsm_calib_r0_3
1654 09:51:04.177572 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1655 09:51:04.183899 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1656 09:51:04.187100 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1657 09:51:04.190865 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1658 09:51:04.194558 EC returned error result code 1
1659 09:51:04.197918 EC returned error result code 1
1660 09:51:04.201703 EC returned error result code 1
1661 09:51:04.208532 PS2K: Bad resp from EC. Vivaldi disabled!
1662 09:51:04.211640 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1663 09:51:04.218493 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1664 09:51:04.224866 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1665 09:51:04.228542 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1666 09:51:04.234819 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1667 09:51:04.241880 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1668 09:51:04.248333 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1669 09:51:04.251453 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1670 09:51:04.254636 ACPI: added table 2/32, length now 44
1671 09:51:04.258436 ACPI: * MCFG
1672 09:51:04.261462 ACPI: added table 3/32, length now 48
1673 09:51:04.264686 ACPI: * TPM2
1674 09:51:04.267742 TPM2 log created at 99a2d000
1675 09:51:04.271709 ACPI: added table 4/32, length now 52
1676 09:51:04.271802 ACPI: * MADT
1677 09:51:04.274914 SCI is IRQ9
1678 09:51:04.278063 ACPI: added table 5/32, length now 56
1679 09:51:04.278156 current = 99b43ac0
1680 09:51:04.281206 ACPI: * DMAR
1681 09:51:04.284923 ACPI: added table 6/32, length now 60
1682 09:51:04.287838 ACPI: * IGD OpRegion
1683 09:51:04.287943 GMA: Found VBT in CBFS
1684 09:51:04.291110 GMA: Found valid VBT in CBFS
1685 09:51:04.294426 ACPI: added table 7/32, length now 64
1686 09:51:04.298086 ACPI: * HPET
1687 09:51:04.301193 ACPI: added table 8/32, length now 68
1688 09:51:04.301281 ACPI: done.
1689 09:51:04.304727 ACPI tables: 31744 bytes.
1690 09:51:04.308255 smbios_write_tables: 99a2c000
1691 09:51:04.311388 EC returned error result code 3
1692 09:51:04.314555 Couldn't obtain OEM name from CBI
1693 09:51:04.318175 Create SMBIOS type 17
1694 09:51:04.321165 PCI: 00:00.0 (Intel Cannonlake)
1695 09:51:04.324952 PCI: 00:14.3 (Intel WiFi)
1696 09:51:04.328220 SMBIOS tables: 939 bytes.
1697 09:51:04.331396 Writing table forward entry at 0x00000500
1698 09:51:04.337699 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1699 09:51:04.341450 Writing coreboot table at 0x99b62000
1700 09:51:04.348147 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1701 09:51:04.351182 1. 0000000000001000-000000000009ffff: RAM
1702 09:51:04.354443 2. 00000000000a0000-00000000000fffff: RESERVED
1703 09:51:04.361461 3. 0000000000100000-0000000099a2bfff: RAM
1704 09:51:04.364397 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1705 09:51:04.371264 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1706 09:51:04.377572 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1707 09:51:04.381161 7. 000000009a000000-000000009f7fffff: RESERVED
1708 09:51:04.384375 8. 00000000e0000000-00000000efffffff: RESERVED
1709 09:51:04.390862 9. 00000000fc000000-00000000fc000fff: RESERVED
1710 09:51:04.394578 10. 00000000fe000000-00000000fe00ffff: RESERVED
1711 09:51:04.401067 11. 00000000fed10000-00000000fed17fff: RESERVED
1712 09:51:04.404467 12. 00000000fed80000-00000000fed83fff: RESERVED
1713 09:51:04.410912 13. 00000000fed90000-00000000fed91fff: RESERVED
1714 09:51:04.414369 14. 00000000feda0000-00000000feda1fff: RESERVED
1715 09:51:04.417703 15. 0000000100000000-000000045e7fffff: RAM
1716 09:51:04.424164 Graphics framebuffer located at 0xc0000000
1717 09:51:04.427171 Passing 5 GPIOs to payload:
1718 09:51:04.430675 NAME | PORT | POLARITY | VALUE
1719 09:51:04.437455 write protect | undefined | high | low
1720 09:51:04.440565 lid | undefined | high | high
1721 09:51:04.447047 power | undefined | high | low
1722 09:51:04.450921 oprom | undefined | high | low
1723 09:51:04.456927 EC in RW | 0x000000cb | high | low
1724 09:51:04.457030 Board ID: 4
1725 09:51:04.463831 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 09:51:04.467003 CBFS @ c08000 size 3f8000
1727 09:51:04.473802 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 09:51:04.476805 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6229
1729 09:51:04.480620 coreboot table: 1492 bytes.
1730 09:51:04.483724 IMD ROOT 0. 99fff000 00001000
1731 09:51:04.486670 IMD SMALL 1. 99ffe000 00001000
1732 09:51:04.490295 FSP MEMORY 2. 99c4e000 003b0000
1733 09:51:04.493469 CONSOLE 3. 99c2e000 00020000
1734 09:51:04.496705 FMAP 4. 99c2d000 0000054e
1735 09:51:04.500509 TIME STAMP 5. 99c2c000 00000910
1736 09:51:04.503514 VBOOT WORK 6. 99c18000 00014000
1737 09:51:04.506693 MRC DATA 7. 99c16000 00001958
1738 09:51:04.510175 ROMSTG STCK 8. 99c15000 00001000
1739 09:51:04.513732 AFTER CAR 9. 99c0b000 0000a000
1740 09:51:04.516668 RAMSTAGE 10. 99baf000 0005c000
1741 09:51:04.520242 REFCODE 11. 99b7a000 00035000
1742 09:51:04.523684 SMM BACKUP 12. 99b6a000 00010000
1743 09:51:04.526625 COREBOOT 13. 99b62000 00008000
1744 09:51:04.530153 ACPI 14. 99b3e000 00024000
1745 09:51:04.533329 ACPI GNVS 15. 99b3d000 00001000
1746 09:51:04.536788 RAMOOPS 16. 99a3d000 00100000
1747 09:51:04.540284 TPM2 TCGLOG17. 99a2d000 00010000
1748 09:51:04.543695 SMBIOS 18. 99a2c000 00000800
1749 09:51:04.546846 IMD small region:
1750 09:51:04.550077 IMD ROOT 0. 99ffec00 00000400
1751 09:51:04.553341 FSP RUNTIME 1. 99ffebe0 00000004
1752 09:51:04.557136 EC HOSTEVENT 2. 99ffebc0 00000008
1753 09:51:04.560282 POWER STATE 3. 99ffeb80 00000040
1754 09:51:04.563487 ROMSTAGE 4. 99ffeb60 00000004
1755 09:51:04.566623 MEM INFO 5. 99ffe9a0 000001b9
1756 09:51:04.570395 VPD 6. 99ffe960 00000027
1757 09:51:04.573343 MTRR: Physical address space:
1758 09:51:04.580222 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1759 09:51:04.586558 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1760 09:51:04.593084 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1761 09:51:04.600049 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1762 09:51:04.606826 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1763 09:51:04.610107 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1764 09:51:04.616713 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1765 09:51:04.623335 MTRR: Fixed MSR 0x250 0x0606060606060606
1766 09:51:04.626387 MTRR: Fixed MSR 0x258 0x0606060606060606
1767 09:51:04.629813 MTRR: Fixed MSR 0x259 0x0000000000000000
1768 09:51:04.632746 MTRR: Fixed MSR 0x268 0x0606060606060606
1769 09:51:04.636370 MTRR: Fixed MSR 0x269 0x0606060606060606
1770 09:51:04.643162 MTRR: Fixed MSR 0x26a 0x0606060606060606
1771 09:51:04.646114 MTRR: Fixed MSR 0x26b 0x0606060606060606
1772 09:51:04.649758 MTRR: Fixed MSR 0x26c 0x0606060606060606
1773 09:51:04.652580 MTRR: Fixed MSR 0x26d 0x0606060606060606
1774 09:51:04.659415 MTRR: Fixed MSR 0x26e 0x0606060606060606
1775 09:51:04.662730 MTRR: Fixed MSR 0x26f 0x0606060606060606
1776 09:51:04.666409 call enable_fixed_mtrr()
1777 09:51:04.669516 CPU physical address size: 39 bits
1778 09:51:04.672653 MTRR: default type WB/UC MTRR counts: 6/8.
1779 09:51:04.676212 MTRR: WB selected as default type.
1780 09:51:04.682545 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1781 09:51:04.689424 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1782 09:51:04.695512 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1783 09:51:04.702397 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1784 09:51:04.709337 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1785 09:51:04.715683 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1786 09:51:04.718875 MTRR: Fixed MSR 0x250 0x0606060606060606
1787 09:51:04.722562 MTRR: Fixed MSR 0x258 0x0606060606060606
1788 09:51:04.728720 MTRR: Fixed MSR 0x259 0x0000000000000000
1789 09:51:04.732652 MTRR: Fixed MSR 0x268 0x0606060606060606
1790 09:51:04.735428 MTRR: Fixed MSR 0x269 0x0606060606060606
1791 09:51:04.739067 MTRR: Fixed MSR 0x26a 0x0606060606060606
1792 09:51:04.745431 MTRR: Fixed MSR 0x26b 0x0606060606060606
1793 09:51:04.749086 MTRR: Fixed MSR 0x26c 0x0606060606060606
1794 09:51:04.752182 MTRR: Fixed MSR 0x26d 0x0606060606060606
1795 09:51:04.755242 MTRR: Fixed MSR 0x26e 0x0606060606060606
1796 09:51:04.758785 MTRR: Fixed MSR 0x26f 0x0606060606060606
1797 09:51:04.762345
1798 09:51:04.762438 MTRR check
1799 09:51:04.765248 Fixed MTRRs : Enabled
1800 09:51:04.765342 Variable MTRRs: Enabled
1801 09:51:04.768703
1802 09:51:04.768797 call enable_fixed_mtrr()
1803 09:51:04.775165 BS: BS_WRITE_TABLES times (ms): entry 56 run 9 exit 2
1804 09:51:04.778409 CPU physical address size: 39 bits
1805 09:51:04.785167 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1806 09:51:04.788409 MTRR: Fixed MSR 0x250 0x0606060606060606
1807 09:51:04.791598 MTRR: Fixed MSR 0x258 0x0606060606060606
1808 09:51:04.795185 MTRR: Fixed MSR 0x259 0x0000000000000000
1809 09:51:04.801974 MTRR: Fixed MSR 0x268 0x0606060606060606
1810 09:51:04.805185 MTRR: Fixed MSR 0x269 0x0606060606060606
1811 09:51:04.808441 MTRR: Fixed MSR 0x26a 0x0606060606060606
1812 09:51:04.811692 MTRR: Fixed MSR 0x26b 0x0606060606060606
1813 09:51:04.814966 MTRR: Fixed MSR 0x26c 0x0606060606060606
1814 09:51:04.821407 MTRR: Fixed MSR 0x26d 0x0606060606060606
1815 09:51:04.824736 MTRR: Fixed MSR 0x26e 0x0606060606060606
1816 09:51:04.828601 MTRR: Fixed MSR 0x26f 0x0606060606060606
1817 09:51:04.834715 MTRR: Fixed MSR 0x250 0x0606060606060606
1818 09:51:04.834806 call enable_fixed_mtrr()
1819 09:51:04.841681 MTRR: Fixed MSR 0x258 0x0606060606060606
1820 09:51:04.844942 MTRR: Fixed MSR 0x259 0x0000000000000000
1821 09:51:04.848005 MTRR: Fixed MSR 0x268 0x0606060606060606
1822 09:51:04.851785 MTRR: Fixed MSR 0x269 0x0606060606060606
1823 09:51:04.855060 MTRR: Fixed MSR 0x26a 0x0606060606060606
1824 09:51:04.861817 MTRR: Fixed MSR 0x26b 0x0606060606060606
1825 09:51:04.864786 MTRR: Fixed MSR 0x26c 0x0606060606060606
1826 09:51:04.868395 MTRR: Fixed MSR 0x26d 0x0606060606060606
1827 09:51:04.871474 MTRR: Fixed MSR 0x26e 0x0606060606060606
1828 09:51:04.877978 MTRR: Fixed MSR 0x26f 0x0606060606060606
1829 09:51:04.881596 CPU physical address size: 39 bits
1830 09:51:04.884946 call enable_fixed_mtrr()
1831 09:51:04.887967 MTRR: Fixed MSR 0x250 0x0606060606060606
1832 09:51:04.891759 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 09:51:04.894963 MTRR: Fixed MSR 0x258 0x0606060606060606
1834 09:51:04.898094 MTRR: Fixed MSR 0x259 0x0000000000000000
1835 09:51:04.904919 MTRR: Fixed MSR 0x268 0x0606060606060606
1836 09:51:04.907908 MTRR: Fixed MSR 0x269 0x0606060606060606
1837 09:51:04.911144 MTRR: Fixed MSR 0x26a 0x0606060606060606
1838 09:51:04.914874 MTRR: Fixed MSR 0x26b 0x0606060606060606
1839 09:51:04.921101 MTRR: Fixed MSR 0x26c 0x0606060606060606
1840 09:51:04.924844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1841 09:51:04.927834 MTRR: Fixed MSR 0x26e 0x0606060606060606
1842 09:51:04.930988 MTRR: Fixed MSR 0x26f 0x0606060606060606
1843 09:51:04.938010 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 09:51:04.938102 call enable_fixed_mtrr()
1845 09:51:04.944382 MTRR: Fixed MSR 0x259 0x0000000000000000
1846 09:51:04.948012 MTRR: Fixed MSR 0x268 0x0606060606060606
1847 09:51:04.951121 MTRR: Fixed MSR 0x269 0x0606060606060606
1848 09:51:04.954340 MTRR: Fixed MSR 0x26a 0x0606060606060606
1849 09:51:04.961129 MTRR: Fixed MSR 0x26b 0x0606060606060606
1850 09:51:04.964830 MTRR: Fixed MSR 0x26c 0x0606060606060606
1851 09:51:04.967661 MTRR: Fixed MSR 0x26d 0x0606060606060606
1852 09:51:04.970994 MTRR: Fixed MSR 0x26e 0x0606060606060606
1853 09:51:04.977677 MTRR: Fixed MSR 0x26f 0x0606060606060606
1854 09:51:04.980994 CPU physical address size: 39 bits
1855 09:51:04.984153 call enable_fixed_mtrr()
1856 09:51:04.984569 CBFS @ c08000 size 3f8000
1857 09:51:04.991382 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1858 09:51:04.994871 CBFS: Locating 'fallback/payload'
1859 09:51:04.997776 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 09:51:05.004626 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 09:51:05.007831 MTRR: Fixed MSR 0x258 0x0606060606060606
1862 09:51:05.010837 MTRR: Fixed MSR 0x259 0x0000000000000000
1863 09:51:05.014583 MTRR: Fixed MSR 0x268 0x0606060606060606
1864 09:51:05.020682 MTRR: Fixed MSR 0x269 0x0606060606060606
1865 09:51:05.024419 MTRR: Fixed MSR 0x26a 0x0606060606060606
1866 09:51:05.027397 MTRR: Fixed MSR 0x26b 0x0606060606060606
1867 09:51:05.030515 MTRR: Fixed MSR 0x26c 0x0606060606060606
1868 09:51:05.034240 MTRR: Fixed MSR 0x26d 0x0606060606060606
1869 09:51:05.040669 MTRR: Fixed MSR 0x26e 0x0606060606060606
1870 09:51:05.044371 MTRR: Fixed MSR 0x26f 0x0606060606060606
1871 09:51:05.047359 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 09:51:05.050394 call enable_fixed_mtrr()
1873 09:51:05.054143 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 09:51:05.057493 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 09:51:05.063858 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 09:51:05.067110 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 09:51:05.070942 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 09:51:05.073977 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 09:51:05.080749 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 09:51:05.084237 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 09:51:05.087111 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 09:51:05.090494 CPU physical address size: 39 bits
1883 09:51:05.093853 call enable_fixed_mtrr()
1884 09:51:05.097274 CBFS: Found @ offset 1c96c0 size 3f798
1885 09:51:05.100757 CPU physical address size: 39 bits
1886 09:51:05.104255 CPU physical address size: 39 bits
1887 09:51:05.107245 CPU physical address size: 39 bits
1888 09:51:05.114142 Checking segment from ROM address 0xffdd16f8
1889 09:51:05.117288 Checking segment from ROM address 0xffdd1714
1890 09:51:05.120690 Loading segment from ROM address 0xffdd16f8
1891 09:51:05.123620 code (compression=0)
1892 09:51:05.133682 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1893 09:51:05.140566 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1894 09:51:05.143754 it's not compressed!
1895 09:51:05.235970 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1896 09:51:05.242533 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1897 09:51:05.245792 Loading segment from ROM address 0xffdd1714
1898 09:51:05.248915 Entry Point 0x30000000
1899 09:51:05.252063 Loaded segments
1900 09:51:05.257534 Finalizing chipset.
1901 09:51:05.261191 Finalizing SMM.
1902 09:51:05.264453 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1903 09:51:05.267795 mp_park_aps done after 0 msecs.
1904 09:51:05.274000 Jumping to boot code at 30000000(99b62000)
1905 09:51:05.280918 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1906 09:51:05.281015
1907 09:51:05.281088
1908 09:51:05.281154
1909 09:51:05.283975 Starting depthcharge on Helios...
1910 09:51:05.284067
1911 09:51:05.284394 end: 2.2.3 depthcharge-start (duration 00:00:02) [common]
1912 09:51:05.284508 start: 2.2.4 bootloader-commands (timeout 00:04:49) [common]
1913 09:51:05.284602 Setting prompt string to ['hatch:']
1914 09:51:05.284694 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:49)
1915 09:51:05.294044 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1916 09:51:05.294140
1917 09:51:05.300405 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1918 09:51:05.300500
1919 09:51:05.307360 board_setup: Info: eMMC controller not present; skipping
1920 09:51:05.307463
1921 09:51:05.310153 New NVMe Controller 0x30053ac0 @ 00:1d:00
1922 09:51:05.310245
1923 09:51:05.316944 board_setup: Info: SDHCI controller not present; skipping
1924 09:51:05.317037
1925 09:51:05.323644 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1926 09:51:05.323740
1927 09:51:05.323813 Wipe memory regions:
1928 09:51:05.323880
1929 09:51:05.327245 [0x00000000001000, 0x000000000a0000)
1930 09:51:05.327365
1931 09:51:05.330474 [0x00000000100000, 0x00000030000000)
1932 09:51:05.396787
1933 09:51:05.399701 [0x00000030657430, 0x00000099a2c000)
1934 09:51:05.546698
1935 09:51:05.549904 [0x00000100000000, 0x0000045e800000)
1936 09:51:07.006343
1937 09:51:07.006506 R8152: Initializing
1938 09:51:07.006588
1939 09:51:07.009437 Version 9 (ocp_data = 6010)
1940 09:51:07.013793
1941 09:51:07.013886 R8152: Done initializing
1942 09:51:07.013959
1943 09:51:07.016772 Adding net device
1944 09:51:07.654601
1945 09:51:07.654754 R8152: Initializing
1946 09:51:07.654832
1947 09:51:07.658382 Version 6 (ocp_data = 5c30)
1948 09:51:07.658476
1949 09:51:07.661555 R8152: Done initializing
1950 09:51:07.661649
1951 09:51:07.664514 net_add_device: Attemp to include the same device
1952 09:51:07.668066
1953 09:51:07.675273 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1954 09:51:07.675369
1955 09:51:07.675477
1956 09:51:07.675777 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1958 09:51:07.776171 hatch: tftpboot 192.168.201.1 14392715/tftp-deploy-e3za51x0/kernel/bzImage 14392715/tftp-deploy-e3za51x0/kernel/cmdline 14392715/tftp-deploy-e3za51x0/ramdisk/ramdisk.cpio.gz
1959 09:51:07.776354 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1960 09:51:07.776452 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
1961 09:51:07.780320 tftpboot 192.168.201.1 14392715/tftp-deploy-e3za51x0/kernel/bzIloy-e3za51x0/kernel/cmdline 14392715/tftp-deploy-e3za51x0/ramdisk/ramdisk.cpio.gz
1962 09:51:07.780418
1963 09:51:07.780492 Waiting for link
1964 09:51:07.981872
1965 09:51:07.982035 done.
1966 09:51:07.982117
1967 09:51:07.982186 MAC: 00:24:32:50:1a:59
1968 09:51:07.982252
1969 09:51:07.984859 Sending DHCP discover... done.
1970 09:51:07.984955
1971 09:51:07.988036 Waiting for reply... done.
1972 09:51:07.988129
1973 09:51:07.991106 Sending DHCP request... done.
1974 09:51:07.991199
1975 09:51:07.994692 Waiting for reply... done.
1976 09:51:07.994788
1977 09:51:07.997780 My ip is 192.168.201.14
1978 09:51:07.997873
1979 09:51:08.001580 The DHCP server ip is 192.168.201.1
1980 09:51:08.001675
1981 09:51:08.004700 TFTP server IP predefined by user: 192.168.201.1
1982 09:51:08.004793
1983 09:51:08.011538 Bootfile predefined by user: 14392715/tftp-deploy-e3za51x0/kernel/bzImage
1984 09:51:08.011631
1985 09:51:08.014456 Sending tftp read request... done.
1986 09:51:08.014548
1987 09:51:08.021823 Waiting for the transfer...
1988 09:51:08.021917
1989 09:51:08.561495 00000000 ################################################################
1990 09:51:08.561655
1991 09:51:09.111745 00080000 ################################################################
1992 09:51:09.111897
1993 09:51:09.690496 00100000 ################################################################
1994 09:51:09.690649
1995 09:51:10.231080 00180000 ################################################################
1996 09:51:10.231259
1997 09:51:10.808237 00200000 ################################################################
1998 09:51:10.808398
1999 09:51:11.358329 00280000 ################################################################
2000 09:51:11.358515
2001 09:51:11.919011 00300000 ################################################################
2002 09:51:11.919174
2003 09:51:12.538514 00380000 ################################################################
2004 09:51:12.538670
2005 09:51:13.187318 00400000 ################################################################
2006 09:51:13.187472
2007 09:51:13.722143 00480000 ################################################################
2008 09:51:13.722301
2009 09:51:14.294291 00500000 ################################################################
2010 09:51:14.294483
2011 09:51:14.841445 00580000 ################################################################
2012 09:51:14.841602
2013 09:51:15.410765 00600000 ################################################################
2014 09:51:15.411639
2015 09:51:16.058134 00680000 ################################################################
2016 09:51:16.058654
2017 09:51:16.609939 00700000 ################################################################
2018 09:51:16.610142
2019 09:51:17.225879 00780000 ################################################################
2020 09:51:17.226039
2021 09:51:17.839316 00800000 ################################################################
2022 09:51:17.839877
2023 09:51:18.385900 00880000 ################################################################
2024 09:51:18.386066
2025 09:51:19.029426 00900000 ################################################################
2026 09:51:19.030078
2027 09:51:19.711952 00980000 ################################################################
2028 09:51:19.712472
2029 09:51:20.348926 00a00000 ################################################################
2030 09:51:20.349104
2031 09:51:20.916239 00a80000 ################################################################
2032 09:51:20.916400
2033 09:51:21.500299 00b00000 ################################################################
2034 09:51:21.500492
2035 09:51:22.154125 00b80000 ################################################################
2036 09:51:22.154589
2037 09:51:22.782595 00c00000 ################################################################
2038 09:51:22.783097
2039 09:51:23.421255 00c80000 ################################################################
2040 09:51:23.421734
2041 09:51:24.048809 00d00000 ################################################################ done.
2042 09:51:24.048971
2043 09:51:24.051931 The bootfile was 14155664 bytes long.
2044 09:51:24.052034
2045 09:51:24.055038 Sending tftp read request... done.
2046 09:51:24.055148
2047 09:51:24.058299 Waiting for the transfer...
2048 09:51:24.058408
2049 09:51:24.728854 00000000 ################################################################
2050 09:51:24.729368
2051 09:51:25.354310 00080000 ################################################################
2052 09:51:25.354827
2053 09:51:26.018806 00100000 ################################################################
2054 09:51:26.019342
2055 09:51:26.667133 00180000 ################################################################
2056 09:51:26.667711
2057 09:51:27.265330 00200000 ################################################################
2058 09:51:27.265510
2059 09:51:27.851490 00280000 ################################################################
2060 09:51:27.852097
2061 09:51:28.515175 00300000 ################################################################
2062 09:51:28.515337
2063 09:51:29.047043 00380000 ################################################################
2064 09:51:29.047209
2065 09:51:29.569061 00400000 ################################################################
2066 09:51:29.569225
2067 09:51:30.088523 00480000 ################################################################
2068 09:51:30.088676
2069 09:51:30.611351 00500000 ################################################################
2070 09:51:30.611532
2071 09:51:31.142593 00580000 ################################################################
2072 09:51:31.142754
2073 09:51:31.692032 00600000 ################################################################
2074 09:51:31.692182
2075 09:51:32.278859 00680000 ################################################################
2076 09:51:32.279019
2077 09:51:32.816120 00700000 ################################################################
2078 09:51:32.816323
2079 09:51:33.374033 00780000 ################################################################
2080 09:51:33.374187
2081 09:51:33.898239 00800000 ################################################################
2082 09:51:33.898384
2083 09:51:34.433769 00880000 ################################################################
2084 09:51:34.433936
2085 09:51:34.438741 00900000 # done.
2086 09:51:34.438844
2087 09:51:34.442599 Sending tftp read request... done.
2088 09:51:34.442698
2089 09:51:34.445530 Waiting for the transfer...
2090 09:51:34.445628
2091 09:51:34.445725 00000000 # done.
2092 09:51:34.445818
2093 09:51:34.455464 Command line loaded dynamically from TFTP file: 14392715/tftp-deploy-e3za51x0/kernel/cmdline
2094 09:51:34.455599
2095 09:51:34.475638 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2096 09:51:34.475779
2097 09:51:34.478455 ec_init(0): CrosEC protocol v3 supported (256, 256)
2098 09:51:34.486987
2099 09:51:34.489630 Shutting down all USB controllers.
2100 09:51:34.489736
2101 09:51:34.489833 Removing current net device
2102 09:51:34.493767
2103 09:51:34.493864 Finalizing coreboot
2104 09:51:34.493960
2105 09:51:34.500151 Exiting depthcharge with code 4 at timestamp: 36690890
2106 09:51:34.500252
2107 09:51:34.500349
2108 09:51:34.500439 Starting kernel ...
2109 09:51:34.500527
2110 09:51:34.500636
2111 09:51:34.501391 end: 2.2.4 bootloader-commands (duration 00:00:29) [common]
2112 09:51:34.501545 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2113 09:51:34.501672 Setting prompt string to ['Linux version [0-9]']
2114 09:51:34.501790 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2115 09:51:34.501909 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2117 09:55:54.501784 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2119 09:55:54.502128 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2121 09:55:54.502412 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2124 09:55:54.502885 end: 2 depthcharge-action (duration 00:05:00) [common]
2126 09:55:54.503157 Cleaning after the job
2127 09:55:54.503257 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/ramdisk
2128 09:55:54.504498 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/kernel
2129 09:55:54.506295 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14392715/tftp-deploy-e3za51x0/modules
2130 09:55:54.507000 start: 4.1 power-off (timeout 00:00:30) [common]
2131 09:55:54.507312 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-4', '--port=1', '--command=off']
2132 09:55:55.321400 >> Command sent successfully.
2133 09:55:55.324677 Returned 0 in 0 seconds
2134 09:55:55.425119 end: 4.1 power-off (duration 00:00:01) [common]
2136 09:55:55.425602 start: 4.2 read-feedback (timeout 00:09:59) [common]
2137 09:55:55.425955 Listened to connection for namespace 'common' for up to 1s
2139 09:55:55.426471 Listened to connection for namespace 'common' for up to 1s
2140 09:55:56.426868 Finalising connection for namespace 'common'
2141 09:55:56.427047 Disconnecting from shell: Finalise
2142 09:55:56.427156
2143 09:55:56.527497 end: 4.2 read-feedback (duration 00:00:01) [common]
2144 09:55:56.527664 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14392715
2145 09:55:56.544677 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14392715
2146 09:55:56.544859 JobError: Your job cannot terminate cleanly.