Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:49:50.670521 lava-dispatcher, installed at version: 2023.01
2 12:49:50.670704 start: 0 validate
3 12:49:50.670823 Start time: 2023-03-13 12:49:50.670817+00:00 (UTC)
4 12:49:50.670941 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:49:50.671069 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
6 12:49:50.967124 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:49:50.967951 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:49:51.255099 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:49:51.255796 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:49:51.557332 validate duration: 0.89
12 12:49:51.557614 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:49:51.557774 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:49:51.557878 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:49:51.557990 Not decompressing ramdisk as can be used compressed.
16 12:49:51.558079 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
17 12:49:51.558144 saving as /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/ramdisk/rootfs.cpio.gz
18 12:49:51.558204 total size: 8423697 (8MB)
19 12:49:51.559079 progress 0% (0MB)
20 12:49:51.561267 progress 5% (0MB)
21 12:49:51.563590 progress 10% (0MB)
22 12:49:51.565837 progress 15% (1MB)
23 12:49:51.568085 progress 20% (1MB)
24 12:49:51.570304 progress 25% (2MB)
25 12:49:51.572541 progress 30% (2MB)
26 12:49:51.574608 progress 35% (2MB)
27 12:49:51.576851 progress 40% (3MB)
28 12:49:51.579073 progress 45% (3MB)
29 12:49:51.581303 progress 50% (4MB)
30 12:49:51.583509 progress 55% (4MB)
31 12:49:51.585664 progress 60% (4MB)
32 12:49:51.587707 progress 65% (5MB)
33 12:49:51.589642 progress 70% (5MB)
34 12:49:51.591702 progress 75% (6MB)
35 12:49:51.593773 progress 80% (6MB)
36 12:49:51.595864 progress 85% (6MB)
37 12:49:51.597902 progress 90% (7MB)
38 12:49:51.599979 progress 95% (7MB)
39 12:49:51.602031 progress 100% (8MB)
40 12:49:51.602137 8MB downloaded in 0.04s (182.88MB/s)
41 12:49:51.602284 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:49:51.602528 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:49:51.602618 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:49:51.602705 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:49:51.602811 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:49:51.602879 saving as /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/kernel/bzImage
48 12:49:51.602941 total size: 7638928 (7MB)
49 12:49:51.603002 No compression specified
50 12:49:51.603912 progress 0% (0MB)
51 12:49:51.605734 progress 5% (0MB)
52 12:49:51.607655 progress 10% (0MB)
53 12:49:51.609429 progress 15% (1MB)
54 12:49:51.611352 progress 20% (1MB)
55 12:49:51.613274 progress 25% (1MB)
56 12:49:51.615025 progress 30% (2MB)
57 12:49:51.616956 progress 35% (2MB)
58 12:49:51.618869 progress 40% (2MB)
59 12:49:51.620668 progress 45% (3MB)
60 12:49:51.622578 progress 50% (3MB)
61 12:49:51.624504 progress 55% (4MB)
62 12:49:51.626268 progress 60% (4MB)
63 12:49:51.628151 progress 65% (4MB)
64 12:49:51.630030 progress 70% (5MB)
65 12:49:51.631812 progress 75% (5MB)
66 12:49:51.633704 progress 80% (5MB)
67 12:49:51.635583 progress 85% (6MB)
68 12:49:51.637330 progress 90% (6MB)
69 12:49:51.639210 progress 95% (6MB)
70 12:49:51.641116 progress 100% (7MB)
71 12:49:51.641251 7MB downloaded in 0.04s (190.19MB/s)
72 12:49:51.641412 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:49:51.641647 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:49:51.641736 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:49:51.641828 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:49:51.641940 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:49:51.642008 saving as /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/modules/modules.tar
79 12:49:51.642070 total size: 250760 (0MB)
80 12:49:51.642130 Using unxz to decompress xz
81 12:49:51.645374 progress 13% (0MB)
82 12:49:51.645738 progress 26% (0MB)
83 12:49:51.645975 progress 39% (0MB)
84 12:49:51.647274 progress 52% (0MB)
85 12:49:51.649200 progress 65% (0MB)
86 12:49:51.651064 progress 78% (0MB)
87 12:49:51.652903 progress 91% (0MB)
88 12:49:51.654691 progress 100% (0MB)
89 12:49:51.660176 0MB downloaded in 0.02s (13.21MB/s)
90 12:49:51.660436 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:49:51.660710 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:49:51.660811 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:49:51.660907 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:49:51.660996 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:49:51.661085 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:49:51.661265 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d
98 12:49:51.661374 makedir: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin
99 12:49:51.661460 makedir: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/tests
100 12:49:51.661541 makedir: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/results
101 12:49:51.661647 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-add-keys
102 12:49:51.661780 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-add-sources
103 12:49:51.661898 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-background-process-start
104 12:49:51.662022 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-background-process-stop
105 12:49:51.662173 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-common-functions
106 12:49:51.662291 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-echo-ipv4
107 12:49:51.662438 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-install-packages
108 12:49:51.662578 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-installed-packages
109 12:49:51.662691 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-os-build
110 12:49:51.662805 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-probe-channel
111 12:49:51.662919 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-probe-ip
112 12:49:51.663035 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-target-ip
113 12:49:51.663147 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-target-mac
114 12:49:51.663257 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-target-storage
115 12:49:51.663372 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-case
116 12:49:51.663488 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-event
117 12:49:51.663637 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-feedback
118 12:49:51.663794 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-raise
119 12:49:51.663912 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-reference
120 12:49:51.664025 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-runner
121 12:49:51.664136 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-set
122 12:49:51.664248 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-test-shell
123 12:49:51.664361 Updating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-install-packages (oe)
124 12:49:51.664500 Updating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/bin/lava-installed-packages (oe)
125 12:49:51.664619 Creating /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/environment
126 12:49:51.664708 environment:
127 12:49:51.664786 - battery_disconnected=1
128 12:49:51.664856 LAVA metadata
129 12:49:51.664918 - LAVA_JOB_ID=9584861
130 12:49:51.664980 - LAVA_DISPATCHER_IP=192.168.201.1
131 12:49:51.665083 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
132 12:49:51.665150 skipped lava-vland-overlay
133 12:49:51.665227 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
134 12:49:51.665313 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
135 12:49:51.665380 skipped lava-multinode-overlay
136 12:49:51.665455 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
137 12:49:51.665539 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
138 12:49:51.665614 Loading test definitions
139 12:49:51.665711 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
140 12:49:51.665787 Using /lava-9584861 at stage 0
141 12:49:51.666052 uuid=9584861_1.4.2.3.1 testdef=None
142 12:49:51.666142 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
143 12:49:51.666236 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
144 12:49:51.666728 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
146 12:49:51.666964 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
147 12:49:51.667542 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
149 12:49:51.667823 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
150 12:49:51.668365 runner path: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/0/tests/0_dmesg test_uuid 9584861_1.4.2.3.1
151 12:49:51.668515 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
153 12:49:51.668750 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
154 12:49:51.668823 Using /lava-9584861 at stage 1
155 12:49:51.669063 uuid=9584861_1.4.2.3.5 testdef=None
156 12:49:51.669154 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
157 12:49:51.669244 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
158 12:49:51.669750 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
160 12:49:51.669977 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
161 12:49:51.670540 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
163 12:49:51.670776 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
164 12:49:51.671317 runner path: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/1/tests/1_bootrr test_uuid 9584861_1.4.2.3.5
165 12:49:51.671459 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
167 12:49:51.671677 Creating lava-test-runner.conf files
168 12:49:51.671780 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/0 for stage 0
169 12:49:51.671863 - 0_dmesg
170 12:49:51.671939 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584861/lava-overlay-ssqsgt4d/lava-9584861/1 for stage 1
171 12:49:51.672022 - 1_bootrr
172 12:49:51.672113 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
173 12:49:51.672206 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
174 12:49:51.678577 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
175 12:49:51.678689 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
176 12:49:51.678779 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
177 12:49:51.678867 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
178 12:49:51.678953 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
179 12:49:51.864285 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
180 12:49:51.864641 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
181 12:49:51.864755 extracting modules file /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584861/extract-overlay-ramdisk-a6tbu4_8/ramdisk
182 12:49:51.872365 end: 1.4.4 extract-modules (duration 00:00:00) [common]
183 12:49:51.872483 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
184 12:49:51.872574 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584861/compress-overlay-49angosy/overlay-1.4.2.4.tar.gz to ramdisk
185 12:49:51.872647 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584861/compress-overlay-49angosy/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584861/extract-overlay-ramdisk-a6tbu4_8/ramdisk
186 12:49:51.876677 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
187 12:49:51.876788 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
188 12:49:51.876884 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
189 12:49:51.876977 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
190 12:49:51.877060 Building ramdisk /var/lib/lava/dispatcher/tmp/9584861/extract-overlay-ramdisk-a6tbu4_8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584861/extract-overlay-ramdisk-a6tbu4_8/ramdisk
191 12:49:51.943601 >> 49731 blocks
192 12:49:52.739656 rename /var/lib/lava/dispatcher/tmp/9584861/extract-overlay-ramdisk-a6tbu4_8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/ramdisk/ramdisk.cpio.gz
193 12:49:52.740123 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
194 12:49:52.740249 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
195 12:49:52.740355 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
196 12:49:52.740449 No mkimage arch provided, not using FIT.
197 12:49:52.740540 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
198 12:49:52.740791 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
199 12:49:52.740890 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
200 12:49:52.740986 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
201 12:49:52.741067 No LXC device requested
202 12:49:52.741150 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
203 12:49:52.741240 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
204 12:49:52.741322 end: 1.6 deploy-device-env (duration 00:00:00) [common]
205 12:49:52.741395 Checking files for TFTP limit of 4294967296 bytes.
206 12:49:52.741775 end: 1 tftp-deploy (duration 00:00:01) [common]
207 12:49:52.741881 start: 2 depthcharge-action (timeout 00:05:00) [common]
208 12:49:52.741977 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
209 12:49:52.742102 substitutions:
210 12:49:52.742175 - {DTB}: None
211 12:49:52.742246 - {INITRD}: 9584861/tftp-deploy-i6irc8uk/ramdisk/ramdisk.cpio.gz
212 12:49:52.742308 - {KERNEL}: 9584861/tftp-deploy-i6irc8uk/kernel/bzImage
213 12:49:52.742368 - {LAVA_MAC}: None
214 12:49:52.742426 - {PRESEED_CONFIG}: None
215 12:49:52.742483 - {PRESEED_LOCAL}: None
216 12:49:52.742539 - {RAMDISK}: 9584861/tftp-deploy-i6irc8uk/ramdisk/ramdisk.cpio.gz
217 12:49:52.742595 - {ROOT_PART}: None
218 12:49:52.742650 - {ROOT}: None
219 12:49:52.742704 - {SERVER_IP}: 192.168.201.1
220 12:49:52.742759 - {TEE}: None
221 12:49:52.742814 Parsed boot commands:
222 12:49:52.742868 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
223 12:49:52.743017 Parsed boot commands: tftpboot 192.168.201.1 9584861/tftp-deploy-i6irc8uk/kernel/bzImage 9584861/tftp-deploy-i6irc8uk/kernel/cmdline 9584861/tftp-deploy-i6irc8uk/ramdisk/ramdisk.cpio.gz
224 12:49:52.743108 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
225 12:49:52.743195 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
226 12:49:52.743290 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
227 12:49:52.743376 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
228 12:49:52.743444 Not connected, no need to disconnect.
229 12:49:52.743520 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
230 12:49:52.743600 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
231 12:49:52.743668 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-6'
232 12:49:52.746527 Setting prompt string to ['lava-test: # ']
233 12:49:52.746813 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
234 12:49:52.746918 end: 2.2.1 reset-connection (duration 00:00:00) [common]
235 12:49:52.747017 start: 2.2.2 reset-device (timeout 00:05:00) [common]
236 12:49:52.747110 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
237 12:49:52.747293 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-6' '--port=1' '--command=reboot'
238 12:49:57.886786 >> Command sent successfully.
239 12:49:57.895855 Returned 0 in 5 seconds
240 12:49:57.997489 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
242 12:49:57.998929 end: 2.2.2 reset-device (duration 00:00:05) [common]
243 12:49:57.999437 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
244 12:49:57.999929 Setting prompt string to 'Starting depthcharge on Magolor...'
245 12:49:58.000278 Changing prompt to 'Starting depthcharge on Magolor...'
246 12:49:58.000630 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
247 12:49:58.001855 [Enter `^Ec?' for help]
248 12:49:59.130209
249 12:49:59.130766
250 12:49:59.140339 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
251 12:49:59.143758 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
252 12:49:59.147188 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
253 12:49:59.153787 CPU: AES supported, TXT NOT supported, VT supported
254 12:49:59.157160 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
255 12:49:59.164008 PCH: device id 4d87 (rev 01) is Jasperlake Super
256 12:49:59.167293 IGD: device id 4e55 (rev 01) is Jasperlake GT4
257 12:49:59.170901 VBOOT: Loading verstage.
258 12:49:59.173938 FMAP: Found "FLASH" version 1.1 at 0xc04000.
259 12:49:59.180797 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
260 12:49:59.187297 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
261 12:49:59.190363 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
262 12:49:59.193763
263 12:49:59.194233
264 12:49:59.204995 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
265 12:49:59.218098 Probing TPM: . done!
266 12:49:59.221397 TPM ready after 0 ms
267 12:49:59.224761 Connected to device vid:did:rid of 1ae0:0028:00
268 12:49:59.235876 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
269 12:49:59.242962 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
270 12:49:59.246984 Initialized TPM device CR50 revision 0
271 12:49:59.372226 tlcl_send_startup: Startup return code is 0
272 12:49:59.372760 TPM: setup succeeded
273 12:49:59.386547 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
274 12:49:59.399768 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 12:49:59.412698 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
276 12:49:59.422225 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 12:49:59.425975 Chrome EC: UHEPI supported
278 12:49:59.429387 Phase 1
279 12:49:59.432872 FMAP: area GBB found @ c05000 (12288 bytes)
280 12:49:59.440868 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
281 12:49:59.448162 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
282 12:49:59.448749 Recovery requested (1009000e)
283 12:49:59.461195 TPM: Extending digest for VBOOT: boot mode into PCR 0
284 12:49:59.468216 tlcl_extend: response is 0
285 12:49:59.477935 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
286 12:49:59.484587 tlcl_extend: response is 0
287 12:49:59.488945 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 12:49:59.495864 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
289 12:49:59.504165 BS: verstage times (exec / console): total (unknown) / 124 ms
290 12:49:59.504618
291 12:49:59.504968
292 12:49:59.515018 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
293 12:49:59.518088 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
294 12:49:59.526025 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
295 12:49:59.529729 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
296 12:49:59.534009 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
297 12:49:59.536902 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
298 12:49:59.540220 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
299 12:49:59.543558 TCO_STS: 0000 0001
300 12:49:59.546657 GEN_PMCON: d0015038 00002200
301 12:49:59.549971 GBLRST_CAUSE: 00000000 00000000
302 12:49:59.553483 prev_sleep_state 5
303 12:49:59.556998 Boot Count incremented to 7359
304 12:49:59.560433 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 12:49:59.567156 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
306 12:49:59.570275 Chrome EC: UHEPI supported
307 12:49:59.576976 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
308 12:49:59.581994 Probing TPM: done!
309 12:49:59.588172 Connected to device vid:did:rid of 1ae0:0028:00
310 12:49:59.598528 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
311 12:49:59.606153 Initialized TPM device CR50 revision 0
312 12:49:59.616386 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 12:49:59.622891 MRC: Hash idx 0x100b comparison successful.
314 12:49:59.626085 MRC cache found, size 5458
315 12:49:59.626540 bootmode is set to: 2
316 12:49:59.629537 SPD INDEX = 0
317 12:49:59.632807 CBFS: Found 'spd.bin' @0x40c40 size 0x600
318 12:49:59.636212 SPD: module type is LPDDR4X
319 12:49:59.642602 SPD: module part number is MT53E512M32D2NP-046 WT:E
320 12:49:59.649628 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
321 12:49:59.652543 SPD: device width 16 bits, bus width 32 bits
322 12:49:59.656299 SPD: module size is 4096 MB (per channel)
323 12:49:59.659119 meminit_channels: DRAM half-populated
324 12:49:59.742468 CBMEM:
325 12:49:59.745494 IMD: root @ 0x76fff000 254 entries.
326 12:49:59.748837 IMD: root @ 0x76ffec00 62 entries.
327 12:49:59.752157 FMAP: area RO_VPD found @ c00000 (16384 bytes)
328 12:49:59.758944 WARNING: RO_VPD is uninitialized or empty.
329 12:49:59.762171 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
330 12:49:59.765707 External stage cache:
331 12:49:59.769140 IMD: root @ 0x7b3ff000 254 entries.
332 12:49:59.772455 IMD: root @ 0x7b3fec00 62 entries.
333 12:49:59.782340 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
334 12:49:59.788790 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
335 12:49:59.795655 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
336 12:49:59.804074 MRC: 'RECOVERY_MRC_CACHE' does not need update.
337 12:49:59.810619 cse_lite: Skip switching to RW in the recovery path
338 12:49:59.811137 1 DIMMs found
339 12:49:59.811780 SMM Memory Map
340 12:49:59.813876 SMRAM : 0x7b000000 0x800000
341 12:49:59.820389 Subregion 0: 0x7b000000 0x200000
342 12:49:59.823494 Subregion 1: 0x7b200000 0x200000
343 12:49:59.826968 Subregion 2: 0x7b400000 0x400000
344 12:49:59.827421 top_of_ram = 0x77000000
345 12:49:59.834006 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
346 12:49:59.840676 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
347 12:49:59.843958 MTRR Range: Start=ff000000 End=0 (Size 1000000)
348 12:49:59.850453 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
349 12:49:59.853956 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
350 12:49:59.866262 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
351 12:49:59.872529 Processing 188 relocs. Offset value of 0x74c0e000
352 12:49:59.879429 BS: romstage times (exec / console): total (unknown) / 256 ms
353 12:49:59.884115
354 12:49:59.884628
355 12:49:59.893947 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
356 12:49:59.900354 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
357 12:49:59.903617 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
358 12:49:59.910527 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
359 12:49:59.967410 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
360 12:49:59.970550 Processing 4805 relocs. Offset value of 0x75da8000
361 12:49:59.977936 BS: postcar times (exec / console): total (unknown) / 42 ms
362 12:49:59.978532
363 12:49:59.978938
364 12:49:59.991138 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
365 12:49:59.991782 Normal boot
366 12:49:59.994430 EC returned error result code 3
367 12:49:59.997685 FW_CONFIG value is 0x204
368 12:50:00.001048 GENERIC: 0.0 disabled by fw_config
369 12:50:00.007914 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
370 12:50:00.010879 I2C: 00:10 disabled by fw_config
371 12:50:00.014430 I2C: 00:10 disabled by fw_config
372 12:50:00.017362 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 12:50:00.024561 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:50:00.027899 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 12:50:00.034021 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
376 12:50:00.037427 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
377 12:50:00.040736 I2C: 00:10 disabled by fw_config
378 12:50:00.047225 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
379 12:50:00.053918 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
380 12:50:00.056959 I2C: 00:1a disabled by fw_config
381 12:50:00.060529 I2C: 00:1a disabled by fw_config
382 12:50:00.066841 fw_config match found: AUDIO_AMP=UNPROVISIONED
383 12:50:00.070199 fw_config match found: AUDIO_AMP=UNPROVISIONED
384 12:50:00.073645 GENERIC: 0.0 disabled by fw_config
385 12:50:00.080821 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 12:50:00.083421 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
387 12:50:00.090176 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
388 12:50:00.093907 microcode: Update skipped, already up-to-date
389 12:50:00.100208 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
390 12:50:00.125465 Detected 2 core, 2 thread CPU.
391 12:50:00.128838 Setting up SMI for CPU
392 12:50:00.132306 IED base = 0x7b400000
393 12:50:00.135892 IED size = 0x00400000
394 12:50:00.136408 Will perform SMM setup.
395 12:50:00.142164 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
396 12:50:00.148595 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
397 12:50:00.151924 Processing 16 relocs. Offset value of 0x00030000
398 12:50:00.155961 Attempting to start 1 APs
399 12:50:00.159247 Waiting for 10ms after sending INIT.
400 12:50:00.175868 Waiting for 1st SIPI to complete...done.
401 12:50:00.176411 AP: slot 1 apic_id 2.
402 12:50:00.182604 Waiting for 2nd SIPI to complete...done.
403 12:50:00.188472 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
404 12:50:00.195850 Processing 13 relocs. Offset value of 0x00038000
405 12:50:00.196294 Unable to locate Global NVS
406 12:50:00.205509 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
407 12:50:00.208855 Installing permanent SMM handler to 0x7b000000
408 12:50:00.219506 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
409 12:50:00.222082 Processing 704 relocs. Offset value of 0x7b010000
410 12:50:00.228612 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
411 12:50:00.235574 Processing 13 relocs. Offset value of 0x7b008000
412 12:50:00.242038 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
413 12:50:00.245730 Unable to locate Global NVS
414 12:50:00.251863 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
415 12:50:00.255513 Clearing SMI status registers
416 12:50:00.256054 SMI_STS: PM1
417 12:50:00.258741 PM1_STS: PWRBTN
418 12:50:00.259197 TCO_STS: INTRD_DET
419 12:50:00.262004 GPE0 STD STS:
420 12:50:00.268874 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
421 12:50:00.272367 In relocation handler: CPU 0
422 12:50:00.275645 New SMBASE=0x7b000000 IEDBASE=0x7b400000
423 12:50:00.282367 Writing SMRR. base = 0x7b000006, mask=0xff800800
424 12:50:00.282937 Relocation complete.
425 12:50:00.289056 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
426 12:50:00.292296 In relocation handler: CPU 1
427 12:50:00.298892 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
428 12:50:00.302189 Writing SMRR. base = 0x7b000006, mask=0xff800800
429 12:50:00.305770 Relocation complete.
430 12:50:00.306374 Initializing CPU #0
431 12:50:00.308971 CPU: vendor Intel device 906c0
432 12:50:00.311766 CPU: family 06, model 9c, stepping 00
433 12:50:00.315439 Clearing out pending MCEs
434 12:50:00.318664 Setting up local APIC...
435 12:50:00.322368 apic_id: 0x00 done.
436 12:50:00.325490 Turbo is available but hidden
437 12:50:00.329033 Turbo is available and visible
438 12:50:00.331757 microcode: Update skipped, already up-to-date
439 12:50:00.335210 CPU #0 initialized
440 12:50:00.335658 Initializing CPU #1
441 12:50:00.338621 CPU: vendor Intel device 906c0
442 12:50:00.341946 CPU: family 06, model 9c, stepping 00
443 12:50:00.345329 Clearing out pending MCEs
444 12:50:00.348889 Setting up local APIC...
445 12:50:00.352084 apic_id: 0x02 done.
446 12:50:00.354988 microcode: Update skipped, already up-to-date
447 12:50:00.358472 CPU #1 initialized
448 12:50:00.361964 bsp_do_flight_plan done after 175 msecs.
449 12:50:00.364960 CPU: frequency set to 2800 MHz
450 12:50:00.365462 Enabling SMIs.
451 12:50:00.371796 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
452 12:50:00.382191 Probing TPM: done!
453 12:50:00.389015 Connected to device vid:did:rid of 1ae0:0028:00
454 12:50:00.398696 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
455 12:50:00.401697 Initialized TPM device CR50 revision 0
456 12:50:00.408442 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
457 12:50:00.411997 Found a VBT of 7680 bytes after decompression
458 12:50:00.421816 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
459 12:50:00.454069 Detected 2 core, 2 thread CPU.
460 12:50:00.457513 Detected 2 core, 2 thread CPU.
461 12:50:00.820613 Display FSP Version Info HOB
462 12:50:00.822037 Reference Code - CPU = 8.7.22.30
463 12:50:00.825426 uCode Version = 24.0.0.1f
464 12:50:00.829028 TXT ACM version = ff.ff.ff.ffff
465 12:50:00.832439 Reference Code - ME = 8.7.22.30
466 12:50:00.835313 MEBx version = 0.0.0.0
467 12:50:00.838947 ME Firmware Version = Consumer SKU
468 12:50:00.841887 Reference Code - PCH = 8.7.22.30
469 12:50:00.845508 PCH-CRID Status = Disabled
470 12:50:00.848820 PCH-CRID Original Value = ff.ff.ff.ffff
471 12:50:00.852230 PCH-CRID New Value = ff.ff.ff.ffff
472 12:50:00.855357 OPROM - RST - RAID = ff.ff.ff.ffff
473 12:50:00.858408 PCH Hsio Version = 4.0.0.0
474 12:50:00.861798 Reference Code - SA - System Agent = 8.7.22.30
475 12:50:00.865636 Reference Code - MRC = 0.0.4.68
476 12:50:00.868469 SA - PCIe Version = 8.7.22.30
477 12:50:00.872211 SA-CRID Status = Disabled
478 12:50:00.875724 SA-CRID Original Value = 0.0.0.0
479 12:50:00.879201 SA-CRID New Value = 0.0.0.0
480 12:50:00.882265 OPROM - VBIOS = ff.ff.ff.ffff
481 12:50:00.885673 IO Manageability Engine FW Version = ff.ff.ff.ffff
482 12:50:00.888476 PHY Build Version = ff.ff.ff.ffff
483 12:50:00.895637 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
484 12:50:00.898738 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
485 12:50:00.902104 ITSS IRQ Polarities Before:
486 12:50:00.905255 IPC0: 0xffffffff
487 12:50:00.905672 IPC1: 0xffffffff
488 12:50:00.908580 IPC2: 0xffffffff
489 12:50:00.909131 IPC3: 0xffffffff
490 12:50:00.912422 ITSS IRQ Polarities After:
491 12:50:00.915516 IPC0: 0xffffffff
492 12:50:00.916010 IPC1: 0xffffffff
493 12:50:00.918927 IPC2: 0xffffffff
494 12:50:00.919467 IPC3: 0xffffffff
495 12:50:00.931879 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
496 12:50:00.938499 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
497 12:50:00.941910 Enumerating buses...
498 12:50:00.944913 Show all devs... Before device enumeration.
499 12:50:00.948495 Root Device: enabled 1
500 12:50:00.948942 CPU_CLUSTER: 0: enabled 1
501 12:50:00.951870 DOMAIN: 0000: enabled 1
502 12:50:00.955333 PCI: 00:00.0: enabled 1
503 12:50:00.958745 PCI: 00:02.0: enabled 1
504 12:50:00.959251 PCI: 00:04.0: enabled 1
505 12:50:00.961951 PCI: 00:05.0: enabled 1
506 12:50:00.964927 PCI: 00:09.0: enabled 0
507 12:50:00.965372 PCI: 00:12.6: enabled 0
508 12:50:00.968502 PCI: 00:14.0: enabled 1
509 12:50:00.971666 PCI: 00:14.1: enabled 0
510 12:50:00.975075 PCI: 00:14.2: enabled 0
511 12:50:00.975574 PCI: 00:14.3: enabled 1
512 12:50:00.978605 PCI: 00:14.5: enabled 1
513 12:50:00.981628 PCI: 00:15.0: enabled 1
514 12:50:00.984997 PCI: 00:15.1: enabled 1
515 12:50:00.985468 PCI: 00:15.2: enabled 1
516 12:50:00.988183 PCI: 00:15.3: enabled 1
517 12:50:00.991670 PCI: 00:16.0: enabled 1
518 12:50:00.995239 PCI: 00:16.1: enabled 0
519 12:50:00.995685 PCI: 00:16.4: enabled 0
520 12:50:00.998160 PCI: 00:16.5: enabled 0
521 12:50:01.001357 PCI: 00:17.0: enabled 0
522 12:50:01.004747 PCI: 00:19.0: enabled 1
523 12:50:01.005212 PCI: 00:19.1: enabled 0
524 12:50:01.008273 PCI: 00:19.2: enabled 1
525 12:50:01.011392 PCI: 00:1a.0: enabled 1
526 12:50:01.011878 PCI: 00:1c.0: enabled 0
527 12:50:01.014965 PCI: 00:1c.1: enabled 0
528 12:50:01.018024 PCI: 00:1c.2: enabled 0
529 12:50:01.021263 PCI: 00:1c.3: enabled 0
530 12:50:01.021705 PCI: 00:1c.4: enabled 0
531 12:50:01.024617 PCI: 00:1c.5: enabled 0
532 12:50:01.028036 PCI: 00:1c.6: enabled 0
533 12:50:01.031196 PCI: 00:1c.7: enabled 1
534 12:50:01.031660 PCI: 00:1e.0: enabled 0
535 12:50:01.034540 PCI: 00:1e.1: enabled 0
536 12:50:01.038292 PCI: 00:1e.2: enabled 1
537 12:50:01.041439 PCI: 00:1e.3: enabled 0
538 12:50:01.041886 PCI: 00:1f.0: enabled 1
539 12:50:01.044614 PCI: 00:1f.1: enabled 1
540 12:50:01.048308 PCI: 00:1f.2: enabled 1
541 12:50:01.048852 PCI: 00:1f.3: enabled 1
542 12:50:01.051367 PCI: 00:1f.4: enabled 0
543 12:50:01.054813 PCI: 00:1f.5: enabled 1
544 12:50:01.058286 PCI: 00:1f.7: enabled 0
545 12:50:01.058830 GENERIC: 0.0: enabled 1
546 12:50:01.061369 GENERIC: 0.0: enabled 1
547 12:50:01.064932 USB0 port 0: enabled 1
548 12:50:01.068313 GENERIC: 0.0: enabled 1
549 12:50:01.068859 I2C: 00:2c: enabled 1
550 12:50:01.071160 I2C: 00:15: enabled 1
551 12:50:01.075138 GENERIC: 0.0: enabled 0
552 12:50:01.075678 I2C: 00:15: enabled 1
553 12:50:01.077632 I2C: 00:10: enabled 0
554 12:50:01.080926 I2C: 00:10: enabled 0
555 12:50:01.081372 I2C: 00:2c: enabled 1
556 12:50:01.084633 I2C: 00:40: enabled 1
557 12:50:01.087800 I2C: 00:10: enabled 1
558 12:50:01.088386 I2C: 00:39: enabled 1
559 12:50:01.091033 I2C: 00:36: enabled 1
560 12:50:01.094678 I2C: 00:10: enabled 0
561 12:50:01.094993 I2C: 00:0c: enabled 1
562 12:50:01.097159 I2C: 00:50: enabled 1
563 12:50:01.100500 I2C: 00:1a: enabled 1
564 12:50:01.100595 I2C: 00:1a: enabled 0
565 12:50:01.104275 I2C: 00:1a: enabled 0
566 12:50:01.107374 I2C: 00:28: enabled 1
567 12:50:01.110962 I2C: 00:29: enabled 1
568 12:50:01.111056 PCI: 00:00.0: enabled 1
569 12:50:01.113868 SPI: 00: enabled 1
570 12:50:01.117184 PNP: 0c09.0: enabled 1
571 12:50:01.117285 GENERIC: 0.0: enabled 0
572 12:50:01.120747 USB2 port 0: enabled 1
573 12:50:01.124136 USB2 port 1: enabled 1
574 12:50:01.124660 USB2 port 2: enabled 1
575 12:50:01.127636 USB2 port 3: enabled 1
576 12:50:01.130761 USB2 port 4: enabled 0
577 12:50:01.134025 USB2 port 5: enabled 1
578 12:50:01.134472 USB2 port 6: enabled 0
579 12:50:01.137612 USB2 port 7: enabled 1
580 12:50:01.141079 USB3 port 0: enabled 1
581 12:50:01.141614 USB3 port 1: enabled 1
582 12:50:01.143971 USB3 port 2: enabled 1
583 12:50:01.147113 USB3 port 3: enabled 1
584 12:50:01.147585 APIC: 00: enabled 1
585 12:50:01.151008 APIC: 02: enabled 1
586 12:50:01.154273 Compare with tree...
587 12:50:01.154725 Root Device: enabled 1
588 12:50:01.157649 CPU_CLUSTER: 0: enabled 1
589 12:50:01.160565 APIC: 00: enabled 1
590 12:50:01.164058 APIC: 02: enabled 1
591 12:50:01.164502 DOMAIN: 0000: enabled 1
592 12:50:01.167531 PCI: 00:00.0: enabled 1
593 12:50:01.170633 PCI: 00:02.0: enabled 1
594 12:50:01.174014 PCI: 00:04.0: enabled 1
595 12:50:01.174523 GENERIC: 0.0: enabled 1
596 12:50:01.177589 PCI: 00:05.0: enabled 1
597 12:50:01.180924 GENERIC: 0.0: enabled 1
598 12:50:01.183669 PCI: 00:09.0: enabled 0
599 12:50:01.187246 PCI: 00:12.6: enabled 0
600 12:50:01.187740 PCI: 00:14.0: enabled 1
601 12:50:01.190617 USB0 port 0: enabled 1
602 12:50:01.193633 USB2 port 0: enabled 1
603 12:50:01.197397 USB2 port 1: enabled 1
604 12:50:01.200431 USB2 port 2: enabled 1
605 12:50:01.203824 USB2 port 3: enabled 1
606 12:50:01.204268 USB2 port 4: enabled 0
607 12:50:01.207061 USB2 port 5: enabled 1
608 12:50:01.210519 USB2 port 6: enabled 0
609 12:50:01.213528 USB2 port 7: enabled 1
610 12:50:01.217151 USB3 port 0: enabled 1
611 12:50:01.220321 USB3 port 1: enabled 1
612 12:50:01.220771 USB3 port 2: enabled 1
613 12:50:01.223760 USB3 port 3: enabled 1
614 12:50:01.227373 PCI: 00:14.1: enabled 0
615 12:50:01.231524 PCI: 00:14.2: enabled 0
616 12:50:01.232051 PCI: 00:14.3: enabled 1
617 12:50:01.235347 GENERIC: 0.0: enabled 1
618 12:50:01.238994 PCI: 00:14.5: enabled 1
619 12:50:01.239439 PCI: 00:15.0: enabled 1
620 12:50:01.242103 I2C: 00:2c: enabled 1
621 12:50:01.245338 I2C: 00:15: enabled 1
622 12:50:01.248416 PCI: 00:15.1: enabled 1
623 12:50:01.251903 PCI: 00:15.2: enabled 1
624 12:50:01.252348 GENERIC: 0.0: enabled 0
625 12:50:01.254944 I2C: 00:15: enabled 1
626 12:50:01.258554 I2C: 00:10: enabled 0
627 12:50:01.261836 I2C: 00:10: enabled 0
628 12:50:01.262282 I2C: 00:2c: enabled 1
629 12:50:01.265264 I2C: 00:40: enabled 1
630 12:50:01.268765 I2C: 00:10: enabled 1
631 12:50:01.271629 I2C: 00:39: enabled 1
632 12:50:01.274860 PCI: 00:15.3: enabled 1
633 12:50:01.275303 I2C: 00:36: enabled 1
634 12:50:01.278514 I2C: 00:10: enabled 0
635 12:50:01.281685 I2C: 00:0c: enabled 1
636 12:50:01.285100 I2C: 00:50: enabled 1
637 12:50:01.285563 PCI: 00:16.0: enabled 1
638 12:50:01.287966 PCI: 00:16.1: enabled 0
639 12:50:01.291229 PCI: 00:16.4: enabled 0
640 12:50:01.294868 PCI: 00:16.5: enabled 0
641 12:50:01.298075 PCI: 00:17.0: enabled 0
642 12:50:01.298518 PCI: 00:19.0: enabled 1
643 12:50:01.301383 I2C: 00:1a: enabled 1
644 12:50:01.304978 I2C: 00:1a: enabled 0
645 12:50:01.308342 I2C: 00:1a: enabled 0
646 12:50:01.308787 I2C: 00:28: enabled 1
647 12:50:01.311414 I2C: 00:29: enabled 1
648 12:50:01.314941 PCI: 00:19.1: enabled 0
649 12:50:01.318179 PCI: 00:19.2: enabled 1
650 12:50:01.321405 PCI: 00:1a.0: enabled 1
651 12:50:01.321964 PCI: 00:1e.0: enabled 0
652 12:50:01.324482 PCI: 00:1e.1: enabled 0
653 12:50:01.328156 PCI: 00:1e.2: enabled 1
654 12:50:01.331622 SPI: 00: enabled 1
655 12:50:01.332100 PCI: 00:1e.3: enabled 0
656 12:50:01.334973 PCI: 00:1f.0: enabled 1
657 12:50:01.338184 PNP: 0c09.0: enabled 1
658 12:50:01.341114 PCI: 00:1f.1: enabled 1
659 12:50:01.344925 PCI: 00:1f.2: enabled 1
660 12:50:01.345380 PCI: 00:1f.3: enabled 1
661 12:50:01.347848 GENERIC: 0.0: enabled 0
662 12:50:01.350968 PCI: 00:1f.4: enabled 0
663 12:50:01.354526 PCI: 00:1f.5: enabled 1
664 12:50:01.357592 PCI: 00:1f.7: enabled 0
665 12:50:01.358043 Root Device scanning...
666 12:50:01.361593 scan_static_bus for Root Device
667 12:50:01.364316 CPU_CLUSTER: 0 enabled
668 12:50:01.367800 DOMAIN: 0000 enabled
669 12:50:01.370791 DOMAIN: 0000 scanning...
670 12:50:01.371245 PCI: pci_scan_bus for bus 00
671 12:50:01.374639 PCI: 00:00.0 [8086/0000] ops
672 12:50:01.377837 PCI: 00:00.0 [8086/4e22] enabled
673 12:50:01.380636 PCI: 00:02.0 [8086/0000] bus ops
674 12:50:01.384104 PCI: 00:02.0 [8086/4e55] enabled
675 12:50:01.387399 PCI: 00:04.0 [8086/0000] bus ops
676 12:50:01.390855 PCI: 00:04.0 [8086/4e03] enabled
677 12:50:01.394194 PCI: 00:05.0 [8086/0000] bus ops
678 12:50:01.397415 PCI: 00:05.0 [8086/4e19] enabled
679 12:50:01.400925 PCI: 00:08.0 [8086/4e11] enabled
680 12:50:01.404201 PCI: 00:14.0 [8086/0000] bus ops
681 12:50:01.407340 PCI: 00:14.0 [8086/4ded] enabled
682 12:50:01.410917 PCI: 00:14.2 [8086/4def] disabled
683 12:50:01.414382 PCI: 00:14.3 [8086/0000] bus ops
684 12:50:01.417214 PCI: 00:14.3 [8086/4df0] enabled
685 12:50:01.420948 PCI: 00:14.5 [8086/0000] ops
686 12:50:01.424210 PCI: 00:14.5 [8086/4df8] enabled
687 12:50:01.427797 PCI: 00:15.0 [8086/0000] bus ops
688 12:50:01.430965 PCI: 00:15.0 [8086/4de8] enabled
689 12:50:01.434011 PCI: 00:15.1 [8086/0000] bus ops
690 12:50:01.437603 PCI: 00:15.1 [8086/4de9] enabled
691 12:50:01.440683 PCI: 00:15.2 [8086/0000] bus ops
692 12:50:01.443951 PCI: 00:15.2 [8086/4dea] enabled
693 12:50:01.447551 PCI: 00:15.3 [8086/0000] bus ops
694 12:50:01.450449 PCI: 00:15.3 [8086/4deb] enabled
695 12:50:01.454431 PCI: 00:16.0 [8086/0000] ops
696 12:50:01.457511 PCI: 00:16.0 [8086/4de0] enabled
697 12:50:01.460785 PCI: 00:19.0 [8086/0000] bus ops
698 12:50:01.463852 PCI: 00:19.0 [8086/4dc5] enabled
699 12:50:01.467496 PCI: 00:19.2 [8086/0000] ops
700 12:50:01.470933 PCI: 00:19.2 [8086/4dc7] enabled
701 12:50:01.473583 PCI: 00:1a.0 [8086/0000] ops
702 12:50:01.477243 PCI: 00:1a.0 [8086/4dc4] enabled
703 12:50:01.480835 PCI: 00:1e.0 [8086/0000] ops
704 12:50:01.484018 PCI: 00:1e.0 [8086/4da8] disabled
705 12:50:01.487329 PCI: 00:1e.2 [8086/0000] bus ops
706 12:50:01.490504 PCI: 00:1e.2 [8086/4daa] enabled
707 12:50:01.493848 PCI: 00:1f.0 [8086/0000] bus ops
708 12:50:01.497290 PCI: 00:1f.0 [8086/4d87] enabled
709 12:50:01.503611 PCI: Static device PCI: 00:1f.1 not found, disabling it.
710 12:50:01.504110 RTC Init
711 12:50:01.506970 Set power on after power failure.
712 12:50:01.510377 Disabling Deep S3
713 12:50:01.510829 Disabling Deep S3
714 12:50:01.514154 Disabling Deep S4
715 12:50:01.514721 Disabling Deep S4
716 12:50:01.516862 Disabling Deep S5
717 12:50:01.517313 Disabling Deep S5
718 12:50:01.520214 PCI: 00:1f.2 [0000/0000] hidden
719 12:50:01.523687 PCI: 00:1f.3 [8086/0000] bus ops
720 12:50:01.527335 PCI: 00:1f.3 [8086/4dc8] enabled
721 12:50:01.530734 PCI: 00:1f.5 [8086/0000] bus ops
722 12:50:01.533825 PCI: 00:1f.5 [8086/4da4] enabled
723 12:50:01.537447 PCI: Leftover static devices:
724 12:50:01.540817 PCI: 00:12.6
725 12:50:01.541446 PCI: 00:09.0
726 12:50:01.541815 PCI: 00:14.1
727 12:50:01.544018 PCI: 00:16.1
728 12:50:01.544507 PCI: 00:16.4
729 12:50:01.547176 PCI: 00:16.5
730 12:50:01.547661 PCI: 00:17.0
731 12:50:01.550393 PCI: 00:19.1
732 12:50:01.550857 PCI: 00:1e.1
733 12:50:01.551228 PCI: 00:1e.3
734 12:50:01.553775 PCI: 00:1f.1
735 12:50:01.554240 PCI: 00:1f.4
736 12:50:01.556837 PCI: 00:1f.7
737 12:50:01.560211 PCI: Check your devicetree.cb.
738 12:50:01.560660 PCI: 00:02.0 scanning...
739 12:50:01.563989 scan_generic_bus for PCI: 00:02.0
740 12:50:01.570238 scan_generic_bus for PCI: 00:02.0 done
741 12:50:01.573731 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
742 12:50:01.576906 PCI: 00:04.0 scanning...
743 12:50:01.580225 scan_generic_bus for PCI: 00:04.0
744 12:50:01.580678 GENERIC: 0.0 enabled
745 12:50:01.586784 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
746 12:50:01.593934 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
747 12:50:01.594492 PCI: 00:05.0 scanning...
748 12:50:01.600674 scan_generic_bus for PCI: 00:05.0
749 12:50:01.601263 GENERIC: 0.0 enabled
750 12:50:01.607178 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
751 12:50:01.610289 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
752 12:50:01.613475 PCI: 00:14.0 scanning...
753 12:50:01.616522 scan_static_bus for PCI: 00:14.0
754 12:50:01.620130 USB0 port 0 enabled
755 12:50:01.623531 USB0 port 0 scanning...
756 12:50:01.626957 scan_static_bus for USB0 port 0
757 12:50:01.627406 USB2 port 0 enabled
758 12:50:01.629996 USB2 port 1 enabled
759 12:50:01.630445 USB2 port 2 enabled
760 12:50:01.633289 USB2 port 3 enabled
761 12:50:01.636754 USB2 port 4 disabled
762 12:50:01.637203 USB2 port 5 enabled
763 12:50:01.639648 USB2 port 6 disabled
764 12:50:01.643174 USB2 port 7 enabled
765 12:50:01.643660 USB3 port 0 enabled
766 12:50:01.646406 USB3 port 1 enabled
767 12:50:01.646853 USB3 port 2 enabled
768 12:50:01.649805 USB3 port 3 enabled
769 12:50:01.653096 USB2 port 0 scanning...
770 12:50:01.656392 scan_static_bus for USB2 port 0
771 12:50:01.659812 scan_static_bus for USB2 port 0 done
772 12:50:01.663251 scan_bus: bus USB2 port 0 finished in 6 msecs
773 12:50:01.666611 USB2 port 1 scanning...
774 12:50:01.670167 scan_static_bus for USB2 port 1
775 12:50:01.673554 scan_static_bus for USB2 port 1 done
776 12:50:01.679768 scan_bus: bus USB2 port 1 finished in 6 msecs
777 12:50:01.680227 USB2 port 2 scanning...
778 12:50:01.682965 scan_static_bus for USB2 port 2
779 12:50:01.686149 scan_static_bus for USB2 port 2 done
780 12:50:01.692921 scan_bus: bus USB2 port 2 finished in 6 msecs
781 12:50:01.696217 USB2 port 3 scanning...
782 12:50:01.699431 scan_static_bus for USB2 port 3
783 12:50:01.703050 scan_static_bus for USB2 port 3 done
784 12:50:01.706142 scan_bus: bus USB2 port 3 finished in 6 msecs
785 12:50:01.709624 USB2 port 5 scanning...
786 12:50:01.713112 scan_static_bus for USB2 port 5
787 12:50:01.716359 scan_static_bus for USB2 port 5 done
788 12:50:01.719211 scan_bus: bus USB2 port 5 finished in 6 msecs
789 12:50:01.722851 USB2 port 7 scanning...
790 12:50:01.725824 scan_static_bus for USB2 port 7
791 12:50:01.729381 scan_static_bus for USB2 port 7 done
792 12:50:01.736371 scan_bus: bus USB2 port 7 finished in 6 msecs
793 12:50:01.736821 USB3 port 0 scanning...
794 12:50:01.739185 scan_static_bus for USB3 port 0
795 12:50:01.746215 scan_static_bus for USB3 port 0 done
796 12:50:01.749228 scan_bus: bus USB3 port 0 finished in 6 msecs
797 12:50:01.752472 USB3 port 1 scanning...
798 12:50:01.756094 scan_static_bus for USB3 port 1
799 12:50:01.758995 scan_static_bus for USB3 port 1 done
800 12:50:01.762535 scan_bus: bus USB3 port 1 finished in 6 msecs
801 12:50:01.765952 USB3 port 2 scanning...
802 12:50:01.769389 scan_static_bus for USB3 port 2
803 12:50:01.772699 scan_static_bus for USB3 port 2 done
804 12:50:01.776362 scan_bus: bus USB3 port 2 finished in 6 msecs
805 12:50:01.779390 USB3 port 3 scanning...
806 12:50:01.782847 scan_static_bus for USB3 port 3
807 12:50:01.785812 scan_static_bus for USB3 port 3 done
808 12:50:01.792413 scan_bus: bus USB3 port 3 finished in 6 msecs
809 12:50:01.795817 scan_static_bus for USB0 port 0 done
810 12:50:01.799095 scan_bus: bus USB0 port 0 finished in 172 msecs
811 12:50:01.802287 scan_static_bus for PCI: 00:14.0 done
812 12:50:01.809480 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
813 12:50:01.809934 PCI: 00:14.3 scanning...
814 12:50:01.813415 scan_static_bus for PCI: 00:14.3
815 12:50:01.816755 GENERIC: 0.0 enabled
816 12:50:01.820740 scan_static_bus for PCI: 00:14.3 done
817 12:50:01.823560 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
818 12:50:01.828047 PCI: 00:15.0 scanning...
819 12:50:01.831585 scan_static_bus for PCI: 00:15.0
820 12:50:01.834357 I2C: 00:2c enabled
821 12:50:01.834806 I2C: 00:15 enabled
822 12:50:01.837846 scan_static_bus for PCI: 00:15.0 done
823 12:50:01.844880 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
824 12:50:01.847539 PCI: 00:15.1 scanning...
825 12:50:01.851083 scan_static_bus for PCI: 00:15.1
826 12:50:01.854712 scan_static_bus for PCI: 00:15.1 done
827 12:50:01.857374 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
828 12:50:01.860732 PCI: 00:15.2 scanning...
829 12:50:01.863645 scan_static_bus for PCI: 00:15.2
830 12:50:01.867311 GENERIC: 0.0 disabled
831 12:50:01.867398 I2C: 00:15 enabled
832 12:50:01.870650 I2C: 00:10 disabled
833 12:50:01.870736 I2C: 00:10 disabled
834 12:50:01.874226 I2C: 00:2c enabled
835 12:50:01.877207 I2C: 00:40 enabled
836 12:50:01.877294 I2C: 00:10 enabled
837 12:50:01.880729 I2C: 00:39 enabled
838 12:50:01.883890 scan_static_bus for PCI: 00:15.2 done
839 12:50:01.887202 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
840 12:50:01.890839 PCI: 00:15.3 scanning...
841 12:50:01.893690 scan_static_bus for PCI: 00:15.3
842 12:50:01.897183 I2C: 00:36 enabled
843 12:50:01.897366 I2C: 00:10 disabled
844 12:50:01.900230 I2C: 00:0c enabled
845 12:50:01.903848 I2C: 00:50 enabled
846 12:50:01.907254 scan_static_bus for PCI: 00:15.3 done
847 12:50:01.910002 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
848 12:50:01.913886 PCI: 00:19.0 scanning...
849 12:50:01.917219 scan_static_bus for PCI: 00:19.0
850 12:50:01.920493 I2C: 00:1a enabled
851 12:50:01.920676 I2C: 00:1a disabled
852 12:50:01.923516 I2C: 00:1a disabled
853 12:50:01.923751 I2C: 00:28 enabled
854 12:50:01.927317 I2C: 00:29 enabled
855 12:50:01.930591 scan_static_bus for PCI: 00:19.0 done
856 12:50:01.937464 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
857 12:50:01.937983 PCI: 00:1e.2 scanning...
858 12:50:01.940978 scan_generic_bus for PCI: 00:1e.2
859 12:50:01.944113 SPI: 00 enabled
860 12:50:01.950298 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
861 12:50:01.954255 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
862 12:50:01.957447 PCI: 00:1f.0 scanning...
863 12:50:01.960784 scan_static_bus for PCI: 00:1f.0
864 12:50:01.963899 PNP: 0c09.0 enabled
865 12:50:01.964445 PNP: 0c09.0 scanning...
866 12:50:01.967110 scan_static_bus for PNP: 0c09.0
867 12:50:01.974056 scan_static_bus for PNP: 0c09.0 done
868 12:50:01.977578 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
869 12:50:01.980185 scan_static_bus for PCI: 00:1f.0 done
870 12:50:01.986901 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
871 12:50:01.987531 PCI: 00:1f.3 scanning...
872 12:50:01.990288 scan_static_bus for PCI: 00:1f.3
873 12:50:01.993769 GENERIC: 0.0 disabled
874 12:50:01.996658 scan_static_bus for PCI: 00:1f.3 done
875 12:50:02.003385 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
876 12:50:02.003916 PCI: 00:1f.5 scanning...
877 12:50:02.007012 scan_generic_bus for PCI: 00:1f.5
878 12:50:02.013613 scan_generic_bus for PCI: 00:1f.5 done
879 12:50:02.016702 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
880 12:50:02.020310 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
881 12:50:02.026685 scan_static_bus for Root Device done
882 12:50:02.030427 scan_bus: bus Root Device finished in 666 msecs
883 12:50:02.030872 done
884 12:50:02.036475 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1087 ms
885 12:50:02.040178 Chrome EC: UHEPI supported
886 12:50:02.046513 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
887 12:50:02.053422 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
888 12:50:02.056350 SPI flash protection: WPSW=0 SRP0=1
889 12:50:02.059774 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
890 12:50:02.066825 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
891 12:50:02.069616 found VGA at PCI: 00:02.0
892 12:50:02.073351 Setting up VGA for PCI: 00:02.0
893 12:50:02.076351 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
894 12:50:02.082878 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
895 12:50:02.086340 Allocating resources...
896 12:50:02.086783 Reading resources...
897 12:50:02.141870 Root Device read_resources bus 0 link: 0
898 12:50:02.142467 CPU_CLUSTER: 0 read_resources bus 0 link: 0
899 12:50:02.142837 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
900 12:50:02.143172 DOMAIN: 0000 read_resources bus 0 link: 0
901 12:50:02.143907 PCI: 00:04.0 read_resources bus 1 link: 0
902 12:50:02.144284 PCI: 00:04.0 read_resources bus 1 link: 0 done
903 12:50:02.144644 PCI: 00:05.0 read_resources bus 2 link: 0
904 12:50:02.144961 PCI: 00:05.0 read_resources bus 2 link: 0 done
905 12:50:02.145269 PCI: 00:14.0 read_resources bus 0 link: 0
906 12:50:02.145570 USB0 port 0 read_resources bus 0 link: 0
907 12:50:02.145869 USB0 port 0 read_resources bus 0 link: 0 done
908 12:50:02.197671 PCI: 00:14.0 read_resources bus 0 link: 0 done
909 12:50:02.198276 PCI: 00:14.3 read_resources bus 0 link: 0
910 12:50:02.198672 PCI: 00:14.3 read_resources bus 0 link: 0 done
911 12:50:02.199432 PCI: 00:15.0 read_resources bus 0 link: 0
912 12:50:02.199861 PCI: 00:15.0 read_resources bus 0 link: 0 done
913 12:50:02.200222 PCI: 00:15.2 read_resources bus 0 link: 0
914 12:50:02.200568 PCI: 00:15.2 read_resources bus 0 link: 0 done
915 12:50:02.200904 PCI: 00:15.3 read_resources bus 0 link: 0
916 12:50:02.201232 PCI: 00:15.3 read_resources bus 0 link: 0 done
917 12:50:02.201559 PCI: 00:19.0 read_resources bus 0 link: 0
918 12:50:02.201894 PCI: 00:19.0 read_resources bus 0 link: 0 done
919 12:50:02.244235 PCI: 00:1e.2 read_resources bus 3 link: 0
920 12:50:02.244896 PCI: 00:1e.2 read_resources bus 3 link: 0 done
921 12:50:02.245295 PCI: 00:1f.0 read_resources bus 0 link: 0
922 12:50:02.246022 PCI: 00:1f.0 read_resources bus 0 link: 0 done
923 12:50:02.246411 PCI: 00:1f.3 read_resources bus 0 link: 0
924 12:50:02.246801 PCI: 00:1f.3 read_resources bus 0 link: 0 done
925 12:50:02.247175 DOMAIN: 0000 read_resources bus 0 link: 0 done
926 12:50:02.247865 Root Device read_resources bus 0 link: 0 done
927 12:50:02.248237 Done reading resources.
928 12:50:02.248579 Show resources in subtree (Root Device)...After reading.
929 12:50:02.249420 Root Device child on link 0 CPU_CLUSTER: 0
930 12:50:02.249910 CPU_CLUSTER: 0 child on link 0 APIC: 00
931 12:50:02.252307 APIC: 00
932 12:50:02.252752 APIC: 02
933 12:50:02.256249 DOMAIN: 0000 child on link 0 PCI: 00:00.0
934 12:50:02.265977 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
935 12:50:02.275904 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
936 12:50:02.279429 PCI: 00:00.0
937 12:50:02.289124 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
938 12:50:02.295522 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
939 12:50:02.305604 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
940 12:50:02.315178 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
941 12:50:02.325547 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
942 12:50:02.335531 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
943 12:50:02.345160 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
944 12:50:02.352119 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
945 12:50:02.361847 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
946 12:50:02.371762 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
947 12:50:02.381823 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
948 12:50:02.391336 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
949 12:50:02.398351 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
950 12:50:02.408063 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
951 12:50:02.417958 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
952 12:50:02.427965 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
953 12:50:02.437758 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
954 12:50:02.448163 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
955 12:50:02.454298 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
956 12:50:02.458083 PCI: 00:02.0
957 12:50:02.467999 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
958 12:50:02.477655 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
959 12:50:02.487803 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
960 12:50:02.491142 PCI: 00:04.0 child on link 0 GENERIC: 0.0
961 12:50:02.501970 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
962 12:50:02.502419 GENERIC: 0.0
963 12:50:02.508930 PCI: 00:05.0 child on link 0 GENERIC: 0.0
964 12:50:02.518865 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
965 12:50:02.519315 GENERIC: 0.0
966 12:50:02.522219 PCI: 00:08.0
967 12:50:02.531859 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
968 12:50:02.535299 PCI: 00:14.0 child on link 0 USB0 port 0
969 12:50:02.545317 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
970 12:50:02.548718 USB0 port 0 child on link 0 USB2 port 0
971 12:50:02.552004 USB2 port 0
972 12:50:02.552458 USB2 port 1
973 12:50:02.555247 USB2 port 2
974 12:50:02.555730 USB2 port 3
975 12:50:02.558248 USB2 port 4
976 12:50:02.562175 USB2 port 5
977 12:50:02.562721 USB2 port 6
978 12:50:02.565058 USB2 port 7
979 12:50:02.565508 USB3 port 0
980 12:50:02.568899 USB3 port 1
981 12:50:02.569350 USB3 port 2
982 12:50:02.572161 USB3 port 3
983 12:50:02.572610 PCI: 00:14.2
984 12:50:02.578232 PCI: 00:14.3 child on link 0 GENERIC: 0.0
985 12:50:02.588466 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
986 12:50:02.589083 GENERIC: 0.0
987 12:50:02.591649 PCI: 00:14.5
988 12:50:02.601701 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 12:50:02.605227 PCI: 00:15.0 child on link 0 I2C: 00:2c
990 12:50:02.614796 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
991 12:50:02.615273 I2C: 00:2c
992 12:50:02.618499 I2C: 00:15
993 12:50:02.618951 PCI: 00:15.1
994 12:50:02.628289 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:50:02.634483 PCI: 00:15.2 child on link 0 GENERIC: 0.0
996 12:50:02.645019 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
997 12:50:02.645477 GENERIC: 0.0
998 12:50:02.647879 I2C: 00:15
999 12:50:02.648335 I2C: 00:10
1000 12:50:02.651143 I2C: 00:10
1001 12:50:02.651650 I2C: 00:2c
1002 12:50:02.655055 I2C: 00:40
1003 12:50:02.655613 I2C: 00:10
1004 12:50:02.658158 I2C: 00:39
1005 12:50:02.661528 PCI: 00:15.3 child on link 0 I2C: 00:36
1006 12:50:02.671289 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 12:50:02.671899 I2C: 00:36
1008 12:50:02.674948 I2C: 00:10
1009 12:50:02.675506 I2C: 00:0c
1010 12:50:02.677920 I2C: 00:50
1011 12:50:02.678372 PCI: 00:16.0
1012 12:50:02.687626 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:50:02.691119 PCI: 00:19.0 child on link 0 I2C: 00:1a
1014 12:50:02.701285 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 12:50:02.704274 I2C: 00:1a
1016 12:50:02.704729 I2C: 00:1a
1017 12:50:02.707561 I2C: 00:1a
1018 12:50:02.708060 I2C: 00:28
1019 12:50:02.710960 I2C: 00:29
1020 12:50:02.711407 PCI: 00:19.2
1021 12:50:02.724421 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1022 12:50:02.734796 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1023 12:50:02.735355 PCI: 00:1a.0
1024 12:50:02.744381 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 12:50:02.747365 PCI: 00:1e.0
1026 12:50:02.750848 PCI: 00:1e.2 child on link 0 SPI: 00
1027 12:50:02.760889 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1028 12:50:02.761364 SPI: 00
1029 12:50:02.767492 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1030 12:50:02.774561 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1031 12:50:02.777300 PNP: 0c09.0
1032 12:50:02.784019 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1033 12:50:02.787131 PCI: 00:1f.2
1034 12:50:02.797389 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1035 12:50:02.803841 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1036 12:50:02.810247 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1037 12:50:02.820383 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1038 12:50:02.830157 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1039 12:50:02.830732 GENERIC: 0.0
1040 12:50:02.833452 PCI: 00:1f.5
1041 12:50:02.843351 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1042 12:50:02.850331 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1043 12:50:02.856846 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1044 12:50:02.863227 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1045 12:50:02.869873 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1046 12:50:02.879956 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1047 12:50:02.886841 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1048 12:50:02.889783 DOMAIN: 0000: Resource ranges:
1049 12:50:02.893413 * Base: 1000, Size: 800, Tag: 100
1050 12:50:02.896566 * Base: 1900, Size: e700, Tag: 100
1051 12:50:02.903535 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1052 12:50:02.909935 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1053 12:50:02.916946 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1054 12:50:02.923110 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1055 12:50:02.930361 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1056 12:50:02.939966 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1057 12:50:02.946364 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1058 12:50:02.953017 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1059 12:50:02.963260 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1060 12:50:02.969558 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1061 12:50:02.976179 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1062 12:50:02.985795 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1063 12:50:02.992784 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1064 12:50:02.999102 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1065 12:50:03.006288 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1066 12:50:03.016342 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1067 12:50:03.022656 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1068 12:50:03.029581 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1069 12:50:03.039130 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1070 12:50:03.045631 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1071 12:50:03.052905 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1072 12:50:03.062530 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1073 12:50:03.069072 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1074 12:50:03.076668 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1075 12:50:03.080055 DOMAIN: 0000: Resource ranges:
1076 12:50:03.083542 * Base: 7fc00000, Size: 40400000, Tag: 200
1077 12:50:03.089728 * Base: d0000000, Size: 2b000000, Tag: 200
1078 12:50:03.093227 * Base: fb001000, Size: 2fff000, Tag: 200
1079 12:50:03.096336 * Base: fe010000, Size: 22000, Tag: 200
1080 12:50:03.102957 * Base: fe033000, Size: a4d000, Tag: 200
1081 12:50:03.106276 * Base: fea88000, Size: 2f8000, Tag: 200
1082 12:50:03.109625 * Base: fed88000, Size: 8000, Tag: 200
1083 12:50:03.112668 * Base: fed93000, Size: d000, Tag: 200
1084 12:50:03.116508 * Base: feda2000, Size: 125e000, Tag: 200
1085 12:50:03.122720 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1086 12:50:03.129765 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1087 12:50:03.136301 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1088 12:50:03.142734 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1089 12:50:03.149736 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1090 12:50:03.156350 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1091 12:50:03.162915 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1092 12:50:03.169783 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1093 12:50:03.176506 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1094 12:50:03.182969 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1095 12:50:03.189508 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1096 12:50:03.196340 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1097 12:50:03.203103 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1098 12:50:03.209336 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1099 12:50:03.216028 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1100 12:50:03.222471 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1101 12:50:03.228916 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1102 12:50:03.235878 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1103 12:50:03.242313 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1104 12:50:03.249294 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1105 12:50:03.255616 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1106 12:50:03.262401 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1107 12:50:03.268746 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1108 12:50:03.275739 Root Device assign_resources, bus 0 link: 0
1109 12:50:03.278507 DOMAIN: 0000 assign_resources, bus 0 link: 0
1110 12:50:03.289109 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1111 12:50:03.295512 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1112 12:50:03.305590 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1113 12:50:03.312021 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1114 12:50:03.315038 PCI: 00:04.0 assign_resources, bus 1 link: 0
1115 12:50:03.321834 PCI: 00:04.0 assign_resources, bus 1 link: 0
1116 12:50:03.328920 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1117 12:50:03.335201 PCI: 00:05.0 assign_resources, bus 2 link: 0
1118 12:50:03.338349 PCI: 00:05.0 assign_resources, bus 2 link: 0
1119 12:50:03.345135 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1120 12:50:03.355039 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1121 12:50:03.358472 PCI: 00:14.0 assign_resources, bus 0 link: 0
1122 12:50:03.364880 PCI: 00:14.0 assign_resources, bus 0 link: 0
1123 12:50:03.371793 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1124 12:50:03.375160 PCI: 00:14.3 assign_resources, bus 0 link: 0
1125 12:50:03.382231 PCI: 00:14.3 assign_resources, bus 0 link: 0
1126 12:50:03.388795 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1127 12:50:03.398775 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1128 12:50:03.402256 PCI: 00:15.0 assign_resources, bus 0 link: 0
1129 12:50:03.408291 PCI: 00:15.0 assign_resources, bus 0 link: 0
1130 12:50:03.414781 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1131 12:50:03.421484 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1132 12:50:03.427864 PCI: 00:15.2 assign_resources, bus 0 link: 0
1133 12:50:03.431618 PCI: 00:15.2 assign_resources, bus 0 link: 0
1134 12:50:03.441687 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1135 12:50:03.444704 PCI: 00:15.3 assign_resources, bus 0 link: 0
1136 12:50:03.447889 PCI: 00:15.3 assign_resources, bus 0 link: 0
1137 12:50:03.458050 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1138 12:50:03.464758 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1139 12:50:03.471363 PCI: 00:19.0 assign_resources, bus 0 link: 0
1140 12:50:03.475116 PCI: 00:19.0 assign_resources, bus 0 link: 0
1141 12:50:03.484585 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1142 12:50:03.491213 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1143 12:50:03.501471 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1144 12:50:03.504254 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1145 12:50:03.507673 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1146 12:50:03.514669 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1147 12:50:03.518146 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1148 12:50:03.524296 LPC: Trying to open IO window from 800 size 1ff
1149 12:50:03.531040 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1150 12:50:03.540940 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1151 12:50:03.544181 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1152 12:50:03.547346 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1153 12:50:03.557646 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1154 12:50:03.560781 DOMAIN: 0000 assign_resources, bus 0 link: 0
1155 12:50:03.567326 Root Device assign_resources, bus 0 link: 0
1156 12:50:03.567813 Done setting resources.
1157 12:50:03.574445 Show resources in subtree (Root Device)...After assigning values.
1158 12:50:03.580922 Root Device child on link 0 CPU_CLUSTER: 0
1159 12:50:03.583904 CPU_CLUSTER: 0 child on link 0 APIC: 00
1160 12:50:03.584405 APIC: 00
1161 12:50:03.587407 APIC: 02
1162 12:50:03.590646 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1163 12:50:03.601005 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1164 12:50:03.610727 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1165 12:50:03.611335 PCI: 00:00.0
1166 12:50:03.620551 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1167 12:50:03.630376 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1168 12:50:03.640455 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1169 12:50:03.650305 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1170 12:50:03.656460 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1171 12:50:03.667333 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1172 12:50:03.677278 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1173 12:50:03.686903 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1174 12:50:03.696481 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1175 12:50:03.706373 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1176 12:50:03.712967 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1177 12:50:03.722764 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1178 12:50:03.732662 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1179 12:50:03.743025 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1180 12:50:03.752821 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1181 12:50:03.759118 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1182 12:50:03.769257 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1183 12:50:03.779081 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1184 12:50:03.788913 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1185 12:50:03.792221 PCI: 00:02.0
1186 12:50:03.802684 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1187 12:50:03.812267 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1188 12:50:03.821879 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1189 12:50:03.825591 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1190 12:50:03.835504 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1191 12:50:03.839360 GENERIC: 0.0
1192 12:50:03.842369 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1193 12:50:03.851921 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1194 12:50:03.855254 GENERIC: 0.0
1195 12:50:03.855848 PCI: 00:08.0
1196 12:50:03.865062 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1197 12:50:03.872076 PCI: 00:14.0 child on link 0 USB0 port 0
1198 12:50:03.881945 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1199 12:50:03.884936 USB0 port 0 child on link 0 USB2 port 0
1200 12:50:03.888469 USB2 port 0
1201 12:50:03.888945 USB2 port 1
1202 12:50:03.891809 USB2 port 2
1203 12:50:03.892360 USB2 port 3
1204 12:50:03.894923 USB2 port 4
1205 12:50:03.895384 USB2 port 5
1206 12:50:03.898140 USB2 port 6
1207 12:50:03.898624 USB2 port 7
1208 12:50:03.901529 USB3 port 0
1209 12:50:03.904932 USB3 port 1
1210 12:50:03.905417 USB3 port 2
1211 12:50:03.908506 USB3 port 3
1212 12:50:03.909007 PCI: 00:14.2
1213 12:50:03.911383 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1214 12:50:03.925111 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1215 12:50:03.925642 GENERIC: 0.0
1216 12:50:03.928686 PCI: 00:14.5
1217 12:50:03.938236 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1218 12:50:03.941940 PCI: 00:15.0 child on link 0 I2C: 00:2c
1219 12:50:03.951567 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1220 12:50:03.955072 I2C: 00:2c
1221 12:50:03.955519 I2C: 00:15
1222 12:50:03.958093 PCI: 00:15.1
1223 12:50:03.968356 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1224 12:50:03.971389 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1225 12:50:03.981164 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1226 12:50:03.984823 GENERIC: 0.0
1227 12:50:03.985267 I2C: 00:15
1228 12:50:03.988267 I2C: 00:10
1229 12:50:03.988733 I2C: 00:10
1230 12:50:03.992025 I2C: 00:2c
1231 12:50:03.992608 I2C: 00:40
1232 12:50:03.992968 I2C: 00:10
1233 12:50:03.994936 I2C: 00:39
1234 12:50:03.998041 PCI: 00:15.3 child on link 0 I2C: 00:36
1235 12:50:04.008508 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1236 12:50:04.011483 I2C: 00:36
1237 12:50:04.012068 I2C: 00:10
1238 12:50:04.014817 I2C: 00:0c
1239 12:50:04.015294 I2C: 00:50
1240 12:50:04.017904 PCI: 00:16.0
1241 12:50:04.027740 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1242 12:50:04.031191 PCI: 00:19.0 child on link 0 I2C: 00:1a
1243 12:50:04.041320 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1244 12:50:04.044345 I2C: 00:1a
1245 12:50:04.044877 I2C: 00:1a
1246 12:50:04.047567 I2C: 00:1a
1247 12:50:04.048124 I2C: 00:28
1248 12:50:04.051279 I2C: 00:29
1249 12:50:04.051745 PCI: 00:19.2
1250 12:50:04.060770 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1251 12:50:04.073824 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1252 12:50:04.074320 PCI: 00:1a.0
1253 12:50:04.084241 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1254 12:50:04.087330 PCI: 00:1e.0
1255 12:50:04.090504 PCI: 00:1e.2 child on link 0 SPI: 00
1256 12:50:04.100562 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1257 12:50:04.101019 SPI: 00
1258 12:50:04.106812 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1259 12:50:04.113561 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1260 12:50:04.116857 PNP: 0c09.0
1261 12:50:04.126779 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1262 12:50:04.127271 PCI: 00:1f.2
1263 12:50:04.136804 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1264 12:50:04.147185 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1265 12:50:04.150077 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1266 12:50:04.159938 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1267 12:50:04.170332 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1268 12:50:04.173368 GENERIC: 0.0
1269 12:50:04.173805 PCI: 00:1f.5
1270 12:50:04.182998 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1271 12:50:04.186636 Done allocating resources.
1272 12:50:04.193199 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2101 ms
1273 12:50:04.196266 Enabling resources...
1274 12:50:04.199660 PCI: 00:00.0 subsystem <- 8086/4e22
1275 12:50:04.203080 PCI: 00:00.0 cmd <- 06
1276 12:50:04.206360 PCI: 00:02.0 subsystem <- 8086/4e55
1277 12:50:04.209913 PCI: 00:02.0 cmd <- 03
1278 12:50:04.213315 PCI: 00:04.0 subsystem <- 8086/4e03
1279 12:50:04.216069 PCI: 00:04.0 cmd <- 02
1280 12:50:04.219225 PCI: 00:05.0 bridge ctrl <- 0003
1281 12:50:04.222824 PCI: 00:05.0 subsystem <- 8086/4e19
1282 12:50:04.223242 PCI: 00:05.0 cmd <- 02
1283 12:50:04.226074 PCI: 00:08.0 cmd <- 06
1284 12:50:04.229331 PCI: 00:14.0 subsystem <- 8086/4ded
1285 12:50:04.232873 PCI: 00:14.0 cmd <- 02
1286 12:50:04.236247 PCI: 00:14.3 subsystem <- 8086/4df0
1287 12:50:04.239511 PCI: 00:14.3 cmd <- 02
1288 12:50:04.243075 PCI: 00:14.5 subsystem <- 8086/4df8
1289 12:50:04.246317 PCI: 00:14.5 cmd <- 06
1290 12:50:04.249798 PCI: 00:15.0 subsystem <- 8086/4de8
1291 12:50:04.252816 PCI: 00:15.0 cmd <- 02
1292 12:50:04.255820 PCI: 00:15.1 subsystem <- 8086/4de9
1293 12:50:04.256221 PCI: 00:15.1 cmd <- 02
1294 12:50:04.262704 PCI: 00:15.2 subsystem <- 8086/4dea
1295 12:50:04.263216 PCI: 00:15.2 cmd <- 02
1296 12:50:04.266417 PCI: 00:15.3 subsystem <- 8086/4deb
1297 12:50:04.269819 PCI: 00:15.3 cmd <- 02
1298 12:50:04.272936 PCI: 00:16.0 subsystem <- 8086/4de0
1299 12:50:04.276315 PCI: 00:16.0 cmd <- 02
1300 12:50:04.279472 PCI: 00:19.0 subsystem <- 8086/4dc5
1301 12:50:04.282833 PCI: 00:19.0 cmd <- 02
1302 12:50:04.285956 PCI: 00:19.2 subsystem <- 8086/4dc7
1303 12:50:04.289088 PCI: 00:19.2 cmd <- 06
1304 12:50:04.292895 PCI: 00:1a.0 subsystem <- 8086/4dc4
1305 12:50:04.296217 PCI: 00:1a.0 cmd <- 06
1306 12:50:04.299362 PCI: 00:1e.2 subsystem <- 8086/4daa
1307 12:50:04.299903 PCI: 00:1e.2 cmd <- 06
1308 12:50:04.306257 PCI: 00:1f.0 subsystem <- 8086/4d87
1309 12:50:04.306705 PCI: 00:1f.0 cmd <- 407
1310 12:50:04.309104 PCI: 00:1f.3 subsystem <- 8086/4dc8
1311 12:50:04.313000 PCI: 00:1f.3 cmd <- 02
1312 12:50:04.315776 PCI: 00:1f.5 subsystem <- 8086/4da4
1313 12:50:04.318961 PCI: 00:1f.5 cmd <- 406
1314 12:50:04.324295 done.
1315 12:50:04.326891 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1316 12:50:04.330185 Initializing devices...
1317 12:50:04.333286 Root Device init
1318 12:50:04.333758 mainboard: EC init
1319 12:50:04.340280 Chrome EC: Set SMI mask to 0x0000000000000000
1320 12:50:04.343621 Chrome EC: clear events_b mask to 0x0000000000000000
1321 12:50:04.350127 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1322 12:50:04.357206 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1323 12:50:04.363391 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1324 12:50:04.366765 Chrome EC: Set WAKE mask to 0x0000000000000000
1325 12:50:04.373331 Root Device init finished in 35 msecs
1326 12:50:04.376493 PCI: 00:00.0 init
1327 12:50:04.376994 CPU TDP = 6 Watts
1328 12:50:04.380425 CPU PL1 = 7 Watts
1329 12:50:04.383505 CPU PL2 = 12 Watts
1330 12:50:04.386870 PCI: 00:00.0 init finished in 6 msecs
1331 12:50:04.387374 PCI: 00:02.0 init
1332 12:50:04.390261 GMA: Found VBT in CBFS
1333 12:50:04.393423 GMA: Found valid VBT in CBFS
1334 12:50:04.400032 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1335 12:50:04.406897 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1336 12:50:04.409826 PCI: 00:02.0 init finished in 18 msecs
1337 12:50:04.413720 PCI: 00:08.0 init
1338 12:50:04.416418 PCI: 00:08.0 init finished in 0 msecs
1339 12:50:04.419803 PCI: 00:14.0 init
1340 12:50:04.423596 XHCI: Updated LFPS sampling OFF time to 9 ms
1341 12:50:04.426731 PCI: 00:14.0 init finished in 4 msecs
1342 12:50:04.429804 PCI: 00:15.0 init
1343 12:50:04.433042 I2C bus 0 version 0x3230302a
1344 12:50:04.436453 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1345 12:50:04.440078 PCI: 00:15.0 init finished in 6 msecs
1346 12:50:04.442983 PCI: 00:15.1 init
1347 12:50:04.446387 I2C bus 1 version 0x3230302a
1348 12:50:04.449866 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1349 12:50:04.453434 PCI: 00:15.1 init finished in 6 msecs
1350 12:50:04.456214 PCI: 00:15.2 init
1351 12:50:04.456657 I2C bus 2 version 0x3230302a
1352 12:50:04.462755 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1353 12:50:04.466304 PCI: 00:15.2 init finished in 6 msecs
1354 12:50:04.466391 PCI: 00:15.3 init
1355 12:50:04.469573 I2C bus 3 version 0x3230302a
1356 12:50:04.472850 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1357 12:50:04.476192 PCI: 00:15.3 init finished in 6 msecs
1358 12:50:04.479163 PCI: 00:16.0 init
1359 12:50:04.483050 PCI: 00:16.0 init finished in 0 msecs
1360 12:50:04.486329 PCI: 00:19.0 init
1361 12:50:04.489661 I2C bus 4 version 0x3230302a
1362 12:50:04.492718 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1363 12:50:04.496009 PCI: 00:19.0 init finished in 6 msecs
1364 12:50:04.499155 PCI: 00:1a.0 init
1365 12:50:04.502994 PCI: 00:1a.0 init finished in 0 msecs
1366 12:50:04.505949 PCI: 00:1f.0 init
1367 12:50:04.509024 IOAPIC: Initializing IOAPIC at 0xfec00000
1368 12:50:04.512831 IOAPIC: Bootstrap Processor Local APIC = 0x00
1369 12:50:04.515896 IOAPIC: ID = 0x02
1370 12:50:04.519518 IOAPIC: Dumping registers
1371 12:50:04.519609 reg 0x0000: 0x02000000
1372 12:50:04.522734 reg 0x0001: 0x00770020
1373 12:50:04.525975 reg 0x0002: 0x00000000
1374 12:50:04.529253 PCI: 00:1f.0 init finished in 21 msecs
1375 12:50:04.532814 PCI: 00:1f.2 init
1376 12:50:04.532918 Disabling ACPI via APMC.
1377 12:50:04.538946 APMC done.
1378 12:50:04.542351 PCI: 00:1f.2 init finished in 6 msecs
1379 12:50:04.553206 PNP: 0c09.0 init
1380 12:50:04.556601 Google Chrome EC uptime: 6.595 seconds
1381 12:50:04.563540 Google Chrome AP resets since EC boot: 0
1382 12:50:04.566240 Google Chrome most recent AP reset causes:
1383 12:50:04.572781 Google Chrome EC reset flags at last EC boot: reset-pin
1384 12:50:04.576270 PNP: 0c09.0 init finished in 18 msecs
1385 12:50:04.576442 Devices initialized
1386 12:50:04.579647 Show all devs... After init.
1387 12:50:04.583161 Root Device: enabled 1
1388 12:50:04.586167 CPU_CLUSTER: 0: enabled 1
1389 12:50:04.589523 DOMAIN: 0000: enabled 1
1390 12:50:04.589725 PCI: 00:00.0: enabled 1
1391 12:50:04.593130 PCI: 00:02.0: enabled 1
1392 12:50:04.596707 PCI: 00:04.0: enabled 1
1393 12:50:04.599329 PCI: 00:05.0: enabled 1
1394 12:50:04.599536 PCI: 00:09.0: enabled 0
1395 12:50:04.603173 PCI: 00:12.6: enabled 0
1396 12:50:04.606081 PCI: 00:14.0: enabled 1
1397 12:50:04.609314 PCI: 00:14.1: enabled 0
1398 12:50:04.609565 PCI: 00:14.2: enabled 0
1399 12:50:04.613019 PCI: 00:14.3: enabled 1
1400 12:50:04.616239 PCI: 00:14.5: enabled 1
1401 12:50:04.616451 PCI: 00:15.0: enabled 1
1402 12:50:04.619205 PCI: 00:15.1: enabled 1
1403 12:50:04.623148 PCI: 00:15.2: enabled 1
1404 12:50:04.625821 PCI: 00:15.3: enabled 1
1405 12:50:04.626139 PCI: 00:16.0: enabled 1
1406 12:50:04.629431 PCI: 00:16.1: enabled 0
1407 12:50:04.632714 PCI: 00:16.4: enabled 0
1408 12:50:04.636203 PCI: 00:16.5: enabled 0
1409 12:50:04.636668 PCI: 00:17.0: enabled 0
1410 12:50:04.639541 PCI: 00:19.0: enabled 1
1411 12:50:04.642958 PCI: 00:19.1: enabled 0
1412 12:50:04.645828 PCI: 00:19.2: enabled 1
1413 12:50:04.646023 PCI: 00:1a.0: enabled 1
1414 12:50:04.649228 PCI: 00:1c.0: enabled 0
1415 12:50:04.652081 PCI: 00:1c.1: enabled 0
1416 12:50:04.655527 PCI: 00:1c.2: enabled 0
1417 12:50:04.655622 PCI: 00:1c.3: enabled 0
1418 12:50:04.659135 PCI: 00:1c.4: enabled 0
1419 12:50:04.662406 PCI: 00:1c.5: enabled 0
1420 12:50:04.662509 PCI: 00:1c.6: enabled 0
1421 12:50:04.665487 PCI: 00:1c.7: enabled 1
1422 12:50:04.668952 PCI: 00:1e.0: enabled 0
1423 12:50:04.672378 PCI: 00:1e.1: enabled 0
1424 12:50:04.672551 PCI: 00:1e.2: enabled 1
1425 12:50:04.675719 PCI: 00:1e.3: enabled 0
1426 12:50:04.678557 PCI: 00:1f.0: enabled 1
1427 12:50:04.682154 PCI: 00:1f.1: enabled 0
1428 12:50:04.682244 PCI: 00:1f.2: enabled 1
1429 12:50:04.685694 PCI: 00:1f.3: enabled 1
1430 12:50:04.688904 PCI: 00:1f.4: enabled 0
1431 12:50:04.692135 PCI: 00:1f.5: enabled 1
1432 12:50:04.692317 PCI: 00:1f.7: enabled 0
1433 12:50:04.695646 GENERIC: 0.0: enabled 1
1434 12:50:04.698861 GENERIC: 0.0: enabled 1
1435 12:50:04.699061 USB0 port 0: enabled 1
1436 12:50:04.701925 GENERIC: 0.0: enabled 1
1437 12:50:04.705703 I2C: 00:2c: enabled 1
1438 12:50:04.708555 I2C: 00:15: enabled 1
1439 12:50:04.708751 GENERIC: 0.0: enabled 0
1440 12:50:04.712133 I2C: 00:15: enabled 1
1441 12:50:04.715287 I2C: 00:10: enabled 0
1442 12:50:04.715534 I2C: 00:10: enabled 0
1443 12:50:04.718437 I2C: 00:2c: enabled 1
1444 12:50:04.721743 I2C: 00:40: enabled 1
1445 12:50:04.721905 I2C: 00:10: enabled 1
1446 12:50:04.724907 I2C: 00:39: enabled 1
1447 12:50:04.728712 I2C: 00:36: enabled 1
1448 12:50:04.728922 I2C: 00:10: enabled 0
1449 12:50:04.731729 I2C: 00:0c: enabled 1
1450 12:50:04.735165 I2C: 00:50: enabled 1
1451 12:50:04.735526 I2C: 00:1a: enabled 1
1452 12:50:04.738966 I2C: 00:1a: enabled 0
1453 12:50:04.741809 I2C: 00:1a: enabled 0
1454 12:50:04.742149 I2C: 00:28: enabled 1
1455 12:50:04.744665 I2C: 00:29: enabled 1
1456 12:50:04.748012 PCI: 00:00.0: enabled 1
1457 12:50:04.748100 SPI: 00: enabled 1
1458 12:50:04.751380 PNP: 0c09.0: enabled 1
1459 12:50:04.754512 GENERIC: 0.0: enabled 0
1460 12:50:04.758211 USB2 port 0: enabled 1
1461 12:50:04.758299 USB2 port 1: enabled 1
1462 12:50:04.761490 USB2 port 2: enabled 1
1463 12:50:04.764494 USB2 port 3: enabled 1
1464 12:50:04.764582 USB2 port 4: enabled 0
1465 12:50:04.767983 USB2 port 5: enabled 1
1466 12:50:04.771345 USB2 port 6: enabled 0
1467 12:50:04.774804 USB2 port 7: enabled 1
1468 12:50:04.774891 USB3 port 0: enabled 1
1469 12:50:04.777710 USB3 port 1: enabled 1
1470 12:50:04.781246 USB3 port 2: enabled 1
1471 12:50:04.781333 USB3 port 3: enabled 1
1472 12:50:04.784639 APIC: 00: enabled 1
1473 12:50:04.788178 APIC: 02: enabled 1
1474 12:50:04.788265 PCI: 00:08.0: enabled 1
1475 12:50:04.794624 BS: BS_DEV_INIT run times (exec / console): 24 / 438 ms
1476 12:50:04.798229 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1477 12:50:04.804375 ELOG: NV offset 0xbfa000 size 0x1000
1478 12:50:04.811220 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1479 12:50:04.817657 ELOG: Event(17) added with size 13 at 2023-03-13 12:50:04 UTC
1480 12:50:04.824577 ELOG: Event(92) added with size 9 at 2023-03-13 12:50:04 UTC
1481 12:50:04.830872 ELOG: Event(93) added with size 9 at 2023-03-13 12:50:04 UTC
1482 12:50:04.837618 ELOG: Event(9E) added with size 10 at 2023-03-13 12:50:04 UTC
1483 12:50:04.844285 ELOG: Event(9F) added with size 14 at 2023-03-13 12:50:04 UTC
1484 12:50:04.847639 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1485 12:50:04.854064 ELOG: Event(A1) added with size 10 at 2023-03-13 12:50:04 UTC
1486 12:50:04.860857 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1487 12:50:04.867579 ELOG: Event(A0) added with size 9 at 2023-03-13 12:50:04 UTC
1488 12:50:04.874152 ELOG: Event(16) added with size 11 at 2023-03-13 12:50:04 UTC
1489 12:50:04.877644 Erasing flash addr bfa000 + 4 KiB
1490 12:50:04.928186 elog_add_boot_reason: Logged dev mode boot
1491 12:50:04.934990 BS: BS_POST_DEVICE entry times (exec / console): 25 / 34 ms
1492 12:50:04.935399 Finalize devices...
1493 12:50:04.938857 Devices finalized
1494 12:50:04.942048 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1495 12:50:04.948665 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1496 12:50:04.955175 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1497 12:50:04.958331 ME: HFSTS1 : 0x80030045
1498 12:50:04.961824 ME: HFSTS2 : 0x30280136
1499 12:50:04.965006 ME: HFSTS3 : 0x00000050
1500 12:50:04.971879 ME: HFSTS4 : 0x00004000
1501 12:50:04.975134 ME: HFSTS5 : 0x00000000
1502 12:50:04.978731 ME: HFSTS6 : 0x40400006
1503 12:50:04.981630 ME: Manufacturing Mode : NO
1504 12:50:04.985037 ME: FW Partition Table : OK
1505 12:50:04.988523 ME: Bringup Loader Failure : NO
1506 12:50:04.991319 ME: Firmware Init Complete : NO
1507 12:50:04.995008 ME: Boot Options Present : NO
1508 12:50:04.998309 ME: Update In Progress : NO
1509 12:50:05.001295 ME: D0i3 Support : YES
1510 12:50:05.004799 ME: Low Power State Enabled : NO
1511 12:50:05.008258 ME: CPU Replaced : YES
1512 12:50:05.011195 ME: CPU Replacement Valid : YES
1513 12:50:05.014844 ME: Current Working State : 5
1514 12:50:05.018142 ME: Current Operation State : 1
1515 12:50:05.021367 ME: Current Operation Mode : 3
1516 12:50:05.024475 ME: Error Code : 0
1517 12:50:05.028186 ME: CPU Debug Disabled : YES
1518 12:50:05.031562 ME: TXT Support : NO
1519 12:50:05.038021 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1520 12:50:05.044592 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1521 12:50:05.047636 ACPI: Writing ACPI tables at 76b27000.
1522 12:50:05.048119 ACPI: * FACS
1523 12:50:05.051098 ACPI: * DSDT
1524 12:50:05.054719 Ramoops buffer: 0x100000@0x76a26000.
1525 12:50:05.058081 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1526 12:50:05.064527 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1527 12:50:05.067677 Google Chrome EC: version:
1528 12:50:05.071165 ro: magolor_1.1.9999-103b6f9
1529 12:50:05.074380 rw: magolor_1.1.9999-103b6f9
1530 12:50:05.074822 running image: 1
1531 12:50:05.081199 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1532 12:50:05.085247 ACPI: * FADT
1533 12:50:05.085688 SCI is IRQ9
1534 12:50:05.091636 ACPI: added table 1/32, length now 40
1535 12:50:05.092112 ACPI: * SSDT
1536 12:50:05.095126 Found 1 CPU(s) with 2 core(s) each.
1537 12:50:05.098508 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1538 12:50:05.105137 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1539 12:50:05.108069 Could not locate 'wifi_sar' in VPD.
1540 12:50:05.111493 Checking CBFS for default SAR values
1541 12:50:05.118359 wifi_sar_defaults.hex has bad len in CBFS
1542 12:50:05.121912 failed from getting SAR limits!
1543 12:50:05.124709 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1544 12:50:05.131356 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1545 12:50:05.135321 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1546 12:50:05.141568 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1547 12:50:05.145019 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1548 12:50:05.151679 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1549 12:50:05.154727 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1550 12:50:05.161440 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1551 12:50:05.168094 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1552 12:50:05.174827 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1553 12:50:05.178091 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1554 12:50:05.184873 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1555 12:50:05.188412 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1556 12:50:05.194588 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1557 12:50:05.198179 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1558 12:50:05.205661 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1559 12:50:05.209407 PS2K: Passing 101 keymaps to kernel
1560 12:50:05.215740 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1561 12:50:05.222043 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1562 12:50:05.225234 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1563 12:50:05.232176 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1564 12:50:05.235306 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1565 12:50:05.242024 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1566 12:50:05.249016 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1567 12:50:05.255544 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1568 12:50:05.258801 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1569 12:50:05.265279 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1570 12:50:05.268374 ACPI: added table 2/32, length now 44
1571 12:50:05.271461 ACPI: * MCFG
1572 12:50:05.274909 ACPI: added table 3/32, length now 48
1573 12:50:05.274997 ACPI: * TPM2
1574 12:50:05.278153 TPM2 log created at 0x76a16000
1575 12:50:05.281626 ACPI: added table 4/32, length now 52
1576 12:50:05.284918 ACPI: * MADT
1577 12:50:05.285005 SCI is IRQ9
1578 12:50:05.288094 ACPI: added table 5/32, length now 56
1579 12:50:05.291661 current = 76b2d580
1580 12:50:05.294866 ACPI: * DMAR
1581 12:50:05.298553 ACPI: added table 6/32, length now 60
1582 12:50:05.301564 ACPI: added table 7/32, length now 64
1583 12:50:05.301651 ACPI: * HPET
1584 12:50:05.304843 ACPI: added table 8/32, length now 68
1585 12:50:05.308702 ACPI: done.
1586 12:50:05.312160 ACPI tables: 26304 bytes.
1587 12:50:05.314994 smbios_write_tables: 76a15000
1588 12:50:05.318639 EC returned error result code 3
1589 12:50:05.321428 Couldn't obtain OEM name from CBI
1590 12:50:05.324999 Create SMBIOS type 16
1591 12:50:05.325486 Create SMBIOS type 17
1592 12:50:05.328339 GENERIC: 0.0 (WIFI Device)
1593 12:50:05.331996 SMBIOS tables: 913 bytes.
1594 12:50:05.335180 Writing table forward entry at 0x00000500
1595 12:50:05.341915 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1596 12:50:05.344749 Writing coreboot table at 0x76b4b000
1597 12:50:05.351227 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1598 12:50:05.354702 1. 0000000000001000-000000000009ffff: RAM
1599 12:50:05.361718 2. 00000000000a0000-00000000000fffff: RESERVED
1600 12:50:05.364760 3. 0000000000100000-0000000076a14fff: RAM
1601 12:50:05.371271 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1602 12:50:05.374628 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1603 12:50:05.381862 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1604 12:50:05.385151 7. 0000000077000000-000000007fbfffff: RESERVED
1605 12:50:05.391390 8. 00000000c0000000-00000000cfffffff: RESERVED
1606 12:50:05.394861 9. 00000000fb000000-00000000fb000fff: RESERVED
1607 12:50:05.401349 10. 00000000fe000000-00000000fe00ffff: RESERVED
1608 12:50:05.404916 11. 00000000fea80000-00000000fea87fff: RESERVED
1609 12:50:05.411341 12. 00000000fed80000-00000000fed87fff: RESERVED
1610 12:50:05.414585 13. 00000000fed90000-00000000fed92fff: RESERVED
1611 12:50:05.418177 14. 00000000feda0000-00000000feda1fff: RESERVED
1612 12:50:05.424460 15. 0000000100000000-00000001803fffff: RAM
1613 12:50:05.427878 Passing 4 GPIOs to payload:
1614 12:50:05.430869 NAME | PORT | POLARITY | VALUE
1615 12:50:05.438299 lid | undefined | high | high
1616 12:50:05.441097 power | undefined | high | low
1617 12:50:05.448117 oprom | undefined | high | low
1618 12:50:05.454876 EC in RW | 0x000000b9 | high | low
1619 12:50:05.458074 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum bc46
1620 12:50:05.461059 coreboot table: 1504 bytes.
1621 12:50:05.464242 IMD ROOT 0. 0x76fff000 0x00001000
1622 12:50:05.470814 IMD SMALL 1. 0x76ffe000 0x00001000
1623 12:50:05.474197 FSP MEMORY 2. 0x76c4e000 0x003b0000
1624 12:50:05.477960 CONSOLE 3. 0x76c2e000 0x00020000
1625 12:50:05.481081 FMAP 4. 0x76c2d000 0x00000578
1626 12:50:05.484276 TIME STAMP 5. 0x76c2c000 0x00000910
1627 12:50:05.487490 VBOOT WORK 6. 0x76c18000 0x00014000
1628 12:50:05.490664 ROMSTG STCK 7. 0x76c17000 0x00001000
1629 12:50:05.493928 AFTER CAR 8. 0x76c0d000 0x0000a000
1630 12:50:05.497365 RAMSTAGE 9. 0x76ba7000 0x00066000
1631 12:50:05.504020 REFCODE 10. 0x76b67000 0x00040000
1632 12:50:05.507439 SMM BACKUP 11. 0x76b57000 0x00010000
1633 12:50:05.510664 4f444749 12. 0x76b55000 0x00002000
1634 12:50:05.514278 EXT VBT13. 0x76b53000 0x00001c43
1635 12:50:05.517965 COREBOOT 14. 0x76b4b000 0x00008000
1636 12:50:05.520997 ACPI 15. 0x76b27000 0x00024000
1637 12:50:05.524018 ACPI GNVS 16. 0x76b26000 0x00001000
1638 12:50:05.527270 RAMOOPS 17. 0x76a26000 0x00100000
1639 12:50:05.530802 TPM2 TCGLOG18. 0x76a16000 0x00010000
1640 12:50:05.537408 SMBIOS 19. 0x76a15000 0x00000800
1641 12:50:05.537895 IMD small region:
1642 12:50:05.540742 IMD ROOT 0. 0x76ffec00 0x00000400
1643 12:50:05.544266 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1644 12:50:05.551087 VPD 2. 0x76ffeb80 0x0000004c
1645 12:50:05.553909 POWER STATE 3. 0x76ffeb40 0x00000040
1646 12:50:05.557326 ROMSTAGE 4. 0x76ffeb20 0x00000004
1647 12:50:05.560922 MEM INFO 5. 0x76ffe940 0x000001e0
1648 12:50:05.567381 BS: BS_WRITE_TABLES run times (exec / console): 6 / 518 ms
1649 12:50:05.570626 MTRR: Physical address space:
1650 12:50:05.577548 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1651 12:50:05.584003 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1652 12:50:05.587176 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1653 12:50:05.593929 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1654 12:50:05.600729 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1655 12:50:05.607343 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1656 12:50:05.613901 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1657 12:50:05.617202 MTRR: Fixed MSR 0x250 0x0606060606060606
1658 12:50:05.620581 MTRR: Fixed MSR 0x258 0x0606060606060606
1659 12:50:05.626932 MTRR: Fixed MSR 0x259 0x0000000000000000
1660 12:50:05.630296 MTRR: Fixed MSR 0x268 0x0606060606060606
1661 12:50:05.633724 MTRR: Fixed MSR 0x269 0x0606060606060606
1662 12:50:05.637124 MTRR: Fixed MSR 0x26a 0x0606060606060606
1663 12:50:05.643482 MTRR: Fixed MSR 0x26b 0x0606060606060606
1664 12:50:05.646679 MTRR: Fixed MSR 0x26c 0x0606060606060606
1665 12:50:05.650003 MTRR: Fixed MSR 0x26d 0x0606060606060606
1666 12:50:05.653438 MTRR: Fixed MSR 0x26e 0x0606060606060606
1667 12:50:05.660549 MTRR: Fixed MSR 0x26f 0x0606060606060606
1668 12:50:05.663252 call enable_fixed_mtrr()
1669 12:50:05.666766 CPU physical address size: 39 bits
1670 12:50:05.670049 MTRR: default type WB/UC MTRR counts: 6/5.
1671 12:50:05.673390 MTRR: UC selected as default type.
1672 12:50:05.680309 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1673 12:50:05.686947 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1674 12:50:05.693295 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1675 12:50:05.697026 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1676 12:50:05.703006 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1677 12:50:05.706424
1678 12:50:05.706865 MTRR check
1679 12:50:05.709771 Fixed MTRRs : Enabled
1680 12:50:05.710225 Variable MTRRs: Enabled
1681 12:50:05.710602
1682 12:50:05.716437 MTRR: Fixed MSR 0x250 0x0606060606060606
1683 12:50:05.719832 MTRR: Fixed MSR 0x258 0x0606060606060606
1684 12:50:05.723085 MTRR: Fixed MSR 0x259 0x0000000000000000
1685 12:50:05.726583 MTRR: Fixed MSR 0x268 0x0606060606060606
1686 12:50:05.733003 MTRR: Fixed MSR 0x269 0x0606060606060606
1687 12:50:05.736348 MTRR: Fixed MSR 0x26a 0x0606060606060606
1688 12:50:05.740080 MTRR: Fixed MSR 0x26b 0x0606060606060606
1689 12:50:05.743000 MTRR: Fixed MSR 0x26c 0x0606060606060606
1690 12:50:05.749768 MTRR: Fixed MSR 0x26d 0x0606060606060606
1691 12:50:05.753204 MTRR: Fixed MSR 0x26e 0x0606060606060606
1692 12:50:05.756140 MTRR: Fixed MSR 0x26f 0x0606060606060606
1693 12:50:05.762878 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1694 12:50:05.766401 call enable_fixed_mtrr()
1695 12:50:05.770608 Checking cr50 for pending updates
1696 12:50:05.771053 CPU physical address size: 39 bits
1697 12:50:05.775436 Reading cr50 TPM mode
1698 12:50:05.785213 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1699 12:50:05.792738 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1700 12:50:05.796282 Checking segment from ROM address 0xfff9d5b8
1701 12:50:05.802654 Checking segment from ROM address 0xfff9d5d4
1702 12:50:05.805962 Loading segment from ROM address 0xfff9d5b8
1703 12:50:05.809171 code (compression=0)
1704 12:50:05.815990 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1705 12:50:05.826014 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1706 12:50:05.828852 it's not compressed!
1707 12:50:05.954094 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1708 12:50:05.960776 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1709 12:50:05.968200 Loading segment from ROM address 0xfff9d5d4
1710 12:50:05.971619 Entry Point 0x30000000
1711 12:50:05.972088 Loaded segments
1712 12:50:05.977991 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1713 12:50:05.993776 Finalizing chipset.
1714 12:50:05.996971 Finalizing SMM.
1715 12:50:05.997058 APMC done.
1716 12:50:06.004175 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1717 12:50:06.007655 mp_park_aps done after 0 msecs.
1718 12:50:06.010683 Jumping to boot code at 0x30000000(0x76b4b000)
1719 12:50:06.020444 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1720 12:50:06.020555
1721 12:50:06.020648
1722 12:50:06.020727
1723 12:50:06.024010 Starting depthcharge on Magolor...
1724 12:50:06.024130
1725 12:50:06.024540 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1726 12:50:06.024678 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1727 12:50:06.024793 Setting prompt string to ['dedede:']
1728 12:50:06.024901 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1729 12:50:06.034069 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1730 12:50:06.034214
1731 12:50:06.040766 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1732 12:50:06.040927
1733 12:50:06.044065 fw_config match found: AUDIO_AMP=UNPROVISIONED
1734 12:50:06.044253
1735 12:50:06.047273 Wipe memory regions:
1736 12:50:06.047488
1737 12:50:06.050775 [0x00000000001000, 0x000000000a0000)
1738 12:50:06.050990
1739 12:50:06.054575 [0x00000000100000, 0x00000030000000)
1740 12:50:06.183275
1741 12:50:06.185880 [0x00000031062170, 0x00000076a15000)
1742 12:50:06.355234
1743 12:50:06.358172 [0x00000100000000, 0x00000180400000)
1744 12:50:07.421910
1745 12:50:07.422468 R8152: Initializing
1746 12:50:07.422835
1747 12:50:07.424967 Version 6 (ocp_data = 5c30)
1748 12:50:07.428474
1749 12:50:07.428923 R8152: Done initializing
1750 12:50:07.429294
1751 12:50:07.432231 Adding net device
1752 12:50:07.432682
1753 12:50:07.434964 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1754 12:50:07.438464
1755 12:50:07.439105
1756 12:50:07.439532
1757 12:50:07.440410 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1759 12:50:07.542158 dedede: tftpboot 192.168.201.1 9584861/tftp-deploy-i6irc8uk/kernel/bzImage 9584861/tftp-deploy-i6irc8uk/kernel/cmdline 9584861/tftp-deploy-i6irc8uk/ramdisk/ramdisk.cpio.gz
1760 12:50:07.542856 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 12:50:07.543308 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1762 12:50:07.548199 tftpboot 192.168.201.1 9584861/tftp-deploy-i6irc8uk/kernel/bzImoy-i6irc8uk/kernel/cmdline 9584861/tftp-deploy-i6irc8uk/ramdisk/ramdisk.cpio.gz
1763 12:50:07.548835
1764 12:50:07.549304 Waiting for link
1765 12:50:07.750209
1766 12:50:07.750755 done.
1767 12:50:07.751109
1768 12:50:07.751506 MAC: 00:24:32:30:7b:5a
1769 12:50:07.751915
1770 12:50:07.753052 Sending DHCP discover... done.
1771 12:50:07.753501
1772 12:50:07.756350 Waiting for reply... done.
1773 12:50:07.756809
1774 12:50:07.759901 Sending DHCP request... done.
1775 12:50:07.760353
1776 12:50:07.766910 Waiting for reply... done.
1777 12:50:07.767366
1778 12:50:07.767761 My ip is 192.168.201.19
1779 12:50:07.768123
1780 12:50:07.770176 The DHCP server ip is 192.168.201.1
1781 12:50:07.773161
1782 12:50:07.776641 TFTP server IP predefined by user: 192.168.201.1
1783 12:50:07.777235
1784 12:50:07.783116 Bootfile predefined by user: 9584861/tftp-deploy-i6irc8uk/kernel/bzImage
1785 12:50:07.783597
1786 12:50:07.786343 Sending tftp read request... done.
1787 12:50:07.786782
1788 12:50:07.793390 Waiting for the transfer...
1789 12:50:07.793834
1790 12:50:08.400631 00000000 ################################################################
1791 12:50:08.400787
1792 12:50:09.064169 00080000 ################################################################
1793 12:50:09.064751
1794 12:50:09.749276 00100000 ################################################################
1795 12:50:09.749880
1796 12:50:10.420761 00180000 ################################################################
1797 12:50:10.421342
1798 12:50:11.110939 00200000 ################################################################
1799 12:50:11.111491
1800 12:50:11.755618 00280000 ################################################################
1801 12:50:11.755782
1802 12:50:12.445049 00300000 ################################################################
1803 12:50:12.445590
1804 12:50:13.108484 00380000 ################################################################
1805 12:50:13.109042
1806 12:50:13.802505 00400000 ################################################################
1807 12:50:13.802658
1808 12:50:14.455980 00480000 ################################################################
1809 12:50:14.456177
1810 12:50:15.132118 00500000 ################################################################
1811 12:50:15.132653
1812 12:50:15.815826 00580000 ################################################################
1813 12:50:15.816455
1814 12:50:16.466910 00600000 ################################################################
1815 12:50:16.467455
1816 12:50:17.161500 00680000 ################################################################
1817 12:50:17.162041
1818 12:50:17.559320 00700000 ##################################### done.
1819 12:50:17.559902
1820 12:50:17.562629 The bootfile was 7638928 bytes long.
1821 12:50:17.563073
1822 12:50:17.565927 Sending tftp read request... done.
1823 12:50:17.566474
1824 12:50:17.569303 Waiting for the transfer...
1825 12:50:17.569764
1826 12:50:18.250531 00000000 ################################################################
1827 12:50:18.251122
1828 12:50:18.908593 00080000 ################################################################
1829 12:50:18.909137
1830 12:50:19.577250 00100000 ################################################################
1831 12:50:19.577929
1832 12:50:20.234904 00180000 ################################################################
1833 12:50:20.235449
1834 12:50:20.903575 00200000 ################################################################
1835 12:50:20.903740
1836 12:50:21.538991 00280000 ################################################################
1837 12:50:21.539225
1838 12:50:22.202495 00300000 ################################################################
1839 12:50:22.202828
1840 12:50:22.861369 00380000 ################################################################
1841 12:50:22.861914
1842 12:50:23.537793 00400000 ################################################################
1843 12:50:23.538398
1844 12:50:24.222995 00480000 ################################################################
1845 12:50:24.223527
1846 12:50:24.910389 00500000 ################################################################
1847 12:50:24.910934
1848 12:50:25.558423 00580000 ################################################################
1849 12:50:25.559000
1850 12:50:26.259162 00600000 ################################################################
1851 12:50:26.259843
1852 12:50:26.960928 00680000 ################################################################
1853 12:50:26.961085
1854 12:50:27.619868 00700000 ################################################################
1855 12:50:27.620030
1856 12:50:28.243823 00780000 ################################################################
1857 12:50:28.243979
1858 12:50:28.770252 00800000 ##################################################### done.
1859 12:50:28.770901
1860 12:50:28.773892 Sending tftp read request... done.
1861 12:50:28.774397
1862 12:50:28.776711 Waiting for the transfer...
1863 12:50:28.777240
1864 12:50:28.777697 00000000 # done.
1865 12:50:28.778120
1866 12:50:28.786633 Command line loaded dynamically from TFTP file: 9584861/tftp-deploy-i6irc8uk/kernel/cmdline
1867 12:50:28.787206
1868 12:50:28.800171 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 12:50:28.800617
1870 12:50:28.803762 ec_init: CrosEC protocol v3 supported (256, 256)
1871 12:50:28.810613
1872 12:50:28.814164 Shutting down all USB controllers.
1873 12:50:28.814664
1874 12:50:28.815012 Removing current net device
1875 12:50:28.815335
1876 12:50:28.817158 Finalizing coreboot
1877 12:50:28.817611
1878 12:50:28.823755 Exiting depthcharge with code 4 at timestamp: 29737651
1879 12:50:28.824318
1880 12:50:28.824664
1881 12:50:28.824977 Starting kernel ...
1882 12:50:28.825298
1883 12:50:28.825599
1884 12:50:28.826790 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1885 12:50:28.827281 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1886 12:50:28.827651 Setting prompt string to ['Linux version [0-9]']
1887 12:50:28.828052 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 12:50:28.828402 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 12:54:52.828355 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1892 12:54:52.829520 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1894 12:54:52.830414 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 12:54:52.832144 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 12:54:52.833053 Cleaning after the job
1900 12:54:52.833142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/ramdisk
1901 12:54:52.833828 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/kernel
1902 12:54:52.834421 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584861/tftp-deploy-i6irc8uk/modules
1903 12:54:52.834670 start: 5.1 power-off (timeout 00:00:30) [common]
1904 12:54:52.834822 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-6' '--port=1' '--command=off'
1905 12:54:52.913327 >> Command sent successfully.
1906 12:54:52.918605 Returned 0 in 0 seconds
1907 12:54:53.020079 end: 5.1 power-off (duration 00:00:00) [common]
1909 12:54:53.021561 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 12:54:53.022644 Listened to connection for namespace 'common' for up to 1s
1912 12:54:53.024155 Listened to connection for namespace 'common' for up to 1s
1913 12:54:54.024007 Finalising connection for namespace 'common'
1914 12:54:54.024663 Disconnecting from shell: Finalise
1915 12:54:54.025067
1916 12:54:54.126573 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 12:54:54.127160 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584861
1918 12:54:54.152017 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584861
1919 12:54:54.152481 JobError: Your job cannot terminate cleanly.