Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:51:10.328344 lava-dispatcher, installed at version: 2023.01
2 12:51:10.328534 start: 0 validate
3 12:51:10.328659 Start time: 2023-03-13 12:51:10.328651+00:00 (UTC)
4 12:51:10.328773 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:51:10.328904 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
6 12:51:10.618278 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:51:10.619010 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:51:10.917379 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:51:10.918164 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:51:11.230124 validate duration: 0.90
12 12:51:11.231597 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:51:11.232587 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:51:11.233237 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:51:11.233880 Not decompressing ramdisk as can be used compressed.
16 12:51:11.234463 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
17 12:51:11.234904 saving as /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/ramdisk/rootfs.cpio.gz
18 12:51:11.235270 total size: 8423697 (8MB)
19 12:51:11.239944 progress 0% (0MB)
20 12:51:11.251161 progress 5% (0MB)
21 12:51:11.257944 progress 10% (0MB)
22 12:51:11.262980 progress 15% (1MB)
23 12:51:11.267204 progress 20% (1MB)
24 12:51:11.270925 progress 25% (2MB)
25 12:51:11.274350 progress 30% (2MB)
26 12:51:11.277165 progress 35% (2MB)
27 12:51:11.280097 progress 40% (3MB)
28 12:51:11.282774 progress 45% (3MB)
29 12:51:11.285271 progress 50% (4MB)
30 12:51:11.287666 progress 55% (4MB)
31 12:51:11.289908 progress 60% (4MB)
32 12:51:11.292039 progress 65% (5MB)
33 12:51:11.294005 progress 70% (5MB)
34 12:51:11.296037 progress 75% (6MB)
35 12:51:11.298130 progress 80% (6MB)
36 12:51:11.300179 progress 85% (6MB)
37 12:51:11.302266 progress 90% (7MB)
38 12:51:11.304298 progress 95% (7MB)
39 12:51:11.306393 progress 100% (8MB)
40 12:51:11.306501 8MB downloaded in 0.07s (112.77MB/s)
41 12:51:11.306650 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:51:11.306896 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:51:11.306986 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:51:11.307072 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:51:11.307177 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:51:11.307252 saving as /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/kernel/bzImage
48 12:51:11.307318 total size: 7638928 (7MB)
49 12:51:11.307380 No compression specified
50 12:51:11.308281 progress 0% (0MB)
51 12:51:11.310154 progress 5% (0MB)
52 12:51:11.312068 progress 10% (0MB)
53 12:51:11.313859 progress 15% (1MB)
54 12:51:11.315769 progress 20% (1MB)
55 12:51:11.317715 progress 25% (1MB)
56 12:51:11.319476 progress 30% (2MB)
57 12:51:11.321427 progress 35% (2MB)
58 12:51:11.323342 progress 40% (2MB)
59 12:51:11.325151 progress 45% (3MB)
60 12:51:11.327129 progress 50% (3MB)
61 12:51:11.329076 progress 55% (4MB)
62 12:51:11.330806 progress 60% (4MB)
63 12:51:11.332742 progress 65% (4MB)
64 12:51:11.334636 progress 70% (5MB)
65 12:51:11.336385 progress 75% (5MB)
66 12:51:11.338276 progress 80% (5MB)
67 12:51:11.340162 progress 85% (6MB)
68 12:51:11.341908 progress 90% (6MB)
69 12:51:11.343794 progress 95% (6MB)
70 12:51:11.345696 progress 100% (7MB)
71 12:51:11.345808 7MB downloaded in 0.04s (189.29MB/s)
72 12:51:11.345951 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:51:11.346187 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:51:11.346278 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:51:11.346365 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:51:11.346470 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:51:11.346542 saving as /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/modules/modules.tar
79 12:51:11.346609 total size: 250760 (0MB)
80 12:51:11.346671 Using unxz to decompress xz
81 12:51:11.349813 progress 13% (0MB)
82 12:51:11.350177 progress 26% (0MB)
83 12:51:11.350411 progress 39% (0MB)
84 12:51:11.351702 progress 52% (0MB)
85 12:51:11.353610 progress 65% (0MB)
86 12:51:11.355500 progress 78% (0MB)
87 12:51:11.357353 progress 91% (0MB)
88 12:51:11.359095 progress 100% (0MB)
89 12:51:11.364595 0MB downloaded in 0.02s (13.30MB/s)
90 12:51:11.364834 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:51:11.365097 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:51:11.365194 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:51:11.365291 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:51:11.365379 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:51:11.365465 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:51:11.365675 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb
98 12:51:11.365791 makedir: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin
99 12:51:11.365879 makedir: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/tests
100 12:51:11.365960 makedir: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/results
101 12:51:11.366067 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-add-keys
102 12:51:11.366198 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-add-sources
103 12:51:11.366317 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-background-process-start
104 12:51:11.366431 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-background-process-stop
105 12:51:11.366544 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-common-functions
106 12:51:11.366656 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-echo-ipv4
107 12:51:11.366769 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-install-packages
108 12:51:11.366881 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-installed-packages
109 12:51:11.366991 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-os-build
110 12:51:11.367103 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-probe-channel
111 12:51:11.367216 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-probe-ip
112 12:51:11.367325 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-target-ip
113 12:51:11.367435 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-target-mac
114 12:51:11.367544 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-target-storage
115 12:51:11.367655 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-case
116 12:51:11.367764 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-event
117 12:51:11.367874 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-feedback
118 12:51:11.367983 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-raise
119 12:51:11.368097 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-reference
120 12:51:11.368208 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-runner
121 12:51:11.368327 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-set
122 12:51:11.368439 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-test-shell
123 12:51:11.368552 Updating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-install-packages (oe)
124 12:51:11.368668 Updating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/bin/lava-installed-packages (oe)
125 12:51:11.368769 Creating /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/environment
126 12:51:11.368858 LAVA metadata
127 12:51:11.368934 - LAVA_JOB_ID=9584871
128 12:51:11.369003 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:51:11.369106 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:51:11.369174 skipped lava-vland-overlay
131 12:51:11.369251 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:51:11.369336 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:51:11.369403 skipped lava-multinode-overlay
134 12:51:11.369479 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:51:11.369566 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:51:11.369640 Loading test definitions
137 12:51:11.369740 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:51:11.369816 Using /lava-9584871 at stage 0
139 12:51:11.370093 uuid=9584871_1.4.2.3.1 testdef=None
140 12:51:11.370187 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:51:11.370281 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:51:11.370792 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:51:11.371029 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:51:11.371609 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:51:11.371851 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:51:11.372401 runner path: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/0/tests/0_dmesg test_uuid 9584871_1.4.2.3.1
149 12:51:11.372549 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:51:11.372787 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:51:11.372862 Using /lava-9584871 at stage 1
153 12:51:11.373103 uuid=9584871_1.4.2.3.5 testdef=None
154 12:51:11.373193 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:51:11.373281 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:51:11.373784 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:51:11.374007 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:51:11.374575 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:51:11.374810 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:51:11.375353 runner path: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/1/tests/1_bootrr test_uuid 9584871_1.4.2.3.5
163 12:51:11.375494 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:51:11.375706 Creating lava-test-runner.conf files
166 12:51:11.375771 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/0 for stage 0
167 12:51:11.375854 - 0_dmesg
168 12:51:11.375930 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584871/lava-overlay-teibygrb/lava-9584871/1 for stage 1
169 12:51:11.376012 - 1_bootrr
170 12:51:11.376104 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:51:11.376193 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:51:11.382613 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:51:11.382728 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:51:11.382820 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:51:11.382910 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:51:11.382998 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:51:11.566393 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:51:11.566746 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:51:11.566858 extracting modules file /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584871/extract-overlay-ramdisk-mv_gx435/ramdisk
180 12:51:11.574657 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:51:11.574778 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:51:11.574875 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584871/compress-overlay-muvy6mz7/overlay-1.4.2.4.tar.gz to ramdisk
183 12:51:11.574947 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584871/compress-overlay-muvy6mz7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584871/extract-overlay-ramdisk-mv_gx435/ramdisk
184 12:51:11.579155 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:51:11.579265 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 12:51:11.579360 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:51:11.579465 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 12:51:11.579554 Building ramdisk /var/lib/lava/dispatcher/tmp/9584871/extract-overlay-ramdisk-mv_gx435/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584871/extract-overlay-ramdisk-mv_gx435/ramdisk
189 12:51:11.644799 >> 49731 blocks
190 12:51:12.412128 rename /var/lib/lava/dispatcher/tmp/9584871/extract-overlay-ramdisk-mv_gx435/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/ramdisk/ramdisk.cpio.gz
191 12:51:12.412587 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:51:12.412716 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 12:51:12.412826 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 12:51:12.412918 No mkimage arch provided, not using FIT.
195 12:51:12.413007 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:51:12.413259 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:51:12.413358 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:51:12.413451 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 12:51:12.413529 No LXC device requested
200 12:51:12.413611 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:51:12.413705 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 12:51:12.413788 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:51:12.413858 Checking files for TFTP limit of 4294967296 bytes.
204 12:51:12.414228 end: 1 tftp-deploy (duration 00:00:01) [common]
205 12:51:12.414333 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:51:12.414429 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:51:12.414554 substitutions:
208 12:51:12.414622 - {DTB}: None
209 12:51:12.414696 - {INITRD}: 9584871/tftp-deploy-xq98ymnm/ramdisk/ramdisk.cpio.gz
210 12:51:12.414768 - {KERNEL}: 9584871/tftp-deploy-xq98ymnm/kernel/bzImage
211 12:51:12.414829 - {LAVA_MAC}: None
212 12:51:12.414888 - {PRESEED_CONFIG}: None
213 12:51:12.414947 - {PRESEED_LOCAL}: None
214 12:51:12.415018 - {RAMDISK}: 9584871/tftp-deploy-xq98ymnm/ramdisk/ramdisk.cpio.gz
215 12:51:12.415077 - {ROOT_PART}: None
216 12:51:12.415135 - {ROOT}: None
217 12:51:12.415192 - {SERVER_IP}: 192.168.201.1
218 12:51:12.415249 - {TEE}: None
219 12:51:12.415305 Parsed boot commands:
220 12:51:12.415360 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:51:12.415514 Parsed boot commands: tftpboot 192.168.201.1 9584871/tftp-deploy-xq98ymnm/kernel/bzImage 9584871/tftp-deploy-xq98ymnm/kernel/cmdline 9584871/tftp-deploy-xq98ymnm/ramdisk/ramdisk.cpio.gz
222 12:51:12.415608 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:51:12.415697 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:51:12.415793 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:51:12.415878 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:51:12.415948 Not connected, no need to disconnect.
227 12:51:12.416025 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:51:12.416109 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:51:12.416177 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
230 12:51:12.419108 Setting prompt string to ['lava-test: # ']
231 12:51:12.419396 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:51:12.419506 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:51:12.419605 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:51:12.419698 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:51:12.419882 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
236 12:51:17.561928 >> Command sent successfully.
237 12:51:17.571089 Returned 0 in 5 seconds
238 12:51:17.672786 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:51:17.674278 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:51:17.674891 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:51:17.675378 Setting prompt string to 'Starting depthcharge on Helios...'
243 12:51:17.675746 Changing prompt to 'Starting depthcharge on Helios...'
244 12:51:17.676242 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 12:51:17.677623 [Enter `^Ec?' for help]
246 12:51:18.285030
247 12:51:18.285641
248 12:51:18.295143 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 12:51:18.298787 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 12:51:18.305641 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 12:51:18.308503 CPU: AES supported, TXT NOT supported, VT supported
252 12:51:18.315493 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 12:51:18.319051 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 12:51:18.325891 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 12:51:18.328780 VBOOT: Loading verstage.
256 12:51:18.332282 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 12:51:18.338745 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 12:51:18.342027 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 12:51:18.345274 CBFS @ c08000 size 3f8000
260 12:51:18.352298 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 12:51:18.355329 CBFS: Locating 'fallback/verstage'
262 12:51:18.358814 CBFS: Found @ offset 10fb80 size 1072c
263 12:51:18.362395
264 12:51:18.362988
265 12:51:18.372404 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 12:51:18.386371 Probing TPM: . done!
267 12:51:18.389664 TPM ready after 0 ms
268 12:51:18.393272 Connected to device vid:did:rid of 1ae0:0028:00
269 12:51:18.403014 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
270 12:51:18.406843 Initialized TPM device CR50 revision 0
271 12:51:18.450126 tlcl_send_startup: Startup return code is 0
272 12:51:18.450789 TPM: setup succeeded
273 12:51:18.462753 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 12:51:18.466641 Chrome EC: UHEPI supported
275 12:51:18.469770 Phase 1
276 12:51:18.473307 FMAP: area GBB found @ c05000 (12288 bytes)
277 12:51:18.479953 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 12:51:18.483094 Phase 2
279 12:51:18.483558 Phase 3
280 12:51:18.486198 FMAP: area GBB found @ c05000 (12288 bytes)
281 12:51:18.493323 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 12:51:18.499823 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 12:51:18.503054 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 12:51:18.509318 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 12:51:18.525129 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 12:51:18.528572 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 12:51:18.535370 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 12:51:18.539461 Phase 4
289 12:51:18.542726 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 12:51:18.549443 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 12:51:18.728923 VB2:vb2_rsa_verify_digest() Digest check failed!
292 12:51:18.732659 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 12:51:18.736399 Saving nvdata
294 12:51:18.739465 Reboot requested (10020007)
295 12:51:18.742575 board_reset() called!
296 12:51:18.743155 full_reset() called!
297 12:51:23.252398
298 12:51:23.252939
299 12:51:23.262323 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 12:51:23.265667 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 12:51:23.272695 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 12:51:23.275952 CPU: AES supported, TXT NOT supported, VT supported
303 12:51:23.283044 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 12:51:23.286009 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 12:51:23.292755 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 12:51:23.295837 VBOOT: Loading verstage.
307 12:51:23.299123 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 12:51:23.305850 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 12:51:23.309150 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 12:51:23.312605 CBFS @ c08000 size 3f8000
311 12:51:23.319378 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 12:51:23.322414 CBFS: Locating 'fallback/verstage'
313 12:51:23.325560 CBFS: Found @ offset 10fb80 size 1072c
314 12:51:23.328848
315 12:51:23.328933
316 12:51:23.339179 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 12:51:23.353401 Probing TPM: . done!
318 12:51:23.357048 TPM ready after 0 ms
319 12:51:23.359988 Connected to device vid:did:rid of 1ae0:0028:00
320 12:51:23.370390 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 12:51:23.373710 Initialized TPM device CR50 revision 0
322 12:51:23.417739 tlcl_send_startup: Startup return code is 0
323 12:51:23.418324 TPM: setup succeeded
324 12:51:23.430522 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 12:51:23.434428 Chrome EC: UHEPI supported
326 12:51:23.437643 Phase 1
327 12:51:23.440844 FMAP: area GBB found @ c05000 (12288 bytes)
328 12:51:23.447440 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 12:51:23.454228 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 12:51:23.457365 Recovery requested (1009000e)
331 12:51:23.463420 Saving nvdata
332 12:51:23.469372 tlcl_extend: response is 0
333 12:51:23.477922 tlcl_extend: response is 0
334 12:51:23.485164 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 12:51:23.488214 CBFS @ c08000 size 3f8000
336 12:51:23.494668 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 12:51:23.498744 CBFS: Locating 'fallback/romstage'
338 12:51:23.501469 CBFS: Found @ offset 80 size 145fc
339 12:51:23.505086 Accumulated console time in verstage 98 ms
340 12:51:23.505586
341 12:51:23.505976
342 12:51:23.518385 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 12:51:23.525020 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 12:51:23.528509 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:51:23.531531 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:51:23.538027 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 12:51:23.541139 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 12:51:23.544733 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 12:51:23.547894 TCO_STS: 0000 0000
350 12:51:23.551392 GEN_PMCON: e0015238 00000200
351 12:51:23.554510 GBLRST_CAUSE: 00000000 00000000
352 12:51:23.554995 prev_sleep_state 5
353 12:51:23.557937 Boot Count incremented to 57219
354 12:51:23.564604 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 12:51:23.567874 CBFS @ c08000 size 3f8000
356 12:51:23.574412 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 12:51:23.574909 CBFS: Locating 'fspm.bin'
358 12:51:23.578269 CBFS: Found @ offset 5ffc0 size 71000
359 12:51:23.581901 Chrome EC: UHEPI supported
360 12:51:23.589496 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 12:51:23.594166 Probing TPM: done!
362 12:51:23.600885 Connected to device vid:did:rid of 1ae0:0028:00
363 12:51:23.610704 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
364 12:51:23.617123 Initialized TPM device CR50 revision 0
365 12:51:23.625925 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 12:51:23.635723 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 12:51:23.635824 MRC cache found, size 1948
368 12:51:23.639501 bootmode is set to: 2
369 12:51:23.642456 PRMRR disabled by config.
370 12:51:23.645545 SPD INDEX = 1
371 12:51:23.649053 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 12:51:23.652336 CBFS @ c08000 size 3f8000
373 12:51:23.659222 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 12:51:23.659354 CBFS: Locating 'spd.bin'
375 12:51:23.662373 CBFS: Found @ offset 5fb80 size 400
376 12:51:23.665743 SPD: module type is LPDDR3
377 12:51:23.668782 SPD: module part is
378 12:51:23.675735 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 12:51:23.678755 SPD: device width 4 bits, bus width 8 bits
380 12:51:23.682441 SPD: module size is 4096 MB (per channel)
381 12:51:23.685925 memory slot: 0 configuration done.
382 12:51:23.688732 memory slot: 2 configuration done.
383 12:51:23.740134 CBMEM:
384 12:51:23.743684 IMD: root @ 99fff000 254 entries.
385 12:51:23.746782 IMD: root @ 99ffec00 62 entries.
386 12:51:23.750510 External stage cache:
387 12:51:23.753607 IMD: root @ 9abff000 254 entries.
388 12:51:23.757704 IMD: root @ 9abfec00 62 entries.
389 12:51:23.764181 Chrome EC: clear events_b mask to 0x0000000020004000
390 12:51:23.776433 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 12:51:23.790148 tlcl_write: response is 0
392 12:51:23.798804 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 12:51:23.805850 MRC: TPM MRC hash updated successfully.
394 12:51:23.806436 2 DIMMs found
395 12:51:23.809081 SMM Memory Map
396 12:51:23.812004 SMRAM : 0x9a000000 0x1000000
397 12:51:23.815743 Subregion 0: 0x9a000000 0xa00000
398 12:51:23.819037 Subregion 1: 0x9aa00000 0x200000
399 12:51:23.822175 Subregion 2: 0x9ac00000 0x400000
400 12:51:23.825696 top_of_ram = 0x9a000000
401 12:51:23.828887 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 12:51:23.835416 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 12:51:23.838916 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 12:51:23.845416 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 12:51:23.848449 CBFS @ c08000 size 3f8000
406 12:51:23.852051 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 12:51:23.855222 CBFS: Locating 'fallback/postcar'
408 12:51:23.858901 CBFS: Found @ offset 107000 size 4b44
409 12:51:23.865601 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 12:51:23.877865 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 12:51:23.881254 Processing 180 relocs. Offset value of 0x97c0c000
412 12:51:23.889853 Accumulated console time in romstage 286 ms
413 12:51:23.890446
414 12:51:23.890837
415 12:51:23.899383 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 12:51:23.905986 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 12:51:23.909397 CBFS @ c08000 size 3f8000
418 12:51:23.916012 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 12:51:23.919072 CBFS: Locating 'fallback/ramstage'
420 12:51:23.922555 CBFS: Found @ offset 43380 size 1b9e8
421 12:51:23.928880 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 12:51:23.961221 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 12:51:23.964708 Processing 3976 relocs. Offset value of 0x98db0000
424 12:51:23.971277 Accumulated console time in postcar 52 ms
425 12:51:23.971800
426 12:51:23.972228
427 12:51:23.980970 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 12:51:23.988093 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 12:51:23.991196 WARNING: RO_VPD is uninitialized or empty.
430 12:51:23.994813 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 12:51:24.001564 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 12:51:24.002184 Normal boot.
433 12:51:24.007628 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 12:51:24.011018 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 12:51:24.014493 CBFS @ c08000 size 3f8000
436 12:51:24.020950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 12:51:24.024279 CBFS: Locating 'cpu_microcode_blob.bin'
438 12:51:24.027690 CBFS: Found @ offset 14700 size 2ec00
439 12:51:24.030953 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 12:51:24.034248 Skip microcode update
441 12:51:24.037718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:51:24.040872 CBFS @ c08000 size 3f8000
443 12:51:24.047614 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:51:24.050665 CBFS: Locating 'fsps.bin'
445 12:51:24.054016 CBFS: Found @ offset d1fc0 size 35000
446 12:51:24.079808 Detected 4 core, 8 thread CPU.
447 12:51:24.082875 Setting up SMI for CPU
448 12:51:24.085882 IED base = 0x9ac00000
449 12:51:24.086450 IED size = 0x00400000
450 12:51:24.089104 Will perform SMM setup.
451 12:51:24.096242 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 12:51:24.102099 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 12:51:24.105467 Processing 16 relocs. Offset value of 0x00030000
454 12:51:24.109396 Attempting to start 7 APs
455 12:51:24.112334 Waiting for 10ms after sending INIT.
456 12:51:24.128746 Waiting for 1st SIPI to complete...done.
457 12:51:24.128853 AP: slot 3 apic_id 1.
458 12:51:24.135123 Waiting for 2nd SIPI to complete...done.
459 12:51:24.135240 AP: slot 4 apic_id 2.
460 12:51:24.138890 AP: slot 1 apic_id 3.
461 12:51:24.141846 AP: slot 7 apic_id 7.
462 12:51:24.142016 AP: slot 6 apic_id 6.
463 12:51:24.145410 AP: slot 2 apic_id 5.
464 12:51:24.148770 AP: slot 5 apic_id 4.
465 12:51:24.155386 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 12:51:24.161990 Processing 13 relocs. Offset value of 0x00038000
467 12:51:24.165259 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 12:51:24.171977 Installing SMM handler to 0x9a000000
469 12:51:24.178988 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 12:51:24.181923 Processing 658 relocs. Offset value of 0x9a010000
471 12:51:24.192687 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 12:51:24.195649 Processing 13 relocs. Offset value of 0x9a008000
473 12:51:24.202452 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 12:51:24.208892 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 12:51:24.211723 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 12:51:24.218676 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 12:51:24.225159 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 12:51:24.231705 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 12:51:24.235296 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 12:51:24.241527 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 12:51:24.244920 Clearing SMI status registers
482 12:51:24.248689 SMI_STS: PM1
483 12:51:24.249231 PM1_STS: PWRBTN
484 12:51:24.251769 TCO_STS: SECOND_TO
485 12:51:24.255053 New SMBASE 0x9a000000
486 12:51:24.258304 In relocation handler: CPU 0
487 12:51:24.261757 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 12:51:24.264923 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 12:51:24.268447 Relocation complete.
490 12:51:24.271492 New SMBASE 0x99fff400
491 12:51:24.272056 In relocation handler: CPU 3
492 12:51:24.278066 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 12:51:24.281632 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 12:51:24.284844 Relocation complete.
495 12:51:24.288476 New SMBASE 0x99fff000
496 12:51:24.288995 In relocation handler: CPU 4
497 12:51:24.294620 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
498 12:51:24.298048 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 12:51:24.301542 Relocation complete.
500 12:51:24.302019 New SMBASE 0x99fffc00
501 12:51:24.304839 In relocation handler: CPU 1
502 12:51:24.311476 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
503 12:51:24.314822 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 12:51:24.318128 Relocation complete.
505 12:51:24.318580 New SMBASE 0x99ffe800
506 12:51:24.321729 In relocation handler: CPU 6
507 12:51:24.324702 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
508 12:51:24.331210 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 12:51:24.335151 Relocation complete.
510 12:51:24.335598 New SMBASE 0x99ffe400
511 12:51:24.338070 In relocation handler: CPU 7
512 12:51:24.341518 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
513 12:51:24.347884 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 12:51:24.351353 Relocation complete.
515 12:51:24.351767 New SMBASE 0x99fff800
516 12:51:24.354901 In relocation handler: CPU 2
517 12:51:24.357755 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
518 12:51:24.364745 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 12:51:24.365202 Relocation complete.
520 12:51:24.367904 New SMBASE 0x99ffec00
521 12:51:24.371196 In relocation handler: CPU 5
522 12:51:24.374825 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
523 12:51:24.381244 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 12:51:24.381706 Relocation complete.
525 12:51:24.384595 Initializing CPU #0
526 12:51:24.387818 CPU: vendor Intel device 806ec
527 12:51:24.391779 CPU: family 06, model 8e, stepping 0c
528 12:51:24.394686 Clearing out pending MCEs
529 12:51:24.398198 Setting up local APIC...
530 12:51:24.398787 apic_id: 0x00 done.
531 12:51:24.401386 Turbo is available but hidden
532 12:51:24.404889 Turbo is available and visible
533 12:51:24.408066 VMX status: enabled
534 12:51:24.411031 IA32_FEATURE_CONTROL status: locked
535 12:51:24.414436 Skip microcode update
536 12:51:24.414934 CPU #0 initialized
537 12:51:24.417607 Initializing CPU #3
538 12:51:24.418103 Initializing CPU #2
539 12:51:24.420948 Initializing CPU #5
540 12:51:24.424468 CPU: vendor Intel device 806ec
541 12:51:24.427365 CPU: family 06, model 8e, stepping 0c
542 12:51:24.430746 CPU: vendor Intel device 806ec
543 12:51:24.434560 CPU: family 06, model 8e, stepping 0c
544 12:51:24.437467 Clearing out pending MCEs
545 12:51:24.440740 Initializing CPU #6
546 12:51:24.441205 Initializing CPU #7
547 12:51:24.444154 CPU: vendor Intel device 806ec
548 12:51:24.447770 CPU: family 06, model 8e, stepping 0c
549 12:51:24.450893 Initializing CPU #1
550 12:51:24.454519 Initializing CPU #4
551 12:51:24.457383 CPU: vendor Intel device 806ec
552 12:51:24.460658 CPU: family 06, model 8e, stepping 0c
553 12:51:24.464399 CPU: vendor Intel device 806ec
554 12:51:24.467252 CPU: family 06, model 8e, stepping 0c
555 12:51:24.470636 Clearing out pending MCEs
556 12:51:24.471087 Clearing out pending MCEs
557 12:51:24.474320 Setting up local APIC...
558 12:51:24.477351 CPU: vendor Intel device 806ec
559 12:51:24.480619 CPU: family 06, model 8e, stepping 0c
560 12:51:24.484349 Clearing out pending MCEs
561 12:51:24.487500 apic_id: 0x02 done.
562 12:51:24.487997 Setting up local APIC...
563 12:51:24.490554 CPU: vendor Intel device 806ec
564 12:51:24.494152 CPU: family 06, model 8e, stepping 0c
565 12:51:24.497762 Clearing out pending MCEs
566 12:51:24.500478 Clearing out pending MCEs
567 12:51:24.504032 Setting up local APIC...
568 12:51:24.507204 Setting up local APIC...
569 12:51:24.507702 apic_id: 0x06 done.
570 12:51:24.510717 Setting up local APIC...
571 12:51:24.513978 VMX status: enabled
572 12:51:24.514481 apic_id: 0x03 done.
573 12:51:24.517096 IA32_FEATURE_CONTROL status: locked
574 12:51:24.520687 VMX status: enabled
575 12:51:24.523712 VMX status: enabled
576 12:51:24.524159 apic_id: 0x07 done.
577 12:51:24.527047 IA32_FEATURE_CONTROL status: locked
578 12:51:24.530584 VMX status: enabled
579 12:51:24.533741 Skip microcode update
580 12:51:24.534194 apic_id: 0x01 done.
581 12:51:24.536808 Skip microcode update
582 12:51:24.540587 IA32_FEATURE_CONTROL status: locked
583 12:51:24.543633 CPU #4 initialized
584 12:51:24.544084 Skip microcode update
585 12:51:24.547337 VMX status: enabled
586 12:51:24.547922 CPU #6 initialized
587 12:51:24.554096 IA32_FEATURE_CONTROL status: locked
588 12:51:24.557005 IA32_FEATURE_CONTROL status: locked
589 12:51:24.557530 Clearing out pending MCEs
590 12:51:24.560818 Skip microcode update
591 12:51:24.564184 Setting up local APIC...
592 12:51:24.567082 Skip microcode update
593 12:51:24.567678 apic_id: 0x04 done.
594 12:51:24.570406 Setting up local APIC...
595 12:51:24.570995 CPU #7 initialized
596 12:51:24.573662 CPU #1 initialized
597 12:51:24.576850 VMX status: enabled
598 12:51:24.577349 apic_id: 0x05 done.
599 12:51:24.580534 IA32_FEATURE_CONTROL status: locked
600 12:51:24.583665 VMX status: enabled
601 12:51:24.587006 Skip microcode update
602 12:51:24.590320 IA32_FEATURE_CONTROL status: locked
603 12:51:24.590817 CPU #5 initialized
604 12:51:24.594074 Skip microcode update
605 12:51:24.596857 CPU #3 initialized
606 12:51:24.597358 CPU #2 initialized
607 12:51:24.600194 bsp_do_flight_plan done after 465 msecs.
608 12:51:24.603549 CPU: frequency set to 4200 MHz
609 12:51:24.606993 Enabling SMIs.
610 12:51:24.607487 Locking SMM.
611 12:51:24.622738 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 12:51:24.626013 CBFS @ c08000 size 3f8000
613 12:51:24.632875 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 12:51:24.633331 CBFS: Locating 'vbt.bin'
615 12:51:24.635872 CBFS: Found @ offset 5f5c0 size 499
616 12:51:24.642744 Found a VBT of 4608 bytes after decompression
617 12:51:24.822814 Display FSP Version Info HOB
618 12:51:24.826201 Reference Code - CPU = 9.0.1e.30
619 12:51:24.829760 uCode Version = 0.0.0.ca
620 12:51:24.832926 TXT ACM version = ff.ff.ff.ffff
621 12:51:24.835974 Display FSP Version Info HOB
622 12:51:24.839388 Reference Code - ME = 9.0.1e.30
623 12:51:24.842694 MEBx version = 0.0.0.0
624 12:51:24.846318 ME Firmware Version = Consumer SKU
625 12:51:24.848981 Display FSP Version Info HOB
626 12:51:24.852488 Reference Code - CML PCH = 9.0.1e.30
627 12:51:24.855992 PCH-CRID Status = Disabled
628 12:51:24.859130 PCH-CRID Original Value = ff.ff.ff.ffff
629 12:51:24.862959 PCH-CRID New Value = ff.ff.ff.ffff
630 12:51:24.865925 OPROM - RST - RAID = ff.ff.ff.ffff
631 12:51:24.869593 ChipsetInit Base Version = ff.ff.ff.ffff
632 12:51:24.872533 ChipsetInit Oem Version = ff.ff.ff.ffff
633 12:51:24.875777 Display FSP Version Info HOB
634 12:51:24.882242 Reference Code - SA - System Agent = 9.0.1e.30
635 12:51:24.885984 Reference Code - MRC = 0.7.1.6c
636 12:51:24.886565 SA - PCIe Version = 9.0.1e.30
637 12:51:24.889049 SA-CRID Status = Disabled
638 12:51:24.892198 SA-CRID Original Value = 0.0.0.c
639 12:51:24.895326 SA-CRID New Value = 0.0.0.c
640 12:51:24.899103 OPROM - VBIOS = ff.ff.ff.ffff
641 12:51:24.902287 RTC Init
642 12:51:24.905524 Set power on after power failure.
643 12:51:24.906187 Disabling Deep S3
644 12:51:24.908647 Disabling Deep S3
645 12:51:24.909144 Disabling Deep S4
646 12:51:24.912173 Disabling Deep S4
647 12:51:24.915855 Disabling Deep S5
648 12:51:24.916384 Disabling Deep S5
649 12:51:24.922302 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
650 12:51:24.922817 Enumerating buses...
651 12:51:24.928878 Show all devs... Before device enumeration.
652 12:51:24.929458 Root Device: enabled 1
653 12:51:24.931931 CPU_CLUSTER: 0: enabled 1
654 12:51:24.935165 DOMAIN: 0000: enabled 1
655 12:51:24.939041 APIC: 00: enabled 1
656 12:51:24.939629 PCI: 00:00.0: enabled 1
657 12:51:24.941981 PCI: 00:02.0: enabled 1
658 12:51:24.945637 PCI: 00:04.0: enabled 0
659 12:51:24.948720 PCI: 00:05.0: enabled 0
660 12:51:24.949217 PCI: 00:12.0: enabled 1
661 12:51:24.952111 PCI: 00:12.5: enabled 0
662 12:51:24.955411 PCI: 00:12.6: enabled 0
663 12:51:24.955910 PCI: 00:14.0: enabled 1
664 12:51:24.958496 PCI: 00:14.1: enabled 0
665 12:51:24.961740 PCI: 00:14.3: enabled 1
666 12:51:24.965191 PCI: 00:14.5: enabled 0
667 12:51:24.965783 PCI: 00:15.0: enabled 1
668 12:51:24.968224 PCI: 00:15.1: enabled 1
669 12:51:24.971645 PCI: 00:15.2: enabled 0
670 12:51:24.974967 PCI: 00:15.3: enabled 0
671 12:51:24.975506 PCI: 00:16.0: enabled 1
672 12:51:24.978334 PCI: 00:16.1: enabled 0
673 12:51:24.981521 PCI: 00:16.2: enabled 0
674 12:51:24.985032 PCI: 00:16.3: enabled 0
675 12:51:24.985477 PCI: 00:16.4: enabled 0
676 12:51:24.988193 PCI: 00:16.5: enabled 0
677 12:51:24.991586 PCI: 00:17.0: enabled 1
678 12:51:24.994991 PCI: 00:19.0: enabled 1
679 12:51:24.995443 PCI: 00:19.1: enabled 0
680 12:51:24.997936 PCI: 00:19.2: enabled 0
681 12:51:25.001144 PCI: 00:1a.0: enabled 0
682 12:51:25.001590 PCI: 00:1c.0: enabled 0
683 12:51:25.004885 PCI: 00:1c.1: enabled 0
684 12:51:25.007988 PCI: 00:1c.2: enabled 0
685 12:51:25.011583 PCI: 00:1c.3: enabled 0
686 12:51:25.012031 PCI: 00:1c.4: enabled 0
687 12:51:25.014665 PCI: 00:1c.5: enabled 0
688 12:51:25.018236 PCI: 00:1c.6: enabled 0
689 12:51:25.021444 PCI: 00:1c.7: enabled 0
690 12:51:25.021910 PCI: 00:1d.0: enabled 1
691 12:51:25.024567 PCI: 00:1d.1: enabled 0
692 12:51:25.028270 PCI: 00:1d.2: enabled 0
693 12:51:25.030722 PCI: 00:1d.3: enabled 0
694 12:51:25.031172 PCI: 00:1d.4: enabled 0
695 12:51:25.034484 PCI: 00:1d.5: enabled 1
696 12:51:25.037619 PCI: 00:1e.0: enabled 1
697 12:51:25.041228 PCI: 00:1e.1: enabled 0
698 12:51:25.041760 PCI: 00:1e.2: enabled 1
699 12:51:25.044257 PCI: 00:1e.3: enabled 1
700 12:51:25.047959 PCI: 00:1f.0: enabled 1
701 12:51:25.048463 PCI: 00:1f.1: enabled 1
702 12:51:25.050731 PCI: 00:1f.2: enabled 1
703 12:51:25.054027 PCI: 00:1f.3: enabled 1
704 12:51:25.057685 PCI: 00:1f.4: enabled 1
705 12:51:25.058153 PCI: 00:1f.5: enabled 1
706 12:51:25.060907 PCI: 00:1f.6: enabled 0
707 12:51:25.064114 USB0 port 0: enabled 1
708 12:51:25.067680 I2C: 00:15: enabled 1
709 12:51:25.068127 I2C: 00:5d: enabled 1
710 12:51:25.070793 GENERIC: 0.0: enabled 1
711 12:51:25.074245 I2C: 00:1a: enabled 1
712 12:51:25.074705 I2C: 00:38: enabled 1
713 12:51:25.077551 I2C: 00:39: enabled 1
714 12:51:25.080470 I2C: 00:3a: enabled 1
715 12:51:25.080934 I2C: 00:3b: enabled 1
716 12:51:25.084214 PCI: 00:00.0: enabled 1
717 12:51:25.087509 SPI: 00: enabled 1
718 12:51:25.087957 SPI: 01: enabled 1
719 12:51:25.091070 PNP: 0c09.0: enabled 1
720 12:51:25.093964 USB2 port 0: enabled 1
721 12:51:25.094433 USB2 port 1: enabled 1
722 12:51:25.097294 USB2 port 2: enabled 0
723 12:51:25.100400 USB2 port 3: enabled 0
724 12:51:25.100851 USB2 port 5: enabled 0
725 12:51:25.103984 USB2 port 6: enabled 1
726 12:51:25.107082 USB2 port 9: enabled 1
727 12:51:25.110669 USB3 port 0: enabled 1
728 12:51:25.111117 USB3 port 1: enabled 1
729 12:51:25.113694 USB3 port 2: enabled 1
730 12:51:25.117063 USB3 port 3: enabled 1
731 12:51:25.117514 USB3 port 4: enabled 0
732 12:51:25.120570 APIC: 03: enabled 1
733 12:51:25.123826 APIC: 05: enabled 1
734 12:51:25.124275 APIC: 01: enabled 1
735 12:51:25.127055 APIC: 02: enabled 1
736 12:51:25.127529 APIC: 04: enabled 1
737 12:51:25.130260 APIC: 06: enabled 1
738 12:51:25.133478 APIC: 07: enabled 1
739 12:51:25.133985 Compare with tree...
740 12:51:25.137153 Root Device: enabled 1
741 12:51:25.140500 CPU_CLUSTER: 0: enabled 1
742 12:51:25.143518 APIC: 00: enabled 1
743 12:51:25.143959 APIC: 03: enabled 1
744 12:51:25.146960 APIC: 05: enabled 1
745 12:51:25.150253 APIC: 01: enabled 1
746 12:51:25.150697 APIC: 02: enabled 1
747 12:51:25.153563 APIC: 04: enabled 1
748 12:51:25.156922 APIC: 06: enabled 1
749 12:51:25.157365 APIC: 07: enabled 1
750 12:51:25.160532 DOMAIN: 0000: enabled 1
751 12:51:25.163861 PCI: 00:00.0: enabled 1
752 12:51:25.166985 PCI: 00:02.0: enabled 1
753 12:51:25.167429 PCI: 00:04.0: enabled 0
754 12:51:25.170236 PCI: 00:05.0: enabled 0
755 12:51:25.173658 PCI: 00:12.0: enabled 1
756 12:51:25.176817 PCI: 00:12.5: enabled 0
757 12:51:25.180517 PCI: 00:12.6: enabled 0
758 12:51:25.180963 PCI: 00:14.0: enabled 1
759 12:51:25.183568 USB0 port 0: enabled 1
760 12:51:25.187172 USB2 port 0: enabled 1
761 12:51:25.190168 USB2 port 1: enabled 1
762 12:51:25.193270 USB2 port 2: enabled 0
763 12:51:25.193779 USB2 port 3: enabled 0
764 12:51:25.197024 USB2 port 5: enabled 0
765 12:51:25.200602 USB2 port 6: enabled 1
766 12:51:25.203440 USB2 port 9: enabled 1
767 12:51:25.207086 USB3 port 0: enabled 1
768 12:51:25.210456 USB3 port 1: enabled 1
769 12:51:25.210998 USB3 port 2: enabled 1
770 12:51:25.213059 USB3 port 3: enabled 1
771 12:51:25.216524 USB3 port 4: enabled 0
772 12:51:25.220274 PCI: 00:14.1: enabled 0
773 12:51:25.223618 PCI: 00:14.3: enabled 1
774 12:51:25.224181 PCI: 00:14.5: enabled 0
775 12:51:25.226893 PCI: 00:15.0: enabled 1
776 12:51:25.230119 I2C: 00:15: enabled 1
777 12:51:25.233220 PCI: 00:15.1: enabled 1
778 12:51:25.236576 I2C: 00:5d: enabled 1
779 12:51:25.237078 GENERIC: 0.0: enabled 1
780 12:51:25.239775 PCI: 00:15.2: enabled 0
781 12:51:25.243106 PCI: 00:15.3: enabled 0
782 12:51:25.246261 PCI: 00:16.0: enabled 1
783 12:51:25.249925 PCI: 00:16.1: enabled 0
784 12:51:25.250427 PCI: 00:16.2: enabled 0
785 12:51:25.252953 PCI: 00:16.3: enabled 0
786 12:51:25.256232 PCI: 00:16.4: enabled 0
787 12:51:25.260688 PCI: 00:16.5: enabled 0
788 12:51:25.263167 PCI: 00:17.0: enabled 1
789 12:51:25.263666 PCI: 00:19.0: enabled 1
790 12:51:25.266630 I2C: 00:1a: enabled 1
791 12:51:25.270383 I2C: 00:38: enabled 1
792 12:51:25.273187 I2C: 00:39: enabled 1
793 12:51:25.273688 I2C: 00:3a: enabled 1
794 12:51:25.276454 I2C: 00:3b: enabled 1
795 12:51:25.279658 PCI: 00:19.1: enabled 0
796 12:51:25.282678 PCI: 00:19.2: enabled 0
797 12:51:25.283130 PCI: 00:1a.0: enabled 0
798 12:51:25.286270 PCI: 00:1c.0: enabled 0
799 12:51:25.289898 PCI: 00:1c.1: enabled 0
800 12:51:25.293014 PCI: 00:1c.2: enabled 0
801 12:51:25.296065 PCI: 00:1c.3: enabled 0
802 12:51:25.296577 PCI: 00:1c.4: enabled 0
803 12:51:25.299383 PCI: 00:1c.5: enabled 0
804 12:51:25.302853 PCI: 00:1c.6: enabled 0
805 12:51:25.306395 PCI: 00:1c.7: enabled 0
806 12:51:25.309474 PCI: 00:1d.0: enabled 1
807 12:51:25.309929 PCI: 00:1d.1: enabled 0
808 12:51:25.312610 PCI: 00:1d.2: enabled 0
809 12:51:25.315618 PCI: 00:1d.3: enabled 0
810 12:51:25.319046 PCI: 00:1d.4: enabled 0
811 12:51:25.322843 PCI: 00:1d.5: enabled 1
812 12:51:25.323309 PCI: 00:00.0: enabled 1
813 12:51:25.326004 PCI: 00:1e.0: enabled 1
814 12:51:25.329962 PCI: 00:1e.1: enabled 0
815 12:51:25.332777 PCI: 00:1e.2: enabled 1
816 12:51:25.333229 SPI: 00: enabled 1
817 12:51:25.335591 PCI: 00:1e.3: enabled 1
818 12:51:25.339111 SPI: 01: enabled 1
819 12:51:25.342293 PCI: 00:1f.0: enabled 1
820 12:51:25.346315 PNP: 0c09.0: enabled 1
821 12:51:25.346869 PCI: 00:1f.1: enabled 1
822 12:51:25.349095 PCI: 00:1f.2: enabled 1
823 12:51:25.352138 PCI: 00:1f.3: enabled 1
824 12:51:25.355654 PCI: 00:1f.4: enabled 1
825 12:51:25.356108 PCI: 00:1f.5: enabled 1
826 12:51:25.358751 PCI: 00:1f.6: enabled 0
827 12:51:25.362456 Root Device scanning...
828 12:51:25.365733 scan_static_bus for Root Device
829 12:51:25.369035 CPU_CLUSTER: 0 enabled
830 12:51:25.369503 DOMAIN: 0000 enabled
831 12:51:25.372594 DOMAIN: 0000 scanning...
832 12:51:25.375845 PCI: pci_scan_bus for bus 00
833 12:51:25.378859 PCI: 00:00.0 [8086/0000] ops
834 12:51:25.382325 PCI: 00:00.0 [8086/9b61] enabled
835 12:51:25.385415 PCI: 00:02.0 [8086/0000] bus ops
836 12:51:25.389085 PCI: 00:02.0 [8086/9b41] enabled
837 12:51:25.392137 PCI: 00:04.0 [8086/1903] disabled
838 12:51:25.395814 PCI: 00:08.0 [8086/1911] enabled
839 12:51:25.398929 PCI: 00:12.0 [8086/02f9] enabled
840 12:51:25.402208 PCI: 00:14.0 [8086/0000] bus ops
841 12:51:25.405678 PCI: 00:14.0 [8086/02ed] enabled
842 12:51:25.408658 PCI: 00:14.2 [8086/02ef] enabled
843 12:51:25.412488 PCI: 00:14.3 [8086/02f0] enabled
844 12:51:25.415568 PCI: 00:15.0 [8086/0000] bus ops
845 12:51:25.418705 PCI: 00:15.0 [8086/02e8] enabled
846 12:51:25.422351 PCI: 00:15.1 [8086/0000] bus ops
847 12:51:25.425414 PCI: 00:15.1 [8086/02e9] enabled
848 12:51:25.428549 PCI: 00:16.0 [8086/0000] ops
849 12:51:25.432201 PCI: 00:16.0 [8086/02e0] enabled
850 12:51:25.435365 PCI: 00:17.0 [8086/0000] ops
851 12:51:25.438907 PCI: 00:17.0 [8086/02d3] enabled
852 12:51:25.442219 PCI: 00:19.0 [8086/0000] bus ops
853 12:51:25.445453 PCI: 00:19.0 [8086/02c5] enabled
854 12:51:25.448368 PCI: 00:1d.0 [8086/0000] bus ops
855 12:51:25.451829 PCI: 00:1d.0 [8086/02b0] enabled
856 12:51:25.458650 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 12:51:25.461953 PCI: 00:1e.0 [8086/0000] ops
858 12:51:25.462443 PCI: 00:1e.0 [8086/02a8] enabled
859 12:51:25.465062 PCI: 00:1e.2 [8086/0000] bus ops
860 12:51:25.468851 PCI: 00:1e.2 [8086/02aa] enabled
861 12:51:25.471771 PCI: 00:1e.3 [8086/0000] bus ops
862 12:51:25.474987 PCI: 00:1e.3 [8086/02ab] enabled
863 12:51:25.478720 PCI: 00:1f.0 [8086/0000] bus ops
864 12:51:25.481924 PCI: 00:1f.0 [8086/0284] enabled
865 12:51:25.488576 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 12:51:25.495100 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 12:51:25.498371 PCI: 00:1f.3 [8086/0000] bus ops
868 12:51:25.501919 PCI: 00:1f.3 [8086/02c8] enabled
869 12:51:25.505011 PCI: 00:1f.4 [8086/0000] bus ops
870 12:51:25.508560 PCI: 00:1f.4 [8086/02a3] enabled
871 12:51:25.511495 PCI: 00:1f.5 [8086/0000] bus ops
872 12:51:25.515128 PCI: 00:1f.5 [8086/02a4] enabled
873 12:51:25.518610 PCI: Leftover static devices:
874 12:51:25.519051 PCI: 00:05.0
875 12:51:25.521660 PCI: 00:12.5
876 12:51:25.522102 PCI: 00:12.6
877 12:51:25.522449 PCI: 00:14.1
878 12:51:25.525242 PCI: 00:14.5
879 12:51:25.525693 PCI: 00:15.2
880 12:51:25.528334 PCI: 00:15.3
881 12:51:25.528780 PCI: 00:16.1
882 12:51:25.531663 PCI: 00:16.2
883 12:51:25.532209 PCI: 00:16.3
884 12:51:25.532605 PCI: 00:16.4
885 12:51:25.535028 PCI: 00:16.5
886 12:51:25.535493 PCI: 00:19.1
887 12:51:25.538163 PCI: 00:19.2
888 12:51:25.538717 PCI: 00:1a.0
889 12:51:25.539071 PCI: 00:1c.0
890 12:51:25.541631 PCI: 00:1c.1
891 12:51:25.542133 PCI: 00:1c.2
892 12:51:25.544925 PCI: 00:1c.3
893 12:51:25.545409 PCI: 00:1c.4
894 12:51:25.545911 PCI: 00:1c.5
895 12:51:25.548481 PCI: 00:1c.6
896 12:51:25.548924 PCI: 00:1c.7
897 12:51:25.551296 PCI: 00:1d.1
898 12:51:25.551737 PCI: 00:1d.2
899 12:51:25.554870 PCI: 00:1d.3
900 12:51:25.555314 PCI: 00:1d.4
901 12:51:25.555661 PCI: 00:1d.5
902 12:51:25.558116 PCI: 00:1e.1
903 12:51:25.558557 PCI: 00:1f.1
904 12:51:25.561548 PCI: 00:1f.2
905 12:51:25.562062 PCI: 00:1f.6
906 12:51:25.564972 PCI: Check your devicetree.cb.
907 12:51:25.568097 PCI: 00:02.0 scanning...
908 12:51:25.571769 scan_generic_bus for PCI: 00:02.0
909 12:51:25.574762 scan_generic_bus for PCI: 00:02.0 done
910 12:51:25.581554 scan_bus: scanning of bus PCI: 00:02.0 took 10175 usecs
911 12:51:25.582172 PCI: 00:14.0 scanning...
912 12:51:25.584986 scan_static_bus for PCI: 00:14.0
913 12:51:25.587831 USB0 port 0 enabled
914 12:51:25.591635 USB0 port 0 scanning...
915 12:51:25.594646 scan_static_bus for USB0 port 0
916 12:51:25.597990 USB2 port 0 enabled
917 12:51:25.598491 USB2 port 1 enabled
918 12:51:25.601118 USB2 port 2 disabled
919 12:51:25.601571 USB2 port 3 disabled
920 12:51:25.604382 USB2 port 5 disabled
921 12:51:25.608008 USB2 port 6 enabled
922 12:51:25.608521 USB2 port 9 enabled
923 12:51:25.611468 USB3 port 0 enabled
924 12:51:25.614570 USB3 port 1 enabled
925 12:51:25.615039 USB3 port 2 enabled
926 12:51:25.617668 USB3 port 3 enabled
927 12:51:25.618122 USB3 port 4 disabled
928 12:51:25.621070 USB2 port 0 scanning...
929 12:51:25.624731 scan_static_bus for USB2 port 0
930 12:51:25.627667 scan_static_bus for USB2 port 0 done
931 12:51:25.634458 scan_bus: scanning of bus USB2 port 0 took 9697 usecs
932 12:51:25.638003 USB2 port 1 scanning...
933 12:51:25.641231 scan_static_bus for USB2 port 1
934 12:51:25.644759 scan_static_bus for USB2 port 1 done
935 12:51:25.647959 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
936 12:51:25.651040 USB2 port 6 scanning...
937 12:51:25.654662 scan_static_bus for USB2 port 6
938 12:51:25.658539 scan_static_bus for USB2 port 6 done
939 12:51:25.664597 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
940 12:51:25.667630 USB2 port 9 scanning...
941 12:51:25.670845 scan_static_bus for USB2 port 9
942 12:51:25.674654 scan_static_bus for USB2 port 9 done
943 12:51:25.677644 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
944 12:51:25.681405 USB3 port 0 scanning...
945 12:51:25.684187 scan_static_bus for USB3 port 0
946 12:51:25.688102 scan_static_bus for USB3 port 0 done
947 12:51:25.694195 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
948 12:51:25.697749 USB3 port 1 scanning...
949 12:51:25.700744 scan_static_bus for USB3 port 1
950 12:51:25.704190 scan_static_bus for USB3 port 1 done
951 12:51:25.710770 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
952 12:51:25.711227 USB3 port 2 scanning...
953 12:51:25.713887 scan_static_bus for USB3 port 2
954 12:51:25.717623 scan_static_bus for USB3 port 2 done
955 12:51:25.723968 scan_bus: scanning of bus USB3 port 2 took 9689 usecs
956 12:51:25.727402 USB3 port 3 scanning...
957 12:51:25.730423 scan_static_bus for USB3 port 3
958 12:51:25.733931 scan_static_bus for USB3 port 3 done
959 12:51:25.740691 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
960 12:51:25.743731 scan_static_bus for USB0 port 0 done
961 12:51:25.747443 scan_bus: scanning of bus USB0 port 0 took 155343 usecs
962 12:51:25.754066 scan_static_bus for PCI: 00:14.0 done
963 12:51:25.757452 scan_bus: scanning of bus PCI: 00:14.0 took 172959 usecs
964 12:51:25.760475 PCI: 00:15.0 scanning...
965 12:51:25.764045 scan_generic_bus for PCI: 00:15.0
966 12:51:25.767263 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 12:51:25.770424 scan_generic_bus for PCI: 00:15.0 done
968 12:51:25.777115 scan_bus: scanning of bus PCI: 00:15.0 took 14282 usecs
969 12:51:25.780727 PCI: 00:15.1 scanning...
970 12:51:25.784333 scan_generic_bus for PCI: 00:15.1
971 12:51:25.787111 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 12:51:25.793613 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 12:51:25.797398 scan_generic_bus for PCI: 00:15.1 done
974 12:51:25.800185 scan_bus: scanning of bus PCI: 00:15.1 took 18596 usecs
975 12:51:25.803496 PCI: 00:19.0 scanning...
976 12:51:25.807063 scan_generic_bus for PCI: 00:19.0
977 12:51:25.813776 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 12:51:25.816833 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 12:51:25.820402 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 12:51:25.823373 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 12:51:25.826839 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 12:51:25.833430 scan_generic_bus for PCI: 00:19.0 done
983 12:51:25.836956 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
984 12:51:25.839983 PCI: 00:1d.0 scanning...
985 12:51:25.843654 do_pci_scan_bridge for PCI: 00:1d.0
986 12:51:25.846660 PCI: pci_scan_bus for bus 01
987 12:51:25.849886 PCI: 01:00.0 [1c5c/1327] enabled
988 12:51:25.853344 Enabling Common Clock Configuration
989 12:51:25.859949 L1 Sub-State supported from root port 29
990 12:51:25.860433 L1 Sub-State Support = 0xf
991 12:51:25.863273 CommonModeRestoreTime = 0x28
992 12:51:25.870121 Power On Value = 0x16, Power On Scale = 0x0
993 12:51:25.870576 ASPM: Enabled L1
994 12:51:25.876662 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
995 12:51:25.879732 PCI: 00:1e.2 scanning...
996 12:51:25.883399 scan_generic_bus for PCI: 00:1e.2
997 12:51:25.886594 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 12:51:25.889896 scan_generic_bus for PCI: 00:1e.2 done
999 12:51:25.896442 scan_bus: scanning of bus PCI: 00:1e.2 took 14004 usecs
1000 12:51:25.897027 PCI: 00:1e.3 scanning...
1001 12:51:25.903563 scan_generic_bus for PCI: 00:1e.3
1002 12:51:25.906794 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 12:51:25.910042 scan_generic_bus for PCI: 00:1e.3 done
1004 12:51:25.916482 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1005 12:51:25.917063 PCI: 00:1f.0 scanning...
1006 12:51:25.919662 scan_static_bus for PCI: 00:1f.0
1007 12:51:25.923487 PNP: 0c09.0 enabled
1008 12:51:25.926674 scan_static_bus for PCI: 00:1f.0 done
1009 12:51:25.933201 scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs
1010 12:51:25.936776 PCI: 00:1f.3 scanning...
1011 12:51:25.939532 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1012 12:51:25.942995 PCI: 00:1f.4 scanning...
1013 12:51:25.946494 scan_generic_bus for PCI: 00:1f.4
1014 12:51:25.949784 scan_generic_bus for PCI: 00:1f.4 done
1015 12:51:25.956428 scan_bus: scanning of bus PCI: 00:1f.4 took 10167 usecs
1016 12:51:25.959452 PCI: 00:1f.5 scanning...
1017 12:51:25.962888 scan_generic_bus for PCI: 00:1f.5
1018 12:51:25.966300 scan_generic_bus for PCI: 00:1f.5 done
1019 12:51:25.972670 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1020 12:51:25.976064 scan_bus: scanning of bus DOMAIN: 0000 took 604920 usecs
1021 12:51:25.983002 scan_static_bus for Root Device done
1022 12:51:25.986531 scan_bus: scanning of bus Root Device took 624777 usecs
1023 12:51:25.989239 done
1024 12:51:25.992809 Chrome EC: UHEPI supported
1025 12:51:25.995666 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 12:51:26.002866 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 12:51:26.009109 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 12:51:26.015898 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 12:51:26.019071 SPI flash protection: WPSW=0 SRP0=0
1030 12:51:26.025755 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 12:51:26.029162 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1032 12:51:26.032770 found VGA at PCI: 00:02.0
1033 12:51:26.035819 Setting up VGA for PCI: 00:02.0
1034 12:51:26.042636 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 12:51:26.045826 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 12:51:26.049361 Allocating resources...
1037 12:51:26.049816 Reading resources...
1038 12:51:26.055523 Root Device read_resources bus 0 link: 0
1039 12:51:26.059064 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 12:51:26.066074 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 12:51:26.069350 DOMAIN: 0000 read_resources bus 0 link: 0
1042 12:51:26.076191 PCI: 00:14.0 read_resources bus 0 link: 0
1043 12:51:26.079472 USB0 port 0 read_resources bus 0 link: 0
1044 12:51:26.087423 USB0 port 0 read_resources bus 0 link: 0 done
1045 12:51:26.090455 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 12:51:26.098129 PCI: 00:15.0 read_resources bus 1 link: 0
1047 12:51:26.101546 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 12:51:26.107635 PCI: 00:15.1 read_resources bus 2 link: 0
1049 12:51:26.111172 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 12:51:26.118354 PCI: 00:19.0 read_resources bus 3 link: 0
1051 12:51:26.125174 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 12:51:26.128415 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 12:51:26.135093 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 12:51:26.138593 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 12:51:26.145245 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 12:51:26.148543 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 12:51:26.154914 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 12:51:26.158633 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 12:51:26.165275 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 12:51:26.171857 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 12:51:26.175033 Root Device read_resources bus 0 link: 0 done
1062 12:51:26.178475 Done reading resources.
1063 12:51:26.181785 Show resources in subtree (Root Device)...After reading.
1064 12:51:26.188840 Root Device child on link 0 CPU_CLUSTER: 0
1065 12:51:26.191783 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 12:51:26.192236 APIC: 00
1067 12:51:26.194841 APIC: 03
1068 12:51:26.195292 APIC: 05
1069 12:51:26.198376 APIC: 01
1070 12:51:26.198830 APIC: 02
1071 12:51:26.199187 APIC: 04
1072 12:51:26.201448 APIC: 06
1073 12:51:26.201899 APIC: 07
1074 12:51:26.205242 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 12:51:26.214829 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 12:51:26.271037 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 12:51:26.271150 PCI: 00:00.0
1078 12:51:26.271413 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 12:51:26.271673 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 12:51:26.271746 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 12:51:26.271998 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 12:51:26.293709 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 12:51:26.294182 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 12:51:26.297627 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 12:51:26.300869 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 12:51:26.311125 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 12:51:26.321114 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 12:51:26.330476 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 12:51:26.340423 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 12:51:26.347001 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 12:51:26.357104 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 12:51:26.367377 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 12:51:26.376883 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 12:51:26.377470 PCI: 00:02.0
1095 12:51:26.390528 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 12:51:26.399998 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 12:51:26.406757 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 12:51:26.409853 PCI: 00:04.0
1099 12:51:26.410345 PCI: 00:08.0
1100 12:51:26.420338 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 12:51:26.424023 PCI: 00:12.0
1102 12:51:26.433569 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 12:51:26.436815 PCI: 00:14.0 child on link 0 USB0 port 0
1104 12:51:26.446934 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 12:51:26.450181 USB0 port 0 child on link 0 USB2 port 0
1106 12:51:26.453174 USB2 port 0
1107 12:51:26.453712 USB2 port 1
1108 12:51:26.456637 USB2 port 2
1109 12:51:26.457137 USB2 port 3
1110 12:51:26.459915 USB2 port 5
1111 12:51:26.460464 USB2 port 6
1112 12:51:26.463077 USB2 port 9
1113 12:51:26.466578 USB3 port 0
1114 12:51:26.467094 USB3 port 1
1115 12:51:26.470300 USB3 port 2
1116 12:51:26.470888 USB3 port 3
1117 12:51:26.473842 USB3 port 4
1118 12:51:26.474426 PCI: 00:14.2
1119 12:51:26.483395 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 12:51:26.493258 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 12:51:26.496779 PCI: 00:14.3
1122 12:51:26.505955 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 12:51:26.509273 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 12:51:26.519391 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 12:51:26.519480 I2C: 01:15
1126 12:51:26.525686 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 12:51:26.535730 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 12:51:26.535825 I2C: 02:5d
1129 12:51:26.538949 GENERIC: 0.0
1130 12:51:26.539050 PCI: 00:16.0
1131 12:51:26.549157 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:51:26.552417 PCI: 00:17.0
1133 12:51:26.559131 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 12:51:26.568927 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 12:51:26.579310 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 12:51:26.585722 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 12:51:26.595936 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 12:51:26.602504 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 12:51:26.608985 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 12:51:26.619009 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 12:51:26.619590 I2C: 03:1a
1142 12:51:26.622256 I2C: 03:38
1143 12:51:26.622754 I2C: 03:39
1144 12:51:26.623147 I2C: 03:3a
1145 12:51:26.625916 I2C: 03:3b
1146 12:51:26.628858 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 12:51:26.638638 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 12:51:26.648651 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 12:51:26.658793 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 12:51:26.659263 PCI: 01:00.0
1151 12:51:26.668304 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 12:51:26.671860 PCI: 00:1e.0
1153 12:51:26.682016 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 12:51:26.691870 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 12:51:26.694911 PCI: 00:1e.2 child on link 0 SPI: 00
1156 12:51:26.705068 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 12:51:26.708923 SPI: 00
1158 12:51:26.711795 PCI: 00:1e.3 child on link 0 SPI: 01
1159 12:51:26.721663 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 12:51:26.722309 SPI: 01
1161 12:51:26.725221 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 12:51:26.735042 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 12:51:26.744716 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 12:51:26.745377 PNP: 0c09.0
1165 12:51:26.755062 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 12:51:26.755713 PCI: 00:1f.3
1167 12:51:26.764842 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 12:51:26.774577 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 12:51:26.778044 PCI: 00:1f.4
1170 12:51:26.787942 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 12:51:26.797986 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 12:51:26.798495 PCI: 00:1f.5
1173 12:51:26.808010 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 12:51:26.814800 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 12:51:26.821164 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 12:51:26.827880 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 12:51:26.831215 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 12:51:26.834730 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 12:51:26.837805 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 12:51:26.841163 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 12:51:26.847800 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 12:51:26.854484 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 12:51:26.864091 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 12:51:26.870992 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 12:51:26.877399 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 12:51:26.880825 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 12:51:26.890624 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 12:51:26.894049 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 12:51:26.900298 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 12:51:26.903536 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 12:51:26.910514 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 12:51:26.913791 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 12:51:26.920441 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 12:51:26.923430 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 12:51:26.927049 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 12:51:26.933244 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 12:51:26.936615 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 12:51:26.943388 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 12:51:26.947135 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 12:51:26.953282 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 12:51:26.956644 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 12:51:26.963046 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 12:51:26.966618 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 12:51:26.972993 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 12:51:26.976716 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 12:51:26.983292 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 12:51:26.986340 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 12:51:26.993138 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 12:51:26.996453 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 12:51:27.003368 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 12:51:27.009286 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 12:51:27.012909 avoid_fixed_resources: DOMAIN: 0000
1213 12:51:27.019259 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 12:51:27.026094 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 12:51:27.032942 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 12:51:27.039050 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 12:51:27.048935 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 12:51:27.055690 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 12:51:27.062062 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 12:51:27.072408 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 12:51:27.078566 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 12:51:27.085382 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 12:51:27.092410 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 12:51:27.101916 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 12:51:27.102445 Setting resources...
1226 12:51:27.108748 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 12:51:27.111945 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 12:51:27.118684 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 12:51:27.121915 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 12:51:27.125248 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 12:51:27.131794 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 12:51:27.138600 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 12:51:27.145054 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 12:51:27.152205 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 12:51:27.158557 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 12:51:27.162036 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 12:51:27.168159 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 12:51:27.172180 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 12:51:27.175365 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 12:51:27.181996 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 12:51:27.185030 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 12:51:27.192003 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 12:51:27.195295 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 12:51:27.201675 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 12:51:27.204702 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 12:51:27.211810 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 12:51:27.214835 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 12:51:27.221652 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 12:51:27.224807 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 12:51:27.231362 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 12:51:27.234639 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 12:51:27.241464 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 12:51:27.245019 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 12:51:27.248114 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 12:51:27.254479 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 12:51:27.257925 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 12:51:27.264857 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 12:51:27.270937 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 12:51:27.278520 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 12:51:27.288103 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 12:51:27.294248 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 12:51:27.297736 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 12:51:27.307750 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 12:51:27.310976 Root Device assign_resources, bus 0 link: 0
1265 12:51:27.314108 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 12:51:27.324231 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 12:51:27.330742 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 12:51:27.339962 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 12:51:27.346747 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 12:51:27.356738 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 12:51:27.363411 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 12:51:27.370144 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 12:51:27.373235 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 12:51:27.383254 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 12:51:27.390034 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 12:51:27.396747 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 12:51:27.406772 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 12:51:27.409870 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 12:51:27.416809 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 12:51:27.423445 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 12:51:27.430355 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 12:51:27.433665 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 12:51:27.440086 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 12:51:27.450648 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 12:51:27.456822 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 12:51:27.463856 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 12:51:27.473674 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 12:51:27.480146 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 12:51:27.486792 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 12:51:27.497024 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 12:51:27.500597 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 12:51:27.506956 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 12:51:27.513686 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 12:51:27.523244 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 12:51:27.534039 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 12:51:27.536802 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 12:51:27.543129 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 12:51:27.550200 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 12:51:27.556628 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 12:51:27.566510 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 12:51:27.569806 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 12:51:27.576678 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 12:51:27.582911 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 12:51:27.589615 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 12:51:27.592790 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 12:51:27.595885 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 12:51:27.603372 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 12:51:27.606910 LPC: Trying to open IO window from 800 size 1ff
1309 12:51:27.616500 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 12:51:27.623440 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 12:51:27.633223 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 12:51:27.640235 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 12:51:27.646275 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 12:51:27.649812 Root Device assign_resources, bus 0 link: 0
1315 12:51:27.652810 Done setting resources.
1316 12:51:27.659450 Show resources in subtree (Root Device)...After assigning values.
1317 12:51:27.662457 Root Device child on link 0 CPU_CLUSTER: 0
1318 12:51:27.665720 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 12:51:27.669000 APIC: 00
1320 12:51:27.669481 APIC: 03
1321 12:51:27.672217 APIC: 05
1322 12:51:27.672744 APIC: 01
1323 12:51:27.673197 APIC: 02
1324 12:51:27.675858 APIC: 04
1325 12:51:27.676426 APIC: 06
1326 12:51:27.676834 APIC: 07
1327 12:51:27.682183 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 12:51:27.691916 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 12:51:27.702450 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 12:51:27.705479 PCI: 00:00.0
1331 12:51:27.715156 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 12:51:27.721758 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 12:51:27.731902 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 12:51:27.741884 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 12:51:27.751898 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 12:51:27.761442 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 12:51:27.771470 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 12:51:27.777865 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 12:51:27.787408 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 12:51:27.797561 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 12:51:27.807248 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 12:51:27.817865 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 12:51:27.827560 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 12:51:27.837515 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 12:51:27.843652 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 12:51:27.853805 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 12:51:27.857031 PCI: 00:02.0
1348 12:51:27.866830 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 12:51:27.876720 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 12:51:27.886850 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 12:51:27.887344 PCI: 00:04.0
1352 12:51:27.890032 PCI: 00:08.0
1353 12:51:27.901087 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 12:51:27.901544 PCI: 00:12.0
1355 12:51:27.910508 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 12:51:27.916720 PCI: 00:14.0 child on link 0 USB0 port 0
1357 12:51:27.927007 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 12:51:27.929753 USB0 port 0 child on link 0 USB2 port 0
1359 12:51:27.933353 USB2 port 0
1360 12:51:27.933871 USB2 port 1
1361 12:51:27.936286 USB2 port 2
1362 12:51:27.936761 USB2 port 3
1363 12:51:27.939994 USB2 port 5
1364 12:51:27.940537 USB2 port 6
1365 12:51:27.942894 USB2 port 9
1366 12:51:27.946595 USB3 port 0
1367 12:51:27.947091 USB3 port 1
1368 12:51:27.949607 USB3 port 2
1369 12:51:27.950118 USB3 port 3
1370 12:51:27.952992 USB3 port 4
1371 12:51:27.953438 PCI: 00:14.2
1372 12:51:27.962976 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 12:51:27.972750 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 12:51:27.976392 PCI: 00:14.3
1375 12:51:27.986328 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 12:51:27.989417 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 12:51:27.999606 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 12:51:28.002658 I2C: 01:15
1379 12:51:28.005733 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 12:51:28.016305 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 12:51:28.019129 I2C: 02:5d
1382 12:51:28.019618 GENERIC: 0.0
1383 12:51:28.023040 PCI: 00:16.0
1384 12:51:28.032404 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 12:51:28.033060 PCI: 00:17.0
1386 12:51:28.045674 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 12:51:28.055423 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 12:51:28.062040 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 12:51:28.071946 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 12:51:28.082090 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 12:51:28.091992 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 12:51:28.094974 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 12:51:28.105018 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 12:51:28.108462 I2C: 03:1a
1395 12:51:28.108951 I2C: 03:38
1396 12:51:28.111524 I2C: 03:39
1397 12:51:28.112024 I2C: 03:3a
1398 12:51:28.114750 I2C: 03:3b
1399 12:51:28.118038 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 12:51:28.127994 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 12:51:28.137959 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 12:51:28.147752 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 12:51:28.151342 PCI: 01:00.0
1404 12:51:28.160991 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 12:51:28.161444 PCI: 00:1e.0
1406 12:51:28.174626 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 12:51:28.184367 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 12:51:28.187523 PCI: 00:1e.2 child on link 0 SPI: 00
1409 12:51:28.197284 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 12:51:28.197744 SPI: 00
1411 12:51:28.204082 PCI: 00:1e.3 child on link 0 SPI: 01
1412 12:51:28.213663 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 12:51:28.214140 SPI: 01
1414 12:51:28.217394 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 12:51:28.227091 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 12:51:28.237054 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 12:51:28.237540 PNP: 0c09.0
1418 12:51:28.246940 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 12:51:28.247394 PCI: 00:1f.3
1420 12:51:28.260491 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 12:51:28.270202 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 12:51:28.270657 PCI: 00:1f.4
1423 12:51:28.280407 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 12:51:28.290526 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 12:51:28.293478 PCI: 00:1f.5
1426 12:51:28.303946 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 12:51:28.304626 Done allocating resources.
1428 12:51:28.309910 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 12:51:28.313424 Enabling resources...
1430 12:51:28.316930 PCI: 00:00.0 subsystem <- 8086/9b61
1431 12:51:28.319840 PCI: 00:00.0 cmd <- 06
1432 12:51:28.323485 PCI: 00:02.0 subsystem <- 8086/9b41
1433 12:51:28.326940 PCI: 00:02.0 cmd <- 03
1434 12:51:28.330011 PCI: 00:08.0 cmd <- 06
1435 12:51:28.333123 PCI: 00:12.0 subsystem <- 8086/02f9
1436 12:51:28.337082 PCI: 00:12.0 cmd <- 02
1437 12:51:28.339707 PCI: 00:14.0 subsystem <- 8086/02ed
1438 12:51:28.342867 PCI: 00:14.0 cmd <- 02
1439 12:51:28.343387 PCI: 00:14.2 cmd <- 02
1440 12:51:28.350178 PCI: 00:14.3 subsystem <- 8086/02f0
1441 12:51:28.350777 PCI: 00:14.3 cmd <- 02
1442 12:51:28.353023 PCI: 00:15.0 subsystem <- 8086/02e8
1443 12:51:28.356424 PCI: 00:15.0 cmd <- 02
1444 12:51:28.359931 PCI: 00:15.1 subsystem <- 8086/02e9
1445 12:51:28.362862 PCI: 00:15.1 cmd <- 02
1446 12:51:28.366666 PCI: 00:16.0 subsystem <- 8086/02e0
1447 12:51:28.369695 PCI: 00:16.0 cmd <- 02
1448 12:51:28.373021 PCI: 00:17.0 subsystem <- 8086/02d3
1449 12:51:28.376091 PCI: 00:17.0 cmd <- 03
1450 12:51:28.379704 PCI: 00:19.0 subsystem <- 8086/02c5
1451 12:51:28.383204 PCI: 00:19.0 cmd <- 02
1452 12:51:28.385988 PCI: 00:1d.0 bridge ctrl <- 0013
1453 12:51:28.389117 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 12:51:28.392616 PCI: 00:1d.0 cmd <- 06
1455 12:51:28.395919 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 12:51:28.399419 PCI: 00:1e.0 cmd <- 06
1457 12:51:28.402542 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 12:51:28.403130 PCI: 00:1e.2 cmd <- 06
1459 12:51:28.409147 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 12:51:28.409735 PCI: 00:1e.3 cmd <- 02
1461 12:51:28.412582 PCI: 00:1f.0 subsystem <- 8086/0284
1462 12:51:28.415590 PCI: 00:1f.0 cmd <- 407
1463 12:51:28.419228 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 12:51:28.422246 PCI: 00:1f.3 cmd <- 02
1465 12:51:28.425837 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 12:51:28.429134 PCI: 00:1f.4 cmd <- 03
1467 12:51:28.432680 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 12:51:28.435946 PCI: 00:1f.5 cmd <- 406
1469 12:51:28.444253 PCI: 01:00.0 cmd <- 02
1470 12:51:28.449386 done.
1471 12:51:28.457612 ME: Version: 14.0.39.1367
1472 12:51:28.464351 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1473 12:51:28.467841 Initializing devices...
1474 12:51:28.468485 Root Device init ...
1475 12:51:28.474464 Chrome EC: Set SMI mask to 0x0000000000000000
1476 12:51:28.477683 Chrome EC: clear events_b mask to 0x0000000000000000
1477 12:51:28.484432 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 12:51:28.490982 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 12:51:28.497204 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 12:51:28.500556 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 12:51:28.503894 Root Device init finished in 35187 usecs
1482 12:51:28.508113 CPU_CLUSTER: 0 init ...
1483 12:51:28.514196 CPU_CLUSTER: 0 init finished in 2449 usecs
1484 12:51:28.518612 PCI: 00:00.0 init ...
1485 12:51:28.521921 CPU TDP: 15 Watts
1486 12:51:28.525127 CPU PL2 = 64 Watts
1487 12:51:28.528379 PCI: 00:00.0 init finished in 7083 usecs
1488 12:51:28.531573 PCI: 00:02.0 init ...
1489 12:51:28.534836 PCI: 00:02.0 init finished in 2254 usecs
1490 12:51:28.538237 PCI: 00:08.0 init ...
1491 12:51:28.541306 PCI: 00:08.0 init finished in 2254 usecs
1492 12:51:28.545000 PCI: 00:12.0 init ...
1493 12:51:28.548143 PCI: 00:12.0 init finished in 2252 usecs
1494 12:51:28.551192 PCI: 00:14.0 init ...
1495 12:51:28.554795 PCI: 00:14.0 init finished in 2253 usecs
1496 12:51:28.558174 PCI: 00:14.2 init ...
1497 12:51:28.561406 PCI: 00:14.2 init finished in 2254 usecs
1498 12:51:28.564703 PCI: 00:14.3 init ...
1499 12:51:28.567848 PCI: 00:14.3 init finished in 2271 usecs
1500 12:51:28.571457 PCI: 00:15.0 init ...
1501 12:51:28.574420 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 12:51:28.577909 PCI: 00:15.0 init finished in 5980 usecs
1503 12:51:28.581557 PCI: 00:15.1 init ...
1504 12:51:28.584897 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 12:51:28.590956 PCI: 00:15.1 init finished in 5979 usecs
1506 12:51:28.591511 PCI: 00:16.0 init ...
1507 12:51:28.597822 PCI: 00:16.0 init finished in 2252 usecs
1508 12:51:28.601303 PCI: 00:19.0 init ...
1509 12:51:28.604647 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 12:51:28.607512 PCI: 00:19.0 init finished in 5979 usecs
1511 12:51:28.611080 PCI: 00:1d.0 init ...
1512 12:51:28.614385 Initializing PCH PCIe bridge.
1513 12:51:28.617369 PCI: 00:1d.0 init finished in 5275 usecs
1514 12:51:28.620970 PCI: 00:1f.0 init ...
1515 12:51:28.624110 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 12:51:28.630736 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 12:51:28.631235 IOAPIC: ID = 0x02
1518 12:51:28.634368 IOAPIC: Dumping registers
1519 12:51:28.637600 reg 0x0000: 0x02000000
1520 12:51:28.641116 reg 0x0001: 0x00770020
1521 12:51:28.641601 reg 0x0002: 0x00000000
1522 12:51:28.647240 PCI: 00:1f.0 init finished in 23550 usecs
1523 12:51:28.650361 PCI: 00:1f.4 init ...
1524 12:51:28.653669 PCI: 00:1f.4 init finished in 2262 usecs
1525 12:51:28.664427 PCI: 01:00.0 init ...
1526 12:51:28.667680 PCI: 01:00.0 init finished in 2254 usecs
1527 12:51:28.672370 PNP: 0c09.0 init ...
1528 12:51:28.675824 Google Chrome EC uptime: 11.091 seconds
1529 12:51:28.682622 Google Chrome AP resets since EC boot: 0
1530 12:51:28.685619 Google Chrome most recent AP reset causes:
1531 12:51:28.691969 Google Chrome EC reset flags at last EC boot: reset-pin
1532 12:51:28.695186 PNP: 0c09.0 init finished in 20581 usecs
1533 12:51:28.698804 Devices initialized
1534 12:51:28.702384 Show all devs... After init.
1535 12:51:28.702985 Root Device: enabled 1
1536 12:51:28.705018 CPU_CLUSTER: 0: enabled 1
1537 12:51:28.708693 DOMAIN: 0000: enabled 1
1538 12:51:28.709189 APIC: 00: enabled 1
1539 12:51:28.711671 PCI: 00:00.0: enabled 1
1540 12:51:28.715611 PCI: 00:02.0: enabled 1
1541 12:51:28.718455 PCI: 00:04.0: enabled 0
1542 12:51:28.719060 PCI: 00:05.0: enabled 0
1543 12:51:28.721646 PCI: 00:12.0: enabled 1
1544 12:51:28.725106 PCI: 00:12.5: enabled 0
1545 12:51:28.728142 PCI: 00:12.6: enabled 0
1546 12:51:28.728678 PCI: 00:14.0: enabled 1
1547 12:51:28.731924 PCI: 00:14.1: enabled 0
1548 12:51:28.735020 PCI: 00:14.3: enabled 1
1549 12:51:28.735620 PCI: 00:14.5: enabled 0
1550 12:51:28.737962 PCI: 00:15.0: enabled 1
1551 12:51:28.741598 PCI: 00:15.1: enabled 1
1552 12:51:28.744716 PCI: 00:15.2: enabled 0
1553 12:51:28.745213 PCI: 00:15.3: enabled 0
1554 12:51:28.747983 PCI: 00:16.0: enabled 1
1555 12:51:28.751492 PCI: 00:16.1: enabled 0
1556 12:51:28.755015 PCI: 00:16.2: enabled 0
1557 12:51:28.755517 PCI: 00:16.3: enabled 0
1558 12:51:28.758160 PCI: 00:16.4: enabled 0
1559 12:51:28.761116 PCI: 00:16.5: enabled 0
1560 12:51:28.764870 PCI: 00:17.0: enabled 1
1561 12:51:28.765365 PCI: 00:19.0: enabled 1
1562 12:51:28.768215 PCI: 00:19.1: enabled 0
1563 12:51:28.771492 PCI: 00:19.2: enabled 0
1564 12:51:28.774752 PCI: 00:1a.0: enabled 0
1565 12:51:28.775275 PCI: 00:1c.0: enabled 0
1566 12:51:28.778024 PCI: 00:1c.1: enabled 0
1567 12:51:28.781555 PCI: 00:1c.2: enabled 0
1568 12:51:28.782143 PCI: 00:1c.3: enabled 0
1569 12:51:28.784464 PCI: 00:1c.4: enabled 0
1570 12:51:28.788039 PCI: 00:1c.5: enabled 0
1571 12:51:28.791466 PCI: 00:1c.6: enabled 0
1572 12:51:28.792052 PCI: 00:1c.7: enabled 0
1573 12:51:28.794386 PCI: 00:1d.0: enabled 1
1574 12:51:28.797806 PCI: 00:1d.1: enabled 0
1575 12:51:28.801460 PCI: 00:1d.2: enabled 0
1576 12:51:28.802052 PCI: 00:1d.3: enabled 0
1577 12:51:28.804441 PCI: 00:1d.4: enabled 0
1578 12:51:28.807636 PCI: 00:1d.5: enabled 0
1579 12:51:28.811123 PCI: 00:1e.0: enabled 1
1580 12:51:28.811645 PCI: 00:1e.1: enabled 0
1581 12:51:28.814147 PCI: 00:1e.2: enabled 1
1582 12:51:28.817679 PCI: 00:1e.3: enabled 1
1583 12:51:28.818223 PCI: 00:1f.0: enabled 1
1584 12:51:28.820994 PCI: 00:1f.1: enabled 0
1585 12:51:28.824520 PCI: 00:1f.2: enabled 0
1586 12:51:28.827824 PCI: 00:1f.3: enabled 1
1587 12:51:28.828338 PCI: 00:1f.4: enabled 1
1588 12:51:28.830652 PCI: 00:1f.5: enabled 1
1589 12:51:28.834295 PCI: 00:1f.6: enabled 0
1590 12:51:28.837437 USB0 port 0: enabled 1
1591 12:51:28.837885 I2C: 01:15: enabled 1
1592 12:51:28.840968 I2C: 02:5d: enabled 1
1593 12:51:28.844183 GENERIC: 0.0: enabled 1
1594 12:51:28.844710 I2C: 03:1a: enabled 1
1595 12:51:28.847268 I2C: 03:38: enabled 1
1596 12:51:28.850673 I2C: 03:39: enabled 1
1597 12:51:28.851118 I2C: 03:3a: enabled 1
1598 12:51:28.853893 I2C: 03:3b: enabled 1
1599 12:51:28.857166 PCI: 00:00.0: enabled 1
1600 12:51:28.857637 SPI: 00: enabled 1
1601 12:51:28.860589 SPI: 01: enabled 1
1602 12:51:28.863863 PNP: 0c09.0: enabled 1
1603 12:51:28.864393 USB2 port 0: enabled 1
1604 12:51:28.867207 USB2 port 1: enabled 1
1605 12:51:28.870429 USB2 port 2: enabled 0
1606 12:51:28.873742 USB2 port 3: enabled 0
1607 12:51:28.874343 USB2 port 5: enabled 0
1608 12:51:28.877501 USB2 port 6: enabled 1
1609 12:51:28.880688 USB2 port 9: enabled 1
1610 12:51:28.881152 USB3 port 0: enabled 1
1611 12:51:28.883860 USB3 port 1: enabled 1
1612 12:51:28.887374 USB3 port 2: enabled 1
1613 12:51:28.887825 USB3 port 3: enabled 1
1614 12:51:28.890013 USB3 port 4: enabled 0
1615 12:51:28.893410 APIC: 03: enabled 1
1616 12:51:28.893974 APIC: 05: enabled 1
1617 12:51:28.896996 APIC: 01: enabled 1
1618 12:51:28.900140 APIC: 02: enabled 1
1619 12:51:28.900693 APIC: 04: enabled 1
1620 12:51:28.903403 APIC: 06: enabled 1
1621 12:51:28.907082 APIC: 07: enabled 1
1622 12:51:28.907587 PCI: 00:08.0: enabled 1
1623 12:51:28.910186 PCI: 00:14.2: enabled 1
1624 12:51:28.913256 PCI: 01:00.0: enabled 1
1625 12:51:28.916984 Disabling ACPI via APMC:
1626 12:51:28.920144 done.
1627 12:51:28.924055 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 12:51:28.926823 ELOG: NV offset 0xaf0000 size 0x4000
1629 12:51:28.933617 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 12:51:28.940387 ELOG: Event(17) added with size 13 at 2023-03-13 12:51:28 UTC
1631 12:51:28.947051 ELOG: Event(92) added with size 9 at 2023-03-13 12:51:28 UTC
1632 12:51:28.953587 ELOG: Event(93) added with size 9 at 2023-03-13 12:51:28 UTC
1633 12:51:28.960157 ELOG: Event(9A) added with size 9 at 2023-03-13 12:51:28 UTC
1634 12:51:28.967002 ELOG: Event(9E) added with size 10 at 2023-03-13 12:51:29 UTC
1635 12:51:28.973619 ELOG: Event(9F) added with size 14 at 2023-03-13 12:51:29 UTC
1636 12:51:28.979836 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 7
1637 12:51:28.986786 ELOG: Event(A1) added with size 10 at 2023-03-13 12:51:29 UTC
1638 12:51:28.993315 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 12:51:28.999705 ELOG: Event(A0) added with size 9 at 2023-03-13 12:51:29 UTC
1640 12:51:29.002974 elog_add_boot_reason: Logged dev mode boot
1641 12:51:29.006635 Finalize devices...
1642 12:51:29.010121 PCI: 00:17.0 final
1643 12:51:29.010573 Devices finalized
1644 12:51:29.016244 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 12:51:29.019898 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 12:51:29.026209 ME: HFSTS1 : 0x90000245
1647 12:51:29.029816 ME: HFSTS2 : 0x3B850126
1648 12:51:29.032893 ME: HFSTS3 : 0x00000020
1649 12:51:29.036571 ME: HFSTS4 : 0x00004800
1650 12:51:29.042720 ME: HFSTS5 : 0x00000000
1651 12:51:29.045889 ME: HFSTS6 : 0x40400006
1652 12:51:29.049408 ME: Manufacturing Mode : NO
1653 12:51:29.052990 ME: FW Partition Table : OK
1654 12:51:29.055751 ME: Bringup Loader Failure : NO
1655 12:51:29.059274 ME: Firmware Init Complete : YES
1656 12:51:29.062442 ME: Boot Options Present : NO
1657 12:51:29.065894 ME: Update In Progress : NO
1658 12:51:29.069177 ME: D0i3 Support : YES
1659 12:51:29.072455 ME: Low Power State Enabled : NO
1660 12:51:29.075868 ME: CPU Replaced : NO
1661 12:51:29.079139 ME: CPU Replacement Valid : YES
1662 12:51:29.082939 ME: Current Working State : 5
1663 12:51:29.085726 ME: Current Operation State : 1
1664 12:51:29.089557 ME: Current Operation Mode : 0
1665 12:51:29.092987 ME: Error Code : 0
1666 12:51:29.095955 ME: CPU Debug Disabled : YES
1667 12:51:29.099064 ME: TXT Support : NO
1668 12:51:29.102459 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 12:51:29.109256 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 12:51:29.112521 CBFS @ c08000 size 3f8000
1671 12:51:29.118951 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 12:51:29.122747 CBFS: Locating 'fallback/dsdt.aml'
1673 12:51:29.125473 CBFS: Found @ offset 10bb80 size 3fa5
1674 12:51:29.129057 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 12:51:29.132079 CBFS @ c08000 size 3f8000
1676 12:51:29.138874 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 12:51:29.142036 CBFS: Locating 'fallback/slic'
1678 12:51:29.145717 CBFS: 'fallback/slic' not found.
1679 12:51:29.152408 ACPI: Writing ACPI tables at 99b3e000.
1680 12:51:29.152863 ACPI: * FACS
1681 12:51:29.155674 ACPI: * DSDT
1682 12:51:29.159142 Ramoops buffer: 0x100000@0x99a3d000.
1683 12:51:29.162476 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 12:51:29.168874 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 12:51:29.172613 Google Chrome EC: version:
1686 12:51:29.175562 ro: helios_v2.0.2659-56403530b
1687 12:51:29.178713 rw: helios_v2.0.2849-c41de27e7d
1688 12:51:29.179213 running image: 1
1689 12:51:29.183152 ACPI: * FADT
1690 12:51:29.183761 SCI is IRQ9
1691 12:51:29.189415 ACPI: added table 1/32, length now 40
1692 12:51:29.190001 ACPI: * SSDT
1693 12:51:29.192557 Found 1 CPU(s) with 8 core(s) each.
1694 12:51:29.196086 Error: Could not locate 'wifi_sar' in VPD.
1695 12:51:29.202808 Checking CBFS for default SAR values
1696 12:51:29.205660 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 12:51:29.209100 CBFS @ c08000 size 3f8000
1698 12:51:29.215774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 12:51:29.218972 CBFS: Locating 'wifi_sar_defaults.hex'
1700 12:51:29.222243 CBFS: Found @ offset 5fac0 size 77
1701 12:51:29.225810 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 12:51:29.232573 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 12:51:29.235649 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 12:51:29.242291 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 12:51:29.245410 failed to find key in VPD: dsm_calib_r0_0
1706 12:51:29.256008 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 12:51:29.258983 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 12:51:29.265421 failed to find key in VPD: dsm_calib_r0_1
1709 12:51:29.272243 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 12:51:29.278604 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 12:51:29.282092 failed to find key in VPD: dsm_calib_r0_2
1712 12:51:29.291891 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 12:51:29.295226 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 12:51:29.301757 failed to find key in VPD: dsm_calib_r0_3
1715 12:51:29.308431 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 12:51:29.315253 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 12:51:29.318510 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 12:51:29.325145 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 12:51:29.328974 EC returned error result code 1
1720 12:51:29.332159 EC returned error result code 1
1721 12:51:29.335352 EC returned error result code 1
1722 12:51:29.338988 PS2K: Bad resp from EC. Vivaldi disabled!
1723 12:51:29.345619 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 12:51:29.352107 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 12:51:29.355643 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 12:51:29.361908 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 12:51:29.365506 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 12:51:29.372114 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 12:51:29.378496 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 12:51:29.385137 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 12:51:29.388453 ACPI: added table 2/32, length now 44
1732 12:51:29.388904 ACPI: * MCFG
1733 12:51:29.395393 ACPI: added table 3/32, length now 48
1734 12:51:29.395938 ACPI: * TPM2
1735 12:51:29.398472 TPM2 log created at 99a2d000
1736 12:51:29.401879 ACPI: added table 4/32, length now 52
1737 12:51:29.405059 ACPI: * MADT
1738 12:51:29.405530 SCI is IRQ9
1739 12:51:29.408521 ACPI: added table 5/32, length now 56
1740 12:51:29.411860 current = 99b43ac0
1741 12:51:29.412304 ACPI: * DMAR
1742 12:51:29.414998 ACPI: added table 6/32, length now 60
1743 12:51:29.418157 ACPI: * IGD OpRegion
1744 12:51:29.422014 GMA: Found VBT in CBFS
1745 12:51:29.425089 GMA: Found valid VBT in CBFS
1746 12:51:29.428519 ACPI: added table 7/32, length now 64
1747 12:51:29.428965 ACPI: * HPET
1748 12:51:29.432203 ACPI: added table 8/32, length now 68
1749 12:51:29.435049 ACPI: done.
1750 12:51:29.438336 ACPI tables: 31744 bytes.
1751 12:51:29.442212 smbios_write_tables: 99a2c000
1752 12:51:29.445465 EC returned error result code 3
1753 12:51:29.448911 Couldn't obtain OEM name from CBI
1754 12:51:29.449502 Create SMBIOS type 17
1755 12:51:29.452590 PCI: 00:00.0 (Intel Cannonlake)
1756 12:51:29.455403 PCI: 00:14.3 (Intel WiFi)
1757 12:51:29.458668 SMBIOS tables: 939 bytes.
1758 12:51:29.461579 Writing table forward entry at 0x00000500
1759 12:51:29.468144 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 12:51:29.471950 Writing coreboot table at 0x99b62000
1761 12:51:29.478174 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 12:51:29.481503 1. 0000000000001000-000000000009ffff: RAM
1763 12:51:29.487942 2. 00000000000a0000-00000000000fffff: RESERVED
1764 12:51:29.491553 3. 0000000000100000-0000000099a2bfff: RAM
1765 12:51:29.498141 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 12:51:29.501359 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 12:51:29.507950 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 12:51:29.514712 7. 000000009a000000-000000009f7fffff: RESERVED
1769 12:51:29.517513 8. 00000000e0000000-00000000efffffff: RESERVED
1770 12:51:29.521009 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 12:51:29.527768 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 12:51:29.531246 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 12:51:29.537289 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 12:51:29.540694 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 12:51:29.547376 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 12:51:29.550666 15. 0000000100000000-000000045e7fffff: RAM
1777 12:51:29.554251 Graphics framebuffer located at 0xc0000000
1778 12:51:29.557372 Passing 5 GPIOs to payload:
1779 12:51:29.563987 NAME | PORT | POLARITY | VALUE
1780 12:51:29.567372 write protect | undefined | high | low
1781 12:51:29.573716 lid | undefined | high | high
1782 12:51:29.580431 power | undefined | high | low
1783 12:51:29.583696 oprom | undefined | high | low
1784 12:51:29.590319 EC in RW | 0x000000cb | high | low
1785 12:51:29.590771 Board ID: 4
1786 12:51:29.597086 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 12:51:29.597721 CBFS @ c08000 size 3f8000
1788 12:51:29.603705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 12:51:29.610239 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1790 12:51:29.613798 coreboot table: 1492 bytes.
1791 12:51:29.617144 IMD ROOT 0. 99fff000 00001000
1792 12:51:29.620178 IMD SMALL 1. 99ffe000 00001000
1793 12:51:29.623811 FSP MEMORY 2. 99c4e000 003b0000
1794 12:51:29.626739 CONSOLE 3. 99c2e000 00020000
1795 12:51:29.630438 FMAP 4. 99c2d000 0000054e
1796 12:51:29.633989 TIME STAMP 5. 99c2c000 00000910
1797 12:51:29.636927 VBOOT WORK 6. 99c18000 00014000
1798 12:51:29.640062 MRC DATA 7. 99c16000 00001958
1799 12:51:29.643791 ROMSTG STCK 8. 99c15000 00001000
1800 12:51:29.647042 AFTER CAR 9. 99c0b000 0000a000
1801 12:51:29.650040 RAMSTAGE 10. 99baf000 0005c000
1802 12:51:29.653378 REFCODE 11. 99b7a000 00035000
1803 12:51:29.656838 SMM BACKUP 12. 99b6a000 00010000
1804 12:51:29.660168 COREBOOT 13. 99b62000 00008000
1805 12:51:29.663259 ACPI 14. 99b3e000 00024000
1806 12:51:29.666858 ACPI GNVS 15. 99b3d000 00001000
1807 12:51:29.670081 RAMOOPS 16. 99a3d000 00100000
1808 12:51:29.673157 TPM2 TCGLOG17. 99a2d000 00010000
1809 12:51:29.676658 SMBIOS 18. 99a2c000 00000800
1810 12:51:29.677110 IMD small region:
1811 12:51:29.683333 IMD ROOT 0. 99ffec00 00000400
1812 12:51:29.686211 FSP RUNTIME 1. 99ffebe0 00000004
1813 12:51:29.689667 EC HOSTEVENT 2. 99ffebc0 00000008
1814 12:51:29.693286 POWER STATE 3. 99ffeb80 00000040
1815 12:51:29.696191 ROMSTAGE 4. 99ffeb60 00000004
1816 12:51:29.699679 MEM INFO 5. 99ffe9a0 000001b9
1817 12:51:29.702931 VPD 6. 99ffe920 0000006c
1818 12:51:29.706646 MTRR: Physical address space:
1819 12:51:29.712933 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 12:51:29.719622 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 12:51:29.722628 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 12:51:29.729799 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 12:51:29.736296 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 12:51:29.742814 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 12:51:29.749541 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 12:51:29.752738 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 12:51:29.759129 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 12:51:29.762524 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 12:51:29.765994 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 12:51:29.769014 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 12:51:29.772627 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 12:51:29.779029 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 12:51:29.782712 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 12:51:29.786440 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 12:51:29.789027 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 12:51:29.796030 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 12:51:29.798928 call enable_fixed_mtrr()
1838 12:51:29.802304 CPU physical address size: 39 bits
1839 12:51:29.806044 MTRR: default type WB/UC MTRR counts: 6/8.
1840 12:51:29.809076 MTRR: WB selected as default type.
1841 12:51:29.815547 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 12:51:29.822181 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 12:51:29.829215 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 12:51:29.835510 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 12:51:29.839263 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 12:51:29.845444 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 12:51:29.852421 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 12:51:29.855684 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 12:51:29.859241 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 12:51:29.862564 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 12:51:29.868835 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 12:51:29.872377 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 12:51:29.875500 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 12:51:29.878986 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 12:51:29.885994 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 12:51:29.888842 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 12:51:29.892223 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 12:51:29.892839
1859 12:51:29.895141 MTRR check
1860 12:51:29.895582 Fixed MTRRs : Enabled
1861 12:51:29.898566 Variable MTRRs: Enabled
1862 12:51:29.899016
1863 12:51:29.901706 call enable_fixed_mtrr()
1864 12:51:29.908404 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1865 12:51:29.911974 CPU physical address size: 39 bits
1866 12:51:29.915411 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 12:51:29.918547 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 12:51:29.925357 MTRR: Fixed MSR 0x258 0x0606060606060606
1869 12:51:29.928408 MTRR: Fixed MSR 0x259 0x0000000000000000
1870 12:51:29.931945 MTRR: Fixed MSR 0x268 0x0606060606060606
1871 12:51:29.935026 MTRR: Fixed MSR 0x269 0x0606060606060606
1872 12:51:29.941904 MTRR: Fixed MSR 0x26a 0x0606060606060606
1873 12:51:29.944768 MTRR: Fixed MSR 0x26b 0x0606060606060606
1874 12:51:29.948232 MTRR: Fixed MSR 0x26c 0x0606060606060606
1875 12:51:29.951336 MTRR: Fixed MSR 0x26d 0x0606060606060606
1876 12:51:29.958013 MTRR: Fixed MSR 0x26e 0x0606060606060606
1877 12:51:29.961255 MTRR: Fixed MSR 0x26f 0x0606060606060606
1878 12:51:29.964548 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 12:51:29.968178 call enable_fixed_mtrr()
1880 12:51:29.971560 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 12:51:29.974476 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 12:51:29.981404 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 12:51:29.984405 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 12:51:29.987850 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 12:51:29.991448 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 12:51:29.998010 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 12:51:30.000964 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 12:51:30.004468 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 12:51:30.007698 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 12:51:30.011780 CPU physical address size: 39 bits
1891 12:51:30.014780 call enable_fixed_mtrr()
1892 12:51:30.017809 CBFS @ c08000 size 3f8000
1893 12:51:30.024307 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1894 12:51:30.028078 CBFS: Locating 'fallback/payload'
1895 12:51:30.030968 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 12:51:30.034374 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 12:51:30.041018 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 12:51:30.044030 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 12:51:30.047541 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 12:51:30.051022 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 12:51:30.054113 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 12:51:30.060868 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 12:51:30.063874 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 12:51:30.067428 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 12:51:30.070837 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 12:51:30.077255 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 12:51:30.080774 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 12:51:30.083971 call enable_fixed_mtrr()
1909 12:51:30.087128 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 12:51:30.090659 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 12:51:30.094116 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 12:51:30.100154 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 12:51:30.103699 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 12:51:30.107185 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 12:51:30.110363 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 12:51:30.116919 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 12:51:30.119940 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 12:51:30.123367 CPU physical address size: 39 bits
1919 12:51:30.126599 call enable_fixed_mtrr()
1920 12:51:30.130338 CPU physical address size: 39 bits
1921 12:51:30.133554 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 12:51:30.140173 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 12:51:30.143148 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 12:51:30.146490 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 12:51:30.149799 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 12:51:30.152907 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 12:51:30.159355 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 12:51:30.162843 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 12:51:30.166596 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 12:51:30.169602 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 12:51:30.176547 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 12:51:30.179386 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 12:51:30.182980 call enable_fixed_mtrr()
1934 12:51:30.186135 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:51:30.189586 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:51:30.192703 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:51:30.199419 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:51:30.202453 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:51:30.206177 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:51:30.209752 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:51:30.215690 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:51:30.219232 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:51:30.222574 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:51:30.225843 CPU physical address size: 39 bits
1945 12:51:30.229145 call enable_fixed_mtrr()
1946 12:51:30.232625 CBFS: Found @ offset 1c96c0 size 3f798
1947 12:51:30.236574 CPU physical address size: 39 bits
1948 12:51:30.238978 CPU physical address size: 39 bits
1949 12:51:30.245819 Checking segment from ROM address 0xffdd16f8
1950 12:51:30.249028 Checking segment from ROM address 0xffdd1714
1951 12:51:30.252472 Loading segment from ROM address 0xffdd16f8
1952 12:51:30.255945 code (compression=0)
1953 12:51:30.265572 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 12:51:30.272167 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 12:51:30.275843 it's not compressed!
1956 12:51:30.367459 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 12:51:30.374396 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 12:51:30.378061 Loading segment from ROM address 0xffdd1714
1959 12:51:30.380888 Entry Point 0x30000000
1960 12:51:30.383929 Loaded segments
1961 12:51:30.389924 Finalizing chipset.
1962 12:51:30.393058 Finalizing SMM.
1963 12:51:30.396106 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 12:51:30.399481 mp_park_aps done after 0 msecs.
1965 12:51:30.406198 Jumping to boot code at 30000000(99b62000)
1966 12:51:30.413109 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 12:51:30.413563
1968 12:51:30.413976
1969 12:51:30.414336
1970 12:51:30.416023 Starting depthcharge on Helios...
1971 12:51:30.416513
1972 12:51:30.417581 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 12:51:30.418261 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 12:51:30.418746 Setting prompt string to ['hatch:']
1975 12:51:30.419179 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 12:51:30.426233 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 12:51:30.426692
1978 12:51:30.432694 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 12:51:30.433147
1980 12:51:30.439219 board_setup: Info: eMMC controller not present; skipping
1981 12:51:30.439673
1982 12:51:30.442398 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 12:51:30.442857
1984 12:51:30.448911 board_setup: Info: SDHCI controller not present; skipping
1985 12:51:30.449365
1986 12:51:30.455998 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 12:51:30.456500
1988 12:51:30.456868 Wipe memory regions:
1989 12:51:30.457206
1990 12:51:30.459196 [0x00000000001000, 0x000000000a0000)
1991 12:51:30.459647
1992 12:51:30.462774 [0x00000000100000, 0x00000030000000)
1993 12:51:30.528494
1994 12:51:30.531794 [0x00000030657430, 0x00000099a2c000)
1995 12:51:30.669028
1996 12:51:30.671998 [0x00000100000000, 0x0000045e800000)
1997 12:51:32.054685
1998 12:51:32.055272 R8152: Initializing
1999 12:51:32.055665
2000 12:51:32.057983 Version 9 (ocp_data = 6010)
2001 12:51:32.062382
2002 12:51:32.063014 R8152: Done initializing
2003 12:51:32.063542
2004 12:51:32.065318 Adding net device
2005 12:51:32.675102
2006 12:51:32.675645 R8152: Initializing
2007 12:51:32.675995
2008 12:51:32.678070 Version 6 (ocp_data = 5c30)
2009 12:51:32.678507
2010 12:51:32.681346 R8152: Done initializing
2011 12:51:32.681432
2012 12:51:32.688017 net_add_device: Attemp to include the same device
2013 12:51:32.688111
2014 12:51:32.694820 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 12:51:32.694924
2016 12:51:32.695002
2017 12:51:32.695074
2018 12:51:32.695369 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 12:51:32.796525 hatch: tftpboot 192.168.201.1 9584871/tftp-deploy-xq98ymnm/kernel/bzImage 9584871/tftp-deploy-xq98ymnm/kernel/cmdline 9584871/tftp-deploy-xq98ymnm/ramdisk/ramdisk.cpio.gz
2021 12:51:32.797402 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 12:51:32.797882 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 12:51:32.802039 tftpboot 192.168.201.1 9584871/tftp-deploy-xq98ymnm/kernel/bzImoy-xq98ymnm/kernel/cmdline 9584871/tftp-deploy-xq98ymnm/ramdisk/ramdisk.cpio.gz
2024 12:51:32.802211
2025 12:51:32.802289 Waiting for link
2026 12:51:33.002840
2027 12:51:33.003001 done.
2028 12:51:33.003069
2029 12:51:33.003134 MAC: 00:24:32:50:1a:5f
2030 12:51:33.003195
2031 12:51:33.005948 Sending DHCP discover... done.
2032 12:51:33.006036
2033 12:51:33.009617 Waiting for reply... done.
2034 12:51:33.009711
2035 12:51:33.012570 Sending DHCP request... done.
2036 12:51:33.012671
2037 12:51:33.019013 Waiting for reply... done.
2038 12:51:33.019122
2039 12:51:33.019209 My ip is 192.168.201.21
2040 12:51:33.019290
2041 12:51:33.022845 The DHCP server ip is 192.168.201.1
2042 12:51:33.022965
2043 12:51:33.029359 TFTP server IP predefined by user: 192.168.201.1
2044 12:51:33.029492
2045 12:51:33.035580 Bootfile predefined by user: 9584871/tftp-deploy-xq98ymnm/kernel/bzImage
2046 12:51:33.035726
2047 12:51:33.038773 Sending tftp read request... done.
2048 12:51:33.038937
2049 12:51:33.042353 Waiting for the transfer...
2050 12:51:33.042540
2051 12:51:33.705619 00000000 ################################################################
2052 12:51:33.706179
2053 12:51:34.345663 00080000 ################################################################
2054 12:51:34.346209
2055 12:51:35.000869 00100000 ################################################################
2056 12:51:35.001444
2057 12:51:35.665445 00180000 ################################################################
2058 12:51:35.665982
2059 12:51:36.328482 00200000 ################################################################
2060 12:51:36.329038
2061 12:51:36.960142 00280000 ################################################################
2062 12:51:36.960297
2063 12:51:37.616167 00300000 ################################################################
2064 12:51:37.616770
2065 12:51:38.272770 00380000 ################################################################
2066 12:51:38.273328
2067 12:51:38.933493 00400000 ################################################################
2068 12:51:38.934050
2069 12:51:39.581901 00480000 ################################################################
2070 12:51:39.582053
2071 12:51:40.248408 00500000 ################################################################
2072 12:51:40.248939
2073 12:51:40.906579 00580000 ################################################################
2074 12:51:40.907114
2075 12:51:41.549272 00600000 ################################################################
2076 12:51:41.549888
2077 12:51:42.213923 00680000 ################################################################
2078 12:51:42.214537
2079 12:51:42.604970 00700000 ##################################### done.
2080 12:51:42.605509
2081 12:51:42.608141 The bootfile was 7638928 bytes long.
2082 12:51:42.608604
2083 12:51:42.611224 Sending tftp read request... done.
2084 12:51:42.611670
2085 12:51:42.614736 Waiting for the transfer...
2086 12:51:42.615179
2087 12:51:43.159707 00000000 ################################################################
2088 12:51:43.159855
2089 12:51:43.732868 00080000 ################################################################
2090 12:51:43.733023
2091 12:51:44.277468 00100000 ################################################################
2092 12:51:44.277621
2093 12:51:44.831301 00180000 ################################################################
2094 12:51:44.831457
2095 12:51:45.404011 00200000 ################################################################
2096 12:51:45.404162
2097 12:51:45.997647 00280000 ################################################################
2098 12:51:45.997804
2099 12:51:46.588355 00300000 ################################################################
2100 12:51:46.588501
2101 12:51:47.190456 00380000 ################################################################
2102 12:51:47.191153
2103 12:51:47.837922 00400000 ################################################################
2104 12:51:47.838077
2105 12:51:48.470289 00480000 ################################################################
2106 12:51:48.470831
2107 12:51:49.105809 00500000 ################################################################
2108 12:51:49.105955
2109 12:51:49.709452 00580000 ################################################################
2110 12:51:49.709609
2111 12:51:50.288173 00600000 ################################################################
2112 12:51:50.288338
2113 12:51:50.847701 00680000 ################################################################
2114 12:51:50.847858
2115 12:51:51.438787 00700000 ################################################################
2116 12:51:51.438938
2117 12:51:52.048972 00780000 ################################################################
2118 12:51:52.049116
2119 12:51:52.516521 00800000 ##################################################### done.
2120 12:51:52.516669
2121 12:51:52.519901 Sending tftp read request... done.
2122 12:51:52.519983
2123 12:51:52.523050 Waiting for the transfer...
2124 12:51:52.523137
2125 12:51:52.523208 00000000 # done.
2126 12:51:52.523276
2127 12:51:52.533200 Command line loaded dynamically from TFTP file: 9584871/tftp-deploy-xq98ymnm/kernel/cmdline
2128 12:51:52.533311
2129 12:51:52.549825 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2130 12:51:52.549972
2131 12:51:52.556011 ec_init(0): CrosEC protocol v3 supported (256, 256)
2132 12:51:52.560808
2133 12:51:52.563656 Shutting down all USB controllers.
2134 12:51:52.563897
2135 12:51:52.564064 Removing current net device
2136 12:51:52.571976
2137 12:51:52.572366 Finalizing coreboot
2138 12:51:52.572626
2139 12:51:52.579076 Exiting depthcharge with code 4 at timestamp: 29506595
2140 12:51:52.579501
2141 12:51:52.579820
2142 12:51:52.580120 Starting kernel ...
2143 12:51:52.580435
2144 12:51:52.580720
2145 12:51:52.581819 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2146 12:51:52.582271 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2147 12:51:52.582655 Setting prompt string to ['Linux version [0-9]']
2148 12:51:52.583042 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2149 12:51:52.583432 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2151 12:56:12.583245 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2153 12:56:12.584434 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2155 12:56:12.585356 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2158 12:56:12.586818 end: 2 depthcharge-action (duration 00:05:00) [common]
2160 12:56:12.588026 Cleaning after the job
2161 12:56:12.588542 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/ramdisk
2162 12:56:12.592119 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/kernel
2163 12:56:12.595123 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584871/tftp-deploy-xq98ymnm/modules
2164 12:56:12.596409 start: 5.1 power-off (timeout 00:00:30) [common]
2165 12:56:12.597283 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2166 12:56:12.686495 >> Command sent successfully.
2167 12:56:12.696512 Returned 0 in 0 seconds
2168 12:56:12.798235 end: 5.1 power-off (duration 00:00:00) [common]
2170 12:56:12.799854 start: 5.2 read-feedback (timeout 00:10:00) [common]
2171 12:56:12.801070 Listened to connection for namespace 'common' for up to 1s
2173 12:56:12.802533 Listened to connection for namespace 'common' for up to 1s
2174 12:56:13.805844 Finalising connection for namespace 'common'
2175 12:56:13.806608 Disconnecting from shell: Finalise
2176 12:56:13.807139
2177 12:56:13.908704 end: 5.2 read-feedback (duration 00:00:01) [common]
2178 12:56:13.909370 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584871
2179 12:56:13.918350 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584871
2180 12:56:13.918488 JobError: Your job cannot terminate cleanly.