Boot log: dell-latitude-5400-4305U-sarien

    1 12:48:15.265344  lava-dispatcher, installed at version: 2023.01
    2 12:48:15.265530  start: 0 validate
    3 12:48:15.265654  Start time: 2023-03-13 12:48:15.265647+00:00 (UTC)
    4 12:48:15.265780  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:48:15.265914  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:48:15.559650  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:48:15.560460  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:48:15.857465  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:48:15.858126  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:48:19.392294  validate duration: 4.13
   12 12:48:19.393663  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:48:19.394627  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:48:19.395208  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:48:19.395768  Not decompressing ramdisk as can be used compressed.
   16 12:48:19.396349  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
   17 12:48:19.396742  saving as /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/ramdisk/rootfs.cpio.gz
   18 12:48:19.397093  total size: 8423697 (8MB)
   19 12:48:19.955928  progress   0% (0MB)
   20 12:48:19.966901  progress   5% (0MB)
   21 12:48:19.977381  progress  10% (0MB)
   22 12:48:19.984256  progress  15% (1MB)
   23 12:48:19.989338  progress  20% (1MB)
   24 12:48:19.993563  progress  25% (2MB)
   25 12:48:19.997300  progress  30% (2MB)
   26 12:48:20.000377  progress  35% (2MB)
   27 12:48:20.003432  progress  40% (3MB)
   28 12:48:20.006375  progress  45% (3MB)
   29 12:48:20.008985  progress  50% (4MB)
   30 12:48:20.011623  progress  55% (4MB)
   31 12:48:20.013930  progress  60% (4MB)
   32 12:48:20.016273  progress  65% (5MB)
   33 12:48:20.018272  progress  70% (5MB)
   34 12:48:20.020379  progress  75% (6MB)
   35 12:48:20.022499  progress  80% (6MB)
   36 12:48:20.024566  progress  85% (6MB)
   37 12:48:20.026648  progress  90% (7MB)
   38 12:48:20.028760  progress  95% (7MB)
   39 12:48:20.030810  progress 100% (8MB)
   40 12:48:20.030918  8MB downloaded in 0.63s (12.67MB/s)
   41 12:48:20.031071  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 12:48:20.031312  end: 1.1 download-retry (duration 00:00:01) [common]
   44 12:48:20.031404  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 12:48:20.031492  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 12:48:20.031602  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:48:20.031671  saving as /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/kernel/bzImage
   48 12:48:20.031734  total size: 7638928 (7MB)
   49 12:48:20.031795  No compression specified
   50 12:48:20.032724  progress   0% (0MB)
   51 12:48:20.034631  progress   5% (0MB)
   52 12:48:20.036552  progress  10% (0MB)
   53 12:48:20.038392  progress  15% (1MB)
   54 12:48:20.040309  progress  20% (1MB)
   55 12:48:20.042284  progress  25% (1MB)
   56 12:48:20.044057  progress  30% (2MB)
   57 12:48:20.045985  progress  35% (2MB)
   58 12:48:20.047935  progress  40% (2MB)
   59 12:48:20.049687  progress  45% (3MB)
   60 12:48:20.051649  progress  50% (3MB)
   61 12:48:20.053523  progress  55% (4MB)
   62 12:48:20.055308  progress  60% (4MB)
   63 12:48:20.057188  progress  65% (4MB)
   64 12:48:20.059113  progress  70% (5MB)
   65 12:48:20.060834  progress  75% (5MB)
   66 12:48:20.062763  progress  80% (5MB)
   67 12:48:20.064654  progress  85% (6MB)
   68 12:48:20.066433  progress  90% (6MB)
   69 12:48:20.068341  progress  95% (6MB)
   70 12:48:20.070237  progress 100% (7MB)
   71 12:48:20.070351  7MB downloaded in 0.04s (188.67MB/s)
   72 12:48:20.070495  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:48:20.070758  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:48:20.070850  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 12:48:20.070937  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 12:48:20.071043  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:48:20.071113  saving as /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/modules/modules.tar
   79 12:48:20.071175  total size: 250760 (0MB)
   80 12:48:20.071236  Using unxz to decompress xz
   81 12:48:20.074362  progress  13% (0MB)
   82 12:48:20.074734  progress  26% (0MB)
   83 12:48:20.074983  progress  39% (0MB)
   84 12:48:20.076314  progress  52% (0MB)
   85 12:48:20.078264  progress  65% (0MB)
   86 12:48:20.080196  progress  78% (0MB)
   87 12:48:20.082047  progress  91% (0MB)
   88 12:48:20.083937  progress 100% (0MB)
   89 12:48:20.089529  0MB downloaded in 0.02s (13.03MB/s)
   90 12:48:20.089783  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 12:48:20.090055  end: 1.3 download-retry (duration 00:00:00) [common]
   93 12:48:20.090201  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 12:48:20.090345  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 12:48:20.090449  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 12:48:20.090543  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 12:48:20.090719  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt
   98 12:48:20.090826  makedir: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin
   99 12:48:20.090916  makedir: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/tests
  100 12:48:20.090997  makedir: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/results
  101 12:48:20.091101  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-add-keys
  102 12:48:20.091232  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-add-sources
  103 12:48:20.091348  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-background-process-start
  104 12:48:20.091460  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-background-process-stop
  105 12:48:20.091571  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-common-functions
  106 12:48:20.091681  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-echo-ipv4
  107 12:48:20.091793  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-install-packages
  108 12:48:20.091904  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-installed-packages
  109 12:48:20.092012  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-os-build
  110 12:48:20.092120  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-probe-channel
  111 12:48:20.092246  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-probe-ip
  112 12:48:20.092386  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-target-ip
  113 12:48:20.092494  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-target-mac
  114 12:48:20.092602  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-target-storage
  115 12:48:20.092713  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-case
  116 12:48:20.092821  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-event
  117 12:48:20.092928  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-feedback
  118 12:48:20.093038  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-raise
  119 12:48:20.093151  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-reference
  120 12:48:20.093262  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-runner
  121 12:48:20.093369  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-set
  122 12:48:20.093476  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-test-shell
  123 12:48:20.093586  Updating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-install-packages (oe)
  124 12:48:20.093699  Updating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/bin/lava-installed-packages (oe)
  125 12:48:20.093797  Creating /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/environment
  126 12:48:20.093883  LAVA metadata
  127 12:48:20.093953  - LAVA_JOB_ID=9584807
  128 12:48:20.094020  - LAVA_DISPATCHER_IP=192.168.201.1
  129 12:48:20.094178  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 12:48:20.094263  skipped lava-vland-overlay
  131 12:48:20.094343  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 12:48:20.094432  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 12:48:20.094497  skipped lava-multinode-overlay
  134 12:48:20.094572  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 12:48:20.094656  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 12:48:20.094734  Loading test definitions
  137 12:48:20.094833  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 12:48:20.094910  Using /lava-9584807 at stage 0
  139 12:48:20.095168  uuid=9584807_1.4.2.3.1 testdef=None
  140 12:48:20.095260  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 12:48:20.095348  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 12:48:20.095840  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 12:48:20.096079  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 12:48:20.096668  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 12:48:20.096912  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 12:48:20.097450  runner path: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/0/tests/0_dmesg test_uuid 9584807_1.4.2.3.1
  149 12:48:20.097593  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 12:48:20.097829  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 12:48:20.097902  Using /lava-9584807 at stage 1
  153 12:48:20.098199  uuid=9584807_1.4.2.3.5 testdef=None
  154 12:48:20.098306  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 12:48:20.098400  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 12:48:20.098911  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 12:48:20.099136  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 12:48:20.099702  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 12:48:20.099937  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 12:48:20.100496  runner path: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/1/tests/1_bootrr test_uuid 9584807_1.4.2.3.5
  163 12:48:20.100635  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 12:48:20.100845  Creating lava-test-runner.conf files
  166 12:48:20.100909  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/0 for stage 0
  167 12:48:20.100991  - 0_dmesg
  168 12:48:20.101068  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584807/lava-overlay-2cqhmapt/lava-9584807/1 for stage 1
  169 12:48:20.101149  - 1_bootrr
  170 12:48:20.101238  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 12:48:20.101325  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 12:48:20.107740  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 12:48:20.107849  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 12:48:20.107939  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 12:48:20.108026  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 12:48:20.108115  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 12:48:20.292993  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 12:48:20.293462  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 12:48:20.293622  extracting modules file /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584807/extract-overlay-ramdisk-krz9nuet/ramdisk
  180 12:48:20.305199  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 12:48:20.305373  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 12:48:20.305506  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584807/compress-overlay-zrtyt0j9/overlay-1.4.2.4.tar.gz to ramdisk
  183 12:48:20.305614  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584807/compress-overlay-zrtyt0j9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584807/extract-overlay-ramdisk-krz9nuet/ramdisk
  184 12:48:20.311866  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 12:48:20.312022  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 12:48:20.312150  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 12:48:20.312282  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 12:48:20.312396  Building ramdisk /var/lib/lava/dispatcher/tmp/9584807/extract-overlay-ramdisk-krz9nuet/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584807/extract-overlay-ramdisk-krz9nuet/ramdisk
  189 12:48:20.379860  >> 49731 blocks

  190 12:48:21.167215  rename /var/lib/lava/dispatcher/tmp/9584807/extract-overlay-ramdisk-krz9nuet/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/ramdisk/ramdisk.cpio.gz
  191 12:48:21.167628  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 12:48:21.167755  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 12:48:21.167860  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 12:48:21.167956  No mkimage arch provided, not using FIT.
  195 12:48:21.168046  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 12:48:21.168306  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 12:48:21.168405  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 12:48:21.168509  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 12:48:21.168600  No LXC device requested
  200 12:48:21.168683  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 12:48:21.168775  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 12:48:21.168859  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 12:48:21.168930  Checking files for TFTP limit of 4294967296 bytes.
  204 12:48:21.169308  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 12:48:21.169411  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 12:48:21.169507  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 12:48:21.169637  substitutions:
  208 12:48:21.169709  - {DTB}: None
  209 12:48:21.169772  - {INITRD}: 9584807/tftp-deploy-xuh_9fzw/ramdisk/ramdisk.cpio.gz
  210 12:48:21.169834  - {KERNEL}: 9584807/tftp-deploy-xuh_9fzw/kernel/bzImage
  211 12:48:21.169892  - {LAVA_MAC}: None
  212 12:48:21.169995  - {PRESEED_CONFIG}: None
  213 12:48:21.170073  - {PRESEED_LOCAL}: None
  214 12:48:21.170149  - {RAMDISK}: 9584807/tftp-deploy-xuh_9fzw/ramdisk/ramdisk.cpio.gz
  215 12:48:21.170207  - {ROOT_PART}: None
  216 12:48:21.170264  - {ROOT}: None
  217 12:48:21.170320  - {SERVER_IP}: 192.168.201.1
  218 12:48:21.170376  - {TEE}: None
  219 12:48:21.170432  Parsed boot commands:
  220 12:48:21.170487  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 12:48:21.170636  Parsed boot commands: tftpboot 192.168.201.1 9584807/tftp-deploy-xuh_9fzw/kernel/bzImage 9584807/tftp-deploy-xuh_9fzw/kernel/cmdline 9584807/tftp-deploy-xuh_9fzw/ramdisk/ramdisk.cpio.gz
  222 12:48:21.170725  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 12:48:21.170814  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 12:48:21.170904  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 12:48:21.170989  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 12:48:21.171056  Not connected, no need to disconnect.
  227 12:48:21.171133  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 12:48:21.171213  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 12:48:21.171279  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-4305U-sarien-cbg-0'
  230 12:48:21.174282  Setting prompt string to ['lava-test: # ']
  231 12:48:21.174632  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 12:48:21.174747  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 12:48:21.174889  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 12:48:21.174985  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 12:48:21.175201  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
  236 12:48:42.574804  >> Command sent successfully.

  237 12:48:42.577059  Returned 0 in 21 seconds
  238 12:48:42.677855  end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
  240 12:48:42.678269  end: 2.2.2 reset-device (duration 00:00:22) [common]
  241 12:48:42.678407  start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
  242 12:48:42.678569  Setting prompt string to 'Starting depthcharge on sarien...'
  243 12:48:42.678636  Changing prompt to 'Starting depthcharge on sarien...'
  244 12:48:42.678708  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  245 12:48:42.679024  [Enter `^Ec?' for help]

  246 12:48:42.679106  

  247 12:48:42.679206  

  248 12:48:42.679273  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  249 12:48:42.679339  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz

  250 12:48:42.679401  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  251 12:48:42.679461  CPU: AES supported, TXT NOT supported, VT supported

  252 12:48:42.679521  MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)

  253 12:48:42.679579  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  254 12:48:42.679637  IGD: device id 3ea1 (rev 02) is Unknown

  255 12:48:42.679694  VBOOT: Loading verstage.

  256 12:48:42.679753  CBFS @ 1d00000 size 300000

  257 12:48:42.679826  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  258 12:48:42.679886  CBFS: Locating 'fallback/verstage'

  259 12:48:42.679945  CBFS: Found @ offset 10f6c0 size 1435c

  260 12:48:42.680031  

  261 12:48:42.680116  

  262 12:48:42.680175  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  263 12:48:42.680234  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  264 12:48:42.680311  done! DID_VID 0x00281ae0

  265 12:48:42.680386  TPM ready after 0 ms

  266 12:48:42.680457  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  267 12:48:42.680519  tlcl_send_startup: Startup return code is 0

  268 12:48:42.680606  TPM: setup succeeded

  269 12:48:42.680663  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  270 12:48:42.680723  Checking cr50 for recovery request

  271 12:48:42.680780  Phase 1

  272 12:48:42.680837  FMAP: Found "FLASH" version 1.1 at 1c10000.

  273 12:48:42.680895  FMAP: base = fe000000 size = 2000000 #areas = 37

  274 12:48:42.680985  FMAP: area GBB found @ 1c11000 (978944 bytes)

  275 12:48:42.681041  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  276 12:48:42.681098  Phase 2

  277 12:48:42.681154  Phase 3

  278 12:48:42.681209  FMAP: area GBB found @ 1c11000 (978944 bytes)

  279 12:48:42.681281  VB2:vb2_report_dev_firmware() This is developer signed firmware

  280 12:48:42.681352  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  281 12:48:42.681454  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  282 12:48:42.681541  VB2:vb2_verify_keyblock() Checking key block signature...

  283 12:48:42.681598  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  284 12:48:42.681656  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  285 12:48:42.681713  VB2:vb2_verify_fw_preamble() Verifying preamble.

  286 12:48:42.681770  Phase 4

  287 12:48:42.681830  FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)

  288 12:48:42.681894  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  289 12:48:42.681952  VB2:vb2_rsa_verify_digest() Digest check failed!

  290 12:48:42.682010  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  291 12:48:42.682076  Saving nvdata

  292 12:48:42.682136  Reboot requested (10020007)

  293 12:48:42.682194  board_reset() called!

  294 12:48:42.682251  full_reset() called!

  295 12:48:44.653598  

  296 12:48:44.653746  

  297 12:48:44.662109  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  298 12:48:44.666220  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz

  299 12:48:44.671576  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  300 12:48:44.676891  CPU: AES supported, TXT NOT supported, VT supported

  301 12:48:44.682087  MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)

  302 12:48:44.686437  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  303 12:48:44.690886  IGD: device id 3ea1 (rev 02) is Unknown

  304 12:48:44.694350  VBOOT: Loading verstage.

  305 12:48:44.697199  CBFS @ 1d00000 size 300000

  306 12:48:44.703516  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  307 12:48:44.707039  CBFS: Locating 'fallback/verstage'

  308 12:48:44.710878  CBFS: Found @ offset 10f6c0 size 1435c

  309 12:48:44.725367  

  310 12:48:44.725503  

  311 12:48:44.733512  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  312 12:48:44.740495  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  313 12:48:44.743832  done! DID_VID 0x00281ae0

  314 12:48:44.745386  TPM ready after 0 ms

  315 12:48:44.749863  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  316 12:48:44.830000  tlcl_send_startup: Startup return code is 0

  317 12:48:44.831949  TPM: setup succeeded

  318 12:48:44.851238  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  319 12:48:44.854633  Checking cr50 for recovery request

  320 12:48:44.864335  Phase 1

  321 12:48:44.869275  FMAP: Found "FLASH" version 1.1 at 1c10000.

  322 12:48:44.873630  FMAP: base = fe000000 size = 2000000 #areas = 37

  323 12:48:44.878771  FMAP: area GBB found @ 1c11000 (978944 bytes)

  324 12:48:44.886180  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  325 12:48:44.892028  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  326 12:48:44.894535  Recovery requested (1009000e)

  327 12:48:44.896333  Saving nvdata

  328 12:48:44.912386  tlcl_extend: response is 0

  329 12:48:44.928090  tlcl_extend: response is 0

  330 12:48:44.932293  CBFS @ 1d00000 size 300000

  331 12:48:44.938028  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  332 12:48:44.941854  CBFS: Locating 'fallback/romstage'

  333 12:48:44.944726  CBFS: Found @ offset 80 size 15b2c

  334 12:48:44.946651  

  335 12:48:44.947346  

  336 12:48:44.954895  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  337 12:48:44.960290  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  338 12:48:44.964982  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  339 12:48:44.968600  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  340 12:48:44.973108  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  341 12:48:44.977269  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  342 12:48:44.978965  TCO_STS:   0000 0004

  343 12:48:44.982013  GEN_PMCON: d0015209 00002200

  344 12:48:44.985252  GBLRST_CAUSE: 00000000 00000000

  345 12:48:44.987263  prev_sleep_state 5

  346 12:48:44.990765  Boot Count incremented to 30325

  347 12:48:44.994096  CBFS @ 1d00000 size 300000

  348 12:48:45.000683  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  349 12:48:45.003188  CBFS: Locating 'fspm.bin'

  350 12:48:45.007732  CBFS: Found @ offset 60fc0 size 70000

  351 12:48:45.012631  FMAP: Found "FLASH" version 1.1 at 1c10000.

  352 12:48:45.017287  FMAP: base = fe000000 size = 2000000 #areas = 37

  353 12:48:45.023127  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  354 12:48:45.029535  Probing TPM I2C: done! DID_VID 0x00281ae0

  355 12:48:45.031712  Locality already claimed

  356 12:48:45.035070  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  357 12:48:45.055063  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  358 12:48:45.061287  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  359 12:48:45.064576  MRC cache found, size 18e0

  360 12:48:45.066824  bootmode is set to :2

  361 12:48:45.158397  CBMEM:

  362 12:48:45.161110  IMD: root @ 89fff000 254 entries.

  363 12:48:45.164154  IMD: root @ 89ffec00 62 entries.

  364 12:48:45.167804  External stage cache:

  365 12:48:45.171261  IMD: root @ 8abff000 254 entries.

  366 12:48:45.173990  IMD: root @ 8abfec00 62 entries.

  367 12:48:45.179458  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  368 12:48:45.183384  creating vboot_handoff structure

  369 12:48:45.203911  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  370 12:48:45.220104  tlcl_write: response is 0

  371 12:48:45.238440  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  372 12:48:45.243051  MRC: TPM MRC hash updated successfully.

  373 12:48:45.244371  1 DIMMs found

  374 12:48:45.246491  top_of_ram = 0x8a000000

  375 12:48:45.252318  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  376 12:48:45.256783  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  377 12:48:45.260145  CBFS @ 1d00000 size 300000

  378 12:48:45.265835  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  379 12:48:45.269186  CBFS: Locating 'fallback/postcar'

  380 12:48:45.273113  CBFS: Found @ offset 107000 size 41a4

  381 12:48:45.279176  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  382 12:48:45.289852  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  383 12:48:45.294990  Processing 126 relocs. Offset value of 0x87cdd000

  384 12:48:45.297093  

  385 12:48:45.297172  

  386 12:48:45.306342  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  387 12:48:45.308986  CBFS @ 1d00000 size 300000

  388 12:48:45.315466  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  389 12:48:45.318691  CBFS: Locating 'fallback/ramstage'

  390 12:48:45.322423  CBFS: Found @ offset 458c0 size 1a8a8

  391 12:48:45.329366  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  392 12:48:45.355366  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  393 12:48:45.361153  Processing 3754 relocs. Offset value of 0x88e81000

  394 12:48:45.366391  

  395 12:48:45.366938  

  396 12:48:45.375068  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  397 12:48:45.380352  FMAP: Found "FLASH" version 1.1 at 1c10000.

  398 12:48:45.385081  FMAP: base = fe000000 size = 2000000 #areas = 37

  399 12:48:45.389559  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  400 12:48:45.394246  WARNING: RO_VPD is uninitialized or empty.

  401 12:48:45.398207  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  402 12:48:45.403388  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  403 12:48:45.404825  Normal boot.

  404 12:48:45.411322  BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1163

  405 12:48:45.413945  CBFS @ 1d00000 size 300000

  406 12:48:45.420555  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  407 12:48:45.425075  CBFS: Locating 'cpu_microcode_blob.bin'

  408 12:48:45.428308  CBFS: Found @ offset 15c40 size 2fc00

  409 12:48:45.432630  microcode: sig=0x806ec pf=0x80 revision=0xb7

  410 12:48:45.434726  Skip microcode update

  411 12:48:45.437360  CBFS @ 1d00000 size 300000

  412 12:48:45.443823  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  413 12:48:45.446537  CBFS: Locating 'fsps.bin'

  414 12:48:45.451111  CBFS: Found @ offset d1fc0 size 35000

  415 12:48:45.485064  Detected 2 core, 2 thread CPU.

  416 12:48:45.487064  Setting up SMI for CPU

  417 12:48:45.489294  IED base = 0x8ac00000

  418 12:48:45.491987  IED size = 0x00400000

  419 12:48:45.495140  Will perform SMM setup.

  420 12:48:45.499364  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.

  421 12:48:45.507143  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  422 12:48:45.511997  Processing 16 relocs. Offset value of 0x00030000

  423 12:48:45.515114  Attempting to start 1 APs

  424 12:48:45.518516  Waiting for 10ms after sending INIT.

  425 12:48:45.532258  Waiting for 1st SIPI to complete...done.

  426 12:48:45.534374  AP: slot 1 apic_id 2.

  427 12:48:45.539067  Waiting for 2nd SIPI to complete...done.

  428 12:48:45.546768  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  429 12:48:45.551037  Processing 13 relocs. Offset value of 0x00038000

  430 12:48:45.558177  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  431 12:48:45.562219  Installing SMM handler to 0x8a000000

  432 12:48:45.569733  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  433 12:48:45.575430  Processing 867 relocs. Offset value of 0x8a010000

  434 12:48:45.583329  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  435 12:48:45.588457  Processing 13 relocs. Offset value of 0x8a008000

  436 12:48:45.594006  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  437 12:48:45.600055  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  438 12:48:45.603226  Clearing SMI status registers

  439 12:48:45.604697  SMI_STS: PM1 

  440 12:48:45.607298  PM1_STS: WAK PWRBTN 

  441 12:48:45.609423  TCO_STS: BOOT SECOND_TO 

  442 12:48:45.612597  GPE0 STD STS: eSPI 

  443 12:48:45.614543  New SMBASE 0x8a000000

  444 12:48:45.616602  In relocation handler: CPU 0

  445 12:48:45.621184  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  446 12:48:45.625818  Writing SMRR. base = 0x8a000006, mask=0xff000800

  447 12:48:45.627877  Relocation complete.

  448 12:48:45.630407  New SMBASE 0x89fffc00

  449 12:48:45.633605  In relocation handler: CPU 1

  450 12:48:45.637830  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  451 12:48:45.642321  Writing SMRR. base = 0x8a000006, mask=0xff000800

  452 12:48:45.644821  Relocation complete.

  453 12:48:45.646617  Initializing CPU #0

  454 12:48:45.649858  CPU: vendor Intel device 806ec

  455 12:48:45.653205  CPU: family 06, model 8e, stepping 0c

  456 12:48:45.656484  Clearing out pending MCEs

  457 12:48:45.660487  Setting up local APIC... apic_id: 0x00 done.

  458 12:48:45.663803  Turbo is available but hidden

  459 12:48:45.665904  Turbo has been enabled

  460 12:48:45.668631  VMX status: enabled

  461 12:48:45.671186  IA32_FEATURE_CONTROL status: locked

  462 12:48:45.673837  Skip microcode update

  463 12:48:45.675892  CPU #0 initialized

  464 12:48:45.677987  Initializing CPU #1

  465 12:48:45.681314  CPU: vendor Intel device 806ec

  466 12:48:45.685515  CPU: family 06, model 8e, stepping 0c

  467 12:48:45.688088  Clearing out pending MCEs

  468 12:48:45.692291  Setting up local APIC... apic_id: 0x02 done.

  469 12:48:45.694987  VMX status: enabled

  470 12:48:45.698322  IA32_FEATURE_CONTROL status: locked

  471 12:48:45.699805  Skip microcode update

  472 12:48:45.702745  CPU #1 initialized

  473 12:48:45.706785  bsp_do_flight_plan done after 163 msecs.

  474 12:48:45.709661  CPU: frequency set to 2200 MHz

  475 12:48:45.710896  Enabling SMIs.

  476 12:48:45.712365  Locking SMM.

  477 12:48:45.715797  CBFS @ 1d00000 size 300000

  478 12:48:45.721658  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  479 12:48:45.724357  CBFS: Locating 'vbt.bin'

  480 12:48:45.727879  CBFS: Found @ offset 60a40 size 4a0

  481 12:48:45.733562  Found a VBT of 4608 bytes after decompression

  482 12:48:45.746091  FMAP: area GBB found @ 1c11000 (978944 bytes)

  483 12:48:45.856757  Detected 2 core, 2 thread CPU.

  484 12:48:45.860176  Detected 2 core, 2 thread CPU.

  485 12:48:46.089745  Display FSP Version Info HOB

  486 12:48:46.093255  Reference Code - CPU = 7.0.5e.40

  487 12:48:46.095784  uCode Version = 0.0.0.b8

  488 12:48:46.097929  Display FSP Version Info HOB

  489 12:48:46.101521  Reference Code - ME = 7.0.5e.40

  490 12:48:46.104124  MEBx version = 0.0.0.0

  491 12:48:46.107567  ME Firmware Version = Consumer SKU

  492 12:48:46.110215  Display FSP Version Info HOB

  493 12:48:46.114219  Reference Code - CNL PCH = 7.0.5e.40

  494 12:48:46.116934  PCH-CRID Status = Disabled

  495 12:48:46.120115  CNL PCH H A0 Hsio Version = 2.0.0.0

  496 12:48:46.124421  CNL PCH H Ax Hsio Version = 9.0.0.0

  497 12:48:46.127703  CNL PCH H Bx Hsio Version = a.0.0.0

  498 12:48:46.131135  CNL PCH LP B0 Hsio Version = 7.0.0.0

  499 12:48:46.134587  CNL PCH LP Bx Hsio Version = 6.0.0.0

  500 12:48:46.138935  CNL PCH LP Dx Hsio Version = 7.0.0.0

  501 12:48:46.142250  Display FSP Version Info HOB

  502 12:48:46.146454  Reference Code - SA - System Agent = 7.0.5e.40

  503 12:48:46.149272  Reference Code - MRC = 0.7.1.68

  504 12:48:46.152662  SA - PCIe Version = 7.0.5e.40

  505 12:48:46.155267  SA-CRID Status = Disabled

  506 12:48:46.158754  SA-CRID Original Value = 0.0.0.c

  507 12:48:46.161907  SA-CRID New Value = 0.0.0.c

  508 12:48:46.180380  RTC Init

  509 12:48:46.184261  Set power off after power failure.

  510 12:48:46.185010  Disabling Deep S3

  511 12:48:46.187096  Disabling Deep S3

  512 12:48:46.188933  Disabling Deep S4

  513 12:48:46.191486  Disabling Deep S4

  514 12:48:46.192533  Disabling Deep S5

  515 12:48:46.194779  Disabling Deep S5

  516 12:48:46.201767  BS: BS_DEV_INIT_CHIPS times (us): entry 301159 run 466020 exit 16223

  517 12:48:46.203836  Enumerating buses...

  518 12:48:46.208511  Show all devs... Before device enumeration.

  519 12:48:46.210624  Root Device: enabled 1

  520 12:48:46.212706  CPU_CLUSTER: 0: enabled 1

  521 12:48:46.215273  DOMAIN: 0000: enabled 1

  522 12:48:46.217283  APIC: 00: enabled 1

  523 12:48:46.220268  PCI: 00:00.0: enabled 1

  524 12:48:46.222238  PCI: 00:02.0: enabled 1

  525 12:48:46.225600  PCI: 00:04.0: enabled 1

  526 12:48:46.227554  PCI: 00:12.0: enabled 1

  527 12:48:46.229747  PCI: 00:12.5: enabled 0

  528 12:48:46.232306  PCI: 00:12.6: enabled 0

  529 12:48:46.234474  PCI: 00:13.0: enabled 0

  530 12:48:46.237319  PCI: 00:14.0: enabled 1

  531 12:48:46.239948  PCI: 00:14.1: enabled 0

  532 12:48:46.242679  PCI: 00:14.3: enabled 1

  533 12:48:46.244234  PCI: 00:14.5: enabled 0

  534 12:48:46.246800  PCI: 00:15.0: enabled 1

  535 12:48:46.248993  PCI: 00:15.1: enabled 1

  536 12:48:46.252313  PCI: 00:15.2: enabled 0

  537 12:48:46.253802  PCI: 00:15.3: enabled 0

  538 12:48:46.256577  PCI: 00:16.0: enabled 1

  539 12:48:46.258546  PCI: 00:16.1: enabled 0

  540 12:48:46.261786  PCI: 00:16.2: enabled 0

  541 12:48:46.264045  PCI: 00:16.3: enabled 0

  542 12:48:46.266128  PCI: 00:16.4: enabled 0

  543 12:48:46.268720  PCI: 00:16.5: enabled 0

  544 12:48:46.271300  PCI: 00:17.0: enabled 1

  545 12:48:46.273844  PCI: 00:19.0: enabled 1

  546 12:48:46.275992  PCI: 00:19.1: enabled 0

  547 12:48:46.279098  PCI: 00:19.2: enabled 1

  548 12:48:46.280503  PCI: 00:1a.0: enabled 0

  549 12:48:46.283625  PCI: 00:1c.0: enabled 1

  550 12:48:46.286053  PCI: 00:1c.1: enabled 0

  551 12:48:46.288652  PCI: 00:1c.2: enabled 0

  552 12:48:46.290646  PCI: 00:1c.3: enabled 0

  553 12:48:46.293204  PCI: 00:1c.4: enabled 0

  554 12:48:46.295318  PCI: 00:1c.5: enabled 0

  555 12:48:46.298202  PCI: 00:1c.6: enabled 0

  556 12:48:46.300685  PCI: 00:1c.7: enabled 1

  557 12:48:46.303214  PCI: 00:1d.0: enabled 1

  558 12:48:46.304708  PCI: 00:1d.1: enabled 1

  559 12:48:46.307348  PCI: 00:1d.2: enabled 0

  560 12:48:46.310575  PCI: 00:1d.3: enabled 0

  561 12:48:46.312233  PCI: 00:1d.4: enabled 1

  562 12:48:46.314727  PCI: 00:1e.0: enabled 0

  563 12:48:46.317061  PCI: 00:1e.1: enabled 0

  564 12:48:46.319837  PCI: 00:1e.2: enabled 0

  565 12:48:46.321960  PCI: 00:1e.3: enabled 0

  566 12:48:46.324693  PCI: 00:1f.0: enabled 1

  567 12:48:46.327186  PCI: 00:1f.1: enabled 1

  568 12:48:46.329398  PCI: 00:1f.2: enabled 1

  569 12:48:46.331878  PCI: 00:1f.3: enabled 1

  570 12:48:46.334557  PCI: 00:1f.4: enabled 1

  571 12:48:46.336788  PCI: 00:1f.5: enabled 1

  572 12:48:46.339375  PCI: 00:1f.6: enabled 1

  573 12:48:46.341561  USB0 port 0: enabled 1

  574 12:48:46.343555  I2C: 00:10: enabled 1

  575 12:48:46.345580  I2C: 00:10: enabled 1

  576 12:48:46.347878  I2C: 00:34: enabled 1

  577 12:48:46.350466  I2C: 00:2c: enabled 1

  578 12:48:46.352541  I2C: 00:50: enabled 1

  579 12:48:46.355343  PNP: 0c09.0: enabled 1

  580 12:48:46.357931  USB2 port 0: enabled 1

  581 12:48:46.360074  USB2 port 1: enabled 1

  582 12:48:46.362057  USB2 port 2: enabled 1

  583 12:48:46.364951  USB2 port 4: enabled 1

  584 12:48:46.366606  USB2 port 5: enabled 1

  585 12:48:46.369743  USB2 port 6: enabled 1

  586 12:48:46.371206  USB2 port 7: enabled 1

  587 12:48:46.373930  USB2 port 8: enabled 1

  588 12:48:46.376111  USB2 port 9: enabled 1

  589 12:48:46.378061  USB3 port 0: enabled 1

  590 12:48:46.380746  USB3 port 1: enabled 1

  591 12:48:46.382895  USB3 port 2: enabled 1

  592 12:48:46.384954  USB3 port 3: enabled 1

  593 12:48:46.387340  USB3 port 4: enabled 1

  594 12:48:46.389469  APIC: 02: enabled 1

  595 12:48:46.391868  Compare with tree...

  596 12:48:46.394078  Root Device: enabled 1

  597 12:48:46.397627   CPU_CLUSTER: 0: enabled 1

  598 12:48:46.399163    APIC: 00: enabled 1

  599 12:48:46.401576    APIC: 02: enabled 1

  600 12:48:46.404239   DOMAIN: 0000: enabled 1

  601 12:48:46.406774    PCI: 00:00.0: enabled 1

  602 12:48:46.409674    PCI: 00:02.0: enabled 1

  603 12:48:46.412488    PCI: 00:04.0: enabled 1

  604 12:48:46.414588    PCI: 00:12.0: enabled 1

  605 12:48:46.417822    PCI: 00:12.5: enabled 0

  606 12:48:46.420004    PCI: 00:12.6: enabled 0

  607 12:48:46.422143    PCI: 00:13.0: enabled 0

  608 12:48:46.425242    PCI: 00:14.0: enabled 1

  609 12:48:46.427889     USB0 port 0: enabled 1

  610 12:48:46.430132      USB2 port 0: enabled 1

  611 12:48:46.432778      USB2 port 1: enabled 1

  612 12:48:46.435882      USB2 port 2: enabled 1

  613 12:48:46.438935      USB2 port 4: enabled 1

  614 12:48:46.441008      USB2 port 5: enabled 1

  615 12:48:46.443626      USB2 port 6: enabled 1

  616 12:48:46.446682      USB2 port 7: enabled 1

  617 12:48:46.449930      USB2 port 8: enabled 1

  618 12:48:46.451863      USB2 port 9: enabled 1

  619 12:48:46.454389      USB3 port 0: enabled 1

  620 12:48:46.458228      USB3 port 1: enabled 1

  621 12:48:46.459927      USB3 port 2: enabled 1

  622 12:48:46.463607      USB3 port 3: enabled 1

  623 12:48:46.466258      USB3 port 4: enabled 1

  624 12:48:46.469043    PCI: 00:14.1: enabled 0

  625 12:48:46.470660    PCI: 00:14.3: enabled 1

  626 12:48:46.473332    PCI: 00:14.5: enabled 0

  627 12:48:46.476289    PCI: 00:15.0: enabled 1

  628 12:48:46.478292     I2C: 00:10: enabled 1

  629 12:48:46.481147     I2C: 00:10: enabled 1

  630 12:48:46.483584     I2C: 00:34: enabled 1

  631 12:48:46.486746    PCI: 00:15.1: enabled 1

  632 12:48:46.488706     I2C: 00:2c: enabled 1

  633 12:48:46.491803    PCI: 00:15.2: enabled 0

  634 12:48:46.494439    PCI: 00:15.3: enabled 0

  635 12:48:46.496480    PCI: 00:16.0: enabled 1

  636 12:48:46.499250    PCI: 00:16.1: enabled 0

  637 12:48:46.501690    PCI: 00:16.2: enabled 0

  638 12:48:46.504388    PCI: 00:16.3: enabled 0

  639 12:48:46.507543    PCI: 00:16.4: enabled 0

  640 12:48:46.510081    PCI: 00:16.5: enabled 0

  641 12:48:46.512964    PCI: 00:17.0: enabled 1

  642 12:48:46.514802    PCI: 00:19.0: enabled 1

  643 12:48:46.517986     I2C: 00:50: enabled 1

  644 12:48:46.520116    PCI: 00:19.1: enabled 0

  645 12:48:46.523252    PCI: 00:19.2: enabled 1

  646 12:48:46.525413    PCI: 00:1a.0: enabled 0

  647 12:48:46.528141    PCI: 00:1c.0: enabled 1

  648 12:48:46.531432    PCI: 00:1c.1: enabled 0

  649 12:48:46.533493    PCI: 00:1c.2: enabled 0

  650 12:48:46.536260    PCI: 00:1c.3: enabled 0

  651 12:48:46.538460    PCI: 00:1c.4: enabled 0

  652 12:48:46.541172    PCI: 00:1c.5: enabled 0

  653 12:48:46.544300    PCI: 00:1c.6: enabled 0

  654 12:48:46.546852    PCI: 00:1c.7: enabled 1

  655 12:48:46.549325    PCI: 00:1d.0: enabled 1

  656 12:48:46.551580    PCI: 00:1d.1: enabled 1

  657 12:48:46.554652    PCI: 00:1d.2: enabled 0

  658 12:48:46.557296    PCI: 00:1d.3: enabled 0

  659 12:48:46.559651    PCI: 00:1d.4: enabled 1

  660 12:48:46.562428    PCI: 00:1e.0: enabled 0

  661 12:48:46.564565    PCI: 00:1e.1: enabled 0

  662 12:48:46.567364    PCI: 00:1e.2: enabled 0

  663 12:48:46.570646    PCI: 00:1e.3: enabled 0

  664 12:48:46.573422    PCI: 00:1f.0: enabled 1

  665 12:48:46.575473     PNP: 0c09.0: enabled 1

  666 12:48:46.577755    PCI: 00:1f.1: enabled 1

  667 12:48:46.580617    PCI: 00:1f.2: enabled 1

  668 12:48:46.583872    PCI: 00:1f.3: enabled 1

  669 12:48:46.586603    PCI: 00:1f.4: enabled 1

  670 12:48:46.588262    PCI: 00:1f.5: enabled 1

  671 12:48:46.590891    PCI: 00:1f.6: enabled 1

  672 12:48:46.593661  Root Device scanning...

  673 12:48:46.597540  root_dev_scan_bus for Root Device

  674 12:48:46.600119  CPU_CLUSTER: 0 enabled

  675 12:48:46.601492  DOMAIN: 0000 enabled

  676 12:48:46.604226  DOMAIN: 0000 scanning...

  677 12:48:46.608114  PCI: pci_scan_bus for bus 00

  678 12:48:46.610649  PCI: 00:00.0 [8086/0000] ops

  679 12:48:46.613794  PCI: 00:00.0 [8086/3e35] enabled

  680 12:48:46.617540  PCI: 00:02.0 [8086/0000] ops

  681 12:48:46.620258  PCI: 00:02.0 [8086/3ea1] enabled

  682 12:48:46.623621  PCI: 00:04.0 [8086/1903] enabled

  683 12:48:46.627072  PCI: 00:08.0 [8086/1911] enabled

  684 12:48:46.631026  PCI: 00:12.0 [8086/9df9] enabled

  685 12:48:46.633728  PCI: 00:14.0 [8086/0000] bus ops

  686 12:48:46.637137  PCI: 00:14.0 [8086/9ded] enabled

  687 12:48:46.640038  PCI: 00:14.2 [8086/9def] enabled

  688 12:48:46.643432  PCI: 00:14.3 [8086/9df0] enabled

  689 12:48:46.646947  PCI: 00:15.0 [8086/0000] bus ops

  690 12:48:46.650168  PCI: 00:15.0 [8086/9de8] enabled

  691 12:48:46.653462  PCI: 00:15.1 [8086/0000] bus ops

  692 12:48:46.657360  PCI: 00:15.1 [8086/9de9] enabled

  693 12:48:46.659418  PCI: 00:16.0 [8086/0000] ops

  694 12:48:46.663034  PCI: 00:16.0 [8086/9de0] enabled

  695 12:48:46.666635  PCI: 00:17.0 [8086/0000] ops

  696 12:48:46.668916  PCI: 00:17.0 [8086/9dd3] enabled

  697 12:48:46.672235  PCI: 00:19.0 [8086/0000] bus ops

  698 12:48:46.675951  PCI: 00:19.0 [8086/9dc5] enabled

  699 12:48:46.678580  PCI: 00:19.2 [8086/0000] ops

  700 12:48:46.682040  PCI: 00:19.2 [8086/9dc7] enabled

  701 12:48:46.685497  PCI: 00:1c.0 [8086/0000] bus ops

  702 12:48:46.688876  PCI: 00:1c.0 [8086/9dbf] enabled

  703 12:48:46.694471  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  704 12:48:46.697388  PCI: 00:1d.0 [8086/0000] bus ops

  705 12:48:46.701645  PCI: 00:1d.0 [8086/9db4] enabled

  706 12:48:46.706229  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  707 12:48:46.712288  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  708 12:48:46.716204  PCI: 00:1f.0 [8086/0000] bus ops

  709 12:48:46.719183  PCI: 00:1f.0 [8086/9d84] enabled

  710 12:48:46.724540  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  711 12:48:46.730943  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  712 12:48:46.734130  PCI: 00:1f.3 [8086/0000] bus ops

  713 12:48:46.737487  PCI: 00:1f.3 [8086/9dc8] enabled

  714 12:48:46.740088  PCI: 00:1f.4 [8086/0000] bus ops

  715 12:48:46.744192  PCI: 00:1f.4 [8086/9da3] enabled

  716 12:48:46.746351  PCI: 00:1f.5 [8086/0000] bus ops

  717 12:48:46.750331  PCI: 00:1f.5 [8086/9da4] enabled

  718 12:48:46.753257  PCI: 00:1f.6 [8086/15be] enabled

  719 12:48:46.757188  PCI: Leftover static devices:

  720 12:48:46.758593  PCI: 00:12.5

  721 12:48:46.759444  PCI: 00:12.6

  722 12:48:46.760687  PCI: 00:13.0

  723 12:48:46.761951  PCI: 00:14.1

  724 12:48:46.763457  PCI: 00:14.5

  725 12:48:46.765733  PCI: 00:15.2

  726 12:48:46.766006  PCI: 00:15.3

  727 12:48:46.767231  PCI: 00:16.1

  728 12:48:46.769026  PCI: 00:16.2

  729 12:48:46.770299  PCI: 00:16.3

  730 12:48:46.772167  PCI: 00:16.4

  731 12:48:46.772996  PCI: 00:16.5

  732 12:48:46.774255  PCI: 00:19.1

  733 12:48:46.775567  PCI: 00:1a.0

  734 12:48:46.777161  PCI: 00:1c.1

  735 12:48:46.778509  PCI: 00:1c.2

  736 12:48:46.779998  PCI: 00:1c.3

  737 12:48:46.781251  PCI: 00:1c.4

  738 12:48:46.782798  PCI: 00:1c.5

  739 12:48:46.783368  PCI: 00:1c.6

  740 12:48:46.785324  PCI: 00:1c.7

  741 12:48:46.786646  PCI: 00:1d.1

  742 12:48:46.788663  PCI: 00:1d.2

  743 12:48:46.788938  PCI: 00:1d.3

  744 12:48:46.790918  PCI: 00:1d.4

  745 12:48:46.791591  PCI: 00:1e.0

  746 12:48:46.793613  PCI: 00:1e.1

  747 12:48:46.794228  PCI: 00:1e.2

  748 12:48:46.795891  PCI: 00:1e.3

  749 12:48:46.797245  PCI: 00:1f.1

  750 12:48:46.798732  PCI: 00:1f.2

  751 12:48:46.801765  PCI: Check your devicetree.cb.

  752 12:48:46.804127  PCI: 00:14.0 scanning...

  753 12:48:46.807719  scan_usb_bus for PCI: 00:14.0

  754 12:48:46.809828  USB0 port 0 enabled

  755 12:48:46.811971  USB0 port 0 scanning...

  756 12:48:46.815318  scan_usb_bus for USB0 port 0

  757 12:48:46.818176  USB2 port 0 enabled

  758 12:48:46.819472  USB2 port 1 enabled

  759 12:48:46.822038  USB2 port 2 enabled

  760 12:48:46.824173  USB2 port 4 enabled

  761 12:48:46.825577  USB2 port 5 enabled

  762 12:48:46.827417  USB2 port 6 enabled

  763 12:48:46.829939  USB2 port 7 enabled

  764 12:48:46.832452  USB2 port 8 enabled

  765 12:48:46.833839  USB2 port 9 enabled

  766 12:48:46.836582  USB3 port 0 enabled

  767 12:48:46.837730  USB3 port 1 enabled

  768 12:48:46.840062  USB3 port 2 enabled

  769 12:48:46.841930  USB3 port 3 enabled

  770 12:48:46.844136  USB3 port 4 enabled

  771 12:48:46.846072  USB2 port 0 scanning...

  772 12:48:46.850021  scan_usb_bus for USB2 port 0

  773 12:48:46.853137  scan_usb_bus for USB2 port 0 done

  774 12:48:46.858587  scan_bus: scanning of bus USB2 port 0 took 9061 usecs

  775 12:48:46.861197  USB2 port 1 scanning...

  776 12:48:46.863960  scan_usb_bus for USB2 port 1

  777 12:48:46.867789  scan_usb_bus for USB2 port 1 done

  778 12:48:46.873071  scan_bus: scanning of bus USB2 port 1 took 9058 usecs

  779 12:48:46.875000  USB2 port 2 scanning...

  780 12:48:46.878974  scan_usb_bus for USB2 port 2

  781 12:48:46.881770  scan_usb_bus for USB2 port 2 done

  782 12:48:46.886875  scan_bus: scanning of bus USB2 port 2 took 9061 usecs

  783 12:48:46.889649  USB2 port 4 scanning...

  784 12:48:46.892933  scan_usb_bus for USB2 port 4

  785 12:48:46.897090  scan_usb_bus for USB2 port 4 done

  786 12:48:46.901859  scan_bus: scanning of bus USB2 port 4 took 9059 usecs

  787 12:48:46.903882  USB2 port 5 scanning...

  788 12:48:46.907418  scan_usb_bus for USB2 port 5

  789 12:48:46.910472  scan_usb_bus for USB2 port 5 done

  790 12:48:46.916039  scan_bus: scanning of bus USB2 port 5 took 9060 usecs

  791 12:48:46.918612  USB2 port 6 scanning...

  792 12:48:46.921945  scan_usb_bus for USB2 port 6

  793 12:48:46.924867  scan_usb_bus for USB2 port 6 done

  794 12:48:46.930955  scan_bus: scanning of bus USB2 port 6 took 9059 usecs

  795 12:48:46.933038  USB2 port 7 scanning...

  796 12:48:46.935871  scan_usb_bus for USB2 port 7

  797 12:48:46.939211  scan_usb_bus for USB2 port 7 done

  798 12:48:46.944958  scan_bus: scanning of bus USB2 port 7 took 9061 usecs

  799 12:48:46.946988  USB2 port 8 scanning...

  800 12:48:46.950686  scan_usb_bus for USB2 port 8

  801 12:48:46.953840  scan_usb_bus for USB2 port 8 done

  802 12:48:46.959387  scan_bus: scanning of bus USB2 port 8 took 9062 usecs

  803 12:48:46.961800  USB2 port 9 scanning...

  804 12:48:46.964697  scan_usb_bus for USB2 port 9

  805 12:48:46.968660  scan_usb_bus for USB2 port 9 done

  806 12:48:46.974179  scan_bus: scanning of bus USB2 port 9 took 9060 usecs

  807 12:48:46.976134  USB3 port 0 scanning...

  808 12:48:46.978941  scan_usb_bus for USB3 port 0

  809 12:48:46.982504  scan_usb_bus for USB3 port 0 done

  810 12:48:46.988016  scan_bus: scanning of bus USB3 port 0 took 9061 usecs

  811 12:48:46.990113  USB3 port 1 scanning...

  812 12:48:46.993818  scan_usb_bus for USB3 port 1

  813 12:48:46.997876  scan_usb_bus for USB3 port 1 done

  814 12:48:47.002578  scan_bus: scanning of bus USB3 port 1 took 9061 usecs

  815 12:48:47.005350  USB3 port 2 scanning...

  816 12:48:47.008018  scan_usb_bus for USB3 port 2

  817 12:48:47.011624  scan_usb_bus for USB3 port 2 done

  818 12:48:47.017001  scan_bus: scanning of bus USB3 port 2 took 9061 usecs

  819 12:48:47.019751  USB3 port 3 scanning...

  820 12:48:47.022480  scan_usb_bus for USB3 port 3

  821 12:48:47.025580  scan_usb_bus for USB3 port 3 done

  822 12:48:47.031778  scan_bus: scanning of bus USB3 port 3 took 9061 usecs

  823 12:48:47.033804  USB3 port 4 scanning...

  824 12:48:47.036700  scan_usb_bus for USB3 port 4

  825 12:48:47.040151  scan_usb_bus for USB3 port 4 done

  826 12:48:47.045542  scan_bus: scanning of bus USB3 port 4 took 9062 usecs

  827 12:48:47.049362  scan_usb_bus for USB0 port 0 done

  828 12:48:47.055050  scan_bus: scanning of bus USB0 port 0 took 239302 usecs

  829 12:48:47.058932  scan_usb_bus for PCI: 00:14.0 done

  830 12:48:47.063929  scan_bus: scanning of bus PCI: 00:14.0 took 256234 usecs

  831 12:48:47.066036  PCI: 00:15.0 scanning...

  832 12:48:47.070312  scan_generic_bus for PCI: 00:15.0

  833 12:48:47.074425  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  834 12:48:47.078023  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  835 12:48:47.083121  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  836 12:48:47.086399  scan_generic_bus for PCI: 00:15.0 done

  837 12:48:47.092487  scan_bus: scanning of bus PCI: 00:15.0 took 22382 usecs

  838 12:48:47.094040  PCI: 00:15.1 scanning...

  839 12:48:47.098615  scan_generic_bus for PCI: 00:15.1

  840 12:48:47.101857  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  841 12:48:47.106009  scan_generic_bus for PCI: 00:15.1 done

  842 12:48:47.111237  scan_bus: scanning of bus PCI: 00:15.1 took 14213 usecs

  843 12:48:47.113817  PCI: 00:19.0 scanning...

  844 12:48:47.117322  scan_generic_bus for PCI: 00:19.0

  845 12:48:47.121890  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

  846 12:48:47.125980  scan_generic_bus for PCI: 00:19.0 done

  847 12:48:47.130931  scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs

  848 12:48:47.133521  PCI: 00:1c.0 scanning...

  849 12:48:47.137784  do_pci_scan_bridge for PCI: 00:1c.0

  850 12:48:47.141064  PCI: pci_scan_bus for bus 01

  851 12:48:47.143881  PCI: 01:00.0 [10ec/525a] enabled

  852 12:48:47.147232  Capability: type 0x01 @ 0x80

  853 12:48:47.150560  Capability: type 0x05 @ 0x90

  854 12:48:47.153218  Capability: type 0x10 @ 0xb0

  855 12:48:47.156368  Capability: type 0x10 @ 0x40

  856 12:48:47.159228  Enabling Common Clock Configuration

  857 12:48:47.163846  L1 Sub-State supported from root port 28

  858 12:48:47.166162  L1 Sub-State Support = 0xf

  859 12:48:47.169109  CommonModeRestoreTime = 0x3c

  860 12:48:47.173923  Power On Value = 0x6, Power On Scale = 0x1

  861 12:48:47.176768  ASPM: Enabled L0s and L1

  862 12:48:47.179300  Capability: type 0x01 @ 0x80

  863 12:48:47.181971  Capability: type 0x05 @ 0x90

  864 12:48:47.184736  Capability: type 0x10 @ 0xb0

  865 12:48:47.190557  scan_bus: scanning of bus PCI: 00:1c.0 took 53655 usecs

  866 12:48:47.192683  PCI: 00:1d.0 scanning...

  867 12:48:47.196771  do_pci_scan_bridge for PCI: 00:1d.0

  868 12:48:47.199654  PCI: pci_scan_bus for bus 02

  869 12:48:47.203063  PCI: 02:00.0 [15b7/5004] enabled

  870 12:48:47.206865  Capability: type 0x01 @ 0x80

  871 12:48:47.208929  Capability: type 0x05 @ 0x90

  872 12:48:47.211951  Capability: type 0x11 @ 0xb0

  873 12:48:47.215114  Capability: type 0x10 @ 0xc0

  874 12:48:47.217800  Capability: type 0x10 @ 0x40

  875 12:48:47.221237  Enabling Common Clock Configuration

  876 12:48:47.225893  L1 Sub-State supported from root port 29

  877 12:48:47.228185  L1 Sub-State Support = 0x5

  878 12:48:47.231263  CommonModeRestoreTime = 0xff

  879 12:48:47.236340  Power On Value = 0x16, Power On Scale = 0x0

  880 12:48:47.237569  ASPM: Enabled L1

  881 12:48:47.241019  Capability: type 0x01 @ 0x80

  882 12:48:47.243767  Capability: type 0x05 @ 0x90

  883 12:48:47.246490  Capability: type 0x11 @ 0xb0

  884 12:48:47.249369  Capability: type 0x10 @ 0xc0

  885 12:48:47.255565  scan_bus: scanning of bus PCI: 00:1d.0 took 58815 usecs

  886 12:48:47.256898  PCI: 00:1f.0 scanning...

  887 12:48:47.260927  scan_lpc_bus for PCI: 00:1f.0

  888 12:48:47.262962  PNP: 0c09.0 enabled

  889 12:48:47.266225  scan_lpc_bus for PCI: 00:1f.0 done

  890 12:48:47.271579  scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs

  891 12:48:47.274133  PCI: 00:1f.3 scanning...

  892 12:48:47.280421  scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs

  893 12:48:47.282294  PCI: 00:1f.4 scanning...

  894 12:48:47.286915  scan_generic_bus for PCI: 00:1f.4

  895 12:48:47.290002  scan_generic_bus for PCI: 00:1f.4 done

  896 12:48:47.295610  scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs

  897 12:48:47.298595  PCI: 00:1f.5 scanning...

  898 12:48:47.301853  scan_generic_bus for PCI: 00:1f.5

  899 12:48:47.305557  scan_generic_bus for PCI: 00:1f.5 done

  900 12:48:47.312118  scan_bus: scanning of bus PCI: 00:1f.5 took 10130 usecs

  901 12:48:47.316646  scan_bus: scanning of bus DOMAIN: 0000 took 709515 usecs

  902 12:48:47.320972  root_dev_scan_bus for Root Device done

  903 12:48:47.326461  scan_bus: scanning of bus Root Device took 729655 usecs

  904 12:48:47.327561  done

  905 12:48:47.333728  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  906 12:48:47.338908  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  907 12:48:47.346918  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

  908 12:48:47.354020  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

  909 12:48:47.357843  SPI flash protection: WPSW=1 SRP0=0

  910 12:48:47.362115  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  911 12:48:47.368608  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1125813 exit 34824

  912 12:48:47.372109  found VGA at PCI: 00:02.0

  913 12:48:47.375244  Setting up VGA for PCI: 00:02.0

  914 12:48:47.379212  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  915 12:48:47.385066  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  916 12:48:47.386929  Allocating resources...

  917 12:48:47.389202  Reading resources...

  918 12:48:47.393775  Root Device read_resources bus 0 link: 0

  919 12:48:47.398108  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  920 12:48:47.402853  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  921 12:48:47.407503  DOMAIN: 0000 read_resources bus 0 link: 0

  922 12:48:47.414017  PCI: 00:14.0 read_resources bus 0 link: 0

  923 12:48:47.417649  USB0 port 0 read_resources bus 0 link: 0

  924 12:48:47.427135  USB0 port 0 read_resources bus 0 link: 0 done

  925 12:48:47.432578  PCI: 00:14.0 read_resources bus 0 link: 0 done

  926 12:48:47.437474  PCI: 00:15.0 read_resources bus 1 link: 0

  927 12:48:47.443891  PCI: 00:15.0 read_resources bus 1 link: 0 done

  928 12:48:47.447751  PCI: 00:15.1 read_resources bus 2 link: 0

  929 12:48:47.453191  PCI: 00:15.1 read_resources bus 2 link: 0 done

  930 12:48:47.458584  PCI: 00:19.0 read_resources bus 3 link: 0

  931 12:48:47.463629  PCI: 00:19.0 read_resources bus 3 link: 0 done

  932 12:48:47.469117  PCI: 00:1c.0 read_resources bus 1 link: 0

  933 12:48:47.473986  PCI: 00:1c.0 read_resources bus 1 link: 0 done

  934 12:48:47.478503  PCI: 00:1d.0 read_resources bus 2 link: 0

  935 12:48:47.483856  PCI: 00:1d.0 read_resources bus 2 link: 0 done

  936 12:48:47.488804  PCI: 00:1f.0 read_resources bus 0 link: 0

  937 12:48:47.493703  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  938 12:48:47.501384  DOMAIN: 0000 read_resources bus 0 link: 0 done

  939 12:48:47.506116  Root Device read_resources bus 0 link: 0 done

  940 12:48:47.507895  Done reading resources.

  941 12:48:47.513864  Show resources in subtree (Root Device)...After reading.

  942 12:48:47.517816   Root Device child on link 0 CPU_CLUSTER: 0

  943 12:48:47.521906    CPU_CLUSTER: 0 child on link 0 APIC: 00

  944 12:48:47.523241     APIC: 00

  945 12:48:47.524518     APIC: 02

  946 12:48:47.529247    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  947 12:48:47.538617    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  948 12:48:47.548005    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

  949 12:48:47.549253     PCI: 00:00.0

  950 12:48:47.559626     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  951 12:48:47.569164     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  952 12:48:47.578572     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  953 12:48:47.588164     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  954 12:48:47.596694     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  955 12:48:47.605766     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  956 12:48:47.615141     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

  957 12:48:47.624186     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

  958 12:48:47.633702     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

  959 12:48:47.643422     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

  960 12:48:47.652634     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

  961 12:48:47.663190     PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c

  962 12:48:47.671541     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

  963 12:48:47.681479     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

  964 12:48:47.682747     PCI: 00:02.0

  965 12:48:47.692437     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  966 12:48:47.703403     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  967 12:48:47.711902     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  968 12:48:47.712691     PCI: 00:04.0

  969 12:48:47.722725     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

  970 12:48:47.724649     PCI: 00:08.0

  971 12:48:47.734777     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  972 12:48:47.736131     PCI: 00:12.0

  973 12:48:47.746932     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  974 12:48:47.750246     PCI: 00:14.0 child on link 0 USB0 port 0

  975 12:48:47.761070     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  976 12:48:47.765201      USB0 port 0 child on link 0 USB2 port 0

  977 12:48:47.767314       USB2 port 0

  978 12:48:47.768661       USB2 port 1

  979 12:48:47.770134       USB2 port 2

  980 12:48:47.771593       USB2 port 4

  981 12:48:47.774365       USB2 port 5

  982 12:48:47.775637       USB2 port 6

  983 12:48:47.777006       USB2 port 7

  984 12:48:47.779074       USB2 port 8

  985 12:48:47.780918       USB2 port 9

  986 12:48:47.782799       USB3 port 0

  987 12:48:47.784405       USB3 port 1

  988 12:48:47.785371       USB3 port 2

  989 12:48:47.787603       USB3 port 3

  990 12:48:47.790272       USB3 port 4

  991 12:48:47.791765     PCI: 00:14.2

  992 12:48:47.800518     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

  993 12:48:47.810940     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

  994 12:48:47.811995     PCI: 00:14.3

  995 12:48:47.822088     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  996 12:48:47.826783     PCI: 00:15.0 child on link 0 I2C: 01:10

  997 12:48:47.836715     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  998 12:48:47.838084      I2C: 01:10

  999 12:48:47.839341      I2C: 01:10

 1000 12:48:47.841213      I2C: 01:34

 1001 12:48:47.845008     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1002 12:48:47.855589     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1003 12:48:47.857105      I2C: 02:2c

 1004 12:48:47.858522     PCI: 00:16.0

 1005 12:48:47.868239     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1006 12:48:47.870185     PCI: 00:17.0

 1007 12:48:47.879003     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1008 12:48:47.887895     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1009 12:48:47.896229     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1010 12:48:47.904512     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1011 12:48:47.912564     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1012 12:48:47.922176     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1013 12:48:47.926627     PCI: 00:19.0 child on link 0 I2C: 03:50

 1014 12:48:47.935982     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1015 12:48:47.946533     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1016 12:48:47.947989      I2C: 03:50

 1017 12:48:47.949567     PCI: 00:19.2

 1018 12:48:47.960324     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1019 12:48:47.970570     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1020 12:48:47.974790     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1021 12:48:47.984175     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1022 12:48:47.993561     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1023 12:48:48.002112     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1024 12:48:48.003970      PCI: 01:00.0

 1025 12:48:48.013578      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1026 12:48:48.017798     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1027 12:48:48.027192     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1028 12:48:48.036380     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1029 12:48:48.044970     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1030 12:48:48.046734      PCI: 02:00.0

 1031 12:48:48.056736      PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1032 12:48:48.061942     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1033 12:48:48.070863     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1034 12:48:48.079204     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1035 12:48:48.080766      PNP: 0c09.0

 1036 12:48:48.089125      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1037 12:48:48.097897      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1038 12:48:48.106838      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1039 12:48:48.107747     PCI: 00:1f.3

 1040 12:48:48.117960     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1041 12:48:48.127915     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1042 12:48:48.129886     PCI: 00:1f.4

 1043 12:48:48.138961     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1044 12:48:48.148300     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1045 12:48:48.150830     PCI: 00:1f.5

 1046 12:48:48.159066     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1047 12:48:48.161384     PCI: 00:1f.6

 1048 12:48:48.170047     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1049 12:48:48.176668  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1050 12:48:48.183247  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1051 12:48:48.190388  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1052 12:48:48.195973  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1053 12:48:48.202673  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1054 12:48:48.206244  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1055 12:48:48.209709  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1056 12:48:48.213726  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1057 12:48:48.217900  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1058 12:48:48.224575  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1059 12:48:48.230828  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1060 12:48:48.238216  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1061 12:48:48.247110  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1062 12:48:48.254091  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1063 12:48:48.257813  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1064 12:48:48.266136  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1065 12:48:48.273096  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1066 12:48:48.281820  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1067 12:48:48.289009  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1068 12:48:48.293158  PCI: 02:00.0 10 *  [0x0 - 0x3fff] mem

 1069 12:48:48.301359  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1070 12:48:48.305633  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1071 12:48:48.310348  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1072 12:48:48.315023  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1073 12:48:48.319984  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1074 12:48:48.324758  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1075 12:48:48.329817  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1076 12:48:48.335108  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1077 12:48:48.339823  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1078 12:48:48.344476  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1079 12:48:48.349291  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1080 12:48:48.353481  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1081 12:48:48.358390  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1082 12:48:48.363159  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1083 12:48:48.368212  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1084 12:48:48.373349  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1085 12:48:48.378155  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1086 12:48:48.382647  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1087 12:48:48.387636  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem

 1088 12:48:48.393074  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem

 1089 12:48:48.397329  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem

 1090 12:48:48.402597  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem

 1091 12:48:48.408084  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem

 1092 12:48:48.412746  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem

 1093 12:48:48.417083  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem

 1094 12:48:48.422002  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem

 1095 12:48:48.430793  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done

 1096 12:48:48.434464  avoid_fixed_resources: DOMAIN: 0000

 1097 12:48:48.439921  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1098 12:48:48.445748  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1099 12:48:48.453218  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1100 12:48:48.461297  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1101 12:48:48.468889  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1102 12:48:48.476797  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1103 12:48:48.484725  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1104 12:48:48.491667  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1105 12:48:48.500181  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1106 12:48:48.507027  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1107 12:48:48.514084  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1108 12:48:48.521535  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1109 12:48:48.523540  Setting resources...

 1110 12:48:48.529879  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1111 12:48:48.534570  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1112 12:48:48.537847  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1113 12:48:48.542070  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1114 12:48:48.545940  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1115 12:48:48.552190  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1116 12:48:48.558323  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1117 12:48:48.565695  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1118 12:48:48.571427  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1119 12:48:48.577502  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1120 12:48:48.585758  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff

 1121 12:48:48.590525  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1122 12:48:48.595118  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1123 12:48:48.600260  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1124 12:48:48.604947  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1125 12:48:48.609418  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1126 12:48:48.614787  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1127 12:48:48.620207  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1128 12:48:48.626473  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1129 12:48:48.629703  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1130 12:48:48.633909  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1131 12:48:48.638583  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1132 12:48:48.643902  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1133 12:48:48.648846  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1134 12:48:48.654210  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1135 12:48:48.659043  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1136 12:48:48.663170  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1137 12:48:48.668020  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1138 12:48:48.673415  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1139 12:48:48.678357  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem

 1140 12:48:48.682513  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem

 1141 12:48:48.688268  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem

 1142 12:48:48.693028  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem

 1143 12:48:48.696999  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem

 1144 12:48:48.702077  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem

 1145 12:48:48.706715  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem

 1146 12:48:48.715319  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done

 1147 12:48:48.721438  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1148 12:48:48.729002  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1149 12:48:48.736961  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1150 12:48:48.741323  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1151 12:48:48.749148  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1152 12:48:48.756754  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1153 12:48:48.763548  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1154 12:48:48.771616  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1155 12:48:48.776126  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1103fff] mem

 1156 12:48:48.783500  PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done

 1157 12:48:48.788055  Root Device assign_resources, bus 0 link: 0

 1158 12:48:48.792506  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1159 12:48:48.801257  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1160 12:48:48.809200  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1161 12:48:48.816952  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1162 12:48:48.825629  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1163 12:48:48.834029  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1164 12:48:48.841653  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1165 12:48:48.849896  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1166 12:48:48.854095  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1167 12:48:48.859327  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1168 12:48:48.867875  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1169 12:48:48.875931  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1170 12:48:48.883625  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1171 12:48:48.892348  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1172 12:48:48.896613  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1173 12:48:48.901583  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1174 12:48:48.909996  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1175 12:48:48.913879  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1176 12:48:48.919118  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1177 12:48:48.927378  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1178 12:48:48.935678  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1179 12:48:48.943441  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem

 1180 12:48:48.950996  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1181 12:48:48.959113  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1182 12:48:48.966275  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1183 12:48:48.973645  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem

 1184 12:48:48.981889  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1185 12:48:48.989832  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1186 12:48:48.994888  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1187 12:48:48.999687  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1188 12:48:49.007676  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64

 1189 12:48:49.016125  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1190 12:48:49.026051  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1191 12:48:49.033476  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1192 12:48:49.038115  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1193 12:48:49.046185  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1194 12:48:49.050816  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1195 12:48:49.059721  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1196 12:48:49.068336  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1197 12:48:49.077686  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1198 12:48:49.081406  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1199 12:48:49.089427  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64

 1200 12:48:49.094238  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1201 12:48:49.099157  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1202 12:48:49.104439  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1203 12:48:49.109262  LPC: Trying to open IO window from 930 size 8

 1204 12:48:49.113569  LPC: Trying to open IO window from 940 size 8

 1205 12:48:49.118051  LPC: Trying to open IO window from 950 size 10

 1206 12:48:49.126638  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1207 12:48:49.134250  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1208 12:48:49.142614  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64

 1209 12:48:49.151300  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem

 1210 12:48:49.158981  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1211 12:48:49.163847  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1212 12:48:49.168564  Root Device assign_resources, bus 0 link: 0

 1213 12:48:49.170528  Done setting resources.

 1214 12:48:49.177023  Show resources in subtree (Root Device)...After assigning values.

 1215 12:48:49.182044   Root Device child on link 0 CPU_CLUSTER: 0

 1216 12:48:49.186034    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1217 12:48:49.187789     APIC: 00

 1218 12:48:49.188561     APIC: 02

 1219 12:48:49.192854    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1220 12:48:49.202329    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1221 12:48:49.213884    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1222 12:48:49.215296     PCI: 00:00.0

 1223 12:48:49.225472     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1224 12:48:49.234721     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1225 12:48:49.244511     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1226 12:48:49.253094     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1227 12:48:49.262452     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1228 12:48:49.272021     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1229 12:48:49.281109     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1230 12:48:49.289971     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1231 12:48:49.299407     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1232 12:48:49.309501     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1233 12:48:49.318005     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1234 12:48:49.328463     PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1235 12:48:49.337046     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1236 12:48:49.346573     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1237 12:48:49.348528     PCI: 00:02.0

 1238 12:48:49.358566     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1239 12:48:49.369055     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1240 12:48:49.378525     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1241 12:48:49.380318     PCI: 00:04.0

 1242 12:48:49.390668     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1243 12:48:49.391757     PCI: 00:08.0

 1244 12:48:49.403003     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1245 12:48:49.404268     PCI: 00:12.0

 1246 12:48:49.414530     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1247 12:48:49.418428     PCI: 00:14.0 child on link 0 USB0 port 0

 1248 12:48:49.429601     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1249 12:48:49.433654      USB0 port 0 child on link 0 USB2 port 0

 1250 12:48:49.435643       USB2 port 0

 1251 12:48:49.437587       USB2 port 1

 1252 12:48:49.439627       USB2 port 2

 1253 12:48:49.440937       USB2 port 4

 1254 12:48:49.442386       USB2 port 5

 1255 12:48:49.444295       USB2 port 6

 1256 12:48:49.446323       USB2 port 7

 1257 12:48:49.447754       USB2 port 8

 1258 12:48:49.449673       USB2 port 9

 1259 12:48:49.451651       USB3 port 0

 1260 12:48:49.452823       USB3 port 1

 1261 12:48:49.454694       USB3 port 2

 1262 12:48:49.456150       USB3 port 3

 1263 12:48:49.458187       USB3 port 4

 1264 12:48:49.460064     PCI: 00:14.2

 1265 12:48:49.469615     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1266 12:48:49.480766     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1267 12:48:49.482200     PCI: 00:14.3

 1268 12:48:49.492356     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1269 12:48:49.496425     PCI: 00:15.0 child on link 0 I2C: 01:10

 1270 12:48:49.507379     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1271 12:48:49.508065      I2C: 01:10

 1272 12:48:49.509676      I2C: 01:10

 1273 12:48:49.511775      I2C: 01:34

 1274 12:48:49.516448     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1275 12:48:49.526134     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1276 12:48:49.527976      I2C: 02:2c

 1277 12:48:49.529579     PCI: 00:16.0

 1278 12:48:49.540222     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1279 12:48:49.541059     PCI: 00:17.0

 1280 12:48:49.552191     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1281 12:48:49.561621     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14

 1282 12:48:49.571215     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1283 12:48:49.580396     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1284 12:48:49.589182     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1285 12:48:49.599380     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24

 1286 12:48:49.602961     PCI: 00:19.0 child on link 0 I2C: 03:50

 1287 12:48:49.613922     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10

 1288 12:48:49.623850     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1289 12:48:49.626295      I2C: 03:50

 1290 12:48:49.627119     PCI: 00:19.2

 1291 12:48:49.638189     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1292 12:48:49.648389     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18

 1293 12:48:49.653201     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1294 12:48:49.662096     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1295 12:48:49.672531     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1296 12:48:49.682824     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1297 12:48:49.684952      PCI: 01:00.0

 1298 12:48:49.694712      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1299 12:48:49.699590     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1300 12:48:49.708338     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1301 12:48:49.718644     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1302 12:48:49.728901     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1303 12:48:49.730660      PCI: 02:00.0

 1304 12:48:49.740756      PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10

 1305 12:48:49.745303     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1306 12:48:49.753993     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1307 12:48:49.763110     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1308 12:48:49.764619      PNP: 0c09.0

 1309 12:48:49.773208      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1310 12:48:49.781737      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1311 12:48:49.790741      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1312 12:48:49.792173     PCI: 00:1f.3

 1313 12:48:49.802222     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1314 12:48:49.812767     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1315 12:48:49.814408     PCI: 00:1f.4

 1316 12:48:49.823924     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1317 12:48:49.833830     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10

 1318 12:48:49.835776     PCI: 00:1f.5

 1319 12:48:49.845789     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10

 1320 12:48:49.847199     PCI: 00:1f.6

 1321 12:48:49.857884     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1322 12:48:49.860845  Done allocating resources.

 1323 12:48:49.866859  BS: BS_DEV_RESOURCES times (us): entry 0 run 2492079 exit 13

 1324 12:48:49.869494  Enabling resources...

 1325 12:48:49.874250  PCI: 00:00.0 subsystem <- 1028/3e35

 1326 12:48:49.876345  PCI: 00:00.0 cmd <- 06

 1327 12:48:49.880300  PCI: 00:02.0 subsystem <- 1028/3ea1

 1328 12:48:49.882521  PCI: 00:02.0 cmd <- 03

 1329 12:48:49.886254  PCI: 00:04.0 subsystem <- 1028/1903

 1330 12:48:49.888960  PCI: 00:04.0 cmd <- 02

 1331 12:48:49.892145  PCI: 00:08.0 cmd <- 06

 1332 12:48:49.896076  PCI: 00:12.0 subsystem <- 1028/9df9

 1333 12:48:49.897250  PCI: 00:12.0 cmd <- 02

 1334 12:48:49.901420  PCI: 00:14.0 subsystem <- 1028/9ded

 1335 12:48:49.904131  PCI: 00:14.0 cmd <- 02

 1336 12:48:49.906714  PCI: 00:14.2 cmd <- 02

 1337 12:48:49.910445  PCI: 00:14.3 subsystem <- 1028/9df0

 1338 12:48:49.912656  PCI: 00:14.3 cmd <- 02

 1339 12:48:49.917183  PCI: 00:15.0 subsystem <- 1028/9de8

 1340 12:48:49.918732  PCI: 00:15.0 cmd <- 02

 1341 12:48:49.922773  PCI: 00:15.1 subsystem <- 1028/9de9

 1342 12:48:49.925821  PCI: 00:15.1 cmd <- 02

 1343 12:48:49.929722  PCI: 00:16.0 subsystem <- 1028/9de0

 1344 12:48:49.931230  PCI: 00:16.0 cmd <- 02

 1345 12:48:49.935323  PCI: 00:17.0 subsystem <- 1028/9dd3

 1346 12:48:49.937561  PCI: 00:17.0 cmd <- 03

 1347 12:48:49.942236  PCI: 00:19.0 subsystem <- 1028/9dc5

 1348 12:48:49.944281  PCI: 00:19.0 cmd <- 06

 1349 12:48:49.947848  PCI: 00:19.2 subsystem <- 1028/9dc7

 1350 12:48:49.950475  PCI: 00:19.2 cmd <- 06

 1351 12:48:49.953979  PCI: 00:1c.0 bridge ctrl <- 0003

 1352 12:48:49.957911  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1353 12:48:49.960540  Capability: type 0x10 @ 0x40

 1354 12:48:49.963403  Capability: type 0x05 @ 0x80

 1355 12:48:49.966763  Capability: type 0x0d @ 0x90

 1356 12:48:49.968292  PCI: 00:1c.0 cmd <- 06

 1357 12:48:49.972357  PCI: 00:1d.0 bridge ctrl <- 0003

 1358 12:48:49.976519  PCI: 00:1d.0 subsystem <- 1028/9db4

 1359 12:48:49.978870  Capability: type 0x10 @ 0x40

 1360 12:48:49.981966  Capability: type 0x05 @ 0x80

 1361 12:48:49.985170  Capability: type 0x0d @ 0x90

 1362 12:48:49.987129  PCI: 00:1d.0 cmd <- 06

 1363 12:48:49.991172  PCI: 00:1f.0 subsystem <- 1028/9d84

 1364 12:48:49.993235  PCI: 00:1f.0 cmd <- 407

 1365 12:48:49.996936  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1366 12:48:49.999330  PCI: 00:1f.3 cmd <- 02

 1367 12:48:50.003372  PCI: 00:1f.4 subsystem <- 1028/9da3

 1368 12:48:50.005320  PCI: 00:1f.4 cmd <- 03

 1369 12:48:50.009685  PCI: 00:1f.5 subsystem <- 1028/9da4

 1370 12:48:50.012003  PCI: 00:1f.5 cmd <- 406

 1371 12:48:50.016160  PCI: 00:1f.6 subsystem <- 1028/15be

 1372 12:48:50.018095  PCI: 00:1f.6 cmd <- 02

 1373 12:48:50.029319  PCI: 01:00.0 cmd <- 02

 1374 12:48:50.032039  PCI: 02:00.0 cmd <- 02

 1375 12:48:50.034968  done.

 1376 12:48:50.040242  BS: BS_DEV_ENABLE times (us): entry 440 run 167113 exit 0

 1377 12:48:50.041950  Initializing devices...

 1378 12:48:50.044583  Root Device init ...

 1379 12:48:50.048790  Root Device init finished in 2139 usecs

 1380 12:48:50.051707  CPU_CLUSTER: 0 init ...

 1381 12:48:50.055633  CPU_CLUSTER: 0 init finished in 2430 usecs

 1382 12:48:50.059674  PCI: 00:00.0 init ...

 1383 12:48:50.062514  CPU TDP: 15 Watts

 1384 12:48:50.064454  CPU PL2 = 51 Watts

 1385 12:48:50.069203  PCI: 00:00.0 init finished in 7038 usecs

 1386 12:48:50.071208  PCI: 00:02.0 init ...

 1387 12:48:50.074898  PCI: 00:02.0 init finished in 2236 usecs

 1388 12:48:50.077906  PCI: 00:04.0 init ...

 1389 12:48:50.081547  PCI: 00:04.0 init finished in 2236 usecs

 1390 12:48:50.084267  PCI: 00:08.0 init ...

 1391 12:48:50.088834  PCI: 00:08.0 init finished in 2236 usecs

 1392 12:48:50.091697  PCI: 00:12.0 init ...

 1393 12:48:50.095039  PCI: 00:12.0 init finished in 2236 usecs

 1394 12:48:50.098497  PCI: 00:14.0 init ...

 1395 12:48:50.101923  PCI: 00:14.0 init finished in 2236 usecs

 1396 12:48:50.105011  PCI: 00:14.2 init ...

 1397 12:48:50.109506  PCI: 00:14.2 init finished in 2236 usecs

 1398 12:48:50.111517  PCI: 00:14.3 init ...

 1399 12:48:50.115494  PCI: 00:14.3 init finished in 2240 usecs

 1400 12:48:50.117741  PCI: 00:15.0 init ...

 1401 12:48:50.122057  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1402 12:48:50.126666  PCI: 00:15.0 init finished in 5935 usecs

 1403 12:48:50.128714  PCI: 00:15.1 init ...

 1404 12:48:50.132818  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1405 12:48:50.136354  PCI: 00:15.1 init finished in 5934 usecs

 1406 12:48:50.139181  PCI: 00:16.0 init ...

 1407 12:48:50.143509  PCI: 00:16.0 init finished in 2237 usecs

 1408 12:48:50.146654  PCI: 00:19.0 init ...

 1409 12:48:50.150632  DW I2C bus 4 at 0xd134a000 (400 KHz)

 1410 12:48:50.154108  PCI: 00:19.0 init finished in 5933 usecs

 1411 12:48:50.157273  PCI: 00:1c.0 init ...

 1412 12:48:50.159915  Initializing PCH PCIe bridge.

 1413 12:48:50.164134  PCI: 00:1c.0 init finished in 5248 usecs

 1414 12:48:50.167254  PCI: 00:1d.0 init ...

 1415 12:48:50.170599  Initializing PCH PCIe bridge.

 1416 12:48:50.173556  PCI: 00:1d.0 init finished in 5249 usecs

 1417 12:48:50.176392  PCI: 00:1f.0 init ...

 1418 12:48:50.180503  IOAPIC: Initializing IOAPIC at 0xfec00000

 1419 12:48:50.185961  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1420 12:48:50.187349  IOAPIC: ID = 0x02

 1421 12:48:50.190121  IOAPIC: Dumping registers

 1422 12:48:50.192151    reg 0x0000: 0x02000000

 1423 12:48:50.194739    reg 0x0001: 0x00770020

 1424 12:48:50.197563    reg 0x0002: 0x00000000

 1425 12:48:50.201897  PCI: 00:1f.0 init finished in 23324 usecs

 1426 12:48:50.204151  PCI: 00:1f.3 init ...

 1427 12:48:50.209251  HDA: codec_mask = 05

 1428 12:48:50.212446  HDA: Initializing codec #2

 1429 12:48:50.215225  HDA: codec viddid: 8086280b

 1430 12:48:50.218157  HDA: No verb table entry found

 1431 12:48:50.220819  HDA: Initializing codec #0

 1432 12:48:50.223694  HDA: codec viddid: 10ec0236

 1433 12:48:50.230414  HDA: verb loaded.

 1434 12:48:50.236039  PCI: 00:1f.3 init finished in 28835 usecs

 1435 12:48:50.237679  PCI: 00:1f.4 init ...

 1436 12:48:50.241705  PCI: 00:1f.4 init finished in 2245 usecs

 1437 12:48:50.245453  PCI: 00:1f.6 init ...

 1438 12:48:50.249441  PCI: 00:1f.6 init finished in 2237 usecs

 1439 12:48:50.260209  PCI: 01:00.0 init ...

 1440 12:48:50.264693  PCI: 01:00.0 init finished in 2235 usecs

 1441 12:48:50.266409  PCI: 02:00.0 init ...

 1442 12:48:50.270646  PCI: 02:00.0 init finished in 2235 usecs

 1443 12:48:50.273308  PNP: 0c09.0 init ...

 1444 12:48:50.277384  EC Label      : 00.00.20

 1445 12:48:50.281905  EC Revision   : 9ca674bba

 1446 12:48:50.284154  EC Model Num  : 08B9

 1447 12:48:50.287838  EC Build Date : 05/10/19

 1448 12:48:50.297605  PNP: 0c09.0 init finished in 21733 usecs

 1449 12:48:50.299089  Devices initialized

 1450 12:48:50.302557  Show all devs... After init.

 1451 12:48:50.304649  Root Device: enabled 1

 1452 12:48:50.307844  CPU_CLUSTER: 0: enabled 1

 1453 12:48:50.310473  DOMAIN: 0000: enabled 1

 1454 12:48:50.312016  APIC: 00: enabled 1

 1455 12:48:50.314573  PCI: 00:00.0: enabled 1

 1456 12:48:50.317312  PCI: 00:02.0: enabled 1

 1457 12:48:50.318696  PCI: 00:04.0: enabled 1

 1458 12:48:50.321756  PCI: 00:12.0: enabled 1

 1459 12:48:50.323747  PCI: 00:12.5: enabled 0

 1460 12:48:50.326709  PCI: 00:12.6: enabled 0

 1461 12:48:50.328413  PCI: 00:13.0: enabled 0

 1462 12:48:50.331026  PCI: 00:14.0: enabled 1

 1463 12:48:50.334053  PCI: 00:14.1: enabled 0

 1464 12:48:50.335645  PCI: 00:14.3: enabled 1

 1465 12:48:50.338589  PCI: 00:14.5: enabled 0

 1466 12:48:50.340860  PCI: 00:15.0: enabled 1

 1467 12:48:50.342920  PCI: 00:15.1: enabled 1

 1468 12:48:50.345687  PCI: 00:15.2: enabled 0

 1469 12:48:50.348278  PCI: 00:15.3: enabled 0

 1470 12:48:50.350524  PCI: 00:16.0: enabled 1

 1471 12:48:50.352868  PCI: 00:16.1: enabled 0

 1472 12:48:50.355614  PCI: 00:16.2: enabled 0

 1473 12:48:50.357605  PCI: 00:16.3: enabled 0

 1474 12:48:50.360082  PCI: 00:16.4: enabled 0

 1475 12:48:50.362521  PCI: 00:16.5: enabled 0

 1476 12:48:50.365463  PCI: 00:17.0: enabled 1

 1477 12:48:50.368151  PCI: 00:19.0: enabled 1

 1478 12:48:50.370299  PCI: 00:19.1: enabled 0

 1479 12:48:50.372892  PCI: 00:19.2: enabled 1

 1480 12:48:50.375142  PCI: 00:1a.0: enabled 0

 1481 12:48:50.377584  PCI: 00:1c.0: enabled 1

 1482 12:48:50.379819  PCI: 00:1c.1: enabled 0

 1483 12:48:50.382303  PCI: 00:1c.2: enabled 0

 1484 12:48:50.384907  PCI: 00:1c.3: enabled 0

 1485 12:48:50.387141  PCI: 00:1c.4: enabled 0

 1486 12:48:50.389278  PCI: 00:1c.5: enabled 0

 1487 12:48:50.391940  PCI: 00:1c.6: enabled 0

 1488 12:48:50.393856  PCI: 00:1c.7: enabled 0

 1489 12:48:50.397172  PCI: 00:1d.0: enabled 1

 1490 12:48:50.399397  PCI: 00:1d.1: enabled 0

 1491 12:48:50.401483  PCI: 00:1d.2: enabled 0

 1492 12:48:50.404676  PCI: 00:1d.3: enabled 0

 1493 12:48:50.406011  PCI: 00:1d.4: enabled 0

 1494 12:48:50.408968  PCI: 00:1e.0: enabled 0

 1495 12:48:50.411070  PCI: 00:1e.1: enabled 0

 1496 12:48:50.414131  PCI: 00:1e.2: enabled 0

 1497 12:48:50.416439  PCI: 00:1e.3: enabled 0

 1498 12:48:50.418483  PCI: 00:1f.0: enabled 1

 1499 12:48:50.421777  PCI: 00:1f.1: enabled 0

 1500 12:48:50.423745  PCI: 00:1f.2: enabled 0

 1501 12:48:50.425930  PCI: 00:1f.3: enabled 1

 1502 12:48:50.428975  PCI: 00:1f.4: enabled 1

 1503 12:48:50.431039  PCI: 00:1f.5: enabled 1

 1504 12:48:50.434265  PCI: 00:1f.6: enabled 1

 1505 12:48:50.435564  USB0 port 0: enabled 1

 1506 12:48:50.438164  I2C: 01:10: enabled 1

 1507 12:48:50.439682  I2C: 01:10: enabled 1

 1508 12:48:50.442382  I2C: 01:34: enabled 1

 1509 12:48:50.444716  I2C: 02:2c: enabled 1

 1510 12:48:50.447311  I2C: 03:50: enabled 1

 1511 12:48:50.449298  PNP: 0c09.0: enabled 1

 1512 12:48:50.451757  USB2 port 0: enabled 1

 1513 12:48:50.453538  USB2 port 1: enabled 1

 1514 12:48:50.455860  USB2 port 2: enabled 1

 1515 12:48:50.458503  USB2 port 4: enabled 1

 1516 12:48:50.460729  USB2 port 5: enabled 1

 1517 12:48:50.463264  USB2 port 6: enabled 1

 1518 12:48:50.465441  USB2 port 7: enabled 1

 1519 12:48:50.468508  USB2 port 8: enabled 1

 1520 12:48:50.470479  USB2 port 9: enabled 1

 1521 12:48:50.471945  USB3 port 0: enabled 1

 1522 12:48:50.474438  USB3 port 1: enabled 1

 1523 12:48:50.476957  USB3 port 2: enabled 1

 1524 12:48:50.478928  USB3 port 3: enabled 1

 1525 12:48:50.482007  USB3 port 4: enabled 1

 1526 12:48:50.483916  APIC: 02: enabled 1

 1527 12:48:50.486094  PCI: 00:08.0: enabled 1

 1528 12:48:50.489220  PCI: 00:14.2: enabled 1

 1529 12:48:50.491423  PCI: 01:00.0: enabled 1

 1530 12:48:50.493551  PCI: 02:00.0: enabled 1

 1531 12:48:50.498870  Disabling ACPI via APMC:

 1532 12:48:50.500740  done.

 1533 12:48:50.505105  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1534 12:48:50.509166  ELOG: NV offset 0x1bf0000 size 0x4000

 1535 12:48:50.517435  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1536 12:48:50.523595  ELOG: Event(17) added with size 13 at 2023-03-13 12:48:50 UTC

 1537 12:48:50.528922  POST: Unexpected post code in previous boot: 0x73

 1538 12:48:50.535051  ELOG: Event(A3) added with size 11 at 2023-03-13 12:48:50 UTC

 1539 12:48:50.540953  ELOG: Event(92) added with size 9 at 2023-03-13 12:48:50 UTC

 1540 12:48:50.547780  ELOG: Event(93) added with size 9 at 2023-03-13 12:48:50 UTC

 1541 12:48:50.553935  ELOG: Event(9A) added with size 9 at 2023-03-13 12:48:50 UTC

 1542 12:48:50.559796  ELOG: Event(9E) added with size 10 at 2023-03-13 12:48:50 UTC

 1543 12:48:50.567015  ELOG: Event(9F) added with size 14 at 2023-03-13 12:48:50 UTC

 1544 12:48:50.571853  BS: BS_DEV_INIT times (us): entry 0 run 453551 exit 72538

 1545 12:48:50.578320  ELOG: Event(A1) added with size 10 at 2023-03-13 12:48:50 UTC

 1546 12:48:50.586824  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1547 12:48:50.592771  ELOG: Event(A0) added with size 9 at 2023-03-13 12:48:50 UTC

 1548 12:48:50.596945  elog_add_boot_reason: Logged dev mode boot

 1549 12:48:50.599075  Finalize devices...

 1550 12:48:50.601717  PCI: 00:17.0 final

 1551 12:48:50.602574  Devices finalized

 1552 12:48:50.607960  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1553 12:48:50.614479  BS: BS_POST_DEVICE times (us): entry 24772 run 5935 exit 5404

 1554 12:48:50.619985  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0

 1555 12:48:50.628154  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1556 12:48:50.633043  disable_unused_touchscreen: Disable ACPI0C50

 1557 12:48:50.637007  disable_unused_touchscreen: Enable ELAN900C

 1558 12:48:50.639857  CBFS @ 1d00000 size 300000

 1559 12:48:50.646257  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1560 12:48:50.649841  CBFS: Locating 'fallback/dsdt.aml'

 1561 12:48:50.653661  CBFS: Found @ offset 10b200 size 4448

 1562 12:48:50.656570  CBFS @ 1d00000 size 300000

 1563 12:48:50.663229  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1564 12:48:50.666282  CBFS: Locating 'fallback/slic'

 1565 12:48:50.672052  CBFS: 'fallback/slic' not found.

 1566 12:48:50.675322  ACPI: Writing ACPI tables at 89c0f000.

 1567 12:48:50.676715  ACPI:    * FACS

 1568 12:48:50.679248  ACPI:    * DSDT

 1569 12:48:50.682014  Ramoops buffer: 0x100000@0x89b0e000.

 1570 12:48:50.687636  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1571 12:48:50.691761  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1572 12:48:50.695073  ACPI:    * FADT

 1573 12:48:50.696794  SCI is IRQ9

 1574 12:48:50.700643  ACPI: added table 1/32, length now 40

 1575 12:48:50.702531  ACPI:     * SSDT

 1576 12:48:50.705943  Found 1 CPU(s) with 2 core(s) each.

 1577 12:48:50.710091  Error: Could not locate 'wifi_sar' in VPD.

 1578 12:48:50.714219  Error: failed from getting SAR limits!

 1579 12:48:50.718322  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1580 12:48:50.722941  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1581 12:48:50.725834  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1582 12:48:50.729995  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1583 12:48:50.736167  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1584 12:48:50.741152  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1585 12:48:50.746371  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1586 12:48:50.750465  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1587 12:48:50.755441  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1588 12:48:50.762557  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1589 12:48:50.767236  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1590 12:48:50.774152  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1591 12:48:50.778036  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1592 12:48:50.782771  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1593 12:48:50.787116  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1594 12:48:50.793202  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1595 12:48:50.797354  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1596 12:48:50.803362  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1597 12:48:50.809719  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1598 12:48:50.815799  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1599 12:48:50.821267  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1600 12:48:50.825584  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1601 12:48:50.830147  ACPI: added table 2/32, length now 44

 1602 12:48:50.831025  ACPI:    * MCFG

 1603 12:48:50.834929  ACPI: added table 3/32, length now 48

 1604 12:48:50.836916  ACPI:    * TPM2

 1605 12:48:50.839639  TPM2 log created at 89afe000

 1606 12:48:50.843229  ACPI: added table 4/32, length now 52

 1607 12:48:50.844781  ACPI:    * MADT

 1608 12:48:50.845773  SCI is IRQ9

 1609 12:48:50.849944  ACPI: added table 5/32, length now 56

 1610 12:48:50.852044  current = 89c14720

 1611 12:48:50.854086  ACPI:    * IGD OpRegion

 1612 12:48:50.856759  GMA: Found VBT in CBFS

 1613 12:48:50.859961  GMA: Found valid VBT in CBFS

 1614 12:48:50.863475  ACPI: added table 6/32, length now 60

 1615 12:48:50.864724  ACPI:    * HPET

 1616 12:48:50.868989  ACPI: added table 7/32, length now 64

 1617 12:48:50.870353  ACPI: done.

 1618 12:48:50.873048  ACPI tables: 30672 bytes.

 1619 12:48:50.875592  smbios_write_tables: 89afd000

 1620 12:48:50.877608  recv_ec_data: 0x01

 1621 12:48:50.880451  Create SMBIOS type 17

 1622 12:48:50.882966  PCI: 00:14.3 (Intel WiFi)

 1623 12:48:50.885823  SMBIOS tables: 708 bytes.

 1624 12:48:50.889834  Writing table forward entry at 0x00000500

 1625 12:48:50.895848  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1626 12:48:50.899845  Writing coreboot table at 0x89c33000

 1627 12:48:50.905085   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1628 12:48:50.909512   1. 0000000000001000-000000000009ffff: RAM

 1629 12:48:50.914092   2. 00000000000a0000-00000000000fffff: RESERVED

 1630 12:48:50.919073   3. 0000000000100000-0000000089afcfff: RAM

 1631 12:48:50.925194   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1632 12:48:50.929078   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1633 12:48:50.935584   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1634 12:48:50.940316   7. 000000008a000000-000000008f7fffff: RESERVED

 1635 12:48:50.944772   8. 00000000e0000000-00000000efffffff: RESERVED

 1636 12:48:50.950041   9. 00000000fc000000-00000000fc000fff: RESERVED

 1637 12:48:50.954621  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1638 12:48:50.958981  11. 00000000fed10000-00000000fed17fff: RESERVED

 1639 12:48:50.963737  12. 00000000fed80000-00000000fed83fff: RESERVED

 1640 12:48:50.968680  13. 00000000feda0000-00000000feda1fff: RESERVED

 1641 12:48:50.972826  14. 0000000100000000-000000016e7fffff: RAM

 1642 12:48:50.977670  Graphics framebuffer located at 0xc0000000

 1643 12:48:50.979814  Passing 6 GPIOs to payload:

 1644 12:48:50.985331              NAME |       PORT | POLARITY |     VALUE

 1645 12:48:50.990909     write protect | 0x000000dc |     high |      high

 1646 12:48:50.996127          recovery | 0x000000d5 |      low |      high

 1647 12:48:51.000871               lid |  undefined |     high |      high

 1648 12:48:51.006236             power |  undefined |     high |       low

 1649 12:48:51.011968             oprom |  undefined |     high |       low

 1650 12:48:51.016574          EC in RW |  undefined |     high |       low

 1651 12:48:51.018643  recv_ec_data: 0x01

 1652 12:48:51.020577  SKU ID: 3

 1653 12:48:51.023122  CBFS @ 1d00000 size 300000

 1654 12:48:51.029274  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1655 12:48:51.035015  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 38de

 1656 12:48:51.038795  coreboot table: 1484 bytes.

 1657 12:48:51.041578  IMD ROOT    0. 89fff000 00001000

 1658 12:48:51.044488  IMD SMALL   1. 89ffe000 00001000

 1659 12:48:51.047883  FSP MEMORY  2. 89d0e000 002f0000

 1660 12:48:51.051681  CONSOLE     3. 89cee000 00020000

 1661 12:48:51.054268  TIME STAMP  4. 89ced000 00000910

 1662 12:48:51.057895  VBOOT WORK  5. 89cea000 00003000

 1663 12:48:51.061247  VBOOT       6. 89ce9000 00000c0c

 1664 12:48:51.065134  MRC DATA    7. 89ce7000 000018f0

 1665 12:48:51.068144  ROMSTG STCK 8. 89ce6000 00000400

 1666 12:48:51.071616  AFTER CAR   9. 89cdc000 0000a000

 1667 12:48:51.074393  RAMSTAGE   10. 89c80000 0005c000

 1668 12:48:51.077475  REFCODE    11. 89c4b000 00035000

 1669 12:48:51.081923  SMM BACKUP 12. 89c3b000 00010000

 1670 12:48:51.084733  COREBOOT   13. 89c33000 00008000

 1671 12:48:51.087947  ACPI       14. 89c0f000 00024000

 1672 12:48:51.091203  ACPI GNVS  15. 89c0e000 00001000

 1673 12:48:51.094651  RAMOOPS    16. 89b0e000 00100000

 1674 12:48:51.098349  TPM2 TCGLOG17. 89afe000 00010000

 1675 12:48:51.101254  SMBIOS     18. 89afd000 00000800

 1676 12:48:51.102698  IMD small region:

 1677 12:48:51.106162    IMD ROOT    0. 89ffec00 00000400

 1678 12:48:51.109953    FSP RUNTIME 1. 89ffebe0 00000004

 1679 12:48:51.113907    POWER STATE 2. 89ffeba0 00000040

 1680 12:48:51.116702    ROMSTAGE    3. 89ffeb80 00000004

 1681 12:48:51.121022    MEM INFO    4. 89ffe9c0 000001a9

 1682 12:48:51.124363    VPD         5. 89ffe980 00000031

 1683 12:48:51.127421    COREBOOTFWD 6. 89ffe940 00000028

 1684 12:48:51.130739  MTRR: Physical address space:

 1685 12:48:51.136826  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1686 12:48:51.143053  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1687 12:48:51.149780  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1688 12:48:51.156095  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1689 12:48:51.161801  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1690 12:48:51.167806  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1691 12:48:51.173953  0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6

 1692 12:48:51.178749  MTRR: Fixed MSR 0x250 0x0606060606060606

 1693 12:48:51.182327  MTRR: Fixed MSR 0x258 0x0606060606060606

 1694 12:48:51.185966  MTRR: Fixed MSR 0x259 0x0000000000000000

 1695 12:48:51.190761  MTRR: Fixed MSR 0x268 0x0606060606060606

 1696 12:48:51.194099  MTRR: Fixed MSR 0x269 0x0606060606060606

 1697 12:48:51.198312  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1698 12:48:51.202417  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1699 12:48:51.207504  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1700 12:48:51.210844  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1701 12:48:51.215430  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1702 12:48:51.218900  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1703 12:48:51.221641  call enable_fixed_mtrr()

 1704 12:48:51.226038  CPU physical address size: 39 bits

 1705 12:48:51.229439  MTRR: default type WB/UC MTRR counts: 7/6.

 1706 12:48:51.232936  MTRR: UC selected as default type.

 1707 12:48:51.239535  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1708 12:48:51.245855  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1709 12:48:51.252071  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1710 12:48:51.257980  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1711 12:48:51.264001  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1712 12:48:51.270726  MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6

 1713 12:48:51.271388  

 1714 12:48:51.272709  MTRR check

 1715 12:48:51.274784  Fixed MTRRs   : Enabled

 1716 12:48:51.277529  Variable MTRRs: Enabled

 1717 12:48:51.278183  

 1718 12:48:51.281157  MTRR: Fixed MSR 0x250 0x0606060606060606

 1719 12:48:51.285881  MTRR: Fixed MSR 0x258 0x0606060606060606

 1720 12:48:51.289412  MTRR: Fixed MSR 0x259 0x0000000000000000

 1721 12:48:51.294105  MTRR: Fixed MSR 0x268 0x0606060606060606

 1722 12:48:51.298215  MTRR: Fixed MSR 0x269 0x0606060606060606

 1723 12:48:51.301695  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1724 12:48:51.306088  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1725 12:48:51.309940  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1726 12:48:51.314218  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1727 12:48:51.318637  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1728 12:48:51.322565  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1729 12:48:51.328968  BS: BS_WRITE_TABLES times (us): entry 17198 run 490194 exit 150035

 1730 12:48:51.332244  call enable_fixed_mtrr()

 1731 12:48:51.334204  CBFS @ 1d00000 size 300000

 1732 12:48:51.341107  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1733 12:48:51.344526  CPU physical address size: 39 bits

 1734 12:48:51.347278  CBFS: Locating 'fallback/payload'

 1735 12:48:51.352992  CBFS: Found @ offset 1cf4c0 size 3a954

 1736 12:48:51.356553  Checking segment from ROM address 0xffecf4f8

 1737 12:48:51.360720  Checking segment from ROM address 0xffecf514

 1738 12:48:51.365417  Loading segment from ROM address 0xffecf4f8

 1739 12:48:51.368105    code (compression=0)

 1740 12:48:51.376269    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1741 12:48:51.385762  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1742 12:48:51.387309  it's not compressed!

 1743 12:48:51.469428  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 1744 12:48:51.476042  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 1745 12:48:51.484782  Loading segment from ROM address 0xffecf514

 1746 12:48:51.487108    Entry Point 0x30100018

 1747 12:48:51.489010  Loaded segments

 1748 12:48:51.499112  Finalizing chipset.

 1749 12:48:51.500614  Finalizing SMM.

 1750 12:48:51.507235  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 159695 exit 12043

 1751 12:48:51.510083  mp_park_aps done after 0 msecs.

 1752 12:48:51.514318  Jumping to boot code at 30100018(89c33000)

 1753 12:48:51.523744  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 1754 12:48:51.523838  

 1755 12:48:51.523917  

 1756 12:48:51.523983  

 1757 12:48:51.527038  Starting depthcharge on sarien...

 1758 12:48:51.527626  end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
 1759 12:48:51.527756  start: 2.2.4 bootloader-commands (timeout 00:04:30) [common]
 1760 12:48:51.527864  Setting prompt string to ['sarien:']
 1761 12:48:51.527982  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:30)
 1762 12:48:51.528148  

 1763 12:48:51.534410  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1764 12:48:51.535025  

 1765 12:48:51.542022  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1766 12:48:51.542652  

 1767 12:48:51.549986  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 1768 12:48:51.550093  

 1769 12:48:51.551497  BIOS MMAP details:

 1770 12:48:51.551769  

 1771 12:48:51.554546  IFD Base Offset  : 0x1000000

 1772 12:48:51.554823  

 1773 12:48:51.557209  IFD End Offset   : 0x2000000

 1774 12:48:51.557475  

 1775 12:48:51.560337  MMAP Size        : 0x1000000

 1776 12:48:51.560907  

 1777 12:48:51.563172  MMAP Start       : 0xff000000

 1778 12:48:51.564120  

 1779 12:48:51.570831  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 1780 12:48:51.573463  

 1781 12:48:51.578338  Failed to find BH720 with VID/DID 1217:8620

 1782 12:48:51.578430  

 1783 12:48:51.581762  New NVMe Controller 0x3214e050 @ 00:1d:04

 1784 12:48:51.581842  

 1785 12:48:51.586093  New NVMe Controller 0x3214e118 @ 00:1d:00

 1786 12:48:51.586175  

 1787 12:48:51.592103  The GBB signature is at 0x30000014 and is:  24 47 42 42

 1788 12:48:51.595586  

 1789 12:48:51.598203  Wipe memory regions:

 1790 12:48:51.599002  

 1791 12:48:51.602462  	[0x00000000001000, 0x000000000a0000)

 1792 12:48:51.602549  

 1793 12:48:51.605258  	[0x00000000100000, 0x00000030000000)

 1794 12:48:51.687956  

 1795 12:48:51.691832  	[0x00000032751910, 0x00000089afd000)

 1796 12:48:51.841881  

 1797 12:48:51.845831  	[0x00000100000000, 0x0000016e800000)

 1798 12:48:52.466582  

 1799 12:48:52.469068  R8152: Initializing

 1800 12:48:52.469175  

 1801 12:48:52.471109  Version 9 (ocp_data = 6010)

 1802 12:48:52.471783  

 1803 12:48:52.474609  R8152: Done initializing

 1804 12:48:52.474929  

 1805 12:48:52.476022  Adding net device

 1806 12:48:52.477248  

 1807 12:48:52.482188  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 1808 12:48:52.482270  

 1809 12:48:52.482891  

 1810 12:48:52.482963  

 1811 12:48:52.483437  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1813 12:48:52.584171  sarien:tftpboot 192.168.201.1 9584807/tftp-deploy-xuh_9fzw/kernel/bzImage 9584807/tftp-deploy-xuh_9fzw/kernel/cmdline 9584807/tftp-deploy-xuh_9fzw/ramdisk/ramdisk.cpio.gz

 1814 12:48:52.584336  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1815 12:48:52.584458  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:29)
 1816 12:48:52.586510   tftpboot 192.168.201.1 9584807/tftp-deploy-xuh_9fzw/kernel/bzImage 9584807/tftp-deploy-xuh_9fzw/kernel/cmdline 9584807/tftp-deploy-xuh_9fzw/ramdisk/ramdisk.cpio.gz

 1817 12:48:52.586602  

 1818 12:48:52.587942  Waiting for link

 1819 12:48:52.787570  

 1820 12:48:52.788396  done.

 1821 12:48:52.788482  

 1822 12:48:52.790464  MAC: 00:e0:4c:78:7f:db

 1823 12:48:52.790728  

 1824 12:48:52.793757  Sending DHCP discover... done.

 1825 12:48:52.794018  

 1826 12:48:55.797819  Waiting for reply... done.

 1827 12:48:55.797961  

 1828 12:48:55.799973  Sending DHCP request... done.

 1829 12:48:55.800492  

 1830 12:48:55.803090  Waiting for reply... done.

 1831 12:48:55.803357  

 1832 12:48:55.805041  My ip is 192.168.201.103

 1833 12:48:55.805871  

 1834 12:48:55.809010  The DHCP server ip is 192.168.201.1

 1835 12:48:55.809310  

 1836 12:48:55.813696  TFTP server IP predefined by user: 192.168.201.1

 1837 12:48:55.814251  

 1838 12:48:55.820936  Bootfile predefined by user: 9584807/tftp-deploy-xuh_9fzw/kernel/bzImage

 1839 12:48:55.821045  

 1840 12:48:55.825237  Sending tftp read request... done.

 1841 12:48:55.825337  

 1842 12:48:55.827168  Waiting for the transfer... 

 1843 12:48:55.828428  

 1844 12:48:56.065419  00000000 ################################################################

 1845 12:48:56.066117  

 1846 12:48:56.302786  00080000 ################################################################

 1847 12:48:56.303469  

 1848 12:48:56.543796  00100000 ################################################################

 1849 12:48:56.544151  

 1850 12:48:56.785541  00180000 ################################################################

 1851 12:48:56.786232  

 1852 12:48:57.025627  00200000 ################################################################

 1853 12:48:57.025979  

 1854 12:48:57.263725  00280000 ################################################################

 1855 12:48:57.264077  

 1856 12:48:57.501856  00300000 ################################################################

 1857 12:48:57.502500  

 1858 12:48:57.744000  00380000 ################################################################

 1859 12:48:57.744149  

 1860 12:48:57.988624  00400000 ################################################################

 1861 12:48:57.989006  

 1862 12:48:58.233834  00480000 ################################################################

 1863 12:48:58.234531  

 1864 12:48:58.488641  00500000 ################################################################

 1865 12:48:58.489266  

 1866 12:48:58.787118  00580000 ################################################################

 1867 12:48:58.787276  

 1868 12:48:59.043454  00600000 ################################################################

 1869 12:48:59.044689  

 1870 12:48:59.294431  00680000 ################################################################

 1871 12:48:59.295107  

 1872 12:48:59.435137  00700000 ##################################### done.

 1873 12:48:59.435787  

 1874 12:48:59.439134  The bootfile was 7638928 bytes long.

 1875 12:48:59.439224  

 1876 12:48:59.442425  Sending tftp read request... done.

 1877 12:48:59.443099  

 1878 12:48:59.445038  Waiting for the transfer... 

 1879 12:48:59.445759  

 1880 12:48:59.693163  00000000 ################################################################

 1881 12:48:59.693633  

 1882 12:48:59.938954  00080000 ################################################################

 1883 12:48:59.939845  

 1884 12:49:00.194194  00100000 ################################################################

 1885 12:49:00.194942  

 1886 12:49:00.446756  00180000 ################################################################

 1887 12:49:00.447536  

 1888 12:49:00.699311  00200000 ################################################################

 1889 12:49:00.699687  

 1890 12:49:00.948409  00280000 ################################################################

 1891 12:49:00.948788  

 1892 12:49:01.202240  00300000 ################################################################

 1893 12:49:01.202626  

 1894 12:49:01.452219  00380000 ################################################################

 1895 12:49:01.452625  

 1896 12:49:01.704245  00400000 ################################################################

 1897 12:49:01.704635  

 1898 12:49:01.953270  00480000 ################################################################

 1899 12:49:01.953905  

 1900 12:49:02.221860  00500000 ################################################################

 1901 12:49:02.222544  

 1902 12:49:02.466288  00580000 ################################################################

 1903 12:49:02.466795  

 1904 12:49:02.731458  00600000 ################################################################

 1905 12:49:02.731849  

 1906 12:49:02.984084  00680000 ################################################################

 1907 12:49:02.984476  

 1908 12:49:03.239528  00700000 ################################################################

 1909 12:49:03.239921  

 1910 12:49:03.493152  00780000 ################################################################

 1911 12:49:03.493355  

 1912 12:49:03.694119  00800000 ##################################################### done.

 1913 12:49:03.694265  

 1914 12:49:03.697651  Sending tftp read request... done.

 1915 12:49:03.698364  

 1916 12:49:03.701601  Waiting for the transfer... 

 1917 12:49:03.701684  

 1918 12:49:03.702914  00000000 # done.

 1919 12:49:03.703550  

 1920 12:49:03.712051  Command line loaded dynamically from TFTP file: 9584807/tftp-deploy-xuh_9fzw/kernel/cmdline

 1921 12:49:03.712137  

 1922 12:49:03.728894  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1923 12:49:03.733066  

 1924 12:49:03.736452  Shutting down all USB controllers.

 1925 12:49:03.736609  

 1926 12:49:03.738855  Removing current net device

 1927 12:49:03.740468  

 1928 12:49:03.743025  EC: exit firmware mode

 1929 12:49:03.744120  

 1930 12:49:03.745947  Finalizing coreboot

 1931 12:49:03.746043  

 1932 12:49:03.751329  Exiting depthcharge with code 4 at timestamp: 19117472

 1933 12:49:03.751942  

 1934 12:49:03.752022  

 1935 12:49:03.753279  end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
 1936 12:49:03.753401  start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
 1937 12:49:03.753483  Setting prompt string to ['Linux version [0-9]']
 1938 12:49:03.753584  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1939 12:49:03.753666  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1940 12:49:03.753875  Starting kernel ...

 1941 12:49:03.753953  

 1942 12:49:03.754238  

 1944 12:53:20.753626  end: 2.2.5 auto-login-action (duration 00:04:17) [common]
 1946 12:53:20.753889  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
 1948 12:53:20.754069  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1951 12:53:20.754415  end: 2 depthcharge-action (duration 00:05:00) [common]
 1953 12:53:20.754662  Cleaning after the job
 1954 12:53:20.754752  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/ramdisk
 1955 12:53:20.755408  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/kernel
 1956 12:53:20.755967  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584807/tftp-deploy-xuh_9fzw/modules
 1957 12:53:20.756216  start: 5.1 power-off (timeout 00:00:30) [common]
 1958 12:53:20.756381  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
 1959 12:53:28.039491  >> Command sent successfully.

 1960 12:53:28.042777  Returned 0 in 7 seconds
 1961 12:53:28.143914  end: 5.1 power-off (duration 00:00:07) [common]
 1963 12:53:28.144954  start: 5.2 read-feedback (timeout 00:09:53) [common]
 1964 12:53:28.145770  Listened to connection for namespace 'common' for up to 1s
 1965 12:53:29.150177  Finalising connection for namespace 'common'
 1966 12:53:29.150483  Disconnecting from shell: Finalise
 1967 12:53:29.150666  

 1968 12:53:29.251735  end: 5.2 read-feedback (duration 00:00:01) [common]
 1969 12:53:29.252294  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584807
 1970 12:53:29.278059  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584807
 1971 12:53:29.278720  JobError: Your job cannot terminate cleanly.