Boot log: asus-C436FA-Flip-hatch

    1 12:51:29.545674  lava-dispatcher, installed at version: 2023.01
    2 12:51:29.545910  start: 0 validate
    3 12:51:29.546029  Start time: 2023-03-13 12:51:29.546023+00:00 (UTC)
    4 12:51:29.546165  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:51:29.546291  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:51:29.838795  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:51:29.839464  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:51:30.129234  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:51:30.129965  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:51:30.423134  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:51:30.423882  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:51:30.729487  validate duration: 1.18
   14 12:51:30.730864  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:51:30.731626  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:51:30.732093  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:51:30.732561  Not decompressing ramdisk as can be used compressed.
   18 12:51:30.733016  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/initrd.cpio.gz
   19 12:51:30.733349  saving as /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/ramdisk/initrd.cpio.gz
   20 12:51:30.733664  total size: 5432085 (5MB)
   21 12:51:30.737620  progress   0% (0MB)
   22 12:51:30.745250  progress   5% (0MB)
   23 12:51:30.751843  progress  10% (0MB)
   24 12:51:30.756477  progress  15% (0MB)
   25 12:51:30.760552  progress  20% (1MB)
   26 12:51:30.763627  progress  25% (1MB)
   27 12:51:30.766488  progress  30% (1MB)
   28 12:51:30.769147  progress  35% (1MB)
   29 12:51:30.771488  progress  40% (2MB)
   30 12:51:30.773510  progress  45% (2MB)
   31 12:51:30.775547  progress  50% (2MB)
   32 12:51:30.777626  progress  55% (2MB)
   33 12:51:30.779413  progress  60% (3MB)
   34 12:51:30.781187  progress  65% (3MB)
   35 12:51:30.782977  progress  70% (3MB)
   36 12:51:30.784560  progress  75% (3MB)
   37 12:51:30.786181  progress  80% (4MB)
   38 12:51:30.787623  progress  85% (4MB)
   39 12:51:30.789215  progress  90% (4MB)
   40 12:51:30.790648  progress  95% (4MB)
   41 12:51:30.792021  progress 100% (5MB)
   42 12:51:30.792226  5MB downloaded in 0.06s (88.46MB/s)
   43 12:51:30.792376  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:51:30.792622  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:51:30.792713  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:51:30.792806  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:51:30.792921  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 12:51:30.792990  saving as /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/kernel/bzImage
   50 12:51:30.793052  total size: 7638928 (7MB)
   51 12:51:30.793113  No compression specified
   52 12:51:30.794035  progress   0% (0MB)
   53 12:51:30.795892  progress   5% (0MB)
   54 12:51:30.797832  progress  10% (0MB)
   55 12:51:30.799593  progress  15% (1MB)
   56 12:51:30.801503  progress  20% (1MB)
   57 12:51:30.803499  progress  25% (1MB)
   58 12:51:30.805249  progress  30% (2MB)
   59 12:51:30.807161  progress  35% (2MB)
   60 12:51:30.809067  progress  40% (2MB)
   61 12:51:30.810871  progress  45% (3MB)
   62 12:51:30.812790  progress  50% (3MB)
   63 12:51:30.814701  progress  55% (4MB)
   64 12:51:30.816448  progress  60% (4MB)
   65 12:51:30.818401  progress  65% (4MB)
   66 12:51:30.820291  progress  70% (5MB)
   67 12:51:30.822072  progress  75% (5MB)
   68 12:51:30.823957  progress  80% (5MB)
   69 12:51:30.825870  progress  85% (6MB)
   70 12:51:30.827597  progress  90% (6MB)
   71 12:51:30.829461  progress  95% (6MB)
   72 12:51:30.831394  progress 100% (7MB)
   73 12:51:30.831511  7MB downloaded in 0.04s (189.45MB/s)
   74 12:51:30.831671  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:51:30.831904  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:51:30.831994  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:51:30.832080  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:51:30.832193  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/full.rootfs.tar.xz
   80 12:51:30.832261  saving as /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/nfsrootfs/full.rootfs.tar
   81 12:51:30.832323  total size: 133351796 (127MB)
   82 12:51:30.832384  Using unxz to decompress xz
   83 12:51:30.835509  progress   0% (0MB)
   84 12:51:31.170497  progress   5% (6MB)
   85 12:51:31.530552  progress  10% (12MB)
   86 12:51:31.817960  progress  15% (19MB)
   87 12:51:32.016001  progress  20% (25MB)
   88 12:51:32.264578  progress  25% (31MB)
   89 12:51:32.616972  progress  30% (38MB)
   90 12:51:32.991722  progress  35% (44MB)
   91 12:51:33.406807  progress  40% (50MB)
   92 12:51:33.805858  progress  45% (57MB)
   93 12:51:34.177532  progress  50% (63MB)
   94 12:51:34.562801  progress  55% (69MB)
   95 12:51:34.923049  progress  60% (76MB)
   96 12:51:35.287708  progress  65% (82MB)
   97 12:51:35.657233  progress  70% (89MB)
   98 12:51:36.038561  progress  75% (95MB)
   99 12:51:36.499711  progress  80% (101MB)
  100 12:51:36.933767  progress  85% (108MB)
  101 12:51:37.207623  progress  90% (114MB)
  102 12:51:37.560760  progress  95% (120MB)
  103 12:51:37.956207  progress 100% (127MB)
  104 12:51:37.962057  127MB downloaded in 7.13s (17.84MB/s)
  105 12:51:37.962405  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 12:51:37.962726  end: 1.3 download-retry (duration 00:00:07) [common]
  108 12:51:37.962835  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 12:51:37.962949  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 12:51:37.963082  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 12:51:37.963161  saving as /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/modules/modules.tar
  112 12:51:37.963242  total size: 250760 (0MB)
  113 12:51:37.963308  Using unxz to decompress xz
  114 12:51:37.966497  progress  13% (0MB)
  115 12:51:37.966905  progress  26% (0MB)
  116 12:51:37.967185  progress  39% (0MB)
  117 12:51:37.968421  progress  52% (0MB)
  118 12:51:37.970339  progress  65% (0MB)
  119 12:51:37.972201  progress  78% (0MB)
  120 12:51:37.974043  progress  91% (0MB)
  121 12:51:37.975828  progress 100% (0MB)
  122 12:51:37.981298  0MB downloaded in 0.02s (13.25MB/s)
  123 12:51:37.981624  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 12:51:37.982053  end: 1.4 download-retry (duration 00:00:00) [common]
  126 12:51:37.982189  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  127 12:51:37.982330  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  128 12:51:39.255563  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9584816/extract-nfsrootfs-8t9b0hbu
  129 12:51:39.255769  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  130 12:51:39.255892  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  131 12:51:39.256029  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t
  132 12:51:39.256134  makedir: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin
  133 12:51:39.256221  makedir: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/tests
  134 12:51:39.256302  makedir: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/results
  135 12:51:39.256400  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-add-keys
  136 12:51:39.256529  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-add-sources
  137 12:51:39.256641  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-background-process-start
  138 12:51:39.256753  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-background-process-stop
  139 12:51:39.256863  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-common-functions
  140 12:51:39.256975  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-echo-ipv4
  141 12:51:39.257085  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-install-packages
  142 12:51:39.257193  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-installed-packages
  143 12:51:39.257301  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-os-build
  144 12:51:39.257409  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-probe-channel
  145 12:51:39.257517  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-probe-ip
  146 12:51:39.257625  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-target-ip
  147 12:51:39.257738  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-target-mac
  148 12:51:39.257903  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-target-storage
  149 12:51:39.258016  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-case
  150 12:51:39.258127  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-event
  151 12:51:39.258234  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-feedback
  152 12:51:39.258344  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-raise
  153 12:51:39.258451  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-reference
  154 12:51:39.258559  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-runner
  155 12:51:39.258666  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-set
  156 12:51:39.258773  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-test-shell
  157 12:51:39.258882  Updating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-install-packages (oe)
  158 12:51:39.258994  Updating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/bin/lava-installed-packages (oe)
  159 12:51:39.259090  Creating /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/environment
  160 12:51:39.259177  LAVA metadata
  161 12:51:39.259247  - LAVA_JOB_ID=9584816
  162 12:51:39.259312  - LAVA_DISPATCHER_IP=192.168.201.1
  163 12:51:39.259409  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  164 12:51:39.259475  skipped lava-vland-overlay
  165 12:51:39.259552  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 12:51:39.259634  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  167 12:51:39.259697  skipped lava-multinode-overlay
  168 12:51:39.259772  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 12:51:39.259853  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  170 12:51:39.259925  Loading test definitions
  171 12:51:39.260015  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  172 12:51:39.260088  Using /lava-9584816 at stage 0
  173 12:51:39.260335  uuid=9584816_1.5.2.3.1 testdef=None
  174 12:51:39.260425  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 12:51:39.260514  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  176 12:51:39.260971  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 12:51:39.261210  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  179 12:51:39.261827  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 12:51:39.262066  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  182 12:51:39.262593  runner path: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/0/tests/0_dmesg test_uuid 9584816_1.5.2.3.1
  183 12:51:39.262767  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 12:51:39.263042  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  186 12:51:39.263116  Using /lava-9584816 at stage 1
  187 12:51:39.263371  uuid=9584816_1.5.2.3.5 testdef=None
  188 12:51:39.263499  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 12:51:39.263592  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  190 12:51:39.264031  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 12:51:39.264252  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  193 12:51:39.264811  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 12:51:39.265047  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  196 12:51:39.265585  runner path: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/1/tests/1_bootrr test_uuid 9584816_1.5.2.3.5
  197 12:51:39.266079  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 12:51:39.266295  Creating lava-test-runner.conf files
  200 12:51:39.266359  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/0 for stage 0
  201 12:51:39.266442  - 0_dmesg
  202 12:51:39.266515  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584816/lava-overlay-g4s5ed1t/lava-9584816/1 for stage 1
  203 12:51:39.266597  - 1_bootrr
  204 12:51:39.266687  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 12:51:39.266773  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  206 12:51:39.272395  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 12:51:39.272507  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  208 12:51:39.272625  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 12:51:39.272717  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 12:51:39.272806  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  211 12:51:39.374466  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 12:51:39.374825  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  213 12:51:39.375078  extracting modules file /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584816/extract-nfsrootfs-8t9b0hbu
  214 12:51:39.382457  extracting modules file /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584816/extract-overlay-ramdisk-tng6tnzr/ramdisk
  215 12:51:39.389533  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 12:51:39.389666  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  217 12:51:39.389791  [common] Applying overlay to NFS
  218 12:51:39.389862  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584816/compress-overlay-zj0elyt7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584816/extract-nfsrootfs-8t9b0hbu
  219 12:51:39.393801  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 12:51:39.393918  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  221 12:51:39.394013  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 12:51:39.394106  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  223 12:51:39.394186  Building ramdisk /var/lib/lava/dispatcher/tmp/9584816/extract-overlay-ramdisk-tng6tnzr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584816/extract-overlay-ramdisk-tng6tnzr/ramdisk
  224 12:51:39.429541  >> 26158 blocks

  225 12:51:39.937581  rename /var/lib/lava/dispatcher/tmp/9584816/extract-overlay-ramdisk-tng6tnzr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/ramdisk/ramdisk.cpio.gz
  226 12:51:39.938242  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 12:51:39.938447  start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
  228 12:51:39.938612  start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
  229 12:51:39.938762  No mkimage arch provided, not using FIT.
  230 12:51:39.938909  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 12:51:39.939057  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 12:51:39.939223  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  233 12:51:39.939377  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
  234 12:51:39.939512  No LXC device requested
  235 12:51:39.939656  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 12:51:39.939804  start: 1.7 deploy-device-env (timeout 00:09:51) [common]
  237 12:51:39.939949  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 12:51:39.940070  Checking files for TFTP limit of 4294967296 bytes.
  239 12:51:39.940665  end: 1 tftp-deploy (duration 00:00:09) [common]
  240 12:51:39.940830  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 12:51:39.940981  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 12:51:39.941177  substitutions:
  243 12:51:39.941292  - {DTB}: None
  244 12:51:39.941403  - {INITRD}: 9584816/tftp-deploy-fs34z4_r/ramdisk/ramdisk.cpio.gz
  245 12:51:39.941512  - {KERNEL}: 9584816/tftp-deploy-fs34z4_r/kernel/bzImage
  246 12:51:39.941622  - {LAVA_MAC}: None
  247 12:51:39.941733  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9584816/extract-nfsrootfs-8t9b0hbu
  248 12:51:39.941841  - {NFS_SERVER_IP}: 192.168.201.1
  249 12:51:39.941947  - {PRESEED_CONFIG}: None
  250 12:51:39.942051  - {PRESEED_LOCAL}: None
  251 12:51:39.942159  - {RAMDISK}: 9584816/tftp-deploy-fs34z4_r/ramdisk/ramdisk.cpio.gz
  252 12:51:39.942262  - {ROOT_PART}: None
  253 12:51:39.942368  - {ROOT}: None
  254 12:51:39.942471  - {SERVER_IP}: 192.168.201.1
  255 12:51:39.942576  - {TEE}: None
  256 12:51:39.942682  Parsed boot commands:
  257 12:51:39.942785  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 12:51:39.943028  Parsed boot commands: tftpboot 192.168.201.1 9584816/tftp-deploy-fs34z4_r/kernel/bzImage 9584816/tftp-deploy-fs34z4_r/kernel/cmdline 9584816/tftp-deploy-fs34z4_r/ramdisk/ramdisk.cpio.gz
  259 12:51:39.943185  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 12:51:39.943334  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 12:51:39.943494  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 12:51:39.943647  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 12:51:39.943766  Not connected, no need to disconnect.
  264 12:51:39.943901  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 12:51:39.944044  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 12:51:39.944161  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
  267 12:51:39.947651  Setting prompt string to ['lava-test: # ']
  268 12:51:39.948050  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 12:51:39.948219  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 12:51:39.948376  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 12:51:39.948529  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 12:51:39.948813  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
  273 12:51:45.069991  >> Command sent successfully.

  274 12:51:45.072147  Returned 0 in 5 seconds
  275 12:51:45.173023  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 12:51:45.173456  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 12:51:45.173609  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 12:51:45.173746  Setting prompt string to 'Starting depthcharge on Helios...'
  280 12:51:45.173842  Changing prompt to 'Starting depthcharge on Helios...'
  281 12:51:45.173960  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  282 12:51:45.174339  [Enter `^Ec?' for help]

  283 12:51:45.792125  

  284 12:51:45.792297  

  285 12:51:45.801898  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  286 12:51:45.805139  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  287 12:51:45.811522  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  288 12:51:45.814873  CPU: AES supported, TXT NOT supported, VT supported

  289 12:51:45.821422  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  290 12:51:45.825034  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  291 12:51:45.831453  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  292 12:51:45.835030  VBOOT: Loading verstage.

  293 12:51:45.838178  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  294 12:51:45.844637  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  295 12:51:45.851392  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  296 12:51:45.851477  CBFS @ c08000 size 3f8000

  297 12:51:45.857785  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  298 12:51:45.861175  CBFS: Locating 'fallback/verstage'

  299 12:51:45.864131  CBFS: Found @ offset 10fb80 size 1072c

  300 12:51:45.868714  

  301 12:51:45.868798  

  302 12:51:45.878150  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  303 12:51:45.892636  Probing TPM: . done!

  304 12:51:45.896380  TPM ready after 0 ms

  305 12:51:45.899325  Connected to device vid:did:rid of 1ae0:0028:00

  306 12:51:45.909519  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  307 12:51:45.912830  Initialized TPM device CR50 revision 0

  308 12:51:45.955370  tlcl_send_startup: Startup return code is 0

  309 12:51:45.955478  TPM: setup succeeded

  310 12:51:45.967936  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  311 12:51:45.971834  Chrome EC: UHEPI supported

  312 12:51:45.975041  Phase 1

  313 12:51:45.978417  FMAP: area GBB found @ c05000 (12288 bytes)

  314 12:51:45.984882  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  315 12:51:45.988452  Phase 2

  316 12:51:45.988539  Phase 3

  317 12:51:45.991590  FMAP: area GBB found @ c05000 (12288 bytes)

  318 12:51:45.998448  VB2:vb2_report_dev_firmware() This is developer signed firmware

  319 12:51:46.004711  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  320 12:51:46.008188  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  321 12:51:46.014479  VB2:vb2_verify_keyblock() Checking keyblock signature...

  322 12:51:46.030535  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  323 12:51:46.033859  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  324 12:51:46.040462  VB2:vb2_verify_fw_preamble() Verifying preamble.

  325 12:51:46.044535  Phase 4

  326 12:51:46.048054  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  327 12:51:46.057832  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  328 12:51:46.234435  VB2:vb2_rsa_verify_digest() Digest check failed!

  329 12:51:46.240709  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  330 12:51:46.240801  Saving nvdata

  331 12:51:46.243948  Reboot requested (10020007)

  332 12:51:46.247025  board_reset() called!

  333 12:51:46.247111  full_reset() called!

  334 12:51:50.758809  

  335 12:51:50.758956  

  336 12:51:50.768698  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  337 12:51:50.771969  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  338 12:51:50.778454  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  339 12:51:50.781935  CPU: AES supported, TXT NOT supported, VT supported

  340 12:51:50.788603  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  341 12:51:50.791498  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  342 12:51:50.798086  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  343 12:51:50.801483  VBOOT: Loading verstage.

  344 12:51:50.804798  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  345 12:51:50.811309  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  346 12:51:50.818051  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  347 12:51:50.818145  CBFS @ c08000 size 3f8000

  348 12:51:50.824412  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  349 12:51:50.827978  CBFS: Locating 'fallback/verstage'

  350 12:51:50.831076  CBFS: Found @ offset 10fb80 size 1072c

  351 12:51:50.835267  

  352 12:51:50.835358  

  353 12:51:50.845283  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  354 12:51:50.859708  Probing TPM: . done!

  355 12:51:50.863253  TPM ready after 0 ms

  356 12:51:50.866459  Connected to device vid:did:rid of 1ae0:0028:00

  357 12:51:50.876470  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  358 12:51:50.879869  Initialized TPM device CR50 revision 0

  359 12:51:50.922638  tlcl_send_startup: Startup return code is 0

  360 12:51:50.922778  TPM: setup succeeded

  361 12:51:50.935130  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  362 12:51:50.938978  Chrome EC: UHEPI supported

  363 12:51:50.941989  Phase 1

  364 12:51:50.945280  FMAP: area GBB found @ c05000 (12288 bytes)

  365 12:51:50.951881  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  366 12:51:50.958796  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  367 12:51:50.961679  Recovery requested (1009000e)

  368 12:51:50.967802  Saving nvdata

  369 12:51:50.973922  tlcl_extend: response is 0

  370 12:51:50.982651  tlcl_extend: response is 0

  371 12:51:50.989604  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 12:51:50.993026  CBFS @ c08000 size 3f8000

  373 12:51:50.999414  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 12:51:51.002851  CBFS: Locating 'fallback/romstage'

  375 12:51:51.006019  CBFS: Found @ offset 80 size 145fc

  376 12:51:51.009219  Accumulated console time in verstage 98 ms

  377 12:51:51.009307  

  378 12:51:51.009376  

  379 12:51:51.022425  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  380 12:51:51.029270  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  381 12:51:51.032623  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  382 12:51:51.035911  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  383 12:51:51.042278  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  384 12:51:51.045588  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  385 12:51:51.048869  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  386 12:51:51.052172  TCO_STS:   0000 0000

  387 12:51:51.055409  GEN_PMCON: e0015238 00000200

  388 12:51:51.058537  GBLRST_CAUSE: 00000000 00000000

  389 12:51:51.058625  prev_sleep_state 5

  390 12:51:51.062338  Boot Count incremented to 49093

  391 12:51:51.069161  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  392 12:51:51.072534  CBFS @ c08000 size 3f8000

  393 12:51:51.078963  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  394 12:51:51.079051  CBFS: Locating 'fspm.bin'

  395 12:51:51.085690  CBFS: Found @ offset 5ffc0 size 71000

  396 12:51:51.089116  Chrome EC: UHEPI supported

  397 12:51:51.095577  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  398 12:51:51.099010  Probing TPM:  done!

  399 12:51:51.105627  Connected to device vid:did:rid of 1ae0:0028:00

  400 12:51:51.115575  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  401 12:51:51.121334  Initialized TPM device CR50 revision 0

  402 12:51:51.130509  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  403 12:51:51.137283  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  404 12:51:51.140407  MRC cache found, size 1948

  405 12:51:51.143865  bootmode is set to: 2

  406 12:51:51.147203  PRMRR disabled by config.

  407 12:51:51.150618  SPD INDEX = 1

  408 12:51:51.153866  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  409 12:51:51.156819  CBFS @ c08000 size 3f8000

  410 12:51:51.163477  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  411 12:51:51.163563  CBFS: Locating 'spd.bin'

  412 12:51:51.166799  CBFS: Found @ offset 5fb80 size 400

  413 12:51:51.170085  SPD: module type is LPDDR3

  414 12:51:51.173283  SPD: module part is 

  415 12:51:51.180072  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  416 12:51:51.183405  SPD: device width 4 bits, bus width 8 bits

  417 12:51:51.186673  SPD: module size is 4096 MB (per channel)

  418 12:51:51.190142  memory slot: 0 configuration done.

  419 12:51:51.193188  memory slot: 2 configuration done.

  420 12:51:51.244841  CBMEM:

  421 12:51:51.248456  IMD: root @ 99fff000 254 entries.

  422 12:51:51.251539  IMD: root @ 99ffec00 62 entries.

  423 12:51:51.255087  External stage cache:

  424 12:51:51.258058  IMD: root @ 9abff000 254 entries.

  425 12:51:51.261464  IMD: root @ 9abfec00 62 entries.

  426 12:51:51.268028  Chrome EC: clear events_b mask to 0x0000000020004000

  427 12:51:51.280773  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  428 12:51:51.291127  tlcl_write: response is 0

  429 12:51:51.303188  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  430 12:51:51.309607  MRC: TPM MRC hash updated successfully.

  431 12:51:51.309696  2 DIMMs found

  432 12:51:51.312653  SMM Memory Map

  433 12:51:51.316083  SMRAM       : 0x9a000000 0x1000000

  434 12:51:51.319487   Subregion 0: 0x9a000000 0xa00000

  435 12:51:51.322554   Subregion 1: 0x9aa00000 0x200000

  436 12:51:51.326064   Subregion 2: 0x9ac00000 0x400000

  437 12:51:51.329482  top_of_ram = 0x9a000000

  438 12:51:51.332402  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  439 12:51:51.339364  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  440 12:51:51.342362  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  441 12:51:51.349103  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 12:51:51.352321  CBFS @ c08000 size 3f8000

  443 12:51:51.355570  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 12:51:51.359170  CBFS: Locating 'fallback/postcar'

  445 12:51:51.365621  CBFS: Found @ offset 107000 size 4b44

  446 12:51:51.371863  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  447 12:51:51.381938  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  448 12:51:51.385003  Processing 180 relocs. Offset value of 0x97c0c000

  449 12:51:51.393384  Accumulated console time in romstage 285 ms

  450 12:51:51.393475  

  451 12:51:51.393545  

  452 12:51:51.403558  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  453 12:51:51.410203  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  454 12:51:51.413413  CBFS @ c08000 size 3f8000

  455 12:51:51.419947  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  456 12:51:51.423436  CBFS: Locating 'fallback/ramstage'

  457 12:51:51.426484  CBFS: Found @ offset 43380 size 1b9e8

  458 12:51:51.433253  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  459 12:51:51.465233  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  460 12:51:51.468665  Processing 3976 relocs. Offset value of 0x98db0000

  461 12:51:51.475405  Accumulated console time in postcar 52 ms

  462 12:51:51.475492  

  463 12:51:51.475562  

  464 12:51:51.485117  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  465 12:51:51.491500  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  466 12:51:51.495085  WARNING: RO_VPD is uninitialized or empty.

  467 12:51:51.498191  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 12:51:51.504703  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  469 12:51:51.504792  Normal boot.

  470 12:51:51.511282  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  471 12:51:51.514601  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  472 12:51:51.518053  CBFS @ c08000 size 3f8000

  473 12:51:51.524546  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  474 12:51:51.527709  CBFS: Locating 'cpu_microcode_blob.bin'

  475 12:51:51.531270  CBFS: Found @ offset 14700 size 2ec00

  476 12:51:51.534443  microcode: sig=0x806ec pf=0x4 revision=0xc9

  477 12:51:51.537688  Skip microcode update

  478 12:51:51.544182  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  479 12:51:51.547466  CBFS @ c08000 size 3f8000

  480 12:51:51.550888  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  481 12:51:51.554180  CBFS: Locating 'fsps.bin'

  482 12:51:51.557410  CBFS: Found @ offset d1fc0 size 35000

  483 12:51:51.583486  Detected 4 core, 8 thread CPU.

  484 12:51:51.586775  Setting up SMI for CPU

  485 12:51:51.589992  IED base = 0x9ac00000

  486 12:51:51.590079  IED size = 0x00400000

  487 12:51:51.593380  Will perform SMM setup.

  488 12:51:51.600027  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  489 12:51:51.606561  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  490 12:51:51.613310  Processing 16 relocs. Offset value of 0x00030000

  491 12:51:51.613397  Attempting to start 7 APs

  492 12:51:51.619356  Waiting for 10ms after sending INIT.

  493 12:51:51.633056  Waiting for 1st SIPI to complete...done.

  494 12:51:51.633142  AP: slot 6 apic_id 4.

  495 12:51:51.636205  AP: slot 7 apic_id 5.

  496 12:51:51.639747  AP: slot 2 apic_id 7.

  497 12:51:51.639834  AP: slot 4 apic_id 6.

  498 12:51:51.643099  AP: slot 5 apic_id 2.

  499 12:51:51.646317  AP: slot 3 apic_id 3.

  500 12:51:51.646403  AP: slot 1 apic_id 1.

  501 12:51:51.652838  Waiting for 2nd SIPI to complete...done.

  502 12:51:51.659436  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  503 12:51:51.666188  Processing 13 relocs. Offset value of 0x00038000

  504 12:51:51.672732  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  505 12:51:51.676140  Installing SMM handler to 0x9a000000

  506 12:51:51.682504  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  507 12:51:51.689181  Processing 658 relocs. Offset value of 0x9a010000

  508 12:51:51.695727  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  509 12:51:51.699059  Processing 13 relocs. Offset value of 0x9a008000

  510 12:51:51.705339  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  511 12:51:51.711889  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  512 12:51:51.718791  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  513 12:51:51.721733  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  514 12:51:51.728497  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  515 12:51:51.735048  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  516 12:51:51.741757  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  517 12:51:51.748237  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  518 12:51:51.751313  Clearing SMI status registers

  519 12:51:51.751400  SMI_STS: PM1 

  520 12:51:51.754780  PM1_STS: PWRBTN 

  521 12:51:51.754867  TCO_STS: SECOND_TO 

  522 12:51:51.758234  New SMBASE 0x9a000000

  523 12:51:51.761205  In relocation handler: CPU 0

  524 12:51:51.764575  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  525 12:51:51.771218  Writing SMRR. base = 0x9a000006, mask=0xff000800

  526 12:51:51.771305  Relocation complete.

  527 12:51:51.774442  New SMBASE 0x99fffc00

  528 12:51:51.777660  In relocation handler: CPU 1

  529 12:51:51.781052  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  530 12:51:51.787382  Writing SMRR. base = 0x9a000006, mask=0xff000800

  531 12:51:51.787470  Relocation complete.

  532 12:51:51.790698  New SMBASE 0x99ffec00

  533 12:51:51.793994  In relocation handler: CPU 5

  534 12:51:51.797558  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  535 12:51:51.803831  Writing SMRR. base = 0x9a000006, mask=0xff000800

  536 12:51:51.803919  Relocation complete.

  537 12:51:51.807298  New SMBASE 0x99fff400

  538 12:51:51.810700  In relocation handler: CPU 3

  539 12:51:51.814002  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  540 12:51:51.820363  Writing SMRR. base = 0x9a000006, mask=0xff000800

  541 12:51:51.820451  Relocation complete.

  542 12:51:51.823806  New SMBASE 0x99fff000

  543 12:51:51.826799  In relocation handler: CPU 4

  544 12:51:51.830205  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  545 12:51:51.836856  Writing SMRR. base = 0x9a000006, mask=0xff000800

  546 12:51:51.836946  Relocation complete.

  547 12:51:51.840207  New SMBASE 0x99fff800

  548 12:51:51.843442  In relocation handler: CPU 2

  549 12:51:51.846605  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  550 12:51:51.850077  Writing SMRR. base = 0x9a000006, mask=0xff000800

  551 12:51:51.853384  Relocation complete.

  552 12:51:51.856804  New SMBASE 0x99ffe400

  553 12:51:51.859823  In relocation handler: CPU 7

  554 12:51:51.863300  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  555 12:51:51.866484  Writing SMRR. base = 0x9a000006, mask=0xff000800

  556 12:51:51.869621  Relocation complete.

  557 12:51:51.872883  New SMBASE 0x99ffe800

  558 12:51:51.876290  In relocation handler: CPU 6

  559 12:51:51.879442  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  560 12:51:51.882917  Writing SMRR. base = 0x9a000006, mask=0xff000800

  561 12:51:51.886230  Relocation complete.

  562 12:51:51.889403  Initializing CPU #0

  563 12:51:51.892703  CPU: vendor Intel device 806ec

  564 12:51:51.896222  CPU: family 06, model 8e, stepping 0c

  565 12:51:51.899438  Clearing out pending MCEs

  566 12:51:51.899526  Setting up local APIC...

  567 12:51:51.902609   apic_id: 0x00 done.

  568 12:51:51.905906  Turbo is available but hidden

  569 12:51:51.909449  Turbo is available and visible

  570 12:51:51.912681  VMX status: enabled

  571 12:51:51.915916  IA32_FEATURE_CONTROL status: locked

  572 12:51:51.916003  Skip microcode update

  573 12:51:51.919388  CPU #0 initialized

  574 12:51:51.922635  Initializing CPU #1

  575 12:51:51.922722  Initializing CPU #4

  576 12:51:51.925670  Initializing CPU #2

  577 12:51:51.929213  CPU: vendor Intel device 806ec

  578 12:51:51.932307  CPU: family 06, model 8e, stepping 0c

  579 12:51:51.935558  CPU: vendor Intel device 806ec

  580 12:51:51.939051  CPU: family 06, model 8e, stepping 0c

  581 12:51:51.942247  Clearing out pending MCEs

  582 12:51:51.945457  Clearing out pending MCEs

  583 12:51:51.945543  Setting up local APIC...

  584 12:51:51.948839  Initializing CPU #5

  585 12:51:51.952160  Initializing CPU #3

  586 12:51:51.955660  CPU: vendor Intel device 806ec

  587 12:51:51.958581  CPU: family 06, model 8e, stepping 0c

  588 12:51:51.962070  CPU: vendor Intel device 806ec

  589 12:51:51.965426  CPU: family 06, model 8e, stepping 0c

  590 12:51:51.968545  Clearing out pending MCEs

  591 12:51:51.968632  Clearing out pending MCEs

  592 12:51:51.972050  Setting up local APIC...

  593 12:51:51.975126  Initializing CPU #6

  594 12:51:51.975213  Initializing CPU #7

  595 12:51:51.978435  CPU: vendor Intel device 806ec

  596 12:51:51.985140  CPU: family 06, model 8e, stepping 0c

  597 12:51:51.985228  CPU: vendor Intel device 806ec

  598 12:51:51.991556  CPU: family 06, model 8e, stepping 0c

  599 12:51:51.991671  Clearing out pending MCEs

  600 12:51:51.995053  Clearing out pending MCEs

  601 12:51:51.998263  Setting up local APIC...

  602 12:51:52.001488   apic_id: 0x02 done.

  603 12:51:52.001575  Setting up local APIC...

  604 12:51:52.004887  CPU: vendor Intel device 806ec

  605 12:51:52.011387  CPU: family 06, model 8e, stepping 0c

  606 12:51:52.011476  Clearing out pending MCEs

  607 12:51:52.014788  Setting up local APIC...

  608 12:51:52.018190  VMX status: enabled

  609 12:51:52.018279   apic_id: 0x03 done.

  610 12:51:52.021540  IA32_FEATURE_CONTROL status: locked

  611 12:51:52.024887  VMX status: enabled

  612 12:51:52.028084  Skip microcode update

  613 12:51:52.031309  IA32_FEATURE_CONTROL status: locked

  614 12:51:52.031397  CPU #5 initialized

  615 12:51:52.034578  Skip microcode update

  616 12:51:52.037698   apic_id: 0x06 done.

  617 12:51:52.041268  Setting up local APIC...

  618 12:51:52.041356  Setting up local APIC...

  619 12:51:52.044306  CPU #3 initialized

  620 12:51:52.044392  VMX status: enabled

  621 12:51:52.047684   apic_id: 0x07 done.

  622 12:51:52.050919  IA32_FEATURE_CONTROL status: locked

  623 12:51:52.054049  VMX status: enabled

  624 12:51:52.057383  Skip microcode update

  625 12:51:52.060892  IA32_FEATURE_CONTROL status: locked

  626 12:51:52.060980  CPU #4 initialized

  627 12:51:52.063970  Skip microcode update

  628 12:51:52.067425   apic_id: 0x01 done.

  629 12:51:52.067512   apic_id: 0x04 done.

  630 12:51:52.070427   apic_id: 0x05 done.

  631 12:51:52.073857  VMX status: enabled

  632 12:51:52.073946  VMX status: enabled

  633 12:51:52.077089  IA32_FEATURE_CONTROL status: locked

  634 12:51:52.080711  IA32_FEATURE_CONTROL status: locked

  635 12:51:52.083657  Skip microcode update

  636 12:51:52.087262  Skip microcode update

  637 12:51:52.087349  CPU #6 initialized

  638 12:51:52.090580  CPU #7 initialized

  639 12:51:52.090671  CPU #2 initialized

  640 12:51:52.093555  VMX status: enabled

  641 12:51:52.097281  IA32_FEATURE_CONTROL status: locked

  642 12:51:52.100306  Skip microcode update

  643 12:51:52.100394  CPU #1 initialized

  644 12:51:52.107046  bsp_do_flight_plan done after 452 msecs.

  645 12:51:52.110218  CPU: frequency set to 4200 MHz

  646 12:51:52.110306  Enabling SMIs.

  647 12:51:52.113505  Locking SMM.

  648 12:51:52.127048  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  649 12:51:52.129945  CBFS @ c08000 size 3f8000

  650 12:51:52.136686  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  651 12:51:52.136775  CBFS: Locating 'vbt.bin'

  652 12:51:52.143053  CBFS: Found @ offset 5f5c0 size 499

  653 12:51:52.146250  Found a VBT of 4608 bytes after decompression

  654 12:51:52.328124  Display FSP Version Info HOB

  655 12:51:52.331468  Reference Code - CPU = 9.0.1e.30

  656 12:51:52.334817  uCode Version = 0.0.0.ca

  657 12:51:52.337671  TXT ACM version = ff.ff.ff.ffff

  658 12:51:52.341269  Display FSP Version Info HOB

  659 12:51:52.344414  Reference Code - ME = 9.0.1e.30

  660 12:51:52.347667  MEBx version = 0.0.0.0

  661 12:51:52.350946  ME Firmware Version = Consumer SKU

  662 12:51:52.354186  Display FSP Version Info HOB

  663 12:51:52.357419  Reference Code - CML PCH = 9.0.1e.30

  664 12:51:52.360670  PCH-CRID Status = Disabled

  665 12:51:52.364104  PCH-CRID Original Value = ff.ff.ff.ffff

  666 12:51:52.367504  PCH-CRID New Value = ff.ff.ff.ffff

  667 12:51:52.370465  OPROM - RST - RAID = ff.ff.ff.ffff

  668 12:51:52.373966  ChipsetInit Base Version = ff.ff.ff.ffff

  669 12:51:52.377164  ChipsetInit Oem Version = ff.ff.ff.ffff

  670 12:51:52.380599  Display FSP Version Info HOB

  671 12:51:52.387019  Reference Code - SA - System Agent = 9.0.1e.30

  672 12:51:52.390198  Reference Code - MRC = 0.7.1.6c

  673 12:51:52.393667  SA - PCIe Version = 9.0.1e.30

  674 12:51:52.396932  SA-CRID Status = Disabled

  675 12:51:52.400100  SA-CRID Original Value = 0.0.0.c

  676 12:51:52.400189  SA-CRID New Value = 0.0.0.c

  677 12:51:52.403304  OPROM - VBIOS = ff.ff.ff.ffff

  678 12:51:52.406745  RTC Init

  679 12:51:52.410176  Set power on after power failure.

  680 12:51:52.410263  Disabling Deep S3

  681 12:51:52.413486  Disabling Deep S3

  682 12:51:52.416802  Disabling Deep S4

  683 12:51:52.416890  Disabling Deep S4

  684 12:51:52.419802  Disabling Deep S5

  685 12:51:52.419889  Disabling Deep S5

  686 12:51:52.426479  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1

  687 12:51:52.429492  Enumerating buses...

  688 12:51:52.432851  Show all devs... Before device enumeration.

  689 12:51:52.436086  Root Device: enabled 1

  690 12:51:52.439349  CPU_CLUSTER: 0: enabled 1

  691 12:51:52.439436  DOMAIN: 0000: enabled 1

  692 12:51:52.442754  APIC: 00: enabled 1

  693 12:51:52.446025  PCI: 00:00.0: enabled 1

  694 12:51:52.449242  PCI: 00:02.0: enabled 1

  695 12:51:52.449329  PCI: 00:04.0: enabled 0

  696 12:51:52.452677  PCI: 00:05.0: enabled 0

  697 12:51:52.455631  PCI: 00:12.0: enabled 1

  698 12:51:52.455717  PCI: 00:12.5: enabled 0

  699 12:51:52.459179  PCI: 00:12.6: enabled 0

  700 12:51:52.462395  PCI: 00:14.0: enabled 1

  701 12:51:52.465420  PCI: 00:14.1: enabled 0

  702 12:51:52.465507  PCI: 00:14.3: enabled 1

  703 12:51:52.468794  PCI: 00:14.5: enabled 0

  704 12:51:52.472225  PCI: 00:15.0: enabled 1

  705 12:51:52.475452  PCI: 00:15.1: enabled 1

  706 12:51:52.475555  PCI: 00:15.2: enabled 0

  707 12:51:52.478687  PCI: 00:15.3: enabled 0

  708 12:51:52.482088  PCI: 00:16.0: enabled 1

  709 12:51:52.485303  PCI: 00:16.1: enabled 0

  710 12:51:52.485397  PCI: 00:16.2: enabled 0

  711 12:51:52.488437  PCI: 00:16.3: enabled 0

  712 12:51:52.491792  PCI: 00:16.4: enabled 0

  713 12:51:52.495049  PCI: 00:16.5: enabled 0

  714 12:51:52.495139  PCI: 00:17.0: enabled 1

  715 12:51:52.498277  PCI: 00:19.0: enabled 1

  716 12:51:52.501402  PCI: 00:19.1: enabled 0

  717 12:51:52.504533  PCI: 00:19.2: enabled 0

  718 12:51:52.504622  PCI: 00:1a.0: enabled 0

  719 12:51:52.507829  PCI: 00:1c.0: enabled 0

  720 12:51:52.511455  PCI: 00:1c.1: enabled 0

  721 12:51:52.514554  PCI: 00:1c.2: enabled 0

  722 12:51:52.514642  PCI: 00:1c.3: enabled 0

  723 12:51:52.517640  PCI: 00:1c.4: enabled 0

  724 12:51:52.521158  PCI: 00:1c.5: enabled 0

  725 12:51:52.524529  PCI: 00:1c.6: enabled 0

  726 12:51:52.524617  PCI: 00:1c.7: enabled 0

  727 12:51:52.527409  PCI: 00:1d.0: enabled 1

  728 12:51:52.531088  PCI: 00:1d.1: enabled 0

  729 12:51:52.533991  PCI: 00:1d.2: enabled 0

  730 12:51:52.534079  PCI: 00:1d.3: enabled 0

  731 12:51:52.537425  PCI: 00:1d.4: enabled 0

  732 12:51:52.540751  PCI: 00:1d.5: enabled 1

  733 12:51:52.544126  PCI: 00:1e.0: enabled 1

  734 12:51:52.544214  PCI: 00:1e.1: enabled 0

  735 12:51:52.547395  PCI: 00:1e.2: enabled 1

  736 12:51:52.550422  PCI: 00:1e.3: enabled 1

  737 12:51:52.553629  PCI: 00:1f.0: enabled 1

  738 12:51:52.553727  PCI: 00:1f.1: enabled 1

  739 12:51:52.556933  PCI: 00:1f.2: enabled 1

  740 12:51:52.560438  PCI: 00:1f.3: enabled 1

  741 12:51:52.563593  PCI: 00:1f.4: enabled 1

  742 12:51:52.563680  PCI: 00:1f.5: enabled 1

  743 12:51:52.566836  PCI: 00:1f.6: enabled 0

  744 12:51:52.570130  USB0 port 0: enabled 1

  745 12:51:52.570218  I2C: 00:15: enabled 1

  746 12:51:52.573468  I2C: 00:5d: enabled 1

  747 12:51:52.576466  GENERIC: 0.0: enabled 1

  748 12:51:52.579914  I2C: 00:1a: enabled 1

  749 12:51:52.580001  I2C: 00:38: enabled 1

  750 12:51:52.583160  I2C: 00:39: enabled 1

  751 12:51:52.586157  I2C: 00:3a: enabled 1

  752 12:51:52.586244  I2C: 00:3b: enabled 1

  753 12:51:52.589509  PCI: 00:00.0: enabled 1

  754 12:51:52.592904  SPI: 00: enabled 1

  755 12:51:52.593008  SPI: 01: enabled 1

  756 12:51:52.596276  PNP: 0c09.0: enabled 1

  757 12:51:52.599444  USB2 port 0: enabled 1

  758 12:51:52.599532  USB2 port 1: enabled 1

  759 12:51:52.602573  USB2 port 2: enabled 0

  760 12:51:52.606024  USB2 port 3: enabled 0

  761 12:51:52.606110  USB2 port 5: enabled 0

  762 12:51:52.609193  USB2 port 6: enabled 1

  763 12:51:52.612434  USB2 port 9: enabled 1

  764 12:51:52.615764  USB3 port 0: enabled 1

  765 12:51:52.615851  USB3 port 1: enabled 1

  766 12:51:52.619150  USB3 port 2: enabled 1

  767 12:51:52.622299  USB3 port 3: enabled 1

  768 12:51:52.622386  USB3 port 4: enabled 0

  769 12:51:52.625643  APIC: 01: enabled 1

  770 12:51:52.628724  APIC: 07: enabled 1

  771 12:51:52.628811  APIC: 03: enabled 1

  772 12:51:52.632033  APIC: 06: enabled 1

  773 12:51:52.635326  APIC: 02: enabled 1

  774 12:51:52.635413  APIC: 04: enabled 1

  775 12:51:52.638752  APIC: 05: enabled 1

  776 12:51:52.642094  Compare with tree...

  777 12:51:52.642180  Root Device: enabled 1

  778 12:51:52.644968   CPU_CLUSTER: 0: enabled 1

  779 12:51:52.648292    APIC: 00: enabled 1

  780 12:51:52.648377    APIC: 01: enabled 1

  781 12:51:52.651637    APIC: 07: enabled 1

  782 12:51:52.654784    APIC: 03: enabled 1

  783 12:51:52.658069    APIC: 06: enabled 1

  784 12:51:52.658154    APIC: 02: enabled 1

  785 12:51:52.661375    APIC: 04: enabled 1

  786 12:51:52.664883    APIC: 05: enabled 1

  787 12:51:52.664969   DOMAIN: 0000: enabled 1

  788 12:51:52.668061    PCI: 00:00.0: enabled 1

  789 12:51:52.671198    PCI: 00:02.0: enabled 1

  790 12:51:52.674463    PCI: 00:04.0: enabled 0

  791 12:51:52.677680    PCI: 00:05.0: enabled 0

  792 12:51:52.677805    PCI: 00:12.0: enabled 1

  793 12:51:52.681103    PCI: 00:12.5: enabled 0

  794 12:51:52.684254    PCI: 00:12.6: enabled 0

  795 12:51:52.687572    PCI: 00:14.0: enabled 1

  796 12:51:52.690880     USB0 port 0: enabled 1

  797 12:51:52.690966      USB2 port 0: enabled 1

  798 12:51:52.693655      USB2 port 1: enabled 1

  799 12:51:52.697086      USB2 port 2: enabled 0

  800 12:51:52.700435      USB2 port 3: enabled 0

  801 12:51:52.703607      USB2 port 5: enabled 0

  802 12:51:52.706779      USB2 port 6: enabled 1

  803 12:51:52.706869      USB2 port 9: enabled 1

  804 12:51:52.710034      USB3 port 0: enabled 1

  805 12:51:52.713498      USB3 port 1: enabled 1

  806 12:51:52.716810      USB3 port 2: enabled 1

  807 12:51:52.720298      USB3 port 3: enabled 1

  808 12:51:52.723434      USB3 port 4: enabled 0

  809 12:51:52.723523    PCI: 00:14.1: enabled 0

  810 12:51:52.726551    PCI: 00:14.3: enabled 1

  811 12:51:52.729858    PCI: 00:14.5: enabled 0

  812 12:51:52.733180    PCI: 00:15.0: enabled 1

  813 12:51:52.736391     I2C: 00:15: enabled 1

  814 12:51:52.736478    PCI: 00:15.1: enabled 1

  815 12:51:52.739679     I2C: 00:5d: enabled 1

  816 12:51:52.742713     GENERIC: 0.0: enabled 1

  817 12:51:52.746120    PCI: 00:15.2: enabled 0

  818 12:51:52.749535    PCI: 00:15.3: enabled 0

  819 12:51:52.749621    PCI: 00:16.0: enabled 1

  820 12:51:52.752883    PCI: 00:16.1: enabled 0

  821 12:51:52.756043    PCI: 00:16.2: enabled 0

  822 12:51:52.759239    PCI: 00:16.3: enabled 0

  823 12:51:52.762512    PCI: 00:16.4: enabled 0

  824 12:51:52.762599    PCI: 00:16.5: enabled 0

  825 12:51:52.765917    PCI: 00:17.0: enabled 1

  826 12:51:52.769243    PCI: 00:19.0: enabled 1

  827 12:51:52.772199     I2C: 00:1a: enabled 1

  828 12:51:52.775730     I2C: 00:38: enabled 1

  829 12:51:52.775818     I2C: 00:39: enabled 1

  830 12:51:52.778996     I2C: 00:3a: enabled 1

  831 12:51:52.781992     I2C: 00:3b: enabled 1

  832 12:51:52.785616    PCI: 00:19.1: enabled 0

  833 12:51:52.788654    PCI: 00:19.2: enabled 0

  834 12:51:52.788745    PCI: 00:1a.0: enabled 0

  835 12:51:52.791845    PCI: 00:1c.0: enabled 0

  836 12:51:52.795180    PCI: 00:1c.1: enabled 0

  837 12:51:52.798584    PCI: 00:1c.2: enabled 0

  838 12:51:52.801926    PCI: 00:1c.3: enabled 0

  839 12:51:52.802013    PCI: 00:1c.4: enabled 0

  840 12:51:52.805242    PCI: 00:1c.5: enabled 0

  841 12:51:52.808301    PCI: 00:1c.6: enabled 0

  842 12:51:52.811682    PCI: 00:1c.7: enabled 0

  843 12:51:52.814583    PCI: 00:1d.0: enabled 1

  844 12:51:52.814709    PCI: 00:1d.1: enabled 0

  845 12:51:52.818077    PCI: 00:1d.2: enabled 0

  846 12:51:52.821265    PCI: 00:1d.3: enabled 0

  847 12:51:52.824657    PCI: 00:1d.4: enabled 0

  848 12:51:52.827550    PCI: 00:1d.5: enabled 1

  849 12:51:52.827637     PCI: 00:00.0: enabled 1

  850 12:51:52.831108    PCI: 00:1e.0: enabled 1

  851 12:51:52.834252    PCI: 00:1e.1: enabled 0

  852 12:51:52.837409    PCI: 00:1e.2: enabled 1

  853 12:51:52.840727     SPI: 00: enabled 1

  854 12:51:52.840814    PCI: 00:1e.3: enabled 1

  855 12:51:52.844144     SPI: 01: enabled 1

  856 12:51:52.847401    PCI: 00:1f.0: enabled 1

  857 12:51:52.850804     PNP: 0c09.0: enabled 1

  858 12:51:52.850892    PCI: 00:1f.1: enabled 1

  859 12:51:52.853776    PCI: 00:1f.2: enabled 1

  860 12:51:52.857038    PCI: 00:1f.3: enabled 1

  861 12:51:52.860390    PCI: 00:1f.4: enabled 1

  862 12:51:52.863581    PCI: 00:1f.5: enabled 1

  863 12:51:52.863667    PCI: 00:1f.6: enabled 0

  864 12:51:52.866980  Root Device scanning...

  865 12:51:52.870231  scan_static_bus for Root Device

  866 12:51:52.873530  CPU_CLUSTER: 0 enabled

  867 12:51:52.876820  DOMAIN: 0000 enabled

  868 12:51:52.876907  DOMAIN: 0000 scanning...

  869 12:51:52.880271  PCI: pci_scan_bus for bus 00

  870 12:51:52.883548  PCI: 00:00.0 [8086/0000] ops

  871 12:51:52.886855  PCI: 00:00.0 [8086/9b61] enabled

  872 12:51:52.890082  PCI: 00:02.0 [8086/0000] bus ops

  873 12:51:52.893242  PCI: 00:02.0 [8086/9b41] enabled

  874 12:51:52.896338  PCI: 00:04.0 [8086/1903] disabled

  875 12:51:52.899650  PCI: 00:08.0 [8086/1911] enabled

  876 12:51:52.903133  PCI: 00:12.0 [8086/02f9] enabled

  877 12:51:52.909296  PCI: 00:14.0 [8086/0000] bus ops

  878 12:51:52.912852  PCI: 00:14.0 [8086/02ed] enabled

  879 12:51:52.916164  PCI: 00:14.2 [8086/02ef] enabled

  880 12:51:52.919499  PCI: 00:14.3 [8086/02f0] enabled

  881 12:51:52.922757  PCI: 00:15.0 [8086/0000] bus ops

  882 12:51:52.926027  PCI: 00:15.0 [8086/02e8] enabled

  883 12:51:52.929249  PCI: 00:15.1 [8086/0000] bus ops

  884 12:51:52.932597  PCI: 00:15.1 [8086/02e9] enabled

  885 12:51:52.932684  PCI: 00:16.0 [8086/0000] ops

  886 12:51:52.935666  PCI: 00:16.0 [8086/02e0] enabled

  887 12:51:52.939115  PCI: 00:17.0 [8086/0000] ops

  888 12:51:52.942283  PCI: 00:17.0 [8086/02d3] enabled

  889 12:51:52.945707  PCI: 00:19.0 [8086/0000] bus ops

  890 12:51:52.948677  PCI: 00:19.0 [8086/02c5] enabled

  891 12:51:52.952104  PCI: 00:1d.0 [8086/0000] bus ops

  892 12:51:52.955201  PCI: 00:1d.0 [8086/02b0] enabled

  893 12:51:52.962042  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  894 12:51:52.965374  PCI: 00:1e.0 [8086/0000] ops

  895 12:51:52.968596  PCI: 00:1e.0 [8086/02a8] enabled

  896 12:51:52.971927  PCI: 00:1e.2 [8086/0000] bus ops

  897 12:51:52.975061  PCI: 00:1e.2 [8086/02aa] enabled

  898 12:51:52.978443  PCI: 00:1e.3 [8086/0000] bus ops

  899 12:51:52.981374  PCI: 00:1e.3 [8086/02ab] enabled

  900 12:51:52.984929  PCI: 00:1f.0 [8086/0000] bus ops

  901 12:51:52.988240  PCI: 00:1f.0 [8086/0284] enabled

  902 12:51:52.994418  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  903 12:51:53.001214  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  904 12:51:53.004270  PCI: 00:1f.3 [8086/0000] bus ops

  905 12:51:53.007527  PCI: 00:1f.3 [8086/02c8] enabled

  906 12:51:53.010836  PCI: 00:1f.4 [8086/0000] bus ops

  907 12:51:53.014085  PCI: 00:1f.4 [8086/02a3] enabled

  908 12:51:53.017287  PCI: 00:1f.5 [8086/0000] bus ops

  909 12:51:53.020549  PCI: 00:1f.5 [8086/02a4] enabled

  910 12:51:53.024025  PCI: Leftover static devices:

  911 12:51:53.024113  PCI: 00:05.0

  912 12:51:53.027313  PCI: 00:12.5

  913 12:51:53.027401  PCI: 00:12.6

  914 12:51:53.027469  PCI: 00:14.1

  915 12:51:53.030632  PCI: 00:14.5

  916 12:51:53.030723  PCI: 00:15.2

  917 12:51:53.033636  PCI: 00:15.3

  918 12:51:53.033766  PCI: 00:16.1

  919 12:51:53.033837  PCI: 00:16.2

  920 12:51:53.037051  PCI: 00:16.3

  921 12:51:53.037139  PCI: 00:16.4

  922 12:51:53.040105  PCI: 00:16.5

  923 12:51:53.040192  PCI: 00:19.1

  924 12:51:53.043432  PCI: 00:19.2

  925 12:51:53.043519  PCI: 00:1a.0

  926 12:51:53.043589  PCI: 00:1c.0

  927 12:51:53.046882  PCI: 00:1c.1

  928 12:51:53.046969  PCI: 00:1c.2

  929 12:51:53.050026  PCI: 00:1c.3

  930 12:51:53.050112  PCI: 00:1c.4

  931 12:51:53.050181  PCI: 00:1c.5

  932 12:51:53.053297  PCI: 00:1c.6

  933 12:51:53.053384  PCI: 00:1c.7

  934 12:51:53.056626  PCI: 00:1d.1

  935 12:51:53.056713  PCI: 00:1d.2

  936 12:51:53.059726  PCI: 00:1d.3

  937 12:51:53.059812  PCI: 00:1d.4

  938 12:51:53.059882  PCI: 00:1d.5

  939 12:51:53.063068  PCI: 00:1e.1

  940 12:51:53.063155  PCI: 00:1f.1

  941 12:51:53.066528  PCI: 00:1f.2

  942 12:51:53.066615  PCI: 00:1f.6

  943 12:51:53.069843  PCI: Check your devicetree.cb.

  944 12:51:53.073008  PCI: 00:02.0 scanning...

  945 12:51:53.076265  scan_generic_bus for PCI: 00:02.0

  946 12:51:53.079231  scan_generic_bus for PCI: 00:02.0 done

  947 12:51:53.086019  scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs

  948 12:51:53.089315  PCI: 00:14.0 scanning...

  949 12:51:53.092623  scan_static_bus for PCI: 00:14.0

  950 12:51:53.092711  USB0 port 0 enabled

  951 12:51:53.096003  USB0 port 0 scanning...

  952 12:51:53.098899  scan_static_bus for USB0 port 0

  953 12:51:53.102209  USB2 port 0 enabled

  954 12:51:53.102304  USB2 port 1 enabled

  955 12:51:53.105420  USB2 port 2 disabled

  956 12:51:53.108756  USB2 port 3 disabled

  957 12:51:53.108849  USB2 port 5 disabled

  958 12:51:53.112151  USB2 port 6 enabled

  959 12:51:53.115480  USB2 port 9 enabled

  960 12:51:53.115570  USB3 port 0 enabled

  961 12:51:53.118443  USB3 port 1 enabled

  962 12:51:53.121917  USB3 port 2 enabled

  963 12:51:53.122010  USB3 port 3 enabled

  964 12:51:53.125239  USB3 port 4 disabled

  965 12:51:53.128582  USB2 port 0 scanning...

  966 12:51:53.131506  scan_static_bus for USB2 port 0

  967 12:51:53.134799  scan_static_bus for USB2 port 0 done

  968 12:51:53.138271  scan_bus: scanning of bus USB2 port 0 took 9700 usecs

  969 12:51:53.141419  USB2 port 1 scanning...

  970 12:51:53.144883  scan_static_bus for USB2 port 1

  971 12:51:53.147812  scan_static_bus for USB2 port 1 done

  972 12:51:53.154606  scan_bus: scanning of bus USB2 port 1 took 9686 usecs

  973 12:51:53.157924  USB2 port 6 scanning...

  974 12:51:53.160990  scan_static_bus for USB2 port 6

  975 12:51:53.164386  scan_static_bus for USB2 port 6 done

  976 12:51:53.170695  scan_bus: scanning of bus USB2 port 6 took 9700 usecs

  977 12:51:53.170791  USB2 port 9 scanning...

  978 12:51:53.174083  scan_static_bus for USB2 port 9

  979 12:51:53.180684  scan_static_bus for USB2 port 9 done

  980 12:51:53.184099  scan_bus: scanning of bus USB2 port 9 took 9702 usecs

  981 12:51:53.187389  USB3 port 0 scanning...

  982 12:51:53.190347  scan_static_bus for USB3 port 0

  983 12:51:53.193913  scan_static_bus for USB3 port 0 done

  984 12:51:53.200172  scan_bus: scanning of bus USB3 port 0 took 9691 usecs

  985 12:51:53.200272  USB3 port 1 scanning...

  986 12:51:53.203906  scan_static_bus for USB3 port 1

  987 12:51:53.210382  scan_static_bus for USB3 port 1 done

  988 12:51:53.213593  scan_bus: scanning of bus USB3 port 1 took 9701 usecs

  989 12:51:53.217021  USB3 port 2 scanning...

  990 12:51:53.220033  scan_static_bus for USB3 port 2

  991 12:51:53.223227  scan_static_bus for USB3 port 2 done

  992 12:51:53.229666  scan_bus: scanning of bus USB3 port 2 took 9690 usecs

  993 12:51:53.233037  USB3 port 3 scanning...

  994 12:51:53.236410  scan_static_bus for USB3 port 3

  995 12:51:53.239722  scan_static_bus for USB3 port 3 done

  996 12:51:53.243010  scan_bus: scanning of bus USB3 port 3 took 9693 usecs

  997 12:51:53.249593  scan_static_bus for USB0 port 0 done

  998 12:51:53.252999  scan_bus: scanning of bus USB0 port 0 took 155295 usecs

  999 12:51:53.255951  scan_static_bus for PCI: 00:14.0 done

 1000 12:51:53.262325  scan_bus: scanning of bus PCI: 00:14.0 took 172908 usecs

 1001 12:51:53.265851  PCI: 00:15.0 scanning...

 1002 12:51:53.269024  scan_generic_bus for PCI: 00:15.0

 1003 12:51:53.272273  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1004 12:51:53.278535  scan_generic_bus for PCI: 00:15.0 done

 1005 12:51:53.281836  scan_bus: scanning of bus PCI: 00:15.0 took 14281 usecs

 1006 12:51:53.285288  PCI: 00:15.1 scanning...

 1007 12:51:53.288622  scan_generic_bus for PCI: 00:15.1

 1008 12:51:53.291645  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1009 12:51:53.298181  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1010 12:51:53.301474  scan_generic_bus for PCI: 00:15.1 done

 1011 12:51:53.308250  scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs

 1012 12:51:53.308347  PCI: 00:19.0 scanning...

 1013 12:51:53.311469  scan_generic_bus for PCI: 00:19.0

 1014 12:51:53.317911  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1015 12:51:53.321300  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1016 12:51:53.324772  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1017 12:51:53.328022  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1018 12:51:53.334447  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1019 12:51:53.337497  scan_generic_bus for PCI: 00:19.0 done

 1020 12:51:53.344299  scan_bus: scanning of bus PCI: 00:19.0 took 30711 usecs

 1021 12:51:53.344393  PCI: 00:1d.0 scanning...

 1022 12:51:53.350810  do_pci_scan_bridge for PCI: 00:1d.0

 1023 12:51:53.350901  PCI: pci_scan_bus for bus 01

 1024 12:51:53.353925  PCI: 01:00.0 [1c5c/1327] enabled

 1025 12:51:53.360877  Enabling Common Clock Configuration

 1026 12:51:53.364412  L1 Sub-State supported from root port 29

 1027 12:51:53.367407  L1 Sub-State Support = 0xf

 1028 12:51:53.370776  CommonModeRestoreTime = 0x28

 1029 12:51:53.373929  Power On Value = 0x16, Power On Scale = 0x0

 1030 12:51:53.374019  ASPM: Enabled L1

 1031 12:51:53.380341  scan_bus: scanning of bus PCI: 00:1d.0 took 32763 usecs

 1032 12:51:53.383717  PCI: 00:1e.2 scanning...

 1033 12:51:53.387235  scan_generic_bus for PCI: 00:1e.2

 1034 12:51:53.390301  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1035 12:51:53.393630  scan_generic_bus for PCI: 00:1e.2 done

 1036 12:51:53.400271  scan_bus: scanning of bus PCI: 00:1e.2 took 13982 usecs

 1037 12:51:53.403332  PCI: 00:1e.3 scanning...

 1038 12:51:53.406399  scan_generic_bus for PCI: 00:1e.3

 1039 12:51:53.409665  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1040 12:51:53.413125  scan_generic_bus for PCI: 00:1e.3 done

 1041 12:51:53.419797  scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs

 1042 12:51:53.422799  PCI: 00:1f.0 scanning...

 1043 12:51:53.426449  scan_static_bus for PCI: 00:1f.0

 1044 12:51:53.429306  PNP: 0c09.0 enabled

 1045 12:51:53.432456  scan_static_bus for PCI: 00:1f.0 done

 1046 12:51:53.436101  scan_bus: scanning of bus PCI: 00:1f.0 took 12031 usecs

 1047 12:51:53.439184  PCI: 00:1f.3 scanning...

 1048 12:51:53.445928  scan_bus: scanning of bus PCI: 00:1f.3 took 2849 usecs

 1049 12:51:53.448857  PCI: 00:1f.4 scanning...

 1050 12:51:53.452220  scan_generic_bus for PCI: 00:1f.4

 1051 12:51:53.455630  scan_generic_bus for PCI: 00:1f.4 done

 1052 12:51:53.462139  scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs

 1053 12:51:53.465096  PCI: 00:1f.5 scanning...

 1054 12:51:53.468559  scan_generic_bus for PCI: 00:1f.5

 1055 12:51:53.471815  scan_generic_bus for PCI: 00:1f.5 done

 1056 12:51:53.478131  scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs

 1057 12:51:53.481540  scan_bus: scanning of bus DOMAIN: 0000 took 604662 usecs

 1058 12:51:53.488020  scan_static_bus for Root Device done

 1059 12:51:53.491182  scan_bus: scanning of bus Root Device took 624515 usecs

 1060 12:51:53.494346  done

 1061 12:51:53.494435  Chrome EC: UHEPI supported

 1062 12:51:53.501095  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1063 12:51:53.507786  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1064 12:51:53.514247  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1065 12:51:53.520632  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1066 12:51:53.524190  SPI flash protection: WPSW=0 SRP0=0

 1067 12:51:53.530633  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1068 12:51:53.534016  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1069 12:51:53.537199  found VGA at PCI: 00:02.0

 1070 12:51:53.540406  Setting up VGA for PCI: 00:02.0

 1071 12:51:53.547056  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1072 12:51:53.550021  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1073 12:51:53.553647  Allocating resources...

 1074 12:51:53.556644  Reading resources...

 1075 12:51:53.560036  Root Device read_resources bus 0 link: 0

 1076 12:51:53.563161  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1077 12:51:53.569899  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1078 12:51:53.573250  DOMAIN: 0000 read_resources bus 0 link: 0

 1079 12:51:53.580476  PCI: 00:14.0 read_resources bus 0 link: 0

 1080 12:51:53.583743  USB0 port 0 read_resources bus 0 link: 0

 1081 12:51:53.591782  USB0 port 0 read_resources bus 0 link: 0 done

 1082 12:51:53.595204  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1083 12:51:53.602425  PCI: 00:15.0 read_resources bus 1 link: 0

 1084 12:51:53.605521  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1085 12:51:53.612483  PCI: 00:15.1 read_resources bus 2 link: 0

 1086 12:51:53.615611  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1087 12:51:53.623011  PCI: 00:19.0 read_resources bus 3 link: 0

 1088 12:51:53.629841  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1089 12:51:53.632753  PCI: 00:1d.0 read_resources bus 1 link: 0

 1090 12:51:53.639370  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1091 12:51:53.642863  PCI: 00:1e.2 read_resources bus 4 link: 0

 1092 12:51:53.649584  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1093 12:51:53.652506  PCI: 00:1e.3 read_resources bus 5 link: 0

 1094 12:51:53.659167  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1095 12:51:53.662632  PCI: 00:1f.0 read_resources bus 0 link: 0

 1096 12:51:53.669133  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1097 12:51:53.675663  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1098 12:51:53.678615  Root Device read_resources bus 0 link: 0 done

 1099 12:51:53.681995  Done reading resources.

 1100 12:51:53.688802  Show resources in subtree (Root Device)...After reading.

 1101 12:51:53.691951   Root Device child on link 0 CPU_CLUSTER: 0

 1102 12:51:53.695175    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1103 12:51:53.698263     APIC: 00

 1104 12:51:53.698358     APIC: 01

 1105 12:51:53.701542     APIC: 07

 1106 12:51:53.701630     APIC: 03

 1107 12:51:53.701720     APIC: 06

 1108 12:51:53.704779     APIC: 02

 1109 12:51:53.704867     APIC: 04

 1110 12:51:53.704937     APIC: 05

 1111 12:51:53.711590    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1112 12:51:53.761336    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1113 12:51:53.761746    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1114 12:51:53.761844     PCI: 00:00.0

 1115 12:51:53.762145     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1116 12:51:53.762429     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1117 12:51:53.762679     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1118 12:51:53.811059     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1119 12:51:53.811499     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1120 12:51:53.811596     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1121 12:51:53.811697     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1122 12:51:53.811979     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1123 12:51:53.860611     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1124 12:51:53.860768     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1125 12:51:53.861069     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1126 12:51:53.861323     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1127 12:51:53.861602     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1128 12:51:53.869671     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1129 12:51:53.873133     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1130 12:51:53.882792     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1131 12:51:53.882906     PCI: 00:02.0

 1132 12:51:53.892659     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1133 12:51:53.902261     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1134 12:51:53.912267     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1135 12:51:53.912387     PCI: 00:04.0

 1136 12:51:53.915619     PCI: 00:08.0

 1137 12:51:53.925605     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1138 12:51:53.925756     PCI: 00:12.0

 1139 12:51:53.935158     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1140 12:51:53.941609     PCI: 00:14.0 child on link 0 USB0 port 0

 1141 12:51:53.951446     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1142 12:51:53.954902      USB0 port 0 child on link 0 USB2 port 0

 1143 12:51:53.958224       USB2 port 0

 1144 12:51:53.958317       USB2 port 1

 1145 12:51:53.961541       USB2 port 2

 1146 12:51:53.961630       USB2 port 3

 1147 12:51:53.964553       USB2 port 5

 1148 12:51:53.964641       USB2 port 6

 1149 12:51:53.967577       USB2 port 9

 1150 12:51:53.970978       USB3 port 0

 1151 12:51:53.971067       USB3 port 1

 1152 12:51:53.974378       USB3 port 2

 1153 12:51:53.974467       USB3 port 3

 1154 12:51:53.977476       USB3 port 4

 1155 12:51:53.977567     PCI: 00:14.2

 1156 12:51:53.987171     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1157 12:51:53.997200     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1158 12:51:54.000385     PCI: 00:14.3

 1159 12:51:54.009973     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1160 12:51:54.013338     PCI: 00:15.0 child on link 0 I2C: 01:15

 1161 12:51:54.023056     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1162 12:51:54.026336      I2C: 01:15

 1163 12:51:54.029825     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1164 12:51:54.039540     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 12:51:54.039638      I2C: 02:5d

 1166 12:51:54.042618      GENERIC: 0.0

 1167 12:51:54.046020     PCI: 00:16.0

 1168 12:51:54.056069     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1169 12:51:54.056173     PCI: 00:17.0

 1170 12:51:54.065603     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1171 12:51:54.075594     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1172 12:51:54.082059     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1173 12:51:54.091730     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1174 12:51:54.098254     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1175 12:51:54.108386     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1176 12:51:54.111549     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1177 12:51:54.121322     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1178 12:51:54.124645      I2C: 03:1a

 1179 12:51:54.124737      I2C: 03:38

 1180 12:51:54.128106      I2C: 03:39

 1181 12:51:54.128193      I2C: 03:3a

 1182 12:51:54.131038      I2C: 03:3b

 1183 12:51:54.134345     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1184 12:51:54.144225     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1185 12:51:54.154035     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1186 12:51:54.160535     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1187 12:51:54.163818      PCI: 01:00.0

 1188 12:51:54.173562      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1189 12:51:54.176949     PCI: 00:1e.0

 1190 12:51:54.186677     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1191 12:51:54.196611     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1192 12:51:54.199886     PCI: 00:1e.2 child on link 0 SPI: 00

 1193 12:51:54.209832     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 12:51:54.213121      SPI: 00

 1195 12:51:54.216318     PCI: 00:1e.3 child on link 0 SPI: 01

 1196 12:51:54.226154     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 12:51:54.226252      SPI: 01

 1198 12:51:54.232451     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1199 12:51:54.239152     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1200 12:51:54.248659     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1201 12:51:54.248757      PNP: 0c09.0

 1202 12:51:54.258639      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1203 12:51:54.261661     PCI: 00:1f.3

 1204 12:51:54.271603     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 12:51:54.281306     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1206 12:51:54.281411     PCI: 00:1f.4

 1207 12:51:54.291368     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1208 12:51:54.300864     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1209 12:51:54.303935     PCI: 00:1f.5

 1210 12:51:54.310523     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1211 12:51:54.317145  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1212 12:51:54.323644  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1213 12:51:54.330079  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1214 12:51:54.333451  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1215 12:51:54.340135  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1216 12:51:54.343159  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1217 12:51:54.346693  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1218 12:51:54.353277  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1219 12:51:54.359417  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1220 12:51:54.365969  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1221 12:51:54.375719  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1222 12:51:54.382445  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1223 12:51:54.385557  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1224 12:51:54.395192  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1225 12:51:54.398777  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1226 12:51:54.405069  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1227 12:51:54.408269  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1228 12:51:54.411554  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1229 12:51:54.418245  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1230 12:51:54.421631  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1231 12:51:54.428235  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1232 12:51:54.431213  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1233 12:51:54.438016  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1234 12:51:54.441265  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1235 12:51:54.447578  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1236 12:51:54.451009  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1237 12:51:54.457320  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1238 12:51:54.460550  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1239 12:51:54.467342  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1240 12:51:54.470512  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1241 12:51:54.477011  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1242 12:51:54.480345  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1243 12:51:54.486909  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1244 12:51:54.490266  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1245 12:51:54.496757  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1246 12:51:54.500070  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1247 12:51:54.506492  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1248 12:51:54.513271  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1249 12:51:54.516275  avoid_fixed_resources: DOMAIN: 0000

 1250 12:51:54.522822  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1251 12:51:54.529252  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1252 12:51:54.536052  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1253 12:51:54.545638  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1254 12:51:54.552159  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1255 12:51:54.558622  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1256 12:51:54.568320  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1257 12:51:54.575134  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1258 12:51:54.581398  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1259 12:51:54.591288  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1260 12:51:54.597919  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1261 12:51:54.604167  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1262 12:51:54.607538  Setting resources...

 1263 12:51:54.614021  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1264 12:51:54.617452  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1265 12:51:54.620663  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1266 12:51:54.627207  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1267 12:51:54.630159  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1268 12:51:54.636999  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1269 12:51:54.643223  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1270 12:51:54.649801  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1271 12:51:54.656387  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1272 12:51:54.659797  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1273 12:51:54.666424  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1274 12:51:54.669425  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1275 12:51:54.676077  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1276 12:51:54.679578  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1277 12:51:54.686114  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1278 12:51:54.689190  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1279 12:51:54.695944  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1280 12:51:54.699056  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1281 12:51:54.705689  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1282 12:51:54.708814  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1283 12:51:54.715394  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1284 12:51:54.718795  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1285 12:51:54.725390  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1286 12:51:54.728474  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1287 12:51:54.734944  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1288 12:51:54.738243  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1289 12:51:54.744738  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1290 12:51:54.747788  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1291 12:51:54.754673  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1292 12:51:54.757632  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1293 12:51:54.764302  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1294 12:51:54.767742  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1295 12:51:54.774092  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1296 12:51:54.783821  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1297 12:51:54.790540  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1298 12:51:54.797122  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1299 12:51:54.803428  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1300 12:51:54.810057  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1301 12:51:54.813159  Root Device assign_resources, bus 0 link: 0

 1302 12:51:54.819705  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1303 12:51:54.826313  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1304 12:51:54.836246  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1305 12:51:54.842787  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1306 12:51:54.852390  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1307 12:51:54.858974  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1308 12:51:54.868870  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1309 12:51:54.871970  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 12:51:54.878660  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1311 12:51:54.884954  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1312 12:51:54.894976  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1313 12:51:54.901337  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1314 12:51:54.911220  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1315 12:51:54.914515  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 12:51:54.921039  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1317 12:51:54.927443  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1318 12:51:54.933912  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 12:51:54.936945  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1320 12:51:54.947245  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1321 12:51:54.953615  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1322 12:51:54.960344  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1323 12:51:54.970056  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1324 12:51:54.976390  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1325 12:51:54.983106  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1326 12:51:54.993019  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1327 12:51:54.999448  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1328 12:51:55.006007  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 12:51:55.009234  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1330 12:51:55.019034  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1331 12:51:55.028826  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1332 12:51:55.035091  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1333 12:51:55.041793  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1334 12:51:55.048333  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1335 12:51:55.054854  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1336 12:51:55.061392  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1337 12:51:55.070896  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1338 12:51:55.074450  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 12:51:55.077526  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1340 12:51:55.087572  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1341 12:51:55.090780  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 12:51:55.097229  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1343 12:51:55.100792  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 12:51:55.107259  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1345 12:51:55.110514  LPC: Trying to open IO window from 800 size 1ff

 1346 12:51:55.120064  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1347 12:51:55.126551  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1348 12:51:55.136536  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1349 12:51:55.143197  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1350 12:51:55.149629  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1351 12:51:55.152870  Root Device assign_resources, bus 0 link: 0

 1352 12:51:55.156721  Done setting resources.

 1353 12:51:55.162781  Show resources in subtree (Root Device)...After assigning values.

 1354 12:51:55.165860   Root Device child on link 0 CPU_CLUSTER: 0

 1355 12:51:55.172362    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1356 12:51:55.172447     APIC: 00

 1357 12:51:55.172513     APIC: 01

 1358 12:51:55.175623     APIC: 07

 1359 12:51:55.175707     APIC: 03

 1360 12:51:55.175774     APIC: 06

 1361 12:51:55.179014     APIC: 02

 1362 12:51:55.179098     APIC: 04

 1363 12:51:55.182235     APIC: 05

 1364 12:51:55.185672    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1365 12:51:55.195310    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1366 12:51:55.205392    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1367 12:51:55.208409     PCI: 00:00.0

 1368 12:51:55.218448     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1369 12:51:55.228085     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1370 12:51:55.234766     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1371 12:51:55.244214     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1372 12:51:55.254045     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1373 12:51:55.264201     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1374 12:51:55.273690     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1375 12:51:55.283686     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1376 12:51:55.293448     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1377 12:51:55.300169     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1378 12:51:55.309708     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1379 12:51:55.319835     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1380 12:51:55.329418     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1381 12:51:55.339272     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1382 12:51:55.348828     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1383 12:51:55.358907     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1384 12:51:55.358994     PCI: 00:02.0

 1385 12:51:55.368735     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1386 12:51:55.381449     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1387 12:51:55.388035     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1388 12:51:55.391467     PCI: 00:04.0

 1389 12:51:55.394579     PCI: 00:08.0

 1390 12:51:55.404280     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1391 12:51:55.404370     PCI: 00:12.0

 1392 12:51:55.414491     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1393 12:51:55.420675     PCI: 00:14.0 child on link 0 USB0 port 0

 1394 12:51:55.430696     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1395 12:51:55.434062      USB0 port 0 child on link 0 USB2 port 0

 1396 12:51:55.437365       USB2 port 0

 1397 12:51:55.437452       USB2 port 1

 1398 12:51:55.440748       USB2 port 2

 1399 12:51:55.440835       USB2 port 3

 1400 12:51:55.443593       USB2 port 5

 1401 12:51:55.443681       USB2 port 6

 1402 12:51:55.447096       USB2 port 9

 1403 12:51:55.447183       USB3 port 0

 1404 12:51:55.450102       USB3 port 1

 1405 12:51:55.453418       USB3 port 2

 1406 12:51:55.453505       USB3 port 3

 1407 12:51:55.456732       USB3 port 4

 1408 12:51:55.456822     PCI: 00:14.2

 1409 12:51:55.466247     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1410 12:51:55.476309     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1411 12:51:55.479369     PCI: 00:14.3

 1412 12:51:55.489041     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1413 12:51:55.492419     PCI: 00:15.0 child on link 0 I2C: 01:15

 1414 12:51:55.505534     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1415 12:51:55.505626      I2C: 01:15

 1416 12:51:55.508873     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1417 12:51:55.521899     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1418 12:51:55.521987      I2C: 02:5d

 1419 12:51:55.525222      GENERIC: 0.0

 1420 12:51:55.525310     PCI: 00:16.0

 1421 12:51:55.535091     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1422 12:51:55.538423     PCI: 00:17.0

 1423 12:51:55.547870     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1424 12:51:55.557619     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1425 12:51:55.567771     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1426 12:51:55.577186     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1427 12:51:55.583720     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1428 12:51:55.593710     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1429 12:51:55.600234     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1430 12:51:55.610154     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1431 12:51:55.610246      I2C: 03:1a

 1432 12:51:55.613306      I2C: 03:38

 1433 12:51:55.613393      I2C: 03:39

 1434 12:51:55.616467      I2C: 03:3a

 1435 12:51:55.616554      I2C: 03:3b

 1436 12:51:55.623037     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1437 12:51:55.629527     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1438 12:51:55.642562     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1439 12:51:55.652384     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1440 12:51:55.652474      PCI: 01:00.0

 1441 12:51:55.662249      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1442 12:51:55.665547     PCI: 00:1e.0

 1443 12:51:55.675218     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1444 12:51:55.688409     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1445 12:51:55.691523     PCI: 00:1e.2 child on link 0 SPI: 00

 1446 12:51:55.701576     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1447 12:51:55.701683      SPI: 00

 1448 12:51:55.707869     PCI: 00:1e.3 child on link 0 SPI: 01

 1449 12:51:55.717619     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1450 12:51:55.717728      SPI: 01

 1451 12:51:55.720767     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1452 12:51:55.730880     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1453 12:51:55.740658     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1454 12:51:55.740747      PNP: 0c09.0

 1455 12:51:55.750501      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1456 12:51:55.750590     PCI: 00:1f.3

 1457 12:51:55.763385     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1458 12:51:55.773439     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1459 12:51:55.773543     PCI: 00:1f.4

 1460 12:51:55.783177     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1461 12:51:55.792656     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1462 12:51:55.796214     PCI: 00:1f.5

 1463 12:51:55.805899     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1464 12:51:55.809072  Done allocating resources.

 1465 12:51:55.812112  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1466 12:51:55.816005  Enabling resources...

 1467 12:51:55.822157  PCI: 00:00.0 subsystem <- 8086/9b61

 1468 12:51:55.822245  PCI: 00:00.0 cmd <- 06

 1469 12:51:55.825628  PCI: 00:02.0 subsystem <- 8086/9b41

 1470 12:51:55.828654  PCI: 00:02.0 cmd <- 03

 1471 12:51:55.832112  PCI: 00:08.0 cmd <- 06

 1472 12:51:55.835590  PCI: 00:12.0 subsystem <- 8086/02f9

 1473 12:51:55.838860  PCI: 00:12.0 cmd <- 02

 1474 12:51:55.842141  PCI: 00:14.0 subsystem <- 8086/02ed

 1475 12:51:55.845165  PCI: 00:14.0 cmd <- 02

 1476 12:51:55.848603  PCI: 00:14.2 cmd <- 02

 1477 12:51:55.851918  PCI: 00:14.3 subsystem <- 8086/02f0

 1478 12:51:55.854974  PCI: 00:14.3 cmd <- 02

 1479 12:51:55.858394  PCI: 00:15.0 subsystem <- 8086/02e8

 1480 12:51:55.858481  PCI: 00:15.0 cmd <- 02

 1481 12:51:55.865000  PCI: 00:15.1 subsystem <- 8086/02e9

 1482 12:51:55.865088  PCI: 00:15.1 cmd <- 02

 1483 12:51:55.871673  PCI: 00:16.0 subsystem <- 8086/02e0

 1484 12:51:55.871760  PCI: 00:16.0 cmd <- 02

 1485 12:51:55.875165  PCI: 00:17.0 subsystem <- 8086/02d3

 1486 12:51:55.878065  PCI: 00:17.0 cmd <- 03

 1487 12:51:55.881320  PCI: 00:19.0 subsystem <- 8086/02c5

 1488 12:51:55.884571  PCI: 00:19.0 cmd <- 02

 1489 12:51:55.888140  PCI: 00:1d.0 bridge ctrl <- 0013

 1490 12:51:55.891277  PCI: 00:1d.0 subsystem <- 8086/02b0

 1491 12:51:55.894565  PCI: 00:1d.0 cmd <- 06

 1492 12:51:55.897660  PCI: 00:1e.0 subsystem <- 8086/02a8

 1493 12:51:55.900934  PCI: 00:1e.0 cmd <- 06

 1494 12:51:55.904360  PCI: 00:1e.2 subsystem <- 8086/02aa

 1495 12:51:55.907614  PCI: 00:1e.2 cmd <- 06

 1496 12:51:55.911040  PCI: 00:1e.3 subsystem <- 8086/02ab

 1497 12:51:55.914134  PCI: 00:1e.3 cmd <- 02

 1498 12:51:55.917652  PCI: 00:1f.0 subsystem <- 8086/0284

 1499 12:51:55.920690  PCI: 00:1f.0 cmd <- 407

 1500 12:51:55.924093  PCI: 00:1f.3 subsystem <- 8086/02c8

 1501 12:51:55.927091  PCI: 00:1f.3 cmd <- 02

 1502 12:51:55.930402  PCI: 00:1f.4 subsystem <- 8086/02a3

 1503 12:51:55.933998  PCI: 00:1f.4 cmd <- 03

 1504 12:51:55.937077  PCI: 00:1f.5 subsystem <- 8086/02a4

 1505 12:51:55.937164  PCI: 00:1f.5 cmd <- 406

 1506 12:51:55.947257  PCI: 01:00.0 cmd <- 02

 1507 12:51:55.952726  done.

 1508 12:51:55.962228  ME: Version: 14.0.39.1367

 1509 12:51:55.968665  BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 9

 1510 12:51:55.972061  Initializing devices...

 1511 12:51:55.972149  Root Device init ...

 1512 12:51:55.978465  Chrome EC: Set SMI mask to 0x0000000000000000

 1513 12:51:55.981932  Chrome EC: clear events_b mask to 0x0000000000000000

 1514 12:51:55.988869  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1515 12:51:55.995146  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1516 12:51:56.001411  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1517 12:51:56.004900  Chrome EC: Set WAKE mask to 0x0000000000000000

 1518 12:51:56.011465  Root Device init finished in 35192 usecs

 1519 12:51:56.011556  CPU_CLUSTER: 0 init ...

 1520 12:51:56.017966  CPU_CLUSTER: 0 init finished in 2446 usecs

 1521 12:51:56.022744  PCI: 00:00.0 init ...

 1522 12:51:56.026144  CPU TDP: 15 Watts

 1523 12:51:56.029271  CPU PL2 = 64 Watts

 1524 12:51:56.032876  PCI: 00:00.0 init finished in 7077 usecs

 1525 12:51:56.036121  PCI: 00:02.0 init ...

 1526 12:51:56.039398  PCI: 00:02.0 init finished in 2251 usecs

 1527 12:51:56.042634  PCI: 00:08.0 init ...

 1528 12:51:56.045864  PCI: 00:08.0 init finished in 2251 usecs

 1529 12:51:56.049026  PCI: 00:12.0 init ...

 1530 12:51:56.052395  PCI: 00:12.0 init finished in 2249 usecs

 1531 12:51:56.055801  PCI: 00:14.0 init ...

 1532 12:51:56.058840  PCI: 00:14.0 init finished in 2242 usecs

 1533 12:51:56.062218  PCI: 00:14.2 init ...

 1534 12:51:56.065628  PCI: 00:14.2 init finished in 2250 usecs

 1535 12:51:56.068815  PCI: 00:14.3 init ...

 1536 12:51:56.071693  PCI: 00:14.3 init finished in 2269 usecs

 1537 12:51:56.075242  PCI: 00:15.0 init ...

 1538 12:51:56.078667  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1539 12:51:56.085066  PCI: 00:15.0 init finished in 5970 usecs

 1540 12:51:56.085154  PCI: 00:15.1 init ...

 1541 12:51:56.091522  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1542 12:51:56.095040  PCI: 00:15.1 init finished in 5970 usecs

 1543 12:51:56.098252  PCI: 00:16.0 init ...

 1544 12:51:56.101182  PCI: 00:16.0 init finished in 2251 usecs

 1545 12:51:56.104746  PCI: 00:19.0 init ...

 1546 12:51:56.107807  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1547 12:51:56.110940  PCI: 00:19.0 init finished in 5975 usecs

 1548 12:51:56.114487  PCI: 00:1d.0 init ...

 1549 12:51:56.117607  Initializing PCH PCIe bridge.

 1550 12:51:56.120699  PCI: 00:1d.0 init finished in 5281 usecs

 1551 12:51:56.124575  PCI: 00:1f.0 init ...

 1552 12:51:56.127922  IOAPIC: Initializing IOAPIC at 0xfec00000

 1553 12:51:56.134300  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1554 12:51:56.134387  IOAPIC: ID = 0x02

 1555 12:51:56.137628  IOAPIC: Dumping registers

 1556 12:51:56.140957    reg 0x0000: 0x02000000

 1557 12:51:56.144396    reg 0x0001: 0x00770020

 1558 12:51:56.147666    reg 0x0002: 0x00000000

 1559 12:51:56.150803  PCI: 00:1f.0 init finished in 23527 usecs

 1560 12:51:56.154041  PCI: 00:1f.4 init ...

 1561 12:51:56.157094  PCI: 00:1f.4 init finished in 2261 usecs

 1562 12:51:56.168689  PCI: 01:00.0 init ...

 1563 12:51:56.172202  PCI: 01:00.0 init finished in 2251 usecs

 1564 12:51:56.176442  PNP: 0c09.0 init ...

 1565 12:51:56.182774  Google Chrome EC uptime: 11.133 seconds

 1566 12:51:56.186415  Google Chrome AP resets since EC boot: 0

 1567 12:51:56.189486  Google Chrome most recent AP reset causes:

 1568 12:51:56.195937  Google Chrome EC reset flags at last EC boot: reset-pin

 1569 12:51:56.199411  PNP: 0c09.0 init finished in 20572 usecs

 1570 12:51:56.202790  Devices initialized

 1571 12:51:56.205875  Show all devs... After init.

 1572 12:51:56.205962  Root Device: enabled 1

 1573 12:51:56.209154  CPU_CLUSTER: 0: enabled 1

 1574 12:51:56.212308  DOMAIN: 0000: enabled 1

 1575 12:51:56.215675  APIC: 00: enabled 1

 1576 12:51:56.215761  PCI: 00:00.0: enabled 1

 1577 12:51:56.218837  PCI: 00:02.0: enabled 1

 1578 12:51:56.222427  PCI: 00:04.0: enabled 0

 1579 12:51:56.222514  PCI: 00:05.0: enabled 0

 1580 12:51:56.225510  PCI: 00:12.0: enabled 1

 1581 12:51:56.228640  PCI: 00:12.5: enabled 0

 1582 12:51:56.232149  PCI: 00:12.6: enabled 0

 1583 12:51:56.232236  PCI: 00:14.0: enabled 1

 1584 12:51:56.235573  PCI: 00:14.1: enabled 0

 1585 12:51:56.238702  PCI: 00:14.3: enabled 1

 1586 12:51:56.242187  PCI: 00:14.5: enabled 0

 1587 12:51:56.242273  PCI: 00:15.0: enabled 1

 1588 12:51:56.245442  PCI: 00:15.1: enabled 1

 1589 12:51:56.248496  PCI: 00:15.2: enabled 0

 1590 12:51:56.251809  PCI: 00:15.3: enabled 0

 1591 12:51:56.251896  PCI: 00:16.0: enabled 1

 1592 12:51:56.254962  PCI: 00:16.1: enabled 0

 1593 12:51:56.258224  PCI: 00:16.2: enabled 0

 1594 12:51:56.261444  PCI: 00:16.3: enabled 0

 1595 12:51:56.261531  PCI: 00:16.4: enabled 0

 1596 12:51:56.264614  PCI: 00:16.5: enabled 0

 1597 12:51:56.268009  PCI: 00:17.0: enabled 1

 1598 12:51:56.271519  PCI: 00:19.0: enabled 1

 1599 12:51:56.271605  PCI: 00:19.1: enabled 0

 1600 12:51:56.274539  PCI: 00:19.2: enabled 0

 1601 12:51:56.278034  PCI: 00:1a.0: enabled 0

 1602 12:51:56.280864  PCI: 00:1c.0: enabled 0

 1603 12:51:56.280950  PCI: 00:1c.1: enabled 0

 1604 12:51:56.284252  PCI: 00:1c.2: enabled 0

 1605 12:51:56.287638  PCI: 00:1c.3: enabled 0

 1606 12:51:56.290903  PCI: 00:1c.4: enabled 0

 1607 12:51:56.290988  PCI: 00:1c.5: enabled 0

 1608 12:51:56.293979  PCI: 00:1c.6: enabled 0

 1609 12:51:56.297530  PCI: 00:1c.7: enabled 0

 1610 12:51:56.300757  PCI: 00:1d.0: enabled 1

 1611 12:51:56.300845  PCI: 00:1d.1: enabled 0

 1612 12:51:56.304125  PCI: 00:1d.2: enabled 0

 1613 12:51:56.307064  PCI: 00:1d.3: enabled 0

 1614 12:51:56.310235  PCI: 00:1d.4: enabled 0

 1615 12:51:56.310335  PCI: 00:1d.5: enabled 0

 1616 12:51:56.313568  PCI: 00:1e.0: enabled 1

 1617 12:51:56.316969  PCI: 00:1e.1: enabled 0

 1618 12:51:56.320002  PCI: 00:1e.2: enabled 1

 1619 12:51:56.320131  PCI: 00:1e.3: enabled 1

 1620 12:51:56.323557  PCI: 00:1f.0: enabled 1

 1621 12:51:56.326781  PCI: 00:1f.1: enabled 0

 1622 12:51:56.329841  PCI: 00:1f.2: enabled 0

 1623 12:51:56.329927  PCI: 00:1f.3: enabled 1

 1624 12:51:56.333082  PCI: 00:1f.4: enabled 1

 1625 12:51:56.336590  PCI: 00:1f.5: enabled 1

 1626 12:51:56.336676  PCI: 00:1f.6: enabled 0

 1627 12:51:56.339757  USB0 port 0: enabled 1

 1628 12:51:56.342849  I2C: 01:15: enabled 1

 1629 12:51:56.346365  I2C: 02:5d: enabled 1

 1630 12:51:56.346452  GENERIC: 0.0: enabled 1

 1631 12:51:56.349523  I2C: 03:1a: enabled 1

 1632 12:51:56.352621  I2C: 03:38: enabled 1

 1633 12:51:56.352707  I2C: 03:39: enabled 1

 1634 12:51:56.355966  I2C: 03:3a: enabled 1

 1635 12:51:56.359308  I2C: 03:3b: enabled 1

 1636 12:51:56.359395  PCI: 00:00.0: enabled 1

 1637 12:51:56.362469  SPI: 00: enabled 1

 1638 12:51:56.365678  SPI: 01: enabled 1

 1639 12:51:56.365788  PNP: 0c09.0: enabled 1

 1640 12:51:56.368841  USB2 port 0: enabled 1

 1641 12:51:56.372297  USB2 port 1: enabled 1

 1642 12:51:56.375646  USB2 port 2: enabled 0

 1643 12:51:56.375733  USB2 port 3: enabled 0

 1644 12:51:56.378975  USB2 port 5: enabled 0

 1645 12:51:56.382017  USB2 port 6: enabled 1

 1646 12:51:56.382116  USB2 port 9: enabled 1

 1647 12:51:56.385323  USB3 port 0: enabled 1

 1648 12:51:56.388712  USB3 port 1: enabled 1

 1649 12:51:56.391861  USB3 port 2: enabled 1

 1650 12:51:56.391948  USB3 port 3: enabled 1

 1651 12:51:56.395413  USB3 port 4: enabled 0

 1652 12:51:56.398410  APIC: 01: enabled 1

 1653 12:51:56.398497  APIC: 07: enabled 1

 1654 12:51:56.401954  APIC: 03: enabled 1

 1655 12:51:56.404896  APIC: 06: enabled 1

 1656 12:51:56.404984  APIC: 02: enabled 1

 1657 12:51:56.408239  APIC: 04: enabled 1

 1658 12:51:56.408326  APIC: 05: enabled 1

 1659 12:51:56.411619  PCI: 00:08.0: enabled 1

 1660 12:51:56.414540  PCI: 00:14.2: enabled 1

 1661 12:51:56.418420  PCI: 01:00.0: enabled 1

 1662 12:51:56.421418  Disabling ACPI via APMC:

 1663 12:51:56.421504  done.

 1664 12:51:56.428266  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1665 12:51:56.431134  ELOG: NV offset 0xaf0000 size 0x4000

 1666 12:51:56.437955  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1667 12:51:56.444333  ELOG: Event(17) added with size 13 at 2023-03-13 12:51:56 UTC

 1668 12:51:56.450961  ELOG: Event(92) added with size 9 at 2023-03-13 12:51:56 UTC

 1669 12:51:56.457490  ELOG: Event(93) added with size 9 at 2023-03-13 12:51:56 UTC

 1670 12:51:56.464266  ELOG: Event(9A) added with size 9 at 2023-03-13 12:51:56 UTC

 1671 12:51:56.470775  ELOG: Event(9E) added with size 10 at 2023-03-13 12:51:56 UTC

 1672 12:51:56.477267  ELOG: Event(9F) added with size 14 at 2023-03-13 12:51:56 UTC

 1673 12:51:56.483994  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1674 12:51:56.490118  ELOG: Event(A1) added with size 10 at 2023-03-13 12:51:56 UTC

 1675 12:51:56.496682  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1676 12:51:56.502941  ELOG: Event(A0) added with size 9 at 2023-03-13 12:51:56 UTC

 1677 12:51:56.506348  elog_add_boot_reason: Logged dev mode boot

 1678 12:51:56.509818  Finalize devices...

 1679 12:51:56.513177  PCI: 00:17.0 final

 1680 12:51:56.513288  Devices finalized

 1681 12:51:56.519566  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1682 12:51:56.522840  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1683 12:51:56.529211  ME: HFSTS1                  : 0x90000245

 1684 12:51:56.532648  ME: HFSTS2                  : 0x3B850126

 1685 12:51:56.535674  ME: HFSTS3                  : 0x00000020

 1686 12:51:56.538957  ME: HFSTS4                  : 0x00004800

 1687 12:51:56.545710  ME: HFSTS5                  : 0x00000000

 1688 12:51:56.548896  ME: HFSTS6                  : 0x40400006

 1689 12:51:56.552121  ME: Manufacturing Mode      : NO

 1690 12:51:56.555598  ME: FW Partition Table      : OK

 1691 12:51:56.558933  ME: Bringup Loader Failure  : NO

 1692 12:51:56.561977  ME: Firmware Init Complete  : YES

 1693 12:51:56.565277  ME: Boot Options Present    : NO

 1694 12:51:56.568646  ME: Update In Progress      : NO

 1695 12:51:56.572044  ME: D0i3 Support            : YES

 1696 12:51:56.575272  ME: Low Power State Enabled : NO

 1697 12:51:56.578366  ME: CPU Replaced            : NO

 1698 12:51:56.581636  ME: CPU Replacement Valid   : YES

 1699 12:51:56.585054  ME: Current Working State   : 5

 1700 12:51:56.588101  ME: Current Operation State : 1

 1701 12:51:56.591390  ME: Current Operation Mode  : 0

 1702 12:51:56.594741  ME: Error Code              : 0

 1703 12:51:56.598086  ME: CPU Debug Disabled      : YES

 1704 12:51:56.601151  ME: TXT Support             : NO

 1705 12:51:56.607938  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1706 12:51:56.610943  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1707 12:51:56.614362  CBFS @ c08000 size 3f8000

 1708 12:51:56.620848  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1709 12:51:56.624196  CBFS: Locating 'fallback/dsdt.aml'

 1710 12:51:56.627569  CBFS: Found @ offset 10bb80 size 3fa5

 1711 12:51:56.633649  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1712 12:51:56.637285  CBFS @ c08000 size 3f8000

 1713 12:51:56.640358  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1714 12:51:56.643721  CBFS: Locating 'fallback/slic'

 1715 12:51:56.648509  CBFS: 'fallback/slic' not found.

 1716 12:51:56.655117  ACPI: Writing ACPI tables at 99b3e000.

 1717 12:51:56.655201  ACPI:    * FACS

 1718 12:51:56.658257  ACPI:    * DSDT

 1719 12:51:56.661830  Ramoops buffer: 0x100000@0x99a3d000.

 1720 12:51:56.664900  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1721 12:51:56.671367  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1722 12:51:56.674905  Google Chrome EC: version:

 1723 12:51:56.678264  	ro: helios_v2.0.2659-56403530b

 1724 12:51:56.681298  	rw: helios_v2.0.2849-c41de27e7d

 1725 12:51:56.681397    running image: 1

 1726 12:51:56.686069  ACPI:    * FADT

 1727 12:51:56.686163  SCI is IRQ9

 1728 12:51:56.692478  ACPI: added table 1/32, length now 40

 1729 12:51:56.692568  ACPI:     * SSDT

 1730 12:51:56.695938  Found 1 CPU(s) with 8 core(s) each.

 1731 12:51:56.699107  Error: Could not locate 'wifi_sar' in VPD.

 1732 12:51:56.705571  Checking CBFS for default SAR values

 1733 12:51:56.709040  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1734 12:51:56.712065  CBFS @ c08000 size 3f8000

 1735 12:51:56.718420  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1736 12:51:56.721830  CBFS: Locating 'wifi_sar_defaults.hex'

 1737 12:51:56.725117  CBFS: Found @ offset 5fac0 size 77

 1738 12:51:56.728334  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1739 12:51:56.734590  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1740 12:51:56.738103  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1741 12:51:56.744407  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1742 12:51:56.748008  failed to find key in VPD: dsm_calib_r0_0

 1743 12:51:56.757373  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1744 12:51:56.764193  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1745 12:51:56.767276  failed to find key in VPD: dsm_calib_r0_1

 1746 12:51:56.777153  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1747 12:51:56.780375  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1748 12:51:56.786708  failed to find key in VPD: dsm_calib_r0_2

 1749 12:51:56.793262  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1750 12:51:56.799898  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1751 12:51:56.802976  failed to find key in VPD: dsm_calib_r0_3

 1752 12:51:56.812659  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1753 12:51:56.819126  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1754 12:51:56.822615  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1755 12:51:56.826000  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1756 12:51:56.829276  EC returned error result code 1

 1757 12:51:56.835688  EC returned error result code 1

 1758 12:51:56.838913  EC returned error result code 1

 1759 12:51:56.842313  PS2K: Bad resp from EC. Vivaldi disabled!

 1760 12:51:56.848774  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1761 12:51:56.855299  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1762 12:51:56.858645  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1763 12:51:56.865346  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1764 12:51:56.868597  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1765 12:51:56.875111  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1766 12:51:56.881523  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1767 12:51:56.888046  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1768 12:51:56.891396  ACPI: added table 2/32, length now 44

 1769 12:51:56.891485  ACPI:    * MCFG

 1770 12:51:56.898154  ACPI: added table 3/32, length now 48

 1771 12:51:56.898243  ACPI:    * TPM2

 1772 12:51:56.901321  TPM2 log created at 99a2d000

 1773 12:51:56.904545  ACPI: added table 4/32, length now 52

 1774 12:51:56.907798  ACPI:    * MADT

 1775 12:51:56.907886  SCI is IRQ9

 1776 12:51:56.911059  ACPI: added table 5/32, length now 56

 1777 12:51:56.914439  current = 99b43ac0

 1778 12:51:56.914526  ACPI:    * DMAR

 1779 12:51:56.917477  ACPI: added table 6/32, length now 60

 1780 12:51:56.920956  ACPI:    * IGD OpRegion

 1781 12:51:56.924003  GMA: Found VBT in CBFS

 1782 12:51:56.927287  GMA: Found valid VBT in CBFS

 1783 12:51:56.930393  ACPI: added table 7/32, length now 64

 1784 12:51:56.930481  ACPI:    * HPET

 1785 12:51:56.937088  ACPI: added table 8/32, length now 68

 1786 12:51:56.937177  ACPI: done.

 1787 12:51:56.940333  ACPI tables: 31744 bytes.

 1788 12:51:56.943534  smbios_write_tables: 99a2c000

 1789 12:51:56.947009  EC returned error result code 3

 1790 12:51:56.950040  Couldn't obtain OEM name from CBI

 1791 12:51:56.953461  Create SMBIOS type 17

 1792 12:51:56.956508  PCI: 00:00.0 (Intel Cannonlake)

 1793 12:51:56.960089  PCI: 00:14.3 (Intel WiFi)

 1794 12:51:56.960171  SMBIOS tables: 939 bytes.

 1795 12:51:56.966279  Writing table forward entry at 0x00000500

 1796 12:51:56.969556  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1797 12:51:56.976097  Writing coreboot table at 0x99b62000

 1798 12:51:56.979390   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1799 12:51:56.985945   1. 0000000000001000-000000000009ffff: RAM

 1800 12:51:56.989129   2. 00000000000a0000-00000000000fffff: RESERVED

 1801 12:51:56.995507   3. 0000000000100000-0000000099a2bfff: RAM

 1802 12:51:56.998910   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1803 12:51:57.005613   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1804 12:51:57.011919   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1805 12:51:57.015138   7. 000000009a000000-000000009f7fffff: RESERVED

 1806 12:51:57.021655   8. 00000000e0000000-00000000efffffff: RESERVED

 1807 12:51:57.025161   9. 00000000fc000000-00000000fc000fff: RESERVED

 1808 12:51:57.031697  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1809 12:51:57.034713  11. 00000000fed10000-00000000fed17fff: RESERVED

 1810 12:51:57.037924  12. 00000000fed80000-00000000fed83fff: RESERVED

 1811 12:51:57.044397  13. 00000000fed90000-00000000fed91fff: RESERVED

 1812 12:51:57.047656  14. 00000000feda0000-00000000feda1fff: RESERVED

 1813 12:51:57.054123  15. 0000000100000000-000000045e7fffff: RAM

 1814 12:51:57.057394  Graphics framebuffer located at 0xc0000000

 1815 12:51:57.060968  Passing 5 GPIOs to payload:

 1816 12:51:57.067245              NAME |       PORT | POLARITY |     VALUE

 1817 12:51:57.070560     write protect |  undefined |     high |       low

 1818 12:51:57.076885               lid |  undefined |     high |      high

 1819 12:51:57.080217             power |  undefined |     high |       low

 1820 12:51:57.086992             oprom |  undefined |     high |       low

 1821 12:51:57.093205          EC in RW | 0x000000cb |     high |       low

 1822 12:51:57.093285  Board ID: 4

 1823 12:51:57.099963  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1824 12:51:57.100061  CBFS @ c08000 size 3f8000

 1825 12:51:57.106288  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1826 12:51:57.113143  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56

 1827 12:51:57.116333  coreboot table: 1492 bytes.

 1828 12:51:57.119364  IMD ROOT    0. 99fff000 00001000

 1829 12:51:57.122798  IMD SMALL   1. 99ffe000 00001000

 1830 12:51:57.125956  FSP MEMORY  2. 99c4e000 003b0000

 1831 12:51:57.129323  CONSOLE     3. 99c2e000 00020000

 1832 12:51:57.132342  FMAP        4. 99c2d000 0000054e

 1833 12:51:57.135863  TIME STAMP  5. 99c2c000 00000910

 1834 12:51:57.138919  VBOOT WORK  6. 99c18000 00014000

 1835 12:51:57.142239  MRC DATA    7. 99c16000 00001958

 1836 12:51:57.145619  ROMSTG STCK 8. 99c15000 00001000

 1837 12:51:57.148717  AFTER CAR   9. 99c0b000 0000a000

 1838 12:51:57.152163  RAMSTAGE   10. 99baf000 0005c000

 1839 12:51:57.155469  REFCODE    11. 99b7a000 00035000

 1840 12:51:57.158503  SMM BACKUP 12. 99b6a000 00010000

 1841 12:51:57.162005  COREBOOT   13. 99b62000 00008000

 1842 12:51:57.165061  ACPI       14. 99b3e000 00024000

 1843 12:51:57.168473  ACPI GNVS  15. 99b3d000 00001000

 1844 12:51:57.171761  RAMOOPS    16. 99a3d000 00100000

 1845 12:51:57.174760  TPM2 TCGLOG17. 99a2d000 00010000

 1846 12:51:57.178282  SMBIOS     18. 99a2c000 00000800

 1847 12:51:57.181263  IMD small region:

 1848 12:51:57.184706    IMD ROOT    0. 99ffec00 00000400

 1849 12:51:57.187962    FSP RUNTIME 1. 99ffebe0 00000004

 1850 12:51:57.191116    EC HOSTEVENT 2. 99ffebc0 00000008

 1851 12:51:57.194489    POWER STATE 3. 99ffeb80 00000040

 1852 12:51:57.197623    ROMSTAGE    4. 99ffeb60 00000004

 1853 12:51:57.200833    MEM INFO    5. 99ffe9a0 000001b9

 1854 12:51:57.204319    VPD         6. 99ffe920 0000006c

 1855 12:51:57.207515  MTRR: Physical address space:

 1856 12:51:57.214201  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1857 12:51:57.220528  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1858 12:51:57.227266  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1859 12:51:57.233585  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1860 12:51:57.240061  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1861 12:51:57.246731  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1862 12:51:57.253162  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1863 12:51:57.256539  MTRR: Fixed MSR 0x250 0x0606060606060606

 1864 12:51:57.259785  MTRR: Fixed MSR 0x258 0x0606060606060606

 1865 12:51:57.262761  MTRR: Fixed MSR 0x259 0x0000000000000000

 1866 12:51:57.269624  MTRR: Fixed MSR 0x268 0x0606060606060606

 1867 12:51:57.272820  MTRR: Fixed MSR 0x269 0x0606060606060606

 1868 12:51:57.275836  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1869 12:51:57.279111  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1870 12:51:57.285955  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1871 12:51:57.288980  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1872 12:51:57.292453  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1873 12:51:57.295681  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1874 12:51:57.299767  call enable_fixed_mtrr()

 1875 12:51:57.302863  CPU physical address size: 39 bits

 1876 12:51:57.309419  MTRR: default type WB/UC MTRR counts: 6/8.

 1877 12:51:57.312907  MTRR: WB selected as default type.

 1878 12:51:57.319157  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1879 12:51:57.326062  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1880 12:51:57.329191  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1881 12:51:57.335625  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1882 12:51:57.342438  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1883 12:51:57.348843  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1884 12:51:57.355122  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 12:51:57.358361  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 12:51:57.361607  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 12:51:57.364903  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 12:51:57.371526  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 12:51:57.374969  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 12:51:57.377919  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 12:51:57.381265  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 12:51:57.388070  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 12:51:57.391069  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 12:51:57.394337  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 12:51:57.394422  

 1896 12:51:57.397741  MTRR check

 1897 12:51:57.400859  Fixed MTRRs   : Enabled

 1898 12:51:57.400945  Variable MTRRs: Enabled

 1899 12:51:57.401013  

 1900 12:51:57.404285  call enable_fixed_mtrr()

 1901 12:51:57.410816  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1902 12:51:57.413923  CPU physical address size: 39 bits

 1903 12:51:57.417319  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1904 12:51:57.423855  MTRR: Fixed MSR 0x250 0x0606060606060606

 1905 12:51:57.427114  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 12:51:57.430434  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 12:51:57.433840  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 12:51:57.440293  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 12:51:57.443570  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 12:51:57.446850  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 12:51:57.450279  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 12:51:57.456437  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 12:51:57.459934  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 12:51:57.463322  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 12:51:57.466192  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 12:51:57.472834  MTRR: Fixed MSR 0x258 0x0606060606060606

 1917 12:51:57.476389  call enable_fixed_mtrr()

 1918 12:51:57.479392  MTRR: Fixed MSR 0x259 0x0000000000000000

 1919 12:51:57.482718  MTRR: Fixed MSR 0x268 0x0606060606060606

 1920 12:51:57.485939  MTRR: Fixed MSR 0x269 0x0606060606060606

 1921 12:51:57.492306  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1922 12:51:57.495862  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1923 12:51:57.498832  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1924 12:51:57.502304  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1925 12:51:57.508648  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1926 12:51:57.512101  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1927 12:51:57.515349  CPU physical address size: 39 bits

 1928 12:51:57.518327  call enable_fixed_mtrr()

 1929 12:51:57.521826  MTRR: Fixed MSR 0x250 0x0606060606060606

 1930 12:51:57.524786  MTRR: Fixed MSR 0x250 0x0606060606060606

 1931 12:51:57.531440  MTRR: Fixed MSR 0x258 0x0606060606060606

 1932 12:51:57.534906  MTRR: Fixed MSR 0x259 0x0000000000000000

 1933 12:51:57.538105  MTRR: Fixed MSR 0x268 0x0606060606060606

 1934 12:51:57.541498  MTRR: Fixed MSR 0x269 0x0606060606060606

 1935 12:51:57.547739  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1936 12:51:57.551299  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1937 12:51:57.554303  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1938 12:51:57.557813  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1939 12:51:57.564061  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1940 12:51:57.567441  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1941 12:51:57.570771  MTRR: Fixed MSR 0x258 0x0606060606060606

 1942 12:51:57.573854  call enable_fixed_mtrr()

 1943 12:51:57.577273  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 12:51:57.583836  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 12:51:57.586771  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 12:51:57.590349  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 12:51:57.593313  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 12:51:57.600062  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 12:51:57.603068  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 12:51:57.606590  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 12:51:57.609549  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 12:51:57.616410  CPU physical address size: 39 bits

 1953 12:51:57.616499  call enable_fixed_mtrr()

 1954 12:51:57.619413  CBFS @ c08000 size 3f8000

 1955 12:51:57.626021  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1956 12:51:57.629271  CBFS: Locating 'fallback/payload'

 1957 12:51:57.632420  MTRR: Fixed MSR 0x250 0x0606060606060606

 1958 12:51:57.639023  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 12:51:57.642173  MTRR: Fixed MSR 0x258 0x0606060606060606

 1960 12:51:57.645626  MTRR: Fixed MSR 0x259 0x0000000000000000

 1961 12:51:57.648934  MTRR: Fixed MSR 0x268 0x0606060606060606

 1962 12:51:57.655088  MTRR: Fixed MSR 0x269 0x0606060606060606

 1963 12:51:57.658776  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1964 12:51:57.662004  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1965 12:51:57.664990  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1966 12:51:57.671759  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1967 12:51:57.675020  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1968 12:51:57.678004  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1969 12:51:57.681407  MTRR: Fixed MSR 0x258 0x0606060606060606

 1970 12:51:57.687946  MTRR: Fixed MSR 0x259 0x0000000000000000

 1971 12:51:57.691304  MTRR: Fixed MSR 0x268 0x0606060606060606

 1972 12:51:57.694589  MTRR: Fixed MSR 0x269 0x0606060606060606

 1973 12:51:57.697575  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1974 12:51:57.704416  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1975 12:51:57.707388  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1976 12:51:57.710765  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1977 12:51:57.717330  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1978 12:51:57.720383  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1979 12:51:57.723938  call enable_fixed_mtrr()

 1980 12:51:57.724024  call enable_fixed_mtrr()

 1981 12:51:57.726835  CPU physical address size: 39 bits

 1982 12:51:57.733548  CPU physical address size: 39 bits

 1983 12:51:57.736784  CPU physical address size: 39 bits

 1984 12:51:57.740170  CBFS: Found @ offset 1c96c0 size 3f798

 1985 12:51:57.743319  CPU physical address size: 39 bits

 1986 12:51:57.746485  Checking segment from ROM address 0xffdd16f8

 1987 12:51:57.753173  Checking segment from ROM address 0xffdd1714

 1988 12:51:57.756473  Loading segment from ROM address 0xffdd16f8

 1989 12:51:57.759517    code (compression=0)

 1990 12:51:57.766043    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1991 12:51:57.775963  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1992 12:51:57.779020  it's not compressed!

 1993 12:51:57.870498  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1994 12:51:57.876973  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1995 12:51:57.883576  Loading segment from ROM address 0xffdd1714

 1996 12:51:57.883664    Entry Point 0x30000000

 1997 12:51:57.886924  Loaded segments

 1998 12:51:57.892617  Finalizing chipset.

 1999 12:51:57.896029  Finalizing SMM.

 2000 12:51:57.899021  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2001 12:51:57.902327  mp_park_aps done after 0 msecs.

 2002 12:51:57.908657  Jumping to boot code at 30000000(99b62000)

 2003 12:51:57.915307  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2004 12:51:57.915395  

 2005 12:51:57.915468  

 2006 12:51:57.918394  

 2007 12:51:57.918483  Starting depthcharge on Helios...

 2008 12:51:57.918824  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2009 12:51:57.918927  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2010 12:51:57.919013  Setting prompt string to ['hatch:']
 2011 12:51:57.919092  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2012 12:51:57.921979  

 2013 12:51:57.928434  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2014 12:51:57.928521  

 2015 12:51:57.934956  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2016 12:51:57.935043  

 2017 12:51:57.941379  board_setup: Info: eMMC controller not present; skipping

 2018 12:51:57.941465  

 2019 12:51:57.944753  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2020 12:51:57.944841  

 2021 12:51:57.951438  board_setup: Info: SDHCI controller not present; skipping

 2022 12:51:57.951524  

 2023 12:51:57.957611  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2024 12:51:57.957698  

 2025 12:51:57.957777  Wipe memory regions:

 2026 12:51:57.960769  

 2027 12:51:57.964432  	[0x00000000001000, 0x000000000a0000)

 2028 12:51:57.964519  

 2029 12:51:57.967420  	[0x00000000100000, 0x00000030000000)

 2030 12:51:58.028493  

 2031 12:51:58.031838  	[0x00000030657430, 0x00000099a2c000)

 2032 12:51:58.160995  

 2033 12:51:58.164322  	[0x00000100000000, 0x0000045e800000)

 2034 12:51:59.482363  

 2035 12:51:59.482515  R8152: Initializing

 2036 12:51:59.482583  

 2037 12:51:59.485536  Version 9 (ocp_data = 6010)

 2038 12:51:59.489691  

 2039 12:51:59.489829  R8152: Done initializing

 2040 12:51:59.489897  

 2041 12:51:59.493222  Adding net device

 2042 12:52:00.097085  

 2043 12:52:00.097243  R8152: Initializing

 2044 12:52:00.097312  

 2045 12:52:00.100387  Version 6 (ocp_data = 5c30)

 2046 12:52:00.100472  

 2047 12:52:00.103658  R8152: Done initializing

 2048 12:52:00.103768  

 2049 12:52:00.110019  net_add_device: Attemp to include the same device

 2050 12:52:00.110113  

 2051 12:52:00.117163  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2052 12:52:00.117249  

 2053 12:52:00.117317  

 2054 12:52:00.117384  

 2055 12:52:00.117726  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2057 12:52:00.218518  hatch: tftpboot 192.168.201.1 9584816/tftp-deploy-fs34z4_r/kernel/bzImage 9584816/tftp-deploy-fs34z4_r/kernel/cmdline 9584816/tftp-deploy-fs34z4_r/ramdisk/ramdisk.cpio.gz

 2058 12:52:00.218677  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2059 12:52:00.218776  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2060 12:52:00.222847  tftpboot 192.168.201.1 9584816/tftp-deploy-fs34z4_r/kernel/bzImoy-fs34z4_r/kernel/cmdline 9584816/tftp-deploy-fs34z4_r/ramdisk/ramdisk.cpio.gz

 2061 12:52:00.222936  

 2062 12:52:00.223003  Waiting for link

 2063 12:52:00.423571  

 2064 12:52:00.423725  done.

 2065 12:52:00.423794  

 2066 12:52:00.423858  MAC: 00:24:32:50:21:91

 2067 12:52:00.423919  

 2068 12:52:00.426764  Sending DHCP discover... done.

 2069 12:52:00.426850  

 2070 12:52:00.430043  Waiting for reply... done.

 2071 12:52:00.430154  

 2072 12:52:00.433329  Sending DHCP request... done.

 2073 12:52:00.433429  

 2074 12:52:00.436565  Waiting for reply... done.

 2075 12:52:00.439766  

 2076 12:52:00.439851  My ip is 192.168.201.14

 2077 12:52:00.439918  

 2078 12:52:00.443133  The DHCP server ip is 192.168.201.1

 2079 12:52:00.443219  

 2080 12:52:00.449560  TFTP server IP predefined by user: 192.168.201.1

 2081 12:52:00.449660  

 2082 12:52:00.456305  Bootfile predefined by user: 9584816/tftp-deploy-fs34z4_r/kernel/bzImage

 2083 12:52:00.456390  

 2084 12:52:00.459345  Sending tftp read request... done.

 2085 12:52:00.459427  

 2086 12:52:00.463000  Waiting for the transfer... 

 2087 12:52:00.463085  

 2088 12:52:01.043164  00000000 ################################################################

 2089 12:52:01.043308  

 2090 12:52:01.629448  00080000 ################################################################

 2091 12:52:01.629597  

 2092 12:52:02.203950  00100000 ################################################################

 2093 12:52:02.204097  

 2094 12:52:02.811405  00180000 ################################################################

 2095 12:52:02.811911  

 2096 12:52:03.523622  00200000 ################################################################

 2097 12:52:03.524138  

 2098 12:52:04.243456  00280000 ################################################################

 2099 12:52:04.243999  

 2100 12:52:04.956679  00300000 ################################################################

 2101 12:52:04.957223  

 2102 12:52:05.674832  00380000 ################################################################

 2103 12:52:05.675360  

 2104 12:52:06.391841  00400000 ################################################################

 2105 12:52:06.392426  

 2106 12:52:07.091487  00480000 ################################################################

 2107 12:52:07.092025  

 2108 12:52:07.782551  00500000 ################################################################

 2109 12:52:07.783174  

 2110 12:52:08.370286  00580000 ################################################################

 2111 12:52:08.370877  

 2112 12:52:09.046560  00600000 ################################################################

 2113 12:52:09.046706  

 2114 12:52:09.697695  00680000 ################################################################

 2115 12:52:09.698299  

 2116 12:52:10.041117  00700000 ##################################### done.

 2117 12:52:10.041259  

 2118 12:52:10.044222  The bootfile was 7638928 bytes long.

 2119 12:52:10.044310  

 2120 12:52:10.047672  Sending tftp read request... done.

 2121 12:52:10.047759  

 2122 12:52:10.050584  Waiting for the transfer... 

 2123 12:52:10.050672  

 2124 12:52:10.710651  00000000 ################################################################

 2125 12:52:10.711177  

 2126 12:52:11.379603  00080000 ################################################################

 2127 12:52:11.380156  

 2128 12:52:11.968133  00100000 ################################################################

 2129 12:52:11.968275  

 2130 12:52:12.564327  00180000 ################################################################

 2131 12:52:12.564869  

 2132 12:52:13.152439  00200000 ################################################################

 2133 12:52:13.152580  

 2134 12:52:13.713376  00280000 ################################################################

 2135 12:52:13.713519  

 2136 12:52:14.289400  00300000 ################################################################

 2137 12:52:14.289542  

 2138 12:52:14.924271  00380000 ################################################################

 2139 12:52:14.924843  

 2140 12:52:15.460590  00400000 ################################################################

 2141 12:52:15.460739  

 2142 12:52:15.971014  00480000 ################################################################

 2143 12:52:15.971192  

 2144 12:52:16.469506  00500000 ############################################################### done.

 2145 12:52:16.469681  

 2146 12:52:16.472495  Sending tftp read request... done.

 2147 12:52:16.472575  

 2148 12:52:16.475959  Waiting for the transfer... 

 2149 12:52:16.476038  

 2150 12:52:16.476105  00000000 # done.

 2151 12:52:16.476169  

 2152 12:52:16.485502  Command line loaded dynamically from TFTP file: 9584816/tftp-deploy-fs34z4_r/kernel/cmdline

 2153 12:52:16.485590  

 2154 12:52:16.511676  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9584816/extract-nfsrootfs-8t9b0hbu,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2155 12:52:16.511777  

 2156 12:52:16.518179  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2157 12:52:16.522015  

 2158 12:52:16.525218  Shutting down all USB controllers.

 2159 12:52:16.525321  

 2160 12:52:16.525393  Removing current net device

 2161 12:52:16.533625  

 2162 12:52:16.533722  Finalizing coreboot

 2163 12:52:16.533805  

 2164 12:52:16.539754  Exiting depthcharge with code 4 at timestamp: 25941925

 2165 12:52:16.539836  

 2166 12:52:16.539905  

 2167 12:52:16.539969  Starting kernel ...

 2168 12:52:16.540033  

 2169 12:52:16.540094  

 2170 12:52:16.540458  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2171 12:52:16.540560  start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
 2172 12:52:16.540637  Setting prompt string to ['Linux version [0-9]']
 2173 12:52:16.540713  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2174 12:52:16.540784  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2176 12:56:39.541060  end: 2.2.5 auto-login-action (duration 00:04:23) [common]
 2178 12:56:39.541648  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
 2180 12:56:39.542115  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2183 12:56:39.542809  end: 2 depthcharge-action (duration 00:05:00) [common]
 2185 12:56:39.543390  Cleaning after the job
 2186 12:56:39.543613  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/ramdisk
 2187 12:56:39.544758  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/kernel
 2188 12:56:39.546072  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/nfsrootfs
 2189 12:56:39.592720  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584816/tftp-deploy-fs34z4_r/modules
 2190 12:56:39.593081  start: 5.1 power-off (timeout 00:00:30) [common]
 2191 12:56:39.593248  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
 2192 12:56:39.662278  >> Command sent successfully.

 2193 12:56:39.666010  Returned 0 in 0 seconds
 2194 12:56:39.767258  end: 5.1 power-off (duration 00:00:00) [common]
 2196 12:56:39.768544  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2197 12:56:39.769623  Listened to connection for namespace 'common' for up to 1s
 2199 12:56:39.771266  Listened to connection for namespace 'common' for up to 1s
 2200 12:56:39.773205  Listened to connection for namespace 'common' for up to 1s
 2201 12:56:39.776670  Listened to connection for namespace 'common' for up to 1s
 2202 12:56:39.779863  Listened to connection for namespace 'common' for up to 1s
 2203 12:56:39.783350  Listened to connection for namespace 'common' for up to 1s
 2204 12:56:39.786531  Listened to connection for namespace 'common' for up to 1s
 2205 12:56:39.789678  Listened to connection for namespace 'common' for up to 1s
 2206 12:56:39.793775  Listened to connection for namespace 'common' for up to 1s
 2207 12:56:39.797003  Listened to connection for namespace 'common' for up to 1s
 2208 12:56:39.800026  Listened to connection for namespace 'common' for up to 1s
 2209 12:56:39.803160  Listened to connection for namespace 'common' for up to 1s
 2210 12:56:39.806521  Listened to connection for namespace 'common' for up to 1s
 2211 12:56:39.809791  Listened to connection for namespace 'common' for up to 1s
 2212 12:56:39.813108  Listened to connection for namespace 'common' for up to 1s
 2213 12:56:39.816598  Listened to connection for namespace 'common' for up to 1s
 2214 12:56:39.819901  Listened to connection for namespace 'common' for up to 1s
 2215 12:56:39.823073  Listened to connection for namespace 'common' for up to 1s
 2216 12:56:39.826290  Listened to connection for namespace 'common' for up to 1s
 2217 12:56:39.829452  Listened to connection for namespace 'common' for up to 1s
 2218 12:56:39.832783  Listened to connection for namespace 'common' for up to 1s
 2219 12:56:39.835873  Listened to connection for namespace 'common' for up to 1s
 2220 12:56:39.839461  Listened to connection for namespace 'common' for up to 1s
 2221 12:56:39.842517  Listened to connection for namespace 'common' for up to 1s
 2222 12:56:39.845938  Listened to connection for namespace 'common' for up to 1s
 2223 12:56:39.848934  Listened to connection for namespace 'common' for up to 1s
 2224 12:56:39.852353  Listened to connection for namespace 'common' for up to 1s
 2225 12:56:39.855725  Listened to connection for namespace 'common' for up to 1s
 2226 12:56:39.858988  Listened to connection for namespace 'common' for up to 1s
 2227 12:56:39.862604  Listened to connection for namespace 'common' for up to 1s
 2228 12:56:39.865433  Listened to connection for namespace 'common' for up to 1s
 2229 12:56:39.868810  Listened to connection for namespace 'common' for up to 1s
 2230 12:56:39.872035  Listened to connection for namespace 'common' for up to 1s
 2231 12:56:39.875370  Listened to connection for namespace 'common' for up to 1s
 2232 12:56:39.878524  Listened to connection for namespace 'common' for up to 1s
 2233 12:56:39.881681  Listened to connection for namespace 'common' for up to 1s
 2234 12:56:39.885257  Listened to connection for namespace 'common' for up to 1s
 2235 12:56:39.888316  Listened to connection for namespace 'common' for up to 1s
 2236 12:56:39.891818  Listened to connection for namespace 'common' for up to 1s
 2237 12:56:39.894869  Listened to connection for namespace 'common' for up to 1s
 2238 12:56:39.898114  Listened to connection for namespace 'common' for up to 1s
 2239 12:56:39.901389  Listened to connection for namespace 'common' for up to 1s
 2240 12:56:39.904765  Listened to connection for namespace 'common' for up to 1s
 2241 12:56:39.907869  Listened to connection for namespace 'common' for up to 1s
 2242 12:56:39.911068  Listened to connection for namespace 'common' for up to 1s
 2243 12:56:39.914393  Listened to connection for namespace 'common' for up to 1s
 2244 12:56:39.917668  Listened to connection for namespace 'common' for up to 1s
 2245 12:56:39.921518  Listened to connection for namespace 'common' for up to 1s
 2246 12:56:39.924240  Listened to connection for namespace 'common' for up to 1s
 2247 12:56:39.927527  Listened to connection for namespace 'common' for up to 1s
 2248 12:56:39.930867  Listened to connection for namespace 'common' for up to 1s
 2249 12:56:39.934120  Listened to connection for namespace 'common' for up to 1s
 2250 12:56:39.937469  Listened to connection for namespace 'common' for up to 1s
 2251 12:56:39.940677  Listened to connection for namespace 'common' for up to 1s
 2252 12:56:39.943954  Listened to connection for namespace 'common' for up to 1s
 2253 12:56:39.947280  Listened to connection for namespace 'common' for up to 1s
 2254 12:56:39.950609  Listened to connection for namespace 'common' for up to 1s
 2255 12:56:39.953941  Listened to connection for namespace 'common' for up to 1s
 2256 12:56:39.957376  Listened to connection for namespace 'common' for up to 1s
 2257 12:56:39.960759  Listened to connection for namespace 'common' for up to 1s
 2258 12:56:39.963472  Listened to connection for namespace 'common' for up to 1s
 2259 12:56:39.966945  Listened to connection for namespace 'common' for up to 1s
 2260 12:56:39.970179  Listened to connection for namespace 'common' for up to 1s
 2261 12:56:39.973639  Listened to connection for namespace 'common' for up to 1s
 2262 12:56:39.976770  Listened to connection for namespace 'common' for up to 1s
 2263 12:56:39.980064  Listened to connection for namespace 'common' for up to 1s
 2264 12:56:39.983570  Listened to connection for namespace 'common' for up to 1s
 2265 12:56:39.986738  Listened to connection for namespace 'common' for up to 1s
 2266 12:56:39.989872  Listened to connection for namespace 'common' for up to 1s
 2267 12:56:39.993083  Listened to connection for namespace 'common' for up to 1s
 2268 12:56:39.996334  Listened to connection for namespace 'common' for up to 1s
 2269 12:56:39.999748  Listened to connection for namespace 'common' for up to 1s
 2270 12:56:40.003086  Listened to connection for namespace 'common' for up to 1s
 2271 12:56:40.006465  Listened to connection for namespace 'common' for up to 1s
 2272 12:56:40.009559  Listened to connection for namespace 'common' for up to 1s
 2273 12:56:40.012528  Listened to connection for namespace 'common' for up to 1s
 2274 12:56:40.016041  Listened to connection for namespace 'common' for up to 1s
 2275 12:56:40.018861  Listened to connection for namespace 'common' for up to 1s
 2276 12:56:40.022049  Listened to connection for namespace 'common' for up to 1s
 2277 12:56:40.025562  Listened to connection for namespace 'common' for up to 1s
 2278 12:56:40.028859  Listened to connection for namespace 'common' for up to 1s
 2279 12:56:40.032098  Listened to connection for namespace 'common' for up to 1s
 2280 12:56:40.035159  Listened to connection for namespace 'common' for up to 1s
 2281 12:56:40.038348  Listened to connection for namespace 'common' for up to 1s
 2282 12:56:40.042080  Listened to connection for namespace 'common' for up to 1s
 2283 12:56:40.045169  Listened to connection for namespace 'common' for up to 1s
 2284 12:56:40.048200  Listened to connection for namespace 'common' for up to 1s
 2285 12:56:40.051696  Listened to connection for namespace 'common' for up to 1s
 2286 12:56:40.054860  Listened to connection for namespace 'common' for up to 1s
 2287 12:56:40.058118  Listened to connection for namespace 'common' for up to 1s
 2288 12:56:40.061137  Listened to connection for namespace 'common' for up to 1s
 2289 12:56:40.064607  Listened to connection for namespace 'common' for up to 1s
 2290 12:56:40.067850  Listened to connection for namespace 'common' for up to 1s
 2291 12:56:40.071418  Listened to connection for namespace 'common' for up to 1s
 2292 12:56:40.074614  Listened to connection for namespace 'common' for up to 1s
 2293 12:56:40.078050  Listened to connection for namespace 'common' for up to 1s
 2294 12:56:40.081029  Listened to connection for namespace 'common' for up to 1s
 2295 12:56:40.084340  Listened to connection for namespace 'common' for up to 1s
 2296 12:56:40.087410  Listened to connection for namespace 'common' for up to 1s
 2297 12:56:40.090814  Listened to connection for namespace 'common' for up to 1s
 2298 12:56:40.094896  Listened to connection for namespace 'common' for up to 1s
 2299 12:56:40.098091  Listened to connection for namespace 'common' for up to 1s
 2300 12:56:40.101288  Listened to connection for namespace 'common' for up to 1s
 2301 12:56:40.104661  Listened to connection for namespace 'common' for up to 1s
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 2505 12:56:40.769019  Finalising connection for namespace 'common'
 2506 12:56:40.769115  Disconnecting from shell: Finalise
 2507 12:56:40.769188  
 2508 12:56:40.870041  end: 5.2 read-feedback (duration 00:00:01) [common]
 2509 12:56:40.870590  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584816
 2510 12:56:40.987906  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584816
 2511 12:56:40.988104  JobError: Your job cannot terminate cleanly.