Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:48:09.314858 lava-dispatcher, installed at version: 2023.01
2 12:48:09.315097 start: 0 validate
3 12:48:09.315222 Start time: 2023-03-13 12:48:09.315215+00:00 (UTC)
4 12:48:09.315333 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:48:09.315460 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
6 12:48:09.607256 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:48:09.607434 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:48:13.109790 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:48:13.110530 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:48:13.401553 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:48:13.402342 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:48:14.405446 validate duration: 5.09
14 12:48:14.405792 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:48:14.405985 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:48:14.406084 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:48:14.406185 Not decompressing ramdisk as can be used compressed.
18 12:48:14.406270 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/initrd.cpio.gz
19 12:48:14.406334 saving as /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/ramdisk/initrd.cpio.gz
20 12:48:14.406393 total size: 5432085 (5MB)
21 12:48:14.407243 progress 0% (0MB)
22 12:48:14.408830 progress 5% (0MB)
23 12:48:14.410145 progress 10% (0MB)
24 12:48:14.411494 progress 15% (0MB)
25 12:48:14.412935 progress 20% (1MB)
26 12:48:14.414221 progress 25% (1MB)
27 12:48:14.415535 progress 30% (1MB)
28 12:48:14.416960 progress 35% (1MB)
29 12:48:14.418242 progress 40% (2MB)
30 12:48:14.419608 progress 45% (2MB)
31 12:48:14.420933 progress 50% (2MB)
32 12:48:14.422406 progress 55% (2MB)
33 12:48:14.423760 progress 60% (3MB)
34 12:48:14.425051 progress 65% (3MB)
35 12:48:14.426477 progress 70% (3MB)
36 12:48:14.427791 progress 75% (3MB)
37 12:48:14.429068 progress 80% (4MB)
38 12:48:14.430343 progress 85% (4MB)
39 12:48:14.431818 progress 90% (4MB)
40 12:48:14.433095 progress 95% (4MB)
41 12:48:14.434391 progress 100% (5MB)
42 12:48:14.434590 5MB downloaded in 0.03s (183.76MB/s)
43 12:48:14.434780 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:48:14.435051 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:48:14.435172 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:48:14.435256 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:48:14.435363 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:48:14.435430 saving as /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/kernel/bzImage
50 12:48:14.435491 total size: 7638928 (7MB)
51 12:48:14.435550 No compression specified
52 12:48:14.436481 progress 0% (0MB)
53 12:48:14.438368 progress 5% (0MB)
54 12:48:14.440313 progress 10% (0MB)
55 12:48:14.442262 progress 15% (1MB)
56 12:48:14.444224 progress 20% (1MB)
57 12:48:14.446145 progress 25% (1MB)
58 12:48:14.447940 progress 30% (2MB)
59 12:48:14.449884 progress 35% (2MB)
60 12:48:14.451850 progress 40% (2MB)
61 12:48:14.453571 progress 45% (3MB)
62 12:48:14.455506 progress 50% (3MB)
63 12:48:14.457374 progress 55% (4MB)
64 12:48:14.459234 progress 60% (4MB)
65 12:48:14.461101 progress 65% (4MB)
66 12:48:14.463016 progress 70% (5MB)
67 12:48:14.464804 progress 75% (5MB)
68 12:48:14.466710 progress 80% (5MB)
69 12:48:14.468687 progress 85% (6MB)
70 12:48:14.470401 progress 90% (6MB)
71 12:48:14.472413 progress 95% (6MB)
72 12:48:14.474339 progress 100% (7MB)
73 12:48:14.474458 7MB downloaded in 0.04s (186.98MB/s)
74 12:48:14.474644 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:48:14.474934 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:48:14.475040 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:48:14.475164 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:48:14.475275 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/full.rootfs.tar.xz
80 12:48:14.475345 saving as /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/nfsrootfs/full.rootfs.tar
81 12:48:14.475406 total size: 133351796 (127MB)
82 12:48:14.475496 Using unxz to decompress xz
83 12:48:14.478924 progress 0% (0MB)
84 12:48:14.818315 progress 5% (6MB)
85 12:48:15.183165 progress 10% (12MB)
86 12:48:15.472183 progress 15% (19MB)
87 12:48:15.672621 progress 20% (25MB)
88 12:48:15.926852 progress 25% (31MB)
89 12:48:16.278402 progress 30% (38MB)
90 12:48:16.643601 progress 35% (44MB)
91 12:48:17.056702 progress 40% (50MB)
92 12:48:17.459799 progress 45% (57MB)
93 12:48:17.822337 progress 50% (63MB)
94 12:48:18.198321 progress 55% (69MB)
95 12:48:18.560892 progress 60% (76MB)
96 12:48:18.926159 progress 65% (82MB)
97 12:48:19.293079 progress 70% (89MB)
98 12:48:19.664022 progress 75% (95MB)
99 12:48:20.107499 progress 80% (101MB)
100 12:48:20.547567 progress 85% (108MB)
101 12:48:20.823681 progress 90% (114MB)
102 12:48:21.175331 progress 95% (120MB)
103 12:48:21.572787 progress 100% (127MB)
104 12:48:21.578570 127MB downloaded in 7.10s (17.90MB/s)
105 12:48:21.578860 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:48:21.579184 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:48:21.579294 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:48:21.579384 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:48:21.579519 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:48:21.579610 saving as /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/modules/modules.tar
112 12:48:21.579691 total size: 250760 (0MB)
113 12:48:21.579757 Using unxz to decompress xz
114 12:48:21.583052 progress 13% (0MB)
115 12:48:21.583420 progress 26% (0MB)
116 12:48:21.583711 progress 39% (0MB)
117 12:48:21.585113 progress 52% (0MB)
118 12:48:21.587091 progress 65% (0MB)
119 12:48:21.588952 progress 78% (0MB)
120 12:48:21.590775 progress 91% (0MB)
121 12:48:21.592615 progress 100% (0MB)
122 12:48:21.598308 0MB downloaded in 0.02s (12.85MB/s)
123 12:48:21.598589 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:48:21.598859 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:48:21.598977 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:48:21.599091 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:48:22.850666 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9584809/extract-nfsrootfs-i3_77q1z
129 12:48:22.850901 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 12:48:22.851031 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
131 12:48:22.851176 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j
132 12:48:22.851282 makedir: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin
133 12:48:22.851368 makedir: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/tests
134 12:48:22.851451 makedir: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/results
135 12:48:22.851555 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-add-keys
136 12:48:22.851690 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-add-sources
137 12:48:22.851805 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-background-process-start
138 12:48:22.851918 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-background-process-stop
139 12:48:22.852030 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-common-functions
140 12:48:22.852140 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-echo-ipv4
141 12:48:22.852257 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-install-packages
142 12:48:22.852366 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-installed-packages
143 12:48:22.852475 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-os-build
144 12:48:22.852607 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-probe-channel
145 12:48:22.852731 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-probe-ip
146 12:48:22.852839 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-target-ip
147 12:48:22.852947 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-target-mac
148 12:48:22.853056 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-target-storage
149 12:48:22.853167 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-case
150 12:48:22.853275 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-event
151 12:48:22.853387 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-feedback
152 12:48:22.853496 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-raise
153 12:48:22.853604 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-reference
154 12:48:22.853712 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-runner
155 12:48:22.853821 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-set
156 12:48:22.853928 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-test-shell
157 12:48:22.854039 Updating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-install-packages (oe)
158 12:48:22.854159 Updating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/bin/lava-installed-packages (oe)
159 12:48:22.854258 Creating /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/environment
160 12:48:22.854347 LAVA metadata
161 12:48:22.854418 - LAVA_JOB_ID=9584809
162 12:48:22.854483 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:48:22.854591 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
164 12:48:22.854656 skipped lava-vland-overlay
165 12:48:22.854734 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:48:22.854817 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
167 12:48:22.854882 skipped lava-multinode-overlay
168 12:48:22.854980 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:48:22.855077 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
170 12:48:22.855152 Loading test definitions
171 12:48:22.855247 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
172 12:48:22.855318 Using /lava-9584809 at stage 0
173 12:48:22.855577 uuid=9584809_1.5.2.3.1 testdef=None
174 12:48:22.855702 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:48:22.855789 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
176 12:48:22.856264 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:48:22.856493 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
179 12:48:22.857100 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:48:22.857337 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
182 12:48:22.857874 runner path: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/0/tests/0_dmesg test_uuid 9584809_1.5.2.3.1
183 12:48:22.858020 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:48:22.858253 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
186 12:48:22.858327 Using /lava-9584809 at stage 1
187 12:48:22.858569 uuid=9584809_1.5.2.3.5 testdef=None
188 12:48:22.858659 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:48:22.858748 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
190 12:48:22.859229 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:48:22.859454 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
193 12:48:22.860021 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:48:22.860258 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
196 12:48:22.860815 runner path: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/1/tests/1_bootrr test_uuid 9584809_1.5.2.3.5
197 12:48:22.860961 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:48:22.861172 Creating lava-test-runner.conf files
200 12:48:22.861236 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/0 for stage 0
201 12:48:22.861320 - 0_dmesg
202 12:48:22.861394 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584809/lava-overlay-uroigz7j/lava-9584809/1 for stage 1
203 12:48:22.861476 - 1_bootrr
204 12:48:22.861567 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:48:22.861654 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
206 12:48:22.867514 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:48:22.867651 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
208 12:48:22.867748 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:48:22.867838 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:48:22.867929 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
211 12:48:22.970368 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:48:22.970719 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 12:48:22.970985 extracting modules file /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584809/extract-nfsrootfs-i3_77q1z
214 12:48:22.978477 extracting modules file /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584809/extract-overlay-ramdisk-mblqs8m3/ramdisk
215 12:48:22.985724 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:48:22.985843 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
217 12:48:22.985930 [common] Applying overlay to NFS
218 12:48:22.986004 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584809/compress-overlay-uqwev686/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584809/extract-nfsrootfs-i3_77q1z
219 12:48:22.989991 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:48:22.990099 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
221 12:48:22.990189 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:48:22.990280 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
223 12:48:22.990359 Building ramdisk /var/lib/lava/dispatcher/tmp/9584809/extract-overlay-ramdisk-mblqs8m3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584809/extract-overlay-ramdisk-mblqs8m3/ramdisk
224 12:48:23.025620 >> 26158 blocks
225 12:48:23.518947 rename /var/lib/lava/dispatcher/tmp/9584809/extract-overlay-ramdisk-mblqs8m3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/ramdisk/ramdisk.cpio.gz
226 12:48:23.519395 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:48:23.519532 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
228 12:48:23.519636 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
229 12:48:23.519730 No mkimage arch provided, not using FIT.
230 12:48:23.519821 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:48:23.519908 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:48:23.520006 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 12:48:23.520101 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
234 12:48:23.520197 No LXC device requested
235 12:48:23.520291 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:48:23.520377 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
237 12:48:23.520456 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:48:23.520526 Checking files for TFTP limit of 4294967296 bytes.
239 12:48:23.520939 end: 1 tftp-deploy (duration 00:00:09) [common]
240 12:48:23.521046 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:48:23.521138 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:48:23.521267 substitutions:
243 12:48:23.521336 - {DTB}: None
244 12:48:23.521401 - {INITRD}: 9584809/tftp-deploy-mo52qm_5/ramdisk/ramdisk.cpio.gz
245 12:48:23.521462 - {KERNEL}: 9584809/tftp-deploy-mo52qm_5/kernel/bzImage
246 12:48:23.521520 - {LAVA_MAC}: None
247 12:48:23.521578 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9584809/extract-nfsrootfs-i3_77q1z
248 12:48:23.521635 - {NFS_SERVER_IP}: 192.168.201.1
249 12:48:23.521691 - {PRESEED_CONFIG}: None
250 12:48:23.521747 - {PRESEED_LOCAL}: None
251 12:48:23.521802 - {RAMDISK}: 9584809/tftp-deploy-mo52qm_5/ramdisk/ramdisk.cpio.gz
252 12:48:23.521857 - {ROOT_PART}: None
253 12:48:23.521913 - {ROOT}: None
254 12:48:23.521968 - {SERVER_IP}: 192.168.201.1
255 12:48:23.522022 - {TEE}: None
256 12:48:23.522078 Parsed boot commands:
257 12:48:23.522132 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:48:23.522283 Parsed boot commands: tftpboot 192.168.201.1 9584809/tftp-deploy-mo52qm_5/kernel/bzImage 9584809/tftp-deploy-mo52qm_5/kernel/cmdline 9584809/tftp-deploy-mo52qm_5/ramdisk/ramdisk.cpio.gz
259 12:48:23.522377 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:48:23.522463 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:48:23.522558 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:48:23.522656 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:48:23.522725 Not connected, no need to disconnect.
264 12:48:23.522801 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:48:23.522885 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:48:23.522971 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
267 12:48:23.525893 Setting prompt string to ['lava-test: # ']
268 12:48:23.526174 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:48:23.526280 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:48:23.526378 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:48:23.526470 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:48:23.526643 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
273 12:48:28.661690 >> Command sent successfully.
274 12:48:28.664008 Returned 0 in 5 seconds
275 12:48:28.764797 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:48:28.765130 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:48:28.765233 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:48:28.765322 Setting prompt string to 'Starting depthcharge on Voema...'
280 12:48:28.765391 Changing prompt to 'Starting depthcharge on Voema...'
281 12:48:28.765464 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 12:48:28.765740 [Enter `^Ec?' for help]
283 12:48:28.765822 Pass: 49070, Crash: 2, ExpectedFail: 132, Warn: 3, Skip: 3690, Flake: 2, Duration: 33:46, Remaining: 2:15
284 12:48:28.765896 Pass: 49080, Crash: 2, ExpectedFail: 132, Warn: 3, Skip: 3692, Flake: 2, Duration: 33:48, Remaining: 2:14
285 12:48:28.765963 Pass: 49086, Crash: 2, ExpectedFail: 132, Warn: 3, Skip: 3693, Flake: 2, Duration: 33:51, Remaining: 2:14
286 12:48:28.766040 Pass: 49092, Crash: 2, ExpectedFail: 132, Warn: 3, Skip: 3694, Flake: 2, Duration: 33:53, Remaining: 2:14
287 12:48:28.766112 Pass: 49104, Crash: 2, ExpectedFail: 132, Warn: 3, Skip: 3695, Flake: 2, Duration: 33:56, Remaining: 2:14
288 12:48:28.766175 [0m[31mERROR - Piglit error: Failed to link:
289 12:48:30.397098 [0m[0m[31mERROR - Piglit error: error: vertex shader output `gl_B
290 12:48:30.397267
291 12:48:30.406876 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
292 12:48:30.410158 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
293 12:48:30.417043 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
294 12:48:30.420361 CPU: AES supported, TXT NOT supported, VT supported
295 12:48:30.426575 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
296 12:48:30.433626 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
297 12:48:30.436891 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
298 12:48:30.440154 VBOOT: Loading verstage.
299 12:48:30.443602 FMAP: Found "FLASH" version 1.1 at 0x1804000.
300 12:48:30.450332 FMAP: base = 0x0 size = 0x2000000 #areas = 32
301 12:48:30.453695 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 12:48:30.463769 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
303 12:48:30.470766 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
304 12:48:30.470852
305 12:48:30.470920
306 12:48:30.483929 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
307 12:48:30.497439 Probing TPM: . done!
308 12:48:30.500653 TPM ready after 0 ms
309 12:48:30.504400 Connected to device vid:did:rid of 1ae0:0028:00
310 12:48:30.515738 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
311 12:48:30.522078 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 12:48:30.525245 Initialized TPM device CR50 revision 0
313 12:48:30.670127 tlcl_send_startup: Startup return code is 0
314 12:48:30.670266 TPM: setup succeeded
315 12:48:30.685939 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
316 12:48:30.699938 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
317 12:48:30.712715 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
318 12:48:30.722692 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
319 12:48:30.726261 Chrome EC: UHEPI supported
320 12:48:30.729592 Phase 1
321 12:48:30.732787 FMAP: area GBB found @ 1805000 (458752 bytes)
322 12:48:30.742804 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
323 12:48:30.749648 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
324 12:48:30.756162 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:48:30.762755 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
326 12:48:30.766393 Recovery requested (1009000e)
327 12:48:30.769757 TPM: Extending digest for VBOOT: boot mode into PCR 0
328 12:48:30.780954 tlcl_extend: response is 0
329 12:48:30.787761 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
330 12:48:30.797561 tlcl_extend: response is 0
331 12:48:30.804040 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
332 12:48:30.810734 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
333 12:48:30.817456 BS: verstage times (exec / console): total (unknown) / 142 ms
334 12:48:30.817543
335 12:48:30.817611
336 12:48:30.830380 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
337 12:48:30.837521 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 12:48:30.841129 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 12:48:30.844255 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
340 12:48:30.851226 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 12:48:30.854528 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
342 12:48:30.857804 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
343 12:48:30.861109 TCO_STS: 0000 0000
344 12:48:30.864335 GEN_PMCON: d0015038 00002200
345 12:48:30.867671 GBLRST_CAUSE: 00000000 00000000
346 12:48:30.867757 HPR_CAUSE0: 00000000
347 12:48:30.870749 prev_sleep_state 5
348 12:48:30.874031 Boot Count incremented to 19979
349 12:48:30.880591 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 12:48:30.887240 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 12:48:30.893955 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 12:48:30.900612 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
353 12:48:30.904764 Chrome EC: UHEPI supported
354 12:48:30.911559 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
355 12:48:30.924488 Probing TPM: done!
356 12:48:30.930900 Connected to device vid:did:rid of 1ae0:0028:00
357 12:48:30.941001 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
358 12:48:30.945042 Initialized TPM device CR50 revision 0
359 12:48:30.959127 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
360 12:48:30.965706 MRC: Hash idx 0x100b comparison successful.
361 12:48:30.969004 MRC cache found, size faa8
362 12:48:30.969090 bootmode is set to: 2
363 12:48:30.972254 SPD index = 0
364 12:48:30.979173 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
365 12:48:30.982422 SPD: module type is LPDDR4X
366 12:48:30.985616 SPD: module part number is MT53E512M64D4NW-046
367 12:48:30.992518 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
368 12:48:30.995711 SPD: device width 16 bits, bus width 16 bits
369 12:48:31.002558 SPD: module size is 1024 MB (per channel)
370 12:48:31.434703 CBMEM:
371 12:48:31.438181 IMD: root @ 0x76fff000 254 entries.
372 12:48:31.441620 IMD: root @ 0x76ffec00 62 entries.
373 12:48:31.444829 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
374 12:48:31.451182 FMAP: area RW_VPD found @ f35000 (8192 bytes)
375 12:48:31.454683 External stage cache:
376 12:48:31.457861 IMD: root @ 0x7b3ff000 254 entries.
377 12:48:31.461064 IMD: root @ 0x7b3fec00 62 entries.
378 12:48:31.476292 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
379 12:48:31.483280 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
380 12:48:31.489838 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
381 12:48:31.503896 MRC: 'RECOVERY_MRC_CACHE' does not need update.
382 12:48:31.510361 cse_lite: Skip switching to RW in the recovery path
383 12:48:31.510459 8 DIMMs found
384 12:48:31.510553 SMM Memory Map
385 12:48:31.517059 SMRAM : 0x7b000000 0x800000
386 12:48:31.520289 Subregion 0: 0x7b000000 0x200000
387 12:48:31.523787 Subregion 1: 0x7b200000 0x200000
388 12:48:31.526807 Subregion 2: 0x7b400000 0x400000
389 12:48:31.526894 top_of_ram = 0x77000000
390 12:48:31.533507 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
391 12:48:31.540139 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
392 12:48:31.543505 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
393 12:48:31.549999 MTRR Range: Start=ff000000 End=0 (Size 1000000)
394 12:48:31.556646 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
395 12:48:31.563441 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
396 12:48:31.573393 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
397 12:48:31.579727 Processing 211 relocs. Offset value of 0x74c0b000
398 12:48:31.586886 BS: romstage times (exec / console): total (unknown) / 277 ms
399 12:48:31.592430
400 12:48:31.592515
401 12:48:31.602506 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
402 12:48:31.605715 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
403 12:48:31.613431 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
404 12:48:31.623333 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
405 12:48:31.629842 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
406 12:48:31.636348 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
407 12:48:31.682499 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
408 12:48:31.689393 Processing 5008 relocs. Offset value of 0x75d98000
409 12:48:31.692604 BS: postcar times (exec / console): total (unknown) / 59 ms
410 12:48:31.692691
411 12:48:31.695823
412 12:48:31.706029 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
413 12:48:31.706117 Normal boot
414 12:48:31.709407 FW_CONFIG value is 0x804c02
415 12:48:31.712697 PCI: 00:07.0 disabled by fw_config
416 12:48:31.715776 PCI: 00:07.1 disabled by fw_config
417 12:48:31.718947 PCI: 00:0d.2 disabled by fw_config
418 12:48:31.722544 PCI: 00:1c.7 disabled by fw_config
419 12:48:31.729165 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
420 12:48:31.735680 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:48:31.739405 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:48:31.742464 GENERIC: 0.0 disabled by fw_config
423 12:48:31.749356 GENERIC: 1.0 disabled by fw_config
424 12:48:31.752576 fw_config match found: DB_USB=USB3_ACTIVE
425 12:48:31.755578 fw_config match found: DB_USB=USB3_ACTIVE
426 12:48:31.758919 fw_config match found: DB_USB=USB3_ACTIVE
427 12:48:31.766076 fw_config match found: DB_USB=USB3_ACTIVE
428 12:48:31.768996 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
429 12:48:31.775648 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
430 12:48:31.785548 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
431 12:48:31.792197 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
432 12:48:31.795384 microcode: sig=0x806c1 pf=0x80 revision=0x86
433 12:48:31.802388 microcode: Update skipped, already up-to-date
434 12:48:31.808720 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
435 12:48:31.836302 Detected 4 core, 8 thread CPU.
436 12:48:31.839533 Setting up SMI for CPU
437 12:48:31.842730 IED base = 0x7b400000
438 12:48:31.842816 IED size = 0x00400000
439 12:48:31.846493 Will perform SMM setup.
440 12:48:31.852361 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
441 12:48:31.859370 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
442 12:48:31.865973 Processing 16 relocs. Offset value of 0x00030000
443 12:48:31.869081 Attempting to start 7 APs
444 12:48:31.872628 Waiting for 10ms after sending INIT.
445 12:48:31.888413 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
446 12:48:31.891663 AP: slot 5 apic_id 4.
447 12:48:31.894850 AP: slot 4 apic_id 5.
448 12:48:31.894935 AP: slot 3 apic_id 7.
449 12:48:31.898155 AP: slot 7 apic_id 6.
450 12:48:31.901407 AP: slot 2 apic_id 3.
451 12:48:31.901492 AP: slot 6 apic_id 2.
452 12:48:31.901560 done.
453 12:48:31.908448 Waiting for 2nd SIPI to complete...done.
454 12:48:31.914648 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
455 12:48:31.921286 Processing 13 relocs. Offset value of 0x00038000
456 12:48:31.921375 Unable to locate Global NVS
457 12:48:31.931732 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
458 12:48:31.934922 Installing permanent SMM handler to 0x7b000000
459 12:48:31.944724 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
460 12:48:31.947885 Processing 794 relocs. Offset value of 0x7b010000
461 12:48:31.958341 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
462 12:48:31.961532 Processing 13 relocs. Offset value of 0x7b008000
463 12:48:31.967953 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
464 12:48:31.974794 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
465 12:48:31.978352 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
466 12:48:31.984554 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
467 12:48:31.991113 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
468 12:48:31.997987 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
469 12:48:32.004463 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
470 12:48:32.004550 Unable to locate Global NVS
471 12:48:32.014266 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
472 12:48:32.017888 Clearing SMI status registers
473 12:48:32.017978 SMI_STS: PM1
474 12:48:32.020992 PM1_STS: PWRBTN
475 12:48:32.027891 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
476 12:48:32.031172 In relocation handler: CPU 0
477 12:48:32.034619 New SMBASE=0x7b000000 IEDBASE=0x7b400000
478 12:48:32.041140 Writing SMRR. base = 0x7b000006, mask=0xff800c00
479 12:48:32.041226 Relocation complete.
480 12:48:32.051073 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
481 12:48:32.051162 In relocation handler: CPU 1
482 12:48:32.057453 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
483 12:48:32.057543 Relocation complete.
484 12:48:32.067470 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
485 12:48:32.067560 In relocation handler: CPU 5
486 12:48:32.074129 New SMBASE=0x7affec00 IEDBASE=0x7b400000
487 12:48:32.078197 Writing SMRR. base = 0x7b000006, mask=0xff800c00
488 12:48:32.081443 Relocation complete.
489 12:48:32.088429 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
490 12:48:32.091186 In relocation handler: CPU 4
491 12:48:32.094512 New SMBASE=0x7afff000 IEDBASE=0x7b400000
492 12:48:32.098106 Relocation complete.
493 12:48:32.104740 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
494 12:48:32.107989 In relocation handler: CPU 3
495 12:48:32.111525 New SMBASE=0x7afff400 IEDBASE=0x7b400000
496 12:48:32.111607 Relocation complete.
497 12:48:32.121509 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
498 12:48:32.124770 In relocation handler: CPU 7
499 12:48:32.128082 New SMBASE=0x7affe400 IEDBASE=0x7b400000
500 12:48:32.131482 Writing SMRR. base = 0x7b000006, mask=0xff800c00
501 12:48:32.134617 Relocation complete.
502 12:48:32.141438 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
503 12:48:32.144746 In relocation handler: CPU 6
504 12:48:32.148118 New SMBASE=0x7affe800 IEDBASE=0x7b400000
505 12:48:32.154722 Writing SMRR. base = 0x7b000006, mask=0xff800c00
506 12:48:32.154804 Relocation complete.
507 12:48:32.164491 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
508 12:48:32.164574 In relocation handler: CPU 2
509 12:48:32.171326 New SMBASE=0x7afff800 IEDBASE=0x7b400000
510 12:48:32.171416 Relocation complete.
511 12:48:32.174466 Initializing CPU #0
512 12:48:32.177682 CPU: vendor Intel device 806c1
513 12:48:32.181393 CPU: family 06, model 8c, stepping 01
514 12:48:32.184626 Clearing out pending MCEs
515 12:48:32.188410 Setting up local APIC...
516 12:48:32.188489 apic_id: 0x00 done.
517 12:48:32.190849 Turbo is available but hidden
518 12:48:32.194501 Turbo is available and visible
519 12:48:32.200973 microcode: Update skipped, already up-to-date
520 12:48:32.201051 CPU #0 initialized
521 12:48:32.204533 Initializing CPU #2
522 12:48:32.207585 Initializing CPU #6
523 12:48:32.207679 Initializing CPU #1
524 12:48:32.210795 CPU: vendor Intel device 806c1
525 12:48:32.214169 CPU: family 06, model 8c, stepping 01
526 12:48:32.217488 CPU: vendor Intel device 806c1
527 12:48:32.220689 CPU: family 06, model 8c, stepping 01
528 12:48:32.224327 Clearing out pending MCEs
529 12:48:32.227624 Clearing out pending MCEs
530 12:48:32.230901 Setting up local APIC...
531 12:48:32.231028 Initializing CPU #5
532 12:48:32.234194 Initializing CPU #4
533 12:48:32.237355 CPU: vendor Intel device 806c1
534 12:48:32.240605 CPU: family 06, model 8c, stepping 01
535 12:48:32.244130 CPU: vendor Intel device 806c1
536 12:48:32.247485 CPU: family 06, model 8c, stepping 01
537 12:48:32.250680 Clearing out pending MCEs
538 12:48:32.253927 Clearing out pending MCEs
539 12:48:32.254019 Setting up local APIC...
540 12:48:32.257217 CPU: vendor Intel device 806c1
541 12:48:32.263968 CPU: family 06, model 8c, stepping 01
542 12:48:32.264057 Clearing out pending MCEs
543 12:48:32.267205 Setting up local APIC...
544 12:48:32.270500 Setting up local APIC...
545 12:48:32.270586 Initializing CPU #7
546 12:48:32.273865 apic_id: 0x03 done.
547 12:48:32.277479 Initializing CPU #3
548 12:48:32.280398 CPU: vendor Intel device 806c1
549 12:48:32.284063 CPU: family 06, model 8c, stepping 01
550 12:48:32.287204 CPU: vendor Intel device 806c1
551 12:48:32.290495 CPU: family 06, model 8c, stepping 01
552 12:48:32.293663 Clearing out pending MCEs
553 12:48:32.293739 Clearing out pending MCEs
554 12:48:32.297223 Setting up local APIC...
555 12:48:32.300712 Setting up local APIC...
556 12:48:32.303638 microcode: Update skipped, already up-to-date
557 12:48:32.307434 apic_id: 0x02 done.
558 12:48:32.310472 CPU #2 initialized
559 12:48:32.313705 microcode: Update skipped, already up-to-date
560 12:48:32.317156 Setting up local APIC...
561 12:48:32.317294 apic_id: 0x04 done.
562 12:48:32.320412 apic_id: 0x05 done.
563 12:48:32.323721 microcode: Update skipped, already up-to-date
564 12:48:32.327282 apic_id: 0x01 done.
565 12:48:32.330631 apic_id: 0x07 done.
566 12:48:32.330718 apic_id: 0x06 done.
567 12:48:32.337155 microcode: Update skipped, already up-to-date
568 12:48:32.340409 microcode: Update skipped, already up-to-date
569 12:48:32.343666 CPU #3 initialized
570 12:48:32.343752 CPU #7 initialized
571 12:48:32.347237 CPU #6 initialized
572 12:48:32.350335 microcode: Update skipped, already up-to-date
573 12:48:32.353750 CPU #5 initialized
574 12:48:32.356906 microcode: Update skipped, already up-to-date
575 12:48:32.360213 CPU #1 initialized
576 12:48:32.360299 CPU #4 initialized
577 12:48:32.366997 bsp_do_flight_plan done after 454 msecs.
578 12:48:32.370206 CPU: frequency set to 4000 MHz
579 12:48:32.370295 Enabling SMIs.
580 12:48:32.376687 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 12:48:32.393115 SATAXPCIE1 indicates PCIe NVMe is present
582 12:48:32.396230 Probing TPM: done!
583 12:48:32.399960 Connected to device vid:did:rid of 1ae0:0028:00
584 12:48:32.410543 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
585 12:48:32.413852 Initialized TPM device CR50 revision 0
586 12:48:32.416919 Enabling S0i3.4
587 12:48:32.423748 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 12:48:32.426702 Found a VBT of 8704 bytes after decompression
589 12:48:32.433424 cse_lite: CSE RO boot. HybridStorageMode disabled
590 12:48:32.440224 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 12:48:32.515602 FSPS returned 0
592 12:48:32.519103 Executing Phase 1 of FspMultiPhaseSiInit
593 12:48:32.529028 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 12:48:32.532292 port C0 DISC req: usage 1 usb3 1 usb2 5
595 12:48:32.535330 Raw Buffer output 0 00000511
596 12:48:32.539055 Raw Buffer output 1 00000000
597 12:48:32.542776 pmc_send_ipc_cmd succeeded
598 12:48:32.549265 port C1 DISC req: usage 1 usb3 2 usb2 3
599 12:48:32.549356 Raw Buffer output 0 00000321
600 12:48:32.552641 Raw Buffer output 1 00000000
601 12:48:32.556503 pmc_send_ipc_cmd succeeded
602 12:48:32.561519 Detected 4 core, 8 thread CPU.
603 12:48:32.564896 Detected 4 core, 8 thread CPU.
604 12:48:32.799499 Display FSP Version Info HOB
605 12:48:32.802698 Reference Code - CPU = a.0.4c.31
606 12:48:32.806025 uCode Version = 0.0.0.86
607 12:48:32.809408 TXT ACM version = ff.ff.ff.ffff
608 12:48:32.812527 Reference Code - ME = a.0.4c.31
609 12:48:32.815882 MEBx version = 0.0.0.0
610 12:48:32.819160 ME Firmware Version = Consumer SKU
611 12:48:32.822652 Reference Code - PCH = a.0.4c.31
612 12:48:32.825847 PCH-CRID Status = Disabled
613 12:48:32.829317 PCH-CRID Original Value = ff.ff.ff.ffff
614 12:48:32.832563 PCH-CRID New Value = ff.ff.ff.ffff
615 12:48:32.835787 OPROM - RST - RAID = ff.ff.ff.ffff
616 12:48:32.839413 PCH Hsio Version = 4.0.0.0
617 12:48:32.842626 Reference Code - SA - System Agent = a.0.4c.31
618 12:48:32.846130 Reference Code - MRC = 2.0.0.1
619 12:48:32.849267 SA - PCIe Version = a.0.4c.31
620 12:48:32.852588 SA-CRID Status = Disabled
621 12:48:32.855598 SA-CRID Original Value = 0.0.0.1
622 12:48:32.859145 SA-CRID New Value = 0.0.0.1
623 12:48:32.862450 OPROM - VBIOS = ff.ff.ff.ffff
624 12:48:32.865622 IO Manageability Engine FW Version = 11.1.4.0
625 12:48:32.869231 PHY Build Version = 0.0.0.e0
626 12:48:32.872293 Thunderbolt(TM) FW Version = 0.0.0.0
627 12:48:32.879437 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
628 12:48:32.882628 ITSS IRQ Polarities Before:
629 12:48:32.882715 IPC0: 0xffffffff
630 12:48:32.885733 IPC1: 0xffffffff
631 12:48:32.885819 IPC2: 0xffffffff
632 12:48:32.888995 IPC3: 0xffffffff
633 12:48:32.892255 ITSS IRQ Polarities After:
634 12:48:32.892372 IPC0: 0xffffffff
635 12:48:32.895671 IPC1: 0xffffffff
636 12:48:32.895757 IPC2: 0xffffffff
637 12:48:32.899314 IPC3: 0xffffffff
638 12:48:32.902273 Found PCIe Root Port #9 at PCI: 00:1d.0.
639 12:48:32.915673 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
640 12:48:32.925598 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
641 12:48:32.939052 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
642 12:48:32.946059 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
643 12:48:32.946147 Enumerating buses...
644 12:48:32.952051 Show all devs... Before device enumeration.
645 12:48:32.952138 Root Device: enabled 1
646 12:48:32.955482 DOMAIN: 0000: enabled 1
647 12:48:32.959079 CPU_CLUSTER: 0: enabled 1
648 12:48:32.962310 PCI: 00:00.0: enabled 1
649 12:48:32.962397 PCI: 00:02.0: enabled 1
650 12:48:32.965528 PCI: 00:04.0: enabled 1
651 12:48:32.968821 PCI: 00:05.0: enabled 1
652 12:48:32.972025 PCI: 00:06.0: enabled 0
653 12:48:32.972112 PCI: 00:07.0: enabled 0
654 12:48:32.975461 PCI: 00:07.1: enabled 0
655 12:48:32.978745 PCI: 00:07.2: enabled 0
656 12:48:32.982154 PCI: 00:07.3: enabled 0
657 12:48:32.982242 PCI: 00:08.0: enabled 1
658 12:48:32.985147 PCI: 00:09.0: enabled 0
659 12:48:32.988502 PCI: 00:0a.0: enabled 0
660 12:48:32.992005 PCI: 00:0d.0: enabled 1
661 12:48:32.992097 PCI: 00:0d.1: enabled 0
662 12:48:32.995341 PCI: 00:0d.2: enabled 0
663 12:48:32.998750 PCI: 00:0d.3: enabled 0
664 12:48:33.001886 PCI: 00:0e.0: enabled 0
665 12:48:33.001963 PCI: 00:10.2: enabled 1
666 12:48:33.005432 PCI: 00:10.6: enabled 0
667 12:48:33.008600 PCI: 00:10.7: enabled 0
668 12:48:33.008680 PCI: 00:12.0: enabled 0
669 12:48:33.011899 PCI: 00:12.6: enabled 0
670 12:48:33.015208 PCI: 00:13.0: enabled 0
671 12:48:33.018748 PCI: 00:14.0: enabled 1
672 12:48:33.018837 PCI: 00:14.1: enabled 0
673 12:48:33.022103 PCI: 00:14.2: enabled 1
674 12:48:33.025351 PCI: 00:14.3: enabled 1
675 12:48:33.028533 PCI: 00:15.0: enabled 1
676 12:48:33.028609 PCI: 00:15.1: enabled 1
677 12:48:33.032331 PCI: 00:15.2: enabled 1
678 12:48:33.035410 PCI: 00:15.3: enabled 1
679 12:48:33.038587 PCI: 00:16.0: enabled 1
680 12:48:33.038671 PCI: 00:16.1: enabled 0
681 12:48:33.041783 PCI: 00:16.2: enabled 0
682 12:48:33.045044 PCI: 00:16.3: enabled 0
683 12:48:33.045124 PCI: 00:16.4: enabled 0
684 12:48:33.048617 PCI: 00:16.5: enabled 0
685 12:48:33.051880 PCI: 00:17.0: enabled 1
686 12:48:33.055414 PCI: 00:19.0: enabled 0
687 12:48:33.055500 PCI: 00:19.1: enabled 1
688 12:48:33.058521 PCI: 00:19.2: enabled 0
689 12:48:33.061748 PCI: 00:1c.0: enabled 1
690 12:48:33.065478 PCI: 00:1c.1: enabled 0
691 12:48:33.065565 PCI: 00:1c.2: enabled 0
692 12:48:33.068812 PCI: 00:1c.3: enabled 0
693 12:48:33.072059 PCI: 00:1c.4: enabled 0
694 12:48:33.075089 PCI: 00:1c.5: enabled 0
695 12:48:33.075175 PCI: 00:1c.6: enabled 1
696 12:48:33.078495 PCI: 00:1c.7: enabled 0
697 12:48:33.081667 PCI: 00:1d.0: enabled 1
698 12:48:33.085035 PCI: 00:1d.1: enabled 0
699 12:48:33.085122 PCI: 00:1d.2: enabled 1
700 12:48:33.088123 PCI: 00:1d.3: enabled 0
701 12:48:33.091888 PCI: 00:1e.0: enabled 1
702 12:48:33.091974 PCI: 00:1e.1: enabled 0
703 12:48:33.094849 PCI: 00:1e.2: enabled 1
704 12:48:33.098167 PCI: 00:1e.3: enabled 1
705 12:48:33.101794 PCI: 00:1f.0: enabled 1
706 12:48:33.101896 PCI: 00:1f.1: enabled 0
707 12:48:33.105123 PCI: 00:1f.2: enabled 1
708 12:48:33.108236 PCI: 00:1f.3: enabled 1
709 12:48:33.111602 PCI: 00:1f.4: enabled 0
710 12:48:33.111715 PCI: 00:1f.5: enabled 1
711 12:48:33.114652 PCI: 00:1f.6: enabled 0
712 12:48:33.118441 PCI: 00:1f.7: enabled 0
713 12:48:33.118541 APIC: 00: enabled 1
714 12:48:33.121393 GENERIC: 0.0: enabled 1
715 12:48:33.124760 GENERIC: 0.0: enabled 1
716 12:48:33.128445 GENERIC: 1.0: enabled 1
717 12:48:33.128544 GENERIC: 0.0: enabled 1
718 12:48:33.131810 GENERIC: 1.0: enabled 1
719 12:48:33.135102 USB0 port 0: enabled 1
720 12:48:33.138316 GENERIC: 0.0: enabled 1
721 12:48:33.138401 USB0 port 0: enabled 1
722 12:48:33.141485 GENERIC: 0.0: enabled 1
723 12:48:33.144624 I2C: 00:1a: enabled 1
724 12:48:33.144710 I2C: 00:31: enabled 1
725 12:48:33.148541 I2C: 00:32: enabled 1
726 12:48:33.151281 I2C: 00:10: enabled 1
727 12:48:33.151366 I2C: 00:15: enabled 1
728 12:48:33.154907 GENERIC: 0.0: enabled 0
729 12:48:33.157962 GENERIC: 1.0: enabled 0
730 12:48:33.161436 GENERIC: 0.0: enabled 1
731 12:48:33.161526 SPI: 00: enabled 1
732 12:48:33.164560 SPI: 00: enabled 1
733 12:48:33.164661 PNP: 0c09.0: enabled 1
734 12:48:33.167917 GENERIC: 0.0: enabled 1
735 12:48:33.171416 USB3 port 0: enabled 1
736 12:48:33.174758 USB3 port 1: enabled 1
737 12:48:33.174843 USB3 port 2: enabled 0
738 12:48:33.178120 USB3 port 3: enabled 0
739 12:48:33.181154 USB2 port 0: enabled 0
740 12:48:33.181254 USB2 port 1: enabled 1
741 12:48:33.184738 USB2 port 2: enabled 1
742 12:48:33.188192 USB2 port 3: enabled 0
743 12:48:33.191359 USB2 port 4: enabled 1
744 12:48:33.191444 USB2 port 5: enabled 0
745 12:48:33.194534 USB2 port 6: enabled 0
746 12:48:33.198141 USB2 port 7: enabled 0
747 12:48:33.198226 USB2 port 8: enabled 0
748 12:48:33.201446 USB2 port 9: enabled 0
749 12:48:33.204503 USB3 port 0: enabled 0
750 12:48:33.204589 USB3 port 1: enabled 1
751 12:48:33.207828 USB3 port 2: enabled 0
752 12:48:33.211540 USB3 port 3: enabled 0
753 12:48:33.214642 GENERIC: 0.0: enabled 1
754 12:48:33.214727 GENERIC: 1.0: enabled 1
755 12:48:33.217895 APIC: 01: enabled 1
756 12:48:33.221152 APIC: 03: enabled 1
757 12:48:33.221237 APIC: 07: enabled 1
758 12:48:33.224584 APIC: 05: enabled 1
759 12:48:33.224670 APIC: 04: enabled 1
760 12:48:33.227998 APIC: 02: enabled 1
761 12:48:33.231262 APIC: 06: enabled 1
762 12:48:33.231347 Compare with tree...
763 12:48:33.234690 Root Device: enabled 1
764 12:48:33.237770 DOMAIN: 0000: enabled 1
765 12:48:33.241193 PCI: 00:00.0: enabled 1
766 12:48:33.241278 PCI: 00:02.0: enabled 1
767 12:48:33.244705 PCI: 00:04.0: enabled 1
768 12:48:33.247920 GENERIC: 0.0: enabled 1
769 12:48:33.251108 PCI: 00:05.0: enabled 1
770 12:48:33.254257 PCI: 00:06.0: enabled 0
771 12:48:33.254333 PCI: 00:07.0: enabled 0
772 12:48:33.257504 GENERIC: 0.0: enabled 1
773 12:48:33.260720 PCI: 00:07.1: enabled 0
774 12:48:33.264161 GENERIC: 1.0: enabled 1
775 12:48:33.267647 PCI: 00:07.2: enabled 0
776 12:48:33.267718 GENERIC: 0.0: enabled 1
777 12:48:33.271092 PCI: 00:07.3: enabled 0
778 12:48:33.274169 GENERIC: 1.0: enabled 1
779 12:48:33.277666 PCI: 00:08.0: enabled 1
780 12:48:33.280923 PCI: 00:09.0: enabled 0
781 12:48:33.281001 PCI: 00:0a.0: enabled 0
782 12:48:33.284343 PCI: 00:0d.0: enabled 1
783 12:48:33.287522 USB0 port 0: enabled 1
784 12:48:33.291150 USB3 port 0: enabled 1
785 12:48:33.294534 USB3 port 1: enabled 1
786 12:48:33.297434 USB3 port 2: enabled 0
787 12:48:33.297519 USB3 port 3: enabled 0
788 12:48:33.300633 PCI: 00:0d.1: enabled 0
789 12:48:33.304088 PCI: 00:0d.2: enabled 0
790 12:48:33.307373 GENERIC: 0.0: enabled 1
791 12:48:33.310946 PCI: 00:0d.3: enabled 0
792 12:48:33.311068 PCI: 00:0e.0: enabled 0
793 12:48:33.314339 PCI: 00:10.2: enabled 1
794 12:48:33.317220 PCI: 00:10.6: enabled 0
795 12:48:33.321159 PCI: 00:10.7: enabled 0
796 12:48:33.321244 PCI: 00:12.0: enabled 0
797 12:48:33.324995 PCI: 00:12.6: enabled 0
798 12:48:33.329094 PCI: 00:13.0: enabled 0
799 12:48:33.332089 PCI: 00:14.0: enabled 1
800 12:48:33.332174 USB0 port 0: enabled 1
801 12:48:33.335539 USB2 port 0: enabled 0
802 12:48:33.338622 USB2 port 1: enabled 1
803 12:48:33.342097 USB2 port 2: enabled 1
804 12:48:33.345228 USB2 port 3: enabled 0
805 12:48:33.345314 USB2 port 4: enabled 1
806 12:48:33.348867 USB2 port 5: enabled 0
807 12:48:33.352021 USB2 port 6: enabled 0
808 12:48:33.355384 USB2 port 7: enabled 0
809 12:48:33.358889 USB2 port 8: enabled 0
810 12:48:33.408577 USB2 port 9: enabled 0
811 12:48:33.408670 USB3 port 0: enabled 0
812 12:48:33.408740 USB3 port 1: enabled 1
813 12:48:33.409074 USB3 port 2: enabled 0
814 12:48:33.409173 USB3 port 3: enabled 0
815 12:48:33.409248 PCI: 00:14.1: enabled 0
816 12:48:33.409324 PCI: 00:14.2: enabled 1
817 12:48:33.409593 PCI: 00:14.3: enabled 1
818 12:48:33.409689 GENERIC: 0.0: enabled 1
819 12:48:33.409751 PCI: 00:15.0: enabled 1
820 12:48:33.409810 I2C: 00:1a: enabled 1
821 12:48:33.409869 I2C: 00:31: enabled 1
822 12:48:33.409927 I2C: 00:32: enabled 1
823 12:48:33.409984 PCI: 00:15.1: enabled 1
824 12:48:33.410041 I2C: 00:10: enabled 1
825 12:48:33.410099 PCI: 00:15.2: enabled 1
826 12:48:33.410157 PCI: 00:15.3: enabled 1
827 12:48:33.410396 PCI: 00:16.0: enabled 1
828 12:48:33.410459 PCI: 00:16.1: enabled 0
829 12:48:33.458530 PCI: 00:16.2: enabled 0
830 12:48:33.458635 PCI: 00:16.3: enabled 0
831 12:48:33.458741 PCI: 00:16.4: enabled 0
832 12:48:33.459006 PCI: 00:16.5: enabled 0
833 12:48:33.459077 PCI: 00:17.0: enabled 1
834 12:48:33.459139 PCI: 00:19.0: enabled 0
835 12:48:33.459199 PCI: 00:19.1: enabled 1
836 12:48:33.459257 I2C: 00:15: enabled 1
837 12:48:33.459496 PCI: 00:19.2: enabled 0
838 12:48:33.459559 PCI: 00:1d.0: enabled 1
839 12:48:33.459621 GENERIC: 0.0: enabled 1
840 12:48:33.459678 PCI: 00:1e.0: enabled 1
841 12:48:33.460146 PCI: 00:1e.1: enabled 0
842 12:48:33.460231 PCI: 00:1e.2: enabled 1
843 12:48:33.460299 SPI: 00: enabled 1
844 12:48:33.460546 PCI: 00:1e.3: enabled 1
845 12:48:33.460612 SPI: 00: enabled 1
846 12:48:33.460854 PCI: 00:1f.0: enabled 1
847 12:48:33.460920 PNP: 0c09.0: enabled 1
848 12:48:33.460980 PCI: 00:1f.1: enabled 0
849 12:48:33.510230 PCI: 00:1f.2: enabled 1
850 12:48:33.510321 GENERIC: 0.0: enabled 1
851 12:48:33.510574 GENERIC: 0.0: enabled 1
852 12:48:33.510643 GENERIC: 1.0: enabled 1
853 12:48:33.510708 PCI: 00:1f.3: enabled 1
854 12:48:33.510768 PCI: 00:1f.4: enabled 0
855 12:48:33.510828 PCI: 00:1f.5: enabled 1
856 12:48:33.511086 PCI: 00:1f.6: enabled 0
857 12:48:33.511194 PCI: 00:1f.7: enabled 0
858 12:48:33.511258 CPU_CLUSTER: 0: enabled 1
859 12:48:33.511318 APIC: 00: enabled 1
860 12:48:33.511376 APIC: 01: enabled 1
861 12:48:33.511616 APIC: 03: enabled 1
862 12:48:33.511679 APIC: 07: enabled 1
863 12:48:33.511920 APIC: 05: enabled 1
864 12:48:33.511984 APIC: 04: enabled 1
865 12:48:33.512042 APIC: 02: enabled 1
866 12:48:33.512099 APIC: 06: enabled 1
867 12:48:33.512155 Root Device scanning...
868 12:48:33.523507 scan_static_bus for Root Device
869 12:48:33.523594 DOMAIN: 0000 enabled
870 12:48:33.523662 CPU_CLUSTER: 0 enabled
871 12:48:33.523909 DOMAIN: 0000 scanning...
872 12:48:33.523977 PCI: pci_scan_bus for bus 00
873 12:48:33.526596 PCI: 00:00.0 [8086/0000] ops
874 12:48:33.529777 PCI: 00:00.0 [8086/9a12] enabled
875 12:48:33.533211 PCI: 00:02.0 [8086/0000] bus ops
876 12:48:33.536713 PCI: 00:02.0 [8086/9a40] enabled
877 12:48:33.539958 PCI: 00:04.0 [8086/0000] bus ops
878 12:48:33.543146 PCI: 00:04.0 [8086/9a03] enabled
879 12:48:33.546589 PCI: 00:05.0 [8086/9a19] enabled
880 12:48:33.549820 PCI: 00:07.0 [0000/0000] hidden
881 12:48:33.553027 PCI: 00:08.0 [8086/9a11] enabled
882 12:48:33.556602 PCI: 00:0a.0 [8086/9a0d] disabled
883 12:48:33.559726 PCI: 00:0d.0 [8086/0000] bus ops
884 12:48:33.563432 PCI: 00:0d.0 [8086/9a13] enabled
885 12:48:33.566704 PCI: 00:14.0 [8086/0000] bus ops
886 12:48:33.570120 PCI: 00:14.0 [8086/a0ed] enabled
887 12:48:33.573340 PCI: 00:14.2 [8086/a0ef] enabled
888 12:48:33.576580 PCI: 00:14.3 [8086/0000] bus ops
889 12:48:33.579654 PCI: 00:14.3 [8086/a0f0] enabled
890 12:48:33.583307 PCI: 00:15.0 [8086/0000] bus ops
891 12:48:33.586634 PCI: 00:15.0 [8086/a0e8] enabled
892 12:48:33.589647 PCI: 00:15.1 [8086/0000] bus ops
893 12:48:33.592940 PCI: 00:15.1 [8086/a0e9] enabled
894 12:48:33.596402 PCI: 00:15.2 [8086/0000] bus ops
895 12:48:33.599714 PCI: 00:15.2 [8086/a0ea] enabled
896 12:48:33.603230 PCI: 00:15.3 [8086/0000] bus ops
897 12:48:33.606455 PCI: 00:15.3 [8086/a0eb] enabled
898 12:48:33.609794 PCI: 00:16.0 [8086/0000] ops
899 12:48:33.612955 PCI: 00:16.0 [8086/a0e0] enabled
900 12:48:33.616540 PCI: Static device PCI: 00:17.0 not found, disabling it.
901 12:48:33.619925 PCI: 00:19.0 [8086/0000] bus ops
902 12:48:33.623139 PCI: 00:19.0 [8086/a0c5] disabled
903 12:48:33.626263 PCI: 00:19.1 [8086/0000] bus ops
904 12:48:33.629777 PCI: 00:19.1 [8086/a0c6] enabled
905 12:48:33.633133 PCI: 00:1d.0 [8086/0000] bus ops
906 12:48:33.636786 PCI: 00:1d.0 [8086/a0b0] enabled
907 12:48:33.639679 PCI: 00:1e.0 [8086/0000] ops
908 12:48:33.643173 PCI: 00:1e.0 [8086/a0a8] enabled
909 12:48:33.646247 PCI: 00:1e.2 [8086/0000] bus ops
910 12:48:33.649587 PCI: 00:1e.2 [8086/a0aa] enabled
911 12:48:33.652875 PCI: 00:1e.3 [8086/0000] bus ops
912 12:48:33.656183 PCI: 00:1e.3 [8086/a0ab] enabled
913 12:48:33.659820 PCI: 00:1f.0 [8086/0000] bus ops
914 12:48:33.662843 PCI: 00:1f.0 [8086/a087] enabled
915 12:48:33.666109 RTC Init
916 12:48:33.669378 Set power on after power failure.
917 12:48:33.669458 Disabling Deep S3
918 12:48:33.672691 Disabling Deep S3
919 12:48:33.672766 Disabling Deep S4
920 12:48:33.675922 Disabling Deep S4
921 12:48:33.679170 Disabling Deep S5
922 12:48:33.679244 Disabling Deep S5
923 12:48:33.683008 PCI: 00:1f.2 [0000/0000] hidden
924 12:48:33.686326 PCI: 00:1f.3 [8086/0000] bus ops
925 12:48:33.689403 PCI: 00:1f.3 [8086/a0c8] enabled
926 12:48:33.693101 PCI: 00:1f.5 [8086/0000] bus ops
927 12:48:33.696066 PCI: 00:1f.5 [8086/a0a4] enabled
928 12:48:33.699433 PCI: Leftover static devices:
929 12:48:33.699509 PCI: 00:10.2
930 12:48:33.702854 PCI: 00:10.6
931 12:48:33.702943 PCI: 00:10.7
932 12:48:33.706400 PCI: 00:06.0
933 12:48:33.706487 PCI: 00:07.1
934 12:48:33.709247 PCI: 00:07.2
935 12:48:33.709338 PCI: 00:07.3
936 12:48:33.709440 PCI: 00:09.0
937 12:48:33.712804 PCI: 00:0d.1
938 12:48:33.712891 PCI: 00:0d.2
939 12:48:33.716049 PCI: 00:0d.3
940 12:48:33.716136 PCI: 00:0e.0
941 12:48:33.716206 PCI: 00:12.0
942 12:48:33.719569 PCI: 00:12.6
943 12:48:33.719651 PCI: 00:13.0
944 12:48:33.722769 PCI: 00:14.1
945 12:48:33.722844 PCI: 00:16.1
946 12:48:33.722908 PCI: 00:16.2
947 12:48:33.726111 PCI: 00:16.3
948 12:48:33.726184 PCI: 00:16.4
949 12:48:33.729220 PCI: 00:16.5
950 12:48:33.729306 PCI: 00:17.0
951 12:48:33.732932 PCI: 00:19.2
952 12:48:33.733019 PCI: 00:1e.1
953 12:48:33.733087 PCI: 00:1f.1
954 12:48:33.736038 PCI: 00:1f.4
955 12:48:33.736125 PCI: 00:1f.6
956 12:48:33.739256 PCI: 00:1f.7
957 12:48:33.742608 PCI: Check your devicetree.cb.
958 12:48:33.742695 PCI: 00:02.0 scanning...
959 12:48:33.746104 scan_generic_bus for PCI: 00:02.0
960 12:48:33.752651 scan_generic_bus for PCI: 00:02.0 done
961 12:48:33.755756 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
962 12:48:33.759422 PCI: 00:04.0 scanning...
963 12:48:33.762744 scan_generic_bus for PCI: 00:04.0
964 12:48:33.762829 GENERIC: 0.0 enabled
965 12:48:33.769488 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
966 12:48:33.776045 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
967 12:48:33.779336 PCI: 00:0d.0 scanning...
968 12:48:33.782589 scan_static_bus for PCI: 00:0d.0
969 12:48:33.782674 USB0 port 0 enabled
970 12:48:33.785923 USB0 port 0 scanning...
971 12:48:33.789118 scan_static_bus for USB0 port 0
972 12:48:33.792359 USB3 port 0 enabled
973 12:48:33.792445 USB3 port 1 enabled
974 12:48:33.795839 USB3 port 2 disabled
975 12:48:33.798875 USB3 port 3 disabled
976 12:48:33.798982 USB3 port 0 scanning...
977 12:48:33.802142 scan_static_bus for USB3 port 0
978 12:48:33.805805 scan_static_bus for USB3 port 0 done
979 12:48:33.812535 scan_bus: bus USB3 port 0 finished in 6 msecs
980 12:48:33.815542 USB3 port 1 scanning...
981 12:48:33.818679 scan_static_bus for USB3 port 1
982 12:48:33.822059 scan_static_bus for USB3 port 1 done
983 12:48:33.825308 scan_bus: bus USB3 port 1 finished in 6 msecs
984 12:48:33.828657 scan_static_bus for USB0 port 0 done
985 12:48:33.835621 scan_bus: bus USB0 port 0 finished in 43 msecs
986 12:48:33.838754 scan_static_bus for PCI: 00:0d.0 done
987 12:48:33.841984 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
988 12:48:33.845448 PCI: 00:14.0 scanning...
989 12:48:33.848579 scan_static_bus for PCI: 00:14.0
990 12:48:33.852017 USB0 port 0 enabled
991 12:48:33.852114 USB0 port 0 scanning...
992 12:48:33.855452 scan_static_bus for USB0 port 0
993 12:48:33.858746 USB2 port 0 disabled
994 12:48:33.861948 USB2 port 1 enabled
995 12:48:33.862041 USB2 port 2 enabled
996 12:48:33.865324 USB2 port 3 disabled
997 12:48:33.868987 USB2 port 4 enabled
998 12:48:33.869063 USB2 port 5 disabled
999 12:48:33.871999 USB2 port 6 disabled
1000 12:48:33.875209 USB2 port 7 disabled
1001 12:48:33.875283 USB2 port 8 disabled
1002 12:48:33.878577 USB2 port 9 disabled
1003 12:48:33.881689 USB3 port 0 disabled
1004 12:48:33.881765 USB3 port 1 enabled
1005 12:48:33.885031 USB3 port 2 disabled
1006 12:48:33.885105 USB3 port 3 disabled
1007 12:48:33.888496 USB2 port 1 scanning...
1008 12:48:33.892176 scan_static_bus for USB2 port 1
1009 12:48:33.895344 scan_static_bus for USB2 port 1 done
1010 12:48:33.902972 scan_bus: bus USB2 port 1 finished in 6 msecs
1011 12:48:33.903089 USB2 port 2 scanning...
1012 12:48:33.905839 scan_static_bus for USB2 port 2
1013 12:48:33.909160 scan_static_bus for USB2 port 2 done
1014 12:48:33.916304 scan_bus: bus USB2 port 2 finished in 6 msecs
1015 12:48:33.916411 USB2 port 4 scanning...
1016 12:48:33.919743 scan_static_bus for USB2 port 4
1017 12:48:33.926531 scan_static_bus for USB2 port 4 done
1018 12:48:33.929464 scan_bus: bus USB2 port 4 finished in 6 msecs
1019 12:48:33.932740 USB3 port 1 scanning...
1020 12:48:33.936100 scan_static_bus for USB3 port 1
1021 12:48:33.939368 scan_static_bus for USB3 port 1 done
1022 12:48:33.942914 scan_bus: bus USB3 port 1 finished in 6 msecs
1023 12:48:33.946024 scan_static_bus for USB0 port 0 done
1024 12:48:33.952601 scan_bus: bus USB0 port 0 finished in 93 msecs
1025 12:48:33.955764 scan_static_bus for PCI: 00:14.0 done
1026 12:48:33.959503 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1027 12:48:33.962487 PCI: 00:14.3 scanning...
1028 12:48:33.966139 scan_static_bus for PCI: 00:14.3
1029 12:48:33.969136 GENERIC: 0.0 enabled
1030 12:48:33.972661 scan_static_bus for PCI: 00:14.3 done
1031 12:48:33.975825 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1032 12:48:33.979022 PCI: 00:15.0 scanning...
1033 12:48:33.982422 scan_static_bus for PCI: 00:15.0
1034 12:48:33.985610 I2C: 00:1a enabled
1035 12:48:33.985703 I2C: 00:31 enabled
1036 12:48:33.988868 I2C: 00:32 enabled
1037 12:48:33.992235 scan_static_bus for PCI: 00:15.0 done
1038 12:48:33.999228 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1039 12:48:33.999313 PCI: 00:15.1 scanning...
1040 12:48:34.002577 scan_static_bus for PCI: 00:15.1
1041 12:48:34.005777 I2C: 00:10 enabled
1042 12:48:34.009335 scan_static_bus for PCI: 00:15.1 done
1043 12:48:34.015584 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1044 12:48:34.015671 PCI: 00:15.2 scanning...
1045 12:48:34.019206 scan_static_bus for PCI: 00:15.2
1046 12:48:34.025598 scan_static_bus for PCI: 00:15.2 done
1047 12:48:34.028827 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1048 12:48:34.032287 PCI: 00:15.3 scanning...
1049 12:48:34.035539 scan_static_bus for PCI: 00:15.3
1050 12:48:34.039007 scan_static_bus for PCI: 00:15.3 done
1051 12:48:34.042310 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1052 12:48:34.045530 PCI: 00:19.1 scanning...
1053 12:48:34.048740 scan_static_bus for PCI: 00:19.1
1054 12:48:34.052025 I2C: 00:15 enabled
1055 12:48:34.055319 scan_static_bus for PCI: 00:19.1 done
1056 12:48:34.059113 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1057 12:48:34.062158 PCI: 00:1d.0 scanning...
1058 12:48:34.065328 do_pci_scan_bridge for PCI: 00:1d.0
1059 12:48:34.069169 PCI: pci_scan_bus for bus 01
1060 12:48:34.072264 PCI: 01:00.0 [1c5c/174a] enabled
1061 12:48:34.075533 GENERIC: 0.0 enabled
1062 12:48:34.078695 Enabling Common Clock Configuration
1063 12:48:34.082451 L1 Sub-State supported from root port 29
1064 12:48:34.085567 L1 Sub-State Support = 0xf
1065 12:48:34.088912 CommonModeRestoreTime = 0x28
1066 12:48:34.092122 Power On Value = 0x16, Power On Scale = 0x0
1067 12:48:34.095589 ASPM: Enabled L1
1068 12:48:34.098782 PCIe: Max_Payload_Size adjusted to 128
1069 12:48:34.102130 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1070 12:48:34.105440 PCI: 00:1e.2 scanning...
1071 12:48:34.108573 scan_generic_bus for PCI: 00:1e.2
1072 12:48:34.112376 SPI: 00 enabled
1073 12:48:34.118936 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1074 12:48:34.122237 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1075 12:48:34.125637 PCI: 00:1e.3 scanning...
1076 12:48:34.128870 scan_generic_bus for PCI: 00:1e.3
1077 12:48:34.128949 SPI: 00 enabled
1078 12:48:34.135541 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1079 12:48:34.142087 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1080 12:48:34.142175 PCI: 00:1f.0 scanning...
1081 12:48:34.145463 scan_static_bus for PCI: 00:1f.0
1082 12:48:34.148808 PNP: 0c09.0 enabled
1083 12:48:34.152154 PNP: 0c09.0 scanning...
1084 12:48:34.155613 scan_static_bus for PNP: 0c09.0
1085 12:48:34.158882 scan_static_bus for PNP: 0c09.0 done
1086 12:48:34.162009 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1087 12:48:34.169065 scan_static_bus for PCI: 00:1f.0 done
1088 12:48:34.172324 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1089 12:48:34.175539 PCI: 00:1f.2 scanning...
1090 12:48:34.178821 scan_static_bus for PCI: 00:1f.2
1091 12:48:34.178899 GENERIC: 0.0 enabled
1092 12:48:34.182257 GENERIC: 0.0 scanning...
1093 12:48:34.185578 scan_static_bus for GENERIC: 0.0
1094 12:48:34.188719 GENERIC: 0.0 enabled
1095 12:48:34.191990 GENERIC: 1.0 enabled
1096 12:48:34.195198 scan_static_bus for GENERIC: 0.0 done
1097 12:48:34.198576 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1098 12:48:34.201715 scan_static_bus for PCI: 00:1f.2 done
1099 12:48:34.208690 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1100 12:48:34.211983 PCI: 00:1f.3 scanning...
1101 12:48:34.215125 scan_static_bus for PCI: 00:1f.3
1102 12:48:34.218389 scan_static_bus for PCI: 00:1f.3 done
1103 12:48:34.221656 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1104 12:48:34.225468 PCI: 00:1f.5 scanning...
1105 12:48:34.228596 scan_generic_bus for PCI: 00:1f.5
1106 12:48:34.231653 scan_generic_bus for PCI: 00:1f.5 done
1107 12:48:34.238260 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1108 12:48:34.241894 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1109 12:48:34.245504 scan_static_bus for Root Device done
1110 12:48:34.251626 scan_bus: bus Root Device finished in 737 msecs
1111 12:48:34.251712 done
1112 12:48:34.258421 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1113 12:48:34.261729 Chrome EC: UHEPI supported
1114 12:48:34.268079 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1115 12:48:34.274937 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1116 12:48:34.278354 SPI flash protection: WPSW=0 SRP0=0
1117 12:48:34.281769 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1118 12:48:34.288424 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1119 12:48:34.291359 found VGA at PCI: 00:02.0
1120 12:48:34.294711 Setting up VGA for PCI: 00:02.0
1121 12:48:34.298248 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1122 12:48:34.304794 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1123 12:48:34.308074 Allocating resources...
1124 12:48:34.308160 Reading resources...
1125 12:48:34.314528 Root Device read_resources bus 0 link: 0
1126 12:48:34.317909 DOMAIN: 0000 read_resources bus 0 link: 0
1127 12:48:34.321063 PCI: 00:04.0 read_resources bus 1 link: 0
1128 12:48:34.328572 PCI: 00:04.0 read_resources bus 1 link: 0 done
1129 12:48:34.331791 PCI: 00:0d.0 read_resources bus 0 link: 0
1130 12:48:34.338414 USB0 port 0 read_resources bus 0 link: 0
1131 12:48:34.341653 USB0 port 0 read_resources bus 0 link: 0 done
1132 12:48:34.348242 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1133 12:48:34.351467 PCI: 00:14.0 read_resources bus 0 link: 0
1134 12:48:34.354907 USB0 port 0 read_resources bus 0 link: 0
1135 12:48:34.362418 USB0 port 0 read_resources bus 0 link: 0 done
1136 12:48:34.365737 PCI: 00:14.0 read_resources bus 0 link: 0 done
1137 12:48:34.372771 PCI: 00:14.3 read_resources bus 0 link: 0
1138 12:48:34.375986 PCI: 00:14.3 read_resources bus 0 link: 0 done
1139 12:48:34.382629 PCI: 00:15.0 read_resources bus 0 link: 0
1140 12:48:34.385950 PCI: 00:15.0 read_resources bus 0 link: 0 done
1141 12:48:34.392779 PCI: 00:15.1 read_resources bus 0 link: 0
1142 12:48:34.395938 PCI: 00:15.1 read_resources bus 0 link: 0 done
1143 12:48:34.403441 PCI: 00:19.1 read_resources bus 0 link: 0
1144 12:48:34.406369 PCI: 00:19.1 read_resources bus 0 link: 0 done
1145 12:48:34.412798 PCI: 00:1d.0 read_resources bus 1 link: 0
1146 12:48:34.416162 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1147 12:48:34.423176 PCI: 00:1e.2 read_resources bus 2 link: 0
1148 12:48:34.426477 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1149 12:48:34.433331 PCI: 00:1e.3 read_resources bus 3 link: 0
1150 12:48:34.436370 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1151 12:48:34.443150 PCI: 00:1f.0 read_resources bus 0 link: 0
1152 12:48:34.446406 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1153 12:48:34.452798 PCI: 00:1f.2 read_resources bus 0 link: 0
1154 12:48:34.456353 GENERIC: 0.0 read_resources bus 0 link: 0
1155 12:48:34.459518 GENERIC: 0.0 read_resources bus 0 link: 0 done
1156 12:48:34.466327 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1157 12:48:34.473030 DOMAIN: 0000 read_resources bus 0 link: 0 done
1158 12:48:34.476532 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1159 12:48:34.483163 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1160 12:48:34.486414 Root Device read_resources bus 0 link: 0 done
1161 12:48:34.489596 Done reading resources.
1162 12:48:34.492783 Show resources in subtree (Root Device)...After reading.
1163 12:48:34.499705 Root Device child on link 0 DOMAIN: 0000
1164 12:48:34.502926 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1165 12:48:34.512605 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1166 12:48:34.522913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1167 12:48:34.523026 PCI: 00:00.0
1168 12:48:34.532772 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1169 12:48:34.542862 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1170 12:48:34.552456 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1171 12:48:34.562657 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1172 12:48:34.572569 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1173 12:48:34.579420 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1174 12:48:34.589207 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1175 12:48:34.598753 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1176 12:48:34.609043 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1177 12:48:34.618819 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1178 12:48:34.625809 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1179 12:48:34.635495 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1180 12:48:34.645757 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1181 12:48:34.655617 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1182 12:48:34.665260 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1183 12:48:34.675340 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1184 12:48:34.685100 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1185 12:48:34.692005 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1186 12:48:34.701872 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1187 12:48:34.711497 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1188 12:48:34.715280 PCI: 00:02.0
1189 12:48:34.725221 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 12:48:34.734762 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1191 12:48:34.741303 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1192 12:48:34.748377 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1193 12:48:34.758471 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1194 12:48:34.758559 GENERIC: 0.0
1195 12:48:34.761635 PCI: 00:05.0
1196 12:48:34.771707 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1197 12:48:34.774946 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1198 12:48:34.778358 GENERIC: 0.0
1199 12:48:34.778444 PCI: 00:08.0
1200 12:48:34.788078 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:48:34.791374 PCI: 00:0a.0
1202 12:48:34.794854 PCI: 00:0d.0 child on link 0 USB0 port 0
1203 12:48:34.804976 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 12:48:34.808070 USB0 port 0 child on link 0 USB3 port 0
1205 12:48:34.811532 USB3 port 0
1206 12:48:34.811611 USB3 port 1
1207 12:48:34.814760 USB3 port 2
1208 12:48:34.818084 USB3 port 3
1209 12:48:34.821319 PCI: 00:14.0 child on link 0 USB0 port 0
1210 12:48:34.831584 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1211 12:48:34.834751 USB0 port 0 child on link 0 USB2 port 0
1212 12:48:34.837920 USB2 port 0
1213 12:48:34.837996 USB2 port 1
1214 12:48:34.841348 USB2 port 2
1215 12:48:34.841433 USB2 port 3
1216 12:48:34.845101 USB2 port 4
1217 12:48:34.845188 USB2 port 5
1218 12:48:34.848181 USB2 port 6
1219 12:48:34.848267 USB2 port 7
1220 12:48:34.851301 USB2 port 8
1221 12:48:34.851388 USB2 port 9
1222 12:48:34.854565 USB3 port 0
1223 12:48:34.858146 USB3 port 1
1224 12:48:34.858232 USB3 port 2
1225 12:48:34.861424 USB3 port 3
1226 12:48:34.861510 PCI: 00:14.2
1227 12:48:34.871295 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 12:48:34.881573 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1229 12:48:34.884778 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1230 12:48:34.894526 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 12:48:34.897867 GENERIC: 0.0
1232 12:48:34.901199 PCI: 00:15.0 child on link 0 I2C: 00:1a
1233 12:48:34.911457 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:48:34.914797 I2C: 00:1a
1235 12:48:34.914884 I2C: 00:31
1236 12:48:34.917864 I2C: 00:32
1237 12:48:34.921150 PCI: 00:15.1 child on link 0 I2C: 00:10
1238 12:48:34.930943 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:48:34.931066 I2C: 00:10
1240 12:48:34.934762 PCI: 00:15.2
1241 12:48:34.944611 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:48:34.944699 PCI: 00:15.3
1243 12:48:34.954241 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 12:48:34.957565 PCI: 00:16.0
1245 12:48:34.967687 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 12:48:34.967774 PCI: 00:19.0
1247 12:48:34.974130 PCI: 00:19.1 child on link 0 I2C: 00:15
1248 12:48:34.984361 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:48:34.984449 I2C: 00:15
1250 12:48:34.990866 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1251 12:48:34.997583 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1252 12:48:35.007600 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1253 12:48:35.017473 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1254 12:48:35.017560 GENERIC: 0.0
1255 12:48:35.020676 PCI: 01:00.0
1256 12:48:35.030485 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1257 12:48:35.040399 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1258 12:48:35.050722 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1259 12:48:35.050809 PCI: 00:1e.0
1260 12:48:35.060735 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 12:48:35.066949 PCI: 00:1e.2 child on link 0 SPI: 00
1262 12:48:35.077049 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:48:35.077136 SPI: 00
1264 12:48:35.080709 PCI: 00:1e.3 child on link 0 SPI: 00
1265 12:48:35.090422 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 12:48:35.093911 SPI: 00
1267 12:48:35.097020 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 12:48:35.107152 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 12:48:35.107239 PNP: 0c09.0
1270 12:48:35.116736 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 12:48:35.120116 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 12:48:35.130498 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 12:48:35.140127 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 12:48:35.143401 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 12:48:35.146925 GENERIC: 0.0
1276 12:48:35.147049 GENERIC: 1.0
1277 12:48:35.150223 PCI: 00:1f.3
1278 12:48:35.159936 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 12:48:35.170131 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 12:48:35.170219 PCI: 00:1f.5
1281 12:48:35.179751 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 12:48:35.183360 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 12:48:35.186547 APIC: 00
1284 12:48:35.186634 APIC: 01
1285 12:48:35.186716 APIC: 03
1286 12:48:35.189950 APIC: 07
1287 12:48:35.190036 APIC: 05
1288 12:48:35.193215 APIC: 04
1289 12:48:35.193300 APIC: 02
1290 12:48:35.193368 APIC: 06
1291 12:48:35.203699 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 12:48:35.206500 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 12:48:35.213331 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 12:48:35.219953 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 12:48:35.223282 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 12:48:35.229952 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1297 12:48:35.233210 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1298 12:48:35.239619 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1299 12:48:35.246505 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1300 12:48:35.256436 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1301 12:48:35.263024 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1302 12:48:35.269484 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1303 12:48:35.276053 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1304 12:48:35.282868 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1305 12:48:35.289593 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1306 12:48:35.292677 DOMAIN: 0000: Resource ranges:
1307 12:48:35.295972 * Base: 1000, Size: 800, Tag: 100
1308 12:48:35.302472 * Base: 1900, Size: e700, Tag: 100
1309 12:48:35.306045 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1310 12:48:35.312842 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1311 12:48:35.319326 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1312 12:48:35.329384 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1313 12:48:35.335984 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1314 12:48:35.342462 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1315 12:48:35.352744 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1316 12:48:35.359314 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1317 12:48:35.365940 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1318 12:48:35.375934 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1319 12:48:35.382192 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1320 12:48:35.389354 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1321 12:48:35.395753 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1322 12:48:35.405526 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1323 12:48:35.412271 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1324 12:48:35.418914 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1325 12:48:35.428835 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1326 12:48:35.435314 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1327 12:48:35.442206 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1328 12:48:35.452044 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1329 12:48:35.458604 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1330 12:48:35.465344 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1331 12:48:35.475512 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1332 12:48:35.481787 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1333 12:48:35.488386 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1334 12:48:35.491704 DOMAIN: 0000: Resource ranges:
1335 12:48:35.498384 * Base: 7fc00000, Size: 40400000, Tag: 200
1336 12:48:35.501691 * Base: d0000000, Size: 28000000, Tag: 200
1337 12:48:35.504837 * Base: fa000000, Size: 1000000, Tag: 200
1338 12:48:35.511841 * Base: fb001000, Size: 2fff000, Tag: 200
1339 12:48:35.515155 * Base: fe010000, Size: 2e000, Tag: 200
1340 12:48:35.518316 * Base: fe03f000, Size: d41000, Tag: 200
1341 12:48:35.521528 * Base: fed88000, Size: 8000, Tag: 200
1342 12:48:35.527972 * Base: fed93000, Size: d000, Tag: 200
1343 12:48:35.531611 * Base: feda2000, Size: 1e000, Tag: 200
1344 12:48:35.534782 * Base: fede0000, Size: 1220000, Tag: 200
1345 12:48:35.541563 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1346 12:48:35.548156 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1347 12:48:35.554921 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1348 12:48:35.561376 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1349 12:48:35.568363 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1350 12:48:35.574578 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1351 12:48:35.581467 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1352 12:48:35.588038 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1353 12:48:35.594615 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1354 12:48:35.601426 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1355 12:48:35.608007 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1356 12:48:35.614249 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1357 12:48:35.621000 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1358 12:48:35.627658 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1359 12:48:35.634493 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1360 12:48:35.640776 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1361 12:48:35.647677 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1362 12:48:35.654157 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1363 12:48:35.660756 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1364 12:48:35.667380 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1365 12:48:35.674429 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1366 12:48:35.680965 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1367 12:48:35.687279 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1368 12:48:35.694304 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1369 12:48:35.700531 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1370 12:48:35.704131 PCI: 00:1d.0: Resource ranges:
1371 12:48:35.710596 * Base: 7fc00000, Size: 100000, Tag: 200
1372 12:48:35.717167 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1373 12:48:35.724047 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1374 12:48:35.730626 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1375 12:48:35.737118 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1376 12:48:35.743959 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1377 12:48:35.750325 Root Device assign_resources, bus 0 link: 0
1378 12:48:35.753726 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 12:48:35.763808 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1380 12:48:35.770304 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1381 12:48:35.776877 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1382 12:48:35.786802 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1383 12:48:35.790298 PCI: 00:04.0 assign_resources, bus 1 link: 0
1384 12:48:35.797085 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 12:48:35.803618 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1386 12:48:35.813651 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1387 12:48:35.820300 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1388 12:48:35.823681 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1389 12:48:35.830504 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 12:48:35.836895 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1391 12:48:35.843517 PCI: 00:14.0 assign_resources, bus 0 link: 0
1392 12:48:35.846707 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 12:48:35.857239 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1394 12:48:35.863423 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1395 12:48:35.873421 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1396 12:48:35.876586 PCI: 00:14.3 assign_resources, bus 0 link: 0
1397 12:48:35.879618 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 12:48:35.889634 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1399 12:48:35.893344 PCI: 00:15.0 assign_resources, bus 0 link: 0
1400 12:48:35.899556 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 12:48:35.906244 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1402 12:48:35.909968 PCI: 00:15.1 assign_resources, bus 0 link: 0
1403 12:48:35.916704 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 12:48:35.923331 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1405 12:48:35.933241 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1406 12:48:35.939815 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1407 12:48:35.949427 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1408 12:48:35.952786 PCI: 00:19.1 assign_resources, bus 0 link: 0
1409 12:48:35.959765 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 12:48:35.966192 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1411 12:48:35.976150 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1412 12:48:35.986082 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1413 12:48:35.989372 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1414 12:48:35.999487 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1415 12:48:36.005796 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1416 12:48:36.012826 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1417 12:48:36.019485 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1418 12:48:36.026001 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1419 12:48:36.032611 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1420 12:48:36.035804 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 12:48:36.045706 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1422 12:48:36.049036 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1423 12:48:36.052614 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 12:48:36.059151 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1425 12:48:36.062538 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 12:48:36.069022 LPC: Trying to open IO window from 800 size 1ff
1427 12:48:36.075741 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1428 12:48:36.085461 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1429 12:48:36.092361 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1430 12:48:36.098481 DOMAIN: 0000 assign_resources, bus 0 link: 0
1431 12:48:36.102129 Root Device assign_resources, bus 0 link: 0
1432 12:48:36.105228 Done setting resources.
1433 12:48:36.112095 Show resources in subtree (Root Device)...After assigning values.
1434 12:48:36.115372 Root Device child on link 0 DOMAIN: 0000
1435 12:48:36.118610 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1436 12:48:36.128683 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1437 12:48:36.138293 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1438 12:48:36.141519 PCI: 00:00.0
1439 12:48:36.148192 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1440 12:48:36.158245 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1441 12:48:36.168317 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1442 12:48:36.178379 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1443 12:48:36.188027 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1444 12:48:36.198056 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1445 12:48:36.204772 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1446 12:48:36.214520 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1447 12:48:36.224764 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1448 12:48:36.234452 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1449 12:48:36.244545 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1450 12:48:36.254260 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1451 12:48:36.261048 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1452 12:48:36.271179 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1453 12:48:36.280782 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1454 12:48:36.290770 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1455 12:48:36.301096 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1456 12:48:36.310986 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1457 12:48:36.317369 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1458 12:48:36.327550 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1459 12:48:36.330769 PCI: 00:02.0
1460 12:48:36.340360 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1461 12:48:36.350454 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1462 12:48:36.360365 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1463 12:48:36.363902 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1464 12:48:36.377003 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1465 12:48:36.377121 GENERIC: 0.0
1466 12:48:36.380259 PCI: 00:05.0
1467 12:48:36.390129 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1468 12:48:36.393803 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1469 12:48:36.396932 GENERIC: 0.0
1470 12:48:36.397012 PCI: 00:08.0
1471 12:48:36.406791 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1472 12:48:36.410372 PCI: 00:0a.0
1473 12:48:36.413375 PCI: 00:0d.0 child on link 0 USB0 port 0
1474 12:48:36.423500 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1475 12:48:36.430145 USB0 port 0 child on link 0 USB3 port 0
1476 12:48:36.430233 USB3 port 0
1477 12:48:36.433692 USB3 port 1
1478 12:48:36.433780 USB3 port 2
1479 12:48:36.437004 USB3 port 3
1480 12:48:36.440286 PCI: 00:14.0 child on link 0 USB0 port 0
1481 12:48:36.450405 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1482 12:48:36.457014 USB0 port 0 child on link 0 USB2 port 0
1483 12:48:36.457103 USB2 port 0
1484 12:48:36.460172 USB2 port 1
1485 12:48:36.460260 USB2 port 2
1486 12:48:36.463542 USB2 port 3
1487 12:48:36.463629 USB2 port 4
1488 12:48:36.467120 USB2 port 5
1489 12:48:36.467209 USB2 port 6
1490 12:48:36.470269 USB2 port 7
1491 12:48:36.470356 USB2 port 8
1492 12:48:36.473535 USB2 port 9
1493 12:48:36.473622 USB3 port 0
1494 12:48:36.476653 USB3 port 1
1495 12:48:36.476739 USB3 port 2
1496 12:48:36.480379 USB3 port 3
1497 12:48:36.480473 PCI: 00:14.2
1498 12:48:36.493259 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1499 12:48:36.503416 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1500 12:48:36.506407 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1501 12:48:36.516362 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1502 12:48:36.519823 GENERIC: 0.0
1503 12:48:36.523374 PCI: 00:15.0 child on link 0 I2C: 00:1a
1504 12:48:36.533157 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1505 12:48:36.536818 I2C: 00:1a
1506 12:48:36.536901 I2C: 00:31
1507 12:48:36.539724 I2C: 00:32
1508 12:48:36.543411 PCI: 00:15.1 child on link 0 I2C: 00:10
1509 12:48:36.553217 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1510 12:48:36.553301 I2C: 00:10
1511 12:48:36.556442 PCI: 00:15.2
1512 12:48:36.566185 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1513 12:48:36.569998 PCI: 00:15.3
1514 12:48:36.579567 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1515 12:48:36.579659 PCI: 00:16.0
1516 12:48:36.589853 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1517 12:48:36.592937 PCI: 00:19.0
1518 12:48:36.596194 PCI: 00:19.1 child on link 0 I2C: 00:15
1519 12:48:36.605990 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1520 12:48:36.609826 I2C: 00:15
1521 12:48:36.613226 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1522 12:48:36.622751 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1523 12:48:36.632734 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1524 12:48:36.642769 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1525 12:48:36.646035 GENERIC: 0.0
1526 12:48:36.649424 PCI: 01:00.0
1527 12:48:36.659600 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1528 12:48:36.669451 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1529 12:48:36.679231 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1530 12:48:36.679327 PCI: 00:1e.0
1531 12:48:36.692345 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1532 12:48:36.695949 PCI: 00:1e.2 child on link 0 SPI: 00
1533 12:48:36.705649 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1534 12:48:36.708953 SPI: 00
1535 12:48:36.712342 PCI: 00:1e.3 child on link 0 SPI: 00
1536 12:48:36.722590 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1537 12:48:36.722677 SPI: 00
1538 12:48:36.728934 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1539 12:48:36.735912 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1540 12:48:36.738821 PNP: 0c09.0
1541 12:48:36.745884 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1542 12:48:36.752209 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1543 12:48:36.762702 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1544 12:48:36.768981 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1545 12:48:36.775418 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1546 12:48:36.775512 GENERIC: 0.0
1547 12:48:36.779094 GENERIC: 1.0
1548 12:48:36.779182 PCI: 00:1f.3
1549 12:48:36.788628 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1550 12:48:36.802222 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1551 12:48:36.802310 PCI: 00:1f.5
1552 12:48:36.812131 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1553 12:48:36.815574 CPU_CLUSTER: 0 child on link 0 APIC: 00
1554 12:48:36.818781 APIC: 00
1555 12:48:36.818867 APIC: 01
1556 12:48:36.821888 APIC: 03
1557 12:48:36.821975 APIC: 07
1558 12:48:36.822061 APIC: 05
1559 12:48:36.825575 APIC: 04
1560 12:48:36.825663 APIC: 02
1561 12:48:36.828621 APIC: 06
1562 12:48:36.828708 Done allocating resources.
1563 12:48:36.835328 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1564 12:48:36.841739 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1565 12:48:36.845285 Configure GPIOs for I2S audio on UP4.
1566 12:48:36.852072 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1567 12:48:36.855699 Enabling resources...
1568 12:48:36.858888 PCI: 00:00.0 subsystem <- 8086/9a12
1569 12:48:36.862243 PCI: 00:00.0 cmd <- 06
1570 12:48:36.865530 PCI: 00:02.0 subsystem <- 8086/9a40
1571 12:48:36.868893 PCI: 00:02.0 cmd <- 03
1572 12:48:36.872100 PCI: 00:04.0 subsystem <- 8086/9a03
1573 12:48:36.875297 PCI: 00:04.0 cmd <- 02
1574 12:48:36.878563 PCI: 00:05.0 subsystem <- 8086/9a19
1575 12:48:36.878648 PCI: 00:05.0 cmd <- 02
1576 12:48:36.885044 PCI: 00:08.0 subsystem <- 8086/9a11
1577 12:48:36.885131 PCI: 00:08.0 cmd <- 06
1578 12:48:36.888473 PCI: 00:0d.0 subsystem <- 8086/9a13
1579 12:48:36.891822 PCI: 00:0d.0 cmd <- 02
1580 12:48:36.894984 PCI: 00:14.0 subsystem <- 8086/a0ed
1581 12:48:36.898440 PCI: 00:14.0 cmd <- 02
1582 12:48:36.901764 PCI: 00:14.2 subsystem <- 8086/a0ef
1583 12:48:36.905289 PCI: 00:14.2 cmd <- 02
1584 12:48:36.908334 PCI: 00:14.3 subsystem <- 8086/a0f0
1585 12:48:36.911630 PCI: 00:14.3 cmd <- 02
1586 12:48:36.914823 PCI: 00:15.0 subsystem <- 8086/a0e8
1587 12:48:36.918053 PCI: 00:15.0 cmd <- 02
1588 12:48:36.921570 PCI: 00:15.1 subsystem <- 8086/a0e9
1589 12:48:36.924874 PCI: 00:15.1 cmd <- 02
1590 12:48:36.928183 PCI: 00:15.2 subsystem <- 8086/a0ea
1591 12:48:36.928270 PCI: 00:15.2 cmd <- 02
1592 12:48:36.935118 PCI: 00:15.3 subsystem <- 8086/a0eb
1593 12:48:36.935205 PCI: 00:15.3 cmd <- 02
1594 12:48:36.938273 PCI: 00:16.0 subsystem <- 8086/a0e0
1595 12:48:36.941614 PCI: 00:16.0 cmd <- 02
1596 12:48:36.944825 PCI: 00:19.1 subsystem <- 8086/a0c6
1597 12:48:36.948208 PCI: 00:19.1 cmd <- 02
1598 12:48:36.951438 PCI: 00:1d.0 bridge ctrl <- 0013
1599 12:48:36.955076 PCI: 00:1d.0 subsystem <- 8086/a0b0
1600 12:48:36.958110 PCI: 00:1d.0 cmd <- 06
1601 12:48:36.961463 PCI: 00:1e.0 subsystem <- 8086/a0a8
1602 12:48:36.964665 PCI: 00:1e.0 cmd <- 06
1603 12:48:36.967917 PCI: 00:1e.2 subsystem <- 8086/a0aa
1604 12:48:36.971155 PCI: 00:1e.2 cmd <- 06
1605 12:48:36.974391 PCI: 00:1e.3 subsystem <- 8086/a0ab
1606 12:48:36.977957 PCI: 00:1e.3 cmd <- 02
1607 12:48:36.981321 PCI: 00:1f.0 subsystem <- 8086/a087
1608 12:48:36.981407 PCI: 00:1f.0 cmd <- 407
1609 12:48:36.987829 PCI: 00:1f.3 subsystem <- 8086/a0c8
1610 12:48:36.987918 PCI: 00:1f.3 cmd <- 02
1611 12:48:36.991187 PCI: 00:1f.5 subsystem <- 8086/a0a4
1612 12:48:36.994442 PCI: 00:1f.5 cmd <- 406
1613 12:48:36.999553 PCI: 01:00.0 cmd <- 02
1614 12:48:37.004212 done.
1615 12:48:37.007441 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1616 12:48:37.010663 Initializing devices...
1617 12:48:37.014352 Root Device init
1618 12:48:37.017469 Chrome EC: Set SMI mask to 0x0000000000000000
1619 12:48:37.024401 Chrome EC: clear events_b mask to 0x0000000000000000
1620 12:48:37.031348 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1621 12:48:37.037802 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1622 12:48:37.044264 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1623 12:48:37.050910 Chrome EC: Set WAKE mask to 0x0000000000000000
1624 12:48:37.054573 fw_config match found: DB_USB=USB3_ACTIVE
1625 12:48:37.060945 Configure Right Type-C port orientation for retimer
1626 12:48:37.064186 Root Device init finished in 47 msecs
1627 12:48:37.067826 PCI: 00:00.0 init
1628 12:48:37.071065 CPU TDP = 9 Watts
1629 12:48:37.071151 CPU PL1 = 9 Watts
1630 12:48:37.074139 CPU PL2 = 40 Watts
1631 12:48:37.077364 CPU PL4 = 83 Watts
1632 12:48:37.080669 PCI: 00:00.0 init finished in 8 msecs
1633 12:48:37.080756 PCI: 00:02.0 init
1634 12:48:37.084142 GMA: Found VBT in CBFS
1635 12:48:37.087365 GMA: Found valid VBT in CBFS
1636 12:48:37.094288 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1637 12:48:37.100620 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1638 12:48:37.103984 PCI: 00:02.0 init finished in 18 msecs
1639 12:48:37.107265 PCI: 00:05.0 init
1640 12:48:37.110527 PCI: 00:05.0 init finished in 0 msecs
1641 12:48:37.114012 PCI: 00:08.0 init
1642 12:48:37.117400 PCI: 00:08.0 init finished in 0 msecs
1643 12:48:37.120769 PCI: 00:14.0 init
1644 12:48:37.124080 PCI: 00:14.0 init finished in 0 msecs
1645 12:48:37.127355 PCI: 00:14.2 init
1646 12:48:37.130972 PCI: 00:14.2 init finished in 0 msecs
1647 12:48:37.134189 PCI: 00:15.0 init
1648 12:48:37.134275 I2C bus 0 version 0x3230302a
1649 12:48:37.140856 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1650 12:48:37.143723 PCI: 00:15.0 init finished in 6 msecs
1651 12:48:37.143810 PCI: 00:15.1 init
1652 12:48:37.147119 I2C bus 1 version 0x3230302a
1653 12:48:37.150364 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1654 12:48:37.157062 PCI: 00:15.1 init finished in 6 msecs
1655 12:48:37.157148 PCI: 00:15.2 init
1656 12:48:37.160817 I2C bus 2 version 0x3230302a
1657 12:48:37.163893 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1658 12:48:37.167084 PCI: 00:15.2 init finished in 6 msecs
1659 12:48:37.170350 PCI: 00:15.3 init
1660 12:48:37.173800 I2C bus 3 version 0x3230302a
1661 12:48:37.177174 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1662 12:48:37.180199 PCI: 00:15.3 init finished in 6 msecs
1663 12:48:37.183613 PCI: 00:16.0 init
1664 12:48:37.187335 PCI: 00:16.0 init finished in 0 msecs
1665 12:48:37.190311 PCI: 00:19.1 init
1666 12:48:37.193545 I2C bus 5 version 0x3230302a
1667 12:48:37.197108 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1668 12:48:37.200247 PCI: 00:19.1 init finished in 6 msecs
1669 12:48:37.200333 PCI: 00:1d.0 init
1670 12:48:37.203431 Initializing PCH PCIe bridge.
1671 12:48:37.210025 PCI: 00:1d.0 init finished in 3 msecs
1672 12:48:37.213411 PCI: 00:1f.0 init
1673 12:48:37.216886 IOAPIC: Initializing IOAPIC at 0xfec00000
1674 12:48:37.220014 IOAPIC: Bootstrap Processor Local APIC = 0x00
1675 12:48:37.223277 IOAPIC: ID = 0x02
1676 12:48:37.226601 IOAPIC: Dumping registers
1677 12:48:37.226687 reg 0x0000: 0x02000000
1678 12:48:37.229850 reg 0x0001: 0x00770020
1679 12:48:37.233472 reg 0x0002: 0x00000000
1680 12:48:37.236630 PCI: 00:1f.0 init finished in 21 msecs
1681 12:48:37.240061 PCI: 00:1f.2 init
1682 12:48:37.240146 Disabling ACPI via APMC.
1683 12:48:37.244761 APMC done.
1684 12:48:37.248365 PCI: 00:1f.2 init finished in 5 msecs
1685 12:48:37.260107 PCI: 01:00.0 init
1686 12:48:37.263363 PCI: 01:00.0 init finished in 0 msecs
1687 12:48:37.266520 PNP: 0c09.0 init
1688 12:48:37.270036 Google Chrome EC uptime: 8.551 seconds
1689 12:48:37.276672 Google Chrome AP resets since EC boot: 1
1690 12:48:37.279921 Google Chrome most recent AP reset causes:
1691 12:48:37.283558 0.380: 32775 shutdown: entering G3
1692 12:48:37.289720 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1693 12:48:37.293332 PNP: 0c09.0 init finished in 22 msecs
1694 12:48:37.299293 Devices initialized
1695 12:48:37.302150 Show all devs... After init.
1696 12:48:37.305930 Root Device: enabled 1
1697 12:48:37.306018 DOMAIN: 0000: enabled 1
1698 12:48:37.309166 CPU_CLUSTER: 0: enabled 1
1699 12:48:37.312731 PCI: 00:00.0: enabled 1
1700 12:48:37.315931 PCI: 00:02.0: enabled 1
1701 12:48:37.316018 PCI: 00:04.0: enabled 1
1702 12:48:37.319205 PCI: 00:05.0: enabled 1
1703 12:48:37.322219 PCI: 00:06.0: enabled 0
1704 12:48:37.325730 PCI: 00:07.0: enabled 0
1705 12:48:37.325859 PCI: 00:07.1: enabled 0
1706 12:48:37.328687 PCI: 00:07.2: enabled 0
1707 12:48:37.332134 PCI: 00:07.3: enabled 0
1708 12:48:37.335399 PCI: 00:08.0: enabled 1
1709 12:48:37.335485 PCI: 00:09.0: enabled 0
1710 12:48:37.338947 PCI: 00:0a.0: enabled 0
1711 12:48:37.342331 PCI: 00:0d.0: enabled 1
1712 12:48:37.342416 PCI: 00:0d.1: enabled 0
1713 12:48:37.345501 PCI: 00:0d.2: enabled 0
1714 12:48:37.348788 PCI: 00:0d.3: enabled 0
1715 12:48:37.352105 PCI: 00:0e.0: enabled 0
1716 12:48:37.352191 PCI: 00:10.2: enabled 1
1717 12:48:37.355897 PCI: 00:10.6: enabled 0
1718 12:48:37.358594 PCI: 00:10.7: enabled 0
1719 12:48:37.362317 PCI: 00:12.0: enabled 0
1720 12:48:37.362416 PCI: 00:12.6: enabled 0
1721 12:48:37.365787 PCI: 00:13.0: enabled 0
1722 12:48:37.369113 PCI: 00:14.0: enabled 1
1723 12:48:37.372107 PCI: 00:14.1: enabled 0
1724 12:48:37.372218 PCI: 00:14.2: enabled 1
1725 12:48:37.375410 PCI: 00:14.3: enabled 1
1726 12:48:37.378898 PCI: 00:15.0: enabled 1
1727 12:48:37.382304 PCI: 00:15.1: enabled 1
1728 12:48:37.382612 PCI: 00:15.2: enabled 1
1729 12:48:37.385711 PCI: 00:15.3: enabled 1
1730 12:48:37.388998 PCI: 00:16.0: enabled 1
1731 12:48:37.389372 PCI: 00:16.1: enabled 0
1732 12:48:37.392494 PCI: 00:16.2: enabled 0
1733 12:48:37.395769 PCI: 00:16.3: enabled 0
1734 12:48:37.398916 PCI: 00:16.4: enabled 0
1735 12:48:37.399317 PCI: 00:16.5: enabled 0
1736 12:48:37.402368 PCI: 00:17.0: enabled 0
1737 12:48:37.405581 PCI: 00:19.0: enabled 0
1738 12:48:37.409032 PCI: 00:19.1: enabled 1
1739 12:48:37.409408 PCI: 00:19.2: enabled 0
1740 12:48:37.412414 PCI: 00:1c.0: enabled 1
1741 12:48:37.415560 PCI: 00:1c.1: enabled 0
1742 12:48:37.419153 PCI: 00:1c.2: enabled 0
1743 12:48:37.419521 PCI: 00:1c.3: enabled 0
1744 12:48:37.422274 PCI: 00:1c.4: enabled 0
1745 12:48:37.425613 PCI: 00:1c.5: enabled 0
1746 12:48:37.426000 PCI: 00:1c.6: enabled 1
1747 12:48:37.428647 PCI: 00:1c.7: enabled 0
1748 12:48:37.432305 PCI: 00:1d.0: enabled 1
1749 12:48:37.435317 PCI: 00:1d.1: enabled 0
1750 12:48:37.435688 PCI: 00:1d.2: enabled 1
1751 12:48:37.438736 PCI: 00:1d.3: enabled 0
1752 12:48:37.441975 PCI: 00:1e.0: enabled 1
1753 12:48:37.445696 PCI: 00:1e.1: enabled 0
1754 12:48:37.446065 PCI: 00:1e.2: enabled 1
1755 12:48:37.448591 PCI: 00:1e.3: enabled 1
1756 12:48:37.452479 PCI: 00:1f.0: enabled 1
1757 12:48:37.455737 PCI: 00:1f.1: enabled 0
1758 12:48:37.456141 PCI: 00:1f.2: enabled 1
1759 12:48:37.458789 PCI: 00:1f.3: enabled 1
1760 12:48:37.462226 PCI: 00:1f.4: enabled 0
1761 12:48:37.465611 PCI: 00:1f.5: enabled 1
1762 12:48:37.466008 PCI: 00:1f.6: enabled 0
1763 12:48:37.468842 PCI: 00:1f.7: enabled 0
1764 12:48:37.472094 APIC: 00: enabled 1
1765 12:48:37.472499 GENERIC: 0.0: enabled 1
1766 12:48:37.475308 GENERIC: 0.0: enabled 1
1767 12:48:37.478450 GENERIC: 1.0: enabled 1
1768 12:48:37.481861 GENERIC: 0.0: enabled 1
1769 12:48:37.482263 GENERIC: 1.0: enabled 1
1770 12:48:37.485236 USB0 port 0: enabled 1
1771 12:48:37.488586 GENERIC: 0.0: enabled 1
1772 12:48:37.488994 USB0 port 0: enabled 1
1773 12:48:37.491979 GENERIC: 0.0: enabled 1
1774 12:48:37.495104 I2C: 00:1a: enabled 1
1775 12:48:37.498355 I2C: 00:31: enabled 1
1776 12:48:37.498762 I2C: 00:32: enabled 1
1777 12:48:37.501851 I2C: 00:10: enabled 1
1778 12:48:37.505280 I2C: 00:15: enabled 1
1779 12:48:37.505700 GENERIC: 0.0: enabled 0
1780 12:48:37.508577 GENERIC: 1.0: enabled 0
1781 12:48:37.511871 GENERIC: 0.0: enabled 1
1782 12:48:37.512240 SPI: 00: enabled 1
1783 12:48:37.515145 SPI: 00: enabled 1
1784 12:48:37.518416 PNP: 0c09.0: enabled 1
1785 12:48:37.518818 GENERIC: 0.0: enabled 1
1786 12:48:37.521897 USB3 port 0: enabled 1
1787 12:48:37.525035 USB3 port 1: enabled 1
1788 12:48:37.525439 USB3 port 2: enabled 0
1789 12:48:37.528381 USB3 port 3: enabled 0
1790 12:48:37.532261 USB2 port 0: enabled 0
1791 12:48:37.535311 USB2 port 1: enabled 1
1792 12:48:37.535714 USB2 port 2: enabled 1
1793 12:48:37.538758 USB2 port 3: enabled 0
1794 12:48:37.541729 USB2 port 4: enabled 1
1795 12:48:37.542132 USB2 port 5: enabled 0
1796 12:48:37.545013 USB2 port 6: enabled 0
1797 12:48:37.548836 USB2 port 7: enabled 0
1798 12:48:37.551913 USB2 port 8: enabled 0
1799 12:48:37.552320 USB2 port 9: enabled 0
1800 12:48:37.555139 USB3 port 0: enabled 0
1801 12:48:37.558404 USB3 port 1: enabled 1
1802 12:48:37.558809 USB3 port 2: enabled 0
1803 12:48:37.561731 USB3 port 3: enabled 0
1804 12:48:37.564750 GENERIC: 0.0: enabled 1
1805 12:48:37.568003 GENERIC: 1.0: enabled 1
1806 12:48:37.568395 APIC: 01: enabled 1
1807 12:48:37.571852 APIC: 03: enabled 1
1808 12:48:37.572310 APIC: 07: enabled 1
1809 12:48:37.574865 APIC: 05: enabled 1
1810 12:48:37.578092 APIC: 04: enabled 1
1811 12:48:37.578450 APIC: 02: enabled 1
1812 12:48:37.581466 APIC: 06: enabled 1
1813 12:48:37.584910 PCI: 01:00.0: enabled 1
1814 12:48:37.588221 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1815 12:48:37.594843 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1816 12:48:37.598232 ELOG: NV offset 0xf30000 size 0x1000
1817 12:48:37.604822 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1818 12:48:37.611565 ELOG: Event(17) added with size 13 at 2023-03-13 12:48:37 UTC
1819 12:48:37.618249 ELOG: Event(92) added with size 9 at 2023-03-13 12:48:37 UTC
1820 12:48:37.624965 ELOG: Event(93) added with size 9 at 2023-03-13 12:48:37 UTC
1821 12:48:37.631478 ELOG: Event(9E) added with size 10 at 2023-03-13 12:48:37 UTC
1822 12:48:37.637978 ELOG: Event(9F) added with size 14 at 2023-03-13 12:48:37 UTC
1823 12:48:37.641325 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1824 12:48:37.648252 ELOG: Event(A1) added with size 10 at 2023-03-13 12:48:37 UTC
1825 12:48:37.658124 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1826 12:48:37.664611 ELOG: Event(A0) added with size 9 at 2023-03-13 12:48:37 UTC
1827 12:48:37.667742 elog_add_boot_reason: Logged dev mode boot
1828 12:48:37.674475 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1829 12:48:37.674888 Finalize devices...
1830 12:48:37.677707 Devices finalized
1831 12:48:37.681259 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1832 12:48:37.688389 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1833 12:48:37.694428 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1834 12:48:37.697812 ME: HFSTS1 : 0x80030055
1835 12:48:37.701377 ME: HFSTS2 : 0x30280116
1836 12:48:37.708250 ME: HFSTS3 : 0x00000050
1837 12:48:37.711433 ME: HFSTS4 : 0x00004000
1838 12:48:37.714482 ME: HFSTS5 : 0x00000000
1839 12:48:37.721283 ME: HFSTS6 : 0x00400006
1840 12:48:37.724634 ME: Manufacturing Mode : YES
1841 12:48:37.727900 ME: SPI Protection Mode Enabled : NO
1842 12:48:37.731220 ME: FW Partition Table : OK
1843 12:48:37.734371 ME: Bringup Loader Failure : NO
1844 12:48:37.737792 ME: Firmware Init Complete : NO
1845 12:48:37.744751 ME: Boot Options Present : NO
1846 12:48:37.747962 ME: Update In Progress : NO
1847 12:48:37.751157 ME: D0i3 Support : YES
1848 12:48:37.754398 ME: Low Power State Enabled : NO
1849 12:48:37.757637 ME: CPU Replaced : YES
1850 12:48:37.761200 ME: CPU Replacement Valid : YES
1851 12:48:37.764105 ME: Current Working State : 5
1852 12:48:37.767425 ME: Current Operation State : 1
1853 12:48:37.774447 ME: Current Operation Mode : 3
1854 12:48:37.777935 ME: Error Code : 0
1855 12:48:37.781043 ME: Enhanced Debug Mode : NO
1856 12:48:37.784226 ME: CPU Debug Disabled : YES
1857 12:48:37.787668 ME: TXT Support : NO
1858 12:48:37.794448 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1859 12:48:37.800973 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1860 12:48:37.803923 CBFS: 'fallback/slic' not found.
1861 12:48:37.807278 ACPI: Writing ACPI tables at 76b01000.
1862 12:48:37.810756 ACPI: * FACS
1863 12:48:37.811148 ACPI: * DSDT
1864 12:48:37.814241 Ramoops buffer: 0x100000@0x76a00000.
1865 12:48:37.820958 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1866 12:48:37.824113 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1867 12:48:37.828201 Google Chrome EC: version:
1868 12:48:37.831804 ro: voema_v2.0.7540-147f8d37d1
1869 12:48:37.835181 rw: voema_v2.0.7540-147f8d37d1
1870 12:48:37.838072 running image: 2
1871 12:48:37.845074 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1872 12:48:37.848042 ACPI: * FADT
1873 12:48:37.848452 SCI is IRQ9
1874 12:48:37.851449 ACPI: added table 1/32, length now 40
1875 12:48:37.854785 ACPI: * SSDT
1876 12:48:37.858374 Found 1 CPU(s) with 8 core(s) each.
1877 12:48:37.861773 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1878 12:48:37.868094 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1879 12:48:37.871467 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1880 12:48:37.874849 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1881 12:48:37.881801 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1882 12:48:37.887875 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1883 12:48:37.891064 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1884 12:48:37.897764 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1885 12:48:37.904587 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1886 12:48:37.907824 \_SB.PCI0.RP09: Added StorageD3Enable property
1887 12:48:37.911285 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1888 12:48:37.917877 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1889 12:48:37.924357 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1890 12:48:37.927603 PS2K: Passing 80 keymaps to kernel
1891 12:48:37.934282 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1892 12:48:37.940981 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1893 12:48:37.947633 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1894 12:48:37.954102 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1895 12:48:37.960928 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1896 12:48:37.967468 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1897 12:48:37.974245 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1898 12:48:37.977365 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1899 12:48:37.984252 ACPI: added table 2/32, length now 44
1900 12:48:37.984651 ACPI: * MCFG
1901 12:48:37.987450 ACPI: added table 3/32, length now 48
1902 12:48:37.990483 ACPI: * TPM2
1903 12:48:37.994024 TPM2 log created at 0x769f0000
1904 12:48:37.997426 ACPI: added table 4/32, length now 52
1905 12:48:37.997832 ACPI: * MADT
1906 12:48:38.000660 SCI is IRQ9
1907 12:48:38.003956 ACPI: added table 5/32, length now 56
1908 12:48:38.004370 current = 76b09850
1909 12:48:38.007294 ACPI: * DMAR
1910 12:48:38.010554 ACPI: added table 6/32, length now 60
1911 12:48:38.013916 ACPI: added table 7/32, length now 64
1912 12:48:38.017275 ACPI: * HPET
1913 12:48:38.020641 ACPI: added table 8/32, length now 68
1914 12:48:38.021046 ACPI: done.
1915 12:48:38.023940 ACPI tables: 35216 bytes.
1916 12:48:38.027058 smbios_write_tables: 769ef000
1917 12:48:38.030434 EC returned error result code 3
1918 12:48:38.033788 Couldn't obtain OEM name from CBI
1919 12:48:38.036840 Create SMBIOS type 16
1920 12:48:38.040142 Create SMBIOS type 17
1921 12:48:38.043545 GENERIC: 0.0 (WIFI Device)
1922 12:48:38.043977 SMBIOS tables: 1750 bytes.
1923 12:48:38.050537 Writing table forward entry at 0x00000500
1924 12:48:38.056910 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1925 12:48:38.060339 Writing coreboot table at 0x76b25000
1926 12:48:38.063252 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1927 12:48:38.070264 1. 0000000000001000-000000000009ffff: RAM
1928 12:48:38.073241 2. 00000000000a0000-00000000000fffff: RESERVED
1929 12:48:38.076688 3. 0000000000100000-00000000769eefff: RAM
1930 12:48:38.083409 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1931 12:48:38.090194 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1932 12:48:38.096651 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1933 12:48:38.100001 7. 0000000077000000-000000007fbfffff: RESERVED
1934 12:48:38.103238 8. 00000000c0000000-00000000cfffffff: RESERVED
1935 12:48:38.109985 9. 00000000f8000000-00000000f9ffffff: RESERVED
1936 12:48:38.113291 10. 00000000fb000000-00000000fb000fff: RESERVED
1937 12:48:38.120033 11. 00000000fe000000-00000000fe00ffff: RESERVED
1938 12:48:38.122903 12. 00000000fed80000-00000000fed87fff: RESERVED
1939 12:48:38.129675 13. 00000000fed90000-00000000fed92fff: RESERVED
1940 12:48:38.133430 14. 00000000feda0000-00000000feda1fff: RESERVED
1941 12:48:38.136613 15. 00000000fedc0000-00000000feddffff: RESERVED
1942 12:48:38.143092 16. 0000000100000000-00000002803fffff: RAM
1943 12:48:38.146273 Passing 4 GPIOs to payload:
1944 12:48:38.149800 NAME | PORT | POLARITY | VALUE
1945 12:48:38.156281 lid | undefined | high | high
1946 12:48:38.159671 power | undefined | high | low
1947 12:48:38.166388 oprom | undefined | high | low
1948 12:48:38.172973 EC in RW | 0x000000e5 | high | high
1949 12:48:38.179148 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9a66
1950 12:48:38.179560 coreboot table: 1576 bytes.
1951 12:48:38.185731 IMD ROOT 0. 0x76fff000 0x00001000
1952 12:48:38.189348 IMD SMALL 1. 0x76ffe000 0x00001000
1953 12:48:38.192939 FSP MEMORY 2. 0x76c4e000 0x003b0000
1954 12:48:38.196058 VPD 3. 0x76c4d000 0x00000367
1955 12:48:38.199290 RO MCACHE 4. 0x76c4c000 0x00000fdc
1956 12:48:38.202978 CONSOLE 5. 0x76c2c000 0x00020000
1957 12:48:38.206336 FMAP 6. 0x76c2b000 0x00000578
1958 12:48:38.209262 TIME STAMP 7. 0x76c2a000 0x00000910
1959 12:48:38.212575 VBOOT WORK 8. 0x76c16000 0x00014000
1960 12:48:38.219477 ROMSTG STCK 9. 0x76c15000 0x00001000
1961 12:48:38.223013 AFTER CAR 10. 0x76c0a000 0x0000b000
1962 12:48:38.226404 RAMSTAGE 11. 0x76b97000 0x00073000
1963 12:48:38.229553 REFCODE 12. 0x76b42000 0x00055000
1964 12:48:38.232759 SMM BACKUP 13. 0x76b32000 0x00010000
1965 12:48:38.235988 4f444749 14. 0x76b30000 0x00002000
1966 12:48:38.239430 EXT VBT15. 0x76b2d000 0x0000219f
1967 12:48:38.242762 COREBOOT 16. 0x76b25000 0x00008000
1968 12:48:38.245949 ACPI 17. 0x76b01000 0x00024000
1969 12:48:38.252834 ACPI GNVS 18. 0x76b00000 0x00001000
1970 12:48:38.255703 RAMOOPS 19. 0x76a00000 0x00100000
1971 12:48:38.258980 TPM2 TCGLOG20. 0x769f0000 0x00010000
1972 12:48:38.262674 SMBIOS 21. 0x769ef000 0x00000800
1973 12:48:38.262763 IMD small region:
1974 12:48:38.269204 IMD ROOT 0. 0x76ffec00 0x00000400
1975 12:48:38.272472 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1976 12:48:38.275781 POWER STATE 2. 0x76ffeb80 0x00000044
1977 12:48:38.278949 ROMSTAGE 3. 0x76ffeb60 0x00000004
1978 12:48:38.282172 MEM INFO 4. 0x76ffe980 0x000001e0
1979 12:48:38.288915 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1980 12:48:38.292210 MTRR: Physical address space:
1981 12:48:38.299339 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1982 12:48:38.305614 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1983 12:48:38.312479 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1984 12:48:38.318838 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1985 12:48:38.322132 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1986 12:48:38.328977 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1987 12:48:38.335839 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1988 12:48:38.338898 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 12:48:38.345898 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 12:48:38.349096 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 12:48:38.352415 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 12:48:38.355680 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 12:48:38.362178 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 12:48:38.365991 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 12:48:38.369306 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 12:48:38.372277 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 12:48:38.378742 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 12:48:38.382477 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 12:48:38.385907 call enable_fixed_mtrr()
2000 12:48:38.388957 CPU physical address size: 39 bits
2001 12:48:38.392074 MTRR: default type WB/UC MTRR counts: 6/6.
2002 12:48:38.395345 MTRR: UC selected as default type.
2003 12:48:38.401976 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2004 12:48:38.408663 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2005 12:48:38.415317 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2006 12:48:38.422036 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2007 12:48:38.428812 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2008 12:48:38.435087 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2009 12:48:38.435499
2010 12:48:38.438514 MTRR check
2011 12:48:38.438911 Fixed MTRRs : Enabled
2012 12:48:38.441821 Variable MTRRs: Enabled
2013 12:48:38.442238
2014 12:48:38.444948 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 12:48:38.451766 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 12:48:38.455174 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 12:48:38.458072 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 12:48:38.461651 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 12:48:38.465051 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 12:48:38.471538 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 12:48:38.475220 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 12:48:38.478115 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 12:48:38.481764 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 12:48:38.488064 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 12:48:38.494913 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2026 12:48:38.498162 call enable_fixed_mtrr()
2027 12:48:38.501765 Checking cr50 for pending updates
2028 12:48:38.502228 CPU physical address size: 39 bits
2029 12:48:38.509004 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 12:48:38.512283 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 12:48:38.515304 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 12:48:38.518555 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 12:48:38.525196 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 12:48:38.528482 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 12:48:38.531928 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 12:48:38.535430 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 12:48:38.541688 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 12:48:38.544945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 12:48:38.548609 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 12:48:38.551878 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 12:48:38.559394 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 12:48:38.559839 call enable_fixed_mtrr()
2043 12:48:38.565742 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 12:48:38.568999 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 12:48:38.572414 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 12:48:38.575686 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 12:48:38.582597 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 12:48:38.585966 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 12:48:38.588889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 12:48:38.592092 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 12:48:38.598582 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 12:48:38.602112 CPU physical address size: 39 bits
2053 12:48:38.605480 call enable_fixed_mtrr()
2054 12:48:38.608796 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 12:48:38.615377 MTRR: Fixed MSR 0x250 0x0606060606060606
2056 12:48:38.618419 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 12:48:38.622150 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 12:48:38.625499 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 12:48:38.628995 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 12:48:38.635085 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 12:48:38.638038 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 12:48:38.641423 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 12:48:38.644896 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 12:48:38.651539 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 12:48:38.655060 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 12:48:38.657897 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 12:48:38.664542 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 12:48:38.668308 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 12:48:38.671495 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 12:48:38.674807 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 12:48:38.681303 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 12:48:38.684551 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 12:48:38.688043 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 12:48:38.691657 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 12:48:38.694665 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 12:48:38.701340 call enable_fixed_mtrr()
2077 12:48:38.701418 call enable_fixed_mtrr()
2078 12:48:38.707878 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 12:48:38.711240 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 12:48:38.714515 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 12:48:38.717941 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 12:48:38.724645 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 12:48:38.727879 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 12:48:38.731063 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 12:48:38.734336 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 12:48:38.737638 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 12:48:38.744480 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 12:48:38.748067 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 12:48:38.751232 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 12:48:38.758528 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 12:48:38.758943 call enable_fixed_mtrr()
2092 12:48:38.765142 MTRR: Fixed MSR 0x259 0x0000000000000000
2093 12:48:38.768337 MTRR: Fixed MSR 0x268 0x0606060606060606
2094 12:48:38.771497 MTRR: Fixed MSR 0x269 0x0606060606060606
2095 12:48:38.774759 MTRR: Fixed MSR 0x26a 0x0606060606060606
2096 12:48:38.781467 MTRR: Fixed MSR 0x26b 0x0606060606060606
2097 12:48:38.784661 MTRR: Fixed MSR 0x26c 0x0606060606060606
2098 12:48:38.788137 MTRR: Fixed MSR 0x26d 0x0606060606060606
2099 12:48:38.791438 MTRR: Fixed MSR 0x26e 0x0606060606060606
2100 12:48:38.797921 MTRR: Fixed MSR 0x26f 0x0606060606060606
2101 12:48:38.801508 CPU physical address size: 39 bits
2102 12:48:38.804469 call enable_fixed_mtrr()
2103 12:48:38.807674 CPU physical address size: 39 bits
2104 12:48:38.811353 CPU physical address size: 39 bits
2105 12:48:38.817875 CPU physical address size: 39 bits
2106 12:48:38.821516 CPU physical address size: 39 bits
2107 12:48:38.821963 Reading cr50 TPM mode
2108 12:48:38.831487 BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 6 ms
2109 12:48:38.841698 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2110 12:48:38.845079 Checking segment from ROM address 0xffc02b38
2111 12:48:38.848481 Checking segment from ROM address 0xffc02b54
2112 12:48:38.855238 Loading segment from ROM address 0xffc02b38
2113 12:48:38.855350 code (compression=0)
2114 12:48:38.865063 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2115 12:48:38.875053 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2116 12:48:38.875467 it's not compressed!
2117 12:48:39.014470 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2118 12:48:39.021021 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2119 12:48:39.027546 Loading segment from ROM address 0xffc02b54
2120 12:48:39.027633 Entry Point 0x30000000
2121 12:48:39.030813 Loaded segments
2122 12:48:39.037524 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2123 12:48:39.080704 Finalizing chipset.
2124 12:48:39.083944 Finalizing SMM.
2125 12:48:39.084090 APMC done.
2126 12:48:39.090556 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2127 12:48:39.094116 mp_park_aps done after 0 msecs.
2128 12:48:39.097339 Jumping to boot code at 0x30000000(0x76b25000)
2129 12:48:39.107294 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2130 12:48:39.107745
2131 12:48:39.108108
2132 12:48:39.110767
2133 12:48:39.111359 Starting depthcharge on Voema...
2134 12:48:39.112425 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2135 12:48:39.112943 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2136 12:48:39.113363 Setting prompt string to ['volteer:']
2137 12:48:39.113771 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2138 12:48:39.114506
2139 12:48:39.120366 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2140 12:48:39.120815
2141 12:48:39.126574 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2142 12:48:39.127072
2143 12:48:39.133357 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2144 12:48:39.133449
2145 12:48:39.136642 Failed to find eMMC card reader
2146 12:48:39.136733
2147 12:48:39.136804 Wipe memory regions:
2148 12:48:39.140034
2149 12:48:39.143196 [0x00000000001000, 0x000000000a0000)
2150 12:48:39.143308
2151 12:48:39.146426 [0x00000000100000, 0x00000030000000)
2152 12:48:39.172227
2153 12:48:39.175367 [0x00000032662db0, 0x000000769ef000)
2154 12:48:39.211657
2155 12:48:39.214867 [0x00000100000000, 0x00000280400000)
2156 12:48:39.415880
2157 12:48:39.419064 ec_init: CrosEC protocol v3 supported (256, 256)
2158 12:48:39.419247
2159 12:48:39.425671 update_port_state: port C0 state: usb enable 1 mux conn 0
2160 12:48:39.425881
2161 12:48:39.432315 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2162 12:48:39.437615
2163 12:48:39.440888 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2164 12:48:39.441303
2165 12:48:39.444197 send_conn_disc_msg: pmc_send_cmd succeeded
2166 12:48:39.877195
2167 12:48:39.877733 R8152: Initializing
2168 12:48:39.878089
2169 12:48:39.880147 Version 6 (ocp_data = 5c30)
2170 12:48:39.880721
2171 12:48:39.883563 R8152: Done initializing
2172 12:48:39.884010
2173 12:48:39.886881 Adding net device
2174 12:48:40.188627
2175 12:48:40.191793 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2176 12:48:40.192253
2177 12:48:40.192706
2178 12:48:40.193135
2179 12:48:40.195311 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2181 12:48:40.297072 volteer: tftpboot 192.168.201.1 9584809/tftp-deploy-mo52qm_5/kernel/bzImage 9584809/tftp-deploy-mo52qm_5/kernel/cmdline 9584809/tftp-deploy-mo52qm_5/ramdisk/ramdisk.cpio.gz
2182 12:48:40.297696 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2183 12:48:40.298190 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2184 12:48:40.302200 tftpboot 192.168.201.1 9584809/tftp-deploy-mo52qm_5/kernel/bzImoy-mo52qm_5/kernel/cmdline 9584809/tftp-deploy-mo52qm_5/ramdisk/ramdisk.cpio.gz
2185 12:48:40.302657
2186 12:48:40.303275 Waiting for link
2187 12:48:40.506586
2188 12:48:40.507170 done.
2189 12:48:40.507679
2190 12:48:40.508223 MAC: 00:24:32:30:78:74
2191 12:48:40.508671
2192 12:48:40.509768 Sending DHCP discover... done.
2193 12:48:40.510272
2194 12:48:40.512961 Waiting for reply... done.
2195 12:48:40.513424
2196 12:48:40.516498 Sending DHCP request... done.
2197 12:48:40.517014
2198 12:48:40.519926 Waiting for reply... done.
2199 12:48:40.520458
2200 12:48:40.523262 My ip is 192.168.201.14
2201 12:48:40.523781
2202 12:48:40.526485 The DHCP server ip is 192.168.201.1
2203 12:48:40.527042
2204 12:48:40.529817 TFTP server IP predefined by user: 192.168.201.1
2205 12:48:40.530348
2206 12:48:40.536188 Bootfile predefined by user: 9584809/tftp-deploy-mo52qm_5/kernel/bzImage
2207 12:48:40.536648
2208 12:48:40.539095 Sending tftp read request... done.
2209 12:48:40.539184
2210 12:48:40.545943 Waiting for the transfer...
2211 12:48:40.546031
2212 12:48:41.141739 00000000 ################################################################
2213 12:48:41.141905
2214 12:48:41.753329 00080000 ################################################################
2215 12:48:41.753899
2216 12:48:42.343328 00100000 ################################################################
2217 12:48:42.343611
2218 12:48:42.971197 00180000 ################################################################
2219 12:48:42.971348
2220 12:48:43.566511 00200000 ################################################################
2221 12:48:43.566682
2222 12:48:44.194979 00280000 ################################################################
2223 12:48:44.195134
2224 12:48:44.761761 00300000 ################################################################
2225 12:48:44.761913
2226 12:48:45.421167 00380000 ################################################################
2227 12:48:45.421749
2228 12:48:45.996005 00400000 ################################################################
2229 12:48:45.996158
2230 12:48:46.567277 00480000 ################################################################
2231 12:48:46.567426
2232 12:48:47.155830 00500000 ################################################################
2233 12:48:47.155977
2234 12:48:47.728191 00580000 ################################################################
2235 12:48:47.728731
2236 12:48:48.305096 00600000 ################################################################
2237 12:48:48.305236
2238 12:48:48.868254 00680000 ################################################################
2239 12:48:48.868972
2240 12:48:49.214944 00700000 ##################################### done.
2241 12:48:49.215095
2242 12:48:49.217964 The bootfile was 7638928 bytes long.
2243 12:48:49.218041
2244 12:48:49.221545 Sending tftp read request... done.
2245 12:48:49.221625
2246 12:48:49.224612 Waiting for the transfer...
2247 12:48:49.224731
2248 12:48:49.796429 00000000 ################################################################
2249 12:48:49.796569
2250 12:48:50.367729 00080000 ################################################################
2251 12:48:50.367898
2252 12:48:50.948230 00100000 ################################################################
2253 12:48:50.948367
2254 12:48:51.525167 00180000 ################################################################
2255 12:48:51.525305
2256 12:48:52.089938 00200000 ################################################################
2257 12:48:52.090491
2258 12:48:52.702591 00280000 ################################################################
2259 12:48:52.702738
2260 12:48:53.337906 00300000 ################################################################
2261 12:48:53.338513
2262 12:48:53.983659 00380000 ################################################################
2263 12:48:53.984306
2264 12:48:54.634785 00400000 ################################################################
2265 12:48:54.634934
2266 12:48:55.245023 00480000 ################################################################
2267 12:48:55.245200
2268 12:48:55.744719 00500000 ############################################################### done.
2269 12:48:55.744865
2270 12:48:55.747913 Sending tftp read request... done.
2271 12:48:55.747999
2272 12:48:55.751288 Waiting for the transfer...
2273 12:48:55.751374
2274 12:48:55.751441 00000000 # done.
2275 12:48:55.751505
2276 12:48:55.761368 Command line loaded dynamically from TFTP file: 9584809/tftp-deploy-mo52qm_5/kernel/cmdline
2277 12:48:55.761475
2278 12:48:55.781255 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9584809/extract-nfsrootfs-i3_77q1z,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2279 12:48:55.781347
2280 12:48:55.784535 Shutting down all USB controllers.
2281 12:48:55.784619
2282 12:48:55.787885 Removing current net device
2283 12:48:55.787969
2284 12:48:55.791249 Finalizing coreboot
2285 12:48:55.791334
2286 12:48:55.797565 Exiting depthcharge with code 4 at timestamp: 25438547
2287 12:48:55.797650
2288 12:48:55.797718
2289 12:48:55.797780 Starting kernel ...
2290 12:48:55.797841
2291 12:48:55.797899
2292 12:48:55.798258 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2293 12:48:55.798355 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2294 12:48:55.798430 Setting prompt string to ['Linux version [0-9]']
2295 12:48:55.798499 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2296 12:48:55.798568 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2298 12:53:23.799174 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2300 12:53:23.800124 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2302 12:53:23.800843 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2305 12:53:23.802052 end: 2 depthcharge-action (duration 00:05:00) [common]
2307 12:53:23.803074 Cleaning after the job
2308 12:53:23.803411 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/ramdisk
2309 12:53:23.803870 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/kernel
2310 12:53:23.804385 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/nfsrootfs
2311 12:53:23.833299 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584809/tftp-deploy-mo52qm_5/modules
2312 12:53:23.833649 start: 5.1 power-off (timeout 00:00:30) [common]
2313 12:53:23.833804 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2314 12:53:23.909099 >> Command sent successfully.
2315 12:53:23.913781 Returned 0 in 0 seconds
2316 12:53:24.015136 end: 5.1 power-off (duration 00:00:00) [common]
2318 12:53:24.016428 start: 5.2 read-feedback (timeout 00:10:00) [common]
2319 12:53:24.017420 Listened to connection for namespace 'common' for up to 1s
2320 12:53:25.019076 Finalising connection for namespace 'common'
2321 12:53:25.019260 Disconnecting from shell: Finalise
2322 12:53:25.019342
2323 12:53:25.120091 end: 5.2 read-feedback (duration 00:00:01) [common]
2324 12:53:25.120229 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584809
2325 12:53:25.209695 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584809
2326 12:53:25.209884 JobError: Your job cannot terminate cleanly.