Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:48:10.168917 lava-dispatcher, installed at version: 2023.01
2 12:48:10.169108 start: 0 validate
3 12:48:10.169230 Start time: 2023-03-13 12:48:10.169222+00:00 (UTC)
4 12:48:10.169342 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:48:10.169469 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230303.0%2Famd64%2Frootfs.cpio.gz exists
6 12:48:10.462576 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:48:10.462752 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:48:13.964856 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:48:13.965620 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-939-g5ff13a6decb9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:48:14.968822 validate duration: 4.80
12 12:48:14.969197 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:48:14.969359 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:48:14.969463 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:48:14.969579 Not decompressing ramdisk as can be used compressed.
16 12:48:14.969671 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230303.0/amd64/rootfs.cpio.gz
17 12:48:14.969740 saving as /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/ramdisk/rootfs.cpio.gz
18 12:48:14.969802 total size: 35753585 (34MB)
19 12:48:14.974152 progress 0% (0MB)
20 12:48:14.983546 progress 5% (1MB)
21 12:48:14.993002 progress 10% (3MB)
22 12:48:15.001918 progress 15% (5MB)
23 12:48:15.011018 progress 20% (6MB)
24 12:48:15.019970 progress 25% (8MB)
25 12:48:15.029208 progress 30% (10MB)
26 12:48:15.038015 progress 35% (11MB)
27 12:48:15.047063 progress 40% (13MB)
28 12:48:15.056091 progress 45% (15MB)
29 12:48:15.065051 progress 50% (17MB)
30 12:48:15.074192 progress 55% (18MB)
31 12:48:15.083140 progress 60% (20MB)
32 12:48:15.092021 progress 65% (22MB)
33 12:48:15.100858 progress 70% (23MB)
34 12:48:15.109679 progress 75% (25MB)
35 12:48:15.118555 progress 80% (27MB)
36 12:48:15.127295 progress 85% (29MB)
37 12:48:15.135922 progress 90% (30MB)
38 12:48:15.144253 progress 95% (32MB)
39 12:48:15.152844 progress 100% (34MB)
40 12:48:15.152981 34MB downloaded in 0.18s (186.15MB/s)
41 12:48:15.153141 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:48:15.153388 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:48:15.153477 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:48:15.153562 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:48:15.153665 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:48:15.153736 saving as /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/kernel/bzImage
48 12:48:15.153797 total size: 7638928 (7MB)
49 12:48:15.153858 No compression specified
50 12:48:15.154902 progress 0% (0MB)
51 12:48:15.156790 progress 5% (0MB)
52 12:48:15.158737 progress 10% (0MB)
53 12:48:15.160559 progress 15% (1MB)
54 12:48:15.162484 progress 20% (1MB)
55 12:48:15.164453 progress 25% (1MB)
56 12:48:15.166231 progress 30% (2MB)
57 12:48:15.168161 progress 35% (2MB)
58 12:48:15.170123 progress 40% (2MB)
59 12:48:15.171890 progress 45% (3MB)
60 12:48:15.173854 progress 50% (3MB)
61 12:48:15.175748 progress 55% (4MB)
62 12:48:15.177526 progress 60% (4MB)
63 12:48:15.179415 progress 65% (4MB)
64 12:48:15.181337 progress 70% (5MB)
65 12:48:15.183072 progress 75% (5MB)
66 12:48:15.184997 progress 80% (5MB)
67 12:48:15.186884 progress 85% (6MB)
68 12:48:15.188647 progress 90% (6MB)
69 12:48:15.190536 progress 95% (6MB)
70 12:48:15.192468 progress 100% (7MB)
71 12:48:15.192583 7MB downloaded in 0.04s (187.85MB/s)
72 12:48:15.192731 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:48:15.192969 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:48:15.193090 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:48:15.193176 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:48:15.193285 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-939-g5ff13a6decb9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:48:15.193353 saving as /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/modules/modules.tar
79 12:48:15.193413 total size: 250760 (0MB)
80 12:48:15.193473 Using unxz to decompress xz
81 12:48:15.196682 progress 13% (0MB)
82 12:48:15.197073 progress 26% (0MB)
83 12:48:15.197415 progress 39% (0MB)
84 12:48:15.198802 progress 52% (0MB)
85 12:48:15.200801 progress 65% (0MB)
86 12:48:15.202718 progress 78% (0MB)
87 12:48:15.204604 progress 91% (0MB)
88 12:48:15.206447 progress 100% (0MB)
89 12:48:15.212114 0MB downloaded in 0.02s (12.80MB/s)
90 12:48:15.212511 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:48:15.212783 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:48:15.212877 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:48:15.212972 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:48:15.213058 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:48:15.213145 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:48:15.213332 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6
98 12:48:15.213444 makedir: /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin
99 12:48:15.213531 makedir: /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/tests
100 12:48:15.213612 makedir: /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/results
101 12:48:15.213719 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-add-keys
102 12:48:15.213861 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-add-sources
103 12:48:15.213978 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-background-process-start
104 12:48:15.214092 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-background-process-stop
105 12:48:15.214204 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-common-functions
106 12:48:15.214348 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-echo-ipv4
107 12:48:15.214502 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-install-packages
108 12:48:15.214616 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-installed-packages
109 12:48:15.214731 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-os-build
110 12:48:15.214842 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-probe-channel
111 12:48:15.214953 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-probe-ip
112 12:48:15.215064 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-target-ip
113 12:48:15.215177 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-target-mac
114 12:48:15.215314 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-target-storage
115 12:48:15.215456 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-case
116 12:48:15.215569 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-event
117 12:48:15.215683 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-feedback
118 12:48:15.215796 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-raise
119 12:48:15.215911 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-reference
120 12:48:15.216021 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-runner
121 12:48:15.216131 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-set
122 12:48:15.216268 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-test-shell
123 12:48:15.216469 Updating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-install-packages (oe)
124 12:48:15.216590 Updating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/bin/lava-installed-packages (oe)
125 12:48:15.216693 Creating /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/environment
126 12:48:15.216787 LAVA metadata
127 12:48:15.216863 - LAVA_JOB_ID=9584835
128 12:48:15.216935 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:48:15.217037 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:48:15.217106 skipped lava-vland-overlay
131 12:48:15.217187 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:48:15.217273 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:48:15.217345 skipped lava-multinode-overlay
134 12:48:15.217421 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:48:15.217510 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:48:15.217583 Loading test definitions
137 12:48:15.217679 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:48:15.217754 Using /lava-9584835 at stage 0
139 12:48:15.218004 uuid=9584835_1.4.2.3.1 testdef=None
140 12:48:15.218104 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:48:15.218197 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:48:15.218758 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:48:15.219001 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:48:15.219545 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:48:15.219782 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:48:15.220298 runner path: /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/0/tests/0_cros-ec test_uuid 9584835_1.4.2.3.1
149 12:48:15.220488 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:48:15.220787 Creating lava-test-runner.conf files
152 12:48:15.220863 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584835/lava-overlay-6xuagtx6/lava-9584835/0 for stage 0
153 12:48:15.220948 - 0_cros-ec
154 12:48:15.221043 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 12:48:15.221131 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 12:48:15.226880 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 12:48:15.226994 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 12:48:15.227088 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 12:48:15.227178 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 12:48:15.227269 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 12:48:15.978298 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 12:48:15.978646 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 12:48:15.978761 extracting modules file /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584835/extract-overlay-ramdisk-u0qu4fr9/ramdisk
164 12:48:15.986495 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 12:48:15.986628 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 12:48:15.986719 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584835/compress-overlay-eg0r9tke/overlay-1.4.2.4.tar.gz to ramdisk
167 12:48:15.986792 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584835/compress-overlay-eg0r9tke/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584835/extract-overlay-ramdisk-u0qu4fr9/ramdisk
168 12:48:15.990230 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 12:48:15.990344 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 12:48:15.990444 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 12:48:15.990538 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 12:48:15.990621 Building ramdisk /var/lib/lava/dispatcher/tmp/9584835/extract-overlay-ramdisk-u0qu4fr9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584835/extract-overlay-ramdisk-u0qu4fr9/ramdisk
173 12:48:16.239138 >> 184055 blocks
174 12:48:19.562418 rename /var/lib/lava/dispatcher/tmp/9584835/extract-overlay-ramdisk-u0qu4fr9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/ramdisk/ramdisk.cpio.gz
175 12:48:19.562815 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 12:48:19.562958 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 12:48:19.563100 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 12:48:19.563199 No mkimage arch provided, not using FIT.
179 12:48:19.563292 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 12:48:19.563413 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 12:48:19.563512 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
182 12:48:19.563611 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 12:48:19.563693 No LXC device requested
184 12:48:19.563779 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 12:48:19.563873 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 12:48:19.563959 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 12:48:19.564027 Checking files for TFTP limit of 4294967296 bytes.
188 12:48:19.564450 end: 1 tftp-deploy (duration 00:00:05) [common]
189 12:48:19.564591 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 12:48:19.564690 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 12:48:19.564818 substitutions:
192 12:48:19.564886 - {DTB}: None
193 12:48:19.564954 - {INITRD}: 9584835/tftp-deploy-jz06f028/ramdisk/ramdisk.cpio.gz
194 12:48:19.565017 - {KERNEL}: 9584835/tftp-deploy-jz06f028/kernel/bzImage
195 12:48:19.565076 - {LAVA_MAC}: None
196 12:48:19.565135 - {PRESEED_CONFIG}: None
197 12:48:19.565193 - {PRESEED_LOCAL}: None
198 12:48:19.565250 - {RAMDISK}: 9584835/tftp-deploy-jz06f028/ramdisk/ramdisk.cpio.gz
199 12:48:19.565342 - {ROOT_PART}: None
200 12:48:19.565398 - {ROOT}: None
201 12:48:19.565455 - {SERVER_IP}: 192.168.201.1
202 12:48:19.565528 - {TEE}: None
203 12:48:19.565618 Parsed boot commands:
204 12:48:19.565688 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 12:48:19.565887 Parsed boot commands: tftpboot 192.168.201.1 9584835/tftp-deploy-jz06f028/kernel/bzImage 9584835/tftp-deploy-jz06f028/kernel/cmdline 9584835/tftp-deploy-jz06f028/ramdisk/ramdisk.cpio.gz
206 12:48:19.566079 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 12:48:19.566174 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 12:48:19.566274 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 12:48:19.566508 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 12:48:19.566630 Not connected, no need to disconnect.
211 12:48:19.566711 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 12:48:19.566798 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 12:48:19.566868 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
214 12:48:19.569854 Setting prompt string to ['lava-test: # ']
215 12:48:19.570148 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 12:48:19.570257 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 12:48:19.570386 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 12:48:19.570479 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 12:48:19.570666 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
220 12:48:24.713948 >> Command sent successfully.
221 12:48:24.722616 Returned 0 in 5 seconds
222 12:48:24.824301 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 12:48:24.826050 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 12:48:24.826702 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 12:48:24.827239 Setting prompt string to 'Starting depthcharge on Voema...'
227 12:48:24.827683 Changing prompt to 'Starting depthcharge on Voema...'
228 12:48:24.828207 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 12:48:24.829719 [Enter `^Ec?' for help]
230 12:48:26.512726
231 12:48:26.512899
232 12:48:26.522179 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 12:48:26.529097 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 12:48:26.532500 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 12:48:26.536243 CPU: AES supported, TXT NOT supported, VT supported
236 12:48:26.542688 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 12:48:26.549853 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 12:48:26.552885 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 12:48:26.555746 VBOOT: Loading verstage.
240 12:48:26.559947 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 12:48:26.566517 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 12:48:26.570166 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 12:48:26.577047 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 12:48:26.586861 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 12:48:26.587353
246 12:48:26.587716
247 12:48:26.596560 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 12:48:26.613249 Probing TPM: . done!
249 12:48:26.616665 TPM ready after 0 ms
250 12:48:26.620049 Connected to device vid:did:rid of 1ae0:0028:00
251 12:48:26.631462 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
252 12:48:26.638003 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 12:48:26.641151 Initialized TPM device CR50 revision 0
254 12:48:26.736154 tlcl_send_startup: Startup return code is 0
255 12:48:26.736767 TPM: setup succeeded
256 12:48:26.751806 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 12:48:26.765865 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 12:48:26.778835 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 12:48:26.788649 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 12:48:26.792307 Chrome EC: UHEPI supported
261 12:48:26.795801 Phase 1
262 12:48:26.798660 FMAP: area GBB found @ 1805000 (458752 bytes)
263 12:48:26.808966 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 12:48:26.815471 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 12:48:26.821881 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 12:48:26.828554 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 12:48:26.831590 Recovery requested (1009000e)
268 12:48:26.841139 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 12:48:26.846973 tlcl_extend: response is 0
270 12:48:26.853575 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 12:48:26.863653 tlcl_extend: response is 0
272 12:48:26.870258 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 12:48:26.876878 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 12:48:26.883686 BS: verstage times (exec / console): total (unknown) / 142 ms
275 12:48:26.884229
276 12:48:26.884665
277 12:48:26.896389 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 12:48:26.903318 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 12:48:26.906547 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 12:48:26.909970 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 12:48:26.916411 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 12:48:26.919950 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 12:48:26.923119 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 12:48:26.926334 TCO_STS: 0000 0000
285 12:48:26.930366 GEN_PMCON: d0015038 00002200
286 12:48:26.934451 GBLRST_CAUSE: 00000000 00000000
287 12:48:26.934962 HPR_CAUSE0: 00000000
288 12:48:26.937306 prev_sleep_state 5
289 12:48:26.940919 Boot Count incremented to 15051
290 12:48:26.947115 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 12:48:26.953854 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 12:48:26.960303 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 12:48:26.966896 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 12:48:26.971038 Chrome EC: UHEPI supported
295 12:48:26.977620 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 12:48:26.990535 Probing TPM: done!
297 12:48:26.997221 Connected to device vid:did:rid of 1ae0:0028:00
298 12:48:27.006663 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 12:48:27.010001 Initialized TPM device CR50 revision 0
300 12:48:27.025357 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 12:48:27.032129 MRC: Hash idx 0x100b comparison successful.
302 12:48:27.035117 MRC cache found, size faa8
303 12:48:27.035203 bootmode is set to: 2
304 12:48:27.038765 SPD index = 2
305 12:48:27.045348 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 12:48:27.048221 SPD: module type is LPDDR4X
307 12:48:27.052147 SPD: module part number is MT53D1G64D4NW-046
308 12:48:27.058198 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 12:48:27.061582 SPD: device width 16 bits, bus width 16 bits
310 12:48:27.067998 SPD: module size is 2048 MB (per channel)
311 12:48:27.497275 CBMEM:
312 12:48:27.500676 IMD: root @ 0x76fff000 254 entries.
313 12:48:27.503820 IMD: root @ 0x76ffec00 62 entries.
314 12:48:27.507024 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 12:48:27.514278 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 12:48:27.517926 External stage cache:
317 12:48:27.521239 IMD: root @ 0x7b3ff000 254 entries.
318 12:48:27.524301 IMD: root @ 0x7b3fec00 62 entries.
319 12:48:27.538282 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 12:48:27.544822 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 12:48:27.551223 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 12:48:27.565260 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 12:48:27.572017 cse_lite: Skip switching to RW in the recovery path
324 12:48:27.572528 8 DIMMs found
325 12:48:27.572903 SMM Memory Map
326 12:48:27.578731 SMRAM : 0x7b000000 0x800000
327 12:48:27.581975 Subregion 0: 0x7b000000 0x200000
328 12:48:27.585474 Subregion 1: 0x7b200000 0x200000
329 12:48:27.588301 Subregion 2: 0x7b400000 0x400000
330 12:48:27.588759 top_of_ram = 0x77000000
331 12:48:27.595167 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 12:48:27.601702 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 12:48:27.605288 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 12:48:27.611837 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 12:48:27.617633 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 12:48:27.623992 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 12:48:27.634936 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 12:48:27.641517 Processing 211 relocs. Offset value of 0x74c0b000
339 12:48:27.647838 BS: romstage times (exec / console): total (unknown) / 277 ms
340 12:48:27.653977
341 12:48:27.654426
342 12:48:27.664013 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 12:48:27.667331 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 12:48:27.677022 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 12:48:27.683155 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 12:48:27.689705 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 12:48:27.696349 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 12:48:27.740577 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 12:48:27.747122 Processing 5008 relocs. Offset value of 0x75d98000
350 12:48:27.750466 BS: postcar times (exec / console): total (unknown) / 59 ms
351 12:48:27.753635
352 12:48:27.753963
353 12:48:27.763375 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 12:48:27.763704 Normal boot
355 12:48:27.767046 FW_CONFIG value is 0x804c02
356 12:48:27.770170 PCI: 00:07.0 disabled by fw_config
357 12:48:27.773213 PCI: 00:07.1 disabled by fw_config
358 12:48:27.779729 PCI: 00:0d.2 disabled by fw_config
359 12:48:27.782954 PCI: 00:1c.7 disabled by fw_config
360 12:48:27.786617 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 12:48:27.793324 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 12:48:27.799871 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 12:48:27.802853 GENERIC: 0.0 disabled by fw_config
364 12:48:27.806482 GENERIC: 1.0 disabled by fw_config
365 12:48:27.809791 fw_config match found: DB_USB=USB3_ACTIVE
366 12:48:27.813468 fw_config match found: DB_USB=USB3_ACTIVE
367 12:48:27.816522 fw_config match found: DB_USB=USB3_ACTIVE
368 12:48:27.822946 fw_config match found: DB_USB=USB3_ACTIVE
369 12:48:27.826590 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 12:48:27.836025 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 12:48:27.843217 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 12:48:27.849535 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 12:48:27.856062 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 12:48:27.859725 microcode: Update skipped, already up-to-date
375 12:48:27.866175 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 12:48:27.894498 Detected 4 core, 8 thread CPU.
377 12:48:27.897586 Setting up SMI for CPU
378 12:48:27.901041 IED base = 0x7b400000
379 12:48:27.901665 IED size = 0x00400000
380 12:48:27.904016 Will perform SMM setup.
381 12:48:27.910111 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 12:48:27.916824 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 12:48:27.923442 Processing 16 relocs. Offset value of 0x00030000
384 12:48:27.927064 Attempting to start 7 APs
385 12:48:27.930144 Waiting for 10ms after sending INIT.
386 12:48:27.945561 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
387 12:48:27.949110 AP: slot 7 apic_id 2.
388 12:48:27.952034 AP: slot 2 apic_id 3.
389 12:48:27.952129 done.
390 12:48:27.952213 AP: slot 4 apic_id 7.
391 12:48:27.955317 AP: slot 5 apic_id 4.
392 12:48:27.959153 AP: slot 1 apic_id 5.
393 12:48:27.962127 Waiting for 2nd SIPI to complete...done.
394 12:48:27.965312 AP: slot 3 apic_id 6.
395 12:48:27.972249 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 12:48:27.979165 Processing 13 relocs. Offset value of 0x00038000
397 12:48:27.982039 Unable to locate Global NVS
398 12:48:27.988756 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 12:48:27.991896 Installing permanent SMM handler to 0x7b000000
400 12:48:28.002307 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 12:48:28.005157 Processing 794 relocs. Offset value of 0x7b010000
402 12:48:28.014888 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 12:48:28.018457 Processing 13 relocs. Offset value of 0x7b008000
404 12:48:28.025150 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 12:48:28.031881 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 12:48:28.038424 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 12:48:28.041400 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 12:48:28.047989 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 12:48:28.054664 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 12:48:28.061673 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 12:48:28.065045 Unable to locate Global NVS
412 12:48:28.071270 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 12:48:28.074576 Clearing SMI status registers
414 12:48:28.077774 SMI_STS: PM1
415 12:48:28.078431 PM1_STS: PWRBTN
416 12:48:28.084240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 12:48:28.087551 In relocation handler: CPU 0
418 12:48:28.094245 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 12:48:28.097608 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 12:48:28.101103 Relocation complete.
421 12:48:28.107302 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
422 12:48:28.111063 In relocation handler: CPU 6
423 12:48:28.114220 New SMBASE=0x7affe800 IEDBASE=0x7b400000
424 12:48:28.117285 Relocation complete.
425 12:48:28.124065 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
426 12:48:28.127096 In relocation handler: CPU 7
427 12:48:28.130769 New SMBASE=0x7affe400 IEDBASE=0x7b400000
428 12:48:28.137351 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 12:48:28.137932 Relocation complete.
430 12:48:28.143912 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
431 12:48:28.147388 In relocation handler: CPU 2
432 12:48:28.153886 New SMBASE=0x7afff800 IEDBASE=0x7b400000
433 12:48:28.154549 Relocation complete.
434 12:48:28.159916 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
435 12:48:28.163424 In relocation handler: CPU 5
436 12:48:28.170102 New SMBASE=0x7affec00 IEDBASE=0x7b400000
437 12:48:28.173534 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 12:48:28.176400 Relocation complete.
439 12:48:28.184059 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
440 12:48:28.184523 In relocation handler: CPU 1
441 12:48:28.190724 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
442 12:48:28.191069 Relocation complete.
443 12:48:28.200674 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
444 12:48:28.200889 In relocation handler: CPU 4
445 12:48:28.207340 New SMBASE=0x7afff000 IEDBASE=0x7b400000
446 12:48:28.207630 Relocation complete.
447 12:48:28.217296 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
448 12:48:28.217523 In relocation handler: CPU 3
449 12:48:28.223740 New SMBASE=0x7afff400 IEDBASE=0x7b400000
450 12:48:28.226783 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 12:48:28.229941 Relocation complete.
452 12:48:28.230030 Initializing CPU #0
453 12:48:28.233446 CPU: vendor Intel device 806c1
454 12:48:28.240169 CPU: family 06, model 8c, stepping 01
455 12:48:28.240257 Clearing out pending MCEs
456 12:48:28.243628 Setting up local APIC...
457 12:48:28.246584 apic_id: 0x00 done.
458 12:48:28.249880 Turbo is available but hidden
459 12:48:28.253106 Turbo is available and visible
460 12:48:28.256571 microcode: Update skipped, already up-to-date
461 12:48:28.260277 CPU #0 initialized
462 12:48:28.260390 Initializing CPU #5
463 12:48:28.263270 Initializing CPU #1
464 12:48:28.266370 CPU: vendor Intel device 806c1
465 12:48:28.270075 CPU: family 06, model 8c, stepping 01
466 12:48:28.273063 CPU: vendor Intel device 806c1
467 12:48:28.276693 CPU: family 06, model 8c, stepping 01
468 12:48:28.279642 Clearing out pending MCEs
469 12:48:28.282916 Initializing CPU #3
470 12:48:28.283009 Initializing CPU #4
471 12:48:28.286545 CPU: vendor Intel device 806c1
472 12:48:28.289914 CPU: family 06, model 8c, stepping 01
473 12:48:28.293302 CPU: vendor Intel device 806c1
474 12:48:28.296204 CPU: family 06, model 8c, stepping 01
475 12:48:28.299603 Clearing out pending MCEs
476 12:48:28.302928 Clearing out pending MCEs
477 12:48:28.306577 Setting up local APIC...
478 12:48:28.306676 Initializing CPU #2
479 12:48:28.309598 Initializing CPU #7
480 12:48:28.313174 CPU: vendor Intel device 806c1
481 12:48:28.316091 CPU: family 06, model 8c, stepping 01
482 12:48:28.319720 CPU: vendor Intel device 806c1
483 12:48:28.322655 CPU: family 06, model 8c, stepping 01
484 12:48:28.326273 Clearing out pending MCEs
485 12:48:28.329421 Clearing out pending MCEs
486 12:48:28.333143 Setting up local APIC...
487 12:48:28.333234 Setting up local APIC...
488 12:48:28.336172 Clearing out pending MCEs
489 12:48:28.339746 Setting up local APIC...
490 12:48:28.342776 apic_id: 0x07 done.
491 12:48:28.342871 apic_id: 0x06 done.
492 12:48:28.349305 microcode: Update skipped, already up-to-date
493 12:48:28.352400 microcode: Update skipped, already up-to-date
494 12:48:28.355810 CPU #4 initialized
495 12:48:28.355907 CPU #3 initialized
496 12:48:28.359537 Setting up local APIC...
497 12:48:28.362531 apic_id: 0x03 done.
498 12:48:28.362620 Setting up local APIC...
499 12:48:28.365557 Initializing CPU #6
500 12:48:28.369154 apic_id: 0x02 done.
501 12:48:28.372538 microcode: Update skipped, already up-to-date
502 12:48:28.375717 microcode: Update skipped, already up-to-date
503 12:48:28.378819 CPU #2 initialized
504 12:48:28.382273 CPU: vendor Intel device 806c1
505 12:48:28.385627 CPU: family 06, model 8c, stepping 01
506 12:48:28.389024 apic_id: 0x05 done.
507 12:48:28.389102 apic_id: 0x04 done.
508 12:48:28.395573 microcode: Update skipped, already up-to-date
509 12:48:28.398937 microcode: Update skipped, already up-to-date
510 12:48:28.401870 CPU #1 initialized
511 12:48:28.401949 CPU #5 initialized
512 12:48:28.405521 Clearing out pending MCEs
513 12:48:28.408546 CPU #7 initialized
514 12:48:28.408631 Setting up local APIC...
515 12:48:28.412150 apic_id: 0x01 done.
516 12:48:28.418688 microcode: Update skipped, already up-to-date
517 12:48:28.418774 CPU #6 initialized
518 12:48:28.422342 bsp_do_flight_plan done after 457 msecs.
519 12:48:28.425227 CPU: frequency set to 4400 MHz
520 12:48:28.428903 Enabling SMIs.
521 12:48:28.435062 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 12:48:28.450909 SATAXPCIE1 indicates PCIe NVMe is present
523 12:48:28.453999 Probing TPM: done!
524 12:48:28.457110 Connected to device vid:did:rid of 1ae0:0028:00
525 12:48:28.468195 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
526 12:48:28.471276 Initialized TPM device CR50 revision 0
527 12:48:28.474265 Enabling S0i3.4
528 12:48:28.481023 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 12:48:28.484180 Found a VBT of 8704 bytes after decompression
530 12:48:28.491008 cse_lite: CSE RO boot. HybridStorageMode disabled
531 12:48:28.497892 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 12:48:28.572328 FSPS returned 0
533 12:48:28.575822 Executing Phase 1 of FspMultiPhaseSiInit
534 12:48:28.585542 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 12:48:28.589116 port C0 DISC req: usage 1 usb3 1 usb2 5
536 12:48:28.592098 Raw Buffer output 0 00000511
537 12:48:28.595199 Raw Buffer output 1 00000000
538 12:48:28.599218 pmc_send_ipc_cmd succeeded
539 12:48:28.605680 port C1 DISC req: usage 1 usb3 2 usb2 3
540 12:48:28.605766 Raw Buffer output 0 00000321
541 12:48:28.608897 Raw Buffer output 1 00000000
542 12:48:28.613447 pmc_send_ipc_cmd succeeded
543 12:48:28.618430 Detected 4 core, 8 thread CPU.
544 12:48:28.621389 Detected 4 core, 8 thread CPU.
545 12:48:28.822168 Display FSP Version Info HOB
546 12:48:28.825296 Reference Code - CPU = a.0.4c.31
547 12:48:28.828435 uCode Version = 0.0.0.86
548 12:48:28.832143 TXT ACM version = ff.ff.ff.ffff
549 12:48:28.834959 Reference Code - ME = a.0.4c.31
550 12:48:28.838399 MEBx version = 0.0.0.0
551 12:48:28.841993 ME Firmware Version = Consumer SKU
552 12:48:28.845155 Reference Code - PCH = a.0.4c.31
553 12:48:28.848140 PCH-CRID Status = Disabled
554 12:48:28.851758 PCH-CRID Original Value = ff.ff.ff.ffff
555 12:48:28.854948 PCH-CRID New Value = ff.ff.ff.ffff
556 12:48:28.858149 OPROM - RST - RAID = ff.ff.ff.ffff
557 12:48:28.861529 PCH Hsio Version = 4.0.0.0
558 12:48:28.865083 Reference Code - SA - System Agent = a.0.4c.31
559 12:48:28.867904 Reference Code - MRC = 2.0.0.1
560 12:48:28.871352 SA - PCIe Version = a.0.4c.31
561 12:48:28.874396 SA-CRID Status = Disabled
562 12:48:28.877923 SA-CRID Original Value = 0.0.0.1
563 12:48:28.880949 SA-CRID New Value = 0.0.0.1
564 12:48:28.884459 OPROM - VBIOS = ff.ff.ff.ffff
565 12:48:28.887564 IO Manageability Engine FW Version = 11.1.4.0
566 12:48:28.891069 PHY Build Version = 0.0.0.e0
567 12:48:28.894079 Thunderbolt(TM) FW Version = 0.0.0.0
568 12:48:28.900741 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 12:48:28.904517 ITSS IRQ Polarities Before:
570 12:48:28.904605 IPC0: 0xffffffff
571 12:48:28.907612 IPC1: 0xffffffff
572 12:48:28.907700 IPC2: 0xffffffff
573 12:48:28.910525 IPC3: 0xffffffff
574 12:48:28.913816 ITSS IRQ Polarities After:
575 12:48:28.913903 IPC0: 0xffffffff
576 12:48:28.917313 IPC1: 0xffffffff
577 12:48:28.917400 IPC2: 0xffffffff
578 12:48:28.920611 IPC3: 0xffffffff
579 12:48:28.924250 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 12:48:28.937147 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 12:48:28.947052 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 12:48:28.960208 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 12:48:28.966750 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
584 12:48:28.970374 Enumerating buses...
585 12:48:28.973440 Show all devs... Before device enumeration.
586 12:48:28.977001 Root Device: enabled 1
587 12:48:28.980003 DOMAIN: 0000: enabled 1
588 12:48:28.980105 CPU_CLUSTER: 0: enabled 1
589 12:48:28.983479 PCI: 00:00.0: enabled 1
590 12:48:28.986476 PCI: 00:02.0: enabled 1
591 12:48:28.990049 PCI: 00:04.0: enabled 1
592 12:48:28.990136 PCI: 00:05.0: enabled 1
593 12:48:28.993664 PCI: 00:06.0: enabled 0
594 12:48:28.996554 PCI: 00:07.0: enabled 0
595 12:48:28.996645 PCI: 00:07.1: enabled 0
596 12:48:28.999732 PCI: 00:07.2: enabled 0
597 12:48:29.003311 PCI: 00:07.3: enabled 0
598 12:48:29.006338 PCI: 00:08.0: enabled 1
599 12:48:29.006422 PCI: 00:09.0: enabled 0
600 12:48:29.009693 PCI: 00:0a.0: enabled 0
601 12:48:29.013298 PCI: 00:0d.0: enabled 1
602 12:48:29.016483 PCI: 00:0d.1: enabled 0
603 12:48:29.016558 PCI: 00:0d.2: enabled 0
604 12:48:29.019643 PCI: 00:0d.3: enabled 0
605 12:48:29.023425 PCI: 00:0e.0: enabled 0
606 12:48:29.026695 PCI: 00:10.2: enabled 1
607 12:48:29.026782 PCI: 00:10.6: enabled 0
608 12:48:29.029538 PCI: 00:10.7: enabled 0
609 12:48:29.032824 PCI: 00:12.0: enabled 0
610 12:48:29.036087 PCI: 00:12.6: enabled 0
611 12:48:29.036167 PCI: 00:13.0: enabled 0
612 12:48:29.039857 PCI: 00:14.0: enabled 1
613 12:48:29.042963 PCI: 00:14.1: enabled 0
614 12:48:29.046324 PCI: 00:14.2: enabled 1
615 12:48:29.046415 PCI: 00:14.3: enabled 1
616 12:48:29.049501 PCI: 00:15.0: enabled 1
617 12:48:29.052919 PCI: 00:15.1: enabled 1
618 12:48:29.056227 PCI: 00:15.2: enabled 1
619 12:48:29.056338 PCI: 00:15.3: enabled 1
620 12:48:29.059454 PCI: 00:16.0: enabled 1
621 12:48:29.062549 PCI: 00:16.1: enabled 0
622 12:48:29.062629 PCI: 00:16.2: enabled 0
623 12:48:29.066259 PCI: 00:16.3: enabled 0
624 12:48:29.069369 PCI: 00:16.4: enabled 0
625 12:48:29.073039 PCI: 00:16.5: enabled 0
626 12:48:29.073123 PCI: 00:17.0: enabled 1
627 12:48:29.075835 PCI: 00:19.0: enabled 0
628 12:48:29.078874 PCI: 00:19.1: enabled 1
629 12:48:29.082410 PCI: 00:19.2: enabled 0
630 12:48:29.082489 PCI: 00:1c.0: enabled 1
631 12:48:29.085559 PCI: 00:1c.1: enabled 0
632 12:48:29.089042 PCI: 00:1c.2: enabled 0
633 12:48:29.092721 PCI: 00:1c.3: enabled 0
634 12:48:29.092809 PCI: 00:1c.4: enabled 0
635 12:48:29.095778 PCI: 00:1c.5: enabled 0
636 12:48:29.098820 PCI: 00:1c.6: enabled 1
637 12:48:29.102410 PCI: 00:1c.7: enabled 0
638 12:48:29.102491 PCI: 00:1d.0: enabled 1
639 12:48:29.105561 PCI: 00:1d.1: enabled 0
640 12:48:29.109077 PCI: 00:1d.2: enabled 1
641 12:48:29.109160 PCI: 00:1d.3: enabled 0
642 12:48:29.112114 PCI: 00:1e.0: enabled 1
643 12:48:29.115799 PCI: 00:1e.1: enabled 0
644 12:48:29.118857 PCI: 00:1e.2: enabled 1
645 12:48:29.118929 PCI: 00:1e.3: enabled 1
646 12:48:29.122458 PCI: 00:1f.0: enabled 1
647 12:48:29.125485 PCI: 00:1f.1: enabled 0
648 12:48:29.128709 PCI: 00:1f.2: enabled 1
649 12:48:29.128796 PCI: 00:1f.3: enabled 1
650 12:48:29.132005 PCI: 00:1f.4: enabled 0
651 12:48:29.135512 PCI: 00:1f.5: enabled 1
652 12:48:29.138921 PCI: 00:1f.6: enabled 0
653 12:48:29.139009 PCI: 00:1f.7: enabled 0
654 12:48:29.141818 APIC: 00: enabled 1
655 12:48:29.145493 GENERIC: 0.0: enabled 1
656 12:48:29.145580 GENERIC: 0.0: enabled 1
657 12:48:29.148351 GENERIC: 1.0: enabled 1
658 12:48:29.151663 GENERIC: 0.0: enabled 1
659 12:48:29.155181 GENERIC: 1.0: enabled 1
660 12:48:29.155269 USB0 port 0: enabled 1
661 12:48:29.158455 GENERIC: 0.0: enabled 1
662 12:48:29.161737 USB0 port 0: enabled 1
663 12:48:29.165143 GENERIC: 0.0: enabled 1
664 12:48:29.165230 I2C: 00:1a: enabled 1
665 12:48:29.168278 I2C: 00:31: enabled 1
666 12:48:29.171863 I2C: 00:32: enabled 1
667 12:48:29.171956 I2C: 00:10: enabled 1
668 12:48:29.174843 I2C: 00:15: enabled 1
669 12:48:29.178385 GENERIC: 0.0: enabled 0
670 12:48:29.178470 GENERIC: 1.0: enabled 0
671 12:48:29.181347 GENERIC: 0.0: enabled 1
672 12:48:29.185005 SPI: 00: enabled 1
673 12:48:29.185093 SPI: 00: enabled 1
674 12:48:29.188468 PNP: 0c09.0: enabled 1
675 12:48:29.191332 GENERIC: 0.0: enabled 1
676 12:48:29.195199 USB3 port 0: enabled 1
677 12:48:29.195274 USB3 port 1: enabled 1
678 12:48:29.197916 USB3 port 2: enabled 0
679 12:48:29.201759 USB3 port 3: enabled 0
680 12:48:29.201834 USB2 port 0: enabled 0
681 12:48:29.204539 USB2 port 1: enabled 1
682 12:48:29.208223 USB2 port 2: enabled 1
683 12:48:29.211179 USB2 port 3: enabled 0
684 12:48:29.211253 USB2 port 4: enabled 1
685 12:48:29.214926 USB2 port 5: enabled 0
686 12:48:29.218135 USB2 port 6: enabled 0
687 12:48:29.218239 USB2 port 7: enabled 0
688 12:48:29.220949 USB2 port 8: enabled 0
689 12:48:29.224649 USB2 port 9: enabled 0
690 12:48:29.224723 USB3 port 0: enabled 0
691 12:48:29.227881 USB3 port 1: enabled 1
692 12:48:29.230877 USB3 port 2: enabled 0
693 12:48:29.234496 USB3 port 3: enabled 0
694 12:48:29.234590 GENERIC: 0.0: enabled 1
695 12:48:29.237451 GENERIC: 1.0: enabled 1
696 12:48:29.241061 APIC: 05: enabled 1
697 12:48:29.241135 APIC: 03: enabled 1
698 12:48:29.243995 APIC: 06: enabled 1
699 12:48:29.247703 APIC: 07: enabled 1
700 12:48:29.247782 APIC: 04: enabled 1
701 12:48:29.250849 APIC: 01: enabled 1
702 12:48:29.250922 APIC: 02: enabled 1
703 12:48:29.254310 Compare with tree...
704 12:48:29.257488 Root Device: enabled 1
705 12:48:29.260765 DOMAIN: 0000: enabled 1
706 12:48:29.260852 PCI: 00:00.0: enabled 1
707 12:48:29.264141 PCI: 00:02.0: enabled 1
708 12:48:29.267187 PCI: 00:04.0: enabled 1
709 12:48:29.270837 GENERIC: 0.0: enabled 1
710 12:48:29.273794 PCI: 00:05.0: enabled 1
711 12:48:29.273870 PCI: 00:06.0: enabled 0
712 12:48:29.277414 PCI: 00:07.0: enabled 0
713 12:48:29.280233 GENERIC: 0.0: enabled 1
714 12:48:29.283635 PCI: 00:07.1: enabled 0
715 12:48:29.286963 GENERIC: 1.0: enabled 1
716 12:48:29.287088 PCI: 00:07.2: enabled 0
717 12:48:29.290312 GENERIC: 0.0: enabled 1
718 12:48:29.293466 PCI: 00:07.3: enabled 0
719 12:48:29.296846 GENERIC: 1.0: enabled 1
720 12:48:29.300402 PCI: 00:08.0: enabled 1
721 12:48:29.303666 PCI: 00:09.0: enabled 0
722 12:48:29.303757 PCI: 00:0a.0: enabled 0
723 12:48:29.307181 PCI: 00:0d.0: enabled 1
724 12:48:29.309995 USB0 port 0: enabled 1
725 12:48:29.313768 USB3 port 0: enabled 1
726 12:48:29.316865 USB3 port 1: enabled 1
727 12:48:29.316939 USB3 port 2: enabled 0
728 12:48:29.319985 USB3 port 3: enabled 0
729 12:48:29.323190 PCI: 00:0d.1: enabled 0
730 12:48:29.326667 PCI: 00:0d.2: enabled 0
731 12:48:29.329751 GENERIC: 0.0: enabled 1
732 12:48:29.329839 PCI: 00:0d.3: enabled 0
733 12:48:29.333423 PCI: 00:0e.0: enabled 0
734 12:48:29.336288 PCI: 00:10.2: enabled 1
735 12:48:29.339769 PCI: 00:10.6: enabled 0
736 12:48:29.343274 PCI: 00:10.7: enabled 0
737 12:48:29.343362 PCI: 00:12.0: enabled 0
738 12:48:29.346342 PCI: 00:12.6: enabled 0
739 12:48:29.349925 PCI: 00:13.0: enabled 0
740 12:48:29.353044 PCI: 00:14.0: enabled 1
741 12:48:29.356174 USB0 port 0: enabled 1
742 12:48:29.356271 USB2 port 0: enabled 0
743 12:48:29.359694 USB2 port 1: enabled 1
744 12:48:29.362898 USB2 port 2: enabled 1
745 12:48:29.366115 USB2 port 3: enabled 0
746 12:48:29.369295 USB2 port 4: enabled 1
747 12:48:29.372656 USB2 port 5: enabled 0
748 12:48:29.372750 USB2 port 6: enabled 0
749 12:48:29.376565 USB2 port 7: enabled 0
750 12:48:29.379666 USB2 port 8: enabled 0
751 12:48:29.382794 USB2 port 9: enabled 0
752 12:48:29.386309 USB3 port 0: enabled 0
753 12:48:29.389379 USB3 port 1: enabled 1
754 12:48:29.389459 USB3 port 2: enabled 0
755 12:48:29.392557 USB3 port 3: enabled 0
756 12:48:29.396043 PCI: 00:14.1: enabled 0
757 12:48:29.399350 PCI: 00:14.2: enabled 1
758 12:48:29.402691 PCI: 00:14.3: enabled 1
759 12:48:29.402778 GENERIC: 0.0: enabled 1
760 12:48:29.405776 PCI: 00:15.0: enabled 1
761 12:48:29.409547 I2C: 00:1a: enabled 1
762 12:48:29.412809 I2C: 00:31: enabled 1
763 12:48:29.415789 I2C: 00:32: enabled 1
764 12:48:29.415877 PCI: 00:15.1: enabled 1
765 12:48:29.418922 I2C: 00:10: enabled 1
766 12:48:29.422469 PCI: 00:15.2: enabled 1
767 12:48:29.426176 PCI: 00:15.3: enabled 1
768 12:48:29.429777 PCI: 00:16.0: enabled 1
769 12:48:29.429854 PCI: 00:16.1: enabled 0
770 12:48:29.432927 PCI: 00:16.2: enabled 0
771 12:48:29.436058 PCI: 00:16.3: enabled 0
772 12:48:29.439627 PCI: 00:16.4: enabled 0
773 12:48:29.439715 PCI: 00:16.5: enabled 0
774 12:48:29.443231 PCI: 00:17.0: enabled 1
775 12:48:29.446876 PCI: 00:19.0: enabled 0
776 12:48:29.449877 PCI: 00:19.1: enabled 1
777 12:48:29.449964 I2C: 00:15: enabled 1
778 12:48:29.452853 PCI: 00:19.2: enabled 0
779 12:48:29.456265 PCI: 00:1d.0: enabled 1
780 12:48:29.506178 GENERIC: 0.0: enabled 1
781 12:48:29.506281 PCI: 00:1e.0: enabled 1
782 12:48:29.506795 PCI: 00:1e.1: enabled 0
783 12:48:29.506880 PCI: 00:1e.2: enabled 1
784 12:48:29.506947 SPI: 00: enabled 1
785 12:48:29.507197 PCI: 00:1e.3: enabled 1
786 12:48:29.507266 SPI: 00: enabled 1
787 12:48:29.507328 PCI: 00:1f.0: enabled 1
788 12:48:29.507397 PNP: 0c09.0: enabled 1
789 12:48:29.507456 PCI: 00:1f.1: enabled 0
790 12:48:29.507705 PCI: 00:1f.2: enabled 1
791 12:48:29.507773 GENERIC: 0.0: enabled 1
792 12:48:29.508248 GENERIC: 0.0: enabled 1
793 12:48:29.508346 GENERIC: 1.0: enabled 1
794 12:48:29.508618 PCI: 00:1f.3: enabled 1
795 12:48:29.508684 PCI: 00:1f.4: enabled 0
796 12:48:29.508751 PCI: 00:1f.5: enabled 1
797 12:48:29.508812 PCI: 00:1f.6: enabled 0
798 12:48:29.508870 PCI: 00:1f.7: enabled 0
799 12:48:29.558280 CPU_CLUSTER: 0: enabled 1
800 12:48:29.558398 APIC: 00: enabled 1
801 12:48:29.558484 APIC: 05: enabled 1
802 12:48:29.558753 APIC: 03: enabled 1
803 12:48:29.558823 APIC: 06: enabled 1
804 12:48:29.558886 APIC: 07: enabled 1
805 12:48:29.559137 APIC: 04: enabled 1
806 12:48:29.559205 APIC: 01: enabled 1
807 12:48:29.559477 APIC: 02: enabled 1
808 12:48:29.559546 Root Device scanning...
809 12:48:29.559616 scan_static_bus for Root Device
810 12:48:29.559682 DOMAIN: 0000 enabled
811 12:48:29.559741 CPU_CLUSTER: 0 enabled
812 12:48:29.560010 DOMAIN: 0000 scanning...
813 12:48:29.560078 PCI: pci_scan_bus for bus 00
814 12:48:29.560147 PCI: 00:00.0 [8086/0000] ops
815 12:48:29.560207 PCI: 00:00.0 [8086/9a12] enabled
816 12:48:29.560265 PCI: 00:02.0 [8086/0000] bus ops
817 12:48:29.560351 PCI: 00:02.0 [8086/9a40] enabled
818 12:48:29.596210 PCI: 00:04.0 [8086/0000] bus ops
819 12:48:29.596335 PCI: 00:04.0 [8086/9a03] enabled
820 12:48:29.596609 PCI: 00:05.0 [8086/9a19] enabled
821 12:48:29.596707 PCI: 00:07.0 [0000/0000] hidden
822 12:48:29.596816 PCI: 00:08.0 [8086/9a11] enabled
823 12:48:29.596908 PCI: 00:0a.0 [8086/9a0d] disabled
824 12:48:29.597167 PCI: 00:0d.0 [8086/0000] bus ops
825 12:48:29.597257 PCI: 00:0d.0 [8086/9a13] enabled
826 12:48:29.597332 PCI: 00:14.0 [8086/0000] bus ops
827 12:48:29.597413 PCI: 00:14.0 [8086/a0ed] enabled
828 12:48:29.597514 PCI: 00:14.2 [8086/a0ef] enabled
829 12:48:29.597570 PCI: 00:14.3 [8086/0000] bus ops
830 12:48:29.600130 PCI: 00:14.3 [8086/a0f0] enabled
831 12:48:29.603715 PCI: 00:15.0 [8086/0000] bus ops
832 12:48:29.607101 PCI: 00:15.0 [8086/a0e8] enabled
833 12:48:29.610221 PCI: 00:15.1 [8086/0000] bus ops
834 12:48:29.613965 PCI: 00:15.1 [8086/a0e9] enabled
835 12:48:29.617032 PCI: 00:15.2 [8086/0000] bus ops
836 12:48:29.620187 PCI: 00:15.2 [8086/a0ea] enabled
837 12:48:29.623411 PCI: 00:15.3 [8086/0000] bus ops
838 12:48:29.627190 PCI: 00:15.3 [8086/a0eb] enabled
839 12:48:29.630400 PCI: 00:16.0 [8086/0000] ops
840 12:48:29.633223 PCI: 00:16.0 [8086/a0e0] enabled
841 12:48:29.640227 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 12:48:29.643191 PCI: 00:19.0 [8086/0000] bus ops
843 12:48:29.647143 PCI: 00:19.0 [8086/a0c5] disabled
844 12:48:29.649929 PCI: 00:19.1 [8086/0000] bus ops
845 12:48:29.653071 PCI: 00:19.1 [8086/a0c6] enabled
846 12:48:29.656490 PCI: 00:1d.0 [8086/0000] bus ops
847 12:48:29.659802 PCI: 00:1d.0 [8086/a0b0] enabled
848 12:48:29.663396 PCI: 00:1e.0 [8086/0000] ops
849 12:48:29.666593 PCI: 00:1e.0 [8086/a0a8] enabled
850 12:48:29.670022 PCI: 00:1e.2 [8086/0000] bus ops
851 12:48:29.672975 PCI: 00:1e.2 [8086/a0aa] enabled
852 12:48:29.676536 PCI: 00:1e.3 [8086/0000] bus ops
853 12:48:29.679767 PCI: 00:1e.3 [8086/a0ab] enabled
854 12:48:29.682819 PCI: 00:1f.0 [8086/0000] bus ops
855 12:48:29.686087 PCI: 00:1f.0 [8086/a087] enabled
856 12:48:29.686173 RTC Init
857 12:48:29.689343 Set power on after power failure.
858 12:48:29.692661 Disabling Deep S3
859 12:48:29.692748 Disabling Deep S3
860 12:48:29.695964 Disabling Deep S4
861 12:48:29.699175 Disabling Deep S4
862 12:48:29.699271 Disabling Deep S5
863 12:48:29.702491 Disabling Deep S5
864 12:48:29.705705 PCI: 00:1f.2 [0000/0000] hidden
865 12:48:29.709148 PCI: 00:1f.3 [8086/0000] bus ops
866 12:48:29.712562 PCI: 00:1f.3 [8086/a0c8] enabled
867 12:48:29.715688 PCI: 00:1f.5 [8086/0000] bus ops
868 12:48:29.719203 PCI: 00:1f.5 [8086/a0a4] enabled
869 12:48:29.722355 PCI: Leftover static devices:
870 12:48:29.722429 PCI: 00:10.2
871 12:48:29.722500 PCI: 00:10.6
872 12:48:29.725829 PCI: 00:10.7
873 12:48:29.725899 PCI: 00:06.0
874 12:48:29.729054 PCI: 00:07.1
875 12:48:29.729145 PCI: 00:07.2
876 12:48:29.732169 PCI: 00:07.3
877 12:48:29.732246 PCI: 00:09.0
878 12:48:29.732355 PCI: 00:0d.1
879 12:48:29.735868 PCI: 00:0d.2
880 12:48:29.735942 PCI: 00:0d.3
881 12:48:29.738605 PCI: 00:0e.0
882 12:48:29.738678 PCI: 00:12.0
883 12:48:29.738741 PCI: 00:12.6
884 12:48:29.742154 PCI: 00:13.0
885 12:48:29.742226 PCI: 00:14.1
886 12:48:29.745660 PCI: 00:16.1
887 12:48:29.745732 PCI: 00:16.2
888 12:48:29.748668 PCI: 00:16.3
889 12:48:29.748753 PCI: 00:16.4
890 12:48:29.748820 PCI: 00:16.5
891 12:48:29.752305 PCI: 00:17.0
892 12:48:29.752445 PCI: 00:19.2
893 12:48:29.755454 PCI: 00:1e.1
894 12:48:29.755562 PCI: 00:1f.1
895 12:48:29.755629 PCI: 00:1f.4
896 12:48:29.759037 PCI: 00:1f.6
897 12:48:29.759115 PCI: 00:1f.7
898 12:48:29.761855 PCI: Check your devicetree.cb.
899 12:48:29.764902 PCI: 00:02.0 scanning...
900 12:48:29.768619 scan_generic_bus for PCI: 00:02.0
901 12:48:29.771605 scan_generic_bus for PCI: 00:02.0 done
902 12:48:29.778257 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 12:48:29.781833 PCI: 00:04.0 scanning...
904 12:48:29.785183 scan_generic_bus for PCI: 00:04.0
905 12:48:29.785261 GENERIC: 0.0 enabled
906 12:48:29.791367 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 12:48:29.797916 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 12:48:29.797999 PCI: 00:0d.0 scanning...
909 12:48:29.801309 scan_static_bus for PCI: 00:0d.0
910 12:48:29.804679 USB0 port 0 enabled
911 12:48:29.808212 USB0 port 0 scanning...
912 12:48:29.811168 scan_static_bus for USB0 port 0
913 12:48:29.811246 USB3 port 0 enabled
914 12:48:29.814546 USB3 port 1 enabled
915 12:48:29.817798 USB3 port 2 disabled
916 12:48:29.817877 USB3 port 3 disabled
917 12:48:29.821200 USB3 port 0 scanning...
918 12:48:29.824300 scan_static_bus for USB3 port 0
919 12:48:29.827934 scan_static_bus for USB3 port 0 done
920 12:48:29.834293 scan_bus: bus USB3 port 0 finished in 6 msecs
921 12:48:29.834393 USB3 port 1 scanning...
922 12:48:29.837716 scan_static_bus for USB3 port 1
923 12:48:29.844267 scan_static_bus for USB3 port 1 done
924 12:48:29.847626 scan_bus: bus USB3 port 1 finished in 6 msecs
925 12:48:29.851299 scan_static_bus for USB0 port 0 done
926 12:48:29.854183 scan_bus: bus USB0 port 0 finished in 43 msecs
927 12:48:29.860778 scan_static_bus for PCI: 00:0d.0 done
928 12:48:29.864282 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 12:48:29.867351 PCI: 00:14.0 scanning...
930 12:48:29.871027 scan_static_bus for PCI: 00:14.0
931 12:48:29.874129 USB0 port 0 enabled
932 12:48:29.874210 USB0 port 0 scanning...
933 12:48:29.877709 scan_static_bus for USB0 port 0
934 12:48:29.880519 USB2 port 0 disabled
935 12:48:29.884110 USB2 port 1 enabled
936 12:48:29.884188 USB2 port 2 enabled
937 12:48:29.887154 USB2 port 3 disabled
938 12:48:29.887232 USB2 port 4 enabled
939 12:48:29.890634 USB2 port 5 disabled
940 12:48:29.893771 USB2 port 6 disabled
941 12:48:29.893852 USB2 port 7 disabled
942 12:48:29.897072 USB2 port 8 disabled
943 12:48:29.900215 USB2 port 9 disabled
944 12:48:29.900296 USB3 port 0 disabled
945 12:48:29.903633 USB3 port 1 enabled
946 12:48:29.907060 USB3 port 2 disabled
947 12:48:29.907151 USB3 port 3 disabled
948 12:48:29.910358 USB2 port 1 scanning...
949 12:48:29.913579 scan_static_bus for USB2 port 1
950 12:48:29.917324 scan_static_bus for USB2 port 1 done
951 12:48:29.923267 scan_bus: bus USB2 port 1 finished in 6 msecs
952 12:48:29.923353 USB2 port 2 scanning...
953 12:48:29.929814 scan_static_bus for USB2 port 2
954 12:48:29.933089 scan_static_bus for USB2 port 2 done
955 12:48:29.936930 scan_bus: bus USB2 port 2 finished in 6 msecs
956 12:48:29.940097 USB2 port 4 scanning...
957 12:48:29.943186 scan_static_bus for USB2 port 4
958 12:48:29.946318 scan_static_bus for USB2 port 4 done
959 12:48:29.949963 scan_bus: bus USB2 port 4 finished in 6 msecs
960 12:48:29.952987 USB3 port 1 scanning...
961 12:48:29.956764 scan_static_bus for USB3 port 1
962 12:48:29.959699 scan_static_bus for USB3 port 1 done
963 12:48:29.966370 scan_bus: bus USB3 port 1 finished in 6 msecs
964 12:48:29.969296 scan_static_bus for USB0 port 0 done
965 12:48:29.972902 scan_bus: bus USB0 port 0 finished in 93 msecs
966 12:48:29.975923 scan_static_bus for PCI: 00:14.0 done
967 12:48:29.982466 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 12:48:29.985669 PCI: 00:14.3 scanning...
969 12:48:29.989269 scan_static_bus for PCI: 00:14.3
970 12:48:29.989361 GENERIC: 0.0 enabled
971 12:48:29.996170 scan_static_bus for PCI: 00:14.3 done
972 12:48:29.999189 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 12:48:30.002346 PCI: 00:15.0 scanning...
974 12:48:30.005562 scan_static_bus for PCI: 00:15.0
975 12:48:30.005683 I2C: 00:1a enabled
976 12:48:30.009542 I2C: 00:31 enabled
977 12:48:30.009671 I2C: 00:32 enabled
978 12:48:30.016160 scan_static_bus for PCI: 00:15.0 done
979 12:48:30.019506 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 12:48:30.022792 PCI: 00:15.1 scanning...
981 12:48:30.026209 scan_static_bus for PCI: 00:15.1
982 12:48:30.026291 I2C: 00:10 enabled
983 12:48:30.032692 scan_static_bus for PCI: 00:15.1 done
984 12:48:30.035779 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 12:48:30.039095 PCI: 00:15.2 scanning...
986 12:48:30.042761 scan_static_bus for PCI: 00:15.2
987 12:48:30.046112 scan_static_bus for PCI: 00:15.2 done
988 12:48:30.049210 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 12:48:30.052823 PCI: 00:15.3 scanning...
990 12:48:30.055954 scan_static_bus for PCI: 00:15.3
991 12:48:30.059082 scan_static_bus for PCI: 00:15.3 done
992 12:48:30.065584 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 12:48:30.069120 PCI: 00:19.1 scanning...
994 12:48:30.072494 scan_static_bus for PCI: 00:19.1
995 12:48:30.072581 I2C: 00:15 enabled
996 12:48:30.075605 scan_static_bus for PCI: 00:19.1 done
997 12:48:30.082303 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 12:48:30.085410 PCI: 00:1d.0 scanning...
999 12:48:30.088939 do_pci_scan_bridge for PCI: 00:1d.0
1000 12:48:30.091977 PCI: pci_scan_bus for bus 01
1001 12:48:30.095613 PCI: 01:00.0 [15b7/5009] enabled
1002 12:48:30.095738 GENERIC: 0.0 enabled
1003 12:48:30.098718 Enabling Common Clock Configuration
1004 12:48:30.105387 L1 Sub-State supported from root port 29
1005 12:48:30.108639 L1 Sub-State Support = 0x5
1006 12:48:30.108714 CommonModeRestoreTime = 0x28
1007 12:48:30.115560 Power On Value = 0x16, Power On Scale = 0x0
1008 12:48:30.115646 ASPM: Enabled L1
1009 12:48:30.121880 PCIe: Max_Payload_Size adjusted to 128
1010 12:48:30.125029 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 12:48:30.128509 PCI: 00:1e.2 scanning...
1012 12:48:30.131897 scan_generic_bus for PCI: 00:1e.2
1013 12:48:30.131988 SPI: 00 enabled
1014 12:48:30.138283 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 12:48:30.145098 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 12:48:30.145185 PCI: 00:1e.3 scanning...
1017 12:48:30.151351 scan_generic_bus for PCI: 00:1e.3
1018 12:48:30.151438 SPI: 00 enabled
1019 12:48:30.158613 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 12:48:30.161484 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 12:48:30.164651 PCI: 00:1f.0 scanning...
1022 12:48:30.168329 scan_static_bus for PCI: 00:1f.0
1023 12:48:30.171245 PNP: 0c09.0 enabled
1024 12:48:30.171326 PNP: 0c09.0 scanning...
1025 12:48:30.174803 scan_static_bus for PNP: 0c09.0
1026 12:48:30.181546 scan_static_bus for PNP: 0c09.0 done
1027 12:48:30.184570 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 12:48:30.188208 scan_static_bus for PCI: 00:1f.0 done
1029 12:48:30.194584 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 12:48:30.194663 PCI: 00:1f.2 scanning...
1031 12:48:30.197898 scan_static_bus for PCI: 00:1f.2
1032 12:48:30.201462 GENERIC: 0.0 enabled
1033 12:48:30.204617 GENERIC: 0.0 scanning...
1034 12:48:30.207722 scan_static_bus for GENERIC: 0.0
1035 12:48:30.211515 GENERIC: 0.0 enabled
1036 12:48:30.211589 GENERIC: 1.0 enabled
1037 12:48:30.214481 scan_static_bus for GENERIC: 0.0 done
1038 12:48:30.221358 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 12:48:30.224267 scan_static_bus for PCI: 00:1f.2 done
1040 12:48:30.227577 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 12:48:30.230635 PCI: 00:1f.3 scanning...
1042 12:48:30.234053 scan_static_bus for PCI: 00:1f.3
1043 12:48:30.237749 scan_static_bus for PCI: 00:1f.3 done
1044 12:48:30.244070 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 12:48:30.247272 PCI: 00:1f.5 scanning...
1046 12:48:30.251011 scan_generic_bus for PCI: 00:1f.5
1047 12:48:30.253924 scan_generic_bus for PCI: 00:1f.5 done
1048 12:48:30.257257 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 12:48:30.263995 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 12:48:30.267554 scan_static_bus for Root Device done
1051 12:48:30.270788 scan_bus: bus Root Device finished in 735 msecs
1052 12:48:30.273817 done
1053 12:48:30.280224 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 12:48:30.283462 Chrome EC: UHEPI supported
1055 12:48:30.290055 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 12:48:30.293672 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 12:48:30.300201 SPI flash protection: WPSW=0 SRP0=1
1058 12:48:30.303407 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 12:48:30.310212 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 12:48:30.313275 found VGA at PCI: 00:02.0
1061 12:48:30.316294 Setting up VGA for PCI: 00:02.0
1062 12:48:30.319992 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 12:48:30.326370 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 12:48:30.326456 Allocating resources...
1065 12:48:30.329986 Reading resources...
1066 12:48:30.333105 Root Device read_resources bus 0 link: 0
1067 12:48:30.339553 DOMAIN: 0000 read_resources bus 0 link: 0
1068 12:48:30.343114 PCI: 00:04.0 read_resources bus 1 link: 0
1069 12:48:30.349661 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 12:48:30.353031 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 12:48:30.356100 USB0 port 0 read_resources bus 0 link: 0
1072 12:48:30.363534 USB0 port 0 read_resources bus 0 link: 0 done
1073 12:48:30.366918 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 12:48:30.373170 PCI: 00:14.0 read_resources bus 0 link: 0
1075 12:48:30.376765 USB0 port 0 read_resources bus 0 link: 0
1076 12:48:30.383301 USB0 port 0 read_resources bus 0 link: 0 done
1077 12:48:30.386350 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 12:48:30.393069 PCI: 00:14.3 read_resources bus 0 link: 0
1079 12:48:30.396108 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 12:48:30.403054 PCI: 00:15.0 read_resources bus 0 link: 0
1081 12:48:30.406232 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 12:48:30.412792 PCI: 00:15.1 read_resources bus 0 link: 0
1083 12:48:30.415893 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 12:48:30.423547 PCI: 00:19.1 read_resources bus 0 link: 0
1085 12:48:30.426583 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 12:48:30.432942 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 12:48:30.436665 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 12:48:30.443113 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 12:48:30.446664 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 12:48:30.453517 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 12:48:30.456439 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 12:48:30.463148 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 12:48:30.466667 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 12:48:30.469988 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 12:48:30.476683 GENERIC: 0.0 read_resources bus 0 link: 0
1096 12:48:30.480256 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 12:48:30.486634 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 12:48:30.493127 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 12:48:30.496181 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 12:48:30.502952 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 12:48:30.505957 Root Device read_resources bus 0 link: 0 done
1102 12:48:30.509699 Done reading resources.
1103 12:48:30.512703 Show resources in subtree (Root Device)...After reading.
1104 12:48:30.519441 Root Device child on link 0 DOMAIN: 0000
1105 12:48:30.522662 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 12:48:30.532782 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 12:48:30.542845 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 12:48:30.543328 PCI: 00:00.0
1109 12:48:30.552678 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 12:48:30.562846 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 12:48:30.572941 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 12:48:30.582955 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 12:48:30.592695 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 12:48:30.599281 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 12:48:30.609305 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 12:48:30.619265 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 12:48:30.628932 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 12:48:30.638944 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 12:48:30.649076 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 12:48:30.655360 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 12:48:30.665376 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 12:48:30.675162 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 12:48:30.685036 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 12:48:30.695273 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 12:48:30.705297 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 12:48:30.711641 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 12:48:30.721902 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 12:48:30.731932 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 12:48:30.735423 PCI: 00:02.0
1130 12:48:30.745032 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 12:48:30.754751 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 12:48:30.764348 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 12:48:30.768041 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 12:48:30.777853 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 12:48:30.777997 GENERIC: 0.0
1136 12:48:30.781089 PCI: 00:05.0
1137 12:48:30.790670 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:48:30.794232 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 12:48:30.797702 GENERIC: 0.0
1140 12:48:30.797857 PCI: 00:08.0
1141 12:48:30.807092 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 12:48:30.810651 PCI: 00:0a.0
1143 12:48:30.813767 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 12:48:30.823561 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 12:48:30.830469 USB0 port 0 child on link 0 USB3 port 0
1146 12:48:30.830554 USB3 port 0
1147 12:48:30.833627 USB3 port 1
1148 12:48:30.833739 USB3 port 2
1149 12:48:30.837107 USB3 port 3
1150 12:48:30.840084 PCI: 00:14.0 child on link 0 USB0 port 0
1151 12:48:30.850303 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:48:30.856589 USB0 port 0 child on link 0 USB2 port 0
1153 12:48:30.856674 USB2 port 0
1154 12:48:30.859900 USB2 port 1
1155 12:48:30.859987 USB2 port 2
1156 12:48:30.863645 USB2 port 3
1157 12:48:30.863723 USB2 port 4
1158 12:48:30.866645 USB2 port 5
1159 12:48:30.866729 USB2 port 6
1160 12:48:30.870185 USB2 port 7
1161 12:48:30.870268 USB2 port 8
1162 12:48:30.873312 USB2 port 9
1163 12:48:30.873393 USB3 port 0
1164 12:48:30.876900 USB3 port 1
1165 12:48:30.879686 USB3 port 2
1166 12:48:30.879759 USB3 port 3
1167 12:48:30.882910 PCI: 00:14.2
1168 12:48:30.893240 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 12:48:30.903040 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 12:48:30.906013 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 12:48:30.916160 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 12:48:30.919264 GENERIC: 0.0
1173 12:48:30.922858 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 12:48:30.932480 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 12:48:30.932567 I2C: 00:1a
1176 12:48:30.935757 I2C: 00:31
1177 12:48:30.935833 I2C: 00:32
1178 12:48:30.942381 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 12:48:30.952568 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 12:48:30.952668 I2C: 00:10
1181 12:48:30.955573 PCI: 00:15.2
1182 12:48:30.965659 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:48:30.965749 PCI: 00:15.3
1184 12:48:30.975550 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:48:30.978631 PCI: 00:16.0
1186 12:48:30.988717 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:48:30.988811 PCI: 00:19.0
1188 12:48:30.991732 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 12:48:31.001690 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:48:31.004902 I2C: 00:15
1191 12:48:31.008235 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 12:48:31.017946 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 12:48:31.028026 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 12:48:31.038391 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 12:48:31.038487 GENERIC: 0.0
1196 12:48:31.041353 PCI: 01:00.0
1197 12:48:31.051234 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 12:48:31.061195 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 12:48:31.061283 PCI: 00:1e.0
1200 12:48:31.074284 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 12:48:31.077853 PCI: 00:1e.2 child on link 0 SPI: 00
1202 12:48:31.087711 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:48:31.087795 SPI: 00
1204 12:48:31.091036 PCI: 00:1e.3 child on link 0 SPI: 00
1205 12:48:31.100605 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:48:31.104146 SPI: 00
1207 12:48:31.106981 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 12:48:31.116994 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 12:48:31.117078 PNP: 0c09.0
1210 12:48:31.126843 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 12:48:31.130200 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 12:48:31.140156 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 12:48:31.150014 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 12:48:31.153703 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 12:48:31.156783 GENERIC: 0.0
1216 12:48:31.160220 GENERIC: 1.0
1217 12:48:31.160300 PCI: 00:1f.3
1218 12:48:31.169894 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:48:31.179607 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 12:48:31.183143 PCI: 00:1f.5
1221 12:48:31.189379 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 12:48:31.196259 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 12:48:31.196374 APIC: 00
1224 12:48:31.199587 APIC: 05
1225 12:48:31.199668 APIC: 03
1226 12:48:31.199735 APIC: 06
1227 12:48:31.202475 APIC: 07
1228 12:48:31.202549 APIC: 04
1229 12:48:31.202613 APIC: 01
1230 12:48:31.205823 APIC: 02
1231 12:48:31.212543 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 12:48:31.219292 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 12:48:31.226137 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 12:48:31.232400 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 12:48:31.235887 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 12:48:31.238883 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 12:48:31.245716 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 12:48:31.255479 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 12:48:31.261953 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 12:48:31.269011 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 12:48:31.275525 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 12:48:31.282221 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 12:48:31.291922 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 12:48:31.298581 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 12:48:31.301516 DOMAIN: 0000: Resource ranges:
1246 12:48:31.305111 * Base: 1000, Size: 800, Tag: 100
1247 12:48:31.308611 * Base: 1900, Size: e700, Tag: 100
1248 12:48:31.314789 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 12:48:31.321432 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 12:48:31.328227 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 12:48:31.334742 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 12:48:31.341364 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 12:48:31.351067 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 12:48:31.357828 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 12:48:31.364604 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 12:48:31.374258 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 12:48:31.381053 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 12:48:31.387341 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 12:48:31.397617 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 12:48:31.403821 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 12:48:31.410924 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 12:48:31.420524 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 12:48:31.427045 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 12:48:31.433812 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 12:48:31.443800 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 12:48:31.450371 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 12:48:31.456940 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 12:48:31.466780 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 12:48:31.473303 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 12:48:31.479946 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 12:48:31.489677 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 12:48:31.496271 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 12:48:31.499607 DOMAIN: 0000: Resource ranges:
1274 12:48:31.503105 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 12:48:31.509757 * Base: d0000000, Size: 28000000, Tag: 200
1276 12:48:31.512975 * Base: fa000000, Size: 1000000, Tag: 200
1277 12:48:31.515939 * Base: fb001000, Size: 2fff000, Tag: 200
1278 12:48:31.522925 * Base: fe010000, Size: 2e000, Tag: 200
1279 12:48:31.525873 * Base: fe03f000, Size: d41000, Tag: 200
1280 12:48:31.529373 * Base: fed88000, Size: 8000, Tag: 200
1281 12:48:31.532479 * Base: fed93000, Size: d000, Tag: 200
1282 12:48:31.539112 * Base: feda2000, Size: 1e000, Tag: 200
1283 12:48:31.542528 * Base: fede0000, Size: 1220000, Tag: 200
1284 12:48:31.545822 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 12:48:31.552372 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 12:48:31.559156 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 12:48:31.565513 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 12:48:31.575248 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 12:48:31.582187 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 12:48:31.588878 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 12:48:31.595194 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 12:48:31.601956 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 12:48:31.608243 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 12:48:31.614924 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 12:48:31.621496 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 12:48:31.627975 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 12:48:31.634735 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 12:48:31.641227 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 12:48:31.647897 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 12:48:31.654679 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 12:48:31.660980 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 12:48:31.667757 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 12:48:31.674468 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 12:48:31.681090 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 12:48:31.687541 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 12:48:31.694158 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 12:48:31.700790 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 12:48:31.707213 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 12:48:31.710324 PCI: 00:1d.0: Resource ranges:
1310 12:48:31.717219 * Base: 7fc00000, Size: 100000, Tag: 200
1311 12:48:31.723722 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 12:48:31.730362 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 12:48:31.736833 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 12:48:31.743386 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 12:48:31.749937 Root Device assign_resources, bus 0 link: 0
1316 12:48:31.753536 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 12:48:31.763314 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 12:48:31.769967 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 12:48:31.779683 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 12:48:31.786262 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 12:48:31.789881 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 12:48:31.796325 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 12:48:31.802469 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 12:48:31.812765 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 12:48:31.819386 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 12:48:31.825645 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 12:48:31.829244 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 12:48:31.838729 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 12:48:31.842138 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 12:48:31.845679 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 12:48:31.855563 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 12:48:31.862143 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 12:48:31.872199 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 12:48:31.875459 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 12:48:31.882071 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 12:48:31.888777 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 12:48:31.892280 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 12:48:31.899071 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 12:48:31.905146 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 12:48:31.911707 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 12:48:31.914852 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 12:48:31.925274 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 12:48:31.931681 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 12:48:31.941454 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 12:48:31.947872 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 12:48:31.954299 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 12:48:31.957635 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 12:48:31.967360 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 12:48:31.977578 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 12:48:31.984023 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 12:48:31.990743 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 12:48:31.997230 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 12:48:32.007176 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 12:48:32.010236 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 12:48:32.020197 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 12:48:32.023284 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 12:48:32.026980 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 12:48:32.036586 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 12:48:32.039737 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 12:48:32.046253 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 12:48:32.049794 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 12:48:32.056287 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 12:48:32.059603 LPC: Trying to open IO window from 800 size 1ff
1364 12:48:32.069698 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 12:48:32.076101 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 12:48:32.085869 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 12:48:32.089321 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 12:48:32.092590 Root Device assign_resources, bus 0 link: 0
1369 12:48:32.095717 Done setting resources.
1370 12:48:32.102134 Show resources in subtree (Root Device)...After assigning values.
1371 12:48:32.105734 Root Device child on link 0 DOMAIN: 0000
1372 12:48:32.112250 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 12:48:32.122354 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 12:48:32.131961 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 12:48:32.132050 PCI: 00:00.0
1376 12:48:32.141735 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 12:48:32.151716 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 12:48:32.161675 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 12:48:32.171649 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 12:48:32.178388 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 12:48:32.188022 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 12:48:32.198337 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 12:48:32.207571 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 12:48:32.217743 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 12:48:32.227559 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 12:48:32.234215 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 12:48:32.244049 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 12:48:32.253905 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 12:48:32.264257 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 12:48:32.274092 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 12:48:32.283792 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 12:48:32.294072 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 12:48:32.300345 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 12:48:32.310217 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 12:48:32.320450 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 12:48:32.323402 PCI: 00:02.0
1397 12:48:32.333710 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 12:48:32.343543 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 12:48:32.353355 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 12:48:32.356938 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 12:48:32.366669 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 12:48:32.369694 GENERIC: 0.0
1403 12:48:32.369801 PCI: 00:05.0
1404 12:48:32.383165 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 12:48:32.386457 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 12:48:32.386556 GENERIC: 0.0
1407 12:48:32.389762 PCI: 00:08.0
1408 12:48:32.399425 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 12:48:32.402992 PCI: 00:0a.0
1410 12:48:32.405845 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 12:48:32.416160 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 12:48:32.419525 USB0 port 0 child on link 0 USB3 port 0
1413 12:48:32.422587 USB3 port 0
1414 12:48:32.426072 USB3 port 1
1415 12:48:32.426176 USB3 port 2
1416 12:48:32.429086 USB3 port 3
1417 12:48:32.432267 PCI: 00:14.0 child on link 0 USB0 port 0
1418 12:48:32.442522 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 12:48:32.445574 USB0 port 0 child on link 0 USB2 port 0
1420 12:48:32.449192 USB2 port 0
1421 12:48:32.452366 USB2 port 1
1422 12:48:32.452473 USB2 port 2
1423 12:48:32.455622 USB2 port 3
1424 12:48:32.455728 USB2 port 4
1425 12:48:32.458597 USB2 port 5
1426 12:48:32.458703 USB2 port 6
1427 12:48:32.462320 USB2 port 7
1428 12:48:32.462430 USB2 port 8
1429 12:48:32.465532 USB2 port 9
1430 12:48:32.465638 USB3 port 0
1431 12:48:32.468579 USB3 port 1
1432 12:48:32.468689 USB3 port 2
1433 12:48:32.471981 USB3 port 3
1434 12:48:32.472084 PCI: 00:14.2
1435 12:48:32.485144 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 12:48:32.495267 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 12:48:32.498534 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 12:48:32.508592 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 12:48:32.511912 GENERIC: 0.0
1440 12:48:32.514801 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 12:48:32.524760 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 12:48:32.528440 I2C: 00:1a
1443 12:48:32.528527 I2C: 00:31
1444 12:48:32.531532 I2C: 00:32
1445 12:48:32.534681 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 12:48:32.544682 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 12:48:32.544770 I2C: 00:10
1448 12:48:32.548237 PCI: 00:15.2
1449 12:48:32.558054 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 12:48:32.561123 PCI: 00:15.3
1451 12:48:32.571402 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 12:48:32.571490 PCI: 00:16.0
1453 12:48:32.581021 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 12:48:32.584303 PCI: 00:19.0
1455 12:48:32.587786 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 12:48:32.597980 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 12:48:32.600832 I2C: 00:15
1458 12:48:32.604297 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 12:48:32.614355 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 12:48:32.623951 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 12:48:32.637258 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 12:48:32.637349 GENERIC: 0.0
1463 12:48:32.640967 PCI: 01:00.0
1464 12:48:32.650504 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 12:48:32.660293 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 12:48:32.660406 PCI: 00:1e.0
1467 12:48:32.673633 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 12:48:32.677206 PCI: 00:1e.2 child on link 0 SPI: 00
1469 12:48:32.686798 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 12:48:32.690376 SPI: 00
1471 12:48:32.693516 PCI: 00:1e.3 child on link 0 SPI: 00
1472 12:48:32.703444 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 12:48:32.703533 SPI: 00
1474 12:48:32.710398 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 12:48:32.717110 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 12:48:32.719891 PNP: 0c09.0
1477 12:48:32.726736 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 12:48:32.732865 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 12:48:32.742953 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 12:48:32.749635 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 12:48:32.756209 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 12:48:32.756297 GENERIC: 0.0
1483 12:48:32.759308 GENERIC: 1.0
1484 12:48:32.759396 PCI: 00:1f.3
1485 12:48:32.772497 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 12:48:32.782258 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 12:48:32.782343 PCI: 00:1f.5
1488 12:48:32.792588 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 12:48:32.799280 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 12:48:32.799361 APIC: 00
1491 12:48:32.799428 APIC: 05
1492 12:48:32.802362 APIC: 03
1493 12:48:32.802449 APIC: 06
1494 12:48:32.805476 APIC: 07
1495 12:48:32.805567 APIC: 04
1496 12:48:32.805636 APIC: 01
1497 12:48:32.808900 APIC: 02
1498 12:48:32.811886 Done allocating resources.
1499 12:48:32.815529 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 12:48:32.822325 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 12:48:32.825588 Configure GPIOs for I2S audio on UP4.
1502 12:48:32.833278 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 12:48:32.836374 Enabling resources...
1504 12:48:32.839528 PCI: 00:00.0 subsystem <- 8086/9a12
1505 12:48:32.843201 PCI: 00:00.0 cmd <- 06
1506 12:48:32.846270 PCI: 00:02.0 subsystem <- 8086/9a40
1507 12:48:32.849798 PCI: 00:02.0 cmd <- 03
1508 12:48:32.852763 PCI: 00:04.0 subsystem <- 8086/9a03
1509 12:48:32.856268 PCI: 00:04.0 cmd <- 02
1510 12:48:32.859460 PCI: 00:05.0 subsystem <- 8086/9a19
1511 12:48:32.859546 PCI: 00:05.0 cmd <- 02
1512 12:48:32.866016 PCI: 00:08.0 subsystem <- 8086/9a11
1513 12:48:32.866106 PCI: 00:08.0 cmd <- 06
1514 12:48:32.869101 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 12:48:32.872555 PCI: 00:0d.0 cmd <- 02
1516 12:48:32.875921 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 12:48:32.879201 PCI: 00:14.0 cmd <- 02
1518 12:48:32.882911 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 12:48:32.885921 PCI: 00:14.2 cmd <- 02
1520 12:48:32.888990 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 12:48:32.892411 PCI: 00:14.3 cmd <- 02
1522 12:48:32.895552 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 12:48:32.899220 PCI: 00:15.0 cmd <- 02
1524 12:48:32.902364 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 12:48:32.905496 PCI: 00:15.1 cmd <- 02
1526 12:48:32.909245 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 12:48:32.909347 PCI: 00:15.2 cmd <- 02
1528 12:48:32.915642 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 12:48:32.915728 PCI: 00:15.3 cmd <- 02
1530 12:48:32.919231 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 12:48:32.922547 PCI: 00:16.0 cmd <- 02
1532 12:48:32.925454 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 12:48:32.928896 PCI: 00:19.1 cmd <- 02
1534 12:48:32.932267 PCI: 00:1d.0 bridge ctrl <- 0013
1535 12:48:32.935664 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 12:48:32.938874 PCI: 00:1d.0 cmd <- 06
1537 12:48:32.942232 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 12:48:32.945656 PCI: 00:1e.0 cmd <- 06
1539 12:48:32.948985 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 12:48:32.952035 PCI: 00:1e.2 cmd <- 06
1541 12:48:32.954997 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 12:48:32.958662 PCI: 00:1e.3 cmd <- 02
1543 12:48:32.961743 PCI: 00:1f.0 subsystem <- 8086/a087
1544 12:48:32.965462 PCI: 00:1f.0 cmd <- 407
1545 12:48:32.968384 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 12:48:32.968461 PCI: 00:1f.3 cmd <- 02
1547 12:48:32.974861 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 12:48:32.974948 PCI: 00:1f.5 cmd <- 406
1549 12:48:32.980519 PCI: 01:00.0 cmd <- 02
1550 12:48:32.985035 done.
1551 12:48:32.988132 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 12:48:32.991587 Initializing devices...
1553 12:48:32.994593 Root Device init
1554 12:48:32.998100 Chrome EC: Set SMI mask to 0x0000000000000000
1555 12:48:33.004664 Chrome EC: clear events_b mask to 0x0000000000000000
1556 12:48:33.010985 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 12:48:33.017839 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 12:48:33.024329 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 12:48:33.028036 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 12:48:33.035340 fw_config match found: DB_USB=USB3_ACTIVE
1561 12:48:33.038949 Configure Right Type-C port orientation for retimer
1562 12:48:33.041874 Root Device init finished in 45 msecs
1563 12:48:33.046151 PCI: 00:00.0 init
1564 12:48:33.049611 CPU TDP = 9 Watts
1565 12:48:33.049698 CPU PL1 = 9 Watts
1566 12:48:33.052997 CPU PL2 = 40 Watts
1567 12:48:33.056012 CPU PL4 = 83 Watts
1568 12:48:33.059334 PCI: 00:00.0 init finished in 8 msecs
1569 12:48:33.062891 PCI: 00:02.0 init
1570 12:48:33.062975 GMA: Found VBT in CBFS
1571 12:48:33.065994 GMA: Found valid VBT in CBFS
1572 12:48:33.072596 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 12:48:33.079209 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 12:48:33.082296 PCI: 00:02.0 init finished in 18 msecs
1575 12:48:33.085430 PCI: 00:05.0 init
1576 12:48:33.089145 PCI: 00:05.0 init finished in 0 msecs
1577 12:48:33.092154 PCI: 00:08.0 init
1578 12:48:33.095805 PCI: 00:08.0 init finished in 0 msecs
1579 12:48:33.098702 PCI: 00:14.0 init
1580 12:48:33.102428 PCI: 00:14.0 init finished in 0 msecs
1581 12:48:33.105686 PCI: 00:14.2 init
1582 12:48:33.108755 PCI: 00:14.2 init finished in 0 msecs
1583 12:48:33.111845 PCI: 00:15.0 init
1584 12:48:33.115348 I2C bus 0 version 0x3230302a
1585 12:48:33.118702 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 12:48:33.121782 PCI: 00:15.0 init finished in 6 msecs
1587 12:48:33.125230 PCI: 00:15.1 init
1588 12:48:33.125307 I2C bus 1 version 0x3230302a
1589 12:48:33.132027 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 12:48:33.135598 PCI: 00:15.1 init finished in 6 msecs
1591 12:48:33.135679 PCI: 00:15.2 init
1592 12:48:33.138268 I2C bus 2 version 0x3230302a
1593 12:48:33.141750 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 12:48:33.148461 PCI: 00:15.2 init finished in 6 msecs
1595 12:48:33.148560 PCI: 00:15.3 init
1596 12:48:33.151787 I2C bus 3 version 0x3230302a
1597 12:48:33.154700 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 12:48:33.157983 PCI: 00:15.3 init finished in 6 msecs
1599 12:48:33.161525 PCI: 00:16.0 init
1600 12:48:33.164930 PCI: 00:16.0 init finished in 0 msecs
1601 12:48:33.168006 PCI: 00:19.1 init
1602 12:48:33.171400 I2C bus 5 version 0x3230302a
1603 12:48:33.174449 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 12:48:33.178037 PCI: 00:19.1 init finished in 6 msecs
1605 12:48:33.181153 PCI: 00:1d.0 init
1606 12:48:33.184199 Initializing PCH PCIe bridge.
1607 12:48:33.187619 PCI: 00:1d.0 init finished in 3 msecs
1608 12:48:33.191163 PCI: 00:1f.0 init
1609 12:48:33.194137 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 12:48:33.200820 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 12:48:33.200906 IOAPIC: ID = 0x02
1612 12:48:33.204265 IOAPIC: Dumping registers
1613 12:48:33.207355 reg 0x0000: 0x02000000
1614 12:48:33.207440 reg 0x0001: 0x00770020
1615 12:48:33.210516 reg 0x0002: 0x00000000
1616 12:48:33.214107 PCI: 00:1f.0 init finished in 21 msecs
1617 12:48:33.217625 PCI: 00:1f.2 init
1618 12:48:33.220797 Disabling ACPI via APMC.
1619 12:48:33.224432 APMC done.
1620 12:48:33.227442 PCI: 00:1f.2 init finished in 5 msecs
1621 12:48:33.238789 PCI: 01:00.0 init
1622 12:48:33.241770 PCI: 01:00.0 init finished in 0 msecs
1623 12:48:33.245056 PNP: 0c09.0 init
1624 12:48:33.248452 Google Chrome EC uptime: 8.424 seconds
1625 12:48:33.255143 Google Chrome AP resets since EC boot: 1
1626 12:48:33.258392 Google Chrome most recent AP reset causes:
1627 12:48:33.261311 0.483: 32775 shutdown: entering G3
1628 12:48:33.268212 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 12:48:33.271678 PNP: 0c09.0 init finished in 22 msecs
1630 12:48:33.277258 Devices initialized
1631 12:48:33.280827 Show all devs... After init.
1632 12:48:33.283888 Root Device: enabled 1
1633 12:48:33.283974 DOMAIN: 0000: enabled 1
1634 12:48:33.287079 CPU_CLUSTER: 0: enabled 1
1635 12:48:33.290510 PCI: 00:00.0: enabled 1
1636 12:48:33.294193 PCI: 00:02.0: enabled 1
1637 12:48:33.294280 PCI: 00:04.0: enabled 1
1638 12:48:33.297125 PCI: 00:05.0: enabled 1
1639 12:48:33.300173 PCI: 00:06.0: enabled 0
1640 12:48:33.303737 PCI: 00:07.0: enabled 0
1641 12:48:33.303823 PCI: 00:07.1: enabled 0
1642 12:48:33.307096 PCI: 00:07.2: enabled 0
1643 12:48:33.310037 PCI: 00:07.3: enabled 0
1644 12:48:33.313646 PCI: 00:08.0: enabled 1
1645 12:48:33.313732 PCI: 00:09.0: enabled 0
1646 12:48:33.316759 PCI: 00:0a.0: enabled 0
1647 12:48:33.319987 PCI: 00:0d.0: enabled 1
1648 12:48:33.323691 PCI: 00:0d.1: enabled 0
1649 12:48:33.323776 PCI: 00:0d.2: enabled 0
1650 12:48:33.326579 PCI: 00:0d.3: enabled 0
1651 12:48:33.329815 PCI: 00:0e.0: enabled 0
1652 12:48:33.333362 PCI: 00:10.2: enabled 1
1653 12:48:33.333448 PCI: 00:10.6: enabled 0
1654 12:48:33.336861 PCI: 00:10.7: enabled 0
1655 12:48:33.339922 PCI: 00:12.0: enabled 0
1656 12:48:33.343055 PCI: 00:12.6: enabled 0
1657 12:48:33.343143 PCI: 00:13.0: enabled 0
1658 12:48:33.346590 PCI: 00:14.0: enabled 1
1659 12:48:33.349927 PCI: 00:14.1: enabled 0
1660 12:48:33.350014 PCI: 00:14.2: enabled 1
1661 12:48:33.353324 PCI: 00:14.3: enabled 1
1662 12:48:33.356595 PCI: 00:15.0: enabled 1
1663 12:48:33.359976 PCI: 00:15.1: enabled 1
1664 12:48:33.360063 PCI: 00:15.2: enabled 1
1665 12:48:33.362890 PCI: 00:15.3: enabled 1
1666 12:48:33.366461 PCI: 00:16.0: enabled 1
1667 12:48:33.369504 PCI: 00:16.1: enabled 0
1668 12:48:33.369596 PCI: 00:16.2: enabled 0
1669 12:48:33.372989 PCI: 00:16.3: enabled 0
1670 12:48:33.376472 PCI: 00:16.4: enabled 0
1671 12:48:33.379558 PCI: 00:16.5: enabled 0
1672 12:48:33.379646 PCI: 00:17.0: enabled 0
1673 12:48:33.383129 PCI: 00:19.0: enabled 0
1674 12:48:33.386178 PCI: 00:19.1: enabled 1
1675 12:48:33.389403 PCI: 00:19.2: enabled 0
1676 12:48:33.389531 PCI: 00:1c.0: enabled 1
1677 12:48:33.392688 PCI: 00:1c.1: enabled 0
1678 12:48:33.395957 PCI: 00:1c.2: enabled 0
1679 12:48:33.399486 PCI: 00:1c.3: enabled 0
1680 12:48:33.399574 PCI: 00:1c.4: enabled 0
1681 12:48:33.402694 PCI: 00:1c.5: enabled 0
1682 12:48:33.406195 PCI: 00:1c.6: enabled 1
1683 12:48:33.406282 PCI: 00:1c.7: enabled 0
1684 12:48:33.409694 PCI: 00:1d.0: enabled 1
1685 12:48:33.412618 PCI: 00:1d.1: enabled 0
1686 12:48:33.416320 PCI: 00:1d.2: enabled 1
1687 12:48:33.416441 PCI: 00:1d.3: enabled 0
1688 12:48:33.419376 PCI: 00:1e.0: enabled 1
1689 12:48:33.422451 PCI: 00:1e.1: enabled 0
1690 12:48:33.425737 PCI: 00:1e.2: enabled 1
1691 12:48:33.425824 PCI: 00:1e.3: enabled 1
1692 12:48:33.429267 PCI: 00:1f.0: enabled 1
1693 12:48:33.432621 PCI: 00:1f.1: enabled 0
1694 12:48:33.435837 PCI: 00:1f.2: enabled 1
1695 12:48:33.435917 PCI: 00:1f.3: enabled 1
1696 12:48:33.439348 PCI: 00:1f.4: enabled 0
1697 12:48:33.442337 PCI: 00:1f.5: enabled 1
1698 12:48:33.445946 PCI: 00:1f.6: enabled 0
1699 12:48:33.446026 PCI: 00:1f.7: enabled 0
1700 12:48:33.448878 APIC: 00: enabled 1
1701 12:48:33.452007 GENERIC: 0.0: enabled 1
1702 12:48:33.452096 GENERIC: 0.0: enabled 1
1703 12:48:33.455401 GENERIC: 1.0: enabled 1
1704 12:48:33.458993 GENERIC: 0.0: enabled 1
1705 12:48:33.462352 GENERIC: 1.0: enabled 1
1706 12:48:33.462438 USB0 port 0: enabled 1
1707 12:48:33.465618 GENERIC: 0.0: enabled 1
1708 12:48:33.468616 USB0 port 0: enabled 1
1709 12:48:33.471940 GENERIC: 0.0: enabled 1
1710 12:48:33.472026 I2C: 00:1a: enabled 1
1711 12:48:33.475230 I2C: 00:31: enabled 1
1712 12:48:33.478694 I2C: 00:32: enabled 1
1713 12:48:33.478779 I2C: 00:10: enabled 1
1714 12:48:33.481732 I2C: 00:15: enabled 1
1715 12:48:33.485132 GENERIC: 0.0: enabled 0
1716 12:48:33.485223 GENERIC: 1.0: enabled 0
1717 12:48:33.488676 GENERIC: 0.0: enabled 1
1718 12:48:33.491831 SPI: 00: enabled 1
1719 12:48:33.491917 SPI: 00: enabled 1
1720 12:48:33.494917 PNP: 0c09.0: enabled 1
1721 12:48:33.498681 GENERIC: 0.0: enabled 1
1722 12:48:33.501940 USB3 port 0: enabled 1
1723 12:48:33.502026 USB3 port 1: enabled 1
1724 12:48:33.504976 USB3 port 2: enabled 0
1725 12:48:33.508164 USB3 port 3: enabled 0
1726 12:48:33.508248 USB2 port 0: enabled 0
1727 12:48:33.511629 USB2 port 1: enabled 1
1728 12:48:33.514792 USB2 port 2: enabled 1
1729 12:48:33.514878 USB2 port 3: enabled 0
1730 12:48:33.517923 USB2 port 4: enabled 1
1731 12:48:33.521532 USB2 port 5: enabled 0
1732 12:48:33.524497 USB2 port 6: enabled 0
1733 12:48:33.524583 USB2 port 7: enabled 0
1734 12:48:33.528139 USB2 port 8: enabled 0
1735 12:48:33.531360 USB2 port 9: enabled 0
1736 12:48:33.531448 USB3 port 0: enabled 0
1737 12:48:33.534792 USB3 port 1: enabled 1
1738 12:48:33.538053 USB3 port 2: enabled 0
1739 12:48:33.541097 USB3 port 3: enabled 0
1740 12:48:33.541174 GENERIC: 0.0: enabled 1
1741 12:48:33.544582 GENERIC: 1.0: enabled 1
1742 12:48:33.548083 APIC: 05: enabled 1
1743 12:48:33.548157 APIC: 03: enabled 1
1744 12:48:33.551302 APIC: 06: enabled 1
1745 12:48:33.554359 APIC: 07: enabled 1
1746 12:48:33.554431 APIC: 04: enabled 1
1747 12:48:33.557607 APIC: 01: enabled 1
1748 12:48:33.557692 APIC: 02: enabled 1
1749 12:48:33.560835 PCI: 01:00.0: enabled 1
1750 12:48:33.567593 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1751 12:48:33.570747 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 12:48:33.574115 ELOG: NV offset 0xf30000 size 0x1000
1753 12:48:33.582549 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 12:48:33.589144 ELOG: Event(17) added with size 13 at 2023-03-13 12:48:32 UTC
1755 12:48:33.595845 ELOG: Event(92) added with size 9 at 2023-03-13 12:48:32 UTC
1756 12:48:33.602594 ELOG: Event(93) added with size 9 at 2023-03-13 12:48:32 UTC
1757 12:48:33.609209 ELOG: Event(9E) added with size 10 at 2023-03-13 12:48:32 UTC
1758 12:48:33.615674 ELOG: Event(9F) added with size 14 at 2023-03-13 12:48:32 UTC
1759 12:48:33.622251 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 12:48:33.628905 ELOG: Event(A1) added with size 10 at 2023-03-13 12:48:32 UTC
1761 12:48:33.635484 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1762 12:48:33.641806 ELOG: Event(A0) added with size 9 at 2023-03-13 12:48:32 UTC
1763 12:48:33.645428 elog_add_boot_reason: Logged dev mode boot
1764 12:48:33.651897 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1765 12:48:33.651987 Finalize devices...
1766 12:48:33.654892 Devices finalized
1767 12:48:33.661744 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1768 12:48:33.664704 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1769 12:48:33.671360 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1770 12:48:33.674743 ME: HFSTS1 : 0x80030055
1771 12:48:33.681313 ME: HFSTS2 : 0x30280116
1772 12:48:33.684779 ME: HFSTS3 : 0x00000050
1773 12:48:33.688081 ME: HFSTS4 : 0x00004000
1774 12:48:33.694804 ME: HFSTS5 : 0x00000000
1775 12:48:33.697784 ME: HFSTS6 : 0x40400006
1776 12:48:33.701535 ME: Manufacturing Mode : YES
1777 12:48:33.704444 ME: SPI Protection Mode Enabled : NO
1778 12:48:33.711144 ME: FW Partition Table : OK
1779 12:48:33.714483 ME: Bringup Loader Failure : NO
1780 12:48:33.718058 ME: Firmware Init Complete : NO
1781 12:48:33.721033 ME: Boot Options Present : NO
1782 12:48:33.724459 ME: Update In Progress : NO
1783 12:48:33.727559 ME: D0i3 Support : YES
1784 12:48:33.731198 ME: Low Power State Enabled : NO
1785 12:48:33.737694 ME: CPU Replaced : YES
1786 12:48:33.741229 ME: CPU Replacement Valid : YES
1787 12:48:33.744267 ME: Current Working State : 5
1788 12:48:33.747999 ME: Current Operation State : 1
1789 12:48:33.751039 ME: Current Operation Mode : 3
1790 12:48:33.754611 ME: Error Code : 0
1791 12:48:33.757757 ME: Enhanced Debug Mode : NO
1792 12:48:33.760851 ME: CPU Debug Disabled : YES
1793 12:48:33.764654 ME: TXT Support : NO
1794 12:48:33.770668 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1795 12:48:33.780771 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1796 12:48:33.784177 CBFS: 'fallback/slic' not found.
1797 12:48:33.787373 ACPI: Writing ACPI tables at 76b01000.
1798 12:48:33.787460 ACPI: * FACS
1799 12:48:33.790797 ACPI: * DSDT
1800 12:48:33.794113 Ramoops buffer: 0x100000@0x76a00000.
1801 12:48:33.797172 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1802 12:48:33.804031 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1803 12:48:33.807344 Google Chrome EC: version:
1804 12:48:33.811029 ro: voema_v2.0.10114-a447f03e46
1805 12:48:33.813763 rw: voema_v2.0.10114-a447f03e46
1806 12:48:33.813849 running image: 2
1807 12:48:33.820582 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1808 12:48:33.825537 ACPI: * FADT
1809 12:48:33.825624 SCI is IRQ9
1810 12:48:33.831675 ACPI: added table 1/32, length now 40
1811 12:48:33.831769 ACPI: * SSDT
1812 12:48:33.835283 Found 1 CPU(s) with 8 core(s) each.
1813 12:48:33.841694 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1814 12:48:33.845126 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1815 12:48:33.848239 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1816 12:48:33.851945 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1817 12:48:33.858375 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1818 12:48:33.865132 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1819 12:48:33.868293 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1820 12:48:33.874946 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1821 12:48:33.881655 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1822 12:48:33.884594 \_SB.PCI0.RP09: Added StorageD3Enable property
1823 12:48:33.891333 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1824 12:48:33.894665 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1825 12:48:33.901329 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1826 12:48:33.904804 PS2K: Passing 80 keymaps to kernel
1827 12:48:33.911141 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1828 12:48:33.917749 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1829 12:48:33.924278 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1830 12:48:33.931376 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1831 12:48:33.937631 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1832 12:48:33.944195 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1833 12:48:33.950639 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1834 12:48:33.957410 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1835 12:48:33.960942 ACPI: added table 2/32, length now 44
1836 12:48:33.961032 ACPI: * MCFG
1837 12:48:33.967209 ACPI: added table 3/32, length now 48
1838 12:48:33.967293 ACPI: * TPM2
1839 12:48:33.970694 TPM2 log created at 0x769f0000
1840 12:48:33.973859 ACPI: added table 4/32, length now 52
1841 12:48:33.977031 ACPI: * MADT
1842 12:48:33.977115 SCI is IRQ9
1843 12:48:33.980655 ACPI: added table 5/32, length now 56
1844 12:48:33.983778 current = 76b09850
1845 12:48:33.983861 ACPI: * DMAR
1846 12:48:33.987128 ACPI: added table 6/32, length now 60
1847 12:48:33.993647 ACPI: added table 7/32, length now 64
1848 12:48:33.993732 ACPI: * HPET
1849 12:48:33.996687 ACPI: added table 8/32, length now 68
1850 12:48:34.000439 ACPI: done.
1851 12:48:34.000524 ACPI tables: 35216 bytes.
1852 12:48:34.003620 smbios_write_tables: 769ef000
1853 12:48:34.007017 EC returned error result code 3
1854 12:48:34.010480 Couldn't obtain OEM name from CBI
1855 12:48:34.014664 Create SMBIOS type 16
1856 12:48:34.018412 Create SMBIOS type 17
1857 12:48:34.021522 GENERIC: 0.0 (WIFI Device)
1858 12:48:34.024664 SMBIOS tables: 1734 bytes.
1859 12:48:34.027730 Writing table forward entry at 0x00000500
1860 12:48:34.034701 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1861 12:48:34.037872 Writing coreboot table at 0x76b25000
1862 12:48:34.044553 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1863 12:48:34.047719 1. 0000000000001000-000000000009ffff: RAM
1864 12:48:34.051158 2. 00000000000a0000-00000000000fffff: RESERVED
1865 12:48:34.057604 3. 0000000000100000-00000000769eefff: RAM
1866 12:48:34.061289 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1867 12:48:34.067597 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1868 12:48:34.074286 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1869 12:48:34.077536 7. 0000000077000000-000000007fbfffff: RESERVED
1870 12:48:34.083864 8. 00000000c0000000-00000000cfffffff: RESERVED
1871 12:48:34.087248 9. 00000000f8000000-00000000f9ffffff: RESERVED
1872 12:48:34.093975 10. 00000000fb000000-00000000fb000fff: RESERVED
1873 12:48:34.097245 11. 00000000fe000000-00000000fe00ffff: RESERVED
1874 12:48:34.100513 12. 00000000fed80000-00000000fed87fff: RESERVED
1875 12:48:34.107320 13. 00000000fed90000-00000000fed92fff: RESERVED
1876 12:48:34.110496 14. 00000000feda0000-00000000feda1fff: RESERVED
1877 12:48:34.117092 15. 00000000fedc0000-00000000feddffff: RESERVED
1878 12:48:34.120501 16. 0000000100000000-00000004803fffff: RAM
1879 12:48:34.123916 Passing 4 GPIOs to payload:
1880 12:48:34.130150 NAME | PORT | POLARITY | VALUE
1881 12:48:34.133439 lid | undefined | high | high
1882 12:48:34.139988 power | undefined | high | low
1883 12:48:34.143175 oprom | undefined | high | low
1884 12:48:34.150206 EC in RW | 0x000000e5 | high | high
1885 12:48:34.156736 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1886 12:48:34.159824 coreboot table: 1576 bytes.
1887 12:48:34.162888 IMD ROOT 0. 0x76fff000 0x00001000
1888 12:48:34.166568 IMD SMALL 1. 0x76ffe000 0x00001000
1889 12:48:34.169514 FSP MEMORY 2. 0x76c4e000 0x003b0000
1890 12:48:34.173083 VPD 3. 0x76c4d000 0x00000367
1891 12:48:34.176578 RO MCACHE 4. 0x76c4c000 0x00000fdc
1892 12:48:34.182590 CONSOLE 5. 0x76c2c000 0x00020000
1893 12:48:34.186434 FMAP 6. 0x76c2b000 0x00000578
1894 12:48:34.189414 TIME STAMP 7. 0x76c2a000 0x00000910
1895 12:48:34.192658 VBOOT WORK 8. 0x76c16000 0x00014000
1896 12:48:34.196175 ROMSTG STCK 9. 0x76c15000 0x00001000
1897 12:48:34.199193 AFTER CAR 10. 0x76c0a000 0x0000b000
1898 12:48:34.202608 RAMSTAGE 11. 0x76b97000 0x00073000
1899 12:48:34.206194 REFCODE 12. 0x76b42000 0x00055000
1900 12:48:34.212291 SMM BACKUP 13. 0x76b32000 0x00010000
1901 12:48:34.215894 4f444749 14. 0x76b30000 0x00002000
1902 12:48:34.219542 EXT VBT15. 0x76b2d000 0x0000219f
1903 12:48:34.222526 COREBOOT 16. 0x76b25000 0x00008000
1904 12:48:34.225567 ACPI 17. 0x76b01000 0x00024000
1905 12:48:34.228672 ACPI GNVS 18. 0x76b00000 0x00001000
1906 12:48:34.232425 RAMOOPS 19. 0x76a00000 0x00100000
1907 12:48:34.235344 TPM2 TCGLOG20. 0x769f0000 0x00010000
1908 12:48:34.241891 SMBIOS 21. 0x769ef000 0x00000800
1909 12:48:34.241982 IMD small region:
1910 12:48:34.245533 IMD ROOT 0. 0x76ffec00 0x00000400
1911 12:48:34.251990 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1912 12:48:34.255209 POWER STATE 2. 0x76ffeb80 0x00000044
1913 12:48:34.258747 ROMSTAGE 3. 0x76ffeb60 0x00000004
1914 12:48:34.262012 MEM INFO 4. 0x76ffe980 0x000001e0
1915 12:48:34.268791 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1916 12:48:34.271706 MTRR: Physical address space:
1917 12:48:34.278404 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1918 12:48:34.284898 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1919 12:48:34.288102 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1920 12:48:34.295165 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1921 12:48:34.301341 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1922 12:48:34.308234 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1923 12:48:34.314922 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1924 12:48:34.318169 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 12:48:34.324465 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 12:48:34.327995 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 12:48:34.331341 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 12:48:34.334352 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 12:48:34.341002 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 12:48:34.344554 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 12:48:34.347587 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 12:48:34.350984 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 12:48:34.354033 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 12:48:34.360770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 12:48:34.364161 call enable_fixed_mtrr()
1936 12:48:34.367136 CPU physical address size: 39 bits
1937 12:48:34.373877 MTRR: default type WB/UC MTRR counts: 6/7.
1938 12:48:34.377265 MTRR: WB selected as default type.
1939 12:48:34.380360 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 12:48:34.387113 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 12:48:34.393892 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 12:48:34.400197 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1943 12:48:34.407113 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 12:48:34.413469 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1945 12:48:34.417191
1946 12:48:34.417278 MTRR check
1947 12:48:34.420585 Fixed MTRRs : Enabled
1948 12:48:34.420672 Variable MTRRs: Enabled
1949 12:48:34.420740
1950 12:48:34.427105 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 12:48:34.430458 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 12:48:34.433429 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 12:48:34.437067 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 12:48:34.443349 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 12:48:34.446664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 12:48:34.450178 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 12:48:34.453522 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 12:48:34.460225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 12:48:34.463286 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 12:48:34.466850 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 12:48:34.469678 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 12:48:34.476674 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 12:48:34.480147 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 12:48:34.483328 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 12:48:34.486367 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 12:48:34.492920 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 12:48:34.496218 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 12:48:34.499929 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 12:48:34.502856 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 12:48:34.509544 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 12:48:34.513105 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 12:48:34.515927 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 12:48:34.523046 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 12:48:34.523128 call enable_fixed_mtrr()
1975 12:48:34.529982 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 12:48:34.533131 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 12:48:34.536512 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 12:48:34.539756 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 12:48:34.546229 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 12:48:34.549777 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 12:48:34.552958 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 12:48:34.556302 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 12:48:34.562972 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 12:48:34.566279 CPU physical address size: 39 bits
1985 12:48:34.570613 call enable_fixed_mtrr()
1986 12:48:34.573654 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 12:48:34.580500 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:48:34.584066 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 12:48:34.587086 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:48:34.590140 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:48:34.596835 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:48:34.599897 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:48:34.603646 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:48:34.606790 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:48:34.613516 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:48:34.616507 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:48:34.619488 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:48:34.627736 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 12:48:34.630749 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 12:48:34.634302 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 12:48:34.637155 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 12:48:34.643790 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 12:48:34.646883 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 12:48:34.650283 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 12:48:34.653588 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 12:48:34.660131 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 12:48:34.663108 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 12:48:34.667139 call enable_fixed_mtrr()
2009 12:48:34.670020 call enable_fixed_mtrr()
2010 12:48:34.673418 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 12:48:34.676673 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 12:48:34.683388 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 12:48:34.686985 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 12:48:34.690060 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 12:48:34.693065 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 12:48:34.699850 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 12:48:34.703046 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 12:48:34.706158 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 12:48:34.712824 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 12:48:34.715911 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 12:48:34.718915 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 12:48:34.726603 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 12:48:34.726691 call enable_fixed_mtrr()
2024 12:48:34.732611 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 12:48:34.736003 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 12:48:34.739637 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 12:48:34.742478 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 12:48:34.749125 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 12:48:34.752221 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 12:48:34.755453 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 12:48:34.759349 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 12:48:34.765826 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 12:48:34.768674 CPU physical address size: 39 bits
2034 12:48:34.774016 call enable_fixed_mtrr()
2035 12:48:34.777219 call enable_fixed_mtrr()
2036 12:48:34.783636 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2037 12:48:34.786791 CPU physical address size: 39 bits
2038 12:48:34.790975 Checking cr50 for pending updates
2039 12:48:34.794375 CPU physical address size: 39 bits
2040 12:48:34.798013 CPU physical address size: 39 bits
2041 12:48:34.801131 Reading cr50 TPM mode
2042 12:48:34.804823 CPU physical address size: 39 bits
2043 12:48:34.808041 CPU physical address size: 39 bits
2044 12:48:34.815105 BS: BS_PAYLOAD_LOAD entry times (exec / console): 15 / 8 ms
2045 12:48:34.824887 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2046 12:48:34.828107 Checking segment from ROM address 0xffc02b38
2047 12:48:34.831390 Checking segment from ROM address 0xffc02b54
2048 12:48:34.838138 Loading segment from ROM address 0xffc02b38
2049 12:48:34.838224 code (compression=0)
2050 12:48:34.847817 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2051 12:48:34.857928 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2052 12:48:34.858015 it's not compressed!
2053 12:48:34.998679 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2054 12:48:35.005059 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2055 12:48:35.011623 Loading segment from ROM address 0xffc02b54
2056 12:48:35.015182 Entry Point 0x30000000
2057 12:48:35.015268 Loaded segments
2058 12:48:35.021847 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2059 12:48:35.066843 Finalizing chipset.
2060 12:48:35.069876 Finalizing SMM.
2061 12:48:35.069965 APMC done.
2062 12:48:35.076698 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2063 12:48:35.079762 mp_park_aps done after 0 msecs.
2064 12:48:35.082942 Jumping to boot code at 0x30000000(0x76b25000)
2065 12:48:35.092942 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2066 12:48:35.093036
2067 12:48:35.096655
2068 12:48:35.096741
2069 12:48:35.097092 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2070 12:48:35.097193 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2071 12:48:35.097278 Setting prompt string to ['volteer:']
2072 12:48:35.097359 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2073 12:48:35.099401 Starting depthcharge on Voema...
2074 12:48:35.099487
2075 12:48:35.106083 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2076 12:48:35.106172
2077 12:48:35.112984 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2078 12:48:35.113071
2079 12:48:35.119766 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2080 12:48:35.119853
2081 12:48:35.122833 Failed to find eMMC card reader
2082 12:48:35.122920
2083 12:48:35.125863 Wipe memory regions:
2084 12:48:35.125949
2085 12:48:35.129762 [0x00000000001000, 0x000000000a0000)
2086 12:48:35.129849
2087 12:48:35.132678 [0x00000000100000, 0x00000030000000)
2088 12:48:35.168265
2089 12:48:35.171809 [0x00000032662db0, 0x000000769ef000)
2090 12:48:35.221614
2091 12:48:35.224663 [0x00000100000000, 0x00000480400000)
2092 12:48:35.862860
2093 12:48:35.865902 ec_init: CrosEC protocol v3 supported (256, 256)
2094 12:48:36.296517
2095 12:48:36.296673 R8152: Initializing
2096 12:48:36.296745
2097 12:48:36.299904 Version 6 (ocp_data = 5c30)
2098 12:48:36.299992
2099 12:48:36.302961 R8152: Done initializing
2100 12:48:36.303048
2101 12:48:36.306367 Adding net device
2102 12:48:36.608191
2103 12:48:36.611072 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 12:48:36.611156
2105 12:48:36.611223
2106 12:48:36.611285
2107 12:48:36.614326 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 12:48:36.715125 volteer: tftpboot 192.168.201.1 9584835/tftp-deploy-jz06f028/kernel/bzImage 9584835/tftp-deploy-jz06f028/kernel/cmdline 9584835/tftp-deploy-jz06f028/ramdisk/ramdisk.cpio.gz
2110 12:48:36.715269 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 12:48:36.715388 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2112 12:48:36.719352 tftpboot 192.168.201.1 9584835/tftp-deploy-jz06f028/kernel/bzImoy-jz06f028/kernel/cmdline 9584835/tftp-deploy-jz06f028/ramdisk/ramdisk.cpio.gz
2113 12:48:36.719464
2114 12:48:36.719537 Waiting for link
2115 12:48:36.923430
2116 12:48:36.923573 done.
2117 12:48:36.923645
2118 12:48:36.923711 MAC: 00:24:32:30:7a:04
2119 12:48:36.923774
2120 12:48:36.926589 Sending DHCP discover... done.
2121 12:48:36.926677
2122 12:48:36.929903 Waiting for reply... done.
2123 12:48:36.929990
2124 12:48:36.933162 Sending DHCP request... done.
2125 12:48:36.933251
2126 12:48:36.936224 Waiting for reply... done.
2127 12:48:36.936322
2128 12:48:36.940069 My ip is 192.168.201.22
2129 12:48:36.940156
2130 12:48:36.943044 The DHCP server ip is 192.168.201.1
2131 12:48:36.943131
2132 12:48:36.949597 TFTP server IP predefined by user: 192.168.201.1
2133 12:48:36.949690
2134 12:48:36.956083 Bootfile predefined by user: 9584835/tftp-deploy-jz06f028/kernel/bzImage
2135 12:48:36.956172
2136 12:48:36.959261 Sending tftp read request... done.
2137 12:48:36.959349
2138 12:48:36.962629 Waiting for the transfer...
2139 12:48:36.962717
2140 12:48:37.527434 00000000 ################################################################
2141 12:48:37.527576
2142 12:48:38.079551 00080000 ################################################################
2143 12:48:38.079697
2144 12:48:38.616692 00100000 ################################################################
2145 12:48:38.616836
2146 12:48:39.164731 00180000 ################################################################
2147 12:48:39.164885
2148 12:48:39.701389 00200000 ################################################################
2149 12:48:39.701540
2150 12:48:40.236011 00280000 ################################################################
2151 12:48:40.236158
2152 12:48:40.780235 00300000 ################################################################
2153 12:48:40.780428
2154 12:48:41.338031 00380000 ################################################################
2155 12:48:41.338512
2156 12:48:41.906069 00400000 ################################################################
2157 12:48:41.906223
2158 12:48:42.462691 00480000 ################################################################
2159 12:48:42.462845
2160 12:48:43.023016 00500000 ################################################################
2161 12:48:43.023171
2162 12:48:43.630171 00580000 ################################################################
2163 12:48:43.630705
2164 12:48:44.213612 00600000 ################################################################
2165 12:48:44.213766
2166 12:48:44.755879 00680000 ################################################################
2167 12:48:44.756024
2168 12:48:45.069182 00700000 ##################################### done.
2169 12:48:45.069334
2170 12:48:45.072338 The bootfile was 7638928 bytes long.
2171 12:48:45.072429
2172 12:48:45.076089 Sending tftp read request... done.
2173 12:48:45.076176
2174 12:48:45.079102 Waiting for the transfer...
2175 12:48:45.079188
2176 12:48:45.689524 00000000 ################################################################
2177 12:48:45.689664
2178 12:48:46.303210 00080000 ################################################################
2179 12:48:46.303710
2180 12:48:46.923689 00100000 ################################################################
2181 12:48:46.924303
2182 12:48:47.582380 00180000 ################################################################
2183 12:48:47.582927
2184 12:48:48.213896 00200000 ################################################################
2185 12:48:48.214426
2186 12:48:48.808186 00280000 ################################################################
2187 12:48:48.808349
2188 12:48:49.428009 00300000 ################################################################
2189 12:48:49.428167
2190 12:48:50.011789 00380000 ################################################################
2191 12:48:50.011927
2192 12:48:50.585480 00400000 ################################################################
2193 12:48:50.585620
2194 12:48:51.165898 00480000 ################################################################
2195 12:48:51.166035
2196 12:48:51.706609 00500000 ################################################################
2197 12:48:51.706749
2198 12:48:52.327163 00580000 ################################################################
2199 12:48:52.327301
2200 12:48:52.916245 00600000 ################################################################
2201 12:48:52.916398
2202 12:48:53.549070 00680000 ################################################################
2203 12:48:53.549218
2204 12:48:54.122645 00700000 ################################################################
2205 12:48:54.122794
2206 12:48:54.725799 00780000 ################################################################
2207 12:48:54.725946
2208 12:48:55.308346 00800000 ################################################################
2209 12:48:55.308493
2210 12:48:55.905289 00880000 ################################################################
2211 12:48:55.905463
2212 12:48:56.516976 00900000 ################################################################
2213 12:48:56.517501
2214 12:48:57.151749 00980000 ################################################################
2215 12:48:57.151904
2216 12:48:57.745130 00a00000 ################################################################
2217 12:48:57.745272
2218 12:48:58.305333 00a80000 ################################################################
2219 12:48:58.305477
2220 12:48:58.845961 00b00000 ################################################################
2221 12:48:58.846108
2222 12:48:59.381173 00b80000 ################################################################
2223 12:48:59.381321
2224 12:48:59.895658 00c00000 ################################################################
2225 12:48:59.895807
2226 12:49:00.413735 00c80000 ################################################################
2227 12:49:00.413875
2228 12:49:00.938721 00d00000 ################################################################
2229 12:49:00.938914
2230 12:49:01.464467 00d80000 ################################################################
2231 12:49:01.464609
2232 12:49:02.003175 00e00000 ################################################################
2233 12:49:02.003324
2234 12:49:02.528677 00e80000 ################################################################
2235 12:49:02.528817
2236 12:49:03.067895 00f00000 ################################################################
2237 12:49:03.068040
2238 12:49:03.604605 00f80000 ################################################################
2239 12:49:03.604748
2240 12:49:04.141454 01000000 ################################################################
2241 12:49:04.141619
2242 12:49:04.681972 01080000 ################################################################
2243 12:49:04.682171
2244 12:49:05.280591 01100000 ################################################################
2245 12:49:05.280739
2246 12:49:05.899412 01180000 ################################################################
2247 12:49:05.899994
2248 12:49:06.549961 01200000 ################################################################
2249 12:49:06.550502
2250 12:49:07.118913 01280000 ################################################################
2251 12:49:07.119232
2252 12:49:07.727702 01300000 ################################################################
2253 12:49:07.727854
2254 12:49:08.363677 01380000 ################################################################
2255 12:49:08.364269
2256 12:49:09.002629 01400000 ################################################################
2257 12:49:09.002771
2258 12:49:09.594520 01480000 ################################################################
2259 12:49:09.595075
2260 12:49:10.139075 01500000 ################################################################
2261 12:49:10.139224
2262 12:49:10.722754 01580000 ################################################################
2263 12:49:10.722947
2264 12:49:11.269758 01600000 ################################################################
2265 12:49:11.269902
2266 12:49:11.816534 01680000 ################################################################
2267 12:49:11.816684
2268 12:49:12.368669 01700000 ################################################################
2269 12:49:12.368820
2270 12:49:12.986020 01780000 ################################################################
2271 12:49:12.986173
2272 12:49:13.545332 01800000 ################################################################
2273 12:49:13.545482
2274 12:49:14.148754 01880000 ################################################################
2275 12:49:14.148914
2276 12:49:14.770139 01900000 ################################################################
2277 12:49:14.770291
2278 12:49:15.387248 01980000 ################################################################
2279 12:49:15.387391
2280 12:49:16.009421 01a00000 ################################################################
2281 12:49:16.010015
2282 12:49:16.623322 01a80000 ################################################################
2283 12:49:16.623480
2284 12:49:17.216065 01b00000 ################################################################
2285 12:49:17.216205
2286 12:49:17.881119 01b80000 ################################################################
2287 12:49:17.881659
2288 12:49:18.497911 01c00000 ################################################################
2289 12:49:18.498077
2290 12:49:19.151376 01c80000 ################################################################
2291 12:49:19.151918
2292 12:49:19.793841 01d00000 ################################################################
2293 12:49:19.793994
2294 12:49:20.416988 01d80000 ################################################################
2295 12:49:20.417547
2296 12:49:21.041897 01e00000 ################################################################
2297 12:49:21.042135
2298 12:49:21.644282 01e80000 ################################################################
2299 12:49:21.644852
2300 12:49:22.212303 01f00000 ################################################################
2301 12:49:22.212495
2302 12:49:22.805632 01f80000 ################################################################
2303 12:49:22.805788
2304 12:49:23.418974 02000000 ################################################################
2305 12:49:23.419112
2306 12:49:23.993411 02080000 ################################################################
2307 12:49:23.993561
2308 12:49:24.580730 02100000 ################################################################
2309 12:49:24.580891
2310 12:49:25.191772 02180000 ################################################################
2311 12:49:25.192365
2312 12:49:25.657846 02200000 #################################################### done.
2313 12:49:25.658370
2314 12:49:25.661045 Sending tftp read request... done.
2315 12:49:25.661533
2316 12:49:25.664136 Waiting for the transfer...
2317 12:49:25.664695
2318 12:49:25.665123 00000000 # done.
2319 12:49:25.665480
2320 12:49:25.674054 Command line loaded dynamically from TFTP file: 9584835/tftp-deploy-jz06f028/kernel/cmdline
2321 12:49:25.674525
2322 12:49:25.687148 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2323 12:49:25.693977
2324 12:49:25.697206 Shutting down all USB controllers.
2325 12:49:25.697646
2326 12:49:25.698075 Removing current net device
2327 12:49:25.698212
2328 12:49:25.700463 Finalizing coreboot
2329 12:49:25.700553
2330 12:49:25.706820 Exiting depthcharge with code 4 at timestamp: 59221186
2331 12:49:25.706906
2332 12:49:25.706974
2333 12:49:25.707037 Starting kernel ...
2334 12:49:25.707098
2335 12:49:25.707155
2336 12:49:25.707559 end: 2.2.4 bootloader-commands (duration 00:00:51) [common]
2337 12:49:25.707658 start: 2.2.5 auto-login-action (timeout 00:03:54) [common]
2338 12:49:25.707734 Setting prompt string to ['Linux version [0-9]']
2339 12:49:25.707804 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2340 12:49:25.707874 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2342 12:53:19.708672 end: 2.2.5 auto-login-action (duration 00:03:54) [common]
2344 12:53:19.709804 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 234 seconds'
2346 12:53:19.710711 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2349 12:53:19.712152 end: 2 depthcharge-action (duration 00:05:00) [common]
2351 12:53:19.713021 Cleaning after the job
2352 12:53:19.713107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/ramdisk
2353 12:53:19.715440 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/kernel
2354 12:53:19.716113 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584835/tftp-deploy-jz06f028/modules
2355 12:53:19.716399 start: 4.1 power-off (timeout 00:00:30) [common]
2356 12:53:19.716608 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2357 12:53:19.799204 >> Command sent successfully.
2358 12:53:19.808656 Returned 0 in 0 seconds
2359 12:53:19.910441 end: 4.1 power-off (duration 00:00:00) [common]
2361 12:53:19.911967 start: 4.2 read-feedback (timeout 00:10:00) [common]
2362 12:53:19.913201 Listened to connection for namespace 'common' for up to 1s
2363 12:53:20.916590 Finalising connection for namespace 'common'
2364 12:53:20.917357 Disconnecting from shell: Finalise
2365 12:53:20.917811
2366 12:53:21.019262 end: 4.2 read-feedback (duration 00:00:01) [common]
2367 12:53:21.019846 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584835
2368 12:53:21.079596 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584835
2369 12:53:21.079822 JobError: Your job cannot terminate cleanly.