Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Errors: 2
1 01:42:40.327701 lava-dispatcher, installed at version: 2023.10
2 01:42:40.327903 start: 0 validate
3 01:42:40.328044 Start time: 2023-11-24 01:42:40.328032+00:00 (UTC)
4 01:42:40.328211 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:42:40.328396 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 01:42:40.331449 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:42:40.331570 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.201-cip41-rt17%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:42:47.841274 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:42:47.841556 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.201-cip41-rt17%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 01:42:48.845767 validate duration: 8.52
12 01:42:48.846084 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:42:48.846221 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:42:48.846340 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:42:48.846507 Not decompressing ramdisk as can be used compressed.
16 01:42:48.846609 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 01:42:48.846703 saving as /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/ramdisk/rootfs.cpio.gz
18 01:42:48.846767 total size: 8418130 (8 MB)
19 01:42:48.848128 progress 0 % (0 MB)
20 01:42:48.850583 progress 5 % (0 MB)
21 01:42:48.853119 progress 10 % (0 MB)
22 01:42:48.855587 progress 15 % (1 MB)
23 01:42:48.858083 progress 20 % (1 MB)
24 01:42:48.860633 progress 25 % (2 MB)
25 01:42:48.863053 progress 30 % (2 MB)
26 01:42:48.865369 progress 35 % (2 MB)
27 01:42:48.868064 progress 40 % (3 MB)
28 01:42:48.870666 progress 45 % (3 MB)
29 01:42:48.873090 progress 50 % (4 MB)
30 01:42:48.875609 progress 55 % (4 MB)
31 01:42:48.878083 progress 60 % (4 MB)
32 01:42:48.880290 progress 65 % (5 MB)
33 01:42:48.882780 progress 70 % (5 MB)
34 01:42:48.885193 progress 75 % (6 MB)
35 01:42:48.887537 progress 80 % (6 MB)
36 01:42:48.890029 progress 85 % (6 MB)
37 01:42:48.892402 progress 90 % (7 MB)
38 01:42:48.894923 progress 95 % (7 MB)
39 01:42:48.897208 progress 100 % (8 MB)
40 01:42:48.897479 8 MB downloaded in 0.05 s (158.31 MB/s)
41 01:42:48.897649 end: 1.1.1 http-download (duration 00:00:00) [common]
43 01:42:48.897893 end: 1.1 download-retry (duration 00:00:00) [common]
44 01:42:48.897979 start: 1.2 download-retry (timeout 00:10:00) [common]
45 01:42:48.898095 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 01:42:48.898272 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.201-cip41-rt17/x86_64/defconfig+x86-board/gcc-10/kernel/bzImage
47 01:42:48.898343 saving as /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/kernel/bzImage
48 01:42:48.898405 total size: 14136928 (13 MB)
49 01:42:48.898472 No compression specified
50 01:42:48.899827 progress 0 % (0 MB)
51 01:42:48.903842 progress 5 % (0 MB)
52 01:42:48.907947 progress 10 % (1 MB)
53 01:42:48.911864 progress 15 % (2 MB)
54 01:42:48.916028 progress 20 % (2 MB)
55 01:42:48.920021 progress 25 % (3 MB)
56 01:42:48.924068 progress 30 % (4 MB)
57 01:42:48.928046 progress 35 % (4 MB)
58 01:42:48.932084 progress 40 % (5 MB)
59 01:42:48.936028 progress 45 % (6 MB)
60 01:42:48.939838 progress 50 % (6 MB)
61 01:42:48.943762 progress 55 % (7 MB)
62 01:42:48.947646 progress 60 % (8 MB)
63 01:42:48.951749 progress 65 % (8 MB)
64 01:42:48.955727 progress 70 % (9 MB)
65 01:42:48.959795 progress 75 % (10 MB)
66 01:42:48.963786 progress 80 % (10 MB)
67 01:42:48.967768 progress 85 % (11 MB)
68 01:42:48.971754 progress 90 % (12 MB)
69 01:42:48.975761 progress 95 % (12 MB)
70 01:42:48.979927 progress 100 % (13 MB)
71 01:42:48.980106 13 MB downloaded in 0.08 s (165.02 MB/s)
72 01:42:48.980258 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:42:48.980536 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:42:48.980627 start: 1.3 download-retry (timeout 00:10:00) [common]
76 01:42:48.980723 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 01:42:48.980862 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.201-cip41-rt17/x86_64/defconfig+x86-board/gcc-10/modules.tar.xz
78 01:42:48.980932 saving as /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/modules/modules.tar
79 01:42:48.980993 total size: 527016 (0 MB)
80 01:42:48.981056 Using unxz to decompress xz
81 01:42:48.985750 progress 6 % (0 MB)
82 01:42:48.986164 progress 12 % (0 MB)
83 01:42:48.986418 progress 18 % (0 MB)
84 01:42:48.988003 progress 24 % (0 MB)
85 01:42:48.989927 progress 31 % (0 MB)
86 01:42:48.991916 progress 37 % (0 MB)
87 01:42:48.993962 progress 43 % (0 MB)
88 01:42:48.995903 progress 49 % (0 MB)
89 01:42:48.997961 progress 55 % (0 MB)
90 01:42:48.999857 progress 62 % (0 MB)
91 01:42:49.001944 progress 68 % (0 MB)
92 01:42:49.003967 progress 74 % (0 MB)
93 01:42:49.006064 progress 80 % (0 MB)
94 01:42:49.008256 progress 87 % (0 MB)
95 01:42:49.010332 progress 93 % (0 MB)
96 01:42:49.012366 progress 99 % (0 MB)
97 01:42:49.020051 0 MB downloaded in 0.04 s (12.87 MB/s)
98 01:42:49.020295 end: 1.3.1 http-download (duration 00:00:00) [common]
100 01:42:49.020611 end: 1.3 download-retry (duration 00:00:00) [common]
101 01:42:49.020705 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 01:42:49.020803 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 01:42:49.020885 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 01:42:49.020972 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 01:42:49.021198 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97
106 01:42:49.021335 makedir: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin
107 01:42:49.021443 makedir: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/tests
108 01:42:49.021543 makedir: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/results
109 01:42:49.021658 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-add-keys
110 01:42:49.021810 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-add-sources
111 01:42:49.021945 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-background-process-start
112 01:42:49.022080 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-background-process-stop
113 01:42:49.022209 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-common-functions
114 01:42:49.022337 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-echo-ipv4
115 01:42:49.022465 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-install-packages
116 01:42:49.022591 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-installed-packages
117 01:42:49.022718 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-os-build
118 01:42:49.022846 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-probe-channel
119 01:42:49.022976 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-probe-ip
120 01:42:49.023104 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-target-ip
121 01:42:49.023231 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-target-mac
122 01:42:49.023357 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-target-storage
123 01:42:49.023488 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-case
124 01:42:49.023615 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-event
125 01:42:49.023741 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-feedback
126 01:42:49.023867 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-raise
127 01:42:49.023997 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-reference
128 01:42:49.024123 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-runner
129 01:42:49.024250 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-set
130 01:42:49.024378 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-test-shell
131 01:42:49.024550 Updating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-install-packages (oe)
132 01:42:49.024715 Updating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/bin/lava-installed-packages (oe)
133 01:42:49.024844 Creating /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/environment
134 01:42:49.024950 LAVA metadata
135 01:42:49.025027 - LAVA_JOB_ID=12070474
136 01:42:49.025095 - LAVA_DISPATCHER_IP=192.168.201.1
137 01:42:49.025199 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 01:42:49.025271 skipped lava-vland-overlay
139 01:42:49.025345 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 01:42:49.025425 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 01:42:49.025492 skipped lava-multinode-overlay
142 01:42:49.025564 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 01:42:49.025648 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 01:42:49.025723 Loading test definitions
145 01:42:49.025818 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 01:42:49.025891 Using /lava-12070474 at stage 0
147 01:42:49.026209 uuid=12070474_1.4.2.3.1 testdef=None
148 01:42:49.026297 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 01:42:49.026380 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 01:42:49.026922 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 01:42:49.027148 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 01:42:49.027797 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 01:42:49.028028 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 01:42:49.028708 runner path: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/0/tests/0_dmesg test_uuid 12070474_1.4.2.3.1
157 01:42:49.028864 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 01:42:49.029089 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 01:42:49.029160 Using /lava-12070474 at stage 1
161 01:42:49.029464 uuid=12070474_1.4.2.3.5 testdef=None
162 01:42:49.029552 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 01:42:49.029635 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 01:42:49.030110 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 01:42:49.030326 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 01:42:49.030978 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 01:42:49.031203 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 01:42:49.031881 runner path: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/1/tests/1_bootrr test_uuid 12070474_1.4.2.3.5
171 01:42:49.032034 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 01:42:49.032238 Creating lava-test-runner.conf files
174 01:42:49.032299 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/0 for stage 0
175 01:42:49.032389 - 0_dmesg
176 01:42:49.032492 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12070474/lava-overlay-71ny6o97/lava-12070474/1 for stage 1
177 01:42:49.032600 - 1_bootrr
178 01:42:49.032694 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 01:42:49.032779 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 01:42:49.041384 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 01:42:49.041511 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 01:42:49.041600 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 01:42:49.041688 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 01:42:49.041772 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 01:42:49.297239 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 01:42:49.297646 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
187 01:42:49.297804 extracting modules file /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12070474/extract-overlay-ramdisk-4j4qsvr4/ramdisk
188 01:42:49.325094 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 01:42:49.325266 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
190 01:42:49.325363 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12070474/compress-overlay-33o7dr8l/overlay-1.4.2.4.tar.gz to ramdisk
191 01:42:49.325437 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12070474/compress-overlay-33o7dr8l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12070474/extract-overlay-ramdisk-4j4qsvr4/ramdisk
192 01:42:49.333674 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 01:42:49.333791 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
194 01:42:49.333881 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 01:42:49.333970 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
196 01:42:49.334050 Building ramdisk /var/lib/lava/dispatcher/tmp/12070474/extract-overlay-ramdisk-4j4qsvr4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12070474/extract-overlay-ramdisk-4j4qsvr4/ramdisk
197 01:42:49.485587 >> 54152 blocks
198 01:42:50.376834 rename /var/lib/lava/dispatcher/tmp/12070474/extract-overlay-ramdisk-4j4qsvr4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/ramdisk/ramdisk.cpio.gz
199 01:42:50.377274 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 01:42:50.377403 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 01:42:50.377509 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 01:42:50.377607 No mkimage arch provided, not using FIT.
203 01:42:50.377695 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 01:42:50.377777 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 01:42:50.377879 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 01:42:50.377979 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 01:42:50.378065 No LXC device requested
208 01:42:50.378147 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 01:42:50.378243 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 01:42:50.378328 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 01:42:50.378406 Checking files for TFTP limit of 4294967296 bytes.
212 01:42:50.378828 end: 1 tftp-deploy (duration 00:00:02) [common]
213 01:42:50.378939 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 01:42:50.379030 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 01:42:50.379178 substitutions:
216 01:42:50.379276 - {DTB}: None
217 01:42:50.379370 - {INITRD}: 12070474/tftp-deploy-hy2rfoez/ramdisk/ramdisk.cpio.gz
218 01:42:50.379460 - {KERNEL}: 12070474/tftp-deploy-hy2rfoez/kernel/bzImage
219 01:42:50.379546 - {LAVA_MAC}: None
220 01:42:50.379605 - {PRESEED_CONFIG}: None
221 01:42:50.379661 - {PRESEED_LOCAL}: None
222 01:42:50.379717 - {RAMDISK}: 12070474/tftp-deploy-hy2rfoez/ramdisk/ramdisk.cpio.gz
223 01:42:50.379773 - {ROOT_PART}: None
224 01:42:50.379826 - {ROOT}: None
225 01:42:50.379883 - {SERVER_IP}: 192.168.201.1
226 01:42:50.379936 - {TEE}: None
227 01:42:50.379991 Parsed boot commands:
228 01:42:50.380047 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 01:42:50.380229 Parsed boot commands: tftpboot 192.168.201.1 12070474/tftp-deploy-hy2rfoez/kernel/bzImage 12070474/tftp-deploy-hy2rfoez/kernel/cmdline 12070474/tftp-deploy-hy2rfoez/ramdisk/ramdisk.cpio.gz
230 01:42:50.380314 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 01:42:50.380398 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 01:42:50.380519 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 01:42:50.380620 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 01:42:50.380688 Not connected, no need to disconnect.
235 01:42:50.380763 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 01:42:50.380851 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 01:42:50.380916 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-8'
238 01:42:50.385132 Setting prompt string to ['lava-test: # ']
239 01:42:50.385533 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 01:42:50.385650 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 01:42:50.385751 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 01:42:50.385854 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 01:42:50.386074 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=reboot'
244 01:42:55.517835 >> Command sent successfully.
245 01:42:55.520311 Returned 0 in 5 seconds
246 01:42:55.620719 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 01:42:55.621038 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 01:42:55.621134 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 01:42:55.621220 Setting prompt string to 'Starting depthcharge on Volmar...'
251 01:42:55.621285 Changing prompt to 'Starting depthcharge on Volmar...'
252 01:42:55.621353 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 01:42:55.621606 [Enter `^Ec?' for help]
254 01:42:56.996919
255 01:42:56.997097
256 01:42:57.003581 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 01:42:57.007419 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 01:42:57.013801 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 01:42:57.017143 CPU: AES supported, TXT NOT supported, VT supported
260 01:42:57.027324 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 01:42:57.027433 Cache size = 10 MiB
262 01:42:57.034280 MCH: device id 4609 (rev 04) is Alderlake-P
263 01:42:57.038344 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 01:42:57.041672 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 01:42:57.045599 VBOOT: Loading verstage.
266 01:42:57.049498 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 01:42:57.055805 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 01:42:57.059440 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 01:42:57.069372 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 01:42:57.075768 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 01:42:57.075856
272 01:42:57.075923
273 01:42:57.086986 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 01:42:57.090057 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 01:42:57.094389 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 01:42:57.097519 done! DID_VID 0x00281ae0
277 01:42:57.101062 TPM ready after 0 ms
278 01:42:57.104754 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
279 01:42:57.116681 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
280 01:42:57.123361 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
281 01:42:57.176306 tlcl_send_startup: Startup return code is 0
282 01:42:57.176433 TPM: setup succeeded
283 01:42:57.197765 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
284 01:42:57.219876 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
285 01:42:57.223285 Chrome EC: UHEPI supported
286 01:42:57.227115 Reading cr50 boot mode
287 01:42:57.241670 Cr50 says boot_mode is VERIFIED_RW(0x00).
288 01:42:57.241764 Phase 1
289 01:42:57.248617 FMAP: area GBB found @ 1805000 (458752 bytes)
290 01:42:57.254861 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
291 01:42:57.261032 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
292 01:42:57.267912 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
293 01:42:57.271679 Phase 2
294 01:42:57.271764 Phase 3
295 01:42:57.274903 FMAP: area GBB found @ 1805000 (458752 bytes)
296 01:42:57.281140 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 01:42:57.284392 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 01:42:57.291379 VB2:vb2_verify_keyblock() Checking keyblock signature...
299 01:42:57.297770 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
300 01:42:57.304736 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
301 01:42:57.314559 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
302 01:42:57.326538 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 01:42:57.329839 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 01:42:57.336404 VB2:vb2_verify_fw_preamble() Verifying preamble.
305 01:42:57.343158 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
306 01:42:57.349811 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
307 01:42:57.356568 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
308 01:42:57.360601 Phase 4
309 01:42:57.363793 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
310 01:42:57.370303 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
311 01:42:57.582151 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
312 01:42:57.589115 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
313 01:42:57.592298 Saving vboot hash.
314 01:42:57.598981 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
315 01:42:57.614686 tlcl_extend: response is 0
316 01:42:57.621399 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
317 01:42:57.628108 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
318 01:42:57.642875 tlcl_extend: response is 0
319 01:42:57.649120 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
320 01:42:57.670898 tlcl_lock_nv_write: response is 0
321 01:42:57.690065 tlcl_lock_nv_write: response is 0
322 01:42:57.690199 Slot A is selected
323 01:42:57.696690 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 01:42:57.703237 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
325 01:42:57.709776 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
326 01:42:57.716392 BS: verstage times (exec / console): total (unknown) / 256 ms
327 01:42:57.716541
328 01:42:57.716607
329 01:42:57.723039 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
330 01:42:57.728356 Google Chrome EC: version:
331 01:42:57.731842 ro: volmar_v2.0.14126-e605144e9c
332 01:42:57.735262 rw: volmar_v0.0.55-22d1557
333 01:42:57.738231 running image: 2
334 01:42:57.741735 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 01:42:57.751505 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
336 01:42:57.758212 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
337 01:42:57.764641 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
338 01:42:57.774848 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 01:42:57.784762 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 01:42:57.788429 EC took 941us to calculate image hash
341 01:42:57.798172 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 01:42:57.801268 VB2:sync_ec() select_rw=RW(active)
343 01:42:57.812771 Waited 270us to clear limit power flag.
344 01:42:57.816080 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 01:42:57.819412 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 01:42:57.823082 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 01:42:57.829361 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
348 01:42:57.832881 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
349 01:42:57.836355 TCO_STS: 0000 0000
350 01:42:57.839662 GEN_PMCON: d0015038 00002200
351 01:42:57.843218 GBLRST_CAUSE: 00000000 00000000
352 01:42:57.843310 HPR_CAUSE0: 00000000
353 01:42:57.846361 prev_sleep_state 5
354 01:42:57.849416 Abort disabling TXT, as CPU is not TXT capable.
355 01:42:57.857535 cse_lite: Number of partitions = 3
356 01:42:57.860412 cse_lite: Current partition = RO
357 01:42:57.860529 cse_lite: Next partition = RO
358 01:42:57.863939 cse_lite: Flags = 0x7
359 01:42:57.870753 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
360 01:42:57.880706 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
361 01:42:57.884167 FMAP: area SI_ME found @ 1000 (5238784 bytes)
362 01:42:57.890879 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 01:42:57.897185 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
364 01:42:57.903968 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
365 01:42:57.907259 cse_lite: CSE CBFS RW version : 16.1.25.2049
366 01:42:57.913874 cse_lite: Set Boot Partition Info Command (RW)
367 01:42:57.917337 HECI: Global Reset(Type:1) Command
368 01:42:59.330141
369 01:42:59.330629
370 01:42:59.337583 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
371 01:42:59.341090 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
372 01:42:59.348168 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
373 01:42:59.351443 CPU: AES supported, TXT NOT supported, VT supported
374 01:42:59.361259 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
375 01:42:59.361760 Cache size = 10 MiB
376 01:42:59.364529 MCH: device id 4609 (rev 04) is Alderlake-P
377 01:42:59.371071 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
378 01:42:59.374570 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
379 01:42:59.377788 VBOOT: Loading verstage.
380 01:42:59.381762 FMAP: Found "FLASH" version 1.1 at 0x1804000.
381 01:42:59.388307 FMAP: base = 0x0 size = 0x2000000 #areas = 37
382 01:42:59.392097 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 01:42:59.402536 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
384 01:42:59.408938 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
385 01:42:59.409453
386 01:42:59.409786
387 01:42:59.418890 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
388 01:42:59.425822 Probing TPM I2C: I2C bus 1 version 0x3230302a
389 01:42:59.428727 DW I2C bus 1 at 0xfe022000 (400 KHz)
390 01:42:59.432296 done! DID_VID 0x00281ae0
391 01:42:59.432882 TPM ready after 0 ms
392 01:42:59.436769 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
393 01:42:59.450946 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
394 01:42:59.454341 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
395 01:42:59.510982 tlcl_send_startup: Startup return code is 0
396 01:42:59.511476 TPM: setup succeeded
397 01:42:59.531997 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
398 01:42:59.554174 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
399 01:42:59.557834 Chrome EC: UHEPI supported
400 01:42:59.560934 Reading cr50 boot mode
401 01:42:59.575953 Cr50 says boot_mode is VERIFIED_RW(0x00).
402 01:42:59.576549 Phase 1
403 01:42:59.582758 FMAP: area GBB found @ 1805000 (458752 bytes)
404 01:42:59.589543 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 01:42:59.596162 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 01:42:59.602757 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
407 01:42:59.606320 Phase 2
408 01:42:59.606851 Phase 3
409 01:42:59.609284 FMAP: area GBB found @ 1805000 (458752 bytes)
410 01:42:59.616246 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 01:42:59.619374 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
412 01:42:59.625727 VB2:vb2_verify_keyblock() Checking keyblock signature...
413 01:42:59.632528 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
414 01:42:59.639463 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
415 01:42:59.649464 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
416 01:42:59.660982 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
417 01:42:59.664254 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
418 01:42:59.671375 VB2:vb2_verify_fw_preamble() Verifying preamble.
419 01:42:59.677972 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
420 01:42:59.684566 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
421 01:42:59.691204 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
422 01:42:59.695395 Phase 4
423 01:42:59.698478 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
424 01:42:59.705110 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
425 01:42:59.917690 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
426 01:42:59.924230 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
427 01:42:59.927360 Saving vboot hash.
428 01:42:59.934536 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
429 01:42:59.950463 tlcl_extend: response is 0
430 01:42:59.956985 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
431 01:42:59.963498 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
432 01:42:59.977618 tlcl_extend: response is 0
433 01:42:59.984328 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
434 01:43:00.004322 tlcl_lock_nv_write: response is 0
435 01:43:00.023452 tlcl_lock_nv_write: response is 0
436 01:43:00.023928 Slot A is selected
437 01:43:00.030081 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
438 01:43:00.036562 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
439 01:43:00.043581 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
440 01:43:00.050394 BS: verstage times (exec / console): total (unknown) / 256 ms
441 01:43:00.050940
442 01:43:00.051451
443 01:43:00.056582 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
444 01:43:00.061058 Google Chrome EC: version:
445 01:43:00.064288 ro: volmar_v2.0.14126-e605144e9c
446 01:43:00.067442 rw: volmar_v0.0.55-22d1557
447 01:43:00.070928 running image: 2
448 01:43:00.074562 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
449 01:43:00.083917 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
450 01:43:00.090820 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
451 01:43:00.097353 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
452 01:43:00.107893 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 01:43:00.120442 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 01:43:00.121365 EC took 1112us to calculate image hash
455 01:43:00.130533 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
456 01:43:00.134159 VB2:sync_ec() select_rw=RW(active)
457 01:43:00.153566 Waited 270us to clear limit power flag.
458 01:43:00.156773 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
459 01:43:00.160628 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
460 01:43:00.163935 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
461 01:43:00.170442 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
462 01:43:00.173263 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
463 01:43:00.177036 TCO_STS: 0000 0000
464 01:43:00.177581 GEN_PMCON: d1001038 00002200
465 01:43:00.179844 GBLRST_CAUSE: 00000040 00000000
466 01:43:00.183581 HPR_CAUSE0: 00000000
467 01:43:00.186728 prev_sleep_state 5
468 01:43:00.190245 Abort disabling TXT, as CPU is not TXT capable.
469 01:43:00.198036 cse_lite: Number of partitions = 3
470 01:43:00.201294 cse_lite: Current partition = RW
471 01:43:00.201727 cse_lite: Next partition = RW
472 01:43:00.204247 cse_lite: Flags = 0x7
473 01:43:00.210958 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
474 01:43:00.220777 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
475 01:43:00.224647 FMAP: area SI_ME found @ 1000 (5238784 bytes)
476 01:43:00.230988 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
477 01:43:00.237510 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
478 01:43:00.243895 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
479 01:43:00.247443 cse_lite: CSE CBFS RW version : 16.1.25.2049
480 01:43:00.250902 Boot Count incremented to 15265
481 01:43:00.257502 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
482 01:43:00.263999 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
483 01:43:00.277683 Probing TPM I2C: done! DID_VID 0x00281ae0
484 01:43:00.280895 Locality already claimed
485 01:43:00.283623 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
486 01:43:00.303544 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
487 01:43:00.310265 MRC: Hash idx 0x100d comparison successful.
488 01:43:00.313466 MRC cache found, size f6c8
489 01:43:00.313887 bootmode is set to: 2
490 01:43:00.316831 EC returned error result code 3
491 01:43:00.320042 FW_CONFIG value from CBI is 0x131
492 01:43:00.326748 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
493 01:43:00.330505 SPD index = 0
494 01:43:00.336958 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
495 01:43:00.337448 SPD: module type is LPDDR4X
496 01:43:00.344104 SPD: module part number is K4U6E3S4AB-MGCL
497 01:43:00.350476 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
498 01:43:00.353634 SPD: device width 16 bits, bus width 16 bits
499 01:43:00.357036 SPD: module size is 1024 MB (per channel)
500 01:43:00.426153 CBMEM:
501 01:43:00.429535 IMD: root @ 0x76fff000 254 entries.
502 01:43:00.433144 IMD: root @ 0x76ffec00 62 entries.
503 01:43:00.440886 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
504 01:43:00.443947 RO_VPD is uninitialized or empty.
505 01:43:00.447743 FMAP: area RW_VPD found @ f29000 (8192 bytes)
506 01:43:00.454502 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
507 01:43:00.457288 External stage cache:
508 01:43:00.460743 IMD: root @ 0x7bbff000 254 entries.
509 01:43:00.463984 IMD: root @ 0x7bbfec00 62 entries.
510 01:43:00.470788 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
511 01:43:00.477697 MRC: Checking cached data update for 'RW_MRC_CACHE'.
512 01:43:00.480741 MRC: 'RW_MRC_CACHE' does not need update.
513 01:43:00.481259 8 DIMMs found
514 01:43:00.483900 SMM Memory Map
515 01:43:00.487235 SMRAM : 0x7b800000 0x800000
516 01:43:00.490847 Subregion 0: 0x7b800000 0x200000
517 01:43:00.494133 Subregion 1: 0x7ba00000 0x200000
518 01:43:00.497248 Subregion 2: 0x7bc00000 0x400000
519 01:43:00.500775 top_of_ram = 0x77000000
520 01:43:00.504020 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
521 01:43:00.510497 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
522 01:43:00.517147 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
523 01:43:00.520353 MTRR Range: Start=ff000000 End=0 (Size 1000000)
524 01:43:00.520685 Normal boot
525 01:43:00.530485 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
526 01:43:00.536966 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
527 01:43:00.543230 Processing 237 relocs. Offset value of 0x74ab9000
528 01:43:00.551814 BS: romstage times (exec / console): total (unknown) / 377 ms
529 01:43:00.559382
530 01:43:00.559653
531 01:43:00.566457 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
532 01:43:00.566692 Normal boot
533 01:43:00.572253 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
534 01:43:00.579210 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
535 01:43:00.585751 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
536 01:43:00.595860 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
537 01:43:00.644000 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
538 01:43:00.650774 Processing 5931 relocs. Offset value of 0x72a2f000
539 01:43:00.654327 BS: postcar times (exec / console): total (unknown) / 51 ms
540 01:43:00.657437
541 01:43:00.657956
542 01:43:00.664349 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
543 01:43:00.667352 Reserving BERT start 76a1e000, size 10000
544 01:43:00.670723 Normal boot
545 01:43:00.674022 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
546 01:43:00.681022 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
547 01:43:00.690847 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
548 01:43:00.693610 FMAP: area RW_VPD found @ f29000 (8192 bytes)
549 01:43:00.697599 Google Chrome EC: version:
550 01:43:00.700763 ro: volmar_v2.0.14126-e605144e9c
551 01:43:00.703907 rw: volmar_v0.0.55-22d1557
552 01:43:00.707293 running image: 2
553 01:43:00.712113 ACPI _SWS is PM1 Index 8 GPE Index -1
554 01:43:00.714619 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
555 01:43:00.718712 EC returned error result code 3
556 01:43:00.722009 FW_CONFIG value from CBI is 0x131
557 01:43:00.728491 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
558 01:43:00.731652 PCI: 00:1c.2 disabled by fw_config
559 01:43:00.738734 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 01:43:00.741635 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
561 01:43:00.748260 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
562 01:43:00.751957 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
563 01:43:00.758548 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
564 01:43:00.764934 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
565 01:43:00.771647 microcode: sig=0x906a4 pf=0x80 revision=0x423
566 01:43:00.774875 microcode: Update skipped, already up-to-date
567 01:43:00.781832 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
568 01:43:00.814364 Detected 6 core, 8 thread CPU.
569 01:43:00.817776 Setting up SMI for CPU
570 01:43:00.821331 IED base = 0x7bc00000
571 01:43:00.821828 IED size = 0x00400000
572 01:43:00.824145 Will perform SMM setup.
573 01:43:00.827884 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
574 01:43:00.831342 LAPIC 0x0 in XAPIC mode.
575 01:43:00.840982 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
576 01:43:00.844255 Processing 18 relocs. Offset value of 0x00030000
577 01:43:00.849163 Attempting to start 7 APs
578 01:43:00.852034 Waiting for 10ms after sending INIT.
579 01:43:00.865318 Waiting for SIPI to complete...
580 01:43:00.868651 LAPIC 0x1 in XAPIC mode.
581 01:43:00.872250 LAPIC 0x12 in XAPIC mode.
582 01:43:00.875663 AP: slot 7 apic_id 1, MCU rev: 0x00000423
583 01:43:00.878204 LAPIC 0x16 in XAPIC mode.
584 01:43:00.878632 done.
585 01:43:00.881843 LAPIC 0x14 in XAPIC mode.
586 01:43:00.885084 LAPIC 0x10 in XAPIC mode.
587 01:43:00.888386 Waiting for SIPI to complete...
588 01:43:00.888910 done.
589 01:43:00.891567 AP: slot 1 apic_id 12, MCU rev: 0x00000423
590 01:43:00.898729 AP: slot 2 apic_id 14, MCU rev: 0x00000423
591 01:43:00.899225 LAPIC 0x8 in XAPIC mode.
592 01:43:00.904747 AP: slot 4 apic_id 10, MCU rev: 0x00000423
593 01:43:00.908340 AP: slot 3 apic_id 16, MCU rev: 0x00000423
594 01:43:00.912048 LAPIC 0x9 in XAPIC mode.
595 01:43:00.915033 AP: slot 6 apic_id 8, MCU rev: 0x00000423
596 01:43:00.918741 AP: slot 5 apic_id 9, MCU rev: 0x00000423
597 01:43:00.921833 smm_setup_relocation_handler: enter
598 01:43:00.925085 smm_setup_relocation_handler: exit
599 01:43:00.935027 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
600 01:43:00.938604 Processing 11 relocs. Offset value of 0x00038000
601 01:43:00.945003 smm_module_setup_stub: stack_top = 0x7b804000
602 01:43:00.947955 smm_module_setup_stub: per cpu stack_size = 0x800
603 01:43:00.954699 smm_module_setup_stub: runtime.start32_offset = 0x4c
604 01:43:00.958329 smm_module_setup_stub: runtime.smm_size = 0x10000
605 01:43:00.964650 SMM Module: stub loaded at 38000. Will call 0x76a52094
606 01:43:00.968615 Installing permanent SMM handler to 0x7b800000
607 01:43:00.974902 smm_load_module: total_smm_space_needed e468, available -> 200000
608 01:43:00.984590 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
609 01:43:00.988177 Processing 255 relocs. Offset value of 0x7b9f6000
610 01:43:00.994617 smm_load_module: smram_start: 0x7b800000
611 01:43:00.997714 smm_load_module: smram_end: 7ba00000
612 01:43:01.001182 smm_load_module: handler start 0x7b9f6d5f
613 01:43:01.004717 smm_load_module: handler_size 98d0
614 01:43:01.007847 smm_load_module: fxsave_area 0x7b9ff000
615 01:43:01.011174 smm_load_module: fxsave_size 1000
616 01:43:01.014567 smm_load_module: CONFIG_MSEG_SIZE 0x0
617 01:43:01.021113 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
618 01:43:01.027789 smm_load_module: handler_mod_params.smbase = 0x7b800000
619 01:43:01.031596 smm_load_module: per_cpu_save_state_size = 0x400
620 01:43:01.034382 smm_load_module: num_cpus = 0x8
621 01:43:01.041055 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
622 01:43:01.044669 smm_load_module: total_save_state_size = 0x2000
623 01:43:01.047863 smm_load_module: cpu0 entry: 7b9e6000
624 01:43:01.054433 smm_create_map: cpus allowed in one segment 30
625 01:43:01.058177 smm_create_map: min # of segments needed 1
626 01:43:01.058350 CPU 0x0
627 01:43:01.064102 smbase 7b9e6000 entry 7b9ee000
628 01:43:01.067628 ss_start 7b9f5c00 code_end 7b9ee208
629 01:43:01.067811 CPU 0x1
630 01:43:01.070868 smbase 7b9e5c00 entry 7b9edc00
631 01:43:01.077459 ss_start 7b9f5800 code_end 7b9ede08
632 01:43:01.077665 CPU 0x2
633 01:43:01.080931 smbase 7b9e5800 entry 7b9ed800
634 01:43:01.087623 ss_start 7b9f5400 code_end 7b9eda08
635 01:43:01.087833 CPU 0x3
636 01:43:01.090894 smbase 7b9e5400 entry 7b9ed400
637 01:43:01.094214 ss_start 7b9f5000 code_end 7b9ed608
638 01:43:01.097592 CPU 0x4
639 01:43:01.100521 smbase 7b9e5000 entry 7b9ed000
640 01:43:01.104322 ss_start 7b9f4c00 code_end 7b9ed208
641 01:43:01.104748 CPU 0x5
642 01:43:01.110747 smbase 7b9e4c00 entry 7b9ecc00
643 01:43:01.114147 ss_start 7b9f4800 code_end 7b9ece08
644 01:43:01.114584 CPU 0x6
645 01:43:01.117437 smbase 7b9e4800 entry 7b9ec800
646 01:43:01.124125 ss_start 7b9f4400 code_end 7b9eca08
647 01:43:01.124592 CPU 0x7
648 01:43:01.127340 smbase 7b9e4400 entry 7b9ec400
649 01:43:01.134217 ss_start 7b9f4000 code_end 7b9ec608
650 01:43:01.141097 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
651 01:43:01.144179 Processing 11 relocs. Offset value of 0x7b9ee000
652 01:43:01.150496 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
653 01:43:01.157334 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
654 01:43:01.163924 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
655 01:43:01.170332 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
656 01:43:01.177499 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
657 01:43:01.183999 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
658 01:43:01.190739 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
659 01:43:01.193872 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
660 01:43:01.200658 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
661 01:43:01.206811 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
662 01:43:01.213910 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
663 01:43:01.220209 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
664 01:43:01.226780 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
665 01:43:01.233659 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
666 01:43:01.240202 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
667 01:43:01.243325 smm_module_setup_stub: stack_top = 0x7b804000
668 01:43:01.250412 smm_module_setup_stub: per cpu stack_size = 0x800
669 01:43:01.253443 smm_module_setup_stub: runtime.start32_offset = 0x4c
670 01:43:01.259917 smm_module_setup_stub: runtime.smm_size = 0x200000
671 01:43:01.266694 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
672 01:43:01.269721 Clearing SMI status registers
673 01:43:01.273562 SMI_STS: PM1
674 01:43:01.274087 PM1_STS: WAK PWRBTN
675 01:43:01.279900 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
676 01:43:01.283239 In relocation handler: CPU 0
677 01:43:01.286445 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
678 01:43:01.293395 Writing SMRR. base = 0x7b800006, mask=0xff800c00
679 01:43:01.296762 Relocation complete.
680 01:43:01.303604 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
681 01:43:01.306602 In relocation handler: CPU 7
682 01:43:01.310097 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
683 01:43:01.312965 Relocation complete.
684 01:43:01.320112 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
685 01:43:01.323056 In relocation handler: CPU 4
686 01:43:01.326804 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
687 01:43:01.329639 Writing SMRR. base = 0x7b800006, mask=0xff800c00
688 01:43:01.332970 Relocation complete.
689 01:43:01.339877 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
690 01:43:01.343227 In relocation handler: CPU 3
691 01:43:01.346459 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
692 01:43:01.352861 Writing SMRR. base = 0x7b800006, mask=0xff800c00
693 01:43:01.353292 Relocation complete.
694 01:43:01.359532 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
695 01:43:01.363478 In relocation handler: CPU 2
696 01:43:01.369376 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
697 01:43:01.372980 Writing SMRR. base = 0x7b800006, mask=0xff800c00
698 01:43:01.376742 Relocation complete.
699 01:43:01.382960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
700 01:43:01.386369 In relocation handler: CPU 1
701 01:43:01.389400 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
702 01:43:01.392825 Writing SMRR. base = 0x7b800006, mask=0xff800c00
703 01:43:01.396597 Relocation complete.
704 01:43:01.403079 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
705 01:43:01.406127 In relocation handler: CPU 6
706 01:43:01.409368 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
707 01:43:01.416009 Writing SMRR. base = 0x7b800006, mask=0xff800c00
708 01:43:01.416566 Relocation complete.
709 01:43:01.426581 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
710 01:43:01.427120 In relocation handler: CPU 5
711 01:43:01.432770 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
712 01:43:01.433271 Relocation complete.
713 01:43:01.436615 Initializing CPU #0
714 01:43:01.439521 CPU: vendor Intel device 906a4
715 01:43:01.442882 CPU: family 06, model 9a, stepping 04
716 01:43:01.446539 Clearing out pending MCEs
717 01:43:01.449583 cpu: energy policy set to 7
718 01:43:01.453147 Turbo is available but hidden
719 01:43:01.456040 Turbo is available and visible
720 01:43:01.459300 microcode: Update skipped, already up-to-date
721 01:43:01.462465 CPU #0 initialized
722 01:43:01.462934 Initializing CPU #7
723 01:43:01.465870 Initializing CPU #3
724 01:43:01.466336 Initializing CPU #2
725 01:43:01.469506 Initializing CPU #1
726 01:43:01.472772 CPU: vendor Intel device 906a4
727 01:43:01.476043 CPU: family 06, model 9a, stepping 04
728 01:43:01.479423 CPU: vendor Intel device 906a4
729 01:43:01.482422 CPU: family 06, model 9a, stepping 04
730 01:43:01.485677 CPU: vendor Intel device 906a4
731 01:43:01.489415 CPU: family 06, model 9a, stepping 04
732 01:43:01.492411 Clearing out pending MCEs
733 01:43:01.495944 Initializing CPU #4
734 01:43:01.496368 Initializing CPU #5
735 01:43:01.499208 cpu: energy policy set to 7
736 01:43:01.502542 Clearing out pending MCEs
737 01:43:01.505921 CPU: vendor Intel device 906a4
738 01:43:01.509237 CPU: family 06, model 9a, stepping 04
739 01:43:01.512583 Clearing out pending MCEs
740 01:43:01.515969 cpu: energy policy set to 7
741 01:43:01.519247 microcode: Update skipped, already up-to-date
742 01:43:01.522472 CPU #3 initialized
743 01:43:01.525368 Clearing out pending MCEs
744 01:43:01.528832 microcode: Update skipped, already up-to-date
745 01:43:01.532633 CPU #2 initialized
746 01:43:01.533124 cpu: energy policy set to 7
747 01:43:01.536068 cpu: energy policy set to 7
748 01:43:01.542377 microcode: Update skipped, already up-to-date
749 01:43:01.542854 CPU #4 initialized
750 01:43:01.549002 microcode: Update skipped, already up-to-date
751 01:43:01.549427 CPU #1 initialized
752 01:43:01.552234 Initializing CPU #6
753 01:43:01.555970 CPU: vendor Intel device 906a4
754 01:43:01.559021 CPU: family 06, model 9a, stepping 04
755 01:43:01.562185 CPU: vendor Intel device 906a4
756 01:43:01.565497 CPU: family 06, model 9a, stepping 04
757 01:43:01.568924 CPU: vendor Intel device 906a4
758 01:43:01.572139 CPU: family 06, model 9a, stepping 04
759 01:43:01.575449 Clearing out pending MCEs
760 01:43:01.578699 Clearing out pending MCEs
761 01:43:01.579191 cpu: energy policy set to 7
762 01:43:01.581965 cpu: energy policy set to 7
763 01:43:01.585297 Clearing out pending MCEs
764 01:43:01.591642 microcode: Update skipped, already up-to-date
765 01:43:01.592067 CPU #6 initialized
766 01:43:01.598582 microcode: Update skipped, already up-to-date
767 01:43:01.599071 CPU #5 initialized
768 01:43:01.601563 cpu: energy policy set to 7
769 01:43:01.605003 microcode: Update skipped, already up-to-date
770 01:43:01.608421 CPU #7 initialized
771 01:43:01.611920 bsp_do_flight_plan done after 719 msecs.
772 01:43:01.615075 CPU: frequency set to 4400 MHz
773 01:43:01.618523 Enabling SMIs.
774 01:43:01.625118 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
775 01:43:01.639394 Probing TPM I2C: done! DID_VID 0x00281ae0
776 01:43:01.643138 Locality already claimed
777 01:43:01.646085 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
778 01:43:01.657793 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
779 01:43:01.661289 Enabling GPIO PM b/c CR50 has long IRQ pulse support
780 01:43:01.667853 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
781 01:43:01.674429 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
782 01:43:01.677255 Found a VBT of 9216 bytes after decompression
783 01:43:01.680868 PCI 1.0, PIN A, using IRQ #16
784 01:43:01.684178 PCI 2.0, PIN A, using IRQ #17
785 01:43:01.687443 PCI 4.0, PIN A, using IRQ #18
786 01:43:01.691189 PCI 5.0, PIN A, using IRQ #16
787 01:43:01.694261 PCI 6.0, PIN A, using IRQ #16
788 01:43:01.697553 PCI 6.2, PIN C, using IRQ #18
789 01:43:01.700833 PCI 7.0, PIN A, using IRQ #19
790 01:43:01.704190 PCI 7.1, PIN B, using IRQ #20
791 01:43:01.707197 PCI 7.2, PIN C, using IRQ #21
792 01:43:01.711029 PCI 7.3, PIN D, using IRQ #22
793 01:43:01.714197 PCI 8.0, PIN A, using IRQ #23
794 01:43:01.717406 PCI D.0, PIN A, using IRQ #17
795 01:43:01.720949 PCI D.1, PIN B, using IRQ #19
796 01:43:01.721387 PCI 10.0, PIN A, using IRQ #24
797 01:43:01.723819 PCI 10.1, PIN B, using IRQ #25
798 01:43:01.727677 PCI 10.6, PIN C, using IRQ #20
799 01:43:01.730856 PCI 10.7, PIN D, using IRQ #21
800 01:43:01.734098 PCI 11.0, PIN A, using IRQ #26
801 01:43:01.737645 PCI 11.1, PIN B, using IRQ #27
802 01:43:01.740846 PCI 11.2, PIN C, using IRQ #28
803 01:43:01.743895 PCI 11.3, PIN D, using IRQ #29
804 01:43:01.747417 PCI 12.0, PIN A, using IRQ #30
805 01:43:01.750819 PCI 12.6, PIN B, using IRQ #31
806 01:43:01.754150 PCI 12.7, PIN C, using IRQ #22
807 01:43:01.757206 PCI 13.0, PIN A, using IRQ #32
808 01:43:01.760943 PCI 13.1, PIN B, using IRQ #33
809 01:43:01.763949 PCI 13.2, PIN C, using IRQ #34
810 01:43:01.767324 PCI 13.3, PIN D, using IRQ #35
811 01:43:01.770811 PCI 14.0, PIN B, using IRQ #23
812 01:43:01.773941 PCI 14.1, PIN A, using IRQ #36
813 01:43:01.774465 PCI 14.3, PIN C, using IRQ #17
814 01:43:01.777437 PCI 15.0, PIN A, using IRQ #37
815 01:43:01.780543 PCI 15.1, PIN B, using IRQ #38
816 01:43:01.784023 PCI 15.2, PIN C, using IRQ #39
817 01:43:01.786765 PCI 15.3, PIN D, using IRQ #40
818 01:43:01.790659 PCI 16.0, PIN A, using IRQ #18
819 01:43:01.793890 PCI 16.1, PIN B, using IRQ #19
820 01:43:01.797053 PCI 16.2, PIN C, using IRQ #20
821 01:43:01.800246 PCI 16.3, PIN D, using IRQ #21
822 01:43:01.803532 PCI 16.4, PIN A, using IRQ #18
823 01:43:01.806942 PCI 16.5, PIN B, using IRQ #19
824 01:43:01.810016 PCI 17.0, PIN A, using IRQ #22
825 01:43:01.813728 PCI 19.0, PIN A, using IRQ #41
826 01:43:01.816766 PCI 19.1, PIN B, using IRQ #42
827 01:43:01.820122 PCI 19.2, PIN C, using IRQ #43
828 01:43:01.823200 PCI 1C.0, PIN A, using IRQ #16
829 01:43:01.827203 PCI 1C.1, PIN B, using IRQ #17
830 01:43:01.830132 PCI 1C.2, PIN C, using IRQ #18
831 01:43:01.830673 PCI 1C.3, PIN D, using IRQ #19
832 01:43:01.833303 PCI 1C.4, PIN A, using IRQ #16
833 01:43:01.836912 PCI 1C.5, PIN B, using IRQ #17
834 01:43:01.840379 PCI 1C.6, PIN C, using IRQ #18
835 01:43:01.843671 PCI 1C.7, PIN D, using IRQ #19
836 01:43:01.846881 PCI 1D.0, PIN A, using IRQ #16
837 01:43:01.850098 PCI 1D.1, PIN B, using IRQ #17
838 01:43:01.853345 PCI 1D.2, PIN C, using IRQ #18
839 01:43:01.857014 PCI 1D.3, PIN D, using IRQ #19
840 01:43:01.859666 PCI 1E.0, PIN A, using IRQ #23
841 01:43:01.863329 PCI 1E.1, PIN B, using IRQ #20
842 01:43:01.866741 PCI 1E.2, PIN C, using IRQ #44
843 01:43:01.869705 PCI 1E.3, PIN D, using IRQ #45
844 01:43:01.873140 PCI 1F.3, PIN B, using IRQ #22
845 01:43:01.876618 PCI 1F.4, PIN C, using IRQ #23
846 01:43:01.879914 PCI 1F.6, PIN D, using IRQ #20
847 01:43:01.882738 PCI 1F.7, PIN A, using IRQ #21
848 01:43:01.886472 IRQ: Using dynamically assigned PCI IO-APIC IRQs
849 01:43:01.893029 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
850 01:43:02.073160 FSPS returned 0
851 01:43:02.076446 Executing Phase 1 of FspMultiPhaseSiInit
852 01:43:02.086402 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
853 01:43:02.089327 port C0 DISC req: usage 1 usb3 1 usb2 1
854 01:43:02.093461 Raw Buffer output 0 00000111
855 01:43:02.096762 Raw Buffer output 1 00000000
856 01:43:02.100615 pmc_send_ipc_cmd succeeded
857 01:43:02.106793 port C1 DISC req: usage 1 usb3 3 usb2 3
858 01:43:02.107367 Raw Buffer output 0 00000331
859 01:43:02.110103 Raw Buffer output 1 00000000
860 01:43:02.113898 pmc_send_ipc_cmd succeeded
861 01:43:02.118586 Detected 6 core, 8 thread CPU.
862 01:43:02.121640 Detected 6 core, 8 thread CPU.
863 01:43:02.127044 Detected 6 core, 8 thread CPU.
864 01:43:02.129933 Detected 6 core, 8 thread CPU.
865 01:43:02.132979 Detected 6 core, 8 thread CPU.
866 01:43:02.136698 Detected 6 core, 8 thread CPU.
867 01:43:02.139653 Detected 6 core, 8 thread CPU.
868 01:43:02.143326 Detected 6 core, 8 thread CPU.
869 01:43:02.146426 Detected 6 core, 8 thread CPU.
870 01:43:02.149688 Detected 6 core, 8 thread CPU.
871 01:43:02.152953 Detected 6 core, 8 thread CPU.
872 01:43:02.156809 Detected 6 core, 8 thread CPU.
873 01:43:02.160324 Detected 6 core, 8 thread CPU.
874 01:43:02.163556 Detected 6 core, 8 thread CPU.
875 01:43:02.167117 Detected 6 core, 8 thread CPU.
876 01:43:02.170229 Detected 6 core, 8 thread CPU.
877 01:43:02.173395 Detected 6 core, 8 thread CPU.
878 01:43:02.177114 Detected 6 core, 8 thread CPU.
879 01:43:02.180246 Detected 6 core, 8 thread CPU.
880 01:43:02.183732 Detected 6 core, 8 thread CPU.
881 01:43:02.186371 Detected 6 core, 8 thread CPU.
882 01:43:02.186832 Detected 6 core, 8 thread CPU.
883 01:43:02.469592 Detected 6 core, 8 thread CPU.
884 01:43:02.472687 Detected 6 core, 8 thread CPU.
885 01:43:02.475803 Detected 6 core, 8 thread CPU.
886 01:43:02.479578 Detected 6 core, 8 thread CPU.
887 01:43:02.482715 Detected 6 core, 8 thread CPU.
888 01:43:02.485916 Detected 6 core, 8 thread CPU.
889 01:43:02.489007 Detected 6 core, 8 thread CPU.
890 01:43:02.492688 Detected 6 core, 8 thread CPU.
891 01:43:02.495903 Detected 6 core, 8 thread CPU.
892 01:43:02.499659 Detected 6 core, 8 thread CPU.
893 01:43:02.502885 Detected 6 core, 8 thread CPU.
894 01:43:02.506206 Detected 6 core, 8 thread CPU.
895 01:43:02.509303 Detected 6 core, 8 thread CPU.
896 01:43:02.512715 Detected 6 core, 8 thread CPU.
897 01:43:02.516074 Detected 6 core, 8 thread CPU.
898 01:43:02.519631 Detected 6 core, 8 thread CPU.
899 01:43:02.522652 Detected 6 core, 8 thread CPU.
900 01:43:02.525787 Detected 6 core, 8 thread CPU.
901 01:43:02.529391 Detected 6 core, 8 thread CPU.
902 01:43:02.532751 Detected 6 core, 8 thread CPU.
903 01:43:02.535663 Display FSP Version Info HOB
904 01:43:02.539072 Reference Code - CPU = c.0.65.70
905 01:43:02.539525 uCode Version = 0.0.4.23
906 01:43:02.542560 TXT ACM version = ff.ff.ff.ffff
907 01:43:02.545930 Reference Code - ME = c.0.65.70
908 01:43:02.549263 MEBx version = 0.0.0.0
909 01:43:02.552327 ME Firmware Version = Lite SKU
910 01:43:02.555893 Reference Code - PCH = c.0.65.70
911 01:43:02.559090 PCH-CRID Status = Disabled
912 01:43:02.562444 PCH-CRID Original Value = ff.ff.ff.ffff
913 01:43:02.565465 PCH-CRID New Value = ff.ff.ff.ffff
914 01:43:02.569369 OPROM - RST - RAID = ff.ff.ff.ffff
915 01:43:02.572720 PCH Hsio Version = 4.0.0.0
916 01:43:02.575725 Reference Code - SA - System Agent = c.0.65.70
917 01:43:02.579105 Reference Code - MRC = 0.0.3.80
918 01:43:02.582178 SA - PCIe Version = c.0.65.70
919 01:43:02.585672 SA-CRID Status = Disabled
920 01:43:02.588922 SA-CRID Original Value = 0.0.0.4
921 01:43:02.592343 SA-CRID New Value = 0.0.0.4
922 01:43:02.595459 OPROM - VBIOS = ff.ff.ff.ffff
923 01:43:02.598978 IO Manageability Engine FW Version = 24.0.4.0
924 01:43:02.602025 PHY Build Version = 0.0.0.2016
925 01:43:02.605493 Thunderbolt(TM) FW Version = 0.0.0.0
926 01:43:02.612118 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
927 01:43:02.618577 BS: BS_DEV_INIT_CHIPS run times (exec / console): 480 / 507 ms
928 01:43:02.621961 Enumerating buses...
929 01:43:02.625159 Show all devs... Before device enumeration.
930 01:43:02.628184 Root Device: enabled 1
931 01:43:02.631896 CPU_CLUSTER: 0: enabled 1
932 01:43:02.632414 DOMAIN: 0000: enabled 1
933 01:43:02.635116 GPIO: 0: enabled 1
934 01:43:02.638714 PCI: 00:00.0: enabled 1
935 01:43:02.639235 PCI: 00:01.0: enabled 0
936 01:43:02.641518 PCI: 00:01.1: enabled 0
937 01:43:02.644954 PCI: 00:02.0: enabled 1
938 01:43:02.648375 PCI: 00:04.0: enabled 1
939 01:43:02.648826 PCI: 00:05.0: enabled 0
940 01:43:02.652050 PCI: 00:06.0: enabled 1
941 01:43:02.655013 PCI: 00:06.2: enabled 0
942 01:43:02.655532 PCI: 00:07.0: enabled 0
943 01:43:02.658418 PCI: 00:07.1: enabled 0
944 01:43:02.661578 PCI: 00:07.2: enabled 0
945 01:43:02.665045 PCI: 00:07.3: enabled 0
946 01:43:02.665567 PCI: 00:08.0: enabled 0
947 01:43:02.668615 PCI: 00:09.0: enabled 0
948 01:43:02.671515 PCI: 00:0a.0: enabled 1
949 01:43:02.675201 PCI: 00:0d.0: enabled 1
950 01:43:02.675719 PCI: 00:0d.1: enabled 0
951 01:43:02.678631 PCI: 00:0d.2: enabled 0
952 01:43:02.681718 PCI: 00:0d.3: enabled 0
953 01:43:02.684954 PCI: 00:0e.0: enabled 0
954 01:43:02.685476 PCI: 00:10.0: enabled 0
955 01:43:02.688040 PCI: 00:10.1: enabled 0
956 01:43:02.691415 PCI: 00:10.6: enabled 0
957 01:43:02.694561 PCI: 00:10.7: enabled 0
958 01:43:02.694981 PCI: 00:12.0: enabled 0
959 01:43:02.698339 PCI: 00:12.6: enabled 0
960 01:43:02.701589 PCI: 00:12.7: enabled 0
961 01:43:02.704871 PCI: 00:13.0: enabled 0
962 01:43:02.705393 PCI: 00:14.0: enabled 1
963 01:43:02.707996 PCI: 00:14.1: enabled 0
964 01:43:02.711415 PCI: 00:14.2: enabled 1
965 01:43:02.711937 PCI: 00:14.3: enabled 1
966 01:43:02.714736 PCI: 00:15.0: enabled 1
967 01:43:02.718313 PCI: 00:15.1: enabled 1
968 01:43:02.721406 PCI: 00:15.2: enabled 0
969 01:43:02.721825 PCI: 00:15.3: enabled 1
970 01:43:02.724278 PCI: 00:16.0: enabled 1
971 01:43:02.727915 PCI: 00:16.1: enabled 0
972 01:43:02.731474 PCI: 00:16.2: enabled 0
973 01:43:02.731968 PCI: 00:16.3: enabled 0
974 01:43:02.734438 PCI: 00:16.4: enabled 0
975 01:43:02.737958 PCI: 00:16.5: enabled 0
976 01:43:02.741747 PCI: 00:17.0: enabled 1
977 01:43:02.742270 PCI: 00:19.0: enabled 0
978 01:43:02.744735 PCI: 00:19.1: enabled 1
979 01:43:02.748078 PCI: 00:19.2: enabled 0
980 01:43:02.748640 PCI: 00:1a.0: enabled 0
981 01:43:02.751548 PCI: 00:1c.0: enabled 0
982 01:43:02.754950 PCI: 00:1c.1: enabled 0
983 01:43:02.758308 PCI: 00:1c.2: enabled 0
984 01:43:02.758831 PCI: 00:1c.3: enabled 0
985 01:43:02.760900 PCI: 00:1c.4: enabled 0
986 01:43:02.764587 PCI: 00:1c.5: enabled 0
987 01:43:02.767570 PCI: 00:1c.6: enabled 0
988 01:43:02.768094 PCI: 00:1c.7: enabled 0
989 01:43:02.771246 PCI: 00:1d.0: enabled 0
990 01:43:02.774416 PCI: 00:1d.1: enabled 0
991 01:43:02.778138 PCI: 00:1d.2: enabled 0
992 01:43:02.778656 PCI: 00:1d.3: enabled 0
993 01:43:02.781159 PCI: 00:1e.0: enabled 1
994 01:43:02.784421 PCI: 00:1e.1: enabled 0
995 01:43:02.787816 PCI: 00:1e.2: enabled 0
996 01:43:02.788257 PCI: 00:1e.3: enabled 1
997 01:43:02.790763 PCI: 00:1f.0: enabled 1
998 01:43:02.793935 PCI: 00:1f.1: enabled 0
999 01:43:02.797776 PCI: 00:1f.2: enabled 1
1000 01:43:02.798299 PCI: 00:1f.3: enabled 1
1001 01:43:02.800988 PCI: 00:1f.4: enabled 0
1002 01:43:02.804424 PCI: 00:1f.5: enabled 1
1003 01:43:02.807470 PCI: 00:1f.6: enabled 0
1004 01:43:02.808013 PCI: 00:1f.7: enabled 0
1005 01:43:02.811149 GENERIC: 0.0: enabled 1
1006 01:43:02.813875 GENERIC: 0.0: enabled 1
1007 01:43:02.814294 GENERIC: 1.0: enabled 1
1008 01:43:02.817154 GENERIC: 0.0: enabled 1
1009 01:43:02.820634 GENERIC: 1.0: enabled 1
1010 01:43:02.823788 USB0 port 0: enabled 1
1011 01:43:02.824308 USB0 port 0: enabled 1
1012 01:43:02.827382 GENERIC: 0.0: enabled 1
1013 01:43:02.831030 I2C: 00:1a: enabled 1
1014 01:43:02.831546 I2C: 00:31: enabled 1
1015 01:43:02.833928 I2C: 00:32: enabled 1
1016 01:43:02.837080 I2C: 00:50: enabled 1
1017 01:43:02.837600 I2C: 00:10: enabled 1
1018 01:43:02.840627 I2C: 00:15: enabled 1
1019 01:43:02.843930 I2C: 00:2c: enabled 1
1020 01:43:02.847318 GENERIC: 0.0: enabled 1
1021 01:43:02.847837 SPI: 00: enabled 1
1022 01:43:02.850691 PNP: 0c09.0: enabled 1
1023 01:43:02.853872 GENERIC: 0.0: enabled 1
1024 01:43:02.854395 USB3 port 0: enabled 1
1025 01:43:02.857481 USB3 port 1: enabled 0
1026 01:43:02.860750 USB3 port 2: enabled 1
1027 01:43:02.861265 USB3 port 3: enabled 0
1028 01:43:02.864006 USB2 port 0: enabled 1
1029 01:43:02.867556 USB2 port 1: enabled 0
1030 01:43:02.870439 USB2 port 2: enabled 1
1031 01:43:02.870853 USB2 port 3: enabled 0
1032 01:43:02.873429 USB2 port 4: enabled 0
1033 01:43:02.877369 USB2 port 5: enabled 1
1034 01:43:02.877915 USB2 port 6: enabled 0
1035 01:43:02.880338 USB2 port 7: enabled 0
1036 01:43:02.883787 USB2 port 8: enabled 1
1037 01:43:02.887185 USB2 port 9: enabled 1
1038 01:43:02.887700 USB3 port 0: enabled 1
1039 01:43:02.890303 USB3 port 1: enabled 0
1040 01:43:02.893574 USB3 port 2: enabled 0
1041 01:43:02.894085 USB3 port 3: enabled 0
1042 01:43:02.897230 GENERIC: 0.0: enabled 1
1043 01:43:02.900219 GENERIC: 1.0: enabled 1
1044 01:43:02.900779 APIC: 00: enabled 1
1045 01:43:02.903751 APIC: 12: enabled 1
1046 01:43:02.907055 APIC: 14: enabled 1
1047 01:43:02.907570 APIC: 16: enabled 1
1048 01:43:02.910197 APIC: 10: enabled 1
1049 01:43:02.913730 APIC: 09: enabled 1
1050 01:43:02.914246 APIC: 08: enabled 1
1051 01:43:02.916734 APIC: 01: enabled 1
1052 01:43:02.917149 Compare with tree...
1053 01:43:02.920035 Root Device: enabled 1
1054 01:43:02.923623 CPU_CLUSTER: 0: enabled 1
1055 01:43:02.926826 APIC: 00: enabled 1
1056 01:43:02.927346 APIC: 12: enabled 1
1057 01:43:02.929979 APIC: 14: enabled 1
1058 01:43:02.933389 APIC: 16: enabled 1
1059 01:43:02.933906 APIC: 10: enabled 1
1060 01:43:02.936846 APIC: 09: enabled 1
1061 01:43:02.940063 APIC: 08: enabled 1
1062 01:43:02.940617 APIC: 01: enabled 1
1063 01:43:02.943012 DOMAIN: 0000: enabled 1
1064 01:43:02.946669 GPIO: 0: enabled 1
1065 01:43:02.949875 PCI: 00:00.0: enabled 1
1066 01:43:02.950386 PCI: 00:01.0: enabled 0
1067 01:43:02.953416 PCI: 00:01.1: enabled 0
1068 01:43:02.956423 PCI: 00:02.0: enabled 1
1069 01:43:02.959515 PCI: 00:04.0: enabled 1
1070 01:43:02.962906 GENERIC: 0.0: enabled 1
1071 01:43:02.963420 PCI: 00:05.0: enabled 0
1072 01:43:02.966296 PCI: 00:06.0: enabled 1
1073 01:43:02.969739 PCI: 00:06.2: enabled 0
1074 01:43:02.972960 PCI: 00:08.0: enabled 0
1075 01:43:02.976259 PCI: 00:09.0: enabled 0
1076 01:43:02.976816 PCI: 00:0a.0: enabled 1
1077 01:43:02.979286 PCI: 00:0d.0: enabled 1
1078 01:43:02.983061 USB0 port 0: enabled 1
1079 01:43:02.986140 USB3 port 0: enabled 1
1080 01:43:02.989368 USB3 port 1: enabled 0
1081 01:43:02.992683 USB3 port 2: enabled 1
1082 01:43:02.993096 USB3 port 3: enabled 0
1083 01:43:02.995893 PCI: 00:0d.1: enabled 0
1084 01:43:02.999561 PCI: 00:0d.2: enabled 0
1085 01:43:03.002820 PCI: 00:0d.3: enabled 0
1086 01:43:03.005940 PCI: 00:0e.0: enabled 0
1087 01:43:03.006425 PCI: 00:10.0: enabled 0
1088 01:43:03.009581 PCI: 00:10.1: enabled 0
1089 01:43:03.012451 PCI: 00:10.6: enabled 0
1090 01:43:03.015893 PCI: 00:10.7: enabled 0
1091 01:43:03.018870 PCI: 00:12.0: enabled 0
1092 01:43:03.019484 PCI: 00:12.6: enabled 0
1093 01:43:03.022339 PCI: 00:12.7: enabled 0
1094 01:43:03.025403 PCI: 00:13.0: enabled 0
1095 01:43:03.028777 PCI: 00:14.0: enabled 1
1096 01:43:03.029192 USB0 port 0: enabled 1
1097 01:43:03.032305 USB2 port 0: enabled 1
1098 01:43:03.035867 USB2 port 1: enabled 0
1099 01:43:03.039042 USB2 port 2: enabled 1
1100 01:43:03.042288 USB2 port 3: enabled 0
1101 01:43:03.045332 USB2 port 4: enabled 0
1102 01:43:03.045412 USB2 port 5: enabled 1
1103 01:43:03.048396 USB2 port 6: enabled 0
1104 01:43:03.052225 USB2 port 7: enabled 0
1105 01:43:03.055253 USB2 port 8: enabled 1
1106 01:43:03.058605 USB2 port 9: enabled 1
1107 01:43:03.061491 USB3 port 0: enabled 1
1108 01:43:03.061572 USB3 port 1: enabled 0
1109 01:43:03.065344 USB3 port 2: enabled 0
1110 01:43:03.068382 USB3 port 3: enabled 0
1111 01:43:03.071745 PCI: 00:14.1: enabled 0
1112 01:43:03.074819 PCI: 00:14.2: enabled 1
1113 01:43:03.074899 PCI: 00:14.3: enabled 1
1114 01:43:03.078462 GENERIC: 0.0: enabled 1
1115 01:43:03.081638 PCI: 00:15.0: enabled 1
1116 01:43:03.084912 I2C: 00:1a: enabled 1
1117 01:43:03.088149 I2C: 00:31: enabled 1
1118 01:43:03.088258 I2C: 00:32: enabled 1
1119 01:43:03.091510 PCI: 00:15.1: enabled 1
1120 01:43:03.094868 I2C: 00:50: enabled 1
1121 01:43:03.098246 PCI: 00:15.2: enabled 0
1122 01:43:03.101448 PCI: 00:15.3: enabled 1
1123 01:43:03.101528 I2C: 00:10: enabled 1
1124 01:43:03.104736 PCI: 00:16.0: enabled 1
1125 01:43:03.108209 PCI: 00:16.1: enabled 0
1126 01:43:03.111452 PCI: 00:16.2: enabled 0
1127 01:43:03.111532 PCI: 00:16.3: enabled 0
1128 01:43:03.114603 PCI: 00:16.4: enabled 0
1129 01:43:03.118130 PCI: 00:16.5: enabled 0
1130 01:43:03.121357 PCI: 00:17.0: enabled 1
1131 01:43:03.124906 PCI: 00:19.0: enabled 0
1132 01:43:03.124986 PCI: 00:19.1: enabled 1
1133 01:43:03.128219 I2C: 00:15: enabled 1
1134 01:43:03.131347 I2C: 00:2c: enabled 1
1135 01:43:03.134938 PCI: 00:19.2: enabled 0
1136 01:43:03.138419 PCI: 00:1a.0: enabled 0
1137 01:43:03.138499 PCI: 00:1e.0: enabled 1
1138 01:43:03.141261 PCI: 00:1e.1: enabled 0
1139 01:43:03.144347 PCI: 00:1e.2: enabled 0
1140 01:43:03.147816 PCI: 00:1e.3: enabled 1
1141 01:43:03.147897 SPI: 00: enabled 1
1142 01:43:03.151409 PCI: 00:1f.0: enabled 1
1143 01:43:03.154607 PNP: 0c09.0: enabled 1
1144 01:43:03.157837 PCI: 00:1f.1: enabled 0
1145 01:43:03.160933 PCI: 00:1f.2: enabled 1
1146 01:43:03.161014 GENERIC: 0.0: enabled 1
1147 01:43:03.164396 GENERIC: 0.0: enabled 1
1148 01:43:03.167553 GENERIC: 1.0: enabled 1
1149 01:43:03.170932 PCI: 00:1f.3: enabled 1
1150 01:43:03.174244 PCI: 00:1f.4: enabled 0
1151 01:43:03.177364 PCI: 00:1f.5: enabled 1
1152 01:43:03.177445 PCI: 00:1f.6: enabled 0
1153 01:43:03.180761 PCI: 00:1f.7: enabled 0
1154 01:43:03.184302 Root Device scanning...
1155 01:43:03.187749 scan_static_bus for Root Device
1156 01:43:03.190478 CPU_CLUSTER: 0 enabled
1157 01:43:03.190558 DOMAIN: 0000 enabled
1158 01:43:03.194278 DOMAIN: 0000 scanning...
1159 01:43:03.197305 PCI: pci_scan_bus for bus 00
1160 01:43:03.200832 PCI: 00:00.0 [8086/0000] ops
1161 01:43:03.203915 PCI: 00:00.0 [8086/4609] enabled
1162 01:43:03.207329 PCI: 00:02.0 [8086/0000] bus ops
1163 01:43:03.210867 PCI: 00:02.0 [8086/46b3] enabled
1164 01:43:03.213943 PCI: 00:04.0 [8086/0000] bus ops
1165 01:43:03.217447 PCI: 00:04.0 [8086/461d] enabled
1166 01:43:03.220725 PCI: 00:06.0 [8086/0000] bus ops
1167 01:43:03.223774 PCI: 00:06.0 [8086/464d] enabled
1168 01:43:03.227337 PCI: 00:08.0 [8086/464f] disabled
1169 01:43:03.230745 PCI: 00:0a.0 [8086/467d] enabled
1170 01:43:03.233819 PCI: 00:0d.0 [8086/0000] bus ops
1171 01:43:03.237303 PCI: 00:0d.0 [8086/461e] enabled
1172 01:43:03.240472 PCI: 00:14.0 [8086/0000] bus ops
1173 01:43:03.243980 PCI: 00:14.0 [8086/51ed] enabled
1174 01:43:03.247438 PCI: 00:14.2 [8086/51ef] enabled
1175 01:43:03.250672 PCI: 00:14.3 [8086/0000] bus ops
1176 01:43:03.253874 PCI: 00:14.3 [8086/51f0] enabled
1177 01:43:03.257149 PCI: 00:15.0 [8086/0000] bus ops
1178 01:43:03.260544 PCI: 00:15.0 [8086/51e8] enabled
1179 01:43:03.264020 PCI: 00:15.1 [8086/0000] bus ops
1180 01:43:03.267258 PCI: 00:15.1 [8086/51e9] enabled
1181 01:43:03.270519 PCI: 00:15.2 [8086/0000] bus ops
1182 01:43:03.273745 PCI: 00:15.2 [8086/51ea] disabled
1183 01:43:03.277078 PCI: 00:15.3 [8086/0000] bus ops
1184 01:43:03.280436 PCI: 00:15.3 [8086/51eb] enabled
1185 01:43:03.283782 PCI: 00:16.0 [8086/0000] ops
1186 01:43:03.287124 PCI: 00:16.0 [8086/51e0] enabled
1187 01:43:03.294164 PCI: Static device PCI: 00:17.0 not found, disabling it.
1188 01:43:03.297431 PCI: 00:19.0 [8086/0000] bus ops
1189 01:43:03.300621 PCI: 00:19.0 [8086/51c5] disabled
1190 01:43:03.303827 PCI: 00:19.1 [8086/0000] bus ops
1191 01:43:03.307004 PCI: 00:19.1 [8086/51c6] enabled
1192 01:43:03.310385 PCI: 00:1e.0 [8086/0000] ops
1193 01:43:03.313711 PCI: 00:1e.0 [8086/51a8] enabled
1194 01:43:03.316967 PCI: 00:1e.3 [8086/0000] bus ops
1195 01:43:03.320416 PCI: 00:1e.3 [8086/51ab] enabled
1196 01:43:03.323833 PCI: 00:1f.0 [8086/0000] bus ops
1197 01:43:03.327141 PCI: 00:1f.0 [8086/5182] enabled
1198 01:43:03.327222 RTC Init
1199 01:43:03.333557 Set power on after power failure.
1200 01:43:03.333638 Disabling Deep S3
1201 01:43:03.336989 Disabling Deep S3
1202 01:43:03.337070 Disabling Deep S4
1203 01:43:03.340261 Disabling Deep S4
1204 01:43:03.340367 Disabling Deep S5
1205 01:43:03.343898 Disabling Deep S5
1206 01:43:03.346777 PCI: 00:1f.2 [0000/0000] hidden
1207 01:43:03.350449 PCI: 00:1f.3 [8086/0000] bus ops
1208 01:43:03.353872 PCI: 00:1f.3 [8086/51c8] enabled
1209 01:43:03.356904 PCI: 00:1f.5 [8086/0000] bus ops
1210 01:43:03.360212 PCI: 00:1f.5 [8086/51a4] enabled
1211 01:43:03.360292 GPIO: 0 enabled
1212 01:43:03.363500 PCI: Leftover static devices:
1213 01:43:03.367226 PCI: 00:01.0
1214 01:43:03.367305 PCI: 00:01.1
1215 01:43:03.370131 PCI: 00:05.0
1216 01:43:03.370211 PCI: 00:06.2
1217 01:43:03.370274 PCI: 00:09.0
1218 01:43:03.373776 PCI: 00:0d.1
1219 01:43:03.373856 PCI: 00:0d.2
1220 01:43:03.377038 PCI: 00:0d.3
1221 01:43:03.377118 PCI: 00:0e.0
1222 01:43:03.377181 PCI: 00:10.0
1223 01:43:03.380441 PCI: 00:10.1
1224 01:43:03.380527 PCI: 00:10.6
1225 01:43:03.384252 PCI: 00:10.7
1226 01:43:03.384357 PCI: 00:12.0
1227 01:43:03.387721 PCI: 00:12.6
1228 01:43:03.387801 PCI: 00:12.7
1229 01:43:03.387864 PCI: 00:13.0
1230 01:43:03.390655 PCI: 00:14.1
1231 01:43:03.390735 PCI: 00:16.1
1232 01:43:03.393614 PCI: 00:16.2
1233 01:43:03.393695 PCI: 00:16.3
1234 01:43:03.393757 PCI: 00:16.4
1235 01:43:03.396812 PCI: 00:16.5
1236 01:43:03.396893 PCI: 00:17.0
1237 01:43:03.400188 PCI: 00:19.2
1238 01:43:03.400268 PCI: 00:1a.0
1239 01:43:03.400330 PCI: 00:1e.1
1240 01:43:03.403496 PCI: 00:1e.2
1241 01:43:03.403577 PCI: 00:1f.1
1242 01:43:03.407041 PCI: 00:1f.4
1243 01:43:03.407127 PCI: 00:1f.6
1244 01:43:03.410277 PCI: 00:1f.7
1245 01:43:03.410357 PCI: Check your devicetree.cb.
1246 01:43:03.413887 PCI: 00:02.0 scanning...
1247 01:43:03.416685 scan_generic_bus for PCI: 00:02.0
1248 01:43:03.420191 scan_generic_bus for PCI: 00:02.0 done
1249 01:43:03.426766 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1250 01:43:03.430069 PCI: 00:04.0 scanning...
1251 01:43:03.433719 scan_generic_bus for PCI: 00:04.0
1252 01:43:03.433813 GENERIC: 0.0 enabled
1253 01:43:03.440411 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1254 01:43:03.446869 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1255 01:43:03.446950 PCI: 00:06.0 scanning...
1256 01:43:03.450596 do_pci_scan_bridge for PCI: 00:06.0
1257 01:43:03.453523 PCI: pci_scan_bus for bus 01
1258 01:43:03.456705 PCI: 01:00.0 [15b7/5009] enabled
1259 01:43:03.460069 Enabling Common Clock Configuration
1260 01:43:03.466885 L1 Sub-State supported from root port 6
1261 01:43:03.466965 L1 Sub-State Support = 0x5
1262 01:43:03.470315 CommonModeRestoreTime = 0x6e
1263 01:43:03.476719 Power On Value = 0x5, Power On Scale = 0x2
1264 01:43:03.476800 ASPM: Enabled L1
1265 01:43:03.480107 PCIe: Max_Payload_Size adjusted to 256
1266 01:43:03.483267 PCI: 01:00.0: Enabled LTR
1267 01:43:03.486568 PCI: 01:00.0: Programmed LTR max latencies
1268 01:43:03.493341 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1269 01:43:03.496580 PCI: 00:0d.0 scanning...
1270 01:43:03.500077 scan_static_bus for PCI: 00:0d.0
1271 01:43:03.500158 USB0 port 0 enabled
1272 01:43:03.503270 USB0 port 0 scanning...
1273 01:43:03.506461 scan_static_bus for USB0 port 0
1274 01:43:03.509872 USB3 port 0 enabled
1275 01:43:03.509952 USB3 port 1 disabled
1276 01:43:03.513250 USB3 port 2 enabled
1277 01:43:03.516588 USB3 port 3 disabled
1278 01:43:03.516669 USB3 port 0 scanning...
1279 01:43:03.519624 scan_static_bus for USB3 port 0
1280 01:43:03.523183 scan_static_bus for USB3 port 0 done
1281 01:43:03.529737 scan_bus: bus USB3 port 0 finished in 6 msecs
1282 01:43:03.529819 USB3 port 2 scanning...
1283 01:43:03.532940 scan_static_bus for USB3 port 2
1284 01:43:03.539702 scan_static_bus for USB3 port 2 done
1285 01:43:03.543100 scan_bus: bus USB3 port 2 finished in 6 msecs
1286 01:43:03.546642 scan_static_bus for USB0 port 0 done
1287 01:43:03.550022 scan_bus: bus USB0 port 0 finished in 43 msecs
1288 01:43:03.556284 scan_static_bus for PCI: 00:0d.0 done
1289 01:43:03.559987 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1290 01:43:03.562866 PCI: 00:14.0 scanning...
1291 01:43:03.566583 scan_static_bus for PCI: 00:14.0
1292 01:43:03.566664 USB0 port 0 enabled
1293 01:43:03.569616 USB0 port 0 scanning...
1294 01:43:03.572861 scan_static_bus for USB0 port 0
1295 01:43:03.576109 USB2 port 0 enabled
1296 01:43:03.576189 USB2 port 1 disabled
1297 01:43:03.579475 USB2 port 2 enabled
1298 01:43:03.582769 USB2 port 3 disabled
1299 01:43:03.582850 USB2 port 4 disabled
1300 01:43:03.586229 USB2 port 5 enabled
1301 01:43:03.589400 USB2 port 6 disabled
1302 01:43:03.589480 USB2 port 7 disabled
1303 01:43:03.592867 USB2 port 8 enabled
1304 01:43:03.592948 USB2 port 9 enabled
1305 01:43:03.596306 USB3 port 0 enabled
1306 01:43:03.599855 USB3 port 1 disabled
1307 01:43:03.599935 USB3 port 2 disabled
1308 01:43:03.602671 USB3 port 3 disabled
1309 01:43:03.606425 USB2 port 0 scanning...
1310 01:43:03.609493 scan_static_bus for USB2 port 0
1311 01:43:03.612773 scan_static_bus for USB2 port 0 done
1312 01:43:03.615950 scan_bus: bus USB2 port 0 finished in 6 msecs
1313 01:43:03.619522 USB2 port 2 scanning...
1314 01:43:03.622912 scan_static_bus for USB2 port 2
1315 01:43:03.626295 scan_static_bus for USB2 port 2 done
1316 01:43:03.629186 scan_bus: bus USB2 port 2 finished in 6 msecs
1317 01:43:03.632594 USB2 port 5 scanning...
1318 01:43:03.635858 scan_static_bus for USB2 port 5
1319 01:43:03.639468 scan_static_bus for USB2 port 5 done
1320 01:43:03.646219 scan_bus: bus USB2 port 5 finished in 6 msecs
1321 01:43:03.646300 USB2 port 8 scanning...
1322 01:43:03.649412 scan_static_bus for USB2 port 8
1323 01:43:03.652725 scan_static_bus for USB2 port 8 done
1324 01:43:03.659340 scan_bus: bus USB2 port 8 finished in 6 msecs
1325 01:43:03.662632 USB2 port 9 scanning...
1326 01:43:03.665710 scan_static_bus for USB2 port 9
1327 01:43:03.669116 scan_static_bus for USB2 port 9 done
1328 01:43:03.672390 scan_bus: bus USB2 port 9 finished in 6 msecs
1329 01:43:03.675663 USB3 port 0 scanning...
1330 01:43:03.679045 scan_static_bus for USB3 port 0
1331 01:43:03.682371 scan_static_bus for USB3 port 0 done
1332 01:43:03.685690 scan_bus: bus USB3 port 0 finished in 6 msecs
1333 01:43:03.689184 scan_static_bus for USB0 port 0 done
1334 01:43:03.695687 scan_bus: bus USB0 port 0 finished in 120 msecs
1335 01:43:03.698987 scan_static_bus for PCI: 00:14.0 done
1336 01:43:03.702188 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1337 01:43:03.705826 PCI: 00:14.3 scanning...
1338 01:43:03.708988 scan_static_bus for PCI: 00:14.3
1339 01:43:03.712146 GENERIC: 0.0 enabled
1340 01:43:03.715412 scan_static_bus for PCI: 00:14.3 done
1341 01:43:03.719176 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1342 01:43:03.722327 PCI: 00:15.0 scanning...
1343 01:43:03.725653 scan_static_bus for PCI: 00:15.0
1344 01:43:03.728999 I2C: 00:1a enabled
1345 01:43:03.729080 I2C: 00:31 enabled
1346 01:43:03.732167 I2C: 00:32 enabled
1347 01:43:03.735562 scan_static_bus for PCI: 00:15.0 done
1348 01:43:03.742186 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1349 01:43:03.742267 PCI: 00:15.1 scanning...
1350 01:43:03.745538 scan_static_bus for PCI: 00:15.1
1351 01:43:03.748753 I2C: 00:50 enabled
1352 01:43:03.752480 scan_static_bus for PCI: 00:15.1 done
1353 01:43:03.755565 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1354 01:43:03.758837 PCI: 00:15.3 scanning...
1355 01:43:03.761949 scan_static_bus for PCI: 00:15.3
1356 01:43:03.765532 I2C: 00:10 enabled
1357 01:43:03.768747 scan_static_bus for PCI: 00:15.3 done
1358 01:43:03.772212 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1359 01:43:03.775381 PCI: 00:19.1 scanning...
1360 01:43:03.778956 scan_static_bus for PCI: 00:19.1
1361 01:43:03.782357 I2C: 00:15 enabled
1362 01:43:03.782437 I2C: 00:2c enabled
1363 01:43:03.785507 scan_static_bus for PCI: 00:19.1 done
1364 01:43:03.791962 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1365 01:43:03.795313 PCI: 00:1e.3 scanning...
1366 01:43:03.798597 scan_generic_bus for PCI: 00:1e.3
1367 01:43:03.798678 SPI: 00 enabled
1368 01:43:03.805185 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1369 01:43:03.808428 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1370 01:43:03.811734 PCI: 00:1f.0 scanning...
1371 01:43:03.815178 scan_static_bus for PCI: 00:1f.0
1372 01:43:03.818903 PNP: 0c09.0 enabled
1373 01:43:03.822157 PNP: 0c09.0 scanning...
1374 01:43:03.825273 scan_static_bus for PNP: 0c09.0
1375 01:43:03.828626 scan_static_bus for PNP: 0c09.0 done
1376 01:43:03.832022 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1377 01:43:03.835100 scan_static_bus for PCI: 00:1f.0 done
1378 01:43:03.841956 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1379 01:43:03.842037 PCI: 00:1f.2 scanning...
1380 01:43:03.845227 scan_static_bus for PCI: 00:1f.2
1381 01:43:03.848272 GENERIC: 0.0 enabled
1382 01:43:03.851867 GENERIC: 0.0 scanning...
1383 01:43:03.854942 scan_static_bus for GENERIC: 0.0
1384 01:43:03.855023 GENERIC: 0.0 enabled
1385 01:43:03.858334 GENERIC: 1.0 enabled
1386 01:43:03.861612 scan_static_bus for GENERIC: 0.0 done
1387 01:43:03.868456 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1388 01:43:03.871876 scan_static_bus for PCI: 00:1f.2 done
1389 01:43:03.875329 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1390 01:43:03.878530 PCI: 00:1f.3 scanning...
1391 01:43:03.881916 scan_static_bus for PCI: 00:1f.3
1392 01:43:03.884909 scan_static_bus for PCI: 00:1f.3 done
1393 01:43:03.891830 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1394 01:43:03.891910 PCI: 00:1f.5 scanning...
1395 01:43:03.894893 scan_generic_bus for PCI: 00:1f.5
1396 01:43:03.901740 scan_generic_bus for PCI: 00:1f.5 done
1397 01:43:03.905322 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1398 01:43:03.908177 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1399 01:43:03.914798 scan_static_bus for Root Device done
1400 01:43:03.918402 scan_bus: bus Root Device finished in 729 msecs
1401 01:43:03.918484 done
1402 01:43:03.924915 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1403 01:43:03.931767 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1404 01:43:03.938053 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1405 01:43:03.941455 SPI flash protection: WPSW=0 SRP0=0
1406 01:43:03.945070 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1407 01:43:03.951649 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1408 01:43:03.955220 found VGA at PCI: 00:02.0
1409 01:43:03.958289 Setting up VGA for PCI: 00:02.0
1410 01:43:03.961731 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1411 01:43:03.968250 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1412 01:43:03.968331 Allocating resources...
1413 01:43:03.971655 Reading resources...
1414 01:43:03.974829 Root Device read_resources bus 0 link: 0
1415 01:43:03.981649 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1416 01:43:03.984701 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1417 01:43:03.988095 DOMAIN: 0000 read_resources bus 0 link: 0
1418 01:43:03.995009 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1419 01:43:04.001448 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1420 01:43:04.007984 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1421 01:43:04.014679 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1422 01:43:04.021155 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1423 01:43:04.027947 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1424 01:43:04.031263 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1425 01:43:04.041396 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1426 01:43:04.044475 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1427 01:43:04.054388 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1428 01:43:04.057743 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1429 01:43:04.064162 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1430 01:43:04.071026 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1431 01:43:04.077811 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1432 01:43:04.084339 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1433 01:43:04.090612 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1434 01:43:04.097425 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1435 01:43:04.104331 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1436 01:43:04.111317 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1437 01:43:04.113972 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1438 01:43:04.120626 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1439 01:43:04.127074 PCI: 00:04.0 read_resources bus 1 link: 0
1440 01:43:04.130737 PCI: 00:04.0 read_resources bus 1 link: 0 done
1441 01:43:04.133824 PCI: 00:06.0 read_resources bus 1 link: 0
1442 01:43:04.140415 PCI: 00:06.0 read_resources bus 1 link: 0 done
1443 01:43:04.144028 PCI: 00:0d.0 read_resources bus 0 link: 0
1444 01:43:04.147267 USB0 port 0 read_resources bus 0 link: 0
1445 01:43:04.153675 USB0 port 0 read_resources bus 0 link: 0 done
1446 01:43:04.157061 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1447 01:43:04.160377 PCI: 00:14.0 read_resources bus 0 link: 0
1448 01:43:04.167178 USB0 port 0 read_resources bus 0 link: 0
1449 01:43:04.170391 USB0 port 0 read_resources bus 0 link: 0 done
1450 01:43:04.173516 PCI: 00:14.0 read_resources bus 0 link: 0 done
1451 01:43:04.180550 PCI: 00:14.3 read_resources bus 0 link: 0
1452 01:43:04.183567 PCI: 00:14.3 read_resources bus 0 link: 0 done
1453 01:43:04.186652 PCI: 00:15.0 read_resources bus 0 link: 0
1454 01:43:04.193522 PCI: 00:15.0 read_resources bus 0 link: 0 done
1455 01:43:04.196799 PCI: 00:15.1 read_resources bus 0 link: 0
1456 01:43:04.203425 PCI: 00:15.1 read_resources bus 0 link: 0 done
1457 01:43:04.206731 PCI: 00:15.3 read_resources bus 0 link: 0
1458 01:43:04.209853 PCI: 00:15.3 read_resources bus 0 link: 0 done
1459 01:43:04.216451 PCI: 00:19.1 read_resources bus 0 link: 0
1460 01:43:04.220244 PCI: 00:19.1 read_resources bus 0 link: 0 done
1461 01:43:04.223225 PCI: 00:1e.3 read_resources bus 2 link: 0
1462 01:43:04.229859 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1463 01:43:04.233139 PCI: 00:1f.0 read_resources bus 0 link: 0
1464 01:43:04.239659 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1465 01:43:04.243196 PCI: 00:1f.2 read_resources bus 0 link: 0
1466 01:43:04.246326 GENERIC: 0.0 read_resources bus 0 link: 0
1467 01:43:04.249717 GENERIC: 0.0 read_resources bus 0 link: 0 done
1468 01:43:04.256430 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1469 01:43:04.259477 DOMAIN: 0000 read_resources bus 0 link: 0 done
1470 01:43:04.266195 Root Device read_resources bus 0 link: 0 done
1471 01:43:04.269661 Done reading resources.
1472 01:43:04.272986 Show resources in subtree (Root Device)...After reading.
1473 01:43:04.279507 Root Device child on link 0 CPU_CLUSTER: 0
1474 01:43:04.282812 CPU_CLUSTER: 0 child on link 0 APIC: 00
1475 01:43:04.282894 APIC: 00
1476 01:43:04.286472 APIC: 12
1477 01:43:04.286552 APIC: 14
1478 01:43:04.286616 APIC: 16
1479 01:43:04.289547 APIC: 10
1480 01:43:04.289654 APIC: 09
1481 01:43:04.292813 APIC: 08
1482 01:43:04.292949 APIC: 01
1483 01:43:04.296127 DOMAIN: 0000 child on link 0 GPIO: 0
1484 01:43:04.306252 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1485 01:43:04.316121 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1486 01:43:04.316204 GPIO: 0
1487 01:43:04.319146 PCI: 00:00.0
1488 01:43:04.329585 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1489 01:43:04.336095 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1490 01:43:04.345715 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1491 01:43:04.355647 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1492 01:43:04.365592 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1493 01:43:04.375815 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1494 01:43:04.385505 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1495 01:43:04.395454 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1496 01:43:04.401982 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1497 01:43:04.411993 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1498 01:43:04.421745 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1499 01:43:04.431594 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1500 01:43:04.441903 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1501 01:43:04.452309 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1502 01:43:04.458288 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1503 01:43:04.468435 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1504 01:43:04.478338 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1505 01:43:04.488058 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1506 01:43:04.497976 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1507 01:43:04.508159 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1508 01:43:04.517979 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1509 01:43:04.528024 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1510 01:43:04.534452 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1511 01:43:04.544417 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1512 01:43:04.554314 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1513 01:43:04.564264 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1514 01:43:04.574026 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1515 01:43:04.584122 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1516 01:43:04.584205 PCI: 00:02.0
1517 01:43:04.597497 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1518 01:43:04.607159 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1519 01:43:04.613912 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1520 01:43:04.620429 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1521 01:43:04.630360 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1522 01:43:04.630442 GENERIC: 0.0
1523 01:43:04.636963 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1524 01:43:04.643852 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1525 01:43:04.653518 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1526 01:43:04.663438 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1527 01:43:04.663520 PCI: 01:00.0
1528 01:43:04.673645 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1529 01:43:04.683191 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1530 01:43:04.686533 PCI: 00:08.0
1531 01:43:04.686613 PCI: 00:0a.0
1532 01:43:04.696488 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1533 01:43:04.703235 PCI: 00:0d.0 child on link 0 USB0 port 0
1534 01:43:04.713102 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1535 01:43:04.716418 USB0 port 0 child on link 0 USB3 port 0
1536 01:43:04.719690 USB3 port 0
1537 01:43:04.719770 USB3 port 1
1538 01:43:04.723243 USB3 port 2
1539 01:43:04.723323 USB3 port 3
1540 01:43:04.729773 PCI: 00:14.0 child on link 0 USB0 port 0
1541 01:43:04.739648 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1542 01:43:04.743247 USB0 port 0 child on link 0 USB2 port 0
1543 01:43:04.743327 USB2 port 0
1544 01:43:04.746240 USB2 port 1
1545 01:43:04.749454 USB2 port 2
1546 01:43:04.749534 USB2 port 3
1547 01:43:04.753245 USB2 port 4
1548 01:43:04.753325 USB2 port 5
1549 01:43:04.756398 USB2 port 6
1550 01:43:04.756503 USB2 port 7
1551 01:43:04.759431 USB2 port 8
1552 01:43:04.759511 USB2 port 9
1553 01:43:04.762931 USB3 port 0
1554 01:43:04.763010 USB3 port 1
1555 01:43:04.766512 USB3 port 2
1556 01:43:04.766592 USB3 port 3
1557 01:43:04.769962 PCI: 00:14.2
1558 01:43:04.779222 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 01:43:04.789138 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1560 01:43:04.792742 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1561 01:43:04.802560 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1562 01:43:04.805970 GENERIC: 0.0
1563 01:43:04.809389 PCI: 00:15.0 child on link 0 I2C: 00:1a
1564 01:43:04.819069 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 01:43:04.822543 I2C: 00:1a
1566 01:43:04.822623 I2C: 00:31
1567 01:43:04.825922 I2C: 00:32
1568 01:43:04.828985 PCI: 00:15.1 child on link 0 I2C: 00:50
1569 01:43:04.839111 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 01:43:04.839192 I2C: 00:50
1571 01:43:04.842443 PCI: 00:15.2
1572 01:43:04.845931 PCI: 00:15.3 child on link 0 I2C: 00:10
1573 01:43:04.855770 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 01:43:04.858935 I2C: 00:10
1575 01:43:04.859015 PCI: 00:16.0
1576 01:43:04.869009 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 01:43:04.872289 PCI: 00:19.0
1578 01:43:04.875585 PCI: 00:19.1 child on link 0 I2C: 00:15
1579 01:43:04.885480 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1580 01:43:04.885560 I2C: 00:15
1581 01:43:04.888710 I2C: 00:2c
1582 01:43:04.888791 PCI: 00:1e.0
1583 01:43:04.902060 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1584 01:43:04.905232 PCI: 00:1e.3 child on link 0 SPI: 00
1585 01:43:04.915109 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1586 01:43:04.915190 SPI: 00
1587 01:43:04.921886 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1588 01:43:04.928557 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1589 01:43:04.931875 PNP: 0c09.0
1590 01:43:04.938314 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1591 01:43:04.944767 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1592 01:43:04.954870 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1593 01:43:04.961250 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1594 01:43:04.968013 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1595 01:43:04.968094 GENERIC: 0.0
1596 01:43:04.971411 GENERIC: 1.0
1597 01:43:04.971492 PCI: 00:1f.3
1598 01:43:04.984888 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1599 01:43:04.994837 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1600 01:43:04.994919 PCI: 00:1f.5
1601 01:43:05.004361 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1602 01:43:05.010845 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1603 01:43:05.017740 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1604 01:43:05.024428 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1605 01:43:05.031189 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1606 01:43:05.034580 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1607 01:43:05.037522 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1608 01:43:05.044053 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1609 01:43:05.050625 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1610 01:43:05.060672 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1611 01:43:05.067388 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1612 01:43:05.073883 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1613 01:43:05.080569 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1614 01:43:05.087342 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1615 01:43:05.097502 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1616 01:43:05.100637 DOMAIN: 0000: Resource ranges:
1617 01:43:05.103934 * Base: 1000, Size: 800, Tag: 100
1618 01:43:05.107231 * Base: 1900, Size: e700, Tag: 100
1619 01:43:05.110598 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1620 01:43:05.117147 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1621 01:43:05.123993 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1622 01:43:05.133814 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1623 01:43:05.140316 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1624 01:43:05.146881 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1625 01:43:05.157063 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1626 01:43:05.163706 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1627 01:43:05.170194 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1628 01:43:05.180128 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1629 01:43:05.186703 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1630 01:43:05.193344 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1631 01:43:05.203228 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1632 01:43:05.209807 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1633 01:43:05.216743 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1634 01:43:05.226478 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1635 01:43:05.233349 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1636 01:43:05.239691 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1637 01:43:05.249849 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1638 01:43:05.256370 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1639 01:43:05.262839 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1640 01:43:05.273070 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1641 01:43:05.279380 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1642 01:43:05.286211 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1643 01:43:05.295967 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1644 01:43:05.302716 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1645 01:43:05.309652 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1646 01:43:05.319488 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1647 01:43:05.325885 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1648 01:43:05.332731 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1649 01:43:05.342816 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1650 01:43:05.349458 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1651 01:43:05.355707 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1652 01:43:05.359064 DOMAIN: 0000: Resource ranges:
1653 01:43:05.362468 * Base: 80400000, Size: 3fc00000, Tag: 200
1654 01:43:05.369251 * Base: d0000000, Size: 28000000, Tag: 200
1655 01:43:05.372439 * Base: fa000000, Size: 1000000, Tag: 200
1656 01:43:05.375790 * Base: fb001000, Size: 17ff000, Tag: 200
1657 01:43:05.382349 * Base: fe800000, Size: 300000, Tag: 200
1658 01:43:05.385719 * Base: feb80000, Size: 80000, Tag: 200
1659 01:43:05.389511 * Base: fed00000, Size: 40000, Tag: 200
1660 01:43:05.392338 * Base: fed70000, Size: 10000, Tag: 200
1661 01:43:05.399050 * Base: fed88000, Size: 8000, Tag: 200
1662 01:43:05.402254 * Base: fed93000, Size: d000, Tag: 200
1663 01:43:05.405615 * Base: feda2000, Size: 1e000, Tag: 200
1664 01:43:05.408990 * Base: fede0000, Size: 1220000, Tag: 200
1665 01:43:05.415375 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1666 01:43:05.422236 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1667 01:43:05.428912 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1668 01:43:05.435659 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1669 01:43:05.441967 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1670 01:43:05.448670 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1671 01:43:05.455355 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1672 01:43:05.462316 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1673 01:43:05.468771 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1674 01:43:05.475209 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1675 01:43:05.481730 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1676 01:43:05.488566 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1677 01:43:05.495482 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1678 01:43:05.501801 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1679 01:43:05.508540 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1680 01:43:05.515032 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1681 01:43:05.521682 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1682 01:43:05.528407 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1683 01:43:05.535258 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1684 01:43:05.541509 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1685 01:43:05.548359 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1686 01:43:05.558290 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1687 01:43:05.558420 PCI: 00:06.0: Resource ranges:
1688 01:43:05.564599 * Base: 80400000, Size: 100000, Tag: 200
1689 01:43:05.571513 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1690 01:43:05.577931 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1691 01:43:05.584950 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1692 01:43:05.591504 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1693 01:43:05.598020 Root Device assign_resources, bus 0 link: 0
1694 01:43:05.601388 DOMAIN: 0000 assign_resources, bus 0 link: 0
1695 01:43:05.611522 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1696 01:43:05.617865 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1697 01:43:05.624471 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1698 01:43:05.634789 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1699 01:43:05.637945 PCI: 00:04.0 assign_resources, bus 1 link: 0
1700 01:43:05.644653 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1701 01:43:05.651258 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1702 01:43:05.660925 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1703 01:43:05.670978 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1704 01:43:05.674339 PCI: 00:06.0 assign_resources, bus 1 link: 0
1705 01:43:05.684171 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1706 01:43:05.691494 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1707 01:43:05.694017 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1708 01:43:05.704227 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1709 01:43:05.710558 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1710 01:43:05.717396 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1711 01:43:05.720637 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1712 01:43:05.730734 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1713 01:43:05.734168 PCI: 00:14.0 assign_resources, bus 0 link: 0
1714 01:43:05.737358 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1715 01:43:05.747215 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1716 01:43:05.753738 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1717 01:43:05.763986 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1718 01:43:05.767118 PCI: 00:14.3 assign_resources, bus 0 link: 0
1719 01:43:05.773758 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1720 01:43:05.780381 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1721 01:43:05.784003 PCI: 00:15.0 assign_resources, bus 0 link: 0
1722 01:43:05.790520 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1723 01:43:05.796930 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1724 01:43:05.803487 PCI: 00:15.1 assign_resources, bus 0 link: 0
1725 01:43:05.806795 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1726 01:43:05.813653 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1727 01:43:05.820332 PCI: 00:15.3 assign_resources, bus 0 link: 0
1728 01:43:05.823745 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1729 01:43:05.833542 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1730 01:43:05.840072 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1731 01:43:05.846953 PCI: 00:19.1 assign_resources, bus 0 link: 0
1732 01:43:05.850259 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1733 01:43:05.856678 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1734 01:43:05.863243 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1735 01:43:05.866874 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1736 01:43:05.873206 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1737 01:43:05.876829 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1738 01:43:05.883397 LPC: Trying to open IO window from 800 size 1ff
1739 01:43:05.889832 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1740 01:43:05.896416 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1741 01:43:05.906731 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1742 01:43:05.909923 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1743 01:43:05.916558 Root Device assign_resources, bus 0 link: 0 done
1744 01:43:05.916670 Done setting resources.
1745 01:43:05.923401 Show resources in subtree (Root Device)...After assigning values.
1746 01:43:05.930024 Root Device child on link 0 CPU_CLUSTER: 0
1747 01:43:05.933025 CPU_CLUSTER: 0 child on link 0 APIC: 00
1748 01:43:05.933108 APIC: 00
1749 01:43:05.936716 APIC: 12
1750 01:43:05.936797 APIC: 14
1751 01:43:05.939975 APIC: 16
1752 01:43:05.940056 APIC: 10
1753 01:43:05.940120 APIC: 09
1754 01:43:05.943250 APIC: 08
1755 01:43:05.943330 APIC: 01
1756 01:43:05.946895 DOMAIN: 0000 child on link 0 GPIO: 0
1757 01:43:05.956754 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1758 01:43:05.966456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1759 01:43:05.966538 GPIO: 0
1760 01:43:05.969726 PCI: 00:00.0
1761 01:43:05.979854 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1762 01:43:05.989560 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1763 01:43:05.996233 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1764 01:43:06.006411 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1765 01:43:06.016205 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1766 01:43:06.026189 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1767 01:43:06.036394 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1768 01:43:06.045953 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1769 01:43:06.052436 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1770 01:43:06.062399 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1771 01:43:06.072350 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1772 01:43:06.082365 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1773 01:43:06.092190 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1774 01:43:06.102096 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1775 01:43:06.112213 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1776 01:43:06.119082 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1777 01:43:06.129008 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1778 01:43:06.138758 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1779 01:43:06.148605 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1780 01:43:06.158451 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1781 01:43:06.168468 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1782 01:43:06.178272 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1783 01:43:06.185323 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1784 01:43:06.195252 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1785 01:43:06.204897 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1786 01:43:06.214854 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1787 01:43:06.225181 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1788 01:43:06.234831 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1789 01:43:06.234914 PCI: 00:02.0
1790 01:43:06.248197 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1791 01:43:06.257927 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1792 01:43:06.268127 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1793 01:43:06.271334 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1794 01:43:06.281634 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1795 01:43:06.284611 GENERIC: 0.0
1796 01:43:06.288343 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1797 01:43:06.298195 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1798 01:43:06.308048 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1799 01:43:06.320827 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1800 01:43:06.320937 PCI: 01:00.0
1801 01:43:06.331269 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1802 01:43:06.340936 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1803 01:43:06.344323 PCI: 00:08.0
1804 01:43:06.344427 PCI: 00:0a.0
1805 01:43:06.354375 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1806 01:43:06.360894 PCI: 00:0d.0 child on link 0 USB0 port 0
1807 01:43:06.370674 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1808 01:43:06.373903 USB0 port 0 child on link 0 USB3 port 0
1809 01:43:06.377378 USB3 port 0
1810 01:43:06.377455 USB3 port 1
1811 01:43:06.380382 USB3 port 2
1812 01:43:06.380515 USB3 port 3
1813 01:43:06.387221 PCI: 00:14.0 child on link 0 USB0 port 0
1814 01:43:06.397324 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1815 01:43:06.400425 USB0 port 0 child on link 0 USB2 port 0
1816 01:43:06.403591 USB2 port 0
1817 01:43:06.403676 USB2 port 1
1818 01:43:06.406951 USB2 port 2
1819 01:43:06.407061 USB2 port 3
1820 01:43:06.410492 USB2 port 4
1821 01:43:06.410606 USB2 port 5
1822 01:43:06.414077 USB2 port 6
1823 01:43:06.414160 USB2 port 7
1824 01:43:06.416932 USB2 port 8
1825 01:43:06.420844 USB2 port 9
1826 01:43:06.420927 USB3 port 0
1827 01:43:06.423733 USB3 port 1
1828 01:43:06.423820 USB3 port 2
1829 01:43:06.426978 USB3 port 3
1830 01:43:06.427061 PCI: 00:14.2
1831 01:43:06.436768 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1832 01:43:06.446993 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1833 01:43:06.453464 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1834 01:43:06.463486 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1835 01:43:06.463599 GENERIC: 0.0
1836 01:43:06.470061 PCI: 00:15.0 child on link 0 I2C: 00:1a
1837 01:43:06.480180 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1838 01:43:06.480265 I2C: 00:1a
1839 01:43:06.483310 I2C: 00:31
1840 01:43:06.483393 I2C: 00:32
1841 01:43:06.489900 PCI: 00:15.1 child on link 0 I2C: 00:50
1842 01:43:06.500179 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1843 01:43:06.500264 I2C: 00:50
1844 01:43:06.503299 PCI: 00:15.2
1845 01:43:06.506658 PCI: 00:15.3 child on link 0 I2C: 00:10
1846 01:43:06.516911 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1847 01:43:06.519848 I2C: 00:10
1848 01:43:06.519938 PCI: 00:16.0
1849 01:43:06.529733 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1850 01:43:06.533244 PCI: 00:19.0
1851 01:43:06.536306 PCI: 00:19.1 child on link 0 I2C: 00:15
1852 01:43:06.546505 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1853 01:43:06.549722 I2C: 00:15
1854 01:43:06.549803 I2C: 00:2c
1855 01:43:06.552886 PCI: 00:1e.0
1856 01:43:06.563146 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1857 01:43:06.566301 PCI: 00:1e.3 child on link 0 SPI: 00
1858 01:43:06.576438 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1859 01:43:06.579563 SPI: 00
1860 01:43:06.583008 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1861 01:43:06.593094 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1862 01:43:06.593201 PNP: 0c09.0
1863 01:43:06.602960 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1864 01:43:06.606193 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1865 01:43:06.615981 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1866 01:43:06.626258 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1867 01:43:06.629276 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1868 01:43:06.632909 GENERIC: 0.0
1869 01:43:06.632985 GENERIC: 1.0
1870 01:43:06.636119 PCI: 00:1f.3
1871 01:43:06.646125 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1872 01:43:06.656364 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1873 01:43:06.656487 PCI: 00:1f.5
1874 01:43:06.669097 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1875 01:43:06.669191 Done allocating resources.
1876 01:43:06.676247 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1877 01:43:06.682679 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1878 01:43:06.686014 Configure audio over I2S with MAX98373 NAU88L25B.
1879 01:43:06.691706 Enabling BT offload
1880 01:43:06.698701 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1881 01:43:06.701941 Enabling resources...
1882 01:43:06.705608 PCI: 00:00.0 subsystem <- 8086/4609
1883 01:43:06.708930 PCI: 00:00.0 cmd <- 06
1884 01:43:06.711730 PCI: 00:02.0 subsystem <- 8086/46b3
1885 01:43:06.715308 PCI: 00:02.0 cmd <- 03
1886 01:43:06.718705 PCI: 00:04.0 subsystem <- 8086/461d
1887 01:43:06.718789 PCI: 00:04.0 cmd <- 02
1888 01:43:06.722172 PCI: 00:06.0 bridge ctrl <- 0013
1889 01:43:06.724981 PCI: 00:06.0 subsystem <- 8086/464d
1890 01:43:06.728311 PCI: 00:06.0 cmd <- 106
1891 01:43:06.731649 PCI: 00:0a.0 subsystem <- 8086/467d
1892 01:43:06.735238 PCI: 00:0a.0 cmd <- 02
1893 01:43:06.738655 PCI: 00:0d.0 subsystem <- 8086/461e
1894 01:43:06.741734 PCI: 00:0d.0 cmd <- 02
1895 01:43:06.744964 PCI: 00:14.0 subsystem <- 8086/51ed
1896 01:43:06.748354 PCI: 00:14.0 cmd <- 02
1897 01:43:06.751605 PCI: 00:14.2 subsystem <- 8086/51ef
1898 01:43:06.751689 PCI: 00:14.2 cmd <- 02
1899 01:43:06.758314 PCI: 00:14.3 subsystem <- 8086/51f0
1900 01:43:06.758397 PCI: 00:14.3 cmd <- 02
1901 01:43:06.761523 PCI: 00:15.0 subsystem <- 8086/51e8
1902 01:43:06.765142 PCI: 00:15.0 cmd <- 02
1903 01:43:06.768386 PCI: 00:15.1 subsystem <- 8086/51e9
1904 01:43:06.771621 PCI: 00:15.1 cmd <- 06
1905 01:43:06.775206 PCI: 00:15.3 subsystem <- 8086/51eb
1906 01:43:06.778580 PCI: 00:15.3 cmd <- 02
1907 01:43:06.782608 PCI: 00:16.0 subsystem <- 8086/51e0
1908 01:43:06.782692 PCI: 00:16.0 cmd <- 02
1909 01:43:06.788314 PCI: 00:19.1 subsystem <- 8086/51c6
1910 01:43:06.788426 PCI: 00:19.1 cmd <- 02
1911 01:43:06.791727 PCI: 00:1e.0 subsystem <- 8086/51a8
1912 01:43:06.795018 PCI: 00:1e.0 cmd <- 06
1913 01:43:06.798398 PCI: 00:1e.3 subsystem <- 8086/51ab
1914 01:43:06.801884 PCI: 00:1e.3 cmd <- 02
1915 01:43:06.804964 PCI: 00:1f.0 subsystem <- 8086/5182
1916 01:43:06.808398 PCI: 00:1f.0 cmd <- 407
1917 01:43:06.811599 PCI: 00:1f.3 subsystem <- 8086/51c8
1918 01:43:06.811682 PCI: 00:1f.3 cmd <- 02
1919 01:43:06.818496 PCI: 00:1f.5 subsystem <- 8086/51a4
1920 01:43:06.818582 PCI: 00:1f.5 cmd <- 406
1921 01:43:06.821582 PCI: 01:00.0 cmd <- 02
1922 01:43:06.821692 done.
1923 01:43:06.828209 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1924 01:43:06.831985 ME: Version: Unavailable
1925 01:43:06.835015 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1926 01:43:06.838558 Initializing devices...
1927 01:43:06.841645 Root Device init
1928 01:43:06.841756 mainboard: EC init
1929 01:43:06.848317 Chrome EC: Set SMI mask to 0x0000000000000000
1930 01:43:06.848401 Chrome EC: UHEPI supported
1931 01:43:06.855468 Chrome EC: clear events_b mask to 0x0000000000000000
1932 01:43:06.862167 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1933 01:43:06.868926 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1934 01:43:06.875304 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1935 01:43:06.878579 Chrome EC: Set WAKE mask to 0x0000000000000000
1936 01:43:06.885759 Root Device init finished in 40 msecs
1937 01:43:06.885843 PCI: 00:00.0 init
1938 01:43:06.889457 CPU TDP = 15 Watts
1939 01:43:06.892394 CPU PL1 = 15 Watts
1940 01:43:06.892517 CPU PL2 = 55 Watts
1941 01:43:06.895901 CPU PL4 = 123 Watts
1942 01:43:06.899152 PCI: 00:00.0 init finished in 8 msecs
1943 01:43:06.902630 PCI: 00:02.0 init
1944 01:43:06.902726 GMA: Found VBT in CBFS
1945 01:43:06.905788 GMA: Found valid VBT in CBFS
1946 01:43:06.912609 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1947 01:43:06.919248 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1948 01:43:06.922598 PCI: 00:02.0 init finished in 18 msecs
1949 01:43:06.925973 PCI: 00:06.0 init
1950 01:43:06.929241 Initializing PCH PCIe bridge.
1951 01:43:06.932655 PCI: 00:06.0 init finished in 3 msecs
1952 01:43:06.932767 PCI: 00:0a.0 init
1953 01:43:06.939602 PCI: 00:0a.0 init finished in 0 msecs
1954 01:43:06.939683 PCI: 00:14.0 init
1955 01:43:06.942629 PCI: 00:14.0 init finished in 0 msecs
1956 01:43:06.945779 PCI: 00:14.2 init
1957 01:43:06.949261 PCI: 00:14.2 init finished in 0 msecs
1958 01:43:06.952737 PCI: 00:15.0 init
1959 01:43:06.955878 I2C bus 0 version 0x3230302a
1960 01:43:06.958987 DW I2C bus 0 at 0x80655000 (400 KHz)
1961 01:43:06.962351 PCI: 00:15.0 init finished in 6 msecs
1962 01:43:06.962473 PCI: 00:15.1 init
1963 01:43:06.965903 I2C bus 1 version 0x3230302a
1964 01:43:06.969675 DW I2C bus 1 at 0x80656000 (400 KHz)
1965 01:43:06.972600 PCI: 00:15.1 init finished in 6 msecs
1966 01:43:06.976084 PCI: 00:15.3 init
1967 01:43:06.979243 I2C bus 3 version 0x3230302a
1968 01:43:06.982631 DW I2C bus 3 at 0x80657000 (400 KHz)
1969 01:43:06.985987 PCI: 00:15.3 init finished in 6 msecs
1970 01:43:06.989309 PCI: 00:16.0 init
1971 01:43:06.992431 PCI: 00:16.0 init finished in 0 msecs
1972 01:43:06.992553 PCI: 00:19.1 init
1973 01:43:06.995862 I2C bus 5 version 0x3230302a
1974 01:43:06.999365 DW I2C bus 5 at 0x80659000 (400 KHz)
1975 01:43:07.005970 PCI: 00:19.1 init finished in 6 msecs
1976 01:43:07.006052 PCI: 00:1f.0 init
1977 01:43:07.012603 IOAPIC: Initializing IOAPIC at 0xfec00000
1978 01:43:07.012685 IOAPIC: ID = 0x02
1979 01:43:07.015634 IOAPIC: Dumping registers
1980 01:43:07.019278 reg 0x0000: 0x02000000
1981 01:43:07.019385 reg 0x0001: 0x00770020
1982 01:43:07.022061 reg 0x0002: 0x00000000
1983 01:43:07.025560 IOAPIC: 120 interrupts
1984 01:43:07.028915 IOAPIC: Clearing IOAPIC at 0xfec00000
1985 01:43:07.035288 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1986 01:43:07.038771 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1987 01:43:07.042075 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1988 01:43:07.048695 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1989 01:43:07.051796 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1990 01:43:07.058848 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1991 01:43:07.062046 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1992 01:43:07.068335 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1993 01:43:07.071721 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1994 01:43:07.078455 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1995 01:43:07.081813 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1996 01:43:07.084977 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1997 01:43:07.091609 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1998 01:43:07.095124 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1999 01:43:07.101299 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2000 01:43:07.104789 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2001 01:43:07.111539 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2002 01:43:07.114703 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2003 01:43:07.121433 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2004 01:43:07.124980 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2005 01:43:07.127933 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2006 01:43:07.134742 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2007 01:43:07.137914 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2008 01:43:07.144588 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2009 01:43:07.148013 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2010 01:43:07.154711 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2011 01:43:07.158041 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2012 01:43:07.164874 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2013 01:43:07.167692 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2014 01:43:07.174383 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2015 01:43:07.177481 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2016 01:43:07.180804 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2017 01:43:07.187797 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2018 01:43:07.190848 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2019 01:43:07.197319 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2020 01:43:07.200445 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2021 01:43:07.207254 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2022 01:43:07.210838 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2023 01:43:07.217319 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2024 01:43:07.220647 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2025 01:43:07.223772 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2026 01:43:07.230568 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2027 01:43:07.233925 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2028 01:43:07.240449 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2029 01:43:07.243760 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2030 01:43:07.250449 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2031 01:43:07.253900 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2032 01:43:07.260185 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2033 01:43:07.263636 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2034 01:43:07.266794 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2035 01:43:07.273500 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2036 01:43:07.277213 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2037 01:43:07.283715 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2038 01:43:07.286660 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2039 01:43:07.293556 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2040 01:43:07.296875 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2041 01:43:07.303400 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2042 01:43:07.306568 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2043 01:43:07.313447 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2044 01:43:07.316392 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2045 01:43:07.319973 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2046 01:43:07.326613 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2047 01:43:07.329836 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2048 01:43:07.336395 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2049 01:43:07.340236 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2050 01:43:07.346772 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2051 01:43:07.349908 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2052 01:43:07.353048 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2053 01:43:07.359671 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2054 01:43:07.363216 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2055 01:43:07.369655 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2056 01:43:07.372933 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2057 01:43:07.379772 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2058 01:43:07.382865 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2059 01:43:07.389558 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2060 01:43:07.392774 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2061 01:43:07.399628 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2062 01:43:07.402760 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2063 01:43:07.406148 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2064 01:43:07.412871 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2065 01:43:07.416140 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2066 01:43:07.422880 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2067 01:43:07.426256 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2068 01:43:07.432442 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2069 01:43:07.435915 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2070 01:43:07.442392 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2071 01:43:07.446029 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2072 01:43:07.449490 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2073 01:43:07.455744 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2074 01:43:07.459024 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2075 01:43:07.465774 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2076 01:43:07.468978 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2077 01:43:07.475775 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2078 01:43:07.479123 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2079 01:43:07.485601 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2080 01:43:07.489368 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2081 01:43:07.492321 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2082 01:43:07.499057 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2083 01:43:07.502290 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2084 01:43:07.509160 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2085 01:43:07.512423 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2086 01:43:07.519111 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2087 01:43:07.522571 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2088 01:43:07.528970 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2089 01:43:07.532128 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2090 01:43:07.535723 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2091 01:43:07.542301 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2092 01:43:07.545535 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2093 01:43:07.552112 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2094 01:43:07.555372 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2095 01:43:07.561890 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2096 01:43:07.565249 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2097 01:43:07.568811 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2098 01:43:07.575225 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2099 01:43:07.579062 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2100 01:43:07.585206 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2101 01:43:07.588749 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2102 01:43:07.595151 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2103 01:43:07.598484 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2104 01:43:07.605148 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2105 01:43:07.608696 IOAPIC: Bootstrap Processor Local APIC = 0x00
2106 01:43:07.611919 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2107 01:43:07.618626 PCI: 00:1f.0 init finished in 607 msecs
2108 01:43:07.618711 PCI: 00:1f.2 init
2109 01:43:07.621836 apm_control: Disabling ACPI.
2110 01:43:07.626362 APMC done.
2111 01:43:07.629402 PCI: 00:1f.2 init finished in 6 msecs
2112 01:43:07.633328 PCI: 00:1f.3 init
2113 01:43:07.636473 PCI: 00:1f.3 init finished in 0 msecs
2114 01:43:07.636571 PCI: 01:00.0 init
2115 01:43:07.639945 PCI: 01:00.0 init finished in 0 msecs
2116 01:43:07.643102 PNP: 0c09.0 init
2117 01:43:07.646301 Google Chrome EC uptime: 12.121 seconds
2118 01:43:07.652896 Google Chrome AP resets since EC boot: 1
2119 01:43:07.655901 Google Chrome most recent AP reset causes:
2120 01:43:07.659568 0.343: 32775 shutdown: entering G3
2121 01:43:07.665927 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2122 01:43:07.669200 PNP: 0c09.0 init finished in 23 msecs
2123 01:43:07.672828 GENERIC: 0.0 init
2124 01:43:07.675912 GENERIC: 0.0 init finished in 0 msecs
2125 01:43:07.675996 GENERIC: 1.0 init
2126 01:43:07.682606 GENERIC: 1.0 init finished in 0 msecs
2127 01:43:07.682690 Devices initialized
2128 01:43:07.685750 Show all devs... After init.
2129 01:43:07.689235 Root Device: enabled 1
2130 01:43:07.692417 CPU_CLUSTER: 0: enabled 1
2131 01:43:07.692520 DOMAIN: 0000: enabled 1
2132 01:43:07.696033 GPIO: 0: enabled 1
2133 01:43:07.699152 PCI: 00:00.0: enabled 1
2134 01:43:07.699236 PCI: 00:01.0: enabled 0
2135 01:43:07.702981 PCI: 00:01.1: enabled 0
2136 01:43:07.705972 PCI: 00:02.0: enabled 1
2137 01:43:07.709064 PCI: 00:04.0: enabled 1
2138 01:43:07.709148 PCI: 00:05.0: enabled 0
2139 01:43:07.712469 PCI: 00:06.0: enabled 1
2140 01:43:07.715896 PCI: 00:06.2: enabled 0
2141 01:43:07.716005 PCI: 00:07.0: enabled 0
2142 01:43:07.719510 PCI: 00:07.1: enabled 0
2143 01:43:07.722665 PCI: 00:07.2: enabled 0
2144 01:43:07.725888 PCI: 00:07.3: enabled 0
2145 01:43:07.725973 PCI: 00:08.0: enabled 0
2146 01:43:07.729035 PCI: 00:09.0: enabled 0
2147 01:43:07.732710 PCI: 00:0a.0: enabled 1
2148 01:43:07.735632 PCI: 00:0d.0: enabled 1
2149 01:43:07.735716 PCI: 00:0d.1: enabled 0
2150 01:43:07.739079 PCI: 00:0d.2: enabled 0
2151 01:43:07.742288 PCI: 00:0d.3: enabled 0
2152 01:43:07.745823 PCI: 00:0e.0: enabled 0
2153 01:43:07.745908 PCI: 00:10.0: enabled 0
2154 01:43:07.749107 PCI: 00:10.1: enabled 0
2155 01:43:07.752570 PCI: 00:10.6: enabled 0
2156 01:43:07.752654 PCI: 00:10.7: enabled 0
2157 01:43:07.755661 PCI: 00:12.0: enabled 0
2158 01:43:07.759073 PCI: 00:12.6: enabled 0
2159 01:43:07.762198 PCI: 00:12.7: enabled 0
2160 01:43:07.762282 PCI: 00:13.0: enabled 0
2161 01:43:07.765853 PCI: 00:14.0: enabled 1
2162 01:43:07.768881 PCI: 00:14.1: enabled 0
2163 01:43:07.772402 PCI: 00:14.2: enabled 1
2164 01:43:07.772527 PCI: 00:14.3: enabled 1
2165 01:43:07.775451 PCI: 00:15.0: enabled 1
2166 01:43:07.779203 PCI: 00:15.1: enabled 1
2167 01:43:07.782240 PCI: 00:15.2: enabled 0
2168 01:43:07.782325 PCI: 00:15.3: enabled 1
2169 01:43:07.785524 PCI: 00:16.0: enabled 1
2170 01:43:07.789450 PCI: 00:16.1: enabled 0
2171 01:43:07.792199 PCI: 00:16.2: enabled 0
2172 01:43:07.792308 PCI: 00:16.3: enabled 0
2173 01:43:07.795447 PCI: 00:16.4: enabled 0
2174 01:43:07.798717 PCI: 00:16.5: enabled 0
2175 01:43:07.798801 PCI: 00:17.0: enabled 0
2176 01:43:07.802397 PCI: 00:19.0: enabled 0
2177 01:43:07.805597 PCI: 00:19.1: enabled 1
2178 01:43:07.808900 PCI: 00:19.2: enabled 0
2179 01:43:07.808978 PCI: 00:1a.0: enabled 0
2180 01:43:07.812297 PCI: 00:1c.0: enabled 0
2181 01:43:07.815502 PCI: 00:1c.1: enabled 0
2182 01:43:07.818691 PCI: 00:1c.2: enabled 0
2183 01:43:07.818775 PCI: 00:1c.3: enabled 0
2184 01:43:07.822497 PCI: 00:1c.4: enabled 0
2185 01:43:07.825662 PCI: 00:1c.5: enabled 0
2186 01:43:07.828542 PCI: 00:1c.6: enabled 0
2187 01:43:07.828627 PCI: 00:1c.7: enabled 0
2188 01:43:07.832114 PCI: 00:1d.0: enabled 0
2189 01:43:07.835585 PCI: 00:1d.1: enabled 0
2190 01:43:07.835669 PCI: 00:1d.2: enabled 0
2191 01:43:07.838809 PCI: 00:1d.3: enabled 0
2192 01:43:07.842332 PCI: 00:1e.0: enabled 1
2193 01:43:07.845181 PCI: 00:1e.1: enabled 0
2194 01:43:07.845258 PCI: 00:1e.2: enabled 0
2195 01:43:07.848540 PCI: 00:1e.3: enabled 1
2196 01:43:07.851764 PCI: 00:1f.0: enabled 1
2197 01:43:07.855361 PCI: 00:1f.1: enabled 0
2198 01:43:07.855446 PCI: 00:1f.2: enabled 1
2199 01:43:07.858563 PCI: 00:1f.3: enabled 1
2200 01:43:07.862113 PCI: 00:1f.4: enabled 0
2201 01:43:07.865387 PCI: 00:1f.5: enabled 1
2202 01:43:07.865471 PCI: 00:1f.6: enabled 0
2203 01:43:07.868813 PCI: 00:1f.7: enabled 0
2204 01:43:07.872060 GENERIC: 0.0: enabled 1
2205 01:43:07.875087 GENERIC: 0.0: enabled 1
2206 01:43:07.875171 GENERIC: 1.0: enabled 1
2207 01:43:07.878567 GENERIC: 0.0: enabled 1
2208 01:43:07.881678 GENERIC: 1.0: enabled 1
2209 01:43:07.881762 USB0 port 0: enabled 1
2210 01:43:07.885470 USB0 port 0: enabled 1
2211 01:43:07.888565 GENERIC: 0.0: enabled 1
2212 01:43:07.891815 I2C: 00:1a: enabled 1
2213 01:43:07.891899 I2C: 00:31: enabled 1
2214 01:43:07.895375 I2C: 00:32: enabled 1
2215 01:43:07.898733 I2C: 00:50: enabled 1
2216 01:43:07.898817 I2C: 00:10: enabled 1
2217 01:43:07.901821 I2C: 00:15: enabled 1
2218 01:43:07.905217 I2C: 00:2c: enabled 1
2219 01:43:07.905302 GENERIC: 0.0: enabled 1
2220 01:43:07.908376 SPI: 00: enabled 1
2221 01:43:07.911699 PNP: 0c09.0: enabled 1
2222 01:43:07.911783 GENERIC: 0.0: enabled 1
2223 01:43:07.915138 USB3 port 0: enabled 1
2224 01:43:07.918274 USB3 port 1: enabled 0
2225 01:43:07.922034 USB3 port 2: enabled 1
2226 01:43:07.922121 USB3 port 3: enabled 0
2227 01:43:07.924959 USB2 port 0: enabled 1
2228 01:43:07.928669 USB2 port 1: enabled 0
2229 01:43:07.928753 USB2 port 2: enabled 1
2230 01:43:07.931488 USB2 port 3: enabled 0
2231 01:43:07.934974 USB2 port 4: enabled 0
2232 01:43:07.935058 USB2 port 5: enabled 1
2233 01:43:07.938773 USB2 port 6: enabled 0
2234 01:43:07.941964 USB2 port 7: enabled 0
2235 01:43:07.945248 USB2 port 8: enabled 1
2236 01:43:07.945332 USB2 port 9: enabled 1
2237 01:43:07.948206 USB3 port 0: enabled 1
2238 01:43:07.951732 USB3 port 1: enabled 0
2239 01:43:07.951816 USB3 port 2: enabled 0
2240 01:43:07.954909 USB3 port 3: enabled 0
2241 01:43:07.958473 GENERIC: 0.0: enabled 1
2242 01:43:07.961514 GENERIC: 1.0: enabled 1
2243 01:43:07.961597 APIC: 00: enabled 1
2244 01:43:07.964946 APIC: 12: enabled 1
2245 01:43:07.965030 APIC: 14: enabled 1
2246 01:43:07.968417 APIC: 16: enabled 1
2247 01:43:07.971483 APIC: 10: enabled 1
2248 01:43:07.971565 APIC: 09: enabled 1
2249 01:43:07.975096 APIC: 08: enabled 1
2250 01:43:07.978250 APIC: 01: enabled 1
2251 01:43:07.978330 PCI: 01:00.0: enabled 1
2252 01:43:07.985067 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2253 01:43:07.988456 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2254 01:43:07.991876 ELOG: NV offset 0xf20000 size 0x4000
2255 01:43:08.000056 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2256 01:43:08.006881 ELOG: Event(17) added with size 13 at 2023-11-24 01:43:08 UTC
2257 01:43:08.013649 ELOG: Event(9E) added with size 10 at 2023-11-24 01:43:08 UTC
2258 01:43:08.020066 ELOG: Event(9F) added with size 14 at 2023-11-24 01:43:08 UTC
2259 01:43:08.026631 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2260 01:43:08.033555 ELOG: Event(A0) added with size 9 at 2023-11-24 01:43:08 UTC
2261 01:43:08.036638 elog_add_boot_reason: Logged dev mode boot
2262 01:43:08.043551 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2263 01:43:08.046865 Finalize devices...
2264 01:43:08.046946 PCI: 00:16.0 final
2265 01:43:08.050007 PCI: 00:1f.2 final
2266 01:43:08.050089 GENERIC: 0.0 final
2267 01:43:08.056508 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2268 01:43:08.060006 GENERIC: 1.0 final
2269 01:43:08.066489 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2270 01:43:08.066571 Devices finalized
2271 01:43:08.073398 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2272 01:43:08.076563 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2273 01:43:08.082937 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2274 01:43:08.089793 ME: HFSTS1 : 0x90000245
2275 01:43:08.093229 ME: HFSTS2 : 0x82100116
2276 01:43:08.096348 ME: HFSTS3 : 0x00000050
2277 01:43:08.103100 ME: HFSTS4 : 0x00004000
2278 01:43:08.106163 ME: HFSTS5 : 0x00000000
2279 01:43:08.109754 ME: HFSTS6 : 0x40600006
2280 01:43:08.113070 ME: Manufacturing Mode : NO
2281 01:43:08.119663 ME: SPI Protection Mode Enabled : YES
2282 01:43:08.122956 ME: FPFs Committed : YES
2283 01:43:08.126515 ME: Manufacturing Vars Locked : YES
2284 01:43:08.129667 ME: FW Partition Table : OK
2285 01:43:08.132990 ME: Bringup Loader Failure : NO
2286 01:43:08.136060 ME: Firmware Init Complete : YES
2287 01:43:08.139613 ME: Boot Options Present : NO
2288 01:43:08.142712 ME: Update In Progress : NO
2289 01:43:08.149363 ME: D0i3 Support : YES
2290 01:43:08.152643 ME: Low Power State Enabled : NO
2291 01:43:08.156042 ME: CPU Replaced : YES
2292 01:43:08.159486 ME: CPU Replacement Valid : YES
2293 01:43:08.162933 ME: Current Working State : 5
2294 01:43:08.166287 ME: Current Operation State : 1
2295 01:43:08.169451 ME: Current Operation Mode : 0
2296 01:43:08.172716 ME: Error Code : 0
2297 01:43:08.179153 ME: Enhanced Debug Mode : NO
2298 01:43:08.182498 ME: CPU Debug Disabled : YES
2299 01:43:08.185718 ME: TXT Support : NO
2300 01:43:08.189187 ME: WP for RO is enabled : YES
2301 01:43:08.195799 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2302 01:43:08.202761 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2303 01:43:08.206198 Ramoops buffer: 0x100000@0x76899000.
2304 01:43:08.209065 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2305 01:43:08.219082 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2306 01:43:08.222387 CBFS: 'fallback/slic' not found.
2307 01:43:08.226138 ACPI: Writing ACPI tables at 7686d000.
2308 01:43:08.226220 ACPI: * FACS
2309 01:43:08.228967 ACPI: * DSDT
2310 01:43:08.235902 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2311 01:43:08.239043 ACPI: * FADT
2312 01:43:08.239124 SCI is IRQ9
2313 01:43:08.242370 ACPI: added table 1/32, length now 40
2314 01:43:08.245780 ACPI: * SSDT
2315 01:43:08.252493 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2316 01:43:08.255849 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2317 01:43:08.262455 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2318 01:43:08.265921 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2319 01:43:08.272625 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2320 01:43:08.275457 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2321 01:43:08.282395 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2322 01:43:08.288958 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2323 01:43:08.292144 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2324 01:43:08.298741 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2325 01:43:08.302052 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2326 01:43:08.308680 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2327 01:43:08.312263 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2328 01:43:08.318890 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2329 01:43:08.325425 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2330 01:43:08.328624 PS2K: Passing 80 keymaps to kernel
2331 01:43:08.335366 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2332 01:43:08.342007 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2333 01:43:08.348595 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2334 01:43:08.355234 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2335 01:43:08.358515 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2336 01:43:08.365201 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2337 01:43:08.372081 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2338 01:43:08.378539 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2339 01:43:08.385153 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2340 01:43:08.392061 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2341 01:43:08.395350 ACPI: added table 2/32, length now 44
2342 01:43:08.395435 ACPI: * MCFG
2343 01:43:08.398642 ACPI: added table 3/32, length now 48
2344 01:43:08.401978 ACPI: * TPM2
2345 01:43:08.405277 TPM2 log created at 0x7685d000
2346 01:43:08.408637 ACPI: added table 4/32, length now 52
2347 01:43:08.411764 ACPI: * LPIT
2348 01:43:08.415217 ACPI: added table 5/32, length now 56
2349 01:43:08.415301 ACPI: * MADT
2350 01:43:08.418351 SCI is IRQ9
2351 01:43:08.421553 ACPI: added table 6/32, length now 60
2352 01:43:08.425231 cmd_reg from pmc_make_ipc_cmd 1052838
2353 01:43:08.431777 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2354 01:43:08.438410 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2355 01:43:08.441453 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2356 01:43:08.448105 PMC CrashLog size in discovery mode: 0xC00
2357 01:43:08.451472 cpu crashlog bar addr: 0x80640000
2358 01:43:08.454747 cpu discovery table offset: 0x6030
2359 01:43:08.458089 cpu_crashlog_discovery_table buffer count: 0x3
2360 01:43:08.465195 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2361 01:43:08.471536 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2362 01:43:08.478043 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2363 01:43:08.484738 PMC crashLog size in discovery mode : 0xC00
2364 01:43:08.491075 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2365 01:43:08.494384 discover mode PMC crashlog size adjusted to: 0x200
2366 01:43:08.501000 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2367 01:43:08.507602 discover mode PMC crashlog size adjusted to: 0x0
2368 01:43:08.510988 m_cpu_crashLog_size : 0x3480 bytes
2369 01:43:08.511072 CPU crashLog present.
2370 01:43:08.517862 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2371 01:43:08.524388 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2372 01:43:08.527567 current = 76876550
2373 01:43:08.527648 ACPI: * DMAR
2374 01:43:08.530815 ACPI: added table 7/32, length now 64
2375 01:43:08.537614 ACPI: added table 8/32, length now 68
2376 01:43:08.537696 ACPI: * HPET
2377 01:43:08.540664 ACPI: added table 9/32, length now 72
2378 01:43:08.544208 ACPI: done.
2379 01:43:08.544290 ACPI tables: 38528 bytes.
2380 01:43:08.547408 smbios_write_tables: 76857000
2381 01:43:08.553031 EC returned error result code 3
2382 01:43:08.556252 Couldn't obtain OEM name from CBI
2383 01:43:08.559275 Create SMBIOS type 16
2384 01:43:08.562626 Create SMBIOS type 17
2385 01:43:08.566102 Create SMBIOS type 20
2386 01:43:08.566183 GENERIC: 0.0 (WIFI Device)
2387 01:43:08.569313 SMBIOS tables: 2156 bytes.
2388 01:43:08.572746 Writing table forward entry at 0x00000500
2389 01:43:08.579156 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2390 01:43:08.582852 Writing coreboot table at 0x76891000
2391 01:43:08.589536 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2392 01:43:08.596196 1. 0000000000001000-000000000009ffff: RAM
2393 01:43:08.599259 2. 00000000000a0000-00000000000fffff: RESERVED
2394 01:43:08.602582 3. 0000000000100000-0000000076856fff: RAM
2395 01:43:08.609277 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2396 01:43:08.612846 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2397 01:43:08.619415 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2398 01:43:08.625722 7. 0000000077000000-00000000803fffff: RESERVED
2399 01:43:08.629013 8. 00000000c0000000-00000000cfffffff: RESERVED
2400 01:43:08.635626 9. 00000000f8000000-00000000f9ffffff: RESERVED
2401 01:43:08.639096 10. 00000000fb000000-00000000fb000fff: RESERVED
2402 01:43:08.642280 11. 00000000fc800000-00000000fe7fffff: RESERVED
2403 01:43:08.649108 12. 00000000feb00000-00000000feb7ffff: RESERVED
2404 01:43:08.652323 13. 00000000fec00000-00000000fecfffff: RESERVED
2405 01:43:08.659015 14. 00000000fed40000-00000000fed6ffff: RESERVED
2406 01:43:08.662336 15. 00000000fed80000-00000000fed87fff: RESERVED
2407 01:43:08.668879 16. 00000000fed90000-00000000fed92fff: RESERVED
2408 01:43:08.672217 17. 00000000feda0000-00000000feda1fff: RESERVED
2409 01:43:08.679028 18. 00000000fedc0000-00000000feddffff: RESERVED
2410 01:43:08.682311 19. 0000000100000000-000000027fbfffff: RAM
2411 01:43:08.685376 Passing 4 GPIOs to payload:
2412 01:43:08.689014 NAME | PORT | POLARITY | VALUE
2413 01:43:08.695661 lid | undefined | high | high
2414 01:43:08.698845 power | undefined | high | low
2415 01:43:08.705433 oprom | undefined | high | low
2416 01:43:08.712335 EC in RW | 0x00000151 | high | high
2417 01:43:08.712417 Board ID: 3
2418 01:43:08.715679 FW config: 0x131
2419 01:43:08.718691 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum e946
2420 01:43:08.722109 coreboot table: 1788 bytes.
2421 01:43:08.725699 IMD ROOT 0. 0x76fff000 0x00001000
2422 01:43:08.732157 IMD SMALL 1. 0x76ffe000 0x00001000
2423 01:43:08.735449 FSP MEMORY 2. 0x76afe000 0x00500000
2424 01:43:08.738795 CONSOLE 3. 0x76ade000 0x00020000
2425 01:43:08.742149 RW MCACHE 4. 0x76add000 0x0000043c
2426 01:43:08.745650 RO MCACHE 5. 0x76adc000 0x00000fd8
2427 01:43:08.749072 FMAP 6. 0x76adb000 0x0000064a
2428 01:43:08.752074 TIME STAMP 7. 0x76ada000 0x00000910
2429 01:43:08.755631 VBOOT WORK 8. 0x76ac6000 0x00014000
2430 01:43:08.762330 MEM INFO 9. 0x76ac5000 0x000003b8
2431 01:43:08.765407 ROMSTG STCK10. 0x76ac4000 0x00001000
2432 01:43:08.769366 AFTER CAR 11. 0x76ab8000 0x0000c000
2433 01:43:08.772150 RAMSTAGE 12. 0x76a2e000 0x0008a000
2434 01:43:08.775611 ACPI BERT 13. 0x76a1e000 0x00010000
2435 01:43:08.778768 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2436 01:43:08.782357 REFCODE 15. 0x769ae000 0x0006f000
2437 01:43:08.785535 SMM BACKUP 16. 0x7699e000 0x00010000
2438 01:43:08.789061 IGD OPREGION17. 0x76999000 0x00004203
2439 01:43:08.795825 RAMOOPS 18. 0x76899000 0x00100000
2440 01:43:08.799339 COREBOOT 19. 0x76891000 0x00008000
2441 01:43:08.802443 ACPI 20. 0x7686d000 0x00024000
2442 01:43:08.805693 TPM2 TCGLOG21. 0x7685d000 0x00010000
2443 01:43:08.809217 PMC CRASHLOG22. 0x7685c000 0x00000c00
2444 01:43:08.812590 CPU CRASHLOG23. 0x76858000 0x00003480
2445 01:43:08.815597 SMBIOS 24. 0x76857000 0x00001000
2446 01:43:08.818682 IMD small region:
2447 01:43:08.822385 IMD ROOT 0. 0x76ffec00 0x00000400
2448 01:43:08.825449 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2449 01:43:08.832188 VPD 2. 0x76ffeb60 0x0000006c
2450 01:43:08.835460 POWER STATE 3. 0x76ffeb00 0x00000044
2451 01:43:08.838762 ROMSTAGE 4. 0x76ffeae0 0x00000004
2452 01:43:08.842397 ACPI GNVS 5. 0x76ffea80 0x00000048
2453 01:43:08.845811 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2454 01:43:08.851904 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2455 01:43:08.855348 MTRR: Physical address space:
2456 01:43:08.861926 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2457 01:43:08.868968 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2458 01:43:08.875145 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2459 01:43:08.878576 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2460 01:43:08.885031 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2461 01:43:08.891918 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2462 01:43:08.898434 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2463 01:43:08.901869 MTRR: Fixed MSR 0x250 0x0606060606060606
2464 01:43:08.908312 MTRR: Fixed MSR 0x258 0x0606060606060606
2465 01:43:08.911839 MTRR: Fixed MSR 0x259 0x0000000000000000
2466 01:43:08.915243 MTRR: Fixed MSR 0x268 0x0606060606060606
2467 01:43:08.918725 MTRR: Fixed MSR 0x269 0x0606060606060606
2468 01:43:08.924956 MTRR: Fixed MSR 0x26a 0x0606060606060606
2469 01:43:08.928172 MTRR: Fixed MSR 0x26b 0x0606060606060606
2470 01:43:08.931499 MTRR: Fixed MSR 0x26c 0x0606060606060606
2471 01:43:08.935293 MTRR: Fixed MSR 0x26d 0x0606060606060606
2472 01:43:08.941806 MTRR: Fixed MSR 0x26e 0x0606060606060606
2473 01:43:08.945045 MTRR: Fixed MSR 0x26f 0x0606060606060606
2474 01:43:08.948250 call enable_fixed_mtrr()
2475 01:43:08.951637 CPU physical address size: 39 bits
2476 01:43:08.954932 MTRR: default type WB/UC MTRR counts: 6/6.
2477 01:43:08.958102 MTRR: UC selected as default type.
2478 01:43:08.964913 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2479 01:43:08.971244 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2480 01:43:08.977839 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2481 01:43:08.984859 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2482 01:43:08.991644 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2483 01:43:08.998061 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2484 01:43:09.001173 MTRR: Fixed MSR 0x250 0x0606060606060606
2485 01:43:09.007848 MTRR: Fixed MSR 0x258 0x0606060606060606
2486 01:43:09.011230 MTRR: Fixed MSR 0x259 0x0000000000000000
2487 01:43:09.014509 MTRR: Fixed MSR 0x268 0x0606060606060606
2488 01:43:09.017971 MTRR: Fixed MSR 0x269 0x0606060606060606
2489 01:43:09.024306 MTRR: Fixed MSR 0x26a 0x0606060606060606
2490 01:43:09.027724 MTRR: Fixed MSR 0x26b 0x0606060606060606
2491 01:43:09.031147 MTRR: Fixed MSR 0x26c 0x0606060606060606
2492 01:43:09.034161 MTRR: Fixed MSR 0x26d 0x0606060606060606
2493 01:43:09.037731 MTRR: Fixed MSR 0x26e 0x0606060606060606
2494 01:43:09.044124 MTRR: Fixed MSR 0x26f 0x0606060606060606
2495 01:43:09.047663 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 01:43:09.050867 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 01:43:09.054306 call enable_fixed_mtrr()
2498 01:43:09.057562 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 01:43:09.060766 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 01:43:09.067595 MTRR: Fixed MSR 0x250 0x0606060606060606
2501 01:43:09.071069 MTRR: Fixed MSR 0x258 0x0606060606060606
2502 01:43:09.074189 MTRR: Fixed MSR 0x259 0x0000000000000000
2503 01:43:09.077730 MTRR: Fixed MSR 0x268 0x0606060606060606
2504 01:43:09.084468 MTRR: Fixed MSR 0x269 0x0606060606060606
2505 01:43:09.087769 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 01:43:09.090707 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 01:43:09.094550 MTRR: Fixed MSR 0x268 0x0606060606060606
2508 01:43:09.100596 MTRR: Fixed MSR 0x269 0x0606060606060606
2509 01:43:09.104343 MTRR: Fixed MSR 0x26a 0x0606060606060606
2510 01:43:09.107409 MTRR: Fixed MSR 0x26b 0x0606060606060606
2511 01:43:09.110599 MTRR: Fixed MSR 0x26c 0x0606060606060606
2512 01:43:09.114071 MTRR: Fixed MSR 0x26d 0x0606060606060606
2513 01:43:09.120984 MTRR: Fixed MSR 0x26e 0x0606060606060606
2514 01:43:09.123810 MTRR: Fixed MSR 0x26f 0x0606060606060606
2515 01:43:09.127283 MTRR: Fixed MSR 0x258 0x0606060606060606
2516 01:43:09.130688 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 01:43:09.137293 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 01:43:09.140335 MTRR: Fixed MSR 0x26a 0x0606060606060606
2519 01:43:09.144004 CPU physical address size: 39 bits
2520 01:43:09.147253 MTRR: Fixed MSR 0x259 0x0000000000000000
2521 01:43:09.150480 call enable_fixed_mtrr()
2522 01:43:09.153578 MTRR: Fixed MSR 0x259 0x0000000000000000
2523 01:43:09.157524 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 01:43:09.164045 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 01:43:09.167156 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 01:43:09.170274 MTRR: Fixed MSR 0x26a 0x0606060606060606
2527 01:43:09.173785 MTRR: Fixed MSR 0x26b 0x0606060606060606
2528 01:43:09.180476 MTRR: Fixed MSR 0x26c 0x0606060606060606
2529 01:43:09.183725 MTRR: Fixed MSR 0x26d 0x0606060606060606
2530 01:43:09.186990 MTRR: Fixed MSR 0x26e 0x0606060606060606
2531 01:43:09.190450 MTRR: Fixed MSR 0x26f 0x0606060606060606
2532 01:43:09.196964 MTRR: Fixed MSR 0x259 0x0000000000000000
2533 01:43:09.197044 call enable_fixed_mtrr()
2534 01:43:09.203600 MTRR: Fixed MSR 0x268 0x0606060606060606
2535 01:43:09.206679 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 01:43:09.210289 MTRR: Fixed MSR 0x26b 0x0606060606060606
2537 01:43:09.213296 MTRR: Fixed MSR 0x269 0x0606060606060606
2538 01:43:09.216786 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 01:43:09.223338 MTRR: Fixed MSR 0x26b 0x0606060606060606
2540 01:43:09.227124 MTRR: Fixed MSR 0x26c 0x0606060606060606
2541 01:43:09.229875 MTRR: Fixed MSR 0x26d 0x0606060606060606
2542 01:43:09.233226 MTRR: Fixed MSR 0x26e 0x0606060606060606
2543 01:43:09.239801 MTRR: Fixed MSR 0x26f 0x0606060606060606
2544 01:43:09.243087 CPU physical address size: 39 bits
2545 01:43:09.246567 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 01:43:09.250099 CPU physical address size: 39 bits
2547 01:43:09.253338 MTRR: Fixed MSR 0x26c 0x0606060606060606
2548 01:43:09.256631 MTRR: Fixed MSR 0x269 0x0606060606060606
2549 01:43:09.259955 call enable_fixed_mtrr()
2550 01:43:09.263273 MTRR: Fixed MSR 0x259 0x0000000000000000
2551 01:43:09.269920 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 01:43:09.273538 MTRR: Fixed MSR 0x26b 0x0606060606060606
2553 01:43:09.276687 MTRR: Fixed MSR 0x26c 0x0606060606060606
2554 01:43:09.279806 MTRR: Fixed MSR 0x26d 0x0606060606060606
2555 01:43:09.286706 MTRR: Fixed MSR 0x26e 0x0606060606060606
2556 01:43:09.289835 MTRR: Fixed MSR 0x26f 0x0606060606060606
2557 01:43:09.293137 CPU physical address size: 39 bits
2558 01:43:09.296261 MTRR: Fixed MSR 0x268 0x0606060606060606
2559 01:43:09.299509 call enable_fixed_mtrr()
2560 01:43:09.303178 MTRR: Fixed MSR 0x269 0x0606060606060606
2561 01:43:09.306630 CPU physical address size: 39 bits
2562 01:43:09.309891 MTRR: Fixed MSR 0x26a 0x0606060606060606
2563 01:43:09.316404 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 01:43:09.319752 MTRR: Fixed MSR 0x26b 0x0606060606060606
2565 01:43:09.322910 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 01:43:09.326046 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 01:43:09.332807 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 01:43:09.335997 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 01:43:09.339721 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 01:43:09.342973 call enable_fixed_mtrr()
2571 01:43:09.346193 MTRR: Fixed MSR 0x26f 0x0606060606060606
2572 01:43:09.349584 CPU physical address size: 39 bits
2573 01:43:09.353142 call enable_fixed_mtrr()
2574 01:43:09.356242 CPU physical address size: 39 bits
2575 01:43:09.356341
2576 01:43:09.359588 MTRR check
2577 01:43:09.362896 Fixed MTRRs : Enabled
2578 01:43:09.363003 Variable MTRRs: Enabled
2579 01:43:09.363093
2580 01:43:09.369371 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2581 01:43:09.372842 Checking cr50 for pending updates
2582 01:43:09.385016 Reading cr50 TPM mode
2583 01:43:09.400094 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2584 01:43:09.410197 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2585 01:43:09.413412 Checking segment from ROM address 0xf96cbe6c
2586 01:43:09.416796 Checking segment from ROM address 0xf96cbe88
2587 01:43:09.423479 Loading segment from ROM address 0xf96cbe6c
2588 01:43:09.423580 code (compression=1)
2589 01:43:09.433315 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2590 01:43:09.443369 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2591 01:43:09.443472 using LZMA
2592 01:43:09.465221 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2593 01:43:09.472054 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2594 01:43:09.480000 Loading segment from ROM address 0xf96cbe88
2595 01:43:09.483199 Entry Point 0x30000000
2596 01:43:09.483299 Loaded segments
2597 01:43:09.489740 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2598 01:43:09.496672 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2599 01:43:09.500028 Finalizing chipset.
2600 01:43:09.503399 apm_control: Finalizing SMM.
2601 01:43:09.503499 APMC done.
2602 01:43:09.506452 HECI: CSE device 16.1 is disabled
2603 01:43:09.509823 HECI: CSE device 16.2 is disabled
2604 01:43:09.513164 HECI: CSE device 16.3 is disabled
2605 01:43:09.516478 HECI: CSE device 16.4 is disabled
2606 01:43:09.519774 HECI: CSE device 16.5 is disabled
2607 01:43:09.523247 HECI: Sending End-of-Post
2608 01:43:09.531886 CSE: EOP requested action: continue boot
2609 01:43:09.535263 CSE EOP successful, continuing boot
2610 01:43:09.542050 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2611 01:43:09.545241 mp_park_aps done after 0 msecs.
2612 01:43:09.548265 Jumping to boot code at 0x30000000(0x76891000)
2613 01:43:09.558392 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2614 01:43:09.562275
2615 01:43:09.562356
2616 01:43:09.562420
2617 01:43:09.565974 Starting depthcharge on Volmar...
2618 01:43:09.566055
2619 01:43:09.566432 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2620 01:43:09.566528 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2621 01:43:09.566610 Setting prompt string to ['brya:']
2622 01:43:09.566688 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2623 01:43:09.572467 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2624 01:43:09.572550
2625 01:43:09.579005 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2626 01:43:09.579087
2627 01:43:09.585641 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2628 01:43:09.585722
2629 01:43:09.589178 configure_storage: Failed to remap 1C:2
2630 01:43:09.589261
2631 01:43:09.592359 Wipe memory regions:
2632 01:43:09.592440
2633 01:43:09.595454 [0x00000000001000, 0x000000000a0000)
2634 01:43:09.595537
2635 01:43:09.598917 [0x00000000100000, 0x00000030000000)
2636 01:43:09.701524
2637 01:43:09.704317 [0x00000032668e60, 0x00000076857000)
2638 01:43:09.849200
2639 01:43:09.851941 [0x00000100000000, 0x0000027fc00000)
2640 01:43:10.662173
2641 01:43:10.665528 ec_init: CrosEC protocol v3 supported (256, 256)
2642 01:43:11.273625
2643 01:43:11.273764 R8152: Initializing
2644 01:43:11.273836
2645 01:43:11.276926 Version 9 (ocp_data = 6010)
2646 01:43:11.277012
2647 01:43:11.280124 R8152: Done initializing
2648 01:43:11.280208
2649 01:43:11.283372 Adding net device
2650 01:43:11.584198
2651 01:43:11.587589 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2652 01:43:11.587690
2653 01:43:11.587757
2654 01:43:11.587818
2655 01:43:11.588095 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 01:43:11.688406 brya: tftpboot 192.168.201.1 12070474/tftp-deploy-hy2rfoez/kernel/bzImage 12070474/tftp-deploy-hy2rfoez/kernel/cmdline 12070474/tftp-deploy-hy2rfoez/ramdisk/ramdisk.cpio.gz
2658 01:43:11.688574 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2659 01:43:11.688663 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2660 01:43:11.692628 tftpboot 192.168.201.1 12070474/tftp-deploy-hy2rfoez/kernel/bzImloy-hy2rfoez/kernel/cmdline 12070474/tftp-deploy-hy2rfoez/ramdisk/ramdisk.cpio.gz
2661 01:43:11.692723
2662 01:43:11.692824 Waiting for link
2663 01:43:11.895724
2664 01:43:11.895871 done.
2665 01:43:11.895969
2666 01:43:11.896068 MAC: 00:e0:4c:68:01:74
2667 01:43:11.896169
2668 01:43:11.898845 Sending DHCP discover... done.
2669 01:43:11.898948
2670 01:43:11.902093 Waiting for reply... done.
2671 01:43:11.902206
2672 01:43:11.905386 Sending DHCP request... done.
2673 01:43:11.905486
2674 01:43:11.908631 Waiting for reply... done.
2675 01:43:11.911713
2676 01:43:11.911809 My ip is 192.168.201.16
2677 01:43:11.911897
2678 01:43:11.914994 The DHCP server ip is 192.168.201.1
2679 01:43:11.915063
2680 01:43:11.921948 TFTP server IP predefined by user: 192.168.201.1
2681 01:43:11.922024
2682 01:43:11.928580 Bootfile predefined by user: 12070474/tftp-deploy-hy2rfoez/kernel/bzImage
2683 01:43:11.928678
2684 01:43:11.931618 Sending tftp read request... done.
2685 01:43:11.931695
2686 01:43:11.935297 Waiting for the transfer...
2687 01:43:11.935402
2688 01:43:12.198606 00000000 ################################################################
2689 01:43:12.198754
2690 01:43:12.458389 00080000 ################################################################
2691 01:43:12.458552
2692 01:43:12.713787 00100000 ################################################################
2693 01:43:12.713921
2694 01:43:12.966526 00180000 ################################################################
2695 01:43:12.966658
2696 01:43:13.216379 00200000 ################################################################
2697 01:43:13.216535
2698 01:43:13.465214 00280000 ################################################################
2699 01:43:13.465360
2700 01:43:13.715704 00300000 ################################################################
2701 01:43:13.715880
2702 01:43:13.966158 00380000 ################################################################
2703 01:43:13.966290
2704 01:43:14.218085 00400000 ################################################################
2705 01:43:14.218259
2706 01:43:14.468605 00480000 ################################################################
2707 01:43:14.468739
2708 01:43:14.720677 00500000 ################################################################
2709 01:43:14.720808
2710 01:43:14.976615 00580000 ################################################################
2711 01:43:14.976757
2712 01:43:15.228526 00600000 ################################################################
2713 01:43:15.228655
2714 01:43:15.480310 00680000 ################################################################
2715 01:43:15.480474
2716 01:43:15.732312 00700000 ################################################################
2717 01:43:15.732445
2718 01:43:16.000560 00780000 ################################################################
2719 01:43:16.000689
2720 01:43:16.272878 00800000 ################################################################
2721 01:43:16.273006
2722 01:43:16.541936 00880000 ################################################################
2723 01:43:16.542065
2724 01:43:16.802350 00900000 ################################################################
2725 01:43:16.802476
2726 01:43:17.069765 00980000 ################################################################
2727 01:43:17.069900
2728 01:43:17.322074 00a00000 ################################################################
2729 01:43:17.322205
2730 01:43:17.584362 00a80000 ################################################################
2731 01:43:17.584529
2732 01:43:17.844694 00b00000 ################################################################
2733 01:43:17.844828
2734 01:43:18.108210 00b80000 ################################################################
2735 01:43:18.108354
2736 01:43:18.361767 00c00000 ################################################################
2737 01:43:18.361897
2738 01:43:18.626994 00c80000 ################################################################
2739 01:43:18.627130
2740 01:43:18.865245 00d00000 ############################################################## done.
2741 01:43:18.868313
2742 01:43:18.871750 The bootfile was 14136928 bytes long.
2743 01:43:18.871838
2744 01:43:18.874851 Sending tftp read request... done.
2745 01:43:18.874936
2746 01:43:18.878166 Waiting for the transfer...
2747 01:43:18.878251
2748 01:43:19.135214 00000000 ################################################################
2749 01:43:19.135346
2750 01:43:19.414470 00080000 ################################################################
2751 01:43:19.414607
2752 01:43:19.670863 00100000 ################################################################
2753 01:43:19.671164
2754 01:43:20.015281 00180000 ################################################################
2755 01:43:20.015827
2756 01:43:20.315572 00200000 ################################################################
2757 01:43:20.315710
2758 01:43:20.603651 00280000 ################################################################
2759 01:43:20.603781
2760 01:43:20.891828 00300000 ################################################################
2761 01:43:20.891993
2762 01:43:21.151559 00380000 ################################################################
2763 01:43:21.151703
2764 01:43:21.414319 00400000 ################################################################
2765 01:43:21.414498
2766 01:43:21.689312 00480000 ################################################################
2767 01:43:21.689452
2768 01:43:21.949503 00500000 ################################################################
2769 01:43:21.949658
2770 01:43:22.236418 00580000 ################################################################
2771 01:43:22.236585
2772 01:43:22.518920 00600000 ################################################################
2773 01:43:22.519067
2774 01:43:22.802367 00680000 ################################################################
2775 01:43:22.802504
2776 01:43:23.071184 00700000 ################################################################
2777 01:43:23.071327
2778 01:43:23.328101 00780000 ################################################################
2779 01:43:23.328260
2780 01:43:23.583905 00800000 ################################################################
2781 01:43:23.584067
2782 01:43:23.764899 00880000 ############################################### done.
2783 01:43:23.765051
2784 01:43:23.768119 Sending tftp read request... done.
2785 01:43:23.768218
2786 01:43:23.771399 Waiting for the transfer...
2787 01:43:23.771496
2788 01:43:23.774858 00000000 # done.
2789 01:43:23.774963
2790 01:43:23.781116 Command line loaded dynamically from TFTP file: 12070474/tftp-deploy-hy2rfoez/kernel/cmdline
2791 01:43:23.781192
2792 01:43:23.797937 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2793 01:43:23.803889
2794 01:43:23.806980 Shutting down all USB controllers.
2795 01:43:23.807053
2796 01:43:23.807115 Removing current net device
2797 01:43:23.807173
2798 01:43:23.810540 Finalizing coreboot
2799 01:43:23.810636
2800 01:43:23.817092 Exiting depthcharge with code 4 at timestamp: 24497477
2801 01:43:23.817199
2802 01:43:23.817289
2803 01:43:23.817381 Starting kernel ...
2804 01:43:23.817468
2805 01:43:23.817552
2806 01:43:23.818182 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2807 01:43:23.818277 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2808 01:43:23.818363 Setting prompt string to ['Linux version [0-9]']
2809 01:43:23.818432 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2810 01:43:23.818499 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2812 01:47:50.819287 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2814 01:47:50.820605 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2816 01:47:50.821624 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2819 01:47:50.823013 end: 2 depthcharge-action (duration 00:05:00) [common]
2821 01:47:50.823883 Cleaning after the job
2822 01:47:50.823965 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/ramdisk
2823 01:47:50.825468 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/kernel
2824 01:47:50.827596 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12070474/tftp-deploy-hy2rfoez/modules
2825 01:47:50.828211 start: 5.1 power-off (timeout 00:00:30) [common]
2826 01:47:50.828364 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=off'
2827 01:47:50.906222 >> Command sent successfully.
2828 01:47:50.910937 Returned 0 in 0 seconds
2829 01:47:51.012021 end: 5.1 power-off (duration 00:00:00) [common]
2831 01:47:51.013608 start: 5.2 read-feedback (timeout 00:10:00) [common]
2832 01:47:51.014881 Listened to connection for namespace 'common' for up to 1s
2833 01:47:52.015496 Finalising connection for namespace 'common'
2834 01:47:52.016173 Disconnecting from shell: Finalise
2835 01:47:52.016638
2836 01:47:52.117693 end: 5.2 read-feedback (duration 00:00:01) [common]
2837 01:47:52.118300 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12070474
2838 01:47:52.139771 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12070474
2839 01:47:52.139901 JobError: Your job cannot terminate cleanly.