Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Kernel Errors: 0
1 01:45:31.403990 lava-dispatcher, installed at version: 2024.01
2 01:45:31.404184 start: 0 validate
3 01:45:31.404318 Start time: 2024-02-06 01:45:31.404310+00:00 (UTC)
4 01:45:31.404437 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:45:31.404567 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 01:45:31.673427 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:45:31.673628 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.209-cip44-rt18%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:45:31.939619 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:45:31.939781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.209-cip44-rt18%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 01:45:36.674986 validate duration: 5.27
12 01:45:36.675306 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:45:36.675437 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:45:36.675558 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:45:36.675712 Not decompressing ramdisk as can be used compressed.
16 01:45:36.675871 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 01:45:36.676005 saving as /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/ramdisk/rootfs.cpio.gz
18 01:45:36.676139 total size: 8418130 (8 MB)
19 01:45:37.337636 progress 0 % (0 MB)
20 01:45:37.343094 progress 5 % (0 MB)
21 01:45:37.345314 progress 10 % (0 MB)
22 01:45:37.347576 progress 15 % (1 MB)
23 01:45:37.349795 progress 20 % (1 MB)
24 01:45:37.352114 progress 25 % (2 MB)
25 01:45:37.354565 progress 30 % (2 MB)
26 01:45:37.356648 progress 35 % (2 MB)
27 01:45:37.358981 progress 40 % (3 MB)
28 01:45:37.361229 progress 45 % (3 MB)
29 01:45:37.363654 progress 50 % (4 MB)
30 01:45:37.366063 progress 55 % (4 MB)
31 01:45:37.368268 progress 60 % (4 MB)
32 01:45:37.370406 progress 65 % (5 MB)
33 01:45:37.372631 progress 70 % (5 MB)
34 01:45:37.374893 progress 75 % (6 MB)
35 01:45:37.377185 progress 80 % (6 MB)
36 01:45:37.379404 progress 85 % (6 MB)
37 01:45:37.381575 progress 90 % (7 MB)
38 01:45:37.383789 progress 95 % (7 MB)
39 01:45:37.385812 progress 100 % (8 MB)
40 01:45:37.386082 8 MB downloaded in 0.71 s (11.31 MB/s)
41 01:45:37.386240 end: 1.1.1 http-download (duration 00:00:01) [common]
43 01:45:37.386477 end: 1.1 download-retry (duration 00:00:01) [common]
44 01:45:37.386567 start: 1.2 download-retry (timeout 00:09:59) [common]
45 01:45:37.386651 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 01:45:37.386790 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.209-cip44-rt18/x86_64/defconfig+x86-board/gcc-10/kernel/bzImage
47 01:45:37.386863 saving as /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/kernel/bzImage
48 01:45:37.386926 total size: 14142176 (13 MB)
49 01:45:37.386988 No compression specified
50 01:45:37.388312 progress 0 % (0 MB)
51 01:45:37.392019 progress 5 % (0 MB)
52 01:45:37.395750 progress 10 % (1 MB)
53 01:45:37.399323 progress 15 % (2 MB)
54 01:45:37.403100 progress 20 % (2 MB)
55 01:45:37.406706 progress 25 % (3 MB)
56 01:45:37.410573 progress 30 % (4 MB)
57 01:45:37.414376 progress 35 % (4 MB)
58 01:45:37.418000 progress 40 % (5 MB)
59 01:45:37.421707 progress 45 % (6 MB)
60 01:45:37.425340 progress 50 % (6 MB)
61 01:45:37.429230 progress 55 % (7 MB)
62 01:45:37.432881 progress 60 % (8 MB)
63 01:45:37.436969 progress 65 % (8 MB)
64 01:45:37.440876 progress 70 % (9 MB)
65 01:45:37.444626 progress 75 % (10 MB)
66 01:45:37.448539 progress 80 % (10 MB)
67 01:45:37.452297 progress 85 % (11 MB)
68 01:45:37.456311 progress 90 % (12 MB)
69 01:45:37.460145 progress 95 % (12 MB)
70 01:45:37.463807 progress 100 % (13 MB)
71 01:45:37.464026 13 MB downloaded in 0.08 s (174.94 MB/s)
72 01:45:37.464201 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:45:37.464474 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:45:37.464596 start: 1.3 download-retry (timeout 00:09:59) [common]
76 01:45:37.464735 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 01:45:37.464916 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.209-cip44-rt18/x86_64/defconfig+x86-board/gcc-10/modules.tar.xz
78 01:45:37.465012 saving as /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/modules/modules.tar
79 01:45:37.465077 total size: 527968 (0 MB)
80 01:45:37.465141 Using unxz to decompress xz
81 01:45:37.470155 progress 6 % (0 MB)
82 01:45:37.470625 progress 12 % (0 MB)
83 01:45:37.470885 progress 18 % (0 MB)
84 01:45:37.472483 progress 24 % (0 MB)
85 01:45:37.474603 progress 31 % (0 MB)
86 01:45:37.476721 progress 37 % (0 MB)
87 01:45:37.478937 progress 43 % (0 MB)
88 01:45:37.481013 progress 49 % (0 MB)
89 01:45:37.483171 progress 55 % (0 MB)
90 01:45:37.485321 progress 62 % (0 MB)
91 01:45:37.487616 progress 68 % (0 MB)
92 01:45:37.489695 progress 74 % (0 MB)
93 01:45:37.491936 progress 80 % (0 MB)
94 01:45:37.494286 progress 86 % (0 MB)
95 01:45:37.496378 progress 93 % (0 MB)
96 01:45:37.498430 progress 99 % (0 MB)
97 01:45:37.505673 0 MB downloaded in 0.04 s (12.41 MB/s)
98 01:45:37.505960 end: 1.3.1 http-download (duration 00:00:00) [common]
100 01:45:37.506240 end: 1.3 download-retry (duration 00:00:00) [common]
101 01:45:37.506339 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 01:45:37.506437 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 01:45:37.506519 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 01:45:37.506631 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 01:45:37.506858 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v
106 01:45:37.506995 makedir: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin
107 01:45:37.507100 makedir: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/tests
108 01:45:37.507202 makedir: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/results
109 01:45:37.507319 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-add-keys
110 01:45:37.507475 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-add-sources
111 01:45:37.507613 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-background-process-start
112 01:45:37.507748 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-background-process-stop
113 01:45:37.507878 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-common-functions
114 01:45:37.508004 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-echo-ipv4
115 01:45:37.508131 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-install-packages
116 01:45:37.508259 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-installed-packages
117 01:45:37.508386 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-os-build
118 01:45:37.508513 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-probe-channel
119 01:45:37.508639 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-probe-ip
120 01:45:37.508766 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-target-ip
121 01:45:37.508894 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-target-mac
122 01:45:37.509020 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-target-storage
123 01:45:37.509155 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-case
124 01:45:37.509284 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-event
125 01:45:37.509409 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-feedback
126 01:45:37.509538 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-raise
127 01:45:37.509663 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-reference
128 01:45:37.509791 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-runner
129 01:45:37.509954 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-set
130 01:45:37.510084 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-test-shell
131 01:45:37.510215 Updating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-install-packages (oe)
132 01:45:37.510397 Updating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/bin/lava-installed-packages (oe)
133 01:45:37.510526 Creating /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/environment
134 01:45:37.510631 LAVA metadata
135 01:45:37.510711 - LAVA_JOB_ID=12705362
136 01:45:37.510777 - LAVA_DISPATCHER_IP=192.168.201.1
137 01:45:37.510884 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 01:45:37.510956 skipped lava-vland-overlay
139 01:45:37.511036 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 01:45:37.511131 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 01:45:37.511197 skipped lava-multinode-overlay
142 01:45:37.511272 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 01:45:37.511355 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 01:45:37.511431 Loading test definitions
145 01:45:37.511527 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 01:45:37.511602 Using /lava-12705362 at stage 0
147 01:45:37.511932 uuid=12705362_1.4.2.3.1 testdef=None
148 01:45:37.512021 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 01:45:37.512109 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 01:45:37.512649 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 01:45:37.512880 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 01:45:37.513523 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 01:45:37.513756 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 01:45:37.514448 runner path: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/0/tests/0_dmesg test_uuid 12705362_1.4.2.3.1
157 01:45:37.514607 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 01:45:37.514842 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 01:45:37.514916 Using /lava-12705362 at stage 1
161 01:45:37.515219 uuid=12705362_1.4.2.3.5 testdef=None
162 01:45:37.515310 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 01:45:37.515395 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 01:45:37.515867 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 01:45:37.516090 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 01:45:37.516738 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 01:45:37.516968 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 01:45:37.517604 runner path: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/1/tests/1_bootrr test_uuid 12705362_1.4.2.3.5
171 01:45:37.517758 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 01:45:37.518027 Creating lava-test-runner.conf files
174 01:45:37.518093 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/0 for stage 0
175 01:45:37.518186 - 0_dmesg
176 01:45:37.518269 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12705362/lava-overlay-3sf89s9v/lava-12705362/1 for stage 1
177 01:45:37.518361 - 1_bootrr
178 01:45:37.518457 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 01:45:37.518572 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 01:45:37.526886 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 01:45:37.527006 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 01:45:37.527096 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 01:45:37.527184 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 01:45:37.527269 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 01:45:37.788183 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 01:45:37.788585 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 01:45:37.788714 extracting modules file /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12705362/extract-overlay-ramdisk-bsc2w3w4/ramdisk
188 01:45:37.813404 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 01:45:37.813578 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 01:45:37.813673 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12705362/compress-overlay-i4u7o804/overlay-1.4.2.4.tar.gz to ramdisk
191 01:45:37.813744 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12705362/compress-overlay-i4u7o804/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12705362/extract-overlay-ramdisk-bsc2w3w4/ramdisk
192 01:45:37.822188 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 01:45:37.822311 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 01:45:37.822407 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 01:45:37.822495 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 01:45:37.822574 Building ramdisk /var/lib/lava/dispatcher/tmp/12705362/extract-overlay-ramdisk-bsc2w3w4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12705362/extract-overlay-ramdisk-bsc2w3w4/ramdisk
197 01:45:37.966047 >> 54154 blocks
198 01:45:38.885346 rename /var/lib/lava/dispatcher/tmp/12705362/extract-overlay-ramdisk-bsc2w3w4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/ramdisk/ramdisk.cpio.gz
199 01:45:38.885798 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 01:45:38.885987 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 01:45:38.886127 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 01:45:38.886240 No mkimage arch provided, not using FIT.
203 01:45:38.886332 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 01:45:38.886418 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 01:45:38.886546 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 01:45:38.886638 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 01:45:38.886719 No LXC device requested
208 01:45:38.886797 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 01:45:38.886885 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 01:45:38.886997 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 01:45:38.887072 Checking files for TFTP limit of 4294967296 bytes.
212 01:45:38.887500 end: 1 tftp-deploy (duration 00:00:02) [common]
213 01:45:38.887604 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 01:45:38.887700 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 01:45:38.887828 substitutions:
216 01:45:38.887916 - {DTB}: None
217 01:45:38.887982 - {INITRD}: 12705362/tftp-deploy-xt0c8w_3/ramdisk/ramdisk.cpio.gz
218 01:45:38.888045 - {KERNEL}: 12705362/tftp-deploy-xt0c8w_3/kernel/bzImage
219 01:45:38.888118 - {LAVA_MAC}: None
220 01:45:38.888176 - {PRESEED_CONFIG}: None
221 01:45:38.888233 - {PRESEED_LOCAL}: None
222 01:45:38.888289 - {RAMDISK}: 12705362/tftp-deploy-xt0c8w_3/ramdisk/ramdisk.cpio.gz
223 01:45:38.888374 - {ROOT_PART}: None
224 01:45:38.888430 - {ROOT}: None
225 01:45:38.888485 - {SERVER_IP}: 192.168.201.1
226 01:45:38.888540 - {TEE}: None
227 01:45:38.888596 Parsed boot commands:
228 01:45:38.888650 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 01:45:38.888849 Parsed boot commands: tftpboot 192.168.201.1 12705362/tftp-deploy-xt0c8w_3/kernel/bzImage 12705362/tftp-deploy-xt0c8w_3/kernel/cmdline 12705362/tftp-deploy-xt0c8w_3/ramdisk/ramdisk.cpio.gz
230 01:45:38.888939 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 01:45:38.889024 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 01:45:38.889118 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 01:45:38.889206 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 01:45:38.889347 Not connected, no need to disconnect.
235 01:45:38.889481 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 01:45:38.889581 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 01:45:38.889651 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
238 01:45:38.893748 Setting prompt string to ['lava-test: # ']
239 01:45:38.894127 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 01:45:38.894251 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 01:45:38.894361 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 01:45:38.894465 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 01:45:38.894675 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
244 01:45:44.031534 >> Command sent successfully.
245 01:45:44.034049 Returned 0 in 5 seconds
246 01:45:44.134411 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 01:45:44.134748 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 01:45:44.134845 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 01:45:44.134933 Setting prompt string to 'Starting depthcharge on Volmar...'
251 01:45:44.135005 Changing prompt to 'Starting depthcharge on Volmar...'
252 01:45:44.135074 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 01:45:44.135329 [Enter `^Ec?' for help]
254 01:45:45.510863
255 01:45:45.511026
256 01:45:45.517358 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 01:45:45.520750 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 01:45:45.527522 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 01:45:45.530868 CPU: AES supported, TXT NOT supported, VT supported
260 01:45:45.542252 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 01:45:45.542354 Cache size = 10 MiB
262 01:45:45.545337 MCH: device id 4609 (rev 04) is Alderlake-P
263 01:45:45.552777 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 01:45:45.555808 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 01:45:45.559595 VBOOT: Loading verstage.
266 01:45:45.562963 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 01:45:45.569738 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 01:45:45.572968 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 01:45:45.580303 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 01:45:45.590194 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 01:45:45.590292
272 01:45:45.590359
273 01:45:45.597487 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 01:45:45.605160 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 01:45:45.608837 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 01:45:45.612204 I2C TX abort detected (00000001)
277 01:45:45.615291 cr50_i2c_read: Address write failed
278 01:45:45.627142 .done! DID_VID 0x00281ae0
279 01:45:45.630438 TPM ready after 0 ms
280 01:45:45.633904 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 01:45:45.647652 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 01:45:45.651621 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 01:45:45.703900 tlcl_send_startup: Startup return code is 0
284 01:45:45.704075 TPM: setup succeeded
285 01:45:45.726162 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 01:45:45.747468 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 01:45:45.751208 Chrome EC: UHEPI supported
288 01:45:45.754561 Reading cr50 boot mode
289 01:45:45.769564 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 01:45:45.769663 Phase 1
291 01:45:45.776031 FMAP: area GBB found @ 1805000 (458752 bytes)
292 01:45:45.782651 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 01:45:45.789817 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 01:45:45.796427 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 01:45:45.796516 Phase 2
296 01:45:45.799551 Phase 3
297 01:45:45.802883 FMAP: area GBB found @ 1805000 (458752 bytes)
298 01:45:45.809769 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 01:45:45.813297 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 01:45:45.819653 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 01:45:45.826391 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 01:45:45.833374 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 01:45:45.840133 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 01:45:45.854411 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 01:45:45.858051 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 01:45:45.864874 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 01:45:45.871377 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 01:45:45.878281 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 01:45:45.884741 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 01:45:45.888687 Phase 4
311 01:45:45.892075 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 01:45:45.898595 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 01:45:46.110859 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 01:45:46.117374 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 01:45:46.120776 Saving vboot hash.
316 01:45:46.127356 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 01:45:46.143667 tlcl_extend: response is 0
318 01:45:46.150135 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 01:45:46.153421 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 01:45:46.171849 tlcl_extend: response is 0
321 01:45:46.178549 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 01:45:46.197644 tlcl_lock_nv_write: response is 0
323 01:45:46.216829 tlcl_lock_nv_write: response is 0
324 01:45:46.216968 Slot A is selected
325 01:45:46.223701 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 01:45:46.230433 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 01:45:46.237226 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 01:45:46.243639 BS: verstage times (exec / console): total (unknown) / 264 ms
329 01:45:46.243758
330 01:45:46.243841
331 01:45:46.249895 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 01:45:46.254175 Google Chrome EC: version:
333 01:45:46.257560 ro: volmar_v2.0.14126-e605144e9c
334 01:45:46.260697 rw: volmar_v0.0.55-22d1557
335 01:45:46.264053 running image: 2
336 01:45:46.267516 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 01:45:46.277548 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 01:45:46.284488 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 01:45:46.290890 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 01:45:46.300738 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 01:45:46.310785 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 01:45:46.314647 EC took 941us to calculate image hash
343 01:45:46.324508 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 01:45:46.327549 VB2:sync_ec() select_rw=RW(active)
345 01:45:46.340523 Waited 270us to clear limit power flag.
346 01:45:46.343292 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 01:45:46.347054 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 01:45:46.350275 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 01:45:46.357109 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 01:45:46.360420 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
351 01:45:46.363881 TCO_STS: 0000 0000
352 01:45:46.364005 GEN_PMCON: d0015038 00002200
353 01:45:46.367366 GBLRST_CAUSE: 00000000 00000000
354 01:45:46.370112 HPR_CAUSE0: 00000000
355 01:45:46.373287 prev_sleep_state 5
356 01:45:46.376798 Abort disabling TXT, as CPU is not TXT capable.
357 01:45:46.385481 cse_lite: Number of partitions = 3
358 01:45:46.388420 cse_lite: Current partition = RO
359 01:45:46.388520 cse_lite: Next partition = RO
360 01:45:46.391869 cse_lite: Flags = 0x7
361 01:45:46.398627 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 01:45:46.408294 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 01:45:46.411989 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 01:45:46.418348 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 01:45:46.425499 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 01:45:46.432248 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 01:45:46.435258 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 01:45:46.441775 cse_lite: Set Boot Partition Info Command (RW)
369 01:45:46.445179 HECI: Global Reset(Type:1) Command
370 01:45:47.870804 �
371 01:45:47.874077 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
372 01:45:47.880637 CPU: AES supported, TXT NOT supported, VT supported
373 01:45:47.887674 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
374 01:45:47.890462 Cache size = 10 MiB
375 01:45:47.894317 MCH: device id 4609 (rev 04) is Alderlake-P
376 01:45:47.897409 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
377 01:45:47.903964 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
378 01:45:47.907985 VBOOT: Loading verstage.
379 01:45:47.911505 FMAP: Found "FLASH" version 1.1 at 0x1804000.
380 01:45:47.914997 FMAP: base = 0x0 size = 0x2000000 #areas = 37
381 01:45:47.921983 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
382 01:45:47.929238 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
383 01:45:47.936006 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
384 01:45:47.939467
385 01:45:47.939861
386 01:45:47.946297 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
387 01:45:47.952838 Probing TPM I2C: I2C bus 1 version 0x3230302a
388 01:45:47.956378 DW I2C bus 1 at 0xfe022000 (400 KHz)
389 01:45:47.959747 done! DID_VID 0x00281ae0
390 01:45:47.963754 TPM ready after 0 ms
391 01:45:47.966911 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
392 01:45:47.975550 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
393 01:45:47.982456 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
394 01:45:48.037267 tlcl_send_startup: Startup return code is 0
395 01:45:48.037765 TPM: setup succeeded
396 01:45:48.058835 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
397 01:45:48.080902 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
398 01:45:48.084418 Chrome EC: UHEPI supported
399 01:45:48.087747 Reading cr50 boot mode
400 01:45:48.103169 Cr50 says boot_mode is VERIFIED_RW(0x00).
401 01:45:48.103704 Phase 1
402 01:45:48.109382 FMAP: area GBB found @ 1805000 (458752 bytes)
403 01:45:48.115919 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
404 01:45:48.122687 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
405 01:45:48.129661 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
406 01:45:48.130213 Phase 2
407 01:45:48.133002 Phase 3
408 01:45:48.136913 FMAP: area GBB found @ 1805000 (458752 bytes)
409 01:45:48.143658 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 01:45:48.146745 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 01:45:48.153360 VB2:vb2_verify_keyblock() Checking keyblock signature...
412 01:45:48.159958 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
413 01:45:48.166419 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
414 01:45:48.173465 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
415 01:45:48.188123 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 01:45:48.191259 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
417 01:45:48.197676 VB2:vb2_verify_fw_preamble() Verifying preamble.
418 01:45:48.204499 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
419 01:45:48.211419 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
420 01:45:48.217619 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
421 01:45:48.221538 Phase 4
422 01:45:48.225281 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
423 01:45:48.231662 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
424 01:45:48.444305 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
425 01:45:48.450690 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
426 01:45:48.454854 Saving vboot hash.
427 01:45:48.461188 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
428 01:45:48.476903 tlcl_extend: response is 0
429 01:45:48.483537 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
430 01:45:48.486757 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
431 01:45:48.504258 tlcl_extend: response is 0
432 01:45:48.511303 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
433 01:45:48.531077 tlcl_lock_nv_write: response is 0
434 01:45:48.549924 tlcl_lock_nv_write: response is 0
435 01:45:48.550422 Slot A is selected
436 01:45:48.557264 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
437 01:45:48.563693 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
438 01:45:48.570576 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
439 01:45:48.576986 BS: verstage times (exec / console): total (unknown) / 256 ms
440 01:45:48.577524
441 01:45:48.577932
442 01:45:48.583916 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
443 01:45:48.587319 Google Chrome EC: version:
444 01:45:48.590473 ro: volmar_v2.0.14126-e605144e9c
445 01:45:48.593698 rw: volmar_v0.0.55-22d1557
446 01:45:48.597075 running image: 2
447 01:45:48.600495 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
448 01:45:48.610497 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
449 01:45:48.617395 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
450 01:45:48.624190 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
451 01:45:48.633818 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 01:45:48.644092 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 01:45:48.646998 EC took 941us to calculate image hash
454 01:45:48.657989 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
455 01:45:48.661396 VB2:sync_ec() select_rw=RW(active)
456 01:45:48.671433 Waited 270us to clear limit power flag.
457 01:45:48.677912 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
458 01:45:48.681919 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
459 01:45:48.685037 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
460 01:45:48.691648 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
461 01:45:48.694609 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
462 01:45:48.698100 TCO_STS: 0000 0000
463 01:45:48.698532 GEN_PMCON: d1001038 00002200
464 01:45:48.701927 GBLRST_CAUSE: 00000040 00000000
465 01:45:48.705110 HPR_CAUSE0: 00000000
466 01:45:48.708484 prev_sleep_state 5
467 01:45:48.711456 Abort disabling TXT, as CPU is not TXT capable.
468 01:45:48.719596 cse_lite: Number of partitions = 3
469 01:45:48.723244 cse_lite: Current partition = RW
470 01:45:48.723772 cse_lite: Next partition = RW
471 01:45:48.726064 cse_lite: Flags = 0x7
472 01:45:48.732868 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
473 01:45:48.743225 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
474 01:45:48.746478 FMAP: area SI_ME found @ 1000 (5238784 bytes)
475 01:45:48.753602 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
476 01:45:48.759630 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
477 01:45:48.766591 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
478 01:45:48.769786 cse_lite: CSE CBFS RW version : 16.1.25.2049
479 01:45:48.773231 Boot Count incremented to 2087
480 01:45:48.779976 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
481 01:45:48.786357 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
482 01:45:48.799215 Probing TPM I2C: done! DID_VID 0x00281ae0
483 01:45:48.802035 Locality already claimed
484 01:45:48.805516 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
485 01:45:48.825169 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
486 01:45:48.831536 MRC: Hash idx 0x100d comparison successful.
487 01:45:48.834848 MRC cache found, size f6c8
488 01:45:48.835394 bootmode is set to: 2
489 01:45:48.838327 EC returned error result code 3
490 01:45:48.841822 FW_CONFIG value from CBI is 0x131
491 01:45:48.849028 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
492 01:45:48.852593 SPD index = 0
493 01:45:48.858571 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
494 01:45:48.859004 SPD: module type is LPDDR4X
495 01:45:48.865295 SPD: module part number is K4U6E3S4AB-MGCL
496 01:45:48.872037 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
497 01:45:48.875635 SPD: device width 16 bits, bus width 16 bits
498 01:45:48.878699 SPD: module size is 1024 MB (per channel)
499 01:45:48.947971 CBMEM:
500 01:45:48.951466 IMD: root @ 0x76fff000 254 entries.
501 01:45:48.954455 IMD: root @ 0x76ffec00 62 entries.
502 01:45:48.962996 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
503 01:45:48.966005 RO_VPD is uninitialized or empty.
504 01:45:48.969317 FMAP: area RW_VPD found @ f29000 (8192 bytes)
505 01:45:48.975795 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
506 01:45:48.979159 External stage cache:
507 01:45:48.982734 IMD: root @ 0x7bbff000 254 entries.
508 01:45:48.986082 IMD: root @ 0x7bbfec00 62 entries.
509 01:45:48.992323 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
510 01:45:48.998978 MRC: Checking cached data update for 'RW_MRC_CACHE'.
511 01:45:49.002541 MRC: 'RW_MRC_CACHE' does not need update.
512 01:45:49.002967 8 DIMMs found
513 01:45:49.006114 SMM Memory Map
514 01:45:49.009401 SMRAM : 0x7b800000 0x800000
515 01:45:49.013000 Subregion 0: 0x7b800000 0x200000
516 01:45:49.015834 Subregion 1: 0x7ba00000 0x200000
517 01:45:49.019272 Subregion 2: 0x7bc00000 0x400000
518 01:45:49.022947 top_of_ram = 0x77000000
519 01:45:49.025546 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
520 01:45:49.032422 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
521 01:45:49.038943 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
522 01:45:49.042794 MTRR Range: Start=ff000000 End=0 (Size 1000000)
523 01:45:49.043225 Normal boot
524 01:45:49.052325 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
525 01:45:49.059138 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
526 01:45:49.065754 Processing 237 relocs. Offset value of 0x74ab9000
527 01:45:49.073999 BS: romstage times (exec / console): total (unknown) / 377 ms
528 01:45:49.081463
529 01:45:49.082015
530 01:45:49.087595 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
531 01:45:49.088162 Normal boot
532 01:45:49.094369 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
533 01:45:49.101117 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
534 01:45:49.107761 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
535 01:45:49.117712 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
536 01:45:49.166238 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
537 01:45:49.172617 Processing 5931 relocs. Offset value of 0x72a2f000
538 01:45:49.176005 BS: postcar times (exec / console): total (unknown) / 51 ms
539 01:45:49.176435
540 01:45:49.179193
541 01:45:49.185908 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
542 01:45:49.189195 Reserving BERT start 76a1e000, size 10000
543 01:45:49.192584 Normal boot
544 01:45:49.196075 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
545 01:45:49.203198 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
546 01:45:49.209351 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
547 01:45:49.216093 FMAP: area RW_VPD found @ f29000 (8192 bytes)
548 01:45:49.219583 Google Chrome EC: version:
549 01:45:49.223000 ro: volmar_v2.0.14126-e605144e9c
550 01:45:49.226282 rw: volmar_v0.0.55-22d1557
551 01:45:49.226709 running image: 2
552 01:45:49.229330 ACPI _SWS is PM1 Index 8 GPE Index -1
553 01:45:49.237517 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
554 01:45:49.240640 EC returned error result code 3
555 01:45:49.243988 FW_CONFIG value from CBI is 0x131
556 01:45:49.250929 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
557 01:45:49.254386 PCI: 00:1c.2 disabled by fw_config
558 01:45:49.257599 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 01:45:49.264295 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 01:45:49.267569 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
561 01:45:49.274507 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
562 01:45:49.277742 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
563 01:45:49.287683 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
564 01:45:49.291041 microcode: sig=0x906a4 pf=0x80 revision=0x423
565 01:45:49.297791 microcode: Update skipped, already up-to-date
566 01:45:49.304697 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
567 01:45:49.335337 Detected 6 core, 8 thread CPU.
568 01:45:49.338656 Setting up SMI for CPU
569 01:45:49.341931 IED base = 0x7bc00000
570 01:45:49.342446 IED size = 0x00400000
571 01:45:49.345566 Will perform SMM setup.
572 01:45:49.348471 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
573 01:45:49.351832 LAPIC 0x0 in XAPIC mode.
574 01:45:49.361999 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
575 01:45:49.365294 Processing 18 relocs. Offset value of 0x00030000
576 01:45:49.369388 Attempting to start 7 APs
577 01:45:49.372727 Waiting for 10ms after sending INIT.
578 01:45:49.385990 Waiting for SIPI to complete...
579 01:45:49.389351 done.
580 01:45:49.389774 LAPIC 0x1 in XAPIC mode.
581 01:45:49.392692 LAPIC 0x10 in XAPIC mode.
582 01:45:49.395971 Waiting for SIPI to complete...
583 01:45:49.399879 LAPIC 0x14 in XAPIC mode.
584 01:45:49.402918 AP: slot 4 apic_id 10, MCU rev: 0x00000423
585 01:45:49.409622 AP: slot 2 apic_id 14, MCU rev: 0x00000423
586 01:45:49.410070 LAPIC 0x12 in XAPIC mode.
587 01:45:49.412977 LAPIC 0x16 in XAPIC mode.
588 01:45:49.416145 AP: slot 1 apic_id 12, MCU rev: 0x00000423
589 01:45:49.423241 AP: slot 3 apic_id 16, MCU rev: 0x00000423
590 01:45:49.423734 LAPIC 0x8 in XAPIC mode.
591 01:45:49.425974 LAPIC 0x9 in XAPIC mode.
592 01:45:49.426400 done.
593 01:45:49.432765 AP: slot 5 apic_id 1, MCU rev: 0x00000423
594 01:45:49.436385 AP: slot 6 apic_id 9, MCU rev: 0x00000423
595 01:45:49.439683 AP: slot 7 apic_id 8, MCU rev: 0x00000423
596 01:45:49.442865 smm_setup_relocation_handler: enter
597 01:45:49.446330 smm_setup_relocation_handler: exit
598 01:45:49.456805 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
599 01:45:49.459732 Processing 11 relocs. Offset value of 0x00038000
600 01:45:49.466676 smm_module_setup_stub: stack_top = 0x7b804000
601 01:45:49.469595 smm_module_setup_stub: per cpu stack_size = 0x800
602 01:45:49.476556 smm_module_setup_stub: runtime.start32_offset = 0x4c
603 01:45:49.480087 smm_module_setup_stub: runtime.smm_size = 0x10000
604 01:45:49.487092 SMM Module: stub loaded at 38000. Will call 0x76a52094
605 01:45:49.489890 Installing permanent SMM handler to 0x7b800000
606 01:45:49.496796 smm_load_module: total_smm_space_needed e468, available -> 200000
607 01:45:49.506561 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
608 01:45:49.509968 Processing 255 relocs. Offset value of 0x7b9f6000
609 01:45:49.513202 smm_load_module: smram_start: 0x7b800000
610 01:45:49.516704 smm_load_module: smram_end: 7ba00000
611 01:45:49.523860 smm_load_module: handler start 0x7b9f6d5f
612 01:45:49.526998 smm_load_module: handler_size 98d0
613 01:45:49.530154 smm_load_module: fxsave_area 0x7b9ff000
614 01:45:49.533644 smm_load_module: fxsave_size 1000
615 01:45:49.536987 smm_load_module: CONFIG_MSEG_SIZE 0x0
616 01:45:49.543424 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
617 01:45:49.546980 smm_load_module: handler_mod_params.smbase = 0x7b800000
618 01:45:49.553806 smm_load_module: per_cpu_save_state_size = 0x400
619 01:45:49.557355 smm_load_module: num_cpus = 0x8
620 01:45:49.560667 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
621 01:45:49.567207 smm_load_module: total_save_state_size = 0x2000
622 01:45:49.570821 smm_load_module: cpu0 entry: 7b9e6000
623 01:45:49.574548 smm_create_map: cpus allowed in one segment 30
624 01:45:49.580802 smm_create_map: min # of segments needed 1
625 01:45:49.581424 CPU 0x0
626 01:45:49.583930 smbase 7b9e6000 entry 7b9ee000
627 01:45:49.587326 ss_start 7b9f5c00 code_end 7b9ee208
628 01:45:49.590658 CPU 0x1
629 01:45:49.594209 smbase 7b9e5c00 entry 7b9edc00
630 01:45:49.596930 ss_start 7b9f5800 code_end 7b9ede08
631 01:45:49.597364 CPU 0x2
632 01:45:49.604185 smbase 7b9e5800 entry 7b9ed800
633 01:45:49.607579 ss_start 7b9f5400 code_end 7b9eda08
634 01:45:49.608119 CPU 0x3
635 01:45:49.610800 smbase 7b9e5400 entry 7b9ed400
636 01:45:49.617039 ss_start 7b9f5000 code_end 7b9ed608
637 01:45:49.617574 CPU 0x4
638 01:45:49.620804 smbase 7b9e5000 entry 7b9ed000
639 01:45:49.624357 ss_start 7b9f4c00 code_end 7b9ed208
640 01:45:49.627717 CPU 0x5
641 01:45:49.631141 smbase 7b9e4c00 entry 7b9ecc00
642 01:45:49.634562 ss_start 7b9f4800 code_end 7b9ece08
643 01:45:49.635118 CPU 0x6
644 01:45:49.641275 smbase 7b9e4800 entry 7b9ec800
645 01:45:49.643890 ss_start 7b9f4400 code_end 7b9eca08
646 01:45:49.644327 CPU 0x7
647 01:45:49.647554 smbase 7b9e4400 entry 7b9ec400
648 01:45:49.654458 ss_start 7b9f4000 code_end 7b9ec608
649 01:45:49.660620 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
650 01:45:49.667592 Processing 11 relocs. Offset value of 0x7b9ee000
651 01:45:49.670732 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
652 01:45:49.677822 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
653 01:45:49.684314 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
654 01:45:49.691037 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
655 01:45:49.697760 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
656 01:45:49.704611 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
657 01:45:49.711195 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
658 01:45:49.714185 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
659 01:45:49.720722 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
660 01:45:49.727450 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
661 01:45:49.734476 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
662 01:45:49.741262 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
663 01:45:49.747935 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
664 01:45:49.754787 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
665 01:45:49.761262 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
666 01:45:49.764602 smm_module_setup_stub: stack_top = 0x7b804000
667 01:45:49.771351 smm_module_setup_stub: per cpu stack_size = 0x800
668 01:45:49.774640 smm_module_setup_stub: runtime.start32_offset = 0x4c
669 01:45:49.781650 smm_module_setup_stub: runtime.smm_size = 0x200000
670 01:45:49.785090 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
671 01:45:49.789939 Clearing SMI status registers
672 01:45:49.793348 SMI_STS: PM1
673 01:45:49.793911 PM1_STS: WAK PWRBTN
674 01:45:49.803231 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
675 01:45:49.806833 In relocation handler: CPU 0
676 01:45:49.810378 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
677 01:45:49.813641 Writing SMRR. base = 0x7b800006, mask=0xff800c00
678 01:45:49.817262 Relocation complete.
679 01:45:49.823567 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
680 01:45:49.826557 In relocation handler: CPU 5
681 01:45:49.830224 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
682 01:45:49.833213 Relocation complete.
683 01:45:49.839921 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
684 01:45:49.843088 In relocation handler: CPU 4
685 01:45:49.846795 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
686 01:45:49.849810 Writing SMRR. base = 0x7b800006, mask=0xff800c00
687 01:45:49.853786 Relocation complete.
688 01:45:49.859842 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
689 01:45:49.863354 In relocation handler: CPU 1
690 01:45:49.866718 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
691 01:45:49.873055 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 01:45:49.876811 Relocation complete.
693 01:45:49.883150 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
694 01:45:49.886738 In relocation handler: CPU 3
695 01:45:49.890406 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
696 01:45:49.893529 Writing SMRR. base = 0x7b800006, mask=0xff800c00
697 01:45:49.896444 Relocation complete.
698 01:45:49.903593 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
699 01:45:49.907195 In relocation handler: CPU 2
700 01:45:49.910339 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
701 01:45:49.916866 Writing SMRR. base = 0x7b800006, mask=0xff800c00
702 01:45:49.917400 Relocation complete.
703 01:45:49.923700 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
704 01:45:49.927142 In relocation handler: CPU 7
705 01:45:49.930519 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
706 01:45:49.936762 Writing SMRR. base = 0x7b800006, mask=0xff800c00
707 01:45:49.939857 Relocation complete.
708 01:45:49.946959 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
709 01:45:49.949808 In relocation handler: CPU 6
710 01:45:49.953250 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
711 01:45:49.956349 Relocation complete.
712 01:45:49.956952 Initializing CPU #0
713 01:45:49.959934 CPU: vendor Intel device 906a4
714 01:45:49.963198 CPU: family 06, model 9a, stepping 04
715 01:45:49.966534 Clearing out pending MCEs
716 01:45:49.969919 cpu: energy policy set to 7
717 01:45:49.973390 Turbo is available but hidden
718 01:45:49.976771 Turbo is available and visible
719 01:45:49.980124 microcode: Update skipped, already up-to-date
720 01:45:49.983462 CPU #0 initialized
721 01:45:49.983894 Initializing CPU #5
722 01:45:49.986679 Initializing CPU #2
723 01:45:49.989941 Initializing CPU #3
724 01:45:49.990380 CPU: vendor Intel device 906a4
725 01:45:49.996569 CPU: family 06, model 9a, stepping 04
726 01:45:50.000213 CPU: vendor Intel device 906a4
727 01:45:50.003921 CPU: family 06, model 9a, stepping 04
728 01:45:50.004467 Initializing CPU #4
729 01:45:50.007468 Initializing CPU #6
730 01:45:50.008017 Initializing CPU #7
731 01:45:50.009929 Initializing CPU #1
732 01:45:50.013615 Clearing out pending MCEs
733 01:45:50.016792 CPU: vendor Intel device 906a4
734 01:45:50.020223 CPU: family 06, model 9a, stepping 04
735 01:45:50.023715 CPU: vendor Intel device 906a4
736 01:45:50.026943 CPU: family 06, model 9a, stepping 04
737 01:45:50.030262 CPU: vendor Intel device 906a4
738 01:45:50.033897 CPU: family 06, model 9a, stepping 04
739 01:45:50.037477 Clearing out pending MCEs
740 01:45:50.040392 cpu: energy policy set to 7
741 01:45:50.043699 cpu: energy policy set to 7
742 01:45:50.047361 microcode: Update skipped, already up-to-date
743 01:45:50.050281 CPU #3 initialized
744 01:45:50.054123 microcode: Update skipped, already up-to-date
745 01:45:50.054682 CPU #1 initialized
746 01:45:50.057486 Clearing out pending MCEs
747 01:45:50.060825 CPU: vendor Intel device 906a4
748 01:45:50.064060 CPU: family 06, model 9a, stepping 04
749 01:45:50.067485 Clearing out pending MCEs
750 01:45:50.070874 Clearing out pending MCEs
751 01:45:50.073566 cpu: energy policy set to 7
752 01:45:50.077283 cpu: energy policy set to 7
753 01:45:50.080326 microcode: Update skipped, already up-to-date
754 01:45:50.083707 CPU #4 initialized
755 01:45:50.086938 microcode: Update skipped, already up-to-date
756 01:45:50.090563 CPU #2 initialized
757 01:45:50.091009 Clearing out pending MCEs
758 01:45:50.093902 cpu: energy policy set to 7
759 01:45:50.097116 CPU: vendor Intel device 906a4
760 01:45:50.100237 CPU: family 06, model 9a, stepping 04
761 01:45:50.107105 microcode: Update skipped, already up-to-date
762 01:45:50.107546 CPU #6 initialized
763 01:45:50.110227 Clearing out pending MCEs
764 01:45:50.113999 cpu: energy policy set to 7
765 01:45:50.117371 cpu: energy policy set to 7
766 01:45:50.120682 microcode: Update skipped, already up-to-date
767 01:45:50.123585 CPU #5 initialized
768 01:45:50.126971 microcode: Update skipped, already up-to-date
769 01:45:50.130202 CPU #7 initialized
770 01:45:50.134026 bsp_do_flight_plan done after 701 msecs.
771 01:45:50.137384 CPU: frequency set to 4400 MHz
772 01:45:50.137974 Enabling SMIs.
773 01:45:50.143636 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
774 01:45:50.160973 Probing TPM I2C: done! DID_VID 0x00281ae0
775 01:45:50.164284 Locality already claimed
776 01:45:50.167551 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
777 01:45:50.178399 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
778 01:45:50.181927 Enabling GPIO PM b/c CR50 has long IRQ pulse support
779 01:45:50.188759 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
780 01:45:50.195994 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
781 01:45:50.198829 Found a VBT of 9216 bytes after decompression
782 01:45:50.202140 PCI 1.0, PIN A, using IRQ #16
783 01:45:50.205511 PCI 2.0, PIN A, using IRQ #17
784 01:45:50.208782 PCI 4.0, PIN A, using IRQ #18
785 01:45:50.212159 PCI 5.0, PIN A, using IRQ #16
786 01:45:50.215587 PCI 6.0, PIN A, using IRQ #16
787 01:45:50.218975 PCI 6.2, PIN C, using IRQ #18
788 01:45:50.221958 PCI 7.0, PIN A, using IRQ #19
789 01:45:50.225507 PCI 7.1, PIN B, using IRQ #20
790 01:45:50.228685 PCI 7.2, PIN C, using IRQ #21
791 01:45:50.232323 PCI 7.3, PIN D, using IRQ #22
792 01:45:50.232751 PCI 8.0, PIN A, using IRQ #23
793 01:45:50.235507 PCI D.0, PIN A, using IRQ #17
794 01:45:50.239158 PCI D.1, PIN B, using IRQ #19
795 01:45:50.242103 PCI 10.0, PIN A, using IRQ #24
796 01:45:50.245788 PCI 10.1, PIN B, using IRQ #25
797 01:45:50.249378 PCI 10.6, PIN C, using IRQ #20
798 01:45:50.252143 PCI 10.7, PIN D, using IRQ #21
799 01:45:50.255615 PCI 11.0, PIN A, using IRQ #26
800 01:45:50.259055 PCI 11.1, PIN B, using IRQ #27
801 01:45:50.262629 PCI 11.2, PIN C, using IRQ #28
802 01:45:50.265490 PCI 11.3, PIN D, using IRQ #29
803 01:45:50.268904 PCI 12.0, PIN A, using IRQ #30
804 01:45:50.272166 PCI 12.6, PIN B, using IRQ #31
805 01:45:50.276025 PCI 12.7, PIN C, using IRQ #22
806 01:45:50.279208 PCI 13.0, PIN A, using IRQ #32
807 01:45:50.279757 PCI 13.1, PIN B, using IRQ #33
808 01:45:50.282456 PCI 13.2, PIN C, using IRQ #34
809 01:45:50.286127 PCI 13.3, PIN D, using IRQ #35
810 01:45:50.288952 PCI 14.0, PIN B, using IRQ #23
811 01:45:50.292806 PCI 14.1, PIN A, using IRQ #36
812 01:45:50.296090 PCI 14.3, PIN C, using IRQ #17
813 01:45:50.299347 PCI 15.0, PIN A, using IRQ #37
814 01:45:50.302560 PCI 15.1, PIN B, using IRQ #38
815 01:45:50.305924 PCI 15.2, PIN C, using IRQ #39
816 01:45:50.309556 PCI 15.3, PIN D, using IRQ #40
817 01:45:50.312855 PCI 16.0, PIN A, using IRQ #18
818 01:45:50.315880 PCI 16.1, PIN B, using IRQ #19
819 01:45:50.319072 PCI 16.2, PIN C, using IRQ #20
820 01:45:50.322445 PCI 16.3, PIN D, using IRQ #21
821 01:45:50.325955 PCI 16.4, PIN A, using IRQ #18
822 01:45:50.326406 PCI 16.5, PIN B, using IRQ #19
823 01:45:50.329687 PCI 17.0, PIN A, using IRQ #22
824 01:45:50.332685 PCI 19.0, PIN A, using IRQ #41
825 01:45:50.336095 PCI 19.1, PIN B, using IRQ #42
826 01:45:50.339021 PCI 19.2, PIN C, using IRQ #43
827 01:45:50.342532 PCI 1C.0, PIN A, using IRQ #16
828 01:45:50.346032 PCI 1C.1, PIN B, using IRQ #17
829 01:45:50.349670 PCI 1C.2, PIN C, using IRQ #18
830 01:45:50.352621 PCI 1C.3, PIN D, using IRQ #19
831 01:45:50.356202 PCI 1C.4, PIN A, using IRQ #16
832 01:45:50.359630 PCI 1C.5, PIN B, using IRQ #17
833 01:45:50.362469 PCI 1C.6, PIN C, using IRQ #18
834 01:45:50.365893 PCI 1C.7, PIN D, using IRQ #19
835 01:45:50.369781 PCI 1D.0, PIN A, using IRQ #16
836 01:45:50.372883 PCI 1D.1, PIN B, using IRQ #17
837 01:45:50.373353 PCI 1D.2, PIN C, using IRQ #18
838 01:45:50.376138 PCI 1D.3, PIN D, using IRQ #19
839 01:45:50.379592 PCI 1E.0, PIN A, using IRQ #23
840 01:45:50.383065 PCI 1E.1, PIN B, using IRQ #20
841 01:45:50.386374 PCI 1E.2, PIN C, using IRQ #44
842 01:45:50.389369 PCI 1E.3, PIN D, using IRQ #45
843 01:45:50.392749 PCI 1F.3, PIN B, using IRQ #22
844 01:45:50.396085 PCI 1F.4, PIN C, using IRQ #23
845 01:45:50.399624 PCI 1F.6, PIN D, using IRQ #20
846 01:45:50.402439 PCI 1F.7, PIN A, using IRQ #21
847 01:45:50.405951 IRQ: Using dynamically assigned PCI IO-APIC IRQs
848 01:45:50.415656 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
849 01:45:50.596628 FSPS returned 0
850 01:45:50.600113 Executing Phase 1 of FspMultiPhaseSiInit
851 01:45:50.609706 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
852 01:45:50.613715 port C0 DISC req: usage 1 usb3 1 usb2 1
853 01:45:50.616599 Raw Buffer output 0 00000111
854 01:45:50.619815 Raw Buffer output 1 00000000
855 01:45:50.623485 pmc_send_ipc_cmd succeeded
856 01:45:50.629984 port C1 DISC req: usage 1 usb3 3 usb2 3
857 01:45:50.630143 Raw Buffer output 0 00000331
858 01:45:50.633394 Raw Buffer output 1 00000000
859 01:45:50.637504 pmc_send_ipc_cmd succeeded
860 01:45:50.641145 Detected 6 core, 8 thread CPU.
861 01:45:50.644577 Detected 6 core, 8 thread CPU.
862 01:45:50.649797 Detected 6 core, 8 thread CPU.
863 01:45:50.653331 Detected 6 core, 8 thread CPU.
864 01:45:50.656576 Detected 6 core, 8 thread CPU.
865 01:45:50.660097 Detected 6 core, 8 thread CPU.
866 01:45:50.663019 Detected 6 core, 8 thread CPU.
867 01:45:50.666726 Detected 6 core, 8 thread CPU.
868 01:45:50.669696 Detected 6 core, 8 thread CPU.
869 01:45:50.673229 Detected 6 core, 8 thread CPU.
870 01:45:50.676437 Detected 6 core, 8 thread CPU.
871 01:45:50.680271 Detected 6 core, 8 thread CPU.
872 01:45:50.683562 Detected 6 core, 8 thread CPU.
873 01:45:50.686738 Detected 6 core, 8 thread CPU.
874 01:45:50.690144 Detected 6 core, 8 thread CPU.
875 01:45:50.693949 Detected 6 core, 8 thread CPU.
876 01:45:50.697171 Detected 6 core, 8 thread CPU.
877 01:45:50.700035 Detected 6 core, 8 thread CPU.
878 01:45:50.703566 Detected 6 core, 8 thread CPU.
879 01:45:50.703768 Detected 6 core, 8 thread CPU.
880 01:45:50.707293 Detected 6 core, 8 thread CPU.
881 01:45:50.710163 Detected 6 core, 8 thread CPU.
882 01:45:51.002657 Detected 6 core, 8 thread CPU.
883 01:45:51.006190 Detected 6 core, 8 thread CPU.
884 01:45:51.009125 Detected 6 core, 8 thread CPU.
885 01:45:51.012781 Detected 6 core, 8 thread CPU.
886 01:45:51.015723 Detected 6 core, 8 thread CPU.
887 01:45:51.019100 Detected 6 core, 8 thread CPU.
888 01:45:51.022673 Detected 6 core, 8 thread CPU.
889 01:45:51.026380 Detected 6 core, 8 thread CPU.
890 01:45:51.029642 Detected 6 core, 8 thread CPU.
891 01:45:51.033187 Detected 6 core, 8 thread CPU.
892 01:45:51.036484 Detected 6 core, 8 thread CPU.
893 01:45:51.039424 Detected 6 core, 8 thread CPU.
894 01:45:51.043167 Detected 6 core, 8 thread CPU.
895 01:45:51.046587 Detected 6 core, 8 thread CPU.
896 01:45:51.050355 Detected 6 core, 8 thread CPU.
897 01:45:51.053269 Detected 6 core, 8 thread CPU.
898 01:45:51.056280 Detected 6 core, 8 thread CPU.
899 01:45:51.056819 Detected 6 core, 8 thread CPU.
900 01:45:51.059691 Detected 6 core, 8 thread CPU.
901 01:45:51.063103 Detected 6 core, 8 thread CPU.
902 01:45:51.066711 Display FSP Version Info HOB
903 01:45:51.069783 Reference Code - CPU = c.0.65.70
904 01:45:51.073285 uCode Version = 0.0.4.23
905 01:45:51.076365 TXT ACM version = ff.ff.ff.ffff
906 01:45:51.079934 Reference Code - ME = c.0.65.70
907 01:45:51.083325 MEBx version = 0.0.0.0
908 01:45:51.087028 ME Firmware Version = Lite SKU
909 01:45:51.089743 Reference Code - PCH = c.0.65.70
910 01:45:51.093280 PCH-CRID Status = Disabled
911 01:45:51.097087 PCH-CRID Original Value = ff.ff.ff.ffff
912 01:45:51.099715 PCH-CRID New Value = ff.ff.ff.ffff
913 01:45:51.103286 OPROM - RST - RAID = ff.ff.ff.ffff
914 01:45:51.106288 PCH Hsio Version = 4.0.0.0
915 01:45:51.109687 Reference Code - SA - System Agent = c.0.65.70
916 01:45:51.113111 Reference Code - MRC = 0.0.3.80
917 01:45:51.116210 SA - PCIe Version = c.0.65.70
918 01:45:51.119365 SA-CRID Status = Disabled
919 01:45:51.123237 SA-CRID Original Value = 0.0.0.4
920 01:45:51.126348 SA-CRID New Value = 0.0.0.4
921 01:45:51.129734 OPROM - VBIOS = ff.ff.ff.ffff
922 01:45:51.133273 IO Manageability Engine FW Version = 24.0.4.0
923 01:45:51.136086 PHY Build Version = 0.0.0.2016
924 01:45:51.139895 Thunderbolt(TM) FW Version = 0.0.0.0
925 01:45:51.145911 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
926 01:45:51.152957 BS: BS_DEV_INIT_CHIPS run times (exec / console): 493 / 507 ms
927 01:45:51.153070 Enumerating buses...
928 01:45:51.159697 Show all devs... Before device enumeration.
929 01:45:51.159782 Root Device: enabled 1
930 01:45:51.162605 CPU_CLUSTER: 0: enabled 1
931 01:45:51.165836 DOMAIN: 0000: enabled 1
932 01:45:51.169090 GPIO: 0: enabled 1
933 01:45:51.169200 PCI: 00:00.0: enabled 1
934 01:45:51.172601 PCI: 00:01.0: enabled 0
935 01:45:51.176191 PCI: 00:01.1: enabled 0
936 01:45:51.179406 PCI: 00:02.0: enabled 1
937 01:45:51.179513 PCI: 00:04.0: enabled 1
938 01:45:51.182603 PCI: 00:05.0: enabled 0
939 01:45:51.186060 PCI: 00:06.0: enabled 1
940 01:45:51.186144 PCI: 00:06.2: enabled 0
941 01:45:51.189456 PCI: 00:07.0: enabled 0
942 01:45:51.192443 PCI: 00:07.1: enabled 0
943 01:45:51.196007 PCI: 00:07.2: enabled 0
944 01:45:51.196091 PCI: 00:07.3: enabled 0
945 01:45:51.198970 PCI: 00:08.0: enabled 0
946 01:45:51.202324 PCI: 00:09.0: enabled 0
947 01:45:51.205755 PCI: 00:0a.0: enabled 1
948 01:45:51.205878 PCI: 00:0d.0: enabled 1
949 01:45:51.208859 PCI: 00:0d.1: enabled 0
950 01:45:51.212313 PCI: 00:0d.2: enabled 0
951 01:45:51.216024 PCI: 00:0d.3: enabled 0
952 01:45:51.216168 PCI: 00:0e.0: enabled 0
953 01:45:51.219164 PCI: 00:10.0: enabled 0
954 01:45:51.222766 PCI: 00:10.1: enabled 0
955 01:45:51.222940 PCI: 00:10.6: enabled 0
956 01:45:51.226162 PCI: 00:10.7: enabled 0
957 01:45:51.229068 PCI: 00:12.0: enabled 0
958 01:45:51.232623 PCI: 00:12.6: enabled 0
959 01:45:51.232808 PCI: 00:12.7: enabled 0
960 01:45:51.236048 PCI: 00:13.0: enabled 0
961 01:45:51.238956 PCI: 00:14.0: enabled 1
962 01:45:51.242197 PCI: 00:14.1: enabled 0
963 01:45:51.242288 PCI: 00:14.2: enabled 1
964 01:45:51.246039 PCI: 00:14.3: enabled 1
965 01:45:51.249001 PCI: 00:15.0: enabled 1
966 01:45:51.252064 PCI: 00:15.1: enabled 1
967 01:45:51.252141 PCI: 00:15.2: enabled 0
968 01:45:51.255450 PCI: 00:15.3: enabled 1
969 01:45:51.258702 PCI: 00:16.0: enabled 1
970 01:45:51.262314 PCI: 00:16.1: enabled 0
971 01:45:51.262394 PCI: 00:16.2: enabled 0
972 01:45:51.265443 PCI: 00:16.3: enabled 0
973 01:45:51.269115 PCI: 00:16.4: enabled 0
974 01:45:51.269222 PCI: 00:16.5: enabled 0
975 01:45:51.272295 PCI: 00:17.0: enabled 1
976 01:45:51.275736 PCI: 00:19.0: enabled 0
977 01:45:51.279341 PCI: 00:19.1: enabled 1
978 01:45:51.279417 PCI: 00:19.2: enabled 0
979 01:45:51.282385 PCI: 00:1a.0: enabled 0
980 01:45:51.285590 PCI: 00:1c.0: enabled 0
981 01:45:51.289072 PCI: 00:1c.1: enabled 0
982 01:45:51.289147 PCI: 00:1c.2: enabled 0
983 01:45:51.292097 PCI: 00:1c.3: enabled 0
984 01:45:51.295573 PCI: 00:1c.4: enabled 0
985 01:45:51.295650 PCI: 00:1c.5: enabled 0
986 01:45:51.299147 PCI: 00:1c.6: enabled 0
987 01:45:51.302266 PCI: 00:1c.7: enabled 0
988 01:45:51.305562 PCI: 00:1d.0: enabled 0
989 01:45:51.305640 PCI: 00:1d.1: enabled 0
990 01:45:51.308984 PCI: 00:1d.2: enabled 0
991 01:45:51.312126 PCI: 00:1d.3: enabled 0
992 01:45:51.315386 PCI: 00:1e.0: enabled 1
993 01:45:51.315462 PCI: 00:1e.1: enabled 0
994 01:45:51.318931 PCI: 00:1e.2: enabled 0
995 01:45:51.322426 PCI: 00:1e.3: enabled 1
996 01:45:51.325682 PCI: 00:1f.0: enabled 1
997 01:45:51.325759 PCI: 00:1f.1: enabled 0
998 01:45:51.329031 PCI: 00:1f.2: enabled 1
999 01:45:51.332050 PCI: 00:1f.3: enabled 1
1000 01:45:51.332126 PCI: 00:1f.4: enabled 0
1001 01:45:51.335684 PCI: 00:1f.5: enabled 1
1002 01:45:51.339058 PCI: 00:1f.6: enabled 0
1003 01:45:51.342640 PCI: 00:1f.7: enabled 0
1004 01:45:51.342716 GENERIC: 0.0: enabled 1
1005 01:45:51.345730 GENERIC: 0.0: enabled 1
1006 01:45:51.349406 GENERIC: 1.0: enabled 1
1007 01:45:51.352504 GENERIC: 0.0: enabled 1
1008 01:45:51.352606 GENERIC: 1.0: enabled 1
1009 01:45:51.355514 USB0 port 0: enabled 1
1010 01:45:51.359303 USB0 port 0: enabled 1
1011 01:45:51.359382 GENERIC: 0.0: enabled 1
1012 01:45:51.362183 I2C: 00:1a: enabled 1
1013 01:45:51.365573 I2C: 00:31: enabled 1
1014 01:45:51.365655 I2C: 00:32: enabled 1
1015 01:45:51.369121 I2C: 00:50: enabled 1
1016 01:45:51.372734 I2C: 00:10: enabled 1
1017 01:45:51.372842 I2C: 00:15: enabled 1
1018 01:45:51.375903 I2C: 00:2c: enabled 1
1019 01:45:51.379417 GENERIC: 0.0: enabled 1
1020 01:45:51.379497 SPI: 00: enabled 1
1021 01:45:51.382479 PNP: 0c09.0: enabled 1
1022 01:45:51.385727 GENERIC: 0.0: enabled 1
1023 01:45:51.388846 USB3 port 0: enabled 1
1024 01:45:51.388957 USB3 port 1: enabled 0
1025 01:45:51.392384 USB3 port 2: enabled 1
1026 01:45:51.395634 USB3 port 3: enabled 0
1027 01:45:51.395720 USB2 port 0: enabled 1
1028 01:45:51.399227 USB2 port 1: enabled 0
1029 01:45:51.402499 USB2 port 2: enabled 1
1030 01:45:51.405968 USB2 port 3: enabled 0
1031 01:45:51.406054 USB2 port 4: enabled 0
1032 01:45:51.409352 USB2 port 5: enabled 1
1033 01:45:51.412952 USB2 port 6: enabled 0
1034 01:45:51.413038 USB2 port 7: enabled 0
1035 01:45:51.415830 USB2 port 8: enabled 1
1036 01:45:51.419330 USB2 port 9: enabled 1
1037 01:45:51.419417 USB3 port 0: enabled 1
1038 01:45:51.422426 USB3 port 1: enabled 0
1039 01:45:51.426041 USB3 port 2: enabled 0
1040 01:45:51.429284 USB3 port 3: enabled 0
1041 01:45:51.429369 GENERIC: 0.0: enabled 1
1042 01:45:51.432847 GENERIC: 1.0: enabled 1
1043 01:45:51.435742 APIC: 00: enabled 1
1044 01:45:51.435828 APIC: 12: enabled 1
1045 01:45:51.439293 APIC: 14: enabled 1
1046 01:45:51.439379 APIC: 16: enabled 1
1047 01:45:51.443015 APIC: 10: enabled 1
1048 01:45:51.445778 APIC: 01: enabled 1
1049 01:45:51.445870 APIC: 09: enabled 1
1050 01:45:51.449639 APIC: 08: enabled 1
1051 01:45:51.452897 Compare with tree...
1052 01:45:51.452996 Root Device: enabled 1
1053 01:45:51.455717 CPU_CLUSTER: 0: enabled 1
1054 01:45:51.459742 APIC: 00: enabled 1
1055 01:45:51.459845 APIC: 12: enabled 1
1056 01:45:51.463017 APIC: 14: enabled 1
1057 01:45:51.465977 APIC: 16: enabled 1
1058 01:45:51.466143 APIC: 10: enabled 1
1059 01:45:51.469090 APIC: 01: enabled 1
1060 01:45:51.472715 APIC: 09: enabled 1
1061 01:45:51.476370 APIC: 08: enabled 1
1062 01:45:51.476508 DOMAIN: 0000: enabled 1
1063 01:45:51.479131 GPIO: 0: enabled 1
1064 01:45:51.482859 PCI: 00:00.0: enabled 1
1065 01:45:51.486168 PCI: 00:01.0: enabled 0
1066 01:45:51.486343 PCI: 00:01.1: enabled 0
1067 01:45:51.489492 PCI: 00:02.0: enabled 1
1068 01:45:51.492945 PCI: 00:04.0: enabled 1
1069 01:45:51.495992 GENERIC: 0.0: enabled 1
1070 01:45:51.496237 PCI: 00:05.0: enabled 0
1071 01:45:51.499324 PCI: 00:06.0: enabled 1
1072 01:45:51.503036 PCI: 00:06.2: enabled 0
1073 01:45:51.506209 PCI: 00:08.0: enabled 0
1074 01:45:51.509443 PCI: 00:09.0: enabled 0
1075 01:45:51.509884 PCI: 00:0a.0: enabled 1
1076 01:45:51.512989 PCI: 00:0d.0: enabled 1
1077 01:45:51.516070 USB0 port 0: enabled 1
1078 01:45:51.519540 USB3 port 0: enabled 1
1079 01:45:51.522852 USB3 port 1: enabled 0
1080 01:45:51.523260 USB3 port 2: enabled 1
1081 01:45:51.526319 USB3 port 3: enabled 0
1082 01:45:51.529792 PCI: 00:0d.1: enabled 0
1083 01:45:51.533127 PCI: 00:0d.2: enabled 0
1084 01:45:51.536487 PCI: 00:0d.3: enabled 0
1085 01:45:51.536893 PCI: 00:0e.0: enabled 0
1086 01:45:51.540107 PCI: 00:10.0: enabled 0
1087 01:45:51.542889 PCI: 00:10.1: enabled 0
1088 01:45:51.546219 PCI: 00:10.6: enabled 0
1089 01:45:51.549983 PCI: 00:10.7: enabled 0
1090 01:45:51.550390 PCI: 00:12.0: enabled 0
1091 01:45:51.553618 PCI: 00:12.6: enabled 0
1092 01:45:51.556186 PCI: 00:12.7: enabled 0
1093 01:45:51.559794 PCI: 00:13.0: enabled 0
1094 01:45:51.560197 PCI: 00:14.0: enabled 1
1095 01:45:51.563664 USB0 port 0: enabled 1
1096 01:45:51.566423 USB2 port 0: enabled 1
1097 01:45:51.570083 USB2 port 1: enabled 0
1098 01:45:51.572856 USB2 port 2: enabled 1
1099 01:45:51.576537 USB2 port 3: enabled 0
1100 01:45:51.576929 USB2 port 4: enabled 0
1101 01:45:51.580163 USB2 port 5: enabled 1
1102 01:45:51.582892 USB2 port 6: enabled 0
1103 01:45:51.586405 USB2 port 7: enabled 0
1104 01:45:51.589744 USB2 port 8: enabled 1
1105 01:45:51.592951 USB2 port 9: enabled 1
1106 01:45:51.593410 USB3 port 0: enabled 1
1107 01:45:51.596371 USB3 port 1: enabled 0
1108 01:45:51.599786 USB3 port 2: enabled 0
1109 01:45:51.603238 USB3 port 3: enabled 0
1110 01:45:51.606460 PCI: 00:14.1: enabled 0
1111 01:45:51.607012 PCI: 00:14.2: enabled 1
1112 01:45:51.609791 PCI: 00:14.3: enabled 1
1113 01:45:51.613342 GENERIC: 0.0: enabled 1
1114 01:45:51.616517 PCI: 00:15.0: enabled 1
1115 01:45:51.617068 I2C: 00:1a: enabled 1
1116 01:45:51.620288 I2C: 00:31: enabled 1
1117 01:45:51.623447 I2C: 00:32: enabled 1
1118 01:45:51.626567 PCI: 00:15.1: enabled 1
1119 01:45:51.629929 I2C: 00:50: enabled 1
1120 01:45:51.630485 PCI: 00:15.2: enabled 0
1121 01:45:51.633120 PCI: 00:15.3: enabled 1
1122 01:45:51.636712 I2C: 00:10: enabled 1
1123 01:45:51.639829 PCI: 00:16.0: enabled 1
1124 01:45:51.640050 PCI: 00:16.1: enabled 0
1125 01:45:51.643218 PCI: 00:16.2: enabled 0
1126 01:45:51.646627 PCI: 00:16.3: enabled 0
1127 01:45:51.649704 PCI: 00:16.4: enabled 0
1128 01:45:51.653474 PCI: 00:16.5: enabled 0
1129 01:45:51.653691 PCI: 00:17.0: enabled 1
1130 01:45:51.656791 PCI: 00:19.0: enabled 0
1131 01:45:51.659669 PCI: 00:19.1: enabled 1
1132 01:45:51.663164 I2C: 00:15: enabled 1
1133 01:45:51.666840 I2C: 00:2c: enabled 1
1134 01:45:51.667057 PCI: 00:19.2: enabled 0
1135 01:45:51.670063 PCI: 00:1a.0: enabled 0
1136 01:45:51.673628 PCI: 00:1e.0: enabled 1
1137 01:45:51.676558 PCI: 00:1e.1: enabled 0
1138 01:45:51.676774 PCI: 00:1e.2: enabled 0
1139 01:45:51.680095 PCI: 00:1e.3: enabled 1
1140 01:45:51.683055 SPI: 00: enabled 1
1141 01:45:51.686443 PCI: 00:1f.0: enabled 1
1142 01:45:51.690001 PNP: 0c09.0: enabled 1
1143 01:45:51.690093 PCI: 00:1f.1: enabled 0
1144 01:45:51.693564 PCI: 00:1f.2: enabled 1
1145 01:45:51.696150 GENERIC: 0.0: enabled 1
1146 01:45:51.699524 GENERIC: 0.0: enabled 1
1147 01:45:51.703262 GENERIC: 1.0: enabled 1
1148 01:45:51.703346 PCI: 00:1f.3: enabled 1
1149 01:45:51.706807 PCI: 00:1f.4: enabled 0
1150 01:45:51.709667 PCI: 00:1f.5: enabled 1
1151 01:45:51.712943 PCI: 00:1f.6: enabled 0
1152 01:45:51.716675 PCI: 00:1f.7: enabled 0
1153 01:45:51.716786 Root Device scanning...
1154 01:45:51.719776 scan_static_bus for Root Device
1155 01:45:51.723531 CPU_CLUSTER: 0 enabled
1156 01:45:51.726244 DOMAIN: 0000 enabled
1157 01:45:51.726329 DOMAIN: 0000 scanning...
1158 01:45:51.729705 PCI: pci_scan_bus for bus 00
1159 01:45:51.733169 PCI: 00:00.0 [8086/0000] ops
1160 01:45:51.736197 PCI: 00:00.0 [8086/4609] enabled
1161 01:45:51.739540 PCI: 00:02.0 [8086/0000] bus ops
1162 01:45:51.742757 PCI: 00:02.0 [8086/46b3] enabled
1163 01:45:51.746347 PCI: 00:04.0 [8086/0000] bus ops
1164 01:45:51.749447 PCI: 00:04.0 [8086/461d] enabled
1165 01:45:51.752999 PCI: 00:06.0 [8086/0000] bus ops
1166 01:45:51.756437 PCI: 00:06.0 [8086/464d] enabled
1167 01:45:51.759785 PCI: 00:08.0 [8086/464f] disabled
1168 01:45:51.762925 PCI: 00:0a.0 [8086/467d] enabled
1169 01:45:51.766616 PCI: 00:0d.0 [8086/0000] bus ops
1170 01:45:51.769957 PCI: 00:0d.0 [8086/461e] enabled
1171 01:45:51.773218 PCI: 00:14.0 [8086/0000] bus ops
1172 01:45:51.776788 PCI: 00:14.0 [8086/51ed] enabled
1173 01:45:51.780070 PCI: 00:14.2 [8086/51ef] enabled
1174 01:45:51.783021 PCI: 00:14.3 [8086/0000] bus ops
1175 01:45:51.786578 PCI: 00:14.3 [8086/51f0] enabled
1176 01:45:51.789904 PCI: 00:15.0 [8086/0000] bus ops
1177 01:45:51.792924 PCI: 00:15.0 [8086/51e8] enabled
1178 01:45:51.796531 PCI: 00:15.1 [8086/0000] bus ops
1179 01:45:51.800253 PCI: 00:15.1 [8086/51e9] enabled
1180 01:45:51.803436 PCI: 00:15.2 [8086/0000] bus ops
1181 01:45:51.806799 PCI: 00:15.2 [8086/51ea] disabled
1182 01:45:51.809828 PCI: 00:15.3 [8086/0000] bus ops
1183 01:45:51.813298 PCI: 00:15.3 [8086/51eb] enabled
1184 01:45:51.816712 PCI: 00:16.0 [8086/0000] ops
1185 01:45:51.819613 PCI: 00:16.0 [8086/51e0] enabled
1186 01:45:51.826809 PCI: Static device PCI: 00:17.0 not found, disabling it.
1187 01:45:51.829637 PCI: 00:19.0 [8086/0000] bus ops
1188 01:45:51.833171 PCI: 00:19.0 [8086/51c5] disabled
1189 01:45:51.836904 PCI: 00:19.1 [8086/0000] bus ops
1190 01:45:51.839905 PCI: 00:19.1 [8086/51c6] enabled
1191 01:45:51.843607 PCI: 00:1e.0 [8086/0000] ops
1192 01:45:51.846882 PCI: 00:1e.0 [8086/51a8] enabled
1193 01:45:51.849817 PCI: 00:1e.3 [8086/0000] bus ops
1194 01:45:51.853293 PCI: 00:1e.3 [8086/51ab] enabled
1195 01:45:51.857136 PCI: 00:1f.0 [8086/0000] bus ops
1196 01:45:51.860281 PCI: 00:1f.0 [8086/5182] enabled
1197 01:45:51.863441 RTC Init
1198 01:45:51.866738 Set power on after power failure.
1199 01:45:51.866820 Disabling Deep S3
1200 01:45:51.870281 Disabling Deep S3
1201 01:45:51.870363 Disabling Deep S4
1202 01:45:51.873619 Disabling Deep S4
1203 01:45:51.877213 Disabling Deep S5
1204 01:45:51.877299 Disabling Deep S5
1205 01:45:51.880206 PCI: 00:1f.2 [0000/0000] hidden
1206 01:45:51.883511 PCI: 00:1f.3 [8086/0000] bus ops
1207 01:45:51.887004 PCI: 00:1f.3 [8086/51c8] enabled
1208 01:45:51.890364 PCI: 00:1f.5 [8086/0000] bus ops
1209 01:45:51.893379 PCI: 00:1f.5 [8086/51a4] enabled
1210 01:45:51.898939 GPIO: 0 enabled
1211 01:45:51.899023 PCI: Leftover static devices:
1212 01:45:51.899987 PCI: 00:01.0
1213 01:45:51.900070 PCI: 00:01.1
1214 01:45:51.903865 PCI: 00:05.0
1215 01:45:51.903948 PCI: 00:06.2
1216 01:45:51.906913 PCI: 00:09.0
1217 01:45:51.907023 PCI: 00:0d.1
1218 01:45:51.907089 PCI: 00:0d.2
1219 01:45:51.910120 PCI: 00:0d.3
1220 01:45:51.910202 PCI: 00:0e.0
1221 01:45:51.913320 PCI: 00:10.0
1222 01:45:51.913403 PCI: 00:10.1
1223 01:45:51.913468 PCI: 00:10.6
1224 01:45:51.916860 PCI: 00:10.7
1225 01:45:51.916943 PCI: 00:12.0
1226 01:45:51.920315 PCI: 00:12.6
1227 01:45:51.920397 PCI: 00:12.7
1228 01:45:51.920463 PCI: 00:13.0
1229 01:45:51.924157 PCI: 00:14.1
1230 01:45:51.924259 PCI: 00:16.1
1231 01:45:51.927347 PCI: 00:16.2
1232 01:45:51.927429 PCI: 00:16.3
1233 01:45:51.927495 PCI: 00:16.4
1234 01:45:51.930425 PCI: 00:16.5
1235 01:45:51.930507 PCI: 00:17.0
1236 01:45:51.934050 PCI: 00:19.2
1237 01:45:51.934133 PCI: 00:1a.0
1238 01:45:51.934198 PCI: 00:1e.1
1239 01:45:51.937166 PCI: 00:1e.2
1240 01:45:51.937271 PCI: 00:1f.1
1241 01:45:51.940611 PCI: 00:1f.4
1242 01:45:51.940694 PCI: 00:1f.6
1243 01:45:51.944002 PCI: 00:1f.7
1244 01:45:51.944084 PCI: Check your devicetree.cb.
1245 01:45:51.947025 PCI: 00:02.0 scanning...
1246 01:45:51.950570 scan_generic_bus for PCI: 00:02.0
1247 01:45:51.954184 scan_generic_bus for PCI: 00:02.0 done
1248 01:45:51.960333 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1249 01:45:51.963930 PCI: 00:04.0 scanning...
1250 01:45:51.966743 scan_generic_bus for PCI: 00:04.0
1251 01:45:51.966819 GENERIC: 0.0 enabled
1252 01:45:51.973472 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1253 01:45:51.980577 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1254 01:45:51.980669 PCI: 00:06.0 scanning...
1255 01:45:51.983661 do_pci_scan_bridge for PCI: 00:06.0
1256 01:45:51.986992 PCI: pci_scan_bus for bus 01
1257 01:45:51.990547 PCI: 01:00.0 [15b7/5009] enabled
1258 01:45:51.993788 Enabling Common Clock Configuration
1259 01:45:52.000098 L1 Sub-State supported from root port 6
1260 01:45:52.000182 L1 Sub-State Support = 0x5
1261 01:45:52.003297 CommonModeRestoreTime = 0x6e
1262 01:45:52.010162 Power On Value = 0x5, Power On Scale = 0x2
1263 01:45:52.010246 ASPM: Enabled L1
1264 01:45:52.013350 PCIe: Max_Payload_Size adjusted to 256
1265 01:45:52.016707 PCI: 01:00.0: Enabled LTR
1266 01:45:52.020151 PCI: 01:00.0: Programmed LTR max latencies
1267 01:45:52.027119 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1268 01:45:52.030143 PCI: 00:0d.0 scanning...
1269 01:45:52.034122 scan_static_bus for PCI: 00:0d.0
1270 01:45:52.034205 USB0 port 0 enabled
1271 01:45:52.036901 USB0 port 0 scanning...
1272 01:45:52.040033 scan_static_bus for USB0 port 0
1273 01:45:52.043684 USB3 port 0 enabled
1274 01:45:52.043770 USB3 port 1 disabled
1275 01:45:52.047052 USB3 port 2 enabled
1276 01:45:52.047154 USB3 port 3 disabled
1277 01:45:52.050664 USB3 port 0 scanning...
1278 01:45:52.053293 scan_static_bus for USB3 port 0
1279 01:45:52.056842 scan_static_bus for USB3 port 0 done
1280 01:45:52.063895 scan_bus: bus USB3 port 0 finished in 6 msecs
1281 01:45:52.063978 USB3 port 2 scanning...
1282 01:45:52.066863 scan_static_bus for USB3 port 2
1283 01:45:52.070378 scan_static_bus for USB3 port 2 done
1284 01:45:52.076581 scan_bus: bus USB3 port 2 finished in 6 msecs
1285 01:45:52.080466 scan_static_bus for USB0 port 0 done
1286 01:45:52.083311 scan_bus: bus USB0 port 0 finished in 43 msecs
1287 01:45:52.086721 scan_static_bus for PCI: 00:0d.0 done
1288 01:45:52.093785 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1289 01:45:52.096850 PCI: 00:14.0 scanning...
1290 01:45:52.100479 scan_static_bus for PCI: 00:14.0
1291 01:45:52.100605 USB0 port 0 enabled
1292 01:45:52.103826 USB0 port 0 scanning...
1293 01:45:52.107242 scan_static_bus for USB0 port 0
1294 01:45:52.110240 USB2 port 0 enabled
1295 01:45:52.110354 USB2 port 1 disabled
1296 01:45:52.113689 USB2 port 2 enabled
1297 01:45:52.117065 USB2 port 3 disabled
1298 01:45:52.117205 USB2 port 4 disabled
1299 01:45:52.120244 USB2 port 5 enabled
1300 01:45:52.120389 USB2 port 6 disabled
1301 01:45:52.123611 USB2 port 7 disabled
1302 01:45:52.127135 USB2 port 8 enabled
1303 01:45:52.127322 USB2 port 9 enabled
1304 01:45:52.130455 USB3 port 0 enabled
1305 01:45:52.133701 USB3 port 1 disabled
1306 01:45:52.133945 USB3 port 2 disabled
1307 01:45:52.137906 USB3 port 3 disabled
1308 01:45:52.140878 USB2 port 0 scanning...
1309 01:45:52.143925 scan_static_bus for USB2 port 0
1310 01:45:52.147335 scan_static_bus for USB2 port 0 done
1311 01:45:52.150401 scan_bus: bus USB2 port 0 finished in 6 msecs
1312 01:45:52.153990 USB2 port 2 scanning...
1313 01:45:52.157278 scan_static_bus for USB2 port 2
1314 01:45:52.161022 scan_static_bus for USB2 port 2 done
1315 01:45:52.163871 scan_bus: bus USB2 port 2 finished in 6 msecs
1316 01:45:52.167236 USB2 port 5 scanning...
1317 01:45:52.170724 scan_static_bus for USB2 port 5
1318 01:45:52.174172 scan_static_bus for USB2 port 5 done
1319 01:45:52.177167 scan_bus: bus USB2 port 5 finished in 6 msecs
1320 01:45:52.180849 USB2 port 8 scanning...
1321 01:45:52.183935 scan_static_bus for USB2 port 8
1322 01:45:52.187227 scan_static_bus for USB2 port 8 done
1323 01:45:52.193816 scan_bus: bus USB2 port 8 finished in 6 msecs
1324 01:45:52.194148 USB2 port 9 scanning...
1325 01:45:52.197347 scan_static_bus for USB2 port 9
1326 01:45:52.201084 scan_static_bus for USB2 port 9 done
1327 01:45:52.207539 scan_bus: bus USB2 port 9 finished in 6 msecs
1328 01:45:52.207843 USB3 port 0 scanning...
1329 01:45:52.211195 scan_static_bus for USB3 port 0
1330 01:45:52.213917 scan_static_bus for USB3 port 0 done
1331 01:45:52.220663 scan_bus: bus USB3 port 0 finished in 6 msecs
1332 01:45:52.224302 scan_static_bus for USB0 port 0 done
1333 01:45:52.227450 scan_bus: bus USB0 port 0 finished in 120 msecs
1334 01:45:52.234319 scan_static_bus for PCI: 00:14.0 done
1335 01:45:52.237556 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1336 01:45:52.240573 PCI: 00:14.3 scanning...
1337 01:45:52.244095 scan_static_bus for PCI: 00:14.3
1338 01:45:52.244398 GENERIC: 0.0 enabled
1339 01:45:52.250996 scan_static_bus for PCI: 00:14.3 done
1340 01:45:52.254213 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1341 01:45:52.257715 PCI: 00:15.0 scanning...
1342 01:45:52.260829 scan_static_bus for PCI: 00:15.0
1343 01:45:52.261244 I2C: 00:1a enabled
1344 01:45:52.264210 I2C: 00:31 enabled
1345 01:45:52.264293 I2C: 00:32 enabled
1346 01:45:52.270611 scan_static_bus for PCI: 00:15.0 done
1347 01:45:52.273698 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1348 01:45:52.277134 PCI: 00:15.1 scanning...
1349 01:45:52.280512 scan_static_bus for PCI: 00:15.1
1350 01:45:52.280619 I2C: 00:50 enabled
1351 01:45:52.287383 scan_static_bus for PCI: 00:15.1 done
1352 01:45:52.290847 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1353 01:45:52.294310 PCI: 00:15.3 scanning...
1354 01:45:52.297240 scan_static_bus for PCI: 00:15.3
1355 01:45:52.297356 I2C: 00:10 enabled
1356 01:45:52.300800 scan_static_bus for PCI: 00:15.3 done
1357 01:45:52.307274 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1358 01:45:52.310719 PCI: 00:19.1 scanning...
1359 01:45:52.314155 scan_static_bus for PCI: 00:19.1
1360 01:45:52.314238 I2C: 00:15 enabled
1361 01:45:52.317687 I2C: 00:2c enabled
1362 01:45:52.320953 scan_static_bus for PCI: 00:19.1 done
1363 01:45:52.324009 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1364 01:45:52.327517 PCI: 00:1e.3 scanning...
1365 01:45:52.330511 scan_generic_bus for PCI: 00:1e.3
1366 01:45:52.333844 SPI: 00 enabled
1367 01:45:52.337299 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1368 01:45:52.344334 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1369 01:45:52.347546 PCI: 00:1f.0 scanning...
1370 01:45:52.350725 scan_static_bus for PCI: 00:1f.0
1371 01:45:52.350807 PNP: 0c09.0 enabled
1372 01:45:52.354165 PNP: 0c09.0 scanning...
1373 01:45:52.357419 scan_static_bus for PNP: 0c09.0
1374 01:45:52.360535 scan_static_bus for PNP: 0c09.0 done
1375 01:45:52.363845 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1376 01:45:52.370753 scan_static_bus for PCI: 00:1f.0 done
1377 01:45:52.374464 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1378 01:45:52.377832 PCI: 00:1f.2 scanning...
1379 01:45:52.381159 scan_static_bus for PCI: 00:1f.2
1380 01:45:52.381241 GENERIC: 0.0 enabled
1381 01:45:52.384143 GENERIC: 0.0 scanning...
1382 01:45:52.387882 scan_static_bus for GENERIC: 0.0
1383 01:45:52.391018 GENERIC: 0.0 enabled
1384 01:45:52.391103 GENERIC: 1.0 enabled
1385 01:45:52.397642 scan_static_bus for GENERIC: 0.0 done
1386 01:45:52.401005 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1387 01:45:52.404249 scan_static_bus for PCI: 00:1f.2 done
1388 01:45:52.410672 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1389 01:45:52.410786 PCI: 00:1f.3 scanning...
1390 01:45:52.414185 scan_static_bus for PCI: 00:1f.3
1391 01:45:52.417770 scan_static_bus for PCI: 00:1f.3 done
1392 01:45:52.424176 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1393 01:45:52.427732 PCI: 00:1f.5 scanning...
1394 01:45:52.430775 scan_generic_bus for PCI: 00:1f.5
1395 01:45:52.434306 scan_generic_bus for PCI: 00:1f.5 done
1396 01:45:52.437893 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1397 01:45:52.444179 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1398 01:45:52.447653 scan_static_bus for Root Device done
1399 01:45:52.451150 scan_bus: bus Root Device finished in 729 msecs
1400 01:45:52.451264 done
1401 01:45:52.457725 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1402 01:45:52.464455 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1403 01:45:52.471264 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1404 01:45:52.474639 SPI flash protection: WPSW=0 SRP0=0
1405 01:45:52.477692 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1406 01:45:52.484282 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1407 01:45:52.487994 found VGA at PCI: 00:02.0
1408 01:45:52.491419 Setting up VGA for PCI: 00:02.0
1409 01:45:52.494573 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1410 01:45:52.501644 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1411 01:45:52.504856 Allocating resources...
1412 01:45:52.505280 Reading resources...
1413 01:45:52.508201 Root Device read_resources bus 0 link: 0
1414 01:45:52.515073 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1415 01:45:52.518216 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1416 01:45:52.521223 DOMAIN: 0000 read_resources bus 0 link: 0
1417 01:45:52.528412 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1418 01:45:52.534727 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1419 01:45:52.541439 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1420 01:45:52.548032 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1421 01:45:52.554716 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1422 01:45:52.561805 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1423 01:45:52.564961 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1424 01:45:52.571966 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1425 01:45:52.578459 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1426 01:45:52.585355 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1427 01:45:52.592014 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1428 01:45:52.598271 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1429 01:45:52.605232 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1430 01:45:52.611725 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1431 01:45:52.618346 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1432 01:45:52.624644 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1433 01:45:52.631333 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1434 01:45:52.638503 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1435 01:45:52.641265 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1436 01:45:52.647940 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1437 01:45:52.654868 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1438 01:45:52.658213 PCI: 00:04.0 read_resources bus 1 link: 0
1439 01:45:52.664708 PCI: 00:04.0 read_resources bus 1 link: 0 done
1440 01:45:52.668650 PCI: 00:06.0 read_resources bus 1 link: 0
1441 01:45:52.671666 PCI: 00:06.0 read_resources bus 1 link: 0 done
1442 01:45:52.678758 PCI: 00:0d.0 read_resources bus 0 link: 0
1443 01:45:52.681999 USB0 port 0 read_resources bus 0 link: 0
1444 01:45:52.685313 USB0 port 0 read_resources bus 0 link: 0 done
1445 01:45:52.691707 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1446 01:45:52.695576 PCI: 00:14.0 read_resources bus 0 link: 0
1447 01:45:52.698445 USB0 port 0 read_resources bus 0 link: 0
1448 01:45:52.704859 USB0 port 0 read_resources bus 0 link: 0 done
1449 01:45:52.708511 PCI: 00:14.0 read_resources bus 0 link: 0 done
1450 01:45:52.712051 PCI: 00:14.3 read_resources bus 0 link: 0
1451 01:45:52.718537 PCI: 00:14.3 read_resources bus 0 link: 0 done
1452 01:45:52.721895 PCI: 00:15.0 read_resources bus 0 link: 0
1453 01:45:52.724915 PCI: 00:15.0 read_resources bus 0 link: 0 done
1454 01:45:52.731649 PCI: 00:15.1 read_resources bus 0 link: 0
1455 01:45:52.734777 PCI: 00:15.1 read_resources bus 0 link: 0 done
1456 01:45:52.738365 PCI: 00:15.3 read_resources bus 0 link: 0
1457 01:45:52.745211 PCI: 00:15.3 read_resources bus 0 link: 0 done
1458 01:45:52.748515 PCI: 00:19.1 read_resources bus 0 link: 0
1459 01:45:52.755232 PCI: 00:19.1 read_resources bus 0 link: 0 done
1460 01:45:52.758426 PCI: 00:1e.3 read_resources bus 2 link: 0
1461 01:45:52.762215 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1462 01:45:52.768328 PCI: 00:1f.0 read_resources bus 0 link: 0
1463 01:45:52.771650 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1464 01:45:52.775144 PCI: 00:1f.2 read_resources bus 0 link: 0
1465 01:45:52.778175 GENERIC: 0.0 read_resources bus 0 link: 0
1466 01:45:52.785240 GENERIC: 0.0 read_resources bus 0 link: 0 done
1467 01:45:52.788547 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1468 01:45:52.795469 DOMAIN: 0000 read_resources bus 0 link: 0 done
1469 01:45:52.798490 Root Device read_resources bus 0 link: 0 done
1470 01:45:52.802098 Done reading resources.
1471 01:45:52.808657 Show resources in subtree (Root Device)...After reading.
1472 01:45:52.812285 Root Device child on link 0 CPU_CLUSTER: 0
1473 01:45:52.815275 CPU_CLUSTER: 0 child on link 0 APIC: 00
1474 01:45:52.818627 APIC: 00
1475 01:45:52.818792 APIC: 12
1476 01:45:52.818942 APIC: 14
1477 01:45:52.822203 APIC: 16
1478 01:45:52.822429 APIC: 10
1479 01:45:52.822625 APIC: 01
1480 01:45:52.825577 APIC: 09
1481 01:45:52.825730 APIC: 08
1482 01:45:52.828503 DOMAIN: 0000 child on link 0 GPIO: 0
1483 01:45:52.838888 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1484 01:45:52.848989 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1485 01:45:52.849159 GPIO: 0
1486 01:45:52.852022 PCI: 00:00.0
1487 01:45:52.862003 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1488 01:45:52.872010 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1489 01:45:52.878902 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1490 01:45:52.889237 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1491 01:45:52.899116 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1492 01:45:52.909079 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1493 01:45:52.919592 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1494 01:45:52.925884 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1495 01:45:52.936007 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1496 01:45:52.946552 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1497 01:45:52.956034 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1498 01:45:52.966405 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1499 01:45:52.973228 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1500 01:45:52.982790 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1501 01:45:52.993651 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1502 01:45:53.003051 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1503 01:45:53.013267 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1504 01:45:53.023561 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1505 01:45:53.033335 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1506 01:45:53.039497 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1507 01:45:53.049974 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1508 01:45:53.060293 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1509 01:45:53.069876 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1510 01:45:53.080221 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1511 01:45:53.089765 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1512 01:45:53.096737 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1513 01:45:53.107091 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1514 01:45:53.116532 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1515 01:45:53.119894 PCI: 00:02.0
1516 01:45:53.130252 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1517 01:45:53.140089 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1518 01:45:53.146564 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1519 01:45:53.153352 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1520 01:45:53.163562 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1521 01:45:53.163816 GENERIC: 0.0
1522 01:45:53.170291 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1523 01:45:53.176582 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1524 01:45:53.186480 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1525 01:45:53.196788 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1526 01:45:53.199877 PCI: 01:00.0
1527 01:45:53.209875 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1528 01:45:53.216745 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1529 01:45:53.219964 PCI: 00:08.0
1530 01:45:53.220209 PCI: 00:0a.0
1531 01:45:53.229981 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1532 01:45:53.236872 PCI: 00:0d.0 child on link 0 USB0 port 0
1533 01:45:53.246737 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1534 01:45:53.250040 USB0 port 0 child on link 0 USB3 port 0
1535 01:45:53.253219 USB3 port 0
1536 01:45:53.253456 USB3 port 1
1537 01:45:53.256885 USB3 port 2
1538 01:45:53.257138 USB3 port 3
1539 01:45:53.260040 PCI: 00:14.0 child on link 0 USB0 port 0
1540 01:45:53.273727 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1541 01:45:53.276544 USB0 port 0 child on link 0 USB2 port 0
1542 01:45:53.276815 USB2 port 0
1543 01:45:53.280150 USB2 port 1
1544 01:45:53.280403 USB2 port 2
1545 01:45:53.283741 USB2 port 3
1546 01:45:53.283955 USB2 port 4
1547 01:45:53.286699 USB2 port 5
1548 01:45:53.290220 USB2 port 6
1549 01:45:53.290442 USB2 port 7
1550 01:45:53.293745 USB2 port 8
1551 01:45:53.293978 USB2 port 9
1552 01:45:53.296587 USB3 port 0
1553 01:45:53.296812 USB3 port 1
1554 01:45:53.300330 USB3 port 2
1555 01:45:53.300587 USB3 port 3
1556 01:45:53.303444 PCI: 00:14.2
1557 01:45:53.313445 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1558 01:45:53.323493 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1559 01:45:53.326756 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1560 01:45:53.336752 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 01:45:53.340530 GENERIC: 0.0
1562 01:45:53.343777 PCI: 00:15.0 child on link 0 I2C: 00:1a
1563 01:45:53.354012 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 01:45:53.354261 I2C: 00:1a
1565 01:45:53.356986 I2C: 00:31
1566 01:45:53.357229 I2C: 00:32
1567 01:45:53.360247 PCI: 00:15.1 child on link 0 I2C: 00:50
1568 01:45:53.370283 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 01:45:53.373537 I2C: 00:50
1570 01:45:53.373778 PCI: 00:15.2
1571 01:45:53.380818 PCI: 00:15.3 child on link 0 I2C: 00:10
1572 01:45:53.390619 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 01:45:53.390943 I2C: 00:10
1574 01:45:53.394063 PCI: 00:16.0
1575 01:45:53.403895 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 01:45:53.404146 PCI: 00:19.0
1577 01:45:53.407470 PCI: 00:19.1 child on link 0 I2C: 00:15
1578 01:45:53.417368 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1579 01:45:53.420655 I2C: 00:15
1580 01:45:53.420896 I2C: 00:2c
1581 01:45:53.424155 PCI: 00:1e.0
1582 01:45:53.434306 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1583 01:45:53.437907 PCI: 00:1e.3 child on link 0 SPI: 00
1584 01:45:53.447635 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1585 01:45:53.450903 SPI: 00
1586 01:45:53.454464 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1587 01:45:53.464159 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1588 01:45:53.464244 PNP: 0c09.0
1589 01:45:53.474162 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1590 01:45:53.477565 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1591 01:45:53.487479 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1592 01:45:53.497505 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1593 01:45:53.501086 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1594 01:45:53.501173 GENERIC: 0.0
1595 01:45:53.504293 GENERIC: 1.0
1596 01:45:53.507400 PCI: 00:1f.3
1597 01:45:53.517849 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1598 01:45:53.527548 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1599 01:45:53.527662 PCI: 00:1f.5
1600 01:45:53.537445 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1601 01:45:53.544183 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1602 01:45:53.551267 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1603 01:45:53.557604 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1604 01:45:53.561039 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1605 01:45:53.567536 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1606 01:45:53.571100 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1607 01:45:53.577691 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1608 01:45:53.584243 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1609 01:45:53.594468 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1610 01:45:53.601102 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1611 01:45:53.607988 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1612 01:45:53.614771 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1613 01:45:53.621068 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1614 01:45:53.628113 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1615 01:45:53.631003 DOMAIN: 0000: Resource ranges:
1616 01:45:53.634607 * Base: 1000, Size: 800, Tag: 100
1617 01:45:53.637797 * Base: 1900, Size: e700, Tag: 100
1618 01:45:53.644451 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1619 01:45:53.651272 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1620 01:45:53.658353 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1621 01:45:53.664780 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1622 01:45:53.674917 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1623 01:45:53.681403 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1624 01:45:53.688412 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1625 01:45:53.694904 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1626 01:45:53.705227 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1627 01:45:53.711814 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1628 01:45:53.718477 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1629 01:45:53.728356 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1630 01:45:53.735245 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1631 01:45:53.741810 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1632 01:45:53.751906 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1633 01:45:53.758475 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1634 01:45:53.764786 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1635 01:45:53.774648 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1636 01:45:53.781568 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1637 01:45:53.788096 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1638 01:45:53.798375 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1639 01:45:53.805281 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1640 01:45:53.811810 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1641 01:45:53.821708 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1642 01:45:53.828269 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1643 01:45:53.834751 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1644 01:45:53.841720 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1645 01:45:53.851920 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1646 01:45:53.858219 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1647 01:45:53.864893 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1648 01:45:53.874956 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1649 01:45:53.881666 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1650 01:45:53.888271 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1651 01:45:53.891515 DOMAIN: 0000: Resource ranges:
1652 01:45:53.898356 * Base: 80400000, Size: 3fc00000, Tag: 200
1653 01:45:53.901872 * Base: d0000000, Size: 28000000, Tag: 200
1654 01:45:53.904926 * Base: fa000000, Size: 1000000, Tag: 200
1655 01:45:53.908209 * Base: fb001000, Size: 17ff000, Tag: 200
1656 01:45:53.914983 * Base: fe800000, Size: 300000, Tag: 200
1657 01:45:53.918457 * Base: feb80000, Size: 80000, Tag: 200
1658 01:45:53.922127 * Base: fed00000, Size: 40000, Tag: 200
1659 01:45:53.925458 * Base: fed70000, Size: 10000, Tag: 200
1660 01:45:53.932285 * Base: fed88000, Size: 8000, Tag: 200
1661 01:45:53.935209 * Base: fed93000, Size: d000, Tag: 200
1662 01:45:53.938743 * Base: feda2000, Size: 1e000, Tag: 200
1663 01:45:53.941712 * Base: fede0000, Size: 1220000, Tag: 200
1664 01:45:53.948935 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1665 01:45:53.955235 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1666 01:45:53.962236 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1667 01:45:53.968667 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1668 01:45:53.975744 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1669 01:45:53.982232 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1670 01:45:53.989359 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1671 01:45:53.995907 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1672 01:45:54.002574 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1673 01:45:54.009402 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1674 01:45:54.016108 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1675 01:45:54.022594 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1676 01:45:54.029245 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1677 01:45:54.035976 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1678 01:45:54.042851 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1679 01:45:54.049322 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1680 01:45:54.055835 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1681 01:45:54.062843 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1682 01:45:54.069324 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1683 01:45:54.076267 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1684 01:45:54.082851 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1685 01:45:54.089724 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1686 01:45:54.092446 PCI: 00:06.0: Resource ranges:
1687 01:45:54.096072 * Base: 80400000, Size: 100000, Tag: 200
1688 01:45:54.103157 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1689 01:45:54.109281 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1690 01:45:54.119349 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1691 01:45:54.125956 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1692 01:45:54.129177 Root Device assign_resources, bus 0 link: 0
1693 01:45:54.135944 DOMAIN: 0000 assign_resources, bus 0 link: 0
1694 01:45:54.142782 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1695 01:45:54.152461 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1696 01:45:54.159449 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1697 01:45:54.166516 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1698 01:45:54.172475 PCI: 00:04.0 assign_resources, bus 1 link: 0
1699 01:45:54.175966 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1700 01:45:54.185835 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1701 01:45:54.195956 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1702 01:45:54.202319 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1703 01:45:54.209096 PCI: 00:06.0 assign_resources, bus 1 link: 0
1704 01:45:54.215729 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1705 01:45:54.222800 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1706 01:45:54.229154 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1707 01:45:54.235944 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1708 01:45:54.245679 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1709 01:45:54.249293 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1710 01:45:54.255343 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1711 01:45:54.262317 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1712 01:45:54.265315 PCI: 00:14.0 assign_resources, bus 0 link: 0
1713 01:45:54.272258 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1714 01:45:54.279002 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1715 01:45:54.288858 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1716 01:45:54.295299 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1717 01:45:54.298986 PCI: 00:14.3 assign_resources, bus 0 link: 0
1718 01:45:54.305533 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1719 01:45:54.312461 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1720 01:45:54.318871 PCI: 00:15.0 assign_resources, bus 0 link: 0
1721 01:45:54.322513 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1722 01:45:54.332074 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1723 01:45:54.335440 PCI: 00:15.1 assign_resources, bus 0 link: 0
1724 01:45:54.338997 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1725 01:45:54.348693 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1726 01:45:54.352414 PCI: 00:15.3 assign_resources, bus 0 link: 0
1727 01:45:54.358680 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1728 01:45:54.365504 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1729 01:45:54.372272 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1730 01:45:54.378486 PCI: 00:19.1 assign_resources, bus 0 link: 0
1731 01:45:54.381951 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1732 01:45:54.392207 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1733 01:45:54.395490 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1734 01:45:54.402448 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1735 01:45:54.405485 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1736 01:45:54.408821 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1737 01:45:54.415391 LPC: Trying to open IO window from 800 size 1ff
1738 01:45:54.422037 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1739 01:45:54.432414 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1740 01:45:54.439217 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1741 01:45:54.445310 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1742 01:45:54.448720 Root Device assign_resources, bus 0 link: 0 done
1743 01:45:54.452083 Done setting resources.
1744 01:45:54.458512 Show resources in subtree (Root Device)...After assigning values.
1745 01:45:54.462204 Root Device child on link 0 CPU_CLUSTER: 0
1746 01:45:54.465332 CPU_CLUSTER: 0 child on link 0 APIC: 00
1747 01:45:54.468493 APIC: 00
1748 01:45:54.468948 APIC: 12
1749 01:45:54.469510 APIC: 14
1750 01:45:54.471923 APIC: 16
1751 01:45:54.472386 APIC: 10
1752 01:45:54.475223 APIC: 01
1753 01:45:54.475796 APIC: 09
1754 01:45:54.476235 APIC: 08
1755 01:45:54.482737 DOMAIN: 0000 child on link 0 GPIO: 0
1756 01:45:54.488805 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1757 01:45:54.498902 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1758 01:45:54.502102 GPIO: 0
1759 01:45:54.502487 PCI: 00:00.0
1760 01:45:54.511898 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1761 01:45:54.522167 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1762 01:45:54.532177 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1763 01:45:54.538530 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1764 01:45:54.548787 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1765 01:45:54.558237 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1766 01:45:54.568456 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1767 01:45:54.578392 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1768 01:45:54.588277 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1769 01:45:54.598251 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1770 01:45:54.604988 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1771 01:45:54.614381 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1772 01:45:54.624416 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1773 01:45:54.634486 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1774 01:45:54.644737 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1775 01:45:54.654606 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1776 01:45:54.661040 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1777 01:45:54.671451 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1778 01:45:54.681116 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1779 01:45:54.691124 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1780 01:45:54.701428 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1781 01:45:54.711313 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1782 01:45:54.721406 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1783 01:45:54.731641 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1784 01:45:54.741494 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1785 01:45:54.748132 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1786 01:45:54.758072 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1787 01:45:54.767938 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1788 01:45:54.771242 PCI: 00:02.0
1789 01:45:54.781305 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1790 01:45:54.791024 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1791 01:45:54.801531 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1792 01:45:54.804389 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1793 01:45:54.815035 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1794 01:45:54.817770 GENERIC: 0.0
1795 01:45:54.821225 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1796 01:45:54.831563 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1797 01:45:54.841317 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1798 01:45:54.854889 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1799 01:45:54.855283 PCI: 01:00.0
1800 01:45:54.864418 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1801 01:45:54.874186 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1802 01:45:54.877634 PCI: 00:08.0
1803 01:45:54.878134 PCI: 00:0a.0
1804 01:45:54.887731 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1805 01:45:54.894246 PCI: 00:0d.0 child on link 0 USB0 port 0
1806 01:45:54.904155 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1807 01:45:54.907580 USB0 port 0 child on link 0 USB3 port 0
1808 01:45:54.910920 USB3 port 0
1809 01:45:54.911232 USB3 port 1
1810 01:45:54.914241 USB3 port 2
1811 01:45:54.914518 USB3 port 3
1812 01:45:54.920859 PCI: 00:14.0 child on link 0 USB0 port 0
1813 01:45:54.931221 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1814 01:45:54.934367 USB0 port 0 child on link 0 USB2 port 0
1815 01:45:54.937453 USB2 port 0
1816 01:45:54.937700 USB2 port 1
1817 01:45:54.941248 USB2 port 2
1818 01:45:54.941526 USB2 port 3
1819 01:45:54.944283 USB2 port 4
1820 01:45:54.944615 USB2 port 5
1821 01:45:54.947703 USB2 port 6
1822 01:45:54.948030 USB2 port 7
1823 01:45:54.951067 USB2 port 8
1824 01:45:54.951375 USB2 port 9
1825 01:45:54.954030 USB3 port 0
1826 01:45:54.954364 USB3 port 1
1827 01:45:54.958318 USB3 port 2
1828 01:45:54.958665 USB3 port 3
1829 01:45:54.961016 PCI: 00:14.2
1830 01:45:54.970891 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1831 01:45:54.981029 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1832 01:45:54.984452 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1833 01:45:54.997714 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1834 01:45:54.998058 GENERIC: 0.0
1835 01:45:55.000957 PCI: 00:15.0 child on link 0 I2C: 00:1a
1836 01:45:55.014264 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1837 01:45:55.014566 I2C: 00:1a
1838 01:45:55.014805 I2C: 00:31
1839 01:45:55.017532 I2C: 00:32
1840 01:45:55.021136 PCI: 00:15.1 child on link 0 I2C: 00:50
1841 01:45:55.030782 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1842 01:45:55.034179 I2C: 00:50
1843 01:45:55.034456 PCI: 00:15.2
1844 01:45:55.040892 PCI: 00:15.3 child on link 0 I2C: 00:10
1845 01:45:55.050589 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1846 01:45:55.050888 I2C: 00:10
1847 01:45:55.053941 PCI: 00:16.0
1848 01:45:55.064213 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1849 01:45:55.064496 PCI: 00:19.0
1850 01:45:55.070669 PCI: 00:19.1 child on link 0 I2C: 00:15
1851 01:45:55.080866 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1852 01:45:55.081172 I2C: 00:15
1853 01:45:55.084350 I2C: 00:2c
1854 01:45:55.084682 PCI: 00:1e.0
1855 01:45:55.097514 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1856 01:45:55.101129 PCI: 00:1e.3 child on link 0 SPI: 00
1857 01:45:55.110838 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1858 01:45:55.111275 SPI: 00
1859 01:45:55.117804 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1860 01:45:55.123917 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1861 01:45:55.127432 PNP: 0c09.0
1862 01:45:55.133924 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1863 01:45:55.140165 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1864 01:45:55.149984 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1865 01:45:55.157048 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1866 01:45:55.163492 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1867 01:45:55.163576 GENERIC: 0.0
1868 01:45:55.166659 GENERIC: 1.0
1869 01:45:55.166739 PCI: 00:1f.3
1870 01:45:55.176977 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1871 01:45:55.190096 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1872 01:45:55.190182 PCI: 00:1f.5
1873 01:45:55.200508 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1874 01:45:55.203468 Done allocating resources.
1875 01:45:55.210578 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2716 ms
1876 01:45:55.213629 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1877 01:45:55.220348 Configure audio over I2S with MAX98373 NAU88L25B.
1878 01:45:55.224357 Enabling BT offload
1879 01:45:55.231578 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1880 01:45:55.235316 Enabling resources...
1881 01:45:55.238707 PCI: 00:00.0 subsystem <- 8086/4609
1882 01:45:55.241584 PCI: 00:00.0 cmd <- 06
1883 01:45:55.245065 PCI: 00:02.0 subsystem <- 8086/46b3
1884 01:45:55.248313 PCI: 00:02.0 cmd <- 03
1885 01:45:55.251755 PCI: 00:04.0 subsystem <- 8086/461d
1886 01:45:55.251838 PCI: 00:04.0 cmd <- 02
1887 01:45:55.255316 PCI: 00:06.0 bridge ctrl <- 0013
1888 01:45:55.258883 PCI: 00:06.0 subsystem <- 8086/464d
1889 01:45:55.261482 PCI: 00:06.0 cmd <- 106
1890 01:45:55.264907 PCI: 00:0a.0 subsystem <- 8086/467d
1891 01:45:55.268339 PCI: 00:0a.0 cmd <- 02
1892 01:45:55.271721 PCI: 00:0d.0 subsystem <- 8086/461e
1893 01:45:55.275184 PCI: 00:0d.0 cmd <- 02
1894 01:45:55.278519 PCI: 00:14.0 subsystem <- 8086/51ed
1895 01:45:55.281621 PCI: 00:14.0 cmd <- 02
1896 01:45:55.284965 PCI: 00:14.2 subsystem <- 8086/51ef
1897 01:45:55.285063 PCI: 00:14.2 cmd <- 02
1898 01:45:55.288575 PCI: 00:14.3 subsystem <- 8086/51f0
1899 01:45:55.292058 PCI: 00:14.3 cmd <- 02
1900 01:45:55.294829 PCI: 00:15.0 subsystem <- 8086/51e8
1901 01:45:55.298452 PCI: 00:15.0 cmd <- 02
1902 01:45:55.302058 PCI: 00:15.1 subsystem <- 8086/51e9
1903 01:45:55.305074 PCI: 00:15.1 cmd <- 06
1904 01:45:55.308400 PCI: 00:15.3 subsystem <- 8086/51eb
1905 01:45:55.312096 PCI: 00:15.3 cmd <- 02
1906 01:45:55.315074 PCI: 00:16.0 subsystem <- 8086/51e0
1907 01:45:55.315157 PCI: 00:16.0 cmd <- 02
1908 01:45:55.318348 PCI: 00:19.1 subsystem <- 8086/51c6
1909 01:45:55.321700 PCI: 00:19.1 cmd <- 02
1910 01:45:55.325037 PCI: 00:1e.0 subsystem <- 8086/51a8
1911 01:45:55.328579 PCI: 00:1e.0 cmd <- 06
1912 01:45:55.332021 PCI: 00:1e.3 subsystem <- 8086/51ab
1913 01:45:55.335595 PCI: 00:1e.3 cmd <- 02
1914 01:45:55.338248 PCI: 00:1f.0 subsystem <- 8086/5182
1915 01:45:55.338427 PCI: 00:1f.0 cmd <- 407
1916 01:45:55.345388 PCI: 00:1f.3 subsystem <- 8086/51c8
1917 01:45:55.345577 PCI: 00:1f.3 cmd <- 02
1918 01:45:55.348916 PCI: 00:1f.5 subsystem <- 8086/51a4
1919 01:45:55.352378 PCI: 00:1f.5 cmd <- 406
1920 01:45:55.355211 PCI: 01:00.0 cmd <- 02
1921 01:45:55.355674 done.
1922 01:45:55.361974 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1923 01:45:55.362450 ME: Version: Unavailable
1924 01:45:55.368926 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1925 01:45:55.372212 Initializing devices...
1926 01:45:55.372788 Root Device init
1927 01:45:55.375487 mainboard: EC init
1928 01:45:55.378637 Chrome EC: Set SMI mask to 0x0000000000000000
1929 01:45:55.381976 Chrome EC: UHEPI supported
1930 01:45:55.388825 Chrome EC: clear events_b mask to 0x0000000000000000
1931 01:45:55.395913 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1932 01:45:55.402436 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1933 01:45:55.405772 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1934 01:45:55.412697 Chrome EC: Set WAKE mask to 0x0000000000000000
1935 01:45:55.416206 Root Device init finished in 39 msecs
1936 01:45:55.419062 PCI: 00:00.0 init
1937 01:45:55.422015 CPU TDP = 15 Watts
1938 01:45:55.422144 CPU PL1 = 15 Watts
1939 01:45:55.425422 CPU PL2 = 55 Watts
1940 01:45:55.425532 CPU PL4 = 123 Watts
1941 01:45:55.432506 PCI: 00:00.0 init finished in 8 msecs
1942 01:45:55.432605 PCI: 00:02.0 init
1943 01:45:55.435413 GMA: Found VBT in CBFS
1944 01:45:55.438958 GMA: Found valid VBT in CBFS
1945 01:45:55.442647 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1946 01:45:55.452538 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1947 01:45:55.455864 PCI: 00:02.0 init finished in 18 msecs
1948 01:45:55.456009 PCI: 00:06.0 init
1949 01:45:55.458908 Initializing PCH PCIe bridge.
1950 01:45:55.462445 PCI: 00:06.0 init finished in 3 msecs
1951 01:45:55.465423 PCI: 00:0a.0 init
1952 01:45:55.469450 PCI: 00:0a.0 init finished in 0 msecs
1953 01:45:55.472131 PCI: 00:14.0 init
1954 01:45:55.475847 PCI: 00:14.0 init finished in 0 msecs
1955 01:45:55.476187 PCI: 00:14.2 init
1956 01:45:55.482513 PCI: 00:14.2 init finished in 0 msecs
1957 01:45:55.482839 PCI: 00:15.0 init
1958 01:45:55.485833 I2C bus 0 version 0x3230302a
1959 01:45:55.489570 DW I2C bus 0 at 0x80655000 (400 KHz)
1960 01:45:55.492402 PCI: 00:15.0 init finished in 6 msecs
1961 01:45:55.496018 PCI: 00:15.1 init
1962 01:45:55.498865 I2C bus 1 version 0x3230302a
1963 01:45:55.502542 DW I2C bus 1 at 0x80656000 (400 KHz)
1964 01:45:55.505459 PCI: 00:15.1 init finished in 6 msecs
1965 01:45:55.508854 PCI: 00:15.3 init
1966 01:45:55.509093 I2C bus 3 version 0x3230302a
1967 01:45:55.515939 DW I2C bus 3 at 0x80657000 (400 KHz)
1968 01:45:55.518976 PCI: 00:15.3 init finished in 6 msecs
1969 01:45:55.519279 PCI: 00:16.0 init
1970 01:45:55.522750 PCI: 00:16.0 init finished in 0 msecs
1971 01:45:55.525577 PCI: 00:19.1 init
1972 01:45:55.529564 I2C bus 5 version 0x3230302a
1973 01:45:55.532137 DW I2C bus 5 at 0x80659000 (400 KHz)
1974 01:45:55.535546 PCI: 00:19.1 init finished in 6 msecs
1975 01:45:55.539062 PCI: 00:1f.0 init
1976 01:45:55.542281 IOAPIC: Initializing IOAPIC at 0xfec00000
1977 01:45:55.542685 IOAPIC: ID = 0x02
1978 01:45:55.545822 IOAPIC: Dumping registers
1979 01:45:55.549294 reg 0x0000: 0x02000000
1980 01:45:55.552451 reg 0x0001: 0x00770020
1981 01:45:55.555545 reg 0x0002: 0x00000000
1982 01:45:55.556012 IOAPIC: 120 interrupts
1983 01:45:55.559167 IOAPIC: Clearing IOAPIC at 0xfec00000
1984 01:45:55.566011 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1985 01:45:55.569073 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1986 01:45:55.575544 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1987 01:45:55.579400 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1988 01:45:55.585714 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1989 01:45:55.589407 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1990 01:45:55.595664 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1991 01:45:55.599317 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1992 01:45:55.602143 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1993 01:45:55.609115 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1994 01:45:55.611886 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1995 01:45:55.619039 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1996 01:45:55.622676 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1997 01:45:55.629047 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1998 01:45:55.632441 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1999 01:45:55.638773 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2000 01:45:55.642231 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2001 01:45:55.645980 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2002 01:45:55.652031 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2003 01:45:55.655428 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2004 01:45:55.662249 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2005 01:45:55.665480 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2006 01:45:55.672272 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2007 01:45:55.675575 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2008 01:45:55.678557 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2009 01:45:55.685279 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2010 01:45:55.688665 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2011 01:45:55.695360 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2012 01:45:55.698617 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2013 01:45:55.705467 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2014 01:45:55.708893 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2015 01:45:55.715272 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2016 01:45:55.718961 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2017 01:45:55.725091 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2018 01:45:55.728590 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2019 01:45:55.731884 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2020 01:45:55.738533 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2021 01:45:55.741906 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2022 01:45:55.748317 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2023 01:45:55.751778 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2024 01:45:55.758192 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2025 01:45:55.761667 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2026 01:45:55.768012 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2027 01:45:55.771478 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2028 01:45:55.775252 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2029 01:45:55.781798 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2030 01:45:55.785059 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2031 01:45:55.791555 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2032 01:45:55.794891 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2033 01:45:55.801592 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2034 01:45:55.804898 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2035 01:45:55.808151 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2036 01:45:55.815345 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2037 01:45:55.818388 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2038 01:45:55.824841 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2039 01:45:55.828391 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2040 01:45:55.834735 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2041 01:45:55.838128 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2042 01:45:55.844541 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2043 01:45:55.847989 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2044 01:45:55.851664 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2045 01:45:55.858200 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2046 01:45:55.861366 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2047 01:45:55.868208 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2048 01:45:55.870955 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2049 01:45:55.877964 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2050 01:45:55.881175 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2051 01:45:55.887931 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2052 01:45:55.891309 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2053 01:45:55.894863 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2054 01:45:55.901088 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2055 01:45:55.904605 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2056 01:45:55.911113 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2057 01:45:55.914269 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2058 01:45:55.921221 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2059 01:45:55.924274 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2060 01:45:55.930817 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2061 01:45:55.934198 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2062 01:45:55.938098 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2063 01:45:55.944267 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2064 01:45:55.947490 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2065 01:45:55.954504 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2066 01:45:55.957707 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2067 01:45:55.964671 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2068 01:45:55.967774 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2069 01:45:55.971428 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2070 01:45:55.977737 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2071 01:45:55.981285 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2072 01:45:55.987463 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2073 01:45:55.991151 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2074 01:45:55.997454 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2075 01:45:56.000992 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2076 01:45:56.007679 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2077 01:45:56.010726 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2078 01:45:56.014252 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2079 01:45:56.020570 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2080 01:45:56.024163 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2081 01:45:56.030730 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2082 01:45:56.034138 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2083 01:45:56.040719 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2084 01:45:56.044355 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2085 01:45:56.050549 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2086 01:45:56.054097 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2087 01:45:56.057291 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2088 01:45:56.064064 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2089 01:45:56.067497 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2090 01:45:56.074302 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2091 01:45:56.077325 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2092 01:45:56.084225 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2093 01:45:56.087028 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2094 01:45:56.093980 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2095 01:45:56.097098 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2096 01:45:56.100377 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2097 01:45:56.107274 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2098 01:45:56.110810 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2099 01:45:56.117150 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2100 01:45:56.120459 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2101 01:45:56.126893 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2102 01:45:56.130715 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2103 01:45:56.133898 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2104 01:45:56.140370 IOAPIC: Bootstrap Processor Local APIC = 0x00
2105 01:45:56.143739 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2106 01:45:56.150356 PCI: 00:1f.0 init finished in 607 msecs
2107 01:45:56.150827 PCI: 00:1f.2 init
2108 01:45:56.153472 apm_control: Disabling ACPI.
2109 01:45:56.158736 APMC done.
2110 01:45:56.162169 PCI: 00:1f.2 init finished in 6 msecs
2111 01:45:56.164858 PCI: 00:1f.3 init
2112 01:45:56.168723 PCI: 00:1f.3 init finished in 0 msecs
2113 01:45:56.169212 PCI: 01:00.0 init
2114 01:45:56.171883 PCI: 01:00.0 init finished in 0 msecs
2115 01:45:56.175168 PNP: 0c09.0 init
2116 01:45:56.178429 Google Chrome EC uptime: 12.124 seconds
2117 01:45:56.185196 Google Chrome AP resets since EC boot: 1
2118 01:45:56.188277 Google Chrome most recent AP reset causes:
2119 01:45:56.191893 0.342: 32775 shutdown: entering G3
2120 01:45:56.198076 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2121 01:45:56.201394 PNP: 0c09.0 init finished in 23 msecs
2122 01:45:56.205117 GENERIC: 0.0 init
2123 01:45:56.208516 GENERIC: 0.0 init finished in 0 msecs
2124 01:45:56.208984 GENERIC: 1.0 init
2125 01:45:56.211446 GENERIC: 1.0 init finished in 0 msecs
2126 01:45:56.214841 Devices initialized
2127 01:45:56.218331 Show all devs... After init.
2128 01:45:56.221754 Root Device: enabled 1
2129 01:45:56.222267 CPU_CLUSTER: 0: enabled 1
2130 01:45:56.225252 DOMAIN: 0000: enabled 1
2131 01:45:56.228194 GPIO: 0: enabled 1
2132 01:45:56.231540 PCI: 00:00.0: enabled 1
2133 01:45:56.232003 PCI: 00:01.0: enabled 0
2134 01:45:56.235049 PCI: 00:01.1: enabled 0
2135 01:45:56.237963 PCI: 00:02.0: enabled 1
2136 01:45:56.238432 PCI: 00:04.0: enabled 1
2137 01:45:56.241436 PCI: 00:05.0: enabled 0
2138 01:45:56.244817 PCI: 00:06.0: enabled 1
2139 01:45:56.248229 PCI: 00:06.2: enabled 0
2140 01:45:56.248693 PCI: 00:07.0: enabled 0
2141 01:45:56.251738 PCI: 00:07.1: enabled 0
2142 01:45:56.254993 PCI: 00:07.2: enabled 0
2143 01:45:56.258415 PCI: 00:07.3: enabled 0
2144 01:45:56.258881 PCI: 00:08.0: enabled 0
2145 01:45:56.261296 PCI: 00:09.0: enabled 0
2146 01:45:56.264912 PCI: 00:0a.0: enabled 1
2147 01:45:56.268392 PCI: 00:0d.0: enabled 1
2148 01:45:56.268859 PCI: 00:0d.1: enabled 0
2149 01:45:56.271244 PCI: 00:0d.2: enabled 0
2150 01:45:56.274689 PCI: 00:0d.3: enabled 0
2151 01:45:56.275253 PCI: 00:0e.0: enabled 0
2152 01:45:56.278119 PCI: 00:10.0: enabled 0
2153 01:45:56.281582 PCI: 00:10.1: enabled 0
2154 01:45:56.284911 PCI: 00:10.6: enabled 0
2155 01:45:56.285431 PCI: 00:10.7: enabled 0
2156 01:45:56.287992 PCI: 00:12.0: enabled 0
2157 01:45:56.291523 PCI: 00:12.6: enabled 0
2158 01:45:56.294903 PCI: 00:12.7: enabled 0
2159 01:45:56.295475 PCI: 00:13.0: enabled 0
2160 01:45:56.298155 PCI: 00:14.0: enabled 1
2161 01:45:56.301557 PCI: 00:14.1: enabled 0
2162 01:45:56.305176 PCI: 00:14.2: enabled 1
2163 01:45:56.305640 PCI: 00:14.3: enabled 1
2164 01:45:56.308319 PCI: 00:15.0: enabled 1
2165 01:45:56.311883 PCI: 00:15.1: enabled 1
2166 01:45:56.312348 PCI: 00:15.2: enabled 0
2167 01:45:56.314761 PCI: 00:15.3: enabled 1
2168 01:45:56.318605 PCI: 00:16.0: enabled 1
2169 01:45:56.321180 PCI: 00:16.1: enabled 0
2170 01:45:56.321643 PCI: 00:16.2: enabled 0
2171 01:45:56.325113 PCI: 00:16.3: enabled 0
2172 01:45:56.327915 PCI: 00:16.4: enabled 0
2173 01:45:56.331585 PCI: 00:16.5: enabled 0
2174 01:45:56.332200 PCI: 00:17.0: enabled 0
2175 01:45:56.334473 PCI: 00:19.0: enabled 0
2176 01:45:56.338137 PCI: 00:19.1: enabled 1
2177 01:45:56.341491 PCI: 00:19.2: enabled 0
2178 01:45:56.341977 PCI: 00:1a.0: enabled 0
2179 01:45:56.345026 PCI: 00:1c.0: enabled 0
2180 01:45:56.348423 PCI: 00:1c.1: enabled 0
2181 01:45:56.348886 PCI: 00:1c.2: enabled 0
2182 01:45:56.351530 PCI: 00:1c.3: enabled 0
2183 01:45:56.354726 PCI: 00:1c.4: enabled 0
2184 01:45:56.358205 PCI: 00:1c.5: enabled 0
2185 01:45:56.358687 PCI: 00:1c.6: enabled 0
2186 01:45:56.361673 PCI: 00:1c.7: enabled 0
2187 01:45:56.364865 PCI: 00:1d.0: enabled 0
2188 01:45:56.367976 PCI: 00:1d.1: enabled 0
2189 01:45:56.368443 PCI: 00:1d.2: enabled 0
2190 01:45:56.371210 PCI: 00:1d.3: enabled 0
2191 01:45:56.374836 PCI: 00:1e.0: enabled 1
2192 01:45:56.377768 PCI: 00:1e.1: enabled 0
2193 01:45:56.378273 PCI: 00:1e.2: enabled 0
2194 01:45:56.381239 PCI: 00:1e.3: enabled 1
2195 01:45:56.384687 PCI: 00:1f.0: enabled 1
2196 01:45:56.388090 PCI: 00:1f.1: enabled 0
2197 01:45:56.388821 PCI: 00:1f.2: enabled 1
2198 01:45:56.391675 PCI: 00:1f.3: enabled 1
2199 01:45:56.394326 PCI: 00:1f.4: enabled 0
2200 01:45:56.394813 PCI: 00:1f.5: enabled 1
2201 01:45:56.398083 PCI: 00:1f.6: enabled 0
2202 01:45:56.401462 PCI: 00:1f.7: enabled 0
2203 01:45:56.404908 GENERIC: 0.0: enabled 1
2204 01:45:56.405371 GENERIC: 0.0: enabled 1
2205 01:45:56.407730 GENERIC: 1.0: enabled 1
2206 01:45:56.411368 GENERIC: 0.0: enabled 1
2207 01:45:56.414762 GENERIC: 1.0: enabled 1
2208 01:45:56.415314 USB0 port 0: enabled 1
2209 01:45:56.418198 USB0 port 0: enabled 1
2210 01:45:56.421408 GENERIC: 0.0: enabled 1
2211 01:45:56.422074 I2C: 00:1a: enabled 1
2212 01:45:56.424740 I2C: 00:31: enabled 1
2213 01:45:56.428272 I2C: 00:32: enabled 1
2214 01:45:56.428760 I2C: 00:50: enabled 1
2215 01:45:56.431567 I2C: 00:10: enabled 1
2216 01:45:56.434509 I2C: 00:15: enabled 1
2217 01:45:56.435100 I2C: 00:2c: enabled 1
2218 01:45:56.438103 GENERIC: 0.0: enabled 1
2219 01:45:56.440996 SPI: 00: enabled 1
2220 01:45:56.441455 PNP: 0c09.0: enabled 1
2221 01:45:56.444465 GENERIC: 0.0: enabled 1
2222 01:45:56.447848 USB3 port 0: enabled 1
2223 01:45:56.451260 USB3 port 1: enabled 0
2224 01:45:56.451803 USB3 port 2: enabled 1
2225 01:45:56.454273 USB3 port 3: enabled 0
2226 01:45:56.457945 USB2 port 0: enabled 1
2227 01:45:56.458419 USB2 port 1: enabled 0
2228 01:45:56.460981 USB2 port 2: enabled 1
2229 01:45:56.464785 USB2 port 3: enabled 0
2230 01:45:56.468032 USB2 port 4: enabled 0
2231 01:45:56.468504 USB2 port 5: enabled 1
2232 01:45:56.471021 USB2 port 6: enabled 0
2233 01:45:56.474253 USB2 port 7: enabled 0
2234 01:45:56.474726 USB2 port 8: enabled 1
2235 01:45:56.477723 USB2 port 9: enabled 1
2236 01:45:56.481481 USB3 port 0: enabled 1
2237 01:45:56.482085 USB3 port 1: enabled 0
2238 01:45:56.484441 USB3 port 2: enabled 0
2239 01:45:56.487865 USB3 port 3: enabled 0
2240 01:45:56.491309 GENERIC: 0.0: enabled 1
2241 01:45:56.491778 GENERIC: 1.0: enabled 1
2242 01:45:56.494701 APIC: 00: enabled 1
2243 01:45:56.498179 APIC: 12: enabled 1
2244 01:45:56.498650 APIC: 14: enabled 1
2245 01:45:56.500927 APIC: 16: enabled 1
2246 01:45:56.501395 APIC: 10: enabled 1
2247 01:45:56.504599 APIC: 01: enabled 1
2248 01:45:56.507900 APIC: 09: enabled 1
2249 01:45:56.508368 APIC: 08: enabled 1
2250 01:45:56.511384 PCI: 01:00.0: enabled 1
2251 01:45:56.517901 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2252 01:45:56.521037 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2253 01:45:56.524530 ELOG: NV offset 0xf20000 size 0x4000
2254 01:45:56.532447 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2255 01:45:56.538937 ELOG: Event(17) added with size 13 at 2024-02-06 01:45:57 UTC
2256 01:45:56.545820 ELOG: Event(9E) added with size 10 at 2024-02-06 01:45:57 UTC
2257 01:45:56.552687 ELOG: Event(9F) added with size 14 at 2024-02-06 01:45:57 UTC
2258 01:45:56.558966 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2259 01:45:56.565764 ELOG: Event(A0) added with size 9 at 2024-02-06 01:45:57 UTC
2260 01:45:56.568720 elog_add_boot_reason: Logged dev mode boot
2261 01:45:56.575870 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2262 01:45:56.576363 Finalize devices...
2263 01:45:56.578983 PCI: 00:16.0 final
2264 01:45:56.581955 PCI: 00:1f.2 final
2265 01:45:56.582345 GENERIC: 0.0 final
2266 01:45:56.589035 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2267 01:45:56.592546 GENERIC: 1.0 final
2268 01:45:56.595328 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2269 01:45:56.598853 Devices finalized
2270 01:45:56.605688 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2271 01:45:56.609160 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2272 01:45:56.615465 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2273 01:45:56.618842 ME: HFSTS1 : 0x90000245
2274 01:45:56.625818 ME: HFSTS2 : 0x82100116
2275 01:45:56.628697 ME: HFSTS3 : 0x00000050
2276 01:45:56.632428 ME: HFSTS4 : 0x00004000
2277 01:45:56.639232 ME: HFSTS5 : 0x00000000
2278 01:45:56.641968 ME: HFSTS6 : 0x40600006
2279 01:45:56.645442 ME: Manufacturing Mode : NO
2280 01:45:56.648828 ME: SPI Protection Mode Enabled : YES
2281 01:45:56.655791 ME: FPFs Committed : YES
2282 01:45:56.658626 ME: Manufacturing Vars Locked : YES
2283 01:45:56.662126 ME: FW Partition Table : OK
2284 01:45:56.665210 ME: Bringup Loader Failure : NO
2285 01:45:56.668635 ME: Firmware Init Complete : YES
2286 01:45:56.671951 ME: Boot Options Present : NO
2287 01:45:56.675401 ME: Update In Progress : NO
2288 01:45:56.678392 ME: D0i3 Support : YES
2289 01:45:56.684976 ME: Low Power State Enabled : NO
2290 01:45:56.688493 ME: CPU Replaced : YES
2291 01:45:56.691786 ME: CPU Replacement Valid : YES
2292 01:45:56.695504 ME: Current Working State : 5
2293 01:45:56.698387 ME: Current Operation State : 1
2294 01:45:56.701807 ME: Current Operation Mode : 0
2295 01:45:56.705361 ME: Error Code : 0
2296 01:45:56.708059 ME: Enhanced Debug Mode : NO
2297 01:45:56.715291 ME: CPU Debug Disabled : YES
2298 01:45:56.718107 ME: TXT Support : NO
2299 01:45:56.721923 ME: WP for RO is enabled : YES
2300 01:45:56.728044 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2301 01:45:56.731409 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2302 01:45:56.737936 Ramoops buffer: 0x100000@0x76899000.
2303 01:45:56.741263 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2304 01:45:56.751506 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2305 01:45:56.754774 CBFS: 'fallback/slic' not found.
2306 01:45:56.758399 ACPI: Writing ACPI tables at 7686d000.
2307 01:45:56.758903 ACPI: * FACS
2308 01:45:56.761334 ACPI: * DSDT
2309 01:45:56.768344 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2310 01:45:56.771334 ACPI: * FADT
2311 01:45:56.771809 SCI is IRQ9
2312 01:45:56.774627 ACPI: added table 1/32, length now 40
2313 01:45:56.777955 ACPI: * SSDT
2314 01:45:56.784807 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2315 01:45:56.788021 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2316 01:45:56.794851 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2317 01:45:56.798199 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2318 01:45:56.804600 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2319 01:45:56.808567 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2320 01:45:56.814714 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2321 01:45:56.821182 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2322 01:45:56.824632 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2323 01:45:56.831444 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2324 01:45:56.834776 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2325 01:45:56.841529 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2326 01:45:56.844542 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2327 01:45:56.847691 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2328 01:45:56.856216 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2329 01:45:56.859235 PS2K: Passing 80 keymaps to kernel
2330 01:45:56.866143 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2331 01:45:56.872435 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2332 01:45:56.879331 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2333 01:45:56.885828 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2334 01:45:56.892474 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2335 01:45:56.899153 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2336 01:45:56.902492 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2337 01:45:56.908985 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2338 01:45:56.915967 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2339 01:45:56.922509 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2340 01:45:56.925629 ACPI: added table 2/32, length now 44
2341 01:45:56.928936 ACPI: * MCFG
2342 01:45:56.932573 ACPI: added table 3/32, length now 48
2343 01:45:56.933203 ACPI: * TPM2
2344 01:45:56.935900 TPM2 log created at 0x7685d000
2345 01:45:56.942571 ACPI: added table 4/32, length now 52
2346 01:45:56.943064 ACPI: * LPIT
2347 01:45:56.945697 ACPI: added table 5/32, length now 56
2348 01:45:56.949082 ACPI: * MADT
2349 01:45:56.949558 SCI is IRQ9
2350 01:45:56.952377 ACPI: added table 6/32, length now 60
2351 01:45:56.955696 cmd_reg from pmc_make_ipc_cmd 1052838
2352 01:45:56.962605 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2353 01:45:56.969014 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2354 01:45:56.975806 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2355 01:45:56.979173 PMC CrashLog size in discovery mode: 0xC00
2356 01:45:56.982056 cpu crashlog bar addr: 0x80640000
2357 01:45:56.985705 cpu discovery table offset: 0x6030
2358 01:45:56.992064 cpu_crashlog_discovery_table buffer count: 0x3
2359 01:45:56.999028 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2360 01:45:57.005732 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2361 01:45:57.012321 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2362 01:45:57.015639 PMC crashLog size in discovery mode : 0xC00
2363 01:45:57.022335 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2364 01:45:57.025988 discover mode PMC crashlog size adjusted to: 0x200
2365 01:45:57.035457 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2366 01:45:57.039064 discover mode PMC crashlog size adjusted to: 0x0
2367 01:45:57.042445 m_cpu_crashLog_size : 0x3480 bytes
2368 01:45:57.045689 CPU crashLog present.
2369 01:45:57.048949 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2370 01:45:57.055736 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2371 01:45:57.058612 current = 76876550
2372 01:45:57.061946 ACPI: * DMAR
2373 01:45:57.065033 ACPI: added table 7/32, length now 64
2374 01:45:57.068644 ACPI: added table 8/32, length now 68
2375 01:45:57.068728 ACPI: * HPET
2376 01:45:57.071451 ACPI: added table 9/32, length now 72
2377 01:45:57.074980 ACPI: done.
2378 01:45:57.078517 ACPI tables: 38528 bytes.
2379 01:45:57.081946 smbios_write_tables: 76857000
2380 01:45:57.085413 EC returned error result code 3
2381 01:45:57.088810 Couldn't obtain OEM name from CBI
2382 01:45:57.088887 Create SMBIOS type 16
2383 01:45:57.092196 Create SMBIOS type 17
2384 01:45:57.095581 Create SMBIOS type 20
2385 01:45:57.098550 GENERIC: 0.0 (WIFI Device)
2386 01:45:57.098625 SMBIOS tables: 2156 bytes.
2387 01:45:57.105632 Writing table forward entry at 0x00000500
2388 01:45:57.112303 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2389 01:45:57.115106 Writing coreboot table at 0x76891000
2390 01:45:57.122356 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2391 01:45:57.125055 1. 0000000000001000-000000000009ffff: RAM
2392 01:45:57.128612 2. 00000000000a0000-00000000000fffff: RESERVED
2393 01:45:57.135430 3. 0000000000100000-0000000076856fff: RAM
2394 01:45:57.138820 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2395 01:45:57.145138 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2396 01:45:57.152002 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2397 01:45:57.155479 7. 0000000077000000-00000000803fffff: RESERVED
2398 01:45:57.158944 8. 00000000c0000000-00000000cfffffff: RESERVED
2399 01:45:57.165296 9. 00000000f8000000-00000000f9ffffff: RESERVED
2400 01:45:57.168449 10. 00000000fb000000-00000000fb000fff: RESERVED
2401 01:45:57.175179 11. 00000000fc800000-00000000fe7fffff: RESERVED
2402 01:45:57.178276 12. 00000000feb00000-00000000feb7ffff: RESERVED
2403 01:45:57.185154 13. 00000000fec00000-00000000fecfffff: RESERVED
2404 01:45:57.189084 14. 00000000fed40000-00000000fed6ffff: RESERVED
2405 01:45:57.195001 15. 00000000fed80000-00000000fed87fff: RESERVED
2406 01:45:57.198687 16. 00000000fed90000-00000000fed92fff: RESERVED
2407 01:45:57.202124 17. 00000000feda0000-00000000feda1fff: RESERVED
2408 01:45:57.208155 18. 00000000fedc0000-00000000feddffff: RESERVED
2409 01:45:57.211929 19. 0000000100000000-000000027fbfffff: RAM
2410 01:45:57.215115 Passing 4 GPIOs to payload:
2411 01:45:57.222172 NAME | PORT | POLARITY | VALUE
2412 01:45:57.224880 lid | undefined | high | high
2413 01:45:57.231834 power | undefined | high | low
2414 01:45:57.234976 oprom | undefined | high | low
2415 01:45:57.241713 EC in RW | 0x00000151 | high | high
2416 01:45:57.241793 Board ID: 3
2417 01:45:57.244949 FW config: 0x131
2418 01:45:57.251926 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007
2419 01:45:57.254774 coreboot table: 1788 bytes.
2420 01:45:57.258290 IMD ROOT 0. 0x76fff000 0x00001000
2421 01:45:57.261816 IMD SMALL 1. 0x76ffe000 0x00001000
2422 01:45:57.265244 FSP MEMORY 2. 0x76afe000 0x00500000
2423 01:45:57.268069 CONSOLE 3. 0x76ade000 0x00020000
2424 01:45:57.271678 RW MCACHE 4. 0x76add000 0x0000043c
2425 01:45:57.274939 RO MCACHE 5. 0x76adc000 0x00000fd8
2426 01:45:57.278425 FMAP 6. 0x76adb000 0x0000064a
2427 01:45:57.285041 TIME STAMP 7. 0x76ada000 0x00000910
2428 01:45:57.288156 VBOOT WORK 8. 0x76ac6000 0x00014000
2429 01:45:57.291626 MEM INFO 9. 0x76ac5000 0x000003b8
2430 01:45:57.295146 ROMSTG STCK10. 0x76ac4000 0x00001000
2431 01:45:57.298176 AFTER CAR 11. 0x76ab8000 0x0000c000
2432 01:45:57.301969 RAMSTAGE 12. 0x76a2e000 0x0008a000
2433 01:45:57.305059 ACPI BERT 13. 0x76a1e000 0x00010000
2434 01:45:57.308505 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2435 01:45:57.314941 REFCODE 15. 0x769ae000 0x0006f000
2436 01:45:57.318501 SMM BACKUP 16. 0x7699e000 0x00010000
2437 01:45:57.321939 IGD OPREGION17. 0x76999000 0x00004203
2438 01:45:57.325498 RAMOOPS 18. 0x76899000 0x00100000
2439 01:45:57.328319 COREBOOT 19. 0x76891000 0x00008000
2440 01:45:57.331706 ACPI 20. 0x7686d000 0x00024000
2441 01:45:57.335342 TPM2 TCGLOG21. 0x7685d000 0x00010000
2442 01:45:57.338668 PMC CRASHLOG22. 0x7685c000 0x00000c00
2443 01:45:57.345283 CPU CRASHLOG23. 0x76858000 0x00003480
2444 01:45:57.348355 SMBIOS 24. 0x76857000 0x00001000
2445 01:45:57.348431 IMD small region:
2446 01:45:57.351765 IMD ROOT 0. 0x76ffec00 0x00000400
2447 01:45:57.358308 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2448 01:45:57.361793 VPD 2. 0x76ffeb60 0x0000006c
2449 01:45:57.365204 POWER STATE 3. 0x76ffeb00 0x00000044
2450 01:45:57.368730 ROMSTAGE 4. 0x76ffeae0 0x00000004
2451 01:45:57.371824 ACPI GNVS 5. 0x76ffea80 0x00000048
2452 01:45:57.375257 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2453 01:45:57.381661 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2454 01:45:57.385218 MTRR: Physical address space:
2455 01:45:57.392001 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2456 01:45:57.398519 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2457 01:45:57.405452 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2458 01:45:57.411813 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2459 01:45:57.414969 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2460 01:45:57.421682 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2461 01:45:57.428602 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2462 01:45:57.431723 MTRR: Fixed MSR 0x250 0x0606060606060606
2463 01:45:57.438255 MTRR: Fixed MSR 0x258 0x0606060606060606
2464 01:45:57.441725 MTRR: Fixed MSR 0x259 0x0000000000000000
2465 01:45:57.444968 MTRR: Fixed MSR 0x268 0x0606060606060606
2466 01:45:57.448585 MTRR: Fixed MSR 0x269 0x0606060606060606
2467 01:45:57.455226 MTRR: Fixed MSR 0x26a 0x0606060606060606
2468 01:45:57.458435 MTRR: Fixed MSR 0x26b 0x0606060606060606
2469 01:45:57.461498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2470 01:45:57.464738 MTRR: Fixed MSR 0x26d 0x0606060606060606
2471 01:45:57.471796 MTRR: Fixed MSR 0x26e 0x0606060606060606
2472 01:45:57.475146 MTRR: Fixed MSR 0x26f 0x0606060606060606
2473 01:45:57.478612 call enable_fixed_mtrr()
2474 01:45:57.481683 CPU physical address size: 39 bits
2475 01:45:57.485117 MTRR: default type WB/UC MTRR counts: 6/6.
2476 01:45:57.488497 MTRR: UC selected as default type.
2477 01:45:57.494721 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2478 01:45:57.501704 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2479 01:45:57.508116 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2480 01:45:57.515250 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2481 01:45:57.521427 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2482 01:45:57.528369 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2483 01:45:57.531729 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 01:45:57.538109 MTRR: Fixed MSR 0x258 0x0606060606060606
2485 01:45:57.541343 MTRR: Fixed MSR 0x259 0x0000000000000000
2486 01:45:57.544991 MTRR: Fixed MSR 0x268 0x0606060606060606
2487 01:45:57.548166 MTRR: Fixed MSR 0x269 0x0606060606060606
2488 01:45:57.554643 MTRR: Fixed MSR 0x26a 0x0606060606060606
2489 01:45:57.558262 MTRR: Fixed MSR 0x26b 0x0606060606060606
2490 01:45:57.561875 MTRR: Fixed MSR 0x26c 0x0606060606060606
2491 01:45:57.564899 MTRR: Fixed MSR 0x26d 0x0606060606060606
2492 01:45:57.568091 MTRR: Fixed MSR 0x26e 0x0606060606060606
2493 01:45:57.574787 MTRR: Fixed MSR 0x26f 0x0606060606060606
2494 01:45:57.578469 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 01:45:57.581318 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 01:45:57.584874 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 01:45:57.591806 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 01:45:57.594643 MTRR: Fixed MSR 0x259 0x0000000000000000
2499 01:45:57.598230 MTRR: Fixed MSR 0x268 0x0606060606060606
2500 01:45:57.601489 MTRR: Fixed MSR 0x269 0x0606060606060606
2501 01:45:57.607772 MTRR: Fixed MSR 0x250 0x0606060606060606
2502 01:45:57.611709 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 01:45:57.614591 MTRR: Fixed MSR 0x26a 0x0606060606060606
2504 01:45:57.617514 MTRR: Fixed MSR 0x26b 0x0606060606060606
2505 01:45:57.624397 MTRR: Fixed MSR 0x26c 0x0606060606060606
2506 01:45:57.627548 MTRR: Fixed MSR 0x26d 0x0606060606060606
2507 01:45:57.631189 MTRR: Fixed MSR 0x26e 0x0606060606060606
2508 01:45:57.634657 MTRR: Fixed MSR 0x26f 0x0606060606060606
2509 01:45:57.637532 call enable_fixed_mtrr()
2510 01:45:57.640966 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 01:45:57.644336 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 01:45:57.647817 call enable_fixed_mtrr()
2513 01:45:57.650890 MTRR: Fixed MSR 0x259 0x0000000000000000
2514 01:45:57.657573 MTRR: Fixed MSR 0x268 0x0606060606060606
2515 01:45:57.661095 MTRR: Fixed MSR 0x269 0x0606060606060606
2516 01:45:57.664577 MTRR: Fixed MSR 0x26a 0x0606060606060606
2517 01:45:57.667436 MTRR: Fixed MSR 0x26b 0x0606060606060606
2518 01:45:57.674186 MTRR: Fixed MSR 0x26c 0x0606060606060606
2519 01:45:57.677463 MTRR: Fixed MSR 0x26d 0x0606060606060606
2520 01:45:57.680812 MTRR: Fixed MSR 0x26e 0x0606060606060606
2521 01:45:57.684379 MTRR: Fixed MSR 0x26f 0x0606060606060606
2522 01:45:57.691013 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 01:45:57.694609 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 01:45:57.697577 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 01:45:57.700938 CPU physical address size: 39 bits
2526 01:45:57.704350 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 01:45:57.707801 CPU physical address size: 39 bits
2528 01:45:57.714265 MTRR: Fixed MSR 0x259 0x0000000000000000
2529 01:45:57.714372 call enable_fixed_mtrr()
2530 01:45:57.720658 MTRR: Fixed MSR 0x268 0x0606060606060606
2531 01:45:57.724125 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 01:45:57.727495 MTRR: Fixed MSR 0x26a 0x0606060606060606
2533 01:45:57.730857 MTRR: Fixed MSR 0x26b 0x0606060606060606
2534 01:45:57.737476 MTRR: Fixed MSR 0x26c 0x0606060606060606
2535 01:45:57.740764 MTRR: Fixed MSR 0x26d 0x0606060606060606
2536 01:45:57.744257 MTRR: Fixed MSR 0x26e 0x0606060606060606
2537 01:45:57.747196 MTRR: Fixed MSR 0x26f 0x0606060606060606
2538 01:45:57.750716 MTRR: Fixed MSR 0x258 0x0606060606060606
2539 01:45:57.757617 MTRR: Fixed MSR 0x259 0x0000000000000000
2540 01:45:57.760941 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 01:45:57.764117 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 01:45:57.767649 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 01:45:57.773771 MTRR: Fixed MSR 0x26b 0x0606060606060606
2544 01:45:57.777195 MTRR: Fixed MSR 0x26c 0x0606060606060606
2545 01:45:57.780580 MTRR: Fixed MSR 0x26d 0x0606060606060606
2546 01:45:57.784042 MTRR: Fixed MSR 0x26e 0x0606060606060606
2547 01:45:57.790629 MTRR: Fixed MSR 0x26f 0x0606060606060606
2548 01:45:57.794157 CPU physical address size: 39 bits
2549 01:45:57.794240 call enable_fixed_mtrr()
2550 01:45:57.797251 call enable_fixed_mtrr()
2551 01:45:57.800497 CPU physical address size: 39 bits
2552 01:45:57.803765 CPU physical address size: 39 bits
2553 01:45:57.807167 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 01:45:57.814048 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 01:45:57.817150 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 01:45:57.820514 MTRR: Fixed MSR 0x268 0x0606060606060606
2557 01:45:57.823989 MTRR: Fixed MSR 0x269 0x0606060606060606
2558 01:45:57.830803 MTRR: Fixed MSR 0x26a 0x0606060606060606
2559 01:45:57.834145 MTRR: Fixed MSR 0x26b 0x0606060606060606
2560 01:45:57.837361 MTRR: Fixed MSR 0x26c 0x0606060606060606
2561 01:45:57.840723 MTRR: Fixed MSR 0x26d 0x0606060606060606
2562 01:45:57.847521 MTRR: Fixed MSR 0x26e 0x0606060606060606
2563 01:45:57.850490 MTRR: Fixed MSR 0x26f 0x0606060606060606
2564 01:45:57.854027 MTRR: Fixed MSR 0x26a 0x0606060606060606
2565 01:45:57.856969 call enable_fixed_mtrr()
2566 01:45:57.860373 MTRR: Fixed MSR 0x26b 0x0606060606060606
2567 01:45:57.863861 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 01:45:57.870573 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 01:45:57.874118 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 01:45:57.877195 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 01:45:57.880497 CPU physical address size: 39 bits
2572 01:45:57.883746 call enable_fixed_mtrr()
2573 01:45:57.887305 CPU physical address size: 39 bits
2574 01:45:57.887389
2575 01:45:57.890551 MTRR check
2576 01:45:57.890635 Fixed MTRRs : Enabled
2577 01:45:57.894015 Variable MTRRs: Enabled
2578 01:45:57.894097
2579 01:45:57.900398 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2580 01:45:57.903987 Checking cr50 for pending updates
2581 01:45:57.915683 Reading cr50 TPM mode
2582 01:45:57.931106 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2583 01:45:57.940898 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2584 01:45:57.944138 Checking segment from ROM address 0xf96cbe6c
2585 01:45:57.947502 Checking segment from ROM address 0xf96cbe88
2586 01:45:57.954262 Loading segment from ROM address 0xf96cbe6c
2587 01:45:57.954374 code (compression=1)
2588 01:45:57.964163 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2589 01:45:57.970956 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2590 01:45:57.974434 using LZMA
2591 01:45:57.996685 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2592 01:45:58.003309 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2593 01:45:58.011500 Loading segment from ROM address 0xf96cbe88
2594 01:45:58.015140 Entry Point 0x30000000
2595 01:45:58.015224 Loaded segments
2596 01:45:58.021328 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2597 01:45:58.028248 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2598 01:45:58.031585 Finalizing chipset.
2599 01:45:58.031672 apm_control: Finalizing SMM.
2600 01:45:58.035398 APMC done.
2601 01:45:58.038186 HECI: CSE device 16.1 is disabled
2602 01:45:58.041774 HECI: CSE device 16.2 is disabled
2603 01:45:58.045063 HECI: CSE device 16.3 is disabled
2604 01:45:58.048508 HECI: CSE device 16.4 is disabled
2605 01:45:58.051631 HECI: CSE device 16.5 is disabled
2606 01:45:58.054824 HECI: Sending End-of-Post
2607 01:45:58.062800 CSE: EOP requested action: continue boot
2608 01:45:58.066438 CSE EOP successful, continuing boot
2609 01:45:58.073020 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2610 01:45:58.076467 mp_park_aps done after 0 msecs.
2611 01:45:58.079776 Jumping to boot code at 0x30000000(0x76891000)
2612 01:45:58.089366 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2613 01:45:58.093959
2614 01:45:58.094044
2615 01:45:58.094108
2616 01:45:58.097059 Starting depthcharge on Volmar...
2617 01:45:58.097133
2618 01:45:58.097622 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2619 01:45:58.097729 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2620 01:45:58.097812 Setting prompt string to ['brya:']
2621 01:45:58.097940 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2622 01:45:58.103910 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2623 01:45:58.103999
2624 01:45:58.110878 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2625 01:45:58.110962
2626 01:45:58.117194 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2627 01:45:58.117282
2628 01:45:58.120378 configure_storage: Failed to remap 1C:2
2629 01:45:58.120461
2630 01:45:58.120527 Wipe memory regions:
2631 01:45:58.123928
2632 01:45:58.126792 [0x00000000001000, 0x000000000a0000)
2633 01:45:58.126876
2634 01:45:58.130236 [0x00000000100000, 0x00000030000000)
2635 01:45:58.238095
2636 01:45:58.240972 [0x00000032668e60, 0x00000076857000)
2637 01:45:58.392110
2638 01:45:58.395449 [0x00000100000000, 0x0000027fc00000)
2639 01:45:59.240204
2640 01:45:59.243694 ec_init: CrosEC protocol v3 supported (256, 256)
2641 01:45:59.854527
2642 01:45:59.854704 R8152: Initializing
2643 01:45:59.854782
2644 01:45:59.858366 Version 9 (ocp_data = 6010)
2645 01:45:59.858444
2646 01:45:59.861209 R8152: Done initializing
2647 01:45:59.861290
2648 01:45:59.864725 Adding net device
2649 01:46:00.165898
2650 01:46:00.169360 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2651 01:46:00.169446
2652 01:46:00.169514
2653 01:46:00.169576
2654 01:46:00.169897 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2656 01:46:00.270316 brya: tftpboot 192.168.201.1 12705362/tftp-deploy-xt0c8w_3/kernel/bzImage 12705362/tftp-deploy-xt0c8w_3/kernel/cmdline 12705362/tftp-deploy-xt0c8w_3/ramdisk/ramdisk.cpio.gz
2657 01:46:00.270474 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2658 01:46:00.270559 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2659 01:46:00.274730 tftpboot 192.168.201.1 12705362/tftp-deploy-xt0c8w_3/kernel/bzImploy-xt0c8w_3/kernel/cmdline 12705362/tftp-deploy-xt0c8w_3/ramdisk/ramdisk.cpio.gz
2660 01:46:00.274817
2661 01:46:00.274884 Waiting for link
2662 01:46:00.477311
2663 01:46:00.477444 done.
2664 01:46:00.477518
2665 01:46:00.477582 MAC: 00:e0:4c:68:02:37
2666 01:46:00.477642
2667 01:46:00.480258 Sending DHCP discover... done.
2668 01:46:00.480347
2669 01:46:00.483672 Waiting for reply... done.
2670 01:46:00.483769
2671 01:46:00.487177 Sending DHCP request... done.
2672 01:46:00.487256
2673 01:46:00.490536 Waiting for reply... done.
2674 01:46:00.493798
2675 01:46:00.493933 My ip is 192.168.201.15
2676 01:46:00.494000
2677 01:46:00.497136 The DHCP server ip is 192.168.201.1
2678 01:46:00.497213
2679 01:46:00.503793 TFTP server IP predefined by user: 192.168.201.1
2680 01:46:00.503870
2681 01:46:00.510388 Bootfile predefined by user: 12705362/tftp-deploy-xt0c8w_3/kernel/bzImage
2682 01:46:00.510465
2683 01:46:00.513815 Sending tftp read request... done.
2684 01:46:00.513895
2685 01:46:00.517015 Waiting for the transfer...
2686 01:46:00.517097
2687 01:46:00.773647 00000000 ################################################################
2688 01:46:00.773807
2689 01:46:01.024459 00080000 ################################################################
2690 01:46:01.024623
2691 01:46:01.277029 00100000 ################################################################
2692 01:46:01.277207
2693 01:46:01.525979 00180000 ################################################################
2694 01:46:01.526146
2695 01:46:01.782196 00200000 ################################################################
2696 01:46:01.782372
2697 01:46:02.024530 00280000 ################################################################
2698 01:46:02.024670
2699 01:46:02.272029 00300000 ################################################################
2700 01:46:02.272190
2701 01:46:02.513124 00380000 ################################################################
2702 01:46:02.513285
2703 01:46:02.776460 00400000 ################################################################
2704 01:46:02.776619
2705 01:46:03.044966 00480000 ################################################################
2706 01:46:03.045109
2707 01:46:03.302217 00500000 ################################################################
2708 01:46:03.302351
2709 01:46:03.563071 00580000 ################################################################
2710 01:46:03.563238
2711 01:46:03.828934 00600000 ################################################################
2712 01:46:03.829068
2713 01:46:04.079927 00680000 ################################################################
2714 01:46:04.080058
2715 01:46:04.327296 00700000 ################################################################
2716 01:46:04.327429
2717 01:46:04.577206 00780000 ################################################################
2718 01:46:04.577340
2719 01:46:04.828101 00800000 ################################################################
2720 01:46:04.828243
2721 01:46:05.086970 00880000 ################################################################
2722 01:46:05.087113
2723 01:46:05.336375 00900000 ################################################################
2724 01:46:05.336511
2725 01:46:05.591502 00980000 ################################################################
2726 01:46:05.591644
2727 01:46:05.846420 00a00000 ################################################################
2728 01:46:05.846558
2729 01:46:06.096812 00a80000 ################################################################
2730 01:46:06.096952
2731 01:46:06.342211 00b00000 ################################################################
2732 01:46:06.342345
2733 01:46:06.585540 00b80000 ################################################################
2734 01:46:06.585682
2735 01:46:06.850989 00c00000 ################################################################
2736 01:46:06.851131
2737 01:46:07.108331 00c80000 ################################################################
2738 01:46:07.108481
2739 01:46:07.359705 00d00000 ############################################################### done.
2740 01:46:07.359846
2741 01:46:07.363019 The bootfile was 14142176 bytes long.
2742 01:46:07.363110
2743 01:46:07.366424 Sending tftp read request... done.
2744 01:46:07.366514
2745 01:46:07.370138 Waiting for the transfer...
2746 01:46:07.370227
2747 01:46:07.616811 00000000 ################################################################
2748 01:46:07.616951
2749 01:46:07.849450 00080000 ################################################################
2750 01:46:07.849617
2751 01:46:08.084623 00100000 ################################################################
2752 01:46:08.084764
2753 01:46:08.324722 00180000 ################################################################
2754 01:46:08.324861
2755 01:46:08.582249 00200000 ################################################################
2756 01:46:08.582388
2757 01:46:08.831331 00280000 ################################################################
2758 01:46:08.831468
2759 01:46:09.096986 00300000 ################################################################
2760 01:46:09.097121
2761 01:46:09.348443 00380000 ################################################################
2762 01:46:09.348584
2763 01:46:09.597624 00400000 ################################################################
2764 01:46:09.597794
2765 01:46:09.845440 00480000 ################################################################
2766 01:46:09.845611
2767 01:46:10.093130 00500000 ################################################################
2768 01:46:10.093303
2769 01:46:10.346619 00580000 ################################################################
2770 01:46:10.346756
2771 01:46:10.600766 00600000 ################################################################
2772 01:46:10.600932
2773 01:46:10.860388 00680000 ################################################################
2774 01:46:10.860554
2775 01:46:11.125064 00700000 ################################################################
2776 01:46:11.125202
2777 01:46:11.384806 00780000 ################################################################
2778 01:46:11.384945
2779 01:46:11.643355 00800000 ################################################################
2780 01:46:11.643496
2781 01:46:11.831005 00880000 ############################################### done.
2782 01:46:11.831145
2783 01:46:11.834293 Sending tftp read request... done.
2784 01:46:11.834384
2785 01:46:11.837450 Waiting for the transfer...
2786 01:46:11.837538
2787 01:46:11.840779 00000000 # done.
2788 01:46:11.840868
2789 01:46:11.847803 Command line loaded dynamically from TFTP file: 12705362/tftp-deploy-xt0c8w_3/kernel/cmdline
2790 01:46:11.847894
2791 01:46:11.863906 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2792 01:46:11.870739
2793 01:46:11.873674 Shutting down all USB controllers.
2794 01:46:11.873791
2795 01:46:11.873898 Removing current net device
2796 01:46:11.873992
2797 01:46:11.877091 Finalizing coreboot
2798 01:46:11.877194
2799 01:46:11.883844 Exiting depthcharge with code 4 at timestamp: 24036347
2800 01:46:11.883930
2801 01:46:11.883997
2802 01:46:11.884060 Starting kernel ...
2803 01:46:11.884121
2804 01:46:11.884181
2805 01:46:11.884577 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2806 01:46:11.884674 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2807 01:46:11.884752 Setting prompt string to ['Linux version [0-9]']
2808 01:46:11.884822 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2809 01:46:11.884894 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2811 01:50:38.885737 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2813 01:50:38.886986 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2815 01:50:38.887847 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2818 01:50:38.889473 end: 2 depthcharge-action (duration 00:05:00) [common]
2820 01:50:38.890720 Cleaning after the job
2821 01:50:38.890809 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/ramdisk
2822 01:50:38.892151 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/kernel
2823 01:50:38.894358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705362/tftp-deploy-xt0c8w_3/modules
2824 01:50:38.895198 start: 5.1 power-off (timeout 00:00:30) [common]
2825 01:50:38.895357 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
2826 01:50:38.978986 >> Command sent successfully.
2827 01:50:38.990765 Returned 0 in 0 seconds
2828 01:50:39.092122 end: 5.1 power-off (duration 00:00:00) [common]
2830 01:50:39.093908 start: 5.2 read-feedback (timeout 00:10:00) [common]
2831 01:50:39.095164 Listened to connection for namespace 'common' for up to 1s
2833 01:50:39.096724 Listened to connection for namespace 'common' for up to 1s
2834 01:50:40.095857 Finalising connection for namespace 'common'
2835 01:50:40.096586 Disconnecting from shell: Finalise
2836 01:50:40.097041
2837 01:50:40.198225 end: 5.2 read-feedback (duration 00:00:01) [common]
2838 01:50:40.198819 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12705362
2839 01:50:40.253388 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12705362
2840 01:50:40.253618 JobError: Your job cannot terminate cleanly.