Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Kernel Errors: 0
1 01:45:26.199152 lava-dispatcher, installed at version: 2024.01
2 01:45:26.199380 start: 0 validate
3 01:45:26.199521 Start time: 2024-02-06 01:45:26.199512+00:00 (UTC)
4 01:45:26.199652 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:45:26.199780 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 01:45:26.460230 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:45:26.460966 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.209-cip44-rt18%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:45:26.731723 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:45:26.732417 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 01:45:27.001403 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:45:27.002191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.209-cip44-rt18%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 01:45:27.272282 validate duration: 1.07
14 01:45:27.272576 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:45:27.272678 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:45:27.272765 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:45:27.272890 Not decompressing ramdisk as can be used compressed.
18 01:45:27.273007 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 01:45:27.273102 saving as /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/ramdisk/initrd.cpio.gz
20 01:45:27.273168 total size: 5432690 (5 MB)
21 01:45:27.274210 progress 0 % (0 MB)
22 01:45:27.275782 progress 5 % (0 MB)
23 01:45:27.277255 progress 10 % (0 MB)
24 01:45:27.278659 progress 15 % (0 MB)
25 01:45:27.280233 progress 20 % (1 MB)
26 01:45:27.281692 progress 25 % (1 MB)
27 01:45:27.283075 progress 30 % (1 MB)
28 01:45:27.284615 progress 35 % (1 MB)
29 01:45:27.286067 progress 40 % (2 MB)
30 01:45:27.287443 progress 45 % (2 MB)
31 01:45:27.288823 progress 50 % (2 MB)
32 01:45:27.290407 progress 55 % (2 MB)
33 01:45:27.291784 progress 60 % (3 MB)
34 01:45:27.293157 progress 65 % (3 MB)
35 01:45:27.294695 progress 70 % (3 MB)
36 01:45:27.296067 progress 75 % (3 MB)
37 01:45:27.297472 progress 80 % (4 MB)
38 01:45:27.298841 progress 85 % (4 MB)
39 01:45:27.300366 progress 90 % (4 MB)
40 01:45:27.301777 progress 95 % (4 MB)
41 01:45:27.303164 progress 100 % (5 MB)
42 01:45:27.303376 5 MB downloaded in 0.03 s (171.50 MB/s)
43 01:45:27.303543 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:45:27.303787 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:45:27.303875 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:45:27.303963 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:45:27.304103 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.209-cip44-rt18/x86_64/defconfig+x86-board/gcc-10/kernel/bzImage
49 01:45:27.304172 saving as /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/kernel/bzImage
50 01:45:27.304252 total size: 14142176 (13 MB)
51 01:45:27.304345 No compression specified
52 01:45:27.305904 progress 0 % (0 MB)
53 01:45:27.309929 progress 5 % (0 MB)
54 01:45:27.313768 progress 10 % (1 MB)
55 01:45:27.317401 progress 15 % (2 MB)
56 01:45:27.321198 progress 20 % (2 MB)
57 01:45:27.324888 progress 25 % (3 MB)
58 01:45:27.328817 progress 30 % (4 MB)
59 01:45:27.332766 progress 35 % (4 MB)
60 01:45:27.336873 progress 40 % (5 MB)
61 01:45:27.340950 progress 45 % (6 MB)
62 01:45:27.344708 progress 50 % (6 MB)
63 01:45:27.348760 progress 55 % (7 MB)
64 01:45:27.352659 progress 60 % (8 MB)
65 01:45:27.356707 progress 65 % (8 MB)
66 01:45:27.360577 progress 70 % (9 MB)
67 01:45:27.364285 progress 75 % (10 MB)
68 01:45:27.368053 progress 80 % (10 MB)
69 01:45:27.371673 progress 85 % (11 MB)
70 01:45:27.375463 progress 90 % (12 MB)
71 01:45:27.379277 progress 95 % (12 MB)
72 01:45:27.382977 progress 100 % (13 MB)
73 01:45:27.383169 13 MB downloaded in 0.08 s (170.91 MB/s)
74 01:45:27.383318 end: 1.2.1 http-download (duration 00:00:00) [common]
76 01:45:27.383559 end: 1.2 download-retry (duration 00:00:00) [common]
77 01:45:27.383647 start: 1.3 download-retry (timeout 00:10:00) [common]
78 01:45:27.383733 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 01:45:27.383854 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 01:45:27.383923 saving as /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/nfsrootfs/full.rootfs.tar
81 01:45:27.383984 total size: 133380384 (127 MB)
82 01:45:27.384052 Using unxz to decompress xz
83 01:45:27.388235 progress 0 % (0 MB)
84 01:45:27.736274 progress 5 % (6 MB)
85 01:45:28.088284 progress 10 % (12 MB)
86 01:45:28.376619 progress 15 % (19 MB)
87 01:45:28.565545 progress 20 % (25 MB)
88 01:45:28.817021 progress 25 % (31 MB)
89 01:45:29.177994 progress 30 % (38 MB)
90 01:45:29.528274 progress 35 % (44 MB)
91 01:45:29.943262 progress 40 % (50 MB)
92 01:45:30.345539 progress 45 % (57 MB)
93 01:45:30.723123 progress 50 % (63 MB)
94 01:45:31.108869 progress 55 % (69 MB)
95 01:45:31.490165 progress 60 % (76 MB)
96 01:45:31.869652 progress 65 % (82 MB)
97 01:45:32.233288 progress 70 % (89 MB)
98 01:45:32.599850 progress 75 % (95 MB)
99 01:45:33.037676 progress 80 % (101 MB)
100 01:45:33.477406 progress 85 % (108 MB)
101 01:45:33.766093 progress 90 % (114 MB)
102 01:45:34.127995 progress 95 % (120 MB)
103 01:45:34.532069 progress 100 % (127 MB)
104 01:45:34.537581 127 MB downloaded in 7.15 s (17.78 MB/s)
105 01:45:34.537829 end: 1.3.1 http-download (duration 00:00:07) [common]
107 01:45:34.538156 end: 1.3 download-retry (duration 00:00:07) [common]
108 01:45:34.538287 start: 1.4 download-retry (timeout 00:09:53) [common]
109 01:45:34.538373 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 01:45:34.538529 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.209-cip44-rt18/x86_64/defconfig+x86-board/gcc-10/modules.tar.xz
111 01:45:34.538600 saving as /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/modules/modules.tar
112 01:45:34.538667 total size: 527968 (0 MB)
113 01:45:34.538740 Using unxz to decompress xz
114 01:45:34.543805 progress 6 % (0 MB)
115 01:45:34.544251 progress 12 % (0 MB)
116 01:45:34.544529 progress 18 % (0 MB)
117 01:45:34.546156 progress 24 % (0 MB)
118 01:45:34.548121 progress 31 % (0 MB)
119 01:45:34.550233 progress 37 % (0 MB)
120 01:45:34.552300 progress 43 % (0 MB)
121 01:45:34.554380 progress 49 % (0 MB)
122 01:45:34.556535 progress 55 % (0 MB)
123 01:45:34.558579 progress 62 % (0 MB)
124 01:45:34.560746 progress 68 % (0 MB)
125 01:45:34.562847 progress 74 % (0 MB)
126 01:45:34.564913 progress 80 % (0 MB)
127 01:45:34.567352 progress 86 % (0 MB)
128 01:45:34.569247 progress 93 % (0 MB)
129 01:45:34.571235 progress 99 % (0 MB)
130 01:45:34.578759 0 MB downloaded in 0.04 s (12.56 MB/s)
131 01:45:34.579025 end: 1.4.1 http-download (duration 00:00:00) [common]
133 01:45:34.579311 end: 1.4 download-retry (duration 00:00:00) [common]
134 01:45:34.579424 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
135 01:45:34.579551 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
136 01:45:36.858494 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12705354/extract-nfsrootfs-wqfh2azn
137 01:45:36.858699 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
138 01:45:36.858841 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
139 01:45:36.859072 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e
140 01:45:36.859264 makedir: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin
141 01:45:36.859413 makedir: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/tests
142 01:45:36.859590 makedir: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/results
143 01:45:36.859739 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-add-keys
144 01:45:36.859980 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-add-sources
145 01:45:36.860178 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-background-process-start
146 01:45:36.860359 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-background-process-stop
147 01:45:36.860495 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-common-functions
148 01:45:36.860627 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-echo-ipv4
149 01:45:36.860758 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-install-packages
150 01:45:36.860888 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-installed-packages
151 01:45:36.861039 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-os-build
152 01:45:36.861208 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-probe-channel
153 01:45:36.861339 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-probe-ip
154 01:45:36.861468 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-target-ip
155 01:45:36.861594 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-target-mac
156 01:45:36.861720 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-target-storage
157 01:45:36.861848 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-case
158 01:45:36.862026 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-event
159 01:45:36.862185 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-feedback
160 01:45:36.862314 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-raise
161 01:45:36.862444 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-reference
162 01:45:36.862583 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-runner
163 01:45:36.862720 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-set
164 01:45:36.862856 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-test-shell
165 01:45:36.862994 Updating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-install-packages (oe)
166 01:45:36.863160 Updating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/bin/lava-installed-packages (oe)
167 01:45:36.863295 Creating /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/environment
168 01:45:36.863399 LAVA metadata
169 01:45:36.863477 - LAVA_JOB_ID=12705354
170 01:45:36.863547 - LAVA_DISPATCHER_IP=192.168.201.1
171 01:45:36.863656 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
172 01:45:36.863726 skipped lava-vland-overlay
173 01:45:36.863802 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
174 01:45:36.863884 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
175 01:45:36.863946 skipped lava-multinode-overlay
176 01:45:36.864019 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
177 01:45:36.864099 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
178 01:45:36.864173 Loading test definitions
179 01:45:36.864261 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
180 01:45:36.864335 Using /lava-12705354 at stage 0
181 01:45:36.864657 uuid=12705354_1.5.2.3.1 testdef=None
182 01:45:36.864748 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
183 01:45:36.864833 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
184 01:45:36.865389 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
186 01:45:36.865616 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
187 01:45:36.866267 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
189 01:45:36.866563 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
190 01:45:36.867198 runner path: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/0/tests/0_dmesg test_uuid 12705354_1.5.2.3.1
191 01:45:36.867359 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 01:45:36.867586 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
194 01:45:36.867660 Using /lava-12705354 at stage 1
195 01:45:36.867964 uuid=12705354_1.5.2.3.5 testdef=None
196 01:45:36.868054 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
197 01:45:36.868139 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
198 01:45:36.868614 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 01:45:36.868831 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
201 01:45:36.869524 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 01:45:36.869756 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
204 01:45:36.870395 runner path: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/1/tests/1_bootrr test_uuid 12705354_1.5.2.3.5
205 01:45:36.870550 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 01:45:36.870812 Creating lava-test-runner.conf files
208 01:45:36.870876 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/0 for stage 0
209 01:45:36.870966 - 0_dmesg
210 01:45:36.871046 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12705354/lava-overlay-kvzp1a2e/lava-12705354/1 for stage 1
211 01:45:36.871139 - 1_bootrr
212 01:45:36.871235 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
213 01:45:36.871323 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
214 01:45:36.878829 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
215 01:45:36.878934 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
216 01:45:36.879020 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 01:45:36.879109 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
218 01:45:36.879194 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
219 01:45:37.018633 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 01:45:37.019056 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
221 01:45:37.019216 extracting modules file /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12705354/extract-nfsrootfs-wqfh2azn
222 01:45:37.044679 extracting modules file /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12705354/extract-overlay-ramdisk-31kdnyqv/ramdisk
223 01:45:37.069874 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 01:45:37.070022 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
225 01:45:37.070118 [common] Applying overlay to NFS
226 01:45:37.070189 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12705354/compress-overlay-puk7se1i/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12705354/extract-nfsrootfs-wqfh2azn
227 01:45:37.078437 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 01:45:37.078551 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
229 01:45:37.078648 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 01:45:37.078740 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
231 01:45:37.078821 Building ramdisk /var/lib/lava/dispatcher/tmp/12705354/extract-overlay-ramdisk-31kdnyqv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12705354/extract-overlay-ramdisk-31kdnyqv/ramdisk
232 01:45:37.167696 >> 30526 blocks
233 01:45:37.794748 rename /var/lib/lava/dispatcher/tmp/12705354/extract-overlay-ramdisk-31kdnyqv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/ramdisk/ramdisk.cpio.gz
234 01:45:37.795262 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 01:45:37.795423 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
236 01:45:37.795594 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
237 01:45:37.795732 No mkimage arch provided, not using FIT.
238 01:45:37.795858 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 01:45:37.795981 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 01:45:37.796162 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
241 01:45:37.796279 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
242 01:45:37.796361 No LXC device requested
243 01:45:37.796451 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 01:45:37.796564 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
245 01:45:37.796717 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 01:45:37.796824 Checking files for TFTP limit of 4294967296 bytes.
247 01:45:37.797399 end: 1 tftp-deploy (duration 00:00:11) [common]
248 01:45:37.797595 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 01:45:37.797737 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 01:45:37.797910 substitutions:
251 01:45:37.798014 - {DTB}: None
252 01:45:37.798106 - {INITRD}: 12705354/tftp-deploy-iny6_ymt/ramdisk/ramdisk.cpio.gz
253 01:45:37.798199 - {KERNEL}: 12705354/tftp-deploy-iny6_ymt/kernel/bzImage
254 01:45:37.798291 - {LAVA_MAC}: None
255 01:45:37.798383 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12705354/extract-nfsrootfs-wqfh2azn
256 01:45:37.798476 - {NFS_SERVER_IP}: 192.168.201.1
257 01:45:37.798562 - {PRESEED_CONFIG}: None
258 01:45:37.798651 - {PRESEED_LOCAL}: None
259 01:45:37.798740 - {RAMDISK}: 12705354/tftp-deploy-iny6_ymt/ramdisk/ramdisk.cpio.gz
260 01:45:37.798829 - {ROOT_PART}: None
261 01:45:37.798914 - {ROOT}: None
262 01:45:37.799001 - {SERVER_IP}: 192.168.201.1
263 01:45:37.799086 - {TEE}: None
264 01:45:37.799217 Parsed boot commands:
265 01:45:37.799304 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 01:45:37.799545 Parsed boot commands: tftpboot 192.168.201.1 12705354/tftp-deploy-iny6_ymt/kernel/bzImage 12705354/tftp-deploy-iny6_ymt/kernel/cmdline 12705354/tftp-deploy-iny6_ymt/ramdisk/ramdisk.cpio.gz
267 01:45:37.799733 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 01:45:37.799854 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 01:45:37.799977 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 01:45:37.800095 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 01:45:37.800197 Not connected, no need to disconnect.
272 01:45:37.800305 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 01:45:37.800416 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 01:45:37.800516 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
275 01:45:37.804616 Setting prompt string to ['lava-test: # ']
276 01:45:37.805056 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 01:45:37.805174 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 01:45:37.805271 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 01:45:37.805366 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 01:45:37.805588 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
281 01:45:42.938979 >> Command sent successfully.
282 01:45:42.941552 Returned 0 in 5 seconds
283 01:45:43.041910 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
285 01:45:43.042235 end: 2.2.2 reset-device (duration 00:00:05) [common]
286 01:45:43.042348 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
287 01:45:43.042443 Setting prompt string to 'Starting depthcharge on Volmar...'
288 01:45:43.042510 Changing prompt to 'Starting depthcharge on Volmar...'
289 01:45:43.042580 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
290 01:45:43.042838 [Enter `^Ec?' for help]
291 01:45:44.453985
292 01:45:44.454130
293 01:45:44.461636 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
294 01:45:44.465080 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
295 01:45:44.468598 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
296 01:45:44.476177 CPU: AES supported, TXT NOT supported, VT supported
297 01:45:44.483577 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
298 01:45:44.486467 Cache size = 10 MiB
299 01:45:44.489948 MCH: device id 4609 (rev 04) is Alderlake-P
300 01:45:44.493550 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
301 01:45:44.500168 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
302 01:45:44.500279 VBOOT: Loading verstage.
303 01:45:44.508561 FMAP: Found "FLASH" version 1.1 at 0x1804000.
304 01:45:44.512228 FMAP: base = 0x0 size = 0x2000000 #areas = 37
305 01:45:44.515381 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
306 01:45:44.525963 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
307 01:45:44.532496 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
308 01:45:44.532580
309 01:45:44.532664
310 01:45:44.542417 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
311 01:45:44.549802 Probing TPM I2C: I2C bus 1 version 0x3230302a
312 01:45:44.549906 DW I2C bus 1 at 0xfe022000 (400 KHz)
313 01:45:44.553799 done! DID_VID 0x00281ae0
314 01:45:44.557066 TPM ready after 0 ms
315 01:45:44.560744 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
316 01:45:44.573884 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
317 01:45:44.580305 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
318 01:45:44.634069 tlcl_send_startup: Startup return code is 0
319 01:45:44.634171 TPM: setup succeeded
320 01:45:44.653725 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
321 01:45:44.676673 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
322 01:45:44.679994 Chrome EC: UHEPI supported
323 01:45:44.683154 Reading cr50 boot mode
324 01:45:44.697924 Cr50 says boot_mode is VERIFIED_RW(0x00).
325 01:45:44.698012 Phase 1
326 01:45:44.704869 FMAP: area GBB found @ 1805000 (458752 bytes)
327 01:45:44.711534 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 01:45:44.718908 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 01:45:44.725614 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
330 01:45:44.725700 Phase 2
331 01:45:44.725768 Phase 3
332 01:45:44.732434 FMAP: area GBB found @ 1805000 (458752 bytes)
333 01:45:44.735870 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
334 01:45:44.742495 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 01:45:44.749216 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 01:45:44.755786 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
337 01:45:44.762342 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
338 01:45:44.769631 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
339 01:45:44.782784 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
340 01:45:44.787052 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
341 01:45:44.793311 VB2:vb2_verify_fw_preamble() Verifying preamble.
342 01:45:44.800331 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
343 01:45:44.807615 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
344 01:45:44.813863 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
345 01:45:44.817437 Phase 4
346 01:45:44.820849 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
347 01:45:44.827165 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
348 01:45:45.039267 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
349 01:45:45.045638 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
350 01:45:45.049128 Saving vboot hash.
351 01:45:45.055567 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
352 01:45:45.071446 tlcl_extend: response is 0
353 01:45:45.078415 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
354 01:45:45.085007 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
355 01:45:45.099575 tlcl_extend: response is 0
356 01:45:45.105838 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
357 01:45:45.124574 tlcl_lock_nv_write: response is 0
358 01:45:45.144030 tlcl_lock_nv_write: response is 0
359 01:45:45.144118 Slot A is selected
360 01:45:45.147467 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
361 01:45:45.155042 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
362 01:45:45.164735 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
363 01:45:45.168143 BS: verstage times (exec / console): total (unknown) / 257 ms
364 01:45:45.168309
365 01:45:45.171467
366 01:45:45.178339 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
367 01:45:45.181648 Google Chrome EC: version:
368 01:45:45.185277 ro: volmar_v2.0.14126-e605144e9c
369 01:45:45.188579 rw: volmar_v0.0.55-22d1557
370 01:45:45.191501 running image: 2
371 01:45:45.195258 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
372 01:45:45.204778 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
373 01:45:45.211747 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
374 01:45:45.218415 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
375 01:45:45.228008 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
376 01:45:45.238266 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
377 01:45:45.241501 EC took 977us to calculate image hash
378 01:45:45.251587 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
379 01:45:45.254751 VB2:sync_ec() select_rw=RW(active)
380 01:45:45.267332 Waited 600us to clear limit power flag.
381 01:45:45.270725 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 01:45:45.273693 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 01:45:45.277007 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
384 01:45:45.283758 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
385 01:45:45.287040 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
386 01:45:45.290101 TCO_STS: 0000 0000
387 01:45:45.293764 GEN_PMCON: d0015038 00002200
388 01:45:45.296931 GBLRST_CAUSE: 00000000 00000000
389 01:45:45.297062 HPR_CAUSE0: 00000000
390 01:45:45.300255 prev_sleep_state 5
391 01:45:45.303766 Abort disabling TXT, as CPU is not TXT capable.
392 01:45:45.312113 cse_lite: Number of partitions = 3
393 01:45:45.315848 cse_lite: Current partition = RO
394 01:45:45.315927 cse_lite: Next partition = RO
395 01:45:45.318827 cse_lite: Flags = 0x7
396 01:45:45.325810 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
397 01:45:45.335451 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
398 01:45:45.338842 FMAP: area SI_ME found @ 1000 (5238784 bytes)
399 01:45:45.345351 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
400 01:45:45.352045 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
401 01:45:45.358476 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
402 01:45:45.361731 cse_lite: CSE CBFS RW version : 16.1.25.2049
403 01:45:45.368743 cse_lite: Set Boot Partition Info Command (RW)
404 01:45:45.371957 HECI: Global Reset(Type:1) Command
405 01:45:46.806106 n�pported
406 01:45:46.812528 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
407 01:45:46.816120 Cache size = 10 MiB
408 01:45:46.819150 MCH: device id 4609 (rev 04) is Alderlake-P
409 01:45:46.826216 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
410 01:45:46.829425 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
411 01:45:46.832431 VBOOT: Loading verstage.
412 01:45:46.836311 FMAP: Found "FLASH" version 1.1 at 0x1804000.
413 01:45:46.839795 FMAP: base = 0x0 size = 0x2000000 #areas = 37
414 01:45:46.846968 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 01:45:46.853561 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
416 01:45:46.863538 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
417 01:45:46.863626
418 01:45:46.863694
419 01:45:46.870033 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
420 01:45:46.878180 Probing TPM I2C: I2C bus 1 version 0x3230302a
421 01:45:46.881381 DW I2C bus 1 at 0xfe022000 (400 KHz)
422 01:45:46.884694 done! DID_VID 0x00281ae0
423 01:45:46.887890 TPM ready after 0 ms
424 01:45:46.891463 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
425 01:45:46.900479 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
426 01:45:46.908532 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
427 01:45:46.961284 tlcl_send_startup: Startup return code is 0
428 01:45:46.961402 TPM: setup succeeded
429 01:45:46.980831 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
430 01:45:47.003434 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
431 01:45:47.006916 Chrome EC: UHEPI supported
432 01:45:47.010166 Reading cr50 boot mode
433 01:45:47.025245 Cr50 says boot_mode is VERIFIED_RW(0x00).
434 01:45:47.025331 Phase 1
435 01:45:47.031741 FMAP: area GBB found @ 1805000 (458752 bytes)
436 01:45:47.038120 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
437 01:45:47.044748 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
438 01:45:47.051747 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
439 01:45:47.054750 Phase 2
440 01:45:47.054835 Phase 3
441 01:45:47.057953 FMAP: area GBB found @ 1805000 (458752 bytes)
442 01:45:47.065341 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 01:45:47.068538 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
444 01:45:47.075111 VB2:vb2_verify_keyblock() Checking keyblock signature...
445 01:45:47.081285 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
446 01:45:47.088355 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
447 01:45:47.098204 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
448 01:45:47.110506 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
449 01:45:47.113556 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
450 01:45:47.120424 VB2:vb2_verify_fw_preamble() Verifying preamble.
451 01:45:47.127111 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
452 01:45:47.133734 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
453 01:45:47.140185 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
454 01:45:47.144484 Phase 4
455 01:45:47.147511 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
456 01:45:47.154503 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
457 01:45:47.367060 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
458 01:45:47.373394 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
459 01:45:47.376941 Saving vboot hash.
460 01:45:47.383671 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
461 01:45:47.399574 tlcl_extend: response is 0
462 01:45:47.405925 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
463 01:45:47.412736 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
464 01:45:47.427439 tlcl_extend: response is 0
465 01:45:47.433844 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
466 01:45:47.452386 tlcl_lock_nv_write: response is 0
467 01:45:47.471459 tlcl_lock_nv_write: response is 0
468 01:45:47.471553 Slot A is selected
469 01:45:47.477952 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
470 01:45:47.484555 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
471 01:45:47.491364 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
472 01:45:47.497693 BS: verstage times (exec / console): total (unknown) / 256 ms
473 01:45:47.497779
474 01:45:47.497846
475 01:45:47.504320 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
476 01:45:47.508492 Google Chrome EC: version:
477 01:45:47.511831 ro: volmar_v2.0.14126-e605144e9c
478 01:45:47.515124 rw: volmar_v0.0.55-22d1557
479 01:45:47.518789 running image: 2
480 01:45:47.521860 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
481 01:45:47.531701 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
482 01:45:47.538765 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
483 01:45:47.545131 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
484 01:45:47.554947 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
485 01:45:47.565037 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
486 01:45:47.568503 EC took 1316us to calculate image hash
487 01:45:47.581794 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
488 01:45:47.585171 VB2:sync_ec() select_rw=RW(active)
489 01:45:47.594187 Waited 274us to clear limit power flag.
490 01:45:47.596920 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
491 01:45:47.600543 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
492 01:45:47.603786 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
493 01:45:47.610436 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
494 01:45:47.613757 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
495 01:45:47.617448 TCO_STS: 0000 0000
496 01:45:47.620572 GEN_PMCON: d1001038 00002200
497 01:45:47.623615 GBLRST_CAUSE: 00000040 00000000
498 01:45:47.623700 HPR_CAUSE0: 00000000
499 01:45:47.626965 prev_sleep_state 5
500 01:45:47.633628 Abort disabling TXT, as CPU is not TXT capable.
501 01:45:47.637134 cse_lite: Number of partitions = 3
502 01:45:47.640533 cse_lite: Current partition = RW
503 01:45:47.643472 cse_lite: Next partition = RW
504 01:45:47.647011 cse_lite: Flags = 0x7
505 01:45:47.653741 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
506 01:45:47.661072 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
507 01:45:47.664432 FMAP: area SI_ME found @ 1000 (5238784 bytes)
508 01:45:47.671513 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
509 01:45:47.677678 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
510 01:45:47.684583 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
511 01:45:47.691042 cse_lite: CSE CBFS RW version : 16.1.25.2049
512 01:45:47.694310 Boot Count incremented to 5756
513 01:45:47.701079 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
514 01:45:47.704283 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
515 01:45:47.718368 Probing TPM I2C: done! DID_VID 0x00281ae0
516 01:45:47.721595 Locality already claimed
517 01:45:47.725142 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
518 01:45:47.744789 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
519 01:45:47.751538 MRC: Hash idx 0x100d comparison successful.
520 01:45:47.754387 MRC cache found, size f6c8
521 01:45:47.754472 bootmode is set to: 2
522 01:45:47.758636 EC returned error result code 3
523 01:45:47.761587 FW_CONFIG value from CBI is 0x131
524 01:45:47.768164 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
525 01:45:47.771643 SPD index = 0
526 01:45:47.778322 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
527 01:45:47.778406 SPD: module type is LPDDR4X
528 01:45:47.785861 SPD: module part number is K4U6E3S4AB-MGCL
529 01:45:47.792797 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
530 01:45:47.796035 SPD: device width 16 bits, bus width 16 bits
531 01:45:47.799298 SPD: module size is 1024 MB (per channel)
532 01:45:47.868227 CBMEM:
533 01:45:47.872200 IMD: root @ 0x76fff000 254 entries.
534 01:45:47.875614 IMD: root @ 0x76ffec00 62 entries.
535 01:45:47.882540 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
536 01:45:47.886412 RO_VPD is uninitialized or empty.
537 01:45:47.889612 FMAP: area RW_VPD found @ f29000 (8192 bytes)
538 01:45:47.896092 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
539 01:45:47.899566 External stage cache:
540 01:45:47.902697 IMD: root @ 0x7bbff000 254 entries.
541 01:45:47.905784 IMD: root @ 0x7bbfec00 62 entries.
542 01:45:47.913004 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
543 01:45:47.919324 MRC: Checking cached data update for 'RW_MRC_CACHE'.
544 01:45:47.922830 MRC: 'RW_MRC_CACHE' does not need update.
545 01:45:47.922947 8 DIMMs found
546 01:45:47.926066 SMM Memory Map
547 01:45:47.929680 SMRAM : 0x7b800000 0x800000
548 01:45:47.932855 Subregion 0: 0x7b800000 0x200000
549 01:45:47.935896 Subregion 1: 0x7ba00000 0x200000
550 01:45:47.939283 Subregion 2: 0x7bc00000 0x400000
551 01:45:47.942844 top_of_ram = 0x77000000
552 01:45:47.945902 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
553 01:45:47.952788 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
554 01:45:47.959144 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
555 01:45:47.962892 MTRR Range: Start=ff000000 End=0 (Size 1000000)
556 01:45:47.963000 Normal boot
557 01:45:47.972393 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
558 01:45:47.979092 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
559 01:45:47.985961 Processing 237 relocs. Offset value of 0x74ab9000
560 01:45:47.994101 BS: romstage times (exec / console): total (unknown) / 377 ms
561 01:45:48.001450
562 01:45:48.001534
563 01:45:48.008019 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
564 01:45:48.008103 Normal boot
565 01:45:48.014668 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
566 01:45:48.021491 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
567 01:45:48.027907 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
568 01:45:48.037596 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
569 01:45:48.085872 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
570 01:45:48.092592 Processing 5931 relocs. Offset value of 0x72a2f000
571 01:45:48.095752 BS: postcar times (exec / console): total (unknown) / 51 ms
572 01:45:48.099225
573 01:45:48.099311
574 01:45:48.105793 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
575 01:45:48.109174 Reserving BERT start 76a1e000, size 10000
576 01:45:48.112441 Normal boot
577 01:45:48.116026 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
578 01:45:48.122640 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
579 01:45:48.132300 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
580 01:45:48.136008 FMAP: area RW_VPD found @ f29000 (8192 bytes)
581 01:45:48.139024 Google Chrome EC: version:
582 01:45:48.142589 ro: volmar_v2.0.14126-e605144e9c
583 01:45:48.145735 rw: volmar_v0.0.55-22d1557
584 01:45:48.149218 running image: 2
585 01:45:48.152538 ACPI _SWS is PM1 Index 8 GPE Index -1
586 01:45:48.155697 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
587 01:45:48.159933 EC returned error result code 3
588 01:45:48.163400 FW_CONFIG value from CBI is 0x131
589 01:45:48.169669 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
590 01:45:48.173218 PCI: 00:1c.2 disabled by fw_config
591 01:45:48.179798 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
592 01:45:48.183040 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
593 01:45:48.189565 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
594 01:45:48.192809 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
595 01:45:48.199642 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
596 01:45:48.206509 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
597 01:45:48.213218 microcode: sig=0x906a4 pf=0x80 revision=0x423
598 01:45:48.216278 microcode: Update skipped, already up-to-date
599 01:45:48.222919 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
600 01:45:48.255660 Detected 6 core, 8 thread CPU.
601 01:45:48.259062 Setting up SMI for CPU
602 01:45:48.262303 IED base = 0x7bc00000
603 01:45:48.262387 IED size = 0x00400000
604 01:45:48.265458 Will perform SMM setup.
605 01:45:48.269278 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
606 01:45:48.272199 LAPIC 0x0 in XAPIC mode.
607 01:45:48.282272 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
608 01:45:48.285400 Processing 18 relocs. Offset value of 0x00030000
609 01:45:48.290129 Attempting to start 7 APs
610 01:45:48.293873 Waiting for 10ms after sending INIT.
611 01:45:48.306503 Waiting for SIPI to complete...
612 01:45:48.310114 LAPIC 0x1 in XAPIC mode.
613 01:45:48.312882 LAPIC 0x16 in XAPIC mode.
614 01:45:48.316508 LAPIC 0x14 in XAPIC mode.
615 01:45:48.320378 LAPIC 0x10 in XAPIC mode.
616 01:45:48.323093 AP: slot 5 apic_id 1, MCU rev: 0x00000423
617 01:45:48.326520 LAPIC 0x12 in XAPIC mode.
618 01:45:48.329903 AP: slot 4 apic_id 10, MCU rev: 0x00000423
619 01:45:48.333626 AP: slot 2 apic_id 14, MCU rev: 0x00000423
620 01:45:48.336444 AP: slot 1 apic_id 12, MCU rev: 0x00000423
621 01:45:48.343267 AP: slot 3 apic_id 16, MCU rev: 0x00000423
622 01:45:48.346441 LAPIC 0x9 in XAPIC mode.
623 01:45:48.346524 LAPIC 0x8 in XAPIC mode.
624 01:45:48.353229 AP: slot 7 apic_id 9, MCU rev: 0x00000423
625 01:45:48.356738 AP: slot 6 apic_id 8, MCU rev: 0x00000423
626 01:45:48.356820 done.
627 01:45:48.360035 Waiting for SIPI to complete...
628 01:45:48.360118 done.
629 01:45:48.362987 smm_setup_relocation_handler: enter
630 01:45:48.366343 smm_setup_relocation_handler: exit
631 01:45:48.376372 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
632 01:45:48.379558 Processing 11 relocs. Offset value of 0x00038000
633 01:45:48.386449 smm_module_setup_stub: stack_top = 0x7b804000
634 01:45:48.389521 smm_module_setup_stub: per cpu stack_size = 0x800
635 01:45:48.396177 smm_module_setup_stub: runtime.start32_offset = 0x4c
636 01:45:48.399784 smm_module_setup_stub: runtime.smm_size = 0x10000
637 01:45:48.406433 SMM Module: stub loaded at 38000. Will call 0x76a52094
638 01:45:48.409566 Installing permanent SMM handler to 0x7b800000
639 01:45:48.415979 smm_load_module: total_smm_space_needed e468, available -> 200000
640 01:45:48.426164 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
641 01:45:48.429393 Processing 255 relocs. Offset value of 0x7b9f6000
642 01:45:48.435936 smm_load_module: smram_start: 0x7b800000
643 01:45:48.439592 smm_load_module: smram_end: 7ba00000
644 01:45:48.442980 smm_load_module: handler start 0x7b9f6d5f
645 01:45:48.446061 smm_load_module: handler_size 98d0
646 01:45:48.449737 smm_load_module: fxsave_area 0x7b9ff000
647 01:45:48.452947 smm_load_module: fxsave_size 1000
648 01:45:48.455848 smm_load_module: CONFIG_MSEG_SIZE 0x0
649 01:45:48.462748 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
650 01:45:48.469436 smm_load_module: handler_mod_params.smbase = 0x7b800000
651 01:45:48.473070 smm_load_module: per_cpu_save_state_size = 0x400
652 01:45:48.476164 smm_load_module: num_cpus = 0x8
653 01:45:48.482677 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
654 01:45:48.486118 smm_load_module: total_save_state_size = 0x2000
655 01:45:48.489290 smm_load_module: cpu0 entry: 7b9e6000
656 01:45:48.495925 smm_create_map: cpus allowed in one segment 30
657 01:45:48.499204 smm_create_map: min # of segments needed 1
658 01:45:48.499288 CPU 0x0
659 01:45:48.502621 smbase 7b9e6000 entry 7b9ee000
660 01:45:48.509177 ss_start 7b9f5c00 code_end 7b9ee208
661 01:45:48.509261 CPU 0x1
662 01:45:48.512660 smbase 7b9e5c00 entry 7b9edc00
663 01:45:48.519150 ss_start 7b9f5800 code_end 7b9ede08
664 01:45:48.519234 CPU 0x2
665 01:45:48.522278 smbase 7b9e5800 entry 7b9ed800
666 01:45:48.529213 ss_start 7b9f5400 code_end 7b9eda08
667 01:45:48.529300 CPU 0x3
668 01:45:48.532714 smbase 7b9e5400 entry 7b9ed400
669 01:45:48.536056 ss_start 7b9f5000 code_end 7b9ed608
670 01:45:48.538980 CPU 0x4
671 01:45:48.542194 smbase 7b9e5000 entry 7b9ed000
672 01:45:48.545770 ss_start 7b9f4c00 code_end 7b9ed208
673 01:45:48.545870 CPU 0x5
674 01:45:48.548991 smbase 7b9e4c00 entry 7b9ecc00
675 01:45:48.555759 ss_start 7b9f4800 code_end 7b9ece08
676 01:45:48.555847 CPU 0x6
677 01:45:48.558945 smbase 7b9e4800 entry 7b9ec800
678 01:45:48.565690 ss_start 7b9f4400 code_end 7b9eca08
679 01:45:48.565777 CPU 0x7
680 01:45:48.568866 smbase 7b9e4400 entry 7b9ec400
681 01:45:48.572433 ss_start 7b9f4000 code_end 7b9ec608
682 01:45:48.582433 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
683 01:45:48.585658 Processing 11 relocs. Offset value of 0x7b9ee000
684 01:45:48.592191 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
685 01:45:48.599206 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
686 01:45:48.605686 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
687 01:45:48.612211 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
688 01:45:48.618436 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
689 01:45:48.621917 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
690 01:45:48.632216 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
691 01:45:48.635239 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
692 01:45:48.642101 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
693 01:45:48.648730 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
694 01:45:48.655114 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
695 01:45:48.661939 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
696 01:45:48.668446 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
697 01:45:48.675352 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
698 01:45:48.681961 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
699 01:45:48.684947 smm_module_setup_stub: stack_top = 0x7b804000
700 01:45:48.691746 smm_module_setup_stub: per cpu stack_size = 0x800
701 01:45:48.695205 smm_module_setup_stub: runtime.start32_offset = 0x4c
702 01:45:48.701463 smm_module_setup_stub: runtime.smm_size = 0x200000
703 01:45:48.704941 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
704 01:45:48.710320 Clearing SMI status registers
705 01:45:48.713611 SMI_STS: PM1
706 01:45:48.717031 PM1_STS: WAK PWRBTN
707 01:45:48.723434 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
708 01:45:48.726758 In relocation handler: CPU 0
709 01:45:48.730185 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
710 01:45:48.733549 Writing SMRR. base = 0x7b800006, mask=0xff800c00
711 01:45:48.736615 Relocation complete.
712 01:45:48.743539 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
713 01:45:48.746603 In relocation handler: CPU 5
714 01:45:48.750261 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
715 01:45:48.753700 Relocation complete.
716 01:45:48.760383 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
717 01:45:48.763376 In relocation handler: CPU 2
718 01:45:48.766868 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
719 01:45:48.773653 Writing SMRR. base = 0x7b800006, mask=0xff800c00
720 01:45:48.773737 Relocation complete.
721 01:45:48.780050 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
722 01:45:48.783046 In relocation handler: CPU 3
723 01:45:48.790163 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
724 01:45:48.793576 Writing SMRR. base = 0x7b800006, mask=0xff800c00
725 01:45:48.796541 Relocation complete.
726 01:45:48.803339 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
727 01:45:48.806465 In relocation handler: CPU 4
728 01:45:48.809940 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
729 01:45:48.813190 Writing SMRR. base = 0x7b800006, mask=0xff800c00
730 01:45:48.816615 Relocation complete.
731 01:45:48.823150 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
732 01:45:48.826615 In relocation handler: CPU 1
733 01:45:48.830015 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
734 01:45:48.836619 Writing SMRR. base = 0x7b800006, mask=0xff800c00
735 01:45:48.836702 Relocation complete.
736 01:45:48.846713 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
737 01:45:48.846797 In relocation handler: CPU 7
738 01:45:48.853119 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
739 01:45:48.853261 Relocation complete.
740 01:45:48.859885 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
741 01:45:48.863255 In relocation handler: CPU 6
742 01:45:48.869954 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
743 01:45:48.873347 Writing SMRR. base = 0x7b800006, mask=0xff800c00
744 01:45:48.876461 Relocation complete.
745 01:45:48.876544 Initializing CPU #0
746 01:45:48.879797 CPU: vendor Intel device 906a4
747 01:45:48.883203 CPU: family 06, model 9a, stepping 04
748 01:45:48.886594 Clearing out pending MCEs
749 01:45:48.890148 cpu: energy policy set to 7
750 01:45:48.893100 Turbo is available but hidden
751 01:45:48.896666 Turbo is available and visible
752 01:45:48.899694 microcode: Update skipped, already up-to-date
753 01:45:48.903056 CPU #0 initialized
754 01:45:48.903139 Initializing CPU #5
755 01:45:48.906211 Initializing CPU #7
756 01:45:48.909636 Initializing CPU #1
757 01:45:48.909720 Initializing CPU #6
758 01:45:48.912909 Initializing CPU #4
759 01:45:48.916415 CPU: vendor Intel device 906a4
760 01:45:48.919515 CPU: family 06, model 9a, stepping 04
761 01:45:48.923123 CPU: vendor Intel device 906a4
762 01:45:48.926669 CPU: family 06, model 9a, stepping 04
763 01:45:48.929403 CPU: vendor Intel device 906a4
764 01:45:48.932708 CPU: family 06, model 9a, stepping 04
765 01:45:48.936294 Clearing out pending MCEs
766 01:45:48.939419 CPU: vendor Intel device 906a4
767 01:45:48.942795 CPU: family 06, model 9a, stepping 04
768 01:45:48.946284 cpu: energy policy set to 7
769 01:45:48.949474 Clearing out pending MCEs
770 01:45:48.949557 Initializing CPU #2
771 01:45:48.953188 cpu: energy policy set to 7
772 01:45:48.956528 CPU: vendor Intel device 906a4
773 01:45:48.959593 CPU: family 06, model 9a, stepping 04
774 01:45:48.962960 Initializing CPU #3
775 01:45:48.966475 Clearing out pending MCEs
776 01:45:48.969424 microcode: Update skipped, already up-to-date
777 01:45:48.972879 CPU #1 initialized
778 01:45:48.976438 cpu: energy policy set to 7
779 01:45:48.976522 CPU: vendor Intel device 906a4
780 01:45:48.982995 CPU: family 06, model 9a, stepping 04
781 01:45:48.986368 microcode: Update skipped, already up-to-date
782 01:45:48.989697 CPU #4 initialized
783 01:45:48.989780 Clearing out pending MCEs
784 01:45:48.996235 microcode: Update skipped, already up-to-date
785 01:45:48.996319 CPU #2 initialized
786 01:45:48.999403 cpu: energy policy set to 7
787 01:45:49.003146 Clearing out pending MCEs
788 01:45:49.006017 microcode: Update skipped, already up-to-date
789 01:45:49.009336 CPU #3 initialized
790 01:45:49.012679 CPU: vendor Intel device 906a4
791 01:45:49.015839 CPU: family 06, model 9a, stepping 04
792 01:45:49.019520 Clearing out pending MCEs
793 01:45:49.022680 Clearing out pending MCEs
794 01:45:49.022764 cpu: energy policy set to 7
795 01:45:49.026014 cpu: energy policy set to 7
796 01:45:49.032704 microcode: Update skipped, already up-to-date
797 01:45:49.032788 CPU #6 initialized
798 01:45:49.039549 microcode: Update skipped, already up-to-date
799 01:45:49.039632 CPU #7 initialized
800 01:45:49.042790 cpu: energy policy set to 7
801 01:45:49.046040 microcode: Update skipped, already up-to-date
802 01:45:49.049162 CPU #5 initialized
803 01:45:49.052738 bsp_do_flight_plan done after 688 msecs.
804 01:45:49.056019 CPU: frequency set to 4400 MHz
805 01:45:49.059079 Enabling SMIs.
806 01:45:49.065987 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
807 01:45:49.080883 Probing TPM I2C: done! DID_VID 0x00281ae0
808 01:45:49.084031 Locality already claimed
809 01:45:49.087505 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
810 01:45:49.098916 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
811 01:45:49.102370 Enabling GPIO PM b/c CR50 has long IRQ pulse support
812 01:45:49.108951 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
813 01:45:49.115481 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
814 01:45:49.119043 Found a VBT of 9216 bytes after decompression
815 01:45:49.122243 PCI 1.0, PIN A, using IRQ #16
816 01:45:49.125541 PCI 2.0, PIN A, using IRQ #17
817 01:45:49.128963 PCI 4.0, PIN A, using IRQ #18
818 01:45:49.131994 PCI 5.0, PIN A, using IRQ #16
819 01:45:49.135347 PCI 6.0, PIN A, using IRQ #16
820 01:45:49.138909 PCI 6.2, PIN C, using IRQ #18
821 01:45:49.142173 PCI 7.0, PIN A, using IRQ #19
822 01:45:49.145293 PCI 7.1, PIN B, using IRQ #20
823 01:45:49.148765 PCI 7.2, PIN C, using IRQ #21
824 01:45:49.152322 PCI 7.3, PIN D, using IRQ #22
825 01:45:49.155433 PCI 8.0, PIN A, using IRQ #23
826 01:45:49.158738 PCI D.0, PIN A, using IRQ #17
827 01:45:49.162017 PCI D.1, PIN B, using IRQ #19
828 01:45:49.162100 PCI 10.0, PIN A, using IRQ #24
829 01:45:49.165354 PCI 10.1, PIN B, using IRQ #25
830 01:45:49.168617 PCI 10.6, PIN C, using IRQ #20
831 01:45:49.172006 PCI 10.7, PIN D, using IRQ #21
832 01:45:49.175480 PCI 11.0, PIN A, using IRQ #26
833 01:45:49.178840 PCI 11.1, PIN B, using IRQ #27
834 01:45:49.182163 PCI 11.2, PIN C, using IRQ #28
835 01:45:49.185491 PCI 11.3, PIN D, using IRQ #29
836 01:45:49.188487 PCI 12.0, PIN A, using IRQ #30
837 01:45:49.191970 PCI 12.6, PIN B, using IRQ #31
838 01:45:49.195553 PCI 12.7, PIN C, using IRQ #22
839 01:45:49.198725 PCI 13.0, PIN A, using IRQ #32
840 01:45:49.201855 PCI 13.1, PIN B, using IRQ #33
841 01:45:49.205381 PCI 13.2, PIN C, using IRQ #34
842 01:45:49.208794 PCI 13.3, PIN D, using IRQ #35
843 01:45:49.212148 PCI 14.0, PIN B, using IRQ #23
844 01:45:49.215318 PCI 14.1, PIN A, using IRQ #36
845 01:45:49.215402 PCI 14.3, PIN C, using IRQ #17
846 01:45:49.218855 PCI 15.0, PIN A, using IRQ #37
847 01:45:49.222303 PCI 15.1, PIN B, using IRQ #38
848 01:45:49.225653 PCI 15.2, PIN C, using IRQ #39
849 01:45:49.228709 PCI 15.3, PIN D, using IRQ #40
850 01:45:49.231893 PCI 16.0, PIN A, using IRQ #18
851 01:45:49.235071 PCI 16.1, PIN B, using IRQ #19
852 01:45:49.238674 PCI 16.2, PIN C, using IRQ #20
853 01:45:49.241983 PCI 16.3, PIN D, using IRQ #21
854 01:45:49.244981 PCI 16.4, PIN A, using IRQ #18
855 01:45:49.248787 PCI 16.5, PIN B, using IRQ #19
856 01:45:49.251951 PCI 17.0, PIN A, using IRQ #22
857 01:45:49.255321 PCI 19.0, PIN A, using IRQ #41
858 01:45:49.258713 PCI 19.1, PIN B, using IRQ #42
859 01:45:49.262034 PCI 19.2, PIN C, using IRQ #43
860 01:45:49.265098 PCI 1C.0, PIN A, using IRQ #16
861 01:45:49.265182 PCI 1C.1, PIN B, using IRQ #17
862 01:45:49.268654 PCI 1C.2, PIN C, using IRQ #18
863 01:45:49.271836 PCI 1C.3, PIN D, using IRQ #19
864 01:45:49.275575 PCI 1C.4, PIN A, using IRQ #16
865 01:45:49.278331 PCI 1C.5, PIN B, using IRQ #17
866 01:45:49.281796 PCI 1C.6, PIN C, using IRQ #18
867 01:45:49.285416 PCI 1C.7, PIN D, using IRQ #19
868 01:45:49.288951 PCI 1D.0, PIN A, using IRQ #16
869 01:45:49.292001 PCI 1D.1, PIN B, using IRQ #17
870 01:45:49.295478 PCI 1D.2, PIN C, using IRQ #18
871 01:45:49.298654 PCI 1D.3, PIN D, using IRQ #19
872 01:45:49.302001 PCI 1E.0, PIN A, using IRQ #23
873 01:45:49.305126 PCI 1E.1, PIN B, using IRQ #20
874 01:45:49.308403 PCI 1E.2, PIN C, using IRQ #44
875 01:45:49.312216 PCI 1E.3, PIN D, using IRQ #45
876 01:45:49.315258 PCI 1F.3, PIN B, using IRQ #22
877 01:45:49.315342 PCI 1F.4, PIN C, using IRQ #23
878 01:45:49.318786 PCI 1F.6, PIN D, using IRQ #20
879 01:45:49.322121 PCI 1F.7, PIN A, using IRQ #21
880 01:45:49.328531 IRQ: Using dynamically assigned PCI IO-APIC IRQs
881 01:45:49.335499 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
882 01:45:49.515661 FSPS returned 0
883 01:45:49.518944 Executing Phase 1 of FspMultiPhaseSiInit
884 01:45:49.529180 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
885 01:45:49.532247 port C0 DISC req: usage 1 usb3 1 usb2 1
886 01:45:49.535692 Raw Buffer output 0 00000111
887 01:45:49.538580 Raw Buffer output 1 00000000
888 01:45:49.542222 pmc_send_ipc_cmd succeeded
889 01:45:49.548925 port C1 DISC req: usage 1 usb3 3 usb2 3
890 01:45:49.549029 Raw Buffer output 0 00000331
891 01:45:49.552310 Raw Buffer output 1 00000000
892 01:45:49.556376 pmc_send_ipc_cmd succeeded
893 01:45:49.560198 Detected 6 core, 8 thread CPU.
894 01:45:49.563470 Detected 6 core, 8 thread CPU.
895 01:45:49.569187 Detected 6 core, 8 thread CPU.
896 01:45:49.572050 Detected 6 core, 8 thread CPU.
897 01:45:49.575658 Detected 6 core, 8 thread CPU.
898 01:45:49.579399 Detected 6 core, 8 thread CPU.
899 01:45:49.582280 Detected 6 core, 8 thread CPU.
900 01:45:49.585601 Detected 6 core, 8 thread CPU.
901 01:45:49.588760 Detected 6 core, 8 thread CPU.
902 01:45:49.592258 Detected 6 core, 8 thread CPU.
903 01:45:49.595930 Detected 6 core, 8 thread CPU.
904 01:45:49.598976 Detected 6 core, 8 thread CPU.
905 01:45:49.602075 Detected 6 core, 8 thread CPU.
906 01:45:49.605603 Detected 6 core, 8 thread CPU.
907 01:45:49.608888 Detected 6 core, 8 thread CPU.
908 01:45:49.612167 Detected 6 core, 8 thread CPU.
909 01:45:49.615581 Detected 6 core, 8 thread CPU.
910 01:45:49.618737 Detected 6 core, 8 thread CPU.
911 01:45:49.622104 Detected 6 core, 8 thread CPU.
912 01:45:49.625566 Detected 6 core, 8 thread CPU.
913 01:45:49.628576 Detected 6 core, 8 thread CPU.
914 01:45:49.631804 Detected 6 core, 8 thread CPU.
915 01:45:49.922881 Detected 6 core, 8 thread CPU.
916 01:45:49.926493 Detected 6 core, 8 thread CPU.
917 01:45:49.929300 Detected 6 core, 8 thread CPU.
918 01:45:49.932798 Detected 6 core, 8 thread CPU.
919 01:45:49.936131 Detected 6 core, 8 thread CPU.
920 01:45:49.939387 Detected 6 core, 8 thread CPU.
921 01:45:49.942912 Detected 6 core, 8 thread CPU.
922 01:45:49.946608 Detected 6 core, 8 thread CPU.
923 01:45:49.949353 Detected 6 core, 8 thread CPU.
924 01:45:49.953033 Detected 6 core, 8 thread CPU.
925 01:45:49.955894 Detected 6 core, 8 thread CPU.
926 01:45:49.959514 Detected 6 core, 8 thread CPU.
927 01:45:49.962690 Detected 6 core, 8 thread CPU.
928 01:45:49.965765 Detected 6 core, 8 thread CPU.
929 01:45:49.969608 Detected 6 core, 8 thread CPU.
930 01:45:49.972584 Detected 6 core, 8 thread CPU.
931 01:45:49.976398 Detected 6 core, 8 thread CPU.
932 01:45:49.979450 Detected 6 core, 8 thread CPU.
933 01:45:49.982803 Detected 6 core, 8 thread CPU.
934 01:45:49.986203 Detected 6 core, 8 thread CPU.
935 01:45:49.988949 Display FSP Version Info HOB
936 01:45:49.992423 Reference Code - CPU = c.0.65.70
937 01:45:49.992894 uCode Version = 0.0.4.23
938 01:45:49.996025 TXT ACM version = ff.ff.ff.ffff
939 01:45:49.999296 Reference Code - ME = c.0.65.70
940 01:45:50.002788 MEBx version = 0.0.0.0
941 01:45:50.006024 ME Firmware Version = Lite SKU
942 01:45:50.009515 Reference Code - PCH = c.0.65.70
943 01:45:50.012582 PCH-CRID Status = Disabled
944 01:45:50.015778 PCH-CRID Original Value = ff.ff.ff.ffff
945 01:45:50.019270 PCH-CRID New Value = ff.ff.ff.ffff
946 01:45:50.022570 OPROM - RST - RAID = ff.ff.ff.ffff
947 01:45:50.025736 PCH Hsio Version = 4.0.0.0
948 01:45:50.029467 Reference Code - SA - System Agent = c.0.65.70
949 01:45:50.032805 Reference Code - MRC = 0.0.3.80
950 01:45:50.036006 SA - PCIe Version = c.0.65.70
951 01:45:50.039473 SA-CRID Status = Disabled
952 01:45:50.042705 SA-CRID Original Value = 0.0.0.4
953 01:45:50.046017 SA-CRID New Value = 0.0.0.4
954 01:45:50.048999 OPROM - VBIOS = ff.ff.ff.ffff
955 01:45:50.052438 IO Manageability Engine FW Version = 24.0.4.0
956 01:45:50.055793 PHY Build Version = 0.0.0.2016
957 01:45:50.059025 Thunderbolt(TM) FW Version = 0.0.0.0
958 01:45:50.066034 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
959 01:45:50.072457 BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms
960 01:45:50.076354 Enumerating buses...
961 01:45:50.079210 Show all devs... Before device enumeration.
962 01:45:50.082740 Root Device: enabled 1
963 01:45:50.083326 CPU_CLUSTER: 0: enabled 1
964 01:45:50.086230 DOMAIN: 0000: enabled 1
965 01:45:50.089208 GPIO: 0: enabled 1
966 01:45:50.089788 PCI: 00:00.0: enabled 1
967 01:45:50.092430 PCI: 00:01.0: enabled 0
968 01:45:50.095890 PCI: 00:01.1: enabled 0
969 01:45:50.098974 PCI: 00:02.0: enabled 1
970 01:45:50.099449 PCI: 00:04.0: enabled 1
971 01:45:50.102860 PCI: 00:05.0: enabled 0
972 01:45:50.105494 PCI: 00:06.0: enabled 1
973 01:45:50.109019 PCI: 00:06.2: enabled 0
974 01:45:50.109512 PCI: 00:07.0: enabled 0
975 01:45:50.112481 PCI: 00:07.1: enabled 0
976 01:45:50.115930 PCI: 00:07.2: enabled 0
977 01:45:50.119222 PCI: 00:07.3: enabled 0
978 01:45:50.119798 PCI: 00:08.0: enabled 0
979 01:45:50.122771 PCI: 00:09.0: enabled 0
980 01:45:50.125323 PCI: 00:0a.0: enabled 1
981 01:45:50.128769 PCI: 00:0d.0: enabled 1
982 01:45:50.129267 PCI: 00:0d.1: enabled 0
983 01:45:50.131949 PCI: 00:0d.2: enabled 0
984 01:45:50.135526 PCI: 00:0d.3: enabled 0
985 01:45:50.136095 PCI: 00:0e.0: enabled 0
986 01:45:50.138869 PCI: 00:10.0: enabled 0
987 01:45:50.142039 PCI: 00:10.1: enabled 0
988 01:45:50.145376 PCI: 00:10.6: enabled 0
989 01:45:50.145870 PCI: 00:10.7: enabled 0
990 01:45:50.149244 PCI: 00:12.0: enabled 0
991 01:45:50.151928 PCI: 00:12.6: enabled 0
992 01:45:50.155789 PCI: 00:12.7: enabled 0
993 01:45:50.156366 PCI: 00:13.0: enabled 0
994 01:45:50.158605 PCI: 00:14.0: enabled 1
995 01:45:50.161875 PCI: 00:14.1: enabled 0
996 01:45:50.165059 PCI: 00:14.2: enabled 1
997 01:45:50.165530 PCI: 00:14.3: enabled 1
998 01:45:50.168660 PCI: 00:15.0: enabled 1
999 01:45:50.172381 PCI: 00:15.1: enabled 1
1000 01:45:50.175494 PCI: 00:15.2: enabled 0
1001 01:45:50.176085 PCI: 00:15.3: enabled 1
1002 01:45:50.178466 PCI: 00:16.0: enabled 1
1003 01:45:50.182042 PCI: 00:16.1: enabled 0
1004 01:45:50.182551 PCI: 00:16.2: enabled 0
1005 01:45:50.185185 PCI: 00:16.3: enabled 0
1006 01:45:50.188610 PCI: 00:16.4: enabled 0
1007 01:45:50.192084 PCI: 00:16.5: enabled 0
1008 01:45:50.192551 PCI: 00:17.0: enabled 1
1009 01:45:50.194998 PCI: 00:19.0: enabled 0
1010 01:45:50.198515 PCI: 00:19.1: enabled 1
1011 01:45:50.201858 PCI: 00:19.2: enabled 0
1012 01:45:50.202326 PCI: 00:1a.0: enabled 0
1013 01:45:50.205231 PCI: 00:1c.0: enabled 0
1014 01:45:50.208516 PCI: 00:1c.1: enabled 0
1015 01:45:50.212189 PCI: 00:1c.2: enabled 0
1016 01:45:50.212761 PCI: 00:1c.3: enabled 0
1017 01:45:50.215453 PCI: 00:1c.4: enabled 0
1018 01:45:50.218339 PCI: 00:1c.5: enabled 0
1019 01:45:50.221649 PCI: 00:1c.6: enabled 0
1020 01:45:50.222135 PCI: 00:1c.7: enabled 0
1021 01:45:50.225155 PCI: 00:1d.0: enabled 0
1022 01:45:50.228478 PCI: 00:1d.1: enabled 0
1023 01:45:50.228948 PCI: 00:1d.2: enabled 0
1024 01:45:50.232003 PCI: 00:1d.3: enabled 0
1025 01:45:50.235365 PCI: 00:1e.0: enabled 1
1026 01:45:50.238778 PCI: 00:1e.1: enabled 0
1027 01:45:50.239244 PCI: 00:1e.2: enabled 0
1028 01:45:50.241483 PCI: 00:1e.3: enabled 1
1029 01:45:50.244929 PCI: 00:1f.0: enabled 1
1030 01:45:50.248715 PCI: 00:1f.1: enabled 0
1031 01:45:50.249301 PCI: 00:1f.2: enabled 1
1032 01:45:50.251929 PCI: 00:1f.3: enabled 1
1033 01:45:50.255400 PCI: 00:1f.4: enabled 0
1034 01:45:50.258426 PCI: 00:1f.5: enabled 1
1035 01:45:50.258988 PCI: 00:1f.6: enabled 0
1036 01:45:50.261910 PCI: 00:1f.7: enabled 0
1037 01:45:50.264939 GENERIC: 0.0: enabled 1
1038 01:45:50.265630 GENERIC: 0.0: enabled 1
1039 01:45:50.268402 GENERIC: 1.0: enabled 1
1040 01:45:50.271667 GENERIC: 0.0: enabled 1
1041 01:45:50.275205 GENERIC: 1.0: enabled 1
1042 01:45:50.275669 USB0 port 0: enabled 1
1043 01:45:50.278219 USB0 port 0: enabled 1
1044 01:45:50.281564 GENERIC: 0.0: enabled 1
1045 01:45:50.282025 I2C: 00:1a: enabled 1
1046 01:45:50.285076 I2C: 00:31: enabled 1
1047 01:45:50.288467 I2C: 00:32: enabled 1
1048 01:45:50.291597 I2C: 00:50: enabled 1
1049 01:45:50.292076 I2C: 00:10: enabled 1
1050 01:45:50.295153 I2C: 00:15: enabled 1
1051 01:45:50.298614 I2C: 00:2c: enabled 1
1052 01:45:50.299293 GENERIC: 0.0: enabled 1
1053 01:45:50.301518 SPI: 00: enabled 1
1054 01:45:50.304939 PNP: 0c09.0: enabled 1
1055 01:45:50.305459 GENERIC: 0.0: enabled 1
1056 01:45:50.308499 USB3 port 0: enabled 1
1057 01:45:50.311470 USB3 port 1: enabled 0
1058 01:45:50.311930 USB3 port 2: enabled 1
1059 01:45:50.314957 USB3 port 3: enabled 0
1060 01:45:50.318474 USB2 port 0: enabled 1
1061 01:45:50.321943 USB2 port 1: enabled 0
1062 01:45:50.322408 USB2 port 2: enabled 1
1063 01:45:50.324682 USB2 port 3: enabled 0
1064 01:45:50.328050 USB2 port 4: enabled 0
1065 01:45:50.328513 USB2 port 5: enabled 1
1066 01:45:50.331721 USB2 port 6: enabled 0
1067 01:45:50.335061 USB2 port 7: enabled 0
1068 01:45:50.335615 USB2 port 8: enabled 1
1069 01:45:50.338544 USB2 port 9: enabled 1
1070 01:45:50.341281 USB3 port 0: enabled 1
1071 01:45:50.344600 USB3 port 1: enabled 0
1072 01:45:50.345097 USB3 port 2: enabled 0
1073 01:45:50.348252 USB3 port 3: enabled 0
1074 01:45:50.351434 GENERIC: 0.0: enabled 1
1075 01:45:50.351896 GENERIC: 1.0: enabled 1
1076 01:45:50.354954 APIC: 00: enabled 1
1077 01:45:50.357910 APIC: 12: enabled 1
1078 01:45:50.358373 APIC: 14: enabled 1
1079 01:45:50.361314 APIC: 16: enabled 1
1080 01:45:50.364511 APIC: 10: enabled 1
1081 01:45:50.365050 APIC: 01: enabled 1
1082 01:45:50.367966 APIC: 08: enabled 1
1083 01:45:50.368428 APIC: 09: enabled 1
1084 01:45:50.371337 Compare with tree...
1085 01:45:50.374783 Root Device: enabled 1
1086 01:45:50.378064 CPU_CLUSTER: 0: enabled 1
1087 01:45:50.378525 APIC: 00: enabled 1
1088 01:45:50.381112 APIC: 12: enabled 1
1089 01:45:50.384510 APIC: 14: enabled 1
1090 01:45:50.385015 APIC: 16: enabled 1
1091 01:45:50.387957 APIC: 10: enabled 1
1092 01:45:50.391445 APIC: 01: enabled 1
1093 01:45:50.391907 APIC: 08: enabled 1
1094 01:45:50.394692 APIC: 09: enabled 1
1095 01:45:50.398229 DOMAIN: 0000: enabled 1
1096 01:45:50.398692 GPIO: 0: enabled 1
1097 01:45:50.401098 PCI: 00:00.0: enabled 1
1098 01:45:50.404558 PCI: 00:01.0: enabled 0
1099 01:45:50.407851 PCI: 00:01.1: enabled 0
1100 01:45:50.411234 PCI: 00:02.0: enabled 1
1101 01:45:50.411702 PCI: 00:04.0: enabled 1
1102 01:45:50.414725 GENERIC: 0.0: enabled 1
1103 01:45:50.417969 PCI: 00:05.0: enabled 0
1104 01:45:50.421854 PCI: 00:06.0: enabled 1
1105 01:45:50.424431 PCI: 00:06.2: enabled 0
1106 01:45:50.424912 PCI: 00:08.0: enabled 0
1107 01:45:50.427917 PCI: 00:09.0: enabled 0
1108 01:45:50.431398 PCI: 00:0a.0: enabled 1
1109 01:45:50.434375 PCI: 00:0d.0: enabled 1
1110 01:45:50.438012 USB0 port 0: enabled 1
1111 01:45:50.438473 USB3 port 0: enabled 1
1112 01:45:50.441563 USB3 port 1: enabled 0
1113 01:45:50.445027 USB3 port 2: enabled 1
1114 01:45:50.448541 USB3 port 3: enabled 0
1115 01:45:50.451538 PCI: 00:0d.1: enabled 0
1116 01:45:50.452003 PCI: 00:0d.2: enabled 0
1117 01:45:50.454754 PCI: 00:0d.3: enabled 0
1118 01:45:50.458006 PCI: 00:0e.0: enabled 0
1119 01:45:50.461529 PCI: 00:10.0: enabled 0
1120 01:45:50.464615 PCI: 00:10.1: enabled 0
1121 01:45:50.465140 PCI: 00:10.6: enabled 0
1122 01:45:50.468160 PCI: 00:10.7: enabled 0
1123 01:45:50.471911 PCI: 00:12.0: enabled 0
1124 01:45:50.474532 PCI: 00:12.6: enabled 0
1125 01:45:50.474999 PCI: 00:12.7: enabled 0
1126 01:45:50.477838 PCI: 00:13.0: enabled 0
1127 01:45:50.481123 PCI: 00:14.0: enabled 1
1128 01:45:50.484762 USB0 port 0: enabled 1
1129 01:45:50.487771 USB2 port 0: enabled 1
1130 01:45:50.491526 USB2 port 1: enabled 0
1131 01:45:50.492093 USB2 port 2: enabled 1
1132 01:45:50.494931 USB2 port 3: enabled 0
1133 01:45:50.497618 USB2 port 4: enabled 0
1134 01:45:50.501141 USB2 port 5: enabled 1
1135 01:45:50.504424 USB2 port 6: enabled 0
1136 01:45:50.508144 USB2 port 7: enabled 0
1137 01:45:50.508607 USB2 port 8: enabled 1
1138 01:45:50.511067 USB2 port 9: enabled 1
1139 01:45:50.514290 USB3 port 0: enabled 1
1140 01:45:50.517761 USB3 port 1: enabled 0
1141 01:45:50.520891 USB3 port 2: enabled 0
1142 01:45:50.524065 USB3 port 3: enabled 0
1143 01:45:50.524598 PCI: 00:14.1: enabled 0
1144 01:45:50.527929 PCI: 00:14.2: enabled 1
1145 01:45:50.531177 PCI: 00:14.3: enabled 1
1146 01:45:50.534325 GENERIC: 0.0: enabled 1
1147 01:45:50.537173 PCI: 00:15.0: enabled 1
1148 01:45:50.537640 I2C: 00:1a: enabled 1
1149 01:45:50.541019 I2C: 00:31: enabled 1
1150 01:45:50.544157 I2C: 00:32: enabled 1
1151 01:45:50.547786 PCI: 00:15.1: enabled 1
1152 01:45:50.548250 I2C: 00:50: enabled 1
1153 01:45:50.550833 PCI: 00:15.2: enabled 0
1154 01:45:50.554201 PCI: 00:15.3: enabled 1
1155 01:45:50.557510 I2C: 00:10: enabled 1
1156 01:45:50.560642 PCI: 00:16.0: enabled 1
1157 01:45:50.561233 PCI: 00:16.1: enabled 0
1158 01:45:50.564004 PCI: 00:16.2: enabled 0
1159 01:45:50.567231 PCI: 00:16.3: enabled 0
1160 01:45:50.570629 PCI: 00:16.4: enabled 0
1161 01:45:50.571107 PCI: 00:16.5: enabled 0
1162 01:45:50.574034 PCI: 00:17.0: enabled 1
1163 01:45:50.577132 PCI: 00:19.0: enabled 0
1164 01:45:50.581017 PCI: 00:19.1: enabled 1
1165 01:45:50.583860 I2C: 00:15: enabled 1
1166 01:45:50.584336 I2C: 00:2c: enabled 1
1167 01:45:50.587356 PCI: 00:19.2: enabled 0
1168 01:45:50.590730 PCI: 00:1a.0: enabled 0
1169 01:45:50.593966 PCI: 00:1e.0: enabled 1
1170 01:45:50.597690 PCI: 00:1e.1: enabled 0
1171 01:45:50.598151 PCI: 00:1e.2: enabled 0
1172 01:45:50.600537 PCI: 00:1e.3: enabled 1
1173 01:45:50.603705 SPI: 00: enabled 1
1174 01:45:50.607273 PCI: 00:1f.0: enabled 1
1175 01:45:50.607738 PNP: 0c09.0: enabled 1
1176 01:45:50.610688 PCI: 00:1f.1: enabled 0
1177 01:45:50.613684 PCI: 00:1f.2: enabled 1
1178 01:45:50.617366 GENERIC: 0.0: enabled 1
1179 01:45:50.620893 GENERIC: 0.0: enabled 1
1180 01:45:50.624003 GENERIC: 1.0: enabled 1
1181 01:45:50.624636 PCI: 00:1f.3: enabled 1
1182 01:45:50.627162 PCI: 00:1f.4: enabled 0
1183 01:45:50.630822 PCI: 00:1f.5: enabled 1
1184 01:45:50.633777 PCI: 00:1f.6: enabled 0
1185 01:45:50.637389 PCI: 00:1f.7: enabled 0
1186 01:45:50.638013 Root Device scanning...
1187 01:45:50.640756 scan_static_bus for Root Device
1188 01:45:50.643752 CPU_CLUSTER: 0 enabled
1189 01:45:50.647248 DOMAIN: 0000 enabled
1190 01:45:50.647738 DOMAIN: 0000 scanning...
1191 01:45:50.650331 PCI: pci_scan_bus for bus 00
1192 01:45:50.653764 PCI: 00:00.0 [8086/0000] ops
1193 01:45:50.657002 PCI: 00:00.0 [8086/4609] enabled
1194 01:45:50.660243 PCI: 00:02.0 [8086/0000] bus ops
1195 01:45:50.664207 PCI: 00:02.0 [8086/46b3] enabled
1196 01:45:50.666873 PCI: 00:04.0 [8086/0000] bus ops
1197 01:45:50.670467 PCI: 00:04.0 [8086/461d] enabled
1198 01:45:50.673909 PCI: 00:06.0 [8086/0000] bus ops
1199 01:45:50.677018 PCI: 00:06.0 [8086/464d] enabled
1200 01:45:50.680348 PCI: 00:08.0 [8086/464f] disabled
1201 01:45:50.683946 PCI: 00:0a.0 [8086/467d] enabled
1202 01:45:50.687175 PCI: 00:0d.0 [8086/0000] bus ops
1203 01:45:50.690299 PCI: 00:0d.0 [8086/461e] enabled
1204 01:45:50.694024 PCI: 00:14.0 [8086/0000] bus ops
1205 01:45:50.696932 PCI: 00:14.0 [8086/51ed] enabled
1206 01:45:50.700523 PCI: 00:14.2 [8086/51ef] enabled
1207 01:45:50.703696 PCI: 00:14.3 [8086/0000] bus ops
1208 01:45:50.707008 PCI: 00:14.3 [8086/51f0] enabled
1209 01:45:50.710266 PCI: 00:15.0 [8086/0000] bus ops
1210 01:45:50.713456 PCI: 00:15.0 [8086/51e8] enabled
1211 01:45:50.717213 PCI: 00:15.1 [8086/0000] bus ops
1212 01:45:50.720471 PCI: 00:15.1 [8086/51e9] enabled
1213 01:45:50.723952 PCI: 00:15.2 [8086/0000] bus ops
1214 01:45:50.727421 PCI: 00:15.2 [8086/51ea] disabled
1215 01:45:50.730233 PCI: 00:15.3 [8086/0000] bus ops
1216 01:45:50.733704 PCI: 00:15.3 [8086/51eb] enabled
1217 01:45:50.737046 PCI: 00:16.0 [8086/0000] ops
1218 01:45:50.740110 PCI: 00:16.0 [8086/51e0] enabled
1219 01:45:50.746969 PCI: Static device PCI: 00:17.0 not found, disabling it.
1220 01:45:50.750168 PCI: 00:19.0 [8086/0000] bus ops
1221 01:45:50.753619 PCI: 00:19.0 [8086/51c5] disabled
1222 01:45:50.756930 PCI: 00:19.1 [8086/0000] bus ops
1223 01:45:50.760575 PCI: 00:19.1 [8086/51c6] enabled
1224 01:45:50.763950 PCI: 00:1e.0 [8086/0000] ops
1225 01:45:50.766803 PCI: 00:1e.0 [8086/51a8] enabled
1226 01:45:50.770323 PCI: 00:1e.3 [8086/0000] bus ops
1227 01:45:50.773599 PCI: 00:1e.3 [8086/51ab] enabled
1228 01:45:50.776742 PCI: 00:1f.0 [8086/0000] bus ops
1229 01:45:50.780169 PCI: 00:1f.0 [8086/5182] enabled
1230 01:45:50.783860 RTC Init
1231 01:45:50.786751 Set power on after power failure.
1232 01:45:50.787217 Disabling Deep S3
1233 01:45:50.790226 Disabling Deep S3
1234 01:45:50.793698 Disabling Deep S4
1235 01:45:50.794223 Disabling Deep S4
1236 01:45:50.796879 Disabling Deep S5
1237 01:45:50.797376 Disabling Deep S5
1238 01:45:50.800023 PCI: 00:1f.2 [0000/0000] hidden
1239 01:45:50.803465 PCI: 00:1f.3 [8086/0000] bus ops
1240 01:45:50.807398 PCI: 00:1f.3 [8086/51c8] enabled
1241 01:45:50.810006 PCI: 00:1f.5 [8086/0000] bus ops
1242 01:45:50.813582 PCI: 00:1f.5 [8086/51a4] enabled
1243 01:45:50.816662 GPIO: 0 enabled
1244 01:45:50.820244 PCI: Leftover static devices:
1245 01:45:50.820705 PCI: 00:01.0
1246 01:45:50.821123 PCI: 00:01.1
1247 01:45:50.823474 PCI: 00:05.0
1248 01:45:50.823937 PCI: 00:06.2
1249 01:45:50.826839 PCI: 00:09.0
1250 01:45:50.827297 PCI: 00:0d.1
1251 01:45:50.829869 PCI: 00:0d.2
1252 01:45:50.830331 PCI: 00:0d.3
1253 01:45:50.830692 PCI: 00:0e.0
1254 01:45:50.833416 PCI: 00:10.0
1255 01:45:50.833878 PCI: 00:10.1
1256 01:45:50.837121 PCI: 00:10.6
1257 01:45:50.837670 PCI: 00:10.7
1258 01:45:50.838242 PCI: 00:12.0
1259 01:45:50.840417 PCI: 00:12.6
1260 01:45:50.841214 PCI: 00:12.7
1261 01:45:50.843900 PCI: 00:13.0
1262 01:45:50.844643 PCI: 00:14.1
1263 01:45:50.845086 PCI: 00:16.1
1264 01:45:50.846594 PCI: 00:16.2
1265 01:45:50.847056 PCI: 00:16.3
1266 01:45:50.850208 PCI: 00:16.4
1267 01:45:50.850763 PCI: 00:16.5
1268 01:45:50.853434 PCI: 00:17.0
1269 01:45:50.853895 PCI: 00:19.2
1270 01:45:50.854261 PCI: 00:1a.0
1271 01:45:50.856455 PCI: 00:1e.1
1272 01:45:50.856919 PCI: 00:1e.2
1273 01:45:50.860152 PCI: 00:1f.1
1274 01:45:50.860613 PCI: 00:1f.4
1275 01:45:50.861013 PCI: 00:1f.6
1276 01:45:50.863114 PCI: 00:1f.7
1277 01:45:50.866376 PCI: Check your devicetree.cb.
1278 01:45:50.870156 PCI: 00:02.0 scanning...
1279 01:45:50.873094 scan_generic_bus for PCI: 00:02.0
1280 01:45:50.876499 scan_generic_bus for PCI: 00:02.0 done
1281 01:45:50.879825 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1282 01:45:50.883105 PCI: 00:04.0 scanning...
1283 01:45:50.886417 scan_generic_bus for PCI: 00:04.0
1284 01:45:50.889997 GENERIC: 0.0 enabled
1285 01:45:50.892951 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1286 01:45:50.899977 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1287 01:45:50.902838 PCI: 00:06.0 scanning...
1288 01:45:50.906394 do_pci_scan_bridge for PCI: 00:06.0
1289 01:45:50.909312 PCI: pci_scan_bus for bus 01
1290 01:45:50.912608 PCI: 01:00.0 [15b7/5009] enabled
1291 01:45:50.916524 Enabling Common Clock Configuration
1292 01:45:50.919351 L1 Sub-State supported from root port 6
1293 01:45:50.923071 L1 Sub-State Support = 0x5
1294 01:45:50.926051 CommonModeRestoreTime = 0x6e
1295 01:45:50.929537 Power On Value = 0x5, Power On Scale = 0x2
1296 01:45:50.933089 ASPM: Enabled L1
1297 01:45:50.936299 PCIe: Max_Payload_Size adjusted to 256
1298 01:45:50.940211 PCI: 01:00.0: Enabled LTR
1299 01:45:50.943113 PCI: 01:00.0: Programmed LTR max latencies
1300 01:45:50.946093 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1301 01:45:50.949427 PCI: 00:0d.0 scanning...
1302 01:45:50.953282 scan_static_bus for PCI: 00:0d.0
1303 01:45:50.956135 USB0 port 0 enabled
1304 01:45:50.956602 USB0 port 0 scanning...
1305 01:45:50.959344 scan_static_bus for USB0 port 0
1306 01:45:50.962708 USB3 port 0 enabled
1307 01:45:50.965906 USB3 port 1 disabled
1308 01:45:50.966547 USB3 port 2 enabled
1309 01:45:50.969485 USB3 port 3 disabled
1310 01:45:50.973248 USB3 port 0 scanning...
1311 01:45:50.975995 scan_static_bus for USB3 port 0
1312 01:45:50.979517 scan_static_bus for USB3 port 0 done
1313 01:45:50.982575 scan_bus: bus USB3 port 0 finished in 6 msecs
1314 01:45:50.986457 USB3 port 2 scanning...
1315 01:45:50.989583 scan_static_bus for USB3 port 2
1316 01:45:50.993346 scan_static_bus for USB3 port 2 done
1317 01:45:50.995952 scan_bus: bus USB3 port 2 finished in 6 msecs
1318 01:45:50.999526 scan_static_bus for USB0 port 0 done
1319 01:45:51.006156 scan_bus: bus USB0 port 0 finished in 43 msecs
1320 01:45:51.009450 scan_static_bus for PCI: 00:0d.0 done
1321 01:45:51.012868 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1322 01:45:51.016147 PCI: 00:14.0 scanning...
1323 01:45:51.019514 scan_static_bus for PCI: 00:14.0
1324 01:45:51.022800 USB0 port 0 enabled
1325 01:45:51.025716 USB0 port 0 scanning...
1326 01:45:51.026339 scan_static_bus for USB0 port 0
1327 01:45:51.029129 USB2 port 0 enabled
1328 01:45:51.032699 USB2 port 1 disabled
1329 01:45:51.033419 USB2 port 2 enabled
1330 01:45:51.035615 USB2 port 3 disabled
1331 01:45:51.038770 USB2 port 4 disabled
1332 01:45:51.039220 USB2 port 5 enabled
1333 01:45:51.042136 USB2 port 6 disabled
1334 01:45:51.046408 USB2 port 7 disabled
1335 01:45:51.046871 USB2 port 8 enabled
1336 01:45:51.048839 USB2 port 9 enabled
1337 01:45:51.049233 USB3 port 0 enabled
1338 01:45:51.052756 USB3 port 1 disabled
1339 01:45:51.055332 USB3 port 2 disabled
1340 01:45:51.055655 USB3 port 3 disabled
1341 01:45:51.059055 USB2 port 0 scanning...
1342 01:45:51.062624 scan_static_bus for USB2 port 0
1343 01:45:51.065544 scan_static_bus for USB2 port 0 done
1344 01:45:51.071975 scan_bus: bus USB2 port 0 finished in 6 msecs
1345 01:45:51.072340 USB2 port 2 scanning...
1346 01:45:51.075542 scan_static_bus for USB2 port 2
1347 01:45:51.079059 scan_static_bus for USB2 port 2 done
1348 01:45:51.085292 scan_bus: bus USB2 port 2 finished in 6 msecs
1349 01:45:51.088703 USB2 port 5 scanning...
1350 01:45:51.089180 scan_static_bus for USB2 port 5
1351 01:45:51.095474 scan_static_bus for USB2 port 5 done
1352 01:45:51.098616 scan_bus: bus USB2 port 5 finished in 6 msecs
1353 01:45:51.102005 USB2 port 8 scanning...
1354 01:45:51.105197 scan_static_bus for USB2 port 8
1355 01:45:51.108663 scan_static_bus for USB2 port 8 done
1356 01:45:51.112108 scan_bus: bus USB2 port 8 finished in 6 msecs
1357 01:45:51.115414 USB2 port 9 scanning...
1358 01:45:51.118656 scan_static_bus for USB2 port 9
1359 01:45:51.121758 scan_static_bus for USB2 port 9 done
1360 01:45:51.125100 scan_bus: bus USB2 port 9 finished in 6 msecs
1361 01:45:51.128399 USB3 port 0 scanning...
1362 01:45:51.131976 scan_static_bus for USB3 port 0
1363 01:45:51.134939 scan_static_bus for USB3 port 0 done
1364 01:45:51.141911 scan_bus: bus USB3 port 0 finished in 6 msecs
1365 01:45:51.145282 scan_static_bus for USB0 port 0 done
1366 01:45:51.148447 scan_bus: bus USB0 port 0 finished in 120 msecs
1367 01:45:51.152010 scan_static_bus for PCI: 00:14.0 done
1368 01:45:51.158515 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1369 01:45:51.162018 PCI: 00:14.3 scanning...
1370 01:45:51.165356 scan_static_bus for PCI: 00:14.3
1371 01:45:51.165822 GENERIC: 0.0 enabled
1372 01:45:51.168472 scan_static_bus for PCI: 00:14.3 done
1373 01:45:51.174967 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1374 01:45:51.175466 PCI: 00:15.0 scanning...
1375 01:45:51.178593 scan_static_bus for PCI: 00:15.0
1376 01:45:51.181673 I2C: 00:1a enabled
1377 01:45:51.185056 I2C: 00:31 enabled
1378 01:45:51.185572 I2C: 00:32 enabled
1379 01:45:51.188652 scan_static_bus for PCI: 00:15.0 done
1380 01:45:51.194911 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1381 01:45:51.198014 PCI: 00:15.1 scanning...
1382 01:45:51.201568 scan_static_bus for PCI: 00:15.1
1383 01:45:51.201683 I2C: 00:50 enabled
1384 01:45:51.204739 scan_static_bus for PCI: 00:15.1 done
1385 01:45:51.211382 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1386 01:45:51.214897 PCI: 00:15.3 scanning...
1387 01:45:51.217962 scan_static_bus for PCI: 00:15.3
1388 01:45:51.218044 I2C: 00:10 enabled
1389 01:45:51.221560 scan_static_bus for PCI: 00:15.3 done
1390 01:45:51.227981 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1391 01:45:51.228064 PCI: 00:19.1 scanning...
1392 01:45:51.231341 scan_static_bus for PCI: 00:19.1
1393 01:45:51.234771 I2C: 00:15 enabled
1394 01:45:51.238070 I2C: 00:2c enabled
1395 01:45:51.241064 scan_static_bus for PCI: 00:19.1 done
1396 01:45:51.244636 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1397 01:45:51.248007 PCI: 00:1e.3 scanning...
1398 01:45:51.251169 scan_generic_bus for PCI: 00:1e.3
1399 01:45:51.251278 SPI: 00 enabled
1400 01:45:51.257777 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1401 01:45:51.264996 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1402 01:45:51.268199 PCI: 00:1f.0 scanning...
1403 01:45:51.268358 scan_static_bus for PCI: 00:1f.0
1404 01:45:51.271699 PNP: 0c09.0 enabled
1405 01:45:51.274517 PNP: 0c09.0 scanning...
1406 01:45:51.278205 scan_static_bus for PNP: 0c09.0
1407 01:45:51.281146 scan_static_bus for PNP: 0c09.0 done
1408 01:45:51.284442 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1409 01:45:51.287832 scan_static_bus for PCI: 00:1f.0 done
1410 01:45:51.294464 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1411 01:45:51.297937 PCI: 00:1f.2 scanning...
1412 01:45:51.301212 scan_static_bus for PCI: 00:1f.2
1413 01:45:51.301293 GENERIC: 0.0 enabled
1414 01:45:51.304573 GENERIC: 0.0 scanning...
1415 01:45:51.308122 scan_static_bus for GENERIC: 0.0
1416 01:45:51.311367 GENERIC: 0.0 enabled
1417 01:45:51.311449 GENERIC: 1.0 enabled
1418 01:45:51.315102 scan_static_bus for GENERIC: 0.0 done
1419 01:45:51.321479 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1420 01:45:51.324770 scan_static_bus for PCI: 00:1f.2 done
1421 01:45:51.331057 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1422 01:45:51.331182 PCI: 00:1f.3 scanning...
1423 01:45:51.334496 scan_static_bus for PCI: 00:1f.3
1424 01:45:51.338195 scan_static_bus for PCI: 00:1f.3 done
1425 01:45:51.344504 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1426 01:45:51.347853 PCI: 00:1f.5 scanning...
1427 01:45:51.351307 scan_generic_bus for PCI: 00:1f.5
1428 01:45:51.354254 scan_generic_bus for PCI: 00:1f.5 done
1429 01:45:51.358008 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1430 01:45:51.364799 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1431 01:45:51.367713 scan_static_bus for Root Device done
1432 01:45:51.370939 scan_bus: bus Root Device finished in 729 msecs
1433 01:45:51.371020 done
1434 01:45:51.377901 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1435 01:45:51.384098 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1436 01:45:51.391192 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1437 01:45:51.394383 SPI flash protection: WPSW=1 SRP0=0
1438 01:45:51.397644 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1439 01:45:51.404050 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1440 01:45:51.407622 found VGA at PCI: 00:02.0
1441 01:45:51.410649 Setting up VGA for PCI: 00:02.0
1442 01:45:51.414173 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1443 01:45:51.420650 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1444 01:45:51.424246 Allocating resources...
1445 01:45:51.424358 Reading resources...
1446 01:45:51.431203 Root Device read_resources bus 0 link: 0
1447 01:45:51.434221 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1448 01:45:51.437442 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1449 01:45:51.444581 DOMAIN: 0000 read_resources bus 0 link: 0
1450 01:45:51.450848 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1451 01:45:51.453801 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1452 01:45:51.460725 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1453 01:45:51.467209 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1454 01:45:51.474163 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1455 01:45:51.480523 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1456 01:45:51.486965 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1457 01:45:51.494147 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1458 01:45:51.500498 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1459 01:45:51.506935 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1460 01:45:51.513716 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1461 01:45:51.520618 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1462 01:45:51.523913 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1463 01:45:51.530360 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1464 01:45:51.536756 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1465 01:45:51.543530 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1466 01:45:51.550423 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1467 01:45:51.556762 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1468 01:45:51.563392 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1469 01:45:51.569938 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1470 01:45:51.576657 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1471 01:45:51.579895 PCI: 00:04.0 read_resources bus 1 link: 0
1472 01:45:51.583416 PCI: 00:04.0 read_resources bus 1 link: 0 done
1473 01:45:51.586732 PCI: 00:06.0 read_resources bus 1 link: 0
1474 01:45:51.593734 PCI: 00:06.0 read_resources bus 1 link: 0 done
1475 01:45:51.596486 PCI: 00:0d.0 read_resources bus 0 link: 0
1476 01:45:51.600045 USB0 port 0 read_resources bus 0 link: 0
1477 01:45:51.606690 USB0 port 0 read_resources bus 0 link: 0 done
1478 01:45:51.610123 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1479 01:45:51.613780 PCI: 00:14.0 read_resources bus 0 link: 0
1480 01:45:51.619916 USB0 port 0 read_resources bus 0 link: 0
1481 01:45:51.623420 USB0 port 0 read_resources bus 0 link: 0 done
1482 01:45:51.626778 PCI: 00:14.0 read_resources bus 0 link: 0 done
1483 01:45:51.634038 PCI: 00:14.3 read_resources bus 0 link: 0
1484 01:45:51.636954 PCI: 00:14.3 read_resources bus 0 link: 0 done
1485 01:45:51.640116 PCI: 00:15.0 read_resources bus 0 link: 0
1486 01:45:51.646875 PCI: 00:15.0 read_resources bus 0 link: 0 done
1487 01:45:51.650134 PCI: 00:15.1 read_resources bus 0 link: 0
1488 01:45:51.656722 PCI: 00:15.1 read_resources bus 0 link: 0 done
1489 01:45:51.660223 PCI: 00:15.3 read_resources bus 0 link: 0
1490 01:45:51.663477 PCI: 00:15.3 read_resources bus 0 link: 0 done
1491 01:45:51.670417 PCI: 00:19.1 read_resources bus 0 link: 0
1492 01:45:51.673588 PCI: 00:19.1 read_resources bus 0 link: 0 done
1493 01:45:51.677218 PCI: 00:1e.3 read_resources bus 2 link: 0
1494 01:45:51.683211 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1495 01:45:51.686863 PCI: 00:1f.0 read_resources bus 0 link: 0
1496 01:45:51.693479 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1497 01:45:51.696809 PCI: 00:1f.2 read_resources bus 0 link: 0
1498 01:45:51.699861 GENERIC: 0.0 read_resources bus 0 link: 0
1499 01:45:51.706586 GENERIC: 0.0 read_resources bus 0 link: 0 done
1500 01:45:51.710049 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1501 01:45:51.713214 DOMAIN: 0000 read_resources bus 0 link: 0 done
1502 01:45:51.720006 Root Device read_resources bus 0 link: 0 done
1503 01:45:51.723008 Done reading resources.
1504 01:45:51.726550 Show resources in subtree (Root Device)...After reading.
1505 01:45:51.733076 Root Device child on link 0 CPU_CLUSTER: 0
1506 01:45:51.736460 CPU_CLUSTER: 0 child on link 0 APIC: 00
1507 01:45:51.736566 APIC: 00
1508 01:45:51.739834 APIC: 12
1509 01:45:51.739941 APIC: 14
1510 01:45:51.740037 APIC: 16
1511 01:45:51.743449 APIC: 10
1512 01:45:51.743531 APIC: 01
1513 01:45:51.746411 APIC: 08
1514 01:45:51.746493 APIC: 09
1515 01:45:51.750108 DOMAIN: 0000 child on link 0 GPIO: 0
1516 01:45:51.759679 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1517 01:45:51.769630 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1518 01:45:51.769718 GPIO: 0
1519 01:45:51.772852 PCI: 00:00.0
1520 01:45:51.782980 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1521 01:45:51.789683 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1522 01:45:51.799795 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1523 01:45:51.809880 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1524 01:45:51.819685 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1525 01:45:51.829568 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1526 01:45:51.839654 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1527 01:45:51.846361 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1528 01:45:51.856209 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1529 01:45:51.866011 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1530 01:45:51.875931 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1531 01:45:51.885999 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1532 01:45:51.895954 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1533 01:45:51.902562 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1534 01:45:51.912482 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1535 01:45:51.922608 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1536 01:45:51.932449 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1537 01:45:51.942507 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1538 01:45:51.952543 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1539 01:45:51.962599 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1540 01:45:51.972247 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1541 01:45:51.978788 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1542 01:45:51.988638 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1543 01:45:51.998662 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1544 01:45:52.008397 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1545 01:45:52.018578 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1546 01:45:52.028367 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1547 01:45:52.038462 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1548 01:45:52.038545 PCI: 00:02.0
1549 01:45:52.048247 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1550 01:45:52.061617 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1551 01:45:52.068268 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1552 01:45:52.072092 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1553 01:45:52.081660 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1554 01:45:52.084938 GENERIC: 0.0
1555 01:45:52.088163 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1556 01:45:52.098288 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1557 01:45:52.108100 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1558 01:45:52.118113 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1559 01:45:52.118201 PCI: 01:00.0
1560 01:45:52.127974 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 01:45:52.138176 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1562 01:45:52.141330 PCI: 00:08.0
1563 01:45:52.141424 PCI: 00:0a.0
1564 01:45:52.151398 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1565 01:45:52.154666 PCI: 00:0d.0 child on link 0 USB0 port 0
1566 01:45:52.164599 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1567 01:45:52.171090 USB0 port 0 child on link 0 USB3 port 0
1568 01:45:52.171175 USB3 port 0
1569 01:45:52.174576 USB3 port 1
1570 01:45:52.174687 USB3 port 2
1571 01:45:52.177929 USB3 port 3
1572 01:45:52.181308 PCI: 00:14.0 child on link 0 USB0 port 0
1573 01:45:52.191058 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1574 01:45:52.197871 USB0 port 0 child on link 0 USB2 port 0
1575 01:45:52.197954 USB2 port 0
1576 01:45:52.200961 USB2 port 1
1577 01:45:52.201082 USB2 port 2
1578 01:45:52.204439 USB2 port 3
1579 01:45:52.204528 USB2 port 4
1580 01:45:52.207935 USB2 port 5
1581 01:45:52.208032 USB2 port 6
1582 01:45:52.211768 USB2 port 7
1583 01:45:52.211889 USB2 port 8
1584 01:45:52.214568 USB2 port 9
1585 01:45:52.214666 USB3 port 0
1586 01:45:52.217917 USB3 port 1
1587 01:45:52.218068 USB3 port 2
1588 01:45:52.221391 USB3 port 3
1589 01:45:52.224644 PCI: 00:14.2
1590 01:45:52.234572 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1591 01:45:52.244739 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1592 01:45:52.247762 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1593 01:45:52.257670 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1594 01:45:52.257755 GENERIC: 0.0
1595 01:45:52.264272 PCI: 00:15.0 child on link 0 I2C: 00:1a
1596 01:45:52.274438 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1597 01:45:52.274551 I2C: 00:1a
1598 01:45:52.277742 I2C: 00:31
1599 01:45:52.277851 I2C: 00:32
1600 01:45:52.281031 PCI: 00:15.1 child on link 0 I2C: 00:50
1601 01:45:52.291029 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 01:45:52.294307 I2C: 00:50
1603 01:45:52.294415 PCI: 00:15.2
1604 01:45:52.301539 PCI: 00:15.3 child on link 0 I2C: 00:10
1605 01:45:52.311009 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 01:45:52.311128 I2C: 00:10
1607 01:45:52.314277 PCI: 00:16.0
1608 01:45:52.323955 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1609 01:45:52.324067 PCI: 00:19.0
1610 01:45:52.327489 PCI: 00:19.1 child on link 0 I2C: 00:15
1611 01:45:52.337591 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 01:45:52.341059 I2C: 00:15
1613 01:45:52.341171 I2C: 00:2c
1614 01:45:52.344213 PCI: 00:1e.0
1615 01:45:52.354043 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1616 01:45:52.357665 PCI: 00:1e.3 child on link 0 SPI: 00
1617 01:45:52.367223 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1618 01:45:52.370497 SPI: 00
1619 01:45:52.373852 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1620 01:45:52.383870 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1621 01:45:52.383981 PNP: 0c09.0
1622 01:45:52.393937 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1623 01:45:52.397389 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1624 01:45:52.407170 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1625 01:45:52.416817 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1626 01:45:52.420474 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1627 01:45:52.423740 GENERIC: 0.0
1628 01:45:52.423842 GENERIC: 1.0
1629 01:45:52.427096 PCI: 00:1f.3
1630 01:45:52.437124 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1631 01:45:52.447057 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1632 01:45:52.447162 PCI: 00:1f.5
1633 01:45:52.456825 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1634 01:45:52.463476 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1635 01:45:52.470381 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1636 01:45:52.476936 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1637 01:45:52.483551 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1638 01:45:52.487163 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1639 01:45:52.490452 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1640 01:45:52.497224 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1641 01:45:52.506852 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1642 01:45:52.513493 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1643 01:45:52.520220 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1644 01:45:52.526723 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1645 01:45:52.533613 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1646 01:45:52.543091 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1647 01:45:52.549917 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1648 01:45:52.553141 DOMAIN: 0000: Resource ranges:
1649 01:45:52.556597 * Base: 1000, Size: 800, Tag: 100
1650 01:45:52.560071 * Base: 1900, Size: e700, Tag: 100
1651 01:45:52.566360 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1652 01:45:52.573454 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1653 01:45:52.580153 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1654 01:45:52.586426 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1655 01:45:52.593116 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1656 01:45:52.603027 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1657 01:45:52.609854 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1658 01:45:52.616160 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1659 01:45:52.626596 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1660 01:45:52.633430 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1661 01:45:52.639572 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1662 01:45:52.649826 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1663 01:45:52.656127 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1664 01:45:52.662738 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1665 01:45:52.669657 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1666 01:45:52.679490 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1667 01:45:52.686092 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1668 01:45:52.692708 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1669 01:45:52.702483 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1670 01:45:52.709543 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1671 01:45:52.716228 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1672 01:45:52.726134 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1673 01:45:52.732724 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1674 01:45:52.739202 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1675 01:45:52.749175 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1676 01:45:52.755969 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1677 01:45:52.762481 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1678 01:45:52.772634 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1679 01:45:52.778837 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1680 01:45:52.786002 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1681 01:45:52.795800 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1682 01:45:52.802180 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1683 01:45:52.809276 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1684 01:45:52.812054 DOMAIN: 0000: Resource ranges:
1685 01:45:52.819058 * Base: 80400000, Size: 3fc00000, Tag: 200
1686 01:45:52.822180 * Base: d0000000, Size: 28000000, Tag: 200
1687 01:45:52.825418 * Base: fa000000, Size: 1000000, Tag: 200
1688 01:45:52.832531 * Base: fb001000, Size: 17ff000, Tag: 200
1689 01:45:52.835651 * Base: fe800000, Size: 300000, Tag: 200
1690 01:45:52.838812 * Base: feb80000, Size: 80000, Tag: 200
1691 01:45:52.842321 * Base: fed00000, Size: 40000, Tag: 200
1692 01:45:52.845493 * Base: fed70000, Size: 10000, Tag: 200
1693 01:45:52.851789 * Base: fed88000, Size: 8000, Tag: 200
1694 01:45:52.855741 * Base: fed93000, Size: d000, Tag: 200
1695 01:45:52.858938 * Base: feda2000, Size: 1e000, Tag: 200
1696 01:45:52.861842 * Base: fede0000, Size: 1220000, Tag: 200
1697 01:45:52.868762 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1698 01:45:52.875402 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1699 01:45:52.882315 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1700 01:45:52.888661 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1701 01:45:52.895278 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1702 01:45:52.902087 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1703 01:45:52.908319 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1704 01:45:52.915211 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1705 01:45:52.921719 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1706 01:45:52.928502 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1707 01:45:52.934859 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1708 01:45:52.941830 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1709 01:45:52.948083 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1710 01:45:52.954792 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1711 01:45:52.961601 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1712 01:45:52.967832 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1713 01:45:52.974578 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1714 01:45:52.981277 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1715 01:45:52.988079 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1716 01:45:52.994574 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1717 01:45:53.001058 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1718 01:45:53.011329 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1719 01:45:53.014637 PCI: 00:06.0: Resource ranges:
1720 01:45:53.017601 * Base: 80400000, Size: 100000, Tag: 200
1721 01:45:53.024418 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1722 01:45:53.031230 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1723 01:45:53.037862 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1724 01:45:53.047860 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1725 01:45:53.051517 Root Device assign_resources, bus 0 link: 0
1726 01:45:53.054317 DOMAIN: 0000 assign_resources, bus 0 link: 0
1727 01:45:53.064043 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1728 01:45:53.070819 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1729 01:45:53.080815 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1730 01:45:53.087208 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1731 01:45:53.090524 PCI: 00:04.0 assign_resources, bus 1 link: 0
1732 01:45:53.097394 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1733 01:45:53.103975 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1734 01:45:53.113775 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1735 01:45:53.123667 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1736 01:45:53.127252 PCI: 00:06.0 assign_resources, bus 1 link: 0
1737 01:45:53.136942 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1738 01:45:53.143735 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1739 01:45:53.150755 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1740 01:45:53.157091 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1741 01:45:53.163522 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1742 01:45:53.170539 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1743 01:45:53.173587 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1744 01:45:53.183469 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1745 01:45:53.186755 PCI: 00:14.0 assign_resources, bus 0 link: 0
1746 01:45:53.193731 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1747 01:45:53.200473 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1748 01:45:53.207100 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1749 01:45:53.216518 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1750 01:45:53.219949 PCI: 00:14.3 assign_resources, bus 0 link: 0
1751 01:45:53.226735 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1752 01:45:53.233034 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1753 01:45:53.240149 PCI: 00:15.0 assign_resources, bus 0 link: 0
1754 01:45:53.242962 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1755 01:45:53.250402 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1756 01:45:53.256748 PCI: 00:15.1 assign_resources, bus 0 link: 0
1757 01:45:53.260000 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1758 01:45:53.270034 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1759 01:45:53.273282 PCI: 00:15.3 assign_resources, bus 0 link: 0
1760 01:45:53.279914 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1761 01:45:53.286440 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1762 01:45:53.292904 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1763 01:45:53.299821 PCI: 00:19.1 assign_resources, bus 0 link: 0
1764 01:45:53.302732 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1765 01:45:53.312869 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1766 01:45:53.316584 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1767 01:45:53.322812 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1768 01:45:53.326104 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1769 01:45:53.329604 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1770 01:45:53.335966 LPC: Trying to open IO window from 800 size 1ff
1771 01:45:53.342841 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1772 01:45:53.352751 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1773 01:45:53.359246 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1774 01:45:53.366106 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1775 01:45:53.369444 Root Device assign_resources, bus 0 link: 0 done
1776 01:45:53.372711 Done setting resources.
1777 01:45:53.378956 Show resources in subtree (Root Device)...After assigning values.
1778 01:45:53.382456 Root Device child on link 0 CPU_CLUSTER: 0
1779 01:45:53.385728 CPU_CLUSTER: 0 child on link 0 APIC: 00
1780 01:45:53.389318 APIC: 00
1781 01:45:53.389437 APIC: 12
1782 01:45:53.389532 APIC: 14
1783 01:45:53.392618 APIC: 16
1784 01:45:53.392735 APIC: 10
1785 01:45:53.395658 APIC: 01
1786 01:45:53.395776 APIC: 08
1787 01:45:53.395870 APIC: 09
1788 01:45:53.402343 DOMAIN: 0000 child on link 0 GPIO: 0
1789 01:45:53.408883 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1790 01:45:53.418706 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1791 01:45:53.422332 GPIO: 0
1792 01:45:53.422415 PCI: 00:00.0
1793 01:45:53.432027 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1794 01:45:53.442049 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1795 01:45:53.452070 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1796 01:45:53.462187 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1797 01:45:53.468730 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1798 01:45:53.478592 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1799 01:45:53.488728 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1800 01:45:53.498600 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1801 01:45:53.508335 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1802 01:45:53.518440 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1803 01:45:53.525201 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1804 01:45:53.535277 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1805 01:45:53.544763 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1806 01:45:53.554902 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1807 01:45:53.565070 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1808 01:45:53.574555 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1809 01:45:53.581553 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1810 01:45:53.591537 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1811 01:45:53.601347 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1812 01:45:53.611427 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1813 01:45:53.621507 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1814 01:45:53.631338 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1815 01:45:53.641144 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1816 01:45:53.650875 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1817 01:45:53.661096 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1818 01:45:53.670997 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1819 01:45:53.677634 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1820 01:45:53.687290 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1821 01:45:53.690952 PCI: 00:02.0
1822 01:45:53.700579 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1823 01:45:53.710776 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1824 01:45:53.720690 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1825 01:45:53.724307 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1826 01:45:53.733953 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1827 01:45:53.737402 GENERIC: 0.0
1828 01:45:53.740799 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1829 01:45:53.750637 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1830 01:45:53.763877 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1831 01:45:53.773735 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1832 01:45:53.773884 PCI: 01:00.0
1833 01:45:53.787030 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1834 01:45:53.797193 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1835 01:45:53.797313 PCI: 00:08.0
1836 01:45:53.800049 PCI: 00:0a.0
1837 01:45:53.810187 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1838 01:45:53.813426 PCI: 00:0d.0 child on link 0 USB0 port 0
1839 01:45:53.823616 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1840 01:45:53.830161 USB0 port 0 child on link 0 USB3 port 0
1841 01:45:53.830245 USB3 port 0
1842 01:45:53.833580 USB3 port 1
1843 01:45:53.833662 USB3 port 2
1844 01:45:53.836714 USB3 port 3
1845 01:45:53.840083 PCI: 00:14.0 child on link 0 USB0 port 0
1846 01:45:53.850216 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1847 01:45:53.853669 USB0 port 0 child on link 0 USB2 port 0
1848 01:45:53.856770 USB2 port 0
1849 01:45:53.856853 USB2 port 1
1850 01:45:53.860176 USB2 port 2
1851 01:45:53.863296 USB2 port 3
1852 01:45:53.863378 USB2 port 4
1853 01:45:53.866609 USB2 port 5
1854 01:45:53.866694 USB2 port 6
1855 01:45:53.869883 USB2 port 7
1856 01:45:53.869965 USB2 port 8
1857 01:45:53.873427 USB2 port 9
1858 01:45:53.873538 USB3 port 0
1859 01:45:53.876555 USB3 port 1
1860 01:45:53.876700 USB3 port 2
1861 01:45:53.879921 USB3 port 3
1862 01:45:53.880024 PCI: 00:14.2
1863 01:45:53.889899 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1864 01:45:53.903099 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1865 01:45:53.906732 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1866 01:45:53.916649 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1867 01:45:53.919972 GENERIC: 0.0
1868 01:45:53.923550 PCI: 00:15.0 child on link 0 I2C: 00:1a
1869 01:45:53.933102 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1870 01:45:53.933188 I2C: 00:1a
1871 01:45:53.936855 I2C: 00:31
1872 01:45:53.936940 I2C: 00:32
1873 01:45:53.943031 PCI: 00:15.1 child on link 0 I2C: 00:50
1874 01:45:53.952978 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1875 01:45:53.953066 I2C: 00:50
1876 01:45:53.956631 PCI: 00:15.2
1877 01:45:53.959572 PCI: 00:15.3 child on link 0 I2C: 00:10
1878 01:45:53.969739 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1879 01:45:53.972990 I2C: 00:10
1880 01:45:53.973067 PCI: 00:16.0
1881 01:45:53.982874 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1882 01:45:53.986242 PCI: 00:19.0
1883 01:45:53.989726 PCI: 00:19.1 child on link 0 I2C: 00:15
1884 01:45:53.999206 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1885 01:45:54.002581 I2C: 00:15
1886 01:45:54.002665 I2C: 00:2c
1887 01:45:54.005955 PCI: 00:1e.0
1888 01:45:54.015792 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1889 01:45:54.019103 PCI: 00:1e.3 child on link 0 SPI: 00
1890 01:45:54.028979 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1891 01:45:54.032635 SPI: 00
1892 01:45:54.035676 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1893 01:45:54.045645 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1894 01:45:54.045729 PNP: 0c09.0
1895 01:45:54.055879 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1896 01:45:54.058961 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1897 01:45:54.068614 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1898 01:45:54.078529 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1899 01:45:54.082141 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1900 01:45:54.085040 GENERIC: 0.0
1901 01:45:54.085126 GENERIC: 1.0
1902 01:45:54.088561 PCI: 00:1f.3
1903 01:45:54.098476 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1904 01:45:54.108851 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1905 01:45:54.112135 PCI: 00:1f.5
1906 01:45:54.121915 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1907 01:45:54.125111 Done allocating resources.
1908 01:45:54.131779 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1909 01:45:54.134974 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1910 01:45:54.142052 Configure audio over I2S with MAX98373 NAU88L25B.
1911 01:45:54.145155 Enabling BT offload
1912 01:45:54.152550 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1913 01:45:54.155665 Enabling resources...
1914 01:45:54.159003 PCI: 00:00.0 subsystem <- 8086/4609
1915 01:45:54.162581 PCI: 00:00.0 cmd <- 06
1916 01:45:54.165566 PCI: 00:02.0 subsystem <- 8086/46b3
1917 01:45:54.168916 PCI: 00:02.0 cmd <- 03
1918 01:45:54.172625 PCI: 00:04.0 subsystem <- 8086/461d
1919 01:45:54.172704 PCI: 00:04.0 cmd <- 02
1920 01:45:54.175960 PCI: 00:06.0 bridge ctrl <- 0013
1921 01:45:54.179275 PCI: 00:06.0 subsystem <- 8086/464d
1922 01:45:54.182467 PCI: 00:06.0 cmd <- 106
1923 01:45:54.185692 PCI: 00:0a.0 subsystem <- 8086/467d
1924 01:45:54.189417 PCI: 00:0a.0 cmd <- 02
1925 01:45:54.192347 PCI: 00:0d.0 subsystem <- 8086/461e
1926 01:45:54.195832 PCI: 00:0d.0 cmd <- 02
1927 01:45:54.198870 PCI: 00:14.0 subsystem <- 8086/51ed
1928 01:45:54.202277 PCI: 00:14.0 cmd <- 02
1929 01:45:54.206286 PCI: 00:14.2 subsystem <- 8086/51ef
1930 01:45:54.206359 PCI: 00:14.2 cmd <- 02
1931 01:45:54.208719 PCI: 00:14.3 subsystem <- 8086/51f0
1932 01:45:54.212637 PCI: 00:14.3 cmd <- 02
1933 01:45:54.215804 PCI: 00:15.0 subsystem <- 8086/51e8
1934 01:45:54.218787 PCI: 00:15.0 cmd <- 02
1935 01:45:54.222408 PCI: 00:15.1 subsystem <- 8086/51e9
1936 01:45:54.225539 PCI: 00:15.1 cmd <- 06
1937 01:45:54.229199 PCI: 00:15.3 subsystem <- 8086/51eb
1938 01:45:54.232069 PCI: 00:15.3 cmd <- 02
1939 01:45:54.235546 PCI: 00:16.0 subsystem <- 8086/51e0
1940 01:45:54.235629 PCI: 00:16.0 cmd <- 02
1941 01:45:54.238826 PCI: 00:19.1 subsystem <- 8086/51c6
1942 01:45:54.242388 PCI: 00:19.1 cmd <- 02
1943 01:45:54.245412 PCI: 00:1e.0 subsystem <- 8086/51a8
1944 01:45:54.248690 PCI: 00:1e.0 cmd <- 06
1945 01:45:54.251939 PCI: 00:1e.3 subsystem <- 8086/51ab
1946 01:45:54.255510 PCI: 00:1e.3 cmd <- 02
1947 01:45:54.258588 PCI: 00:1f.0 subsystem <- 8086/5182
1948 01:45:54.261856 PCI: 00:1f.0 cmd <- 407
1949 01:45:54.265533 PCI: 00:1f.3 subsystem <- 8086/51c8
1950 01:45:54.265645 PCI: 00:1f.3 cmd <- 02
1951 01:45:54.268828 PCI: 00:1f.5 subsystem <- 8086/51a4
1952 01:45:54.272440 PCI: 00:1f.5 cmd <- 406
1953 01:45:54.275950 PCI: 01:00.0 cmd <- 02
1954 01:45:54.276033 done.
1955 01:45:54.281870 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1956 01:45:54.285804 ME: Version: Unavailable
1957 01:45:54.288681 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1958 01:45:54.291731 Initializing devices...
1959 01:45:54.295148 Root Device init
1960 01:45:54.295256 mainboard: EC init
1961 01:45:54.301849 Chrome EC: Set SMI mask to 0x0000000000000000
1962 01:45:54.305044 Chrome EC: UHEPI supported
1963 01:45:54.308262 Chrome EC: clear events_b mask to 0x0000000000000000
1964 01:45:54.314799 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1965 01:45:54.321399 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1966 01:45:54.328261 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1967 01:45:54.331361 Chrome EC: Set WAKE mask to 0x0000000000000000
1968 01:45:54.337877 Root Device init finished in 38 msecs
1969 01:45:54.338042 PCI: 00:00.0 init
1970 01:45:54.341250 CPU TDP = 15 Watts
1971 01:45:54.344583 CPU PL1 = 15 Watts
1972 01:45:54.344661 CPU PL2 = 55 Watts
1973 01:45:54.347592 CPU PL4 = 123 Watts
1974 01:45:54.351640 PCI: 00:00.0 init finished in 8 msecs
1975 01:45:54.354339 PCI: 00:02.0 init
1976 01:45:54.354420 GMA: Found VBT in CBFS
1977 01:45:54.357856 GMA: Found valid VBT in CBFS
1978 01:45:54.364841 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1979 01:45:54.371325 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1980 01:45:54.374357 PCI: 00:02.0 init finished in 18 msecs
1981 01:45:54.377676 PCI: 00:06.0 init
1982 01:45:54.381364 Initializing PCH PCIe bridge.
1983 01:45:54.384340 PCI: 00:06.0 init finished in 3 msecs
1984 01:45:54.384425 PCI: 00:0a.0 init
1985 01:45:54.390959 PCI: 00:0a.0 init finished in 0 msecs
1986 01:45:54.391043 PCI: 00:14.0 init
1987 01:45:54.394503 PCI: 00:14.0 init finished in 0 msecs
1988 01:45:54.397742 PCI: 00:14.2 init
1989 01:45:54.401357 PCI: 00:14.2 init finished in 0 msecs
1990 01:45:54.404738 PCI: 00:15.0 init
1991 01:45:54.407333 I2C bus 0 version 0x3230302a
1992 01:45:54.411602 DW I2C bus 0 at 0x80655000 (400 KHz)
1993 01:45:54.414192 PCI: 00:15.0 init finished in 6 msecs
1994 01:45:54.414276 PCI: 00:15.1 init
1995 01:45:54.417415 I2C bus 1 version 0x3230302a
1996 01:45:54.420747 DW I2C bus 1 at 0x80656000 (400 KHz)
1997 01:45:54.424081 PCI: 00:15.1 init finished in 6 msecs
1998 01:45:54.427512 PCI: 00:15.3 init
1999 01:45:54.431168 I2C bus 3 version 0x3230302a
2000 01:45:54.434742 DW I2C bus 3 at 0x80657000 (400 KHz)
2001 01:45:54.438017 PCI: 00:15.3 init finished in 6 msecs
2002 01:45:54.441165 PCI: 00:16.0 init
2003 01:45:54.444556 PCI: 00:16.0 init finished in 0 msecs
2004 01:45:54.445003 PCI: 00:19.1 init
2005 01:45:54.447522 I2C bus 5 version 0x3230302a
2006 01:45:54.451051 DW I2C bus 5 at 0x80659000 (400 KHz)
2007 01:45:54.457468 PCI: 00:19.1 init finished in 6 msecs
2008 01:45:54.457694 PCI: 00:1f.0 init
2009 01:45:54.464182 IOAPIC: Initializing IOAPIC at 0xfec00000
2010 01:45:54.464362 IOAPIC: ID = 0x02
2011 01:45:54.467466 IOAPIC: Dumping registers
2012 01:45:54.470455 reg 0x0000: 0x02000000
2013 01:45:54.470608 reg 0x0001: 0x00770020
2014 01:45:54.473979 reg 0x0002: 0x00000000
2015 01:45:54.477326 IOAPIC: 120 interrupts
2016 01:45:54.480597 IOAPIC: Clearing IOAPIC at 0xfec00000
2017 01:45:54.483963 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2018 01:45:54.490559 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2019 01:45:54.493906 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2020 01:45:54.500313 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2021 01:45:54.503901 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2022 01:45:54.510195 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2023 01:45:54.513861 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2024 01:45:54.520418 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2025 01:45:54.523645 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2026 01:45:54.526896 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2027 01:45:54.533499 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2028 01:45:54.537226 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2029 01:45:54.543523 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2030 01:45:54.547240 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2031 01:45:54.553634 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2032 01:45:54.557099 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2033 01:45:54.563579 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2034 01:45:54.566764 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2035 01:45:54.570016 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2036 01:45:54.576749 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2037 01:45:54.579916 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2038 01:45:54.586727 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2039 01:45:54.590231 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2040 01:45:54.596540 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2041 01:45:54.599946 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2042 01:45:54.606589 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2043 01:45:54.610364 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2044 01:45:54.613804 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2045 01:45:54.619928 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2046 01:45:54.623263 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2047 01:45:54.629870 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2048 01:45:54.633124 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2049 01:45:54.639947 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2050 01:45:54.643121 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2051 01:45:54.649725 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2052 01:45:54.653244 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2053 01:45:54.656284 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2054 01:45:54.663595 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2055 01:45:54.666603 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2056 01:45:54.673336 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2057 01:45:54.676663 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2058 01:45:54.683221 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2059 01:45:54.686732 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2060 01:45:54.693433 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2061 01:45:54.696449 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2062 01:45:54.699836 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2063 01:45:54.706394 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2064 01:45:54.709839 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2065 01:45:54.716582 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2066 01:45:54.720003 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2067 01:45:54.726508 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2068 01:45:54.729610 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2069 01:45:54.732873 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2070 01:45:54.739446 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2071 01:45:54.743109 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2072 01:45:54.749913 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2073 01:45:54.753052 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2074 01:45:54.759464 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2075 01:45:54.762734 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2076 01:45:54.769757 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2077 01:45:54.772835 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2078 01:45:54.776480 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2079 01:45:54.782929 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2080 01:45:54.786405 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2081 01:45:54.792797 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2082 01:45:54.796326 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2083 01:45:54.802692 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2084 01:45:54.805896 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2085 01:45:54.812808 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2086 01:45:54.816230 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2087 01:45:54.819438 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2088 01:45:54.826153 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2089 01:45:54.829472 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2090 01:45:54.836129 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2091 01:45:54.839590 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2092 01:45:54.845852 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2093 01:45:54.849339 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2094 01:45:54.852574 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2095 01:45:54.859464 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2096 01:45:54.862644 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2097 01:45:54.869527 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2098 01:45:54.872659 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2099 01:45:54.879225 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2100 01:45:54.882449 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2101 01:45:54.889500 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2102 01:45:54.892463 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2103 01:45:54.896133 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2104 01:45:54.902949 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2105 01:45:54.906085 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2106 01:45:54.912736 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2107 01:45:54.915971 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2108 01:45:54.922475 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2109 01:45:54.925990 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2110 01:45:54.932887 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2111 01:45:54.935727 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2112 01:45:54.939118 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2113 01:45:54.945819 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2114 01:45:54.949207 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2115 01:45:54.956346 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2116 01:45:54.959485 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2117 01:45:54.966255 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2118 01:45:54.969093 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2119 01:45:54.972293 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2120 01:45:54.979370 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2121 01:45:54.982826 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2122 01:45:54.989130 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2123 01:45:54.992119 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2124 01:45:54.998914 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2125 01:45:55.002385 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2126 01:45:55.008835 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2127 01:45:55.012591 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2128 01:45:55.015536 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2129 01:45:55.022379 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2130 01:45:55.025590 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2131 01:45:55.031986 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2132 01:45:55.035475 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2133 01:45:55.042153 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2134 01:45:55.045348 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2135 01:45:55.052171 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2136 01:45:55.055557 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2137 01:45:55.059367 IOAPIC: Bootstrap Processor Local APIC = 0x00
2138 01:45:55.065575 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2139 01:45:55.068985 PCI: 00:1f.0 init finished in 607 msecs
2140 01:45:55.072389 PCI: 00:1f.2 init
2141 01:45:55.075568 apm_control: Disabling ACPI.
2142 01:45:55.079662 APMC done.
2143 01:45:55.083096 PCI: 00:1f.2 init finished in 7 msecs
2144 01:45:55.086359 PCI: 00:1f.3 init
2145 01:45:55.089515 PCI: 00:1f.3 init finished in 0 msecs
2146 01:45:55.089718 PCI: 01:00.0 init
2147 01:45:55.093174 PCI: 01:00.0 init finished in 0 msecs
2148 01:45:55.096163 PNP: 0c09.0 init
2149 01:45:55.099619 Google Chrome EC uptime: 12.008 seconds
2150 01:45:55.106384 Google Chrome AP resets since EC boot: 1
2151 01:45:55.109996 Google Chrome most recent AP reset causes:
2152 01:45:55.112782 0.370: 32775 shutdown: entering G3
2153 01:45:55.119826 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2154 01:45:55.122798 PNP: 0c09.0 init finished in 23 msecs
2155 01:45:55.126159 GENERIC: 0.0 init
2156 01:45:55.129930 GENERIC: 0.0 init finished in 0 msecs
2157 01:45:55.130245 GENERIC: 1.0 init
2158 01:45:55.132825 GENERIC: 1.0 init finished in 0 msecs
2159 01:45:55.136567 Devices initialized
2160 01:45:55.139503 Show all devs... After init.
2161 01:45:55.143091 Root Device: enabled 1
2162 01:45:55.143350 CPU_CLUSTER: 0: enabled 1
2163 01:45:55.146166 DOMAIN: 0000: enabled 1
2164 01:45:55.149662 GPIO: 0: enabled 1
2165 01:45:55.153021 PCI: 00:00.0: enabled 1
2166 01:45:55.153263 PCI: 00:01.0: enabled 0
2167 01:45:55.156694 PCI: 00:01.1: enabled 0
2168 01:45:55.159472 PCI: 00:02.0: enabled 1
2169 01:45:55.159715 PCI: 00:04.0: enabled 1
2170 01:45:55.162907 PCI: 00:05.0: enabled 0
2171 01:45:55.166160 PCI: 00:06.0: enabled 1
2172 01:45:55.169486 PCI: 00:06.2: enabled 0
2173 01:45:55.169790 PCI: 00:07.0: enabled 0
2174 01:45:55.173201 PCI: 00:07.1: enabled 0
2175 01:45:55.176080 PCI: 00:07.2: enabled 0
2176 01:45:55.179424 PCI: 00:07.3: enabled 0
2177 01:45:55.179677 PCI: 00:08.0: enabled 0
2178 01:45:55.183062 PCI: 00:09.0: enabled 0
2179 01:45:55.186113 PCI: 00:0a.0: enabled 1
2180 01:45:55.189435 PCI: 00:0d.0: enabled 1
2181 01:45:55.189682 PCI: 00:0d.1: enabled 0
2182 01:45:55.192752 PCI: 00:0d.2: enabled 0
2183 01:45:55.195863 PCI: 00:0d.3: enabled 0
2184 01:45:55.195946 PCI: 00:0e.0: enabled 0
2185 01:45:55.199508 PCI: 00:10.0: enabled 0
2186 01:45:55.202499 PCI: 00:10.1: enabled 0
2187 01:45:55.206158 PCI: 00:10.6: enabled 0
2188 01:45:55.206267 PCI: 00:10.7: enabled 0
2189 01:45:55.209235 PCI: 00:12.0: enabled 0
2190 01:45:55.212642 PCI: 00:12.6: enabled 0
2191 01:45:55.215727 PCI: 00:12.7: enabled 0
2192 01:45:55.215809 PCI: 00:13.0: enabled 0
2193 01:45:55.219392 PCI: 00:14.0: enabled 1
2194 01:45:55.222179 PCI: 00:14.1: enabled 0
2195 01:45:55.225641 PCI: 00:14.2: enabled 1
2196 01:45:55.225724 PCI: 00:14.3: enabled 1
2197 01:45:55.228801 PCI: 00:15.0: enabled 1
2198 01:45:55.232730 PCI: 00:15.1: enabled 1
2199 01:45:55.235987 PCI: 00:15.2: enabled 0
2200 01:45:55.236404 PCI: 00:15.3: enabled 1
2201 01:45:55.239402 PCI: 00:16.0: enabled 1
2202 01:45:55.242587 PCI: 00:16.1: enabled 0
2203 01:45:55.245791 PCI: 00:16.2: enabled 0
2204 01:45:55.246281 PCI: 00:16.3: enabled 0
2205 01:45:55.249263 PCI: 00:16.4: enabled 0
2206 01:45:55.252356 PCI: 00:16.5: enabled 0
2207 01:45:55.255503 PCI: 00:17.0: enabled 0
2208 01:45:55.255936 PCI: 00:19.0: enabled 0
2209 01:45:55.258935 PCI: 00:19.1: enabled 1
2210 01:45:55.262609 PCI: 00:19.2: enabled 0
2211 01:45:55.263017 PCI: 00:1a.0: enabled 0
2212 01:45:55.265583 PCI: 00:1c.0: enabled 0
2213 01:45:55.269232 PCI: 00:1c.1: enabled 0
2214 01:45:55.271971 PCI: 00:1c.2: enabled 0
2215 01:45:55.272354 PCI: 00:1c.3: enabled 0
2216 01:45:55.275384 PCI: 00:1c.4: enabled 0
2217 01:45:55.279060 PCI: 00:1c.5: enabled 0
2218 01:45:55.282140 PCI: 00:1c.6: enabled 0
2219 01:45:55.282445 PCI: 00:1c.7: enabled 0
2220 01:45:55.285558 PCI: 00:1d.0: enabled 0
2221 01:45:55.288479 PCI: 00:1d.1: enabled 0
2222 01:45:55.291883 PCI: 00:1d.2: enabled 0
2223 01:45:55.292144 PCI: 00:1d.3: enabled 0
2224 01:45:55.295070 PCI: 00:1e.0: enabled 1
2225 01:45:55.298496 PCI: 00:1e.1: enabled 0
2226 01:45:55.301978 PCI: 00:1e.2: enabled 0
2227 01:45:55.302244 PCI: 00:1e.3: enabled 1
2228 01:45:55.305233 PCI: 00:1f.0: enabled 1
2229 01:45:55.308491 PCI: 00:1f.1: enabled 0
2230 01:45:55.308718 PCI: 00:1f.2: enabled 1
2231 01:45:55.311731 PCI: 00:1f.3: enabled 1
2232 01:45:55.315306 PCI: 00:1f.4: enabled 0
2233 01:45:55.318729 PCI: 00:1f.5: enabled 1
2234 01:45:55.319006 PCI: 00:1f.6: enabled 0
2235 01:45:55.321837 PCI: 00:1f.7: enabled 0
2236 01:45:55.325466 GENERIC: 0.0: enabled 1
2237 01:45:55.328618 GENERIC: 0.0: enabled 1
2238 01:45:55.329116 GENERIC: 1.0: enabled 1
2239 01:45:55.332183 GENERIC: 0.0: enabled 1
2240 01:45:55.335512 GENERIC: 1.0: enabled 1
2241 01:45:55.338989 USB0 port 0: enabled 1
2242 01:45:55.339557 USB0 port 0: enabled 1
2243 01:45:55.341846 GENERIC: 0.0: enabled 1
2244 01:45:55.345264 I2C: 00:1a: enabled 1
2245 01:45:55.345947 I2C: 00:31: enabled 1
2246 01:45:55.348659 I2C: 00:32: enabled 1
2247 01:45:55.351846 I2C: 00:50: enabled 1
2248 01:45:55.352317 I2C: 00:10: enabled 1
2249 01:45:55.355406 I2C: 00:15: enabled 1
2250 01:45:55.358764 I2C: 00:2c: enabled 1
2251 01:45:55.359372 GENERIC: 0.0: enabled 1
2252 01:45:55.361908 SPI: 00: enabled 1
2253 01:45:55.364943 PNP: 0c09.0: enabled 1
2254 01:45:55.365426 GENERIC: 0.0: enabled 1
2255 01:45:55.368916 USB3 port 0: enabled 1
2256 01:45:55.371825 USB3 port 1: enabled 0
2257 01:45:55.375284 USB3 port 2: enabled 1
2258 01:45:55.375859 USB3 port 3: enabled 0
2259 01:45:55.378510 USB2 port 0: enabled 1
2260 01:45:55.381836 USB2 port 1: enabled 0
2261 01:45:55.382280 USB2 port 2: enabled 1
2262 01:45:55.385031 USB2 port 3: enabled 0
2263 01:45:55.388219 USB2 port 4: enabled 0
2264 01:45:55.391970 USB2 port 5: enabled 1
2265 01:45:55.392403 USB2 port 6: enabled 0
2266 01:45:55.394849 USB2 port 7: enabled 0
2267 01:45:55.398587 USB2 port 8: enabled 1
2268 01:45:55.399035 USB2 port 9: enabled 1
2269 01:45:55.401867 USB3 port 0: enabled 1
2270 01:45:55.405098 USB3 port 1: enabled 0
2271 01:45:55.405531 USB3 port 2: enabled 0
2272 01:45:55.408115 USB3 port 3: enabled 0
2273 01:45:55.411606 GENERIC: 0.0: enabled 1
2274 01:45:55.414929 GENERIC: 1.0: enabled 1
2275 01:45:55.415362 APIC: 00: enabled 1
2276 01:45:55.418348 APIC: 12: enabled 1
2277 01:45:55.421806 APIC: 14: enabled 1
2278 01:45:55.422222 APIC: 16: enabled 1
2279 01:45:55.425322 APIC: 10: enabled 1
2280 01:45:55.425738 APIC: 01: enabled 1
2281 01:45:55.428219 APIC: 08: enabled 1
2282 01:45:55.431715 APIC: 09: enabled 1
2283 01:45:55.432200 PCI: 01:00.0: enabled 1
2284 01:45:55.438004 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2285 01:45:55.441393 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2286 01:45:55.447987 ELOG: NV offset 0xf20000 size 0x4000
2287 01:45:55.454822 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2288 01:45:55.461554 ELOG: Event(17) added with size 13 at 2024-02-06 01:45:57 UTC
2289 01:45:55.468078 ELOG: Event(9E) added with size 10 at 2024-02-06 01:45:57 UTC
2290 01:45:55.474806 ELOG: Event(9F) added with size 14 at 2024-02-06 01:45:57 UTC
2291 01:45:55.481373 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2292 01:45:55.487633 ELOG: Event(A0) added with size 9 at 2024-02-06 01:45:57 UTC
2293 01:45:55.490902 elog_add_boot_reason: Logged dev mode boot
2294 01:45:55.497256 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2295 01:45:55.497340 Finalize devices...
2296 01:45:55.500891 PCI: 00:16.0 final
2297 01:45:55.501005 PCI: 00:1f.2 final
2298 01:45:55.503846 GENERIC: 0.0 final
2299 01:45:55.510347 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2300 01:45:55.510466 GENERIC: 1.0 final
2301 01:45:55.516939 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2302 01:45:55.520355 Devices finalized
2303 01:45:55.527172 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2304 01:45:55.530501 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2305 01:45:55.536808 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2306 01:45:55.540293 ME: HFSTS1 : 0x90000245
2307 01:45:55.546839 ME: HFSTS2 : 0x82100116
2308 01:45:55.550209 ME: HFSTS3 : 0x00000050
2309 01:45:55.553545 ME: HFSTS4 : 0x00004000
2310 01:45:55.560368 ME: HFSTS5 : 0x00000000
2311 01:45:55.563432 ME: HFSTS6 : 0x40600006
2312 01:45:55.566826 ME: Manufacturing Mode : NO
2313 01:45:55.570323 ME: SPI Protection Mode Enabled : YES
2314 01:45:55.576683 ME: FPFs Committed : YES
2315 01:45:55.580211 ME: Manufacturing Vars Locked : YES
2316 01:45:55.583398 ME: FW Partition Table : OK
2317 01:45:55.586886 ME: Bringup Loader Failure : NO
2318 01:45:55.590155 ME: Firmware Init Complete : YES
2319 01:45:55.593624 ME: Boot Options Present : NO
2320 01:45:55.596535 ME: Update In Progress : NO
2321 01:45:55.600014 ME: D0i3 Support : YES
2322 01:45:55.606717 ME: Low Power State Enabled : NO
2323 01:45:55.610040 ME: CPU Replaced : YES
2324 01:45:55.613224 ME: CPU Replacement Valid : YES
2325 01:45:55.616595 ME: Current Working State : 5
2326 01:45:55.620062 ME: Current Operation State : 1
2327 01:45:55.623258 ME: Current Operation Mode : 0
2328 01:45:55.626962 ME: Error Code : 0
2329 01:45:55.629865 ME: Enhanced Debug Mode : NO
2330 01:45:55.633206 ME: CPU Debug Disabled : YES
2331 01:45:55.639779 ME: TXT Support : NO
2332 01:45:55.643839 ME: WP for RO is enabled : YES
2333 01:45:55.646824 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2334 01:45:55.653647 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2335 01:45:55.656769 Ramoops buffer: 0x100000@0x76899000.
2336 01:45:55.663892 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2337 01:45:55.670106 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2338 01:45:55.673778 CBFS: 'fallback/slic' not found.
2339 01:45:55.680284 ACPI: Writing ACPI tables at 7686d000.
2340 01:45:55.680687 ACPI: * FACS
2341 01:45:55.683413 ACPI: * DSDT
2342 01:45:55.690179 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2343 01:45:55.693184 ACPI: * FADT
2344 01:45:55.693465 SCI is IRQ9
2345 01:45:55.696519 ACPI: added table 1/32, length now 40
2346 01:45:55.699675 ACPI: * SSDT
2347 01:45:55.703002 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2348 01:45:55.710621 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2349 01:45:55.713812 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2350 01:45:55.717291 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2351 01:45:55.723479 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2352 01:45:55.730179 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2353 01:45:55.736929 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2354 01:45:55.740280 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2355 01:45:55.747055 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2356 01:45:55.750197 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2357 01:45:55.757226 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2358 01:45:55.760172 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2359 01:45:55.766963 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2360 01:45:55.769999 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2361 01:45:55.777725 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2362 01:45:55.780895 PS2K: Passing 80 keymaps to kernel
2363 01:45:55.787700 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2364 01:45:55.794419 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2365 01:45:55.801213 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2366 01:45:55.807728 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2367 01:45:55.814595 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2368 01:45:55.820792 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2369 01:45:55.824286 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2370 01:45:55.830696 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2371 01:45:55.838070 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2372 01:45:55.844487 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2373 01:45:55.847634 ACPI: added table 2/32, length now 44
2374 01:45:55.850821 ACPI: * MCFG
2375 01:45:55.854357 ACPI: added table 3/32, length now 48
2376 01:45:55.854822 ACPI: * TPM2
2377 01:45:55.857528 TPM2 log created at 0x7685d000
2378 01:45:55.864291 ACPI: added table 4/32, length now 52
2379 01:45:55.864758 ACPI: * LPIT
2380 01:45:55.867804 ACPI: added table 5/32, length now 56
2381 01:45:55.870919 ACPI: * MADT
2382 01:45:55.871448 SCI is IRQ9
2383 01:45:55.874483 ACPI: added table 6/32, length now 60
2384 01:45:55.877495 cmd_reg from pmc_make_ipc_cmd 1052838
2385 01:45:55.884583 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2386 01:45:55.890923 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2387 01:45:55.897568 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2388 01:45:55.900567 PMC CrashLog size in discovery mode: 0xC00
2389 01:45:55.903902 cpu crashlog bar addr: 0x80640000
2390 01:45:55.906881 cpu discovery table offset: 0x6030
2391 01:45:55.913413 cpu_crashlog_discovery_table buffer count: 0x3
2392 01:45:55.920285 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2393 01:45:55.927025 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2394 01:45:55.933290 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2395 01:45:55.936741 PMC crashLog size in discovery mode : 0xC00
2396 01:45:55.943504 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2397 01:45:55.950102 discover mode PMC crashlog size adjusted to: 0x200
2398 01:45:55.956944 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2399 01:45:55.959917 discover mode PMC crashlog size adjusted to: 0x0
2400 01:45:55.963371 m_cpu_crashLog_size : 0x3480 bytes
2401 01:45:55.966647 CPU crashLog present.
2402 01:45:55.970030 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2403 01:45:55.979880 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2404 01:45:55.979992 current = 76876550
2405 01:45:55.983134 ACPI: * DMAR
2406 01:45:55.986481 ACPI: added table 7/32, length now 64
2407 01:45:55.990059 ACPI: added table 8/32, length now 68
2408 01:45:55.990141 ACPI: * HPET
2409 01:45:55.996435 ACPI: added table 9/32, length now 72
2410 01:45:55.996541 ACPI: done.
2411 01:45:56.000032 ACPI tables: 38528 bytes.
2412 01:45:56.003493 smbios_write_tables: 76857000
2413 01:45:56.006716 EC returned error result code 3
2414 01:45:56.010087 Couldn't obtain OEM name from CBI
2415 01:45:56.013261 Create SMBIOS type 16
2416 01:45:56.013338 Create SMBIOS type 17
2417 01:45:56.016738 Create SMBIOS type 20
2418 01:45:56.019777 GENERIC: 0.0 (WIFI Device)
2419 01:45:56.023368 SMBIOS tables: 2156 bytes.
2420 01:45:56.026721 Writing table forward entry at 0x00000500
2421 01:45:56.033088 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2422 01:45:56.036535 Writing coreboot table at 0x76891000
2423 01:45:56.042951 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2424 01:45:56.046744 1. 0000000000001000-000000000009ffff: RAM
2425 01:45:56.053133 2. 00000000000a0000-00000000000fffff: RESERVED
2426 01:45:56.056368 3. 0000000000100000-0000000076856fff: RAM
2427 01:45:56.063297 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2428 01:45:56.066162 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2429 01:45:56.073049 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2430 01:45:56.076465 7. 0000000077000000-00000000803fffff: RESERVED
2431 01:45:56.082881 8. 00000000c0000000-00000000cfffffff: RESERVED
2432 01:45:56.086117 9. 00000000f8000000-00000000f9ffffff: RESERVED
2433 01:45:56.092926 10. 00000000fb000000-00000000fb000fff: RESERVED
2434 01:45:56.096063 11. 00000000fc800000-00000000fe7fffff: RESERVED
2435 01:45:56.102717 12. 00000000feb00000-00000000feb7ffff: RESERVED
2436 01:45:56.106302 13. 00000000fec00000-00000000fecfffff: RESERVED
2437 01:45:56.109638 14. 00000000fed40000-00000000fed6ffff: RESERVED
2438 01:45:56.115948 15. 00000000fed80000-00000000fed87fff: RESERVED
2439 01:45:56.119630 16. 00000000fed90000-00000000fed92fff: RESERVED
2440 01:45:56.126200 17. 00000000feda0000-00000000feda1fff: RESERVED
2441 01:45:56.129249 18. 00000000fedc0000-00000000feddffff: RESERVED
2442 01:45:56.132791 19. 0000000100000000-000000027fbfffff: RAM
2443 01:45:56.135947 Passing 4 GPIOs to payload:
2444 01:45:56.142687 NAME | PORT | POLARITY | VALUE
2445 01:45:56.149446 lid | undefined | high | high
2446 01:45:56.152643 power | undefined | high | low
2447 01:45:56.159525 oprom | undefined | high | low
2448 01:45:56.162445 EC in RW | 0x00000151 | high | high
2449 01:45:56.165983 Board ID: 3
2450 01:45:56.166064 FW config: 0x131
2451 01:45:56.172428 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 3d0c
2452 01:45:56.175947 coreboot table: 1788 bytes.
2453 01:45:56.179183 IMD ROOT 0. 0x76fff000 0x00001000
2454 01:45:56.182513 IMD SMALL 1. 0x76ffe000 0x00001000
2455 01:45:56.185626 FSP MEMORY 2. 0x76afe000 0x00500000
2456 01:45:56.189028 CONSOLE 3. 0x76ade000 0x00020000
2457 01:45:56.195569 RW MCACHE 4. 0x76add000 0x0000043c
2458 01:45:56.198975 RO MCACHE 5. 0x76adc000 0x00000fd8
2459 01:45:56.202158 FMAP 6. 0x76adb000 0x0000064a
2460 01:45:56.205748 TIME STAMP 7. 0x76ada000 0x00000910
2461 01:45:56.208821 VBOOT WORK 8. 0x76ac6000 0x00014000
2462 01:45:56.212136 MEM INFO 9. 0x76ac5000 0x000003b8
2463 01:45:56.215561 ROMSTG STCK10. 0x76ac4000 0x00001000
2464 01:45:56.218696 AFTER CAR 11. 0x76ab8000 0x0000c000
2465 01:45:56.225373 RAMSTAGE 12. 0x76a2e000 0x0008a000
2466 01:45:56.228964 ACPI BERT 13. 0x76a1e000 0x00010000
2467 01:45:56.232344 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2468 01:45:56.235423 REFCODE 15. 0x769ae000 0x0006f000
2469 01:45:56.238770 SMM BACKUP 16. 0x7699e000 0x00010000
2470 01:45:56.242131 IGD OPREGION17. 0x76999000 0x00004203
2471 01:45:56.245358 RAMOOPS 18. 0x76899000 0x00100000
2472 01:45:56.248900 COREBOOT 19. 0x76891000 0x00008000
2473 01:45:56.255567 ACPI 20. 0x7686d000 0x00024000
2474 01:45:56.259266 TPM2 TCGLOG21. 0x7685d000 0x00010000
2475 01:45:56.261984 PMC CRASHLOG22. 0x7685c000 0x00000c00
2476 01:45:56.265434 CPU CRASHLOG23. 0x76858000 0x00003480
2477 01:45:56.269098 SMBIOS 24. 0x76857000 0x00001000
2478 01:45:56.272178 IMD small region:
2479 01:45:56.275241 IMD ROOT 0. 0x76ffec00 0x00000400
2480 01:45:56.278589 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2481 01:45:56.282015 VPD 2. 0x76ffeb60 0x0000006c
2482 01:45:56.288376 POWER STATE 3. 0x76ffeb00 0x00000044
2483 01:45:56.291889 ROMSTAGE 4. 0x76ffeae0 0x00000004
2484 01:45:56.294853 ACPI GNVS 5. 0x76ffea80 0x00000048
2485 01:45:56.298313 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2486 01:45:56.304845 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2487 01:45:56.308310 MTRR: Physical address space:
2488 01:45:56.314805 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2489 01:45:56.321707 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2490 01:45:56.324650 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2491 01:45:56.331485 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2492 01:45:56.337997 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2493 01:45:56.344561 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2494 01:45:56.351070 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2495 01:45:56.354703 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 01:45:56.361448 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 01:45:56.364689 MTRR: Fixed MSR 0x259 0x0000000000000000
2498 01:45:56.367891 MTRR: Fixed MSR 0x268 0x0606060606060606
2499 01:45:56.370974 MTRR: Fixed MSR 0x269 0x0606060606060606
2500 01:45:56.374589 MTRR: Fixed MSR 0x26a 0x0606060606060606
2501 01:45:56.381034 MTRR: Fixed MSR 0x26b 0x0606060606060606
2502 01:45:56.384380 MTRR: Fixed MSR 0x26c 0x0606060606060606
2503 01:45:56.388077 MTRR: Fixed MSR 0x26d 0x0606060606060606
2504 01:45:56.391174 MTRR: Fixed MSR 0x26e 0x0606060606060606
2505 01:45:56.397627 MTRR: Fixed MSR 0x26f 0x0606060606060606
2506 01:45:56.401052 call enable_fixed_mtrr()
2507 01:45:56.403980 CPU physical address size: 39 bits
2508 01:45:56.407654 MTRR: default type WB/UC MTRR counts: 6/6.
2509 01:45:56.410710 MTRR: UC selected as default type.
2510 01:45:56.417309 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2511 01:45:56.424316 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2512 01:45:56.430851 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2513 01:45:56.437441 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2514 01:45:56.444083 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2515 01:45:56.450620 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2516 01:45:56.453984 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 01:45:56.457229 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 01:45:56.463755 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 01:45:56.467212 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 01:45:56.470472 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 01:45:56.473898 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 01:45:56.480833 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 01:45:56.484173 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 01:45:56.487230 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 01:45:56.490409 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 01:45:56.497164 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 01:45:56.500432 MTRR: Fixed MSR 0x250 0x0606060606060606
2528 01:45:56.503882 MTRR: Fixed MSR 0x250 0x0606060606060606
2529 01:45:56.506857 MTRR: Fixed MSR 0x250 0x0606060606060606
2530 01:45:56.513505 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 01:45:56.517056 MTRR: Fixed MSR 0x259 0x0000000000000000
2532 01:45:56.520612 MTRR: Fixed MSR 0x268 0x0606060606060606
2533 01:45:56.523502 MTRR: Fixed MSR 0x269 0x0606060606060606
2534 01:45:56.527142 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 01:45:56.533907 MTRR: Fixed MSR 0x26b 0x0606060606060606
2536 01:45:56.536869 MTRR: Fixed MSR 0x26c 0x0606060606060606
2537 01:45:56.540132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2538 01:45:56.543412 MTRR: Fixed MSR 0x26e 0x0606060606060606
2539 01:45:56.550213 MTRR: Fixed MSR 0x26f 0x0606060606060606
2540 01:45:56.553598 MTRR: Fixed MSR 0x250 0x0606060606060606
2541 01:45:56.556544 call enable_fixed_mtrr()
2542 01:45:56.556646 call enable_fixed_mtrr()
2543 01:45:56.563510 MTRR: Fixed MSR 0x258 0x0606060606060606
2544 01:45:56.566996 CPU physical address size: 39 bits
2545 01:45:56.570009 MTRR: Fixed MSR 0x259 0x0000000000000000
2546 01:45:56.573347 MTRR: Fixed MSR 0x250 0x0606060606060606
2547 01:45:56.576565 MTRR: Fixed MSR 0x268 0x0606060606060606
2548 01:45:56.583416 MTRR: Fixed MSR 0x269 0x0606060606060606
2549 01:45:56.586631 MTRR: Fixed MSR 0x250 0x0606060606060606
2550 01:45:56.589827 MTRR: Fixed MSR 0x258 0x0606060606060606
2551 01:45:56.593068 MTRR: Fixed MSR 0x258 0x0606060606060606
2552 01:45:56.600132 MTRR: Fixed MSR 0x259 0x0000000000000000
2553 01:45:56.603163 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 01:45:56.606405 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 01:45:56.610089 MTRR: Fixed MSR 0x26a 0x0606060606060606
2556 01:45:56.617046 MTRR: Fixed MSR 0x26b 0x0606060606060606
2557 01:45:56.620026 MTRR: Fixed MSR 0x26c 0x0606060606060606
2558 01:45:56.622997 MTRR: Fixed MSR 0x26d 0x0606060606060606
2559 01:45:56.626690 MTRR: Fixed MSR 0x26e 0x0606060606060606
2560 01:45:56.629936 MTRR: Fixed MSR 0x26f 0x0606060606060606
2561 01:45:56.636472 MTRR: Fixed MSR 0x26a 0x0606060606060606
2562 01:45:56.636555 call enable_fixed_mtrr()
2563 01:45:56.642964 MTRR: Fixed MSR 0x259 0x0000000000000000
2564 01:45:56.646346 CPU physical address size: 39 bits
2565 01:45:56.649723 MTRR: Fixed MSR 0x268 0x0606060606060606
2566 01:45:56.653169 CPU physical address size: 39 bits
2567 01:45:56.656168 MTRR: Fixed MSR 0x26b 0x0606060606060606
2568 01:45:56.663043 MTRR: Fixed MSR 0x258 0x0606060606060606
2569 01:45:56.666135 MTRR: Fixed MSR 0x258 0x0606060606060606
2570 01:45:56.669519 MTRR: Fixed MSR 0x26c 0x0606060606060606
2571 01:45:56.672804 MTRR: Fixed MSR 0x26d 0x0606060606060606
2572 01:45:56.676472 MTRR: Fixed MSR 0x26e 0x0606060606060606
2573 01:45:56.682834 MTRR: Fixed MSR 0x26f 0x0606060606060606
2574 01:45:56.686293 MTRR: Fixed MSR 0x259 0x0000000000000000
2575 01:45:56.689467 call enable_fixed_mtrr()
2576 01:45:56.692795 MTRR: Fixed MSR 0x268 0x0606060606060606
2577 01:45:56.696069 MTRR: Fixed MSR 0x269 0x0606060606060606
2578 01:45:56.699342 MTRR: Fixed MSR 0x26a 0x0606060606060606
2579 01:45:56.706010 MTRR: Fixed MSR 0x26b 0x0606060606060606
2580 01:45:56.709218 MTRR: Fixed MSR 0x26c 0x0606060606060606
2581 01:45:56.712691 MTRR: Fixed MSR 0x26d 0x0606060606060606
2582 01:45:56.716032 MTRR: Fixed MSR 0x26e 0x0606060606060606
2583 01:45:56.722757 MTRR: Fixed MSR 0x26f 0x0606060606060606
2584 01:45:56.725821 CPU physical address size: 39 bits
2585 01:45:56.725903 call enable_fixed_mtrr()
2586 01:45:56.732456 MTRR: Fixed MSR 0x259 0x0000000000000000
2587 01:45:56.735497 CPU physical address size: 39 bits
2588 01:45:56.738921 MTRR: Fixed MSR 0x268 0x0606060606060606
2589 01:45:56.742600 MTRR: Fixed MSR 0x269 0x0606060606060606
2590 01:45:56.745498 MTRR: Fixed MSR 0x269 0x0606060606060606
2591 01:45:56.752605 MTRR: Fixed MSR 0x26a 0x0606060606060606
2592 01:45:56.755758 MTRR: Fixed MSR 0x26b 0x0606060606060606
2593 01:45:56.758890 MTRR: Fixed MSR 0x26c 0x0606060606060606
2594 01:45:56.762477 MTRR: Fixed MSR 0x26d 0x0606060606060606
2595 01:45:56.769167 MTRR: Fixed MSR 0x26e 0x0606060606060606
2596 01:45:56.771989 MTRR: Fixed MSR 0x26f 0x0606060606060606
2597 01:45:56.775721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2598 01:45:56.778608 call enable_fixed_mtrr()
2599 01:45:56.781859 MTRR: Fixed MSR 0x26b 0x0606060606060606
2600 01:45:56.785209 MTRR: Fixed MSR 0x26c 0x0606060606060606
2601 01:45:56.791914 MTRR: Fixed MSR 0x26d 0x0606060606060606
2602 01:45:56.795406 MTRR: Fixed MSR 0x26e 0x0606060606060606
2603 01:45:56.798586 MTRR: Fixed MSR 0x26f 0x0606060606060606
2604 01:45:56.801850 CPU physical address size: 39 bits
2605 01:45:56.805070 call enable_fixed_mtrr()
2606 01:45:56.808609 CPU physical address size: 39 bits
2607 01:45:56.812027
2608 01:45:56.812161 MTRR check
2609 01:45:56.815015 Fixed MTRRs : Enabled
2610 01:45:56.815168 Variable MTRRs: Enabled
2611 01:45:56.815288
2612 01:45:56.821999 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2613 01:45:56.825529 Checking cr50 for pending updates
2614 01:45:56.837599 Reading cr50 TPM mode
2615 01:45:56.853034 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2616 01:45:56.862642 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2617 01:45:56.865894 Checking segment from ROM address 0xf96cbe6c
2618 01:45:56.869421 Checking segment from ROM address 0xf96cbe88
2619 01:45:56.876402 Loading segment from ROM address 0xf96cbe6c
2620 01:45:56.876485 code (compression=1)
2621 01:45:56.886004 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2622 01:45:56.895584 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2623 01:45:56.895674 using LZMA
2624 01:45:56.918303 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2625 01:45:56.924936 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2626 01:45:56.933109 Loading segment from ROM address 0xf96cbe88
2627 01:45:56.936755 Entry Point 0x30000000
2628 01:45:56.936881 Loaded segments
2629 01:45:56.943112 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2630 01:45:56.949795 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2631 01:45:56.953098 Finalizing chipset.
2632 01:45:56.956525 apm_control: Finalizing SMM.
2633 01:45:56.956725 APMC done.
2634 01:45:56.960133 HECI: CSE device 16.1 is disabled
2635 01:45:56.963272 HECI: CSE device 16.2 is disabled
2636 01:45:56.966756 HECI: CSE device 16.3 is disabled
2637 01:45:56.970280 HECI: CSE device 16.4 is disabled
2638 01:45:56.973242 HECI: CSE device 16.5 is disabled
2639 01:45:56.976409 HECI: Sending End-of-Post
2640 01:45:56.986147 CSE: EOP requested action: continue boot
2641 01:45:56.988964 CSE EOP successful, continuing boot
2642 01:45:56.995850 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2643 01:45:56.999596 mp_park_aps done after 0 msecs.
2644 01:45:57.002831 Jumping to boot code at 0x30000000(0x76891000)
2645 01:45:57.012405 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2646 01:45:57.016697
2647 01:45:57.017209
2648 01:45:57.017583
2649 01:45:57.020001 Starting depthcharge on Volmar...
2650 01:45:57.020484
2651 01:45:57.022545 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2652 01:45:57.023116 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2653 01:45:57.023560 Setting prompt string to ['brya:']
2654 01:45:57.024002 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2655 01:45:57.026438 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2656 01:45:57.026949
2657 01:45:57.033491 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2658 01:45:57.033961
2659 01:45:57.039864 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2660 01:45:57.040332
2661 01:45:57.043195 configure_storage: Failed to remap 1C:2
2662 01:45:57.043660
2663 01:45:57.046308 Wipe memory regions:
2664 01:45:57.046767
2665 01:45:57.049701 [0x00000000001000, 0x000000000a0000)
2666 01:45:57.050119
2667 01:45:57.052911 [0x00000000100000, 0x00000030000000)
2668 01:45:57.160630
2669 01:45:57.163805 [0x00000032668e60, 0x00000076857000)
2670 01:45:57.315517
2671 01:45:57.318690 [0x00000100000000, 0x0000027fc00000)
2672 01:45:58.169273
2673 01:45:58.172456 ec_init: CrosEC protocol v3 supported (256, 256)
2674 01:45:58.782857
2675 01:45:58.783005 R8152: Initializing
2676 01:45:58.783077
2677 01:45:58.785873 Version 9 (ocp_data = 6010)
2678 01:45:58.785956
2679 01:45:58.789060 R8152: Done initializing
2680 01:45:58.789142
2681 01:45:58.792472 Adding net device
2682 01:45:59.093849
2683 01:45:59.097460 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2684 01:45:59.097548
2685 01:45:59.097613
2686 01:45:59.097673
2687 01:45:59.097955 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2689 01:45:59.198315 brya: tftpboot 192.168.201.1 12705354/tftp-deploy-iny6_ymt/kernel/bzImage 12705354/tftp-deploy-iny6_ymt/kernel/cmdline 12705354/tftp-deploy-iny6_ymt/ramdisk/ramdisk.cpio.gz
2690 01:45:59.198652 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2691 01:45:59.198737 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2692 01:45:59.202606 tftpboot 192.168.201.1 12705354/tftp-deploy-iny6_ymt/kernel/bzIploy-iny6_ymt/kernel/cmdline 12705354/tftp-deploy-iny6_ymt/ramdisk/ramdisk.cpio.gz
2693 01:45:59.202694
2694 01:45:59.202761 Waiting for link
2695 01:45:59.405604
2696 01:45:59.405763 done.
2697 01:45:59.405865
2698 01:45:59.405958 MAC: 00:e0:4c:68:05:70
2699 01:45:59.406051
2700 01:45:59.408794 Sending DHCP discover... done.
2701 01:45:59.408895
2702 01:45:59.411848 Waiting for reply... done.
2703 01:45:59.411950
2704 01:45:59.416208 Sending DHCP request... done.
2705 01:45:59.416314
2706 01:45:59.418559 Waiting for reply... done.
2707 01:45:59.421841
2708 01:45:59.421924 My ip is 192.168.201.16
2709 01:45:59.421990
2710 01:45:59.425414 The DHCP server ip is 192.168.201.1
2711 01:45:59.425498
2712 01:45:59.431668 TFTP server IP predefined by user: 192.168.201.1
2713 01:45:59.431752
2714 01:45:59.438622 Bootfile predefined by user: 12705354/tftp-deploy-iny6_ymt/kernel/bzImage
2715 01:45:59.438706
2716 01:45:59.442128 Sending tftp read request... done.
2717 01:45:59.442210
2718 01:45:59.445332 Waiting for the transfer...
2719 01:45:59.445415
2720 01:45:59.709655 00000000 ################################################################
2721 01:45:59.709815
2722 01:45:59.959033 00080000 ################################################################
2723 01:45:59.959171
2724 01:46:00.226824 00100000 ################################################################
2725 01:46:00.226961
2726 01:46:00.498642 00180000 ################################################################
2727 01:46:00.498778
2728 01:46:00.754127 00200000 ################################################################
2729 01:46:00.754269
2730 01:46:01.011649 00280000 ################################################################
2731 01:46:01.011778
2732 01:46:01.267127 00300000 ################################################################
2733 01:46:01.267264
2734 01:46:01.521412 00380000 ################################################################
2735 01:46:01.521544
2736 01:46:01.770538 00400000 ################################################################
2737 01:46:01.770673
2738 01:46:02.028564 00480000 ################################################################
2739 01:46:02.028700
2740 01:46:02.291090 00500000 ################################################################
2741 01:46:02.291221
2742 01:46:02.560915 00580000 ################################################################
2743 01:46:02.561069
2744 01:46:02.818566 00600000 ################################################################
2745 01:46:02.818695
2746 01:46:03.067054 00680000 ################################################################
2747 01:46:03.067214
2748 01:46:03.328784 00700000 ################################################################
2749 01:46:03.328920
2750 01:46:03.605844 00780000 ################################################################
2751 01:46:03.605982
2752 01:46:03.867258 00800000 ################################################################
2753 01:46:03.867386
2754 01:46:04.122144 00880000 ################################################################
2755 01:46:04.122320
2756 01:46:04.389057 00900000 ################################################################
2757 01:46:04.389218
2758 01:46:04.642412 00980000 ################################################################
2759 01:46:04.642554
2760 01:46:04.895377 00a00000 ################################################################
2761 01:46:04.895546
2762 01:46:05.144861 00a80000 ################################################################
2763 01:46:05.145029
2764 01:46:05.396940 00b00000 ################################################################
2765 01:46:05.397072
2766 01:46:05.687494 00b80000 ################################################################
2767 01:46:05.688125
2768 01:46:06.069821 00c00000 ################################################################
2769 01:46:06.070321
2770 01:46:06.466074 00c80000 ################################################################
2771 01:46:06.466649
2772 01:46:06.842118 00d00000 ############################################################### done.
2773 01:46:06.842268
2774 01:46:06.845295 The bootfile was 14142176 bytes long.
2775 01:46:06.845378
2776 01:46:06.848612 Sending tftp read request... done.
2777 01:46:06.848697
2778 01:46:06.851963 Waiting for the transfer...
2779 01:46:06.852044
2780 01:46:07.154149 00000000 ################################################################
2781 01:46:07.154297
2782 01:46:07.452057 00080000 ################################################################
2783 01:46:07.452210
2784 01:46:07.751287 00100000 ################################################################
2785 01:46:07.751423
2786 01:46:08.050292 00180000 ################################################################
2787 01:46:08.050427
2788 01:46:08.349441 00200000 ################################################################
2789 01:46:08.349572
2790 01:46:08.634181 00280000 ################################################################
2791 01:46:08.634325
2792 01:46:08.900860 00300000 ################################################################
2793 01:46:08.901044
2794 01:46:09.137517 00380000 ################################################################
2795 01:46:09.137730
2796 01:46:09.397469 00400000 ################################################################
2797 01:46:09.397619
2798 01:46:09.664324 00480000 ################################################################
2799 01:46:09.664460
2800 01:46:09.934586 00500000 ################################################################
2801 01:46:09.934736
2802 01:46:10.162796 00580000 ####################################################### done.
2803 01:46:10.162937
2804 01:46:10.166271 Sending tftp read request... done.
2805 01:46:10.166355
2806 01:46:10.169627 Waiting for the transfer...
2807 01:46:10.169710
2808 01:46:10.169775 00000000 # done.
2809 01:46:10.169837
2810 01:46:10.179448 Command line loaded dynamically from TFTP file: 12705354/tftp-deploy-iny6_ymt/kernel/cmdline
2811 01:46:10.179562
2812 01:46:10.202918 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12705354/extract-nfsrootfs-wqfh2azn,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2813 01:46:10.209479
2814 01:46:10.212888 Shutting down all USB controllers.
2815 01:46:10.212976
2816 01:46:10.213046 Removing current net device
2817 01:46:10.213107
2818 01:46:10.215991 Finalizing coreboot
2819 01:46:10.216074
2820 01:46:10.222933 Exiting depthcharge with code 4 at timestamp: 23449162
2821 01:46:10.223016
2822 01:46:10.223080
2823 01:46:10.223141 Starting kernel ...
2824 01:46:10.223199
2825 01:46:10.223255
2826 01:46:10.223635 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2827 01:46:10.223728 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2828 01:46:10.223803 Setting prompt string to ['Linux version [0-9]']
2829 01:46:10.223870 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2830 01:46:10.223937 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2832 01:50:38.224659 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2834 01:50:38.225812 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2836 01:50:38.226673 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2839 01:50:38.228056 end: 2 depthcharge-action (duration 00:05:00) [common]
2841 01:50:38.229263 Cleaning after the job
2842 01:50:38.229754 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/ramdisk
2843 01:50:38.230710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/kernel
2844 01:50:38.232864 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/nfsrootfs
2845 01:50:38.309921 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12705354/tftp-deploy-iny6_ymt/modules
2846 01:50:38.310647 start: 5.1 power-off (timeout 00:00:30) [common]
2847 01:50:38.310814 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2848 01:50:38.388665 >> Command sent successfully.
2849 01:50:38.394722 Returned 0 in 0 seconds
2850 01:50:38.495805 end: 5.1 power-off (duration 00:00:00) [common]
2852 01:50:38.497411 start: 5.2 read-feedback (timeout 00:10:00) [common]
2853 01:50:38.498709 Listened to connection for namespace 'common' for up to 1s
2855 01:50:38.500079 Listened to connection for namespace 'common' for up to 1s
2856 01:50:39.499404 Finalising connection for namespace 'common'
2857 01:50:39.500142 Disconnecting from shell: Finalise
2858 01:50:39.500546
2859 01:50:39.601704 end: 5.2 read-feedback (duration 00:00:01) [common]
2860 01:50:39.602339 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12705354
2861 01:50:39.961660 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12705354
2862 01:50:39.961855 JobError: Your job cannot terminate cleanly.