Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 13:06:41.713028 lava-dispatcher, installed at version: 2024.03
2 13:06:41.713241 start: 0 validate
3 13:06:41.713352 Start time: 2024-06-06 13:06:41.713346+00:00 (UTC)
4 13:06:41.713483 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:06:41.713621 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 13:06:41.716443 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:06:41.716581 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.218-cip49-rt20%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:06:41.973597 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:06:41.974424 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.218-cip49-rt20%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 13:06:42.250864 validate duration: 0.54
12 13:06:42.252131 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:06:42.252678 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:06:42.253142 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:06:42.253975 Not decompressing ramdisk as can be used compressed.
16 13:06:42.254477 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 13:06:42.254956 saving as /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/ramdisk/rootfs.cpio.gz
18 13:06:42.255356 total size: 8417901 (8 MB)
19 13:06:42.260301 progress 0 % (0 MB)
20 13:06:42.273434 progress 5 % (0 MB)
21 13:06:42.281546 progress 10 % (0 MB)
22 13:06:42.287240 progress 15 % (1 MB)
23 13:06:42.291782 progress 20 % (1 MB)
24 13:06:42.295769 progress 25 % (2 MB)
25 13:06:42.299308 progress 30 % (2 MB)
26 13:06:42.302194 progress 35 % (2 MB)
27 13:06:42.305165 progress 40 % (3 MB)
28 13:06:42.307924 progress 45 % (3 MB)
29 13:06:42.310537 progress 50 % (4 MB)
30 13:06:42.313025 progress 55 % (4 MB)
31 13:06:42.315419 progress 60 % (4 MB)
32 13:06:42.317479 progress 65 % (5 MB)
33 13:06:42.319712 progress 70 % (5 MB)
34 13:06:42.321806 progress 75 % (6 MB)
35 13:06:42.324008 progress 80 % (6 MB)
36 13:06:42.326147 progress 85 % (6 MB)
37 13:06:42.328281 progress 90 % (7 MB)
38 13:06:42.330405 progress 95 % (7 MB)
39 13:06:42.332407 progress 100 % (8 MB)
40 13:06:42.332638 8 MB downloaded in 0.08 s (103.87 MB/s)
41 13:06:42.332786 end: 1.1.1 http-download (duration 00:00:00) [common]
43 13:06:42.333001 end: 1.1 download-retry (duration 00:00:00) [common]
44 13:06:42.333084 start: 1.2 download-retry (timeout 00:10:00) [common]
45 13:06:42.333178 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 13:06:42.333314 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.218-cip49-rt20/x86_64/defconfig+x86-board/gcc-10/kernel/bzImage
47 13:06:42.333376 saving as /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/kernel/bzImage
48 13:06:42.333430 total size: 19692544 (18 MB)
49 13:06:42.333485 No compression specified
50 13:06:42.334476 progress 0 % (0 MB)
51 13:06:42.339447 progress 5 % (0 MB)
52 13:06:42.344383 progress 10 % (1 MB)
53 13:06:42.349366 progress 15 % (2 MB)
54 13:06:42.354307 progress 20 % (3 MB)
55 13:06:42.359265 progress 25 % (4 MB)
56 13:06:42.364233 progress 30 % (5 MB)
57 13:06:42.369174 progress 35 % (6 MB)
58 13:06:42.374114 progress 40 % (7 MB)
59 13:06:42.379040 progress 45 % (8 MB)
60 13:06:42.384074 progress 50 % (9 MB)
61 13:06:42.389028 progress 55 % (10 MB)
62 13:06:42.394018 progress 60 % (11 MB)
63 13:06:42.399035 progress 65 % (12 MB)
64 13:06:42.404015 progress 70 % (13 MB)
65 13:06:42.409121 progress 75 % (14 MB)
66 13:06:42.414182 progress 80 % (15 MB)
67 13:06:42.419083 progress 85 % (15 MB)
68 13:06:42.423923 progress 90 % (16 MB)
69 13:06:42.428829 progress 95 % (17 MB)
70 13:06:42.433882 progress 100 % (18 MB)
71 13:06:42.434122 18 MB downloaded in 0.10 s (186.52 MB/s)
72 13:06:42.434265 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:06:42.434475 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:06:42.434557 start: 1.3 download-retry (timeout 00:10:00) [common]
76 13:06:42.434677 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 13:06:42.434805 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.218-cip49-rt20/x86_64/defconfig+x86-board/gcc-10/modules.tar.xz
78 13:06:42.434865 saving as /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/modules/modules.tar
79 13:06:42.434919 total size: 1623680 (1 MB)
80 13:06:42.434975 Using unxz to decompress xz
81 13:06:42.436362 progress 2 % (0 MB)
82 13:06:42.438330 progress 8 % (0 MB)
83 13:06:42.444035 progress 14 % (0 MB)
84 13:06:42.449723 progress 20 % (0 MB)
85 13:06:42.455644 progress 26 % (0 MB)
86 13:06:42.461111 progress 32 % (0 MB)
87 13:06:42.467396 progress 38 % (0 MB)
88 13:06:42.473289 progress 44 % (0 MB)
89 13:06:42.478938 progress 50 % (0 MB)
90 13:06:42.483786 progress 56 % (0 MB)
91 13:06:42.489617 progress 62 % (0 MB)
92 13:06:42.495847 progress 68 % (1 MB)
93 13:06:42.501420 progress 74 % (1 MB)
94 13:06:42.506351 progress 80 % (1 MB)
95 13:06:42.512820 progress 86 % (1 MB)
96 13:06:42.518457 progress 92 % (1 MB)
97 13:06:42.524451 progress 98 % (1 MB)
98 13:06:42.532326 1 MB downloaded in 0.10 s (15.90 MB/s)
99 13:06:42.532496 end: 1.3.1 http-download (duration 00:00:00) [common]
101 13:06:42.532712 end: 1.3 download-retry (duration 00:00:00) [common]
102 13:06:42.532792 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
103 13:06:42.532872 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
104 13:06:42.532944 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
105 13:06:42.533017 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
106 13:06:42.533183 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh
107 13:06:42.533299 makedir: /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin
108 13:06:42.533402 makedir: /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/tests
109 13:06:42.533492 makedir: /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/results
110 13:06:42.533577 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-add-keys
111 13:06:42.533731 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-add-sources
112 13:06:42.533850 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-background-process-start
113 13:06:42.533966 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-background-process-stop
114 13:06:42.534089 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-common-functions
115 13:06:42.534204 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-echo-ipv4
116 13:06:42.534318 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-install-packages
117 13:06:42.534429 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-installed-packages
118 13:06:42.534540 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-os-build
119 13:06:42.534660 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-probe-channel
120 13:06:42.534772 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-probe-ip
121 13:06:42.534885 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-target-ip
122 13:06:42.535017 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-target-mac
123 13:06:42.535162 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-target-storage
124 13:06:42.535347 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-case
125 13:06:42.535465 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-event
126 13:06:42.535577 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-feedback
127 13:06:42.535691 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-raise
128 13:06:42.535810 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-reference
129 13:06:42.535929 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-runner
130 13:06:42.536046 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-set
131 13:06:42.536160 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-test-shell
132 13:06:42.536273 Updating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-install-packages (oe)
133 13:06:42.536412 Updating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/bin/lava-installed-packages (oe)
134 13:06:42.536524 Creating /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/environment
135 13:06:42.536610 LAVA metadata
136 13:06:42.536676 - LAVA_JOB_ID=14202726
137 13:06:42.536732 - LAVA_DISPATCHER_IP=192.168.201.1
138 13:06:42.536825 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
139 13:06:42.536881 skipped lava-vland-overlay
140 13:06:42.536948 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
141 13:06:42.537020 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
142 13:06:42.537077 skipped lava-multinode-overlay
143 13:06:42.537143 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
144 13:06:42.537214 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
145 13:06:42.537275 Loading test definitions
146 13:06:42.537350 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
147 13:06:42.537409 Using /lava-14202726 at stage 0
148 13:06:42.537713 uuid=14202726_1.4.2.3.1 testdef=None
149 13:06:42.537794 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
150 13:06:42.537871 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
151 13:06:42.538330 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
153 13:06:42.538528 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
154 13:06:42.539148 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
156 13:06:42.539359 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
157 13:06:42.539921 runner path: /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/0/tests/0_dmesg test_uuid 14202726_1.4.2.3.1
158 13:06:42.540089 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
160 13:06:42.540343 Creating lava-test-runner.conf files
161 13:06:42.540400 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14202726/lava-overlay-6itxtbuh/lava-14202726/0 for stage 0
162 13:06:42.540481 - 0_dmesg
163 13:06:42.540590 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
164 13:06:42.540685 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
165 13:06:42.546756 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
166 13:06:42.546857 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
167 13:06:42.546936 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
168 13:06:42.547014 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
169 13:06:42.547091 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
170 13:06:42.784530 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
171 13:06:42.784679 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
172 13:06:42.784759 extracting modules file /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14202726/extract-overlay-ramdisk-ea5rrlao/ramdisk
173 13:06:42.828334 end: 1.4.4 extract-modules (duration 00:00:00) [common]
174 13:06:42.828478 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
175 13:06:42.828562 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14202726/compress-overlay-6068mcjq/overlay-1.4.2.4.tar.gz to ramdisk
176 13:06:42.828623 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14202726/compress-overlay-6068mcjq/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14202726/extract-overlay-ramdisk-ea5rrlao/ramdisk
177 13:06:42.834979 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
178 13:06:42.835081 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
179 13:06:42.835160 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
180 13:06:42.835242 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
181 13:06:42.835312 Building ramdisk /var/lib/lava/dispatcher/tmp/14202726/extract-overlay-ramdisk-ea5rrlao/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14202726/extract-overlay-ramdisk-ea5rrlao/ramdisk
182 13:06:43.005389 >> 67113 blocks
183 13:06:44.126116 rename /var/lib/lava/dispatcher/tmp/14202726/extract-overlay-ramdisk-ea5rrlao/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/ramdisk/ramdisk.cpio.gz
184 13:06:44.126275 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
185 13:06:44.126366 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
186 13:06:44.126446 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
187 13:06:44.126514 No mkimage arch provided, not using FIT.
188 13:06:44.126586 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
189 13:06:44.126666 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
190 13:06:44.126741 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
191 13:06:44.126815 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
192 13:06:44.126872 No LXC device requested
193 13:06:44.126938 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
194 13:06:44.127009 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
195 13:06:44.127077 end: 1.6 deploy-device-env (duration 00:00:00) [common]
196 13:06:44.127132 Checking files for TFTP limit of 4294967296 bytes.
197 13:06:44.127412 end: 1 tftp-deploy (duration 00:00:02) [common]
198 13:06:44.127500 start: 2 depthcharge-action (timeout 00:05:00) [common]
199 13:06:44.127578 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
200 13:06:44.127665 substitutions:
201 13:06:44.127724 - {DTB}: None
202 13:06:44.127779 - {INITRD}: 14202726/tftp-deploy-g6s28jzy/ramdisk/ramdisk.cpio.gz
203 13:06:44.127831 - {KERNEL}: 14202726/tftp-deploy-g6s28jzy/kernel/bzImage
204 13:06:44.127882 - {LAVA_MAC}: None
205 13:06:44.127933 - {PRESEED_CONFIG}: None
206 13:06:44.127982 - {PRESEED_LOCAL}: None
207 13:06:44.128032 - {RAMDISK}: 14202726/tftp-deploy-g6s28jzy/ramdisk/ramdisk.cpio.gz
208 13:06:44.128090 - {ROOT_PART}: None
209 13:06:44.128142 - {ROOT}: None
210 13:06:44.128193 - {SERVER_IP}: 192.168.201.1
211 13:06:44.128241 - {TEE}: None
212 13:06:44.128289 Parsed boot commands:
213 13:06:44.128336 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
214 13:06:44.128470 Parsed boot commands: tftpboot 192.168.201.1 14202726/tftp-deploy-g6s28jzy/kernel/bzImage 14202726/tftp-deploy-g6s28jzy/kernel/cmdline 14202726/tftp-deploy-g6s28jzy/ramdisk/ramdisk.cpio.gz
215 13:06:44.128550 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
216 13:06:44.128623 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
217 13:06:44.128697 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
218 13:06:44.128767 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
219 13:06:44.128822 Not connected, no need to disconnect.
220 13:06:44.128887 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
221 13:06:44.128956 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
222 13:06:44.129015 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-8'
223 13:06:44.132437 Setting prompt string to ['lava-test: # ']
224 13:06:44.132733 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
225 13:06:44.132824 end: 2.2.1 reset-connection (duration 00:00:00) [common]
226 13:06:44.132913 start: 2.2.2 reset-device (timeout 00:05:00) [common]
227 13:06:44.132996 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
228 13:06:44.133159 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-8']
229 13:06:57.636986 Returned 0 in 13 seconds
230 13:06:57.737574 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
232 13:06:57.737866 end: 2.2.2 reset-device (duration 00:00:14) [common]
233 13:06:57.737982 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
234 13:06:57.738105 Setting prompt string to 'Starting depthcharge on Volmar...'
235 13:06:57.738179 Changing prompt to 'Starting depthcharge on Volmar...'
236 13:06:57.738252 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
237 13:06:57.738761 [Enter `^Ec?' for help]
238 13:06:57.738983
239 13:06:57.739120
240 13:06:57.739244 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
241 13:06:57.739311 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
242 13:06:57.739372 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
243 13:06:57.739431 CPU: AES supported, TXT NOT supported, VT supported
244 13:06:57.739492 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
245 13:06:57.739545 Cache size = 10 MiB
246 13:06:57.739595 MCH: device id 4609 (rev 04) is Alderlake-P
247 13:06:57.739651 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
248 13:06:57.739702 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
249 13:06:57.739752 VBOOT: Loading verstage.
250 13:06:57.739800 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 13:06:57.739850 FMAP: base = 0x0 size = 0x2000000 #areas = 37
252 13:06:57.739901 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 13:06:57.739952 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
254 13:06:57.740004 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
255 13:06:57.740056
256 13:06:57.740110
257 13:06:57.740159 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
258 13:06:57.740209 Probing TPM I2C: I2C bus 1 version 0x3230302a
259 13:06:57.740258 DW I2C bus 1 at 0xfe022000 (400 KHz)
260 13:06:57.740307 done! DID_VID 0x00281ae0
261 13:06:57.740355 TPM ready after 0 ms
262 13:06:57.740405 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
263 13:06:57.740454 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
264 13:06:57.740505 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
265 13:06:57.740554 tlcl_send_startup: Startup return code is 0
266 13:06:57.740602 TPM: setup succeeded
267 13:06:57.740651 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 13:06:57.740700 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 13:06:57.740749 Chrome EC: UHEPI supported
270 13:06:57.740797 Reading cr50 boot mode
271 13:06:57.740846 Cr50 says boot_mode is VERIFIED_RW(0x00).
272 13:06:57.740894 Phase 1
273 13:06:57.740943 FMAP: area GBB found @ 1805000 (458752 bytes)
274 13:06:57.740992 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 13:06:57.741041 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 13:06:57.741091 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
277 13:06:57.741140 VB2:vb2_check_recovery() Recovery was requested manually
278 13:06:57.741189 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
279 13:06:57.741239 Recovery requested (1009000e)
280 13:06:57.741287 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
281 13:06:57.741336 tlcl_extend: response is 0
282 13:06:57.741384 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
283 13:06:57.741434 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
284 13:06:57.741483 tlcl_extend: response is 0
285 13:06:57.741531 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
286 13:06:57.741580 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
287 13:06:57.741629 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
288 13:06:57.741679 BS: verstage times (exec / console): total (unknown) / 149 ms
289 13:06:57.741728
290 13:06:57.741776
291 13:06:57.741824 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
292 13:06:57.741874 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
293 13:06:57.741923 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
294 13:06:57.741972 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
295 13:06:57.742024 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
296 13:06:57.742074 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
297 13:06:57.742126 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
298 13:06:57.742175 TCO_STS: 0000 0000
299 13:06:57.742223 GEN_PMCON: d0015038 00002200
300 13:06:57.742271 GBLRST_CAUSE: 00000000 00000000
301 13:06:57.742320 HPR_CAUSE0: 00000000
302 13:06:57.742371 prev_sleep_state 5
303 13:06:57.742423 Abort disabling TXT, as CPU is not TXT capable.
304 13:06:57.742473 cse_lite: Skip switching to RW in the recovery path
305 13:06:57.742526 Boot Count incremented to 5420
306 13:06:57.742575 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 13:06:57.742652 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 13:06:57.742717 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 13:06:57.742765 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
310 13:06:57.742814 Chrome EC: UHEPI supported
311 13:06:57.742863 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 13:06:57.742912 Probing TPM I2C: done! DID_VID 0x00281ae0
313 13:06:57.742960 Locality already claimed
314 13:06:57.743009 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
315 13:06:57.743057 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
316 13:06:57.743106 MRC: Hash idx 0x100b comparison successful.
317 13:06:57.743154 MRC cache found, size f6c8
318 13:06:57.743202 bootmode is set to: 2
319 13:06:57.743250 EC returned error result code 3
320 13:06:57.743298 FW_CONFIG value from CBI is 0x131
321 13:06:57.743346 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
322 13:06:57.743395 SPD index = 0
323 13:06:57.743444 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
324 13:06:57.743493 SPD: module type is LPDDR4X
325 13:06:57.743542 SPD: module part number is K4U6E3S4AB-MGCL
326 13:06:57.743590 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
327 13:06:57.743639 SPD: device width 16 bits, bus width 16 bits
328 13:06:57.743888 SPD: module size is 1024 MB (per channel)
329 13:06:57.744006 CBMEM:
330 13:06:57.744117 IMD: root @ 0x76fff000 254 entries.
331 13:06:57.744227 IMD: root @ 0x76ffec00 62 entries.
332 13:06:57.744337 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
333 13:06:57.744447 RO_VPD is uninitialized or empty.
334 13:06:57.744561 FMAP: area RW_VPD found @ f29000 (8192 bytes)
335 13:06:57.744643 External stage cache:
336 13:06:57.744697 IMD: root @ 0x7bbff000 254 entries.
337 13:06:57.744748 IMD: root @ 0x7bbfec00 62 entries.
338 13:06:57.744798 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
339 13:06:57.744849 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 13:06:57.744898 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
341 13:06:57.744948 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 13:06:57.744997 8 DIMMs found
343 13:06:57.745049 SMM Memory Map
344 13:06:57.745098 SMRAM : 0x7b800000 0x800000
345 13:06:57.745147 Subregion 0: 0x7b800000 0x200000
346 13:06:57.745196 Subregion 1: 0x7ba00000 0x200000
347 13:06:57.745245 Subregion 2: 0x7bc00000 0x400000
348 13:06:57.745295 top_of_ram = 0x77000000
349 13:06:57.745344 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
350 13:06:57.745392 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
351 13:06:57.745441 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
352 13:06:57.745491 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 13:06:57.745539 Normal boot
354 13:06:57.745588 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
355 13:06:57.745638 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
356 13:06:57.745687 Processing 237 relocs. Offset value of 0x74aba000
357 13:06:57.745737 BS: romstage times (exec / console): total (unknown) / 280 ms
358 13:06:57.745786
359 13:06:57.745833
360 13:06:57.745881 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
361 13:06:57.745930 Normal boot
362 13:06:57.745978 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
363 13:06:57.746027 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
364 13:06:57.746076 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
365 13:06:57.746125 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
366 13:06:57.746174 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
367 13:06:57.746226 Processing 5931 relocs. Offset value of 0x72a30000
368 13:06:57.746275 BS: postcar times (exec / console): total (unknown) / 51 ms
369 13:06:57.746323
370 13:06:57.746371
371 13:06:57.746419 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
372 13:06:57.746468 Reserving BERT start 76a1f000, size 10000
373 13:06:57.746517 Normal boot
374 13:06:57.746566 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 13:06:57.746654 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
376 13:06:57.746706 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
377 13:06:57.746755 FMAP: area RW_VPD found @ f29000 (8192 bytes)
378 13:06:57.746804 Google Chrome EC: version:
379 13:06:57.746852 ro: volmar_v2.0.14126-e605144e9c
380 13:06:57.746901 rw: volmar_v0.0.55-22d1557
381 13:06:57.746950 running image: 1
382 13:06:57.746998 ACPI _SWS is PM1 Index 8 GPE Index -1
383 13:06:57.747047 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
384 13:06:57.747096 EC returned error result code 3
385 13:06:57.747145 FW_CONFIG value from CBI is 0x131
386 13:06:57.747193 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
387 13:06:57.747242 PCI: 00:1c.2 disabled by fw_config
388 13:06:57.747290 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
389 13:06:57.747339 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
390 13:06:57.747388 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
391 13:06:57.747437 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
392 13:06:57.747485 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 13:06:57.747534 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
394 13:06:57.747582 microcode: sig=0x906a4 pf=0x80 revision=0x423
395 13:06:57.747630 microcode: Update skipped, already up-to-date
396 13:06:57.747708 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
397 13:06:57.747755 Detected 6 core, 8 thread CPU.
398 13:06:57.747804 Setting up SMI for CPU
399 13:06:57.747852 IED base = 0x7bc00000
400 13:06:57.747899 IED size = 0x00400000
401 13:06:57.747948 Will perform SMM setup.
402 13:06:57.747996 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
403 13:06:57.748044 LAPIC 0x0 in XAPIC mode.
404 13:06:57.748093 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
405 13:06:57.748142 Processing 18 relocs. Offset value of 0x00030000
406 13:06:57.748191 Attempting to start 7 APs
407 13:06:57.748239 Waiting for 10ms after sending INIT.
408 13:06:57.748288 Waiting for SIPI to complete...
409 13:06:57.748337 LAPIC 0x1 in XAPIC mode.
410 13:06:57.748385 LAPIC 0x10 in XAPIC mode.
411 13:06:57.748433 done.
412 13:06:57.748481 LAPIC 0x14 in XAPIC mode.
413 13:06:57.748530 LAPIC 0x12 in XAPIC mode.
414 13:06:57.748577 AP: slot 1 apic_id 14, MCU rev: 0x00000423
415 13:06:57.748625 LAPIC 0x9 in XAPIC mode.
416 13:06:57.748674 AP: slot 4 apic_id 12, MCU rev: 0x00000423
417 13:06:57.748722 AP: slot 3 apic_id 10, MCU rev: 0x00000423
418 13:06:57.748771 LAPIC 0x16 in XAPIC mode.
419 13:06:57.748820 AP: slot 5 apic_id 9, MCU rev: 0x00000423
420 13:06:57.748868 AP: slot 2 apic_id 16, MCU rev: 0x00000423
421 13:06:57.748917 LAPIC 0x8 in XAPIC mode.
422 13:06:57.748965 AP: slot 6 apic_id 1, MCU rev: 0x00000423
423 13:06:57.749014 Waiting for SIPI to complete...
424 13:06:57.749063 done.
425 13:06:57.749111 AP: slot 7 apic_id 8, MCU rev: 0x00000423
426 13:06:57.749347 smm_setup_relocation_handler: enter
427 13:06:57.749462 smm_setup_relocation_handler: exit
428 13:06:57.749572 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
429 13:06:57.749713 Processing 11 relocs. Offset value of 0x00038000
430 13:06:57.749822 smm_module_setup_stub: stack_top = 0x7b804000
431 13:06:57.749932 smm_module_setup_stub: per cpu stack_size = 0x800
432 13:06:57.750043 smm_module_setup_stub: runtime.start32_offset = 0x4c
433 13:06:57.750102 smm_module_setup_stub: runtime.smm_size = 0x10000
434 13:06:57.750151 SMM Module: stub loaded at 38000. Will call 0x76a53094
435 13:06:57.750200 Installing permanent SMM handler to 0x7b800000
436 13:06:57.750249 smm_load_module: total_smm_space_needed e468, available -> 200000
437 13:06:57.750300 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
438 13:06:57.750349 Processing 255 relocs. Offset value of 0x7b9f6000
439 13:06:57.750398 smm_load_module: smram_start: 0x7b800000
440 13:06:57.750446 smm_load_module: smram_end: 7ba00000
441 13:06:57.750494 smm_load_module: handler start 0x7b9f6d5f
442 13:06:57.750543 smm_load_module: handler_size 98d0
443 13:06:57.750590 smm_load_module: fxsave_area 0x7b9ff000
444 13:06:57.750664 smm_load_module: fxsave_size 1000
445 13:06:57.750727 smm_load_module: CONFIG_MSEG_SIZE 0x0
446 13:06:57.750776 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
447 13:06:57.750824 smm_load_module: handler_mod_params.smbase = 0x7b800000
448 13:06:57.750873 smm_load_module: per_cpu_save_state_size = 0x400
449 13:06:57.750921 smm_load_module: num_cpus = 0x8
450 13:06:57.750969 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
451 13:06:57.751018 smm_load_module: total_save_state_size = 0x2000
452 13:06:57.751066 smm_load_module: cpu0 entry: 7b9e6000
453 13:06:57.751114 smm_create_map: cpus allowed in one segment 30
454 13:06:57.751166 smm_create_map: min # of segments needed 1
455 13:06:57.751215 CPU 0x0
456 13:06:57.751264 smbase 7b9e6000 entry 7b9ee000
457 13:06:57.751313 ss_start 7b9f5c00 code_end 7b9ee208
458 13:06:57.751362 CPU 0x1
459 13:06:57.751495 smbase 7b9e5c00 entry 7b9edc00
460 13:06:57.751563 ss_start 7b9f5800 code_end 7b9ede08
461 13:06:57.751644 CPU 0x2
462 13:06:57.751727 smbase 7b9e5800 entry 7b9ed800
463 13:06:57.751777 ss_start 7b9f5400 code_end 7b9eda08
464 13:06:57.751859 CPU 0x3
465 13:06:57.751909 smbase 7b9e5400 entry 7b9ed400
466 13:06:57.751959 ss_start 7b9f5000 code_end 7b9ed608
467 13:06:57.752023 CPU 0x4
468 13:06:57.752071 smbase 7b9e5000 entry 7b9ed000
469 13:06:57.752120 ss_start 7b9f4c00 code_end 7b9ed208
470 13:06:57.752168 CPU 0x5
471 13:06:57.752233 smbase 7b9e4c00 entry 7b9ecc00
472 13:06:57.752327 ss_start 7b9f4800 code_end 7b9ece08
473 13:06:57.752376 CPU 0x6
474 13:06:57.752424 smbase 7b9e4800 entry 7b9ec800
475 13:06:57.752472 ss_start 7b9f4400 code_end 7b9eca08
476 13:06:57.752521 CPU 0x7
477 13:06:57.752569 smbase 7b9e4400 entry 7b9ec400
478 13:06:57.752617 ss_start 7b9f4000 code_end 7b9ec608
479 13:06:57.752666 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
480 13:06:57.752716 Processing 11 relocs. Offset value of 0x7b9ee000
481 13:06:57.752765 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
482 13:06:57.752814 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
483 13:06:57.752863 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
484 13:06:57.752912 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
485 13:06:57.752960 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
486 13:06:57.753009 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
487 13:06:57.753058 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
488 13:06:57.753106 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
489 13:06:57.753155 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
490 13:06:57.753204 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
491 13:06:57.753252 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
492 13:06:57.753301 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
493 13:06:57.753350 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
494 13:06:57.753398 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
495 13:06:57.753463 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
496 13:06:57.753526 smm_module_setup_stub: stack_top = 0x7b804000
497 13:06:57.753604 smm_module_setup_stub: per cpu stack_size = 0x800
498 13:06:57.753653 smm_module_setup_stub: runtime.start32_offset = 0x4c
499 13:06:57.753701 smm_module_setup_stub: runtime.smm_size = 0x200000
500 13:06:57.753750 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
501 13:06:57.753799 Clearing SMI status registers
502 13:06:57.753848 SMI_STS: PM1
503 13:06:57.753924 PM1_STS: PWRBTN
504 13:06:57.753972 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
505 13:06:57.754021 In relocation handler: CPU 0
506 13:06:57.754070 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
507 13:06:57.754119 Writing SMRR. base = 0x7b800006, mask=0xff800c00
508 13:06:57.754168 Relocation complete.
509 13:06:57.754216 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
510 13:06:57.754265 In relocation handler: CPU 6
511 13:06:57.754316 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
512 13:06:57.754365 Relocation complete.
513 13:06:57.754414 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
514 13:06:57.754463 In relocation handler: CPU 4
515 13:06:57.754727 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
516 13:06:57.754805 Writing SMRR. base = 0x7b800006, mask=0xff800c00
517 13:06:57.754858 Relocation complete.
518 13:06:57.754907 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
519 13:06:57.754957 In relocation handler: CPU 2
520 13:06:57.755006 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
521 13:06:57.755056 Writing SMRR. base = 0x7b800006, mask=0xff800c00
522 13:06:57.755105 Relocation complete.
523 13:06:57.755154 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
524 13:06:57.755203 In relocation handler: CPU 1
525 13:06:57.755251 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
526 13:06:57.755300 Writing SMRR. base = 0x7b800006, mask=0xff800c00
527 13:06:57.755349 Relocation complete.
528 13:06:57.755398 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
529 13:06:57.755447 In relocation handler: CPU 3
530 13:06:57.755496 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
531 13:06:57.755545 Writing SMRR. base = 0x7b800006, mask=0xff800c00
532 13:06:57.755593 Relocation complete.
533 13:06:57.755641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
534 13:06:57.755690 In relocation handler: CPU 7
535 13:06:57.755740 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
536 13:06:57.755790 Writing SMRR. base = 0x7b800006, mask=0xff800c00
537 13:06:57.755839 Relocation complete.
538 13:06:57.755889 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
539 13:06:57.755938 In relocation handler: CPU 5
540 13:06:57.756014 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
541 13:06:57.756063 Relocation complete.
542 13:06:57.756111 Initializing CPU #0
543 13:06:57.756160 CPU: vendor Intel device 906a4
544 13:06:57.756208 CPU: family 06, model 9a, stepping 04
545 13:06:57.756256 Clearing out pending MCEs
546 13:06:57.756305 cpu: energy policy set to 7
547 13:06:57.756353 Turbo is available but hidden
548 13:06:57.756403 Turbo is available and visible
549 13:06:57.756452 microcode: Update skipped, already up-to-date
550 13:06:57.756502 CPU #0 initialized
551 13:06:57.756550 Initializing CPU #6
552 13:06:57.756599 Initializing CPU #2
553 13:06:57.756648 Initializing CPU #3
554 13:06:57.756696 Initializing CPU #1
555 13:06:57.756744 CPU: vendor Intel device 906a4
556 13:06:57.756792 CPU: family 06, model 9a, stepping 04
557 13:06:57.756840 Initializing CPU #4
558 13:06:57.756889 CPU: vendor Intel device 906a4
559 13:06:57.756937 CPU: family 06, model 9a, stepping 04
560 13:06:57.756985 CPU: vendor Intel device 906a4
561 13:06:57.757033 CPU: family 06, model 9a, stepping 04
562 13:06:57.757081 Clearing out pending MCEs
563 13:06:57.757130 CPU: vendor Intel device 906a4
564 13:06:57.757178 CPU: family 06, model 9a, stepping 04
565 13:06:57.757226 Clearing out pending MCEs
566 13:06:57.757274 Initializing CPU #5
567 13:06:57.757322 cpu: energy policy set to 7
568 13:06:57.757371 cpu: energy policy set to 7
569 13:06:57.757418 Clearing out pending MCEs
570 13:06:57.757466 microcode: Update skipped, already up-to-date
571 13:06:57.757515 CPU #1 initialized
572 13:06:57.757579 cpu: energy policy set to 7
573 13:06:57.757671 Clearing out pending MCEs
574 13:06:57.757719 microcode: Update skipped, already up-to-date
575 13:06:57.757804 CPU #2 initialized
576 13:06:57.757924 cpu: energy policy set to 7
577 13:06:57.757973 microcode: Update skipped, already up-to-date
578 13:06:57.758052 CPU #4 initialized
579 13:06:57.758101 microcode: Update skipped, already up-to-date
580 13:06:57.758165 CPU #3 initialized
581 13:06:57.758214 CPU: vendor Intel device 906a4
582 13:06:57.758263 CPU: family 06, model 9a, stepping 04
583 13:06:57.758312 Initializing CPU #7
584 13:06:57.758361 Clearing out pending MCEs
585 13:06:57.758409 CPU: vendor Intel device 906a4
586 13:06:57.758459 CPU: family 06, model 9a, stepping 04
587 13:06:57.758508 cpu: energy policy set to 7
588 13:06:57.758557 Clearing out pending MCEs
589 13:06:57.758618 microcode: Update skipped, already up-to-date
590 13:06:57.758672 CPU #5 initialized
591 13:06:57.758722 cpu: energy policy set to 7
592 13:06:57.758772 CPU: vendor Intel device 906a4
593 13:06:57.758821 CPU: family 06, model 9a, stepping 04
594 13:06:57.758870 microcode: Update skipped, already up-to-date
595 13:06:57.758919 CPU #7 initialized
596 13:06:57.758968 Clearing out pending MCEs
597 13:06:57.759018 cpu: energy policy set to 7
598 13:06:57.759088 microcode: Update skipped, already up-to-date
599 13:06:57.759140 CPU #6 initialized
600 13:06:57.759190 bsp_do_flight_plan done after 692 msecs.
601 13:06:57.759240 CPU: frequency set to 4400 MHz
602 13:06:57.759289 Enabling SMIs.
603 13:06:57.759338 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
604 13:06:57.759431 Probing TPM I2C: done! DID_VID 0x00281ae0
605 13:06:57.759480 Locality already claimed
606 13:06:57.759529 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
607 13:06:57.759578 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
608 13:06:57.759627 Enabling GPIO PM b/c CR50 has long IRQ pulse support
609 13:06:57.759676 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
610 13:06:57.759758 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
611 13:06:57.759807 Found a VBT of 9216 bytes after decompression
612 13:06:57.759856 PCI 1.0, PIN A, using IRQ #16
613 13:06:57.759904 PCI 2.0, PIN A, using IRQ #17
614 13:06:57.759953 PCI 4.0, PIN A, using IRQ #18
615 13:06:57.760032 PCI 5.0, PIN A, using IRQ #16
616 13:06:57.760097 PCI 6.0, PIN A, using IRQ #16
617 13:06:57.760175 PCI 6.2, PIN C, using IRQ #18
618 13:06:57.760236 PCI 7.0, PIN A, using IRQ #19
619 13:06:57.760284 PCI 7.1, PIN B, using IRQ #20
620 13:06:57.760332 PCI 7.2, PIN C, using IRQ #21
621 13:06:57.760407 PCI 7.3, PIN D, using IRQ #22
622 13:06:57.760455 PCI 8.0, PIN A, using IRQ #23
623 13:06:57.760503 PCI D.0, PIN A, using IRQ #17
624 13:06:57.760551 PCI D.1, PIN B, using IRQ #19
625 13:06:57.760600 PCI 10.0, PIN A, using IRQ #24
626 13:06:57.760650 PCI 10.1, PIN B, using IRQ #25
627 13:06:57.760713 PCI 10.6, PIN C, using IRQ #20
628 13:06:57.760775 PCI 10.7, PIN D, using IRQ #21
629 13:06:57.760823 PCI 11.0, PIN A, using IRQ #26
630 13:06:57.760871 PCI 11.1, PIN B, using IRQ #27
631 13:06:57.761110 PCI 11.2, PIN C, using IRQ #28
632 13:06:57.761222 PCI 11.3, PIN D, using IRQ #29
633 13:06:57.761346 PCI 12.0, PIN A, using IRQ #30
634 13:06:57.761469 PCI 12.6, PIN B, using IRQ #31
635 13:06:57.761578 PCI 12.7, PIN C, using IRQ #22
636 13:06:57.761704 PCI 13.0, PIN A, using IRQ #32
637 13:06:57.761814 PCI 13.1, PIN B, using IRQ #33
638 13:06:57.761935 PCI 13.2, PIN C, using IRQ #34
639 13:06:57.762044 PCI 13.3, PIN D, using IRQ #35
640 13:06:57.762180 PCI 14.0, PIN B, using IRQ #23
641 13:06:57.762289 PCI 14.1, PIN A, using IRQ #36
642 13:06:57.762411 PCI 14.3, PIN C, using IRQ #17
643 13:06:57.762521 PCI 15.0, PIN A, using IRQ #37
644 13:06:57.762623 PCI 15.1, PIN B, using IRQ #38
645 13:06:57.762691 PCI 15.2, PIN C, using IRQ #39
646 13:06:57.762740 PCI 15.3, PIN D, using IRQ #40
647 13:06:57.762819 PCI 16.0, PIN A, using IRQ #18
648 13:06:57.762885 PCI 16.1, PIN B, using IRQ #19
649 13:06:57.762980 PCI 16.2, PIN C, using IRQ #20
650 13:06:57.763028 PCI 16.3, PIN D, using IRQ #21
651 13:06:57.763076 PCI 16.4, PIN A, using IRQ #18
652 13:06:57.763141 PCI 16.5, PIN B, using IRQ #19
653 13:06:57.763203 PCI 17.0, PIN A, using IRQ #22
654 13:06:57.763319 PCI 19.0, PIN A, using IRQ #41
655 13:06:57.763431 PCI 19.1, PIN B, using IRQ #42
656 13:06:57.763495 PCI 19.2, PIN C, using IRQ #43
657 13:06:57.763543 PCI 1C.0, PIN A, using IRQ #16
658 13:06:57.763592 PCI 1C.1, PIN B, using IRQ #17
659 13:06:57.763640 PCI 1C.2, PIN C, using IRQ #18
660 13:06:57.763722 PCI 1C.3, PIN D, using IRQ #19
661 13:06:57.763771 PCI 1C.4, PIN A, using IRQ #16
662 13:06:57.763820 PCI 1C.5, PIN B, using IRQ #17
663 13:06:57.763868 PCI 1C.6, PIN C, using IRQ #18
664 13:06:57.763934 PCI 1C.7, PIN D, using IRQ #19
665 13:06:57.763996 PCI 1D.0, PIN A, using IRQ #16
666 13:06:57.764045 PCI 1D.1, PIN B, using IRQ #17
667 13:06:57.764093 PCI 1D.2, PIN C, using IRQ #18
668 13:06:57.764141 PCI 1D.3, PIN D, using IRQ #19
669 13:06:57.764219 PCI 1E.0, PIN A, using IRQ #23
670 13:06:57.764267 PCI 1E.1, PIN B, using IRQ #20
671 13:06:57.764315 PCI 1E.2, PIN C, using IRQ #44
672 13:06:57.764363 PCI 1E.3, PIN D, using IRQ #45
673 13:06:57.764411 PCI 1F.3, PIN B, using IRQ #22
674 13:06:57.764459 PCI 1F.4, PIN C, using IRQ #23
675 13:06:57.764538 PCI 1F.6, PIN D, using IRQ #20
676 13:06:57.764587 PCI 1F.7, PIN A, using IRQ #21
677 13:06:57.764635 IRQ: Using dynamically assigned PCI IO-APIC IRQs
678 13:06:57.764684 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
679 13:06:57.764734 FSPS returned 0
680 13:06:57.764782 Executing Phase 1 of FspMultiPhaseSiInit
681 13:06:57.764859 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
682 13:06:57.764911 port C0 DISC req: usage 1 usb3 1 usb2 1
683 13:06:57.764960 Raw Buffer output 0 00000111
684 13:06:57.765008 Raw Buffer output 1 00000000
685 13:06:57.765055 pmc_send_ipc_cmd succeeded
686 13:06:57.765104 port C1 DISC req: usage 1 usb3 3 usb2 3
687 13:06:57.765166 Raw Buffer output 0 00000331
688 13:06:57.765228 Raw Buffer output 1 00000000
689 13:06:57.765277 pmc_send_ipc_cmd succeeded
690 13:06:57.765326 Detected 6 core, 8 thread CPU.
691 13:06:57.765374 Detected 6 core, 8 thread CPU.
692 13:06:57.765422 Detected 6 core, 8 thread CPU.
693 13:06:57.765484 Detected 6 core, 8 thread CPU.
694 13:06:57.765547 Detected 6 core, 8 thread CPU.
695 13:06:57.765595 Detected 6 core, 8 thread CPU.
696 13:06:57.765657 Detected 6 core, 8 thread CPU.
697 13:06:57.765719 Detected 6 core, 8 thread CPU.
698 13:06:57.765782 Detected 6 core, 8 thread CPU.
699 13:06:57.765845 Detected 6 core, 8 thread CPU.
700 13:06:57.765893 Detected 6 core, 8 thread CPU.
701 13:06:57.765941 Detected 6 core, 8 thread CPU.
702 13:06:57.765988 Detected 6 core, 8 thread CPU.
703 13:06:57.766036 Detected 6 core, 8 thread CPU.
704 13:06:57.766084 Detected 6 core, 8 thread CPU.
705 13:06:57.766133 Detected 6 core, 8 thread CPU.
706 13:06:57.766182 Detected 6 core, 8 thread CPU.
707 13:06:57.766230 Detected 6 core, 8 thread CPU.
708 13:06:57.766279 Detected 6 core, 8 thread CPU.
709 13:06:57.766327 Detected 6 core, 8 thread CPU.
710 13:06:57.766376 Detected 6 core, 8 thread CPU.
711 13:06:57.766424 Detected 6 core, 8 thread CPU.
712 13:06:57.766473 Detected 6 core, 8 thread CPU.
713 13:06:57.766521 Detected 6 core, 8 thread CPU.
714 13:06:57.766569 Detected 6 core, 8 thread CPU.
715 13:06:57.766658 Detected 6 core, 8 thread CPU.
716 13:06:57.766706 Detected 6 core, 8 thread CPU.
717 13:06:57.766755 Detected 6 core, 8 thread CPU.
718 13:06:57.766803 Detected 6 core, 8 thread CPU.
719 13:06:57.766851 Detected 6 core, 8 thread CPU.
720 13:06:57.766927 Detected 6 core, 8 thread CPU.
721 13:06:57.766974 Detected 6 core, 8 thread CPU.
722 13:06:57.767023 Detected 6 core, 8 thread CPU.
723 13:06:57.767071 Detected 6 core, 8 thread CPU.
724 13:06:57.767119 Detected 6 core, 8 thread CPU.
725 13:06:57.767167 Detected 6 core, 8 thread CPU.
726 13:06:57.767214 Detected 6 core, 8 thread CPU.
727 13:06:57.767262 Detected 6 core, 8 thread CPU.
728 13:06:57.767309 Detected 6 core, 8 thread CPU.
729 13:06:57.767357 Detected 6 core, 8 thread CPU.
730 13:06:57.767405 Detected 6 core, 8 thread CPU.
731 13:06:57.767453 Detected 6 core, 8 thread CPU.
732 13:06:57.767500 Display FSP Version Info HOB
733 13:06:57.767549 Reference Code - CPU = c.0.65.70
734 13:06:57.767597 uCode Version = 0.0.4.23
735 13:06:57.767646 TXT ACM version = ff.ff.ff.ffff
736 13:06:57.767695 Reference Code - ME = c.0.65.70
737 13:06:57.767743 MEBx version = 0.0.0.0
738 13:06:57.767790 ME Firmware Version = Consumer SKU
739 13:06:57.767839 Reference Code - PCH = c.0.65.70
740 13:06:57.767886 PCH-CRID Status = Disabled
741 13:06:57.767933 PCH-CRID Original Value = ff.ff.ff.ffff
742 13:06:57.767981 PCH-CRID New Value = ff.ff.ff.ffff
743 13:06:57.768052 OPROM - RST - RAID = ff.ff.ff.ffff
744 13:06:57.768103 PCH Hsio Version = 4.0.0.0
745 13:06:57.768152 Reference Code - SA - System Agent = c.0.65.70
746 13:06:57.768201 Reference Code - MRC = 0.0.3.80
747 13:06:57.768250 SA - PCIe Version = c.0.65.70
748 13:06:57.768299 SA-CRID Status = Disabled
749 13:06:57.768347 SA-CRID Original Value = 0.0.0.4
750 13:06:57.768395 SA-CRID New Value = 0.0.0.4
751 13:06:57.768443 OPROM - VBIOS = ff.ff.ff.ffff
752 13:06:57.768492 IO Manageability Engine FW Version = 24.0.4.0
753 13:06:57.768541 PHY Build Version = 0.0.0.2016
754 13:06:57.768791 Thunderbolt(TM) FW Version = 0.0.0.0
755 13:06:57.768847 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
756 13:06:57.768897 BS: BS_DEV_INIT_CHIPS run times (exec / console): 463 / 507 ms
757 13:06:57.768947 Enumerating buses...
758 13:06:57.768996 Show all devs... Before device enumeration.
759 13:06:57.769045 Root Device: enabled 1
760 13:06:57.769094 CPU_CLUSTER: 0: enabled 1
761 13:06:57.769142 DOMAIN: 0000: enabled 1
762 13:06:57.769190 GPIO: 0: enabled 1
763 13:06:57.769239 PCI: 00:00.0: enabled 1
764 13:06:57.769287 PCI: 00:01.0: enabled 0
765 13:06:57.769335 PCI: 00:01.1: enabled 0
766 13:06:57.769382 PCI: 00:02.0: enabled 1
767 13:06:57.769430 PCI: 00:04.0: enabled 1
768 13:06:57.769478 PCI: 00:05.0: enabled 0
769 13:06:57.769525 PCI: 00:06.0: enabled 1
770 13:06:57.769573 PCI: 00:06.2: enabled 0
771 13:06:57.769621 PCI: 00:07.0: enabled 0
772 13:06:57.769670 PCI: 00:07.1: enabled 0
773 13:06:57.769719 PCI: 00:07.2: enabled 0
774 13:06:57.769767 PCI: 00:07.3: enabled 0
775 13:06:57.769815 PCI: 00:08.0: enabled 0
776 13:06:57.769863 PCI: 00:09.0: enabled 0
777 13:06:57.769910 PCI: 00:0a.0: enabled 1
778 13:06:57.769958 PCI: 00:0d.0: enabled 1
779 13:06:57.770006 PCI: 00:0d.1: enabled 0
780 13:06:57.770054 PCI: 00:0d.2: enabled 0
781 13:06:57.770102 PCI: 00:0d.3: enabled 0
782 13:06:57.770151 PCI: 00:0e.0: enabled 0
783 13:06:57.770199 PCI: 00:10.0: enabled 0
784 13:06:57.770247 PCI: 00:10.1: enabled 0
785 13:06:57.770295 PCI: 00:10.6: enabled 0
786 13:06:57.770342 PCI: 00:10.7: enabled 0
787 13:06:57.770390 PCI: 00:12.0: enabled 0
788 13:06:57.770437 PCI: 00:12.6: enabled 0
789 13:06:57.770485 PCI: 00:12.7: enabled 0
790 13:06:57.770533 PCI: 00:13.0: enabled 0
791 13:06:57.770597 PCI: 00:14.0: enabled 1
792 13:06:57.770668 PCI: 00:14.1: enabled 0
793 13:06:57.770716 PCI: 00:14.2: enabled 1
794 13:06:57.770764 PCI: 00:14.3: enabled 1
795 13:06:57.770812 PCI: 00:15.0: enabled 1
796 13:06:57.770860 PCI: 00:15.1: enabled 1
797 13:06:57.770926 PCI: 00:15.2: enabled 0
798 13:06:57.770980 PCI: 00:15.3: enabled 1
799 13:06:57.771028 PCI: 00:16.0: enabled 1
800 13:06:57.771098 PCI: 00:16.1: enabled 0
801 13:06:57.771149 PCI: 00:16.2: enabled 0
802 13:06:57.771197 PCI: 00:16.3: enabled 0
803 13:06:57.771245 PCI: 00:16.4: enabled 0
804 13:06:57.771296 PCI: 00:16.5: enabled 0
805 13:06:57.771345 PCI: 00:17.0: enabled 1
806 13:06:57.771410 PCI: 00:19.0: enabled 0
807 13:06:57.771464 PCI: 00:19.1: enabled 1
808 13:06:57.771514 PCI: 00:19.2: enabled 0
809 13:06:57.771562 PCI: 00:1a.0: enabled 0
810 13:06:57.771610 PCI: 00:1c.0: enabled 0
811 13:06:57.771658 PCI: 00:1c.1: enabled 0
812 13:06:57.771707 PCI: 00:1c.2: enabled 0
813 13:06:57.771755 PCI: 00:1c.3: enabled 0
814 13:06:57.771802 PCI: 00:1c.4: enabled 0
815 13:06:57.771851 PCI: 00:1c.5: enabled 0
816 13:06:57.771899 PCI: 00:1c.6: enabled 0
817 13:06:57.771948 PCI: 00:1c.7: enabled 0
818 13:06:57.771995 PCI: 00:1d.0: enabled 0
819 13:06:57.772043 PCI: 00:1d.1: enabled 0
820 13:06:57.772090 PCI: 00:1d.2: enabled 0
821 13:06:57.772138 PCI: 00:1d.3: enabled 0
822 13:06:57.772186 PCI: 00:1e.0: enabled 1
823 13:06:57.772234 PCI: 00:1e.1: enabled 0
824 13:06:57.772282 PCI: 00:1e.2: enabled 0
825 13:06:57.772330 PCI: 00:1e.3: enabled 1
826 13:06:57.772378 PCI: 00:1f.0: enabled 1
827 13:06:57.772425 PCI: 00:1f.1: enabled 0
828 13:06:57.772473 PCI: 00:1f.2: enabled 1
829 13:06:57.772520 PCI: 00:1f.3: enabled 1
830 13:06:57.772568 PCI: 00:1f.4: enabled 0
831 13:06:57.772628 PCI: 00:1f.5: enabled 1
832 13:06:57.772682 PCI: 00:1f.6: enabled 0
833 13:06:57.772731 PCI: 00:1f.7: enabled 0
834 13:06:57.772779 GENERIC: 0.0: enabled 1
835 13:06:57.772827 GENERIC: 0.0: enabled 1
836 13:06:57.772875 GENERIC: 1.0: enabled 1
837 13:06:57.772924 GENERIC: 0.0: enabled 1
838 13:06:57.772972 GENERIC: 1.0: enabled 1
839 13:06:57.773020 USB0 port 0: enabled 1
840 13:06:57.773068 USB0 port 0: enabled 1
841 13:06:57.773116 GENERIC: 0.0: enabled 1
842 13:06:57.773164 I2C: 00:1a: enabled 1
843 13:06:57.773213 I2C: 00:31: enabled 1
844 13:06:57.773261 I2C: 00:32: enabled 1
845 13:06:57.773309 I2C: 00:50: enabled 1
846 13:06:57.773358 I2C: 00:10: enabled 1
847 13:06:57.773406 I2C: 00:15: enabled 1
848 13:06:57.773454 I2C: 00:2c: enabled 1
849 13:06:57.773502 GENERIC: 0.0: enabled 1
850 13:06:57.773550 SPI: 00: enabled 1
851 13:06:57.773597 PNP: 0c09.0: enabled 1
852 13:06:57.773645 GENERIC: 0.0: enabled 1
853 13:06:57.773693 USB3 port 0: enabled 1
854 13:06:57.773741 USB3 port 1: enabled 0
855 13:06:57.773789 USB3 port 2: enabled 1
856 13:06:57.773837 USB3 port 3: enabled 0
857 13:06:57.773885 USB2 port 0: enabled 1
858 13:06:57.773934 USB2 port 1: enabled 0
859 13:06:57.773981 USB2 port 2: enabled 1
860 13:06:57.774060 USB2 port 3: enabled 0
861 13:06:57.774108 USB2 port 4: enabled 0
862 13:06:57.774156 USB2 port 5: enabled 1
863 13:06:57.774232 USB2 port 6: enabled 0
864 13:06:57.774339 USB2 port 7: enabled 0
865 13:06:57.774388 USB2 port 8: enabled 1
866 13:06:57.774437 USB2 port 9: enabled 1
867 13:06:57.774487 USB3 port 0: enabled 1
868 13:06:57.774536 USB3 port 1: enabled 0
869 13:06:57.774584 USB3 port 2: enabled 0
870 13:06:57.774659 USB3 port 3: enabled 0
871 13:06:57.774709 GENERIC: 0.0: enabled 1
872 13:06:57.774785 GENERIC: 1.0: enabled 1
873 13:06:57.774833 APIC: 00: enabled 1
874 13:06:57.774881 APIC: 14: enabled 1
875 13:06:57.774929 APIC: 16: enabled 1
876 13:06:57.775054 APIC: 10: enabled 1
877 13:06:57.775151 APIC: 12: enabled 1
878 13:06:57.775199 APIC: 09: enabled 1
879 13:06:57.775276 APIC: 01: enabled 1
880 13:06:57.775323 APIC: 08: enabled 1
881 13:06:57.775371 Compare with tree...
882 13:06:57.775419 Root Device: enabled 1
883 13:06:57.775496 CPU_CLUSTER: 0: enabled 1
884 13:06:57.775569 APIC: 00: enabled 1
885 13:06:57.775634 APIC: 14: enabled 1
886 13:06:57.775685 APIC: 16: enabled 1
887 13:06:57.775734 APIC: 10: enabled 1
888 13:06:57.775783 APIC: 12: enabled 1
889 13:06:57.775832 APIC: 09: enabled 1
890 13:06:57.775881 APIC: 01: enabled 1
891 13:06:57.775930 APIC: 08: enabled 1
892 13:06:57.775979 DOMAIN: 0000: enabled 1
893 13:06:57.776028 GPIO: 0: enabled 1
894 13:06:57.776077 PCI: 00:00.0: enabled 1
895 13:06:57.776127 PCI: 00:01.0: enabled 0
896 13:06:57.776176 PCI: 00:01.1: enabled 0
897 13:06:57.776237 PCI: 00:02.0: enabled 1
898 13:06:57.776286 PCI: 00:04.0: enabled 1
899 13:06:57.776334 GENERIC: 0.0: enabled 1
900 13:06:57.776381 PCI: 00:05.0: enabled 0
901 13:06:57.776443 PCI: 00:06.0: enabled 1
902 13:06:57.776505 PCI: 00:06.2: enabled 0
903 13:06:57.776552 PCI: 00:08.0: enabled 0
904 13:06:57.776600 PCI: 00:09.0: enabled 0
905 13:06:57.776648 PCI: 00:0a.0: enabled 1
906 13:06:57.776724 PCI: 00:0d.0: enabled 1
907 13:06:57.776772 USB0 port 0: enabled 1
908 13:06:57.776821 USB3 port 0: enabled 1
909 13:06:57.776869 USB3 port 1: enabled 0
910 13:06:57.776916 USB3 port 2: enabled 1
911 13:06:57.776990 USB3 port 3: enabled 0
912 13:06:57.777038 PCI: 00:0d.1: enabled 0
913 13:06:57.777086 PCI: 00:0d.2: enabled 0
914 13:06:57.777134 PCI: 00:0d.3: enabled 0
915 13:06:57.777218 PCI: 00:0e.0: enabled 0
916 13:06:57.777479 PCI: 00:10.0: enabled 0
917 13:06:57.777596 PCI: 00:10.1: enabled 0
918 13:06:57.777709 PCI: 00:10.6: enabled 0
919 13:06:57.777832 PCI: 00:10.7: enabled 0
920 13:06:57.777956 PCI: 00:12.0: enabled 0
921 13:06:57.778079 PCI: 00:12.6: enabled 0
922 13:06:57.778187 PCI: 00:12.7: enabled 0
923 13:06:57.778323 PCI: 00:13.0: enabled 0
924 13:06:57.778431 PCI: 00:14.0: enabled 1
925 13:06:57.778556 USB0 port 0: enabled 1
926 13:06:57.778688 USB2 port 0: enabled 1
927 13:06:57.778825 USB2 port 1: enabled 0
928 13:06:57.778934 USB2 port 2: enabled 1
929 13:06:57.779056 USB2 port 3: enabled 0
930 13:06:57.779139 USB2 port 4: enabled 0
931 13:06:57.779189 USB2 port 5: enabled 1
932 13:06:57.779238 USB2 port 6: enabled 0
933 13:06:57.779300 USB2 port 7: enabled 0
934 13:06:57.779363 USB2 port 8: enabled 1
935 13:06:57.779411 USB2 port 9: enabled 1
936 13:06:57.779459 USB3 port 0: enabled 1
937 13:06:57.779506 USB3 port 1: enabled 0
938 13:06:57.779581 USB3 port 2: enabled 0
939 13:06:57.779628 USB3 port 3: enabled 0
940 13:06:57.779676 PCI: 00:14.1: enabled 0
941 13:06:57.779725 PCI: 00:14.2: enabled 1
942 13:06:57.779772 PCI: 00:14.3: enabled 1
943 13:06:57.779835 GENERIC: 0.0: enabled 1
944 13:06:57.779896 PCI: 00:15.0: enabled 1
945 13:06:57.779945 I2C: 00:1a: enabled 1
946 13:06:57.779993 I2C: 00:31: enabled 1
947 13:06:57.780040 I2C: 00:32: enabled 1
948 13:06:57.780104 PCI: 00:15.1: enabled 1
949 13:06:57.780165 I2C: 00:50: enabled 1
950 13:06:57.780214 PCI: 00:15.2: enabled 0
951 13:06:57.780262 PCI: 00:15.3: enabled 1
952 13:06:57.780310 I2C: 00:10: enabled 1
953 13:06:57.780372 PCI: 00:16.0: enabled 1
954 13:06:57.780434 PCI: 00:16.1: enabled 0
955 13:06:57.780482 PCI: 00:16.2: enabled 0
956 13:06:57.780530 PCI: 00:16.3: enabled 0
957 13:06:57.780577 PCI: 00:16.4: enabled 0
958 13:06:57.780639 PCI: 00:16.5: enabled 0
959 13:06:57.780701 PCI: 00:17.0: enabled 1
960 13:06:57.780749 PCI: 00:19.0: enabled 0
961 13:06:57.780805 PCI: 00:19.1: enabled 1
962 13:06:57.780891 I2C: 00:15: enabled 1
963 13:06:57.780940 I2C: 00:2c: enabled 1
964 13:06:57.780989 PCI: 00:19.2: enabled 0
965 13:06:57.781037 PCI: 00:1a.0: enabled 0
966 13:06:57.781085 PCI: 00:1e.0: enabled 1
967 13:06:57.781132 PCI: 00:1e.1: enabled 0
968 13:06:57.781180 PCI: 00:1e.2: enabled 0
969 13:06:57.781228 PCI: 00:1e.3: enabled 1
970 13:06:57.781276 SPI: 00: enabled 1
971 13:06:57.781324 PCI: 00:1f.0: enabled 1
972 13:06:57.781372 PNP: 0c09.0: enabled 1
973 13:06:57.781420 PCI: 00:1f.1: enabled 0
974 13:06:57.781468 PCI: 00:1f.2: enabled 1
975 13:06:57.781517 GENERIC: 0.0: enabled 1
976 13:06:57.781565 GENERIC: 0.0: enabled 1
977 13:06:57.781613 GENERIC: 1.0: enabled 1
978 13:06:57.781661 PCI: 00:1f.3: enabled 1
979 13:06:57.781709 PCI: 00:1f.4: enabled 0
980 13:06:57.781757 PCI: 00:1f.5: enabled 1
981 13:06:57.781805 PCI: 00:1f.6: enabled 0
982 13:06:57.781853 PCI: 00:1f.7: enabled 0
983 13:06:57.781902 Root Device scanning...
984 13:06:57.781950 scan_static_bus for Root Device
985 13:06:57.781998 CPU_CLUSTER: 0 enabled
986 13:06:57.782046 DOMAIN: 0000 enabled
987 13:06:57.782095 DOMAIN: 0000 scanning...
988 13:06:57.782142 PCI: pci_scan_bus for bus 00
989 13:06:57.782189 PCI: 00:00.0 [8086/0000] ops
990 13:06:57.782237 PCI: 00:00.0 [8086/4609] enabled
991 13:06:57.782285 PCI: 00:02.0 [8086/0000] bus ops
992 13:06:57.782334 PCI: 00:02.0 [8086/46b3] enabled
993 13:06:57.782381 PCI: 00:04.0 [8086/0000] bus ops
994 13:06:57.782429 PCI: 00:04.0 [8086/461d] enabled
995 13:06:57.782477 PCI: 00:06.0 [8086/0000] bus ops
996 13:06:57.782525 PCI: 00:06.0 [8086/464d] enabled
997 13:06:57.782573 PCI: 00:08.0 [8086/464f] disabled
998 13:06:57.782657 PCI: 00:0a.0 [8086/467d] enabled
999 13:06:57.782707 PCI: 00:0d.0 [8086/0000] bus ops
1000 13:06:57.782756 PCI: 00:0d.0 [8086/461e] enabled
1001 13:06:57.782805 PCI: 00:14.0 [8086/0000] bus ops
1002 13:06:57.782853 PCI: 00:14.0 [8086/51ed] enabled
1003 13:06:57.782900 PCI: 00:14.2 [8086/51ef] enabled
1004 13:06:57.782947 PCI: 00:14.3 [8086/0000] bus ops
1005 13:06:57.782996 PCI: 00:14.3 [8086/51f0] enabled
1006 13:06:57.783044 PCI: 00:15.0 [8086/0000] bus ops
1007 13:06:57.783092 PCI: 00:15.0 [8086/51e8] enabled
1008 13:06:57.783139 PCI: 00:15.1 [8086/0000] bus ops
1009 13:06:57.783187 PCI: 00:15.1 [8086/51e9] enabled
1010 13:06:57.783235 PCI: 00:15.2 [8086/0000] bus ops
1011 13:06:57.783284 PCI: 00:15.2 [8086/51ea] disabled
1012 13:06:57.783332 PCI: 00:15.3 [8086/0000] bus ops
1013 13:06:57.783381 PCI: 00:15.3 [8086/51eb] enabled
1014 13:06:57.783429 PCI: 00:16.0 [8086/0000] ops
1015 13:06:57.783506 PCI: 00:16.0 [8086/51e0] enabled
1016 13:06:57.783555 PCI: Static device PCI: 00:17.0 not found, disabling it.
1017 13:06:57.783604 PCI: 00:19.0 [8086/0000] bus ops
1018 13:06:57.783652 PCI: 00:19.0 [8086/51c5] disabled
1019 13:06:57.783700 PCI: 00:19.1 [8086/0000] bus ops
1020 13:06:57.783749 PCI: 00:19.1 [8086/51c6] enabled
1021 13:06:57.783798 PCI: 00:1e.0 [8086/0000] ops
1022 13:06:57.783848 PCI: 00:1e.0 [8086/51a8] enabled
1023 13:06:57.783897 PCI: 00:1e.3 [8086/0000] bus ops
1024 13:06:57.783946 PCI: 00:1e.3 [8086/51ab] enabled
1025 13:06:57.783995 PCI: 00:1f.0 [8086/0000] bus ops
1026 13:06:57.784043 PCI: 00:1f.0 [8086/5182] enabled
1027 13:06:57.784091 RTC Init
1028 13:06:57.784139 Set power on after power failure.
1029 13:06:57.784188 Disabling Deep S3
1030 13:06:57.784237 Disabling Deep S3
1031 13:06:57.784285 Disabling Deep S4
1032 13:06:57.784333 Disabling Deep S4
1033 13:06:57.784381 Disabling Deep S5
1034 13:06:57.784429 Disabling Deep S5
1035 13:06:57.784477 PCI: 00:1f.2 [0000/0000] hidden
1036 13:06:57.784525 PCI: 00:1f.3 [8086/0000] bus ops
1037 13:06:57.784574 PCI: 00:1f.3 [8086/51c8] enabled
1038 13:06:57.784621 PCI: 00:1f.5 [8086/0000] bus ops
1039 13:06:57.784670 PCI: 00:1f.5 [8086/51a4] enabled
1040 13:06:57.784719 GPIO: 0 enabled
1041 13:06:57.784787 PCI: Leftover static devices:
1042 13:06:57.784838 PCI: 00:01.0
1043 13:06:57.784888 PCI: 00:01.1
1044 13:06:57.784936 PCI: 00:05.0
1045 13:06:57.784984 PCI: 00:06.2
1046 13:06:57.785032 PCI: 00:09.0
1047 13:06:57.785080 PCI: 00:0d.1
1048 13:06:57.785128 PCI: 00:0d.2
1049 13:06:57.785176 PCI: 00:0d.3
1050 13:06:57.785223 PCI: 00:0e.0
1051 13:06:57.785271 PCI: 00:10.0
1052 13:06:57.785318 PCI: 00:10.1
1053 13:06:57.785367 PCI: 00:10.6
1054 13:06:57.785415 PCI: 00:10.7
1055 13:06:57.785463 PCI: 00:12.0
1056 13:06:57.785511 PCI: 00:12.6
1057 13:06:57.785558 PCI: 00:12.7
1058 13:06:57.785605 PCI: 00:13.0
1059 13:06:57.785653 PCI: 00:14.1
1060 13:06:57.785701 PCI: 00:16.1
1061 13:06:57.785749 PCI: 00:16.2
1062 13:06:57.785797 PCI: 00:16.3
1063 13:06:57.785845 PCI: 00:16.4
1064 13:06:57.785893 PCI: 00:16.5
1065 13:06:57.785970 PCI: 00:17.0
1066 13:06:57.786070 PCI: 00:19.2
1067 13:06:57.786154 PCI: 00:1a.0
1068 13:06:57.786238 PCI: 00:1e.1
1069 13:06:57.786287 PCI: 00:1e.2
1070 13:06:57.786335 PCI: 00:1f.1
1071 13:06:57.786384 PCI: 00:1f.4
1072 13:06:57.786433 PCI: 00:1f.6
1073 13:06:57.786649 PCI: 00:1f.7
1074 13:06:57.786818 PCI: Check your devicetree.cb.
1075 13:06:57.786984 PCI: 00:02.0 scanning...
1076 13:06:57.787123 scan_generic_bus for PCI: 00:02.0
1077 13:06:57.787261 scan_generic_bus for PCI: 00:02.0 done
1078 13:06:57.787402 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1079 13:06:57.787540 PCI: 00:04.0 scanning...
1080 13:06:57.787608 scan_generic_bus for PCI: 00:04.0
1081 13:06:57.787675 GENERIC: 0.0 enabled
1082 13:06:57.787754 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1083 13:06:57.787805 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1084 13:06:57.787855 PCI: 00:06.0 scanning...
1085 13:06:57.787904 do_pci_scan_bridge for PCI: 00:06.0
1086 13:06:57.787955 PCI: pci_scan_bus for bus 01
1087 13:06:57.788005 PCI: 01:00.0 [15b7/5009] enabled
1088 13:06:57.788081 Enabling Common Clock Configuration
1089 13:06:57.788143 L1 Sub-State supported from root port 6
1090 13:06:57.788192 L1 Sub-State Support = 0x5
1091 13:06:57.788272 CommonModeRestoreTime = 0x6e
1092 13:06:57.788321 Power On Value = 0x5, Power On Scale = 0x2
1093 13:06:57.788370 ASPM: Enabled L1
1094 13:06:57.788420 PCIe: Max_Payload_Size adjusted to 256
1095 13:06:57.788470 PCI: 01:00.0: Enabled LTR
1096 13:06:57.788518 PCI: 01:00.0: Programmed LTR max latencies
1097 13:06:57.788603 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1098 13:06:57.788706 PCI: 00:0d.0 scanning...
1099 13:06:57.788768 scan_static_bus for PCI: 00:0d.0
1100 13:06:57.788816 USB0 port 0 enabled
1101 13:06:57.788865 USB0 port 0 scanning...
1102 13:06:57.788914 scan_static_bus for USB0 port 0
1103 13:06:57.788962 USB3 port 0 enabled
1104 13:06:57.789011 USB3 port 1 disabled
1105 13:06:57.789059 USB3 port 2 enabled
1106 13:06:57.789108 USB3 port 3 disabled
1107 13:06:57.789156 USB3 port 0 scanning...
1108 13:06:57.789204 scan_static_bus for USB3 port 0
1109 13:06:57.789253 scan_static_bus for USB3 port 0 done
1110 13:06:57.789302 scan_bus: bus USB3 port 0 finished in 6 msecs
1111 13:06:57.789352 USB3 port 2 scanning...
1112 13:06:57.789401 scan_static_bus for USB3 port 2
1113 13:06:57.789449 scan_static_bus for USB3 port 2 done
1114 13:06:57.789513 scan_bus: bus USB3 port 2 finished in 6 msecs
1115 13:06:57.789592 scan_static_bus for USB0 port 0 done
1116 13:06:57.789671 scan_bus: bus USB0 port 0 finished in 43 msecs
1117 13:06:57.789724 scan_static_bus for PCI: 00:0d.0 done
1118 13:06:57.789773 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1119 13:06:57.789852 PCI: 00:14.0 scanning...
1120 13:06:57.789900 scan_static_bus for PCI: 00:14.0
1121 13:06:57.789949 USB0 port 0 enabled
1122 13:06:57.789997 USB0 port 0 scanning...
1123 13:06:57.790046 scan_static_bus for USB0 port 0
1124 13:06:57.790095 USB2 port 0 enabled
1125 13:06:57.790143 USB2 port 1 disabled
1126 13:06:57.790192 USB2 port 2 enabled
1127 13:06:57.790240 USB2 port 3 disabled
1128 13:06:57.790288 USB2 port 4 disabled
1129 13:06:57.790335 USB2 port 5 enabled
1130 13:06:57.790384 USB2 port 6 disabled
1131 13:06:57.790432 USB2 port 7 disabled
1132 13:06:57.790481 USB2 port 8 enabled
1133 13:06:57.790529 USB2 port 9 enabled
1134 13:06:57.790577 USB3 port 0 enabled
1135 13:06:57.790678 USB3 port 1 disabled
1136 13:06:57.790727 USB3 port 2 disabled
1137 13:06:57.790775 USB3 port 3 disabled
1138 13:06:57.790823 USB2 port 0 scanning...
1139 13:06:57.790871 scan_static_bus for USB2 port 0
1140 13:06:57.790920 scan_static_bus for USB2 port 0 done
1141 13:06:57.790969 scan_bus: bus USB2 port 0 finished in 6 msecs
1142 13:06:57.791018 USB2 port 2 scanning...
1143 13:06:57.791066 scan_static_bus for USB2 port 2
1144 13:06:57.791115 scan_static_bus for USB2 port 2 done
1145 13:06:57.791164 scan_bus: bus USB2 port 2 finished in 6 msecs
1146 13:06:57.791213 USB2 port 5 scanning...
1147 13:06:57.791261 scan_static_bus for USB2 port 5
1148 13:06:57.791309 scan_static_bus for USB2 port 5 done
1149 13:06:57.791357 scan_bus: bus USB2 port 5 finished in 6 msecs
1150 13:06:57.791406 USB2 port 8 scanning...
1151 13:06:57.791455 scan_static_bus for USB2 port 8
1152 13:06:57.791504 scan_static_bus for USB2 port 8 done
1153 13:06:57.791552 scan_bus: bus USB2 port 8 finished in 6 msecs
1154 13:06:57.791601 USB2 port 9 scanning...
1155 13:06:57.791649 scan_static_bus for USB2 port 9
1156 13:06:57.791697 scan_static_bus for USB2 port 9 done
1157 13:06:57.791746 scan_bus: bus USB2 port 9 finished in 6 msecs
1158 13:06:57.791794 USB3 port 0 scanning...
1159 13:06:57.791842 scan_static_bus for USB3 port 0
1160 13:06:57.791891 scan_static_bus for USB3 port 0 done
1161 13:06:57.791939 scan_bus: bus USB3 port 0 finished in 6 msecs
1162 13:06:57.791988 scan_static_bus for USB0 port 0 done
1163 13:06:57.792036 scan_bus: bus USB0 port 0 finished in 120 msecs
1164 13:06:57.792085 scan_static_bus for PCI: 00:14.0 done
1165 13:06:57.792134 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1166 13:06:57.792183 PCI: 00:14.3 scanning...
1167 13:06:57.792230 scan_static_bus for PCI: 00:14.3
1168 13:06:57.792279 GENERIC: 0.0 enabled
1169 13:06:57.792327 scan_static_bus for PCI: 00:14.3 done
1170 13:06:57.792376 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1171 13:06:57.792424 PCI: 00:15.0 scanning...
1172 13:06:57.792472 scan_static_bus for PCI: 00:15.0
1173 13:06:57.792521 I2C: 00:1a enabled
1174 13:06:57.792569 I2C: 00:31 enabled
1175 13:06:57.792617 I2C: 00:32 enabled
1176 13:06:57.792665 scan_static_bus for PCI: 00:15.0 done
1177 13:06:57.792713 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1178 13:06:57.792795 PCI: 00:15.1 scanning...
1179 13:06:57.792844 scan_static_bus for PCI: 00:15.1
1180 13:06:57.792893 I2C: 00:50 enabled
1181 13:06:57.792941 scan_static_bus for PCI: 00:15.1 done
1182 13:06:57.792990 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1183 13:06:57.793039 PCI: 00:15.3 scanning...
1184 13:06:57.793088 scan_static_bus for PCI: 00:15.3
1185 13:06:57.793136 I2C: 00:10 enabled
1186 13:06:57.793184 scan_static_bus for PCI: 00:15.3 done
1187 13:06:57.793232 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1188 13:06:57.793280 PCI: 00:19.1 scanning...
1189 13:06:57.793329 scan_static_bus for PCI: 00:19.1
1190 13:06:57.793377 I2C: 00:15 enabled
1191 13:06:57.793425 I2C: 00:2c enabled
1192 13:06:57.793473 scan_static_bus for PCI: 00:19.1 done
1193 13:06:57.793522 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1194 13:06:57.793571 PCI: 00:1e.3 scanning...
1195 13:06:57.793619 scan_generic_bus for PCI: 00:1e.3
1196 13:06:57.793667 SPI: 00 enabled
1197 13:06:57.793718 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1198 13:06:57.793975 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1199 13:06:57.794088 PCI: 00:1f.0 scanning...
1200 13:06:57.794198 scan_static_bus for PCI: 00:1f.0
1201 13:06:57.794307 PNP: 0c09.0 enabled
1202 13:06:57.794418 PNP: 0c09.0 scanning...
1203 13:06:57.794526 scan_static_bus for PNP: 0c09.0
1204 13:06:57.794673 scan_static_bus for PNP: 0c09.0 done
1205 13:06:57.794745 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1206 13:06:57.794796 scan_static_bus for PCI: 00:1f.0 done
1207 13:06:57.794846 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1208 13:06:57.794895 PCI: 00:1f.2 scanning...
1209 13:06:57.794944 scan_static_bus for PCI: 00:1f.2
1210 13:06:57.794992 GENERIC: 0.0 enabled
1211 13:06:57.795041 GENERIC: 0.0 scanning...
1212 13:06:57.795089 scan_static_bus for GENERIC: 0.0
1213 13:06:57.795138 GENERIC: 0.0 enabled
1214 13:06:57.795185 GENERIC: 1.0 enabled
1215 13:06:57.795232 scan_static_bus for GENERIC: 0.0 done
1216 13:06:57.795298 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1217 13:06:57.795349 scan_static_bus for PCI: 00:1f.2 done
1218 13:06:57.795398 scan_bus: bus PCI: 00:1f.2 finished in 27 msecs
1219 13:06:57.795447 PCI: 00:1f.3 scanning...
1220 13:06:57.795496 scan_static_bus for PCI: 00:1f.3
1221 13:06:57.795544 scan_static_bus for PCI: 00:1f.3 done
1222 13:06:57.795594 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1223 13:06:57.795642 PCI: 00:1f.5 scanning...
1224 13:06:57.795690 scan_generic_bus for PCI: 00:1f.5
1225 13:06:57.795739 scan_generic_bus for PCI: 00:1f.5 done
1226 13:06:57.795788 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1227 13:06:57.795837 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1228 13:06:57.795886 scan_static_bus for Root Device done
1229 13:06:57.795935 scan_bus: bus Root Device finished in 729 msecs
1230 13:06:57.795983 done
1231 13:06:57.796032 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1232 13:06:57.796080 Chrome EC: UHEPI supported
1233 13:06:57.796127 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1234 13:06:57.796211 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1235 13:06:57.796260 SPI flash protection: WPSW=0 SRP0=0
1236 13:06:57.796309 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1237 13:06:57.796357 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1238 13:06:57.796406 found VGA at PCI: 00:02.0
1239 13:06:57.796454 Setting up VGA for PCI: 00:02.0
1240 13:06:57.796502 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1241 13:06:57.796549 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1242 13:06:57.796597 Allocating resources...
1243 13:06:57.796644 Reading resources...
1244 13:06:57.796692 Root Device read_resources bus 0 link: 0
1245 13:06:57.796740 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1246 13:06:57.796788 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1247 13:06:57.796835 DOMAIN: 0000 read_resources bus 0 link: 0
1248 13:06:57.796883 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1249 13:06:57.796931 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1250 13:06:57.796979 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1251 13:06:57.797027 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1252 13:06:57.797075 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1253 13:06:57.797123 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1254 13:06:57.797172 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1255 13:06:57.797220 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1256 13:06:57.797268 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1257 13:06:57.797316 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1258 13:06:57.797365 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1259 13:06:57.797412 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1260 13:06:57.797460 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1261 13:06:57.797509 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1262 13:06:57.797558 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1263 13:06:57.797606 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1264 13:06:57.797654 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1265 13:06:57.797705 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1266 13:06:57.797771 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1267 13:06:57.797820 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1268 13:06:57.797869 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1269 13:06:57.797917 PCI: 00:04.0 read_resources bus 1 link: 0
1270 13:06:57.797964 PCI: 00:04.0 read_resources bus 1 link: 0 done
1271 13:06:57.798012 PCI: 00:06.0 read_resources bus 1 link: 0
1272 13:06:57.798060 PCI: 00:06.0 read_resources bus 1 link: 0 done
1273 13:06:57.798109 PCI: 00:0d.0 read_resources bus 0 link: 0
1274 13:06:57.798156 USB0 port 0 read_resources bus 0 link: 0
1275 13:06:57.798203 USB0 port 0 read_resources bus 0 link: 0 done
1276 13:06:57.798250 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1277 13:06:57.798298 PCI: 00:14.0 read_resources bus 0 link: 0
1278 13:06:57.798345 USB0 port 0 read_resources bus 0 link: 0
1279 13:06:57.798393 USB0 port 0 read_resources bus 0 link: 0 done
1280 13:06:57.798440 PCI: 00:14.0 read_resources bus 0 link: 0 done
1281 13:06:57.798488 PCI: 00:14.3 read_resources bus 0 link: 0
1282 13:06:57.798536 PCI: 00:14.3 read_resources bus 0 link: 0 done
1283 13:06:57.798583 PCI: 00:15.0 read_resources bus 0 link: 0
1284 13:06:57.798671 PCI: 00:15.0 read_resources bus 0 link: 0 done
1285 13:06:57.798721 PCI: 00:15.1 read_resources bus 0 link: 0
1286 13:06:57.798769 PCI: 00:15.1 read_resources bus 0 link: 0 done
1287 13:06:57.799012 PCI: 00:15.3 read_resources bus 0 link: 0
1288 13:06:57.799126 PCI: 00:15.3 read_resources bus 0 link: 0 done
1289 13:06:57.799235 PCI: 00:19.1 read_resources bus 0 link: 0
1290 13:06:57.799389 PCI: 00:19.1 read_resources bus 0 link: 0 done
1291 13:06:57.799511 PCI: 00:1e.3 read_resources bus 2 link: 0
1292 13:06:57.799620 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1293 13:06:57.799745 PCI: 00:1f.0 read_resources bus 0 link: 0
1294 13:06:57.799809 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1295 13:06:57.799860 PCI: 00:1f.2 read_resources bus 0 link: 0
1296 13:06:57.799910 GENERIC: 0.0 read_resources bus 0 link: 0
1297 13:06:57.799959 GENERIC: 0.0 read_resources bus 0 link: 0 done
1298 13:06:57.800037 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1299 13:06:57.800099 DOMAIN: 0000 read_resources bus 0 link: 0 done
1300 13:06:57.800147 Root Device read_resources bus 0 link: 0 done
1301 13:06:57.800196 Done reading resources.
1302 13:06:57.800243 Show resources in subtree (Root Device)...After reading.
1303 13:06:57.800306 Root Device child on link 0 CPU_CLUSTER: 0
1304 13:06:57.800367 CPU_CLUSTER: 0 child on link 0 APIC: 00
1305 13:06:57.800415 APIC: 00
1306 13:06:57.800463 APIC: 14
1307 13:06:57.800511 APIC: 16
1308 13:06:57.800571 APIC: 10
1309 13:06:57.800633 APIC: 12
1310 13:06:57.800680 APIC: 09
1311 13:06:57.800728 APIC: 01
1312 13:06:57.800774 APIC: 08
1313 13:06:57.800821 DOMAIN: 0000 child on link 0 GPIO: 0
1314 13:06:57.800899 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1315 13:06:57.800949 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1316 13:06:57.800998 GPIO: 0
1317 13:06:57.801045 PCI: 00:00.0
1318 13:06:57.801092 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1319 13:06:57.801168 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1320 13:06:57.801217 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1321 13:06:57.801265 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1322 13:06:57.801314 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1323 13:06:57.801362 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1324 13:06:57.801438 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1325 13:06:57.801487 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1326 13:06:57.801535 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1327 13:06:57.801584 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1328 13:06:57.801635 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1329 13:06:57.801711 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1330 13:06:57.801761 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1331 13:06:57.801810 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1332 13:06:57.801885 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1333 13:06:57.801940 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1334 13:06:57.801990 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1335 13:06:57.802040 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1336 13:06:57.802090 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1337 13:06:57.802141 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1338 13:06:57.802218 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1339 13:06:57.802280 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1340 13:06:57.802328 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1341 13:06:57.802377 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1342 13:06:57.802425 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1343 13:06:57.802475 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1344 13:06:57.802539 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1345 13:06:57.802589 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1346 13:06:57.802665 PCI: 00:02.0
1347 13:06:57.802715 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1348 13:06:57.802984 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1349 13:06:57.803078 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1350 13:06:57.803128 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1351 13:06:57.803178 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1352 13:06:57.803227 GENERIC: 0.0
1353 13:06:57.803275 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1354 13:06:57.803323 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1355 13:06:57.803371 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1356 13:06:57.803422 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1357 13:06:57.803471 PCI: 01:00.0
1358 13:06:57.803518 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1359 13:06:57.803568 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1360 13:06:57.803616 PCI: 00:08.0
1361 13:06:57.803667 PCI: 00:0a.0
1362 13:06:57.803715 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1363 13:06:57.803764 PCI: 00:0d.0 child on link 0 USB0 port 0
1364 13:06:57.803813 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1365 13:06:57.803861 USB0 port 0 child on link 0 USB3 port 0
1366 13:06:57.803909 USB3 port 0
1367 13:06:57.803957 USB3 port 1
1368 13:06:57.804004 USB3 port 2
1369 13:06:57.804051 USB3 port 3
1370 13:06:57.804098 PCI: 00:14.0 child on link 0 USB0 port 0
1371 13:06:57.804146 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1372 13:06:57.804195 USB0 port 0 child on link 0 USB2 port 0
1373 13:06:57.804242 USB2 port 0
1374 13:06:57.804289 USB2 port 1
1375 13:06:57.804337 USB2 port 2
1376 13:06:57.804385 USB2 port 3
1377 13:06:57.804432 USB2 port 4
1378 13:06:57.804479 USB2 port 5
1379 13:06:57.804526 USB2 port 6
1380 13:06:57.804573 USB2 port 7
1381 13:06:57.804620 USB2 port 8
1382 13:06:57.804706 USB2 port 9
1383 13:06:57.804755 USB3 port 0
1384 13:06:57.804803 USB3 port 1
1385 13:06:57.804850 USB3 port 2
1386 13:06:57.804897 USB3 port 3
1387 13:06:57.804945 PCI: 00:14.2
1388 13:06:57.804992 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1389 13:06:57.805041 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1390 13:06:57.805090 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1391 13:06:57.805138 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1392 13:06:57.805188 GENERIC: 0.0
1393 13:06:57.805235 PCI: 00:15.0 child on link 0 I2C: 00:1a
1394 13:06:57.805283 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1395 13:06:57.805332 I2C: 00:1a
1396 13:06:57.805380 I2C: 00:31
1397 13:06:57.805427 I2C: 00:32
1398 13:06:57.805474 PCI: 00:15.1 child on link 0 I2C: 00:50
1399 13:06:57.805522 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1400 13:06:57.805571 I2C: 00:50
1401 13:06:57.805618 PCI: 00:15.2
1402 13:06:57.805665 PCI: 00:15.3 child on link 0 I2C: 00:10
1403 13:06:57.805713 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1404 13:06:57.805762 I2C: 00:10
1405 13:06:57.805809 PCI: 00:16.0
1406 13:06:57.805856 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1407 13:06:57.805904 PCI: 00:19.0
1408 13:06:57.805972 PCI: 00:19.1 child on link 0 I2C: 00:15
1409 13:06:57.806023 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1410 13:06:57.806072 I2C: 00:15
1411 13:06:57.806119 I2C: 00:2c
1412 13:06:57.806166 PCI: 00:1e.0
1413 13:06:57.806214 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 13:06:57.806262 PCI: 00:1e.3 child on link 0 SPI: 00
1415 13:06:57.806310 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1416 13:06:57.806358 SPI: 00
1417 13:06:57.806407 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1418 13:06:57.806455 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1419 13:06:57.806503 PNP: 0c09.0
1420 13:06:57.806565 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1421 13:06:57.806644 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1422 13:06:57.806716 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1423 13:06:57.806767 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1424 13:06:57.806817 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1425 13:06:57.806866 GENERIC: 0.0
1426 13:06:57.806915 GENERIC: 1.0
1427 13:06:57.806962 PCI: 00:1f.3
1428 13:06:57.807010 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1429 13:06:57.807060 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1430 13:06:57.807108 PCI: 00:1f.5
1431 13:06:57.807156 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1432 13:06:57.807407 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1433 13:06:57.807481 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1434 13:06:57.807533 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1435 13:06:57.807583 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1436 13:06:57.807633 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1437 13:06:57.807710 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1438 13:06:57.807759 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1439 13:06:57.807807 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1440 13:06:57.807856 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1441 13:06:57.807904 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1442 13:06:57.807980 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1443 13:06:57.808029 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1444 13:06:57.808078 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1445 13:06:57.808127 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1446 13:06:57.808176 DOMAIN: 0000: Resource ranges:
1447 13:06:57.808251 * Base: 1000, Size: 800, Tag: 100
1448 13:06:57.808299 * Base: 1900, Size: e700, Tag: 100
1449 13:06:57.808347 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1450 13:06:57.808395 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1451 13:06:57.808443 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1452 13:06:57.808519 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1453 13:06:57.808568 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1454 13:06:57.808616 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1455 13:06:57.808665 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1456 13:06:57.808727 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1457 13:06:57.808790 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1458 13:06:57.808837 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1459 13:06:57.808885 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1460 13:06:57.808934 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1461 13:06:57.809035 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1462 13:06:57.809115 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1463 13:06:57.809167 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1464 13:06:57.809216 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1465 13:06:57.809280 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1466 13:06:57.809343 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1467 13:06:57.809392 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1468 13:06:57.809440 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1469 13:06:57.809488 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1470 13:06:57.809536 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1471 13:06:57.809585 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1472 13:06:57.809662 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1473 13:06:57.809711 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1474 13:06:57.809759 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1475 13:06:57.809807 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1476 13:06:57.809855 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1477 13:06:57.809917 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1478 13:06:57.809979 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1479 13:06:57.810027 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1480 13:06:57.810076 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1481 13:06:57.810124 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1482 13:06:57.810172 DOMAIN: 0000: Resource ranges:
1483 13:06:57.810251 * Base: 80400000, Size: 3fc00000, Tag: 200
1484 13:06:57.810299 * Base: d0000000, Size: 28000000, Tag: 200
1485 13:06:57.810346 * Base: fa000000, Size: 1000000, Tag: 200
1486 13:06:57.810396 * Base: fb001000, Size: 17ff000, Tag: 200
1487 13:06:57.810445 * Base: fe800000, Size: 300000, Tag: 200
1488 13:06:57.810493 * Base: feb80000, Size: 80000, Tag: 200
1489 13:06:57.810555 * Base: fed00000, Size: 40000, Tag: 200
1490 13:06:57.810611 * Base: fed70000, Size: 10000, Tag: 200
1491 13:06:57.810730 * Base: fed88000, Size: 8000, Tag: 200
1492 13:06:57.810779 * Base: fed93000, Size: d000, Tag: 200
1493 13:06:57.811016 * Base: feda2000, Size: 1e000, Tag: 200
1494 13:06:57.811073 * Base: fede0000, Size: 1220000, Tag: 200
1495 13:06:57.811121 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1496 13:06:57.811170 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1497 13:06:57.811219 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1498 13:06:57.811267 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1499 13:06:57.811315 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1500 13:06:57.811363 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1501 13:06:57.811412 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1502 13:06:57.811461 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1503 13:06:57.811509 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1504 13:06:57.811557 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1505 13:06:57.811606 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1506 13:06:57.811654 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1507 13:06:57.811702 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1508 13:06:57.811750 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1509 13:06:57.811798 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1510 13:06:57.811847 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1511 13:06:57.811895 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1512 13:06:57.811943 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1513 13:06:57.811992 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1514 13:06:57.812041 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1515 13:06:57.812091 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1516 13:06:57.812140 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1517 13:06:57.812189 PCI: 00:06.0: Resource ranges:
1518 13:06:57.812236 * Base: 80400000, Size: 100000, Tag: 200
1519 13:06:57.812284 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1520 13:06:57.812332 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1521 13:06:57.812380 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1522 13:06:57.812429 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1523 13:06:57.812477 Root Device assign_resources, bus 0 link: 0
1524 13:06:57.812526 DOMAIN: 0000 assign_resources, bus 0 link: 0
1525 13:06:57.812574 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1526 13:06:57.812623 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1527 13:06:57.812672 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1528 13:06:57.812720 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1529 13:06:57.812772 PCI: 00:04.0 assign_resources, bus 1 link: 0
1530 13:06:57.812820 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1531 13:06:57.812868 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1532 13:06:57.812916 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1533 13:06:57.812964 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1534 13:06:57.813012 PCI: 00:06.0 assign_resources, bus 1 link: 0
1535 13:06:57.813060 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1536 13:06:57.813108 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1537 13:06:57.813156 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1538 13:06:57.813204 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1539 13:06:57.813252 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1540 13:06:57.813299 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1541 13:06:57.813347 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1542 13:06:57.813395 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1543 13:06:57.813444 PCI: 00:14.0 assign_resources, bus 0 link: 0
1544 13:06:57.813492 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1545 13:06:57.813541 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1546 13:06:57.813589 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1547 13:06:57.813637 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1548 13:06:57.813685 PCI: 00:14.3 assign_resources, bus 0 link: 0
1549 13:06:57.813733 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1550 13:06:57.813781 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1551 13:06:57.813830 PCI: 00:15.0 assign_resources, bus 0 link: 0
1552 13:06:57.813878 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1553 13:06:57.813926 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1554 13:06:57.813974 PCI: 00:15.1 assign_resources, bus 0 link: 0
1555 13:06:57.814207 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1556 13:06:57.814262 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1557 13:06:57.814312 PCI: 00:15.3 assign_resources, bus 0 link: 0
1558 13:06:57.814360 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1559 13:06:57.814408 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1560 13:06:57.814456 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1561 13:06:57.814505 PCI: 00:19.1 assign_resources, bus 0 link: 0
1562 13:06:57.814553 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1563 13:06:57.814626 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1564 13:06:57.814734 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1565 13:06:57.814809 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1566 13:06:57.814897 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1567 13:06:57.814951 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1568 13:06:57.815001 LPC: Trying to open IO window from 800 size 1ff
1569 13:06:57.815049 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1570 13:06:57.815099 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1571 13:06:57.815148 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1572 13:06:57.815197 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1573 13:06:57.815245 Root Device assign_resources, bus 0 link: 0 done
1574 13:06:57.815292 Done setting resources.
1575 13:06:57.815341 Show resources in subtree (Root Device)...After assigning values.
1576 13:06:57.815390 Root Device child on link 0 CPU_CLUSTER: 0
1577 13:06:57.815439 CPU_CLUSTER: 0 child on link 0 APIC: 00
1578 13:06:57.815487 APIC: 00
1579 13:06:57.815535 APIC: 14
1580 13:06:57.815584 APIC: 16
1581 13:06:57.815632 APIC: 10
1582 13:06:57.815679 APIC: 12
1583 13:06:57.815726 APIC: 09
1584 13:06:57.815773 APIC: 01
1585 13:06:57.815821 APIC: 08
1586 13:06:57.815868 DOMAIN: 0000 child on link 0 GPIO: 0
1587 13:06:57.815918 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1588 13:06:57.815967 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1589 13:06:57.816016 GPIO: 0
1590 13:06:57.816064 PCI: 00:00.0
1591 13:06:57.816116 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1592 13:06:57.816165 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1593 13:06:57.816214 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1594 13:06:57.816263 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1595 13:06:57.816311 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1596 13:06:57.816360 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1597 13:06:57.816409 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1598 13:06:57.816458 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1599 13:06:57.816507 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1600 13:06:57.816556 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1601 13:06:57.816605 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1602 13:06:57.816654 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1603 13:06:57.816740 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1604 13:06:57.816789 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1605 13:06:57.816837 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1606 13:06:57.816887 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1607 13:06:57.816936 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1608 13:06:57.816984 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1609 13:06:57.817032 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1610 13:06:57.817081 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1611 13:06:57.817130 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1612 13:06:57.817178 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1613 13:06:57.817227 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1614 13:06:57.817276 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1615 13:06:57.817511 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1616 13:06:57.817569 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1617 13:06:57.817618 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1618 13:06:57.817667 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1619 13:06:57.817717 PCI: 00:02.0
1620 13:06:57.817765 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1621 13:06:57.817815 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1622 13:06:57.817863 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1623 13:06:57.817912 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1624 13:06:57.817960 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1625 13:06:57.818008 GENERIC: 0.0
1626 13:06:57.818056 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1627 13:06:57.818105 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1628 13:06:57.818154 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1629 13:06:57.818203 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1630 13:06:57.818252 PCI: 01:00.0
1631 13:06:57.818300 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1632 13:06:57.818349 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1633 13:06:57.818398 PCI: 00:08.0
1634 13:06:57.818446 PCI: 00:0a.0
1635 13:06:57.818493 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1636 13:06:57.818543 PCI: 00:0d.0 child on link 0 USB0 port 0
1637 13:06:57.818591 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1638 13:06:57.818698 USB0 port 0 child on link 0 USB3 port 0
1639 13:06:57.818760 USB3 port 0
1640 13:06:57.818808 USB3 port 1
1641 13:06:57.818856 USB3 port 2
1642 13:06:57.818904 USB3 port 3
1643 13:06:57.818952 PCI: 00:14.0 child on link 0 USB0 port 0
1644 13:06:57.819000 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1645 13:06:57.819057 USB0 port 0 child on link 0 USB2 port 0
1646 13:06:57.819116 USB2 port 0
1647 13:06:57.819165 USB2 port 1
1648 13:06:57.819212 USB2 port 2
1649 13:06:57.819260 USB2 port 3
1650 13:06:57.819308 USB2 port 4
1651 13:06:57.819355 USB2 port 5
1652 13:06:57.819403 USB2 port 6
1653 13:06:57.819451 USB2 port 7
1654 13:06:57.819497 USB2 port 8
1655 13:06:57.819546 USB2 port 9
1656 13:06:57.819593 USB3 port 0
1657 13:06:57.819641 USB3 port 1
1658 13:06:57.819689 USB3 port 2
1659 13:06:57.819737 USB3 port 3
1660 13:06:57.819784 PCI: 00:14.2
1661 13:06:57.819832 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1662 13:06:57.819881 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1663 13:06:57.819930 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1664 13:06:57.819979 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1665 13:06:57.820028 GENERIC: 0.0
1666 13:06:57.820075 PCI: 00:15.0 child on link 0 I2C: 00:1a
1667 13:06:57.820123 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1668 13:06:57.820171 I2C: 00:1a
1669 13:06:57.820219 I2C: 00:31
1670 13:06:57.820266 I2C: 00:32
1671 13:06:57.820314 PCI: 00:15.1 child on link 0 I2C: 00:50
1672 13:06:57.820363 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1673 13:06:57.820411 I2C: 00:50
1674 13:06:57.820458 PCI: 00:15.2
1675 13:06:57.820506 PCI: 00:15.3 child on link 0 I2C: 00:10
1676 13:06:57.820554 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1677 13:06:57.820602 I2C: 00:10
1678 13:06:57.820649 PCI: 00:16.0
1679 13:06:57.820697 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1680 13:06:57.820745 PCI: 00:19.0
1681 13:06:57.820794 PCI: 00:19.1 child on link 0 I2C: 00:15
1682 13:06:57.820841 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1683 13:06:57.820890 I2C: 00:15
1684 13:06:57.820938 I2C: 00:2c
1685 13:06:57.820985 PCI: 00:1e.0
1686 13:06:57.821033 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1687 13:06:57.821081 PCI: 00:1e.3 child on link 0 SPI: 00
1688 13:06:57.821129 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1689 13:06:57.821178 SPI: 00
1690 13:06:57.821227 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1691 13:06:57.821275 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1692 13:06:57.821324 PNP: 0c09.0
1693 13:06:57.821371 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1694 13:06:57.821607 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1695 13:06:57.821664 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1696 13:06:57.821715 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1697 13:06:57.821764 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1698 13:06:57.821813 GENERIC: 0.0
1699 13:06:57.821861 GENERIC: 1.0
1700 13:06:57.821908 PCI: 00:1f.3
1701 13:06:57.821956 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1702 13:06:57.822006 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1703 13:06:57.822055 PCI: 00:1f.5
1704 13:06:57.822103 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1705 13:06:57.822152 Done allocating resources.
1706 13:06:57.822200 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1707 13:06:57.822248 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1708 13:06:57.822310 Configure audio over I2S with MAX98373 NAU88L25B.
1709 13:06:57.822359 Enabling BT offload
1710 13:06:57.822408 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1711 13:06:57.822458 Enabling resources...
1712 13:06:57.822507 PCI: 00:00.0 subsystem <- 8086/4609
1713 13:06:57.822556 PCI: 00:00.0 cmd <- 06
1714 13:06:57.822617 PCI: 00:02.0 subsystem <- 8086/46b3
1715 13:06:57.822670 PCI: 00:02.0 cmd <- 03
1716 13:06:57.822719 PCI: 00:04.0 subsystem <- 8086/461d
1717 13:06:57.822768 PCI: 00:04.0 cmd <- 02
1718 13:06:57.822817 PCI: 00:06.0 bridge ctrl <- 0013
1719 13:06:57.822866 PCI: 00:06.0 subsystem <- 8086/464d
1720 13:06:57.822915 PCI: 00:06.0 cmd <- 106
1721 13:06:57.822964 PCI: 00:0a.0 subsystem <- 8086/467d
1722 13:06:57.823013 PCI: 00:0a.0 cmd <- 02
1723 13:06:57.823062 PCI: 00:0d.0 subsystem <- 8086/461e
1724 13:06:57.823111 PCI: 00:0d.0 cmd <- 02
1725 13:06:57.823160 PCI: 00:14.0 subsystem <- 8086/51ed
1726 13:06:57.823209 PCI: 00:14.0 cmd <- 02
1727 13:06:57.823258 PCI: 00:14.2 subsystem <- 8086/51ef
1728 13:06:57.823306 PCI: 00:14.2 cmd <- 02
1729 13:06:57.823377 PCI: 00:14.3 subsystem <- 8086/51f0
1730 13:06:57.823429 PCI: 00:14.3 cmd <- 02
1731 13:06:57.823478 PCI: 00:15.0 subsystem <- 8086/51e8
1732 13:06:57.823528 PCI: 00:15.0 cmd <- 02
1733 13:06:57.823577 PCI: 00:15.1 subsystem <- 8086/51e9
1734 13:06:57.823626 PCI: 00:15.1 cmd <- 06
1735 13:06:57.823674 PCI: 00:15.3 subsystem <- 8086/51eb
1736 13:06:57.823724 PCI: 00:15.3 cmd <- 02
1737 13:06:57.823772 PCI: 00:16.0 subsystem <- 8086/51e0
1738 13:06:57.823820 PCI: 00:16.0 cmd <- 02
1739 13:06:58.225392 PCI: 00:19.1 subsystem <- 8086/51c6
1740 13:06:58.225501 PCI: 00:19.1 cmd <- 02
1741 13:06:58.225563 PCI: 00:1e.0 subsystem <- 8086/51a8
1742 13:06:58.225617 PCI: 00:1e.0 cmd <- 06
1743 13:06:58.225670 PCI: 00:1e.3 subsystem <- 8086/51ab
1744 13:06:58.225722 PCI: 00:1e.3 cmd <- 02
1745 13:06:58.225772 PCI: 00:1f.0 subsystem <- 8086/5182
1746 13:06:58.225822 PCI: 00:1f.0 cmd <- 407
1747 13:06:58.225871 PCI: 00:1f.3 subsystem <- 8086/51c8
1748 13:06:58.225920 PCI: 00:1f.3 cmd <- 02
1749 13:06:58.225969 PCI: 00:1f.5 subsystem <- 8086/51a4
1750 13:06:58.226018 PCI: 00:1f.5 cmd <- 406
1751 13:06:58.226066 PCI: 01:00.0 cmd <- 02
1752 13:06:58.226114 done.
1753 13:06:58.226164 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1754 13:06:58.226214 ME: Version: Unavailable
1755 13:06:58.226263 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1756 13:06:58.226311 Initializing devices...
1757 13:06:58.226359 Root Device init
1758 13:06:58.226407 mainboard: EC init
1759 13:06:58.226456 Chrome EC: Set SMI mask to 0x0000000000000000
1760 13:06:58.226505 Chrome EC: clear events_b mask to 0x0000000000000000
1761 13:06:58.226555 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1762 13:06:58.226611 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1763 13:06:58.226698 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1764 13:06:58.226747 Chrome EC: Set WAKE mask to 0x0000000000000000
1765 13:06:58.226796 Root Device init finished in 40 msecs
1766 13:06:58.226844 PCI: 00:00.0 init
1767 13:06:58.226893 CPU TDP = 15 Watts
1768 13:06:58.226942 CPU PL1 = 15 Watts
1769 13:06:58.226989 CPU PL2 = 55 Watts
1770 13:06:58.227037 CPU PL4 = 123 Watts
1771 13:06:58.227086 PCI: 00:00.0 init finished in 8 msecs
1772 13:06:58.227135 PCI: 00:02.0 init
1773 13:06:58.227184 GMA: Found VBT in CBFS
1774 13:06:58.227232 GMA: Found valid VBT in CBFS
1775 13:06:58.227280 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1776 13:06:58.227329 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1777 13:06:58.227379 PCI: 00:02.0 init finished in 18 msecs
1778 13:06:58.227428 PCI: 00:06.0 init
1779 13:06:58.227476 Initializing PCH PCIe bridge.
1780 13:06:58.227524 PCI: 00:06.0 init finished in 3 msecs
1781 13:06:58.227572 PCI: 00:0a.0 init
1782 13:06:58.227620 PCI: 00:0a.0 init finished in 0 msecs
1783 13:06:58.227668 PCI: 00:14.0 init
1784 13:06:58.227716 PCI: 00:14.0 init finished in 0 msecs
1785 13:06:58.227764 PCI: 00:14.2 init
1786 13:06:58.227812 PCI: 00:14.2 init finished in 0 msecs
1787 13:06:58.227861 PCI: 00:15.0 init
1788 13:06:58.227909 I2C bus 0 version 0x3230302a
1789 13:06:58.227957 DW I2C bus 0 at 0x80655000 (400 KHz)
1790 13:06:58.228005 PCI: 00:15.0 init finished in 6 msecs
1791 13:06:58.228053 PCI: 00:15.1 init
1792 13:06:58.228101 I2C bus 1 version 0x3230302a
1793 13:06:58.228149 DW I2C bus 1 at 0x80656000 (400 KHz)
1794 13:06:58.228196 PCI: 00:15.1 init finished in 6 msecs
1795 13:06:58.228244 PCI: 00:15.3 init
1796 13:06:58.228292 I2C bus 3 version 0x3230302a
1797 13:06:58.228340 DW I2C bus 3 at 0x80657000 (400 KHz)
1798 13:06:58.228388 PCI: 00:15.3 init finished in 6 msecs
1799 13:06:58.228436 PCI: 00:16.0 init
1800 13:06:58.228483 PCI: 00:16.0 init finished in 0 msecs
1801 13:06:58.228531 PCI: 00:19.1 init
1802 13:06:58.228578 I2C bus 5 version 0x3230302a
1803 13:06:58.228626 DW I2C bus 5 at 0x80659000 (400 KHz)
1804 13:06:58.228674 PCI: 00:19.1 init finished in 6 msecs
1805 13:06:58.228721 PCI: 00:1f.0 init
1806 13:06:58.228768 IOAPIC: Initializing IOAPIC at 0xfec00000
1807 13:06:58.228816 IOAPIC: ID = 0x02
1808 13:06:58.228864 IOAPIC: Dumping registers
1809 13:06:58.229112 reg 0x0000: 0x02000000
1810 13:06:58.229187 reg 0x0001: 0x00770020
1811 13:06:58.229251 reg 0x0002: 0x00000000
1812 13:06:58.229300 IOAPIC: 120 interrupts
1813 13:06:58.229349 IOAPIC: Clearing IOAPIC at 0xfec00000
1814 13:06:58.229399 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1815 13:06:58.229448 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1816 13:06:58.229496 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1817 13:06:58.229545 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1818 13:06:58.229594 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1819 13:06:58.229642 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1820 13:06:58.229690 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1821 13:06:58.229739 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1822 13:06:58.229788 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1823 13:06:58.229837 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1824 13:06:58.229886 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1825 13:06:58.229934 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1826 13:06:58.229983 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1827 13:06:58.230032 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1828 13:06:58.230080 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1829 13:06:58.230128 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1830 13:06:58.230176 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1831 13:06:58.230225 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1832 13:06:58.230274 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1833 13:06:58.230322 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1834 13:06:58.230370 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1835 13:06:58.230418 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1836 13:06:58.230466 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1837 13:06:58.230515 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1838 13:06:58.230563 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1839 13:06:58.230638 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1840 13:06:58.230703 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1841 13:06:58.230752 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1842 13:06:58.230801 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1843 13:06:58.230849 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1844 13:06:58.230898 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1845 13:06:58.230947 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1846 13:06:58.230996 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1847 13:06:58.231044 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1848 13:06:58.231092 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1849 13:06:58.231142 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1850 13:06:58.231190 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1851 13:06:58.231240 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1852 13:06:58.231288 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1853 13:06:58.231337 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1854 13:06:58.231385 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1855 13:06:58.231434 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1856 13:06:58.231482 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1857 13:06:58.231531 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1858 13:06:58.231580 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1859 13:06:58.231628 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1860 13:06:58.231676 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1861 13:06:58.231725 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1862 13:06:58.231773 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1863 13:06:58.231820 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1864 13:06:58.231868 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1865 13:06:58.231917 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1866 13:06:58.231966 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1867 13:06:58.232015 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1868 13:06:58.232063 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1869 13:06:58.232111 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1870 13:06:58.232160 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1871 13:06:58.232225 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1872 13:06:58.232287 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1873 13:06:58.232336 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1874 13:06:58.232385 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1875 13:06:58.232434 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1876 13:06:58.232483 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1877 13:06:58.232531 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1878 13:06:58.232579 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1879 13:06:58.232628 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1880 13:06:58.232676 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1881 13:06:58.232725 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1882 13:06:58.232775 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1883 13:06:58.232824 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1884 13:06:58.232884 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1885 13:06:58.232946 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1886 13:06:58.232996 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1887 13:06:58.233045 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1888 13:06:58.233096 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1889 13:06:58.233145 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1890 13:06:58.233194 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1891 13:06:58.233243 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1892 13:06:58.233292 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1893 13:06:58.233341 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1894 13:06:58.233580 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1895 13:06:58.233654 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1896 13:06:58.233735 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1897 13:06:58.233786 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1898 13:06:58.233836 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1899 13:06:58.233886 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1900 13:06:58.233935 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1901 13:06:58.233985 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1902 13:06:58.234035 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1903 13:06:58.234084 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1904 13:06:58.234133 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1905 13:06:58.234182 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1906 13:06:58.234232 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1907 13:06:58.234282 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1908 13:06:58.234331 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1909 13:06:58.234394 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1910 13:06:58.234443 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1911 13:06:58.234492 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1912 13:06:58.234540 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1913 13:06:58.234588 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1914 13:06:58.234679 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1915 13:06:58.234729 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1916 13:06:58.234778 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1917 13:06:58.234827 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1918 13:06:58.234875 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1919 13:06:58.234923 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1920 13:06:58.234971 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1921 13:06:58.235020 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1922 13:06:58.235068 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1923 13:06:58.235147 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1924 13:06:58.235213 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1925 13:06:58.235275 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1926 13:06:58.235324 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1927 13:06:58.235373 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1928 13:06:58.235421 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1929 13:06:58.235469 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1930 13:06:58.235518 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1931 13:06:58.235567 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1932 13:06:58.235615 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1933 13:06:58.235665 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1934 13:06:58.235713 IOAPIC: Bootstrap Processor Local APIC = 0x00
1935 13:06:58.235763 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1936 13:06:58.235811 PCI: 00:1f.0 init finished in 607 msecs
1937 13:06:58.235860 PCI: 00:1f.2 init
1938 13:06:58.235908 apm_control: Disabling ACPI.
1939 13:06:58.235957 APMC done.
1940 13:06:58.236007 PCI: 00:1f.2 init finished in 7 msecs
1941 13:06:58.236056 PCI: 00:1f.3 init
1942 13:06:58.236105 PCI: 00:1f.3 init finished in 0 msecs
1943 13:06:58.236153 PCI: 01:00.0 init
1944 13:06:58.236202 PCI: 01:00.0 init finished in 0 msecs
1945 13:06:58.236250 PNP: 0c09.0 init
1946 13:06:58.236298 Google Chrome EC uptime: 10.907 seconds
1947 13:06:58.236347 Google Chrome AP resets since EC boot: 0
1948 13:06:58.236395 Google Chrome most recent AP reset causes:
1949 13:06:58.236445 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1950 13:06:58.236494 PNP: 0c09.0 init finished in 19 msecs
1951 13:06:58.236542 GENERIC: 0.0 init
1952 13:06:58.236591 GENERIC: 0.0 init finished in 0 msecs
1953 13:06:58.236639 GENERIC: 1.0 init
1954 13:06:58.236687 GENERIC: 1.0 init finished in 0 msecs
1955 13:06:58.236736 Devices initialized
1956 13:06:58.236784 Show all devs... After init.
1957 13:06:58.236833 Root Device: enabled 1
1958 13:06:58.236882 CPU_CLUSTER: 0: enabled 1
1959 13:06:58.236930 DOMAIN: 0000: enabled 1
1960 13:06:58.237033 GPIO: 0: enabled 1
1961 13:06:58.237087 PCI: 00:00.0: enabled 1
1962 13:06:58.237136 PCI: 00:01.0: enabled 0
1963 13:06:58.237185 PCI: 00:01.1: enabled 0
1964 13:06:58.237234 PCI: 00:02.0: enabled 1
1965 13:06:58.237282 PCI: 00:04.0: enabled 1
1966 13:06:58.237331 PCI: 00:05.0: enabled 0
1967 13:06:58.237379 PCI: 00:06.0: enabled 1
1968 13:06:58.237427 PCI: 00:06.2: enabled 0
1969 13:06:58.237475 PCI: 00:07.0: enabled 0
1970 13:06:58.237523 PCI: 00:07.1: enabled 0
1971 13:06:58.237571 PCI: 00:07.2: enabled 0
1972 13:06:58.237619 PCI: 00:07.3: enabled 0
1973 13:06:58.237667 PCI: 00:08.0: enabled 0
1974 13:06:58.237714 PCI: 00:09.0: enabled 0
1975 13:06:58.237762 PCI: 00:0a.0: enabled 1
1976 13:06:58.237810 PCI: 00:0d.0: enabled 1
1977 13:06:58.237860 PCI: 00:0d.1: enabled 0
1978 13:06:58.237924 PCI: 00:0d.2: enabled 0
1979 13:06:58.237986 PCI: 00:0d.3: enabled 0
1980 13:06:58.238034 PCI: 00:0e.0: enabled 0
1981 13:06:58.238083 PCI: 00:10.0: enabled 0
1982 13:06:58.238131 PCI: 00:10.1: enabled 0
1983 13:06:58.238180 PCI: 00:10.6: enabled 0
1984 13:06:58.238228 PCI: 00:10.7: enabled 0
1985 13:06:58.238276 PCI: 00:12.0: enabled 0
1986 13:06:58.238324 PCI: 00:12.6: enabled 0
1987 13:06:58.238373 PCI: 00:12.7: enabled 0
1988 13:06:58.238421 PCI: 00:13.0: enabled 0
1989 13:06:58.238469 PCI: 00:14.0: enabled 1
1990 13:06:58.238517 PCI: 00:14.1: enabled 0
1991 13:06:58.238565 PCI: 00:14.2: enabled 1
1992 13:06:58.238620 PCI: 00:14.3: enabled 1
1993 13:06:58.238699 PCI: 00:15.0: enabled 1
1994 13:06:58.238747 PCI: 00:15.1: enabled 1
1995 13:06:58.238795 PCI: 00:15.2: enabled 0
1996 13:06:58.238843 PCI: 00:15.3: enabled 1
1997 13:06:58.238891 PCI: 00:16.0: enabled 1
1998 13:06:58.238938 PCI: 00:16.1: enabled 0
1999 13:06:58.238986 PCI: 00:16.2: enabled 0
2000 13:06:58.239034 PCI: 00:16.3: enabled 0
2001 13:06:58.239082 PCI: 00:16.4: enabled 0
2002 13:06:58.239129 PCI: 00:16.5: enabled 0
2003 13:06:58.239178 PCI: 00:17.0: enabled 0
2004 13:06:58.239226 PCI: 00:19.0: enabled 0
2005 13:06:58.239273 PCI: 00:19.1: enabled 1
2006 13:06:58.239321 PCI: 00:19.2: enabled 0
2007 13:06:58.239369 PCI: 00:1a.0: enabled 0
2008 13:06:58.239417 PCI: 00:1c.0: enabled 0
2009 13:06:58.239466 PCI: 00:1c.1: enabled 0
2010 13:06:58.239514 PCI: 00:1c.2: enabled 0
2011 13:06:58.239562 PCI: 00:1c.3: enabled 0
2012 13:06:58.239613 PCI: 00:1c.4: enabled 0
2013 13:06:58.239850 PCI: 00:1c.5: enabled 0
2014 13:06:58.239904 PCI: 00:1c.6: enabled 0
2015 13:06:58.239954 PCI: 00:1c.7: enabled 0
2016 13:06:58.240002 PCI: 00:1d.0: enabled 0
2017 13:06:58.240051 PCI: 00:1d.1: enabled 0
2018 13:06:58.240099 PCI: 00:1d.2: enabled 0
2019 13:06:58.240147 PCI: 00:1d.3: enabled 0
2020 13:06:58.240195 PCI: 00:1e.0: enabled 1
2021 13:06:58.240243 PCI: 00:1e.1: enabled 0
2022 13:06:58.240291 PCI: 00:1e.2: enabled 0
2023 13:06:58.240338 PCI: 00:1e.3: enabled 1
2024 13:06:58.240386 PCI: 00:1f.0: enabled 1
2025 13:06:58.240434 PCI: 00:1f.1: enabled 0
2026 13:06:58.240483 PCI: 00:1f.2: enabled 1
2027 13:06:58.240530 PCI: 00:1f.3: enabled 1
2028 13:06:58.240578 PCI: 00:1f.4: enabled 0
2029 13:06:58.240626 PCI: 00:1f.5: enabled 1
2030 13:06:58.240674 PCI: 00:1f.6: enabled 0
2031 13:06:58.240723 PCI: 00:1f.7: enabled 0
2032 13:06:58.240770 GENERIC: 0.0: enabled 1
2033 13:06:58.240818 GENERIC: 0.0: enabled 1
2034 13:06:58.240867 GENERIC: 1.0: enabled 1
2035 13:06:58.240915 GENERIC: 0.0: enabled 1
2036 13:06:58.240963 GENERIC: 1.0: enabled 1
2037 13:06:58.241012 USB0 port 0: enabled 1
2038 13:06:58.241061 USB0 port 0: enabled 1
2039 13:06:58.241109 GENERIC: 0.0: enabled 1
2040 13:06:58.241158 I2C: 00:1a: enabled 1
2041 13:06:58.241206 I2C: 00:31: enabled 1
2042 13:06:58.241316 I2C: 00:32: enabled 1
2043 13:06:58.241367 I2C: 00:50: enabled 1
2044 13:06:58.241417 I2C: 00:10: enabled 1
2045 13:06:58.241498 I2C: 00:15: enabled 1
2046 13:06:58.241548 I2C: 00:2c: enabled 1
2047 13:06:58.241597 GENERIC: 0.0: enabled 1
2048 13:06:58.241645 SPI: 00: enabled 1
2049 13:06:58.241693 PNP: 0c09.0: enabled 1
2050 13:06:58.241743 GENERIC: 0.0: enabled 1
2051 13:06:58.241791 USB3 port 0: enabled 1
2052 13:06:58.241839 USB3 port 1: enabled 0
2053 13:06:58.241887 USB3 port 2: enabled 1
2054 13:06:58.241936 USB3 port 3: enabled 0
2055 13:06:58.241985 USB2 port 0: enabled 1
2056 13:06:58.242033 USB2 port 1: enabled 0
2057 13:06:58.242081 USB2 port 2: enabled 1
2058 13:06:58.242129 USB2 port 3: enabled 0
2059 13:06:58.242177 USB2 port 4: enabled 0
2060 13:06:58.242226 USB2 port 5: enabled 1
2061 13:06:58.242275 USB2 port 6: enabled 0
2062 13:06:58.242323 USB2 port 7: enabled 0
2063 13:06:58.242370 USB2 port 8: enabled 1
2064 13:06:58.242418 USB2 port 9: enabled 1
2065 13:06:58.242467 USB3 port 0: enabled 1
2066 13:06:58.242515 USB3 port 1: enabled 0
2067 13:06:58.242564 USB3 port 2: enabled 0
2068 13:06:58.242619 USB3 port 3: enabled 0
2069 13:06:58.242698 GENERIC: 0.0: enabled 1
2070 13:06:58.242746 GENERIC: 1.0: enabled 1
2071 13:06:58.242795 APIC: 00: enabled 1
2072 13:06:58.242843 APIC: 14: enabled 1
2073 13:06:58.242891 APIC: 16: enabled 1
2074 13:06:58.242939 APIC: 10: enabled 1
2075 13:06:58.242987 APIC: 12: enabled 1
2076 13:06:58.243035 APIC: 09: enabled 1
2077 13:06:58.243083 APIC: 01: enabled 1
2078 13:06:58.243131 APIC: 08: enabled 1
2079 13:06:58.243179 PCI: 01:00.0: enabled 1
2080 13:06:58.243227 BS: BS_DEV_INIT run times (exec / console): 13 / 1126 ms
2081 13:06:58.243276 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2082 13:06:58.243325 ELOG: NV offset 0xf20000 size 0x4000
2083 13:06:58.243374 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2084 13:06:58.243424 ELOG: Event(17) added with size 13 at 2024-06-06 13:06:56 UTC
2085 13:06:58.243473 ELOG: Event(92) added with size 9 at 2024-06-06 13:06:56 UTC
2086 13:06:58.243521 ELOG: Event(93) added with size 9 at 2024-06-06 13:06:56 UTC
2087 13:06:58.243570 ELOG: Event(9E) added with size 10 at 2024-06-06 13:06:56 UTC
2088 13:06:58.243618 ELOG: Event(9F) added with size 14 at 2024-06-06 13:06:56 UTC
2089 13:06:58.243667 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2090 13:06:58.243716 ELOG: Event(A1) added with size 10 at 2024-06-06 13:06:56 UTC
2091 13:06:58.243764 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2092 13:06:58.243814 ELOG: Event(A0) added with size 9 at 2024-06-06 13:06:56 UTC
2093 13:06:58.243863 elog_add_boot_reason: Logged dev mode boot
2094 13:06:58.243912 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2095 13:06:58.243961 Finalize devices...
2096 13:06:58.244009 PCI: 00:16.0 final
2097 13:06:58.244057 PCI: 00:1f.2 final
2098 13:06:58.244105 GENERIC: 0.0 final
2099 13:06:58.244153 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2100 13:06:58.244201 GENERIC: 1.0 final
2101 13:06:58.244250 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2102 13:06:58.244300 Devices finalized
2103 13:06:58.244349 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2104 13:06:58.244398 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2105 13:06:58.244447 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2106 13:06:58.244497 ME: HFSTS1 : 0x80030045
2107 13:06:58.244545 ME: HFSTS2 : 0x30280116
2108 13:06:58.244593 ME: HFSTS3 : 0x00000050
2109 13:06:58.244641 ME: HFSTS4 : 0x00004000
2110 13:06:58.244690 ME: HFSTS5 : 0x00000000
2111 13:06:58.244754 ME: HFSTS6 : 0x40400006
2112 13:06:58.244815 ME: Manufacturing Mode : YES
2113 13:06:58.244903 ME: SPI Protection Mode Enabled : YES
2114 13:06:58.245000 ME: FPFs Committed : YES
2115 13:06:58.245087 ME: Manufacturing Vars Locked : NO
2116 13:06:58.245166 ME: FW Partition Table : OK
2117 13:06:58.245215 ME: Bringup Loader Failure : NO
2118 13:06:58.245264 ME: Firmware Init Complete : NO
2119 13:06:58.245313 ME: Boot Options Present : NO
2120 13:06:58.245362 ME: Update In Progress : NO
2121 13:06:58.245411 ME: D0i3 Support : YES
2122 13:06:58.245459 ME: Low Power State Enabled : NO
2123 13:06:58.245508 ME: CPU Replaced : YES
2124 13:06:58.245557 ME: CPU Replacement Valid : YES
2125 13:06:58.245605 ME: Current Working State : 5
2126 13:06:58.245654 ME: Current Operation State : 1
2127 13:06:58.245703 ME: Current Operation Mode : 3
2128 13:06:58.245751 ME: Error Code : 0
2129 13:06:58.245800 ME: Enhanced Debug Mode : NO
2130 13:06:58.245849 ME: CPU Debug Disabled : YES
2131 13:06:58.245898 ME: TXT Support : NO
2132 13:06:58.245947 ME: WP for RO is enabled : YES
2133 13:06:58.245996 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2134 13:06:58.246046 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2135 13:06:58.246282 ELOG: Event(91) added with size 10 at 2024-06-06 13:06:56 UTC
2136 13:06:58.246337 Chrome EC: clear events_b mask to 0x0000000020004000
2137 13:06:58.246388 Ramoops buffer: 0x100000@0x7689a000.
2138 13:06:58.246437 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2139 13:06:58.246487 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2140 13:06:58.246537 CBFS: 'fallback/slic' not found.
2141 13:06:58.246585 ACPI: Writing ACPI tables at 7686e000.
2142 13:06:58.246676 ACPI: * FACS
2143 13:06:58.246725 ACPI: * DSDT
2144 13:06:58.246774 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2145 13:06:58.246824 ACPI: * FADT
2146 13:06:58.246872 SCI is IRQ9
2147 13:06:58.246921 ACPI: added table 1/32, length now 40
2148 13:06:58.246969 ACPI: * SSDT
2149 13:06:58.247018 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2150 13:06:58.247066 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2151 13:06:58.247115 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2152 13:06:58.247164 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2153 13:06:58.247213 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2154 13:06:58.247263 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2155 13:06:58.247312 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2156 13:06:58.247361 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2157 13:06:58.247410 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2158 13:06:58.247458 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2159 13:06:58.247507 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2160 13:06:58.247556 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2161 13:06:58.247605 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2162 13:06:58.247653 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2163 13:06:58.247702 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2164 13:06:58.247751 PS2K: Passing 80 keymaps to kernel
2165 13:06:58.247800 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2166 13:06:58.247849 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2167 13:06:58.247897 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2168 13:06:58.247946 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2169 13:06:58.247995 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2170 13:06:58.248045 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2171 13:06:58.248094 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2172 13:06:58.248142 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2173 13:06:58.248192 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2174 13:06:58.248242 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2175 13:06:58.248291 ACPI: added table 2/32, length now 44
2176 13:06:58.248340 ACPI: * MCFG
2177 13:06:58.248389 ACPI: added table 3/32, length now 48
2178 13:06:58.248437 ACPI: * TPM2
2179 13:06:58.248486 TPM2 log created at 0x7685e000
2180 13:06:58.248534 ACPI: added table 4/32, length now 52
2181 13:06:58.248582 ACPI: * LPIT
2182 13:06:58.248631 ACPI: added table 5/32, length now 56
2183 13:06:58.248680 ACPI: * MADT
2184 13:06:58.248728 SCI is IRQ9
2185 13:06:58.248776 ACPI: added table 6/32, length now 60
2186 13:06:58.248825 cmd_reg from pmc_make_ipc_cmd 1052838
2187 13:06:58.248874 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2188 13:06:58.248924 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2189 13:06:58.248973 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2190 13:06:58.249021 PMC CrashLog size in discovery mode: 0xC00
2191 13:06:58.249070 cpu crashlog bar addr: 0x80640000
2192 13:06:58.249119 cpu discovery table offset: 0x6030
2193 13:06:58.249167 cpu_crashlog_discovery_table buffer count: 0x3
2194 13:06:58.249216 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2195 13:06:58.249265 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2196 13:06:58.249314 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2197 13:06:58.249364 PMC crashLog size in discovery mode : 0xC00
2198 13:06:58.249413 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2199 13:06:58.249463 discover mode PMC crashlog size adjusted to: 0x200
2200 13:06:58.249512 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2201 13:06:58.249561 discover mode PMC crashlog size adjusted to: 0x0
2202 13:06:58.249609 m_cpu_crashLog_size : 0x3480 bytes
2203 13:06:58.249657 CPU crashLog present.
2204 13:06:58.249706 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2205 13:06:58.249778 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2206 13:06:58.249833 current = 76877550
2207 13:06:58.249883 ACPI: * DMAR
2208 13:06:58.249932 ACPI: added table 7/32, length now 64
2209 13:06:58.249981 ACPI: added table 8/32, length now 68
2210 13:06:58.250030 ACPI: * HPET
2211 13:06:58.250078 ACPI: added table 9/32, length now 72
2212 13:06:58.250126 ACPI: done.
2213 13:06:58.250175 ACPI tables: 38528 bytes.
2214 13:06:58.250224 smbios_write_tables: 76858000
2215 13:06:58.250273 EC returned error result code 3
2216 13:06:58.250321 Couldn't obtain OEM name from CBI
2217 13:06:58.250370 Create SMBIOS type 16
2218 13:06:58.250419 Create SMBIOS type 17
2219 13:06:58.250467 Create SMBIOS type 20
2220 13:06:58.250515 GENERIC: 0.0 (WIFI Device)
2221 13:06:58.250563 SMBIOS tables: 2156 bytes.
2222 13:06:58.250619 Writing table forward entry at 0x00000500
2223 13:06:58.250699 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2224 13:06:58.250748 Writing coreboot table at 0x76892000
2225 13:06:58.250797 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2226 13:06:58.250846 1. 0000000000001000-000000000009ffff: RAM
2227 13:06:58.251089 2. 00000000000a0000-00000000000fffff: RESERVED
2228 13:06:58.251145 3. 0000000000100000-0000000076857fff: RAM
2229 13:06:58.251195 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2230 13:06:58.251245 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2231 13:06:58.251293 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2232 13:06:58.251342 7. 0000000077000000-00000000803fffff: RESERVED
2233 13:06:58.251390 8. 00000000c0000000-00000000cfffffff: RESERVED
2234 13:06:58.251438 9. 00000000f8000000-00000000f9ffffff: RESERVED
2235 13:06:58.251485 10. 00000000fb000000-00000000fb000fff: RESERVED
2236 13:06:58.251534 11. 00000000fc800000-00000000fe7fffff: RESERVED
2237 13:06:58.251583 12. 00000000feb00000-00000000feb7ffff: RESERVED
2238 13:06:58.251632 13. 00000000fec00000-00000000fecfffff: RESERVED
2239 13:06:58.251681 14. 00000000fed40000-00000000fed6ffff: RESERVED
2240 13:06:58.251730 15. 00000000fed80000-00000000fed87fff: RESERVED
2241 13:06:58.251781 16. 00000000fed90000-00000000fed92fff: RESERVED
2242 13:06:58.251831 17. 00000000feda0000-00000000feda1fff: RESERVED
2243 13:06:58.251880 18. 00000000fedc0000-00000000feddffff: RESERVED
2244 13:06:58.251929 19. 0000000100000000-000000027fbfffff: RAM
2245 13:06:58.251978 Passing 4 GPIOs to payload:
2246 13:06:58.252026 NAME | PORT | POLARITY | VALUE
2247 13:06:58.252074 lid | undefined | high | high
2248 13:06:58.252122 power | undefined | high | low
2249 13:06:58.252169 oprom | undefined | high | low
2250 13:06:58.252217 EC in RW | 0x00000151 | high | low
2251 13:06:58.252265 Board ID: 3
2252 13:06:58.252314 FW config: 0x131
2253 13:06:58.252362 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 3d74
2254 13:06:58.252410 coreboot table: 1764 bytes.
2255 13:06:58.252456 IMD ROOT 0. 0x76fff000 0x00001000
2256 13:06:58.252504 IMD SMALL 1. 0x76ffe000 0x00001000
2257 13:06:58.252552 FSP MEMORY 2. 0x76afe000 0x00500000
2258 13:06:58.252599 CONSOLE 3. 0x76ade000 0x00020000
2259 13:06:58.252646 RO MCACHE 4. 0x76add000 0x00000fd8
2260 13:06:58.252694 FMAP 5. 0x76adc000 0x0000064a
2261 13:06:58.252742 TIME STAMP 6. 0x76adb000 0x00000910
2262 13:06:58.252790 VBOOT WORK 7. 0x76ac7000 0x00014000
2263 13:06:58.252854 MEM INFO 8. 0x76ac6000 0x000003b8
2264 13:06:58.252915 ROMSTG STCK 9. 0x76ac5000 0x00001000
2265 13:06:58.252963 AFTER CAR 10. 0x76ab9000 0x0000c000
2266 13:06:58.253011 RAMSTAGE 11. 0x76a2f000 0x0008a000
2267 13:06:58.253059 ACPI BERT 12. 0x76a1f000 0x00010000
2268 13:06:58.253106 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2269 13:06:58.253154 REFCODE 14. 0x769af000 0x0006f000
2270 13:06:58.253202 SMM BACKUP 15. 0x7699f000 0x00010000
2271 13:06:58.253249 IGD OPREGION16. 0x7699a000 0x00004203
2272 13:06:58.253297 RAMOOPS 17. 0x7689a000 0x00100000
2273 13:06:58.253344 COREBOOT 18. 0x76892000 0x00008000
2274 13:06:58.253392 ACPI 19. 0x7686e000 0x00024000
2275 13:06:58.253440 TPM2 TCGLOG20. 0x7685e000 0x00010000
2276 13:06:58.253487 PMC CRASHLOG21. 0x7685d000 0x00000c00
2277 13:06:58.253534 CPU CRASHLOG22. 0x76859000 0x00003480
2278 13:06:58.253582 SMBIOS 23. 0x76858000 0x00001000
2279 13:06:58.253630 IMD small region:
2280 13:06:58.253679 IMD ROOT 0. 0x76ffec00 0x00000400
2281 13:06:58.253726 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2282 13:06:58.253774 VPD 2. 0x76ffeb60 0x0000006c
2283 13:06:58.253822 POWER STATE 3. 0x76ffeb00 0x00000044
2284 13:06:58.253869 ROMSTAGE 4. 0x76ffeae0 0x00000004
2285 13:06:58.253917 ACPI GNVS 5. 0x76ffea80 0x00000048
2286 13:06:58.253965 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2287 13:06:58.254014 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2288 13:06:58.254106 MTRR: Physical address space:
2289 13:06:58.254158 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2290 13:06:58.254210 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2291 13:06:58.254261 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2292 13:06:58.254312 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2293 13:06:58.254362 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2294 13:06:58.254426 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2295 13:06:58.254475 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2296 13:06:58.254541 MTRR: Fixed MSR 0x250 0x0606060606060606
2297 13:06:58.254590 MTRR: Fixed MSR 0x258 0x0606060606060606
2298 13:06:58.254665 MTRR: Fixed MSR 0x259 0x0000000000000000
2299 13:06:58.254714 MTRR: Fixed MSR 0x268 0x0606060606060606
2300 13:06:58.254763 MTRR: Fixed MSR 0x269 0x0606060606060606
2301 13:06:58.254811 MTRR: Fixed MSR 0x26a 0x0606060606060606
2302 13:06:58.254860 MTRR: Fixed MSR 0x26b 0x0606060606060606
2303 13:06:58.254908 MTRR: Fixed MSR 0x26c 0x0606060606060606
2304 13:06:58.254975 MTRR: Fixed MSR 0x26d 0x0606060606060606
2305 13:06:58.255063 MTRR: Fixed MSR 0x26e 0x0606060606060606
2306 13:06:58.255118 MTRR: Fixed MSR 0x26f 0x0606060606060606
2307 13:06:58.255167 call enable_fixed_mtrr()
2308 13:06:58.255215 CPU physical address size: 39 bits
2309 13:06:58.255280 MTRR: default type WB/UC MTRR counts: 6/6.
2310 13:06:58.255342 MTRR: UC selected as default type.
2311 13:06:58.255390 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2312 13:06:58.255438 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2313 13:06:58.255487 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2314 13:06:58.255536 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2315 13:06:58.255585 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2316 13:06:58.255633 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2317 13:06:58.255682 MTRR: Fixed MSR 0x250 0x0606060606060606
2318 13:06:58.255919 MTRR: Fixed MSR 0x258 0x0606060606060606
2319 13:06:58.255973 MTRR: Fixed MSR 0x259 0x0000000000000000
2320 13:06:58.256023 MTRR: Fixed MSR 0x268 0x0606060606060606
2321 13:06:58.256071 MTRR: Fixed MSR 0x269 0x0606060606060606
2322 13:06:58.256119 MTRR: Fixed MSR 0x26a 0x0606060606060606
2323 13:06:58.256167 MTRR: Fixed MSR 0x26b 0x0606060606060606
2324 13:06:58.256215 MTRR: Fixed MSR 0x26c 0x0606060606060606
2325 13:06:58.256263 MTRR: Fixed MSR 0x26d 0x0606060606060606
2326 13:06:58.256311 MTRR: Fixed MSR 0x26e 0x0606060606060606
2327 13:06:58.256359 MTRR: Fixed MSR 0x26f 0x0606060606060606
2328 13:06:58.256407 MTRR: Fixed MSR 0x250 0x0606060606060606
2329 13:06:58.256454 MTRR: Fixed MSR 0x250 0x0606060606060606
2330 13:06:58.256502 call enable_fixed_mtrr()
2331 13:06:58.256551 MTRR: Fixed MSR 0x258 0x0606060606060606
2332 13:06:58.256614 MTRR: Fixed MSR 0x259 0x0000000000000000
2333 13:06:58.256677 MTRR: Fixed MSR 0x268 0x0606060606060606
2334 13:06:58.256725 MTRR: Fixed MSR 0x269 0x0606060606060606
2335 13:06:58.256773 MTRR: Fixed MSR 0x250 0x0606060606060606
2336 13:06:58.256822 MTRR: Fixed MSR 0x258 0x0606060606060606
2337 13:06:58.256869 MTRR: Fixed MSR 0x259 0x0000000000000000
2338 13:06:58.256917 MTRR: Fixed MSR 0x268 0x0606060606060606
2339 13:06:58.256964 MTRR: Fixed MSR 0x269 0x0606060606060606
2340 13:06:58.257012 MTRR: Fixed MSR 0x26a 0x0606060606060606
2341 13:06:58.257060 MTRR: Fixed MSR 0x26b 0x0606060606060606
2342 13:06:58.257107 MTRR: Fixed MSR 0x26c 0x0606060606060606
2343 13:06:58.257154 MTRR: Fixed MSR 0x26d 0x0606060606060606
2344 13:06:58.257202 MTRR: Fixed MSR 0x26e 0x0606060606060606
2345 13:06:58.257250 MTRR: Fixed MSR 0x26f 0x0606060606060606
2346 13:06:58.257297 MTRR: Fixed MSR 0x250 0x0606060606060606
2347 13:06:58.257345 call enable_fixed_mtrr()
2348 13:06:58.257392 CPU physical address size: 39 bits
2349 13:06:58.257440 MTRR: Fixed MSR 0x258 0x0606060606060606
2350 13:06:58.257488 MTRR: Fixed MSR 0x259 0x0000000000000000
2351 13:06:58.257535 MTRR: Fixed MSR 0x268 0x0606060606060606
2352 13:06:58.257582 MTRR: Fixed MSR 0x269 0x0606060606060606
2353 13:06:58.257631 CPU physical address size: 39 bits
2354 13:06:58.257679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2355 13:06:58.257727 MTRR: Fixed MSR 0x250 0x0606060606060606
2356 13:06:58.257775 MTRR: Fixed MSR 0x258 0x0606060606060606
2357 13:06:58.257871 MTRR: Fixed MSR 0x259 0x0000000000000000
2358 13:06:58.257924 MTRR: Fixed MSR 0x268 0x0606060606060606
2359 13:06:58.257973 MTRR: Fixed MSR 0x269 0x0606060606060606
2360 13:06:58.258022 MTRR: Fixed MSR 0x26a 0x0606060606060606
2361 13:06:58.258071 MTRR: Fixed MSR 0x26b 0x0606060606060606
2362 13:06:58.258120 MTRR: Fixed MSR 0x26c 0x0606060606060606
2363 13:06:58.258169 MTRR: Fixed MSR 0x26d 0x0606060606060606
2364 13:06:58.258230 MTRR: Fixed MSR 0x26e 0x0606060606060606
2365 13:06:58.258278 MTRR: Fixed MSR 0x26f 0x0606060606060606
2366 13:06:58.258326 MTRR: Fixed MSR 0x250 0x0606060606060606
2367 13:06:58.258374 MTRR: Fixed MSR 0x258 0x0606060606060606
2368 13:06:58.258421 MTRR: Fixed MSR 0x259 0x0000000000000000
2369 13:06:58.258470 MTRR: Fixed MSR 0x268 0x0606060606060606
2370 13:06:58.258518 MTRR: Fixed MSR 0x269 0x0606060606060606
2371 13:06:58.258565 MTRR: Fixed MSR 0x26a 0x0606060606060606
2372 13:06:58.258641 MTRR: Fixed MSR 0x26b 0x0606060606060606
2373 13:06:58.258707 MTRR: Fixed MSR 0x26c 0x0606060606060606
2374 13:06:58.258755 MTRR: Fixed MSR 0x26d 0x0606060606060606
2375 13:06:58.258818 MTRR: Fixed MSR 0x26e 0x0606060606060606
2376 13:06:58.258881 MTRR: Fixed MSR 0x26f 0x0606060606060606
2377 13:06:58.258928 MTRR: Fixed MSR 0x26a 0x0606060606060606
2378 13:06:58.258976 call enable_fixed_mtrr()
2379 13:06:58.259024 call enable_fixed_mtrr()
2380 13:06:58.259072 MTRR: Fixed MSR 0x26b 0x0606060606060606
2381 13:06:58.259119 MTRR: Fixed MSR 0x26c 0x0606060606060606
2382 13:06:58.259167 MTRR: Fixed MSR 0x26d 0x0606060606060606
2383 13:06:58.259214 MTRR: Fixed MSR 0x26e 0x0606060606060606
2384 13:06:58.259262 MTRR: Fixed MSR 0x26f 0x0606060606060606
2385 13:06:58.259311 CPU physical address size: 39 bits
2386 13:06:58.259359 call enable_fixed_mtrr()
2387 13:06:58.259407 CPU physical address size: 39 bits
2388 13:06:58.259455 CPU physical address size: 39 bits
2389 13:06:58.259503 MTRR: Fixed MSR 0x258 0x0606060606060606
2390 13:06:58.259551 MTRR: Fixed MSR 0x26b 0x0606060606060606
2391 13:06:58.259598 MTRR: Fixed MSR 0x259 0x0000000000000000
2392 13:06:58.259646 MTRR: Fixed MSR 0x268 0x0606060606060606
2393 13:06:58.259693 MTRR: Fixed MSR 0x269 0x0606060606060606
2394 13:06:58.259741 MTRR: Fixed MSR 0x26a 0x0606060606060606
2395 13:06:58.259789 MTRR: Fixed MSR 0x26b 0x0606060606060606
2396 13:06:58.259837 MTRR: Fixed MSR 0x26c 0x0606060606060606
2397 13:06:58.259886 MTRR: Fixed MSR 0x26d 0x0606060606060606
2398 13:06:58.259933 MTRR: Fixed MSR 0x26e 0x0606060606060606
2399 13:06:58.259982 MTRR: Fixed MSR 0x26f 0x0606060606060606
2400 13:06:58.260029 MTRR: Fixed MSR 0x26c 0x0606060606060606
2401 13:06:58.260077 call enable_fixed_mtrr()
2402 13:06:58.260125 MTRR: Fixed MSR 0x26d 0x0606060606060606
2403 13:06:58.260173 MTRR: Fixed MSR 0x26e 0x0606060606060606
2404 13:06:58.260221 MTRR: Fixed MSR 0x26f 0x0606060606060606
2405 13:06:58.260269 CPU physical address size: 39 bits
2406 13:06:58.260317 call enable_fixed_mtrr()
2407 13:06:58.260364 CPU physical address size: 39 bits
2408 13:06:58.260412
2409 13:06:58.260460 MTRR check
2410 13:06:58.260507 Fixed MTRRs : Enabled
2411 13:06:58.260554 Variable MTRRs: Enabled
2412 13:06:58.260602
2413 13:06:58.260650 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2414 13:06:58.260699 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2415 13:06:58.260750 Checking segment from ROM address 0xffc26dac
2416 13:06:58.260816 Checking segment from ROM address 0xffc26dc8
2417 13:06:58.260865 Loading segment from ROM address 0xffc26dac
2418 13:06:58.260913 code (compression=1)
2419 13:06:58.260961 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2420 13:06:58.261208 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2421 13:06:58.261265 using LZMA
2422 13:06:58.261315 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2423 13:06:58.261364 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2424 13:06:58.261413 Loading segment from ROM address 0xffc26dc8
2425 13:06:58.261462 Entry Point 0x30000000
2426 13:06:58.261510 Loaded segments
2427 13:06:58.261558 BS: BS_PAYLOAD_LOAD run times (exec / console): 86 / 62 ms
2428 13:06:58.261607 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2429 13:06:58.261656 Finalizing chipset.
2430 13:06:58.261703 apm_control: Finalizing SMM.
2431 13:06:58.261751 APMC done.
2432 13:06:58.261798 HECI: CSE device 16.0 is hidden
2433 13:06:58.261846 HECI: CSE device 16.1 is disabled
2434 13:06:58.261893 HECI: CSE device 16.2 is disabled
2435 13:06:58.261941 HECI: CSE device 16.3 is disabled
2436 13:06:58.261988 HECI: CSE device 16.4 is disabled
2437 13:06:58.262036 HECI: CSE device 16.5 is disabled
2438 13:06:58.262085 HECI: CSE device 16.0 is hidden
2439 13:06:58.262133 CSE is disabled, cannot send End-of-Post (EOP) message
2440 13:06:58.262181 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2441 13:06:58.262230 mp_park_aps done after 0 msecs.
2442 13:06:58.262278 Jumping to boot code at 0x30000000(0x76892000)
2443 13:06:58.262326 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2444 13:06:58.262374
2445 13:06:58.262467
2446 13:06:58.262520
2447 13:06:58.262570 Starting depthcharge on Volmar...
2448 13:06:58.262628
2449 13:06:58.262692 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2450 13:06:58.262741
2451 13:06:58.262789 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2452 13:06:58.262837
2453 13:06:58.262885 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2454 13:06:58.262933
2455 13:06:58.262981 configure_storage: Failed to remap 1C:2
2456 13:06:58.263030
2457 13:06:58.263078 Wipe memory regions:
2458 13:06:58.263125
2459 13:06:58.263172 [0x00000000001000, 0x000000000a0000)
2460 13:06:58.263220
2461 13:06:58.263268 [0x00000000100000, 0x00000030000000)
2462 13:06:58.263315
2463 13:06:58.263362 [0x00000032668e60, 0x00000076858000)
2464 13:06:58.263676 end: 2.2.3 depthcharge-start (duration 00:00:01) [common]
2465 13:06:58.263762 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2466 13:06:58.263829 Setting prompt string to ['brya:']
2467 13:06:58.263898 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2468 13:06:58.318424
2469 13:06:58.321296 [0x00000100000000, 0x0000027fc00000)
2470 13:06:59.132828
2471 13:06:59.136365 ec_init: CrosEC protocol v3 supported (256, 256)
2472 13:06:59.744722
2473 13:06:59.745241 R8152: Initializing
2474 13:06:59.745784
2475 13:06:59.747932 Version 9 (ocp_data = 6010)
2476 13:06:59.748333
2477 13:06:59.751345 R8152: Done initializing
2478 13:06:59.751725
2479 13:06:59.754498 Adding net device
2480 13:07:00.057650
2481 13:07:00.059486 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2482 13:07:00.059920
2483 13:07:00.060249
2484 13:07:00.061064 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2486 13:07:00.162215 brya: tftpboot 192.168.201.1 14202726/tftp-deploy-g6s28jzy/kernel/bzImage 14202726/tftp-deploy-g6s28jzy/kernel/cmdline 14202726/tftp-deploy-g6s28jzy/ramdisk/ramdisk.cpio.gz
2487 13:07:00.162910 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2488 13:07:00.163356 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2489 13:07:00.167826 tftpboot 192.168.201.1 14202726/tftp-deploy-g6s28jzy/kernel/bzIploy-g6s28jzy/kernel/cmdline 14202726/tftp-deploy-g6s28jzy/ramdisk/ramdisk.cpio.gz
2490 13:07:00.168268
2491 13:07:00.168635 Waiting for link
2492 13:07:00.372118
2493 13:07:00.372601 done.
2494 13:07:00.372936
2495 13:07:00.373247 MAC: 00:e0:4c:68:01:74
2496 13:07:00.373539
2497 13:07:00.374134 Sending DHCP discover... done.
2498 13:07:00.374453
2499 13:07:00.377221 Waiting for reply... done.
2500 13:07:00.377651
2501 13:07:00.380445 Sending DHCP request... done.
2502 13:07:00.380870
2503 13:07:00.387594 Waiting for reply... done.
2504 13:07:00.388018
2505 13:07:00.388346 My ip is 192.168.201.16
2506 13:07:00.388681
2507 13:07:00.390884 The DHCP server ip is 192.168.201.1
2508 13:07:00.394440
2509 13:07:00.398127 TFTP server IP predefined by user: 192.168.201.1
2510 13:07:00.398553
2511 13:07:00.406506 Bootfile predefined by user: 14202726/tftp-deploy-g6s28jzy/kernel/bzImage
2512 13:07:00.406976
2513 13:07:00.408291 Sending tftp read request... done.
2514 13:07:00.408715
2515 13:07:00.417293 Waiting for the transfer...
2516 13:07:00.417991
2517 13:07:00.706700 00000000 ################################################################
2518 13:07:00.706844
2519 13:07:00.958260 00080000 ################################################################
2520 13:07:00.958398
2521 13:07:01.207395 00100000 ################################################################
2522 13:07:01.207510
2523 13:07:01.467732 00180000 ################################################################
2524 13:07:01.467860
2525 13:07:01.716355 00200000 ################################################################
2526 13:07:01.716466
2527 13:07:01.969619 00280000 ################################################################
2528 13:07:01.969763
2529 13:07:02.232342 00300000 ################################################################
2530 13:07:02.232481
2531 13:07:02.478838 00380000 ################################################################
2532 13:07:02.478976
2533 13:07:02.731069 00400000 ################################################################
2534 13:07:02.731184
2535 13:07:02.978983 00480000 ################################################################
2536 13:07:02.979097
2537 13:07:03.227132 00500000 ################################################################
2538 13:07:03.227238
2539 13:07:03.475459 00580000 ################################################################
2540 13:07:03.475576
2541 13:07:03.737779 00600000 ################################################################
2542 13:07:03.737910
2543 13:07:03.994743 00680000 ################################################################
2544 13:07:03.994855
2545 13:07:04.247404 00700000 ################################################################
2546 13:07:04.247527
2547 13:07:04.498073 00780000 ################################################################
2548 13:07:04.498186
2549 13:07:04.740385 00800000 ################################################################
2550 13:07:04.740500
2551 13:07:04.989324 00880000 ################################################################
2552 13:07:04.989436
2553 13:07:05.239471 00900000 ################################################################
2554 13:07:05.239603
2555 13:07:05.486616 00980000 ################################################################
2556 13:07:05.486724
2557 13:07:05.734942 00a00000 ################################################################
2558 13:07:05.735054
2559 13:07:05.981683 00a80000 ################################################################
2560 13:07:05.981800
2561 13:07:06.230149 00b00000 ################################################################
2562 13:07:06.230260
2563 13:07:06.479006 00b80000 ################################################################
2564 13:07:06.479121
2565 13:07:06.726925 00c00000 ################################################################
2566 13:07:06.727035
2567 13:07:06.976117 00c80000 ################################################################
2568 13:07:06.976230
2569 13:07:07.223931 00d00000 ################################################################
2570 13:07:07.224048
2571 13:07:07.475746 00d80000 ################################################################
2572 13:07:07.475854
2573 13:07:07.727645 00e00000 ################################################################
2574 13:07:07.727761
2575 13:07:07.978504 00e80000 ################################################################
2576 13:07:07.978682
2577 13:07:08.237878 00f00000 ################################################################
2578 13:07:08.237991
2579 13:07:08.484694 00f80000 ################################################################
2580 13:07:08.484808
2581 13:07:08.733277 01000000 ################################################################
2582 13:07:08.733392
2583 13:07:08.998128 01080000 ################################################################
2584 13:07:08.998242
2585 13:07:09.281045 01100000 ################################################################
2586 13:07:09.281170
2587 13:07:09.536970 01180000 ################################################################
2588 13:07:09.537080
2589 13:07:09.817888 01200000 ################################################################
2590 13:07:09.817996
2591 13:07:09.979187 01280000 #################################### done.
2592 13:07:09.979296
2593 13:07:09.982039 The bootfile was 19692544 bytes long.
2594 13:07:09.982121
2595 13:07:09.986309 Sending tftp read request... done.
2596 13:07:09.986397
2597 13:07:09.988931 Waiting for the transfer...
2598 13:07:09.989019
2599 13:07:10.282188 00000000 ################################################################
2600 13:07:10.282351
2601 13:07:10.552120 00080000 ################################################################
2602 13:07:10.552232
2603 13:07:10.800476 00100000 ################################################################
2604 13:07:10.800585
2605 13:07:11.061598 00180000 ################################################################
2606 13:07:11.061712
2607 13:07:11.325942 00200000 ################################################################
2608 13:07:11.326053
2609 13:07:11.578702 00280000 ################################################################
2610 13:07:11.578812
2611 13:07:11.825401 00300000 ################################################################
2612 13:07:11.825510
2613 13:07:12.074190 00380000 ################################################################
2614 13:07:12.074299
2615 13:07:12.325547 00400000 ################################################################
2616 13:07:12.325658
2617 13:07:12.574308 00480000 ################################################################
2618 13:07:12.574418
2619 13:07:12.821088 00500000 ################################################################
2620 13:07:12.821201
2621 13:07:13.071792 00580000 ################################################################
2622 13:07:13.071902
2623 13:07:13.321663 00600000 ################################################################
2624 13:07:13.321795
2625 13:07:13.578975 00680000 ################################################################
2626 13:07:13.579086
2627 13:07:13.861432 00700000 ################################################################
2628 13:07:13.861545
2629 13:07:14.130949 00780000 ################################################################
2630 13:07:14.131064
2631 13:07:14.379965 00800000 ################################################################
2632 13:07:14.380081
2633 13:07:14.626969 00880000 ################################################################
2634 13:07:14.627083
2635 13:07:14.875540 00900000 ################################################################
2636 13:07:14.875653
2637 13:07:15.109822 00980000 ################################################################
2638 13:07:15.109936
2639 13:07:15.298702 00a00000 #################################################### done.
2640 13:07:15.298816
2641 13:07:15.301698 Sending tftp read request... done.
2642 13:07:15.301776
2643 13:07:15.305479 Waiting for the transfer...
2644 13:07:15.305562
2645 13:07:15.305626 00000000 # done.
2646 13:07:15.309587
2647 13:07:15.315586 Command line loaded dynamically from TFTP file: 14202726/tftp-deploy-g6s28jzy/kernel/cmdline
2648 13:07:15.315746
2649 13:07:15.332739 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2650 13:07:15.339191
2651 13:07:15.341976 Shutting down all USB controllers.
2652 13:07:15.342236
2653 13:07:15.342375 Removing current net device
2654 13:07:15.342493
2655 13:07:15.345230 Finalizing coreboot
2656 13:07:15.345467
2657 13:07:15.352474 Exiting depthcharge with code 4 at timestamp: 27166866
2658 13:07:15.352767
2659 13:07:15.352947
2660 13:07:15.353110 Starting kernel ...
2661 13:07:15.353262
2662 13:07:15.353410
2663 13:07:15.354349 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2664 13:07:15.354627 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2665 13:07:15.354861 Setting prompt string to ['Linux version [0-9]']
2666 13:07:15.355082 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2667 13:07:15.355335 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2669 13:11:44.355565 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2671 13:11:44.356564 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2673 13:11:44.357384 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2676 13:11:44.358756 end: 2 depthcharge-action (duration 00:05:00) [common]
2678 13:11:44.359872 Cleaning after the job
2679 13:11:44.360029 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/ramdisk
2680 13:11:44.361291 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/kernel
2681 13:11:44.363570 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14202726/tftp-deploy-g6s28jzy/modules
2682 13:11:44.364870 start: 4.1 power-off (timeout 00:00:30) [common]
2683 13:11:44.365009 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-8', '--port=1', '--command=off']
2684 13:11:45.301550 >> Command sent successfully.
2685 13:11:45.316232 Returned 0 in 0 seconds
2686 13:11:45.417535 end: 4.1 power-off (duration 00:00:01) [common]
2688 13:11:45.418960 start: 4.2 read-feedback (timeout 00:09:59) [common]
2689 13:11:45.420103 Listened to connection for namespace 'common' for up to 1s
2691 13:11:45.421380 Listened to connection for namespace 'common' for up to 1s
2692 13:11:46.420831 Finalising connection for namespace 'common'
2693 13:11:46.421472 Disconnecting from shell: Finalise
2694 13:11:46.421871
2695 13:11:46.522969 end: 4.2 read-feedback (duration 00:00:01) [common]
2696 13:11:46.523582 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14202726
2697 13:11:46.544088 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14202726
2698 13:11:46.544242 JobError: Your job cannot terminate cleanly.