Boot log: asus-cx9400-volteer

    1 07:02:39.549989  lava-dispatcher, installed at version: 2023.01
    2 07:02:39.550288  start: 0 validate
    3 07:02:39.550417  Start time: 2023-03-22 07:02:39.550410+00:00 (UTC)
    4 07:02:39.550547  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:02:39.550678  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230317.0%2Famd64%2Frootfs.cpio.gz exists
    6 07:02:39.845930  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:02:39.846705  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:02:43.854861  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:02:43.855563  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 07:02:44.858864  validate duration: 5.31
   12 07:02:44.859171  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 07:02:44.859338  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 07:02:44.859438  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 07:02:44.859575  Not decompressing ramdisk as can be used compressed.
   16 07:02:44.859660  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230317.0/amd64/rootfs.cpio.gz
   17 07:02:44.859761  saving as /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/ramdisk/rootfs.cpio.gz
   18 07:02:44.859852  total size: 35758894 (34MB)
   19 07:02:44.860793  progress   0% (0MB)
   20 07:02:44.870119  progress   5% (1MB)
   21 07:02:44.879504  progress  10% (3MB)
   22 07:02:44.888663  progress  15% (5MB)
   23 07:02:44.898094  progress  20% (6MB)
   24 07:02:44.907261  progress  25% (8MB)
   25 07:02:44.916718  progress  30% (10MB)
   26 07:02:44.925812  progress  35% (11MB)
   27 07:02:44.934969  progress  40% (13MB)
   28 07:02:44.943920  progress  45% (15MB)
   29 07:02:44.952947  progress  50% (17MB)
   30 07:02:44.961824  progress  55% (18MB)
   31 07:02:44.970446  progress  60% (20MB)
   32 07:02:44.979060  progress  65% (22MB)
   33 07:02:44.987476  progress  70% (23MB)
   34 07:02:44.996115  progress  75% (25MB)
   35 07:02:45.004764  progress  80% (27MB)
   36 07:02:45.013235  progress  85% (29MB)
   37 07:02:45.021816  progress  90% (30MB)
   38 07:02:45.030250  progress  95% (32MB)
   39 07:02:45.038817  progress 100% (34MB)
   40 07:02:45.038983  34MB downloaded in 0.18s (190.38MB/s)
   41 07:02:45.039204  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 07:02:45.039498  end: 1.1 download-retry (duration 00:00:00) [common]
   44 07:02:45.039620  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 07:02:45.039722  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 07:02:45.039833  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 07:02:45.039903  saving as /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/kernel/bzImage
   48 07:02:45.039967  total size: 11637120 (11MB)
   49 07:02:45.040057  No compression specified
   50 07:02:45.042078  progress   0% (0MB)
   51 07:02:45.044859  progress   5% (0MB)
   52 07:02:45.047847  progress  10% (1MB)
   53 07:02:45.050770  progress  15% (1MB)
   54 07:02:45.053657  progress  20% (2MB)
   55 07:02:45.056476  progress  25% (2MB)
   56 07:02:45.059365  progress  30% (3MB)
   57 07:02:45.062285  progress  35% (3MB)
   58 07:02:45.065138  progress  40% (4MB)
   59 07:02:45.067875  progress  45% (5MB)
   60 07:02:45.070794  progress  50% (5MB)
   61 07:02:45.073675  progress  55% (6MB)
   62 07:02:45.076554  progress  60% (6MB)
   63 07:02:45.079281  progress  65% (7MB)
   64 07:02:45.082124  progress  70% (7MB)
   65 07:02:45.084959  progress  75% (8MB)
   66 07:02:45.087792  progress  80% (8MB)
   67 07:02:45.090573  progress  85% (9MB)
   68 07:02:45.093366  progress  90% (10MB)
   69 07:02:45.096191  progress  95% (10MB)
   70 07:02:45.099043  progress 100% (11MB)
   71 07:02:45.099165  11MB downloaded in 0.06s (187.49MB/s)
   72 07:02:45.099314  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 07:02:45.099557  end: 1.2 download-retry (duration 00:00:00) [common]
   75 07:02:45.099649  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 07:02:45.099741  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 07:02:45.099853  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 07:02:45.099924  saving as /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/modules/modules.tar
   79 07:02:45.099988  total size: 499012 (0MB)
   80 07:02:45.100051  Using unxz to decompress xz
   81 07:02:45.103236  progress   6% (0MB)
   82 07:02:45.103636  progress  13% (0MB)
   83 07:02:45.103912  progress  19% (0MB)
   84 07:02:45.105385  progress  26% (0MB)
   85 07:02:45.107475  progress  32% (0MB)
   86 07:02:45.109416  progress  39% (0MB)
   87 07:02:45.111380  progress  45% (0MB)
   88 07:02:45.113340  progress  52% (0MB)
   89 07:02:45.115216  progress  59% (0MB)
   90 07:02:45.117235  progress  65% (0MB)
   91 07:02:45.119162  progress  72% (0MB)
   92 07:02:45.121170  progress  78% (0MB)
   93 07:02:45.123100  progress  85% (0MB)
   94 07:02:45.124978  progress  91% (0MB)
   95 07:02:45.127014  progress  98% (0MB)
   96 07:02:45.134318  0MB downloaded in 0.03s (13.87MB/s)
   97 07:02:45.134591  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 07:02:45.134859  end: 1.3 download-retry (duration 00:00:00) [common]
  100 07:02:45.134957  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 07:02:45.135054  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 07:02:45.135143  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 07:02:45.135231  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 07:02:45.135411  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh
  105 07:02:45.135519  makedir: /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin
  106 07:02:45.135608  makedir: /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/tests
  107 07:02:45.135689  makedir: /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/results
  108 07:02:45.135799  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-add-keys
  109 07:02:45.135935  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-add-sources
  110 07:02:45.136055  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-background-process-start
  111 07:02:45.136170  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-background-process-stop
  112 07:02:45.136284  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-common-functions
  113 07:02:45.136395  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-echo-ipv4
  114 07:02:45.136510  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-install-packages
  115 07:02:45.136623  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-installed-packages
  116 07:02:45.136735  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-os-build
  117 07:02:45.136847  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-probe-channel
  118 07:02:45.136961  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-probe-ip
  119 07:02:45.137071  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-target-ip
  120 07:02:45.137182  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-target-mac
  121 07:02:45.137292  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-target-storage
  122 07:02:45.137405  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-case
  123 07:02:45.137517  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-event
  124 07:02:45.137632  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-feedback
  125 07:02:45.137769  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-raise
  126 07:02:45.137900  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-reference
  127 07:02:45.138012  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-runner
  128 07:02:45.138121  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-set
  129 07:02:45.138273  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-test-shell
  130 07:02:45.138390  Updating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-install-packages (oe)
  131 07:02:45.138506  Updating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/bin/lava-installed-packages (oe)
  132 07:02:45.138609  Creating /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/environment
  133 07:02:45.138700  LAVA metadata
  134 07:02:45.138775  - LAVA_JOB_ID=9726688
  135 07:02:45.138845  - LAVA_DISPATCHER_IP=192.168.201.1
  136 07:02:45.138947  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 07:02:45.139019  skipped lava-vland-overlay
  138 07:02:45.139099  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 07:02:45.139186  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 07:02:45.139254  skipped lava-multinode-overlay
  141 07:02:45.139331  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 07:02:45.139421  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 07:02:45.139498  Loading test definitions
  144 07:02:45.139596  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 07:02:45.139671  Using /lava-9726688 at stage 0
  146 07:02:45.139921  uuid=9726688_1.4.2.3.1 testdef=None
  147 07:02:45.140011  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 07:02:45.140100  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 07:02:45.140583  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 07:02:45.140819  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 07:02:45.141358  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 07:02:45.141600  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 07:02:45.142174  runner path: /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/0/tests/0_cros-ec test_uuid 9726688_1.4.2.3.1
  156 07:02:45.142340  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 07:02:45.142556  Creating lava-test-runner.conf files
  159 07:02:45.142621  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726688/lava-overlay-vxf8omdh/lava-9726688/0 for stage 0
  160 07:02:45.142704  - 0_cros-ec
  161 07:02:45.142799  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 07:02:45.142890  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  163 07:02:45.148485  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 07:02:45.148597  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  165 07:02:45.148688  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 07:02:45.148776  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 07:02:45.148866  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  168 07:02:45.914880  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  169 07:02:45.915236  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  170 07:02:45.915351  extracting modules file /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726688/extract-overlay-ramdisk-98sh73hm/ramdisk
  171 07:02:45.928390  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 07:02:45.928529  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  173 07:02:45.928625  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726688/compress-overlay-vz0k5fzz/overlay-1.4.2.4.tar.gz to ramdisk
  174 07:02:45.928700  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726688/compress-overlay-vz0k5fzz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726688/extract-overlay-ramdisk-98sh73hm/ramdisk
  175 07:02:45.932062  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 07:02:45.932174  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  177 07:02:45.932269  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 07:02:45.932363  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  179 07:02:45.932448  Building ramdisk /var/lib/lava/dispatcher/tmp/9726688/extract-overlay-ramdisk-98sh73hm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726688/extract-overlay-ramdisk-98sh73hm/ramdisk
  180 07:02:46.189410  >> 187987 blocks

  181 07:02:49.486711  rename /var/lib/lava/dispatcher/tmp/9726688/extract-overlay-ramdisk-98sh73hm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/ramdisk/ramdisk.cpio.gz
  182 07:02:49.487141  end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
  183 07:02:49.487278  start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
  184 07:02:49.487397  start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
  185 07:02:49.487506  No mkimage arch provided, not using FIT.
  186 07:02:49.487610  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 07:02:49.487711  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 07:02:49.487826  end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
  189 07:02:49.487939  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
  190 07:02:49.488026  No LXC device requested
  191 07:02:49.488127  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 07:02:49.488238  start: 1.6 deploy-device-env (timeout 00:09:55) [common]
  193 07:02:49.488333  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 07:02:49.488430  Checking files for TFTP limit of 4294967296 bytes.
  195 07:02:49.488859  end: 1 tftp-deploy (duration 00:00:05) [common]
  196 07:02:49.488981  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 07:02:49.489099  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 07:02:49.489239  substitutions:
  199 07:02:49.489314  - {DTB}: None
  200 07:02:49.489396  - {INITRD}: 9726688/tftp-deploy-q6gi0v92/ramdisk/ramdisk.cpio.gz
  201 07:02:49.489599  - {KERNEL}: 9726688/tftp-deploy-q6gi0v92/kernel/bzImage
  202 07:02:49.489683  - {LAVA_MAC}: None
  203 07:02:49.489760  - {PRESEED_CONFIG}: None
  204 07:02:49.489877  - {PRESEED_LOCAL}: None
  205 07:02:49.489973  - {RAMDISK}: 9726688/tftp-deploy-q6gi0v92/ramdisk/ramdisk.cpio.gz
  206 07:02:49.490039  - {ROOT_PART}: None
  207 07:02:49.490101  - {ROOT}: None
  208 07:02:49.490186  - {SERVER_IP}: 192.168.201.1
  209 07:02:49.490244  - {TEE}: None
  210 07:02:49.490302  Parsed boot commands:
  211 07:02:49.490361  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 07:02:49.490599  Parsed boot commands: tftpboot 192.168.201.1 9726688/tftp-deploy-q6gi0v92/kernel/bzImage 9726688/tftp-deploy-q6gi0v92/kernel/cmdline 9726688/tftp-deploy-q6gi0v92/ramdisk/ramdisk.cpio.gz
  213 07:02:49.490690  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 07:02:49.490781  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 07:02:49.490877  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 07:02:49.490961  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 07:02:49.491030  Not connected, no need to disconnect.
  218 07:02:49.491107  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 07:02:49.491190  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 07:02:49.491256  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
  221 07:02:49.494678  Setting prompt string to ['lava-test: # ']
  222 07:02:49.495130  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 07:02:49.495313  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 07:02:49.495482  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 07:02:49.495618  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 07:02:49.495905  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
  227 07:02:54.626903  >> Command sent successfully.

  228 07:02:54.629144  Returned 0 in 5 seconds
  229 07:02:54.729944  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 07:02:54.730297  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 07:02:54.730401  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 07:02:54.730495  Setting prompt string to 'Starting depthcharge on Voema...'
  234 07:02:54.730561  Changing prompt to 'Starting depthcharge on Voema...'
  235 07:02:54.730628  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  236 07:02:54.730899  [Enter `^Ec?' for help]

  237 07:02:56.330196  

  238 07:02:56.330448  

  239 07:02:56.340681  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  240 07:02:56.346893  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  241 07:02:56.350178  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  242 07:02:56.353669  CPU: AES supported, TXT NOT supported, VT supported

  243 07:02:56.360144  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  244 07:02:56.366848  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  245 07:02:56.369890  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  246 07:02:56.373715  VBOOT: Loading verstage.

  247 07:02:56.380137  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  248 07:02:56.383268  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  249 07:02:56.387108  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  250 07:02:56.397584  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  251 07:02:56.404212  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  252 07:02:56.404761  

  253 07:02:56.405111  

  254 07:02:56.417390  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  255 07:02:56.431254  Probing TPM: . done!

  256 07:02:56.434811  TPM ready after 0 ms

  257 07:02:56.437917  Connected to device vid:did:rid of 1ae0:0028:00

  258 07:02:56.449116  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  259 07:02:56.455475  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  260 07:02:56.459168  Initialized TPM device CR50 revision 0

  261 07:02:56.509593  tlcl_send_startup: Startup return code is 0

  262 07:02:56.509924  TPM: setup succeeded

  263 07:02:56.523666  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  264 07:02:56.538007  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 07:02:56.550429  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  266 07:02:56.560579  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 07:02:56.564310  Chrome EC: UHEPI supported

  268 07:02:56.567689  Phase 1

  269 07:02:56.571117  FMAP: area GBB found @ 1805000 (458752 bytes)

  270 07:02:56.581123  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  271 07:02:56.587699  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  272 07:02:56.594404  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 07:02:56.600817  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 07:02:56.604298  Recovery requested (1009000e)

  275 07:02:56.607391  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 07:02:56.619678  tlcl_extend: response is 0

  277 07:02:56.625837  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 07:02:56.636224  tlcl_extend: response is 0

  279 07:02:56.642302  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 07:02:56.648980  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 07:02:56.655550  BS: verstage times (exec / console): total (unknown) / 142 ms

  282 07:02:56.655774  

  283 07:02:56.655957  

  284 07:02:56.669260  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 07:02:56.675279  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 07:02:56.678922  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 07:02:56.685511  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 07:02:56.688787  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 07:02:56.691771  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 07:02:56.695073  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  291 07:02:56.698280  TCO_STS:   0000 0000

  292 07:02:56.701823  GEN_PMCON: d0015038 00002200

  293 07:02:56.705096  GBLRST_CAUSE: 00000000 00000000

  294 07:02:56.708276  HPR_CAUSE0: 00000000

  295 07:02:56.708499  prev_sleep_state 5

  296 07:02:56.711760  Boot Count incremented to 18012

  297 07:02:56.718888  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 07:02:56.724875  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 07:02:56.735086  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 07:02:56.741477  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 07:02:56.744793  Chrome EC: UHEPI supported

  302 07:02:56.751188  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 07:02:56.763137  Probing TPM:  done!

  304 07:02:56.769625  Connected to device vid:did:rid of 1ae0:0028:00

  305 07:02:56.780544  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  306 07:02:56.786874  Initialized TPM device CR50 revision 0

  307 07:02:56.796271  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 07:02:56.803100  MRC: Hash idx 0x100b comparison successful.

  309 07:02:56.806697  MRC cache found, size faa8

  310 07:02:56.806942  bootmode is set to: 2

  311 07:02:56.809533  SPD index = 0

  312 07:02:56.816438  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 07:02:56.819462  SPD: module type is LPDDR4X

  314 07:02:56.822944  SPD: module part number is MT53E512M64D4NW-046

  315 07:02:56.829783  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 07:02:56.833032  SPD: device width 16 bits, bus width 16 bits

  317 07:02:56.839404  SPD: module size is 1024 MB (per channel)

  318 07:02:57.271416  CBMEM:

  319 07:02:57.275170  IMD: root @ 0x76fff000 254 entries.

  320 07:02:57.278614  IMD: root @ 0x76ffec00 62 entries.

  321 07:02:57.281375  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 07:02:57.288128  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 07:02:57.291690  External stage cache:

  324 07:02:57.294794  IMD: root @ 0x7b3ff000 254 entries.

  325 07:02:57.297913  IMD: root @ 0x7b3fec00 62 entries.

  326 07:02:57.313170  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 07:02:57.319959  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 07:02:57.326529  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 07:02:57.340569  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 07:02:57.347011  cse_lite: Skip switching to RW in the recovery path

  331 07:02:57.347270  8 DIMMs found

  332 07:02:57.350423  SMM Memory Map

  333 07:02:57.350670  SMRAM       : 0x7b000000 0x800000

  334 07:02:57.354472   Subregion 0: 0x7b000000 0x200000

  335 07:02:57.358593   Subregion 1: 0x7b200000 0x200000

  336 07:02:57.361178   Subregion 2: 0x7b400000 0x400000

  337 07:02:57.364989  top_of_ram = 0x77000000

  338 07:02:57.370942  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 07:02:57.374696  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 07:02:57.380952  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 07:02:57.384322  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 07:02:57.394719  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 07:02:57.401508  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 07:02:57.411040  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 07:02:57.414006  Processing 211 relocs. Offset value of 0x74c0b000

  346 07:02:57.423423  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 07:02:57.429645  

  348 07:02:57.429889  

  349 07:02:57.439397  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 07:02:57.442826  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 07:02:57.453025  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 07:02:57.459078  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 07:02:57.465738  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 07:02:57.472754  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 07:02:57.519304  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 07:02:57.525856  Processing 5008 relocs. Offset value of 0x75d98000

  357 07:02:57.529236  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 07:02:57.533126  

  359 07:02:57.533289  

  360 07:02:57.542723  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 07:02:57.542888  Normal boot

  362 07:02:57.545586  FW_CONFIG value is 0x804c02

  363 07:02:57.549207  PCI: 00:07.0 disabled by fw_config

  364 07:02:57.552583  PCI: 00:07.1 disabled by fw_config

  365 07:02:57.556192  PCI: 00:0d.2 disabled by fw_config

  366 07:02:57.559160  PCI: 00:1c.7 disabled by fw_config

  367 07:02:57.565930  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 07:02:57.572827  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 07:02:57.575921  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 07:02:57.579351  GENERIC: 0.0 disabled by fw_config

  371 07:02:57.585648  GENERIC: 1.0 disabled by fw_config

  372 07:02:57.589074  fw_config match found: DB_USB=USB3_ACTIVE

  373 07:02:57.592474  fw_config match found: DB_USB=USB3_ACTIVE

  374 07:02:57.595441  fw_config match found: DB_USB=USB3_ACTIVE

  375 07:02:57.602662  fw_config match found: DB_USB=USB3_ACTIVE

  376 07:02:57.605701  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 07:02:57.612711  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 07:02:57.622707  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 07:02:57.628663  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 07:02:57.632184  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 07:02:57.639068  microcode: Update skipped, already up-to-date

  382 07:02:57.645413  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 07:02:57.672969  Detected 4 core, 8 thread CPU.

  384 07:02:57.676189  Setting up SMI for CPU

  385 07:02:57.680087  IED base = 0x7b400000

  386 07:02:57.680441  IED size = 0x00400000

  387 07:02:57.683130  Will perform SMM setup.

  388 07:02:57.690023  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 07:02:57.696717  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 07:02:57.702832  Processing 16 relocs. Offset value of 0x00030000

  391 07:02:57.706530  Attempting to start 7 APs

  392 07:02:57.709498  Waiting for 10ms after sending INIT.

  393 07:02:57.725032  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  394 07:02:57.728080  AP: slot 7 apic_id 3.

  395 07:02:57.731694  AP: slot 4 apic_id 2.

  396 07:02:57.732060  AP: slot 5 apic_id 4.

  397 07:02:57.735653  AP: slot 2 apic_id 5.

  398 07:02:57.738391  AP: slot 3 apic_id 7.

  399 07:02:57.738865  AP: slot 6 apic_id 6.

  400 07:02:57.739268  done.

  401 07:02:57.744922  Waiting for 2nd SIPI to complete...done.

  402 07:02:57.751674  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 07:02:57.758387  Processing 13 relocs. Offset value of 0x00038000

  404 07:02:57.761217  Unable to locate Global NVS

  405 07:02:57.767974  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 07:02:57.771175  Installing permanent SMM handler to 0x7b000000

  407 07:02:57.781591  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 07:02:57.784754  Processing 794 relocs. Offset value of 0x7b010000

  409 07:02:57.794549  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 07:02:57.798171  Processing 13 relocs. Offset value of 0x7b008000

  411 07:02:57.804996  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 07:02:57.810987  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 07:02:57.814507  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 07:02:57.821223  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 07:02:57.827514  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 07:02:57.834051  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 07:02:57.841179  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 07:02:57.843966  Unable to locate Global NVS

  419 07:02:57.850349  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 07:02:57.853937  Clearing SMI status registers

  421 07:02:57.856909  SMI_STS: PM1 

  422 07:02:57.857147  PM1_STS: PWRBTN 

  423 07:02:57.863771  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 07:02:57.866936  In relocation handler: CPU 0

  425 07:02:57.870557  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 07:02:57.877043  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 07:02:57.880639  Relocation complete.

  428 07:02:57.886722  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 07:02:57.889938  In relocation handler: CPU 1

  430 07:02:57.893762  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 07:02:57.896922  Relocation complete.

  432 07:02:57.903294  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  433 07:02:57.906835  In relocation handler: CPU 2

  434 07:02:57.909716  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  435 07:02:57.913292  Relocation complete.

  436 07:02:57.919964  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  437 07:02:57.923085  In relocation handler: CPU 5

  438 07:02:57.926219  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  439 07:02:57.929996  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  440 07:02:57.933000  Relocation complete.

  441 07:02:57.940085  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  442 07:02:57.943498  In relocation handler: CPU 6

  443 07:02:57.946160  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  444 07:02:57.953479  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  445 07:02:57.956073  Relocation complete.

  446 07:02:57.962913  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  447 07:02:57.966689  In relocation handler: CPU 3

  448 07:02:57.969901  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  449 07:02:57.972684  Relocation complete.

  450 07:02:57.979666  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  451 07:02:57.982420  In relocation handler: CPU 4

  452 07:02:57.985892  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  453 07:02:57.989536  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 07:02:57.992516  Relocation complete.

  455 07:02:57.999390  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  456 07:02:58.002384  In relocation handler: CPU 7

  457 07:02:58.005558  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  458 07:02:58.009072  Relocation complete.

  459 07:02:58.012905  Initializing CPU #0

  460 07:02:58.015449  CPU: vendor Intel device 806c1

  461 07:02:58.019274  CPU: family 06, model 8c, stepping 01

  462 07:02:58.023143  Clearing out pending MCEs

  463 07:02:58.023617  Setting up local APIC...

  464 07:02:58.026411   apic_id: 0x00 done.

  465 07:02:58.030277  Turbo is available but hidden

  466 07:02:58.033530  Turbo is available and visible

  467 07:02:58.036657  microcode: Update skipped, already up-to-date

  468 07:02:58.039858  CPU #0 initialized

  469 07:02:58.040345  Initializing CPU #5

  470 07:02:58.043092  Initializing CPU #2

  471 07:02:58.046249  CPU: vendor Intel device 806c1

  472 07:02:58.050041  CPU: family 06, model 8c, stepping 01

  473 07:02:58.053428  CPU: vendor Intel device 806c1

  474 07:02:58.056331  CPU: family 06, model 8c, stepping 01

  475 07:02:58.059679  Clearing out pending MCEs

  476 07:02:58.063161  Clearing out pending MCEs

  477 07:02:58.063609  Setting up local APIC...

  478 07:02:58.066097  Initializing CPU #6

  479 07:02:58.070502  Initializing CPU #3

  480 07:02:58.070950  Initializing CPU #1

  481 07:02:58.073474  CPU: vendor Intel device 806c1

  482 07:02:58.076367  CPU: family 06, model 8c, stepping 01

  483 07:02:58.079772  CPU: vendor Intel device 806c1

  484 07:02:58.086952  CPU: family 06, model 8c, stepping 01

  485 07:02:58.087400  Clearing out pending MCEs

  486 07:02:58.089790  Clearing out pending MCEs

  487 07:02:58.093018  Setting up local APIC...

  488 07:02:58.093467  Initializing CPU #7

  489 07:02:58.096073  Initializing CPU #4

  490 07:02:58.099249  CPU: vendor Intel device 806c1

  491 07:02:58.103372  CPU: family 06, model 8c, stepping 01

  492 07:02:58.106249  CPU: vendor Intel device 806c1

  493 07:02:58.109471  CPU: family 06, model 8c, stepping 01

  494 07:02:58.112917  Clearing out pending MCEs

  495 07:02:58.116075  Clearing out pending MCEs

  496 07:02:58.119254  Setting up local APIC...

  497 07:02:58.119716  Setting up local APIC...

  498 07:02:58.122720  Setting up local APIC...

  499 07:02:58.126352  Setting up local APIC...

  500 07:02:58.129850  CPU: vendor Intel device 806c1

  501 07:02:58.132646  CPU: family 06, model 8c, stepping 01

  502 07:02:58.135982   apic_id: 0x04 done.

  503 07:02:58.136443   apic_id: 0x05 done.

  504 07:02:58.142584  microcode: Update skipped, already up-to-date

  505 07:02:58.145723  microcode: Update skipped, already up-to-date

  506 07:02:58.149227  CPU #5 initialized

  507 07:02:58.149687   apic_id: 0x06 done.

  508 07:02:58.152655   apic_id: 0x07 done.

  509 07:02:58.156061  microcode: Update skipped, already up-to-date

  510 07:02:58.162505  microcode: Update skipped, already up-to-date

  511 07:02:58.162972  CPU #6 initialized

  512 07:02:58.165818   apic_id: 0x03 done.

  513 07:02:58.169124   apic_id: 0x02 done.

  514 07:02:58.172572  microcode: Update skipped, already up-to-date

  515 07:02:58.176365  microcode: Update skipped, already up-to-date

  516 07:02:58.179782  CPU #7 initialized

  517 07:02:58.182577  CPU #4 initialized

  518 07:02:58.183040  CPU #2 initialized

  519 07:02:58.186085  CPU #3 initialized

  520 07:02:58.189878  Clearing out pending MCEs

  521 07:02:58.190486  Setting up local APIC...

  522 07:02:58.192364   apic_id: 0x01 done.

  523 07:02:58.195702  microcode: Update skipped, already up-to-date

  524 07:02:58.198901  CPU #1 initialized

  525 07:02:58.202946  bsp_do_flight_plan done after 455 msecs.

  526 07:02:58.205778  CPU: frequency set to 4000 MHz

  527 07:02:58.208904  Enabling SMIs.

  528 07:02:58.215228  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  529 07:02:58.230814  SATAXPCIE1 indicates PCIe NVMe is present

  530 07:02:58.233603  Probing TPM:  done!

  531 07:02:58.236926  Connected to device vid:did:rid of 1ae0:0028:00

  532 07:02:58.247568  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  533 07:02:58.250761  Initialized TPM device CR50 revision 0

  534 07:02:58.254298  Enabling S0i3.4

  535 07:02:58.260920  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 07:02:58.264092  Found a VBT of 8704 bytes after decompression

  537 07:02:58.270836  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 07:02:58.277440  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 07:02:58.352754  FSPS returned 0

  540 07:02:58.356115  Executing Phase 1 of FspMultiPhaseSiInit

  541 07:02:58.365830  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 07:02:58.369567  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 07:02:58.372534  Raw Buffer output 0 00000511

  544 07:02:58.376267  Raw Buffer output 1 00000000

  545 07:02:58.379983  pmc_send_ipc_cmd succeeded

  546 07:02:58.386498  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 07:02:58.386966  Raw Buffer output 0 00000321

  548 07:02:58.389651  Raw Buffer output 1 00000000

  549 07:02:58.393737  pmc_send_ipc_cmd succeeded

  550 07:02:58.398864  Detected 4 core, 8 thread CPU.

  551 07:02:58.402043  Detected 4 core, 8 thread CPU.

  552 07:02:58.637020  Display FSP Version Info HOB

  553 07:02:58.639416  Reference Code - CPU = a.0.4c.31

  554 07:02:58.643039  uCode Version = 0.0.0.86

  555 07:02:58.646452  TXT ACM version = ff.ff.ff.ffff

  556 07:02:58.649428  Reference Code - ME = a.0.4c.31

  557 07:02:58.652881  MEBx version = 0.0.0.0

  558 07:02:58.656012  ME Firmware Version = Consumer SKU

  559 07:02:58.659341  Reference Code - PCH = a.0.4c.31

  560 07:02:58.662526  PCH-CRID Status = Disabled

  561 07:02:58.666700  PCH-CRID Original Value = ff.ff.ff.ffff

  562 07:02:58.669480  PCH-CRID New Value = ff.ff.ff.ffff

  563 07:02:58.672705  OPROM - RST - RAID = ff.ff.ff.ffff

  564 07:02:58.676122  PCH Hsio Version = 4.0.0.0

  565 07:02:58.679124  Reference Code - SA - System Agent = a.0.4c.31

  566 07:02:58.682507  Reference Code - MRC = 2.0.0.1

  567 07:02:58.685971  SA - PCIe Version = a.0.4c.31

  568 07:02:58.689415  SA-CRID Status = Disabled

  569 07:02:58.692508  SA-CRID Original Value = 0.0.0.1

  570 07:02:58.695939  SA-CRID New Value = 0.0.0.1

  571 07:02:58.699485  OPROM - VBIOS = ff.ff.ff.ffff

  572 07:02:58.702626  IO Manageability Engine FW Version = 11.1.4.0

  573 07:02:58.705915  PHY Build Version = 0.0.0.e0

  574 07:02:58.709572  Thunderbolt(TM) FW Version = 0.0.0.0

  575 07:02:58.715853  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 07:02:58.719804  ITSS IRQ Polarities Before:

  577 07:02:58.720126  IPC0: 0xffffffff

  578 07:02:58.722266  IPC1: 0xffffffff

  579 07:02:58.722588  IPC2: 0xffffffff

  580 07:02:58.725997  IPC3: 0xffffffff

  581 07:02:58.728870  ITSS IRQ Polarities After:

  582 07:02:58.729192  IPC0: 0xffffffff

  583 07:02:58.732656  IPC1: 0xffffffff

  584 07:02:58.732979  IPC2: 0xffffffff

  585 07:02:58.735850  IPC3: 0xffffffff

  586 07:02:58.738767  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 07:02:58.752259  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 07:02:58.762210  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 07:02:58.775417  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 07:02:58.782122  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  591 07:02:58.785188  Enumerating buses...

  592 07:02:58.788581  Show all devs... Before device enumeration.

  593 07:02:58.791927  Root Device: enabled 1

  594 07:02:58.792220  DOMAIN: 0000: enabled 1

  595 07:02:58.795451  CPU_CLUSTER: 0: enabled 1

  596 07:02:58.798801  PCI: 00:00.0: enabled 1

  597 07:02:58.801495  PCI: 00:02.0: enabled 1

  598 07:02:58.801576  PCI: 00:04.0: enabled 1

  599 07:02:58.805156  PCI: 00:05.0: enabled 1

  600 07:02:58.808369  PCI: 00:06.0: enabled 0

  601 07:02:58.811688  PCI: 00:07.0: enabled 0

  602 07:02:58.811776  PCI: 00:07.1: enabled 0

  603 07:02:58.814705  PCI: 00:07.2: enabled 0

  604 07:02:58.818395  PCI: 00:07.3: enabled 0

  605 07:02:58.821743  PCI: 00:08.0: enabled 1

  606 07:02:58.822188  PCI: 00:09.0: enabled 0

  607 07:02:58.824990  PCI: 00:0a.0: enabled 0

  608 07:02:58.828629  PCI: 00:0d.0: enabled 1

  609 07:02:58.832043  PCI: 00:0d.1: enabled 0

  610 07:02:58.832630  PCI: 00:0d.2: enabled 0

  611 07:02:58.835092  PCI: 00:0d.3: enabled 0

  612 07:02:58.838192  PCI: 00:0e.0: enabled 0

  613 07:02:58.841649  PCI: 00:10.2: enabled 1

  614 07:02:58.842120  PCI: 00:10.6: enabled 0

  615 07:02:58.845166  PCI: 00:10.7: enabled 0

  616 07:02:58.848304  PCI: 00:12.0: enabled 0

  617 07:02:58.848860  PCI: 00:12.6: enabled 0

  618 07:02:58.851333  PCI: 00:13.0: enabled 0

  619 07:02:58.855292  PCI: 00:14.0: enabled 1

  620 07:02:58.858026  PCI: 00:14.1: enabled 0

  621 07:02:58.858520  PCI: 00:14.2: enabled 1

  622 07:02:58.862215  PCI: 00:14.3: enabled 1

  623 07:02:58.865024  PCI: 00:15.0: enabled 1

  624 07:02:58.868040  PCI: 00:15.1: enabled 1

  625 07:02:58.868632  PCI: 00:15.2: enabled 1

  626 07:02:58.871428  PCI: 00:15.3: enabled 1

  627 07:02:58.874519  PCI: 00:16.0: enabled 1

  628 07:02:58.878367  PCI: 00:16.1: enabled 0

  629 07:02:58.878811  PCI: 00:16.2: enabled 0

  630 07:02:58.881231  PCI: 00:16.3: enabled 0

  631 07:02:58.884964  PCI: 00:16.4: enabled 0

  632 07:02:58.887612  PCI: 00:16.5: enabled 0

  633 07:02:58.888062  PCI: 00:17.0: enabled 1

  634 07:02:58.891164  PCI: 00:19.0: enabled 0

  635 07:02:58.894519  PCI: 00:19.1: enabled 1

  636 07:02:58.894758  PCI: 00:19.2: enabled 0

  637 07:02:58.897487  PCI: 00:1c.0: enabled 1

  638 07:02:58.901250  PCI: 00:1c.1: enabled 0

  639 07:02:58.904257  PCI: 00:1c.2: enabled 0

  640 07:02:58.904496  PCI: 00:1c.3: enabled 0

  641 07:02:58.907515  PCI: 00:1c.4: enabled 0

  642 07:02:58.911113  PCI: 00:1c.5: enabled 0

  643 07:02:58.914313  PCI: 00:1c.6: enabled 1

  644 07:02:58.914555  PCI: 00:1c.7: enabled 0

  645 07:02:58.917632  PCI: 00:1d.0: enabled 1

  646 07:02:58.920619  PCI: 00:1d.1: enabled 0

  647 07:02:58.923854  PCI: 00:1d.2: enabled 1

  648 07:02:58.924093  PCI: 00:1d.3: enabled 0

  649 07:02:58.927468  PCI: 00:1e.0: enabled 1

  650 07:02:58.930870  PCI: 00:1e.1: enabled 0

  651 07:02:58.933995  PCI: 00:1e.2: enabled 1

  652 07:02:58.934247  PCI: 00:1e.3: enabled 1

  653 07:02:58.937237  PCI: 00:1f.0: enabled 1

  654 07:02:58.940733  PCI: 00:1f.1: enabled 0

  655 07:02:58.944261  PCI: 00:1f.2: enabled 1

  656 07:02:58.944501  PCI: 00:1f.3: enabled 1

  657 07:02:58.947400  PCI: 00:1f.4: enabled 0

  658 07:02:58.950566  PCI: 00:1f.5: enabled 1

  659 07:02:58.954244  PCI: 00:1f.6: enabled 0

  660 07:02:58.954482  PCI: 00:1f.7: enabled 0

  661 07:02:58.956957  APIC: 00: enabled 1

  662 07:02:58.960405  GENERIC: 0.0: enabled 1

  663 07:02:58.960654  GENERIC: 0.0: enabled 1

  664 07:02:58.964242  GENERIC: 1.0: enabled 1

  665 07:02:58.967035  GENERIC: 0.0: enabled 1

  666 07:02:58.970191  GENERIC: 1.0: enabled 1

  667 07:02:58.970431  USB0 port 0: enabled 1

  668 07:02:58.973317  GENERIC: 0.0: enabled 1

  669 07:02:58.976859  USB0 port 0: enabled 1

  670 07:02:58.977099  GENERIC: 0.0: enabled 1

  671 07:02:58.979986  I2C: 00:1a: enabled 1

  672 07:02:58.983481  I2C: 00:31: enabled 1

  673 07:02:58.986868  I2C: 00:32: enabled 1

  674 07:02:58.987104  I2C: 00:10: enabled 1

  675 07:02:58.990074  I2C: 00:15: enabled 1

  676 07:02:58.994045  GENERIC: 0.0: enabled 0

  677 07:02:58.994311  GENERIC: 1.0: enabled 0

  678 07:02:58.996659  GENERIC: 0.0: enabled 1

  679 07:02:59.000490  SPI: 00: enabled 1

  680 07:02:59.000734  SPI: 00: enabled 1

  681 07:02:59.003396  PNP: 0c09.0: enabled 1

  682 07:02:59.006459  GENERIC: 0.0: enabled 1

  683 07:02:59.006712  USB3 port 0: enabled 1

  684 07:02:59.010468  USB3 port 1: enabled 1

  685 07:02:59.013554  USB3 port 2: enabled 0

  686 07:02:59.016694  USB3 port 3: enabled 0

  687 07:02:59.016937  USB2 port 0: enabled 0

  688 07:02:59.019625  USB2 port 1: enabled 1

  689 07:02:59.022925  USB2 port 2: enabled 1

  690 07:02:59.023172  USB2 port 3: enabled 0

  691 07:02:59.026704  USB2 port 4: enabled 1

  692 07:02:59.029807  USB2 port 5: enabled 0

  693 07:02:59.033111  USB2 port 6: enabled 0

  694 07:02:59.033355  USB2 port 7: enabled 0

  695 07:02:59.036431  USB2 port 8: enabled 0

  696 07:02:59.039788  USB2 port 9: enabled 0

  697 07:02:59.040172  USB3 port 0: enabled 0

  698 07:02:59.043035  USB3 port 1: enabled 1

  699 07:02:59.046453  USB3 port 2: enabled 0

  700 07:02:59.046883  USB3 port 3: enabled 0

  701 07:02:59.049759  GENERIC: 0.0: enabled 1

  702 07:02:59.053026  GENERIC: 1.0: enabled 1

  703 07:02:59.056437  APIC: 01: enabled 1

  704 07:02:59.056820  APIC: 05: enabled 1

  705 07:02:59.059744  APIC: 07: enabled 1

  706 07:02:59.060129  APIC: 02: enabled 1

  707 07:02:59.063000  APIC: 04: enabled 1

  708 07:02:59.066072  APIC: 06: enabled 1

  709 07:02:59.066372  APIC: 03: enabled 1

  710 07:02:59.069297  Compare with tree...

  711 07:02:59.072529  Root Device: enabled 1

  712 07:02:59.072754   DOMAIN: 0000: enabled 1

  713 07:02:59.076006    PCI: 00:00.0: enabled 1

  714 07:02:59.079005    PCI: 00:02.0: enabled 1

  715 07:02:59.083200    PCI: 00:04.0: enabled 1

  716 07:02:59.086100     GENERIC: 0.0: enabled 1

  717 07:02:59.086291    PCI: 00:05.0: enabled 1

  718 07:02:59.089364    PCI: 00:06.0: enabled 0

  719 07:02:59.092428    PCI: 00:07.0: enabled 0

  720 07:02:59.096185     GENERIC: 0.0: enabled 1

  721 07:02:59.099375    PCI: 00:07.1: enabled 0

  722 07:02:59.099543     GENERIC: 1.0: enabled 1

  723 07:02:59.102307    PCI: 00:07.2: enabled 0

  724 07:02:59.105543     GENERIC: 0.0: enabled 1

  725 07:02:59.108785    PCI: 00:07.3: enabled 0

  726 07:02:59.112001     GENERIC: 1.0: enabled 1

  727 07:02:59.115561    PCI: 00:08.0: enabled 1

  728 07:02:59.115672    PCI: 00:09.0: enabled 0

  729 07:02:59.118758    PCI: 00:0a.0: enabled 0

  730 07:02:59.122106    PCI: 00:0d.0: enabled 1

  731 07:02:59.125284     USB0 port 0: enabled 1

  732 07:02:59.128817      USB3 port 0: enabled 1

  733 07:02:59.128918      USB3 port 1: enabled 1

  734 07:02:59.132436      USB3 port 2: enabled 0

  735 07:02:59.135347      USB3 port 3: enabled 0

  736 07:02:59.138911    PCI: 00:0d.1: enabled 0

  737 07:02:59.141922    PCI: 00:0d.2: enabled 0

  738 07:02:59.145085     GENERIC: 0.0: enabled 1

  739 07:02:59.145180    PCI: 00:0d.3: enabled 0

  740 07:02:59.148590    PCI: 00:0e.0: enabled 0

  741 07:02:59.151655    PCI: 00:10.2: enabled 1

  742 07:02:59.155480    PCI: 00:10.6: enabled 0

  743 07:02:59.155568    PCI: 00:10.7: enabled 0

  744 07:02:59.158548    PCI: 00:12.0: enabled 0

  745 07:02:59.161763    PCI: 00:12.6: enabled 0

  746 07:02:59.165378    PCI: 00:13.0: enabled 0

  747 07:02:59.168635    PCI: 00:14.0: enabled 1

  748 07:02:59.171581     USB0 port 0: enabled 1

  749 07:02:59.171672      USB2 port 0: enabled 0

  750 07:02:59.175063      USB2 port 1: enabled 1

  751 07:02:59.178069      USB2 port 2: enabled 1

  752 07:02:59.181796      USB2 port 3: enabled 0

  753 07:02:59.184943      USB2 port 4: enabled 1

  754 07:02:59.185030      USB2 port 5: enabled 0

  755 07:02:59.188843      USB2 port 6: enabled 0

  756 07:02:59.191273      USB2 port 7: enabled 0

  757 07:02:59.195017      USB2 port 8: enabled 0

  758 07:02:59.198399      USB2 port 9: enabled 0

  759 07:02:59.201414      USB3 port 0: enabled 0

  760 07:02:59.201501      USB3 port 1: enabled 1

  761 07:02:59.204624      USB3 port 2: enabled 0

  762 07:02:59.208060      USB3 port 3: enabled 0

  763 07:02:59.211181    PCI: 00:14.1: enabled 0

  764 07:02:59.214708    PCI: 00:14.2: enabled 1

  765 07:02:59.214812    PCI: 00:14.3: enabled 1

  766 07:02:59.218000     GENERIC: 0.0: enabled 1

  767 07:02:59.221308    PCI: 00:15.0: enabled 1

  768 07:02:59.224537     I2C: 00:1a: enabled 1

  769 07:02:59.228097     I2C: 00:31: enabled 1

  770 07:02:59.228185     I2C: 00:32: enabled 1

  771 07:02:59.231280    PCI: 00:15.1: enabled 1

  772 07:02:59.235076     I2C: 00:10: enabled 1

  773 07:02:59.238484    PCI: 00:15.2: enabled 1

  774 07:02:59.241338    PCI: 00:15.3: enabled 1

  775 07:02:59.241426    PCI: 00:16.0: enabled 1

  776 07:02:59.244833    PCI: 00:16.1: enabled 0

  777 07:02:59.248056    PCI: 00:16.2: enabled 0

  778 07:02:59.251436    PCI: 00:16.3: enabled 0

  779 07:02:59.254643    PCI: 00:16.4: enabled 0

  780 07:02:59.254737    PCI: 00:16.5: enabled 0

  781 07:02:59.257946    PCI: 00:17.0: enabled 1

  782 07:02:59.262242    PCI: 00:19.0: enabled 0

  783 07:02:59.265327    PCI: 00:19.1: enabled 1

  784 07:02:59.265417     I2C: 00:15: enabled 1

  785 07:02:59.268363    PCI: 00:19.2: enabled 0

  786 07:02:59.271657    PCI: 00:1d.0: enabled 1

  787 07:02:59.275390     GENERIC: 0.0: enabled 1

  788 07:02:59.275480    PCI: 00:1e.0: enabled 1

  789 07:02:59.278172    PCI: 00:1e.1: enabled 0

  790 07:02:59.328362    PCI: 00:1e.2: enabled 1

  791 07:02:59.328520     SPI: 00: enabled 1

  792 07:02:59.328790    PCI: 00:1e.3: enabled 1

  793 07:02:59.328863     SPI: 00: enabled 1

  794 07:02:59.328929    PCI: 00:1f.0: enabled 1

  795 07:02:59.328990     PNP: 0c09.0: enabled 1

  796 07:02:59.329051    PCI: 00:1f.1: enabled 0

  797 07:02:59.329520    PCI: 00:1f.2: enabled 1

  798 07:02:59.329608     GENERIC: 0.0: enabled 1

  799 07:02:59.329900      GENERIC: 0.0: enabled 1

  800 07:02:59.329976      GENERIC: 1.0: enabled 1

  801 07:02:59.330041    PCI: 00:1f.3: enabled 1

  802 07:02:59.330685    PCI: 00:1f.4: enabled 0

  803 07:02:59.330772    PCI: 00:1f.5: enabled 1

  804 07:02:59.331276    PCI: 00:1f.6: enabled 0

  805 07:02:59.331364    PCI: 00:1f.7: enabled 0

  806 07:02:59.331628   CPU_CLUSTER: 0: enabled 1

  807 07:02:59.331702    APIC: 00: enabled 1

  808 07:02:59.331769    APIC: 01: enabled 1

  809 07:02:59.379834    APIC: 05: enabled 1

  810 07:02:59.379995    APIC: 07: enabled 1

  811 07:02:59.380067    APIC: 02: enabled 1

  812 07:02:59.380132    APIC: 04: enabled 1

  813 07:02:59.380195    APIC: 06: enabled 1

  814 07:02:59.380255    APIC: 03: enabled 1

  815 07:02:59.380514  Root Device scanning...

  816 07:02:59.380589  scan_static_bus for Root Device

  817 07:02:59.380992  DOMAIN: 0000 enabled

  818 07:02:59.381080  CPU_CLUSTER: 0 enabled

  819 07:02:59.381151  DOMAIN: 0000 scanning...

  820 07:02:59.381677  PCI: pci_scan_bus for bus 00

  821 07:02:59.381765  PCI: 00:00.0 [8086/0000] ops

  822 07:02:59.382022  PCI: 00:00.0 [8086/9a12] enabled

  823 07:02:59.382096  PCI: 00:02.0 [8086/0000] bus ops

  824 07:02:59.382481  PCI: 00:02.0 [8086/9a40] enabled

  825 07:02:59.382569  PCI: 00:04.0 [8086/0000] bus ops

  826 07:02:59.382829  PCI: 00:04.0 [8086/9a03] enabled

  827 07:02:59.385277  PCI: 00:05.0 [8086/9a19] enabled

  828 07:02:59.385366  PCI: 00:07.0 [0000/0000] hidden

  829 07:02:59.388584  PCI: 00:08.0 [8086/9a11] enabled

  830 07:02:59.392084  PCI: 00:0a.0 [8086/9a0d] disabled

  831 07:02:59.395945  PCI: 00:0d.0 [8086/0000] bus ops

  832 07:02:59.398373  PCI: 00:0d.0 [8086/9a13] enabled

  833 07:02:59.401799  PCI: 00:14.0 [8086/0000] bus ops

  834 07:02:59.405385  PCI: 00:14.0 [8086/a0ed] enabled

  835 07:02:59.408299  PCI: 00:14.2 [8086/a0ef] enabled

  836 07:02:59.411713  PCI: 00:14.3 [8086/0000] bus ops

  837 07:02:59.414956  PCI: 00:14.3 [8086/a0f0] enabled

  838 07:02:59.418705  PCI: 00:15.0 [8086/0000] bus ops

  839 07:02:59.421353  PCI: 00:15.0 [8086/a0e8] enabled

  840 07:02:59.425195  PCI: 00:15.1 [8086/0000] bus ops

  841 07:02:59.428073  PCI: 00:15.1 [8086/a0e9] enabled

  842 07:02:59.432040  PCI: 00:15.2 [8086/0000] bus ops

  843 07:02:59.434558  PCI: 00:15.2 [8086/a0ea] enabled

  844 07:02:59.437922  PCI: 00:15.3 [8086/0000] bus ops

  845 07:02:59.441424  PCI: 00:15.3 [8086/a0eb] enabled

  846 07:02:59.444770  PCI: 00:16.0 [8086/0000] ops

  847 07:02:59.447880  PCI: 00:16.0 [8086/a0e0] enabled

  848 07:02:59.454729  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 07:02:59.458126  PCI: 00:19.0 [8086/0000] bus ops

  850 07:02:59.461351  PCI: 00:19.0 [8086/a0c5] disabled

  851 07:02:59.464533  PCI: 00:19.1 [8086/0000] bus ops

  852 07:02:59.467704  PCI: 00:19.1 [8086/a0c6] enabled

  853 07:02:59.471151  PCI: 00:1d.0 [8086/0000] bus ops

  854 07:02:59.474628  PCI: 00:1d.0 [8086/a0b0] enabled

  855 07:02:59.478088  PCI: 00:1e.0 [8086/0000] ops

  856 07:02:59.481009  PCI: 00:1e.0 [8086/a0a8] enabled

  857 07:02:59.484084  PCI: 00:1e.2 [8086/0000] bus ops

  858 07:02:59.487691  PCI: 00:1e.2 [8086/a0aa] enabled

  859 07:02:59.491636  PCI: 00:1e.3 [8086/0000] bus ops

  860 07:02:59.494080  PCI: 00:1e.3 [8086/a0ab] enabled

  861 07:02:59.497650  PCI: 00:1f.0 [8086/0000] bus ops

  862 07:02:59.500781  PCI: 00:1f.0 [8086/a087] enabled

  863 07:02:59.500869  RTC Init

  864 07:02:59.504015  Set power on after power failure.

  865 07:02:59.507455  Disabling Deep S3

  866 07:02:59.510629  Disabling Deep S3

  867 07:02:59.510717  Disabling Deep S4

  868 07:02:59.514225  Disabling Deep S4

  869 07:02:59.514313  Disabling Deep S5

  870 07:02:59.517710  Disabling Deep S5

  871 07:02:59.520552  PCI: 00:1f.2 [0000/0000] hidden

  872 07:02:59.523573  PCI: 00:1f.3 [8086/0000] bus ops

  873 07:02:59.527354  PCI: 00:1f.3 [8086/a0c8] enabled

  874 07:02:59.531440  PCI: 00:1f.5 [8086/0000] bus ops

  875 07:02:59.533784  PCI: 00:1f.5 [8086/a0a4] enabled

  876 07:02:59.537065  PCI: Leftover static devices:

  877 07:02:59.537151  PCI: 00:10.2

  878 07:02:59.540566  PCI: 00:10.6

  879 07:02:59.540652  PCI: 00:10.7

  880 07:02:59.540719  PCI: 00:06.0

  881 07:02:59.543769  PCI: 00:07.1

  882 07:02:59.543855  PCI: 00:07.2

  883 07:02:59.547380  PCI: 00:07.3

  884 07:02:59.547502  PCI: 00:09.0

  885 07:02:59.550243  PCI: 00:0d.1

  886 07:02:59.550358  PCI: 00:0d.2

  887 07:02:59.550464  PCI: 00:0d.3

  888 07:02:59.553652  PCI: 00:0e.0

  889 07:02:59.553774  PCI: 00:12.0

  890 07:02:59.557208  PCI: 00:12.6

  891 07:02:59.557319  PCI: 00:13.0

  892 07:02:59.557415  PCI: 00:14.1

  893 07:02:59.560306  PCI: 00:16.1

  894 07:02:59.560420  PCI: 00:16.2

  895 07:02:59.563669  PCI: 00:16.3

  896 07:02:59.563784  PCI: 00:16.4

  897 07:02:59.563885  PCI: 00:16.5

  898 07:02:59.566933  PCI: 00:17.0

  899 07:02:59.567048  PCI: 00:19.2

  900 07:02:59.570697  PCI: 00:1e.1

  901 07:02:59.570809  PCI: 00:1f.1

  902 07:02:59.573751  PCI: 00:1f.4

  903 07:02:59.573863  PCI: 00:1f.6

  904 07:02:59.573961  PCI: 00:1f.7

  905 07:02:59.577408  PCI: Check your devicetree.cb.

  906 07:02:59.580001  PCI: 00:02.0 scanning...

  907 07:02:59.583208  scan_generic_bus for PCI: 00:02.0

  908 07:02:59.587192  scan_generic_bus for PCI: 00:02.0 done

  909 07:02:59.593558  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 07:02:59.596471  PCI: 00:04.0 scanning...

  911 07:02:59.600263  scan_generic_bus for PCI: 00:04.0

  912 07:02:59.600376  GENERIC: 0.0 enabled

  913 07:02:59.607000  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 07:02:59.613184  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 07:02:59.613276  PCI: 00:0d.0 scanning...

  916 07:02:59.616361  scan_static_bus for PCI: 00:0d.0

  917 07:02:59.619893  USB0 port 0 enabled

  918 07:02:59.623063  USB0 port 0 scanning...

  919 07:02:59.626524  scan_static_bus for USB0 port 0

  920 07:02:59.629871  USB3 port 0 enabled

  921 07:02:59.629956  USB3 port 1 enabled

  922 07:02:59.633064  USB3 port 2 disabled

  923 07:02:59.633149  USB3 port 3 disabled

  924 07:02:59.636286  USB3 port 0 scanning...

  925 07:02:59.640230  scan_static_bus for USB3 port 0

  926 07:02:59.642887  scan_static_bus for USB3 port 0 done

  927 07:02:59.649430  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 07:02:59.649515  USB3 port 1 scanning...

  929 07:02:59.653299  scan_static_bus for USB3 port 1

  930 07:02:59.660098  scan_static_bus for USB3 port 1 done

  931 07:02:59.663153  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 07:02:59.666411  scan_static_bus for USB0 port 0 done

  933 07:02:59.670107  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 07:02:59.676944  scan_static_bus for PCI: 00:0d.0 done

  935 07:02:59.680078  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 07:02:59.682882  PCI: 00:14.0 scanning...

  937 07:02:59.686884  scan_static_bus for PCI: 00:14.0

  938 07:02:59.689578  USB0 port 0 enabled

  939 07:02:59.689663  USB0 port 0 scanning...

  940 07:02:59.692632  scan_static_bus for USB0 port 0

  941 07:02:59.696255  USB2 port 0 disabled

  942 07:02:59.699678  USB2 port 1 enabled

  943 07:02:59.699763  USB2 port 2 enabled

  944 07:02:59.702561  USB2 port 3 disabled

  945 07:02:59.706068  USB2 port 4 enabled

  946 07:02:59.706165  USB2 port 5 disabled

  947 07:02:59.709199  USB2 port 6 disabled

  948 07:02:59.709284  USB2 port 7 disabled

  949 07:02:59.713014  USB2 port 8 disabled

  950 07:02:59.716081  USB2 port 9 disabled

  951 07:02:59.716168  USB3 port 0 disabled

  952 07:02:59.719849  USB3 port 1 enabled

  953 07:02:59.722846  USB3 port 2 disabled

  954 07:02:59.722932  USB3 port 3 disabled

  955 07:02:59.726435  USB2 port 1 scanning...

  956 07:02:59.729319  scan_static_bus for USB2 port 1

  957 07:02:59.733016  scan_static_bus for USB2 port 1 done

  958 07:02:59.739161  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 07:02:59.739248  USB2 port 2 scanning...

  960 07:02:59.742673  scan_static_bus for USB2 port 2

  961 07:02:59.749037  scan_static_bus for USB2 port 2 done

  962 07:02:59.752644  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 07:02:59.755553  USB2 port 4 scanning...

  964 07:02:59.758763  scan_static_bus for USB2 port 4

  965 07:02:59.762781  scan_static_bus for USB2 port 4 done

  966 07:02:59.765545  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 07:02:59.768937  USB3 port 1 scanning...

  968 07:02:59.771967  scan_static_bus for USB3 port 1

  969 07:02:59.775405  scan_static_bus for USB3 port 1 done

  970 07:02:59.778798  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 07:02:59.785742  scan_static_bus for USB0 port 0 done

  972 07:02:59.789022  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 07:02:59.791949  scan_static_bus for PCI: 00:14.0 done

  974 07:02:59.798852  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  975 07:02:59.798942  PCI: 00:14.3 scanning...

  976 07:02:59.802329  scan_static_bus for PCI: 00:14.3

  977 07:02:59.805426  GENERIC: 0.0 enabled

  978 07:02:59.808620  scan_static_bus for PCI: 00:14.3 done

  979 07:02:59.815106  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 07:02:59.815196  PCI: 00:15.0 scanning...

  981 07:02:59.818678  scan_static_bus for PCI: 00:15.0

  982 07:02:59.821796  I2C: 00:1a enabled

  983 07:02:59.825706  I2C: 00:31 enabled

  984 07:02:59.825796  I2C: 00:32 enabled

  985 07:02:59.829182  scan_static_bus for PCI: 00:15.0 done

  986 07:02:59.836243  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  987 07:02:59.839087  PCI: 00:15.1 scanning...

  988 07:02:59.842903  scan_static_bus for PCI: 00:15.1

  989 07:02:59.842993  I2C: 00:10 enabled

  990 07:02:59.846367  scan_static_bus for PCI: 00:15.1 done

  991 07:02:59.852571  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 07:02:59.852661  PCI: 00:15.2 scanning...

  993 07:02:59.856015  scan_static_bus for PCI: 00:15.2

  994 07:02:59.862901  scan_static_bus for PCI: 00:15.2 done

  995 07:02:59.865770  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 07:02:59.869595  PCI: 00:15.3 scanning...

  997 07:02:59.872882  scan_static_bus for PCI: 00:15.3

  998 07:02:59.875474  scan_static_bus for PCI: 00:15.3 done

  999 07:02:59.878897  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 07:02:59.882124  PCI: 00:19.1 scanning...

 1001 07:02:59.885830  scan_static_bus for PCI: 00:19.1

 1002 07:02:59.889525  I2C: 00:15 enabled

 1003 07:02:59.892018  scan_static_bus for PCI: 00:19.1 done

 1004 07:02:59.895791  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 07:02:59.898750  PCI: 00:1d.0 scanning...

 1006 07:02:59.902058  do_pci_scan_bridge for PCI: 00:1d.0

 1007 07:02:59.905417  PCI: pci_scan_bus for bus 01

 1008 07:02:59.908661  PCI: 01:00.0 [1c5c/174a] enabled

 1009 07:02:59.912021  GENERIC: 0.0 enabled

 1010 07:02:59.915628  Enabling Common Clock Configuration

 1011 07:02:59.918841  L1 Sub-State supported from root port 29

 1012 07:02:59.922168  L1 Sub-State Support = 0xf

 1013 07:02:59.925226  CommonModeRestoreTime = 0x28

 1014 07:02:59.928533  Power On Value = 0x16, Power On Scale = 0x0

 1015 07:02:59.932234  ASPM: Enabled L1

 1016 07:02:59.935044  PCIe: Max_Payload_Size adjusted to 128

 1017 07:02:59.941689  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 07:02:59.941777  PCI: 00:1e.2 scanning...

 1019 07:02:59.948453  scan_generic_bus for PCI: 00:1e.2

 1020 07:02:59.948540  SPI: 00 enabled

 1021 07:02:59.955259  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 07:02:59.958445  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 07:02:59.961683  PCI: 00:1e.3 scanning...

 1024 07:02:59.965441  scan_generic_bus for PCI: 00:1e.3

 1025 07:02:59.968830  SPI: 00 enabled

 1026 07:02:59.974766  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 07:02:59.978056  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 07:02:59.981748  PCI: 00:1f.0 scanning...

 1029 07:02:59.984757  scan_static_bus for PCI: 00:1f.0

 1030 07:02:59.984846  PNP: 0c09.0 enabled

 1031 07:02:59.987904  PNP: 0c09.0 scanning...

 1032 07:02:59.991705  scan_static_bus for PNP: 0c09.0

 1033 07:02:59.994559  scan_static_bus for PNP: 0c09.0 done

 1034 07:03:00.001193  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 07:03:00.004564  scan_static_bus for PCI: 00:1f.0 done

 1036 07:03:00.007848  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 07:03:00.011210  PCI: 00:1f.2 scanning...

 1038 07:03:00.014629  scan_static_bus for PCI: 00:1f.2

 1039 07:03:00.017541  GENERIC: 0.0 enabled

 1040 07:03:00.021384  GENERIC: 0.0 scanning...

 1041 07:03:00.024356  scan_static_bus for GENERIC: 0.0

 1042 07:03:00.024445  GENERIC: 0.0 enabled

 1043 07:03:00.027951  GENERIC: 1.0 enabled

 1044 07:03:00.031109  scan_static_bus for GENERIC: 0.0 done

 1045 07:03:00.037455  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 07:03:00.041020  scan_static_bus for PCI: 00:1f.2 done

 1047 07:03:00.044284  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 07:03:00.047659  PCI: 00:1f.3 scanning...

 1049 07:03:00.050683  scan_static_bus for PCI: 00:1f.3

 1050 07:03:00.054294  scan_static_bus for PCI: 00:1f.3 done

 1051 07:03:00.061060  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 07:03:00.061149  PCI: 00:1f.5 scanning...

 1053 07:03:00.067076  scan_generic_bus for PCI: 00:1f.5

 1054 07:03:00.070360  scan_generic_bus for PCI: 00:1f.5 done

 1055 07:03:00.074016  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 07:03:00.080411  scan_bus: bus DOMAIN: 0000 finished in 718 msecs

 1057 07:03:00.083689  scan_static_bus for Root Device done

 1058 07:03:00.087206  scan_bus: bus Root Device finished in 737 msecs

 1059 07:03:00.087295  done

 1060 07:03:00.093960  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 07:03:00.096945  Chrome EC: UHEPI supported

 1062 07:03:00.103661  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 07:03:00.110306  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 07:03:00.113740  SPI flash protection: WPSW=0 SRP0=0

 1065 07:03:00.120448  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 07:03:00.123479  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 07:03:00.126583  found VGA at PCI: 00:02.0

 1068 07:03:00.129892  Setting up VGA for PCI: 00:02.0

 1069 07:03:00.136803  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 07:03:00.140034  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 07:03:00.143329  Allocating resources...

 1072 07:03:00.146702  Reading resources...

 1073 07:03:00.150490  Root Device read_resources bus 0 link: 0

 1074 07:03:00.153072  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 07:03:00.159969  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 07:03:00.163158  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 07:03:00.169883  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 07:03:00.173381  USB0 port 0 read_resources bus 0 link: 0

 1079 07:03:00.179663  USB0 port 0 read_resources bus 0 link: 0 done

 1080 07:03:00.183069  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 07:03:00.189891  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 07:03:00.193104  USB0 port 0 read_resources bus 0 link: 0

 1083 07:03:00.199687  USB0 port 0 read_resources bus 0 link: 0 done

 1084 07:03:00.202967  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 07:03:00.209344  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 07:03:00.212528  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 07:03:00.219983  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 07:03:00.222550  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 07:03:00.229471  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 07:03:00.232156  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 07:03:00.239286  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 07:03:00.242650  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 07:03:00.248984  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 07:03:00.252571  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 07:03:00.259309  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 07:03:00.262872  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 07:03:00.269129  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 07:03:00.272385  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 07:03:00.279149  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 07:03:00.282415  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 07:03:00.289069  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 07:03:00.292478  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 07:03:00.299513  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 07:03:00.302298  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 07:03:00.308418  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 07:03:00.311719  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 07:03:00.318474  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 07:03:00.321871  Root Device read_resources bus 0 link: 0 done

 1109 07:03:00.325294  Done reading resources.

 1110 07:03:00.331885  Show resources in subtree (Root Device)...After reading.

 1111 07:03:00.335764   Root Device child on link 0 DOMAIN: 0000

 1112 07:03:00.338414    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 07:03:00.348258    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 07:03:00.358366    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 07:03:00.358455     PCI: 00:00.0

 1116 07:03:00.368345     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 07:03:00.378075     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 07:03:00.388057     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 07:03:00.397905     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 07:03:00.408160     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 07:03:00.417941     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 07:03:00.424946     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 07:03:00.434725     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 07:03:00.444793     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 07:03:00.454255     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 07:03:00.464541     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 07:03:00.470985     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 07:03:00.481779     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 07:03:00.491090     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 07:03:00.500868     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 07:03:00.510751     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 07:03:00.521288     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 07:03:00.531035     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 07:03:00.537149     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 07:03:00.547276     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 07:03:00.550501     PCI: 00:02.0

 1137 07:03:00.561236     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 07:03:00.570581     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 07:03:00.580872     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 07:03:00.583723     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 07:03:00.593839     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 07:03:00.593927      GENERIC: 0.0

 1143 07:03:00.597380     PCI: 00:05.0

 1144 07:03:00.607249     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 07:03:00.610350     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 07:03:00.613591      GENERIC: 0.0

 1147 07:03:00.613677     PCI: 00:08.0

 1148 07:03:00.623501     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 07:03:00.627018     PCI: 00:0a.0

 1150 07:03:00.630009     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 07:03:00.640377     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 07:03:00.646762      USB0 port 0 child on link 0 USB3 port 0

 1153 07:03:00.646864       USB3 port 0

 1154 07:03:00.649966       USB3 port 1

 1155 07:03:00.650052       USB3 port 2

 1156 07:03:00.653376       USB3 port 3

 1157 07:03:00.656815     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 07:03:00.666806     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 07:03:00.670317      USB0 port 0 child on link 0 USB2 port 0

 1160 07:03:00.673107       USB2 port 0

 1161 07:03:00.676711       USB2 port 1

 1162 07:03:00.676797       USB2 port 2

 1163 07:03:00.679683       USB2 port 3

 1164 07:03:00.679769       USB2 port 4

 1165 07:03:00.683809       USB2 port 5

 1166 07:03:00.683895       USB2 port 6

 1167 07:03:00.686566       USB2 port 7

 1168 07:03:00.686652       USB2 port 8

 1169 07:03:00.689965       USB2 port 9

 1170 07:03:00.690054       USB3 port 0

 1171 07:03:00.693204       USB3 port 1

 1172 07:03:00.693291       USB3 port 2

 1173 07:03:00.696289       USB3 port 3

 1174 07:03:00.696377     PCI: 00:14.2

 1175 07:03:00.706250     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 07:03:00.716565     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 07:03:00.722915     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 07:03:00.732796     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 07:03:00.732886      GENERIC: 0.0

 1180 07:03:00.739639     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 07:03:00.749555     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 07:03:00.749649      I2C: 00:1a

 1183 07:03:00.752477      I2C: 00:31

 1184 07:03:00.752565      I2C: 00:32

 1185 07:03:00.756060     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 07:03:00.765786     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 07:03:00.768968      I2C: 00:10

 1188 07:03:00.769056     PCI: 00:15.2

 1189 07:03:00.778798     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 07:03:00.782540     PCI: 00:15.3

 1191 07:03:00.792612     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 07:03:00.792701     PCI: 00:16.0

 1193 07:03:00.801909     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 07:03:00.805520     PCI: 00:19.0

 1195 07:03:00.808599     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 07:03:00.818806     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 07:03:00.822083      I2C: 00:15

 1198 07:03:00.825301     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 07:03:00.834970     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 07:03:00.845216     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 07:03:00.851659     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 07:03:00.855005      GENERIC: 0.0

 1203 07:03:00.855098      PCI: 01:00.0

 1204 07:03:00.868292      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 07:03:00.875627      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 07:03:00.884545      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 07:03:00.888118     PCI: 00:1e.0

 1208 07:03:00.898248     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 07:03:00.901130     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 07:03:00.911199     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 07:03:00.914728      SPI: 00

 1212 07:03:00.917625     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 07:03:00.927820     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 07:03:00.927907      SPI: 00

 1215 07:03:00.934092     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 07:03:00.941001     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 07:03:00.944163      PNP: 0c09.0

 1218 07:03:00.950767      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 07:03:00.957397     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 07:03:00.967309     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 07:03:00.974030     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 07:03:00.980655      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 07:03:00.980742       GENERIC: 0.0

 1224 07:03:00.984004       GENERIC: 1.0

 1225 07:03:00.984090     PCI: 00:1f.3

 1226 07:03:00.993765     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 07:03:01.003902     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 07:03:01.006903     PCI: 00:1f.5

 1229 07:03:01.016891     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 07:03:01.019894    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 07:03:01.019980     APIC: 00

 1232 07:03:01.022964     APIC: 01

 1233 07:03:01.023049     APIC: 05

 1234 07:03:01.026444     APIC: 07

 1235 07:03:01.026529     APIC: 02

 1236 07:03:01.026595     APIC: 04

 1237 07:03:01.030496     APIC: 06

 1238 07:03:01.030581     APIC: 03

 1239 07:03:01.039719  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 07:03:01.043048   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 07:03:01.049655   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 07:03:01.056725   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 07:03:01.059635    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 07:03:01.063099    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 07:03:01.069470    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 07:03:01.076683   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 07:03:01.082808   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 07:03:01.089479   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 07:03:01.099521  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 07:03:01.106087  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 07:03:01.113326   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 07:03:01.119696   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 07:03:01.125798   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 07:03:01.129278   DOMAIN: 0000: Resource ranges:

 1255 07:03:01.132476   * Base: 1000, Size: 800, Tag: 100

 1256 07:03:01.139594   * Base: 1900, Size: e700, Tag: 100

 1257 07:03:01.142144    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 07:03:01.148784  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 07:03:01.155722  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 07:03:01.165371   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 07:03:01.172030   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 07:03:01.178852   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 07:03:01.188655   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 07:03:01.195788   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 07:03:01.202022   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 07:03:01.211948   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 07:03:01.218116   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 07:03:01.224744   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 07:03:01.234943   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 07:03:01.241252   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 07:03:01.248273   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 07:03:01.258769   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 07:03:01.264640   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 07:03:01.271467   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 07:03:01.281011   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 07:03:01.288387   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 07:03:01.294544   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 07:03:01.304363   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 07:03:01.311037   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 07:03:01.317739   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 07:03:01.327213   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 07:03:01.330449   DOMAIN: 0000: Resource ranges:

 1283 07:03:01.333836   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 07:03:01.337271   * Base: d0000000, Size: 28000000, Tag: 200

 1285 07:03:01.344382   * Base: fa000000, Size: 1000000, Tag: 200

 1286 07:03:01.347347   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 07:03:01.350603   * Base: fe010000, Size: 2e000, Tag: 200

 1288 07:03:01.353755   * Base: fe03f000, Size: d41000, Tag: 200

 1289 07:03:01.360239   * Base: fed88000, Size: 8000, Tag: 200

 1290 07:03:01.363749   * Base: fed93000, Size: d000, Tag: 200

 1291 07:03:01.366977   * Base: feda2000, Size: 1e000, Tag: 200

 1292 07:03:01.370553   * Base: fede0000, Size: 1220000, Tag: 200

 1293 07:03:01.377278   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 07:03:01.383532    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 07:03:01.390428    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 07:03:01.396696    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 07:03:01.403417    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 07:03:01.410328    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 07:03:01.416914    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 07:03:01.423784    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 07:03:01.429570    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 07:03:01.436276    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 07:03:01.442940    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 07:03:01.449729    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 07:03:01.456934    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 07:03:01.463147    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 07:03:01.469324    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 07:03:01.476335    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 07:03:01.482902    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 07:03:01.489137    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 07:03:01.495836    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 07:03:01.502872    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 07:03:01.508844    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 07:03:01.515538    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 07:03:01.522622    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 07:03:01.528910  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 07:03:01.539116  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 07:03:01.542103   PCI: 00:1d.0: Resource ranges:

 1319 07:03:01.546106   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 07:03:01.552267    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 07:03:01.558984    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 07:03:01.565569    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 07:03:01.575570  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 07:03:01.581839  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 07:03:01.585468  Root Device assign_resources, bus 0 link: 0

 1326 07:03:01.588738  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 07:03:01.598733  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 07:03:01.605414  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 07:03:01.615606  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 07:03:01.621915  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 07:03:01.628368  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 07:03:01.631841  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 07:03:01.641798  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 07:03:01.648036  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 07:03:01.657686  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 07:03:01.661557  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 07:03:01.664419  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 07:03:01.674981  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 07:03:01.677849  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 07:03:01.684197  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 07:03:01.690788  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 07:03:01.700572  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 07:03:01.707518  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 07:03:01.710707  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 07:03:01.717555  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 07:03:01.724285  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 07:03:01.730956  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 07:03:01.734015  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 07:03:01.743789  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 07:03:01.747628  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 07:03:01.750472  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 07:03:01.760966  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 07:03:01.767216  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 07:03:01.777086  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 07:03:01.783866  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 07:03:01.790240  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 07:03:01.794104  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 07:03:01.803710  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 07:03:01.813751  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 07:03:01.820229  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 07:03:01.826633  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 07:03:01.833375  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 07:03:01.843633  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 07:03:01.850350  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 07:03:01.853350  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 07:03:01.863878  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 07:03:01.866997  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 07:03:01.873317  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 07:03:01.879942  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 07:03:01.886086  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 07:03:01.889664  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 07:03:01.893307  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 07:03:01.899896  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 07:03:01.903373  LPC: Trying to open IO window from 800 size 1ff

 1375 07:03:01.913250  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 07:03:01.919827  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 07:03:01.929711  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 07:03:01.933010  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 07:03:01.939638  Root Device assign_resources, bus 0 link: 0

 1380 07:03:01.939725  Done setting resources.

 1381 07:03:01.946126  Show resources in subtree (Root Device)...After assigning values.

 1382 07:03:01.952563   Root Device child on link 0 DOMAIN: 0000

 1383 07:03:01.955838    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 07:03:01.966394    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 07:03:01.975825    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 07:03:01.975919     PCI: 00:00.0

 1387 07:03:01.985718     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 07:03:01.996374     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 07:03:02.005827     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 07:03:02.015411     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 07:03:02.021965     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 07:03:02.032059     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 07:03:02.042110     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 07:03:02.052024     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 07:03:02.062055     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 07:03:02.071623     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 07:03:02.078658     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 07:03:02.088520     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 07:03:02.098425     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 07:03:02.108471     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 07:03:02.118395     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 07:03:02.124907     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 07:03:02.138266     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 07:03:02.144869     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 07:03:02.154529     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 07:03:02.164882     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 07:03:02.168079     PCI: 00:02.0

 1408 07:03:02.178027     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 07:03:02.187951     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 07:03:02.197907     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 07:03:02.201479     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 07:03:02.210815     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 07:03:02.214597      GENERIC: 0.0

 1414 07:03:02.214684     PCI: 00:05.0

 1415 07:03:02.227714     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 07:03:02.230912     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 07:03:02.230999      GENERIC: 0.0

 1418 07:03:02.234011     PCI: 00:08.0

 1419 07:03:02.244057     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 07:03:02.247567     PCI: 00:0a.0

 1421 07:03:02.250804     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 07:03:02.260609     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 07:03:02.263981      USB0 port 0 child on link 0 USB3 port 0

 1424 07:03:02.267263       USB3 port 0

 1425 07:03:02.267350       USB3 port 1

 1426 07:03:02.270330       USB3 port 2

 1427 07:03:02.273936       USB3 port 3

 1428 07:03:02.277229     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 07:03:02.287077     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 07:03:02.290367      USB0 port 0 child on link 0 USB2 port 0

 1431 07:03:02.293668       USB2 port 0

 1432 07:03:02.293755       USB2 port 1

 1433 07:03:02.297113       USB2 port 2

 1434 07:03:02.297200       USB2 port 3

 1435 07:03:02.300096       USB2 port 4

 1436 07:03:02.303686       USB2 port 5

 1437 07:03:02.303773       USB2 port 6

 1438 07:03:02.307209       USB2 port 7

 1439 07:03:02.307296       USB2 port 8

 1440 07:03:02.310655       USB2 port 9

 1441 07:03:02.310741       USB3 port 0

 1442 07:03:02.313670       USB3 port 1

 1443 07:03:02.313770       USB3 port 2

 1444 07:03:02.316797       USB3 port 3

 1445 07:03:02.316883     PCI: 00:14.2

 1446 07:03:02.326637     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 07:03:02.340194     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 07:03:02.343734     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 07:03:02.353521     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 07:03:02.356486      GENERIC: 0.0

 1451 07:03:02.360073     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 07:03:02.369766     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 07:03:02.369855      I2C: 00:1a

 1454 07:03:02.372900      I2C: 00:31

 1455 07:03:02.372987      I2C: 00:32

 1456 07:03:02.379971     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 07:03:02.389582     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 07:03:02.389670      I2C: 00:10

 1459 07:03:02.392848     PCI: 00:15.2

 1460 07:03:02.402948     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 07:03:02.403037     PCI: 00:15.3

 1462 07:03:02.415740     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 07:03:02.415828     PCI: 00:16.0

 1464 07:03:02.425743     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 07:03:02.429036     PCI: 00:19.0

 1466 07:03:02.433094     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 07:03:02.442626     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 07:03:02.445895      I2C: 00:15

 1469 07:03:02.449113     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 07:03:02.459003     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 07:03:02.469043     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 07:03:02.478793     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 07:03:02.482340      GENERIC: 0.0

 1474 07:03:02.485279      PCI: 01:00.0

 1475 07:03:02.495224      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 07:03:02.505749      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 07:03:02.515181      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 07:03:02.518403     PCI: 00:1e.0

 1479 07:03:02.528466     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 07:03:02.531851     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 07:03:02.541999     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 07:03:02.544743      SPI: 00

 1483 07:03:02.548086     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 07:03:02.558255     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 07:03:02.558345      SPI: 00

 1486 07:03:02.564807     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 07:03:02.571444     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 07:03:02.574659      PNP: 0c09.0

 1489 07:03:02.584600      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 07:03:02.587912     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 07:03:02.598277     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 07:03:02.604375     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 07:03:02.611389      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 07:03:02.611477       GENERIC: 0.0

 1495 07:03:02.614169       GENERIC: 1.0

 1496 07:03:02.617253     PCI: 00:1f.3

 1497 07:03:02.627670     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 07:03:02.637288     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 07:03:02.637379     PCI: 00:1f.5

 1500 07:03:02.650735     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 07:03:02.653848    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 07:03:02.653936     APIC: 00

 1503 07:03:02.657107     APIC: 01

 1504 07:03:02.657194     APIC: 05

 1505 07:03:02.657263     APIC: 07

 1506 07:03:02.660807     APIC: 02

 1507 07:03:02.660895     APIC: 04

 1508 07:03:02.660963     APIC: 06

 1509 07:03:02.663550     APIC: 03

 1510 07:03:02.667601  Done allocating resources.

 1511 07:03:02.673648  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 07:03:02.677436  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 07:03:02.680400  Configure GPIOs for I2S audio on UP4.

 1514 07:03:02.688478  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 07:03:02.691599  Enabling resources...

 1516 07:03:02.695048  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 07:03:02.698454  PCI: 00:00.0 cmd <- 06

 1518 07:03:02.701580  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 07:03:02.704678  PCI: 00:02.0 cmd <- 03

 1520 07:03:02.708215  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 07:03:02.711579  PCI: 00:04.0 cmd <- 02

 1522 07:03:02.714890  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 07:03:02.714978  PCI: 00:05.0 cmd <- 02

 1524 07:03:02.721695  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 07:03:02.721783  PCI: 00:08.0 cmd <- 06

 1526 07:03:02.725055  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 07:03:02.728081  PCI: 00:0d.0 cmd <- 02

 1528 07:03:02.731740  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 07:03:02.734817  PCI: 00:14.0 cmd <- 02

 1530 07:03:02.738014  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 07:03:02.741698  PCI: 00:14.2 cmd <- 02

 1532 07:03:02.744826  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 07:03:02.748038  PCI: 00:14.3 cmd <- 02

 1534 07:03:02.751244  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 07:03:02.754272  PCI: 00:15.0 cmd <- 02

 1536 07:03:02.758099  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 07:03:02.760872  PCI: 00:15.1 cmd <- 02

 1538 07:03:02.765003  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 07:03:02.765093  PCI: 00:15.2 cmd <- 02

 1540 07:03:02.771139  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 07:03:02.771226  PCI: 00:15.3 cmd <- 02

 1542 07:03:02.774707  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 07:03:02.777875  PCI: 00:16.0 cmd <- 02

 1544 07:03:02.781039  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 07:03:02.784297  PCI: 00:19.1 cmd <- 02

 1546 07:03:02.787586  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 07:03:02.791205  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 07:03:02.794472  PCI: 00:1d.0 cmd <- 06

 1549 07:03:02.797542  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 07:03:02.801173  PCI: 00:1e.0 cmd <- 06

 1551 07:03:02.804736  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 07:03:02.807765  PCI: 00:1e.2 cmd <- 06

 1553 07:03:02.810975  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 07:03:02.814108  PCI: 00:1e.3 cmd <- 02

 1555 07:03:02.817449  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 07:03:02.817536  PCI: 00:1f.0 cmd <- 407

 1557 07:03:02.824270  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 07:03:02.824358  PCI: 00:1f.3 cmd <- 02

 1559 07:03:02.827559  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 07:03:02.830755  PCI: 00:1f.5 cmd <- 406

 1561 07:03:02.836160  PCI: 01:00.0 cmd <- 02

 1562 07:03:02.840808  done.

 1563 07:03:02.844289  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 07:03:02.847093  Initializing devices...

 1565 07:03:02.850135  Root Device init

 1566 07:03:02.853386  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 07:03:02.860285  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 07:03:02.866885  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 07:03:02.873369  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 07:03:02.880050  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 07:03:02.883601  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 07:03:02.890256  fw_config match found: DB_USB=USB3_ACTIVE

 1573 07:03:02.895041  Configure Right Type-C port orientation for retimer

 1574 07:03:02.896866  Root Device init finished in 45 msecs

 1575 07:03:02.901008  PCI: 00:00.0 init

 1576 07:03:02.904357  CPU TDP = 9 Watts

 1577 07:03:02.904445  CPU PL1 = 9 Watts

 1578 07:03:02.907924  CPU PL2 = 40 Watts

 1579 07:03:02.911109  CPU PL4 = 83 Watts

 1580 07:03:02.914314  PCI: 00:00.0 init finished in 8 msecs

 1581 07:03:02.917384  PCI: 00:02.0 init

 1582 07:03:02.917515  GMA: Found VBT in CBFS

 1583 07:03:02.921133  GMA: Found valid VBT in CBFS

 1584 07:03:02.927353  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 07:03:02.934213                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 07:03:02.937357  PCI: 00:02.0 init finished in 18 msecs

 1587 07:03:02.940668  PCI: 00:05.0 init

 1588 07:03:02.944034  PCI: 00:05.0 init finished in 0 msecs

 1589 07:03:02.947320  PCI: 00:08.0 init

 1590 07:03:02.950922  PCI: 00:08.0 init finished in 0 msecs

 1591 07:03:02.954283  PCI: 00:14.0 init

 1592 07:03:02.957314  PCI: 00:14.0 init finished in 0 msecs

 1593 07:03:02.960663  PCI: 00:14.2 init

 1594 07:03:02.963792  PCI: 00:14.2 init finished in 0 msecs

 1595 07:03:02.967269  PCI: 00:15.0 init

 1596 07:03:02.970788  I2C bus 0 version 0x3230302a

 1597 07:03:02.974227  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 07:03:02.977423  PCI: 00:15.0 init finished in 6 msecs

 1599 07:03:02.980211  PCI: 00:15.1 init

 1600 07:03:02.980297  I2C bus 1 version 0x3230302a

 1601 07:03:02.986789  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 07:03:02.990143  PCI: 00:15.1 init finished in 6 msecs

 1603 07:03:02.990243  PCI: 00:15.2 init

 1604 07:03:02.993270  I2C bus 2 version 0x3230302a

 1605 07:03:02.996759  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 07:03:03.003742  PCI: 00:15.2 init finished in 6 msecs

 1607 07:03:03.003843  PCI: 00:15.3 init

 1608 07:03:03.006449  I2C bus 3 version 0x3230302a

 1609 07:03:03.009725  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 07:03:03.012939  PCI: 00:15.3 init finished in 6 msecs

 1611 07:03:03.016581  PCI: 00:16.0 init

 1612 07:03:03.019747  PCI: 00:16.0 init finished in 0 msecs

 1613 07:03:03.023249  PCI: 00:19.1 init

 1614 07:03:03.026277  I2C bus 5 version 0x3230302a

 1615 07:03:03.029626  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 07:03:03.032954  PCI: 00:19.1 init finished in 6 msecs

 1617 07:03:03.036339  PCI: 00:1d.0 init

 1618 07:03:03.039535  Initializing PCH PCIe bridge.

 1619 07:03:03.043008  PCI: 00:1d.0 init finished in 3 msecs

 1620 07:03:03.046509  PCI: 00:1f.0 init

 1621 07:03:03.049386  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 07:03:03.052762  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 07:03:03.056106  IOAPIC: ID = 0x02

 1624 07:03:03.059416  IOAPIC: Dumping registers

 1625 07:03:03.062537    reg 0x0000: 0x02000000

 1626 07:03:03.062624    reg 0x0001: 0x00770020

 1627 07:03:03.065858    reg 0x0002: 0x00000000

 1628 07:03:03.069801  PCI: 00:1f.0 init finished in 21 msecs

 1629 07:03:03.072723  PCI: 00:1f.2 init

 1630 07:03:03.076947  Disabling ACPI via APMC.

 1631 07:03:03.079591  APMC done.

 1632 07:03:03.083240  PCI: 00:1f.2 init finished in 5 msecs

 1633 07:03:03.093910  PCI: 01:00.0 init

 1634 07:03:03.097106  PCI: 01:00.0 init finished in 0 msecs

 1635 07:03:03.100595  PNP: 0c09.0 init

 1636 07:03:03.103678  Google Chrome EC uptime: 8.398 seconds

 1637 07:03:03.110430  Google Chrome AP resets since EC boot: 1

 1638 07:03:03.113758  Google Chrome most recent AP reset causes:

 1639 07:03:03.116693  	0.347: 32775 shutdown: entering G3

 1640 07:03:03.124022  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1641 07:03:03.126802  PNP: 0c09.0 init finished in 22 msecs

 1642 07:03:03.132344  Devices initialized

 1643 07:03:03.136164  Show all devs... After init.

 1644 07:03:03.139113  Root Device: enabled 1

 1645 07:03:03.139199  DOMAIN: 0000: enabled 1

 1646 07:03:03.142164  CPU_CLUSTER: 0: enabled 1

 1647 07:03:03.146098  PCI: 00:00.0: enabled 1

 1648 07:03:03.148738  PCI: 00:02.0: enabled 1

 1649 07:03:03.148824  PCI: 00:04.0: enabled 1

 1650 07:03:03.152431  PCI: 00:05.0: enabled 1

 1651 07:03:03.155508  PCI: 00:06.0: enabled 0

 1652 07:03:03.159095  PCI: 00:07.0: enabled 0

 1653 07:03:03.159182  PCI: 00:07.1: enabled 0

 1654 07:03:03.162022  PCI: 00:07.2: enabled 0

 1655 07:03:03.165389  PCI: 00:07.3: enabled 0

 1656 07:03:03.168878  PCI: 00:08.0: enabled 1

 1657 07:03:03.168965  PCI: 00:09.0: enabled 0

 1658 07:03:03.172281  PCI: 00:0a.0: enabled 0

 1659 07:03:03.175389  PCI: 00:0d.0: enabled 1

 1660 07:03:03.178674  PCI: 00:0d.1: enabled 0

 1661 07:03:03.178761  PCI: 00:0d.2: enabled 0

 1662 07:03:03.181853  PCI: 00:0d.3: enabled 0

 1663 07:03:03.185743  PCI: 00:0e.0: enabled 0

 1664 07:03:03.188676  PCI: 00:10.2: enabled 1

 1665 07:03:03.188763  PCI: 00:10.6: enabled 0

 1666 07:03:03.191765  PCI: 00:10.7: enabled 0

 1667 07:03:03.195194  PCI: 00:12.0: enabled 0

 1668 07:03:03.198507  PCI: 00:12.6: enabled 0

 1669 07:03:03.198594  PCI: 00:13.0: enabled 0

 1670 07:03:03.201817  PCI: 00:14.0: enabled 1

 1671 07:03:03.205091  PCI: 00:14.1: enabled 0

 1672 07:03:03.205178  PCI: 00:14.2: enabled 1

 1673 07:03:03.208261  PCI: 00:14.3: enabled 1

 1674 07:03:03.211681  PCI: 00:15.0: enabled 1

 1675 07:03:03.214813  PCI: 00:15.1: enabled 1

 1676 07:03:03.214900  PCI: 00:15.2: enabled 1

 1677 07:03:03.218544  PCI: 00:15.3: enabled 1

 1678 07:03:03.221529  PCI: 00:16.0: enabled 1

 1679 07:03:03.225933  PCI: 00:16.1: enabled 0

 1680 07:03:03.226019  PCI: 00:16.2: enabled 0

 1681 07:03:03.228438  PCI: 00:16.3: enabled 0

 1682 07:03:03.231420  PCI: 00:16.4: enabled 0

 1683 07:03:03.234660  PCI: 00:16.5: enabled 0

 1684 07:03:03.234747  PCI: 00:17.0: enabled 0

 1685 07:03:03.238574  PCI: 00:19.0: enabled 0

 1686 07:03:03.241353  PCI: 00:19.1: enabled 1

 1687 07:03:03.244741  PCI: 00:19.2: enabled 0

 1688 07:03:03.244828  PCI: 00:1c.0: enabled 1

 1689 07:03:03.248282  PCI: 00:1c.1: enabled 0

 1690 07:03:03.251424  PCI: 00:1c.2: enabled 0

 1691 07:03:03.254798  PCI: 00:1c.3: enabled 0

 1692 07:03:03.254886  PCI: 00:1c.4: enabled 0

 1693 07:03:03.257884  PCI: 00:1c.5: enabled 0

 1694 07:03:03.261299  PCI: 00:1c.6: enabled 1

 1695 07:03:03.261385  PCI: 00:1c.7: enabled 0

 1696 07:03:03.265265  PCI: 00:1d.0: enabled 1

 1697 07:03:03.267946  PCI: 00:1d.1: enabled 0

 1698 07:03:03.271441  PCI: 00:1d.2: enabled 1

 1699 07:03:03.271528  PCI: 00:1d.3: enabled 0

 1700 07:03:03.274557  PCI: 00:1e.0: enabled 1

 1701 07:03:03.277989  PCI: 00:1e.1: enabled 0

 1702 07:03:03.281474  PCI: 00:1e.2: enabled 1

 1703 07:03:03.281561  PCI: 00:1e.3: enabled 1

 1704 07:03:03.284741  PCI: 00:1f.0: enabled 1

 1705 07:03:03.287860  PCI: 00:1f.1: enabled 0

 1706 07:03:03.291289  PCI: 00:1f.2: enabled 1

 1707 07:03:03.291375  PCI: 00:1f.3: enabled 1

 1708 07:03:03.294488  PCI: 00:1f.4: enabled 0

 1709 07:03:03.297848  PCI: 00:1f.5: enabled 1

 1710 07:03:03.297934  PCI: 00:1f.6: enabled 0

 1711 07:03:03.301167  PCI: 00:1f.7: enabled 0

 1712 07:03:03.304711  APIC: 00: enabled 1

 1713 07:03:03.308116  GENERIC: 0.0: enabled 1

 1714 07:03:03.308203  GENERIC: 0.0: enabled 1

 1715 07:03:03.311362  GENERIC: 1.0: enabled 1

 1716 07:03:03.314508  GENERIC: 0.0: enabled 1

 1717 07:03:03.318311  GENERIC: 1.0: enabled 1

 1718 07:03:03.318399  USB0 port 0: enabled 1

 1719 07:03:03.321401  GENERIC: 0.0: enabled 1

 1720 07:03:03.324850  USB0 port 0: enabled 1

 1721 07:03:03.324937  GENERIC: 0.0: enabled 1

 1722 07:03:03.328155  I2C: 00:1a: enabled 1

 1723 07:03:03.331551  I2C: 00:31: enabled 1

 1724 07:03:03.331638  I2C: 00:32: enabled 1

 1725 07:03:03.334123  I2C: 00:10: enabled 1

 1726 07:03:03.337792  I2C: 00:15: enabled 1

 1727 07:03:03.340900  GENERIC: 0.0: enabled 0

 1728 07:03:03.340986  GENERIC: 1.0: enabled 0

 1729 07:03:03.344186  GENERIC: 0.0: enabled 1

 1730 07:03:03.347484  SPI: 00: enabled 1

 1731 07:03:03.347569  SPI: 00: enabled 1

 1732 07:03:03.350705  PNP: 0c09.0: enabled 1

 1733 07:03:03.354450  GENERIC: 0.0: enabled 1

 1734 07:03:03.354536  USB3 port 0: enabled 1

 1735 07:03:03.357380  USB3 port 1: enabled 1

 1736 07:03:03.360756  USB3 port 2: enabled 0

 1737 07:03:03.360843  USB3 port 3: enabled 0

 1738 07:03:03.364009  USB2 port 0: enabled 0

 1739 07:03:03.367421  USB2 port 1: enabled 1

 1740 07:03:03.370976  USB2 port 2: enabled 1

 1741 07:03:03.371067  USB2 port 3: enabled 0

 1742 07:03:03.374288  USB2 port 4: enabled 1

 1743 07:03:03.377773  USB2 port 5: enabled 0

 1744 07:03:03.377859  USB2 port 6: enabled 0

 1745 07:03:03.381015  USB2 port 7: enabled 0

 1746 07:03:03.384398  USB2 port 8: enabled 0

 1747 07:03:03.387650  USB2 port 9: enabled 0

 1748 07:03:03.387735  USB3 port 0: enabled 0

 1749 07:03:03.390573  USB3 port 1: enabled 1

 1750 07:03:03.394087  USB3 port 2: enabled 0

 1751 07:03:03.394221  USB3 port 3: enabled 0

 1752 07:03:03.397557  GENERIC: 0.0: enabled 1

 1753 07:03:03.400464  GENERIC: 1.0: enabled 1

 1754 07:03:03.400551  APIC: 01: enabled 1

 1755 07:03:03.403965  APIC: 05: enabled 1

 1756 07:03:03.407452  APIC: 07: enabled 1

 1757 07:03:03.407538  APIC: 02: enabled 1

 1758 07:03:03.410635  APIC: 04: enabled 1

 1759 07:03:03.413996  APIC: 06: enabled 1

 1760 07:03:03.414085  APIC: 03: enabled 1

 1761 07:03:03.417081  PCI: 01:00.0: enabled 1

 1762 07:03:03.423770  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms

 1763 07:03:03.427237  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 07:03:03.430205  ELOG: NV offset 0xf30000 size 0x1000

 1765 07:03:03.437859  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 07:03:03.444186  ELOG: Event(17) added with size 13 at 2023-03-22 07:03:01 UTC

 1767 07:03:03.451332  ELOG: Event(92) added with size 9 at 2023-03-22 07:03:01 UTC

 1768 07:03:03.457248  ELOG: Event(93) added with size 9 at 2023-03-22 07:03:01 UTC

 1769 07:03:03.464294  ELOG: Event(9E) added with size 10 at 2023-03-22 07:03:01 UTC

 1770 07:03:03.470654  ELOG: Event(9F) added with size 14 at 2023-03-22 07:03:01 UTC

 1771 07:03:03.477276  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1772 07:03:03.483774  ELOG: Event(A1) added with size 10 at 2023-03-22 07:03:01 UTC

 1773 07:03:03.487135  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1774 07:03:03.493765  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1775 07:03:03.497095  Finalize devices...

 1776 07:03:03.497182  Devices finalized

 1777 07:03:03.503900  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1778 07:03:03.510254  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1779 07:03:03.513573  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1780 07:03:03.520149  ME: HFSTS1                      : 0x80030055

 1781 07:03:03.523291  ME: HFSTS2                      : 0x30280116

 1782 07:03:03.526456  ME: HFSTS3                      : 0x00000050

 1783 07:03:03.533496  ME: HFSTS4                      : 0x00004000

 1784 07:03:03.536862  ME: HFSTS5                      : 0x00000000

 1785 07:03:03.543302  ME: HFSTS6                      : 0x00400006

 1786 07:03:03.547456  ME: Manufacturing Mode          : YES

 1787 07:03:03.550076  ME: SPI Protection Mode Enabled : NO

 1788 07:03:03.553307  ME: FW Partition Table          : OK

 1789 07:03:03.556751  ME: Bringup Loader Failure      : NO

 1790 07:03:03.560066  ME: Firmware Init Complete      : NO

 1791 07:03:03.563050  ME: Boot Options Present        : NO

 1792 07:03:03.566414  ME: Update In Progress          : NO

 1793 07:03:03.573244  ME: D0i3 Support                : YES

 1794 07:03:03.577003  ME: Low Power State Enabled     : NO

 1795 07:03:03.579634  ME: CPU Replaced                : YES

 1796 07:03:03.583337  ME: CPU Replacement Valid       : YES

 1797 07:03:03.586522  ME: Current Working State       : 5

 1798 07:03:03.589673  ME: Current Operation State     : 1

 1799 07:03:03.593259  ME: Current Operation Mode      : 3

 1800 07:03:03.596523  ME: Error Code                  : 0

 1801 07:03:03.599706  ME: Enhanced Debug Mode         : NO

 1802 07:03:03.606479  ME: CPU Debug Disabled          : YES

 1803 07:03:03.609540  ME: TXT Support                 : NO

 1804 07:03:03.616653  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1805 07:03:03.622918  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1806 07:03:03.626365  CBFS: 'fallback/slic' not found.

 1807 07:03:03.629525  ACPI: Writing ACPI tables at 76b01000.

 1808 07:03:03.632844  ACPI:    * FACS

 1809 07:03:03.632930  ACPI:    * DSDT

 1810 07:03:03.636215  Ramoops buffer: 0x100000@0x76a00000.

 1811 07:03:03.643182  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1812 07:03:03.646091  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1813 07:03:03.649060  Google Chrome EC: version:

 1814 07:03:03.653013  	ro: voema_v2.0.7540-147f8d37d1

 1815 07:03:03.656255  	rw: voema_v2.0.7540-147f8d37d1

 1816 07:03:03.659109    running image: 2

 1817 07:03:03.665910  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1818 07:03:03.668956  ACPI:    * FADT

 1819 07:03:03.669042  SCI is IRQ9

 1820 07:03:03.672413  ACPI: added table 1/32, length now 40

 1821 07:03:03.675853  ACPI:     * SSDT

 1822 07:03:03.679148  Found 1 CPU(s) with 8 core(s) each.

 1823 07:03:03.685870  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1824 07:03:03.689295  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1825 07:03:03.692481  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1826 07:03:03.695246  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1827 07:03:03.702070  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1828 07:03:03.708621  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1829 07:03:03.712035  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1830 07:03:03.718935  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1831 07:03:03.725334  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1832 07:03:03.729013  \_SB.PCI0.RP09: Added StorageD3Enable property

 1833 07:03:03.732484  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1834 07:03:03.738687  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1835 07:03:03.745007  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1836 07:03:03.748710  PS2K: Passing 80 keymaps to kernel

 1837 07:03:03.755562  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1838 07:03:03.761792  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1839 07:03:03.768328  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1840 07:03:03.775281  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1841 07:03:03.781453  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1842 07:03:03.788009  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1843 07:03:03.794599  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1844 07:03:03.801612  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1845 07:03:03.804455  ACPI: added table 2/32, length now 44

 1846 07:03:03.804543  ACPI:    * MCFG

 1847 07:03:03.807910  ACPI: added table 3/32, length now 48

 1848 07:03:03.811260  ACPI:    * TPM2

 1849 07:03:03.814582  TPM2 log created at 0x769f0000

 1850 07:03:03.817783  ACPI: added table 4/32, length now 52

 1851 07:03:03.817870  ACPI:    * MADT

 1852 07:03:03.821174  SCI is IRQ9

 1853 07:03:03.824916  ACPI: added table 5/32, length now 56

 1854 07:03:03.828350  current = 76b09850

 1855 07:03:03.828436  ACPI:    * DMAR

 1856 07:03:03.830946  ACPI: added table 6/32, length now 60

 1857 07:03:03.834499  ACPI: added table 7/32, length now 64

 1858 07:03:03.837841  ACPI:    * HPET

 1859 07:03:03.841091  ACPI: added table 8/32, length now 68

 1860 07:03:03.841179  ACPI: done.

 1861 07:03:03.844325  ACPI tables: 35216 bytes.

 1862 07:03:03.847960  smbios_write_tables: 769ef000

 1863 07:03:03.851359  EC returned error result code 3

 1864 07:03:03.854504  Couldn't obtain OEM name from CBI

 1865 07:03:03.857771  Create SMBIOS type 16

 1866 07:03:03.861417  Create SMBIOS type 17

 1867 07:03:03.864434  GENERIC: 0.0 (WIFI Device)

 1868 07:03:03.864522  SMBIOS tables: 1750 bytes.

 1869 07:03:03.871062  Writing table forward entry at 0x00000500

 1870 07:03:03.877156  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1871 07:03:03.880785  Writing coreboot table at 0x76b25000

 1872 07:03:03.887590   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1873 07:03:03.890432   1. 0000000000001000-000000000009ffff: RAM

 1874 07:03:03.894037   2. 00000000000a0000-00000000000fffff: RESERVED

 1875 07:03:03.900474   3. 0000000000100000-00000000769eefff: RAM

 1876 07:03:03.903709   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1877 07:03:03.910394   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1878 07:03:03.916876   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1879 07:03:03.920057   7. 0000000077000000-000000007fbfffff: RESERVED

 1880 07:03:03.927638   8. 00000000c0000000-00000000cfffffff: RESERVED

 1881 07:03:03.930377   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1882 07:03:03.934093  10. 00000000fb000000-00000000fb000fff: RESERVED

 1883 07:03:03.940196  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1884 07:03:03.943816  12. 00000000fed80000-00000000fed87fff: RESERVED

 1885 07:03:03.950379  13. 00000000fed90000-00000000fed92fff: RESERVED

 1886 07:03:03.953346  14. 00000000feda0000-00000000feda1fff: RESERVED

 1887 07:03:03.959828  15. 00000000fedc0000-00000000feddffff: RESERVED

 1888 07:03:03.963049  16. 0000000100000000-00000002803fffff: RAM

 1889 07:03:03.966556  Passing 4 GPIOs to payload:

 1890 07:03:03.970102              NAME |       PORT | POLARITY |     VALUE

 1891 07:03:03.976539               lid |  undefined |     high |      high

 1892 07:03:03.983073             power |  undefined |     high |       low

 1893 07:03:03.986145             oprom |  undefined |     high |       low

 1894 07:03:03.992959          EC in RW | 0x000000e5 |     high |      high

 1895 07:03:03.999634  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 36d1

 1896 07:03:04.003054  coreboot table: 1576 bytes.

 1897 07:03:04.006101  IMD ROOT    0. 0x76fff000 0x00001000

 1898 07:03:04.009350  IMD SMALL   1. 0x76ffe000 0x00001000

 1899 07:03:04.012935  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1900 07:03:04.016026  VPD         3. 0x76c4d000 0x00000367

 1901 07:03:04.019306  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1902 07:03:04.022797  CONSOLE     5. 0x76c2c000 0x00020000

 1903 07:03:04.025884  FMAP        6. 0x76c2b000 0x00000578

 1904 07:03:04.032777  TIME STAMP  7. 0x76c2a000 0x00000910

 1905 07:03:04.035991  VBOOT WORK  8. 0x76c16000 0x00014000

 1906 07:03:04.039259  ROMSTG STCK 9. 0x76c15000 0x00001000

 1907 07:03:04.042390  AFTER CAR  10. 0x76c0a000 0x0000b000

 1908 07:03:04.045929  RAMSTAGE   11. 0x76b97000 0x00073000

 1909 07:03:04.049091  REFCODE    12. 0x76b42000 0x00055000

 1910 07:03:04.052265  SMM BACKUP 13. 0x76b32000 0x00010000

 1911 07:03:04.058845  4f444749   14. 0x76b30000 0x00002000

 1912 07:03:04.062410  EXT VBT15. 0x76b2d000 0x0000219f

 1913 07:03:04.065626  COREBOOT   16. 0x76b25000 0x00008000

 1914 07:03:04.069076  ACPI       17. 0x76b01000 0x00024000

 1915 07:03:04.072102  ACPI GNVS  18. 0x76b00000 0x00001000

 1916 07:03:04.075949  RAMOOPS    19. 0x76a00000 0x00100000

 1917 07:03:04.079037  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1918 07:03:04.082177  SMBIOS     21. 0x769ef000 0x00000800

 1919 07:03:04.085858  IMD small region:

 1920 07:03:04.088521    IMD ROOT    0. 0x76ffec00 0x00000400

 1921 07:03:04.091803    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1922 07:03:04.095188    POWER STATE 2. 0x76ffeb80 0x00000044

 1923 07:03:04.101650    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1924 07:03:04.105283    MEM INFO    4. 0x76ffe980 0x000001e0

 1925 07:03:04.111602  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1926 07:03:04.115048  MTRR: Physical address space:

 1927 07:03:04.118109  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1928 07:03:04.125356  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1929 07:03:04.131394  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1930 07:03:04.137945  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1931 07:03:04.144870  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1932 07:03:04.151484  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1933 07:03:04.158455  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1934 07:03:04.161418  MTRR: Fixed MSR 0x250 0x0606060606060606

 1935 07:03:04.164696  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 07:03:04.171555  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 07:03:04.174856  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 07:03:04.177643  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 07:03:04.180986  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 07:03:04.184281  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 07:03:04.190823  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 07:03:04.194113  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 07:03:04.197403  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 07:03:04.200721  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 07:03:04.205512  call enable_fixed_mtrr()

 1946 07:03:04.208779  CPU physical address size: 39 bits

 1947 07:03:04.215274  MTRR: default type WB/UC MTRR counts: 6/6.

 1948 07:03:04.218632  MTRR: UC selected as default type.

 1949 07:03:04.225274  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1950 07:03:04.228674  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1951 07:03:04.235154  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1952 07:03:04.241639  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1953 07:03:04.248348  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1954 07:03:04.254960  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1955 07:03:04.261714  MTRR: Fixed MSR 0x250 0x0606060606060606

 1956 07:03:04.264994  MTRR: Fixed MSR 0x258 0x0606060606060606

 1957 07:03:04.268450  MTRR: Fixed MSR 0x259 0x0000000000000000

 1958 07:03:04.271726  MTRR: Fixed MSR 0x268 0x0606060606060606

 1959 07:03:04.278549  MTRR: Fixed MSR 0x269 0x0606060606060606

 1960 07:03:04.281612  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1961 07:03:04.284768  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1962 07:03:04.288627  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1963 07:03:04.291684  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1964 07:03:04.298158  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1965 07:03:04.301512  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1966 07:03:04.301599  

 1967 07:03:04.305270  MTRR check

 1968 07:03:04.305383  call enable_fixed_mtrr()

 1969 07:03:04.308063  Fixed MTRRs   : Enabled

 1970 07:03:04.311240  Variable MTRRs: Enabled

 1971 07:03:04.311327  

 1972 07:03:04.314432  CPU physical address size: 39 bits

 1973 07:03:04.321566  BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms

 1974 07:03:04.324683  MTRR: Fixed MSR 0x250 0x0606060606060606

 1975 07:03:04.331272  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 07:03:04.334428  MTRR: Fixed MSR 0x258 0x0606060606060606

 1977 07:03:04.338291  MTRR: Fixed MSR 0x259 0x0000000000000000

 1978 07:03:04.341323  MTRR: Fixed MSR 0x268 0x0606060606060606

 1979 07:03:04.347639  MTRR: Fixed MSR 0x269 0x0606060606060606

 1980 07:03:04.351237  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1981 07:03:04.354230  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1982 07:03:04.357632  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1983 07:03:04.364506  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1984 07:03:04.367371  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1985 07:03:04.370870  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1986 07:03:04.377412  MTRR: Fixed MSR 0x258 0x0606060606060606

 1987 07:03:04.381089  MTRR: Fixed MSR 0x259 0x0000000000000000

 1988 07:03:04.384304  MTRR: Fixed MSR 0x268 0x0606060606060606

 1989 07:03:04.387407  MTRR: Fixed MSR 0x269 0x0606060606060606

 1990 07:03:04.394103  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1991 07:03:04.397426  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1992 07:03:04.400768  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1993 07:03:04.404501  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1994 07:03:04.410898  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1995 07:03:04.413792  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1996 07:03:04.417648  call enable_fixed_mtrr()

 1997 07:03:04.420500  call enable_fixed_mtrr()

 1998 07:03:04.423820  MTRR: Fixed MSR 0x250 0x0606060606060606

 1999 07:03:04.427388  MTRR: Fixed MSR 0x250 0x0606060606060606

 2000 07:03:04.430628  MTRR: Fixed MSR 0x258 0x0606060606060606

 2001 07:03:04.437916  MTRR: Fixed MSR 0x259 0x0000000000000000

 2002 07:03:04.441075  MTRR: Fixed MSR 0x268 0x0606060606060606

 2003 07:03:04.443787  MTRR: Fixed MSR 0x269 0x0606060606060606

 2004 07:03:04.447006  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2005 07:03:04.453643  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2006 07:03:04.457253  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2007 07:03:04.460982  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2008 07:03:04.463412  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2009 07:03:04.466813  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2010 07:03:04.473822  MTRR: Fixed MSR 0x258 0x0606060606060606

 2011 07:03:04.476777  call enable_fixed_mtrr()

 2012 07:03:04.480077  MTRR: Fixed MSR 0x259 0x0000000000000000

 2013 07:03:04.483558  MTRR: Fixed MSR 0x268 0x0606060606060606

 2014 07:03:04.486755  MTRR: Fixed MSR 0x269 0x0606060606060606

 2015 07:03:04.493419  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2016 07:03:04.496633  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2017 07:03:04.500315  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2018 07:03:04.503513  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2019 07:03:04.510606  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2020 07:03:04.513381  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2021 07:03:04.516489  CPU physical address size: 39 bits

 2022 07:03:04.520548  call enable_fixed_mtrr()

 2023 07:03:04.523613  CPU physical address size: 39 bits

 2024 07:03:04.530942  CPU physical address size: 39 bits

 2025 07:03:04.535602  Checking cr50 for pending updates

 2026 07:03:04.535690  MTRR: Fixed MSR 0x250 0x0606060606060606

 2027 07:03:04.542854  MTRR: Fixed MSR 0x250 0x0606060606060606

 2028 07:03:04.545629  MTRR: Fixed MSR 0x258 0x0606060606060606

 2029 07:03:04.549348  MTRR: Fixed MSR 0x259 0x0000000000000000

 2030 07:03:04.552447  MTRR: Fixed MSR 0x268 0x0606060606060606

 2031 07:03:04.555980  MTRR: Fixed MSR 0x269 0x0606060606060606

 2032 07:03:04.562406  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2033 07:03:04.565944  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2034 07:03:04.569748  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2035 07:03:04.572090  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2036 07:03:04.578728  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2037 07:03:04.582247  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2038 07:03:04.585343  MTRR: Fixed MSR 0x258 0x0606060606060606

 2039 07:03:04.588985  call enable_fixed_mtrr()

 2040 07:03:04.592130  MTRR: Fixed MSR 0x259 0x0000000000000000

 2041 07:03:04.599402  MTRR: Fixed MSR 0x268 0x0606060606060606

 2042 07:03:04.602240  MTRR: Fixed MSR 0x269 0x0606060606060606

 2043 07:03:04.605598  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2044 07:03:04.608671  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2045 07:03:04.615238  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2046 07:03:04.619125  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2047 07:03:04.622091  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2048 07:03:04.625509  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2049 07:03:04.629787  CPU physical address size: 39 bits

 2050 07:03:04.636181  call enable_fixed_mtrr()

 2051 07:03:04.636268  Reading cr50 TPM mode

 2052 07:03:04.639833  CPU physical address size: 39 bits

 2053 07:03:04.643075  CPU physical address size: 39 bits

 2054 07:03:04.650174  BS: BS_PAYLOAD_LOAD entry times (exec / console): 314 / 6 ms

 2055 07:03:04.656769  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2056 07:03:04.663233  Checking segment from ROM address 0xffc02b38

 2057 07:03:04.666479  Checking segment from ROM address 0xffc02b54

 2058 07:03:04.670026  Loading segment from ROM address 0xffc02b38

 2059 07:03:04.673223    code (compression=0)

 2060 07:03:04.683368    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2061 07:03:04.689429  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2062 07:03:04.692640  it's not compressed!

 2063 07:03:04.832065  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2064 07:03:04.838440  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2065 07:03:04.844479  Loading segment from ROM address 0xffc02b54

 2066 07:03:04.848100    Entry Point 0x30000000

 2067 07:03:04.848187  Loaded segments

 2068 07:03:04.854551  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2069 07:03:04.898061  Finalizing chipset.

 2070 07:03:04.901135  Finalizing SMM.

 2071 07:03:04.901222  APMC done.

 2072 07:03:04.907412  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2073 07:03:04.910836  mp_park_aps done after 0 msecs.

 2074 07:03:04.914175  Jumping to boot code at 0x30000000(0x76b25000)

 2075 07:03:04.924241  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2076 07:03:04.924332  

 2077 07:03:04.924409  

 2078 07:03:04.924474  

 2079 07:03:04.928106  Starting depthcharge on Voema...

 2080 07:03:04.928193  

 2081 07:03:04.928554  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2082 07:03:04.928658  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2083 07:03:04.928745  Setting prompt string to ['volteer:']
 2084 07:03:04.928832  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2085 07:03:04.937441  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2086 07:03:04.937529  

 2087 07:03:04.944097  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2088 07:03:04.944184  

 2089 07:03:04.947602  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2090 07:03:04.950527  

 2091 07:03:04.954095  Failed to find eMMC card reader

 2092 07:03:04.954206  

 2093 07:03:04.954274  Wipe memory regions:

 2094 07:03:04.954337  

 2095 07:03:04.960606  	[0x00000000001000, 0x000000000a0000)

 2096 07:03:04.960693  

 2097 07:03:04.963872  	[0x00000000100000, 0x00000030000000)

 2098 07:03:04.989646  

 2099 07:03:04.993564  	[0x00000032662db0, 0x000000769ef000)

 2100 07:03:05.029036  

 2101 07:03:05.032467  	[0x00000100000000, 0x00000280400000)

 2102 07:03:05.235070  

 2103 07:03:05.238534  ec_init: CrosEC protocol v3 supported (256, 256)

 2104 07:03:05.238651  

 2105 07:03:05.245028  update_port_state: port C0 state: usb enable 1 mux conn 0

 2106 07:03:05.245115  

 2107 07:03:05.251547  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2108 07:03:05.254706  

 2109 07:03:05.261368  pmc_check_ipc_sts: STS_BUSY done after 2512 us

 2110 07:03:05.261455  

 2111 07:03:05.265076  send_conn_disc_msg: pmc_send_cmd succeeded

 2112 07:03:05.695727  

 2113 07:03:05.695869  R8152: Initializing

 2114 07:03:05.695938  

 2115 07:03:05.698050  Version 6 (ocp_data = 5c30)

 2116 07:03:05.698148  

 2117 07:03:05.701806  R8152: Done initializing

 2118 07:03:05.701893  

 2119 07:03:05.704878  Adding net device

 2120 07:03:06.007318  

 2121 07:03:06.010543  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2122 07:03:06.010634  

 2123 07:03:06.010703  

 2124 07:03:06.010765  

 2125 07:03:06.013971  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2127 07:03:06.114790  volteer: tftpboot 192.168.201.1 9726688/tftp-deploy-q6gi0v92/kernel/bzImage 9726688/tftp-deploy-q6gi0v92/kernel/cmdline 9726688/tftp-deploy-q6gi0v92/ramdisk/ramdisk.cpio.gz

 2128 07:03:06.114940  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 07:03:06.115031  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2130 07:03:06.119330  tftpboot 192.168.201.1 9726688/tftp-deploy-q6gi0v92/kernel/bzImoy-q6gi0v92/kernel/cmdline 9726688/tftp-deploy-q6gi0v92/ramdisk/ramdisk.cpio.gz

 2131 07:03:06.119427  

 2132 07:03:06.119496  Waiting for link

 2133 07:03:06.322076  

 2134 07:03:06.322240  done.

 2135 07:03:06.322310  

 2136 07:03:06.322374  MAC: 00:24:32:30:7b:ec

 2137 07:03:06.322437  

 2138 07:03:06.325381  Sending DHCP discover... done.

 2139 07:03:06.325469  

 2140 07:03:06.328768  Waiting for reply... done.

 2141 07:03:06.328856  

 2142 07:03:06.331772  Sending DHCP request... done.

 2143 07:03:06.331860  

 2144 07:03:06.335566  Waiting for reply... done.

 2145 07:03:06.335652  

 2146 07:03:06.338167  My ip is 192.168.201.11

 2147 07:03:06.338254  

 2148 07:03:06.341688  The DHCP server ip is 192.168.201.1

 2149 07:03:06.341775  

 2150 07:03:06.348587  TFTP server IP predefined by user: 192.168.201.1

 2151 07:03:06.348674  

 2152 07:03:06.355290  Bootfile predefined by user: 9726688/tftp-deploy-q6gi0v92/kernel/bzImage

 2153 07:03:06.355377  

 2154 07:03:06.358543  Sending tftp read request... done.

 2155 07:03:06.358629  

 2156 07:03:06.361499  Waiting for the transfer... 

 2157 07:03:06.361585  

 2158 07:03:06.927891  00000000 ################################################################

 2159 07:03:06.928034  

 2160 07:03:07.501610  00080000 ################################################################

 2161 07:03:07.501752  

 2162 07:03:08.066392  00100000 ################################################################

 2163 07:03:08.066536  

 2164 07:03:08.634534  00180000 ################################################################

 2165 07:03:08.635003  

 2166 07:03:09.322849  00200000 ################################################################

 2167 07:03:09.323366  

 2168 07:03:09.998320  00280000 ################################################################

 2169 07:03:09.998853  

 2170 07:03:10.660012  00300000 ################################################################

 2171 07:03:10.660551  

 2172 07:03:11.296159  00380000 ################################################################

 2173 07:03:11.296700  

 2174 07:03:11.826346  00400000 ################################################################

 2175 07:03:11.826487  

 2176 07:03:12.381454  00480000 ################################################################

 2177 07:03:12.381603  

 2178 07:03:12.922706  00500000 ################################################################

 2179 07:03:12.922859  

 2180 07:03:13.455670  00580000 ################################################################

 2181 07:03:13.455829  

 2182 07:03:13.996339  00600000 ################################################################

 2183 07:03:13.996491  

 2184 07:03:14.536890  00680000 ################################################################

 2185 07:03:14.537033  

 2186 07:03:15.090688  00700000 ################################################################

 2187 07:03:15.090836  

 2188 07:03:15.626431  00780000 ################################################################

 2189 07:03:15.626581  

 2190 07:03:16.185603  00800000 ################################################################

 2191 07:03:16.185752  

 2192 07:03:16.721920  00880000 ################################################################

 2193 07:03:16.722075  

 2194 07:03:17.280204  00900000 ################################################################

 2195 07:03:17.280359  

 2196 07:03:17.806303  00980000 ################################################################

 2197 07:03:17.806467  

 2198 07:03:18.344090  00a00000 ################################################################

 2199 07:03:18.344234  

 2200 07:03:18.895453  00a80000 ################################################################

 2201 07:03:18.895596  

 2202 07:03:19.004281  00b00000 ############# done.

 2203 07:03:19.004407  

 2204 07:03:19.007225  The bootfile was 11637120 bytes long.

 2205 07:03:19.007313  

 2206 07:03:19.010429  Sending tftp read request... done.

 2207 07:03:19.010516  

 2208 07:03:19.014163  Waiting for the transfer... 

 2209 07:03:19.014278  

 2210 07:03:19.703490  00000000 ################################################################

 2211 07:03:19.704034  

 2212 07:03:20.414584  00080000 ################################################################

 2213 07:03:20.415113  

 2214 07:03:21.109928  00100000 ################################################################

 2215 07:03:21.110498  

 2216 07:03:21.798227  00180000 ################################################################

 2217 07:03:21.798746  

 2218 07:03:22.450400  00200000 ################################################################

 2219 07:03:22.450931  

 2220 07:03:23.120313  00280000 ################################################################

 2221 07:03:23.120918  

 2222 07:03:23.788760  00300000 ################################################################

 2223 07:03:23.789290  

 2224 07:03:24.451602  00380000 ################################################################

 2225 07:03:24.452134  

 2226 07:03:25.105257  00400000 ################################################################

 2227 07:03:25.105784  

 2228 07:03:25.750859  00480000 ################################################################

 2229 07:03:25.751381  

 2230 07:03:26.321031  00500000 ################################################################

 2231 07:03:26.321171  

 2232 07:03:26.879269  00580000 ################################################################

 2233 07:03:26.879861  

 2234 07:03:27.523164  00600000 ################################################################

 2235 07:03:27.523734  

 2236 07:03:28.245259  00680000 ################################################################

 2237 07:03:28.245823  

 2238 07:03:28.873588  00700000 ################################################################

 2239 07:03:28.873731  

 2240 07:03:29.414085  00780000 ################################################################

 2241 07:03:29.414269  

 2242 07:03:29.972440  00800000 ################################################################

 2243 07:03:29.972599  

 2244 07:03:30.496332  00880000 ################################################################

 2245 07:03:30.496493  

 2246 07:03:31.061131  00900000 ################################################################

 2247 07:03:31.061296  

 2248 07:03:31.627507  00980000 ################################################################

 2249 07:03:31.627650  

 2250 07:03:32.165841  00a00000 ################################################################

 2251 07:03:32.165987  

 2252 07:03:32.711087  00a80000 ################################################################

 2253 07:03:32.711235  

 2254 07:03:33.252322  00b00000 ################################################################

 2255 07:03:33.252468  

 2256 07:03:33.782649  00b80000 ################################################################

 2257 07:03:33.782803  

 2258 07:03:34.312421  00c00000 ################################################################

 2259 07:03:34.312567  

 2260 07:03:34.853606  00c80000 ################################################################

 2261 07:03:34.853767  

 2262 07:03:35.398042  00d00000 ################################################################

 2263 07:03:35.398262  

 2264 07:03:35.929980  00d80000 ################################################################

 2265 07:03:35.930139  

 2266 07:03:36.475485  00e00000 ################################################################

 2267 07:03:36.475624  

 2268 07:03:37.002429  00e80000 ################################################################

 2269 07:03:37.002575  

 2270 07:03:37.632841  00f00000 ################################################################

 2271 07:03:37.633382  

 2272 07:03:38.357180  00f80000 ################################################################

 2273 07:03:38.357791  

 2274 07:03:38.975704  01000000 ################################################################

 2275 07:03:38.975841  

 2276 07:03:39.580852  01080000 ################################################################

 2277 07:03:39.580997  

 2278 07:03:40.195034  01100000 ################################################################

 2279 07:03:40.195173  

 2280 07:03:40.753406  01180000 ################################################################

 2281 07:03:40.753549  

 2282 07:03:41.300659  01200000 ################################################################

 2283 07:03:41.300807  

 2284 07:03:41.921293  01280000 ################################################################

 2285 07:03:41.921863  

 2286 07:03:42.604777  01300000 ################################################################

 2287 07:03:42.605391  

 2288 07:03:43.302405  01380000 ################################################################

 2289 07:03:43.302977  

 2290 07:03:44.019031  01400000 ################################################################

 2291 07:03:44.019637  

 2292 07:03:44.737212  01480000 ################################################################

 2293 07:03:44.737808  

 2294 07:03:45.457510  01500000 ################################################################

 2295 07:03:45.458083  

 2296 07:03:46.188733  01580000 ################################################################

 2297 07:03:46.189369  

 2298 07:03:46.910875  01600000 ################################################################

 2299 07:03:46.911468  

 2300 07:03:47.582763  01680000 ################################################################

 2301 07:03:47.583289  

 2302 07:03:48.275833  01700000 ################################################################

 2303 07:03:48.276374  

 2304 07:03:48.971992  01780000 ################################################################

 2305 07:03:48.972135  

 2306 07:03:49.524813  01800000 ################################################################

 2307 07:03:49.524970  

 2308 07:03:50.064046  01880000 ################################################################

 2309 07:03:50.064197  

 2310 07:03:50.607451  01900000 ################################################################

 2311 07:03:50.607594  

 2312 07:03:51.152389  01980000 ################################################################

 2313 07:03:51.152530  

 2314 07:03:51.695479  01a00000 ################################################################

 2315 07:03:51.695623  

 2316 07:03:52.247296  01a80000 ################################################################

 2317 07:03:52.247453  

 2318 07:03:52.913377  01b00000 ################################################################

 2319 07:03:52.913535  

 2320 07:03:53.610824  01b80000 ################################################################

 2321 07:03:53.610966  

 2322 07:03:54.246255  01c00000 ################################################################

 2323 07:03:54.246412  

 2324 07:03:54.844621  01c80000 ################################################################

 2325 07:03:54.844766  

 2326 07:03:55.444546  01d00000 ################################################################

 2327 07:03:55.444696  

 2328 07:03:56.012699  01d80000 ################################################################

 2329 07:03:56.012853  

 2330 07:03:56.580999  01e00000 ################################################################

 2331 07:03:56.581151  

 2332 07:03:57.181506  01e80000 ################################################################

 2333 07:03:57.182065  

 2334 07:03:57.837065  01f00000 ################################################################

 2335 07:03:57.837608  

 2336 07:03:58.548903  01f80000 ################################################################

 2337 07:03:58.549443  

 2338 07:03:59.152179  02000000 ################################################################

 2339 07:03:59.152386  

 2340 07:03:59.840150  02080000 ################################################################

 2341 07:03:59.840747  

 2342 07:04:00.547640  02100000 ################################################################

 2343 07:04:00.548259  

 2344 07:04:01.206286  02180000 ################################################################

 2345 07:04:01.206821  

 2346 07:04:01.859599  02200000 ################################################################

 2347 07:04:01.859752  

 2348 07:04:02.241687  02280000 ######################################## done.

 2349 07:04:02.241848  

 2350 07:04:02.244774  Sending tftp read request... done.

 2351 07:04:02.244863  

 2352 07:04:02.247926  Waiting for the transfer... 

 2353 07:04:02.248015  

 2354 07:04:02.248084  00000000 # done.

 2355 07:04:02.248152  

 2356 07:04:02.257795  Command line loaded dynamically from TFTP file: 9726688/tftp-deploy-q6gi0v92/kernel/cmdline

 2357 07:04:02.257886  

 2358 07:04:02.271170  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2359 07:04:02.278008  

 2360 07:04:02.281408  Shutting down all USB controllers.

 2361 07:04:02.281495  

 2362 07:04:02.281564  Removing current net device

 2363 07:04:02.281630  

 2364 07:04:02.284500  Finalizing coreboot

 2365 07:04:02.284589  

 2366 07:04:02.291289  Exiting depthcharge with code 4 at timestamp: 66016677

 2367 07:04:02.291378  

 2368 07:04:02.291447  

 2369 07:04:02.291511  Starting kernel ...

 2370 07:04:02.291573  

 2371 07:04:02.291633  

 2372 07:04:02.292044  end: 2.2.4 bootloader-commands (duration 00:00:57) [common]
 2373 07:04:02.292146  start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
 2374 07:04:02.292223  Setting prompt string to ['Linux version [0-9]']
 2375 07:04:02.292293  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2376 07:04:02.292363  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2378 07:07:49.293123  end: 2.2.5 auto-login-action (duration 00:03:47) [common]
 2380 07:07:49.294626  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 227 seconds'
 2382 07:07:49.295869  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2385 07:07:49.297970  end: 2 depthcharge-action (duration 00:05:00) [common]
 2387 07:07:49.299385  Cleaning after the job
 2388 07:07:49.299840  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/ramdisk
 2389 07:07:49.312363  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/kernel
 2390 07:07:49.317452  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726688/tftp-deploy-q6gi0v92/modules
 2391 07:07:49.319243  start: 4.1 power-off (timeout 00:00:30) [common]
 2392 07:07:49.319986  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
 2393 07:07:49.418264  >> Command sent successfully.

 2394 07:07:49.423922  Returned 0 in 0 seconds
 2395 07:07:49.525448  end: 4.1 power-off (duration 00:00:00) [common]
 2397 07:07:49.527026  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2398 07:07:49.528344  Listened to connection for namespace 'common' for up to 1s
 2399 07:07:50.530205  Finalising connection for namespace 'common'
 2400 07:07:50.530390  Disconnecting from shell: Finalise
 2401 07:07:50.530476  

 2402 07:07:50.631187  end: 4.2 read-feedback (duration 00:00:01) [common]
 2403 07:07:50.631353  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726688
 2404 07:07:50.659024  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726688
 2405 07:07:50.659227  JobError: Your job cannot terminate cleanly.