Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 11:54:40.631203 lava-dispatcher, installed at version: 2023.06
2 11:54:40.631421 start: 0 validate
3 11:54:40.631557 Start time: 2023-08-22 11:54:40.631549+00:00 (UTC)
4 11:54:40.631685 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:54:40.631831 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 11:54:40.903104 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:54:40.903921 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.186-cip37-27-gd6d928db0a620%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:54:41.176682 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:54:41.177473 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.186-cip37-27-gd6d928db0a620%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:54:45.385650 validate duration: 4.75
12 11:54:45.385908 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:54:45.386003 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:54:45.386090 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:54:45.386210 Not decompressing ramdisk as can be used compressed.
16 11:54:45.386294 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 11:54:45.386363 saving as /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/ramdisk/rootfs.cpio.gz
18 11:54:45.386426 total size: 8418130 (8 MB)
19 11:54:46.046354 progress 0 % (0 MB)
20 11:54:46.048804 progress 5 % (0 MB)
21 11:54:46.051232 progress 10 % (0 MB)
22 11:54:46.053571 progress 15 % (1 MB)
23 11:54:46.055809 progress 20 % (1 MB)
24 11:54:46.058120 progress 25 % (2 MB)
25 11:54:46.060336 progress 30 % (2 MB)
26 11:54:46.062503 progress 35 % (2 MB)
27 11:54:46.064767 progress 40 % (3 MB)
28 11:54:46.067110 progress 45 % (3 MB)
29 11:54:46.069400 progress 50 % (4 MB)
30 11:54:46.071649 progress 55 % (4 MB)
31 11:54:46.073883 progress 60 % (4 MB)
32 11:54:46.075876 progress 65 % (5 MB)
33 11:54:46.078165 progress 70 % (5 MB)
34 11:54:46.080342 progress 75 % (6 MB)
35 11:54:46.082547 progress 80 % (6 MB)
36 11:54:46.084704 progress 85 % (6 MB)
37 11:54:46.086912 progress 90 % (7 MB)
38 11:54:46.089150 progress 95 % (7 MB)
39 11:54:46.091181 progress 100 % (8 MB)
40 11:54:46.091408 8 MB downloaded in 0.70 s (11.39 MB/s)
41 11:54:46.091554 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:54:46.091793 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:54:46.091878 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:54:46.091961 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:54:46.092103 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.186-cip37-27-gd6d928db0a620/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:54:46.092173 saving as /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/kernel/bzImage
48 11:54:46.092233 total size: 14011616 (13 MB)
49 11:54:46.092292 No compression specified
50 11:54:46.093610 progress 0 % (0 MB)
51 11:54:46.097219 progress 5 % (0 MB)
52 11:54:46.100737 progress 10 % (1 MB)
53 11:54:46.104412 progress 15 % (2 MB)
54 11:54:46.107945 progress 20 % (2 MB)
55 11:54:46.111467 progress 25 % (3 MB)
56 11:54:46.115146 progress 30 % (4 MB)
57 11:54:46.118671 progress 35 % (4 MB)
58 11:54:46.122519 progress 40 % (5 MB)
59 11:54:46.126045 progress 45 % (6 MB)
60 11:54:46.129648 progress 50 % (6 MB)
61 11:54:46.133421 progress 55 % (7 MB)
62 11:54:46.136990 progress 60 % (8 MB)
63 11:54:46.140561 progress 65 % (8 MB)
64 11:54:46.144278 progress 70 % (9 MB)
65 11:54:46.147917 progress 75 % (10 MB)
66 11:54:46.151598 progress 80 % (10 MB)
67 11:54:46.155124 progress 85 % (11 MB)
68 11:54:46.158625 progress 90 % (12 MB)
69 11:54:46.162339 progress 95 % (12 MB)
70 11:54:46.165914 progress 100 % (13 MB)
71 11:54:46.166097 13 MB downloaded in 0.07 s (180.92 MB/s)
72 11:54:46.166243 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:54:46.166470 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:54:46.166555 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:54:46.166643 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:54:46.166779 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.186-cip37-27-gd6d928db0a620/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:54:46.166852 saving as /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/modules/modules.tar
79 11:54:46.166913 total size: 526436 (0 MB)
80 11:54:46.166974 Using unxz to decompress xz
81 11:54:46.171377 progress 6 % (0 MB)
82 11:54:46.171761 progress 12 % (0 MB)
83 11:54:46.171992 progress 18 % (0 MB)
84 11:54:46.173638 progress 24 % (0 MB)
85 11:54:46.175418 progress 31 % (0 MB)
86 11:54:46.177305 progress 37 % (0 MB)
87 11:54:46.179374 progress 43 % (0 MB)
88 11:54:46.181033 progress 49 % (0 MB)
89 11:54:46.183127 progress 56 % (0 MB)
90 11:54:46.185550 progress 62 % (0 MB)
91 11:54:46.187707 progress 68 % (0 MB)
92 11:54:46.189859 progress 74 % (0 MB)
93 11:54:46.191699 progress 80 % (0 MB)
94 11:54:46.193949 progress 87 % (0 MB)
95 11:54:46.195887 progress 93 % (0 MB)
96 11:54:46.197775 progress 99 % (0 MB)
97 11:54:46.204387 0 MB downloaded in 0.04 s (13.40 MB/s)
98 11:54:46.204624 end: 1.3.1 http-download (duration 00:00:00) [common]
100 11:54:46.204880 end: 1.3 download-retry (duration 00:00:00) [common]
101 11:54:46.204973 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 11:54:46.205066 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 11:54:46.205191 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 11:54:46.205277 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 11:54:46.205503 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503
106 11:54:46.205637 makedir: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin
107 11:54:46.205742 makedir: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/tests
108 11:54:46.205840 makedir: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/results
109 11:54:46.205955 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-add-keys
110 11:54:46.206102 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-add-sources
111 11:54:46.206232 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-background-process-start
112 11:54:46.206362 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-background-process-stop
113 11:54:46.206492 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-common-functions
114 11:54:46.206618 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-echo-ipv4
115 11:54:46.206743 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-install-packages
116 11:54:46.206867 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-installed-packages
117 11:54:46.206992 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-os-build
118 11:54:46.207118 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-probe-channel
119 11:54:46.207242 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-probe-ip
120 11:54:46.207367 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-target-ip
121 11:54:46.207491 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-target-mac
122 11:54:46.207617 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-target-storage
123 11:54:46.207747 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-case
124 11:54:46.207872 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-event
125 11:54:46.207994 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-feedback
126 11:54:46.208118 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-raise
127 11:54:46.208249 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-reference
128 11:54:46.208376 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-runner
129 11:54:46.208503 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-set
130 11:54:46.208631 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-test-shell
131 11:54:46.208758 Updating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-install-packages (oe)
132 11:54:46.208912 Updating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/bin/lava-installed-packages (oe)
133 11:54:46.209035 Creating /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/environment
134 11:54:46.209205 LAVA metadata
135 11:54:46.209279 - LAVA_JOB_ID=11330308
136 11:54:46.209344 - LAVA_DISPATCHER_IP=192.168.201.1
137 11:54:46.209446 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 11:54:46.209515 skipped lava-vland-overlay
139 11:54:46.209593 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 11:54:46.209671 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 11:54:46.209733 skipped lava-multinode-overlay
142 11:54:46.209805 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 11:54:46.209884 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 11:54:46.209957 Loading test definitions
145 11:54:46.210046 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 11:54:46.210124 Using /lava-11330308 at stage 0
147 11:54:46.210442 uuid=11330308_1.4.2.3.1 testdef=None
148 11:54:46.210529 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 11:54:46.210615 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 11:54:46.211154 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 11:54:46.211373 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 11:54:46.212011 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 11:54:46.212237 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 11:54:46.212853 runner path: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/0/tests/0_dmesg test_uuid 11330308_1.4.2.3.1
157 11:54:46.213008 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 11:54:46.213273 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 11:54:46.213346 Using /lava-11330308 at stage 1
161 11:54:46.213642 uuid=11330308_1.4.2.3.5 testdef=None
162 11:54:46.213729 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 11:54:46.213811 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 11:54:46.214288 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 11:54:46.214505 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 11:54:46.215144 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 11:54:46.215367 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 11:54:46.215996 runner path: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/1/tests/1_bootrr test_uuid 11330308_1.4.2.3.5
171 11:54:46.216146 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 11:54:46.216350 Creating lava-test-runner.conf files
174 11:54:46.216412 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/0 for stage 0
175 11:54:46.216500 - 0_dmesg
176 11:54:46.216582 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11330308/lava-overlay-8kod9503/lava-11330308/1 for stage 1
177 11:54:46.216673 - 1_bootrr
178 11:54:46.216766 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 11:54:46.216851 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 11:54:46.225465 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 11:54:46.225570 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 11:54:46.225656 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 11:54:46.225741 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 11:54:46.225826 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 11:54:46.471674 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 11:54:46.472057 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 11:54:46.472178 extracting modules file /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11330308/extract-overlay-ramdisk-befpu0qg/ramdisk
188 11:54:46.496939 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 11:54:46.497080 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 11:54:46.497210 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11330308/compress-overlay-o__zrcpc/overlay-1.4.2.4.tar.gz to ramdisk
191 11:54:46.497283 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11330308/compress-overlay-o__zrcpc/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11330308/extract-overlay-ramdisk-befpu0qg/ramdisk
192 11:54:46.505387 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 11:54:46.505496 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 11:54:46.505587 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 11:54:46.505672 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 11:54:46.505745 Building ramdisk /var/lib/lava/dispatcher/tmp/11330308/extract-overlay-ramdisk-befpu0qg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11330308/extract-overlay-ramdisk-befpu0qg/ramdisk
197 11:54:46.654539 >> 54147 blocks
198 11:54:47.554035 rename /var/lib/lava/dispatcher/tmp/11330308/extract-overlay-ramdisk-befpu0qg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/ramdisk/ramdisk.cpio.gz
199 11:54:47.554479 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 11:54:47.554611 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 11:54:47.554712 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 11:54:47.554818 No mkimage arch provided, not using FIT.
203 11:54:47.554910 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 11:54:47.555025 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 11:54:47.555147 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 11:54:47.555256 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 11:54:47.555338 No LXC device requested
208 11:54:47.555413 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 11:54:47.555496 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 11:54:47.555571 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 11:54:47.555640 Checking files for TFTP limit of 4294967296 bytes.
212 11:54:47.556039 end: 1 tftp-deploy (duration 00:00:02) [common]
213 11:54:47.556141 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 11:54:47.556234 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 11:54:47.556352 substitutions:
216 11:54:47.556417 - {DTB}: None
217 11:54:47.556481 - {INITRD}: 11330308/tftp-deploy-v4jyc1a9/ramdisk/ramdisk.cpio.gz
218 11:54:47.556539 - {KERNEL}: 11330308/tftp-deploy-v4jyc1a9/kernel/bzImage
219 11:54:47.556595 - {LAVA_MAC}: None
220 11:54:47.556650 - {PRESEED_CONFIG}: None
221 11:54:47.556705 - {PRESEED_LOCAL}: None
222 11:54:47.556759 - {RAMDISK}: 11330308/tftp-deploy-v4jyc1a9/ramdisk/ramdisk.cpio.gz
223 11:54:47.556813 - {ROOT_PART}: None
224 11:54:47.556866 - {ROOT}: None
225 11:54:47.556919 - {SERVER_IP}: 192.168.201.1
226 11:54:47.556972 - {TEE}: None
227 11:54:47.557025 Parsed boot commands:
228 11:54:47.557077 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 11:54:47.557308 Parsed boot commands: tftpboot 192.168.201.1 11330308/tftp-deploy-v4jyc1a9/kernel/bzImage 11330308/tftp-deploy-v4jyc1a9/kernel/cmdline 11330308/tftp-deploy-v4jyc1a9/ramdisk/ramdisk.cpio.gz
230 11:54:47.557395 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 11:54:47.557482 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 11:54:47.557575 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 11:54:47.557661 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 11:54:47.557728 Not connected, no need to disconnect.
235 11:54:47.557801 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 11:54:47.557881 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 11:54:47.557948 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-6'
238 11:54:47.561976 Setting prompt string to ['lava-test: # ']
239 11:54:47.562313 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 11:54:47.562417 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 11:54:47.562519 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 11:54:47.562624 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 11:54:47.562857 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=reboot'
244 11:54:52.718093 >> Command sent successfully.
245 11:54:52.729678 Returned 0 in 5 seconds
246 11:54:52.830873 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 11:54:52.832298 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 11:54:52.832795 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 11:54:52.833248 Setting prompt string to 'Starting depthcharge on Volmar...'
251 11:54:52.833608 Changing prompt to 'Starting depthcharge on Volmar...'
252 11:54:52.833970 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 11:54:52.835174 [Enter `^Ec?' for help]
254 11:54:54.197303
255 11:54:54.197820
256 11:54:54.205764 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 11:54:54.209524 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 11:54:54.213374 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 11:54:54.220751 CPU: AES supported, TXT NOT supported, VT supported
260 11:54:54.228380 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 11:54:54.228916 Cache size = 10 MiB
262 11:54:54.231842 MCH: device id 4609 (rev 04) is Alderlake-P
263 11:54:54.239296 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 11:54:54.242171 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 11:54:54.245721 VBOOT: Loading verstage.
266 11:54:54.250019 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 11:54:54.254172 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 11:54:54.260764 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 11:54:54.267475 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 11:54:54.274049 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 11:54:54.278577
272 11:54:54.279091
273 11:54:54.285684 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 11:54:54.292659 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 11:54:54.295836 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 11:54:54.299350 done! DID_VID 0x00281ae0
277 11:54:54.299768 TPM ready after 0 ms
278 11:54:54.303538 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
279 11:54:54.317437 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
280 11:54:54.324525 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
281 11:54:54.405456 tlcl_send_startup: Startup return code is 0
282 11:54:54.405979 TPM: setup succeeded
283 11:54:54.426951 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
284 11:54:54.448692 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
285 11:54:54.452314 Chrome EC: UHEPI supported
286 11:54:54.456084 Reading cr50 boot mode
287 11:54:54.472557 Cr50 says boot_mode is VERIFIED_RW(0x00).
288 11:54:54.473144 Phase 1
289 11:54:54.476357 FMAP: area GBB found @ 1805000 (458752 bytes)
290 11:54:54.486059 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
291 11:54:54.492803 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
292 11:54:54.499657 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
293 11:54:54.500182 Phase 2
294 11:54:54.502600 Phase 3
295 11:54:54.505838 FMAP: area GBB found @ 1805000 (458752 bytes)
296 11:54:54.512671 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 11:54:54.516336 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 11:54:54.523322 VB2:vb2_verify_keyblock() Checking keyblock signature...
299 11:54:54.527766 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
300 11:54:54.534550 VB2:vb2_verify_digest() HW RSA forbidden, using SW
301 11:54:54.538701 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
302 11:54:54.553278 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 11:54:54.556672 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 11:54:54.563059 VB2:vb2_verify_fw_preamble() Verifying preamble.
305 11:54:54.570018 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
306 11:54:54.573331 VB2:vb2_verify_digest() HW RSA forbidden, using SW
307 11:54:54.579808 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
308 11:54:54.584038 Phase 4
309 11:54:54.587575 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
310 11:54:54.593829 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
311 11:54:54.819441 VB2:vb2_verify_digest() HW RSA forbidden, using SW
312 11:54:54.825915 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
313 11:54:54.829142 Saving vboot hash.
314 11:54:54.835919 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
315 11:54:54.852353 tlcl_extend: response is 0
316 11:54:54.858786 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
317 11:54:54.865203 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
318 11:54:54.881510 tlcl_extend: response is 0
319 11:54:54.888493 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
320 11:54:54.908184 tlcl_lock_nv_write: response is 0
321 11:54:54.926672 tlcl_lock_nv_write: response is 0
322 11:54:54.927194 Slot A is selected
323 11:54:54.933778 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 11:54:54.940512 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
325 11:54:54.946969 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
326 11:54:54.953492 BS: verstage times (exec / console): total (unknown) / 246 ms
327 11:54:54.954034
328 11:54:54.954375
329 11:54:54.960434 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
330 11:54:54.964360 Google Chrome EC: version:
331 11:54:54.967621 ro: volmar_v2.0.14126-e605144e9c
332 11:54:54.970691 rw: volmar_v0.0.55-22d1557
333 11:54:54.974026 running image: 2
334 11:54:54.977290 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 11:54:54.987407 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
336 11:54:54.994063 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
337 11:54:55.000620 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
338 11:54:55.011124 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 11:54:55.020924 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 11:54:55.024313 EC took 941us to calculate image hash
341 11:54:55.033818 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 11:54:55.037387 VB2:sync_ec() select_rw=RW(active)
343 11:54:55.049816 Waited 270us to clear limit power flag.
344 11:54:55.053081 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 11:54:55.056664 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 11:54:55.060627 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 11:54:55.066756 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
348 11:54:55.069995 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
349 11:54:55.073474 TCO_STS: 0000 0000
350 11:54:55.076639 GEN_PMCON: d0015038 00002200
351 11:54:55.080104 GBLRST_CAUSE: 00000000 00000000
352 11:54:55.080627 HPR_CAUSE0: 00000000
353 11:54:55.083537 prev_sleep_state 5
354 11:54:55.086730 Abort disabling TXT, as CPU is not TXT capable.
355 11:54:55.094982 cse_lite: Number of partitions = 3
356 11:54:55.097795 cse_lite: Current partition = RO
357 11:54:55.098222 cse_lite: Next partition = RO
358 11:54:55.101324 cse_lite: Flags = 0x7
359 11:54:55.108439 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
360 11:54:55.118059 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
361 11:54:55.121541 FMAP: area SI_ME found @ 1000 (5238784 bytes)
362 11:54:55.128490 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 11:54:55.134867 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
364 11:54:55.141818 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
365 11:54:55.144553 cse_lite: CSE CBFS RW version : 16.1.25.2049
366 11:54:55.151427 cse_lite: Set Boot Partition Info Command (RW)
367 11:54:55.154634 HECI: Global Reset(Type:1) Command
368 11:54:56.592983 �3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
369 11:54:56.596323 Cache size = 10 MiB
370 11:54:56.599930 MCH: device id 4609 (rev 04) is Alderlake-P
371 11:54:56.606331 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
372 11:54:56.609616 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
373 11:54:56.613341 VBOOT: Loading verstage.
374 11:54:56.616734 FMAP: Found "FLASH" version 1.1 at 0x1804000.
375 11:54:56.623414 FMAP: base = 0x0 size = 0x2000000 #areas = 37
376 11:54:56.627164 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 11:54:56.633910 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
378 11:54:56.644020 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
379 11:54:56.644449
380 11:54:56.644787
381 11:54:56.654063 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
382 11:54:56.660852 Probing TPM I2C: I2C bus 1 version 0x3230302a
383 11:54:56.664393 DW I2C bus 1 at 0xfe022000 (400 KHz)
384 11:54:56.664920 done! DID_VID 0x00281ae0
385 11:54:56.667757 TPM ready after 0 ms
386 11:54:56.672373 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
387 11:54:56.685978 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
388 11:54:56.688684 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
389 11:54:56.774669 tlcl_send_startup: Startup return code is 0
390 11:54:56.775197 TPM: setup succeeded
391 11:54:56.795840 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
392 11:54:56.817623 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
393 11:54:56.821441 Chrome EC: UHEPI supported
394 11:54:56.824837 Reading cr50 boot mode
395 11:54:56.839586 Cr50 says boot_mode is VERIFIED_RW(0x00).
396 11:54:56.840111 Phase 1
397 11:54:56.846020 FMAP: area GBB found @ 1805000 (458752 bytes)
398 11:54:56.853063 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
399 11:54:56.859540 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
400 11:54:56.866031 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
401 11:54:56.869668 Phase 2
402 11:54:56.870195 Phase 3
403 11:54:56.872998 FMAP: area GBB found @ 1805000 (458752 bytes)
404 11:54:56.879691 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
405 11:54:56.883217 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
406 11:54:56.889597 VB2:vb2_verify_keyblock() Checking keyblock signature...
407 11:54:56.896305 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
408 11:54:56.902855 VB2:vb2_verify_digest() HW RSA forbidden, using SW
409 11:54:56.905904 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
410 11:54:56.920572 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 11:54:56.923834 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
412 11:54:56.930637 VB2:vb2_verify_fw_preamble() Verifying preamble.
413 11:54:56.937346 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
414 11:54:56.940575 VB2:vb2_verify_digest() HW RSA forbidden, using SW
415 11:54:56.946887 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
416 11:54:56.951330 Phase 4
417 11:54:56.954624 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
418 11:54:56.961316 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
419 11:54:57.186942 VB2:vb2_verify_digest() HW RSA forbidden, using SW
420 11:54:57.193938 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
421 11:54:57.197190 Saving vboot hash.
422 11:54:57.203779 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
423 11:54:57.219255 tlcl_extend: response is 0
424 11:54:57.225798 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
425 11:54:57.232693 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
426 11:54:57.247026 tlcl_extend: response is 0
427 11:54:57.253737 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
428 11:54:57.273888 tlcl_lock_nv_write: response is 0
429 11:54:57.292780 tlcl_lock_nv_write: response is 0
430 11:54:57.293349 Slot A is selected
431 11:54:57.299570 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
432 11:54:57.306016 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
433 11:54:57.312923 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
434 11:54:57.319338 BS: verstage times (exec / console): total (unknown) / 246 ms
435 11:54:57.319904
436 11:54:57.320277
437 11:54:57.326047 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
438 11:54:57.330077 Google Chrome EC: version:
439 11:54:57.333136 ro: volmar_v2.0.14126-e605144e9c
440 11:54:57.336786 rw: volmar_v0.0.55-22d1557
441 11:54:57.340112 running image: 2
442 11:54:57.343235 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
443 11:54:57.353256 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
444 11:54:57.359808 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
445 11:54:57.367312 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
446 11:54:57.374191 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
447 11:54:57.387642 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
448 11:54:57.391303 EC took 2192us to calculate image hash
449 11:54:57.401761 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 11:54:57.405005 VB2:sync_ec() select_rw=RW(active)
451 11:54:57.417473 Waited 270us to clear limit power flag.
452 11:54:57.420135 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
453 11:54:57.424004 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
454 11:54:57.427211 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
455 11:54:57.433891 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
456 11:54:57.437321 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
457 11:54:57.440607 TCO_STS: 0000 0000
458 11:54:57.443854 GEN_PMCON: d1001038 00002200
459 11:54:57.447551 GBLRST_CAUSE: 00000040 00000000
460 11:54:57.448128 HPR_CAUSE0: 00000000
461 11:54:57.450180 prev_sleep_state 5
462 11:54:57.454038 Abort disabling TXT, as CPU is not TXT capable.
463 11:54:57.461813 cse_lite: Number of partitions = 3
464 11:54:57.464950 cse_lite: Current partition = RW
465 11:54:57.465567 cse_lite: Next partition = RW
466 11:54:57.468254 cse_lite: Flags = 0x7
467 11:54:57.474754 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
468 11:54:57.484890 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
469 11:54:57.488536 FMAP: area SI_ME found @ 1000 (5238784 bytes)
470 11:54:57.495216 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
471 11:54:57.501772 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
472 11:54:57.508526 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
473 11:54:57.511464 cse_lite: CSE CBFS RW version : 16.1.25.2049
474 11:54:57.515234 Boot Count incremented to 3100
475 11:54:57.521794 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
476 11:54:57.528842 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
477 11:54:57.540819 Probing TPM I2C: done! DID_VID 0x00281ae0
478 11:54:57.544260 Locality already claimed
479 11:54:57.547242 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
480 11:54:57.567129 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
481 11:54:57.573766 MRC: Hash idx 0x100d comparison successful.
482 11:54:57.576979 MRC cache found, size f6c8
483 11:54:57.577448 bootmode is set to: 2
484 11:54:57.580308 EC returned error result code 3
485 11:54:57.583731 FW_CONFIG value from CBI is 0x131
486 11:54:57.590797 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
487 11:54:57.593927 SPD index = 0
488 11:54:57.600821 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
489 11:54:57.601388 SPD: module type is LPDDR4X
490 11:54:57.607373 SPD: module part number is K4U6E3S4AB-MGCL
491 11:54:57.614103 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
492 11:54:57.617688 SPD: device width 16 bits, bus width 16 bits
493 11:54:57.620947 SPD: module size is 1024 MB (per channel)
494 11:54:57.690125 CBMEM:
495 11:54:57.693433 IMD: root @ 0x76fff000 254 entries.
496 11:54:57.697049 IMD: root @ 0x76ffec00 62 entries.
497 11:54:57.704310 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
498 11:54:57.708126 RO_VPD is uninitialized or empty.
499 11:54:57.711199 FMAP: area RW_VPD found @ f29000 (8192 bytes)
500 11:54:57.714223 RW_VPD is uninitialized or empty.
501 11:54:57.721380 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
502 11:54:57.724678 External stage cache:
503 11:54:57.727608 IMD: root @ 0x7bbff000 254 entries.
504 11:54:57.730940 IMD: root @ 0x7bbfec00 62 entries.
505 11:54:57.737930 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
506 11:54:57.744695 MRC: Checking cached data update for 'RW_MRC_CACHE'.
507 11:54:57.747586 MRC: 'RW_MRC_CACHE' does not need update.
508 11:54:57.748008 8 DIMMs found
509 11:54:57.750975 SMM Memory Map
510 11:54:57.754689 SMRAM : 0x7b800000 0x800000
511 11:54:57.758073 Subregion 0: 0x7b800000 0x200000
512 11:54:57.760988 Subregion 1: 0x7ba00000 0x200000
513 11:54:57.764080 Subregion 2: 0x7bc00000 0x400000
514 11:54:57.768462 top_of_ram = 0x77000000
515 11:54:57.770910 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
516 11:54:57.777628 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
517 11:54:57.784294 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
518 11:54:57.787421 MTRR Range: Start=ff000000 End=0 (Size 1000000)
519 11:54:57.790679 Normal boot
520 11:54:57.797961 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
521 11:54:57.804239 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
522 11:54:57.810711 Processing 237 relocs. Offset value of 0x74ab9000
523 11:54:57.819342 BS: romstage times (exec / console): total (unknown) / 381 ms
524 11:54:57.826318
525 11:54:57.826853
526 11:54:57.833503 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
527 11:54:57.834041 Normal boot
528 11:54:57.840035 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
529 11:54:57.846854 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
530 11:54:57.852995 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
531 11:54:57.863227 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
532 11:54:57.911104 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
533 11:54:57.917922 Processing 5931 relocs. Offset value of 0x72a2f000
534 11:54:57.921171 BS: postcar times (exec / console): total (unknown) / 51 ms
535 11:54:57.924464
536 11:54:57.925029
537 11:54:57.931447 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
538 11:54:57.934514 Reserving BERT start 76a1e000, size 10000
539 11:54:57.937648 Normal boot
540 11:54:57.941408 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
541 11:54:57.948781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
542 11:54:57.955815 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
543 11:54:57.962198 FMAP: area RW_VPD found @ f29000 (8192 bytes)
544 11:54:57.965866 Google Chrome EC: version:
545 11:54:57.969838 ro: volmar_v2.0.14126-e605144e9c
546 11:54:57.971997 rw: volmar_v0.0.55-22d1557
547 11:54:57.972485 running image: 2
548 11:54:57.975882 ACPI _SWS is PM1 Index 8 GPE Index -1
549 11:54:57.982882 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
550 11:54:57.986052 EC returned error result code 3
551 11:54:57.989711 FW_CONFIG value from CBI is 0x131
552 11:54:57.996161 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
553 11:54:57.999816 PCI: 00:1c.2 disabled by fw_config
554 11:54:58.003201 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
555 11:54:58.009555 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
556 11:54:58.012396 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 11:54:58.020071 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
558 11:54:58.022846 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
559 11:54:58.032577 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
560 11:54:58.035992 microcode: sig=0x906a4 pf=0x80 revision=0x423
561 11:54:58.042515 microcode: Update skipped, already up-to-date
562 11:54:58.049490 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
563 11:54:58.080928 Detected 6 core, 8 thread CPU.
564 11:54:58.084409 Setting up SMI for CPU
565 11:54:58.087453 IED base = 0x7bc00000
566 11:54:58.087973 IED size = 0x00400000
567 11:54:58.090725 Will perform SMM setup.
568 11:54:58.094107 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
569 11:54:58.097332 LAPIC 0x0 in XAPIC mode.
570 11:54:58.107250 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
571 11:54:58.110494 Processing 18 relocs. Offset value of 0x00030000
572 11:54:58.115473 Attempting to start 7 APs
573 11:54:58.118823 Waiting for 10ms after sending INIT.
574 11:54:58.131723 Waiting for SIPI to complete...
575 11:54:58.135109 done.
576 11:54:58.135632 LAPIC 0x14 in XAPIC mode.
577 11:54:58.138099 LAPIC 0x10 in XAPIC mode.
578 11:54:58.141524 LAPIC 0x16 in XAPIC mode.
579 11:54:58.145002 AP: slot 1 apic_id 14, MCU rev: 0x00000423
580 11:54:58.148715 LAPIC 0x12 in XAPIC mode.
581 11:54:58.151236 LAPIC 0x8 in XAPIC mode.
582 11:54:58.154938 AP: slot 2 apic_id 16, MCU rev: 0x00000423
583 11:54:58.158179 AP: slot 4 apic_id 12, MCU rev: 0x00000423
584 11:54:58.165043 AP: slot 3 apic_id 10, MCU rev: 0x00000423
585 11:54:58.168162 AP: slot 6 apic_id 8, MCU rev: 0x00000423
586 11:54:58.171671 LAPIC 0x9 in XAPIC mode.
587 11:54:58.175072 Waiting for SIPI to complete...
588 11:54:58.175597 done.
589 11:54:58.178340 LAPIC 0x1 in XAPIC mode.
590 11:54:58.181560 AP: slot 7 apic_id 9, MCU rev: 0x00000423
591 11:54:58.184979 AP: slot 5 apic_id 1, MCU rev: 0x00000423
592 11:54:58.187970 smm_setup_relocation_handler: enter
593 11:54:58.191693 smm_setup_relocation_handler: exit
594 11:54:58.201672 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
595 11:54:58.204743 Processing 11 relocs. Offset value of 0x00038000
596 11:54:58.211901 smm_module_setup_stub: stack_top = 0x7b804000
597 11:54:58.214845 smm_module_setup_stub: per cpu stack_size = 0x800
598 11:54:58.221491 smm_module_setup_stub: runtime.start32_offset = 0x4c
599 11:54:58.224521 smm_module_setup_stub: runtime.smm_size = 0x10000
600 11:54:58.231482 SMM Module: stub loaded at 38000. Will call 0x76a52094
601 11:54:58.234493 Installing permanent SMM handler to 0x7b800000
602 11:54:58.241196 smm_load_module: total_smm_space_needed e468, available -> 200000
603 11:54:58.251011 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
604 11:54:58.254556 Processing 255 relocs. Offset value of 0x7b9f6000
605 11:54:58.261297 smm_load_module: smram_start: 0x7b800000
606 11:54:58.264474 smm_load_module: smram_end: 7ba00000
607 11:54:58.267656 smm_load_module: handler start 0x7b9f6d5f
608 11:54:58.271048 smm_load_module: handler_size 98d0
609 11:54:58.274559 smm_load_module: fxsave_area 0x7b9ff000
610 11:54:58.277523 smm_load_module: fxsave_size 1000
611 11:54:58.280917 smm_load_module: CONFIG_MSEG_SIZE 0x0
612 11:54:58.287621 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
613 11:54:58.294111 smm_load_module: handler_mod_params.smbase = 0x7b800000
614 11:54:58.297495 smm_load_module: per_cpu_save_state_size = 0x400
615 11:54:58.301066 smm_load_module: num_cpus = 0x8
616 11:54:58.307605 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
617 11:54:58.311012 smm_load_module: total_save_state_size = 0x2000
618 11:54:58.317387 smm_load_module: cpu0 entry: 7b9e6000
619 11:54:58.320861 smm_create_map: cpus allowed in one segment 30
620 11:54:58.324269 smm_create_map: min # of segments needed 1
621 11:54:58.324796 CPU 0x0
622 11:54:58.330970 smbase 7b9e6000 entry 7b9ee000
623 11:54:58.334510 ss_start 7b9f5c00 code_end 7b9ee208
624 11:54:58.335032 CPU 0x1
625 11:54:58.337795 smbase 7b9e5c00 entry 7b9edc00
626 11:54:58.344555 ss_start 7b9f5800 code_end 7b9ede08
627 11:54:58.345082 CPU 0x2
628 11:54:58.347511 smbase 7b9e5800 entry 7b9ed800
629 11:54:58.354038 ss_start 7b9f5400 code_end 7b9eda08
630 11:54:58.354497 CPU 0x3
631 11:54:58.357418 smbase 7b9e5400 entry 7b9ed400
632 11:54:58.361129 ss_start 7b9f5000 code_end 7b9ed608
633 11:54:58.364108 CPU 0x4
634 11:54:58.367569 smbase 7b9e5000 entry 7b9ed000
635 11:54:58.370589 ss_start 7b9f4c00 code_end 7b9ed208
636 11:54:58.371115 CPU 0x5
637 11:54:58.374041 smbase 7b9e4c00 entry 7b9ecc00
638 11:54:58.380827 ss_start 7b9f4800 code_end 7b9ece08
639 11:54:58.381444 CPU 0x6
640 11:54:58.384316 smbase 7b9e4800 entry 7b9ec800
641 11:54:58.391074 ss_start 7b9f4400 code_end 7b9eca08
642 11:54:58.391598 CPU 0x7
643 11:54:58.394022 smbase 7b9e4400 entry 7b9ec400
644 11:54:58.397632 ss_start 7b9f4000 code_end 7b9ec608
645 11:54:58.407572 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
646 11:54:58.410777 Processing 11 relocs. Offset value of 0x7b9ee000
647 11:54:58.417268 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
648 11:54:58.424294 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
649 11:54:58.430993 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
650 11:54:58.437480 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
651 11:54:58.444403 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
652 11:54:58.447607 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
653 11:54:58.454082 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
654 11:54:58.460672 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
655 11:54:58.467485 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
656 11:54:58.473940 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
657 11:54:58.480910 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
658 11:54:58.487136 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
659 11:54:58.493868 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
660 11:54:58.500593 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
661 11:54:58.507583 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
662 11:54:58.510799 smm_module_setup_stub: stack_top = 0x7b804000
663 11:54:58.514055 smm_module_setup_stub: per cpu stack_size = 0x800
664 11:54:58.520761 smm_module_setup_stub: runtime.start32_offset = 0x4c
665 11:54:58.527327 smm_module_setup_stub: runtime.smm_size = 0x200000
666 11:54:58.530689 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
667 11:54:58.535551 Clearing SMI status registers
668 11:54:58.538992 SMI_STS: PM1
669 11:54:58.539516 PM1_STS: WAK PWRBTN
670 11:54:58.548902 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
671 11:54:58.552270 In relocation handler: CPU 0
672 11:54:58.555829 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
673 11:54:58.558789 Writing SMRR. base = 0x7b800006, mask=0xff800c00
674 11:54:58.561965 Relocation complete.
675 11:54:58.569162 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
676 11:54:58.572252 In relocation handler: CPU 5
677 11:54:58.575471 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
678 11:54:58.578860 Relocation complete.
679 11:54:58.585538 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
680 11:54:58.588748 In relocation handler: CPU 3
681 11:54:58.592094 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
682 11:54:58.598666 Writing SMRR. base = 0x7b800006, mask=0xff800c00
683 11:54:58.599231 Relocation complete.
684 11:54:58.605241 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
685 11:54:58.608838 In relocation handler: CPU 2
686 11:54:58.612067 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
687 11:54:58.618975 Writing SMRR. base = 0x7b800006, mask=0xff800c00
688 11:54:58.622597 Relocation complete.
689 11:54:58.629094 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
690 11:54:58.632087 In relocation handler: CPU 4
691 11:54:58.635466 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
692 11:54:58.638751 Writing SMRR. base = 0x7b800006, mask=0xff800c00
693 11:54:58.642194 Relocation complete.
694 11:54:58.648782 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
695 11:54:58.652242 In relocation handler: CPU 1
696 11:54:58.655524 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
697 11:54:58.662103 Writing SMRR. base = 0x7b800006, mask=0xff800c00
698 11:54:58.662625 Relocation complete.
699 11:54:58.668818 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
700 11:54:58.672404 In relocation handler: CPU 6
701 11:54:58.678438 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
702 11:54:58.682204 Writing SMRR. base = 0x7b800006, mask=0xff800c00
703 11:54:58.685833 Relocation complete.
704 11:54:58.692172 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
705 11:54:58.695473 In relocation handler: CPU 7
706 11:54:58.698693 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
707 11:54:58.701960 Relocation complete.
708 11:54:58.702484 Initializing CPU #0
709 11:54:58.705365 CPU: vendor Intel device 906a4
710 11:54:58.708561 CPU: family 06, model 9a, stepping 04
711 11:54:58.711606 Clearing out pending MCEs
712 11:54:58.714978 cpu: energy policy set to 7
713 11:54:58.718499 Turbo is available but hidden
714 11:54:58.721753 Turbo is available and visible
715 11:54:58.725322 microcode: Update skipped, already up-to-date
716 11:54:58.728702 CPU #0 initialized
717 11:54:58.729281 Initializing CPU #5
718 11:54:58.732218 Initializing CPU #1
719 11:54:58.734886 Initializing CPU #3
720 11:54:58.738577 CPU: vendor Intel device 906a4
721 11:54:58.742029 CPU: family 06, model 9a, stepping 04
722 11:54:58.742559 Initializing CPU #6
723 11:54:58.745533 Clearing out pending MCEs
724 11:54:58.748654 CPU: vendor Intel device 906a4
725 11:54:58.751816 CPU: family 06, model 9a, stepping 04
726 11:54:58.755112 CPU: vendor Intel device 906a4
727 11:54:58.758279 CPU: family 06, model 9a, stepping 04
728 11:54:58.762015 Clearing out pending MCEs
729 11:54:58.765036 cpu: energy policy set to 7
730 11:54:58.768794 Initializing CPU #7
731 11:54:58.771756 microcode: Update skipped, already up-to-date
732 11:54:58.775066 CPU #1 initialized
733 11:54:58.775593 cpu: energy policy set to 7
734 11:54:58.778299 Initializing CPU #2
735 11:54:58.781823 Initializing CPU #4
736 11:54:58.784974 microcode: Update skipped, already up-to-date
737 11:54:58.788662 CPU #3 initialized
738 11:54:58.791710 CPU: vendor Intel device 906a4
739 11:54:58.795018 CPU: family 06, model 9a, stepping 04
740 11:54:58.795587 Clearing out pending MCEs
741 11:54:58.798208 Clearing out pending MCEs
742 11:54:58.801800 CPU: vendor Intel device 906a4
743 11:54:58.805286 CPU: family 06, model 9a, stepping 04
744 11:54:58.808217 cpu: energy policy set to 7
745 11:54:58.811707 Clearing out pending MCEs
746 11:54:58.815517 microcode: Update skipped, already up-to-date
747 11:54:58.818132 CPU #2 initialized
748 11:54:58.821215 cpu: energy policy set to 7
749 11:54:58.824967 cpu: energy policy set to 7
750 11:54:58.828430 microcode: Update skipped, already up-to-date
751 11:54:58.831680 CPU #4 initialized
752 11:54:58.834938 microcode: Update skipped, already up-to-date
753 11:54:58.838328 CPU #5 initialized
754 11:54:58.841679 CPU: vendor Intel device 906a4
755 11:54:58.845488 CPU: family 06, model 9a, stepping 04
756 11:54:58.848636 CPU: vendor Intel device 906a4
757 11:54:58.851981 CPU: family 06, model 9a, stepping 04
758 11:54:58.854999 Clearing out pending MCEs
759 11:54:58.855526 Clearing out pending MCEs
760 11:54:58.858698 cpu: energy policy set to 7
761 11:54:58.861675 cpu: energy policy set to 7
762 11:54:58.864883 microcode: Update skipped, already up-to-date
763 11:54:58.868303 CPU #6 initialized
764 11:54:58.871861 microcode: Update skipped, already up-to-date
765 11:54:58.875210 CPU #7 initialized
766 11:54:58.878311 bsp_do_flight_plan done after 700 msecs.
767 11:54:58.881705 CPU: frequency set to 4400 MHz
768 11:54:58.885186 Enabling SMIs.
769 11:54:58.891610 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
770 11:54:58.905904 Probing TPM I2C: done! DID_VID 0x00281ae0
771 11:54:58.909803 Locality already claimed
772 11:54:58.912685 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
773 11:54:58.923980 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
774 11:54:58.927592 Enabling GPIO PM b/c CR50 has long IRQ pulse support
775 11:54:58.934366 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
776 11:54:58.940846 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
777 11:54:58.944603 Found a VBT of 9216 bytes after decompression
778 11:54:58.947753 PCI 1.0, PIN A, using IRQ #16
779 11:54:58.950777 PCI 2.0, PIN A, using IRQ #17
780 11:54:58.953896 PCI 4.0, PIN A, using IRQ #18
781 11:54:58.957768 PCI 5.0, PIN A, using IRQ #16
782 11:54:58.960864 PCI 6.0, PIN A, using IRQ #16
783 11:54:58.964384 PCI 6.2, PIN C, using IRQ #18
784 11:54:58.967557 PCI 7.0, PIN A, using IRQ #19
785 11:54:58.971098 PCI 7.1, PIN B, using IRQ #20
786 11:54:58.974444 PCI 7.2, PIN C, using IRQ #21
787 11:54:58.977715 PCI 7.3, PIN D, using IRQ #22
788 11:54:58.981146 PCI 8.0, PIN A, using IRQ #23
789 11:54:58.984563 PCI D.0, PIN A, using IRQ #17
790 11:54:58.985090 PCI D.1, PIN B, using IRQ #19
791 11:54:58.987698 PCI 10.0, PIN A, using IRQ #24
792 11:54:58.990927 PCI 10.1, PIN B, using IRQ #25
793 11:54:58.993994 PCI 10.6, PIN C, using IRQ #20
794 11:54:58.997653 PCI 10.7, PIN D, using IRQ #21
795 11:54:59.000803 PCI 11.0, PIN A, using IRQ #26
796 11:54:59.003960 PCI 11.1, PIN B, using IRQ #27
797 11:54:59.007453 PCI 11.2, PIN C, using IRQ #28
798 11:54:59.010632 PCI 11.3, PIN D, using IRQ #29
799 11:54:59.014077 PCI 12.0, PIN A, using IRQ #30
800 11:54:59.017277 PCI 12.6, PIN B, using IRQ #31
801 11:54:59.020835 PCI 12.7, PIN C, using IRQ #22
802 11:54:59.024363 PCI 13.0, PIN A, using IRQ #32
803 11:54:59.027631 PCI 13.1, PIN B, using IRQ #33
804 11:54:59.030973 PCI 13.2, PIN C, using IRQ #34
805 11:54:59.031400 PCI 13.3, PIN D, using IRQ #35
806 11:54:59.034742 PCI 14.0, PIN B, using IRQ #23
807 11:54:59.037278 PCI 14.1, PIN A, using IRQ #36
808 11:54:59.040993 PCI 14.3, PIN C, using IRQ #17
809 11:54:59.044267 PCI 15.0, PIN A, using IRQ #37
810 11:54:59.047465 PCI 15.1, PIN B, using IRQ #38
811 11:54:59.050809 PCI 15.2, PIN C, using IRQ #39
812 11:54:59.053906 PCI 15.3, PIN D, using IRQ #40
813 11:54:59.057263 PCI 16.0, PIN A, using IRQ #18
814 11:54:59.060695 PCI 16.1, PIN B, using IRQ #19
815 11:54:59.063925 PCI 16.2, PIN C, using IRQ #20
816 11:54:59.067676 PCI 16.3, PIN D, using IRQ #21
817 11:54:59.070826 PCI 16.4, PIN A, using IRQ #18
818 11:54:59.074387 PCI 16.5, PIN B, using IRQ #19
819 11:54:59.077981 PCI 17.0, PIN A, using IRQ #22
820 11:54:59.080896 PCI 19.0, PIN A, using IRQ #41
821 11:54:59.084309 PCI 19.1, PIN B, using IRQ #42
822 11:54:59.084830 PCI 19.2, PIN C, using IRQ #43
823 11:54:59.087508 PCI 1C.0, PIN A, using IRQ #16
824 11:54:59.090887 PCI 1C.1, PIN B, using IRQ #17
825 11:54:59.093983 PCI 1C.2, PIN C, using IRQ #18
826 11:54:59.097513 PCI 1C.3, PIN D, using IRQ #19
827 11:54:59.100866 PCI 1C.4, PIN A, using IRQ #16
828 11:54:59.104159 PCI 1C.5, PIN B, using IRQ #17
829 11:54:59.107700 PCI 1C.6, PIN C, using IRQ #18
830 11:54:59.110840 PCI 1C.7, PIN D, using IRQ #19
831 11:54:59.113754 PCI 1D.0, PIN A, using IRQ #16
832 11:54:59.117418 PCI 1D.1, PIN B, using IRQ #17
833 11:54:59.120517 PCI 1D.2, PIN C, using IRQ #18
834 11:54:59.124132 PCI 1D.3, PIN D, using IRQ #19
835 11:54:59.127590 PCI 1E.0, PIN A, using IRQ #23
836 11:54:59.130697 PCI 1E.1, PIN B, using IRQ #20
837 11:54:59.134191 PCI 1E.2, PIN C, using IRQ #44
838 11:54:59.134638 PCI 1E.3, PIN D, using IRQ #45
839 11:54:59.137257 PCI 1F.3, PIN B, using IRQ #22
840 11:54:59.141056 PCI 1F.4, PIN C, using IRQ #23
841 11:54:59.144374 PCI 1F.6, PIN D, using IRQ #20
842 11:54:59.147657 PCI 1F.7, PIN A, using IRQ #21
843 11:54:59.154042 IRQ: Using dynamically assigned PCI IO-APIC IRQs
844 11:54:59.160572 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
845 11:54:59.340224 FSPS returned 0
846 11:54:59.343327 Executing Phase 1 of FspMultiPhaseSiInit
847 11:54:59.353047 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
848 11:54:59.356840 port C0 DISC req: usage 1 usb3 1 usb2 1
849 11:54:59.359880 Raw Buffer output 0 00000111
850 11:54:59.362989 Raw Buffer output 1 00000000
851 11:54:59.367090 pmc_send_ipc_cmd succeeded
852 11:54:59.370207 port C1 DISC req: usage 1 usb3 3 usb2 3
853 11:54:59.374006 Raw Buffer output 0 00000331
854 11:54:59.377027 Raw Buffer output 1 00000000
855 11:54:59.381697 pmc_send_ipc_cmd succeeded
856 11:54:59.384796 Detected 6 core, 8 thread CPU.
857 11:54:59.388298 Detected 6 core, 8 thread CPU.
858 11:54:59.393718 Detected 6 core, 8 thread CPU.
859 11:54:59.396740 Detected 6 core, 8 thread CPU.
860 11:54:59.400633 Detected 6 core, 8 thread CPU.
861 11:54:59.403808 Detected 6 core, 8 thread CPU.
862 11:54:59.406704 Detected 6 core, 8 thread CPU.
863 11:54:59.410040 Detected 6 core, 8 thread CPU.
864 11:54:59.413622 Detected 6 core, 8 thread CPU.
865 11:54:59.416712 Detected 6 core, 8 thread CPU.
866 11:54:59.420047 Detected 6 core, 8 thread CPU.
867 11:54:59.423521 Detected 6 core, 8 thread CPU.
868 11:54:59.426868 Detected 6 core, 8 thread CPU.
869 11:54:59.429869 Detected 6 core, 8 thread CPU.
870 11:54:59.433645 Detected 6 core, 8 thread CPU.
871 11:54:59.436768 Detected 6 core, 8 thread CPU.
872 11:54:59.440449 Detected 6 core, 8 thread CPU.
873 11:54:59.443610 Detected 6 core, 8 thread CPU.
874 11:54:59.446998 Detected 6 core, 8 thread CPU.
875 11:54:59.450075 Detected 6 core, 8 thread CPU.
876 11:54:59.450612 Detected 6 core, 8 thread CPU.
877 11:54:59.453616 Detected 6 core, 8 thread CPU.
878 11:54:59.736433 Detected 6 core, 8 thread CPU.
879 11:54:59.739653 Detected 6 core, 8 thread CPU.
880 11:54:59.743064 Detected 6 core, 8 thread CPU.
881 11:54:59.746371 Detected 6 core, 8 thread CPU.
882 11:54:59.749831 Detected 6 core, 8 thread CPU.
883 11:54:59.753215 Detected 6 core, 8 thread CPU.
884 11:54:59.756069 Detected 6 core, 8 thread CPU.
885 11:54:59.760006 Detected 6 core, 8 thread CPU.
886 11:54:59.763162 Detected 6 core, 8 thread CPU.
887 11:54:59.766552 Detected 6 core, 8 thread CPU.
888 11:54:59.769871 Detected 6 core, 8 thread CPU.
889 11:54:59.773260 Detected 6 core, 8 thread CPU.
890 11:54:59.776615 Detected 6 core, 8 thread CPU.
891 11:54:59.779889 Detected 6 core, 8 thread CPU.
892 11:54:59.782873 Detected 6 core, 8 thread CPU.
893 11:54:59.786703 Detected 6 core, 8 thread CPU.
894 11:54:59.789941 Detected 6 core, 8 thread CPU.
895 11:54:59.793253 Detected 6 core, 8 thread CPU.
896 11:54:59.793777 Detected 6 core, 8 thread CPU.
897 11:54:59.796831 Detected 6 core, 8 thread CPU.
898 11:54:59.800284 Display FSP Version Info HOB
899 11:54:59.803635 Reference Code - CPU = c.0.65.70
900 11:54:59.806727 uCode Version = 0.0.4.23
901 11:54:59.809957 TXT ACM version = ff.ff.ff.ffff
902 11:54:59.813576 Reference Code - ME = c.0.65.70
903 11:54:59.817090 MEBx version = 0.0.0.0
904 11:54:59.820396 ME Firmware Version = Lite SKU
905 11:54:59.822969 Reference Code - PCH = c.0.65.70
906 11:54:59.826999 PCH-CRID Status = Disabled
907 11:54:59.829727 PCH-CRID Original Value = ff.ff.ff.ffff
908 11:54:59.833128 PCH-CRID New Value = ff.ff.ff.ffff
909 11:54:59.837193 OPROM - RST - RAID = ff.ff.ff.ffff
910 11:54:59.839823 PCH Hsio Version = 4.0.0.0
911 11:54:59.843464 Reference Code - SA - System Agent = c.0.65.70
912 11:54:59.846575 Reference Code - MRC = 0.0.3.80
913 11:54:59.849857 SA - PCIe Version = c.0.65.70
914 11:54:59.853069 SA-CRID Status = Disabled
915 11:54:59.856761 SA-CRID Original Value = 0.0.0.4
916 11:54:59.859835 SA-CRID New Value = 0.0.0.4
917 11:54:59.863407 OPROM - VBIOS = ff.ff.ff.ffff
918 11:54:59.866615 IO Manageability Engine FW Version = 24.0.4.0
919 11:54:59.870021 PHY Build Version = 0.0.0.2016
920 11:54:59.873727 Thunderbolt(TM) FW Version = 0.0.0.0
921 11:54:59.880010 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
922 11:54:59.886613 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
923 11:54:59.887142 Enumerating buses...
924 11:54:59.893712 Show all devs... Before device enumeration.
925 11:54:59.894239 Root Device: enabled 1
926 11:54:59.896979 CPU_CLUSTER: 0: enabled 1
927 11:54:59.900039 DOMAIN: 0000: enabled 1
928 11:54:59.903301 GPIO: 0: enabled 1
929 11:54:59.903844 PCI: 00:00.0: enabled 1
930 11:54:59.906322 PCI: 00:01.0: enabled 0
931 11:54:59.910120 PCI: 00:01.1: enabled 0
932 11:54:59.910647 PCI: 00:02.0: enabled 1
933 11:54:59.913345 PCI: 00:04.0: enabled 1
934 11:54:59.916354 PCI: 00:05.0: enabled 0
935 11:54:59.919960 PCI: 00:06.0: enabled 1
936 11:54:59.920486 PCI: 00:06.2: enabled 0
937 11:54:59.923145 PCI: 00:07.0: enabled 0
938 11:54:59.926708 PCI: 00:07.1: enabled 0
939 11:54:59.929732 PCI: 00:07.2: enabled 0
940 11:54:59.930154 PCI: 00:07.3: enabled 0
941 11:54:59.933289 PCI: 00:08.0: enabled 0
942 11:54:59.936653 PCI: 00:09.0: enabled 0
943 11:54:59.940199 PCI: 00:0a.0: enabled 1
944 11:54:59.940727 PCI: 00:0d.0: enabled 1
945 11:54:59.943613 PCI: 00:0d.1: enabled 0
946 11:54:59.946562 PCI: 00:0d.2: enabled 0
947 11:54:59.947084 PCI: 00:0d.3: enabled 0
948 11:54:59.949648 PCI: 00:0e.0: enabled 0
949 11:54:59.953348 PCI: 00:10.0: enabled 0
950 11:54:59.956240 PCI: 00:10.1: enabled 0
951 11:54:59.956662 PCI: 00:10.6: enabled 0
952 11:54:59.960117 PCI: 00:10.7: enabled 0
953 11:54:59.963362 PCI: 00:12.0: enabled 0
954 11:54:59.966941 PCI: 00:12.6: enabled 0
955 11:54:59.967469 PCI: 00:12.7: enabled 0
956 11:54:59.970051 PCI: 00:13.0: enabled 0
957 11:54:59.973500 PCI: 00:14.0: enabled 1
958 11:54:59.976783 PCI: 00:14.1: enabled 0
959 11:54:59.977349 PCI: 00:14.2: enabled 1
960 11:54:59.979857 PCI: 00:14.3: enabled 1
961 11:54:59.983418 PCI: 00:15.0: enabled 1
962 11:54:59.986638 PCI: 00:15.1: enabled 1
963 11:54:59.987168 PCI: 00:15.2: enabled 0
964 11:54:59.990087 PCI: 00:15.3: enabled 1
965 11:54:59.993455 PCI: 00:16.0: enabled 1
966 11:54:59.993982 PCI: 00:16.1: enabled 0
967 11:54:59.996746 PCI: 00:16.2: enabled 0
968 11:54:59.999928 PCI: 00:16.3: enabled 0
969 11:55:00.003503 PCI: 00:16.4: enabled 0
970 11:55:00.004031 PCI: 00:16.5: enabled 0
971 11:55:00.006856 PCI: 00:17.0: enabled 1
972 11:55:00.010100 PCI: 00:19.0: enabled 0
973 11:55:00.013242 PCI: 00:19.1: enabled 1
974 11:55:00.013773 PCI: 00:19.2: enabled 0
975 11:55:00.016638 PCI: 00:1a.0: enabled 0
976 11:55:00.019934 PCI: 00:1c.0: enabled 0
977 11:55:00.020464 PCI: 00:1c.1: enabled 0
978 11:55:00.022777 PCI: 00:1c.2: enabled 0
979 11:55:00.026586 PCI: 00:1c.3: enabled 0
980 11:55:00.029839 PCI: 00:1c.4: enabled 0
981 11:55:00.030263 PCI: 00:1c.5: enabled 0
982 11:55:00.033624 PCI: 00:1c.6: enabled 0
983 11:55:00.036456 PCI: 00:1c.7: enabled 0
984 11:55:00.040057 PCI: 00:1d.0: enabled 0
985 11:55:00.040582 PCI: 00:1d.1: enabled 0
986 11:55:00.043580 PCI: 00:1d.2: enabled 0
987 11:55:00.046734 PCI: 00:1d.3: enabled 0
988 11:55:00.049914 PCI: 00:1e.0: enabled 1
989 11:55:00.050444 PCI: 00:1e.1: enabled 0
990 11:55:00.053465 PCI: 00:1e.2: enabled 0
991 11:55:00.056437 PCI: 00:1e.3: enabled 1
992 11:55:00.056857 PCI: 00:1f.0: enabled 1
993 11:55:00.059887 PCI: 00:1f.1: enabled 0
994 11:55:00.063489 PCI: 00:1f.2: enabled 1
995 11:55:00.066778 PCI: 00:1f.3: enabled 1
996 11:55:00.067307 PCI: 00:1f.4: enabled 0
997 11:55:00.069915 PCI: 00:1f.5: enabled 1
998 11:55:00.073255 PCI: 00:1f.6: enabled 0
999 11:55:00.076583 PCI: 00:1f.7: enabled 0
1000 11:55:00.077146 GENERIC: 0.0: enabled 1
1001 11:55:00.079971 GENERIC: 0.0: enabled 1
1002 11:55:00.083379 GENERIC: 1.0: enabled 1
1003 11:55:00.086537 GENERIC: 0.0: enabled 1
1004 11:55:00.087066 GENERIC: 1.0: enabled 1
1005 11:55:00.089472 USB0 port 0: enabled 1
1006 11:55:00.093201 USB0 port 0: enabled 1
1007 11:55:00.093727 GENERIC: 0.0: enabled 1
1008 11:55:00.096427 I2C: 00:1a: enabled 1
1009 11:55:00.100289 I2C: 00:31: enabled 1
1010 11:55:00.100824 I2C: 00:32: enabled 1
1011 11:55:00.103119 I2C: 00:50: enabled 1
1012 11:55:00.106493 I2C: 00:10: enabled 1
1013 11:55:00.107018 I2C: 00:15: enabled 1
1014 11:55:00.110041 I2C: 00:2c: enabled 1
1015 11:55:00.113087 GENERIC: 0.0: enabled 1
1016 11:55:00.113652 SPI: 00: enabled 1
1017 11:55:00.116871 PNP: 0c09.0: enabled 1
1018 11:55:00.119537 GENERIC: 0.0: enabled 1
1019 11:55:00.123103 USB3 port 0: enabled 1
1020 11:55:00.123630 USB3 port 1: enabled 0
1021 11:55:00.126432 USB3 port 2: enabled 1
1022 11:55:00.129799 USB3 port 3: enabled 0
1023 11:55:00.130225 USB2 port 0: enabled 1
1024 11:55:00.132894 USB2 port 1: enabled 0
1025 11:55:00.136432 USB2 port 2: enabled 1
1026 11:55:00.140211 USB2 port 3: enabled 0
1027 11:55:00.140746 USB2 port 4: enabled 0
1028 11:55:00.143119 USB2 port 5: enabled 1
1029 11:55:00.146420 USB2 port 6: enabled 0
1030 11:55:00.146941 USB2 port 7: enabled 0
1031 11:55:00.149487 USB2 port 8: enabled 1
1032 11:55:00.153309 USB2 port 9: enabled 1
1033 11:55:00.153833 USB3 port 0: enabled 1
1034 11:55:00.155965 USB3 port 1: enabled 0
1035 11:55:00.159318 USB3 port 2: enabled 0
1036 11:55:00.163444 USB3 port 3: enabled 0
1037 11:55:00.163964 GENERIC: 0.0: enabled 1
1038 11:55:00.166435 GENERIC: 1.0: enabled 1
1039 11:55:00.169693 APIC: 00: enabled 1
1040 11:55:00.170209 APIC: 14: enabled 1
1041 11:55:00.172902 APIC: 16: enabled 1
1042 11:55:00.176390 APIC: 10: enabled 1
1043 11:55:00.176904 APIC: 12: enabled 1
1044 11:55:00.179561 APIC: 01: enabled 1
1045 11:55:00.180080 APIC: 08: enabled 1
1046 11:55:00.182614 APIC: 09: enabled 1
1047 11:55:00.186491 Compare with tree...
1048 11:55:00.187012 Root Device: enabled 1
1049 11:55:00.189786 CPU_CLUSTER: 0: enabled 1
1050 11:55:00.192899 APIC: 00: enabled 1
1051 11:55:00.196424 APIC: 14: enabled 1
1052 11:55:00.196939 APIC: 16: enabled 1
1053 11:55:00.199703 APIC: 10: enabled 1
1054 11:55:00.203138 APIC: 12: enabled 1
1055 11:55:00.203657 APIC: 01: enabled 1
1056 11:55:00.206351 APIC: 08: enabled 1
1057 11:55:00.209721 APIC: 09: enabled 1
1058 11:55:00.210245 DOMAIN: 0000: enabled 1
1059 11:55:00.213204 GPIO: 0: enabled 1
1060 11:55:00.216311 PCI: 00:00.0: enabled 1
1061 11:55:00.219393 PCI: 00:01.0: enabled 0
1062 11:55:00.219815 PCI: 00:01.1: enabled 0
1063 11:55:00.222913 PCI: 00:02.0: enabled 1
1064 11:55:00.225783 PCI: 00:04.0: enabled 1
1065 11:55:00.229562 GENERIC: 0.0: enabled 1
1066 11:55:00.232918 PCI: 00:05.0: enabled 0
1067 11:55:00.233562 PCI: 00:06.0: enabled 1
1068 11:55:00.236801 PCI: 00:06.2: enabled 0
1069 11:55:00.239857 PCI: 00:08.0: enabled 0
1070 11:55:00.242939 PCI: 00:09.0: enabled 0
1071 11:55:00.246034 PCI: 00:0a.0: enabled 1
1072 11:55:00.246450 PCI: 00:0d.0: enabled 1
1073 11:55:00.249516 USB0 port 0: enabled 1
1074 11:55:00.252617 USB3 port 0: enabled 1
1075 11:55:00.256046 USB3 port 1: enabled 0
1076 11:55:00.259442 USB3 port 2: enabled 1
1077 11:55:00.259952 USB3 port 3: enabled 0
1078 11:55:00.262804 PCI: 00:0d.1: enabled 0
1079 11:55:00.265808 PCI: 00:0d.2: enabled 0
1080 11:55:00.269341 PCI: 00:0d.3: enabled 0
1081 11:55:00.272669 PCI: 00:0e.0: enabled 0
1082 11:55:00.273248 PCI: 00:10.0: enabled 0
1083 11:55:00.276232 PCI: 00:10.1: enabled 0
1084 11:55:00.279585 PCI: 00:10.6: enabled 0
1085 11:55:00.282712 PCI: 00:10.7: enabled 0
1086 11:55:00.286024 PCI: 00:12.0: enabled 0
1087 11:55:00.286542 PCI: 00:12.6: enabled 0
1088 11:55:00.289486 PCI: 00:12.7: enabled 0
1089 11:55:00.292611 PCI: 00:13.0: enabled 0
1090 11:55:00.296175 PCI: 00:14.0: enabled 1
1091 11:55:00.299603 USB0 port 0: enabled 1
1092 11:55:00.300116 USB2 port 0: enabled 1
1093 11:55:00.302615 USB2 port 1: enabled 0
1094 11:55:00.306069 USB2 port 2: enabled 1
1095 11:55:00.309387 USB2 port 3: enabled 0
1096 11:55:00.312623 USB2 port 4: enabled 0
1097 11:55:00.315589 USB2 port 5: enabled 1
1098 11:55:00.316103 USB2 port 6: enabled 0
1099 11:55:00.319469 USB2 port 7: enabled 0
1100 11:55:00.322243 USB2 port 8: enabled 1
1101 11:55:00.325954 USB2 port 9: enabled 1
1102 11:55:00.328627 USB3 port 0: enabled 1
1103 11:55:00.332361 USB3 port 1: enabled 0
1104 11:55:00.332892 USB3 port 2: enabled 0
1105 11:55:00.335982 USB3 port 3: enabled 0
1106 11:55:00.339230 PCI: 00:14.1: enabled 0
1107 11:55:00.342165 PCI: 00:14.2: enabled 1
1108 11:55:00.345787 PCI: 00:14.3: enabled 1
1109 11:55:00.346334 GENERIC: 0.0: enabled 1
1110 11:55:00.348940 PCI: 00:15.0: enabled 1
1111 11:55:00.352382 I2C: 00:1a: enabled 1
1112 11:55:00.355538 I2C: 00:31: enabled 1
1113 11:55:00.358968 I2C: 00:32: enabled 1
1114 11:55:00.359481 PCI: 00:15.1: enabled 1
1115 11:55:00.362038 I2C: 00:50: enabled 1
1116 11:55:00.365670 PCI: 00:15.2: enabled 0
1117 11:55:00.368561 PCI: 00:15.3: enabled 1
1118 11:55:00.369019 I2C: 00:10: enabled 1
1119 11:55:00.372224 PCI: 00:16.0: enabled 1
1120 11:55:00.375564 PCI: 00:16.1: enabled 0
1121 11:55:00.378418 PCI: 00:16.2: enabled 0
1122 11:55:00.382100 PCI: 00:16.3: enabled 0
1123 11:55:00.382615 PCI: 00:16.4: enabled 0
1124 11:55:00.385228 PCI: 00:16.5: enabled 0
1125 11:55:00.388775 PCI: 00:17.0: enabled 1
1126 11:55:00.392407 PCI: 00:19.0: enabled 0
1127 11:55:00.395485 PCI: 00:19.1: enabled 1
1128 11:55:00.395998 I2C: 00:15: enabled 1
1129 11:55:00.399326 I2C: 00:2c: enabled 1
1130 11:55:00.402571 PCI: 00:19.2: enabled 0
1131 11:55:00.405357 PCI: 00:1a.0: enabled 0
1132 11:55:00.405862 PCI: 00:1e.0: enabled 1
1133 11:55:00.409312 PCI: 00:1e.1: enabled 0
1134 11:55:00.412500 PCI: 00:1e.2: enabled 0
1135 11:55:00.415587 PCI: 00:1e.3: enabled 1
1136 11:55:00.416100 SPI: 00: enabled 1
1137 11:55:00.419091 PCI: 00:1f.0: enabled 1
1138 11:55:00.422061 PNP: 0c09.0: enabled 1
1139 11:55:00.425551 PCI: 00:1f.1: enabled 0
1140 11:55:00.428612 PCI: 00:1f.2: enabled 1
1141 11:55:00.429027 GENERIC: 0.0: enabled 1
1142 11:55:00.432256 GENERIC: 0.0: enabled 1
1143 11:55:00.435564 GENERIC: 1.0: enabled 1
1144 11:55:00.439133 PCI: 00:1f.3: enabled 1
1145 11:55:00.442227 PCI: 00:1f.4: enabled 0
1146 11:55:00.442742 PCI: 00:1f.5: enabled 1
1147 11:55:00.445767 PCI: 00:1f.6: enabled 0
1148 11:55:00.449048 PCI: 00:1f.7: enabled 0
1149 11:55:00.452275 Root Device scanning...
1150 11:55:00.455621 scan_static_bus for Root Device
1151 11:55:00.456251 CPU_CLUSTER: 0 enabled
1152 11:55:00.458616 DOMAIN: 0000 enabled
1153 11:55:00.461958 DOMAIN: 0000 scanning...
1154 11:55:00.465454 PCI: pci_scan_bus for bus 00
1155 11:55:00.468618 PCI: 00:00.0 [8086/0000] ops
1156 11:55:00.472339 PCI: 00:00.0 [8086/4609] enabled
1157 11:55:00.475538 PCI: 00:02.0 [8086/0000] bus ops
1158 11:55:00.479019 PCI: 00:02.0 [8086/46b3] enabled
1159 11:55:00.481806 PCI: 00:04.0 [8086/0000] bus ops
1160 11:55:00.485301 PCI: 00:04.0 [8086/461d] enabled
1161 11:55:00.488789 PCI: 00:06.0 [8086/0000] bus ops
1162 11:55:00.492405 PCI: 00:06.0 [8086/464d] enabled
1163 11:55:00.495416 PCI: 00:08.0 [8086/464f] disabled
1164 11:55:00.499062 PCI: 00:0a.0 [8086/467d] enabled
1165 11:55:00.502053 PCI: 00:0d.0 [8086/0000] bus ops
1166 11:55:00.505523 PCI: 00:0d.0 [8086/461e] enabled
1167 11:55:00.509432 PCI: 00:14.0 [8086/0000] bus ops
1168 11:55:00.512475 PCI: 00:14.0 [8086/51ed] enabled
1169 11:55:00.515569 PCI: 00:14.2 [8086/51ef] enabled
1170 11:55:00.519173 PCI: 00:14.3 [8086/0000] bus ops
1171 11:55:00.522495 PCI: 00:14.3 [8086/51f0] enabled
1172 11:55:00.525361 PCI: 00:15.0 [8086/0000] bus ops
1173 11:55:00.528895 PCI: 00:15.0 [8086/51e8] enabled
1174 11:55:00.532557 PCI: 00:15.1 [8086/0000] bus ops
1175 11:55:00.535536 PCI: 00:15.1 [8086/51e9] enabled
1176 11:55:00.538953 PCI: 00:15.2 [8086/0000] bus ops
1177 11:55:00.542024 PCI: 00:15.2 [8086/51ea] disabled
1178 11:55:00.545546 PCI: 00:15.3 [8086/0000] bus ops
1179 11:55:00.548676 PCI: 00:15.3 [8086/51eb] enabled
1180 11:55:00.552680 PCI: 00:16.0 [8086/0000] ops
1181 11:55:00.555568 PCI: 00:16.0 [8086/51e0] enabled
1182 11:55:00.561916 PCI: Static device PCI: 00:17.0 not found, disabling it.
1183 11:55:00.565126 PCI: 00:19.0 [8086/0000] bus ops
1184 11:55:00.569005 PCI: 00:19.0 [8086/51c5] disabled
1185 11:55:00.572102 PCI: 00:19.1 [8086/0000] bus ops
1186 11:55:00.575661 PCI: 00:19.1 [8086/51c6] enabled
1187 11:55:00.578838 PCI: 00:1e.0 [8086/0000] ops
1188 11:55:00.581847 PCI: 00:1e.0 [8086/51a8] enabled
1189 11:55:00.585301 PCI: 00:1e.3 [8086/0000] bus ops
1190 11:55:00.589087 PCI: 00:1e.3 [8086/51ab] enabled
1191 11:55:00.591937 PCI: 00:1f.0 [8086/0000] bus ops
1192 11:55:00.595749 PCI: 00:1f.0 [8086/5182] enabled
1193 11:55:00.596271 RTC Init
1194 11:55:00.599080 Set power on after power failure.
1195 11:55:00.602043 Disabling Deep S3
1196 11:55:00.605536 Disabling Deep S3
1197 11:55:00.606082 Disabling Deep S4
1198 11:55:00.608863 Disabling Deep S4
1199 11:55:00.609423 Disabling Deep S5
1200 11:55:00.612403 Disabling Deep S5
1201 11:55:00.615487 PCI: 00:1f.2 [0000/0000] hidden
1202 11:55:00.618834 PCI: 00:1f.3 [8086/0000] bus ops
1203 11:55:00.622021 PCI: 00:1f.3 [8086/51c8] enabled
1204 11:55:00.625469 PCI: 00:1f.5 [8086/0000] bus ops
1205 11:55:00.628534 PCI: 00:1f.5 [8086/51a4] enabled
1206 11:55:00.628954 GPIO: 0 enabled
1207 11:55:00.632179 PCI: Leftover static devices:
1208 11:55:00.635552 PCI: 00:01.0
1209 11:55:00.636068 PCI: 00:01.1
1210 11:55:00.636398 PCI: 00:05.0
1211 11:55:00.639139 PCI: 00:06.2
1212 11:55:00.639656 PCI: 00:09.0
1213 11:55:00.641920 PCI: 00:0d.1
1214 11:55:00.642336 PCI: 00:0d.2
1215 11:55:00.642666 PCI: 00:0d.3
1216 11:55:00.645552 PCI: 00:0e.0
1217 11:55:00.646073 PCI: 00:10.0
1218 11:55:00.649201 PCI: 00:10.1
1219 11:55:00.649716 PCI: 00:10.6
1220 11:55:00.650047 PCI: 00:10.7
1221 11:55:00.652367 PCI: 00:12.0
1222 11:55:00.652885 PCI: 00:12.6
1223 11:55:00.655241 PCI: 00:12.7
1224 11:55:00.655656 PCI: 00:13.0
1225 11:55:00.658890 PCI: 00:14.1
1226 11:55:00.659407 PCI: 00:16.1
1227 11:55:00.659737 PCI: 00:16.2
1228 11:55:00.661788 PCI: 00:16.3
1229 11:55:00.662201 PCI: 00:16.4
1230 11:55:00.665549 PCI: 00:16.5
1231 11:55:00.666063 PCI: 00:17.0
1232 11:55:00.666395 PCI: 00:19.2
1233 11:55:00.668946 PCI: 00:1a.0
1234 11:55:00.669526 PCI: 00:1e.1
1235 11:55:00.672070 PCI: 00:1e.2
1236 11:55:00.672588 PCI: 00:1f.1
1237 11:55:00.672922 PCI: 00:1f.4
1238 11:55:00.675563 PCI: 00:1f.6
1239 11:55:00.676083 PCI: 00:1f.7
1240 11:55:00.678377 PCI: Check your devicetree.cb.
1241 11:55:00.682023 PCI: 00:02.0 scanning...
1242 11:55:00.685573 scan_generic_bus for PCI: 00:02.0
1243 11:55:00.688990 scan_generic_bus for PCI: 00:02.0 done
1244 11:55:00.695315 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1245 11:55:00.695838 PCI: 00:04.0 scanning...
1246 11:55:00.698751 scan_generic_bus for PCI: 00:04.0
1247 11:55:00.702009 GENERIC: 0.0 enabled
1248 11:55:00.708365 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1249 11:55:00.712097 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1250 11:55:00.715643 PCI: 00:06.0 scanning...
1251 11:55:00.718896 do_pci_scan_bridge for PCI: 00:06.0
1252 11:55:00.721981 PCI: pci_scan_bus for bus 01
1253 11:55:00.725713 PCI: 01:00.0 [15b7/5009] enabled
1254 11:55:00.728375 Enabling Common Clock Configuration
1255 11:55:00.732034 L1 Sub-State supported from root port 6
1256 11:55:00.735421 L1 Sub-State Support = 0x5
1257 11:55:00.738952 CommonModeRestoreTime = 0x6e
1258 11:55:00.741788 Power On Value = 0x5, Power On Scale = 0x2
1259 11:55:00.745729 ASPM: Enabled L1
1260 11:55:00.748783 PCIe: Max_Payload_Size adjusted to 256
1261 11:55:00.752248 PCI: 01:00.0: Enabled LTR
1262 11:55:00.755884 PCI: 01:00.0: Programmed LTR max latencies
1263 11:55:00.761795 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1264 11:55:00.762320 PCI: 00:0d.0 scanning...
1265 11:55:00.765565 scan_static_bus for PCI: 00:0d.0
1266 11:55:00.768684 USB0 port 0 enabled
1267 11:55:00.771915 USB0 port 0 scanning...
1268 11:55:00.775776 scan_static_bus for USB0 port 0
1269 11:55:00.776289 USB3 port 0 enabled
1270 11:55:00.778801 USB3 port 1 disabled
1271 11:55:00.781997 USB3 port 2 enabled
1272 11:55:00.782514 USB3 port 3 disabled
1273 11:55:00.785433 USB3 port 0 scanning...
1274 11:55:00.788789 scan_static_bus for USB3 port 0
1275 11:55:00.792122 scan_static_bus for USB3 port 0 done
1276 11:55:00.795507 scan_bus: bus USB3 port 0 finished in 6 msecs
1277 11:55:00.798689 USB3 port 2 scanning...
1278 11:55:00.802036 scan_static_bus for USB3 port 2
1279 11:55:00.805755 scan_static_bus for USB3 port 2 done
1280 11:55:00.812129 scan_bus: bus USB3 port 2 finished in 6 msecs
1281 11:55:00.815138 scan_static_bus for USB0 port 0 done
1282 11:55:00.818763 scan_bus: bus USB0 port 0 finished in 43 msecs
1283 11:55:00.821798 scan_static_bus for PCI: 00:0d.0 done
1284 11:55:00.828837 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1285 11:55:00.829419 PCI: 00:14.0 scanning...
1286 11:55:00.831856 scan_static_bus for PCI: 00:14.0
1287 11:55:00.835335 USB0 port 0 enabled
1288 11:55:00.838597 USB0 port 0 scanning...
1289 11:55:00.841819 scan_static_bus for USB0 port 0
1290 11:55:00.842236 USB2 port 0 enabled
1291 11:55:00.845644 USB2 port 1 disabled
1292 11:55:00.848764 USB2 port 2 enabled
1293 11:55:00.849325 USB2 port 3 disabled
1294 11:55:00.851962 USB2 port 4 disabled
1295 11:55:00.855292 USB2 port 5 enabled
1296 11:55:00.855805 USB2 port 6 disabled
1297 11:55:00.858667 USB2 port 7 disabled
1298 11:55:00.859183 USB2 port 8 enabled
1299 11:55:00.861919 USB2 port 9 enabled
1300 11:55:00.865265 USB3 port 0 enabled
1301 11:55:00.865772 USB3 port 1 disabled
1302 11:55:00.868564 USB3 port 2 disabled
1303 11:55:00.871944 USB3 port 3 disabled
1304 11:55:00.872457 USB2 port 0 scanning...
1305 11:55:00.875173 scan_static_bus for USB2 port 0
1306 11:55:00.878762 scan_static_bus for USB2 port 0 done
1307 11:55:00.885619 scan_bus: bus USB2 port 0 finished in 6 msecs
1308 11:55:00.888781 USB2 port 2 scanning...
1309 11:55:00.892311 scan_static_bus for USB2 port 2
1310 11:55:00.894887 scan_static_bus for USB2 port 2 done
1311 11:55:00.898438 scan_bus: bus USB2 port 2 finished in 6 msecs
1312 11:55:00.901822 USB2 port 5 scanning...
1313 11:55:00.905141 scan_static_bus for USB2 port 5
1314 11:55:00.909143 scan_static_bus for USB2 port 5 done
1315 11:55:00.912057 scan_bus: bus USB2 port 5 finished in 6 msecs
1316 11:55:00.915631 USB2 port 8 scanning...
1317 11:55:00.918221 scan_static_bus for USB2 port 8
1318 11:55:00.921946 scan_static_bus for USB2 port 8 done
1319 11:55:00.925201 scan_bus: bus USB2 port 8 finished in 6 msecs
1320 11:55:00.928384 USB2 port 9 scanning...
1321 11:55:00.931827 scan_static_bus for USB2 port 9
1322 11:55:00.935149 scan_static_bus for USB2 port 9 done
1323 11:55:00.941815 scan_bus: bus USB2 port 9 finished in 6 msecs
1324 11:55:00.942329 USB3 port 0 scanning...
1325 11:55:00.945271 scan_static_bus for USB3 port 0
1326 11:55:00.948546 scan_static_bus for USB3 port 0 done
1327 11:55:00.955815 scan_bus: bus USB3 port 0 finished in 6 msecs
1328 11:55:00.958352 scan_static_bus for USB0 port 0 done
1329 11:55:00.961962 scan_bus: bus USB0 port 0 finished in 120 msecs
1330 11:55:00.965274 scan_static_bus for PCI: 00:14.0 done
1331 11:55:00.972412 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1332 11:55:00.975290 PCI: 00:14.3 scanning...
1333 11:55:00.979216 scan_static_bus for PCI: 00:14.3
1334 11:55:00.979729 GENERIC: 0.0 enabled
1335 11:55:00.981673 scan_static_bus for PCI: 00:14.3 done
1336 11:55:00.988767 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1337 11:55:00.992100 PCI: 00:15.0 scanning...
1338 11:55:00.995215 scan_static_bus for PCI: 00:15.0
1339 11:55:00.995733 I2C: 00:1a enabled
1340 11:55:00.998832 I2C: 00:31 enabled
1341 11:55:00.999362 I2C: 00:32 enabled
1342 11:55:01.005616 scan_static_bus for PCI: 00:15.0 done
1343 11:55:01.008491 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1344 11:55:01.011623 PCI: 00:15.1 scanning...
1345 11:55:01.015386 scan_static_bus for PCI: 00:15.1
1346 11:55:01.015919 I2C: 00:50 enabled
1347 11:55:01.018426 scan_static_bus for PCI: 00:15.1 done
1348 11:55:01.025257 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1349 11:55:01.028649 PCI: 00:15.3 scanning...
1350 11:55:01.031917 scan_static_bus for PCI: 00:15.3
1351 11:55:01.032431 I2C: 00:10 enabled
1352 11:55:01.035029 scan_static_bus for PCI: 00:15.3 done
1353 11:55:01.041703 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1354 11:55:01.045406 PCI: 00:19.1 scanning...
1355 11:55:01.048453 scan_static_bus for PCI: 00:19.1
1356 11:55:01.048983 I2C: 00:15 enabled
1357 11:55:01.051838 I2C: 00:2c enabled
1358 11:55:01.055236 scan_static_bus for PCI: 00:19.1 done
1359 11:55:01.058113 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1360 11:55:01.061640 PCI: 00:1e.3 scanning...
1361 11:55:01.065402 scan_generic_bus for PCI: 00:1e.3
1362 11:55:01.068749 SPI: 00 enabled
1363 11:55:01.071771 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1364 11:55:01.078668 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1365 11:55:01.081824 PCI: 00:1f.0 scanning...
1366 11:55:01.085246 scan_static_bus for PCI: 00:1f.0
1367 11:55:01.085762 PNP: 0c09.0 enabled
1368 11:55:01.088676 PNP: 0c09.0 scanning...
1369 11:55:01.091774 scan_static_bus for PNP: 0c09.0
1370 11:55:01.094905 scan_static_bus for PNP: 0c09.0 done
1371 11:55:01.098286 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1372 11:55:01.105010 scan_static_bus for PCI: 00:1f.0 done
1373 11:55:01.108393 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1374 11:55:01.111776 PCI: 00:1f.2 scanning...
1375 11:55:01.114825 scan_static_bus for PCI: 00:1f.2
1376 11:55:01.115343 GENERIC: 0.0 enabled
1377 11:55:01.118254 GENERIC: 0.0 scanning...
1378 11:55:01.121625 scan_static_bus for GENERIC: 0.0
1379 11:55:01.124806 GENERIC: 0.0 enabled
1380 11:55:01.125352 GENERIC: 1.0 enabled
1381 11:55:01.131328 scan_static_bus for GENERIC: 0.0 done
1382 11:55:01.135250 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1383 11:55:01.137937 scan_static_bus for PCI: 00:1f.2 done
1384 11:55:01.144999 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1385 11:55:01.145552 PCI: 00:1f.3 scanning...
1386 11:55:01.148031 scan_static_bus for PCI: 00:1f.3
1387 11:55:01.154852 scan_static_bus for PCI: 00:1f.3 done
1388 11:55:01.158019 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1389 11:55:01.161837 PCI: 00:1f.5 scanning...
1390 11:55:01.164797 scan_generic_bus for PCI: 00:1f.5
1391 11:55:01.168382 scan_generic_bus for PCI: 00:1f.5 done
1392 11:55:01.171823 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1393 11:55:01.178060 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1394 11:55:01.181622 scan_static_bus for Root Device done
1395 11:55:01.184849 scan_bus: bus Root Device finished in 729 msecs
1396 11:55:01.187790 done
1397 11:55:01.190664 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1398 11:55:01.197716 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1399 11:55:01.204671 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1400 11:55:01.207789 SPI flash protection: WPSW=1 SRP0=0
1401 11:55:01.211098 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1402 11:55:01.217649 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1403 11:55:01.221010 found VGA at PCI: 00:02.0
1404 11:55:01.224588 Setting up VGA for PCI: 00:02.0
1405 11:55:01.230754 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1406 11:55:01.234590 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1407 11:55:01.237935 Allocating resources...
1408 11:55:01.238210 Reading resources...
1409 11:55:01.244531 Root Device read_resources bus 0 link: 0
1410 11:55:01.248138 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1411 11:55:01.251222 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1412 11:55:01.258225 DOMAIN: 0000 read_resources bus 0 link: 0
1413 11:55:01.264842 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1414 11:55:01.268083 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1415 11:55:01.274758 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1416 11:55:01.281136 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1417 11:55:01.288099 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1418 11:55:01.294531 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1419 11:55:01.301724 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1420 11:55:01.308055 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1421 11:55:01.314868 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1422 11:55:01.321657 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1423 11:55:01.328059 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1424 11:55:01.334743 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1425 11:55:01.337795 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1426 11:55:01.344215 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1427 11:55:01.351481 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1428 11:55:01.357891 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1429 11:55:01.364499 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1430 11:55:01.371242 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1431 11:55:01.377806 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1432 11:55:01.384911 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1433 11:55:01.387895 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1434 11:55:01.394710 PCI: 00:04.0 read_resources bus 1 link: 0
1435 11:55:01.398074 PCI: 00:04.0 read_resources bus 1 link: 0 done
1436 11:55:01.401235 PCI: 00:06.0 read_resources bus 1 link: 0
1437 11:55:01.408141 PCI: 00:06.0 read_resources bus 1 link: 0 done
1438 11:55:01.411235 PCI: 00:0d.0 read_resources bus 0 link: 0
1439 11:55:01.414540 USB0 port 0 read_resources bus 0 link: 0
1440 11:55:01.421206 USB0 port 0 read_resources bus 0 link: 0 done
1441 11:55:01.424775 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1442 11:55:01.427908 PCI: 00:14.0 read_resources bus 0 link: 0
1443 11:55:01.434763 USB0 port 0 read_resources bus 0 link: 0
1444 11:55:01.437701 USB0 port 0 read_resources bus 0 link: 0 done
1445 11:55:01.441397 PCI: 00:14.0 read_resources bus 0 link: 0 done
1446 11:55:01.447770 PCI: 00:14.3 read_resources bus 0 link: 0
1447 11:55:01.451021 PCI: 00:14.3 read_resources bus 0 link: 0 done
1448 11:55:01.457700 PCI: 00:15.0 read_resources bus 0 link: 0
1449 11:55:01.461028 PCI: 00:15.0 read_resources bus 0 link: 0 done
1450 11:55:01.464460 PCI: 00:15.1 read_resources bus 0 link: 0
1451 11:55:01.471111 PCI: 00:15.1 read_resources bus 0 link: 0 done
1452 11:55:01.474365 PCI: 00:15.3 read_resources bus 0 link: 0
1453 11:55:01.477790 PCI: 00:15.3 read_resources bus 0 link: 0 done
1454 11:55:01.484476 PCI: 00:19.1 read_resources bus 0 link: 0
1455 11:55:01.487816 PCI: 00:19.1 read_resources bus 0 link: 0 done
1456 11:55:01.491281 PCI: 00:1e.3 read_resources bus 2 link: 0
1457 11:55:01.498063 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1458 11:55:01.501907 PCI: 00:1f.0 read_resources bus 0 link: 0
1459 11:55:01.504898 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1460 11:55:01.511107 PCI: 00:1f.2 read_resources bus 0 link: 0
1461 11:55:01.514873 GENERIC: 0.0 read_resources bus 0 link: 0
1462 11:55:01.518077 GENERIC: 0.0 read_resources bus 0 link: 0 done
1463 11:55:01.524576 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1464 11:55:01.527708 DOMAIN: 0000 read_resources bus 0 link: 0 done
1465 11:55:01.534335 Root Device read_resources bus 0 link: 0 done
1466 11:55:01.537417 Done reading resources.
1467 11:55:01.540964 Show resources in subtree (Root Device)...After reading.
1468 11:55:01.547467 Root Device child on link 0 CPU_CLUSTER: 0
1469 11:55:01.550928 CPU_CLUSTER: 0 child on link 0 APIC: 00
1470 11:55:01.551366 APIC: 00
1471 11:55:01.553995 APIC: 14
1472 11:55:01.554523 APIC: 16
1473 11:55:01.554971 APIC: 10
1474 11:55:01.557592 APIC: 12
1475 11:55:01.558032 APIC: 01
1476 11:55:01.560591 APIC: 08
1477 11:55:01.561001 APIC: 09
1478 11:55:01.564102 DOMAIN: 0000 child on link 0 GPIO: 0
1479 11:55:01.574411 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1480 11:55:01.584070 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1481 11:55:01.584598 GPIO: 0
1482 11:55:01.587201 PCI: 00:00.0
1483 11:55:01.597082 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1484 11:55:01.604056 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1485 11:55:01.614579 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1486 11:55:01.624357 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1487 11:55:01.633883 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1488 11:55:01.644020 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1489 11:55:01.650978 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1490 11:55:01.660805 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1491 11:55:01.670663 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1492 11:55:01.680814 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1493 11:55:01.690694 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1494 11:55:01.700502 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1495 11:55:01.710585 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1496 11:55:01.717147 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1497 11:55:01.727484 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1498 11:55:01.737359 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1499 11:55:01.747250 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1500 11:55:01.757285 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1501 11:55:01.767686 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1502 11:55:01.777168 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1503 11:55:01.787359 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1504 11:55:01.793938 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1505 11:55:01.803884 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1506 11:55:01.813664 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1507 11:55:01.823803 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1508 11:55:01.833798 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1509 11:55:01.844107 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1510 11:55:01.850440 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1511 11:55:01.853456 PCI: 00:02.0
1512 11:55:01.863582 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1513 11:55:01.874077 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1514 11:55:01.883683 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1515 11:55:01.886935 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1516 11:55:01.896891 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1517 11:55:01.900208 GENERIC: 0.0
1518 11:55:01.903578 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1519 11:55:01.913310 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1520 11:55:01.923675 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1521 11:55:01.930161 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1522 11:55:01.933589 PCI: 01:00.0
1523 11:55:01.943637 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1524 11:55:01.953847 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1525 11:55:01.954368 PCI: 00:08.0
1526 11:55:01.957064 PCI: 00:0a.0
1527 11:55:01.966974 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1528 11:55:01.970080 PCI: 00:0d.0 child on link 0 USB0 port 0
1529 11:55:01.980293 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1530 11:55:01.983197 USB0 port 0 child on link 0 USB3 port 0
1531 11:55:01.987103 USB3 port 0
1532 11:55:01.987616 USB3 port 1
1533 11:55:01.990507 USB3 port 2
1534 11:55:01.993585 USB3 port 3
1535 11:55:01.996913 PCI: 00:14.0 child on link 0 USB0 port 0
1536 11:55:02.006849 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1537 11:55:02.010704 USB0 port 0 child on link 0 USB2 port 0
1538 11:55:02.013208 USB2 port 0
1539 11:55:02.013589 USB2 port 1
1540 11:55:02.016776 USB2 port 2
1541 11:55:02.017383 USB2 port 3
1542 11:55:02.020050 USB2 port 4
1543 11:55:02.020562 USB2 port 5
1544 11:55:02.023583 USB2 port 6
1545 11:55:02.024157 USB2 port 7
1546 11:55:02.026466 USB2 port 8
1547 11:55:02.026878 USB2 port 9
1548 11:55:02.029978 USB3 port 0
1549 11:55:02.033336 USB3 port 1
1550 11:55:02.033874 USB3 port 2
1551 11:55:02.036617 USB3 port 3
1552 11:55:02.037038 PCI: 00:14.2
1553 11:55:02.047108 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1554 11:55:02.056860 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1555 11:55:02.059806 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1556 11:55:02.070044 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1557 11:55:02.073283 GENERIC: 0.0
1558 11:55:02.076791 PCI: 00:15.0 child on link 0 I2C: 00:1a
1559 11:55:02.086590 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1560 11:55:02.089981 I2C: 00:1a
1561 11:55:02.090497 I2C: 00:31
1562 11:55:02.093273 I2C: 00:32
1563 11:55:02.096713 PCI: 00:15.1 child on link 0 I2C: 00:50
1564 11:55:02.107176 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 11:55:02.107698 I2C: 00:50
1566 11:55:02.109958 PCI: 00:15.2
1567 11:55:02.113551 PCI: 00:15.3 child on link 0 I2C: 00:10
1568 11:55:02.123327 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 11:55:02.126619 I2C: 00:10
1570 11:55:02.127136 PCI: 00:16.0
1571 11:55:02.136404 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 11:55:02.139673 PCI: 00:19.0
1573 11:55:02.143547 PCI: 00:19.1 child on link 0 I2C: 00:15
1574 11:55:02.153468 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1575 11:55:02.153986 I2C: 00:15
1576 11:55:02.156868 I2C: 00:2c
1577 11:55:02.157433 PCI: 00:1e.0
1578 11:55:02.170054 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1579 11:55:02.173785 PCI: 00:1e.3 child on link 0 SPI: 00
1580 11:55:02.183377 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1581 11:55:02.183897 SPI: 00
1582 11:55:02.190450 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1583 11:55:02.196710 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1584 11:55:02.200269 PNP: 0c09.0
1585 11:55:02.206768 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1586 11:55:02.212969 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1587 11:55:02.223256 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1588 11:55:02.229793 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1589 11:55:02.236333 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1590 11:55:02.237137 GENERIC: 0.0
1591 11:55:02.239942 GENERIC: 1.0
1592 11:55:02.240456 PCI: 00:1f.3
1593 11:55:02.249650 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1594 11:55:02.259886 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1595 11:55:02.263330 PCI: 00:1f.5
1596 11:55:02.273262 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1597 11:55:02.279825 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1598 11:55:02.286923 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1599 11:55:02.289859 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1600 11:55:02.296494 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1601 11:55:02.299842 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1602 11:55:02.306134 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1603 11:55:02.313237 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1604 11:55:02.319408 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1605 11:55:02.326211 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1606 11:55:02.335928 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1607 11:55:02.340189 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1608 11:55:02.349429 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1609 11:55:02.355812 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1610 11:55:02.362780 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1611 11:55:02.366018 DOMAIN: 0000: Resource ranges:
1612 11:55:02.369700 * Base: 1000, Size: 800, Tag: 100
1613 11:55:02.372730 * Base: 1900, Size: e700, Tag: 100
1614 11:55:02.379604 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1615 11:55:02.386210 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1616 11:55:02.392932 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1617 11:55:02.399299 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1618 11:55:02.409373 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1619 11:55:02.416065 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1620 11:55:02.422689 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1621 11:55:02.432486 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1622 11:55:02.439555 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1623 11:55:02.445675 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1624 11:55:02.455816 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1625 11:55:02.462555 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1626 11:55:02.469320 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1627 11:55:02.479649 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1628 11:55:02.486427 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1629 11:55:02.492739 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1630 11:55:02.499155 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1631 11:55:02.509256 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1632 11:55:02.516046 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1633 11:55:02.522383 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1634 11:55:02.532718 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1635 11:55:02.538905 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1636 11:55:02.545839 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1637 11:55:02.555733 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1638 11:55:02.562364 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1639 11:55:02.569163 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1640 11:55:02.579136 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1641 11:55:02.586054 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1642 11:55:02.592877 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1643 11:55:02.602513 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1644 11:55:02.609066 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1645 11:55:02.615465 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1646 11:55:02.625491 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1647 11:55:02.629147 DOMAIN: 0000: Resource ranges:
1648 11:55:02.632487 * Base: 80400000, Size: 3fc00000, Tag: 200
1649 11:55:02.635760 * Base: d0000000, Size: 28000000, Tag: 200
1650 11:55:02.641819 * Base: fa000000, Size: 1000000, Tag: 200
1651 11:55:02.645683 * Base: fb001000, Size: 17ff000, Tag: 200
1652 11:55:02.648753 * Base: fe800000, Size: 300000, Tag: 200
1653 11:55:02.652223 * Base: feb80000, Size: 80000, Tag: 200
1654 11:55:02.658523 * Base: fed00000, Size: 40000, Tag: 200
1655 11:55:02.661814 * Base: fed70000, Size: 10000, Tag: 200
1656 11:55:02.665260 * Base: fed88000, Size: 8000, Tag: 200
1657 11:55:02.668470 * Base: fed93000, Size: d000, Tag: 200
1658 11:55:02.672514 * Base: feda2000, Size: 1e000, Tag: 200
1659 11:55:02.678593 * Base: fede0000, Size: 1220000, Tag: 200
1660 11:55:02.681885 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1661 11:55:02.688404 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1662 11:55:02.695028 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1663 11:55:02.702016 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1664 11:55:02.708697 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1665 11:55:02.715340 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1666 11:55:02.721775 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1667 11:55:02.728504 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1668 11:55:02.734670 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1669 11:55:02.741747 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1670 11:55:02.749016 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1671 11:55:02.755179 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1672 11:55:02.761692 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1673 11:55:02.768425 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1674 11:55:02.774924 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1675 11:55:02.781623 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1676 11:55:02.788251 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1677 11:55:02.794661 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1678 11:55:02.801441 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1679 11:55:02.808349 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1680 11:55:02.817959 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1681 11:55:02.824669 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1682 11:55:02.828192 PCI: 00:06.0: Resource ranges:
1683 11:55:02.831306 * Base: 80400000, Size: 100000, Tag: 200
1684 11:55:02.837673 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1685 11:55:02.844479 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1686 11:55:02.854792 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1687 11:55:02.861290 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1688 11:55:02.864406 Root Device assign_resources, bus 0 link: 0
1689 11:55:02.871223 DOMAIN: 0000 assign_resources, bus 0 link: 0
1690 11:55:02.877658 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1691 11:55:02.887630 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1692 11:55:02.894256 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1693 11:55:02.900710 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1694 11:55:02.907863 PCI: 00:04.0 assign_resources, bus 1 link: 0
1695 11:55:02.911238 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1696 11:55:02.920972 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1697 11:55:02.931369 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1698 11:55:02.937360 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1699 11:55:02.943942 PCI: 00:06.0 assign_resources, bus 1 link: 0
1700 11:55:02.950885 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1701 11:55:02.957292 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1702 11:55:02.964242 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1703 11:55:02.970502 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1704 11:55:02.980557 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1705 11:55:02.984055 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1706 11:55:02.990234 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1707 11:55:02.997040 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1708 11:55:03.000701 PCI: 00:14.0 assign_resources, bus 0 link: 0
1709 11:55:03.007507 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1710 11:55:03.014025 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1711 11:55:03.023686 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1712 11:55:03.030007 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1713 11:55:03.033192 PCI: 00:14.3 assign_resources, bus 0 link: 0
1714 11:55:03.040259 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1715 11:55:03.047033 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1716 11:55:03.053525 PCI: 00:15.0 assign_resources, bus 0 link: 0
1717 11:55:03.057008 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1718 11:55:03.067196 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1719 11:55:03.070013 PCI: 00:15.1 assign_resources, bus 0 link: 0
1720 11:55:03.076708 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1721 11:55:03.083280 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1722 11:55:03.086985 PCI: 00:15.3 assign_resources, bus 0 link: 0
1723 11:55:03.093229 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1724 11:55:03.099649 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1725 11:55:03.109911 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1726 11:55:03.113258 PCI: 00:19.1 assign_resources, bus 0 link: 0
1727 11:55:03.116716 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1728 11:55:03.126400 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1729 11:55:03.129764 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1730 11:55:03.136316 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1731 11:55:03.139790 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1732 11:55:03.146167 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1733 11:55:03.149990 LPC: Trying to open IO window from 800 size 1ff
1734 11:55:03.156610 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1735 11:55:03.166452 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1736 11:55:03.173173 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1737 11:55:03.180028 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1738 11:55:03.183153 Root Device assign_resources, bus 0 link: 0 done
1739 11:55:03.186277 Done setting resources.
1740 11:55:03.193582 Show resources in subtree (Root Device)...After assigning values.
1741 11:55:03.196398 Root Device child on link 0 CPU_CLUSTER: 0
1742 11:55:03.199732 CPU_CLUSTER: 0 child on link 0 APIC: 00
1743 11:55:03.202750 APIC: 00
1744 11:55:03.203218 APIC: 14
1745 11:55:03.206163 APIC: 16
1746 11:55:03.206576 APIC: 10
1747 11:55:03.206906 APIC: 12
1748 11:55:03.209602 APIC: 01
1749 11:55:03.210019 APIC: 08
1750 11:55:03.210350 APIC: 09
1751 11:55:03.216556 DOMAIN: 0000 child on link 0 GPIO: 0
1752 11:55:03.223130 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1753 11:55:03.233146 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1754 11:55:03.236150 GPIO: 0
1755 11:55:03.236670 PCI: 00:00.0
1756 11:55:03.246151 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1757 11:55:03.256236 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1758 11:55:03.266040 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1759 11:55:03.275703 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1760 11:55:03.282701 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1761 11:55:03.292790 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1762 11:55:03.302448 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1763 11:55:03.312348 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1764 11:55:03.322617 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1765 11:55:03.332247 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1766 11:55:03.342039 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1767 11:55:03.349426 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1768 11:55:03.358704 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1769 11:55:03.368682 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1770 11:55:03.379107 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1771 11:55:03.389191 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1772 11:55:03.396110 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1773 11:55:03.405801 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1774 11:55:03.415978 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1775 11:55:03.425748 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1776 11:55:03.435471 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1777 11:55:03.445288 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1778 11:55:03.455515 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1779 11:55:03.465270 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1780 11:55:03.475427 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1781 11:55:03.481933 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1782 11:55:03.492421 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1783 11:55:03.502358 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1784 11:55:03.505521 PCI: 00:02.0
1785 11:55:03.515305 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1786 11:55:03.525274 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1787 11:55:03.535296 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1788 11:55:03.538754 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1789 11:55:03.548128 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1790 11:55:03.551331 GENERIC: 0.0
1791 11:55:03.555343 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1792 11:55:03.564896 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1793 11:55:03.578174 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1794 11:55:03.588573 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1795 11:55:03.589137 PCI: 01:00.0
1796 11:55:03.597951 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1797 11:55:03.611423 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1798 11:55:03.611950 PCI: 00:08.0
1799 11:55:03.614661 PCI: 00:0a.0
1800 11:55:03.625155 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1801 11:55:03.627815 PCI: 00:0d.0 child on link 0 USB0 port 0
1802 11:55:03.637871 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1803 11:55:03.641465 USB0 port 0 child on link 0 USB3 port 0
1804 11:55:03.644802 USB3 port 0
1805 11:55:03.648505 USB3 port 1
1806 11:55:03.649021 USB3 port 2
1807 11:55:03.651427 USB3 port 3
1808 11:55:03.654289 PCI: 00:14.0 child on link 0 USB0 port 0
1809 11:55:03.664685 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1810 11:55:03.667910 USB0 port 0 child on link 0 USB2 port 0
1811 11:55:03.671299 USB2 port 0
1812 11:55:03.671823 USB2 port 1
1813 11:55:03.674709 USB2 port 2
1814 11:55:03.675230 USB2 port 3
1815 11:55:03.677902 USB2 port 4
1816 11:55:03.681297 USB2 port 5
1817 11:55:03.681817 USB2 port 6
1818 11:55:03.684789 USB2 port 7
1819 11:55:03.685347 USB2 port 8
1820 11:55:03.688323 USB2 port 9
1821 11:55:03.688841 USB3 port 0
1822 11:55:03.691560 USB3 port 1
1823 11:55:03.692083 USB3 port 2
1824 11:55:03.694718 USB3 port 3
1825 11:55:03.695244 PCI: 00:14.2
1826 11:55:03.704321 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1827 11:55:03.717545 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1828 11:55:03.720725 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1829 11:55:03.730855 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1830 11:55:03.733864 GENERIC: 0.0
1831 11:55:03.737200 PCI: 00:15.0 child on link 0 I2C: 00:1a
1832 11:55:03.747191 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1833 11:55:03.747367 I2C: 00:1a
1834 11:55:03.750522 I2C: 00:31
1835 11:55:03.750686 I2C: 00:32
1836 11:55:03.757300 PCI: 00:15.1 child on link 0 I2C: 00:50
1837 11:55:03.767062 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1838 11:55:03.767247 I2C: 00:50
1839 11:55:03.770653 PCI: 00:15.2
1840 11:55:03.774138 PCI: 00:15.3 child on link 0 I2C: 00:10
1841 11:55:03.784001 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1842 11:55:03.787178 I2C: 00:10
1843 11:55:03.787434 PCI: 00:16.0
1844 11:55:03.797457 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1845 11:55:03.800727 PCI: 00:19.0
1846 11:55:03.804135 PCI: 00:19.1 child on link 0 I2C: 00:15
1847 11:55:03.814365 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1848 11:55:03.817245 I2C: 00:15
1849 11:55:03.817768 I2C: 00:2c
1850 11:55:03.820948 PCI: 00:1e.0
1851 11:55:03.830595 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1852 11:55:03.834521 PCI: 00:1e.3 child on link 0 SPI: 00
1853 11:55:03.843898 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1854 11:55:03.847390 SPI: 00
1855 11:55:03.850587 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1856 11:55:03.861194 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1857 11:55:03.861719 PNP: 0c09.0
1858 11:55:03.870743 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1859 11:55:03.873910 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1860 11:55:03.883802 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1861 11:55:03.893385 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1862 11:55:03.896978 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1863 11:55:03.900366 GENERIC: 0.0
1864 11:55:03.900887 GENERIC: 1.0
1865 11:55:03.903810 PCI: 00:1f.3
1866 11:55:03.913733 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1867 11:55:03.923656 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1868 11:55:03.924183 PCI: 00:1f.5
1869 11:55:03.936799 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1870 11:55:03.937592 Done allocating resources.
1871 11:55:03.943497 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1872 11:55:03.950399 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1873 11:55:03.953954 Configure audio over I2S with MAX98373 NAU88L25B.
1874 11:55:03.959328 Enabling BT offload
1875 11:55:03.966724 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1876 11:55:03.969617 Enabling resources...
1877 11:55:03.973128 PCI: 00:00.0 subsystem <- 8086/4609
1878 11:55:03.976592 PCI: 00:00.0 cmd <- 06
1879 11:55:03.979844 PCI: 00:02.0 subsystem <- 8086/46b3
1880 11:55:03.983478 PCI: 00:02.0 cmd <- 03
1881 11:55:03.986392 PCI: 00:04.0 subsystem <- 8086/461d
1882 11:55:03.986915 PCI: 00:04.0 cmd <- 02
1883 11:55:03.990108 PCI: 00:06.0 bridge ctrl <- 0013
1884 11:55:03.993361 PCI: 00:06.0 subsystem <- 8086/464d
1885 11:55:03.996778 PCI: 00:06.0 cmd <- 106
1886 11:55:03.999776 PCI: 00:0a.0 subsystem <- 8086/467d
1887 11:55:04.002858 PCI: 00:0a.0 cmd <- 02
1888 11:55:04.006558 PCI: 00:0d.0 subsystem <- 8086/461e
1889 11:55:04.009820 PCI: 00:0d.0 cmd <- 02
1890 11:55:04.012891 PCI: 00:14.0 subsystem <- 8086/51ed
1891 11:55:04.016495 PCI: 00:14.0 cmd <- 02
1892 11:55:04.020055 PCI: 00:14.2 subsystem <- 8086/51ef
1893 11:55:04.020578 PCI: 00:14.2 cmd <- 02
1894 11:55:04.023272 PCI: 00:14.3 subsystem <- 8086/51f0
1895 11:55:04.026461 PCI: 00:14.3 cmd <- 02
1896 11:55:04.030038 PCI: 00:15.0 subsystem <- 8086/51e8
1897 11:55:04.033133 PCI: 00:15.0 cmd <- 02
1898 11:55:04.036534 PCI: 00:15.1 subsystem <- 8086/51e9
1899 11:55:04.039884 PCI: 00:15.1 cmd <- 06
1900 11:55:04.042941 PCI: 00:15.3 subsystem <- 8086/51eb
1901 11:55:04.046422 PCI: 00:15.3 cmd <- 02
1902 11:55:04.049561 PCI: 00:16.0 subsystem <- 8086/51e0
1903 11:55:04.049985 PCI: 00:16.0 cmd <- 02
1904 11:55:04.053272 PCI: 00:19.1 subsystem <- 8086/51c6
1905 11:55:04.056555 PCI: 00:19.1 cmd <- 02
1906 11:55:04.059941 PCI: 00:1e.0 subsystem <- 8086/51a8
1907 11:55:04.063183 PCI: 00:1e.0 cmd <- 06
1908 11:55:04.066469 PCI: 00:1e.3 subsystem <- 8086/51ab
1909 11:55:04.069775 PCI: 00:1e.3 cmd <- 02
1910 11:55:04.072950 PCI: 00:1f.0 subsystem <- 8086/5182
1911 11:55:04.076530 PCI: 00:1f.0 cmd <- 407
1912 11:55:04.079668 PCI: 00:1f.3 subsystem <- 8086/51c8
1913 11:55:04.080193 PCI: 00:1f.3 cmd <- 02
1914 11:55:04.083054 PCI: 00:1f.5 subsystem <- 8086/51a4
1915 11:55:04.086402 PCI: 00:1f.5 cmd <- 406
1916 11:55:04.089865 PCI: 01:00.0 cmd <- 02
1917 11:55:04.090387 done.
1918 11:55:04.096452 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1919 11:55:04.099756 ME: Version: Unavailable
1920 11:55:04.103221 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1921 11:55:04.106535 Initializing devices...
1922 11:55:04.109583 Root Device init
1923 11:55:04.110104 mainboard: EC init
1924 11:55:04.113031 Chrome EC: Set SMI mask to 0x0000000000000000
1925 11:55:04.116807 Chrome EC: UHEPI supported
1926 11:55:04.123439 Chrome EC: clear events_b mask to 0x0000000000000000
1927 11:55:04.130525 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1928 11:55:04.136874 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1929 11:55:04.140381 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1930 11:55:04.146775 Chrome EC: Set WAKE mask to 0x0000000000000000
1931 11:55:04.149929 Root Device init finished in 38 msecs
1932 11:55:04.153300 PCI: 00:00.0 init
1933 11:55:04.157007 CPU TDP = 15 Watts
1934 11:55:04.157604 CPU PL1 = 15 Watts
1935 11:55:04.160261 CPU PL2 = 55 Watts
1936 11:55:04.160678 CPU PL4 = 123 Watts
1937 11:55:04.167382 PCI: 00:00.0 init finished in 8 msecs
1938 11:55:04.167911 PCI: 00:02.0 init
1939 11:55:04.170638 GMA: Found VBT in CBFS
1940 11:55:04.173702 GMA: Found valid VBT in CBFS
1941 11:55:04.176959 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1942 11:55:04.186813 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1943 11:55:04.190172 PCI: 00:02.0 init finished in 18 msecs
1944 11:55:04.190698 PCI: 00:06.0 init
1945 11:55:04.193814 Initializing PCH PCIe bridge.
1946 11:55:04.200300 PCI: 00:06.0 init finished in 3 msecs
1947 11:55:04.200826 PCI: 00:0a.0 init
1948 11:55:04.203539 PCI: 00:0a.0 init finished in 0 msecs
1949 11:55:04.206830 PCI: 00:14.0 init
1950 11:55:04.210448 PCI: 00:14.0 init finished in 0 msecs
1951 11:55:04.210973 PCI: 00:14.2 init
1952 11:55:04.217073 PCI: 00:14.2 init finished in 0 msecs
1953 11:55:04.217639 PCI: 00:15.0 init
1954 11:55:04.220146 I2C bus 0 version 0x3230302a
1955 11:55:04.223824 DW I2C bus 0 at 0x80655000 (400 KHz)
1956 11:55:04.227209 PCI: 00:15.0 init finished in 6 msecs
1957 11:55:04.230101 PCI: 00:15.1 init
1958 11:55:04.233827 I2C bus 1 version 0x3230302a
1959 11:55:04.236528 DW I2C bus 1 at 0x80656000 (400 KHz)
1960 11:55:04.240347 PCI: 00:15.1 init finished in 6 msecs
1961 11:55:04.243566 PCI: 00:15.3 init
1962 11:55:04.244088 I2C bus 3 version 0x3230302a
1963 11:55:04.250358 DW I2C bus 3 at 0x80657000 (400 KHz)
1964 11:55:04.253530 PCI: 00:15.3 init finished in 6 msecs
1965 11:55:04.254055 PCI: 00:16.0 init
1966 11:55:04.256714 PCI: 00:16.0 init finished in 0 msecs
1967 11:55:04.259811 PCI: 00:19.1 init
1968 11:55:04.263097 I2C bus 5 version 0x3230302a
1969 11:55:04.266629 DW I2C bus 5 at 0x80659000 (400 KHz)
1970 11:55:04.270102 PCI: 00:19.1 init finished in 6 msecs
1971 11:55:04.273540 PCI: 00:1f.0 init
1972 11:55:04.276995 IOAPIC: Initializing IOAPIC at 0xfec00000
1973 11:55:04.280179 IOAPIC: ID = 0x02
1974 11:55:04.280707 IOAPIC: Dumping registers
1975 11:55:04.283505 reg 0x0000: 0x02000000
1976 11:55:04.286895 reg 0x0001: 0x00770020
1977 11:55:04.290015 reg 0x0002: 0x00000000
1978 11:55:04.290543 IOAPIC: 120 interrupts
1979 11:55:04.296875 IOAPIC: Clearing IOAPIC at 0xfec00000
1980 11:55:04.300213 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1981 11:55:04.303702 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1982 11:55:04.310034 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1983 11:55:04.313334 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1984 11:55:04.319953 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1985 11:55:04.323737 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1986 11:55:04.330120 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1987 11:55:04.333544 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1988 11:55:04.336681 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1989 11:55:04.343038 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1990 11:55:04.346695 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1991 11:55:04.353210 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1992 11:55:04.356315 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1993 11:55:04.363304 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1994 11:55:04.366603 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1995 11:55:04.373292 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1996 11:55:04.376532 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1997 11:55:04.379946 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1998 11:55:04.386553 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1999 11:55:04.390089 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2000 11:55:04.396673 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2001 11:55:04.399953 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2002 11:55:04.406098 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2003 11:55:04.410097 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2004 11:55:04.416398 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2005 11:55:04.419974 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2006 11:55:04.423119 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2007 11:55:04.429790 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2008 11:55:04.433129 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2009 11:55:04.439675 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2010 11:55:04.442928 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2011 11:55:04.449395 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2012 11:55:04.452829 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2013 11:55:04.459380 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2014 11:55:04.462745 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2015 11:55:04.465979 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2016 11:55:04.472903 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2017 11:55:04.476634 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2018 11:55:04.482750 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2019 11:55:04.486027 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2020 11:55:04.492747 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2021 11:55:04.496075 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2022 11:55:04.499361 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2023 11:55:04.506188 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2024 11:55:04.509483 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2025 11:55:04.515970 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2026 11:55:04.519411 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2027 11:55:04.526052 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2028 11:55:04.529175 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2029 11:55:04.535985 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2030 11:55:04.539285 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2031 11:55:04.542582 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2032 11:55:04.549516 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2033 11:55:04.552603 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2034 11:55:04.558798 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2035 11:55:04.562905 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2036 11:55:04.569064 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2037 11:55:04.572321 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2038 11:55:04.579203 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2039 11:55:04.582699 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2040 11:55:04.585929 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2041 11:55:04.592530 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2042 11:55:04.596037 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2043 11:55:04.602331 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2044 11:55:04.605584 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2045 11:55:04.612648 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2046 11:55:04.615880 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2047 11:55:04.622732 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2048 11:55:04.625843 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2049 11:55:04.629026 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2050 11:55:04.635885 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2051 11:55:04.639125 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2052 11:55:04.645735 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2053 11:55:04.649092 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2054 11:55:04.655811 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2055 11:55:04.658656 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2056 11:55:04.662310 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2057 11:55:04.668790 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2058 11:55:04.672183 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2059 11:55:04.678986 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2060 11:55:04.682005 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2061 11:55:04.688850 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2062 11:55:04.692011 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2063 11:55:04.698438 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2064 11:55:04.701812 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2065 11:55:04.705247 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2066 11:55:04.711804 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2067 11:55:04.715228 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2068 11:55:04.722264 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2069 11:55:04.725378 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2070 11:55:04.731992 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2071 11:55:04.735187 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2072 11:55:04.741465 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2073 11:55:04.745410 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2074 11:55:04.748404 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2075 11:55:04.755339 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2076 11:55:04.758008 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2077 11:55:04.765215 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2078 11:55:04.768578 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2079 11:55:04.775405 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2080 11:55:04.778150 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2081 11:55:04.784875 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2082 11:55:04.788550 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2083 11:55:04.795095 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2084 11:55:04.798071 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2085 11:55:04.801658 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2086 11:55:04.808277 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2087 11:55:04.811480 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2088 11:55:04.818147 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2089 11:55:04.821936 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2090 11:55:04.828114 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2091 11:55:04.831413 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2092 11:55:04.838026 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2093 11:55:04.841008 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2094 11:55:04.844677 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2095 11:55:04.850810 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2096 11:55:04.854375 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2097 11:55:04.861293 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2098 11:55:04.864650 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2099 11:55:04.871362 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2100 11:55:04.874624 IOAPIC: Bootstrap Processor Local APIC = 0x00
2101 11:55:04.877784 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2102 11:55:04.884668 PCI: 00:1f.0 init finished in 607 msecs
2103 11:55:04.885228 PCI: 00:1f.2 init
2104 11:55:04.887528 apm_control: Disabling ACPI.
2105 11:55:04.892216 APMC done.
2106 11:55:04.895620 PCI: 00:1f.2 init finished in 6 msecs
2107 11:55:04.899414 PCI: 00:1f.3 init
2108 11:55:04.901934 PCI: 00:1f.3 init finished in 0 msecs
2109 11:55:04.902351 PCI: 01:00.0 init
2110 11:55:04.905535 PCI: 01:00.0 init finished in 0 msecs
2111 11:55:04.909049 PNP: 0c09.0 init
2112 11:55:04.912572 Google Chrome EC uptime: 12.144 seconds
2113 11:55:04.919274 Google Chrome AP resets since EC boot: 1
2114 11:55:04.922106 Google Chrome most recent AP reset causes:
2115 11:55:04.925540 0.341: 32775 shutdown: entering G3
2116 11:55:04.932186 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2117 11:55:04.935417 PNP: 0c09.0 init finished in 23 msecs
2118 11:55:04.939020 GENERIC: 0.0 init
2119 11:55:04.942084 GENERIC: 0.0 init finished in 0 msecs
2120 11:55:04.942617 GENERIC: 1.0 init
2121 11:55:04.948804 GENERIC: 1.0 init finished in 0 msecs
2122 11:55:04.949364 Devices initialized
2123 11:55:04.951638 Show all devs... After init.
2124 11:55:04.955372 Root Device: enabled 1
2125 11:55:04.958625 CPU_CLUSTER: 0: enabled 1
2126 11:55:04.959138 DOMAIN: 0000: enabled 1
2127 11:55:04.961653 GPIO: 0: enabled 1
2128 11:55:04.965273 PCI: 00:00.0: enabled 1
2129 11:55:04.965919 PCI: 00:01.0: enabled 0
2130 11:55:04.968729 PCI: 00:01.1: enabled 0
2131 11:55:04.972303 PCI: 00:02.0: enabled 1
2132 11:55:04.975512 PCI: 00:04.0: enabled 1
2133 11:55:04.976025 PCI: 00:05.0: enabled 0
2134 11:55:04.978576 PCI: 00:06.0: enabled 1
2135 11:55:04.982059 PCI: 00:06.2: enabled 0
2136 11:55:04.982574 PCI: 00:07.0: enabled 0
2137 11:55:04.985069 PCI: 00:07.1: enabled 0
2138 11:55:04.988918 PCI: 00:07.2: enabled 0
2139 11:55:04.991674 PCI: 00:07.3: enabled 0
2140 11:55:04.992184 PCI: 00:08.0: enabled 0
2141 11:55:04.994886 PCI: 00:09.0: enabled 0
2142 11:55:04.998400 PCI: 00:0a.0: enabled 1
2143 11:55:05.001943 PCI: 00:0d.0: enabled 1
2144 11:55:05.002458 PCI: 00:0d.1: enabled 0
2145 11:55:05.005230 PCI: 00:0d.2: enabled 0
2146 11:55:05.008744 PCI: 00:0d.3: enabled 0
2147 11:55:05.012367 PCI: 00:0e.0: enabled 0
2148 11:55:05.012880 PCI: 00:10.0: enabled 0
2149 11:55:05.015211 PCI: 00:10.1: enabled 0
2150 11:55:05.019123 PCI: 00:10.6: enabled 0
2151 11:55:05.019634 PCI: 00:10.7: enabled 0
2152 11:55:05.021912 PCI: 00:12.0: enabled 0
2153 11:55:05.025318 PCI: 00:12.6: enabled 0
2154 11:55:05.028579 PCI: 00:12.7: enabled 0
2155 11:55:05.029089 PCI: 00:13.0: enabled 0
2156 11:55:05.031920 PCI: 00:14.0: enabled 1
2157 11:55:05.035367 PCI: 00:14.1: enabled 0
2158 11:55:05.038486 PCI: 00:14.2: enabled 1
2159 11:55:05.039000 PCI: 00:14.3: enabled 1
2160 11:55:05.041693 PCI: 00:15.0: enabled 1
2161 11:55:05.045213 PCI: 00:15.1: enabled 1
2162 11:55:05.048426 PCI: 00:15.2: enabled 0
2163 11:55:05.048938 PCI: 00:15.3: enabled 1
2164 11:55:05.051595 PCI: 00:16.0: enabled 1
2165 11:55:05.054927 PCI: 00:16.1: enabled 0
2166 11:55:05.058448 PCI: 00:16.2: enabled 0
2167 11:55:05.058961 PCI: 00:16.3: enabled 0
2168 11:55:05.061510 PCI: 00:16.4: enabled 0
2169 11:55:05.065270 PCI: 00:16.5: enabled 0
2170 11:55:05.065807 PCI: 00:17.0: enabled 0
2171 11:55:05.067990 PCI: 00:19.0: enabled 0
2172 11:55:05.071691 PCI: 00:19.1: enabled 1
2173 11:55:05.075295 PCI: 00:19.2: enabled 0
2174 11:55:05.075806 PCI: 00:1a.0: enabled 0
2175 11:55:05.078085 PCI: 00:1c.0: enabled 0
2176 11:55:05.081949 PCI: 00:1c.1: enabled 0
2177 11:55:05.084774 PCI: 00:1c.2: enabled 0
2178 11:55:05.085228 PCI: 00:1c.3: enabled 0
2179 11:55:05.087943 PCI: 00:1c.4: enabled 0
2180 11:55:05.091491 PCI: 00:1c.5: enabled 0
2181 11:55:05.094594 PCI: 00:1c.6: enabled 0
2182 11:55:05.095102 PCI: 00:1c.7: enabled 0
2183 11:55:05.098311 PCI: 00:1d.0: enabled 0
2184 11:55:05.101474 PCI: 00:1d.1: enabled 0
2185 11:55:05.102019 PCI: 00:1d.2: enabled 0
2186 11:55:05.104802 PCI: 00:1d.3: enabled 0
2187 11:55:05.108243 PCI: 00:1e.0: enabled 1
2188 11:55:05.111263 PCI: 00:1e.1: enabled 0
2189 11:55:05.111776 PCI: 00:1e.2: enabled 0
2190 11:55:05.114866 PCI: 00:1e.3: enabled 1
2191 11:55:05.118087 PCI: 00:1f.0: enabled 1
2192 11:55:05.121739 PCI: 00:1f.1: enabled 0
2193 11:55:05.122252 PCI: 00:1f.2: enabled 1
2194 11:55:05.124556 PCI: 00:1f.3: enabled 1
2195 11:55:05.128231 PCI: 00:1f.4: enabled 0
2196 11:55:05.131436 PCI: 00:1f.5: enabled 1
2197 11:55:05.131949 PCI: 00:1f.6: enabled 0
2198 11:55:05.134929 PCI: 00:1f.7: enabled 0
2199 11:55:05.138450 GENERIC: 0.0: enabled 1
2200 11:55:05.141243 GENERIC: 0.0: enabled 1
2201 11:55:05.141754 GENERIC: 1.0: enabled 1
2202 11:55:05.144502 GENERIC: 0.0: enabled 1
2203 11:55:05.147762 GENERIC: 1.0: enabled 1
2204 11:55:05.148173 USB0 port 0: enabled 1
2205 11:55:05.151385 USB0 port 0: enabled 1
2206 11:55:05.154715 GENERIC: 0.0: enabled 1
2207 11:55:05.157970 I2C: 00:1a: enabled 1
2208 11:55:05.158384 I2C: 00:31: enabled 1
2209 11:55:05.161167 I2C: 00:32: enabled 1
2210 11:55:05.164602 I2C: 00:50: enabled 1
2211 11:55:05.165158 I2C: 00:10: enabled 1
2212 11:55:05.167746 I2C: 00:15: enabled 1
2213 11:55:05.171523 I2C: 00:2c: enabled 1
2214 11:55:05.172039 GENERIC: 0.0: enabled 1
2215 11:55:05.174639 SPI: 00: enabled 1
2216 11:55:05.178108 PNP: 0c09.0: enabled 1
2217 11:55:05.178619 GENERIC: 0.0: enabled 1
2218 11:55:05.181459 USB3 port 0: enabled 1
2219 11:55:05.184785 USB3 port 1: enabled 0
2220 11:55:05.185337 USB3 port 2: enabled 1
2221 11:55:05.187934 USB3 port 3: enabled 0
2222 11:55:05.191296 USB2 port 0: enabled 1
2223 11:55:05.194522 USB2 port 1: enabled 0
2224 11:55:05.195035 USB2 port 2: enabled 1
2225 11:55:05.198061 USB2 port 3: enabled 0
2226 11:55:05.201192 USB2 port 4: enabled 0
2227 11:55:05.201701 USB2 port 5: enabled 1
2228 11:55:05.204281 USB2 port 6: enabled 0
2229 11:55:05.207825 USB2 port 7: enabled 0
2230 11:55:05.210991 USB2 port 8: enabled 1
2231 11:55:05.211402 USB2 port 9: enabled 1
2232 11:55:05.214800 USB3 port 0: enabled 1
2233 11:55:05.217619 USB3 port 1: enabled 0
2234 11:55:05.218132 USB3 port 2: enabled 0
2235 11:55:05.221173 USB3 port 3: enabled 0
2236 11:55:05.224534 GENERIC: 0.0: enabled 1
2237 11:55:05.228067 GENERIC: 1.0: enabled 1
2238 11:55:05.228584 APIC: 00: enabled 1
2239 11:55:05.231296 APIC: 14: enabled 1
2240 11:55:05.231817 APIC: 16: enabled 1
2241 11:55:05.234150 APIC: 10: enabled 1
2242 11:55:05.237565 APIC: 12: enabled 1
2243 11:55:05.237974 APIC: 01: enabled 1
2244 11:55:05.241006 APIC: 08: enabled 1
2245 11:55:05.241452 APIC: 09: enabled 1
2246 11:55:05.244607 PCI: 01:00.0: enabled 1
2247 11:55:05.251175 BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms
2248 11:55:05.254156 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2249 11:55:05.257586 ELOG: NV offset 0xf20000 size 0x4000
2250 11:55:05.265696 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2251 11:55:05.272919 ELOG: Event(17) added with size 13 at 2023-08-22 11:55:20 UTC
2252 11:55:05.279307 ELOG: Event(9E) added with size 10 at 2023-08-22 11:55:20 UTC
2253 11:55:05.286033 ELOG: Event(9F) added with size 14 at 2023-08-22 11:55:20 UTC
2254 11:55:05.293226 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2255 11:55:05.299457 ELOG: Event(A0) added with size 9 at 2023-08-22 11:55:20 UTC
2256 11:55:05.302294 elog_add_boot_reason: Logged dev mode boot
2257 11:55:05.309065 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2258 11:55:05.312248 Finalize devices...
2259 11:55:05.312662 PCI: 00:16.0 final
2260 11:55:05.315992 PCI: 00:1f.2 final
2261 11:55:05.316401 GENERIC: 0.0 final
2262 11:55:05.322448 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2263 11:55:05.325603 GENERIC: 1.0 final
2264 11:55:05.332505 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2265 11:55:05.333042 Devices finalized
2266 11:55:05.338837 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2267 11:55:05.342482 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2268 11:55:05.349188 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2269 11:55:05.352706 ME: HFSTS1 : 0x90000245
2270 11:55:05.359181 ME: HFSTS2 : 0x82100116
2271 11:55:05.362496 ME: HFSTS3 : 0x00000050
2272 11:55:05.368830 ME: HFSTS4 : 0x00004000
2273 11:55:05.372496 ME: HFSTS5 : 0x00000000
2274 11:55:05.375762 ME: HFSTS6 : 0x40600006
2275 11:55:05.379086 ME: Manufacturing Mode : NO
2276 11:55:05.385720 ME: SPI Protection Mode Enabled : YES
2277 11:55:05.389303 ME: FPFs Committed : YES
2278 11:55:05.392526 ME: Manufacturing Vars Locked : YES
2279 11:55:05.395660 ME: FW Partition Table : OK
2280 11:55:05.398958 ME: Bringup Loader Failure : NO
2281 11:55:05.402436 ME: Firmware Init Complete : YES
2282 11:55:05.406068 ME: Boot Options Present : NO
2283 11:55:05.409146 ME: Update In Progress : NO
2284 11:55:05.415514 ME: D0i3 Support : YES
2285 11:55:05.419477 ME: Low Power State Enabled : NO
2286 11:55:05.421885 ME: CPU Replaced : YES
2287 11:55:05.425439 ME: CPU Replacement Valid : YES
2288 11:55:05.429021 ME: Current Working State : 5
2289 11:55:05.432388 ME: Current Operation State : 1
2290 11:55:05.435151 ME: Current Operation Mode : 0
2291 11:55:05.438882 ME: Error Code : 0
2292 11:55:05.441882 ME: Enhanced Debug Mode : NO
2293 11:55:05.448889 ME: CPU Debug Disabled : YES
2294 11:55:05.452077 ME: TXT Support : NO
2295 11:55:05.455231 ME: WP for RO is enabled : YES
2296 11:55:05.462066 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2297 11:55:05.468304 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2298 11:55:05.472187 Ramoops buffer: 0x100000@0x76899000.
2299 11:55:05.475166 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2300 11:55:05.485162 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2301 11:55:05.488984 CBFS: 'fallback/slic' not found.
2302 11:55:05.492200 ACPI: Writing ACPI tables at 7686d000.
2303 11:55:05.492714 ACPI: * FACS
2304 11:55:05.495335 ACPI: * DSDT
2305 11:55:05.502038 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2306 11:55:05.505550 ACPI: * FADT
2307 11:55:05.506061 SCI is IRQ9
2308 11:55:05.508723 ACPI: added table 1/32, length now 40
2309 11:55:05.512035 ACPI: * SSDT
2310 11:55:05.518855 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2311 11:55:05.522128 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2312 11:55:05.528506 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2313 11:55:05.531754 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2314 11:55:05.538392 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2315 11:55:05.541608 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2316 11:55:05.548630 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2317 11:55:05.555180 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2318 11:55:05.558501 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2319 11:55:05.565159 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2320 11:55:05.567940 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2321 11:55:05.575113 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2322 11:55:05.578124 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2323 11:55:05.581793 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2324 11:55:05.591501 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2325 11:55:05.594312 PS2K: Passing 80 keymaps to kernel
2326 11:55:05.601414 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2327 11:55:05.607891 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2328 11:55:05.614487 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2329 11:55:05.621252 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2330 11:55:05.628073 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2331 11:55:05.634527 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2332 11:55:05.637934 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2333 11:55:05.644096 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2334 11:55:05.651241 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2335 11:55:05.657604 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2336 11:55:05.661496 ACPI: added table 2/32, length now 44
2337 11:55:05.664280 ACPI: * MCFG
2338 11:55:05.667453 ACPI: added table 3/32, length now 48
2339 11:55:05.668033 ACPI: * TPM2
2340 11:55:05.670514 TPM2 log created at 0x7685d000
2341 11:55:05.673892 ACPI: added table 4/32, length now 52
2342 11:55:05.677157 ACPI: * LPIT
2343 11:55:05.680923 ACPI: added table 5/32, length now 56
2344 11:55:05.684349 ACPI: * MADT
2345 11:55:05.684910 SCI is IRQ9
2346 11:55:05.687716 ACPI: added table 6/32, length now 60
2347 11:55:05.690979 cmd_reg from pmc_make_ipc_cmd 1052838
2348 11:55:05.697317 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2349 11:55:05.704166 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2350 11:55:05.711182 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2351 11:55:05.713729 PMC CrashLog size in discovery mode: 0xC00
2352 11:55:05.717566 cpu crashlog bar addr: 0x80640000
2353 11:55:05.720724 cpu discovery table offset: 0x6030
2354 11:55:05.727341 cpu_crashlog_discovery_table buffer count: 0x3
2355 11:55:05.734451 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2356 11:55:05.740839 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2357 11:55:05.747227 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2358 11:55:05.750357 PMC crashLog size in discovery mode : 0xC00
2359 11:55:05.756879 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2360 11:55:05.763790 discover mode PMC crashlog size adjusted to: 0x200
2361 11:55:05.770658 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2362 11:55:05.773574 discover mode PMC crashlog size adjusted to: 0x0
2363 11:55:05.777523 m_cpu_crashLog_size : 0x3480 bytes
2364 11:55:05.780225 CPU crashLog present.
2365 11:55:05.783950 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2366 11:55:05.790283 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2367 11:55:05.793925 current = 76876550
2368 11:55:05.796983 ACPI: * DMAR
2369 11:55:05.800382 ACPI: added table 7/32, length now 64
2370 11:55:05.803729 ACPI: added table 8/32, length now 68
2371 11:55:05.804146 ACPI: * HPET
2372 11:55:05.810219 ACPI: added table 9/32, length now 72
2373 11:55:05.810741 ACPI: done.
2374 11:55:05.814096 ACPI tables: 38528 bytes.
2375 11:55:05.817689 smbios_write_tables: 76857000
2376 11:55:05.820857 EC returned error result code 3
2377 11:55:05.824304 Couldn't obtain OEM name from CBI
2378 11:55:05.827387 Create SMBIOS type 16
2379 11:55:05.827940 Create SMBIOS type 17
2380 11:55:05.830989 Create SMBIOS type 20
2381 11:55:05.833972 GENERIC: 0.0 (WIFI Device)
2382 11:55:05.837685 SMBIOS tables: 2156 bytes.
2383 11:55:05.840827 Writing table forward entry at 0x00000500
2384 11:55:05.847520 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2385 11:55:05.850950 Writing coreboot table at 0x76891000
2386 11:55:05.857446 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2387 11:55:05.861060 1. 0000000000001000-000000000009ffff: RAM
2388 11:55:05.863981 2. 00000000000a0000-00000000000fffff: RESERVED
2389 11:55:05.870835 3. 0000000000100000-0000000076856fff: RAM
2390 11:55:05.873654 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2391 11:55:05.880571 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2392 11:55:05.887002 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2393 11:55:05.890449 7. 0000000077000000-00000000803fffff: RESERVED
2394 11:55:05.897513 8. 00000000c0000000-00000000cfffffff: RESERVED
2395 11:55:05.900623 9. 00000000f8000000-00000000f9ffffff: RESERVED
2396 11:55:05.903942 10. 00000000fb000000-00000000fb000fff: RESERVED
2397 11:55:05.910570 11. 00000000fc800000-00000000fe7fffff: RESERVED
2398 11:55:05.913872 12. 00000000feb00000-00000000feb7ffff: RESERVED
2399 11:55:05.920523 13. 00000000fec00000-00000000fecfffff: RESERVED
2400 11:55:05.923491 14. 00000000fed40000-00000000fed6ffff: RESERVED
2401 11:55:05.931013 15. 00000000fed80000-00000000fed87fff: RESERVED
2402 11:55:05.933792 16. 00000000fed90000-00000000fed92fff: RESERVED
2403 11:55:05.937265 17. 00000000feda0000-00000000feda1fff: RESERVED
2404 11:55:05.944086 18. 00000000fedc0000-00000000feddffff: RESERVED
2405 11:55:05.947053 19. 0000000100000000-000000027fbfffff: RAM
2406 11:55:05.950167 Passing 4 GPIOs to payload:
2407 11:55:05.956912 NAME | PORT | POLARITY | VALUE
2408 11:55:05.960367 lid | undefined | high | high
2409 11:55:05.967345 power | undefined | high | low
2410 11:55:05.970666 oprom | undefined | high | low
2411 11:55:05.977032 EC in RW | 0x00000151 | high | high
2412 11:55:05.977495 Board ID: 3
2413 11:55:05.979813 FW config: 0x131
2414 11:55:05.986590 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum b243
2415 11:55:05.990101 coreboot table: 1748 bytes.
2416 11:55:05.993445 IMD ROOT 0. 0x76fff000 0x00001000
2417 11:55:05.997227 IMD SMALL 1. 0x76ffe000 0x00001000
2418 11:55:06.000205 FSP MEMORY 2. 0x76afe000 0x00500000
2419 11:55:06.003780 CONSOLE 3. 0x76ade000 0x00020000
2420 11:55:06.006997 RW MCACHE 4. 0x76add000 0x0000043c
2421 11:55:06.010124 RO MCACHE 5. 0x76adc000 0x00000fd8
2422 11:55:06.016691 FMAP 6. 0x76adb000 0x0000064a
2423 11:55:06.019821 TIME STAMP 7. 0x76ada000 0x00000910
2424 11:55:06.023203 VBOOT WORK 8. 0x76ac6000 0x00014000
2425 11:55:06.026490 MEM INFO 9. 0x76ac5000 0x000003b8
2426 11:55:06.029856 ROMSTG STCK10. 0x76ac4000 0x00001000
2427 11:55:06.033258 AFTER CAR 11. 0x76ab8000 0x0000c000
2428 11:55:06.036472 RAMSTAGE 12. 0x76a2e000 0x0008a000
2429 11:55:06.040468 ACPI BERT 13. 0x76a1e000 0x00010000
2430 11:55:06.046753 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2431 11:55:06.050057 REFCODE 15. 0x769ae000 0x0006f000
2432 11:55:06.053274 SMM BACKUP 16. 0x7699e000 0x00010000
2433 11:55:06.056562 IGD OPREGION17. 0x76999000 0x00004203
2434 11:55:06.060094 RAMOOPS 18. 0x76899000 0x00100000
2435 11:55:06.063075 COREBOOT 19. 0x76891000 0x00008000
2436 11:55:06.066542 ACPI 20. 0x7686d000 0x00024000
2437 11:55:06.069643 TPM2 TCGLOG21. 0x7685d000 0x00010000
2438 11:55:06.076722 PMC CRASHLOG22. 0x7685c000 0x00000c00
2439 11:55:06.079915 CPU CRASHLOG23. 0x76858000 0x00003480
2440 11:55:06.083348 SMBIOS 24. 0x76857000 0x00001000
2441 11:55:06.083866 IMD small region:
2442 11:55:06.090199 IMD ROOT 0. 0x76ffec00 0x00000400
2443 11:55:06.093188 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2444 11:55:06.096571 POWER STATE 2. 0x76ffeb80 0x00000044
2445 11:55:06.100003 ROMSTAGE 3. 0x76ffeb60 0x00000004
2446 11:55:06.103637 ACPI GNVS 4. 0x76ffeb00 0x00000048
2447 11:55:06.106739 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2448 11:55:06.113714 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2449 11:55:06.116847 MTRR: Physical address space:
2450 11:55:06.123187 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2451 11:55:06.130007 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2452 11:55:06.136742 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2453 11:55:06.143124 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2454 11:55:06.149771 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2455 11:55:06.153557 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2456 11:55:06.159436 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2457 11:55:06.166539 MTRR: Fixed MSR 0x250 0x0606060606060606
2458 11:55:06.169319 MTRR: Fixed MSR 0x258 0x0606060606060606
2459 11:55:06.172886 MTRR: Fixed MSR 0x259 0x0000000000000000
2460 11:55:06.176677 MTRR: Fixed MSR 0x268 0x0606060606060606
2461 11:55:06.183183 MTRR: Fixed MSR 0x269 0x0606060606060606
2462 11:55:06.186373 MTRR: Fixed MSR 0x26a 0x0606060606060606
2463 11:55:06.189689 MTRR: Fixed MSR 0x26b 0x0606060606060606
2464 11:55:06.192941 MTRR: Fixed MSR 0x26c 0x0606060606060606
2465 11:55:06.196137 MTRR: Fixed MSR 0x26d 0x0606060606060606
2466 11:55:06.202982 MTRR: Fixed MSR 0x26e 0x0606060606060606
2467 11:55:06.205960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2468 11:55:06.209743 call enable_fixed_mtrr()
2469 11:55:06.212695 CPU physical address size: 39 bits
2470 11:55:06.219428 MTRR: default type WB/UC MTRR counts: 6/6.
2471 11:55:06.223038 MTRR: UC selected as default type.
2472 11:55:06.225995 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2473 11:55:06.232804 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2474 11:55:06.239371 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2475 11:55:06.245933 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2476 11:55:06.252508 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2477 11:55:06.259266 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2478 11:55:06.266126 MTRR: Fixed MSR 0x250 0x0606060606060606
2479 11:55:06.268860 MTRR: Fixed MSR 0x258 0x0606060606060606
2480 11:55:06.272518 MTRR: Fixed MSR 0x259 0x0000000000000000
2481 11:55:06.276034 MTRR: Fixed MSR 0x268 0x0606060606060606
2482 11:55:06.279119 MTRR: Fixed MSR 0x269 0x0606060606060606
2483 11:55:06.285561 MTRR: Fixed MSR 0x26a 0x0606060606060606
2484 11:55:06.289026 MTRR: Fixed MSR 0x26b 0x0606060606060606
2485 11:55:06.292266 MTRR: Fixed MSR 0x26c 0x0606060606060606
2486 11:55:06.295632 MTRR: Fixed MSR 0x26d 0x0606060606060606
2487 11:55:06.302237 MTRR: Fixed MSR 0x26e 0x0606060606060606
2488 11:55:06.305665 MTRR: Fixed MSR 0x26f 0x0606060606060606
2489 11:55:06.308922 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 11:55:06.312439 MTRR: Fixed MSR 0x250 0x0606060606060606
2491 11:55:06.318797 MTRR: Fixed MSR 0x258 0x0606060606060606
2492 11:55:06.322361 MTRR: Fixed MSR 0x259 0x0000000000000000
2493 11:55:06.325397 MTRR: Fixed MSR 0x268 0x0606060606060606
2494 11:55:06.328917 MTRR: Fixed MSR 0x269 0x0606060606060606
2495 11:55:06.335747 MTRR: Fixed MSR 0x26a 0x0606060606060606
2496 11:55:06.338951 MTRR: Fixed MSR 0x26b 0x0606060606060606
2497 11:55:06.342031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2498 11:55:06.345604 MTRR: Fixed MSR 0x26d 0x0606060606060606
2499 11:55:06.352052 MTRR: Fixed MSR 0x26e 0x0606060606060606
2500 11:55:06.355439 MTRR: Fixed MSR 0x26f 0x0606060606060606
2501 11:55:06.358489 call enable_fixed_mtrr()
2502 11:55:06.362058 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 11:55:06.365511 call enable_fixed_mtrr()
2504 11:55:06.368678 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 11:55:06.372165 MTRR: Fixed MSR 0x259 0x0000000000000000
2506 11:55:06.375040 MTRR: Fixed MSR 0x268 0x0606060606060606
2507 11:55:06.378694 MTRR: Fixed MSR 0x269 0x0606060606060606
2508 11:55:06.384924 MTRR: Fixed MSR 0x26a 0x0606060606060606
2509 11:55:06.388400 MTRR: Fixed MSR 0x26b 0x0606060606060606
2510 11:55:06.391993 MTRR: Fixed MSR 0x26c 0x0606060606060606
2511 11:55:06.395506 MTRR: Fixed MSR 0x26d 0x0606060606060606
2512 11:55:06.401667 MTRR: Fixed MSR 0x26e 0x0606060606060606
2513 11:55:06.405017 MTRR: Fixed MSR 0x26f 0x0606060606060606
2514 11:55:06.408546 CPU physical address size: 39 bits
2515 11:55:06.411705 call enable_fixed_mtrr()
2516 11:55:06.415346 MTRR: Fixed MSR 0x258 0x0606060606060606
2517 11:55:06.418774 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 11:55:06.421971 MTRR: Fixed MSR 0x250 0x0606060606060606
2519 11:55:06.425520 CPU physical address size: 39 bits
2520 11:55:06.431922 MTRR: Fixed MSR 0x259 0x0000000000000000
2521 11:55:06.435210 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 11:55:06.438330 MTRR: Fixed MSR 0x268 0x0606060606060606
2523 11:55:06.441700 MTRR: Fixed MSR 0x269 0x0606060606060606
2524 11:55:06.445168 CPU physical address size: 39 bits
2525 11:55:06.451923 MTRR: Fixed MSR 0x258 0x0606060606060606
2526 11:55:06.455134 MTRR: Fixed MSR 0x26a 0x0606060606060606
2527 11:55:06.458165 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 11:55:06.461640 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 11:55:06.468126 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 11:55:06.471738 MTRR: Fixed MSR 0x26b 0x0606060606060606
2531 11:55:06.475449 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 11:55:06.477962 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 11:55:06.484916 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 11:55:06.488301 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 11:55:06.491613 MTRR: Fixed MSR 0x26a 0x0606060606060606
2536 11:55:06.494895 call enable_fixed_mtrr()
2537 11:55:06.498435 MTRR: Fixed MSR 0x26b 0x0606060606060606
2538 11:55:06.501494 MTRR: Fixed MSR 0x26c 0x0606060606060606
2539 11:55:06.504644 MTRR: Fixed MSR 0x26d 0x0606060606060606
2540 11:55:06.511249 MTRR: Fixed MSR 0x26e 0x0606060606060606
2541 11:55:06.514542 MTRR: Fixed MSR 0x26f 0x0606060606060606
2542 11:55:06.517698 CPU physical address size: 39 bits
2543 11:55:06.521303 call enable_fixed_mtrr()
2544 11:55:06.524624 MTRR: Fixed MSR 0x258 0x0606060606060606
2545 11:55:06.528169 CPU physical address size: 39 bits
2546 11:55:06.531477 MTRR: Fixed MSR 0x258 0x0606060606060606
2547 11:55:06.537830 MTRR: Fixed MSR 0x259 0x0000000000000000
2548 11:55:06.541046 MTRR: Fixed MSR 0x259 0x0000000000000000
2549 11:55:06.544958 MTRR: Fixed MSR 0x268 0x0606060606060606
2550 11:55:06.547533 MTRR: Fixed MSR 0x269 0x0606060606060606
2551 11:55:06.551406 MTRR: Fixed MSR 0x268 0x0606060606060606
2552 11:55:06.557767 MTRR: Fixed MSR 0x269 0x0606060606060606
2553 11:55:06.561070 MTRR: Fixed MSR 0x26a 0x0606060606060606
2554 11:55:06.564467 MTRR: Fixed MSR 0x26b 0x0606060606060606
2555 11:55:06.567772 MTRR: Fixed MSR 0x26c 0x0606060606060606
2556 11:55:06.574150 MTRR: Fixed MSR 0x26d 0x0606060606060606
2557 11:55:06.577471 MTRR: Fixed MSR 0x26e 0x0606060606060606
2558 11:55:06.580740 MTRR: Fixed MSR 0x26f 0x0606060606060606
2559 11:55:06.584600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 11:55:06.587927 call enable_fixed_mtrr()
2561 11:55:06.590957 MTRR: Fixed MSR 0x26b 0x0606060606060606
2562 11:55:06.597638 MTRR: Fixed MSR 0x26c 0x0606060606060606
2563 11:55:06.601490 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 11:55:06.604703 MTRR: Fixed MSR 0x26e 0x0606060606060606
2565 11:55:06.607923 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 11:55:06.614421 CPU physical address size: 39 bits
2567 11:55:06.617678 call enable_fixed_mtrr()
2568 11:55:06.620904 CPU physical address size: 39 bits
2569 11:55:06.621342
2570 11:55:06.624527 MTRR check
2571 11:55:06.625053 Fixed MTRRs : Enabled
2572 11:55:06.628342 Variable MTRRs: Enabled
2573 11:55:06.628853
2574 11:55:06.634916 BS: BS_WRITE_TABLES exit times (exec / console): 254 / 150 ms
2575 11:55:06.637734 Checking cr50 for pending updates
2576 11:55:06.648871 Reading cr50 TPM mode
2577 11:55:06.664441 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2578 11:55:06.674057 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2579 11:55:06.677543 Checking segment from ROM address 0xf96cbe6c
2580 11:55:06.680828 Checking segment from ROM address 0xf96cbe88
2581 11:55:06.687327 Loading segment from ROM address 0xf96cbe6c
2582 11:55:06.687842 code (compression=1)
2583 11:55:06.697524 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2584 11:55:06.704159 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2585 11:55:06.707351 using LZMA
2586 11:55:06.729773 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2587 11:55:06.736409 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2588 11:55:06.744726 Loading segment from ROM address 0xf96cbe88
2589 11:55:06.747485 Entry Point 0x30000000
2590 11:55:06.748008 Loaded segments
2591 11:55:06.754296 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2592 11:55:06.760958 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2593 11:55:06.764065 Finalizing chipset.
2594 11:55:06.764484 apm_control: Finalizing SMM.
2595 11:55:06.767837 APMC done.
2596 11:55:06.770689 HECI: CSE device 16.1 is disabled
2597 11:55:06.774211 HECI: CSE device 16.2 is disabled
2598 11:55:06.777382 HECI: CSE device 16.3 is disabled
2599 11:55:06.780590 HECI: CSE device 16.4 is disabled
2600 11:55:06.784093 HECI: CSE device 16.5 is disabled
2601 11:55:06.787321 HECI: Sending End-of-Post
2602 11:55:06.795817 CSE: EOP requested action: continue boot
2603 11:55:06.798961 CSE EOP successful, continuing boot
2604 11:55:06.805566 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2605 11:55:06.809141 mp_park_aps done after 0 msecs.
2606 11:55:06.812711 Jumping to boot code at 0x30000000(0x76891000)
2607 11:55:06.822352 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2608 11:55:06.826605
2609 11:55:06.827115
2610 11:55:06.827443
2611 11:55:06.829776 Starting depthcharge on Volmar...
2612 11:55:06.830188
2613 11:55:06.831818 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2614 11:55:06.832313 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2615 11:55:06.832753 Setting prompt string to ['brya:']
2616 11:55:06.833175 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2617 11:55:06.836634 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2618 11:55:06.837232
2619 11:55:06.843381 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2620 11:55:06.843902
2621 11:55:06.849849 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2622 11:55:06.850373
2623 11:55:06.852839 configure_storage: Failed to remap 1C:2
2624 11:55:06.853275
2625 11:55:06.853600 Wipe memory regions:
2626 11:55:06.856597
2627 11:55:06.859873 [0x00000000001000, 0x000000000a0000)
2628 11:55:06.860386
2629 11:55:06.862957 [0x00000000100000, 0x00000030000000)
2630 11:55:06.966486
2631 11:55:06.969777 [0x00000032668e60, 0x00000076857000)
2632 11:55:07.114070
2633 11:55:07.117274 [0x00000100000000, 0x0000027fc00000)
2634 11:55:07.927692
2635 11:55:07.930569 ec_init: CrosEC protocol v3 supported (256, 256)
2636 11:55:08.540430
2637 11:55:08.540946 R8152: Initializing
2638 11:55:08.541324
2639 11:55:08.543976 Version 9 (ocp_data = 6010)
2640 11:55:08.544487
2641 11:55:08.546968 R8152: Done initializing
2642 11:55:08.547496
2643 11:55:08.549979 Adding net device
2644 11:55:08.851442
2645 11:55:08.854405 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2646 11:55:08.854923
2647 11:55:08.855253
2648 11:55:08.855560
2649 11:55:08.856297 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2651 11:55:08.957565 brya: tftpboot 192.168.201.1 11330308/tftp-deploy-v4jyc1a9/kernel/bzImage 11330308/tftp-deploy-v4jyc1a9/kernel/cmdline 11330308/tftp-deploy-v4jyc1a9/ramdisk/ramdisk.cpio.gz
2652 11:55:08.958230 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 11:55:08.958815 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2654 11:55:08.963510 tftpboot 192.168.201.1 11330308/tftp-deploy-v4jyc1a9/kernel/bzImploy-v4jyc1a9/kernel/cmdline 11330308/tftp-deploy-v4jyc1a9/ramdisk/ramdisk.cpio.gz
2655 11:55:08.964053
2656 11:55:08.964381 Waiting for link
2657 11:55:09.165994
2658 11:55:09.166546 done.
2659 11:55:09.166902
2660 11:55:09.167233 MAC: 00:e0:4c:68:02:be
2661 11:55:09.167656
2662 11:55:09.169023 Sending DHCP discover... done.
2663 11:55:09.169530
2664 11:55:09.172458 Waiting for reply... done.
2665 11:55:09.173018
2666 11:55:09.175794 Sending DHCP request... done.
2667 11:55:09.176509
2668 11:55:09.182800 Waiting for reply... done.
2669 11:55:09.183317
2670 11:55:09.183652 My ip is 192.168.201.17
2671 11:55:09.183960
2672 11:55:09.186148 The DHCP server ip is 192.168.201.1
2673 11:55:09.188978
2674 11:55:09.192348 TFTP server IP predefined by user: 192.168.201.1
2675 11:55:09.192765
2676 11:55:09.199354 Bootfile predefined by user: 11330308/tftp-deploy-v4jyc1a9/kernel/bzImage
2677 11:55:09.199878
2678 11:55:09.202578 Sending tftp read request... done.
2679 11:55:09.202989
2680 11:55:09.211288 Waiting for the transfer...
2681 11:55:09.211807
2682 11:55:09.546953 00000000 ################################################################
2683 11:55:09.547080
2684 11:55:09.846028 00080000 ################################################################
2685 11:55:09.846168
2686 11:55:10.130017 00100000 ################################################################
2687 11:55:10.130145
2688 11:55:10.429437 00180000 ################################################################
2689 11:55:10.429557
2690 11:55:10.727089 00200000 ################################################################
2691 11:55:10.727211
2692 11:55:11.010239 00280000 ################################################################
2693 11:55:11.010370
2694 11:55:11.309380 00300000 ################################################################
2695 11:55:11.309501
2696 11:55:11.590377 00380000 ################################################################
2697 11:55:11.590512
2698 11:55:11.881928 00400000 ################################################################
2699 11:55:11.882079
2700 11:55:12.174806 00480000 ################################################################
2701 11:55:12.174928
2702 11:55:12.461821 00500000 ################################################################
2703 11:55:12.461965
2704 11:55:12.742757 00580000 ################################################################
2705 11:55:12.742881
2706 11:55:13.022062 00600000 ################################################################
2707 11:55:13.022183
2708 11:55:13.301530 00680000 ################################################################
2709 11:55:13.301655
2710 11:55:13.582805 00700000 ################################################################
2711 11:55:13.582919
2712 11:55:13.882521 00780000 ################################################################
2713 11:55:13.882701
2714 11:55:14.178910 00800000 ################################################################
2715 11:55:14.179036
2716 11:55:14.477969 00880000 ################################################################
2717 11:55:14.478095
2718 11:55:14.775295 00900000 ################################################################
2719 11:55:14.775420
2720 11:55:15.056675 00980000 ################################################################
2721 11:55:15.056810
2722 11:55:15.338076 00a00000 ################################################################
2723 11:55:15.338204
2724 11:55:15.618156 00a80000 ################################################################
2725 11:55:15.618286
2726 11:55:15.905045 00b00000 ################################################################
2727 11:55:15.905236
2728 11:55:16.195000 00b80000 ################################################################
2729 11:55:16.195137
2730 11:55:16.475991 00c00000 ################################################################
2731 11:55:16.476110
2732 11:55:16.763174 00c80000 ################################################################
2733 11:55:16.763337
2734 11:55:16.978516 00d00000 ############################################### done.
2735 11:55:16.978638
2736 11:55:16.982219 The bootfile was 14011616 bytes long.
2737 11:55:16.982643
2738 11:55:16.985382 Sending tftp read request... done.
2739 11:55:16.985826
2740 11:55:16.988950 Waiting for the transfer...
2741 11:55:16.989403
2742 11:55:17.355728 00000000 ################################################################
2743 11:55:17.355871
2744 11:55:17.651480 00080000 ################################################################
2745 11:55:17.651630
2746 11:55:17.951130 00100000 ################################################################
2747 11:55:17.951251
2748 11:55:18.250324 00180000 ################################################################
2749 11:55:18.250463
2750 11:55:18.549453 00200000 ################################################################
2751 11:55:18.549575
2752 11:55:18.835351 00280000 ################################################################
2753 11:55:18.835469
2754 11:55:19.130945 00300000 ################################################################
2755 11:55:19.131427
2756 11:55:19.523878 00380000 ################################################################
2757 11:55:19.524382
2758 11:55:19.916400 00400000 ################################################################
2759 11:55:19.916899
2760 11:55:20.319644 00480000 ################################################################
2761 11:55:20.320163
2762 11:55:20.650548 00500000 ################################################################
2763 11:55:20.650684
2764 11:55:20.949897 00580000 ################################################################
2765 11:55:20.950025
2766 11:55:21.235124 00600000 ################################################################
2767 11:55:21.235247
2768 11:55:21.522839 00680000 ################################################################
2769 11:55:21.522957
2770 11:55:21.802959 00700000 ################################################################
2771 11:55:21.803083
2772 11:55:22.083318 00780000 ################################################################
2773 11:55:22.083435
2774 11:55:22.382136 00800000 ################################################################
2775 11:55:22.382269
2776 11:55:22.590035 00880000 ############################################## done.
2777 11:55:22.590147
2778 11:55:22.593338 Sending tftp read request... done.
2779 11:55:22.593430
2780 11:55:22.596718 Waiting for the transfer...
2781 11:55:22.596816
2782 11:55:22.600242 00000000 # done.
2783 11:55:22.600339
2784 11:55:22.606776 Command line loaded dynamically from TFTP file: 11330308/tftp-deploy-v4jyc1a9/kernel/cmdline
2785 11:55:22.610399
2786 11:55:22.623722 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2787 11:55:22.630175
2788 11:55:22.633176 Shutting down all USB controllers.
2789 11:55:22.633467
2790 11:55:22.633640 Removing current net device
2791 11:55:22.633798
2792 11:55:22.636310 Finalizing coreboot
2793 11:55:22.636562
2794 11:55:22.643537 Exiting depthcharge with code 4 at timestamp: 26088587
2795 11:55:22.643942
2796 11:55:22.644198
2797 11:55:22.644422 Starting kernel ...
2798 11:55:22.644638
2799 11:55:22.644845
2800 11:55:22.645791 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2801 11:55:22.646134 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2802 11:55:22.646431 Setting prompt string to ['Linux version [0-9]']
2803 11:55:22.646749 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2804 11:55:22.647066 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2806 11:59:47.647183 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2808 11:59:47.648291 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2810 11:59:47.649172 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2813 11:59:47.650585 end: 2 depthcharge-action (duration 00:05:00) [common]
2815 11:59:47.651584 Cleaning after the job
2816 11:59:47.651674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/ramdisk
2817 11:59:47.653171 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/kernel
2818 11:59:47.655328 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11330308/tftp-deploy-v4jyc1a9/modules
2819 11:59:47.655945 start: 5.1 power-off (timeout 00:00:30) [common]
2820 11:59:47.656103 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=off'
2821 11:59:47.737016 >> Command sent successfully.
2822 11:59:47.748472 Returned 0 in 0 seconds
2823 11:59:47.849901 end: 5.1 power-off (duration 00:00:00) [common]
2825 11:59:47.851530 start: 5.2 read-feedback (timeout 00:10:00) [common]
2826 11:59:47.852868 Listened to connection for namespace 'common' for up to 1s
2827 11:59:48.853347 Finalising connection for namespace 'common'
2828 11:59:48.854001 Disconnecting from shell: Finalise
2829 11:59:48.854425
2830 11:59:48.955686 end: 5.2 read-feedback (duration 00:00:01) [common]
2831 11:59:48.956286 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11330308
2832 11:59:48.977579 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11330308
2833 11:59:48.977706 JobError: Your job cannot terminate cleanly.