Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 15:29:02.788261 lava-dispatcher, installed at version: 2023.06
2 15:29:02.788475 start: 0 validate
3 15:29:02.788609 Start time: 2023-09-13 15:29:02.788601+00:00 (UTC)
4 15:29:02.788739 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:29:02.788880 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:29:03.042001 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:29:03.042724 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.191-cip38-17-g8dad6b499cfe5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:30:28.144364 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:30:28.144527 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.191-cip38-17-g8dad6b499cfe5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:30:28.408422 validate duration: 85.62
12 15:30:28.409586 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:30:28.410092 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:30:28.410524 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:30:28.411149 Not decompressing ramdisk as can be used compressed.
16 15:30:28.411616 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:30:28.411958 saving as /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/ramdisk/rootfs.cpio.gz
18 15:30:28.412286 total size: 8418130 (8 MB)
19 15:30:28.674345 progress 0 % (0 MB)
20 15:30:28.676879 progress 5 % (0 MB)
21 15:30:28.679266 progress 10 % (0 MB)
22 15:30:28.681571 progress 15 % (1 MB)
23 15:30:28.683887 progress 20 % (1 MB)
24 15:30:28.686140 progress 25 % (2 MB)
25 15:30:28.688476 progress 30 % (2 MB)
26 15:30:28.690610 progress 35 % (2 MB)
27 15:30:28.692954 progress 40 % (3 MB)
28 15:30:28.695308 progress 45 % (3 MB)
29 15:30:28.697581 progress 50 % (4 MB)
30 15:30:28.699871 progress 55 % (4 MB)
31 15:30:28.702110 progress 60 % (4 MB)
32 15:30:28.704196 progress 65 % (5 MB)
33 15:30:28.706418 progress 70 % (5 MB)
34 15:30:28.708696 progress 75 % (6 MB)
35 15:30:28.710960 progress 80 % (6 MB)
36 15:30:28.713215 progress 85 % (6 MB)
37 15:30:28.715474 progress 90 % (7 MB)
38 15:30:28.717768 progress 95 % (7 MB)
39 15:30:28.719891 progress 100 % (8 MB)
40 15:30:28.720131 8 MB downloaded in 0.31 s (26.08 MB/s)
41 15:30:28.720296 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:30:28.720536 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:30:28.720623 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:30:28.720706 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:30:28.720842 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.191-cip38-17-g8dad6b499cfe5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:30:28.720915 saving as /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/kernel/bzImage
48 15:30:28.720977 total size: 14013312 (13 MB)
49 15:30:28.721038 No compression specified
50 15:30:28.722267 progress 0 % (0 MB)
51 15:30:28.726417 progress 5 % (0 MB)
52 15:30:28.730077 progress 10 % (1 MB)
53 15:30:28.734071 progress 15 % (2 MB)
54 15:30:28.737732 progress 20 % (2 MB)
55 15:30:28.741462 progress 25 % (3 MB)
56 15:30:28.745278 progress 30 % (4 MB)
57 15:30:28.749023 progress 35 % (4 MB)
58 15:30:28.752835 progress 40 % (5 MB)
59 15:30:28.756589 progress 45 % (6 MB)
60 15:30:28.760252 progress 50 % (6 MB)
61 15:30:28.764093 progress 55 % (7 MB)
62 15:30:28.767702 progress 60 % (8 MB)
63 15:30:28.771357 progress 65 % (8 MB)
64 15:30:28.775169 progress 70 % (9 MB)
65 15:30:28.778822 progress 75 % (10 MB)
66 15:30:28.782570 progress 80 % (10 MB)
67 15:30:28.786178 progress 85 % (11 MB)
68 15:30:28.789746 progress 90 % (12 MB)
69 15:30:28.793528 progress 95 % (12 MB)
70 15:30:28.797162 progress 100 % (13 MB)
71 15:30:28.797366 13 MB downloaded in 0.08 s (174.96 MB/s)
72 15:30:28.797513 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:30:28.797747 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:30:28.797834 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:30:28.797918 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:30:28.798041 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.191-cip38-17-g8dad6b499cfe5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:30:28.798115 saving as /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/modules/modules.tar
79 15:30:28.798176 total size: 526916 (0 MB)
80 15:30:28.798240 Using unxz to decompress xz
81 15:30:28.802305 progress 6 % (0 MB)
82 15:30:28.802718 progress 12 % (0 MB)
83 15:30:28.803011 progress 18 % (0 MB)
84 15:30:28.804559 progress 24 % (0 MB)
85 15:30:28.806415 progress 31 % (0 MB)
86 15:30:28.808469 progress 37 % (0 MB)
87 15:30:28.810550 progress 43 % (0 MB)
88 15:30:28.812540 progress 49 % (0 MB)
89 15:30:28.814547 progress 55 % (0 MB)
90 15:30:28.816494 progress 62 % (0 MB)
91 15:30:28.818652 progress 68 % (0 MB)
92 15:30:28.820673 progress 74 % (0 MB)
93 15:30:28.822722 progress 80 % (0 MB)
94 15:30:28.824993 progress 87 % (0 MB)
95 15:30:28.826831 progress 93 % (0 MB)
96 15:30:28.828842 progress 99 % (0 MB)
97 15:30:28.836245 0 MB downloaded in 0.04 s (13.20 MB/s)
98 15:30:28.836482 end: 1.3.1 http-download (duration 00:00:00) [common]
100 15:30:28.836746 end: 1.3 download-retry (duration 00:00:00) [common]
101 15:30:28.836839 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 15:30:28.836933 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 15:30:28.837014 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 15:30:28.837103 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 15:30:28.837324 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj
106 15:30:28.837462 makedir: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin
107 15:30:28.837570 makedir: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/tests
108 15:30:28.837670 makedir: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/results
109 15:30:28.837785 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-add-keys
110 15:30:28.837940 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-add-sources
111 15:30:28.838071 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-background-process-start
112 15:30:28.838202 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-background-process-stop
113 15:30:28.838331 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-common-functions
114 15:30:28.838458 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-echo-ipv4
115 15:30:28.838584 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-install-packages
116 15:30:28.838709 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-installed-packages
117 15:30:28.838835 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-os-build
118 15:30:28.839003 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-probe-channel
119 15:30:28.839131 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-probe-ip
120 15:30:28.839257 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-target-ip
121 15:30:28.839382 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-target-mac
122 15:30:28.839507 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-target-storage
123 15:30:28.839641 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-case
124 15:30:28.839767 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-event
125 15:30:28.839893 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-feedback
126 15:30:28.840019 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-raise
127 15:30:28.840146 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-reference
128 15:30:28.840297 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-runner
129 15:30:28.840425 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-set
130 15:30:28.840554 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-test-shell
131 15:30:28.840684 Updating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-install-packages (oe)
132 15:30:28.840838 Updating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/bin/lava-installed-packages (oe)
133 15:30:28.840962 Creating /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/environment
134 15:30:28.841063 LAVA metadata
135 15:30:28.841138 - LAVA_JOB_ID=11517023
136 15:30:28.841204 - LAVA_DISPATCHER_IP=192.168.201.1
137 15:30:28.841307 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 15:30:28.841374 skipped lava-vland-overlay
139 15:30:28.841451 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 15:30:28.841536 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 15:30:28.841602 skipped lava-multinode-overlay
142 15:30:28.841676 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 15:30:28.841756 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 15:30:28.841829 Loading test definitions
145 15:30:28.841918 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 15:30:28.841995 Using /lava-11517023 at stage 0
147 15:30:28.842324 uuid=11517023_1.4.2.3.1 testdef=None
148 15:30:28.842413 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 15:30:28.842500 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 15:30:28.843079 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 15:30:28.843310 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 15:30:28.844511 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 15:30:28.844746 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 15:30:28.845375 runner path: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/0/tests/0_dmesg test_uuid 11517023_1.4.2.3.1
157 15:30:28.845539 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 15:30:28.845769 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 15:30:28.845841 Using /lava-11517023 at stage 1
161 15:30:28.846143 uuid=11517023_1.4.2.3.5 testdef=None
162 15:30:28.846231 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 15:30:28.846316 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 15:30:28.846800 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 15:30:28.847070 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 15:30:28.847726 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 15:30:28.847959 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 15:30:28.848594 runner path: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/1/tests/1_bootrr test_uuid 11517023_1.4.2.3.5
171 15:30:28.848749 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 15:30:28.848958 Creating lava-test-runner.conf files
174 15:30:28.849022 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/0 for stage 0
175 15:30:28.849114 - 0_dmesg
176 15:30:28.849195 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11517023/lava-overlay-8k_04lvj/lava-11517023/1 for stage 1
177 15:30:28.849288 - 1_bootrr
178 15:30:28.849383 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 15:30:28.849470 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 15:30:28.857459 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 15:30:28.857568 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 15:30:28.857658 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 15:30:28.857744 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 15:30:28.857828 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 15:30:29.107815 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 15:30:29.108184 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 15:30:29.108305 extracting modules file /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11517023/extract-overlay-ramdisk-xl4xrgr1/ramdisk
188 15:30:29.133818 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 15:30:29.133967 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 15:30:29.134064 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11517023/compress-overlay-ccvho2d_/overlay-1.4.2.4.tar.gz to ramdisk
191 15:30:29.134140 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11517023/compress-overlay-ccvho2d_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11517023/extract-overlay-ramdisk-xl4xrgr1/ramdisk
192 15:30:29.142503 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 15:30:29.142617 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 15:30:29.142709 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 15:30:29.142800 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 15:30:29.142881 Building ramdisk /var/lib/lava/dispatcher/tmp/11517023/extract-overlay-ramdisk-xl4xrgr1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11517023/extract-overlay-ramdisk-xl4xrgr1/ramdisk
197 15:30:29.278866 >> 54148 blocks
198 15:30:30.184010 rename /var/lib/lava/dispatcher/tmp/11517023/extract-overlay-ramdisk-xl4xrgr1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/ramdisk/ramdisk.cpio.gz
199 15:30:30.184429 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 15:30:30.184551 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 15:30:30.184658 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 15:30:30.184755 No mkimage arch provided, not using FIT.
203 15:30:30.184844 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 15:30:30.184930 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 15:30:30.185040 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 15:30:30.185137 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 15:30:30.185217 No LXC device requested
208 15:30:30.185297 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 15:30:30.185384 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 15:30:30.185463 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 15:30:30.185540 Checking files for TFTP limit of 4294967296 bytes.
212 15:30:30.185950 end: 1 tftp-deploy (duration 00:00:02) [common]
213 15:30:30.186058 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 15:30:30.186148 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 15:30:30.186270 substitutions:
216 15:30:30.186338 - {DTB}: None
217 15:30:30.186402 - {INITRD}: 11517023/tftp-deploy-updgsp89/ramdisk/ramdisk.cpio.gz
218 15:30:30.186462 - {KERNEL}: 11517023/tftp-deploy-updgsp89/kernel/bzImage
219 15:30:30.186520 - {LAVA_MAC}: None
220 15:30:30.186576 - {PRESEED_CONFIG}: None
221 15:30:30.186632 - {PRESEED_LOCAL}: None
222 15:30:30.186700 - {RAMDISK}: 11517023/tftp-deploy-updgsp89/ramdisk/ramdisk.cpio.gz
223 15:30:30.186757 - {ROOT_PART}: None
224 15:30:30.186812 - {ROOT}: None
225 15:30:30.186868 - {SERVER_IP}: 192.168.201.1
226 15:30:30.186953 - {TEE}: None
227 15:30:30.187022 Parsed boot commands:
228 15:30:30.187075 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 15:30:30.187263 Parsed boot commands: tftpboot 192.168.201.1 11517023/tftp-deploy-updgsp89/kernel/bzImage 11517023/tftp-deploy-updgsp89/kernel/cmdline 11517023/tftp-deploy-updgsp89/ramdisk/ramdisk.cpio.gz
230 15:30:30.187354 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 15:30:30.187438 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 15:30:30.187537 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 15:30:30.187620 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 15:30:30.187694 Not connected, no need to disconnect.
235 15:30:30.187769 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 15:30:30.187860 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 15:30:30.187927 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-4'
238 15:30:30.191701 Setting prompt string to ['lava-test: # ']
239 15:30:30.192049 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 15:30:30.192161 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 15:30:30.192262 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 15:30:30.192354 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 15:30:30.192722 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=reboot'
244 15:30:35.323588 >> Command sent successfully.
245 15:30:35.325855 Returned 0 in 5 seconds
246 15:30:35.426230 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 15:30:35.426595 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 15:30:35.426727 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 15:30:35.426851 Setting prompt string to 'Starting depthcharge on Volmar...'
251 15:30:35.426986 Changing prompt to 'Starting depthcharge on Volmar...'
252 15:30:35.427064 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 15:30:35.427336 [Enter `^Ec?' for help]
254 15:30:36.803361
255 15:30:36.803499
256 15:30:36.810809 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 15:30:36.814492 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 15:30:36.817687 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 15:30:36.824881 CPU: AES supported, TXT NOT supported, VT supported
260 15:30:36.832390 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 15:30:36.832503 Cache size = 10 MiB
262 15:30:36.840554 MCH: device id 4609 (rev 04) is Alderlake-P
263 15:30:36.843686 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 15:30:36.846836 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 15:30:36.850771 VBOOT: Loading verstage.
266 15:30:36.854723 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 15:30:36.861345 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 15:30:36.864498 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 15:30:36.874603 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 15:30:36.881295 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 15:30:36.881379
272 15:30:36.881444
273 15:30:36.891072 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 15:30:36.898880 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 15:30:36.901922 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 15:30:36.905831 I2C TX abort detected (00000001)
277 15:30:36.905938 cr50_i2c_read: Address write failed
278 15:30:36.919214 .done! DID_VID 0x00281ae0
279 15:30:36.922704 TPM ready after 0 ms
280 15:30:36.925927 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 15:30:36.939518 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 15:30:36.946030 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 15:30:37.004224 tlcl_send_startup: Startup return code is 0
284 15:30:37.004348 TPM: setup succeeded
285 15:30:37.024602 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 15:30:37.046311 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 15:30:37.049953 Chrome EC: UHEPI supported
288 15:30:37.053585 Reading cr50 boot mode
289 15:30:37.069474 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 15:30:37.069559 Phase 1
291 15:30:37.072787 FMAP: area GBB found @ 1805000 (458752 bytes)
292 15:30:37.083104 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 15:30:37.089689 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 15:30:37.096257 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 15:30:37.096373 Phase 2
296 15:30:37.096472 Phase 3
297 15:30:37.103034 FMAP: area GBB found @ 1805000 (458752 bytes)
298 15:30:37.106311 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 15:30:37.113046 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 15:30:37.119549 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 15:30:37.126494 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 15:30:37.133470 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 15:30:37.140720 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 15:30:37.153960 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 15:30:37.157440 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 15:30:37.163993 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 15:30:37.170599 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 15:30:37.177434 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 15:30:37.183594 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 15:30:37.187675 Phase 4
311 15:30:37.190866 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 15:30:37.197527 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 15:30:37.409512 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 15:30:37.416056 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 15:30:37.419336 Saving vboot hash.
316 15:30:37.426128 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 15:30:37.442167 tlcl_extend: response is 0
318 15:30:37.448903 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 15:30:37.455439 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 15:30:37.469562 tlcl_extend: response is 0
321 15:30:37.476471 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 15:30:37.496669 tlcl_lock_nv_write: response is 0
323 15:30:37.514676 tlcl_lock_nv_write: response is 0
324 15:30:37.514786 Slot A is selected
325 15:30:37.520766 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 15:30:37.527504 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 15:30:37.534084 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 15:30:37.540753 BS: verstage times (exec / console): total (unknown) / 264 ms
329 15:30:37.540838
330 15:30:37.540904
331 15:30:37.547445 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 15:30:37.551928 Google Chrome EC: version:
333 15:30:37.555077 ro: volmar_v2.0.14126-e605144e9c
334 15:30:37.558439 rw: volmar_v0.0.55-22d1557
335 15:30:37.561755 running image: 2
336 15:30:37.565248 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 15:30:37.575216 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 15:30:37.581832 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 15:30:37.588644 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 15:30:37.598557 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 15:30:37.608016 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 15:30:37.611590 EC took 975us to calculate image hash
343 15:30:37.621653 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 15:30:37.628135 VB2:sync_ec() select_rw=RW(active)
345 15:30:37.636254 Waited 270us to clear limit power flag.
346 15:30:37.639516 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 15:30:37.642807 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 15:30:37.649303 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 15:30:37.652864 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 15:30:37.656159 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
351 15:30:37.659301 TCO_STS: 0000 0000
352 15:30:37.662581 GEN_PMCON: d0015038 00002200
353 15:30:37.665868 GBLRST_CAUSE: 00000000 00000000
354 15:30:37.665950 HPR_CAUSE0: 00000000
355 15:30:37.669231 prev_sleep_state 5
356 15:30:37.675665 Abort disabling TXT, as CPU is not TXT capable.
357 15:30:37.679257 cse_lite: Number of partitions = 3
358 15:30:37.682489 cse_lite: Current partition = RO
359 15:30:37.685818 cse_lite: Next partition = RO
360 15:30:37.689248 cse_lite: Flags = 0x7
361 15:30:37.695617 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 15:30:37.702146 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 15:30:37.709145 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 15:30:37.715578 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 15:30:37.722078 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 15:30:37.728956 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 15:30:37.732415 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 15:30:37.735120 cse_lite: Set Boot Partition Info Command (RW)
369 15:30:37.743074 HECI: Global Reset(Type:1) Command
370 15:30:39.166983 V���h�U: ID 906a4, Alderlake R0 Platform, ucode: 00000423
371 15:30:39.173778 CPU: AES supported, TXT NOT supported, VT supported
372 15:30:39.180355 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
373 15:30:39.183787 Cache size = 10 MiB
374 15:30:39.187227 MCH: device id 4609 (rev 04) is Alderlake-P
375 15:30:39.193669 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
376 15:30:39.196912 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
377 15:30:39.200305 VBOOT: Loading verstage.
378 15:30:39.204160 FMAP: Found "FLASH" version 1.1 at 0x1804000.
379 15:30:39.207476 FMAP: base = 0x0 size = 0x2000000 #areas = 37
380 15:30:39.214450 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 15:30:39.221402 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
382 15:30:39.231354 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
383 15:30:39.231460
384 15:30:39.231567
385 15:30:39.240968 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
386 15:30:39.244462 Probing TPM I2C: I2C bus 1 version 0x3230302a
387 15:30:39.251137 DW I2C bus 1 at 0xfe022000 (400 KHz)
388 15:30:39.251246 done! DID_VID 0x00281ae0
389 15:30:39.254335 TPM ready after 0 ms
390 15:30:39.257679 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
391 15:30:39.271826 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
392 15:30:39.275663 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
393 15:30:39.337031 tlcl_send_startup: Startup return code is 0
394 15:30:39.337159 TPM: setup succeeded
395 15:30:39.356984 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
396 15:30:39.378978 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
397 15:30:39.383040 Chrome EC: UHEPI supported
398 15:30:39.386308 Reading cr50 boot mode
399 15:30:39.400956 Cr50 says boot_mode is VERIFIED_RW(0x00).
400 15:30:39.401065 Phase 1
401 15:30:39.407495 FMAP: area GBB found @ 1805000 (458752 bytes)
402 15:30:39.414088 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 15:30:39.420803 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 15:30:39.427399 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
405 15:30:39.431133 Phase 2
406 15:30:39.431238 Phase 3
407 15:30:39.434463 FMAP: area GBB found @ 1805000 (458752 bytes)
408 15:30:39.440653 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 15:30:39.444027 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 15:30:39.450764 VB2:vb2_verify_keyblock() Checking keyblock signature...
411 15:30:39.457560 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
412 15:30:39.463829 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
413 15:30:39.473836 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
414 15:30:39.486114 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 15:30:39.489313 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 15:30:39.495862 VB2:vb2_verify_fw_preamble() Verifying preamble.
417 15:30:39.502492 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
418 15:30:39.509366 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
419 15:30:39.515714 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
420 15:30:39.520111 Phase 4
421 15:30:39.523221 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
422 15:30:39.529903 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
423 15:30:39.742805 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
424 15:30:39.749176 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
425 15:30:39.752614 Saving vboot hash.
426 15:30:39.758908 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
427 15:30:39.775208 tlcl_extend: response is 0
428 15:30:39.781668 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
429 15:30:39.788238 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
430 15:30:39.802842 tlcl_extend: response is 0
431 15:30:39.809051 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
432 15:30:39.827928 tlcl_lock_nv_write: response is 0
433 15:30:39.845675 tlcl_lock_nv_write: response is 0
434 15:30:39.845766 Slot A is selected
435 15:30:39.852061 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 15:30:39.858758 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
437 15:30:39.865494 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
438 15:30:39.872089 BS: verstage times (exec / console): total (unknown) / 256 ms
439 15:30:39.872176
440 15:30:39.872243
441 15:30:39.878501 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
442 15:30:39.882776 Google Chrome EC: version:
443 15:30:39.886095 ro: volmar_v2.0.14126-e605144e9c
444 15:30:39.889796 rw: volmar_v0.0.55-22d1557
445 15:30:39.892732 running image: 2
446 15:30:39.896119 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
447 15:30:39.906123 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
448 15:30:39.912448 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
449 15:30:39.919355 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
450 15:30:39.929338 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 15:30:39.939026 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 15:30:39.942608 EC took 941us to calculate image hash
453 15:30:39.952567 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 15:30:39.959210 VB2:sync_ec() select_rw=RW(active)
455 15:30:39.976406 Waited 270us to clear limit power flag.
456 15:30:39.980043 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
457 15:30:39.983223 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
458 15:30:39.986651 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
459 15:30:39.992935 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
460 15:30:39.996459 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
461 15:30:39.999773 TCO_STS: 0000 0000
462 15:30:40.003053 GEN_PMCON: d1001038 00002200
463 15:30:40.006536 GBLRST_CAUSE: 00000040 00000000
464 15:30:40.006620 HPR_CAUSE0: 00000000
465 15:30:40.009841 prev_sleep_state 5
466 15:30:40.013013 Abort disabling TXT, as CPU is not TXT capable.
467 15:30:40.021094 cse_lite: Number of partitions = 3
468 15:30:40.023977 cse_lite: Current partition = RW
469 15:30:40.024061 cse_lite: Next partition = RW
470 15:30:40.027251 cse_lite: Flags = 0x7
471 15:30:40.033967 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
472 15:30:40.043955 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
473 15:30:40.047381 FMAP: area SI_ME found @ 1000 (5238784 bytes)
474 15:30:40.053964 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
475 15:30:40.060535 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
476 15:30:40.067126 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
477 15:30:40.070756 cse_lite: CSE CBFS RW version : 16.1.25.2049
478 15:30:40.073692 Boot Count incremented to 3027
479 15:30:40.080667 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
480 15:30:40.087040 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 15:30:40.100032 Probing TPM I2C: done! DID_VID 0x00281ae0
482 15:30:40.103508 Locality already claimed
483 15:30:40.106543 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 15:30:40.126322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 15:30:40.133125 MRC: Hash idx 0x100d comparison successful.
486 15:30:40.135879 MRC cache found, size f6c8
487 15:30:40.135962 bootmode is set to: 2
488 15:30:40.140015 EC returned error result code 3
489 15:30:40.143205 FW_CONFIG value from CBI is 0x131
490 15:30:40.149546 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
491 15:30:40.153117 SPD index = 0
492 15:30:40.159874 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
493 15:30:40.159959 SPD: module type is LPDDR4X
494 15:30:40.166462 SPD: module part number is K4U6E3S4AB-MGCL
495 15:30:40.172986 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
496 15:30:40.176436 SPD: device width 16 bits, bus width 16 bits
497 15:30:40.179805 SPD: module size is 1024 MB (per channel)
498 15:30:40.249269 CBMEM:
499 15:30:40.252246 IMD: root @ 0x76fff000 254 entries.
500 15:30:40.255403 IMD: root @ 0x76ffec00 62 entries.
501 15:30:40.263552 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
502 15:30:40.266863 RO_VPD is uninitialized or empty.
503 15:30:40.270113 FMAP: area RW_VPD found @ f29000 (8192 bytes)
504 15:30:40.273597 RW_VPD is uninitialized or empty.
505 15:30:40.280328 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
506 15:30:40.283666 External stage cache:
507 15:30:40.286703 IMD: root @ 0x7bbff000 254 entries.
508 15:30:40.289840 IMD: root @ 0x7bbfec00 62 entries.
509 15:30:40.297384 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
510 15:30:40.304040 MRC: Checking cached data update for 'RW_MRC_CACHE'.
511 15:30:40.307159 MRC: 'RW_MRC_CACHE' does not need update.
512 15:30:40.307243 8 DIMMs found
513 15:30:40.310306 SMM Memory Map
514 15:30:40.313665 SMRAM : 0x7b800000 0x800000
515 15:30:40.316933 Subregion 0: 0x7b800000 0x200000
516 15:30:40.320444 Subregion 1: 0x7ba00000 0x200000
517 15:30:40.323701 Subregion 2: 0x7bc00000 0x400000
518 15:30:40.326818 top_of_ram = 0x77000000
519 15:30:40.330295 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
520 15:30:40.337035 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
521 15:30:40.343716 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
522 15:30:40.346925 MTRR Range: Start=ff000000 End=0 (Size 1000000)
523 15:30:40.347024 Normal boot
524 15:30:40.357078 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
525 15:30:40.363387 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
526 15:30:40.369974 Processing 237 relocs. Offset value of 0x74ab9000
527 15:30:40.378389 BS: romstage times (exec / console): total (unknown) / 381 ms
528 15:30:40.386109
529 15:30:40.386191
530 15:30:40.392334 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
531 15:30:40.392423 Normal boot
532 15:30:40.399035 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
533 15:30:40.405837 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
534 15:30:40.412197 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
535 15:30:40.422553 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
536 15:30:40.470247 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
537 15:30:40.476770 Processing 5931 relocs. Offset value of 0x72a2f000
538 15:30:40.480109 BS: postcar times (exec / console): total (unknown) / 51 ms
539 15:30:40.483797
540 15:30:40.483880
541 15:30:40.490002 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
542 15:30:40.493563 Reserving BERT start 76a1e000, size 10000
543 15:30:40.496723 Normal boot
544 15:30:40.500045 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
545 15:30:40.507159 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
546 15:30:40.516700 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
547 15:30:40.519852 FMAP: area RW_VPD found @ f29000 (8192 bytes)
548 15:30:40.523774 Google Chrome EC: version:
549 15:30:40.527134 ro: volmar_v2.0.14126-e605144e9c
550 15:30:40.530394 rw: volmar_v0.0.55-22d1557
551 15:30:40.534064 running image: 2
552 15:30:40.537443 ACPI _SWS is PM1 Index 8 GPE Index -1
553 15:30:40.540925 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
554 15:30:40.545567 EC returned error result code 3
555 15:30:40.551592 FW_CONFIG value from CBI is 0x131
556 15:30:40.555326 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
557 15:30:40.558190 PCI: 00:1c.2 disabled by fw_config
558 15:30:40.564986 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 15:30:40.568384 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 15:30:40.575110 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
561 15:30:40.578268 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
562 15:30:40.584784 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
563 15:30:40.591490 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
564 15:30:40.597882 microcode: sig=0x906a4 pf=0x80 revision=0x423
565 15:30:40.601490 microcode: Update skipped, already up-to-date
566 15:30:40.608056 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
567 15:30:40.641597 Detected 6 core, 8 thread CPU.
568 15:30:40.644677 Setting up SMI for CPU
569 15:30:40.648292 IED base = 0x7bc00000
570 15:30:40.648377 IED size = 0x00400000
571 15:30:40.651239 Will perform SMM setup.
572 15:30:40.654489 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
573 15:30:40.657772 LAPIC 0x0 in XAPIC mode.
574 15:30:40.667695 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
575 15:30:40.670999 Processing 18 relocs. Offset value of 0x00030000
576 15:30:40.676067 Attempting to start 7 APs
577 15:30:40.679210 Waiting for 10ms after sending INIT.
578 15:30:40.692105 Waiting for SIPI to complete...
579 15:30:40.695439 LAPIC 0x1 in XAPIC mode.
580 15:30:40.698616 LAPIC 0x10 in XAPIC mode.
581 15:30:40.702281 LAPIC 0x12 in XAPIC mode.
582 15:30:40.705389 LAPIC 0x16 in XAPIC mode.
583 15:30:40.708709 AP: slot 4 apic_id 10, MCU rev: 0x00000423
584 15:30:40.712140 LAPIC 0x8 in XAPIC mode.
585 15:30:40.712212 LAPIC 0x9 in XAPIC mode.
586 15:30:40.718784 AP: slot 7 apic_id 8, MCU rev: 0x00000423
587 15:30:40.722004 AP: slot 3 apic_id 12, MCU rev: 0x00000423
588 15:30:40.725490 AP: slot 5 apic_id 9, MCU rev: 0x00000423
589 15:30:40.731861 AP: slot 2 apic_id 16, MCU rev: 0x00000423
590 15:30:40.731960 LAPIC 0x14 in XAPIC mode.
591 15:30:40.738700 AP: slot 6 apic_id 1, MCU rev: 0x00000423
592 15:30:40.741859 AP: slot 1 apic_id 14, MCU rev: 0x00000423
593 15:30:40.741961 done.
594 15:30:40.745069 Waiting for SIPI to complete...
595 15:30:40.745168 done.
596 15:30:40.748308 smm_setup_relocation_handler: enter
597 15:30:40.751719 smm_setup_relocation_handler: exit
598 15:30:40.761998 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
599 15:30:40.765409 Processing 11 relocs. Offset value of 0x00038000
600 15:30:40.771683 smm_module_setup_stub: stack_top = 0x7b804000
601 15:30:40.775090 smm_module_setup_stub: per cpu stack_size = 0x800
602 15:30:40.781548 smm_module_setup_stub: runtime.start32_offset = 0x4c
603 15:30:40.784970 smm_module_setup_stub: runtime.smm_size = 0x10000
604 15:30:40.791402 SMM Module: stub loaded at 38000. Will call 0x76a52094
605 15:30:40.794807 Installing permanent SMM handler to 0x7b800000
606 15:30:40.801456 smm_load_module: total_smm_space_needed e468, available -> 200000
607 15:30:40.811394 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
608 15:30:40.817963 Processing 255 relocs. Offset value of 0x7b9f6000
609 15:30:40.821064 smm_load_module: smram_start: 0x7b800000
610 15:30:40.824676 smm_load_module: smram_end: 7ba00000
611 15:30:40.827900 smm_load_module: handler start 0x7b9f6d5f
612 15:30:40.831009 smm_load_module: handler_size 98d0
613 15:30:40.834657 smm_load_module: fxsave_area 0x7b9ff000
614 15:30:40.838020 smm_load_module: fxsave_size 1000
615 15:30:40.844581 smm_load_module: CONFIG_MSEG_SIZE 0x0
616 15:30:40.847709 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
617 15:30:40.854204 smm_load_module: handler_mod_params.smbase = 0x7b800000
618 15:30:40.857940 smm_load_module: per_cpu_save_state_size = 0x400
619 15:30:40.861059 smm_load_module: num_cpus = 0x8
620 15:30:40.867625 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
621 15:30:40.870947 smm_load_module: total_save_state_size = 0x2000
622 15:30:40.877597 smm_load_module: cpu0 entry: 7b9e6000
623 15:30:40.881120 smm_create_map: cpus allowed in one segment 30
624 15:30:40.884362 smm_create_map: min # of segments needed 1
625 15:30:40.887635 CPU 0x0
626 15:30:40.890855 smbase 7b9e6000 entry 7b9ee000
627 15:30:40.894133 ss_start 7b9f5c00 code_end 7b9ee208
628 15:30:40.894217 CPU 0x1
629 15:30:40.897751 smbase 7b9e5c00 entry 7b9edc00
630 15:30:40.903948 ss_start 7b9f5800 code_end 7b9ede08
631 15:30:40.904032 CPU 0x2
632 15:30:40.907772 smbase 7b9e5800 entry 7b9ed800
633 15:30:40.914223 ss_start 7b9f5400 code_end 7b9eda08
634 15:30:40.914308 CPU 0x3
635 15:30:40.917430 smbase 7b9e5400 entry 7b9ed400
636 15:30:40.924091 ss_start 7b9f5000 code_end 7b9ed608
637 15:30:40.924174 CPU 0x4
638 15:30:40.927505 smbase 7b9e5000 entry 7b9ed000
639 15:30:40.930716 ss_start 7b9f4c00 code_end 7b9ed208
640 15:30:40.933840 CPU 0x5
641 15:30:40.937406 smbase 7b9e4c00 entry 7b9ecc00
642 15:30:40.940592 ss_start 7b9f4800 code_end 7b9ece08
643 15:30:40.940676 CPU 0x6
644 15:30:40.943954 smbase 7b9e4800 entry 7b9ec800
645 15:30:40.950784 ss_start 7b9f4400 code_end 7b9eca08
646 15:30:40.950867 CPU 0x7
647 15:30:40.954157 smbase 7b9e4400 entry 7b9ec400
648 15:30:40.960487 ss_start 7b9f4000 code_end 7b9ec608
649 15:30:40.967093 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
650 15:30:40.974026 Processing 11 relocs. Offset value of 0x7b9ee000
651 15:30:40.977267 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
652 15:30:40.983652 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
653 15:30:40.990382 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
654 15:30:40.997143 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
655 15:30:41.003700 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
656 15:30:41.010306 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
657 15:30:41.017308 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
658 15:30:41.020357 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
659 15:30:41.030431 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
660 15:30:41.033806 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
661 15:30:41.040205 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
662 15:30:41.046774 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
663 15:30:41.053323 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
664 15:30:41.060274 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
665 15:30:41.066768 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
666 15:30:41.070016 smm_module_setup_stub: stack_top = 0x7b804000
667 15:30:41.076575 smm_module_setup_stub: per cpu stack_size = 0x800
668 15:30:41.079887 smm_module_setup_stub: runtime.start32_offset = 0x4c
669 15:30:41.086637 smm_module_setup_stub: runtime.smm_size = 0x200000
670 15:30:41.093340 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
671 15:30:41.096548 Clearing SMI status registers
672 15:30:41.099921 SMI_STS: PM1
673 15:30:41.100005 PM1_STS: WAK PWRBTN
674 15:30:41.106709 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
675 15:30:41.110217 In relocation handler: CPU 0
676 15:30:41.116681 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
677 15:30:41.120096 Writing SMRR. base = 0x7b800006, mask=0xff800c00
678 15:30:41.123699 Relocation complete.
679 15:30:41.130313 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
680 15:30:41.133337 In relocation handler: CPU 6
681 15:30:41.136649 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
682 15:30:41.139890 Relocation complete.
683 15:30:41.146344 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
684 15:30:41.149820 In relocation handler: CPU 1
685 15:30:41.153046 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
686 15:30:41.156273 Writing SMRR. base = 0x7b800006, mask=0xff800c00
687 15:30:41.159995 Relocation complete.
688 15:30:41.166567 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
689 15:30:41.169660 In relocation handler: CPU 3
690 15:30:41.173079 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
691 15:30:41.179596 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 15:30:41.179679 Relocation complete.
693 15:30:41.189569 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
694 15:30:41.189653 In relocation handler: CPU 2
695 15:30:41.196533 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
696 15:30:41.199587 Writing SMRR. base = 0x7b800006, mask=0xff800c00
697 15:30:41.203071 Relocation complete.
698 15:30:41.209708 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
699 15:30:41.213167 In relocation handler: CPU 4
700 15:30:41.216128 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
701 15:30:41.223321 Writing SMRR. base = 0x7b800006, mask=0xff800c00
702 15:30:41.223405 Relocation complete.
703 15:30:41.229487 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
704 15:30:41.233058 In relocation handler: CPU 7
705 15:30:41.236214 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
706 15:30:41.243003 Writing SMRR. base = 0x7b800006, mask=0xff800c00
707 15:30:41.245974 Relocation complete.
708 15:30:41.252628 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
709 15:30:41.256057 In relocation handler: CPU 5
710 15:30:41.259490 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
711 15:30:41.262713 Relocation complete.
712 15:30:41.262825 Initializing CPU #0
713 15:30:41.266066 CPU: vendor Intel device 906a4
714 15:30:41.269299 CPU: family 06, model 9a, stepping 04
715 15:30:41.272677 Clearing out pending MCEs
716 15:30:41.276275 cpu: energy policy set to 7
717 15:30:41.279633 Turbo is available but hidden
718 15:30:41.282477 Turbo is available and visible
719 15:30:41.285729 microcode: Update skipped, already up-to-date
720 15:30:41.289143 CPU #0 initialized
721 15:30:41.289226 Initializing CPU #6
722 15:30:41.292483 Initializing CPU #1
723 15:30:41.295714 Initializing CPU #3
724 15:30:41.295797 Initializing CPU #4
725 15:30:41.299237 CPU: vendor Intel device 906a4
726 15:30:41.302791 CPU: family 06, model 9a, stepping 04
727 15:30:41.306039 CPU: vendor Intel device 906a4
728 15:30:41.309165 CPU: family 06, model 9a, stepping 04
729 15:30:41.312784 CPU: vendor Intel device 906a4
730 15:30:41.319166 CPU: family 06, model 9a, stepping 04
731 15:30:41.319250 Clearing out pending MCEs
732 15:30:41.322501 Clearing out pending MCEs
733 15:30:41.325843 Clearing out pending MCEs
734 15:30:41.329216 cpu: energy policy set to 7
735 15:30:41.332390 cpu: energy policy set to 7
736 15:30:41.332474 Initializing CPU #2
737 15:30:41.335559 cpu: energy policy set to 7
738 15:30:41.338816 microcode: Update skipped, already up-to-date
739 15:30:41.342118 CPU #3 initialized
740 15:30:41.345662 Initializing CPU #7
741 15:30:41.345746 Initializing CPU #5
742 15:30:41.352515 microcode: Update skipped, already up-to-date
743 15:30:41.352601 CPU #1 initialized
744 15:30:41.355773 CPU: vendor Intel device 906a4
745 15:30:41.358960 CPU: family 06, model 9a, stepping 04
746 15:30:41.365454 microcode: Update skipped, already up-to-date
747 15:30:41.365558 CPU #4 initialized
748 15:30:41.368650 Clearing out pending MCEs
749 15:30:41.372074 CPU: vendor Intel device 906a4
750 15:30:41.375299 CPU: family 06, model 9a, stepping 04
751 15:30:41.379161 cpu: energy policy set to 7
752 15:30:41.382302 CPU: vendor Intel device 906a4
753 15:30:41.385687 CPU: family 06, model 9a, stepping 04
754 15:30:41.392269 microcode: Update skipped, already up-to-date
755 15:30:41.392349 CPU #2 initialized
756 15:30:41.395613 Clearing out pending MCEs
757 15:30:41.398967 Clearing out pending MCEs
758 15:30:41.402296 cpu: energy policy set to 7
759 15:30:41.402369 CPU: vendor Intel device 906a4
760 15:30:41.408664 CPU: family 06, model 9a, stepping 04
761 15:30:41.411951 microcode: Update skipped, already up-to-date
762 15:30:41.415118 CPU #7 initialized
763 15:30:41.415193 cpu: energy policy set to 7
764 15:30:41.418801 Clearing out pending MCEs
765 15:30:41.425409 microcode: Update skipped, already up-to-date
766 15:30:41.425486 CPU #6 initialized
767 15:30:41.428515 cpu: energy policy set to 7
768 15:30:41.431892 microcode: Update skipped, already up-to-date
769 15:30:41.435353 CPU #5 initialized
770 15:30:41.438642 bsp_do_flight_plan done after 689 msecs.
771 15:30:41.441853 CPU: frequency set to 4400 MHz
772 15:30:41.445502 Enabling SMIs.
773 15:30:41.451823 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
774 15:30:41.466804 Probing TPM I2C: done! DID_VID 0x00281ae0
775 15:30:41.469794 Locality already claimed
776 15:30:41.473517 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
777 15:30:41.484720 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
778 15:30:41.488332 Enabling GPIO PM b/c CR50 has long IRQ pulse support
779 15:30:41.494621 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
780 15:30:41.501247 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
781 15:30:41.504525 Found a VBT of 9216 bytes after decompression
782 15:30:41.507861 PCI 1.0, PIN A, using IRQ #16
783 15:30:41.511045 PCI 2.0, PIN A, using IRQ #17
784 15:30:41.514693 PCI 4.0, PIN A, using IRQ #18
785 15:30:41.517918 PCI 5.0, PIN A, using IRQ #16
786 15:30:41.521144 PCI 6.0, PIN A, using IRQ #16
787 15:30:41.524294 PCI 6.2, PIN C, using IRQ #18
788 15:30:41.527734 PCI 7.0, PIN A, using IRQ #19
789 15:30:41.530990 PCI 7.1, PIN B, using IRQ #20
790 15:30:41.534510 PCI 7.2, PIN C, using IRQ #21
791 15:30:41.537801 PCI 7.3, PIN D, using IRQ #22
792 15:30:41.540765 PCI 8.0, PIN A, using IRQ #23
793 15:30:41.544446 PCI D.0, PIN A, using IRQ #17
794 15:30:41.547774 PCI D.1, PIN B, using IRQ #19
795 15:30:41.551055 PCI 10.0, PIN A, using IRQ #24
796 15:30:41.551140 PCI 10.1, PIN B, using IRQ #25
797 15:30:41.554228 PCI 10.6, PIN C, using IRQ #20
798 15:30:41.557599 PCI 10.7, PIN D, using IRQ #21
799 15:30:41.560904 PCI 11.0, PIN A, using IRQ #26
800 15:30:41.564139 PCI 11.1, PIN B, using IRQ #27
801 15:30:41.567559 PCI 11.2, PIN C, using IRQ #28
802 15:30:41.570747 PCI 11.3, PIN D, using IRQ #29
803 15:30:41.574016 PCI 12.0, PIN A, using IRQ #30
804 15:30:41.577492 PCI 12.6, PIN B, using IRQ #31
805 15:30:41.580688 PCI 12.7, PIN C, using IRQ #22
806 15:30:41.584412 PCI 13.0, PIN A, using IRQ #32
807 15:30:41.587750 PCI 13.1, PIN B, using IRQ #33
808 15:30:41.590907 PCI 13.2, PIN C, using IRQ #34
809 15:30:41.594054 PCI 13.3, PIN D, using IRQ #35
810 15:30:41.597381 PCI 14.0, PIN B, using IRQ #23
811 15:30:41.600590 PCI 14.1, PIN A, using IRQ #36
812 15:30:41.603917 PCI 14.3, PIN C, using IRQ #17
813 15:30:41.604001 PCI 15.0, PIN A, using IRQ #37
814 15:30:41.607350 PCI 15.1, PIN B, using IRQ #38
815 15:30:41.610570 PCI 15.2, PIN C, using IRQ #39
816 15:30:41.613889 PCI 15.3, PIN D, using IRQ #40
817 15:30:41.617523 PCI 16.0, PIN A, using IRQ #18
818 15:30:41.620754 PCI 16.1, PIN B, using IRQ #19
819 15:30:41.623845 PCI 16.2, PIN C, using IRQ #20
820 15:30:41.627601 PCI 16.3, PIN D, using IRQ #21
821 15:30:41.630872 PCI 16.4, PIN A, using IRQ #18
822 15:30:41.634230 PCI 16.5, PIN B, using IRQ #19
823 15:30:41.637585 PCI 17.0, PIN A, using IRQ #22
824 15:30:41.640735 PCI 19.0, PIN A, using IRQ #41
825 15:30:41.644176 PCI 19.1, PIN B, using IRQ #42
826 15:30:41.647307 PCI 19.2, PIN C, using IRQ #43
827 15:30:41.650356 PCI 1C.0, PIN A, using IRQ #16
828 15:30:41.653927 PCI 1C.1, PIN B, using IRQ #17
829 15:30:41.657325 PCI 1C.2, PIN C, using IRQ #18
830 15:30:41.657408 PCI 1C.3, PIN D, using IRQ #19
831 15:30:41.660419 PCI 1C.4, PIN A, using IRQ #16
832 15:30:41.663759 PCI 1C.5, PIN B, using IRQ #17
833 15:30:41.667096 PCI 1C.6, PIN C, using IRQ #18
834 15:30:41.670478 PCI 1C.7, PIN D, using IRQ #19
835 15:30:41.673636 PCI 1D.0, PIN A, using IRQ #16
836 15:30:41.677243 PCI 1D.1, PIN B, using IRQ #17
837 15:30:41.680412 PCI 1D.2, PIN C, using IRQ #18
838 15:30:41.683804 PCI 1D.3, PIN D, using IRQ #19
839 15:30:41.687067 PCI 1E.0, PIN A, using IRQ #23
840 15:30:41.690204 PCI 1E.1, PIN B, using IRQ #20
841 15:30:41.693495 PCI 1E.2, PIN C, using IRQ #44
842 15:30:41.696999 PCI 1E.3, PIN D, using IRQ #45
843 15:30:41.700215 PCI 1F.3, PIN B, using IRQ #22
844 15:30:41.703759 PCI 1F.4, PIN C, using IRQ #23
845 15:30:41.707092 PCI 1F.6, PIN D, using IRQ #20
846 15:30:41.710204 PCI 1F.7, PIN A, using IRQ #21
847 15:30:41.713399 IRQ: Using dynamically assigned PCI IO-APIC IRQs
848 15:30:41.720052 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
849 15:30:41.899585 FSPS returned 0
850 15:30:41.902468 Executing Phase 1 of FspMultiPhaseSiInit
851 15:30:41.912743 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
852 15:30:41.915978 port C0 DISC req: usage 1 usb3 1 usb2 1
853 15:30:41.919497 Raw Buffer output 0 00000111
854 15:30:41.922894 Raw Buffer output 1 00000000
855 15:30:41.926261 pmc_send_ipc_cmd succeeded
856 15:30:41.933108 port C1 DISC req: usage 1 usb3 3 usb2 3
857 15:30:41.933218 Raw Buffer output 0 00000331
858 15:30:41.936329 Raw Buffer output 1 00000000
859 15:30:41.940398 pmc_send_ipc_cmd succeeded
860 15:30:41.944025 Detected 6 core, 8 thread CPU.
861 15:30:41.947651 Detected 6 core, 8 thread CPU.
862 15:30:41.952966 Detected 6 core, 8 thread CPU.
863 15:30:41.956187 Detected 6 core, 8 thread CPU.
864 15:30:41.959518 Detected 6 core, 8 thread CPU.
865 15:30:41.962383 Detected 6 core, 8 thread CPU.
866 15:30:41.966276 Detected 6 core, 8 thread CPU.
867 15:30:41.969396 Detected 6 core, 8 thread CPU.
868 15:30:41.972576 Detected 6 core, 8 thread CPU.
869 15:30:41.975771 Detected 6 core, 8 thread CPU.
870 15:30:41.979167 Detected 6 core, 8 thread CPU.
871 15:30:41.982410 Detected 6 core, 8 thread CPU.
872 15:30:41.985989 Detected 6 core, 8 thread CPU.
873 15:30:41.989105 Detected 6 core, 8 thread CPU.
874 15:30:41.992262 Detected 6 core, 8 thread CPU.
875 15:30:41.995542 Detected 6 core, 8 thread CPU.
876 15:30:41.998879 Detected 6 core, 8 thread CPU.
877 15:30:42.002686 Detected 6 core, 8 thread CPU.
878 15:30:42.005674 Detected 6 core, 8 thread CPU.
879 15:30:42.009145 Detected 6 core, 8 thread CPU.
880 15:30:42.011999 Detected 6 core, 8 thread CPU.
881 15:30:42.015463 Detected 6 core, 8 thread CPU.
882 15:30:42.305551 Detected 6 core, 8 thread CPU.
883 15:30:42.308730 Detected 6 core, 8 thread CPU.
884 15:30:42.312078 Detected 6 core, 8 thread CPU.
885 15:30:42.315249 Detected 6 core, 8 thread CPU.
886 15:30:42.318947 Detected 6 core, 8 thread CPU.
887 15:30:42.322117 Detected 6 core, 8 thread CPU.
888 15:30:42.325211 Detected 6 core, 8 thread CPU.
889 15:30:42.328932 Detected 6 core, 8 thread CPU.
890 15:30:42.332031 Detected 6 core, 8 thread CPU.
891 15:30:42.335329 Detected 6 core, 8 thread CPU.
892 15:30:42.338567 Detected 6 core, 8 thread CPU.
893 15:30:42.342011 Detected 6 core, 8 thread CPU.
894 15:30:42.345267 Detected 6 core, 8 thread CPU.
895 15:30:42.348433 Detected 6 core, 8 thread CPU.
896 15:30:42.351723 Detected 6 core, 8 thread CPU.
897 15:30:42.354928 Detected 6 core, 8 thread CPU.
898 15:30:42.358381 Detected 6 core, 8 thread CPU.
899 15:30:42.361568 Detected 6 core, 8 thread CPU.
900 15:30:42.364943 Detected 6 core, 8 thread CPU.
901 15:30:42.368215 Detected 6 core, 8 thread CPU.
902 15:30:42.371508 Display FSP Version Info HOB
903 15:30:42.374797 Reference Code - CPU = c.0.65.70
904 15:30:42.374914 uCode Version = 0.0.4.23
905 15:30:42.378138 TXT ACM version = ff.ff.ff.ffff
906 15:30:42.381417 Reference Code - ME = c.0.65.70
907 15:30:42.384920 MEBx version = 0.0.0.0
908 15:30:42.388198 ME Firmware Version = Lite SKU
909 15:30:42.391818 Reference Code - PCH = c.0.65.70
910 15:30:42.395080 PCH-CRID Status = Disabled
911 15:30:42.397926 PCH-CRID Original Value = ff.ff.ff.ffff
912 15:30:42.401433 PCH-CRID New Value = ff.ff.ff.ffff
913 15:30:42.404860 OPROM - RST - RAID = ff.ff.ff.ffff
914 15:30:42.408040 PCH Hsio Version = 4.0.0.0
915 15:30:42.411355 Reference Code - SA - System Agent = c.0.65.70
916 15:30:42.414718 Reference Code - MRC = 0.0.3.80
917 15:30:42.418089 SA - PCIe Version = c.0.65.70
918 15:30:42.421352 SA-CRID Status = Disabled
919 15:30:42.424632 SA-CRID Original Value = 0.0.0.4
920 15:30:42.428161 SA-CRID New Value = 0.0.0.4
921 15:30:42.431474 OPROM - VBIOS = ff.ff.ff.ffff
922 15:30:42.434710 IO Manageability Engine FW Version = 24.0.4.0
923 15:30:42.438239 PHY Build Version = 0.0.0.2016
924 15:30:42.441258 Thunderbolt(TM) FW Version = 0.0.0.0
925 15:30:42.448207 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
926 15:30:42.454830 BS: BS_DEV_INIT_CHIPS run times (exec / console): 489 / 507 ms
927 15:30:42.458123 Enumerating buses...
928 15:30:42.461005 Show all devs... Before device enumeration.
929 15:30:42.464761 Root Device: enabled 1
930 15:30:42.467981 CPU_CLUSTER: 0: enabled 1
931 15:30:42.468094 DOMAIN: 0000: enabled 1
932 15:30:42.471328 GPIO: 0: enabled 1
933 15:30:42.474560 PCI: 00:00.0: enabled 1
934 15:30:42.474640 PCI: 00:01.0: enabled 0
935 15:30:42.477946 PCI: 00:01.1: enabled 0
936 15:30:42.481051 PCI: 00:02.0: enabled 1
937 15:30:42.484362 PCI: 00:04.0: enabled 1
938 15:30:42.484451 PCI: 00:05.0: enabled 0
939 15:30:42.487780 PCI: 00:06.0: enabled 1
940 15:30:42.491126 PCI: 00:06.2: enabled 0
941 15:30:42.491208 PCI: 00:07.0: enabled 0
942 15:30:42.494476 PCI: 00:07.1: enabled 0
943 15:30:42.497951 PCI: 00:07.2: enabled 0
944 15:30:42.501622 PCI: 00:07.3: enabled 0
945 15:30:42.501704 PCI: 00:08.0: enabled 0
946 15:30:42.504452 PCI: 00:09.0: enabled 0
947 15:30:42.507704 PCI: 00:0a.0: enabled 1
948 15:30:42.511071 PCI: 00:0d.0: enabled 1
949 15:30:42.511154 PCI: 00:0d.1: enabled 0
950 15:30:42.514502 PCI: 00:0d.2: enabled 0
951 15:30:42.517781 PCI: 00:0d.3: enabled 0
952 15:30:42.521102 PCI: 00:0e.0: enabled 0
953 15:30:42.521183 PCI: 00:10.0: enabled 0
954 15:30:42.524475 PCI: 00:10.1: enabled 0
955 15:30:42.527956 PCI: 00:10.6: enabled 0
956 15:30:42.528038 PCI: 00:10.7: enabled 0
957 15:30:42.530940 PCI: 00:12.0: enabled 0
958 15:30:42.534265 PCI: 00:12.6: enabled 0
959 15:30:42.537463 PCI: 00:12.7: enabled 0
960 15:30:42.537572 PCI: 00:13.0: enabled 0
961 15:30:42.540921 PCI: 00:14.0: enabled 1
962 15:30:42.544068 PCI: 00:14.1: enabled 0
963 15:30:42.547394 PCI: 00:14.2: enabled 1
964 15:30:42.547484 PCI: 00:14.3: enabled 1
965 15:30:42.551014 PCI: 00:15.0: enabled 1
966 15:30:42.554297 PCI: 00:15.1: enabled 1
967 15:30:42.557475 PCI: 00:15.2: enabled 0
968 15:30:42.557556 PCI: 00:15.3: enabled 1
969 15:30:42.560882 PCI: 00:16.0: enabled 1
970 15:30:42.564236 PCI: 00:16.1: enabled 0
971 15:30:42.567481 PCI: 00:16.2: enabled 0
972 15:30:42.567562 PCI: 00:16.3: enabled 0
973 15:30:42.570771 PCI: 00:16.4: enabled 0
974 15:30:42.574136 PCI: 00:16.5: enabled 0
975 15:30:42.577582 PCI: 00:17.0: enabled 1
976 15:30:42.577663 PCI: 00:19.0: enabled 0
977 15:30:42.580895 PCI: 00:19.1: enabled 1
978 15:30:42.584277 PCI: 00:19.2: enabled 0
979 15:30:42.584359 PCI: 00:1a.0: enabled 0
980 15:30:42.587612 PCI: 00:1c.0: enabled 0
981 15:30:42.590810 PCI: 00:1c.1: enabled 0
982 15:30:42.594067 PCI: 00:1c.2: enabled 0
983 15:30:42.594148 PCI: 00:1c.3: enabled 0
984 15:30:42.597397 PCI: 00:1c.4: enabled 0
985 15:30:42.600740 PCI: 00:1c.5: enabled 0
986 15:30:42.604068 PCI: 00:1c.6: enabled 0
987 15:30:42.604150 PCI: 00:1c.7: enabled 0
988 15:30:42.607218 PCI: 00:1d.0: enabled 0
989 15:30:42.610543 PCI: 00:1d.1: enabled 0
990 15:30:42.614281 PCI: 00:1d.2: enabled 0
991 15:30:42.614367 PCI: 00:1d.3: enabled 0
992 15:30:42.617344 PCI: 00:1e.0: enabled 1
993 15:30:42.620790 PCI: 00:1e.1: enabled 0
994 15:30:42.620872 PCI: 00:1e.2: enabled 0
995 15:30:42.623720 PCI: 00:1e.3: enabled 1
996 15:30:42.627270 PCI: 00:1f.0: enabled 1
997 15:30:42.630784 PCI: 00:1f.1: enabled 0
998 15:30:42.630861 PCI: 00:1f.2: enabled 1
999 15:30:42.634032 PCI: 00:1f.3: enabled 1
1000 15:30:42.637314 PCI: 00:1f.4: enabled 0
1001 15:30:42.640739 PCI: 00:1f.5: enabled 1
1002 15:30:42.640859 PCI: 00:1f.6: enabled 0
1003 15:30:42.643810 PCI: 00:1f.7: enabled 0
1004 15:30:42.647090 GENERIC: 0.0: enabled 1
1005 15:30:42.650329 GENERIC: 0.0: enabled 1
1006 15:30:42.650409 GENERIC: 1.0: enabled 1
1007 15:30:42.653554 GENERIC: 0.0: enabled 1
1008 15:30:42.657002 GENERIC: 1.0: enabled 1
1009 15:30:42.657081 USB0 port 0: enabled 1
1010 15:30:42.660426 USB0 port 0: enabled 1
1011 15:30:42.663913 GENERIC: 0.0: enabled 1
1012 15:30:42.667233 I2C: 00:1a: enabled 1
1013 15:30:42.667310 I2C: 00:31: enabled 1
1014 15:30:42.670445 I2C: 00:32: enabled 1
1015 15:30:42.673599 I2C: 00:50: enabled 1
1016 15:30:42.673675 I2C: 00:10: enabled 1
1017 15:30:42.677028 I2C: 00:15: enabled 1
1018 15:30:42.680360 I2C: 00:2c: enabled 1
1019 15:30:42.680435 GENERIC: 0.0: enabled 1
1020 15:30:42.683761 SPI: 00: enabled 1
1021 15:30:42.687114 PNP: 0c09.0: enabled 1
1022 15:30:42.687189 GENERIC: 0.0: enabled 1
1023 15:30:42.690510 USB3 port 0: enabled 1
1024 15:30:42.693464 USB3 port 1: enabled 0
1025 15:30:42.697011 USB3 port 2: enabled 1
1026 15:30:42.697085 USB3 port 3: enabled 0
1027 15:30:42.700241 USB2 port 0: enabled 1
1028 15:30:42.703634 USB2 port 1: enabled 0
1029 15:30:42.703708 USB2 port 2: enabled 1
1030 15:30:42.707082 USB2 port 3: enabled 0
1031 15:30:42.710202 USB2 port 4: enabled 0
1032 15:30:42.710275 USB2 port 5: enabled 1
1033 15:30:42.713666 USB2 port 6: enabled 0
1034 15:30:42.717034 USB2 port 7: enabled 0
1035 15:30:42.720309 USB2 port 8: enabled 1
1036 15:30:42.720382 USB2 port 9: enabled 1
1037 15:30:42.723983 USB3 port 0: enabled 1
1038 15:30:42.726849 USB3 port 1: enabled 0
1039 15:30:42.726962 USB3 port 2: enabled 0
1040 15:30:42.730015 USB3 port 3: enabled 0
1041 15:30:42.733505 GENERIC: 0.0: enabled 1
1042 15:30:42.736686 GENERIC: 1.0: enabled 1
1043 15:30:42.736765 APIC: 00: enabled 1
1044 15:30:42.740277 APIC: 14: enabled 1
1045 15:30:42.740356 APIC: 16: enabled 1
1046 15:30:42.743668 APIC: 12: enabled 1
1047 15:30:42.746850 APIC: 10: enabled 1
1048 15:30:42.746951 APIC: 09: enabled 1
1049 15:30:42.750277 APIC: 01: enabled 1
1050 15:30:42.753537 APIC: 08: enabled 1
1051 15:30:42.753611 Compare with tree...
1052 15:30:42.756925 Root Device: enabled 1
1053 15:30:42.759936 CPU_CLUSTER: 0: enabled 1
1054 15:30:42.760011 APIC: 00: enabled 1
1055 15:30:42.763312 APIC: 14: enabled 1
1056 15:30:42.766842 APIC: 16: enabled 1
1057 15:30:42.766925 APIC: 12: enabled 1
1058 15:30:42.770104 APIC: 10: enabled 1
1059 15:30:42.773306 APIC: 09: enabled 1
1060 15:30:42.773384 APIC: 01: enabled 1
1061 15:30:42.776884 APIC: 08: enabled 1
1062 15:30:42.780197 DOMAIN: 0000: enabled 1
1063 15:30:42.783314 GPIO: 0: enabled 1
1064 15:30:42.783386 PCI: 00:00.0: enabled 1
1065 15:30:42.786579 PCI: 00:01.0: enabled 0
1066 15:30:42.790327 PCI: 00:01.1: enabled 0
1067 15:30:42.793394 PCI: 00:02.0: enabled 1
1068 15:30:42.796717 PCI: 00:04.0: enabled 1
1069 15:30:42.796789 GENERIC: 0.0: enabled 1
1070 15:30:42.799920 PCI: 00:05.0: enabled 0
1071 15:30:42.803195 PCI: 00:06.0: enabled 1
1072 15:30:42.806508 PCI: 00:06.2: enabled 0
1073 15:30:42.810234 PCI: 00:08.0: enabled 0
1074 15:30:42.810313 PCI: 00:09.0: enabled 0
1075 15:30:42.813170 PCI: 00:0a.0: enabled 1
1076 15:30:42.816794 PCI: 00:0d.0: enabled 1
1077 15:30:42.820184 USB0 port 0: enabled 1
1078 15:30:42.823649 USB3 port 0: enabled 1
1079 15:30:42.823722 USB3 port 1: enabled 0
1080 15:30:42.826796 USB3 port 2: enabled 1
1081 15:30:42.829938 USB3 port 3: enabled 0
1082 15:30:42.833131 PCI: 00:0d.1: enabled 0
1083 15:30:42.836782 PCI: 00:0d.2: enabled 0
1084 15:30:42.836862 PCI: 00:0d.3: enabled 0
1085 15:30:42.840340 PCI: 00:0e.0: enabled 0
1086 15:30:42.843468 PCI: 00:10.0: enabled 0
1087 15:30:42.846546 PCI: 00:10.1: enabled 0
1088 15:30:42.850297 PCI: 00:10.6: enabled 0
1089 15:30:42.850377 PCI: 00:10.7: enabled 0
1090 15:30:42.853455 PCI: 00:12.0: enabled 0
1091 15:30:42.856676 PCI: 00:12.6: enabled 0
1092 15:30:42.859974 PCI: 00:12.7: enabled 0
1093 15:30:42.863303 PCI: 00:13.0: enabled 0
1094 15:30:42.863384 PCI: 00:14.0: enabled 1
1095 15:30:42.866569 USB0 port 0: enabled 1
1096 15:30:42.869810 USB2 port 0: enabled 1
1097 15:30:42.872993 USB2 port 1: enabled 0
1098 15:30:42.876299 USB2 port 2: enabled 1
1099 15:30:42.876379 USB2 port 3: enabled 0
1100 15:30:42.879951 USB2 port 4: enabled 0
1101 15:30:42.882894 USB2 port 5: enabled 1
1102 15:30:42.886663 USB2 port 6: enabled 0
1103 15:30:42.889570 USB2 port 7: enabled 0
1104 15:30:42.892974 USB2 port 8: enabled 1
1105 15:30:42.893054 USB2 port 9: enabled 1
1106 15:30:42.896385 USB3 port 0: enabled 1
1107 15:30:42.899748 USB3 port 1: enabled 0
1108 15:30:42.902913 USB3 port 2: enabled 0
1109 15:30:42.906393 USB3 port 3: enabled 0
1110 15:30:42.906474 PCI: 00:14.1: enabled 0
1111 15:30:42.909685 PCI: 00:14.2: enabled 1
1112 15:30:42.912957 PCI: 00:14.3: enabled 1
1113 15:30:42.916389 GENERIC: 0.0: enabled 1
1114 15:30:42.919361 PCI: 00:15.0: enabled 1
1115 15:30:42.919442 I2C: 00:1a: enabled 1
1116 15:30:42.922690 I2C: 00:31: enabled 1
1117 15:30:42.926142 I2C: 00:32: enabled 1
1118 15:30:42.929557 PCI: 00:15.1: enabled 1
1119 15:30:42.932701 I2C: 00:50: enabled 1
1120 15:30:42.932781 PCI: 00:15.2: enabled 0
1121 15:30:42.936089 PCI: 00:15.3: enabled 1
1122 15:30:42.939427 I2C: 00:10: enabled 1
1123 15:30:42.942777 PCI: 00:16.0: enabled 1
1124 15:30:42.942894 PCI: 00:16.1: enabled 0
1125 15:30:42.945965 PCI: 00:16.2: enabled 0
1126 15:30:42.949422 PCI: 00:16.3: enabled 0
1127 15:30:42.952780 PCI: 00:16.4: enabled 0
1128 15:30:42.956290 PCI: 00:16.5: enabled 0
1129 15:30:42.956370 PCI: 00:17.0: enabled 1
1130 15:30:42.959539 PCI: 00:19.0: enabled 0
1131 15:30:42.962918 PCI: 00:19.1: enabled 1
1132 15:30:42.966190 I2C: 00:15: enabled 1
1133 15:30:42.969709 I2C: 00:2c: enabled 1
1134 15:30:42.969790 PCI: 00:19.2: enabled 0
1135 15:30:42.972965 PCI: 00:1a.0: enabled 0
1136 15:30:42.975720 PCI: 00:1e.0: enabled 1
1137 15:30:42.979061 PCI: 00:1e.1: enabled 0
1138 15:30:42.982539 PCI: 00:1e.2: enabled 0
1139 15:30:42.982619 PCI: 00:1e.3: enabled 1
1140 15:30:42.985843 SPI: 00: enabled 1
1141 15:30:42.989011 PCI: 00:1f.0: enabled 1
1142 15:30:42.992556 PNP: 0c09.0: enabled 1
1143 15:30:42.992641 PCI: 00:1f.1: enabled 0
1144 15:30:42.995837 PCI: 00:1f.2: enabled 1
1145 15:30:42.999116 GENERIC: 0.0: enabled 1
1146 15:30:43.002470 GENERIC: 0.0: enabled 1
1147 15:30:43.005663 GENERIC: 1.0: enabled 1
1148 15:30:43.005742 PCI: 00:1f.3: enabled 1
1149 15:30:43.008972 PCI: 00:1f.4: enabled 0
1150 15:30:43.012646 PCI: 00:1f.5: enabled 1
1151 15:30:43.015941 PCI: 00:1f.6: enabled 0
1152 15:30:43.019219 PCI: 00:1f.7: enabled 0
1153 15:30:43.019299 Root Device scanning...
1154 15:30:43.022588 scan_static_bus for Root Device
1155 15:30:43.025740 CPU_CLUSTER: 0 enabled
1156 15:30:43.029003 DOMAIN: 0000 enabled
1157 15:30:43.029079 DOMAIN: 0000 scanning...
1158 15:30:43.032421 PCI: pci_scan_bus for bus 00
1159 15:30:43.035661 PCI: 00:00.0 [8086/0000] ops
1160 15:30:43.038799 PCI: 00:00.0 [8086/4609] enabled
1161 15:30:43.042305 PCI: 00:02.0 [8086/0000] bus ops
1162 15:30:43.045477 PCI: 00:02.0 [8086/46b3] enabled
1163 15:30:43.048842 PCI: 00:04.0 [8086/0000] bus ops
1164 15:30:43.052515 PCI: 00:04.0 [8086/461d] enabled
1165 15:30:43.055650 PCI: 00:06.0 [8086/0000] bus ops
1166 15:30:43.058716 PCI: 00:06.0 [8086/464d] enabled
1167 15:30:43.062056 PCI: 00:08.0 [8086/464f] disabled
1168 15:30:43.065627 PCI: 00:0a.0 [8086/467d] enabled
1169 15:30:43.068867 PCI: 00:0d.0 [8086/0000] bus ops
1170 15:30:43.072154 PCI: 00:0d.0 [8086/461e] enabled
1171 15:30:43.075964 PCI: 00:14.0 [8086/0000] bus ops
1172 15:30:43.079136 PCI: 00:14.0 [8086/51ed] enabled
1173 15:30:43.082469 PCI: 00:14.2 [8086/51ef] enabled
1174 15:30:43.086201 PCI: 00:14.3 [8086/0000] bus ops
1175 15:30:43.089372 PCI: 00:14.3 [8086/51f0] enabled
1176 15:30:43.092688 PCI: 00:15.0 [8086/0000] bus ops
1177 15:30:43.095896 PCI: 00:15.0 [8086/51e8] enabled
1178 15:30:43.099210 PCI: 00:15.1 [8086/0000] bus ops
1179 15:30:43.103102 PCI: 00:15.1 [8086/51e9] enabled
1180 15:30:43.106165 PCI: 00:15.2 [8086/0000] bus ops
1181 15:30:43.113027 PCI: 00:15.2 [8086/51ea] disabled
1182 15:30:43.116085 PCI: 00:15.3 [8086/0000] bus ops
1183 15:30:43.119481 PCI: 00:15.3 [8086/51eb] enabled
1184 15:30:43.119558 PCI: 00:16.0 [8086/0000] ops
1185 15:30:43.122459 PCI: 00:16.0 [8086/51e0] enabled
1186 15:30:43.129206 PCI: Static device PCI: 00:17.0 not found, disabling it.
1187 15:30:43.132529 PCI: 00:19.0 [8086/0000] bus ops
1188 15:30:43.135886 PCI: 00:19.0 [8086/51c5] disabled
1189 15:30:43.139281 PCI: 00:19.1 [8086/0000] bus ops
1190 15:30:43.142683 PCI: 00:19.1 [8086/51c6] enabled
1191 15:30:43.145788 PCI: 00:1e.0 [8086/0000] ops
1192 15:30:43.148881 PCI: 00:1e.0 [8086/51a8] enabled
1193 15:30:43.152554 PCI: 00:1e.3 [8086/0000] bus ops
1194 15:30:43.155581 PCI: 00:1e.3 [8086/51ab] enabled
1195 15:30:43.158725 PCI: 00:1f.0 [8086/0000] bus ops
1196 15:30:43.162328 PCI: 00:1f.0 [8086/5182] enabled
1197 15:30:43.165883 RTC Init
1198 15:30:43.169273 Set power on after power failure.
1199 15:30:43.172279 Disabling Deep S3
1200 15:30:43.172352 Disabling Deep S3
1201 15:30:43.175610 Disabling Deep S4
1202 15:30:43.175685 Disabling Deep S4
1203 15:30:43.178913 Disabling Deep S5
1204 15:30:43.178987 Disabling Deep S5
1205 15:30:43.182005 PCI: 00:1f.2 [0000/0000] hidden
1206 15:30:43.185282 PCI: 00:1f.3 [8086/0000] bus ops
1207 15:30:43.188551 PCI: 00:1f.3 [8086/51c8] enabled
1208 15:30:43.192187 PCI: 00:1f.5 [8086/0000] bus ops
1209 15:30:43.195478 PCI: 00:1f.5 [8086/51a4] enabled
1210 15:30:43.198690 GPIO: 0 enabled
1211 15:30:43.202089 PCI: Leftover static devices:
1212 15:30:43.202198 PCI: 00:01.0
1213 15:30:43.205471 PCI: 00:01.1
1214 15:30:43.205553 PCI: 00:05.0
1215 15:30:43.205617 PCI: 00:06.2
1216 15:30:43.208872 PCI: 00:09.0
1217 15:30:43.208954 PCI: 00:0d.1
1218 15:30:43.212262 PCI: 00:0d.2
1219 15:30:43.212344 PCI: 00:0d.3
1220 15:30:43.215398 PCI: 00:0e.0
1221 15:30:43.215480 PCI: 00:10.0
1222 15:30:43.215544 PCI: 00:10.1
1223 15:30:43.218612 PCI: 00:10.6
1224 15:30:43.218693 PCI: 00:10.7
1225 15:30:43.222050 PCI: 00:12.0
1226 15:30:43.222131 PCI: 00:12.6
1227 15:30:43.222196 PCI: 00:12.7
1228 15:30:43.225271 PCI: 00:13.0
1229 15:30:43.225352 PCI: 00:14.1
1230 15:30:43.228639 PCI: 00:16.1
1231 15:30:43.228720 PCI: 00:16.2
1232 15:30:43.231923 PCI: 00:16.3
1233 15:30:43.232005 PCI: 00:16.4
1234 15:30:43.232069 PCI: 00:16.5
1235 15:30:43.235208 PCI: 00:17.0
1236 15:30:43.235333 PCI: 00:19.2
1237 15:30:43.238710 PCI: 00:1a.0
1238 15:30:43.238818 PCI: 00:1e.1
1239 15:30:43.238950 PCI: 00:1e.2
1240 15:30:43.241608 PCI: 00:1f.1
1241 15:30:43.241707 PCI: 00:1f.4
1242 15:30:43.244938 PCI: 00:1f.6
1243 15:30:43.245019 PCI: 00:1f.7
1244 15:30:43.248263 PCI: Check your devicetree.cb.
1245 15:30:43.251969 PCI: 00:02.0 scanning...
1246 15:30:43.254977 scan_generic_bus for PCI: 00:02.0
1247 15:30:43.258426 scan_generic_bus for PCI: 00:02.0 done
1248 15:30:43.261703 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1249 15:30:43.264987 PCI: 00:04.0 scanning...
1250 15:30:43.268282 scan_generic_bus for PCI: 00:04.0
1251 15:30:43.272044 GENERIC: 0.0 enabled
1252 15:30:43.278453 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1253 15:30:43.281766 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1254 15:30:43.285070 PCI: 00:06.0 scanning...
1255 15:30:43.288322 do_pci_scan_bridge for PCI: 00:06.0
1256 15:30:43.291979 PCI: pci_scan_bus for bus 01
1257 15:30:43.295076 PCI: 01:00.0 [15b7/5009] enabled
1258 15:30:43.298328 Enabling Common Clock Configuration
1259 15:30:43.301604 L1 Sub-State supported from root port 6
1260 15:30:43.304952 L1 Sub-State Support = 0x5
1261 15:30:43.308252 CommonModeRestoreTime = 0x6e
1262 15:30:43.311519 Power On Value = 0x5, Power On Scale = 0x2
1263 15:30:43.314815 ASPM: Enabled L1
1264 15:30:43.318025 PCIe: Max_Payload_Size adjusted to 256
1265 15:30:43.321634 PCI: 01:00.0: Enabled LTR
1266 15:30:43.325021 PCI: 01:00.0: Programmed LTR max latencies
1267 15:30:43.328096 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1268 15:30:43.331654 PCI: 00:0d.0 scanning...
1269 15:30:43.334647 scan_static_bus for PCI: 00:0d.0
1270 15:30:43.338162 USB0 port 0 enabled
1271 15:30:43.341213 USB0 port 0 scanning...
1272 15:30:43.344637 scan_static_bus for USB0 port 0
1273 15:30:43.344719 USB3 port 0 enabled
1274 15:30:43.348223 USB3 port 1 disabled
1275 15:30:43.348304 USB3 port 2 enabled
1276 15:30:43.351492 USB3 port 3 disabled
1277 15:30:43.354757 USB3 port 0 scanning...
1278 15:30:43.357819 scan_static_bus for USB3 port 0
1279 15:30:43.361576 scan_static_bus for USB3 port 0 done
1280 15:30:43.365017 scan_bus: bus USB3 port 0 finished in 6 msecs
1281 15:30:43.368259 USB3 port 2 scanning...
1282 15:30:43.371087 scan_static_bus for USB3 port 2
1283 15:30:43.374795 scan_static_bus for USB3 port 2 done
1284 15:30:43.378064 scan_bus: bus USB3 port 2 finished in 6 msecs
1285 15:30:43.384446 scan_static_bus for USB0 port 0 done
1286 15:30:43.387877 scan_bus: bus USB0 port 0 finished in 43 msecs
1287 15:30:43.391328 scan_static_bus for PCI: 00:0d.0 done
1288 15:30:43.397765 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1289 15:30:43.397847 PCI: 00:14.0 scanning...
1290 15:30:43.401143 scan_static_bus for PCI: 00:14.0
1291 15:30:43.404446 USB0 port 0 enabled
1292 15:30:43.407844 USB0 port 0 scanning...
1293 15:30:43.411033 scan_static_bus for USB0 port 0
1294 15:30:43.411113 USB2 port 0 enabled
1295 15:30:43.414772 USB2 port 1 disabled
1296 15:30:43.417926 USB2 port 2 enabled
1297 15:30:43.418007 USB2 port 3 disabled
1298 15:30:43.421361 USB2 port 4 disabled
1299 15:30:43.421443 USB2 port 5 enabled
1300 15:30:43.424381 USB2 port 6 disabled
1301 15:30:43.427566 USB2 port 7 disabled
1302 15:30:43.427648 USB2 port 8 enabled
1303 15:30:43.431192 USB2 port 9 enabled
1304 15:30:43.434315 USB3 port 0 enabled
1305 15:30:43.434396 USB3 port 1 disabled
1306 15:30:43.438002 USB3 port 2 disabled
1307 15:30:43.441013 USB3 port 3 disabled
1308 15:30:43.441095 USB2 port 0 scanning...
1309 15:30:43.444451 scan_static_bus for USB2 port 0
1310 15:30:43.448090 scan_static_bus for USB2 port 0 done
1311 15:30:43.454536 scan_bus: bus USB2 port 0 finished in 6 msecs
1312 15:30:43.457453 USB2 port 2 scanning...
1313 15:30:43.457533 scan_static_bus for USB2 port 2
1314 15:30:43.464410 scan_static_bus for USB2 port 2 done
1315 15:30:43.467676 scan_bus: bus USB2 port 2 finished in 6 msecs
1316 15:30:43.471058 USB2 port 5 scanning...
1317 15:30:43.474250 scan_static_bus for USB2 port 5
1318 15:30:43.477551 scan_static_bus for USB2 port 5 done
1319 15:30:43.480780 scan_bus: bus USB2 port 5 finished in 6 msecs
1320 15:30:43.484428 USB2 port 8 scanning...
1321 15:30:43.487564 scan_static_bus for USB2 port 8
1322 15:30:43.490813 scan_static_bus for USB2 port 8 done
1323 15:30:43.494183 scan_bus: bus USB2 port 8 finished in 6 msecs
1324 15:30:43.497717 USB2 port 9 scanning...
1325 15:30:43.500964 scan_static_bus for USB2 port 9
1326 15:30:43.504025 scan_static_bus for USB2 port 9 done
1327 15:30:43.510946 scan_bus: bus USB2 port 9 finished in 6 msecs
1328 15:30:43.511024 USB3 port 0 scanning...
1329 15:30:43.514407 scan_static_bus for USB3 port 0
1330 15:30:43.517565 scan_static_bus for USB3 port 0 done
1331 15:30:43.524188 scan_bus: bus USB3 port 0 finished in 6 msecs
1332 15:30:43.527227 scan_static_bus for USB0 port 0 done
1333 15:30:43.531026 scan_bus: bus USB0 port 0 finished in 120 msecs
1334 15:30:43.534143 scan_static_bus for PCI: 00:14.0 done
1335 15:30:43.541156 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1336 15:30:43.544348 PCI: 00:14.3 scanning...
1337 15:30:43.547444 scan_static_bus for PCI: 00:14.3
1338 15:30:43.547520 GENERIC: 0.0 enabled
1339 15:30:43.554100 scan_static_bus for PCI: 00:14.3 done
1340 15:30:43.557168 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1341 15:30:43.560527 PCI: 00:15.0 scanning...
1342 15:30:43.563921 scan_static_bus for PCI: 00:15.0
1343 15:30:43.563992 I2C: 00:1a enabled
1344 15:30:43.567193 I2C: 00:31 enabled
1345 15:30:43.567290 I2C: 00:32 enabled
1346 15:30:43.574002 scan_static_bus for PCI: 00:15.0 done
1347 15:30:43.577325 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1348 15:30:43.580663 PCI: 00:15.1 scanning...
1349 15:30:43.583910 scan_static_bus for PCI: 00:15.1
1350 15:30:43.583983 I2C: 00:50 enabled
1351 15:30:43.590467 scan_static_bus for PCI: 00:15.1 done
1352 15:30:43.593790 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1353 15:30:43.597231 PCI: 00:15.3 scanning...
1354 15:30:43.600491 scan_static_bus for PCI: 00:15.3
1355 15:30:43.600559 I2C: 00:10 enabled
1356 15:30:43.603747 scan_static_bus for PCI: 00:15.3 done
1357 15:30:43.610549 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1358 15:30:43.613851 PCI: 00:19.1 scanning...
1359 15:30:43.617257 scan_static_bus for PCI: 00:19.1
1360 15:30:43.617335 I2C: 00:15 enabled
1361 15:30:43.620467 I2C: 00:2c enabled
1362 15:30:43.623720 scan_static_bus for PCI: 00:19.1 done
1363 15:30:43.627077 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1364 15:30:43.630310 PCI: 00:1e.3 scanning...
1365 15:30:43.633920 scan_generic_bus for PCI: 00:1e.3
1366 15:30:43.637142 SPI: 00 enabled
1367 15:30:43.643794 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1368 15:30:43.647144 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1369 15:30:43.650269 PCI: 00:1f.0 scanning...
1370 15:30:43.653501 scan_static_bus for PCI: 00:1f.0
1371 15:30:43.653576 PNP: 0c09.0 enabled
1372 15:30:43.657274 PNP: 0c09.0 scanning...
1373 15:30:43.660101 scan_static_bus for PNP: 0c09.0
1374 15:30:43.663682 scan_static_bus for PNP: 0c09.0 done
1375 15:30:43.670137 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1376 15:30:43.673727 scan_static_bus for PCI: 00:1f.0 done
1377 15:30:43.676901 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1378 15:30:43.680403 PCI: 00:1f.2 scanning...
1379 15:30:43.683792 scan_static_bus for PCI: 00:1f.2
1380 15:30:43.687060 GENERIC: 0.0 enabled
1381 15:30:43.687133 GENERIC: 0.0 scanning...
1382 15:30:43.690317 scan_static_bus for GENERIC: 0.0
1383 15:30:43.693710 GENERIC: 0.0 enabled
1384 15:30:43.696994 GENERIC: 1.0 enabled
1385 15:30:43.700321 scan_static_bus for GENERIC: 0.0 done
1386 15:30:43.703463 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1387 15:30:43.707043 scan_static_bus for PCI: 00:1f.2 done
1388 15:30:43.713727 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1389 15:30:43.716744 PCI: 00:1f.3 scanning...
1390 15:30:43.719922 scan_static_bus for PCI: 00:1f.3
1391 15:30:43.723676 scan_static_bus for PCI: 00:1f.3 done
1392 15:30:43.726924 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1393 15:30:43.730317 PCI: 00:1f.5 scanning...
1394 15:30:43.733569 scan_generic_bus for PCI: 00:1f.5
1395 15:30:43.736610 scan_generic_bus for PCI: 00:1f.5 done
1396 15:30:43.740291 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1397 15:30:43.746619 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1398 15:30:43.750252 scan_static_bus for Root Device done
1399 15:30:43.753337 scan_bus: bus Root Device finished in 729 msecs
1400 15:30:43.756647 done
1401 15:30:43.759918 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1402 15:30:43.766526 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1403 15:30:43.773411 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1404 15:30:43.776809 SPI flash protection: WPSW=0 SRP0=0
1405 15:30:43.783375 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1406 15:30:43.786718 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1407 15:30:43.790024 found VGA at PCI: 00:02.0
1408 15:30:43.793289 Setting up VGA for PCI: 00:02.0
1409 15:30:43.799845 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1410 15:30:43.803214 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1411 15:30:43.806399 Allocating resources...
1412 15:30:43.810089 Reading resources...
1413 15:30:43.813307 Root Device read_resources bus 0 link: 0
1414 15:30:43.816820 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1415 15:30:43.823419 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1416 15:30:43.826478 DOMAIN: 0000 read_resources bus 0 link: 0
1417 15:30:43.833214 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1418 15:30:43.839644 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1419 15:30:43.843021 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1420 15:30:43.849932 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1421 15:30:43.856278 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1422 15:30:43.863200 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1423 15:30:43.869820 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1424 15:30:43.876463 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1425 15:30:43.883034 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1426 15:30:43.889476 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1427 15:30:43.896568 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1428 15:30:43.903097 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1429 15:30:43.909694 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1430 15:30:43.915900 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1431 15:30:43.919178 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1432 15:30:43.926328 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1433 15:30:43.933248 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1434 15:30:43.939313 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1435 15:30:43.945945 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1436 15:30:43.952491 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1437 15:30:43.959284 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1438 15:30:43.962472 PCI: 00:04.0 read_resources bus 1 link: 0
1439 15:30:43.965612 PCI: 00:04.0 read_resources bus 1 link: 0 done
1440 15:30:43.972594 PCI: 00:06.0 read_resources bus 1 link: 0
1441 15:30:43.975483 PCI: 00:06.0 read_resources bus 1 link: 0 done
1442 15:30:43.978915 PCI: 00:0d.0 read_resources bus 0 link: 0
1443 15:30:43.985559 USB0 port 0 read_resources bus 0 link: 0
1444 15:30:43.988973 USB0 port 0 read_resources bus 0 link: 0 done
1445 15:30:43.995447 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1446 15:30:43.998961 PCI: 00:14.0 read_resources bus 0 link: 0
1447 15:30:44.002320 USB0 port 0 read_resources bus 0 link: 0
1448 15:30:44.005574 USB0 port 0 read_resources bus 0 link: 0 done
1449 15:30:44.012248 PCI: 00:14.0 read_resources bus 0 link: 0 done
1450 15:30:44.015604 PCI: 00:14.3 read_resources bus 0 link: 0
1451 15:30:44.022189 PCI: 00:14.3 read_resources bus 0 link: 0 done
1452 15:30:44.025279 PCI: 00:15.0 read_resources bus 0 link: 0
1453 15:30:44.028577 PCI: 00:15.0 read_resources bus 0 link: 0 done
1454 15:30:44.035158 PCI: 00:15.1 read_resources bus 0 link: 0
1455 15:30:44.038404 PCI: 00:15.1 read_resources bus 0 link: 0 done
1456 15:30:44.041940 PCI: 00:15.3 read_resources bus 0 link: 0
1457 15:30:44.048429 PCI: 00:15.3 read_resources bus 0 link: 0 done
1458 15:30:44.051914 PCI: 00:19.1 read_resources bus 0 link: 0
1459 15:30:44.055082 PCI: 00:19.1 read_resources bus 0 link: 0 done
1460 15:30:44.062315 PCI: 00:1e.3 read_resources bus 2 link: 0
1461 15:30:44.065096 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1462 15:30:44.068434 PCI: 00:1f.0 read_resources bus 0 link: 0
1463 15:30:44.075329 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1464 15:30:44.078573 PCI: 00:1f.2 read_resources bus 0 link: 0
1465 15:30:44.081957 GENERIC: 0.0 read_resources bus 0 link: 0
1466 15:30:44.088389 GENERIC: 0.0 read_resources bus 0 link: 0 done
1467 15:30:44.092083 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1468 15:30:44.098464 DOMAIN: 0000 read_resources bus 0 link: 0 done
1469 15:30:44.101538 Root Device read_resources bus 0 link: 0 done
1470 15:30:44.105185 Done reading resources.
1471 15:30:44.112204 Show resources in subtree (Root Device)...After reading.
1472 15:30:44.115519 Root Device child on link 0 CPU_CLUSTER: 0
1473 15:30:44.118763 CPU_CLUSTER: 0 child on link 0 APIC: 00
1474 15:30:44.122154 APIC: 00
1475 15:30:44.122228 APIC: 14
1476 15:30:44.122290 APIC: 16
1477 15:30:44.125479 APIC: 12
1478 15:30:44.125558 APIC: 10
1479 15:30:44.125618 APIC: 09
1480 15:30:44.128627 APIC: 01
1481 15:30:44.128704 APIC: 08
1482 15:30:44.132070 DOMAIN: 0000 child on link 0 GPIO: 0
1483 15:30:44.141514 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1484 15:30:44.151414 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1485 15:30:44.154992 GPIO: 0
1486 15:30:44.155067 PCI: 00:00.0
1487 15:30:44.164800 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1488 15:30:44.175024 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1489 15:30:44.184760 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1490 15:30:44.191117 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1491 15:30:44.201152 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1492 15:30:44.211483 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1493 15:30:44.221291 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1494 15:30:44.231426 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1495 15:30:44.240947 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1496 15:30:44.250907 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1497 15:30:44.257889 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1498 15:30:44.267511 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1499 15:30:44.277365 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1500 15:30:44.287384 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1501 15:30:44.297408 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1502 15:30:44.307564 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1503 15:30:44.313890 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1504 15:30:44.323960 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1505 15:30:44.333935 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1506 15:30:44.344025 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1507 15:30:44.353924 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1508 15:30:44.363525 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1509 15:30:44.373968 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1510 15:30:44.383569 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1511 15:30:44.393496 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1512 15:30:44.400321 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1513 15:30:44.410492 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1514 15:30:44.420023 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1515 15:30:44.423491 PCI: 00:02.0
1516 15:30:44.433177 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1517 15:30:44.443500 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1518 15:30:44.450050 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1519 15:30:44.456708 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1520 15:30:44.466421 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1521 15:30:44.466499 GENERIC: 0.0
1522 15:30:44.473503 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1523 15:30:44.479991 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1524 15:30:44.489878 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1525 15:30:44.500088 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1526 15:30:44.503334 PCI: 01:00.0
1527 15:30:44.513072 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1528 15:30:44.523069 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1529 15:30:44.523147 PCI: 00:08.0
1530 15:30:44.526367 PCI: 00:0a.0
1531 15:30:44.536076 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1532 15:30:44.539376 PCI: 00:0d.0 child on link 0 USB0 port 0
1533 15:30:44.549449 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1534 15:30:44.553192 USB0 port 0 child on link 0 USB3 port 0
1535 15:30:44.556372 USB3 port 0
1536 15:30:44.556444 USB3 port 1
1537 15:30:44.559663 USB3 port 2
1538 15:30:44.559733 USB3 port 3
1539 15:30:44.566154 PCI: 00:14.0 child on link 0 USB0 port 0
1540 15:30:44.576063 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1541 15:30:44.579824 USB0 port 0 child on link 0 USB2 port 0
1542 15:30:44.582939 USB2 port 0
1543 15:30:44.583013 USB2 port 1
1544 15:30:44.586254 USB2 port 2
1545 15:30:44.586320 USB2 port 3
1546 15:30:44.589606 USB2 port 4
1547 15:30:44.589679 USB2 port 5
1548 15:30:44.592948 USB2 port 6
1549 15:30:44.593015 USB2 port 7
1550 15:30:44.596262 USB2 port 8
1551 15:30:44.596327 USB2 port 9
1552 15:30:44.599667 USB3 port 0
1553 15:30:44.599738 USB3 port 1
1554 15:30:44.602832 USB3 port 2
1555 15:30:44.602905 USB3 port 3
1556 15:30:44.606055 PCI: 00:14.2
1557 15:30:44.616023 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1558 15:30:44.625927 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1559 15:30:44.629195 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1560 15:30:44.639365 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 15:30:44.642399 GENERIC: 0.0
1562 15:30:44.646057 PCI: 00:15.0 child on link 0 I2C: 00:1a
1563 15:30:44.656031 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 15:30:44.658915 I2C: 00:1a
1565 15:30:44.659015 I2C: 00:31
1566 15:30:44.662779 I2C: 00:32
1567 15:30:44.666117 PCI: 00:15.1 child on link 0 I2C: 00:50
1568 15:30:44.675806 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 15:30:44.675890 I2C: 00:50
1570 15:30:44.679164 PCI: 00:15.2
1571 15:30:44.682424 PCI: 00:15.3 child on link 0 I2C: 00:10
1572 15:30:44.692673 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 15:30:44.695980 I2C: 00:10
1574 15:30:44.696062 PCI: 00:16.0
1575 15:30:44.705897 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 15:30:44.708940 PCI: 00:19.0
1577 15:30:44.712309 PCI: 00:19.1 child on link 0 I2C: 00:15
1578 15:30:44.722574 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1579 15:30:44.722657 I2C: 00:15
1580 15:30:44.725688 I2C: 00:2c
1581 15:30:44.725770 PCI: 00:1e.0
1582 15:30:44.739115 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1583 15:30:44.742469 PCI: 00:1e.3 child on link 0 SPI: 00
1584 15:30:44.752373 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1585 15:30:44.752458 SPI: 00
1586 15:30:44.759107 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1587 15:30:44.765641 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1588 15:30:44.768716 PNP: 0c09.0
1589 15:30:44.775603 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1590 15:30:44.781918 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1591 15:30:44.792239 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1592 15:30:44.798484 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1593 15:30:44.805563 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1594 15:30:44.805645 GENERIC: 0.0
1595 15:30:44.808881 GENERIC: 1.0
1596 15:30:44.808963 PCI: 00:1f.3
1597 15:30:44.818594 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1598 15:30:44.828665 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1599 15:30:44.832148 PCI: 00:1f.5
1600 15:30:44.842270 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1601 15:30:44.848809 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1602 15:30:44.855319 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1603 15:30:44.858483 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1604 15:30:44.865105 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1605 15:30:44.868407 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1606 15:30:44.875149 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1607 15:30:44.881957 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1608 15:30:44.888253 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1609 15:30:44.894809 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1610 15:30:44.905158 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1611 15:30:44.908339 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1612 15:30:44.918224 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1613 15:30:44.925208 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1614 15:30:44.931785 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1615 15:30:44.935117 DOMAIN: 0000: Resource ranges:
1616 15:30:44.938282 * Base: 1000, Size: 800, Tag: 100
1617 15:30:44.941434 * Base: 1900, Size: e700, Tag: 100
1618 15:30:44.948421 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1619 15:30:44.955039 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1620 15:30:44.961537 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1621 15:30:44.968232 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1622 15:30:44.978207 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1623 15:30:44.984642 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1624 15:30:44.991455 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1625 15:30:45.001358 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1626 15:30:45.007882 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1627 15:30:45.014679 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1628 15:30:45.024597 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1629 15:30:45.030990 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1630 15:30:45.037726 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1631 15:30:45.047555 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1632 15:30:45.054620 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1633 15:30:45.060758 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1634 15:30:45.071105 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1635 15:30:45.077777 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1636 15:30:45.084535 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1637 15:30:45.094269 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1638 15:30:45.100824 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1639 15:30:45.107343 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1640 15:30:45.117155 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1641 15:30:45.124207 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1642 15:30:45.130649 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1643 15:30:45.140760 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1644 15:30:45.146992 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1645 15:30:45.153673 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1646 15:30:45.163687 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1647 15:30:45.170645 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1648 15:30:45.176896 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1649 15:30:45.186924 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1650 15:30:45.193599 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1651 15:30:45.196810 DOMAIN: 0000: Resource ranges:
1652 15:30:45.200113 * Base: 80400000, Size: 3fc00000, Tag: 200
1653 15:30:45.203486 * Base: d0000000, Size: 28000000, Tag: 200
1654 15:30:45.210258 * Base: fa000000, Size: 1000000, Tag: 200
1655 15:30:45.213405 * Base: fb001000, Size: 17ff000, Tag: 200
1656 15:30:45.216981 * Base: fe800000, Size: 300000, Tag: 200
1657 15:30:45.223361 * Base: feb80000, Size: 80000, Tag: 200
1658 15:30:45.226670 * Base: fed00000, Size: 40000, Tag: 200
1659 15:30:45.229993 * Base: fed70000, Size: 10000, Tag: 200
1660 15:30:45.233492 * Base: fed88000, Size: 8000, Tag: 200
1661 15:30:45.236886 * Base: fed93000, Size: d000, Tag: 200
1662 15:30:45.243243 * Base: feda2000, Size: 1e000, Tag: 200
1663 15:30:45.246850 * Base: fede0000, Size: 1220000, Tag: 200
1664 15:30:45.250024 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1665 15:30:45.259928 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1666 15:30:45.266711 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1667 15:30:45.273250 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1668 15:30:45.280009 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1669 15:30:45.286490 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1670 15:30:45.293104 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1671 15:30:45.299657 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1672 15:30:45.306197 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1673 15:30:45.313302 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1674 15:30:45.319814 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1675 15:30:45.326390 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1676 15:30:45.332715 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1677 15:30:45.339586 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1678 15:30:45.345995 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1679 15:30:45.352881 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1680 15:30:45.359594 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1681 15:30:45.366339 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1682 15:30:45.373002 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1683 15:30:45.379517 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1684 15:30:45.385936 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1685 15:30:45.392537 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1686 15:30:45.396012 PCI: 00:06.0: Resource ranges:
1687 15:30:45.399265 * Base: 80400000, Size: 100000, Tag: 200
1688 15:30:45.406017 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1689 15:30:45.412548 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1690 15:30:45.422564 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1691 15:30:45.429183 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1692 15:30:45.435883 Root Device assign_resources, bus 0 link: 0
1693 15:30:45.439030 DOMAIN: 0000 assign_resources, bus 0 link: 0
1694 15:30:45.445442 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1695 15:30:45.455549 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1696 15:30:45.462420 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1697 15:30:45.472312 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1698 15:30:45.475715 PCI: 00:04.0 assign_resources, bus 1 link: 0
1699 15:30:45.478967 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1700 15:30:45.488703 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1701 15:30:45.498701 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1702 15:30:45.508526 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1703 15:30:45.511855 PCI: 00:06.0 assign_resources, bus 1 link: 0
1704 15:30:45.518372 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1705 15:30:45.528592 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1706 15:30:45.531737 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1707 15:30:45.541771 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1708 15:30:45.548423 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1709 15:30:45.551688 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1710 15:30:45.558279 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1711 15:30:45.564771 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1712 15:30:45.571723 PCI: 00:14.0 assign_resources, bus 0 link: 0
1713 15:30:45.574854 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1714 15:30:45.584984 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1715 15:30:45.591208 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1716 15:30:45.598150 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1717 15:30:45.604838 PCI: 00:14.3 assign_resources, bus 0 link: 0
1718 15:30:45.608056 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1719 15:30:45.617935 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1720 15:30:45.621174 PCI: 00:15.0 assign_resources, bus 0 link: 0
1721 15:30:45.627754 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1722 15:30:45.634709 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1723 15:30:45.638074 PCI: 00:15.1 assign_resources, bus 0 link: 0
1724 15:30:45.644640 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1725 15:30:45.651355 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1726 15:30:45.658087 PCI: 00:15.3 assign_resources, bus 0 link: 0
1727 15:30:45.661228 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1728 15:30:45.671142 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1729 15:30:45.677578 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1730 15:30:45.680754 PCI: 00:19.1 assign_resources, bus 0 link: 0
1731 15:30:45.687302 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1732 15:30:45.694445 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1733 15:30:45.701018 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1734 15:30:45.704266 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1735 15:30:45.707322 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1736 15:30:45.713943 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1737 15:30:45.717369 LPC: Trying to open IO window from 800 size 1ff
1738 15:30:45.727121 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1739 15:30:45.734106 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1740 15:30:45.743943 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1741 15:30:45.747095 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1742 15:30:45.753803 Root Device assign_resources, bus 0 link: 0 done
1743 15:30:45.753881 Done setting resources.
1744 15:30:45.760392 Show resources in subtree (Root Device)...After assigning values.
1745 15:30:45.767003 Root Device child on link 0 CPU_CLUSTER: 0
1746 15:30:45.770390 CPU_CLUSTER: 0 child on link 0 APIC: 00
1747 15:30:45.770465 APIC: 00
1748 15:30:45.773631 APIC: 14
1749 15:30:45.773705 APIC: 16
1750 15:30:45.773773 APIC: 12
1751 15:30:45.776980 APIC: 10
1752 15:30:45.777052 APIC: 09
1753 15:30:45.780208 APIC: 01
1754 15:30:45.780281 APIC: 08
1755 15:30:45.783622 DOMAIN: 0000 child on link 0 GPIO: 0
1756 15:30:45.793290 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1757 15:30:45.803474 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1758 15:30:45.803552 GPIO: 0
1759 15:30:45.806839 PCI: 00:00.0
1760 15:30:45.816811 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1761 15:30:45.826574 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1762 15:30:45.832923 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1763 15:30:45.843049 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1764 15:30:45.853072 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1765 15:30:45.862822 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1766 15:30:45.873157 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1767 15:30:45.882867 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1768 15:30:45.889681 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1769 15:30:45.899699 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1770 15:30:45.909513 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1771 15:30:45.919365 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1772 15:30:45.929328 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1773 15:30:45.939400 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1774 15:30:45.946003 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1775 15:30:45.955897 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1776 15:30:45.965908 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1777 15:30:45.975632 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1778 15:30:45.985553 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1779 15:30:45.995771 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1780 15:30:46.005754 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1781 15:30:46.015527 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1782 15:30:46.022094 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1783 15:30:46.032550 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1784 15:30:46.042065 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1785 15:30:46.052196 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1786 15:30:46.061912 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1787 15:30:46.071800 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1788 15:30:46.071880 PCI: 00:02.0
1789 15:30:46.085293 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1790 15:30:46.095146 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1791 15:30:46.104911 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1792 15:30:46.108287 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1793 15:30:46.118149 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1794 15:30:46.121532 GENERIC: 0.0
1795 15:30:46.124810 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1796 15:30:46.134757 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1797 15:30:46.144631 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1798 15:30:46.158273 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1799 15:30:46.158386 PCI: 01:00.0
1800 15:30:46.167886 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1801 15:30:46.177779 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1802 15:30:46.181139 PCI: 00:08.0
1803 15:30:46.181243 PCI: 00:0a.0
1804 15:30:46.191157 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1805 15:30:46.197691 PCI: 00:0d.0 child on link 0 USB0 port 0
1806 15:30:46.207894 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1807 15:30:46.210948 USB0 port 0 child on link 0 USB3 port 0
1808 15:30:46.214232 USB3 port 0
1809 15:30:46.214332 USB3 port 1
1810 15:30:46.217638 USB3 port 2
1811 15:30:46.217741 USB3 port 3
1812 15:30:46.224325 PCI: 00:14.0 child on link 0 USB0 port 0
1813 15:30:46.234145 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1814 15:30:46.237481 USB0 port 0 child on link 0 USB2 port 0
1815 15:30:46.240727 USB2 port 0
1816 15:30:46.240828 USB2 port 1
1817 15:30:46.244160 USB2 port 2
1818 15:30:46.244233 USB2 port 3
1819 15:30:46.247503 USB2 port 4
1820 15:30:46.247583 USB2 port 5
1821 15:30:46.251080 USB2 port 6
1822 15:30:46.251156 USB2 port 7
1823 15:30:46.254277 USB2 port 8
1824 15:30:46.257521 USB2 port 9
1825 15:30:46.257624 USB3 port 0
1826 15:30:46.260848 USB3 port 1
1827 15:30:46.260953 USB3 port 2
1828 15:30:46.264079 USB3 port 3
1829 15:30:46.264180 PCI: 00:14.2
1830 15:30:46.274364 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1831 15:30:46.284059 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1832 15:30:46.290685 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1833 15:30:46.300408 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1834 15:30:46.300514 GENERIC: 0.0
1835 15:30:46.307272 PCI: 00:15.0 child on link 0 I2C: 00:1a
1836 15:30:46.316976 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1837 15:30:46.317083 I2C: 00:1a
1838 15:30:46.320242 I2C: 00:31
1839 15:30:46.320320 I2C: 00:32
1840 15:30:46.326834 PCI: 00:15.1 child on link 0 I2C: 00:50
1841 15:30:46.336750 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1842 15:30:46.336859 I2C: 00:50
1843 15:30:46.340311 PCI: 00:15.2
1844 15:30:46.343207 PCI: 00:15.3 child on link 0 I2C: 00:10
1845 15:30:46.353563 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1846 15:30:46.356400 I2C: 00:10
1847 15:30:46.356504 PCI: 00:16.0
1848 15:30:46.366269 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1849 15:30:46.369584 PCI: 00:19.0
1850 15:30:46.372864 PCI: 00:19.1 child on link 0 I2C: 00:15
1851 15:30:46.383022 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1852 15:30:46.386619 I2C: 00:15
1853 15:30:46.386727 I2C: 00:2c
1854 15:30:46.389458 PCI: 00:1e.0
1855 15:30:46.399720 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1856 15:30:46.403090 PCI: 00:1e.3 child on link 0 SPI: 00
1857 15:30:46.412601 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1858 15:30:46.415957 SPI: 00
1859 15:30:46.419210 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1860 15:30:46.429330 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1861 15:30:46.429438 PNP: 0c09.0
1862 15:30:46.439277 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1863 15:30:46.442582 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1864 15:30:46.452613 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1865 15:30:46.462147 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1866 15:30:46.465489 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1867 15:30:46.468884 GENERIC: 0.0
1868 15:30:46.468961 GENERIC: 1.0
1869 15:30:46.472258 PCI: 00:1f.3
1870 15:30:46.482607 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1871 15:30:46.492014 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1872 15:30:46.495840 PCI: 00:1f.5
1873 15:30:46.505622 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1874 15:30:46.508548 Done allocating resources.
1875 15:30:46.515283 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1876 15:30:46.518640 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1877 15:30:46.525255 Configure audio over I2S with MAX98373 NAU88L25B.
1878 15:30:46.528585 Enabling BT offload
1879 15:30:46.536055 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1880 15:30:46.539179 Enabling resources...
1881 15:30:46.542336 PCI: 00:00.0 subsystem <- 8086/4609
1882 15:30:46.545842 PCI: 00:00.0 cmd <- 06
1883 15:30:46.548926 PCI: 00:02.0 subsystem <- 8086/46b3
1884 15:30:46.552579 PCI: 00:02.0 cmd <- 03
1885 15:30:46.555866 PCI: 00:04.0 subsystem <- 8086/461d
1886 15:30:46.555970 PCI: 00:04.0 cmd <- 02
1887 15:30:46.559075 PCI: 00:06.0 bridge ctrl <- 0013
1888 15:30:46.562274 PCI: 00:06.0 subsystem <- 8086/464d
1889 15:30:46.565993 PCI: 00:06.0 cmd <- 106
1890 15:30:46.568789 PCI: 00:0a.0 subsystem <- 8086/467d
1891 15:30:46.572312 PCI: 00:0a.0 cmd <- 02
1892 15:30:46.575511 PCI: 00:0d.0 subsystem <- 8086/461e
1893 15:30:46.578876 PCI: 00:0d.0 cmd <- 02
1894 15:30:46.582231 PCI: 00:14.0 subsystem <- 8086/51ed
1895 15:30:46.585429 PCI: 00:14.0 cmd <- 02
1896 15:30:46.588713 PCI: 00:14.2 subsystem <- 8086/51ef
1897 15:30:46.588814 PCI: 00:14.2 cmd <- 02
1898 15:30:46.595636 PCI: 00:14.3 subsystem <- 8086/51f0
1899 15:30:46.595712 PCI: 00:14.3 cmd <- 02
1900 15:30:46.598549 PCI: 00:15.0 subsystem <- 8086/51e8
1901 15:30:46.601883 PCI: 00:15.0 cmd <- 02
1902 15:30:46.605281 PCI: 00:15.1 subsystem <- 8086/51e9
1903 15:30:46.608523 PCI: 00:15.1 cmd <- 06
1904 15:30:46.611775 PCI: 00:15.3 subsystem <- 8086/51eb
1905 15:30:46.615134 PCI: 00:15.3 cmd <- 02
1906 15:30:46.618616 PCI: 00:16.0 subsystem <- 8086/51e0
1907 15:30:46.621911 PCI: 00:16.0 cmd <- 02
1908 15:30:46.625150 PCI: 00:19.1 subsystem <- 8086/51c6
1909 15:30:46.625226 PCI: 00:19.1 cmd <- 02
1910 15:30:46.628537 PCI: 00:1e.0 subsystem <- 8086/51a8
1911 15:30:46.631770 PCI: 00:1e.0 cmd <- 06
1912 15:30:46.635062 PCI: 00:1e.3 subsystem <- 8086/51ab
1913 15:30:46.638513 PCI: 00:1e.3 cmd <- 02
1914 15:30:46.641865 PCI: 00:1f.0 subsystem <- 8086/5182
1915 15:30:46.644976 PCI: 00:1f.0 cmd <- 407
1916 15:30:46.648119 PCI: 00:1f.3 subsystem <- 8086/51c8
1917 15:30:46.651645 PCI: 00:1f.3 cmd <- 02
1918 15:30:46.654842 PCI: 00:1f.5 subsystem <- 8086/51a4
1919 15:30:46.654977 PCI: 00:1f.5 cmd <- 406
1920 15:30:46.658090 PCI: 01:00.0 cmd <- 02
1921 15:30:46.658191 done.
1922 15:30:46.664781 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1923 15:30:46.668483 ME: Version: Unavailable
1924 15:30:46.671415 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1925 15:30:46.674728 Initializing devices...
1926 15:30:46.677939 Root Device init
1927 15:30:46.678041 mainboard: EC init
1928 15:30:46.684585 Chrome EC: Set SMI mask to 0x0000000000000000
1929 15:30:46.688013 Chrome EC: UHEPI supported
1930 15:30:46.694548 Chrome EC: clear events_b mask to 0x0000000000000000
1931 15:30:46.700975 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1932 15:30:46.707828 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1933 15:30:46.714471 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1934 15:30:46.717822 Chrome EC: Set WAKE mask to 0x0000000000000000
1935 15:30:46.726020 Root Device init finished in 43 msecs
1936 15:30:46.726125 PCI: 00:00.0 init
1937 15:30:46.729527 CPU TDP = 15 Watts
1938 15:30:46.732595 CPU PL1 = 15 Watts
1939 15:30:46.732694 CPU PL2 = 55 Watts
1940 15:30:46.736006 CPU PL4 = 123 Watts
1941 15:30:46.739271 PCI: 00:00.0 init finished in 8 msecs
1942 15:30:46.742506 PCI: 00:02.0 init
1943 15:30:46.742607 GMA: Found VBT in CBFS
1944 15:30:46.745653 GMA: Found valid VBT in CBFS
1945 15:30:46.752529 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1946 15:30:46.759228 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1947 15:30:46.762557 PCI: 00:02.0 init finished in 18 msecs
1948 15:30:46.765920 PCI: 00:06.0 init
1949 15:30:46.769058 Initializing PCH PCIe bridge.
1950 15:30:46.772282 PCI: 00:06.0 init finished in 3 msecs
1951 15:30:46.775863 PCI: 00:0a.0 init
1952 15:30:46.779066 PCI: 00:0a.0 init finished in 0 msecs
1953 15:30:46.779139 PCI: 00:14.0 init
1954 15:30:46.782028 PCI: 00:14.0 init finished in 0 msecs
1955 15:30:46.785292 PCI: 00:14.2 init
1956 15:30:46.788998 PCI: 00:14.2 init finished in 0 msecs
1957 15:30:46.792211 PCI: 00:15.0 init
1958 15:30:46.795317 I2C bus 0 version 0x3230302a
1959 15:30:46.798690 DW I2C bus 0 at 0x80655000 (400 KHz)
1960 15:30:46.802342 PCI: 00:15.0 init finished in 6 msecs
1961 15:30:46.802438 PCI: 00:15.1 init
1962 15:30:46.805323 I2C bus 1 version 0x3230302a
1963 15:30:46.808522 DW I2C bus 1 at 0x80656000 (400 KHz)
1964 15:30:46.815271 PCI: 00:15.1 init finished in 6 msecs
1965 15:30:46.815349 PCI: 00:15.3 init
1966 15:30:46.818705 I2C bus 3 version 0x3230302a
1967 15:30:46.821925 DW I2C bus 3 at 0x80657000 (400 KHz)
1968 15:30:46.825093 PCI: 00:15.3 init finished in 6 msecs
1969 15:30:46.828673 PCI: 00:16.0 init
1970 15:30:46.831749 PCI: 00:16.0 init finished in 0 msecs
1971 15:30:46.835026 PCI: 00:19.1 init
1972 15:30:46.838540 I2C bus 5 version 0x3230302a
1973 15:30:46.841727 DW I2C bus 5 at 0x80659000 (400 KHz)
1974 15:30:46.844892 PCI: 00:19.1 init finished in 6 msecs
1975 15:30:46.844969 PCI: 00:1f.0 init
1976 15:30:46.851505 IOAPIC: Initializing IOAPIC at 0xfec00000
1977 15:30:46.851612 IOAPIC: ID = 0x02
1978 15:30:46.854791 IOAPIC: Dumping registers
1979 15:30:46.858076 reg 0x0000: 0x02000000
1980 15:30:46.861566 reg 0x0001: 0x00770020
1981 15:30:46.861667 reg 0x0002: 0x00000000
1982 15:30:46.864747 IOAPIC: 120 interrupts
1983 15:30:46.867890 IOAPIC: Clearing IOAPIC at 0xfec00000
1984 15:30:46.874730 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1985 15:30:46.877935 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1986 15:30:46.884487 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1987 15:30:46.887864 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1988 15:30:46.891692 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1989 15:30:46.898079 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1990 15:30:46.901347 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1991 15:30:46.907994 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1992 15:30:46.911305 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1993 15:30:46.917710 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1994 15:30:46.921071 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1995 15:30:46.927680 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1996 15:30:46.930872 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1997 15:30:46.934445 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1998 15:30:46.941060 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1999 15:30:46.944372 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2000 15:30:46.950871 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2001 15:30:46.954345 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2002 15:30:46.960828 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2003 15:30:46.964126 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2004 15:30:46.970592 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2005 15:30:46.974396 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2006 15:30:46.980954 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2007 15:30:46.984087 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2008 15:30:46.987171 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2009 15:30:46.994282 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2010 15:30:46.997478 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2011 15:30:47.004237 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2012 15:30:47.007434 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2013 15:30:47.014120 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2014 15:30:47.017332 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2015 15:30:47.020664 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2016 15:30:47.027204 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2017 15:30:47.030473 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2018 15:30:47.037368 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2019 15:30:47.040594 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2020 15:30:47.047204 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2021 15:30:47.050533 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2022 15:30:47.057166 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2023 15:30:47.060780 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2024 15:30:47.064043 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2025 15:30:47.070799 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2026 15:30:47.073672 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2027 15:30:47.080722 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2028 15:30:47.083796 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2029 15:30:47.090238 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2030 15:30:47.093837 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2031 15:30:47.100198 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2032 15:30:47.103759 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2033 15:30:47.107056 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2034 15:30:47.113792 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2035 15:30:47.117067 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2036 15:30:47.123657 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2037 15:30:47.126829 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2038 15:30:47.133398 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2039 15:30:47.136625 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2040 15:30:47.143330 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2041 15:30:47.146442 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2042 15:30:47.150240 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2043 15:30:47.156441 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2044 15:30:47.160140 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2045 15:30:47.166476 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2046 15:30:47.169766 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2047 15:30:47.176332 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2048 15:30:47.179686 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2049 15:30:47.186335 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2050 15:30:47.189949 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2051 15:30:47.196595 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2052 15:30:47.199441 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2053 15:30:47.202744 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2054 15:30:47.209451 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2055 15:30:47.212700 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2056 15:30:47.219818 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2057 15:30:47.222537 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2058 15:30:47.229331 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2059 15:30:47.232740 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2060 15:30:47.239450 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2061 15:30:47.242676 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2062 15:30:47.245936 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2063 15:30:47.252859 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2064 15:30:47.256057 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2065 15:30:47.262433 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2066 15:30:47.265865 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2067 15:30:47.272334 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2068 15:30:47.275537 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2069 15:30:47.282195 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2070 15:30:47.285419 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2071 15:30:47.288863 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2072 15:30:47.295428 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2073 15:30:47.298718 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2074 15:30:47.305334 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2075 15:30:47.308638 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2076 15:30:47.315604 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2077 15:30:47.318700 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2078 15:30:47.325195 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2079 15:30:47.328409 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2080 15:30:47.335362 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2081 15:30:47.338839 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2082 15:30:47.342139 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2083 15:30:47.348654 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2084 15:30:47.351986 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2085 15:30:47.358362 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2086 15:30:47.361547 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2087 15:30:47.368472 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2088 15:30:47.371633 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2089 15:30:47.378366 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2090 15:30:47.381358 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2091 15:30:47.384796 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2092 15:30:47.391551 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2093 15:30:47.395110 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2094 15:30:47.401449 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2095 15:30:47.404653 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2096 15:30:47.411300 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2097 15:30:47.414516 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2098 15:30:47.421128 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2099 15:30:47.424632 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2100 15:30:47.428110 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2101 15:30:47.434617 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2102 15:30:47.437924 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2103 15:30:47.444420 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2104 15:30:47.447701 IOAPIC: Bootstrap Processor Local APIC = 0x00
2105 15:30:47.454257 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2106 15:30:47.457548 PCI: 00:1f.0 init finished in 607 msecs
2107 15:30:47.460820 PCI: 00:1f.2 init
2108 15:30:47.460924 apm_control: Disabling ACPI.
2109 15:30:47.466227 APMC done.
2110 15:30:47.469727 PCI: 00:1f.2 init finished in 6 msecs
2111 15:30:47.472826 PCI: 00:1f.3 init
2112 15:30:47.476368 PCI: 00:1f.3 init finished in 0 msecs
2113 15:30:47.476441 PCI: 01:00.0 init
2114 15:30:47.479704 PCI: 01:00.0 init finished in 0 msecs
2115 15:30:47.482963 PNP: 0c09.0 init
2116 15:30:47.486228 Google Chrome EC uptime: 12.144 seconds
2117 15:30:47.492586 Google Chrome AP resets since EC boot: 1
2118 15:30:47.495917 Google Chrome most recent AP reset causes:
2119 15:30:47.499491 0.341: 32775 shutdown: entering G3
2120 15:30:47.505867 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2121 15:30:47.509169 PNP: 0c09.0 init finished in 23 msecs
2122 15:30:47.512747 GENERIC: 0.0 init
2123 15:30:47.515950 GENERIC: 0.0 init finished in 0 msecs
2124 15:30:47.516027 GENERIC: 1.0 init
2125 15:30:47.522473 GENERIC: 1.0 init finished in 0 msecs
2126 15:30:47.522546 Devices initialized
2127 15:30:47.525595 Show all devs... After init.
2128 15:30:47.528920 Root Device: enabled 1
2129 15:30:47.532831 CPU_CLUSTER: 0: enabled 1
2130 15:30:47.532903 DOMAIN: 0000: enabled 1
2131 15:30:47.536065 GPIO: 0: enabled 1
2132 15:30:47.539156 PCI: 00:00.0: enabled 1
2133 15:30:47.539227 PCI: 00:01.0: enabled 0
2134 15:30:47.542341 PCI: 00:01.1: enabled 0
2135 15:30:47.545801 PCI: 00:02.0: enabled 1
2136 15:30:47.549084 PCI: 00:04.0: enabled 1
2137 15:30:47.549166 PCI: 00:05.0: enabled 0
2138 15:30:47.552492 PCI: 00:06.0: enabled 1
2139 15:30:47.555427 PCI: 00:06.2: enabled 0
2140 15:30:47.558710 PCI: 00:07.0: enabled 0
2141 15:30:47.558786 PCI: 00:07.1: enabled 0
2142 15:30:47.562008 PCI: 00:07.2: enabled 0
2143 15:30:47.565418 PCI: 00:07.3: enabled 0
2144 15:30:47.568783 PCI: 00:08.0: enabled 0
2145 15:30:47.568852 PCI: 00:09.0: enabled 0
2146 15:30:47.571962 PCI: 00:0a.0: enabled 1
2147 15:30:47.575184 PCI: 00:0d.0: enabled 1
2148 15:30:47.575261 PCI: 00:0d.1: enabled 0
2149 15:30:47.579036 PCI: 00:0d.2: enabled 0
2150 15:30:47.582002 PCI: 00:0d.3: enabled 0
2151 15:30:47.585592 PCI: 00:0e.0: enabled 0
2152 15:30:47.585665 PCI: 00:10.0: enabled 0
2153 15:30:47.588771 PCI: 00:10.1: enabled 0
2154 15:30:47.591920 PCI: 00:10.6: enabled 0
2155 15:30:47.595293 PCI: 00:10.7: enabled 0
2156 15:30:47.595366 PCI: 00:12.0: enabled 0
2157 15:30:47.598429 PCI: 00:12.6: enabled 0
2158 15:30:47.602107 PCI: 00:12.7: enabled 0
2159 15:30:47.605347 PCI: 00:13.0: enabled 0
2160 15:30:47.605452 PCI: 00:14.0: enabled 1
2161 15:30:47.608681 PCI: 00:14.1: enabled 0
2162 15:30:47.611918 PCI: 00:14.2: enabled 1
2163 15:30:47.615248 PCI: 00:14.3: enabled 1
2164 15:30:47.615321 PCI: 00:15.0: enabled 1
2165 15:30:47.619000 PCI: 00:15.1: enabled 1
2166 15:30:47.621969 PCI: 00:15.2: enabled 0
2167 15:30:47.624881 PCI: 00:15.3: enabled 1
2168 15:30:47.624959 PCI: 00:16.0: enabled 1
2169 15:30:47.628429 PCI: 00:16.1: enabled 0
2170 15:30:47.631666 PCI: 00:16.2: enabled 0
2171 15:30:47.631746 PCI: 00:16.3: enabled 0
2172 15:30:47.635026 PCI: 00:16.4: enabled 0
2173 15:30:47.638390 PCI: 00:16.5: enabled 0
2174 15:30:47.641817 PCI: 00:17.0: enabled 0
2175 15:30:47.641895 PCI: 00:19.0: enabled 0
2176 15:30:47.645149 PCI: 00:19.1: enabled 1
2177 15:30:47.648440 PCI: 00:19.2: enabled 0
2178 15:30:47.651751 PCI: 00:1a.0: enabled 0
2179 15:30:47.651850 PCI: 00:1c.0: enabled 0
2180 15:30:47.655152 PCI: 00:1c.1: enabled 0
2181 15:30:47.658436 PCI: 00:1c.2: enabled 0
2182 15:30:47.661594 PCI: 00:1c.3: enabled 0
2183 15:30:47.661672 PCI: 00:1c.4: enabled 0
2184 15:30:47.665136 PCI: 00:1c.5: enabled 0
2185 15:30:47.668309 PCI: 00:1c.6: enabled 0
2186 15:30:47.668387 PCI: 00:1c.7: enabled 0
2187 15:30:47.671398 PCI: 00:1d.0: enabled 0
2188 15:30:47.674983 PCI: 00:1d.1: enabled 0
2189 15:30:47.678209 PCI: 00:1d.2: enabled 0
2190 15:30:47.678283 PCI: 00:1d.3: enabled 0
2191 15:30:47.681611 PCI: 00:1e.0: enabled 1
2192 15:30:47.684892 PCI: 00:1e.1: enabled 0
2193 15:30:47.688193 PCI: 00:1e.2: enabled 0
2194 15:30:47.688268 PCI: 00:1e.3: enabled 1
2195 15:30:47.691466 PCI: 00:1f.0: enabled 1
2196 15:30:47.694872 PCI: 00:1f.1: enabled 0
2197 15:30:47.698144 PCI: 00:1f.2: enabled 1
2198 15:30:47.698216 PCI: 00:1f.3: enabled 1
2199 15:30:47.701134 PCI: 00:1f.4: enabled 0
2200 15:30:47.704658 PCI: 00:1f.5: enabled 1
2201 15:30:47.707990 PCI: 00:1f.6: enabled 0
2202 15:30:47.708062 PCI: 00:1f.7: enabled 0
2203 15:30:47.711202 GENERIC: 0.0: enabled 1
2204 15:30:47.714580 GENERIC: 0.0: enabled 1
2205 15:30:47.718148 GENERIC: 1.0: enabled 1
2206 15:30:47.718217 GENERIC: 0.0: enabled 1
2207 15:30:47.720979 GENERIC: 1.0: enabled 1
2208 15:30:47.724769 USB0 port 0: enabled 1
2209 15:30:47.724843 USB0 port 0: enabled 1
2210 15:30:47.727869 GENERIC: 0.0: enabled 1
2211 15:30:47.731238 I2C: 00:1a: enabled 1
2212 15:30:47.734183 I2C: 00:31: enabled 1
2213 15:30:47.734281 I2C: 00:32: enabled 1
2214 15:30:47.737712 I2C: 00:50: enabled 1
2215 15:30:47.741434 I2C: 00:10: enabled 1
2216 15:30:47.741507 I2C: 00:15: enabled 1
2217 15:30:47.744279 I2C: 00:2c: enabled 1
2218 15:30:47.747876 GENERIC: 0.0: enabled 1
2219 15:30:47.747951 SPI: 00: enabled 1
2220 15:30:47.751069 PNP: 0c09.0: enabled 1
2221 15:30:47.754457 GENERIC: 0.0: enabled 1
2222 15:30:47.754527 USB3 port 0: enabled 1
2223 15:30:47.757679 USB3 port 1: enabled 0
2224 15:30:47.760970 USB3 port 2: enabled 1
2225 15:30:47.764338 USB3 port 3: enabled 0
2226 15:30:47.764406 USB2 port 0: enabled 1
2227 15:30:47.767735 USB2 port 1: enabled 0
2228 15:30:47.770871 USB2 port 2: enabled 1
2229 15:30:47.770979 USB2 port 3: enabled 0
2230 15:30:47.774381 USB2 port 4: enabled 0
2231 15:30:47.777722 USB2 port 5: enabled 1
2232 15:30:47.777792 USB2 port 6: enabled 0
2233 15:30:47.781240 USB2 port 7: enabled 0
2234 15:30:47.784467 USB2 port 8: enabled 1
2235 15:30:47.787814 USB2 port 9: enabled 1
2236 15:30:47.787900 USB3 port 0: enabled 1
2237 15:30:47.791008 USB3 port 1: enabled 0
2238 15:30:47.794399 USB3 port 2: enabled 0
2239 15:30:47.794472 USB3 port 3: enabled 0
2240 15:30:47.797559 GENERIC: 0.0: enabled 1
2241 15:30:47.800916 GENERIC: 1.0: enabled 1
2242 15:30:47.800989 APIC: 00: enabled 1
2243 15:30:47.804157 APIC: 14: enabled 1
2244 15:30:47.807650 APIC: 16: enabled 1
2245 15:30:47.807725 APIC: 12: enabled 1
2246 15:30:47.811056 APIC: 10: enabled 1
2247 15:30:47.814223 APIC: 09: enabled 1
2248 15:30:47.814331 APIC: 01: enabled 1
2249 15:30:47.817631 APIC: 08: enabled 1
2250 15:30:47.820826 PCI: 01:00.0: enabled 1
2251 15:30:47.824039 BS: BS_DEV_INIT run times (exec / console): 13 / 1133 ms
2252 15:30:47.831017 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2253 15:30:47.834073 ELOG: NV offset 0xf20000 size 0x4000
2254 15:30:47.840861 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2255 15:30:47.847373 ELOG: Event(17) added with size 13 at 2023-09-13 15:30:47 UTC
2256 15:30:47.853979 ELOG: Event(9E) added with size 10 at 2023-09-13 15:30:47 UTC
2257 15:30:47.860903 ELOG: Event(9F) added with size 14 at 2023-09-13 15:30:47 UTC
2258 15:30:47.867235 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2259 15:30:47.873614 ELOG: Event(A0) added with size 9 at 2023-09-13 15:30:47 UTC
2260 15:30:47.876997 elog_add_boot_reason: Logged dev mode boot
2261 15:30:47.883901 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2262 15:30:47.884000 Finalize devices...
2263 15:30:47.887179 PCI: 00:16.0 final
2264 15:30:47.890556 PCI: 00:1f.2 final
2265 15:30:47.890636 GENERIC: 0.0 final
2266 15:30:47.897165 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2267 15:30:47.900430 GENERIC: 1.0 final
2268 15:30:47.903850 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2269 15:30:47.906865 Devices finalized
2270 15:30:47.913743 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2271 15:30:47.916937 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2272 15:30:47.923760 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2273 15:30:47.927021 ME: HFSTS1 : 0x90000245
2274 15:30:47.933622 ME: HFSTS2 : 0x82100116
2275 15:30:47.936982 ME: HFSTS3 : 0x00000050
2276 15:30:47.943523 ME: HFSTS4 : 0x00004000
2277 15:30:47.946822 ME: HFSTS5 : 0x00000000
2278 15:30:47.950238 ME: HFSTS6 : 0x40600006
2279 15:30:47.953683 ME: Manufacturing Mode : NO
2280 15:30:47.960136 ME: SPI Protection Mode Enabled : YES
2281 15:30:47.963248 ME: FPFs Committed : YES
2282 15:30:47.966812 ME: Manufacturing Vars Locked : YES
2283 15:30:47.970342 ME: FW Partition Table : OK
2284 15:30:47.973434 ME: Bringup Loader Failure : NO
2285 15:30:47.976543 ME: Firmware Init Complete : YES
2286 15:30:47.980032 ME: Boot Options Present : NO
2287 15:30:47.983266 ME: Update In Progress : NO
2288 15:30:47.989898 ME: D0i3 Support : YES
2289 15:30:47.993174 ME: Low Power State Enabled : NO
2290 15:30:47.996582 ME: CPU Replaced : YES
2291 15:30:47.999884 ME: CPU Replacement Valid : YES
2292 15:30:48.003105 ME: Current Working State : 5
2293 15:30:48.006430 ME: Current Operation State : 1
2294 15:30:48.009820 ME: Current Operation Mode : 0
2295 15:30:48.013314 ME: Error Code : 0
2296 15:30:48.016760 ME: Enhanced Debug Mode : NO
2297 15:30:48.023261 ME: CPU Debug Disabled : YES
2298 15:30:48.026304 ME: TXT Support : NO
2299 15:30:48.029643 ME: WP for RO is enabled : YES
2300 15:30:48.036494 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2301 15:30:48.042933 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2302 15:30:48.046147 Ramoops buffer: 0x100000@0x76899000.
2303 15:30:48.049550 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2304 15:30:48.059792 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2305 15:30:48.062640 CBFS: 'fallback/slic' not found.
2306 15:30:48.065900 ACPI: Writing ACPI tables at 7686d000.
2307 15:30:48.065982 ACPI: * FACS
2308 15:30:48.069249 ACPI: * DSDT
2309 15:30:48.075840 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2310 15:30:48.078989 ACPI: * FADT
2311 15:30:48.079097 SCI is IRQ9
2312 15:30:48.085765 ACPI: added table 1/32, length now 40
2313 15:30:48.085846 ACPI: * SSDT
2314 15:30:48.092211 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2315 15:30:48.095473 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2316 15:30:48.102161 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2317 15:30:48.105769 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2318 15:30:48.112387 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2319 15:30:48.115555 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2320 15:30:48.122030 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2321 15:30:48.128724 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2322 15:30:48.132264 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2323 15:30:48.138505 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2324 15:30:48.141883 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2325 15:30:48.148475 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2326 15:30:48.151686 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2327 15:30:48.158405 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2328 15:30:48.164987 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2329 15:30:48.168323 PS2K: Passing 80 keymaps to kernel
2330 15:30:48.174953 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2331 15:30:48.181540 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2332 15:30:48.188110 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2333 15:30:48.195067 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2334 15:30:48.198412 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2335 15:30:48.204740 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2336 15:30:48.211576 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2337 15:30:48.217985 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2338 15:30:48.224682 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2339 15:30:48.231224 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2340 15:30:48.234770 ACPI: added table 2/32, length now 44
2341 15:30:48.237906 ACPI: * MCFG
2342 15:30:48.241352 ACPI: added table 3/32, length now 48
2343 15:30:48.241528 ACPI: * TPM2
2344 15:30:48.244425 TPM2 log created at 0x7685d000
2345 15:30:48.247679 ACPI: added table 4/32, length now 52
2346 15:30:48.251082 ACPI: * LPIT
2347 15:30:48.254511 ACPI: added table 5/32, length now 56
2348 15:30:48.257720 ACPI: * MADT
2349 15:30:48.257921 SCI is IRQ9
2350 15:30:48.260879 ACPI: added table 6/32, length now 60
2351 15:30:48.264177 cmd_reg from pmc_make_ipc_cmd 1052838
2352 15:30:48.271634 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2353 15:30:48.277917 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2354 15:30:48.284735 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2355 15:30:48.287986 PMC CrashLog size in discovery mode: 0xC00
2356 15:30:48.291387 cpu crashlog bar addr: 0x80640000
2357 15:30:48.294362 cpu discovery table offset: 0x6030
2358 15:30:48.300967 cpu_crashlog_discovery_table buffer count: 0x3
2359 15:30:48.308013 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2360 15:30:48.314386 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2361 15:30:48.320978 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2362 15:30:48.324208 PMC crashLog size in discovery mode : 0xC00
2363 15:30:48.330969 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2364 15:30:48.337421 discover mode PMC crashlog size adjusted to: 0x200
2365 15:30:48.344591 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2366 15:30:48.347300 discover mode PMC crashlog size adjusted to: 0x0
2367 15:30:48.350772 m_cpu_crashLog_size : 0x3480 bytes
2368 15:30:48.353908 CPU crashLog present.
2369 15:30:48.357285 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2370 15:30:48.367505 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2371 15:30:48.368007 current = 76876550
2372 15:30:48.370331 ACPI: * DMAR
2373 15:30:48.374293 ACPI: added table 7/32, length now 64
2374 15:30:48.377061 ACPI: added table 8/32, length now 68
2375 15:30:48.377524 ACPI: * HPET
2376 15:30:48.384183 ACPI: added table 9/32, length now 72
2377 15:30:48.384680 ACPI: done.
2378 15:30:48.387461 ACPI tables: 38528 bytes.
2379 15:30:48.390660 smbios_write_tables: 76857000
2380 15:30:48.394113 EC returned error result code 3
2381 15:30:48.397412 Couldn't obtain OEM name from CBI
2382 15:30:48.400845 Create SMBIOS type 16
2383 15:30:48.401326 Create SMBIOS type 17
2384 15:30:48.404034 Create SMBIOS type 20
2385 15:30:48.407315 GENERIC: 0.0 (WIFI Device)
2386 15:30:48.410777 SMBIOS tables: 2156 bytes.
2387 15:30:48.413931 Writing table forward entry at 0x00000500
2388 15:30:48.420749 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2389 15:30:48.423995 Writing coreboot table at 0x76891000
2390 15:30:48.430596 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2391 15:30:48.433623 1. 0000000000001000-000000000009ffff: RAM
2392 15:30:48.440462 2. 00000000000a0000-00000000000fffff: RESERVED
2393 15:30:48.444091 3. 0000000000100000-0000000076856fff: RAM
2394 15:30:48.450259 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2395 15:30:48.453694 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2396 15:30:48.460325 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2397 15:30:48.463940 7. 0000000077000000-00000000803fffff: RESERVED
2398 15:30:48.470342 8. 00000000c0000000-00000000cfffffff: RESERVED
2399 15:30:48.474011 9. 00000000f8000000-00000000f9ffffff: RESERVED
2400 15:30:48.480674 10. 00000000fb000000-00000000fb000fff: RESERVED
2401 15:30:48.483815 11. 00000000fc800000-00000000fe7fffff: RESERVED
2402 15:30:48.490763 12. 00000000feb00000-00000000feb7ffff: RESERVED
2403 15:30:48.493896 13. 00000000fec00000-00000000fecfffff: RESERVED
2404 15:30:48.497281 14. 00000000fed40000-00000000fed6ffff: RESERVED
2405 15:30:48.503666 15. 00000000fed80000-00000000fed87fff: RESERVED
2406 15:30:48.506800 16. 00000000fed90000-00000000fed92fff: RESERVED
2407 15:30:48.513313 17. 00000000feda0000-00000000feda1fff: RESERVED
2408 15:30:48.516511 18. 00000000fedc0000-00000000feddffff: RESERVED
2409 15:30:48.523645 19. 0000000100000000-000000027fbfffff: RAM
2410 15:30:48.524211 Passing 4 GPIOs to payload:
2411 15:30:48.530407 NAME | PORT | POLARITY | VALUE
2412 15:30:48.536673 lid | undefined | high | high
2413 15:30:48.539939 power | undefined | high | low
2414 15:30:48.546782 oprom | undefined | high | low
2415 15:30:48.549889 EC in RW | 0x00000151 | high | high
2416 15:30:48.553158 Board ID: 3
2417 15:30:48.553970 FW config: 0x131
2418 15:30:48.559766 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum a621
2419 15:30:48.563356 coreboot table: 1748 bytes.
2420 15:30:48.566579 IMD ROOT 0. 0x76fff000 0x00001000
2421 15:30:48.569603 IMD SMALL 1. 0x76ffe000 0x00001000
2422 15:30:48.576040 FSP MEMORY 2. 0x76afe000 0x00500000
2423 15:30:48.579157 CONSOLE 3. 0x76ade000 0x00020000
2424 15:30:48.582630 RW MCACHE 4. 0x76add000 0x0000043c
2425 15:30:48.585359 RO MCACHE 5. 0x76adc000 0x00000fd8
2426 15:30:48.588624 FMAP 6. 0x76adb000 0x0000064a
2427 15:30:48.592246 TIME STAMP 7. 0x76ada000 0x00000910
2428 15:30:48.595581 VBOOT WORK 8. 0x76ac6000 0x00014000
2429 15:30:48.598692 MEM INFO 9. 0x76ac5000 0x000003b8
2430 15:30:48.605546 ROMSTG STCK10. 0x76ac4000 0x00001000
2431 15:30:48.608639 AFTER CAR 11. 0x76ab8000 0x0000c000
2432 15:30:48.611970 RAMSTAGE 12. 0x76a2e000 0x0008a000
2433 15:30:48.615236 ACPI BERT 13. 0x76a1e000 0x00010000
2434 15:30:48.618428 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2435 15:30:48.621721 REFCODE 15. 0x769ae000 0x0006f000
2436 15:30:48.625036 SMM BACKUP 16. 0x7699e000 0x00010000
2437 15:30:48.631357 IGD OPREGION17. 0x76999000 0x00004203
2438 15:30:48.635101 RAMOOPS 18. 0x76899000 0x00100000
2439 15:30:48.637978 COREBOOT 19. 0x76891000 0x00008000
2440 15:30:48.641709 ACPI 20. 0x7686d000 0x00024000
2441 15:30:48.644794 TPM2 TCGLOG21. 0x7685d000 0x00010000
2442 15:30:48.648055 PMC CRASHLOG22. 0x7685c000 0x00000c00
2443 15:30:48.651396 CPU CRASHLOG23. 0x76858000 0x00003480
2444 15:30:48.657960 SMBIOS 24. 0x76857000 0x00001000
2445 15:30:48.658065 IMD small region:
2446 15:30:48.661177 IMD ROOT 0. 0x76ffec00 0x00000400
2447 15:30:48.667930 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2448 15:30:48.671196 POWER STATE 2. 0x76ffeb80 0x00000044
2449 15:30:48.674529 ROMSTAGE 3. 0x76ffeb60 0x00000004
2450 15:30:48.677963 ACPI GNVS 4. 0x76ffeb00 0x00000048
2451 15:30:48.681286 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2452 15:30:48.687987 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2453 15:30:48.691579 MTRR: Physical address space:
2454 15:30:48.697553 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2455 15:30:48.704603 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2456 15:30:48.711128 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2457 15:30:48.714063 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2458 15:30:48.721252 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2459 15:30:48.727709 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2460 15:30:48.733948 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2461 15:30:48.737349 MTRR: Fixed MSR 0x250 0x0606060606060606
2462 15:30:48.744502 MTRR: Fixed MSR 0x258 0x0606060606060606
2463 15:30:48.747444 MTRR: Fixed MSR 0x259 0x0000000000000000
2464 15:30:48.750702 MTRR: Fixed MSR 0x268 0x0606060606060606
2465 15:30:48.754208 MTRR: Fixed MSR 0x269 0x0606060606060606
2466 15:30:48.760766 MTRR: Fixed MSR 0x26a 0x0606060606060606
2467 15:30:48.764201 MTRR: Fixed MSR 0x26b 0x0606060606060606
2468 15:30:48.767693 MTRR: Fixed MSR 0x26c 0x0606060606060606
2469 15:30:48.770945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2470 15:30:48.777299 MTRR: Fixed MSR 0x26e 0x0606060606060606
2471 15:30:48.780820 MTRR: Fixed MSR 0x26f 0x0606060606060606
2472 15:30:48.784114 call enable_fixed_mtrr()
2473 15:30:48.787372 CPU physical address size: 39 bits
2474 15:30:48.790814 MTRR: default type WB/UC MTRR counts: 6/6.
2475 15:30:48.793837 MTRR: UC selected as default type.
2476 15:30:48.800547 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2477 15:30:48.807456 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2478 15:30:48.813997 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2479 15:30:48.820571 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2480 15:30:48.827144 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2481 15:30:48.833640 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2482 15:30:48.837118 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 15:30:48.843641 MTRR: Fixed MSR 0x258 0x0606060606060606
2484 15:30:48.846995 MTRR: Fixed MSR 0x259 0x0000000000000000
2485 15:30:48.850117 MTRR: Fixed MSR 0x268 0x0606060606060606
2486 15:30:48.853561 MTRR: Fixed MSR 0x269 0x0606060606060606
2487 15:30:48.860180 MTRR: Fixed MSR 0x26a 0x0606060606060606
2488 15:30:48.863550 MTRR: Fixed MSR 0x26b 0x0606060606060606
2489 15:30:48.866845 MTRR: Fixed MSR 0x26c 0x0606060606060606
2490 15:30:48.869970 MTRR: Fixed MSR 0x26d 0x0606060606060606
2491 15:30:48.873723 MTRR: Fixed MSR 0x26e 0x0606060606060606
2492 15:30:48.880380 MTRR: Fixed MSR 0x26f 0x0606060606060606
2493 15:30:48.883763 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 15:30:48.887443 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 15:30:48.890212 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 15:30:48.897223 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 15:30:48.900660 MTRR: Fixed MSR 0x259 0x0000000000000000
2498 15:30:48.904014 MTRR: Fixed MSR 0x268 0x0606060606060606
2499 15:30:48.907265 MTRR: Fixed MSR 0x269 0x0606060606060606
2500 15:30:48.913620 MTRR: Fixed MSR 0x26a 0x0606060606060606
2501 15:30:48.917055 MTRR: Fixed MSR 0x26b 0x0606060606060606
2502 15:30:48.920313 MTRR: Fixed MSR 0x26c 0x0606060606060606
2503 15:30:48.923356 MTRR: Fixed MSR 0x26d 0x0606060606060606
2504 15:30:48.929864 MTRR: Fixed MSR 0x26e 0x0606060606060606
2505 15:30:48.933321 MTRR: Fixed MSR 0x26f 0x0606060606060606
2506 15:30:48.936741 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 15:30:48.940199 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 15:30:48.943358 MTRR: Fixed MSR 0x250 0x0606060606060606
2509 15:30:48.946822 call enable_fixed_mtrr()
2510 15:30:48.949905 call enable_fixed_mtrr()
2511 15:30:48.952989 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 15:30:48.956790 CPU physical address size: 39 bits
2513 15:30:48.959712 MTRR: Fixed MSR 0x250 0x0606060606060606
2514 15:30:48.966772 MTRR: Fixed MSR 0x259 0x0000000000000000
2515 15:30:48.970059 MTRR: Fixed MSR 0x268 0x0606060606060606
2516 15:30:48.973206 MTRR: Fixed MSR 0x269 0x0606060606060606
2517 15:30:48.976340 MTRR: Fixed MSR 0x26a 0x0606060606060606
2518 15:30:48.983458 MTRR: Fixed MSR 0x26b 0x0606060606060606
2519 15:30:48.986375 MTRR: Fixed MSR 0x26c 0x0606060606060606
2520 15:30:48.990004 MTRR: Fixed MSR 0x26d 0x0606060606060606
2521 15:30:48.993327 MTRR: Fixed MSR 0x26e 0x0606060606060606
2522 15:30:48.999857 MTRR: Fixed MSR 0x26f 0x0606060606060606
2523 15:30:49.003266 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 15:30:49.006404 call enable_fixed_mtrr()
2525 15:30:49.009572 MTRR: Fixed MSR 0x258 0x0606060606060606
2526 15:30:49.012958 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 15:30:49.016200 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 15:30:49.022702 MTRR: Fixed MSR 0x269 0x0606060606060606
2529 15:30:49.026005 MTRR: Fixed MSR 0x26a 0x0606060606060606
2530 15:30:49.029402 MTRR: Fixed MSR 0x26b 0x0606060606060606
2531 15:30:49.032789 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 15:30:49.039134 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 15:30:49.042443 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 15:30:49.045907 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 15:30:49.049103 MTRR: Fixed MSR 0x259 0x0000000000000000
2536 15:30:49.052600 call enable_fixed_mtrr()
2537 15:30:49.056302 CPU physical address size: 39 bits
2538 15:30:49.059139 MTRR: Fixed MSR 0x268 0x0606060606060606
2539 15:30:49.062583 CPU physical address size: 39 bits
2540 15:30:49.069517 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 15:30:49.072910 MTRR: Fixed MSR 0x258 0x0606060606060606
2542 15:30:49.075840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 15:30:49.079179 MTRR: Fixed MSR 0x26b 0x0606060606060606
2544 15:30:49.085824 MTRR: Fixed MSR 0x26c 0x0606060606060606
2545 15:30:49.089105 MTRR: Fixed MSR 0x26d 0x0606060606060606
2546 15:30:49.092487 MTRR: Fixed MSR 0x26e 0x0606060606060606
2547 15:30:49.095731 MTRR: Fixed MSR 0x26f 0x0606060606060606
2548 15:30:49.099132 MTRR: Fixed MSR 0x259 0x0000000000000000
2549 15:30:49.102595 call enable_fixed_mtrr()
2550 15:30:49.105891 CPU physical address size: 39 bits
2551 15:30:49.109313 CPU physical address size: 39 bits
2552 15:30:49.115929 MTRR: Fixed MSR 0x259 0x0000000000000000
2553 15:30:49.119612 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 15:30:49.122692 MTRR: Fixed MSR 0x268 0x0606060606060606
2555 15:30:49.125905 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 15:30:49.132561 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 15:30:49.135767 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 15:30:49.139091 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 15:30:49.142261 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 15:30:49.149107 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 15:30:49.152392 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 15:30:49.155542 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 15:30:49.158849 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 15:30:49.162428 call enable_fixed_mtrr()
2565 15:30:49.165789 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 15:30:49.168751 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 15:30:49.175576 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 15:30:49.178499 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 15:30:49.182000 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 15:30:49.185251 CPU physical address size: 39 bits
2571 15:30:49.188937 call enable_fixed_mtrr()
2572 15:30:49.191759 CPU physical address size: 39 bits
2573 15:30:49.195504
2574 15:30:49.195920 MTRR check
2575 15:30:49.198973 Fixed MTRRs : Enabled
2576 15:30:49.199495 Variable MTRRs: Enabled
2577 15:30:49.199845
2578 15:30:49.205243 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2579 15:30:49.208391 Checking cr50 for pending updates
2580 15:30:49.220908 Reading cr50 TPM mode
2581 15:30:49.236208 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2582 15:30:49.246221 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2583 15:30:49.249408 Checking segment from ROM address 0xf96cbe6c
2584 15:30:49.252732 Checking segment from ROM address 0xf96cbe88
2585 15:30:49.259162 Loading segment from ROM address 0xf96cbe6c
2586 15:30:49.259585 code (compression=1)
2587 15:30:49.269253 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2588 15:30:49.278884 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2589 15:30:49.279347 using LZMA
2590 15:30:49.301933 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2591 15:30:49.308124 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2592 15:30:49.315888 Loading segment from ROM address 0xf96cbe88
2593 15:30:49.319274 Entry Point 0x30000000
2594 15:30:49.319691 Loaded segments
2595 15:30:49.326321 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2596 15:30:49.332588 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2597 15:30:49.335984 Finalizing chipset.
2598 15:30:49.339447 apm_control: Finalizing SMM.
2599 15:30:49.339863 APMC done.
2600 15:30:49.342542 HECI: CSE device 16.1 is disabled
2601 15:30:49.345965 HECI: CSE device 16.2 is disabled
2602 15:30:49.349285 HECI: CSE device 16.3 is disabled
2603 15:30:49.352479 HECI: CSE device 16.4 is disabled
2604 15:30:49.355824 HECI: CSE device 16.5 is disabled
2605 15:30:49.358957 HECI: Sending End-of-Post
2606 15:30:49.367600 CSE: EOP requested action: continue boot
2607 15:30:49.371075 CSE EOP successful, continuing boot
2608 15:30:49.377951 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2609 15:30:49.381103 mp_park_aps done after 0 msecs.
2610 15:30:49.384151 Jumping to boot code at 0x30000000(0x76891000)
2611 15:30:49.394053 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2612 15:30:49.398290
2613 15:30:49.398885
2614 15:30:49.399278
2615 15:30:49.401920 Starting depthcharge on Volmar...
2616 15:30:49.402414
2617 15:30:49.404103 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2618 15:30:49.404687 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2619 15:30:49.405188 Setting prompt string to ['brya:']
2620 15:30:49.405592 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2621 15:30:49.408194 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2622 15:30:49.408730
2623 15:30:49.415091 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2624 15:30:49.415568
2625 15:30:49.421877 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2626 15:30:49.422384
2627 15:30:49.425033 configure_storage: Failed to remap 1C:2
2628 15:30:49.425448
2629 15:30:49.428389 Wipe memory regions:
2630 15:30:49.428921
2631 15:30:49.431345 [0x00000000001000, 0x000000000a0000)
2632 15:30:49.431987
2633 15:30:49.434733 [0x00000000100000, 0x00000030000000)
2634 15:30:49.540320
2635 15:30:49.543452 [0x00000032668e60, 0x00000076857000)
2636 15:30:49.687479
2637 15:30:49.690657 [0x00000100000000, 0x0000027fc00000)
2638 15:30:50.500941
2639 15:30:50.504150 ec_init: CrosEC protocol v3 supported (256, 256)
2640 15:30:51.113727
2641 15:30:51.114218 R8152: Initializing
2642 15:30:51.114553
2643 15:30:51.116441 Version 9 (ocp_data = 6010)
2644 15:30:51.117005
2645 15:30:51.119768 R8152: Done initializing
2646 15:30:51.120275
2647 15:30:51.123289 Adding net device
2648 15:30:51.424104
2649 15:30:51.427571 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2650 15:30:51.427985
2651 15:30:51.428313
2652 15:30:51.428620
2653 15:30:51.429363 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 15:30:51.530722 brya: tftpboot 192.168.201.1 11517023/tftp-deploy-updgsp89/kernel/bzImage 11517023/tftp-deploy-updgsp89/kernel/cmdline 11517023/tftp-deploy-updgsp89/ramdisk/ramdisk.cpio.gz
2656 15:30:51.531334 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 15:30:51.531723 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2658 15:30:51.536332 tftpboot 192.168.201.1 11517023/tftp-deploy-updgsp89/kernel/bzIploy-updgsp89/kernel/cmdline 11517023/tftp-deploy-updgsp89/ramdisk/ramdisk.cpio.gz
2659 15:30:51.536791
2660 15:30:51.537117 Waiting for link
2661 15:30:51.739416
2662 15:30:51.739931 done.
2663 15:30:51.740292
2664 15:30:51.740616 MAC: 00:e0:4c:68:01:22
2665 15:30:51.740914
2666 15:30:51.742404 Sending DHCP discover... done.
2667 15:30:51.742818
2668 15:30:51.746426 Waiting for reply... done.
2669 15:30:51.746972
2670 15:30:51.751550 Sending DHCP request... done.
2671 15:30:51.752349
2672 15:30:51.763873 Waiting for reply... done.
2673 15:30:51.764356
2674 15:30:51.764687 My ip is 192.168.201.15
2675 15:30:51.765009
2676 15:30:51.766961 The DHCP server ip is 192.168.201.1
2677 15:30:51.770232
2678 15:30:51.773553 TFTP server IP predefined by user: 192.168.201.1
2679 15:30:51.773971
2680 15:30:51.780360 Bootfile predefined by user: 11517023/tftp-deploy-updgsp89/kernel/bzImage
2681 15:30:51.780779
2682 15:30:51.783665 Sending tftp read request... done.
2683 15:30:51.784079
2684 15:30:51.792147 Waiting for the transfer...
2685 15:30:51.792642
2686 15:30:52.163883 00000000 ################################################################
2687 15:30:52.164012
2688 15:30:52.429180 00080000 ################################################################
2689 15:30:52.429314
2690 15:30:52.706085 00100000 ################################################################
2691 15:30:52.706216
2692 15:30:52.981820 00180000 ################################################################
2693 15:30:52.981954
2694 15:30:53.270292 00200000 ################################################################
2695 15:30:53.270423
2696 15:30:53.543224 00280000 ################################################################
2697 15:30:53.543357
2698 15:30:53.799441 00300000 ################################################################
2699 15:30:53.799567
2700 15:30:54.073212 00380000 ################################################################
2701 15:30:54.073343
2702 15:30:54.350662 00400000 ################################################################
2703 15:30:54.350796
2704 15:30:54.614852 00480000 ################################################################
2705 15:30:54.615018
2706 15:30:54.879021 00500000 ################################################################
2707 15:30:54.879147
2708 15:30:55.133014 00580000 ################################################################
2709 15:30:55.133146
2710 15:30:55.381322 00600000 ################################################################
2711 15:30:55.381452
2712 15:30:55.637563 00680000 ################################################################
2713 15:30:55.637689
2714 15:30:55.898127 00700000 ################################################################
2715 15:30:55.898256
2716 15:30:56.158803 00780000 ################################################################
2717 15:30:56.158968
2718 15:30:56.421258 00800000 ################################################################
2719 15:30:56.421387
2720 15:30:56.669832 00880000 ################################################################
2721 15:30:56.669959
2722 15:30:56.929080 00900000 ################################################################
2723 15:30:56.929213
2724 15:30:57.185195 00980000 ################################################################
2725 15:30:57.185351
2726 15:30:57.433656 00a00000 ################################################################
2727 15:30:57.433807
2728 15:30:57.695504 00a80000 ################################################################
2729 15:30:57.695638
2730 15:30:57.957395 00b00000 ################################################################
2731 15:30:57.957556
2732 15:30:58.233162 00b80000 ################################################################
2733 15:30:58.233321
2734 15:30:58.505608 00c00000 ################################################################
2735 15:30:58.505762
2736 15:30:58.788927 00c80000 ################################################################
2737 15:30:58.789097
2738 15:30:58.972451 00d00000 ############################################### done.
2739 15:30:58.972579
2740 15:30:58.979030 The bootfile was 14013312 bytes long.
2741 15:30:58.979125
2742 15:30:58.982258 Sending tftp read request... done.
2743 15:30:58.982353
2744 15:30:58.982427 Waiting for the transfer...
2745 15:30:58.985516
2746 15:30:59.283958 00000000 ################################################################
2747 15:30:59.284118
2748 15:30:59.539455 00080000 ################################################################
2749 15:30:59.539593
2750 15:30:59.796534 00100000 ################################################################
2751 15:30:59.796668
2752 15:31:00.075060 00180000 ################################################################
2753 15:31:00.075196
2754 15:31:00.340118 00200000 ################################################################
2755 15:31:00.340252
2756 15:31:00.668961 00280000 ################################################################
2757 15:31:00.669098
2758 15:31:01.012660 00300000 ################################################################
2759 15:31:01.012797
2760 15:31:01.342841 00380000 ################################################################
2761 15:31:01.343026
2762 15:31:01.663735 00400000 ################################################################
2763 15:31:01.663865
2764 15:31:01.959858 00480000 ################################################################
2765 15:31:01.959983
2766 15:31:02.221178 00500000 ################################################################
2767 15:31:02.221311
2768 15:31:02.476675 00580000 ################################################################
2769 15:31:02.476808
2770 15:31:02.744776 00600000 ################################################################
2771 15:31:02.744926
2772 15:31:03.014977 00680000 ################################################################
2773 15:31:03.015108
2774 15:31:03.300112 00700000 ################################################################
2775 15:31:03.300247
2776 15:31:03.613242 00780000 ################################################################
2777 15:31:03.613374
2778 15:31:03.914238 00800000 ################################################################
2779 15:31:03.914367
2780 15:31:04.120428 00880000 ############################################## done.
2781 15:31:04.120561
2782 15:31:04.123636 Sending tftp read request... done.
2783 15:31:04.123722
2784 15:31:04.126788 Waiting for the transfer...
2785 15:31:04.126929
2786 15:31:04.127014 00000000 # done.
2787 15:31:04.127079
2788 15:31:04.136585 Command line loaded dynamically from TFTP file: 11517023/tftp-deploy-updgsp89/kernel/cmdline
2789 15:31:04.136666
2790 15:31:04.153189 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2791 15:31:04.159083
2792 15:31:04.162347 Shutting down all USB controllers.
2793 15:31:04.162421
2794 15:31:04.162496 Removing current net device
2795 15:31:04.162556
2796 15:31:04.165413 Finalizing coreboot
2797 15:31:04.165487
2798 15:31:04.171884 Exiting depthcharge with code 4 at timestamp: 25030858
2799 15:31:04.171979
2800 15:31:04.172051
2801 15:31:04.172111 Starting kernel ...
2802 15:31:04.172167
2803 15:31:04.172223
2804 15:31:04.172704 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2805 15:31:04.172801 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2806 15:31:04.172903 Setting prompt string to ['Linux version [0-9]']
2807 15:31:04.172974 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2808 15:31:04.173065 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2810 15:35:30.173181 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2812 15:35:30.173426 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2814 15:35:30.173613 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2817 15:35:30.173907 end: 2 depthcharge-action (duration 00:05:00) [common]
2819 15:35:30.174174 Cleaning after the job
2820 15:35:30.174279 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/ramdisk
2821 15:35:30.175971 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/kernel
2822 15:35:30.178263 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11517023/tftp-deploy-updgsp89/modules
2823 15:35:30.179180 start: 5.1 power-off (timeout 00:00:30) [common]
2824 15:35:30.179388 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=off'
2825 15:35:30.259029 >> Command sent successfully.
2826 15:35:30.263686 Returned 0 in 0 seconds
2827 15:35:30.364657 end: 5.1 power-off (duration 00:00:00) [common]
2829 15:35:30.366125 start: 5.2 read-feedback (timeout 00:10:00) [common]
2830 15:35:30.367349 Listened to connection for namespace 'common' for up to 1s
2832 15:35:30.368651 Listened to connection for namespace 'common' for up to 1s
2833 15:35:31.367226 Finalising connection for namespace 'common'
2834 15:35:31.367836 Disconnecting from shell: Finalise
2835 15:35:31.368206
2836 15:35:31.469338 end: 5.2 read-feedback (duration 00:00:01) [common]
2837 15:35:31.469919 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11517023
2838 15:35:31.490264 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11517023
2839 15:35:31.490396 JobError: Your job cannot terminate cleanly.