Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 07:31:15.932670 lava-dispatcher, installed at version: 2023.06
2 07:31:15.932875 start: 0 validate
3 07:31:15.933012 Start time: 2023-08-30 07:31:15.933004+00:00 (UTC)
4 07:31:15.933150 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:31:15.933299 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 07:31:16.204465 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:31:16.205295 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.191-cip38-2-g09e5ecd8645b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:31:16.476591 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:31:16.477390 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.191-cip38-2-g09e5ecd8645b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:31:21.026806 validate duration: 5.09
12 07:31:21.027066 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:31:21.027162 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:31:21.027247 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:31:21.027369 Not decompressing ramdisk as can be used compressed.
16 07:31:21.027460 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 07:31:21.027531 saving as /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/ramdisk/rootfs.cpio.gz
18 07:31:21.027596 total size: 8418130 (8 MB)
19 07:31:21.687140 progress 0 % (0 MB)
20 07:31:21.700486 progress 5 % (0 MB)
21 07:31:21.712980 progress 10 % (0 MB)
22 07:31:21.721837 progress 15 % (1 MB)
23 07:31:21.727660 progress 20 % (1 MB)
24 07:31:21.732390 progress 25 % (2 MB)
25 07:31:21.736522 progress 30 % (2 MB)
26 07:31:21.739925 progress 35 % (2 MB)
27 07:31:21.743319 progress 40 % (3 MB)
28 07:31:21.746470 progress 45 % (3 MB)
29 07:31:21.749335 progress 50 % (4 MB)
30 07:31:21.752031 progress 55 % (4 MB)
31 07:31:21.754526 progress 60 % (4 MB)
32 07:31:21.756768 progress 65 % (5 MB)
33 07:31:21.759044 progress 70 % (5 MB)
34 07:31:21.761359 progress 75 % (6 MB)
35 07:31:21.763523 progress 80 % (6 MB)
36 07:31:21.765731 progress 85 % (6 MB)
37 07:31:21.767899 progress 90 % (7 MB)
38 07:31:21.770071 progress 95 % (7 MB)
39 07:31:21.772107 progress 100 % (8 MB)
40 07:31:21.772334 8 MB downloaded in 0.74 s (10.78 MB/s)
41 07:31:21.772490 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:31:21.772729 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:31:21.772816 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:31:21.772906 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:31:21.773104 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.191-cip38-2-g09e5ecd8645b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:31:21.773190 saving as /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/kernel/bzImage
48 07:31:21.773253 total size: 14012576 (13 MB)
49 07:31:21.773316 No compression specified
50 07:31:21.774416 progress 0 % (0 MB)
51 07:31:21.778301 progress 5 % (0 MB)
52 07:31:21.782060 progress 10 % (1 MB)
53 07:31:21.785901 progress 15 % (2 MB)
54 07:31:21.789560 progress 20 % (2 MB)
55 07:31:21.793200 progress 25 % (3 MB)
56 07:31:21.796897 progress 30 % (4 MB)
57 07:31:21.800511 progress 35 % (4 MB)
58 07:31:21.804274 progress 40 % (5 MB)
59 07:31:21.807854 progress 45 % (6 MB)
60 07:31:21.811442 progress 50 % (6 MB)
61 07:31:21.815224 progress 55 % (7 MB)
62 07:31:21.818824 progress 60 % (8 MB)
63 07:31:21.822428 progress 65 % (8 MB)
64 07:31:21.826183 progress 70 % (9 MB)
65 07:31:21.829731 progress 75 % (10 MB)
66 07:31:21.833404 progress 80 % (10 MB)
67 07:31:21.836861 progress 85 % (11 MB)
68 07:31:21.840343 progress 90 % (12 MB)
69 07:31:21.844041 progress 95 % (12 MB)
70 07:31:21.847614 progress 100 % (13 MB)
71 07:31:21.847806 13 MB downloaded in 0.07 s (179.26 MB/s)
72 07:31:21.847954 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:31:21.848186 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:31:21.848273 start: 1.3 download-retry (timeout 00:09:59) [common]
76 07:31:21.848364 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 07:31:21.848506 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.191-cip38-2-g09e5ecd8645b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:31:21.848583 saving as /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/modules/modules.tar
79 07:31:21.848646 total size: 526904 (0 MB)
80 07:31:21.848709 Using unxz to decompress xz
81 07:31:21.852894 progress 6 % (0 MB)
82 07:31:21.853341 progress 12 % (0 MB)
83 07:31:21.853580 progress 18 % (0 MB)
84 07:31:21.855153 progress 24 % (0 MB)
85 07:31:21.856929 progress 31 % (0 MB)
86 07:31:21.858861 progress 37 % (0 MB)
87 07:31:21.860916 progress 43 % (0 MB)
88 07:31:21.862634 progress 49 % (0 MB)
89 07:31:21.864659 progress 55 % (0 MB)
90 07:31:21.867050 progress 62 % (0 MB)
91 07:31:21.869202 progress 68 % (0 MB)
92 07:31:21.871233 progress 74 % (0 MB)
93 07:31:21.872979 progress 80 % (0 MB)
94 07:31:21.875175 progress 87 % (0 MB)
95 07:31:21.877340 progress 93 % (0 MB)
96 07:31:21.879179 progress 99 % (0 MB)
97 07:31:21.886021 0 MB downloaded in 0.04 s (13.45 MB/s)
98 07:31:21.886251 end: 1.3.1 http-download (duration 00:00:00) [common]
100 07:31:21.886511 end: 1.3 download-retry (duration 00:00:00) [common]
101 07:31:21.886605 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 07:31:21.886702 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 07:31:21.886785 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 07:31:21.886870 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 07:31:21.887091 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q
106 07:31:21.887273 makedir: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin
107 07:31:21.887431 makedir: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/tests
108 07:31:21.887538 makedir: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/results
109 07:31:21.887656 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-add-keys
110 07:31:21.887806 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-add-sources
111 07:31:21.887941 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-background-process-start
112 07:31:21.888074 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-background-process-stop
113 07:31:21.888203 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-common-functions
114 07:31:21.888332 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-echo-ipv4
115 07:31:21.888462 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-install-packages
116 07:31:21.888590 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-installed-packages
117 07:31:21.888717 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-os-build
118 07:31:21.888843 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-probe-channel
119 07:31:21.888971 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-probe-ip
120 07:31:21.889137 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-target-ip
121 07:31:21.889331 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-target-mac
122 07:31:21.889459 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-target-storage
123 07:31:21.889592 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-case
124 07:31:21.889722 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-event
125 07:31:21.889847 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-feedback
126 07:31:21.889973 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-raise
127 07:31:21.890105 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-reference
128 07:31:21.890235 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-runner
129 07:31:21.890362 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-set
130 07:31:21.890490 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-test-shell
131 07:31:21.890620 Updating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-install-packages (oe)
132 07:31:21.890777 Updating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/bin/lava-installed-packages (oe)
133 07:31:21.890901 Creating /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/environment
134 07:31:21.891002 LAVA metadata
135 07:31:21.891079 - LAVA_JOB_ID=11381205
136 07:31:21.891151 - LAVA_DISPATCHER_IP=192.168.201.1
137 07:31:21.891263 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 07:31:21.891333 skipped lava-vland-overlay
139 07:31:21.891411 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 07:31:21.891491 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 07:31:21.891554 skipped lava-multinode-overlay
142 07:31:21.891629 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 07:31:21.891709 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 07:31:21.891782 Loading test definitions
145 07:31:21.891873 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 07:31:21.891957 Using /lava-11381205 at stage 0
147 07:31:21.892277 uuid=11381205_1.4.2.3.1 testdef=None
148 07:31:21.892367 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 07:31:21.892456 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 07:31:21.892994 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 07:31:21.893271 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 07:31:21.893918 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 07:31:21.894149 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 07:31:21.894768 runner path: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/0/tests/0_dmesg test_uuid 11381205_1.4.2.3.1
157 07:31:21.894923 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 07:31:21.895156 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 07:31:21.895280 Using /lava-11381205 at stage 1
161 07:31:21.895582 uuid=11381205_1.4.2.3.5 testdef=None
162 07:31:21.895670 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 07:31:21.895754 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 07:31:21.896233 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 07:31:21.896448 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 07:31:21.897105 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 07:31:21.897446 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 07:31:21.898082 runner path: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/1/tests/1_bootrr test_uuid 11381205_1.4.2.3.5
171 07:31:21.898235 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 07:31:21.898443 Creating lava-test-runner.conf files
174 07:31:21.898508 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/0 for stage 0
175 07:31:21.898599 - 0_dmesg
176 07:31:21.898681 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11381205/lava-overlay-te4qs18q/lava-11381205/1 for stage 1
177 07:31:21.898773 - 1_bootrr
178 07:31:21.898869 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 07:31:21.898956 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 07:31:21.907538 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 07:31:21.907646 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 07:31:21.907735 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 07:31:21.907821 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 07:31:21.907907 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 07:31:22.154233 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 07:31:22.154622 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 07:31:22.154743 extracting modules file /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11381205/extract-overlay-ramdisk-_nk8vsk_/ramdisk
188 07:31:22.179504 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 07:31:22.179651 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 07:31:22.179749 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11381205/compress-overlay-z10v76ld/overlay-1.4.2.4.tar.gz to ramdisk
191 07:31:22.179826 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11381205/compress-overlay-z10v76ld/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11381205/extract-overlay-ramdisk-_nk8vsk_/ramdisk
192 07:31:22.188241 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 07:31:22.188356 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 07:31:22.188449 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 07:31:22.188540 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 07:31:22.188616 Building ramdisk /var/lib/lava/dispatcher/tmp/11381205/extract-overlay-ramdisk-_nk8vsk_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11381205/extract-overlay-ramdisk-_nk8vsk_/ramdisk
197 07:31:22.323303 >> 54148 blocks
198 07:31:23.208442 rename /var/lib/lava/dispatcher/tmp/11381205/extract-overlay-ramdisk-_nk8vsk_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/ramdisk/ramdisk.cpio.gz
199 07:31:23.208890 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 07:31:23.209018 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 07:31:23.209150 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 07:31:23.209261 No mkimage arch provided, not using FIT.
203 07:31:23.209353 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 07:31:23.209438 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 07:31:23.209546 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 07:31:23.209649 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 07:31:23.209742 No LXC device requested
208 07:31:23.209826 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 07:31:23.209911 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 07:31:23.209989 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 07:31:23.210062 Checking files for TFTP limit of 4294967296 bytes.
212 07:31:23.210455 end: 1 tftp-deploy (duration 00:00:02) [common]
213 07:31:23.210556 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 07:31:23.210648 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 07:31:23.210773 substitutions:
216 07:31:23.210840 - {DTB}: None
217 07:31:23.210905 - {INITRD}: 11381205/tftp-deploy-olaga1_m/ramdisk/ramdisk.cpio.gz
218 07:31:23.210965 - {KERNEL}: 11381205/tftp-deploy-olaga1_m/kernel/bzImage
219 07:31:23.211023 - {LAVA_MAC}: None
220 07:31:23.211080 - {PRESEED_CONFIG}: None
221 07:31:23.211135 - {PRESEED_LOCAL}: None
222 07:31:23.211191 - {RAMDISK}: 11381205/tftp-deploy-olaga1_m/ramdisk/ramdisk.cpio.gz
223 07:31:23.211246 - {ROOT_PART}: None
224 07:31:23.211300 - {ROOT}: None
225 07:31:23.211354 - {SERVER_IP}: 192.168.201.1
226 07:31:23.211408 - {TEE}: None
227 07:31:23.211462 Parsed boot commands:
228 07:31:23.211532 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 07:31:23.211768 Parsed boot commands: tftpboot 192.168.201.1 11381205/tftp-deploy-olaga1_m/kernel/bzImage 11381205/tftp-deploy-olaga1_m/kernel/cmdline 11381205/tftp-deploy-olaga1_m/ramdisk/ramdisk.cpio.gz
230 07:31:23.211861 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 07:31:23.211959 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 07:31:23.212052 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 07:31:23.212143 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 07:31:23.212215 Not connected, no need to disconnect.
235 07:31:23.212290 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 07:31:23.212370 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 07:31:23.212437 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
238 07:31:23.216605 Setting prompt string to ['lava-test: # ']
239 07:31:23.216958 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 07:31:23.217065 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 07:31:23.217225 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 07:31:23.217360 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 07:31:23.217601 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
244 07:31:28.369187 >> Command sent successfully.
245 07:31:28.379589 Returned 0 in 5 seconds
246 07:31:28.480877 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 07:31:28.482496 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 07:31:28.483058 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 07:31:28.483554 Setting prompt string to 'Starting depthcharge on Volmar...'
251 07:31:28.483926 Changing prompt to 'Starting depthcharge on Volmar...'
252 07:31:28.484322 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 07:31:28.485613 [Enter `^Ec?' for help]
254 07:31:30.252904 ####################
255 07:31:30.253526
256 07:31:30.253911 00780000 #
257 07:31:30.254293
258 07:31:30.259684 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
259 07:31:30.262681 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
260 07:31:30.270372 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
261 07:31:30.273492 CPU: AES supported, TXT NOT supported, VT supported
262 07:31:30.281322 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
263 07:31:30.284649 Cache size = 10 MiB
264 07:31:30.288940 MCH: device id 4609 (rev 04) is Alderlake-P
265 07:31:30.295962 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
266 07:31:30.298931 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
267 07:31:30.301851 VBOOT: Loading verstage.
268 07:31:30.305751 FMAP: Found "FLASH" version 1.1 at 0x1804000.
269 07:31:30.312235 FMAP: base = 0x0 size = 0x2000000 #areas = 37
270 07:31:30.315894 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
271 07:31:30.321969 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
272 07:31:30.332011 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
273 07:31:30.332618
274 07:31:30.333002
275 07:31:30.341958 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
276 07:31:30.349440 Probing TPM I2C: I2C bus 1 version 0x3230302a
277 07:31:30.352095 DW I2C bus 1 at 0xfe022000 (400 KHz)
278 07:31:30.352576 done! DID_VID 0x00281ae0
279 07:31:30.355813 TPM ready after 0 ms
280 07:31:30.359408 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 07:31:30.372876 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 07:31:30.379804 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 07:31:30.496691 tlcl_send_startup: Startup return code is 0
284 07:31:30.497330 TPM: setup succeeded
285 07:31:30.516532 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 07:31:30.541529 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 07:31:30.545268 Chrome EC: UHEPI supported
288 07:31:30.548500 Reading cr50 boot mode
289 07:31:30.563359 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 07:31:30.563945 Phase 1
291 07:31:30.570230 FMAP: area GBB found @ 1805000 (458752 bytes)
292 07:31:30.576443 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 07:31:30.583300 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 07:31:30.589970 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 07:31:30.590546 Phase 2
296 07:31:30.593915 Phase 3
297 07:31:30.597248 FMAP: area GBB found @ 1805000 (458752 bytes)
298 07:31:30.603485 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 07:31:30.607025 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 07:31:30.613643 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 07:31:30.619976 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 07:31:30.626945 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 07:31:30.636976 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 07:31:30.648847 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 07:31:30.651682 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 07:31:30.658251 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 07:31:30.665277 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 07:31:30.671564 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 07:31:30.678593 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 07:31:30.682425 Phase 4
311 07:31:30.686151 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 07:31:30.692511 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 07:31:30.905027 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 07:31:30.911757 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 07:31:30.915222 Saving vboot hash.
316 07:31:30.921930 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 07:31:30.937780 tlcl_extend: response is 0
318 07:31:30.944194 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 07:31:30.950818 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 07:31:30.965476 tlcl_extend: response is 0
321 07:31:30.971774 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 07:31:30.990491 tlcl_lock_nv_write: response is 0
323 07:31:31.008142 tlcl_lock_nv_write: response is 0
324 07:31:31.008725 Slot A is selected
325 07:31:31.014870 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 07:31:31.021932 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 07:31:31.028419 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 07:31:31.035295 BS: verstage times (exec / console): total (unknown) / 256 ms
329 07:31:31.035886
330 07:31:31.036273
331 07:31:31.041618 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 07:31:31.045627 Google Chrome EC: version:
333 07:31:31.048719 ro: volmar_v2.0.14126-e605144e9c
334 07:31:31.052575 rw: volmar_v0.0.55-22d1557
335 07:31:31.055325 running image: 2
336 07:31:31.058636 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 07:31:31.068729 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 07:31:31.075389 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 07:31:31.082213 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 07:31:31.092230 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 07:31:31.102561 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 07:31:31.111336 EC took 4438us to calculate image hash
343 07:31:31.121490 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 07:31:31.124656 VB2:sync_ec() select_rw=RW(active)
345 07:31:31.134507 Waited 270us to clear limit power flag.
346 07:31:31.137895 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 07:31:31.141588 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 07:31:31.144458 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 07:31:31.151348 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 07:31:31.155143 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
351 07:31:31.157818 TCO_STS: 0000 0000
352 07:31:31.158324 GEN_PMCON: d0015038 00002200
353 07:31:31.161210 GBLRST_CAUSE: 00000000 00000000
354 07:31:31.164950 HPR_CAUSE0: 00000000
355 07:31:31.167853 prev_sleep_state 5
356 07:31:31.171060 Abort disabling TXT, as CPU is not TXT capable.
357 07:31:31.178146 cse_lite: Number of partitions = 3
358 07:31:31.181637 cse_lite: Current partition = RO
359 07:31:31.182140 cse_lite: Next partition = RO
360 07:31:31.185291 cse_lite: Flags = 0x7
361 07:31:31.191524 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 07:31:31.201508 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 07:31:31.205603 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 07:31:31.211818 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 07:31:31.218329 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 07:31:31.225277 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 07:31:31.228628 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 07:31:31.235387 cse_lite: Set Boot Partition Info Command (RW)
369 07:31:31.238072 HECI: Global Reset(Type:1) Command
370 07:31:32.679998 s = 16384
371 07:31:32.680755 Cache size = 10 MiB
372 07:31:32.686506 MCH: device id 4609 (rev 04) is Alderlake-P
373 07:31:32.690075 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
374 07:31:32.696728 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
375 07:31:32.697254 VBOOT: Loading verstage.
376 07:31:32.704250 FMAP: Found "FLASH" version 1.1 at 0x1804000.
377 07:31:32.707505 FMAP: base = 0x0 size = 0x2000000 #areas = 37
378 07:31:32.713999 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
379 07:31:32.720883 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
380 07:31:32.727598 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
381 07:31:32.731529
382 07:31:32.732106
383 07:31:32.738017 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
384 07:31:32.744781 Probing TPM I2C: I2C bus 1 version 0x3230302a
385 07:31:32.748172 DW I2C bus 1 at 0xfe022000 (400 KHz)
386 07:31:32.751196 done! DID_VID 0x00281ae0
387 07:31:32.755657 TPM ready after 0 ms
388 07:31:32.758875 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
389 07:31:32.766961 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
390 07:31:32.774865 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
391 07:31:32.895478 tlcl_send_startup: Startup return code is 0
392 07:31:32.896064 TPM: setup succeeded
393 07:31:32.915104 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
394 07:31:32.937251 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
395 07:31:32.941612 Chrome EC: UHEPI supported
396 07:31:32.944505 Reading cr50 boot mode
397 07:31:32.959830 Cr50 says boot_mode is VERIFIED_RW(0x00).
398 07:31:32.960424 Phase 1
399 07:31:32.966021 FMAP: area GBB found @ 1805000 (458752 bytes)
400 07:31:32.972981 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
401 07:31:32.979827 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
402 07:31:32.986429 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
403 07:31:32.989629 Phase 2
404 07:31:32.990218 Phase 3
405 07:31:32.993255 FMAP: area GBB found @ 1805000 (458752 bytes)
406 07:31:32.999912 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 07:31:33.003170 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 07:31:33.010588 VB2:vb2_verify_keyblock() Checking keyblock signature...
409 07:31:33.017727 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
410 07:31:33.024572 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
411 07:31:33.031192 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
412 07:31:33.044847 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 07:31:33.048225 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 07:31:33.054768 VB2:vb2_verify_fw_preamble() Verifying preamble.
415 07:31:33.061203 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
416 07:31:33.067935 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
417 07:31:33.075110 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
418 07:31:33.078392 Phase 4
419 07:31:33.082329 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
420 07:31:33.088665 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
421 07:31:33.301345 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
422 07:31:33.307786 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
423 07:31:33.311025 Saving vboot hash.
424 07:31:33.317413 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
425 07:31:33.333997 tlcl_extend: response is 0
426 07:31:33.340485 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
427 07:31:33.347122 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
428 07:31:33.361725 tlcl_extend: response is 0
429 07:31:33.368079 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
430 07:31:33.387066 tlcl_lock_nv_write: response is 0
431 07:31:33.405736 tlcl_lock_nv_write: response is 0
432 07:31:33.406399 Slot A is selected
433 07:31:33.412567 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
434 07:31:33.419447 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
435 07:31:33.426072 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
436 07:31:33.432598 BS: verstage times (exec / console): total (unknown) / 256 ms
437 07:31:33.433220
438 07:31:33.433604
439 07:31:33.439121 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
440 07:31:33.443256 Google Chrome EC: version:
441 07:31:33.446887 ro: volmar_v2.0.14126-e605144e9c
442 07:31:33.450382 rw: volmar_v0.0.55-22d1557
443 07:31:33.453158 running image: 2
444 07:31:33.456993 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 07:31:33.467098 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
446 07:31:33.473475 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
447 07:31:33.480105 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
448 07:31:33.490078 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
449 07:31:33.500199 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 07:31:33.503404 EC took 941us to calculate image hash
451 07:31:33.513815 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 07:31:33.516583 VB2:sync_ec() select_rw=RW(active)
453 07:31:33.527983 Waited 270us to clear limit power flag.
454 07:31:33.531673 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
455 07:31:33.534497 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
456 07:31:33.537983 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
457 07:31:33.544779 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
458 07:31:33.548100 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
459 07:31:33.551912 TCO_STS: 0000 0000
460 07:31:33.552507 GEN_PMCON: d1001038 00002200
461 07:31:33.554956 GBLRST_CAUSE: 00000040 00000000
462 07:31:33.558446 HPR_CAUSE0: 00000000
463 07:31:33.561209 prev_sleep_state 5
464 07:31:33.564587 Abort disabling TXT, as CPU is not TXT capable.
465 07:31:33.572596 cse_lite: Number of partitions = 3
466 07:31:33.576096 cse_lite: Current partition = RW
467 07:31:33.576583 cse_lite: Next partition = RW
468 07:31:33.578968 cse_lite: Flags = 0x7
469 07:31:33.586332 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
470 07:31:33.596482 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
471 07:31:33.599863 FMAP: area SI_ME found @ 1000 (5238784 bytes)
472 07:31:33.606453 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
473 07:31:33.613413 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
474 07:31:33.619843 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
475 07:31:33.622644 cse_lite: CSE CBFS RW version : 16.1.25.2049
476 07:31:33.626067 Boot Count incremented to 2934
477 07:31:33.633035 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
478 07:31:33.642362 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
479 07:31:33.652208 Probing TPM I2C: done! DID_VID 0x00281ae0
480 07:31:33.655215 Locality already claimed
481 07:31:33.658824 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
482 07:31:33.678051 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
483 07:31:33.684451 MRC: Hash idx 0x100d comparison successful.
484 07:31:33.688035 MRC cache found, size f6c8
485 07:31:33.688627 bootmode is set to: 2
486 07:31:33.691876 EC returned error result code 3
487 07:31:33.694802 FW_CONFIG value from CBI is 0x131
488 07:31:33.701655 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
489 07:31:33.704959 SPD index = 0
490 07:31:33.711560 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
491 07:31:33.712152 SPD: module type is LPDDR4X
492 07:31:33.718161 SPD: module part number is K4U6E3S4AB-MGCL
493 07:31:33.724960 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
494 07:31:33.728706 SPD: device width 16 bits, bus width 16 bits
495 07:31:33.731762 SPD: module size is 1024 MB (per channel)
496 07:31:33.801673 CBMEM:
497 07:31:33.805160 IMD: root @ 0x76fff000 254 entries.
498 07:31:33.808119 IMD: root @ 0x76ffec00 62 entries.
499 07:31:33.815892 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
500 07:31:33.819348 RO_VPD is uninitialized or empty.
501 07:31:33.822820 FMAP: area RW_VPD found @ f29000 (8192 bytes)
502 07:31:33.826479 RW_VPD is uninitialized or empty.
503 07:31:33.833070 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
504 07:31:33.835942 External stage cache:
505 07:31:33.839335 IMD: root @ 0x7bbff000 254 entries.
506 07:31:33.842788 IMD: root @ 0x7bbfec00 62 entries.
507 07:31:33.849388 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 07:31:33.856770 MRC: Checking cached data update for 'RW_MRC_CACHE'.
509 07:31:33.859455 MRC: 'RW_MRC_CACHE' does not need update.
510 07:31:33.860045 8 DIMMs found
511 07:31:33.862646 SMM Memory Map
512 07:31:33.866018 SMRAM : 0x7b800000 0x800000
513 07:31:33.869760 Subregion 0: 0x7b800000 0x200000
514 07:31:33.872989 Subregion 1: 0x7ba00000 0x200000
515 07:31:33.876368 Subregion 2: 0x7bc00000 0x400000
516 07:31:33.879540 top_of_ram = 0x77000000
517 07:31:33.882445 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
518 07:31:33.889238 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
519 07:31:33.895968 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
520 07:31:33.900180 MTRR Range: Start=ff000000 End=0 (Size 1000000)
521 07:31:33.900766 Normal boot
522 07:31:33.909754 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
523 07:31:33.916030 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
524 07:31:33.923389 Processing 237 relocs. Offset value of 0x74ab9000
525 07:31:33.930974 BS: romstage times (exec / console): total (unknown) / 380 ms
526 07:31:33.937923
527 07:31:33.938505
528 07:31:33.945077 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
529 07:31:33.945717 Normal boot
530 07:31:33.951698 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
531 07:31:33.958110 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
532 07:31:33.964764 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
533 07:31:33.974568 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
534 07:31:34.022345 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
535 07:31:34.029456 Processing 5931 relocs. Offset value of 0x72a2f000
536 07:31:34.032483 BS: postcar times (exec / console): total (unknown) / 51 ms
537 07:31:34.035691
538 07:31:34.036271
539 07:31:34.042570 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
540 07:31:34.046030 Reserving BERT start 76a1e000, size 10000
541 07:31:34.049460 Normal boot
542 07:31:34.052336 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 07:31:34.059002 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 07:31:34.069251 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 07:31:34.072501 FMAP: area RW_VPD found @ f29000 (8192 bytes)
546 07:31:34.076181 Google Chrome EC: version:
547 07:31:34.079181 ro: volmar_v2.0.14126-e605144e9c
548 07:31:34.082372 rw: volmar_v0.0.55-22d1557
549 07:31:34.086305 running image: 2
550 07:31:34.089775 ACPI _SWS is PM1 Index 8 GPE Index -1
551 07:31:34.096208 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
552 07:31:34.099726 EC returned error result code 3
553 07:31:34.102977 FW_CONFIG value from CBI is 0x131
554 07:31:34.106178 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
555 07:31:34.112856 PCI: 00:1c.2 disabled by fw_config
556 07:31:34.116450 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 07:31:34.123365 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 07:31:34.126520 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 07:31:34.133158 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
560 07:31:34.136474 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
561 07:31:34.146033 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
562 07:31:34.149697 microcode: sig=0x906a4 pf=0x80 revision=0x423
563 07:31:34.153203 microcode: Update skipped, already up-to-date
564 07:31:34.159556 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
565 07:31:34.227544 Detected 6 core, 8 thread CPU.
566 07:31:34.230676 Setting up SMI for CPU
567 07:31:34.233954 IED base = 0x7bc00000
568 07:31:34.234546 IED size = 0x00400000
569 07:31:34.237447 Will perform SMM setup.
570 07:31:34.240791 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
571 07:31:34.243717 LAPIC 0x0 in XAPIC mode.
572 07:31:34.254319 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
573 07:31:34.257610 Processing 18 relocs. Offset value of 0x00030000
574 07:31:34.261987 Attempting to start 7 APs
575 07:31:34.264951 Waiting for 10ms after sending INIT.
576 07:31:34.278038 Waiting for SIPI to complete...
577 07:31:34.281561 LAPIC 0x1 in XAPIC mode.
578 07:31:34.284835 LAPIC 0x14 in XAPIC mode.
579 07:31:34.288292 LAPIC 0x10 in XAPIC mode.
580 07:31:34.288878 done.
581 07:31:34.291768 LAPIC 0x16 in XAPIC mode.
582 07:31:34.295377 AP: slot 4 apic_id 10, MCU rev: 0x00000423
583 07:31:34.298021 AP: slot 3 apic_id 16, MCU rev: 0x00000423
584 07:31:34.304532 AP: slot 2 apic_id 14, MCU rev: 0x00000423
585 07:31:34.305157 LAPIC 0x12 in XAPIC mode.
586 07:31:34.311435 AP: slot 6 apic_id 1, MCU rev: 0x00000423
587 07:31:34.314735 AP: slot 1 apic_id 12, MCU rev: 0x00000423
588 07:31:34.318488 Waiting for SIPI to complete...
589 07:31:34.319083 done.
590 07:31:34.321371 LAPIC 0x8 in XAPIC mode.
591 07:31:34.325157 LAPIC 0x9 in XAPIC mode.
592 07:31:34.328126 AP: slot 7 apic_id 8, MCU rev: 0x00000423
593 07:31:34.331861 AP: slot 5 apic_id 9, MCU rev: 0x00000423
594 07:31:34.334528 smm_setup_relocation_handler: enter
595 07:31:34.338138 smm_setup_relocation_handler: exit
596 07:31:34.348237 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
597 07:31:34.351371 Processing 11 relocs. Offset value of 0x00038000
598 07:31:34.358036 smm_module_setup_stub: stack_top = 0x7b804000
599 07:31:34.361205 smm_module_setup_stub: per cpu stack_size = 0x800
600 07:31:34.368280 smm_module_setup_stub: runtime.start32_offset = 0x4c
601 07:31:34.371470 smm_module_setup_stub: runtime.smm_size = 0x10000
602 07:31:34.377893 SMM Module: stub loaded at 38000. Will call 0x76a52094
603 07:31:34.381212 Installing permanent SMM handler to 0x7b800000
604 07:31:34.387619 smm_load_module: total_smm_space_needed e468, available -> 200000
605 07:31:34.398133 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
606 07:31:34.401466 Processing 255 relocs. Offset value of 0x7b9f6000
607 07:31:34.408229 smm_load_module: smram_start: 0x7b800000
608 07:31:34.411284 smm_load_module: smram_end: 7ba00000
609 07:31:34.414790 smm_load_module: handler start 0x7b9f6d5f
610 07:31:34.417752 smm_load_module: handler_size 98d0
611 07:31:34.421249 smm_load_module: fxsave_area 0x7b9ff000
612 07:31:34.424911 smm_load_module: fxsave_size 1000
613 07:31:34.427955 smm_load_module: CONFIG_MSEG_SIZE 0x0
614 07:31:34.434600 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
615 07:31:34.441017 smm_load_module: handler_mod_params.smbase = 0x7b800000
616 07:31:34.444454 smm_load_module: per_cpu_save_state_size = 0x400
617 07:31:34.447831 smm_load_module: num_cpus = 0x8
618 07:31:34.454400 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
619 07:31:34.457994 smm_load_module: total_save_state_size = 0x2000
620 07:31:34.461432 smm_load_module: cpu0 entry: 7b9e6000
621 07:31:34.467821 smm_create_map: cpus allowed in one segment 30
622 07:31:34.470910 smm_create_map: min # of segments needed 1
623 07:31:34.471500 CPU 0x0
624 07:31:34.474377 smbase 7b9e6000 entry 7b9ee000
625 07:31:34.481149 ss_start 7b9f5c00 code_end 7b9ee208
626 07:31:34.481747 CPU 0x1
627 07:31:34.484422 smbase 7b9e5c00 entry 7b9edc00
628 07:31:34.491277 ss_start 7b9f5800 code_end 7b9ede08
629 07:31:34.491869 CPU 0x2
630 07:31:34.494850 smbase 7b9e5800 entry 7b9ed800
631 07:31:34.497838 ss_start 7b9f5400 code_end 7b9eda08
632 07:31:34.501457 CPU 0x3
633 07:31:34.504330 smbase 7b9e5400 entry 7b9ed400
634 07:31:34.508108 ss_start 7b9f5000 code_end 7b9ed608
635 07:31:34.508757 CPU 0x4
636 07:31:34.514382 smbase 7b9e5000 entry 7b9ed000
637 07:31:34.517807 ss_start 7b9f4c00 code_end 7b9ed208
638 07:31:34.518299 CPU 0x5
639 07:31:34.520880 smbase 7b9e4c00 entry 7b9ecc00
640 07:31:34.527691 ss_start 7b9f4800 code_end 7b9ece08
641 07:31:34.528287 CPU 0x6
642 07:31:34.531310 smbase 7b9e4800 entry 7b9ec800
643 07:31:34.537785 ss_start 7b9f4400 code_end 7b9eca08
644 07:31:34.538380 CPU 0x7
645 07:31:34.541145 smbase 7b9e4400 entry 7b9ec400
646 07:31:34.544427 ss_start 7b9f4000 code_end 7b9ec608
647 07:31:34.554352 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
648 07:31:34.557745 Processing 11 relocs. Offset value of 0x7b9ee000
649 07:31:34.564198 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
650 07:31:34.571102 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
651 07:31:34.578014 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
652 07:31:34.584150 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
653 07:31:34.591572 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
654 07:31:34.594411 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
655 07:31:34.600929 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
656 07:31:34.607322 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
657 07:31:34.614220 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
658 07:31:34.620785 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
659 07:31:34.627344 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
660 07:31:34.634490 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
661 07:31:34.641019 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
662 07:31:34.644287 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
663 07:31:34.650842 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
664 07:31:34.657945 smm_module_setup_stub: stack_top = 0x7b804000
665 07:31:34.661455 smm_module_setup_stub: per cpu stack_size = 0x800
666 07:31:34.667752 smm_module_setup_stub: runtime.start32_offset = 0x4c
667 07:31:34.670988 smm_module_setup_stub: runtime.smm_size = 0x200000
668 07:31:34.677679 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
669 07:31:34.681806 Clearing SMI status registers
670 07:31:34.685401 SMI_STS: PM1
671 07:31:34.686014 PM1_STS: WAK PWRBTN
672 07:31:34.695379 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
673 07:31:34.695969 In relocation handler: CPU 0
674 07:31:34.702327 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
675 07:31:34.705915 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 07:31:34.708798 Relocation complete.
677 07:31:34.715738 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
678 07:31:34.718721 In relocation handler: CPU 6
679 07:31:34.722037 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
680 07:31:34.725698 Relocation complete.
681 07:31:34.731969 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
682 07:31:34.735631 In relocation handler: CPU 4
683 07:31:34.738656 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
684 07:31:34.742020 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 07:31:34.745758 Relocation complete.
686 07:31:34.752247 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
687 07:31:34.755478 In relocation handler: CPU 2
688 07:31:34.758687 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
689 07:31:34.765875 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 07:31:34.766471 Relocation complete.
691 07:31:34.775258 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
692 07:31:34.778715 In relocation handler: CPU 3
693 07:31:34.781700 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
694 07:31:34.785453 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 07:31:34.788868 Relocation complete.
696 07:31:34.795255 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
697 07:31:34.798872 In relocation handler: CPU 1
698 07:31:34.802112 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
699 07:31:34.808537 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 07:31:34.809048 Relocation complete.
701 07:31:34.815285 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
702 07:31:34.818515 In relocation handler: CPU 7
703 07:31:34.821821 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
704 07:31:34.828410 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 07:31:34.832022 Relocation complete.
706 07:31:34.838679 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
707 07:31:34.842130 In relocation handler: CPU 5
708 07:31:34.845293 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
709 07:31:34.848971 Relocation complete.
710 07:31:34.849597 Initializing CPU #0
711 07:31:34.851842 CPU: vendor Intel device 906a4
712 07:31:34.855457 CPU: family 06, model 9a, stepping 04
713 07:31:34.858903 Clearing out pending MCEs
714 07:31:34.862606 cpu: energy policy set to 7
715 07:31:34.865406 Turbo is available but hidden
716 07:31:34.868740 Turbo is available and visible
717 07:31:34.871815 microcode: Update skipped, already up-to-date
718 07:31:34.875597 CPU #0 initialized
719 07:31:34.876070 Initializing CPU #6
720 07:31:34.878219 Initializing CPU #3
721 07:31:34.882035 Initializing CPU #4
722 07:31:34.884983 CPU: vendor Intel device 906a4
723 07:31:34.888992 CPU: family 06, model 9a, stepping 04
724 07:31:34.892018 CPU: vendor Intel device 906a4
725 07:31:34.895174 CPU: family 06, model 9a, stepping 04
726 07:31:34.895762 Initializing CPU #2
727 07:31:34.898455 Clearing out pending MCEs
728 07:31:34.901632 CPU: vendor Intel device 906a4
729 07:31:34.905272 CPU: family 06, model 9a, stepping 04
730 07:31:34.908002 Clearing out pending MCEs
731 07:31:34.911528 Initializing CPU #1
732 07:31:34.911957 Clearing out pending MCEs
733 07:31:34.914714 Initializing CPU #5
734 07:31:34.918042 CPU: vendor Intel device 906a4
735 07:31:34.921777 CPU: family 06, model 9a, stepping 04
736 07:31:34.925372 cpu: energy policy set to 7
737 07:31:34.928242 CPU: vendor Intel device 906a4
738 07:31:34.931663 CPU: family 06, model 9a, stepping 04
739 07:31:34.937983 microcode: Update skipped, already up-to-date
740 07:31:34.938555 CPU #4 initialized
741 07:31:34.941464 cpu: energy policy set to 7
742 07:31:34.944551 Clearing out pending MCEs
743 07:31:34.948012 Clearing out pending MCEs
744 07:31:34.948589 cpu: energy policy set to 7
745 07:31:34.955196 microcode: Update skipped, already up-to-date
746 07:31:34.955777 CPU #3 initialized
747 07:31:34.961633 microcode: Update skipped, already up-to-date
748 07:31:34.962212 CPU #1 initialized
749 07:31:34.964324 cpu: energy policy set to 7
750 07:31:34.968497 cpu: energy policy set to 7
751 07:31:34.971415 microcode: Update skipped, already up-to-date
752 07:31:34.974925 CPU #2 initialized
753 07:31:34.977782 microcode: Update skipped, already up-to-date
754 07:31:34.981206 CPU #6 initialized
755 07:31:34.984942 CPU: vendor Intel device 906a4
756 07:31:34.988065 CPU: family 06, model 9a, stepping 04
757 07:31:34.991185 Initializing CPU #7
758 07:31:34.994402 Clearing out pending MCEs
759 07:31:34.994984 CPU: vendor Intel device 906a4
760 07:31:35.001287 CPU: family 06, model 9a, stepping 04
761 07:31:35.001872 cpu: energy policy set to 7
762 07:31:35.004145 Clearing out pending MCEs
763 07:31:35.011213 microcode: Update skipped, already up-to-date
764 07:31:35.011799 CPU #5 initialized
765 07:31:35.014242 cpu: energy policy set to 7
766 07:31:35.017664 microcode: Update skipped, already up-to-date
767 07:31:35.020806 CPU #7 initialized
768 07:31:35.024352 bsp_do_flight_plan done after 702 msecs.
769 07:31:35.027312 CPU: frequency set to 4400 MHz
770 07:31:35.030933 Enabling SMIs.
771 07:31:35.037330 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 414 / 521 ms
772 07:31:35.052504 Probing TPM I2C: done! DID_VID 0x00281ae0
773 07:31:35.056422 Locality already claimed
774 07:31:35.059484 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
775 07:31:35.070621 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
776 07:31:35.074021 Enabling GPIO PM b/c CR50 has long IRQ pulse support
777 07:31:35.080865 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
778 07:31:35.086995 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
779 07:31:35.090808 Found a VBT of 9216 bytes after decompression
780 07:31:35.094012 PCI 1.0, PIN A, using IRQ #16
781 07:31:35.097467 PCI 2.0, PIN A, using IRQ #17
782 07:31:35.100744 PCI 4.0, PIN A, using IRQ #18
783 07:31:35.103843 PCI 5.0, PIN A, using IRQ #16
784 07:31:35.107548 PCI 6.0, PIN A, using IRQ #16
785 07:31:35.110480 PCI 6.2, PIN C, using IRQ #18
786 07:31:35.113812 PCI 7.0, PIN A, using IRQ #19
787 07:31:35.117461 PCI 7.1, PIN B, using IRQ #20
788 07:31:35.120447 PCI 7.2, PIN C, using IRQ #21
789 07:31:35.123871 PCI 7.3, PIN D, using IRQ #22
790 07:31:35.127276 PCI 8.0, PIN A, using IRQ #23
791 07:31:35.130626 PCI D.0, PIN A, using IRQ #17
792 07:31:35.133773 PCI D.1, PIN B, using IRQ #19
793 07:31:35.134365 PCI 10.0, PIN A, using IRQ #24
794 07:31:35.136994 PCI 10.1, PIN B, using IRQ #25
795 07:31:35.141280 PCI 10.6, PIN C, using IRQ #20
796 07:31:35.143910 PCI 10.7, PIN D, using IRQ #21
797 07:31:35.146915 PCI 11.0, PIN A, using IRQ #26
798 07:31:35.150628 PCI 11.1, PIN B, using IRQ #27
799 07:31:35.153691 PCI 11.2, PIN C, using IRQ #28
800 07:31:35.157330 PCI 11.3, PIN D, using IRQ #29
801 07:31:35.160351 PCI 12.0, PIN A, using IRQ #30
802 07:31:35.163822 PCI 12.6, PIN B, using IRQ #31
803 07:31:35.166712 PCI 12.7, PIN C, using IRQ #22
804 07:31:35.170435 PCI 13.0, PIN A, using IRQ #32
805 07:31:35.173892 PCI 13.1, PIN B, using IRQ #33
806 07:31:35.177432 PCI 13.2, PIN C, using IRQ #34
807 07:31:35.180878 PCI 13.3, PIN D, using IRQ #35
808 07:31:35.183994 PCI 14.0, PIN B, using IRQ #23
809 07:31:35.184572 PCI 14.1, PIN A, using IRQ #36
810 07:31:35.186849 PCI 14.3, PIN C, using IRQ #17
811 07:31:35.190599 PCI 15.0, PIN A, using IRQ #37
812 07:31:35.193556 PCI 15.1, PIN B, using IRQ #38
813 07:31:35.197333 PCI 15.2, PIN C, using IRQ #39
814 07:31:35.200607 PCI 15.3, PIN D, using IRQ #40
815 07:31:35.203602 PCI 16.0, PIN A, using IRQ #18
816 07:31:35.206973 PCI 16.1, PIN B, using IRQ #19
817 07:31:35.210248 PCI 16.2, PIN C, using IRQ #20
818 07:31:35.213291 PCI 16.3, PIN D, using IRQ #21
819 07:31:35.217318 PCI 16.4, PIN A, using IRQ #18
820 07:31:35.220289 PCI 16.5, PIN B, using IRQ #19
821 07:31:35.223536 PCI 17.0, PIN A, using IRQ #22
822 07:31:35.227307 PCI 19.0, PIN A, using IRQ #41
823 07:31:35.230526 PCI 19.1, PIN B, using IRQ #42
824 07:31:35.233461 PCI 19.2, PIN C, using IRQ #43
825 07:31:35.236806 PCI 1C.0, PIN A, using IRQ #16
826 07:31:35.237438 PCI 1C.1, PIN B, using IRQ #17
827 07:31:35.240371 PCI 1C.2, PIN C, using IRQ #18
828 07:31:35.243402 PCI 1C.3, PIN D, using IRQ #19
829 07:31:35.246806 PCI 1C.4, PIN A, using IRQ #16
830 07:31:35.250556 PCI 1C.5, PIN B, using IRQ #17
831 07:31:35.254057 PCI 1C.6, PIN C, using IRQ #18
832 07:31:35.256807 PCI 1C.7, PIN D, using IRQ #19
833 07:31:35.260198 PCI 1D.0, PIN A, using IRQ #16
834 07:31:35.263677 PCI 1D.1, PIN B, using IRQ #17
835 07:31:35.266576 PCI 1D.2, PIN C, using IRQ #18
836 07:31:35.270450 PCI 1D.3, PIN D, using IRQ #19
837 07:31:35.273452 PCI 1E.0, PIN A, using IRQ #23
838 07:31:35.276962 PCI 1E.1, PIN B, using IRQ #20
839 07:31:35.280062 PCI 1E.2, PIN C, using IRQ #44
840 07:31:35.283763 PCI 1E.3, PIN D, using IRQ #45
841 07:31:35.287071 PCI 1F.3, PIN B, using IRQ #22
842 07:31:35.287558 PCI 1F.4, PIN C, using IRQ #23
843 07:31:35.290343 PCI 1F.6, PIN D, using IRQ #20
844 07:31:35.293386 PCI 1F.7, PIN A, using IRQ #21
845 07:31:35.300265 IRQ: Using dynamically assigned PCI IO-APIC IRQs
846 07:31:35.307250 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
847 07:31:35.489539 FSPS returned 0
848 07:31:35.492883 Executing Phase 1 of FspMultiPhaseSiInit
849 07:31:35.502383 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
850 07:31:35.505598 port C0 DISC req: usage 1 usb3 1 usb2 1
851 07:31:35.508930 Raw Buffer output 0 00000111
852 07:31:35.512133 Raw Buffer output 1 00000000
853 07:31:35.516242 pmc_send_ipc_cmd succeeded
854 07:31:35.522852 port C1 DISC req: usage 1 usb3 3 usb2 3
855 07:31:35.523446 Raw Buffer output 0 00000331
856 07:31:35.526028 Raw Buffer output 1 00000000
857 07:31:35.530576 pmc_send_ipc_cmd succeeded
858 07:31:35.534031 Detected 6 core, 8 thread CPU.
859 07:31:35.537193 Detected 6 core, 8 thread CPU.
860 07:31:35.542852 Detected 6 core, 8 thread CPU.
861 07:31:35.545958 Detected 6 core, 8 thread CPU.
862 07:31:35.549255 Detected 6 core, 8 thread CPU.
863 07:31:35.552596 Detected 6 core, 8 thread CPU.
864 07:31:35.555812 Detected 6 core, 8 thread CPU.
865 07:31:35.559310 Detected 6 core, 8 thread CPU.
866 07:31:35.562511 Detected 6 core, 8 thread CPU.
867 07:31:35.565750 Detected 6 core, 8 thread CPU.
868 07:31:35.568876 Detected 6 core, 8 thread CPU.
869 07:31:35.572788 Detected 6 core, 8 thread CPU.
870 07:31:35.576046 Detected 6 core, 8 thread CPU.
871 07:31:35.579082 Detected 6 core, 8 thread CPU.
872 07:31:35.582334 Detected 6 core, 8 thread CPU.
873 07:31:35.586114 Detected 6 core, 8 thread CPU.
874 07:31:35.589599 Detected 6 core, 8 thread CPU.
875 07:31:35.592702 Detected 6 core, 8 thread CPU.
876 07:31:35.596076 Detected 6 core, 8 thread CPU.
877 07:31:35.599273 Detected 6 core, 8 thread CPU.
878 07:31:35.602624 Detected 6 core, 8 thread CPU.
879 07:31:35.603215 Detected 6 core, 8 thread CPU.
880 07:31:35.895078 Detected 6 core, 8 thread CPU.
881 07:31:35.898764 Detected 6 core, 8 thread CPU.
882 07:31:35.901703 Detected 6 core, 8 thread CPU.
883 07:31:35.905283 Detected 6 core, 8 thread CPU.
884 07:31:35.908762 Detected 6 core, 8 thread CPU.
885 07:31:35.911798 Detected 6 core, 8 thread CPU.
886 07:31:35.915141 Detected 6 core, 8 thread CPU.
887 07:31:35.918655 Detected 6 core, 8 thread CPU.
888 07:31:35.921776 Detected 6 core, 8 thread CPU.
889 07:31:35.925462 Detected 6 core, 8 thread CPU.
890 07:31:35.928433 Detected 6 core, 8 thread CPU.
891 07:31:35.932061 Detected 6 core, 8 thread CPU.
892 07:31:35.935111 Detected 6 core, 8 thread CPU.
893 07:31:35.938399 Detected 6 core, 8 thread CPU.
894 07:31:35.941604 Detected 6 core, 8 thread CPU.
895 07:31:35.945022 Detected 6 core, 8 thread CPU.
896 07:31:35.948779 Detected 6 core, 8 thread CPU.
897 07:31:35.951789 Detected 6 core, 8 thread CPU.
898 07:31:35.955042 Detected 6 core, 8 thread CPU.
899 07:31:35.955623 Detected 6 core, 8 thread CPU.
900 07:31:35.958965 Display FSP Version Info HOB
901 07:31:35.962128 Reference Code - CPU = c.0.65.70
902 07:31:35.965917 uCode Version = 0.0.4.23
903 07:31:35.968595 TXT ACM version = ff.ff.ff.ffff
904 07:31:35.972125 Reference Code - ME = c.0.65.70
905 07:31:35.975472 MEBx version = 0.0.0.0
906 07:31:35.978893 ME Firmware Version = Lite SKU
907 07:31:35.981845 Reference Code - PCH = c.0.65.70
908 07:31:35.984951 PCH-CRID Status = Disabled
909 07:31:35.988380 PCH-CRID Original Value = ff.ff.ff.ffff
910 07:31:35.991759 PCH-CRID New Value = ff.ff.ff.ffff
911 07:31:35.995245 OPROM - RST - RAID = ff.ff.ff.ffff
912 07:31:35.998436 PCH Hsio Version = 4.0.0.0
913 07:31:36.001566 Reference Code - SA - System Agent = c.0.65.70
914 07:31:36.005279 Reference Code - MRC = 0.0.3.80
915 07:31:36.008648 SA - PCIe Version = c.0.65.70
916 07:31:36.011862 SA-CRID Status = Disabled
917 07:31:36.014951 SA-CRID Original Value = 0.0.0.4
918 07:31:36.018501 SA-CRID New Value = 0.0.0.4
919 07:31:36.021475 OPROM - VBIOS = ff.ff.ff.ffff
920 07:31:36.026415 IO Manageability Engine FW Version = 24.0.4.0
921 07:31:36.028408 PHY Build Version = 0.0.0.2016
922 07:31:36.031805 Thunderbolt(TM) FW Version = 0.0.0.0
923 07:31:36.038088 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
924 07:31:36.044918 BS: BS_DEV_INIT_CHIPS run times (exec / console): 493 / 507 ms
925 07:31:36.048449 Enumerating buses...
926 07:31:36.051575 Show all devs... Before device enumeration.
927 07:31:36.054800 Root Device: enabled 1
928 07:31:36.055382 CPU_CLUSTER: 0: enabled 1
929 07:31:36.058048 DOMAIN: 0000: enabled 1
930 07:31:36.061611 GPIO: 0: enabled 1
931 07:31:36.062188 PCI: 00:00.0: enabled 1
932 07:31:36.064600 PCI: 00:01.0: enabled 0
933 07:31:36.068204 PCI: 00:01.1: enabled 0
934 07:31:36.071260 PCI: 00:02.0: enabled 1
935 07:31:36.071747 PCI: 00:04.0: enabled 1
936 07:31:36.075075 PCI: 00:05.0: enabled 0
937 07:31:36.077679 PCI: 00:06.0: enabled 1
938 07:31:36.081159 PCI: 00:06.2: enabled 0
939 07:31:36.081744 PCI: 00:07.0: enabled 0
940 07:31:36.084293 PCI: 00:07.1: enabled 0
941 07:31:36.087575 PCI: 00:07.2: enabled 0
942 07:31:36.091030 PCI: 00:07.3: enabled 0
943 07:31:36.091514 PCI: 00:08.0: enabled 0
944 07:31:36.094636 PCI: 00:09.0: enabled 0
945 07:31:36.097937 PCI: 00:0a.0: enabled 1
946 07:31:36.100853 PCI: 00:0d.0: enabled 1
947 07:31:36.101373 PCI: 00:0d.1: enabled 0
948 07:31:36.104267 PCI: 00:0d.2: enabled 0
949 07:31:36.107883 PCI: 00:0d.3: enabled 0
950 07:31:36.108633 PCI: 00:0e.0: enabled 0
951 07:31:36.111050 PCI: 00:10.0: enabled 0
952 07:31:36.114727 PCI: 00:10.1: enabled 0
953 07:31:36.117800 PCI: 00:10.6: enabled 0
954 07:31:36.118387 PCI: 00:10.7: enabled 0
955 07:31:36.120980 PCI: 00:12.0: enabled 0
956 07:31:36.124419 PCI: 00:12.6: enabled 0
957 07:31:36.128134 PCI: 00:12.7: enabled 0
958 07:31:36.128730 PCI: 00:13.0: enabled 0
959 07:31:36.131316 PCI: 00:14.0: enabled 1
960 07:31:36.134278 PCI: 00:14.1: enabled 0
961 07:31:36.138367 PCI: 00:14.2: enabled 1
962 07:31:36.138956 PCI: 00:14.3: enabled 1
963 07:31:36.140963 PCI: 00:15.0: enabled 1
964 07:31:36.144443 PCI: 00:15.1: enabled 1
965 07:31:36.145030 PCI: 00:15.2: enabled 0
966 07:31:36.147900 PCI: 00:15.3: enabled 1
967 07:31:36.151197 PCI: 00:16.0: enabled 1
968 07:31:36.154524 PCI: 00:16.1: enabled 0
969 07:31:36.155110 PCI: 00:16.2: enabled 0
970 07:31:36.157569 PCI: 00:16.3: enabled 0
971 07:31:36.161062 PCI: 00:16.4: enabled 0
972 07:31:36.164658 PCI: 00:16.5: enabled 0
973 07:31:36.165278 PCI: 00:17.0: enabled 1
974 07:31:36.167741 PCI: 00:19.0: enabled 0
975 07:31:36.171615 PCI: 00:19.1: enabled 1
976 07:31:36.174740 PCI: 00:19.2: enabled 0
977 07:31:36.175327 PCI: 00:1a.0: enabled 0
978 07:31:36.177759 PCI: 00:1c.0: enabled 0
979 07:31:36.181048 PCI: 00:1c.1: enabled 0
980 07:31:36.181676 PCI: 00:1c.2: enabled 0
981 07:31:36.184410 PCI: 00:1c.3: enabled 0
982 07:31:36.187296 PCI: 00:1c.4: enabled 0
983 07:31:36.190594 PCI: 00:1c.5: enabled 0
984 07:31:36.191074 PCI: 00:1c.6: enabled 0
985 07:31:36.193905 PCI: 00:1c.7: enabled 0
986 07:31:36.197480 PCI: 00:1d.0: enabled 0
987 07:31:36.200775 PCI: 00:1d.1: enabled 0
988 07:31:36.201283 PCI: 00:1d.2: enabled 0
989 07:31:36.204385 PCI: 00:1d.3: enabled 0
990 07:31:36.207488 PCI: 00:1e.0: enabled 1
991 07:31:36.210686 PCI: 00:1e.1: enabled 0
992 07:31:36.211172 PCI: 00:1e.2: enabled 0
993 07:31:36.214072 PCI: 00:1e.3: enabled 1
994 07:31:36.217381 PCI: 00:1f.0: enabled 1
995 07:31:36.221000 PCI: 00:1f.1: enabled 0
996 07:31:36.221642 PCI: 00:1f.2: enabled 1
997 07:31:36.223952 PCI: 00:1f.3: enabled 1
998 07:31:36.227592 PCI: 00:1f.4: enabled 0
999 07:31:36.228181 PCI: 00:1f.5: enabled 1
1000 07:31:36.230596 PCI: 00:1f.6: enabled 0
1001 07:31:36.233954 PCI: 00:1f.7: enabled 0
1002 07:31:36.237602 GENERIC: 0.0: enabled 1
1003 07:31:36.238192 GENERIC: 0.0: enabled 1
1004 07:31:36.241184 GENERIC: 1.0: enabled 1
1005 07:31:36.244270 GENERIC: 0.0: enabled 1
1006 07:31:36.247840 GENERIC: 1.0: enabled 1
1007 07:31:36.248431 USB0 port 0: enabled 1
1008 07:31:36.251008 USB0 port 0: enabled 1
1009 07:31:36.254323 GENERIC: 0.0: enabled 1
1010 07:31:36.254942 I2C: 00:1a: enabled 1
1011 07:31:36.257670 I2C: 00:31: enabled 1
1012 07:31:36.260958 I2C: 00:32: enabled 1
1013 07:31:36.261579 I2C: 00:50: enabled 1
1014 07:31:36.264363 I2C: 00:10: enabled 1
1015 07:31:36.267586 I2C: 00:15: enabled 1
1016 07:31:36.268174 I2C: 00:2c: enabled 1
1017 07:31:36.270987 GENERIC: 0.0: enabled 1
1018 07:31:36.274230 SPI: 00: enabled 1
1019 07:31:36.274812 PNP: 0c09.0: enabled 1
1020 07:31:36.277921 GENERIC: 0.0: enabled 1
1021 07:31:36.281133 USB3 port 0: enabled 1
1022 07:31:36.284132 USB3 port 1: enabled 0
1023 07:31:36.284716 USB3 port 2: enabled 1
1024 07:31:36.287258 USB3 port 3: enabled 0
1025 07:31:36.290866 USB2 port 0: enabled 1
1026 07:31:36.291441 USB2 port 1: enabled 0
1027 07:31:36.294046 USB2 port 2: enabled 1
1028 07:31:36.297728 USB2 port 3: enabled 0
1029 07:31:36.300821 USB2 port 4: enabled 0
1030 07:31:36.301464 USB2 port 5: enabled 1
1031 07:31:36.303817 USB2 port 6: enabled 0
1032 07:31:36.307843 USB2 port 7: enabled 0
1033 07:31:36.308420 USB2 port 8: enabled 1
1034 07:31:36.310337 USB2 port 9: enabled 1
1035 07:31:36.313713 USB3 port 0: enabled 1
1036 07:31:36.317381 USB3 port 1: enabled 0
1037 07:31:36.317945 USB3 port 2: enabled 0
1038 07:31:36.320921 USB3 port 3: enabled 0
1039 07:31:36.323623 GENERIC: 0.0: enabled 1
1040 07:31:36.324191 GENERIC: 1.0: enabled 1
1041 07:31:36.327140 APIC: 00: enabled 1
1042 07:31:36.330486 APIC: 12: enabled 1
1043 07:31:36.330962 APIC: 14: enabled 1
1044 07:31:36.333824 APIC: 16: enabled 1
1045 07:31:36.334401 APIC: 10: enabled 1
1046 07:31:36.337280 APIC: 09: enabled 1
1047 07:31:36.340375 APIC: 01: enabled 1
1048 07:31:36.340947 APIC: 08: enabled 1
1049 07:31:36.343581 Compare with tree...
1050 07:31:36.347256 Root Device: enabled 1
1051 07:31:36.347823 CPU_CLUSTER: 0: enabled 1
1052 07:31:36.350567 APIC: 00: enabled 1
1053 07:31:36.353977 APIC: 12: enabled 1
1054 07:31:36.357624 APIC: 14: enabled 1
1055 07:31:36.358222 APIC: 16: enabled 1
1056 07:31:36.360643 APIC: 10: enabled 1
1057 07:31:36.363946 APIC: 09: enabled 1
1058 07:31:36.364512 APIC: 01: enabled 1
1059 07:31:36.367542 APIC: 08: enabled 1
1060 07:31:36.370441 DOMAIN: 0000: enabled 1
1061 07:31:36.370914 GPIO: 0: enabled 1
1062 07:31:36.374185 PCI: 00:00.0: enabled 1
1063 07:31:36.377612 PCI: 00:01.0: enabled 0
1064 07:31:36.380651 PCI: 00:01.1: enabled 0
1065 07:31:36.381277 PCI: 00:02.0: enabled 1
1066 07:31:36.384003 PCI: 00:04.0: enabled 1
1067 07:31:36.387370 GENERIC: 0.0: enabled 1
1068 07:31:36.390730 PCI: 00:05.0: enabled 0
1069 07:31:36.394067 PCI: 00:06.0: enabled 1
1070 07:31:36.394888 PCI: 00:06.2: enabled 0
1071 07:31:36.398770 PCI: 00:08.0: enabled 0
1072 07:31:36.400365 PCI: 00:09.0: enabled 0
1073 07:31:36.403972 PCI: 00:0a.0: enabled 1
1074 07:31:36.407586 PCI: 00:0d.0: enabled 1
1075 07:31:36.408157 USB0 port 0: enabled 1
1076 07:31:36.410782 USB3 port 0: enabled 1
1077 07:31:36.413609 USB3 port 1: enabled 0
1078 07:31:36.417492 USB3 port 2: enabled 1
1079 07:31:36.420554 USB3 port 3: enabled 0
1080 07:31:36.421160 PCI: 00:0d.1: enabled 0
1081 07:31:36.424257 PCI: 00:0d.2: enabled 0
1082 07:31:36.427383 PCI: 00:0d.3: enabled 0
1083 07:31:36.430280 PCI: 00:0e.0: enabled 0
1084 07:31:36.434152 PCI: 00:10.0: enabled 0
1085 07:31:36.434721 PCI: 00:10.1: enabled 0
1086 07:31:36.437564 PCI: 00:10.6: enabled 0
1087 07:31:36.440308 PCI: 00:10.7: enabled 0
1088 07:31:36.444157 PCI: 00:12.0: enabled 0
1089 07:31:36.447722 PCI: 00:12.6: enabled 0
1090 07:31:36.448290 PCI: 00:12.7: enabled 0
1091 07:31:36.450191 PCI: 00:13.0: enabled 0
1092 07:31:36.453673 PCI: 00:14.0: enabled 1
1093 07:31:36.457018 USB0 port 0: enabled 1
1094 07:31:36.460614 USB2 port 0: enabled 1
1095 07:31:36.461213 USB2 port 1: enabled 0
1096 07:31:36.463691 USB2 port 2: enabled 1
1097 07:31:36.466966 USB2 port 3: enabled 0
1098 07:31:36.470239 USB2 port 4: enabled 0
1099 07:31:36.473881 USB2 port 5: enabled 1
1100 07:31:36.477126 USB2 port 6: enabled 0
1101 07:31:36.477701 USB2 port 7: enabled 0
1102 07:31:36.480771 USB2 port 8: enabled 1
1103 07:31:36.483551 USB2 port 9: enabled 1
1104 07:31:36.486861 USB3 port 0: enabled 1
1105 07:31:36.490404 USB3 port 1: enabled 0
1106 07:31:36.493935 USB3 port 2: enabled 0
1107 07:31:36.494504 USB3 port 3: enabled 0
1108 07:31:36.497224 PCI: 00:14.1: enabled 0
1109 07:31:36.500352 PCI: 00:14.2: enabled 1
1110 07:31:36.503614 PCI: 00:14.3: enabled 1
1111 07:31:36.507326 GENERIC: 0.0: enabled 1
1112 07:31:36.507894 PCI: 00:15.0: enabled 1
1113 07:31:36.509978 I2C: 00:1a: enabled 1
1114 07:31:36.513741 I2C: 00:31: enabled 1
1115 07:31:36.517140 I2C: 00:32: enabled 1
1116 07:31:36.517713 PCI: 00:15.1: enabled 1
1117 07:31:36.520250 I2C: 00:50: enabled 1
1118 07:31:36.523381 PCI: 00:15.2: enabled 0
1119 07:31:36.526809 PCI: 00:15.3: enabled 1
1120 07:31:36.530148 I2C: 00:10: enabled 1
1121 07:31:36.530714 PCI: 00:16.0: enabled 1
1122 07:31:36.533585 PCI: 00:16.1: enabled 0
1123 07:31:36.536969 PCI: 00:16.2: enabled 0
1124 07:31:36.540239 PCI: 00:16.3: enabled 0
1125 07:31:36.543390 PCI: 00:16.4: enabled 0
1126 07:31:36.543955 PCI: 00:16.5: enabled 0
1127 07:31:36.546821 PCI: 00:17.0: enabled 1
1128 07:31:36.549910 PCI: 00:19.0: enabled 0
1129 07:31:36.553485 PCI: 00:19.1: enabled 1
1130 07:31:36.554057 I2C: 00:15: enabled 1
1131 07:31:36.556493 I2C: 00:2c: enabled 1
1132 07:31:36.560108 PCI: 00:19.2: enabled 0
1133 07:31:36.563714 PCI: 00:1a.0: enabled 0
1134 07:31:36.566578 PCI: 00:1e.0: enabled 1
1135 07:31:36.567151 PCI: 00:1e.1: enabled 0
1136 07:31:36.570070 PCI: 00:1e.2: enabled 0
1137 07:31:36.573553 PCI: 00:1e.3: enabled 1
1138 07:31:36.576684 SPI: 00: enabled 1
1139 07:31:36.577291 PCI: 00:1f.0: enabled 1
1140 07:31:36.579976 PNP: 0c09.0: enabled 1
1141 07:31:36.583516 PCI: 00:1f.1: enabled 0
1142 07:31:36.586822 PCI: 00:1f.2: enabled 1
1143 07:31:36.589759 GENERIC: 0.0: enabled 1
1144 07:31:36.593705 GENERIC: 0.0: enabled 1
1145 07:31:36.594280 GENERIC: 1.0: enabled 1
1146 07:31:36.596617 PCI: 00:1f.3: enabled 1
1147 07:31:36.600075 PCI: 00:1f.4: enabled 0
1148 07:31:36.603269 PCI: 00:1f.5: enabled 1
1149 07:31:36.606698 PCI: 00:1f.6: enabled 0
1150 07:31:36.607284 PCI: 00:1f.7: enabled 0
1151 07:31:36.610184 Root Device scanning...
1152 07:31:36.613233 scan_static_bus for Root Device
1153 07:31:36.616959 CPU_CLUSTER: 0 enabled
1154 07:31:36.617584 DOMAIN: 0000 enabled
1155 07:31:36.620385 DOMAIN: 0000 scanning...
1156 07:31:36.623777 PCI: pci_scan_bus for bus 00
1157 07:31:36.626594 PCI: 00:00.0 [8086/0000] ops
1158 07:31:36.629934 PCI: 00:00.0 [8086/4609] enabled
1159 07:31:36.633577 PCI: 00:02.0 [8086/0000] bus ops
1160 07:31:36.636747 PCI: 00:02.0 [8086/46b3] enabled
1161 07:31:36.640192 PCI: 00:04.0 [8086/0000] bus ops
1162 07:31:36.643414 PCI: 00:04.0 [8086/461d] enabled
1163 07:31:36.646850 PCI: 00:06.0 [8086/0000] bus ops
1164 07:31:36.649875 PCI: 00:06.0 [8086/464d] enabled
1165 07:31:36.653330 PCI: 00:08.0 [8086/464f] disabled
1166 07:31:36.656596 PCI: 00:0a.0 [8086/467d] enabled
1167 07:31:36.659928 PCI: 00:0d.0 [8086/0000] bus ops
1168 07:31:36.663618 PCI: 00:0d.0 [8086/461e] enabled
1169 07:31:36.666713 PCI: 00:14.0 [8086/0000] bus ops
1170 07:31:36.669996 PCI: 00:14.0 [8086/51ed] enabled
1171 07:31:36.673474 PCI: 00:14.2 [8086/51ef] enabled
1172 07:31:36.676723 PCI: 00:14.3 [8086/0000] bus ops
1173 07:31:36.679960 PCI: 00:14.3 [8086/51f0] enabled
1174 07:31:36.683434 PCI: 00:15.0 [8086/0000] bus ops
1175 07:31:36.686503 PCI: 00:15.0 [8086/51e8] enabled
1176 07:31:36.689971 PCI: 00:15.1 [8086/0000] bus ops
1177 07:31:36.693502 PCI: 00:15.1 [8086/51e9] enabled
1178 07:31:36.696747 PCI: 00:15.2 [8086/0000] bus ops
1179 07:31:36.699942 PCI: 00:15.2 [8086/51ea] disabled
1180 07:31:36.703225 PCI: 00:15.3 [8086/0000] bus ops
1181 07:31:36.706915 PCI: 00:15.3 [8086/51eb] enabled
1182 07:31:36.709761 PCI: 00:16.0 [8086/0000] ops
1183 07:31:36.712890 PCI: 00:16.0 [8086/51e0] enabled
1184 07:31:36.719544 PCI: Static device PCI: 00:17.0 not found, disabling it.
1185 07:31:36.722810 PCI: 00:19.0 [8086/0000] bus ops
1186 07:31:36.726349 PCI: 00:19.0 [8086/51c5] disabled
1187 07:31:36.729841 PCI: 00:19.1 [8086/0000] bus ops
1188 07:31:36.733029 PCI: 00:19.1 [8086/51c6] enabled
1189 07:31:36.736481 PCI: 00:1e.0 [8086/0000] ops
1190 07:31:36.739849 PCI: 00:1e.0 [8086/51a8] enabled
1191 07:31:36.743196 PCI: 00:1e.3 [8086/0000] bus ops
1192 07:31:36.746864 PCI: 00:1e.3 [8086/51ab] enabled
1193 07:31:36.750098 PCI: 00:1f.0 [8086/0000] bus ops
1194 07:31:36.753278 PCI: 00:1f.0 [8086/5182] enabled
1195 07:31:36.753852 RTC Init
1196 07:31:36.760166 Set power on after power failure.
1197 07:31:36.760780 Disabling Deep S3
1198 07:31:36.763214 Disabling Deep S3
1199 07:31:36.763787 Disabling Deep S4
1200 07:31:36.766915 Disabling Deep S4
1201 07:31:36.767494 Disabling Deep S5
1202 07:31:36.771214 Disabling Deep S5
1203 07:31:36.773398 PCI: 00:1f.2 [0000/0000] hidden
1204 07:31:36.776739 PCI: 00:1f.3 [8086/0000] bus ops
1205 07:31:36.780202 PCI: 00:1f.3 [8086/51c8] enabled
1206 07:31:36.783610 PCI: 00:1f.5 [8086/0000] bus ops
1207 07:31:36.786667 PCI: 00:1f.5 [8086/51a4] enabled
1208 07:31:36.787187 GPIO: 0 enabled
1209 07:31:36.789796 PCI: Leftover static devices:
1210 07:31:36.793512 PCI: 00:01.0
1211 07:31:36.794077 PCI: 00:01.1
1212 07:31:36.797327 PCI: 00:05.0
1213 07:31:36.797888 PCI: 00:06.2
1214 07:31:36.798272 PCI: 00:09.0
1215 07:31:36.800313 PCI: 00:0d.1
1216 07:31:36.800881 PCI: 00:0d.2
1217 07:31:36.803582 PCI: 00:0d.3
1218 07:31:36.804054 PCI: 00:0e.0
1219 07:31:36.804430 PCI: 00:10.0
1220 07:31:36.807065 PCI: 00:10.1
1221 07:31:36.807631 PCI: 00:10.6
1222 07:31:36.810157 PCI: 00:10.7
1223 07:31:36.810634 PCI: 00:12.0
1224 07:31:36.811011 PCI: 00:12.6
1225 07:31:36.813308 PCI: 00:12.7
1226 07:31:36.813782 PCI: 00:13.0
1227 07:31:36.816819 PCI: 00:14.1
1228 07:31:36.817445 PCI: 00:16.1
1229 07:31:36.817829 PCI: 00:16.2
1230 07:31:36.820246 PCI: 00:16.3
1231 07:31:36.820821 PCI: 00:16.4
1232 07:31:36.823828 PCI: 00:16.5
1233 07:31:36.824406 PCI: 00:17.0
1234 07:31:36.826950 PCI: 00:19.2
1235 07:31:36.827526 PCI: 00:1a.0
1236 07:31:36.827907 PCI: 00:1e.1
1237 07:31:36.830326 PCI: 00:1e.2
1238 07:31:36.830906 PCI: 00:1f.1
1239 07:31:36.833508 PCI: 00:1f.4
1240 07:31:36.833982 PCI: 00:1f.6
1241 07:31:36.834359 PCI: 00:1f.7
1242 07:31:36.836963 PCI: Check your devicetree.cb.
1243 07:31:36.840390 PCI: 00:02.0 scanning...
1244 07:31:36.843820 scan_generic_bus for PCI: 00:02.0
1245 07:31:36.847014 scan_generic_bus for PCI: 00:02.0 done
1246 07:31:36.853652 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1247 07:31:36.854235 PCI: 00:04.0 scanning...
1248 07:31:36.860189 scan_generic_bus for PCI: 00:04.0
1249 07:31:36.860769 GENERIC: 0.0 enabled
1250 07:31:36.866882 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1251 07:31:36.869969 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1252 07:31:36.873710 PCI: 00:06.0 scanning...
1253 07:31:36.876899 do_pci_scan_bridge for PCI: 00:06.0
1254 07:31:36.879800 PCI: pci_scan_bus for bus 01
1255 07:31:36.883224 PCI: 01:00.0 [15b7/5009] enabled
1256 07:31:36.886857 Enabling Common Clock Configuration
1257 07:31:36.889817 L1 Sub-State supported from root port 6
1258 07:31:36.893121 L1 Sub-State Support = 0x5
1259 07:31:36.896993 CommonModeRestoreTime = 0x6e
1260 07:31:36.900022 Power On Value = 0x5, Power On Scale = 0x2
1261 07:31:36.903862 ASPM: Enabled L1
1262 07:31:36.906834 PCIe: Max_Payload_Size adjusted to 256
1263 07:31:36.909848 PCI: 01:00.0: Enabled LTR
1264 07:31:36.913057 PCI: 01:00.0: Programmed LTR max latencies
1265 07:31:36.920140 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1266 07:31:36.920744 PCI: 00:0d.0 scanning...
1267 07:31:36.923121 scan_static_bus for PCI: 00:0d.0
1268 07:31:36.927073 USB0 port 0 enabled
1269 07:31:36.929992 USB0 port 0 scanning...
1270 07:31:36.933765 scan_static_bus for USB0 port 0
1271 07:31:36.934332 USB3 port 0 enabled
1272 07:31:36.936669 USB3 port 1 disabled
1273 07:31:36.939940 USB3 port 2 enabled
1274 07:31:36.940503 USB3 port 3 disabled
1275 07:31:36.943440 USB3 port 0 scanning...
1276 07:31:36.947007 scan_static_bus for USB3 port 0
1277 07:31:36.950104 scan_static_bus for USB3 port 0 done
1278 07:31:36.956399 scan_bus: bus USB3 port 0 finished in 6 msecs
1279 07:31:36.956969 USB3 port 2 scanning...
1280 07:31:36.960040 scan_static_bus for USB3 port 2
1281 07:31:36.963281 scan_static_bus for USB3 port 2 done
1282 07:31:36.969991 scan_bus: bus USB3 port 2 finished in 6 msecs
1283 07:31:36.973135 scan_static_bus for USB0 port 0 done
1284 07:31:36.976358 scan_bus: bus USB0 port 0 finished in 43 msecs
1285 07:31:36.979962 scan_static_bus for PCI: 00:0d.0 done
1286 07:31:36.986423 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1287 07:31:36.989841 PCI: 00:14.0 scanning...
1288 07:31:36.992724 scan_static_bus for PCI: 00:14.0
1289 07:31:36.993254 USB0 port 0 enabled
1290 07:31:36.996390 USB0 port 0 scanning...
1291 07:31:36.999648 scan_static_bus for USB0 port 0
1292 07:31:37.003141 USB2 port 0 enabled
1293 07:31:37.003707 USB2 port 1 disabled
1294 07:31:37.006608 USB2 port 2 enabled
1295 07:31:37.007075 USB2 port 3 disabled
1296 07:31:37.009704 USB2 port 4 disabled
1297 07:31:37.012910 USB2 port 5 enabled
1298 07:31:37.013503 USB2 port 6 disabled
1299 07:31:37.016252 USB2 port 7 disabled
1300 07:31:37.020219 USB2 port 8 enabled
1301 07:31:37.020782 USB2 port 9 enabled
1302 07:31:37.023092 USB3 port 0 enabled
1303 07:31:37.026492 USB3 port 1 disabled
1304 07:31:37.027052 USB3 port 2 disabled
1305 07:31:37.029697 USB3 port 3 disabled
1306 07:31:37.033437 USB2 port 0 scanning...
1307 07:31:37.036481 scan_static_bus for USB2 port 0
1308 07:31:37.039954 scan_static_bus for USB2 port 0 done
1309 07:31:37.043185 scan_bus: bus USB2 port 0 finished in 6 msecs
1310 07:31:37.046687 USB2 port 2 scanning...
1311 07:31:37.050022 scan_static_bus for USB2 port 2
1312 07:31:37.053260 scan_static_bus for USB2 port 2 done
1313 07:31:37.056660 scan_bus: bus USB2 port 2 finished in 6 msecs
1314 07:31:37.059766 USB2 port 5 scanning...
1315 07:31:37.063043 scan_static_bus for USB2 port 5
1316 07:31:37.066323 scan_static_bus for USB2 port 5 done
1317 07:31:37.069410 scan_bus: bus USB2 port 5 finished in 6 msecs
1318 07:31:37.073221 USB2 port 8 scanning...
1319 07:31:37.076255 scan_static_bus for USB2 port 8
1320 07:31:37.079644 scan_static_bus for USB2 port 8 done
1321 07:31:37.086239 scan_bus: bus USB2 port 8 finished in 6 msecs
1322 07:31:37.086811 USB2 port 9 scanning...
1323 07:31:37.089272 scan_static_bus for USB2 port 9
1324 07:31:37.092710 scan_static_bus for USB2 port 9 done
1325 07:31:37.099269 scan_bus: bus USB2 port 9 finished in 6 msecs
1326 07:31:37.102896 USB3 port 0 scanning...
1327 07:31:37.105785 scan_static_bus for USB3 port 0
1328 07:31:37.109303 scan_static_bus for USB3 port 0 done
1329 07:31:37.112499 scan_bus: bus USB3 port 0 finished in 6 msecs
1330 07:31:37.116403 scan_static_bus for USB0 port 0 done
1331 07:31:37.122494 scan_bus: bus USB0 port 0 finished in 120 msecs
1332 07:31:37.126006 scan_static_bus for PCI: 00:14.0 done
1333 07:31:37.129260 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1334 07:31:37.132618 PCI: 00:14.3 scanning...
1335 07:31:37.136053 scan_static_bus for PCI: 00:14.3
1336 07:31:37.139342 GENERIC: 0.0 enabled
1337 07:31:37.142503 scan_static_bus for PCI: 00:14.3 done
1338 07:31:37.145946 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1339 07:31:37.149327 PCI: 00:15.0 scanning...
1340 07:31:37.152517 scan_static_bus for PCI: 00:15.0
1341 07:31:37.156005 I2C: 00:1a enabled
1342 07:31:37.156566 I2C: 00:31 enabled
1343 07:31:37.159303 I2C: 00:32 enabled
1344 07:31:37.162970 scan_static_bus for PCI: 00:15.0 done
1345 07:31:37.165616 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1346 07:31:37.169269 PCI: 00:15.1 scanning...
1347 07:31:37.172231 scan_static_bus for PCI: 00:15.1
1348 07:31:37.175686 I2C: 00:50 enabled
1349 07:31:37.178733 scan_static_bus for PCI: 00:15.1 done
1350 07:31:37.182367 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1351 07:31:37.185480 PCI: 00:15.3 scanning...
1352 07:31:37.189164 scan_static_bus for PCI: 00:15.3
1353 07:31:37.192018 I2C: 00:10 enabled
1354 07:31:37.195767 scan_static_bus for PCI: 00:15.3 done
1355 07:31:37.198744 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1356 07:31:37.202012 PCI: 00:19.1 scanning...
1357 07:31:37.205530 scan_static_bus for PCI: 00:19.1
1358 07:31:37.208741 I2C: 00:15 enabled
1359 07:31:37.209356 I2C: 00:2c enabled
1360 07:31:37.211926 scan_static_bus for PCI: 00:19.1 done
1361 07:31:37.218778 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1362 07:31:37.219251 PCI: 00:1e.3 scanning...
1363 07:31:37.222157 scan_generic_bus for PCI: 00:1e.3
1364 07:31:37.225683 SPI: 00 enabled
1365 07:31:37.232317 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1366 07:31:37.235568 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1367 07:31:37.239341 PCI: 00:1f.0 scanning...
1368 07:31:37.242292 scan_static_bus for PCI: 00:1f.0
1369 07:31:37.245494 PNP: 0c09.0 enabled
1370 07:31:37.246058 PNP: 0c09.0 scanning...
1371 07:31:37.248810 scan_static_bus for PNP: 0c09.0
1372 07:31:37.252490 scan_static_bus for PNP: 0c09.0 done
1373 07:31:37.258759 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1374 07:31:37.262431 scan_static_bus for PCI: 00:1f.0 done
1375 07:31:37.265481 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1376 07:31:37.268870 PCI: 00:1f.2 scanning...
1377 07:31:37.272307 scan_static_bus for PCI: 00:1f.2
1378 07:31:37.275318 GENERIC: 0.0 enabled
1379 07:31:37.279037 GENERIC: 0.0 scanning...
1380 07:31:37.281816 scan_static_bus for GENERIC: 0.0
1381 07:31:37.282304 GENERIC: 0.0 enabled
1382 07:31:37.285444 GENERIC: 1.0 enabled
1383 07:31:37.288615 scan_static_bus for GENERIC: 0.0 done
1384 07:31:37.291765 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1385 07:31:37.298505 scan_static_bus for PCI: 00:1f.2 done
1386 07:31:37.301804 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1387 07:31:37.305305 PCI: 00:1f.3 scanning...
1388 07:31:37.308468 scan_static_bus for PCI: 00:1f.3
1389 07:31:37.311763 scan_static_bus for PCI: 00:1f.3 done
1390 07:31:37.315109 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1391 07:31:37.319010 PCI: 00:1f.5 scanning...
1392 07:31:37.322306 scan_generic_bus for PCI: 00:1f.5
1393 07:31:37.325489 scan_generic_bus for PCI: 00:1f.5 done
1394 07:31:37.332206 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1395 07:31:37.335310 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1396 07:31:37.338595 scan_static_bus for Root Device done
1397 07:31:37.345473 scan_bus: bus Root Device finished in 729 msecs
1398 07:31:37.346043 done
1399 07:31:37.351955 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1400 07:31:37.358722 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1401 07:31:37.362008 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1402 07:31:37.365995 SPI flash protection: WPSW=1 SRP0=0
1403 07:31:37.372197 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1404 07:31:37.378668 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1405 07:31:37.379236 found VGA at PCI: 00:02.0
1406 07:31:37.381995 Setting up VGA for PCI: 00:02.0
1407 07:31:37.388698 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1408 07:31:37.391834 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1409 07:31:37.395300 Allocating resources...
1410 07:31:37.398676 Reading resources...
1411 07:31:37.401810 Root Device read_resources bus 0 link: 0
1412 07:31:37.405475 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1413 07:31:37.411869 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1414 07:31:37.414950 DOMAIN: 0000 read_resources bus 0 link: 0
1415 07:31:37.421922 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1416 07:31:37.428860 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1417 07:31:37.435313 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1418 07:31:37.438681 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1419 07:31:37.445419 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1420 07:31:37.452300 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1421 07:31:37.458670 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1422 07:31:37.465142 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1423 07:31:37.472008 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1424 07:31:37.478451 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1425 07:31:37.485093 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1426 07:31:37.492209 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1427 07:31:37.498336 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1428 07:31:37.505472 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1429 07:31:37.512416 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1430 07:31:37.514911 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1431 07:31:37.521672 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1432 07:31:37.528388 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1433 07:31:37.535563 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1434 07:31:37.541793 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1435 07:31:37.548637 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1436 07:31:37.552049 PCI: 00:04.0 read_resources bus 1 link: 0
1437 07:31:37.558713 PCI: 00:04.0 read_resources bus 1 link: 0 done
1438 07:31:37.561927 PCI: 00:06.0 read_resources bus 1 link: 0
1439 07:31:37.565321 PCI: 00:06.0 read_resources bus 1 link: 0 done
1440 07:31:37.568601 PCI: 00:0d.0 read_resources bus 0 link: 0
1441 07:31:37.574776 USB0 port 0 read_resources bus 0 link: 0
1442 07:31:37.578513 USB0 port 0 read_resources bus 0 link: 0 done
1443 07:31:37.585148 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1444 07:31:37.588190 PCI: 00:14.0 read_resources bus 0 link: 0
1445 07:31:37.591387 USB0 port 0 read_resources bus 0 link: 0
1446 07:31:37.594953 USB0 port 0 read_resources bus 0 link: 0 done
1447 07:31:37.602036 PCI: 00:14.0 read_resources bus 0 link: 0 done
1448 07:31:37.604953 PCI: 00:14.3 read_resources bus 0 link: 0
1449 07:31:37.611825 PCI: 00:14.3 read_resources bus 0 link: 0 done
1450 07:31:37.615077 PCI: 00:15.0 read_resources bus 0 link: 0
1451 07:31:37.618090 PCI: 00:15.0 read_resources bus 0 link: 0 done
1452 07:31:37.624908 PCI: 00:15.1 read_resources bus 0 link: 0
1453 07:31:37.628505 PCI: 00:15.1 read_resources bus 0 link: 0 done
1454 07:31:37.631297 PCI: 00:15.3 read_resources bus 0 link: 0
1455 07:31:37.638009 PCI: 00:15.3 read_resources bus 0 link: 0 done
1456 07:31:37.641653 PCI: 00:19.1 read_resources bus 0 link: 0
1457 07:31:37.644912 PCI: 00:19.1 read_resources bus 0 link: 0 done
1458 07:31:37.651718 PCI: 00:1e.3 read_resources bus 2 link: 0
1459 07:31:37.655507 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1460 07:31:37.658191 PCI: 00:1f.0 read_resources bus 0 link: 0
1461 07:31:37.665318 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1462 07:31:37.668297 PCI: 00:1f.2 read_resources bus 0 link: 0
1463 07:31:37.672064 GENERIC: 0.0 read_resources bus 0 link: 0
1464 07:31:37.678342 GENERIC: 0.0 read_resources bus 0 link: 0 done
1465 07:31:37.681741 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1466 07:31:37.688220 DOMAIN: 0000 read_resources bus 0 link: 0 done
1467 07:31:37.691511 Root Device read_resources bus 0 link: 0 done
1468 07:31:37.695108 Done reading resources.
1469 07:31:37.701249 Show resources in subtree (Root Device)...After reading.
1470 07:31:37.704786 Root Device child on link 0 CPU_CLUSTER: 0
1471 07:31:37.707777 CPU_CLUSTER: 0 child on link 0 APIC: 00
1472 07:31:37.711245 APIC: 00
1473 07:31:37.711713 APIC: 12
1474 07:31:37.712079 APIC: 14
1475 07:31:37.714470 APIC: 16
1476 07:31:37.714933 APIC: 10
1477 07:31:37.715299 APIC: 09
1478 07:31:37.717897 APIC: 01
1479 07:31:37.718365 APIC: 08
1480 07:31:37.721312 DOMAIN: 0000 child on link 0 GPIO: 0
1481 07:31:37.731532 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1482 07:31:37.740896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1483 07:31:37.744451 GPIO: 0
1484 07:31:37.745133 PCI: 00:00.0
1485 07:31:37.754227 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1486 07:31:37.764789 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1487 07:31:37.774446 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1488 07:31:37.781208 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1489 07:31:37.791213 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1490 07:31:37.800822 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1491 07:31:37.811047 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1492 07:31:37.820767 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1493 07:31:37.830472 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1494 07:31:37.840517 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1495 07:31:37.847737 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1496 07:31:37.857074 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1497 07:31:37.867317 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1498 07:31:37.877410 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1499 07:31:37.887651 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1500 07:31:37.893740 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1501 07:31:37.903943 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1502 07:31:37.914005 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1503 07:31:37.924348 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1504 07:31:37.933970 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1505 07:31:37.944206 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1506 07:31:37.953757 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1507 07:31:37.960691 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1508 07:31:37.970650 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1509 07:31:37.980405 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1510 07:31:37.990248 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1511 07:31:38.000495 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1512 07:31:38.010308 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1513 07:31:38.010880 PCI: 00:02.0
1514 07:31:38.023615 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1515 07:31:38.033670 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1516 07:31:38.040452 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1517 07:31:38.047143 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1518 07:31:38.056956 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1519 07:31:38.057577 GENERIC: 0.0
1520 07:31:38.060357 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1521 07:31:38.070064 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1522 07:31:38.080028 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1523 07:31:38.090114 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1524 07:31:38.090686 PCI: 01:00.0
1525 07:31:38.100111 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1526 07:31:38.109823 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1527 07:31:38.113551 PCI: 00:08.0
1528 07:31:38.114118 PCI: 00:0a.0
1529 07:31:38.123504 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1530 07:31:38.129957 PCI: 00:0d.0 child on link 0 USB0 port 0
1531 07:31:38.139980 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1532 07:31:38.143225 USB0 port 0 child on link 0 USB3 port 0
1533 07:31:38.143796 USB3 port 0
1534 07:31:38.146509 USB3 port 1
1535 07:31:38.150284 USB3 port 2
1536 07:31:38.150848 USB3 port 3
1537 07:31:38.153206 PCI: 00:14.0 child on link 0 USB0 port 0
1538 07:31:38.163817 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1539 07:31:38.170069 USB0 port 0 child on link 0 USB2 port 0
1540 07:31:38.170637 USB2 port 0
1541 07:31:38.173411 USB2 port 1
1542 07:31:38.174081 USB2 port 2
1543 07:31:38.176456 USB2 port 3
1544 07:31:38.176924 USB2 port 4
1545 07:31:38.180082 USB2 port 5
1546 07:31:38.180651 USB2 port 6
1547 07:31:38.183622 USB2 port 7
1548 07:31:38.184189 USB2 port 8
1549 07:31:38.186712 USB2 port 9
1550 07:31:38.190238 USB3 port 0
1551 07:31:38.190712 USB3 port 1
1552 07:31:38.193252 USB3 port 2
1553 07:31:38.193890 USB3 port 3
1554 07:31:38.196535 PCI: 00:14.2
1555 07:31:38.207904 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1556 07:31:38.216898 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1557 07:31:38.219894 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1558 07:31:38.230486 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 07:31:38.231062 GENERIC: 0.0
1560 07:31:38.236919 PCI: 00:15.0 child on link 0 I2C: 00:1a
1561 07:31:38.246730 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 07:31:38.247302 I2C: 00:1a
1563 07:31:38.250323 I2C: 00:31
1564 07:31:38.250921 I2C: 00:32
1565 07:31:38.253403 PCI: 00:15.1 child on link 0 I2C: 00:50
1566 07:31:38.263450 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 07:31:38.266714 I2C: 00:50
1568 07:31:38.267278 PCI: 00:15.2
1569 07:31:38.273677 PCI: 00:15.3 child on link 0 I2C: 00:10
1570 07:31:38.283096 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 07:31:38.283650 I2C: 00:10
1572 07:31:38.286504 PCI: 00:16.0
1573 07:31:38.296278 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 07:31:38.296842 PCI: 00:19.0
1575 07:31:38.299888 PCI: 00:19.1 child on link 0 I2C: 00:15
1576 07:31:38.309822 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 07:31:38.313405 I2C: 00:15
1578 07:31:38.313975 I2C: 00:2c
1579 07:31:38.316714 PCI: 00:1e.0
1580 07:31:38.326298 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1581 07:31:38.329776 PCI: 00:1e.3 child on link 0 SPI: 00
1582 07:31:38.339835 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 07:31:38.343336 SPI: 00
1584 07:31:38.346758 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1585 07:31:38.356063 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1586 07:31:38.356623 PNP: 0c09.0
1587 07:31:38.367111 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1588 07:31:38.369789 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1589 07:31:38.379739 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1590 07:31:38.389659 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1591 07:31:38.393267 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1592 07:31:38.396370 GENERIC: 0.0
1593 07:31:38.397202 GENERIC: 1.0
1594 07:31:38.399751 PCI: 00:1f.3
1595 07:31:38.409598 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1596 07:31:38.419096 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1597 07:31:38.419729 PCI: 00:1f.5
1598 07:31:38.429242 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1599 07:31:38.436051 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1600 07:31:38.442714 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1601 07:31:38.449492 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1602 07:31:38.455848 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1603 07:31:38.459079 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1604 07:31:38.462325 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1605 07:31:38.469191 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1606 07:31:38.479362 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1607 07:31:38.485887 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1608 07:31:38.492299 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1609 07:31:38.499122 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1610 07:31:38.505884 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1611 07:31:38.515849 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1612 07:31:38.522275 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1613 07:31:38.525465 DOMAIN: 0000: Resource ranges:
1614 07:31:38.528719 * Base: 1000, Size: 800, Tag: 100
1615 07:31:38.532095 * Base: 1900, Size: e700, Tag: 100
1616 07:31:38.538495 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1617 07:31:38.545579 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1618 07:31:38.552077 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1619 07:31:38.559075 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1620 07:31:38.565697 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1621 07:31:38.575274 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1622 07:31:38.582105 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1623 07:31:38.589065 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1624 07:31:38.598758 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1625 07:31:38.605151 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1626 07:31:38.611872 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1627 07:31:38.622004 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1628 07:31:38.628921 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1629 07:31:38.634837 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1630 07:31:38.644807 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1631 07:31:38.651531 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1632 07:31:38.658204 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1633 07:31:38.668198 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1634 07:31:38.674959 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1635 07:31:38.681429 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1636 07:31:38.691248 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1637 07:31:38.697812 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1638 07:31:38.704375 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1639 07:31:38.714740 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1640 07:31:38.721260 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1641 07:31:38.728165 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1642 07:31:38.734381 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1643 07:31:38.744689 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1644 07:31:38.751434 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1645 07:31:38.761084 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1646 07:31:38.767629 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1647 07:31:38.774064 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1648 07:31:38.780915 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1649 07:31:38.784086 DOMAIN: 0000: Resource ranges:
1650 07:31:38.790755 * Base: 80400000, Size: 3fc00000, Tag: 200
1651 07:31:38.794179 * Base: d0000000, Size: 28000000, Tag: 200
1652 07:31:38.797348 * Base: fa000000, Size: 1000000, Tag: 200
1653 07:31:38.804089 * Base: fb001000, Size: 17ff000, Tag: 200
1654 07:31:38.807336 * Base: fe800000, Size: 300000, Tag: 200
1655 07:31:38.810463 * Base: feb80000, Size: 80000, Tag: 200
1656 07:31:38.813950 * Base: fed00000, Size: 40000, Tag: 200
1657 07:31:38.820831 * Base: fed70000, Size: 10000, Tag: 200
1658 07:31:38.824260 * Base: fed88000, Size: 8000, Tag: 200
1659 07:31:38.827322 * Base: fed93000, Size: d000, Tag: 200
1660 07:31:38.830763 * Base: feda2000, Size: 1e000, Tag: 200
1661 07:31:38.837220 * Base: fede0000, Size: 1220000, Tag: 200
1662 07:31:38.840437 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1663 07:31:38.847311 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1664 07:31:38.854060 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1665 07:31:38.860740 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1666 07:31:38.867547 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1667 07:31:38.873407 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1668 07:31:38.880636 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1669 07:31:38.887155 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1670 07:31:38.893769 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1671 07:31:38.900209 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1672 07:31:38.907391 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1673 07:31:38.913795 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1674 07:31:38.920082 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1675 07:31:38.926848 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1676 07:31:38.933807 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1677 07:31:38.940108 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1678 07:31:38.947094 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1679 07:31:38.953554 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1680 07:31:38.960449 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1681 07:31:38.966859 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1682 07:31:38.973777 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1683 07:31:38.983264 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1684 07:31:38.986961 PCI: 00:06.0: Resource ranges:
1685 07:31:38.989620 * Base: 80400000, Size: 100000, Tag: 200
1686 07:31:38.996125 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1687 07:31:39.003325 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1688 07:31:39.013047 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1689 07:31:39.019554 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1690 07:31:39.023139 Root Device assign_resources, bus 0 link: 0
1691 07:31:39.026518 DOMAIN: 0000 assign_resources, bus 0 link: 0
1692 07:31:39.036163 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1693 07:31:39.042749 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1694 07:31:39.052730 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1695 07:31:39.059528 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1696 07:31:39.066262 PCI: 00:04.0 assign_resources, bus 1 link: 0
1697 07:31:39.069540 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1698 07:31:39.079128 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1699 07:31:39.089270 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1700 07:31:39.096155 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1701 07:31:39.099616 PCI: 00:06.0 assign_resources, bus 1 link: 0
1702 07:31:39.109804 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1703 07:31:39.116023 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1704 07:31:39.122292 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1705 07:31:39.129505 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1706 07:31:39.138973 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1707 07:31:39.142334 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1708 07:31:39.145882 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1709 07:31:39.155867 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1710 07:31:39.159416 PCI: 00:14.0 assign_resources, bus 0 link: 0
1711 07:31:39.166012 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1712 07:31:39.172342 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1713 07:31:39.182263 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1714 07:31:39.188726 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1715 07:31:39.191920 PCI: 00:14.3 assign_resources, bus 0 link: 0
1716 07:31:39.198954 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1717 07:31:39.205295 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1718 07:31:39.212051 PCI: 00:15.0 assign_resources, bus 0 link: 0
1719 07:31:39.215426 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1720 07:31:39.225266 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1721 07:31:39.228435 PCI: 00:15.1 assign_resources, bus 0 link: 0
1722 07:31:39.232304 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1723 07:31:39.241842 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1724 07:31:39.245042 PCI: 00:15.3 assign_resources, bus 0 link: 0
1725 07:31:39.251893 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1726 07:31:39.258049 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1727 07:31:39.268063 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1728 07:31:39.272013 PCI: 00:19.1 assign_resources, bus 0 link: 0
1729 07:31:39.274807 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1730 07:31:39.284354 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1731 07:31:39.287647 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1732 07:31:39.295057 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1733 07:31:39.298085 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1734 07:31:39.304579 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1735 07:31:39.308118 LPC: Trying to open IO window from 800 size 1ff
1736 07:31:39.314471 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1737 07:31:39.324269 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1738 07:31:39.330976 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1739 07:31:39.337625 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1740 07:31:39.340938 Root Device assign_resources, bus 0 link: 0 done
1741 07:31:39.344090 Done setting resources.
1742 07:31:39.350785 Show resources in subtree (Root Device)...After assigning values.
1743 07:31:39.353892 Root Device child on link 0 CPU_CLUSTER: 0
1744 07:31:39.360678 CPU_CLUSTER: 0 child on link 0 APIC: 00
1745 07:31:39.361287 APIC: 00
1746 07:31:39.361689 APIC: 12
1747 07:31:39.363795 APIC: 14
1748 07:31:39.364368 APIC: 16
1749 07:31:39.366967 APIC: 10
1750 07:31:39.367453 APIC: 09
1751 07:31:39.367945 APIC: 01
1752 07:31:39.370591 APIC: 08
1753 07:31:39.374177 DOMAIN: 0000 child on link 0 GPIO: 0
1754 07:31:39.384929 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1755 07:31:39.394127 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1756 07:31:39.394700 GPIO: 0
1757 07:31:39.395198 PCI: 00:00.0
1758 07:31:39.403737 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1759 07:31:39.413622 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1760 07:31:39.423784 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1761 07:31:39.433670 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1762 07:31:39.443727 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1763 07:31:39.450339 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1764 07:31:39.460413 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1765 07:31:39.469902 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1766 07:31:39.480167 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1767 07:31:39.489678 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1768 07:31:39.499938 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1769 07:31:39.509798 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1770 07:31:39.516547 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1771 07:31:39.526852 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1772 07:31:39.536412 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1773 07:31:39.546129 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1774 07:31:39.556882 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1775 07:31:39.566293 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1776 07:31:39.576195 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1777 07:31:39.586443 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1778 07:31:39.592910 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1779 07:31:39.602760 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1780 07:31:39.612964 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1781 07:31:39.622443 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1782 07:31:39.632862 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1783 07:31:39.642755 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1784 07:31:39.652975 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1785 07:31:39.659703 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1786 07:31:39.663207 PCI: 00:02.0
1787 07:31:39.673087 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1788 07:31:39.683162 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1789 07:31:39.692307 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1790 07:31:39.699196 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1791 07:31:39.709009 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1792 07:31:39.709641 GENERIC: 0.0
1793 07:31:39.715740 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1794 07:31:39.721986 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1795 07:31:39.735704 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1796 07:31:39.745550 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1797 07:31:39.748794 PCI: 01:00.0
1798 07:31:39.758713 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1799 07:31:39.768812 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1800 07:31:39.769419 PCI: 00:08.0
1801 07:31:39.772158 PCI: 00:0a.0
1802 07:31:39.782037 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1803 07:31:39.785017 PCI: 00:0d.0 child on link 0 USB0 port 0
1804 07:31:39.795636 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1805 07:31:39.801751 USB0 port 0 child on link 0 USB3 port 0
1806 07:31:39.802357 USB3 port 0
1807 07:31:39.805404 USB3 port 1
1808 07:31:39.805892 USB3 port 2
1809 07:31:39.808779 USB3 port 3
1810 07:31:39.812478 PCI: 00:14.0 child on link 0 USB0 port 0
1811 07:31:39.821717 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1812 07:31:39.828874 USB0 port 0 child on link 0 USB2 port 0
1813 07:31:39.829502 USB2 port 0
1814 07:31:39.831934 USB2 port 1
1815 07:31:39.832502 USB2 port 2
1816 07:31:39.835084 USB2 port 3
1817 07:31:39.835650 USB2 port 4
1818 07:31:39.838666 USB2 port 5
1819 07:31:39.839238 USB2 port 6
1820 07:31:39.841582 USB2 port 7
1821 07:31:39.842044 USB2 port 8
1822 07:31:39.844947 USB2 port 9
1823 07:31:39.845555 USB3 port 0
1824 07:31:39.848863 USB3 port 1
1825 07:31:39.851834 USB3 port 2
1826 07:31:39.852400 USB3 port 3
1827 07:31:39.854894 PCI: 00:14.2
1828 07:31:39.865392 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1829 07:31:39.875449 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1830 07:31:39.878460 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1831 07:31:39.888494 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1832 07:31:39.891750 GENERIC: 0.0
1833 07:31:39.895432 PCI: 00:15.0 child on link 0 I2C: 00:1a
1834 07:31:39.904947 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1835 07:31:39.908343 I2C: 00:1a
1836 07:31:39.908913 I2C: 00:31
1837 07:31:39.911919 I2C: 00:32
1838 07:31:39.915066 PCI: 00:15.1 child on link 0 I2C: 00:50
1839 07:31:39.925043 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1840 07:31:39.925657 I2C: 00:50
1841 07:31:39.928940 PCI: 00:15.2
1842 07:31:39.931614 PCI: 00:15.3 child on link 0 I2C: 00:10
1843 07:31:39.941737 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1844 07:31:39.945088 I2C: 00:10
1845 07:31:39.945707 PCI: 00:16.0
1846 07:31:39.955060 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1847 07:31:39.958373 PCI: 00:19.0
1848 07:31:39.961943 PCI: 00:19.1 child on link 0 I2C: 00:15
1849 07:31:39.971596 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1850 07:31:39.975104 I2C: 00:15
1851 07:31:39.975664 I2C: 00:2c
1852 07:31:39.978654 PCI: 00:1e.0
1853 07:31:39.988160 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1854 07:31:39.991253 PCI: 00:1e.3 child on link 0 SPI: 00
1855 07:31:40.001733 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1856 07:31:40.004733 SPI: 00
1857 07:31:40.008275 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1858 07:31:40.017814 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1859 07:31:40.018434 PNP: 0c09.0
1860 07:31:40.028067 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1861 07:31:40.031556 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1862 07:31:40.041275 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1863 07:31:40.051497 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1864 07:31:40.054311 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1865 07:31:40.057826 GENERIC: 0.0
1866 07:31:40.058407 GENERIC: 1.0
1867 07:31:40.061458 PCI: 00:1f.3
1868 07:31:40.071768 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1869 07:31:40.081149 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1870 07:31:40.084353 PCI: 00:1f.5
1871 07:31:40.094809 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1872 07:31:40.097590 Done allocating resources.
1873 07:31:40.103989 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1874 07:31:40.107246 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1875 07:31:40.113791 Configure audio over I2S with MAX98373 NAU88L25B.
1876 07:31:40.117182 Enabling BT offload
1877 07:31:40.124676 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1878 07:31:40.128176 Enabling resources...
1879 07:31:40.131418 PCI: 00:00.0 subsystem <- 8086/4609
1880 07:31:40.134708 PCI: 00:00.0 cmd <- 06
1881 07:31:40.138019 PCI: 00:02.0 subsystem <- 8086/46b3
1882 07:31:40.141446 PCI: 00:02.0 cmd <- 03
1883 07:31:40.144921 PCI: 00:04.0 subsystem <- 8086/461d
1884 07:31:40.145559 PCI: 00:04.0 cmd <- 02
1885 07:31:40.148100 PCI: 00:06.0 bridge ctrl <- 0013
1886 07:31:40.151479 PCI: 00:06.0 subsystem <- 8086/464d
1887 07:31:40.154957 PCI: 00:06.0 cmd <- 106
1888 07:31:40.158058 PCI: 00:0a.0 subsystem <- 8086/467d
1889 07:31:40.161171 PCI: 00:0a.0 cmd <- 02
1890 07:31:40.165009 PCI: 00:0d.0 subsystem <- 8086/461e
1891 07:31:40.167920 PCI: 00:0d.0 cmd <- 02
1892 07:31:40.171521 PCI: 00:14.0 subsystem <- 8086/51ed
1893 07:31:40.174810 PCI: 00:14.0 cmd <- 02
1894 07:31:40.178076 PCI: 00:14.2 subsystem <- 8086/51ef
1895 07:31:40.178652 PCI: 00:14.2 cmd <- 02
1896 07:31:40.181244 PCI: 00:14.3 subsystem <- 8086/51f0
1897 07:31:40.184930 PCI: 00:14.3 cmd <- 02
1898 07:31:40.188191 PCI: 00:15.0 subsystem <- 8086/51e8
1899 07:31:40.191286 PCI: 00:15.0 cmd <- 02
1900 07:31:40.194670 PCI: 00:15.1 subsystem <- 8086/51e9
1901 07:31:40.198165 PCI: 00:15.1 cmd <- 06
1902 07:31:40.201489 PCI: 00:15.3 subsystem <- 8086/51eb
1903 07:31:40.204595 PCI: 00:15.3 cmd <- 02
1904 07:31:40.207576 PCI: 00:16.0 subsystem <- 8086/51e0
1905 07:31:40.208058 PCI: 00:16.0 cmd <- 02
1906 07:31:40.211213 PCI: 00:19.1 subsystem <- 8086/51c6
1907 07:31:40.214416 PCI: 00:19.1 cmd <- 02
1908 07:31:40.217803 PCI: 00:1e.0 subsystem <- 8086/51a8
1909 07:31:40.221055 PCI: 00:1e.0 cmd <- 06
1910 07:31:40.224439 PCI: 00:1e.3 subsystem <- 8086/51ab
1911 07:31:40.228030 PCI: 00:1e.3 cmd <- 02
1912 07:31:40.231257 PCI: 00:1f.0 subsystem <- 8086/5182
1913 07:31:40.234438 PCI: 00:1f.0 cmd <- 407
1914 07:31:40.238024 PCI: 00:1f.3 subsystem <- 8086/51c8
1915 07:31:40.238603 PCI: 00:1f.3 cmd <- 02
1916 07:31:40.241326 PCI: 00:1f.5 subsystem <- 8086/51a4
1917 07:31:40.244534 PCI: 00:1f.5 cmd <- 406
1918 07:31:40.247801 PCI: 01:00.0 cmd <- 02
1919 07:31:40.248379 done.
1920 07:31:40.254606 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1921 07:31:40.257932 ME: Version: Unavailable
1922 07:31:40.261292 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1923 07:31:40.264294 Initializing devices...
1924 07:31:40.267791 Root Device init
1925 07:31:40.268386 mainboard: EC init
1926 07:31:40.274670 Chrome EC: Set SMI mask to 0x0000000000000000
1927 07:31:40.275247 Chrome EC: UHEPI supported
1928 07:31:40.281596 Chrome EC: clear events_b mask to 0x0000000000000000
1929 07:31:40.288229 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1930 07:31:40.294962 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1931 07:31:40.297871 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1932 07:31:40.304840 Chrome EC: Set WAKE mask to 0x0000000000000000
1933 07:31:40.308146 Root Device init finished in 38 msecs
1934 07:31:40.311781 PCI: 00:00.0 init
1935 07:31:40.315167 CPU TDP = 15 Watts
1936 07:31:40.315653 CPU PL1 = 15 Watts
1937 07:31:40.318434 CPU PL2 = 55 Watts
1938 07:31:40.318913 CPU PL4 = 123 Watts
1939 07:31:40.325436 PCI: 00:00.0 init finished in 8 msecs
1940 07:31:40.326012 PCI: 00:02.0 init
1941 07:31:40.328324 GMA: Found VBT in CBFS
1942 07:31:40.331885 GMA: Found valid VBT in CBFS
1943 07:31:40.334885 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1944 07:31:40.345031 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1945 07:31:40.348515 PCI: 00:02.0 init finished in 18 msecs
1946 07:31:40.349126 PCI: 00:06.0 init
1947 07:31:40.351711 Initializing PCH PCIe bridge.
1948 07:31:40.355188 PCI: 00:06.0 init finished in 3 msecs
1949 07:31:40.358563 PCI: 00:0a.0 init
1950 07:31:40.361368 PCI: 00:0a.0 init finished in 0 msecs
1951 07:31:40.364985 PCI: 00:14.0 init
1952 07:31:40.368381 PCI: 00:14.0 init finished in 0 msecs
1953 07:31:40.368954 PCI: 00:14.2 init
1954 07:31:40.374993 PCI: 00:14.2 init finished in 0 msecs
1955 07:31:40.375565 PCI: 00:15.0 init
1956 07:31:40.378242 I2C bus 0 version 0x3230302a
1957 07:31:40.381378 DW I2C bus 0 at 0x80655000 (400 KHz)
1958 07:31:40.384724 PCI: 00:15.0 init finished in 6 msecs
1959 07:31:40.388003 PCI: 00:15.1 init
1960 07:31:40.391296 I2C bus 1 version 0x3230302a
1961 07:31:40.394981 DW I2C bus 1 at 0x80656000 (400 KHz)
1962 07:31:40.397973 PCI: 00:15.1 init finished in 6 msecs
1963 07:31:40.401147 PCI: 00:15.3 init
1964 07:31:40.401631 I2C bus 3 version 0x3230302a
1965 07:31:40.407688 DW I2C bus 3 at 0x80657000 (400 KHz)
1966 07:31:40.411325 PCI: 00:15.3 init finished in 6 msecs
1967 07:31:40.411904 PCI: 00:16.0 init
1968 07:31:40.414349 PCI: 00:16.0 init finished in 0 msecs
1969 07:31:40.418075 PCI: 00:19.1 init
1970 07:31:40.421645 I2C bus 5 version 0x3230302a
1971 07:31:40.424499 DW I2C bus 5 at 0x80659000 (400 KHz)
1972 07:31:40.428271 PCI: 00:19.1 init finished in 6 msecs
1973 07:31:40.431153 PCI: 00:1f.0 init
1974 07:31:40.434871 IOAPIC: Initializing IOAPIC at 0xfec00000
1975 07:31:40.438043 IOAPIC: ID = 0x02
1976 07:31:40.438620 IOAPIC: Dumping registers
1977 07:31:40.441345 reg 0x0000: 0x02000000
1978 07:31:40.444964 reg 0x0001: 0x00770020
1979 07:31:40.448215 reg 0x0002: 0x00000000
1980 07:31:40.448791 IOAPIC: 120 interrupts
1981 07:31:40.454932 IOAPIC: Clearing IOAPIC at 0xfec00000
1982 07:31:40.458213 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1983 07:31:40.461435 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1984 07:31:40.468556 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1985 07:31:40.470986 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1986 07:31:40.478213 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1987 07:31:40.481291 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1988 07:31:40.487724 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1989 07:31:40.491265 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1990 07:31:40.494461 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1991 07:31:40.501471 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1992 07:31:40.504677 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1993 07:31:40.511723 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1994 07:31:40.514322 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1995 07:31:40.521135 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1996 07:31:40.524405 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1997 07:31:40.531384 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1998 07:31:40.534722 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1999 07:31:40.537656 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2000 07:31:40.544498 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2001 07:31:40.547951 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2002 07:31:40.554612 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2003 07:31:40.558320 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2004 07:31:40.564413 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2005 07:31:40.567694 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2006 07:31:40.574497 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2007 07:31:40.578038 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2008 07:31:40.581277 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2009 07:31:40.587709 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2010 07:31:40.590976 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2011 07:31:40.597756 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2012 07:31:40.600850 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2013 07:31:40.607795 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2014 07:31:40.611019 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2015 07:31:40.617831 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2016 07:31:40.621062 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2017 07:31:40.624136 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2018 07:31:40.630796 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2019 07:31:40.633923 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2020 07:31:40.641296 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2021 07:31:40.644197 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2022 07:31:40.650677 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2023 07:31:40.654364 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2024 07:31:40.657620 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2025 07:31:40.664355 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2026 07:31:40.667430 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2027 07:31:40.674075 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2028 07:31:40.677399 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2029 07:31:40.684499 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2030 07:31:40.687478 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2031 07:31:40.694777 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2032 07:31:40.697741 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2033 07:31:40.700734 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2034 07:31:40.707371 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2035 07:31:40.710659 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2036 07:31:40.716864 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2037 07:31:40.720283 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2038 07:31:40.727008 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2039 07:31:40.730474 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2040 07:31:40.736945 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2041 07:31:40.740563 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2042 07:31:40.744037 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2043 07:31:40.750688 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2044 07:31:40.753704 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2045 07:31:40.761036 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2046 07:31:40.764039 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2047 07:31:40.770581 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2048 07:31:40.773828 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2049 07:31:40.780451 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2050 07:31:40.783914 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2051 07:31:40.787190 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2052 07:31:40.793657 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2053 07:31:40.797261 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2054 07:31:40.804263 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2055 07:31:40.807079 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2056 07:31:40.813577 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2057 07:31:40.816638 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2058 07:31:40.819954 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2059 07:31:40.826966 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2060 07:31:40.830412 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2061 07:31:40.837035 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2062 07:31:40.840422 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2063 07:31:40.846904 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2064 07:31:40.850511 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2065 07:31:40.856938 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2066 07:31:40.860752 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2067 07:31:40.863980 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2068 07:31:40.870043 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2069 07:31:40.873417 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2070 07:31:40.880237 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2071 07:31:40.883617 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2072 07:31:40.890038 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2073 07:31:40.893886 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2074 07:31:40.900594 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2075 07:31:40.903489 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2076 07:31:40.906721 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2077 07:31:40.913664 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2078 07:31:40.916836 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2079 07:31:40.923429 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2080 07:31:40.926576 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2081 07:31:40.933504 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2082 07:31:40.937301 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2083 07:31:40.943099 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2084 07:31:40.946354 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2085 07:31:40.949532 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2086 07:31:40.956948 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2087 07:31:40.960069 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2088 07:31:40.966578 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2089 07:31:40.969915 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2090 07:31:40.976777 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2091 07:31:40.979685 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2092 07:31:40.986537 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2093 07:31:40.989457 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2094 07:31:40.992855 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2095 07:31:41.000063 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2096 07:31:41.002682 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2097 07:31:41.009967 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2098 07:31:41.012577 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2099 07:31:41.019761 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2100 07:31:41.022978 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2101 07:31:41.029914 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2102 07:31:41.032897 IOAPIC: Bootstrap Processor Local APIC = 0x00
2103 07:31:41.036297 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2104 07:31:41.042489 PCI: 00:1f.0 init finished in 607 msecs
2105 07:31:41.043049 PCI: 00:1f.2 init
2106 07:31:41.045629 apm_control: Disabling ACPI.
2107 07:31:41.050683 APMC done.
2108 07:31:41.053753 PCI: 00:1f.2 init finished in 6 msecs
2109 07:31:41.057188 PCI: 00:1f.3 init
2110 07:31:41.060561 PCI: 00:1f.3 init finished in 0 msecs
2111 07:31:41.061177 PCI: 01:00.0 init
2112 07:31:41.063689 PCI: 01:00.0 init finished in 0 msecs
2113 07:31:41.067114 PNP: 0c09.0 init
2114 07:31:41.070378 Google Chrome EC uptime: 12.684 seconds
2115 07:31:41.077214 Google Chrome AP resets since EC boot: 1
2116 07:31:41.080372 Google Chrome most recent AP reset causes:
2117 07:31:41.084026 0.340: 32775 shutdown: entering G3
2118 07:31:41.090717 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2119 07:31:41.093650 PNP: 0c09.0 init finished in 23 msecs
2120 07:31:41.096906 GENERIC: 0.0 init
2121 07:31:41.100377 GENERIC: 0.0 init finished in 0 msecs
2122 07:31:41.100948 GENERIC: 1.0 init
2123 07:31:41.107120 GENERIC: 1.0 init finished in 0 msecs
2124 07:31:41.107693 Devices initialized
2125 07:31:41.110582 Show all devs... After init.
2126 07:31:41.113283 Root Device: enabled 1
2127 07:31:41.116960 CPU_CLUSTER: 0: enabled 1
2128 07:31:41.117582 DOMAIN: 0000: enabled 1
2129 07:31:41.120802 GPIO: 0: enabled 1
2130 07:31:41.123431 PCI: 00:00.0: enabled 1
2131 07:31:41.123933 PCI: 00:01.0: enabled 0
2132 07:31:41.126608 PCI: 00:01.1: enabled 0
2133 07:31:41.130422 PCI: 00:02.0: enabled 1
2134 07:31:41.133657 PCI: 00:04.0: enabled 1
2135 07:31:41.134227 PCI: 00:05.0: enabled 0
2136 07:31:41.136947 PCI: 00:06.0: enabled 1
2137 07:31:41.140277 PCI: 00:06.2: enabled 0
2138 07:31:41.140853 PCI: 00:07.0: enabled 0
2139 07:31:41.143625 PCI: 00:07.1: enabled 0
2140 07:31:41.146912 PCI: 00:07.2: enabled 0
2141 07:31:41.150252 PCI: 00:07.3: enabled 0
2142 07:31:41.150828 PCI: 00:08.0: enabled 0
2143 07:31:41.153904 PCI: 00:09.0: enabled 0
2144 07:31:41.157279 PCI: 00:0a.0: enabled 1
2145 07:31:41.160401 PCI: 00:0d.0: enabled 1
2146 07:31:41.160971 PCI: 00:0d.1: enabled 0
2147 07:31:41.163741 PCI: 00:0d.2: enabled 0
2148 07:31:41.166643 PCI: 00:0d.3: enabled 0
2149 07:31:41.170026 PCI: 00:0e.0: enabled 0
2150 07:31:41.170605 PCI: 00:10.0: enabled 0
2151 07:31:41.173740 PCI: 00:10.1: enabled 0
2152 07:31:41.176799 PCI: 00:10.6: enabled 0
2153 07:31:41.177404 PCI: 00:10.7: enabled 0
2154 07:31:41.180231 PCI: 00:12.0: enabled 0
2155 07:31:41.183127 PCI: 00:12.6: enabled 0
2156 07:31:41.186806 PCI: 00:12.7: enabled 0
2157 07:31:41.187385 PCI: 00:13.0: enabled 0
2158 07:31:41.190086 PCI: 00:14.0: enabled 1
2159 07:31:41.193422 PCI: 00:14.1: enabled 0
2160 07:31:41.196563 PCI: 00:14.2: enabled 1
2161 07:31:41.197187 PCI: 00:14.3: enabled 1
2162 07:31:41.199879 PCI: 00:15.0: enabled 1
2163 07:31:41.203679 PCI: 00:15.1: enabled 1
2164 07:31:41.206555 PCI: 00:15.2: enabled 0
2165 07:31:41.207131 PCI: 00:15.3: enabled 1
2166 07:31:41.209922 PCI: 00:16.0: enabled 1
2167 07:31:41.213582 PCI: 00:16.1: enabled 0
2168 07:31:41.216732 PCI: 00:16.2: enabled 0
2169 07:31:41.217362 PCI: 00:16.3: enabled 0
2170 07:31:41.220189 PCI: 00:16.4: enabled 0
2171 07:31:41.222911 PCI: 00:16.5: enabled 0
2172 07:31:41.223378 PCI: 00:17.0: enabled 0
2173 07:31:41.226900 PCI: 00:19.0: enabled 0
2174 07:31:41.229863 PCI: 00:19.1: enabled 1
2175 07:31:41.233072 PCI: 00:19.2: enabled 0
2176 07:31:41.233825 PCI: 00:1a.0: enabled 0
2177 07:31:41.236393 PCI: 00:1c.0: enabled 0
2178 07:31:41.240240 PCI: 00:1c.1: enabled 0
2179 07:31:41.243287 PCI: 00:1c.2: enabled 0
2180 07:31:41.243859 PCI: 00:1c.3: enabled 0
2181 07:31:41.246913 PCI: 00:1c.4: enabled 0
2182 07:31:41.249785 PCI: 00:1c.5: enabled 0
2183 07:31:41.253337 PCI: 00:1c.6: enabled 0
2184 07:31:41.254043 PCI: 00:1c.7: enabled 0
2185 07:31:41.256714 PCI: 00:1d.0: enabled 0
2186 07:31:41.260137 PCI: 00:1d.1: enabled 0
2187 07:31:41.260704 PCI: 00:1d.2: enabled 0
2188 07:31:41.263269 PCI: 00:1d.3: enabled 0
2189 07:31:41.266324 PCI: 00:1e.0: enabled 1
2190 07:31:41.269976 PCI: 00:1e.1: enabled 0
2191 07:31:41.270544 PCI: 00:1e.2: enabled 0
2192 07:31:41.273059 PCI: 00:1e.3: enabled 1
2193 07:31:41.276527 PCI: 00:1f.0: enabled 1
2194 07:31:41.279912 PCI: 00:1f.1: enabled 0
2195 07:31:41.280478 PCI: 00:1f.2: enabled 1
2196 07:31:41.282919 PCI: 00:1f.3: enabled 1
2197 07:31:41.286250 PCI: 00:1f.4: enabled 0
2198 07:31:41.289836 PCI: 00:1f.5: enabled 1
2199 07:31:41.290404 PCI: 00:1f.6: enabled 0
2200 07:31:41.293161 PCI: 00:1f.7: enabled 0
2201 07:31:41.296635 GENERIC: 0.0: enabled 1
2202 07:31:41.299870 GENERIC: 0.0: enabled 1
2203 07:31:41.300439 GENERIC: 1.0: enabled 1
2204 07:31:41.303398 GENERIC: 0.0: enabled 1
2205 07:31:41.306306 GENERIC: 1.0: enabled 1
2206 07:31:41.306867 USB0 port 0: enabled 1
2207 07:31:41.309755 USB0 port 0: enabled 1
2208 07:31:41.312912 GENERIC: 0.0: enabled 1
2209 07:31:41.316361 I2C: 00:1a: enabled 1
2210 07:31:41.316927 I2C: 00:31: enabled 1
2211 07:31:41.319699 I2C: 00:32: enabled 1
2212 07:31:41.322878 I2C: 00:50: enabled 1
2213 07:31:41.323350 I2C: 00:10: enabled 1
2214 07:31:41.326142 I2C: 00:15: enabled 1
2215 07:31:41.329929 I2C: 00:2c: enabled 1
2216 07:31:41.330502 GENERIC: 0.0: enabled 1
2217 07:31:41.333215 SPI: 00: enabled 1
2218 07:31:41.336697 PNP: 0c09.0: enabled 1
2219 07:31:41.337322 GENERIC: 0.0: enabled 1
2220 07:31:41.339528 USB3 port 0: enabled 1
2221 07:31:41.342999 USB3 port 1: enabled 0
2222 07:31:41.343469 USB3 port 2: enabled 1
2223 07:31:41.346243 USB3 port 3: enabled 0
2224 07:31:41.349627 USB2 port 0: enabled 1
2225 07:31:41.352659 USB2 port 1: enabled 0
2226 07:31:41.353163 USB2 port 2: enabled 1
2227 07:31:41.356115 USB2 port 3: enabled 0
2228 07:31:41.359727 USB2 port 4: enabled 0
2229 07:31:41.360291 USB2 port 5: enabled 1
2230 07:31:41.363152 USB2 port 6: enabled 0
2231 07:31:41.366502 USB2 port 7: enabled 0
2232 07:31:41.369187 USB2 port 8: enabled 1
2233 07:31:41.369751 USB2 port 9: enabled 1
2234 07:31:41.372684 USB3 port 0: enabled 1
2235 07:31:41.376278 USB3 port 1: enabled 0
2236 07:31:41.376845 USB3 port 2: enabled 0
2237 07:31:41.379368 USB3 port 3: enabled 0
2238 07:31:41.382534 GENERIC: 0.0: enabled 1
2239 07:31:41.386029 GENERIC: 1.0: enabled 1
2240 07:31:41.386603 APIC: 00: enabled 1
2241 07:31:41.389470 APIC: 12: enabled 1
2242 07:31:41.390056 APIC: 14: enabled 1
2243 07:31:41.392654 APIC: 16: enabled 1
2244 07:31:41.396277 APIC: 10: enabled 1
2245 07:31:41.396848 APIC: 09: enabled 1
2246 07:31:41.399503 APIC: 01: enabled 1
2247 07:31:41.402686 APIC: 08: enabled 1
2248 07:31:41.403264 PCI: 01:00.0: enabled 1
2249 07:31:41.409294 BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms
2250 07:31:41.412627 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2251 07:31:41.416029 ELOG: NV offset 0xf20000 size 0x4000
2252 07:31:41.424088 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2253 07:31:41.431128 ELOG: Event(17) added with size 13 at 2023-08-30 07:31:42 UTC
2254 07:31:41.438295 ELOG: Event(9E) added with size 10 at 2023-08-30 07:31:42 UTC
2255 07:31:41.444699 ELOG: Event(9F) added with size 14 at 2023-08-30 07:31:42 UTC
2256 07:31:41.451360 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2257 07:31:41.457891 ELOG: Event(A0) added with size 9 at 2023-08-30 07:31:42 UTC
2258 07:31:41.461333 elog_add_boot_reason: Logged dev mode boot
2259 07:31:41.467800 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2260 07:31:41.468379 Finalize devices...
2261 07:31:41.471542 PCI: 00:16.0 final
2262 07:31:41.474574 PCI: 00:1f.2 final
2263 07:31:41.475145 GENERIC: 0.0 final
2264 07:31:41.481322 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2265 07:31:41.484294 GENERIC: 1.0 final
2266 07:31:41.487622 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2267 07:31:41.491101 Devices finalized
2268 07:31:41.497695 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2269 07:31:41.501127 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2270 07:31:41.507976 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2271 07:31:41.510929 ME: HFSTS1 : 0x90000245
2272 07:31:41.517727 ME: HFSTS2 : 0x82100116
2273 07:31:41.520715 ME: HFSTS3 : 0x00000050
2274 07:31:41.524388 ME: HFSTS4 : 0x00004000
2275 07:31:41.530994 ME: HFSTS5 : 0x00000000
2276 07:31:41.534330 ME: HFSTS6 : 0x40600006
2277 07:31:41.537483 ME: Manufacturing Mode : NO
2278 07:31:41.541127 ME: SPI Protection Mode Enabled : YES
2279 07:31:41.547730 ME: FPFs Committed : YES
2280 07:31:41.551046 ME: Manufacturing Vars Locked : YES
2281 07:31:41.554689 ME: FW Partition Table : OK
2282 07:31:41.557823 ME: Bringup Loader Failure : NO
2283 07:31:41.561365 ME: Firmware Init Complete : YES
2284 07:31:41.564696 ME: Boot Options Present : NO
2285 07:31:41.567552 ME: Update In Progress : NO
2286 07:31:41.570980 ME: D0i3 Support : YES
2287 07:31:41.577676 ME: Low Power State Enabled : NO
2288 07:31:41.580790 ME: CPU Replaced : YES
2289 07:31:41.584000 ME: CPU Replacement Valid : YES
2290 07:31:41.587494 ME: Current Working State : 5
2291 07:31:41.590841 ME: Current Operation State : 1
2292 07:31:41.593766 ME: Current Operation Mode : 0
2293 07:31:41.597463 ME: Error Code : 0
2294 07:31:41.600807 ME: Enhanced Debug Mode : NO
2295 07:31:41.607355 ME: CPU Debug Disabled : YES
2296 07:31:41.610721 ME: TXT Support : NO
2297 07:31:41.613770 ME: WP for RO is enabled : YES
2298 07:31:41.620759 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2299 07:31:41.624451 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2300 07:31:41.630548 Ramoops buffer: 0x100000@0x76899000.
2301 07:31:41.633896 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2302 07:31:41.644179 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2303 07:31:41.647307 CBFS: 'fallback/slic' not found.
2304 07:31:41.650657 ACPI: Writing ACPI tables at 7686d000.
2305 07:31:41.651235 ACPI: * FACS
2306 07:31:41.654256 ACPI: * DSDT
2307 07:31:41.660578 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2308 07:31:41.664119 ACPI: * FADT
2309 07:31:41.664702 SCI is IRQ9
2310 07:31:41.667191 ACPI: added table 1/32, length now 40
2311 07:31:41.670464 ACPI: * SSDT
2312 07:31:41.676914 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2313 07:31:41.680326 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2314 07:31:41.686844 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2315 07:31:41.690067 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2316 07:31:41.697057 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2317 07:31:41.700020 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2318 07:31:41.706937 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2319 07:31:41.713405 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2320 07:31:41.716684 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2321 07:31:41.723004 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2322 07:31:41.726374 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2323 07:31:41.733487 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2324 07:31:41.736561 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2325 07:31:41.742859 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2326 07:31:41.749758 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2327 07:31:41.753473 PS2K: Passing 80 keymaps to kernel
2328 07:31:41.759974 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2329 07:31:41.766182 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2330 07:31:41.773153 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2331 07:31:41.779740 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2332 07:31:41.783220 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2333 07:31:41.789495 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2334 07:31:41.795922 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2335 07:31:41.803216 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2336 07:31:41.809510 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2337 07:31:41.815787 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2338 07:31:41.819364 ACPI: added table 2/32, length now 44
2339 07:31:41.819947 ACPI: * MCFG
2340 07:31:41.826200 ACPI: added table 3/32, length now 48
2341 07:31:41.826675 ACPI: * TPM2
2342 07:31:41.828995 TPM2 log created at 0x7685d000
2343 07:31:41.832778 ACPI: added table 4/32, length now 52
2344 07:31:41.835764 ACPI: * LPIT
2345 07:31:41.839259 ACPI: added table 5/32, length now 56
2346 07:31:41.839839 ACPI: * MADT
2347 07:31:41.842486 SCI is IRQ9
2348 07:31:41.846108 ACPI: added table 6/32, length now 60
2349 07:31:41.849607 cmd_reg from pmc_make_ipc_cmd 1052838
2350 07:31:41.856795 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2351 07:31:41.862760 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2352 07:31:41.866344 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2353 07:31:41.872793 PMC CrashLog size in discovery mode: 0xC00
2354 07:31:41.876081 cpu crashlog bar addr: 0x80640000
2355 07:31:41.879443 cpu discovery table offset: 0x6030
2356 07:31:41.882423 cpu_crashlog_discovery_table buffer count: 0x3
2357 07:31:41.889425 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2358 07:31:41.895868 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2359 07:31:41.902686 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2360 07:31:41.909177 PMC crashLog size in discovery mode : 0xC00
2361 07:31:41.915826 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2362 07:31:41.919174 discover mode PMC crashlog size adjusted to: 0x200
2363 07:31:41.925647 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2364 07:31:41.932327 discover mode PMC crashlog size adjusted to: 0x0
2365 07:31:41.935693 m_cpu_crashLog_size : 0x3480 bytes
2366 07:31:41.936166 CPU crashLog present.
2367 07:31:41.942120 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2368 07:31:41.949149 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2369 07:31:41.952229 current = 76876550
2370 07:31:41.952804 ACPI: * DMAR
2371 07:31:41.955734 ACPI: added table 7/32, length now 64
2372 07:31:41.958745 ACPI: added table 8/32, length now 68
2373 07:31:41.962294 ACPI: * HPET
2374 07:31:41.965423 ACPI: added table 9/32, length now 72
2375 07:31:41.965903 ACPI: done.
2376 07:31:41.968608 ACPI tables: 38528 bytes.
2377 07:31:41.972385 smbios_write_tables: 76857000
2378 07:31:41.976134 EC returned error result code 3
2379 07:31:41.979340 Couldn't obtain OEM name from CBI
2380 07:31:41.982806 Create SMBIOS type 16
2381 07:31:41.985594 Create SMBIOS type 17
2382 07:31:41.989360 Create SMBIOS type 20
2383 07:31:41.989927 GENERIC: 0.0 (WIFI Device)
2384 07:31:41.992988 SMBIOS tables: 2156 bytes.
2385 07:31:41.995559 Writing table forward entry at 0x00000500
2386 07:31:42.002372 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2387 07:31:42.005851 Writing coreboot table at 0x76891000
2388 07:31:42.012558 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2389 07:31:42.019430 1. 0000000000001000-000000000009ffff: RAM
2390 07:31:42.022305 2. 00000000000a0000-00000000000fffff: RESERVED
2391 07:31:42.025611 3. 0000000000100000-0000000076856fff: RAM
2392 07:31:42.032300 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2393 07:31:42.035851 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2394 07:31:42.042435 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2395 07:31:42.049068 7. 0000000077000000-00000000803fffff: RESERVED
2396 07:31:42.052413 8. 00000000c0000000-00000000cfffffff: RESERVED
2397 07:31:42.059192 9. 00000000f8000000-00000000f9ffffff: RESERVED
2398 07:31:42.062311 10. 00000000fb000000-00000000fb000fff: RESERVED
2399 07:31:42.065852 11. 00000000fc800000-00000000fe7fffff: RESERVED
2400 07:31:42.072354 12. 00000000feb00000-00000000feb7ffff: RESERVED
2401 07:31:42.076076 13. 00000000fec00000-00000000fecfffff: RESERVED
2402 07:31:42.082363 14. 00000000fed40000-00000000fed6ffff: RESERVED
2403 07:31:42.085655 15. 00000000fed80000-00000000fed87fff: RESERVED
2404 07:31:42.092299 16. 00000000fed90000-00000000fed92fff: RESERVED
2405 07:31:42.095614 17. 00000000feda0000-00000000feda1fff: RESERVED
2406 07:31:42.102056 18. 00000000fedc0000-00000000feddffff: RESERVED
2407 07:31:42.105478 19. 0000000100000000-000000027fbfffff: RAM
2408 07:31:42.108702 Passing 4 GPIOs to payload:
2409 07:31:42.112112 NAME | PORT | POLARITY | VALUE
2410 07:31:42.118605 lid | undefined | high | high
2411 07:31:42.122058 power | undefined | high | low
2412 07:31:42.128443 oprom | undefined | high | low
2413 07:31:42.135238 EC in RW | 0x00000151 | high | high
2414 07:31:42.135802 Board ID: 3
2415 07:31:42.138864 FW config: 0x131
2416 07:31:42.141713 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum b2c4
2417 07:31:42.145183 coreboot table: 1748 bytes.
2418 07:31:42.148595 IMD ROOT 0. 0x76fff000 0x00001000
2419 07:31:42.155213 IMD SMALL 1. 0x76ffe000 0x00001000
2420 07:31:42.158706 FSP MEMORY 2. 0x76afe000 0x00500000
2421 07:31:42.161880 CONSOLE 3. 0x76ade000 0x00020000
2422 07:31:42.165173 RW MCACHE 4. 0x76add000 0x0000043c
2423 07:31:42.169021 RO MCACHE 5. 0x76adc000 0x00000fd8
2424 07:31:42.171879 FMAP 6. 0x76adb000 0x0000064a
2425 07:31:42.175638 TIME STAMP 7. 0x76ada000 0x00000910
2426 07:31:42.178552 VBOOT WORK 8. 0x76ac6000 0x00014000
2427 07:31:42.181757 MEM INFO 9. 0x76ac5000 0x000003b8
2428 07:31:42.188352 ROMSTG STCK10. 0x76ac4000 0x00001000
2429 07:31:42.191822 AFTER CAR 11. 0x76ab8000 0x0000c000
2430 07:31:42.195465 RAMSTAGE 12. 0x76a2e000 0x0008a000
2431 07:31:42.198676 ACPI BERT 13. 0x76a1e000 0x00010000
2432 07:31:42.202183 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2433 07:31:42.205222 REFCODE 15. 0x769ae000 0x0006f000
2434 07:31:42.208555 SMM BACKUP 16. 0x7699e000 0x00010000
2435 07:31:42.211791 IGD OPREGION17. 0x76999000 0x00004203
2436 07:31:42.218787 RAMOOPS 18. 0x76899000 0x00100000
2437 07:31:42.221734 COREBOOT 19. 0x76891000 0x00008000
2438 07:31:42.225318 ACPI 20. 0x7686d000 0x00024000
2439 07:31:42.228649 TPM2 TCGLOG21. 0x7685d000 0x00010000
2440 07:31:42.232333 PMC CRASHLOG22. 0x7685c000 0x00000c00
2441 07:31:42.235492 CPU CRASHLOG23. 0x76858000 0x00003480
2442 07:31:42.239196 SMBIOS 24. 0x76857000 0x00001000
2443 07:31:42.241854 IMD small region:
2444 07:31:42.245503 IMD ROOT 0. 0x76ffec00 0x00000400
2445 07:31:42.249447 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2446 07:31:42.252254 POWER STATE 2. 0x76ffeb80 0x00000044
2447 07:31:42.258834 ROMSTAGE 3. 0x76ffeb60 0x00000004
2448 07:31:42.261940 ACPI GNVS 4. 0x76ffeb00 0x00000048
2449 07:31:42.265981 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2450 07:31:42.272243 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2451 07:31:42.275693 MTRR: Physical address space:
2452 07:31:42.282197 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2453 07:31:42.285493 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2454 07:31:42.292247 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2455 07:31:42.298718 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2456 07:31:42.305581 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2457 07:31:42.311879 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2458 07:31:42.318382 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2459 07:31:42.322069 MTRR: Fixed MSR 0x250 0x0606060606060606
2460 07:31:42.325288 MTRR: Fixed MSR 0x258 0x0606060606060606
2461 07:31:42.331696 MTRR: Fixed MSR 0x259 0x0000000000000000
2462 07:31:42.335132 MTRR: Fixed MSR 0x268 0x0606060606060606
2463 07:31:42.338699 MTRR: Fixed MSR 0x269 0x0606060606060606
2464 07:31:42.341845 MTRR: Fixed MSR 0x26a 0x0606060606060606
2465 07:31:42.348332 MTRR: Fixed MSR 0x26b 0x0606060606060606
2466 07:31:42.351932 MTRR: Fixed MSR 0x26c 0x0606060606060606
2467 07:31:42.355083 MTRR: Fixed MSR 0x26d 0x0606060606060606
2468 07:31:42.358766 MTRR: Fixed MSR 0x26e 0x0606060606060606
2469 07:31:42.361276 MTRR: Fixed MSR 0x26f 0x0606060606060606
2470 07:31:42.366537 call enable_fixed_mtrr()
2471 07:31:42.369572 CPU physical address size: 39 bits
2472 07:31:42.376306 MTRR: default type WB/UC MTRR counts: 6/6.
2473 07:31:42.379622 MTRR: UC selected as default type.
2474 07:31:42.386597 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2475 07:31:42.389820 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2476 07:31:42.396442 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2477 07:31:42.402978 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2478 07:31:42.409609 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2479 07:31:42.416416 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2480 07:31:42.422991 MTRR: Fixed MSR 0x250 0x0606060606060606
2481 07:31:42.425849 MTRR: Fixed MSR 0x258 0x0606060606060606
2482 07:31:42.429161 MTRR: Fixed MSR 0x259 0x0000000000000000
2483 07:31:42.432766 MTRR: Fixed MSR 0x268 0x0606060606060606
2484 07:31:42.439820 MTRR: Fixed MSR 0x269 0x0606060606060606
2485 07:31:42.442375 MTRR: Fixed MSR 0x26a 0x0606060606060606
2486 07:31:42.445853 MTRR: Fixed MSR 0x26b 0x0606060606060606
2487 07:31:42.449211 MTRR: Fixed MSR 0x26c 0x0606060606060606
2488 07:31:42.456017 MTRR: Fixed MSR 0x26d 0x0606060606060606
2489 07:31:42.459254 MTRR: Fixed MSR 0x26e 0x0606060606060606
2490 07:31:42.462600 MTRR: Fixed MSR 0x26f 0x0606060606060606
2491 07:31:42.465697 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 07:31:42.469416 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 07:31:42.475613 MTRR: Fixed MSR 0x258 0x0606060606060606
2494 07:31:42.479005 MTRR: Fixed MSR 0x259 0x0000000000000000
2495 07:31:42.482403 MTRR: Fixed MSR 0x268 0x0606060606060606
2496 07:31:42.485720 MTRR: Fixed MSR 0x269 0x0606060606060606
2497 07:31:42.492724 MTRR: Fixed MSR 0x26a 0x0606060606060606
2498 07:31:42.496563 MTRR: Fixed MSR 0x26b 0x0606060606060606
2499 07:31:42.499046 MTRR: Fixed MSR 0x26c 0x0606060606060606
2500 07:31:42.502204 MTRR: Fixed MSR 0x26d 0x0606060606060606
2501 07:31:42.508870 MTRR: Fixed MSR 0x26e 0x0606060606060606
2502 07:31:42.512180 MTRR: Fixed MSR 0x26f 0x0606060606060606
2503 07:31:42.515718 call enable_fixed_mtrr()
2504 07:31:42.518702 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 07:31:42.522104 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 07:31:42.525212 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 07:31:42.532310 MTRR: Fixed MSR 0x250 0x0606060606060606
2508 07:31:42.535877 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 07:31:42.538837 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 07:31:42.542233 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 07:31:42.545323 MTRR: Fixed MSR 0x26a 0x0606060606060606
2512 07:31:42.551801 MTRR: Fixed MSR 0x26b 0x0606060606060606
2513 07:31:42.555389 MTRR: Fixed MSR 0x26c 0x0606060606060606
2514 07:31:42.558930 MTRR: Fixed MSR 0x26d 0x0606060606060606
2515 07:31:42.561878 MTRR: Fixed MSR 0x26e 0x0606060606060606
2516 07:31:42.568802 MTRR: Fixed MSR 0x26f 0x0606060606060606
2517 07:31:42.569425 call enable_fixed_mtrr()
2518 07:31:42.572006 call enable_fixed_mtrr()
2519 07:31:42.575282 MTRR: Fixed MSR 0x258 0x0606060606060606
2520 07:31:42.578551 CPU physical address size: 39 bits
2521 07:31:42.585750 CPU physical address size: 39 bits
2522 07:31:42.588761 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 07:31:42.592052 CPU physical address size: 39 bits
2524 07:31:42.595927 MTRR: Fixed MSR 0x259 0x0000000000000000
2525 07:31:42.598658 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 07:31:42.602063 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 07:31:42.608730 MTRR: Fixed MSR 0x269 0x0606060606060606
2528 07:31:42.611973 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 07:31:42.615634 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 07:31:42.618735 MTRR: Fixed MSR 0x26a 0x0606060606060606
2531 07:31:42.624734 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 07:31:42.628448 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 07:31:42.631639 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 07:31:42.635416 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 07:31:42.641702 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 07:31:42.644869 MTRR: Fixed MSR 0x26a 0x0606060606060606
2537 07:31:42.648336 call enable_fixed_mtrr()
2538 07:31:42.651818 MTRR: Fixed MSR 0x26b 0x0606060606060606
2539 07:31:42.655245 MTRR: Fixed MSR 0x26c 0x0606060606060606
2540 07:31:42.658648 MTRR: Fixed MSR 0x26d 0x0606060606060606
2541 07:31:42.664847 MTRR: Fixed MSR 0x26e 0x0606060606060606
2542 07:31:42.667893 MTRR: Fixed MSR 0x26f 0x0606060606060606
2543 07:31:42.671475 CPU physical address size: 39 bits
2544 07:31:42.674556 call enable_fixed_mtrr()
2545 07:31:42.678378 MTRR: Fixed MSR 0x258 0x0606060606060606
2546 07:31:42.681560 CPU physical address size: 39 bits
2547 07:31:42.684895 MTRR: Fixed MSR 0x259 0x0000000000000000
2548 07:31:42.688143 MTRR: Fixed MSR 0x250 0x0606060606060606
2549 07:31:42.694520 MTRR: Fixed MSR 0x268 0x0606060606060606
2550 07:31:42.698336 MTRR: Fixed MSR 0x269 0x0606060606060606
2551 07:31:42.701420 MTRR: Fixed MSR 0x258 0x0606060606060606
2552 07:31:42.704537 MTRR: Fixed MSR 0x259 0x0000000000000000
2553 07:31:42.710953 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 07:31:42.714297 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 07:31:42.717740 MTRR: Fixed MSR 0x26a 0x0606060606060606
2556 07:31:42.720868 MTRR: Fixed MSR 0x26b 0x0606060606060606
2557 07:31:42.727659 MTRR: Fixed MSR 0x26c 0x0606060606060606
2558 07:31:42.730605 MTRR: Fixed MSR 0x26d 0x0606060606060606
2559 07:31:42.734421 MTRR: Fixed MSR 0x26e 0x0606060606060606
2560 07:31:42.737364 MTRR: Fixed MSR 0x26f 0x0606060606060606
2561 07:31:42.744132 MTRR: Fixed MSR 0x26a 0x0606060606060606
2562 07:31:42.747851 call enable_fixed_mtrr()
2563 07:31:42.750987 MTRR: Fixed MSR 0x26b 0x0606060606060606
2564 07:31:42.754070 MTRR: Fixed MSR 0x26c 0x0606060606060606
2565 07:31:42.757843 MTRR: Fixed MSR 0x26d 0x0606060606060606
2566 07:31:42.760762 MTRR: Fixed MSR 0x26e 0x0606060606060606
2567 07:31:42.767219 MTRR: Fixed MSR 0x26f 0x0606060606060606
2568 07:31:42.770957 CPU physical address size: 39 bits
2569 07:31:42.773963 call enable_fixed_mtrr()
2570 07:31:42.777240 CPU physical address size: 39 bits
2571 07:31:42.780779
2572 07:31:42.781389 MTRR check
2573 07:31:42.783883 Fixed MTRRs : Enabled
2574 07:31:42.784457 Variable MTRRs: Enabled
2575 07:31:42.784836
2576 07:31:42.790708 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2577 07:31:42.793393 Checking cr50 for pending updates
2578 07:31:42.806157 Reading cr50 TPM mode
2579 07:31:42.821523 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2580 07:31:42.831249 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2581 07:31:42.834792 Checking segment from ROM address 0xf96cbe6c
2582 07:31:42.837974 Checking segment from ROM address 0xf96cbe88
2583 07:31:42.844808 Loading segment from ROM address 0xf96cbe6c
2584 07:31:42.845324 code (compression=1)
2585 07:31:42.855082 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2586 07:31:42.861440 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2587 07:31:42.864696 using LZMA
2588 07:31:42.886849 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2589 07:31:42.893257 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2590 07:31:42.901509 Loading segment from ROM address 0xf96cbe88
2591 07:31:42.904840 Entry Point 0x30000000
2592 07:31:42.905439 Loaded segments
2593 07:31:42.911636 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2594 07:31:42.918080 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2595 07:31:42.921753 Finalizing chipset.
2596 07:31:42.922338 apm_control: Finalizing SMM.
2597 07:31:42.924835 APMC done.
2598 07:31:42.928141 HECI: CSE device 16.1 is disabled
2599 07:31:42.931521 HECI: CSE device 16.2 is disabled
2600 07:31:42.934989 HECI: CSE device 16.3 is disabled
2601 07:31:42.938023 HECI: CSE device 16.4 is disabled
2602 07:31:42.941282 HECI: CSE device 16.5 is disabled
2603 07:31:42.944805 HECI: Sending End-of-Post
2604 07:31:42.953135 CSE: EOP requested action: continue boot
2605 07:31:42.956539 CSE EOP successful, continuing boot
2606 07:31:42.963117 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2607 07:31:42.966631 mp_park_aps done after 0 msecs.
2608 07:31:42.969615 Jumping to boot code at 0x30000000(0x76891000)
2609 07:31:42.979878 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2610 07:31:42.983778
2611 07:31:42.984352
2612 07:31:42.984727
2613 07:31:42.986991 Starting depthcharge on Volmar...
2614 07:31:42.987464
2615 07:31:42.988720 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
2616 07:31:42.989286 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2617 07:31:42.989725 Setting prompt string to ['brya:']
2618 07:31:42.990148 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:40)
2619 07:31:42.993491 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2620 07:31:42.993967
2621 07:31:43.000217 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2622 07:31:43.000692
2623 07:31:43.006889 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2624 07:31:43.007446
2625 07:31:43.010083 configure_storage: Failed to remap 1C:2
2626 07:31:43.010696
2627 07:31:43.013864 Wipe memory regions:
2628 07:31:43.014430
2629 07:31:43.017276 [0x00000000001000, 0x000000000a0000)
2630 07:31:43.017851
2631 07:31:43.020355 [0x00000000100000, 0x00000030000000)
2632 07:31:43.126508
2633 07:31:43.129433 [0x00000032668e60, 0x00000076857000)
2634 07:31:43.277488
2635 07:31:43.280746 [0x00000100000000, 0x0000027fc00000)
2636 07:31:44.111913
2637 07:31:44.115182 ec_init: CrosEC protocol v3 supported (256, 256)
2638 07:31:44.723204
2639 07:31:44.723772 R8152: Initializing
2640 07:31:44.724158
2641 07:31:44.726679 Version 9 (ocp_data = 6010)
2642 07:31:44.727247
2643 07:31:44.729389 R8152: Done initializing
2644 07:31:44.729859
2645 07:31:44.732787 Adding net device
2646 07:31:45.035316
2647 07:31:45.038345 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2648 07:31:45.038923
2649 07:31:45.039305
2650 07:31:45.039660
2651 07:31:45.040477 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 07:31:45.141946 brya: tftpboot 192.168.201.1 11381205/tftp-deploy-olaga1_m/kernel/bzImage 11381205/tftp-deploy-olaga1_m/kernel/cmdline 11381205/tftp-deploy-olaga1_m/ramdisk/ramdisk.cpio.gz
2654 07:31:45.142656 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 07:31:45.143127 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2656 07:31:45.147877 tftpboot 192.168.201.1 11381205/tftp-deploy-olaga1_m/kernel/bzIploy-olaga1_m/kernel/cmdline 11381205/tftp-deploy-olaga1_m/ramdisk/ramdisk.cpio.gz
2657 07:31:45.148365
2658 07:31:45.148739 Waiting for link
2659 07:31:45.350139
2660 07:31:45.350709 done.
2661 07:31:45.351084
2662 07:31:45.351433 MAC: 00:e0:4c:68:00:8b
2663 07:31:45.351800
2664 07:31:45.353418 Sending DHCP discover... done.
2665 07:31:45.354067
2666 07:31:45.357211 Waiting for reply... done.
2667 07:31:45.357730
2668 07:31:45.360618 Sending DHCP request... done.
2669 07:31:45.361080
2670 07:31:45.367887 Waiting for reply... done.
2671 07:31:45.368470
2672 07:31:45.368848 My ip is 192.168.201.16
2673 07:31:45.369240
2674 07:31:45.370780 The DHCP server ip is 192.168.201.1
2675 07:31:45.373492
2676 07:31:45.376975 TFTP server IP predefined by user: 192.168.201.1
2677 07:31:45.377583
2678 07:31:45.383748 Bootfile predefined by user: 11381205/tftp-deploy-olaga1_m/kernel/bzImage
2679 07:31:45.384324
2680 07:31:45.387115 Sending tftp read request... done.
2681 07:31:45.387689
2682 07:31:45.395965 Waiting for the transfer...
2683 07:31:45.396541
2684 07:31:45.756585 00000000 ################################################################
2685 07:31:45.756738
2686 07:31:46.037631 00080000 ################################################################
2687 07:31:46.037755
2688 07:31:46.318179 00100000 ################################################################
2689 07:31:46.318300
2690 07:31:46.598840 00180000 ################################################################
2691 07:31:46.598960
2692 07:31:46.878504 00200000 ################################################################
2693 07:31:46.878626
2694 07:31:47.158059 00280000 ################################################################
2695 07:31:47.158185
2696 07:31:47.438109 00300000 ################################################################
2697 07:31:47.438242
2698 07:31:47.719596 00380000 ################################################################
2699 07:31:47.719752
2700 07:31:47.994248 00400000 ################################################################
2701 07:31:47.994448
2702 07:31:48.273519 00480000 ################################################################
2703 07:31:48.273640
2704 07:31:48.551914 00500000 ################################################################
2705 07:31:48.552061
2706 07:31:48.829676 00580000 ################################################################
2707 07:31:48.829802
2708 07:31:49.107983 00600000 ################################################################
2709 07:31:49.108142
2710 07:31:49.394473 00680000 ################################################################
2711 07:31:49.394598
2712 07:31:49.672115 00700000 ################################################################
2713 07:31:49.672235
2714 07:31:49.951871 00780000 ################################################################
2715 07:31:49.952019
2716 07:31:50.238272 00800000 ################################################################
2717 07:31:50.238393
2718 07:31:50.525763 00880000 ################################################################
2719 07:31:50.525884
2720 07:31:50.805154 00900000 ################################################################
2721 07:31:50.805294
2722 07:31:51.085995 00980000 ################################################################
2723 07:31:51.086116
2724 07:31:51.366630 00a00000 ################################################################
2725 07:31:51.366748
2726 07:31:51.645841 00a80000 ################################################################
2727 07:31:51.645956
2728 07:31:51.923839 00b00000 ################################################################
2729 07:31:51.923985
2730 07:31:52.203181 00b80000 ################################################################
2731 07:31:52.203308
2732 07:31:52.480955 00c00000 ################################################################
2733 07:31:52.481119
2734 07:31:52.759591 00c80000 ################################################################
2735 07:31:52.759749
2736 07:31:52.959607 00d00000 ############################################### done.
2737 07:31:52.959737
2738 07:31:52.962815 The bootfile was 14012576 bytes long.
2739 07:31:52.966238
2740 07:31:52.969524 Sending tftp read request... done.
2741 07:31:52.969623
2742 07:31:52.969701 Waiting for the transfer...
2743 07:31:52.969775
2744 07:31:53.269028 00000000 ################################################################
2745 07:31:53.269174
2746 07:31:53.555301 00080000 ################################################################
2747 07:31:53.555424
2748 07:31:53.835574 00100000 ################################################################
2749 07:31:53.835695
2750 07:31:54.115466 00180000 ################################################################
2751 07:31:54.115619
2752 07:31:54.409229 00200000 ################################################################
2753 07:31:54.409356
2754 07:31:54.708057 00280000 ################################################################
2755 07:31:54.708183
2756 07:31:55.003744 00300000 ################################################################
2757 07:31:55.003895
2758 07:31:55.303090 00380000 ################################################################
2759 07:31:55.303243
2760 07:31:55.602899 00400000 ################################################################
2761 07:31:55.603028
2762 07:31:55.901805 00480000 ################################################################
2763 07:31:55.901941
2764 07:31:56.201637 00500000 ################################################################
2765 07:31:56.201762
2766 07:31:56.500566 00580000 ################################################################
2767 07:31:56.500690
2768 07:31:56.798740 00600000 ################################################################
2769 07:31:56.798864
2770 07:31:57.097392 00680000 ################################################################
2771 07:31:57.097515
2772 07:31:57.397344 00700000 ################################################################
2773 07:31:57.397482
2774 07:31:57.685564 00780000 ################################################################
2775 07:31:57.685724
2776 07:31:57.969825 00800000 ################################################################
2777 07:31:57.969968
2778 07:31:58.213265 00880000 ############################################## done.
2779 07:31:58.213753
2780 07:31:58.216649 Sending tftp read request... done.
2781 07:31:58.217254
2782 07:31:58.219733 Waiting for the transfer...
2783 07:31:58.220349
2784 07:31:58.220715 00000000 # done.
2785 07:31:58.221052
2786 07:31:58.229828 Command line loaded dynamically from TFTP file: 11381205/tftp-deploy-olaga1_m/kernel/cmdline
2787 07:31:58.230281
2788 07:31:58.246404 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2789 07:31:58.251499
2790 07:31:58.254609 Shutting down all USB controllers.
2791 07:31:58.255046
2792 07:31:58.255397 Removing current net device
2793 07:31:58.255722
2794 07:31:58.257639 Finalizing coreboot
2795 07:31:58.258069
2796 07:31:58.264490 Exiting depthcharge with code 4 at timestamp: 25624642
2797 07:31:58.265244
2798 07:31:58.265613
2799 07:31:58.265942 Starting kernel ...
2800 07:31:58.266257
2801 07:31:58.266562
2802 07:31:58.267829 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2803 07:31:58.268314 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2804 07:31:58.268690 Setting prompt string to ['Linux version [0-9]']
2805 07:31:58.269050 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2806 07:31:58.269460 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2808 07:36:23.269373 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2810 07:36:23.270500 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2812 07:36:23.271372 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2815 07:36:23.272855 end: 2 depthcharge-action (duration 00:05:00) [common]
2817 07:36:23.273633 Cleaning after the job
2818 07:36:23.273724 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/ramdisk
2819 07:36:23.275038 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/kernel
2820 07:36:23.277067 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11381205/tftp-deploy-olaga1_m/modules
2821 07:36:23.277853 start: 5.1 power-off (timeout 00:00:30) [common]
2822 07:36:23.278012 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
2823 07:36:23.352410 >> Command sent successfully.
2824 07:36:23.364056 Returned 0 in 0 seconds
2825 07:36:23.465554 end: 5.1 power-off (duration 00:00:00) [common]
2827 07:36:23.467312 start: 5.2 read-feedback (timeout 00:10:00) [common]
2828 07:36:23.468606 Listened to connection for namespace 'common' for up to 1s
2830 07:36:23.470130 Listened to connection for namespace 'common' for up to 1s
2831 07:36:24.469391 Finalising connection for namespace 'common'
2832 07:36:24.470069 Disconnecting from shell: Finalise
2833 07:36:24.470501
2834 07:36:24.571656 end: 5.2 read-feedback (duration 00:00:01) [common]
2835 07:36:24.572337 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11381205
2836 07:36:24.628762 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11381205
2837 07:36:24.628969 JobError: Your job cannot terminate cleanly.