Boot log: acer-cbv514-1h-34uz-brya

    1 10:51:28.781554  lava-dispatcher, installed at version: 2023.10
    2 10:51:28.781757  start: 0 validate
    3 10:51:28.781902  Start time: 2023-11-24 10:51:28.781894+00:00 (UTC)
    4 10:51:28.782018  Using caching service: 'http://localhost/cache/?uri=%s'
    5 10:51:28.782156  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 10:51:29.051531  Using caching service: 'http://localhost/cache/?uri=%s'
    7 10:51:29.052325  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.201-cip41-11-ga539098fe70dd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 10:51:46.327797  Using caching service: 'http://localhost/cache/?uri=%s'
    9 10:51:46.328563  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.201-cip41-11-ga539098fe70dd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 10:51:47.338754  validate duration: 18.56
   12 10:51:47.339034  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 10:51:47.339137  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 10:51:47.339229  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 10:51:47.339358  Not decompressing ramdisk as can be used compressed.
   16 10:51:47.339445  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 10:51:47.339510  saving as /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/ramdisk/rootfs.cpio.gz
   18 10:51:47.339575  total size: 8418130 (8 MB)
   19 10:51:47.597532  progress   0 % (0 MB)
   20 10:51:47.599921  progress   5 % (0 MB)
   21 10:51:47.602202  progress  10 % (0 MB)
   22 10:51:47.604476  progress  15 % (1 MB)
   23 10:51:47.606770  progress  20 % (1 MB)
   24 10:51:47.609032  progress  25 % (2 MB)
   25 10:51:47.611345  progress  30 % (2 MB)
   26 10:51:47.613476  progress  35 % (2 MB)
   27 10:51:47.615982  progress  40 % (3 MB)
   28 10:51:47.618354  progress  45 % (3 MB)
   29 10:51:47.620697  progress  50 % (4 MB)
   30 10:51:47.622990  progress  55 % (4 MB)
   31 10:51:47.625224  progress  60 % (4 MB)
   32 10:51:47.627315  progress  65 % (5 MB)
   33 10:51:47.629530  progress  70 % (5 MB)
   34 10:51:47.631803  progress  75 % (6 MB)
   35 10:51:47.634054  progress  80 % (6 MB)
   36 10:51:47.636385  progress  85 % (6 MB)
   37 10:51:47.638668  progress  90 % (7 MB)
   38 10:51:47.640926  progress  95 % (7 MB)
   39 10:51:47.643050  progress 100 % (8 MB)
   40 10:51:47.643285  8 MB downloaded in 0.30 s (26.43 MB/s)
   41 10:51:47.643444  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 10:51:47.643689  end: 1.1 download-retry (duration 00:00:00) [common]
   44 10:51:47.643779  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 10:51:47.643865  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 10:51:47.644010  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.201-cip41-11-ga539098fe70dd/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 10:51:47.644085  saving as /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/kernel/bzImage
   48 10:51:47.644147  total size: 14129248 (13 MB)
   49 10:51:47.644209  No compression specified
   50 10:51:47.645340  progress   0 % (0 MB)
   51 10:51:47.649074  progress   5 % (0 MB)
   52 10:51:47.652915  progress  10 % (1 MB)
   53 10:51:47.656607  progress  15 % (2 MB)
   54 10:51:47.660477  progress  20 % (2 MB)
   55 10:51:47.664283  progress  25 % (3 MB)
   56 10:51:47.668173  progress  30 % (4 MB)
   57 10:51:47.671816  progress  35 % (4 MB)
   58 10:51:47.675642  progress  40 % (5 MB)
   59 10:51:47.679449  progress  45 % (6 MB)
   60 10:51:47.683143  progress  50 % (6 MB)
   61 10:51:47.686927  progress  55 % (7 MB)
   62 10:51:47.690570  progress  60 % (8 MB)
   63 10:51:47.694390  progress  65 % (8 MB)
   64 10:51:47.698030  progress  70 % (9 MB)
   65 10:51:47.701761  progress  75 % (10 MB)
   66 10:51:47.705307  progress  80 % (10 MB)
   67 10:51:47.709034  progress  85 % (11 MB)
   68 10:51:47.712744  progress  90 % (12 MB)
   69 10:51:47.716444  progress  95 % (12 MB)
   70 10:51:47.720187  progress 100 % (13 MB)
   71 10:51:47.720324  13 MB downloaded in 0.08 s (176.90 MB/s)
   72 10:51:47.720473  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 10:51:47.720708  end: 1.2 download-retry (duration 00:00:00) [common]
   75 10:51:47.720803  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 10:51:47.720971  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 10:51:47.721171  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.201-cip41-11-ga539098fe70dd/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 10:51:47.721250  saving as /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/modules/modules.tar
   79 10:51:47.721314  total size: 527168 (0 MB)
   80 10:51:47.721377  Using unxz to decompress xz
   81 10:51:47.725621  progress   6 % (0 MB)
   82 10:51:47.726119  progress  12 % (0 MB)
   83 10:51:47.726443  progress  18 % (0 MB)
   84 10:51:47.728014  progress  24 % (0 MB)
   85 10:51:47.730063  progress  31 % (0 MB)
   86 10:51:47.732084  progress  37 % (0 MB)
   87 10:51:47.734155  progress  43 % (0 MB)
   88 10:51:47.736119  progress  49 % (0 MB)
   89 10:51:47.738151  progress  55 % (0 MB)
   90 10:51:47.740017  progress  62 % (0 MB)
   91 10:51:47.742117  progress  68 % (0 MB)
   92 10:51:47.744109  progress  74 % (0 MB)
   93 10:51:47.746243  progress  80 % (0 MB)
   94 10:51:47.748480  progress  87 % (0 MB)
   95 10:51:47.750395  progress  93 % (0 MB)
   96 10:51:47.752363  progress  99 % (0 MB)
   97 10:51:47.759971  0 MB downloaded in 0.04 s (13.01 MB/s)
   98 10:51:47.760235  end: 1.3.1 http-download (duration 00:00:00) [common]
  100 10:51:47.760500  end: 1.3 download-retry (duration 00:00:00) [common]
  101 10:51:47.760596  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  102 10:51:47.760695  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  103 10:51:47.760777  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  104 10:51:47.760861  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  105 10:51:47.761094  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls
  106 10:51:47.761234  makedir: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin
  107 10:51:47.761341  makedir: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/tests
  108 10:51:47.761443  makedir: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/results
  109 10:51:47.761563  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-add-keys
  110 10:51:47.761716  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-add-sources
  111 10:51:47.761850  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-background-process-start
  112 10:51:47.762029  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-background-process-stop
  113 10:51:47.762164  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-common-functions
  114 10:51:47.762292  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-echo-ipv4
  115 10:51:47.762424  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-install-packages
  116 10:51:47.762553  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-installed-packages
  117 10:51:47.762724  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-os-build
  118 10:51:47.762914  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-probe-channel
  119 10:51:47.763049  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-probe-ip
  120 10:51:47.763178  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-target-ip
  121 10:51:47.763306  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-target-mac
  122 10:51:47.763433  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-target-storage
  123 10:51:47.763598  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-case
  124 10:51:47.763727  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-event
  125 10:51:47.763854  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-feedback
  126 10:51:47.763981  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-raise
  127 10:51:47.764110  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-reference
  128 10:51:47.764242  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-runner
  129 10:51:47.764369  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-set
  130 10:51:47.764498  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-test-shell
  131 10:51:47.764682  Updating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-install-packages (oe)
  132 10:51:47.764841  Updating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/bin/lava-installed-packages (oe)
  133 10:51:47.764970  Creating /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/environment
  134 10:51:47.765073  LAVA metadata
  135 10:51:47.765149  - LAVA_JOB_ID=12073779
  136 10:51:47.765217  - LAVA_DISPATCHER_IP=192.168.201.1
  137 10:51:47.765322  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  138 10:51:47.765395  skipped lava-vland-overlay
  139 10:51:47.765506  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  140 10:51:47.765644  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  141 10:51:47.765738  skipped lava-multinode-overlay
  142 10:51:47.765845  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  143 10:51:47.765985  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  144 10:51:47.766063  Loading test definitions
  145 10:51:47.766186  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  146 10:51:47.766279  Using /lava-12073779 at stage 0
  147 10:51:47.766602  uuid=12073779_1.4.2.3.1 testdef=None
  148 10:51:47.766692  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  149 10:51:47.766780  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  150 10:51:47.767327  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  152 10:51:47.767556  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  153 10:51:47.768210  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  155 10:51:47.768441  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  156 10:51:47.769079  runner path: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/0/tests/0_dmesg test_uuid 12073779_1.4.2.3.1
  157 10:51:47.769239  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  159 10:51:47.769470  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  160 10:51:47.769543  Using /lava-12073779 at stage 1
  161 10:51:47.769848  uuid=12073779_1.4.2.3.5 testdef=None
  162 10:51:47.769979  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  163 10:51:47.770065  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  164 10:51:47.770548  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  166 10:51:47.770871  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  167 10:51:47.771531  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  169 10:51:47.771761  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  170 10:51:47.772398  runner path: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/1/tests/1_bootrr test_uuid 12073779_1.4.2.3.5
  171 10:51:47.772552  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  173 10:51:47.772862  Creating lava-test-runner.conf files
  174 10:51:47.772930  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/0 for stage 0
  175 10:51:47.773022  - 0_dmesg
  176 10:51:47.773108  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12073779/lava-overlay-wegokvls/lava-12073779/1 for stage 1
  177 10:51:47.773201  - 1_bootrr
  178 10:51:47.773298  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  179 10:51:47.773386  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  180 10:51:47.782019  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  181 10:51:47.782142  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  182 10:51:47.782233  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  183 10:51:47.782319  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  184 10:51:47.782405  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  185 10:51:48.034123  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  186 10:51:48.034509  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  187 10:51:48.034627  extracting modules file /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12073779/extract-overlay-ramdisk-bryvm57x/ramdisk
  188 10:51:48.060018  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  189 10:51:48.060191  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  190 10:51:48.060293  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12073779/compress-overlay-te3lp57t/overlay-1.4.2.4.tar.gz to ramdisk
  191 10:51:48.060366  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12073779/compress-overlay-te3lp57t/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12073779/extract-overlay-ramdisk-bryvm57x/ramdisk
  192 10:51:48.068722  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  193 10:51:48.068843  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  194 10:51:48.068937  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  195 10:51:48.069026  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  196 10:51:48.069105  Building ramdisk /var/lib/lava/dispatcher/tmp/12073779/extract-overlay-ramdisk-bryvm57x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12073779/extract-overlay-ramdisk-bryvm57x/ramdisk
  197 10:51:48.222274  >> 54150 blocks

  198 10:51:49.148440  rename /var/lib/lava/dispatcher/tmp/12073779/extract-overlay-ramdisk-bryvm57x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/ramdisk/ramdisk.cpio.gz
  199 10:51:49.148881  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  200 10:51:49.149019  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  201 10:51:49.149174  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  202 10:51:49.149279  No mkimage arch provided, not using FIT.
  203 10:51:49.149371  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  204 10:51:49.149461  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  205 10:51:49.149570  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  206 10:51:49.149661  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  207 10:51:49.149740  No LXC device requested
  208 10:51:49.149817  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  209 10:51:49.149946  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  210 10:51:49.150030  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  211 10:51:49.150107  Checking files for TFTP limit of 4294967296 bytes.
  212 10:51:49.150515  end: 1 tftp-deploy (duration 00:00:02) [common]
  213 10:51:49.150628  start: 2 depthcharge-action (timeout 00:05:00) [common]
  214 10:51:49.150720  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  215 10:51:49.150838  substitutions:
  216 10:51:49.150907  - {DTB}: None
  217 10:51:49.150971  - {INITRD}: 12073779/tftp-deploy-lr_xnqmy/ramdisk/ramdisk.cpio.gz
  218 10:51:49.151032  - {KERNEL}: 12073779/tftp-deploy-lr_xnqmy/kernel/bzImage
  219 10:51:49.151090  - {LAVA_MAC}: None
  220 10:51:49.151146  - {PRESEED_CONFIG}: None
  221 10:51:49.151202  - {PRESEED_LOCAL}: None
  222 10:51:49.151258  - {RAMDISK}: 12073779/tftp-deploy-lr_xnqmy/ramdisk/ramdisk.cpio.gz
  223 10:51:49.151314  - {ROOT_PART}: None
  224 10:51:49.151369  - {ROOT}: None
  225 10:51:49.151424  - {SERVER_IP}: 192.168.201.1
  226 10:51:49.151479  - {TEE}: None
  227 10:51:49.151533  Parsed boot commands:
  228 10:51:49.151588  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  229 10:51:49.151765  Parsed boot commands: tftpboot 192.168.201.1 12073779/tftp-deploy-lr_xnqmy/kernel/bzImage 12073779/tftp-deploy-lr_xnqmy/kernel/cmdline 12073779/tftp-deploy-lr_xnqmy/ramdisk/ramdisk.cpio.gz
  230 10:51:49.151854  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  231 10:51:49.151939  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  232 10:51:49.152034  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  233 10:51:49.152128  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  234 10:51:49.152198  Not connected, no need to disconnect.
  235 10:51:49.152274  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  236 10:51:49.152360  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  237 10:51:49.152428  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-4'
  238 10:51:49.156302  Setting prompt string to ['lava-test: # ']
  239 10:51:49.156658  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  240 10:51:49.156768  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  241 10:51:49.156865  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  242 10:51:49.156954  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  243 10:51:49.157199  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=reboot'
  244 10:51:54.293460  >> Command sent successfully.

  245 10:51:54.295837  Returned 0 in 5 seconds
  246 10:51:54.396223  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  248 10:51:54.396554  end: 2.2.2 reset-device (duration 00:00:05) [common]
  249 10:51:54.396655  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  250 10:51:54.396741  Setting prompt string to 'Starting depthcharge on Volmar...'
  251 10:51:54.396809  Changing prompt to 'Starting depthcharge on Volmar...'
  252 10:51:54.396876  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  253 10:51:54.397129  [Enter `^Ec?' for help]

  254 10:51:55.773718  

  255 10:51:55.773944  

  256 10:51:55.781006  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  257 10:51:55.784690  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  258 10:51:55.788586  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  259 10:51:55.795582  CPU: AES supported, TXT NOT supported, VT supported

  260 10:51:55.803098  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  261 10:51:55.806931  Cache size = 10 MiB

  262 10:51:55.810627  MCH: device id 4609 (rev 04) is Alderlake-P

  263 10:51:55.814035  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  264 10:51:55.817616  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  265 10:51:55.821603  VBOOT: Loading verstage.

  266 10:51:55.825683  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  267 10:51:55.832928  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  268 10:51:55.836903  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  269 10:51:55.844545  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  270 10:51:55.851615  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  271 10:51:55.854993  

  272 10:51:55.855140  

  273 10:51:55.862624  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  274 10:51:55.866405  Probing TPM I2C: I2C bus 1 version 0x3230302a

  275 10:51:55.870366  DW I2C bus 1 at 0xfe022000 (400 KHz)

  276 10:51:55.873794  I2C TX abort detected (00000001)

  277 10:51:55.877126  cr50_i2c_read: Address write failed

  278 10:51:55.890968  .done! DID_VID 0x00281ae0

  279 10:51:55.894588  TPM ready after 0 ms

  280 10:51:55.898059  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  281 10:51:55.908154  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  282 10:51:55.915145  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  283 10:51:55.969862  tlcl_send_startup: Startup return code is 0

  284 10:51:55.970042  TPM: setup succeeded

  285 10:51:55.992941  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  286 10:51:56.014488  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  287 10:51:56.018905  Chrome EC: UHEPI supported

  288 10:51:56.022559  Reading cr50 boot mode

  289 10:51:56.037709  Cr50 says boot_mode is VERIFIED_RW(0x00).

  290 10:51:56.037840  Phase 1

  291 10:51:56.044581  FMAP: area GBB found @ 1805000 (458752 bytes)

  292 10:51:56.052061  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  293 10:51:56.058323  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  294 10:51:56.065204  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  295 10:51:56.065312  Phase 2

  296 10:51:56.065383  Phase 3

  297 10:51:56.071888  FMAP: area GBB found @ 1805000 (458752 bytes)

  298 10:51:56.075105  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  299 10:51:56.082135  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  300 10:51:56.088394  VB2:vb2_verify_keyblock() Checking keyblock signature...

  301 10:51:56.096747  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  302 10:51:56.103435  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  303 10:51:56.110589  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  304 10:51:56.122295  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  305 10:51:56.125625  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  306 10:51:56.132126  VB2:vb2_verify_fw_preamble() Verifying preamble.

  307 10:51:56.139217  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  308 10:51:56.145479  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  309 10:51:56.152279  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  310 10:51:56.155927  Phase 4

  311 10:51:56.159333  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  312 10:51:56.166071  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  313 10:51:56.378558  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  314 10:51:56.385487  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  315 10:51:56.388420  Saving vboot hash.

  316 10:51:56.395264  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  317 10:51:56.411367  tlcl_extend: response is 0

  318 10:51:56.417549  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  319 10:51:56.423999  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  320 10:51:56.438680  tlcl_extend: response is 0

  321 10:51:56.445721  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  322 10:51:56.465263  tlcl_lock_nv_write: response is 0

  323 10:51:56.484471  tlcl_lock_nv_write: response is 0

  324 10:51:56.484608  Slot A is selected

  325 10:51:56.491377  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  326 10:51:56.498055  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  327 10:51:56.504787  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  328 10:51:56.510921  BS: verstage times (exec / console): total (unknown) / 264 ms

  329 10:51:56.511031  

  330 10:51:56.511099  

  331 10:51:56.517731  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  332 10:51:56.522313  Google Chrome EC: version:

  333 10:51:56.525640  	ro: volmar_v2.0.14126-e605144e9c

  334 10:51:56.528864  	rw: volmar_v0.0.55-22d1557

  335 10:51:56.531945    running image: 2

  336 10:51:56.535482  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  337 10:51:56.545435  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  338 10:51:56.552232  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  339 10:51:56.558749  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  340 10:51:56.568632  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  341 10:51:56.578661  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  342 10:51:56.582098  EC took 981us to calculate image hash

  343 10:51:56.592573  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  344 10:51:56.598842  VB2:sync_ec() select_rw=RW(active)

  345 10:51:56.606838  Waited 275us to clear limit power flag.

  346 10:51:56.610417  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  347 10:51:56.613753  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  348 10:51:56.617123  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  349 10:51:56.623813  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  350 10:51:56.627142  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  351 10:51:56.630391  TCO_STS:   0000 0000

  352 10:51:56.630478  GEN_PMCON: d0015038 00002200

  353 10:51:56.633840  GBLRST_CAUSE: 00000000 00000000

  354 10:51:56.637278  HPR_CAUSE0: 00000000

  355 10:51:56.640539  prev_sleep_state 5

  356 10:51:56.643509  Abort disabling TXT, as CPU is not TXT capable.

  357 10:51:56.651863  cse_lite: Number of partitions = 3

  358 10:51:56.655160  cse_lite: Current partition = RO

  359 10:51:56.655246  cse_lite: Next partition = RO

  360 10:51:56.658581  cse_lite: Flags = 0x7

  361 10:51:56.665254  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  362 10:51:56.675862  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  363 10:51:56.678454  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  364 10:51:56.685068  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  365 10:51:56.691649  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  366 10:51:56.698613  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  367 10:51:56.701823  cse_lite: CSE CBFS RW version : 16.1.25.2049

  368 10:51:56.708590  cse_lite: Set Boot Partition Info Command (RW)

  369 10:51:56.711917  HECI: Global Reset(Type:1) Command

  370 10:51:58.124304  

  371 10:51:58.124806  

  372 10:51:58.131402  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  373 10:51:58.135103  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  374 10:51:58.141698  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  375 10:51:58.145163  CPU: AES supported, TXT NOT supported, VT supported

  376 10:51:58.154622  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  377 10:51:58.155093  Cache size = 10 MiB

  378 10:51:58.161449  MCH: device id 4609 (rev 04) is Alderlake-P

  379 10:51:58.164660  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  380 10:51:58.171748  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  381 10:51:58.172211  VBOOT: Loading verstage.

  382 10:51:58.178378  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  383 10:51:58.181658  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  384 10:51:58.189166  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  385 10:51:58.195730  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  386 10:51:58.201843  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  387 10:51:58.205595  

  388 10:51:58.206019  

  389 10:51:58.212712  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  390 10:51:58.219780  Probing TPM I2C: I2C bus 1 version 0x3230302a

  391 10:51:58.222484  DW I2C bus 1 at 0xfe022000 (400 KHz)

  392 10:51:58.225783  done! DID_VID 0x00281ae0

  393 10:51:58.229408  TPM ready after 0 ms

  394 10:51:58.233581  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  395 10:51:58.241797  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  396 10:51:58.248701  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  397 10:51:58.303402  tlcl_send_startup: Startup return code is 0

  398 10:51:58.303898  TPM: setup succeeded

  399 10:51:58.323867  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  400 10:51:58.345200  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  401 10:51:58.349381  Chrome EC: UHEPI supported

  402 10:51:58.352316  Reading cr50 boot mode

  403 10:51:58.367216  Cr50 says boot_mode is VERIFIED_RW(0x00).

  404 10:51:58.367727  Phase 1

  405 10:51:58.374160  FMAP: area GBB found @ 1805000 (458752 bytes)

  406 10:51:58.380409  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  407 10:51:58.387057  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  408 10:51:58.393617  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  409 10:51:58.396956  Phase 2

  410 10:51:58.397504  Phase 3

  411 10:51:58.400493  FMAP: area GBB found @ 1805000 (458752 bytes)

  412 10:51:58.407169  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  413 10:51:58.410014  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  414 10:51:58.417005  VB2:vb2_verify_keyblock() Checking keyblock signature...

  415 10:51:58.423859  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  416 10:51:58.430254  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  417 10:51:58.439959  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  418 10:51:58.452620  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  419 10:51:58.455390  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  420 10:51:58.462098  VB2:vb2_verify_fw_preamble() Verifying preamble.

  421 10:51:58.468893  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  422 10:51:58.475712  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  423 10:51:58.482605  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  424 10:51:58.486251  Phase 4

  425 10:51:58.489320  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  426 10:51:58.496531  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  427 10:51:58.709234  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  428 10:51:58.715414  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  429 10:51:58.718841  Saving vboot hash.

  430 10:51:58.725542  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  431 10:51:58.741264  tlcl_extend: response is 0

  432 10:51:58.748288  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  433 10:51:58.754466  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  434 10:51:58.769344  tlcl_extend: response is 0

  435 10:51:58.775812  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  436 10:51:58.793988  tlcl_lock_nv_write: response is 0

  437 10:51:58.813608  tlcl_lock_nv_write: response is 0

  438 10:51:58.814162  Slot A is selected

  439 10:51:58.819901  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  440 10:51:58.826253  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  441 10:51:58.833153  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  442 10:51:58.839797  BS: verstage times (exec / console): total (unknown) / 256 ms

  443 10:51:58.840294  

  444 10:51:58.840639  

  445 10:51:58.846273  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  446 10:51:58.850284  Google Chrome EC: version:

  447 10:51:58.853189  	ro: volmar_v2.0.14126-e605144e9c

  448 10:51:58.856585  	rw: volmar_v0.0.55-22d1557

  449 10:51:58.859929    running image: 2

  450 10:51:58.863614  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  451 10:51:58.873761  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  452 10:51:58.880307  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  453 10:51:58.886357  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  454 10:51:58.896358  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  455 10:51:58.906401  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  456 10:51:58.913385  EC took 1581us to calculate image hash

  457 10:51:58.923323  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  458 10:51:58.926616  VB2:sync_ec() select_rw=RW(active)

  459 10:51:58.943315  Waited 270us to clear limit power flag.

  460 10:51:58.946761  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  461 10:51:58.950043  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  462 10:51:58.952907  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  463 10:51:58.959554  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  464 10:51:58.963015  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  465 10:51:58.966447  TCO_STS:   0000 0000

  466 10:51:58.970160  GEN_PMCON: d1001038 00002200

  467 10:51:58.973145  GBLRST_CAUSE: 00000040 00000000

  468 10:51:58.973681  HPR_CAUSE0: 00000000

  469 10:51:58.976446  prev_sleep_state 5

  470 10:51:58.979370  Abort disabling TXT, as CPU is not TXT capable.

  471 10:51:58.988065  cse_lite: Number of partitions = 3

  472 10:51:58.991274  cse_lite: Current partition = RW

  473 10:51:58.991804  cse_lite: Next partition = RW

  474 10:51:58.994626  cse_lite: Flags = 0x7

  475 10:51:59.000967  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  476 10:51:59.011049  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  477 10:51:59.014443  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  478 10:51:59.021346  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  479 10:51:59.027777  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  480 10:51:59.034196  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  481 10:51:59.037959  cse_lite: CSE CBFS RW version : 16.1.25.2049

  482 10:51:59.041307  Boot Count incremented to 3866

  483 10:51:59.048071  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  484 10:51:59.054478  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  485 10:51:59.067481  Probing TPM I2C: done! DID_VID 0x00281ae0

  486 10:51:59.070754  Locality already claimed

  487 10:51:59.074072  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  488 10:51:59.093968  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  489 10:51:59.100497  MRC: Hash idx 0x100d comparison successful.

  490 10:51:59.103937  MRC cache found, size f6c8

  491 10:51:59.104496  bootmode is set to: 2

  492 10:51:59.108923  EC returned error result code 3

  493 10:51:59.111978  FW_CONFIG value from CBI is 0x131

  494 10:51:59.118518  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  495 10:51:59.121794  SPD index = 0

  496 10:51:59.129033  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  497 10:51:59.129558  SPD: module type is LPDDR4X

  498 10:51:59.136786  SPD: module part number is K4U6E3S4AB-MGCL

  499 10:51:59.143197  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  500 10:51:59.146893  SPD: device width 16 bits, bus width 16 bits

  501 10:51:59.150052  SPD: module size is 1024 MB (per channel)

  502 10:51:59.219059  CBMEM:

  503 10:51:59.222333  IMD: root @ 0x76fff000 254 entries.

  504 10:51:59.225780  IMD: root @ 0x76ffec00 62 entries.

  505 10:51:59.233658  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  506 10:51:59.236845  RO_VPD is uninitialized or empty.

  507 10:51:59.240262  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  508 10:51:59.247427  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  509 10:51:59.250342  External stage cache:

  510 10:51:59.253488  IMD: root @ 0x7bbff000 254 entries.

  511 10:51:59.256929  IMD: root @ 0x7bbfec00 62 entries.

  512 10:51:59.263897  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  513 10:51:59.271077  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  514 10:51:59.273745  MRC: 'RW_MRC_CACHE' does not need update.

  515 10:51:59.274223  8 DIMMs found

  516 10:51:59.277289  SMM Memory Map

  517 10:51:59.280207  SMRAM       : 0x7b800000 0x800000

  518 10:51:59.283536   Subregion 0: 0x7b800000 0x200000

  519 10:51:59.287358   Subregion 1: 0x7ba00000 0x200000

  520 10:51:59.290552   Subregion 2: 0x7bc00000 0x400000

  521 10:51:59.293623  top_of_ram = 0x77000000

  522 10:51:59.297268  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  523 10:51:59.304113  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  524 10:51:59.310428  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  525 10:51:59.313854  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  526 10:51:59.314433  Normal boot

  527 10:51:59.324011  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  528 10:51:59.330609  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  529 10:51:59.337111  Processing 237 relocs. Offset value of 0x74ab9000

  530 10:51:59.345459  BS: romstage times (exec / console): total (unknown) / 377 ms

  531 10:51:59.352865  

  532 10:51:59.353415  

  533 10:51:59.358876  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  534 10:51:59.359312  Normal boot

  535 10:51:59.366021  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  536 10:51:59.373104  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  537 10:51:59.379170  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  538 10:51:59.389064  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  539 10:51:59.436860  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  540 10:51:59.443468  Processing 5931 relocs. Offset value of 0x72a2f000

  541 10:51:59.446771  BS: postcar times (exec / console): total (unknown) / 51 ms

  542 10:51:59.449811  

  543 10:51:59.450335  

  544 10:51:59.456416  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  545 10:51:59.459849  Reserving BERT start 76a1e000, size 10000

  546 10:51:59.462940  Normal boot

  547 10:51:59.466663  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  548 10:51:59.473263  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  549 10:51:59.483259  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  550 10:51:59.486459  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  551 10:51:59.490406  Google Chrome EC: version:

  552 10:51:59.492967  	ro: volmar_v2.0.14126-e605144e9c

  553 10:51:59.496751  	rw: volmar_v0.0.55-22d1557

  554 10:51:59.500036    running image: 2

  555 10:51:59.503175  ACPI _SWS is PM1 Index 8 GPE Index -1

  556 10:51:59.506429  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  557 10:51:59.513733  EC returned error result code 3

  558 10:51:59.517256  FW_CONFIG value from CBI is 0x131

  559 10:51:59.523619  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  560 10:51:59.527032  PCI: 00:1c.2 disabled by fw_config

  561 10:51:59.533427  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  562 10:51:59.536984  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  563 10:51:59.543693  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  564 10:51:59.546584  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  565 10:51:59.553550  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  566 10:51:59.560322  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  567 10:51:59.566677  microcode: sig=0x906a4 pf=0x80 revision=0x423

  568 10:51:59.569779  microcode: Update skipped, already up-to-date

  569 10:51:59.576576  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  570 10:51:59.609664  Detected 6 core, 8 thread CPU.

  571 10:51:59.612714  Setting up SMI for CPU

  572 10:51:59.616296  IED base = 0x7bc00000

  573 10:51:59.616845  IED size = 0x00400000

  574 10:51:59.619668  Will perform SMM setup.

  575 10:51:59.622883  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  576 10:51:59.626064  LAPIC 0x0 in XAPIC mode.

  577 10:51:59.636146  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  578 10:51:59.639168  Processing 18 relocs. Offset value of 0x00030000

  579 10:51:59.644033  Attempting to start 7 APs

  580 10:51:59.647332  Waiting for 10ms after sending INIT.

  581 10:51:59.660233  Waiting for SIPI to complete...

  582 10:51:59.663495  done.

  583 10:51:59.663928  LAPIC 0x1 in XAPIC mode.

  584 10:51:59.667368  LAPIC 0x12 in XAPIC mode.

  585 10:51:59.669920  LAPIC 0x8 in XAPIC mode.

  586 10:51:59.673874  LAPIC 0x10 in XAPIC mode.

  587 10:51:59.676796  LAPIC 0x14 in XAPIC mode.

  588 10:51:59.677301  LAPIC 0x16 in XAPIC mode.

  589 10:51:59.683311  AP: slot 1 apic_id 14, MCU rev: 0x00000423

  590 10:51:59.687030  AP: slot 4 apic_id 12, MCU rev: 0x00000423

  591 10:51:59.690293  AP: slot 2 apic_id 16, MCU rev: 0x00000423

  592 10:51:59.696826  AP: slot 3 apic_id 10, MCU rev: 0x00000423

  593 10:51:59.700104  AP: slot 7 apic_id 1, MCU rev: 0x00000423

  594 10:51:59.703487  Waiting for SIPI to complete...

  595 10:51:59.703920  done.

  596 10:51:59.706755  AP: slot 6 apic_id 8, MCU rev: 0x00000423

  597 10:51:59.709753  LAPIC 0x9 in XAPIC mode.

  598 10:51:59.713237  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  599 10:51:59.716752  smm_setup_relocation_handler: enter

  600 10:51:59.720410  smm_setup_relocation_handler: exit

  601 10:51:59.729852  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  602 10:51:59.733543  Processing 11 relocs. Offset value of 0x00038000

  603 10:51:59.740198  smm_module_setup_stub: stack_top = 0x7b804000

  604 10:51:59.743630  smm_module_setup_stub: per cpu stack_size = 0x800

  605 10:51:59.750417  smm_module_setup_stub: runtime.start32_offset = 0x4c

  606 10:51:59.753528  smm_module_setup_stub: runtime.smm_size = 0x10000

  607 10:51:59.759822  SMM Module: stub loaded at 38000. Will call 0x76a52094

  608 10:51:59.763066  Installing permanent SMM handler to 0x7b800000

  609 10:51:59.769791  smm_load_module: total_smm_space_needed e468, available -> 200000

  610 10:51:59.779417  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  611 10:51:59.782970  Processing 255 relocs. Offset value of 0x7b9f6000

  612 10:51:59.789704  smm_load_module: smram_start: 0x7b800000

  613 10:51:59.792914  smm_load_module: smram_end: 7ba00000

  614 10:51:59.796193  smm_load_module: handler start 0x7b9f6d5f

  615 10:51:59.799504  smm_load_module: handler_size 98d0

  616 10:51:59.802969  smm_load_module: fxsave_area 0x7b9ff000

  617 10:51:59.806648  smm_load_module: fxsave_size 1000

  618 10:51:59.809655  smm_load_module: CONFIG_MSEG_SIZE 0x0

  619 10:51:59.816202  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  620 10:51:59.823037  smm_load_module: handler_mod_params.smbase = 0x7b800000

  621 10:51:59.826352  smm_load_module: per_cpu_save_state_size = 0x400

  622 10:51:59.829586  smm_load_module: num_cpus = 0x8

  623 10:51:59.835982  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  624 10:51:59.839695  smm_load_module: total_save_state_size = 0x2000

  625 10:51:59.846083  smm_load_module: cpu0 entry: 7b9e6000

  626 10:51:59.849267  smm_create_map: cpus allowed in one segment 30

  627 10:51:59.853108  smm_create_map: min # of segments needed 1

  628 10:51:59.856313  CPU 0x0

  629 10:51:59.859698      smbase 7b9e6000  entry 7b9ee000

  630 10:51:59.862466             ss_start 7b9f5c00  code_end 7b9ee208

  631 10:51:59.862899  CPU 0x1

  632 10:51:59.866235      smbase 7b9e5c00  entry 7b9edc00

  633 10:51:59.872857             ss_start 7b9f5800  code_end 7b9ede08

  634 10:51:59.873406  CPU 0x2

  635 10:51:59.876182      smbase 7b9e5800  entry 7b9ed800

  636 10:51:59.882727             ss_start 7b9f5400  code_end 7b9eda08

  637 10:51:59.883206  CPU 0x3

  638 10:51:59.885981      smbase 7b9e5400  entry 7b9ed400

  639 10:51:59.889529             ss_start 7b9f5000  code_end 7b9ed608

  640 10:51:59.892278  CPU 0x4

  641 10:51:59.896341      smbase 7b9e5000  entry 7b9ed000

  642 10:51:59.899030             ss_start 7b9f4c00  code_end 7b9ed208

  643 10:51:59.899547  CPU 0x5

  644 10:51:59.905972      smbase 7b9e4c00  entry 7b9ecc00

  645 10:51:59.909227             ss_start 7b9f4800  code_end 7b9ece08

  646 10:51:59.909664  CPU 0x6

  647 10:51:59.912341      smbase 7b9e4800  entry 7b9ec800

  648 10:51:59.919123             ss_start 7b9f4400  code_end 7b9eca08

  649 10:51:59.919686  CPU 0x7

  650 10:51:59.922740      smbase 7b9e4400  entry 7b9ec400

  651 10:51:59.929226             ss_start 7b9f4000  code_end 7b9ec608

  652 10:51:59.935905  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  653 10:51:59.942338  Processing 11 relocs. Offset value of 0x7b9ee000

  654 10:51:59.945761  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  655 10:51:59.952812  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  656 10:51:59.959142  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  657 10:51:59.965733  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  658 10:51:59.972628  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  659 10:51:59.979181  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  660 10:51:59.985577  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  661 10:51:59.989069  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  662 10:51:59.995464  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  663 10:52:00.001962  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  664 10:52:00.008769  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  665 10:52:00.014894  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  666 10:52:00.021841  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  667 10:52:00.028566  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  668 10:52:00.035245  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  669 10:52:00.038039  smm_module_setup_stub: stack_top = 0x7b804000

  670 10:52:00.045264  smm_module_setup_stub: per cpu stack_size = 0x800

  671 10:52:00.048575  smm_module_setup_stub: runtime.start32_offset = 0x4c

  672 10:52:00.055145  smm_module_setup_stub: runtime.smm_size = 0x200000

  673 10:52:00.061549  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  674 10:52:00.065011  Clearing SMI status registers

  675 10:52:00.068377  SMI_STS: PM1 

  676 10:52:00.068944  PM1_STS: WAK PWRBTN 

  677 10:52:00.078061  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  678 10:52:00.078533  In relocation handler: CPU 0

  679 10:52:00.084376  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  680 10:52:00.087718  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  681 10:52:00.091374  Relocation complete.

  682 10:52:00.098101  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  683 10:52:00.101061  In relocation handler: CPU 7

  684 10:52:00.104941  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  685 10:52:00.107434  Relocation complete.

  686 10:52:00.114558  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  687 10:52:00.117489  In relocation handler: CPU 2

  688 10:52:00.121223  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  689 10:52:00.127994  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  690 10:52:00.128612  Relocation complete.

  691 10:52:00.133995  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  692 10:52:00.137717  In relocation handler: CPU 3

  693 10:52:00.141475  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  694 10:52:00.147385  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  695 10:52:00.150838  Relocation complete.

  696 10:52:00.157368  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  697 10:52:00.160589  In relocation handler: CPU 1

  698 10:52:00.164156  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  699 10:52:00.167757  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  700 10:52:00.171275  Relocation complete.

  701 10:52:00.177388  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  702 10:52:00.181313  In relocation handler: CPU 4

  703 10:52:00.183903  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  704 10:52:00.190719  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  705 10:52:00.191172  Relocation complete.

  706 10:52:00.197180  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  707 10:52:00.200576  In relocation handler: CPU 6

  708 10:52:00.207904  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  709 10:52:00.210626  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  710 10:52:00.213863  Relocation complete.

  711 10:52:00.221191  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  712 10:52:00.223973  In relocation handler: CPU 5

  713 10:52:00.227470  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  714 10:52:00.230525  Relocation complete.

  715 10:52:00.230960  Initializing CPU #0

  716 10:52:00.233934  CPU: vendor Intel device 906a4

  717 10:52:00.237474  CPU: family 06, model 9a, stepping 04

  718 10:52:00.240625  Clearing out pending MCEs

  719 10:52:00.244385  cpu: energy policy set to 7

  720 10:52:00.247247  Turbo is available but hidden

  721 10:52:00.250788  Turbo is available and visible

  722 10:52:00.253933  microcode: Update skipped, already up-to-date

  723 10:52:00.257266  CPU #0 initialized

  724 10:52:00.257796  Initializing CPU #7

  725 10:52:00.260413  Initializing CPU #4

  726 10:52:00.263861  Initializing CPU #1

  727 10:52:00.264391  Initializing CPU #2

  728 10:52:00.267153  Initializing CPU #3

  729 10:52:00.270244  CPU: vendor Intel device 906a4

  730 10:52:00.274003  CPU: family 06, model 9a, stepping 04

  731 10:52:00.277223  CPU: vendor Intel device 906a4

  732 10:52:00.280486  CPU: family 06, model 9a, stepping 04

  733 10:52:00.283466  Clearing out pending MCEs

  734 10:52:00.287044  CPU: vendor Intel device 906a4

  735 10:52:00.290675  CPU: family 06, model 9a, stepping 04

  736 10:52:00.293434  CPU: vendor Intel device 906a4

  737 10:52:00.297090  CPU: family 06, model 9a, stepping 04

  738 10:52:00.300632  cpu: energy policy set to 7

  739 10:52:00.303286  Clearing out pending MCEs

  740 10:52:00.306748  microcode: Update skipped, already up-to-date

  741 10:52:00.310367  CPU #4 initialized

  742 10:52:00.313383  Clearing out pending MCEs

  743 10:52:00.313810  Clearing out pending MCEs

  744 10:52:00.316926  cpu: energy policy set to 7

  745 10:52:00.320199  cpu: energy policy set to 7

  746 10:52:00.324008  cpu: energy policy set to 7

  747 10:52:00.326860  microcode: Update skipped, already up-to-date

  748 10:52:00.329929  CPU #1 initialized

  749 10:52:00.333704  microcode: Update skipped, already up-to-date

  750 10:52:00.336687  CPU #2 initialized

  751 10:52:00.340236  CPU: vendor Intel device 906a4

  752 10:52:00.343237  CPU: family 06, model 9a, stepping 04

  753 10:52:00.346431  microcode: Update skipped, already up-to-date

  754 10:52:00.350403  CPU #7 initialized

  755 10:52:00.353808  Clearing out pending MCEs

  756 10:52:00.354388  Initializing CPU #6

  757 10:52:00.356818  cpu: energy policy set to 7

  758 10:52:00.359890  Initializing CPU #5

  759 10:52:00.363571  microcode: Update skipped, already up-to-date

  760 10:52:00.366395  CPU #3 initialized

  761 10:52:00.370276  CPU: vendor Intel device 906a4

  762 10:52:00.373168  CPU: family 06, model 9a, stepping 04

  763 10:52:00.376465  CPU: vendor Intel device 906a4

  764 10:52:00.380174  CPU: family 06, model 9a, stepping 04

  765 10:52:00.383351  Clearing out pending MCEs

  766 10:52:00.383837  Clearing out pending MCEs

  767 10:52:00.386433  cpu: energy policy set to 7

  768 10:52:00.389916  cpu: energy policy set to 7

  769 10:52:00.396381  microcode: Update skipped, already up-to-date

  770 10:52:00.396815  CPU #6 initialized

  771 10:52:00.402864  microcode: Update skipped, already up-to-date

  772 10:52:00.403363  CPU #5 initialized

  773 10:52:00.410684  bsp_do_flight_plan done after 700 msecs.

  774 10:52:00.411266  CPU: frequency set to 4400 MHz

  775 10:52:00.413479  Enabling SMIs.

  776 10:52:00.419422  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 383 / 521 ms

  777 10:52:00.434882  Probing TPM I2C: done! DID_VID 0x00281ae0

  778 10:52:00.438309  Locality already claimed

  779 10:52:00.441536  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  780 10:52:00.453198  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  781 10:52:00.456209  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  782 10:52:00.462994  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  783 10:52:00.470052  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  784 10:52:00.473012  Found a VBT of 9216 bytes after decompression

  785 10:52:00.476662  PCI  1.0, PIN A, using IRQ #16

  786 10:52:00.479196  PCI  2.0, PIN A, using IRQ #17

  787 10:52:00.482942  PCI  4.0, PIN A, using IRQ #18

  788 10:52:00.486187  PCI  5.0, PIN A, using IRQ #16

  789 10:52:00.489593  PCI  6.0, PIN A, using IRQ #16

  790 10:52:00.492611  PCI  6.2, PIN C, using IRQ #18

  791 10:52:00.496260  PCI  7.0, PIN A, using IRQ #19

  792 10:52:00.499626  PCI  7.1, PIN B, using IRQ #20

  793 10:52:00.502995  PCI  7.2, PIN C, using IRQ #21

  794 10:52:00.506105  PCI  7.3, PIN D, using IRQ #22

  795 10:52:00.509330  PCI  8.0, PIN A, using IRQ #23

  796 10:52:00.513179  PCI  D.0, PIN A, using IRQ #17

  797 10:52:00.515713  PCI  D.1, PIN B, using IRQ #19

  798 10:52:00.516149  PCI 10.0, PIN A, using IRQ #24

  799 10:52:00.519356  PCI 10.1, PIN B, using IRQ #25

  800 10:52:00.522701  PCI 10.6, PIN C, using IRQ #20

  801 10:52:00.526042  PCI 10.7, PIN D, using IRQ #21

  802 10:52:00.529349  PCI 11.0, PIN A, using IRQ #26

  803 10:52:00.532448  PCI 11.1, PIN B, using IRQ #27

  804 10:52:00.536025  PCI 11.2, PIN C, using IRQ #28

  805 10:52:00.539310  PCI 11.3, PIN D, using IRQ #29

  806 10:52:00.542520  PCI 12.0, PIN A, using IRQ #30

  807 10:52:00.546060  PCI 12.6, PIN B, using IRQ #31

  808 10:52:00.549191  PCI 12.7, PIN C, using IRQ #22

  809 10:52:00.552913  PCI 13.0, PIN A, using IRQ #32

  810 10:52:00.555903  PCI 13.1, PIN B, using IRQ #33

  811 10:52:00.558868  PCI 13.2, PIN C, using IRQ #34

  812 10:52:00.562841  PCI 13.3, PIN D, using IRQ #35

  813 10:52:00.565533  PCI 14.0, PIN B, using IRQ #23

  814 10:52:00.569189  PCI 14.1, PIN A, using IRQ #36

  815 10:52:00.569710  PCI 14.3, PIN C, using IRQ #17

  816 10:52:00.572761  PCI 15.0, PIN A, using IRQ #37

  817 10:52:00.575460  PCI 15.1, PIN B, using IRQ #38

  818 10:52:00.578992  PCI 15.2, PIN C, using IRQ #39

  819 10:52:00.582372  PCI 15.3, PIN D, using IRQ #40

  820 10:52:00.586026  PCI 16.0, PIN A, using IRQ #18

  821 10:52:00.589014  PCI 16.1, PIN B, using IRQ #19

  822 10:52:00.592107  PCI 16.2, PIN C, using IRQ #20

  823 10:52:00.595369  PCI 16.3, PIN D, using IRQ #21

  824 10:52:00.599203  PCI 16.4, PIN A, using IRQ #18

  825 10:52:00.602562  PCI 16.5, PIN B, using IRQ #19

  826 10:52:00.605768  PCI 17.0, PIN A, using IRQ #22

  827 10:52:00.609428  PCI 19.0, PIN A, using IRQ #41

  828 10:52:00.612409  PCI 19.1, PIN B, using IRQ #42

  829 10:52:00.615717  PCI 19.2, PIN C, using IRQ #43

  830 10:52:00.618890  PCI 1C.0, PIN A, using IRQ #16

  831 10:52:00.622148  PCI 1C.1, PIN B, using IRQ #17

  832 10:52:00.622579  PCI 1C.2, PIN C, using IRQ #18

  833 10:52:00.625929  PCI 1C.3, PIN D, using IRQ #19

  834 10:52:00.628456  PCI 1C.4, PIN A, using IRQ #16

  835 10:52:00.631999  PCI 1C.5, PIN B, using IRQ #17

  836 10:52:00.635390  PCI 1C.6, PIN C, using IRQ #18

  837 10:52:00.638725  PCI 1C.7, PIN D, using IRQ #19

  838 10:52:00.642489  PCI 1D.0, PIN A, using IRQ #16

  839 10:52:00.645395  PCI 1D.1, PIN B, using IRQ #17

  840 10:52:00.648760  PCI 1D.2, PIN C, using IRQ #18

  841 10:52:00.651997  PCI 1D.3, PIN D, using IRQ #19

  842 10:52:00.655826  PCI 1E.0, PIN A, using IRQ #23

  843 10:52:00.658754  PCI 1E.1, PIN B, using IRQ #20

  844 10:52:00.661863  PCI 1E.2, PIN C, using IRQ #44

  845 10:52:00.665628  PCI 1E.3, PIN D, using IRQ #45

  846 10:52:00.668921  PCI 1F.3, PIN B, using IRQ #22

  847 10:52:00.671811  PCI 1F.4, PIN C, using IRQ #23

  848 10:52:00.675681  PCI 1F.6, PIN D, using IRQ #20

  849 10:52:00.676190  PCI 1F.7, PIN A, using IRQ #21

  850 10:52:00.681666  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  851 10:52:00.688446  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  852 10:52:00.867593  FSPS returned 0

  853 10:52:00.870569  Executing Phase 1 of FspMultiPhaseSiInit

  854 10:52:00.880492  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  855 10:52:00.884090  port C0 DISC req: usage 1 usb3 1 usb2 1

  856 10:52:00.887396  Raw Buffer output 0 00000111

  857 10:52:00.890770  Raw Buffer output 1 00000000

  858 10:52:00.894565  pmc_send_ipc_cmd succeeded

  859 10:52:00.901085  port C1 DISC req: usage 1 usb3 3 usb2 3

  860 10:52:00.901644  Raw Buffer output 0 00000331

  861 10:52:00.904032  Raw Buffer output 1 00000000

  862 10:52:00.908340  pmc_send_ipc_cmd succeeded

  863 10:52:00.912208  Detected 6 core, 8 thread CPU.

  864 10:52:00.915387  Detected 6 core, 8 thread CPU.

  865 10:52:00.920887  Detected 6 core, 8 thread CPU.

  866 10:52:00.924039  Detected 6 core, 8 thread CPU.

  867 10:52:00.927525  Detected 6 core, 8 thread CPU.

  868 10:52:00.930909  Detected 6 core, 8 thread CPU.

  869 10:52:00.933686  Detected 6 core, 8 thread CPU.

  870 10:52:00.937600  Detected 6 core, 8 thread CPU.

  871 10:52:00.941100  Detected 6 core, 8 thread CPU.

  872 10:52:00.944266  Detected 6 core, 8 thread CPU.

  873 10:52:00.947305  Detected 6 core, 8 thread CPU.

  874 10:52:00.950471  Detected 6 core, 8 thread CPU.

  875 10:52:00.954025  Detected 6 core, 8 thread CPU.

  876 10:52:00.957066  Detected 6 core, 8 thread CPU.

  877 10:52:00.960994  Detected 6 core, 8 thread CPU.

  878 10:52:00.963895  Detected 6 core, 8 thread CPU.

  879 10:52:00.967014  Detected 6 core, 8 thread CPU.

  880 10:52:00.970533  Detected 6 core, 8 thread CPU.

  881 10:52:00.973849  Detected 6 core, 8 thread CPU.

  882 10:52:00.977017  Detected 6 core, 8 thread CPU.

  883 10:52:00.980498  Detected 6 core, 8 thread CPU.

  884 10:52:00.983776  Detected 6 core, 8 thread CPU.

  885 10:52:01.274310  Detected 6 core, 8 thread CPU.

  886 10:52:01.277475  Detected 6 core, 8 thread CPU.

  887 10:52:01.281336  Detected 6 core, 8 thread CPU.

  888 10:52:01.284171  Detected 6 core, 8 thread CPU.

  889 10:52:01.287976  Detected 6 core, 8 thread CPU.

  890 10:52:01.291115  Detected 6 core, 8 thread CPU.

  891 10:52:01.294446  Detected 6 core, 8 thread CPU.

  892 10:52:01.297732  Detected 6 core, 8 thread CPU.

  893 10:52:01.300815  Detected 6 core, 8 thread CPU.

  894 10:52:01.304247  Detected 6 core, 8 thread CPU.

  895 10:52:01.307399  Detected 6 core, 8 thread CPU.

  896 10:52:01.310542  Detected 6 core, 8 thread CPU.

  897 10:52:01.314252  Detected 6 core, 8 thread CPU.

  898 10:52:01.317237  Detected 6 core, 8 thread CPU.

  899 10:52:01.320702  Detected 6 core, 8 thread CPU.

  900 10:52:01.324022  Detected 6 core, 8 thread CPU.

  901 10:52:01.327325  Detected 6 core, 8 thread CPU.

  902 10:52:01.331160  Detected 6 core, 8 thread CPU.

  903 10:52:01.334109  Detected 6 core, 8 thread CPU.

  904 10:52:01.337828  Detected 6 core, 8 thread CPU.

  905 10:52:01.340500  Display FSP Version Info HOB

  906 10:52:01.344002  Reference Code - CPU = c.0.65.70

  907 10:52:01.344513  uCode Version = 0.0.4.23

  908 10:52:01.347678  TXT ACM version = ff.ff.ff.ffff

  909 10:52:01.350813  Reference Code - ME = c.0.65.70

  910 10:52:01.354020  MEBx version = 0.0.0.0

  911 10:52:01.357574  ME Firmware Version = Lite SKU

  912 10:52:01.360664  Reference Code - PCH = c.0.65.70

  913 10:52:01.363929  PCH-CRID Status = Disabled

  914 10:52:01.367185  PCH-CRID Original Value = ff.ff.ff.ffff

  915 10:52:01.370483  PCH-CRID New Value = ff.ff.ff.ffff

  916 10:52:01.373815  OPROM - RST - RAID = ff.ff.ff.ffff

  917 10:52:01.377362  PCH Hsio Version = 4.0.0.0

  918 10:52:01.380539  Reference Code - SA - System Agent = c.0.65.70

  919 10:52:01.384090  Reference Code - MRC = 0.0.3.80

  920 10:52:01.387464  SA - PCIe Version = c.0.65.70

  921 10:52:01.390435  SA-CRID Status = Disabled

  922 10:52:01.393679  SA-CRID Original Value = 0.0.0.4

  923 10:52:01.397426  SA-CRID New Value = 0.0.0.4

  924 10:52:01.400306  OPROM - VBIOS = ff.ff.ff.ffff

  925 10:52:01.403874  IO Manageability Engine FW Version = 24.0.4.0

  926 10:52:01.407174  PHY Build Version = 0.0.0.2016

  927 10:52:01.410309  Thunderbolt(TM) FW Version = 0.0.0.0

  928 10:52:01.417241  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  929 10:52:01.423662  BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms

  930 10:52:01.427144  Enumerating buses...

  931 10:52:01.430491  Show all devs... Before device enumeration.

  932 10:52:01.433641  Root Device: enabled 1

  933 10:52:01.434110  CPU_CLUSTER: 0: enabled 1

  934 10:52:01.437634  DOMAIN: 0000: enabled 1

  935 10:52:01.440100  GPIO: 0: enabled 1

  936 10:52:01.445052  PCI: 00:00.0: enabled 1

  937 10:52:01.445584  PCI: 00:01.0: enabled 0

  938 10:52:01.447321  PCI: 00:01.1: enabled 0

  939 10:52:01.450190  PCI: 00:02.0: enabled 1

  940 10:52:01.450632  PCI: 00:04.0: enabled 1

  941 10:52:01.453513  PCI: 00:05.0: enabled 0

  942 10:52:01.456980  PCI: 00:06.0: enabled 1

  943 10:52:01.460541  PCI: 00:06.2: enabled 0

  944 10:52:01.461138  PCI: 00:07.0: enabled 0

  945 10:52:01.463888  PCI: 00:07.1: enabled 0

  946 10:52:01.466969  PCI: 00:07.2: enabled 0

  947 10:52:01.470532  PCI: 00:07.3: enabled 0

  948 10:52:01.470963  PCI: 00:08.0: enabled 0

  949 10:52:01.473797  PCI: 00:09.0: enabled 0

  950 10:52:01.477096  PCI: 00:0a.0: enabled 1

  951 10:52:01.480356  PCI: 00:0d.0: enabled 1

  952 10:52:01.480787  PCI: 00:0d.1: enabled 0

  953 10:52:01.483364  PCI: 00:0d.2: enabled 0

  954 10:52:01.487146  PCI: 00:0d.3: enabled 0

  955 10:52:01.490310  PCI: 00:0e.0: enabled 0

  956 10:52:01.490745  PCI: 00:10.0: enabled 0

  957 10:52:01.493814  PCI: 00:10.1: enabled 0

  958 10:52:01.497150  PCI: 00:10.6: enabled 0

  959 10:52:01.497658  PCI: 00:10.7: enabled 0

  960 10:52:01.500241  PCI: 00:12.0: enabled 0

  961 10:52:01.503607  PCI: 00:12.6: enabled 0

  962 10:52:01.506882  PCI: 00:12.7: enabled 0

  963 10:52:01.507315  PCI: 00:13.0: enabled 0

  964 10:52:01.510548  PCI: 00:14.0: enabled 1

  965 10:52:01.513715  PCI: 00:14.1: enabled 0

  966 10:52:01.517212  PCI: 00:14.2: enabled 1

  967 10:52:01.517715  PCI: 00:14.3: enabled 1

  968 10:52:01.520326  PCI: 00:15.0: enabled 1

  969 10:52:01.523455  PCI: 00:15.1: enabled 1

  970 10:52:01.527298  PCI: 00:15.2: enabled 0

  971 10:52:01.527729  PCI: 00:15.3: enabled 1

  972 10:52:01.530132  PCI: 00:16.0: enabled 1

  973 10:52:01.533445  PCI: 00:16.1: enabled 0

  974 10:52:01.533874  PCI: 00:16.2: enabled 0

  975 10:52:01.536926  PCI: 00:16.3: enabled 0

  976 10:52:01.540535  PCI: 00:16.4: enabled 0

  977 10:52:01.543315  PCI: 00:16.5: enabled 0

  978 10:52:01.543748  PCI: 00:17.0: enabled 1

  979 10:52:01.546804  PCI: 00:19.0: enabled 0

  980 10:52:01.549964  PCI: 00:19.1: enabled 1

  981 10:52:01.553489  PCI: 00:19.2: enabled 0

  982 10:52:01.554029  PCI: 00:1a.0: enabled 0

  983 10:52:01.556799  PCI: 00:1c.0: enabled 0

  984 10:52:01.560290  PCI: 00:1c.1: enabled 0

  985 10:52:01.563281  PCI: 00:1c.2: enabled 0

  986 10:52:01.563712  PCI: 00:1c.3: enabled 0

  987 10:52:01.567041  PCI: 00:1c.4: enabled 0

  988 10:52:01.569979  PCI: 00:1c.5: enabled 0

  989 10:52:01.570416  PCI: 00:1c.6: enabled 0

  990 10:52:01.573319  PCI: 00:1c.7: enabled 0

  991 10:52:01.576702  PCI: 00:1d.0: enabled 0

  992 10:52:01.580025  PCI: 00:1d.1: enabled 0

  993 10:52:01.580475  PCI: 00:1d.2: enabled 0

  994 10:52:01.583184  PCI: 00:1d.3: enabled 0

  995 10:52:01.586783  PCI: 00:1e.0: enabled 1

  996 10:52:01.589995  PCI: 00:1e.1: enabled 0

  997 10:52:01.590428  PCI: 00:1e.2: enabled 0

  998 10:52:01.593094  PCI: 00:1e.3: enabled 1

  999 10:52:01.596636  PCI: 00:1f.0: enabled 1

 1000 10:52:01.599832  PCI: 00:1f.1: enabled 0

 1001 10:52:01.600254  PCI: 00:1f.2: enabled 1

 1002 10:52:01.603551  PCI: 00:1f.3: enabled 1

 1003 10:52:01.606562  PCI: 00:1f.4: enabled 0

 1004 10:52:01.609925  PCI: 00:1f.5: enabled 1

 1005 10:52:01.610382  PCI: 00:1f.6: enabled 0

 1006 10:52:01.613474  PCI: 00:1f.7: enabled 0

 1007 10:52:01.616749  GENERIC: 0.0: enabled 1

 1008 10:52:01.617175  GENERIC: 0.0: enabled 1

 1009 10:52:01.619970  GENERIC: 1.0: enabled 1

 1010 10:52:01.623594  GENERIC: 0.0: enabled 1

 1011 10:52:01.626379  GENERIC: 1.0: enabled 1

 1012 10:52:01.626807  USB0 port 0: enabled 1

 1013 10:52:01.629583  USB0 port 0: enabled 1

 1014 10:52:01.633324  GENERIC: 0.0: enabled 1

 1015 10:52:01.636439  I2C: 00:1a: enabled 1

 1016 10:52:01.636996  I2C: 00:31: enabled 1

 1017 10:52:01.640058  I2C: 00:32: enabled 1

 1018 10:52:01.643520  I2C: 00:50: enabled 1

 1019 10:52:01.643949  I2C: 00:10: enabled 1

 1020 10:52:01.646544  I2C: 00:15: enabled 1

 1021 10:52:01.650096  I2C: 00:2c: enabled 1

 1022 10:52:01.650650  GENERIC: 0.0: enabled 1

 1023 10:52:01.652883  SPI: 00: enabled 1

 1024 10:52:01.656386  PNP: 0c09.0: enabled 1

 1025 10:52:01.656913  GENERIC: 0.0: enabled 1

 1026 10:52:01.659770  USB3 port 0: enabled 1

 1027 10:52:01.663194  USB3 port 1: enabled 0

 1028 10:52:01.663621  USB3 port 2: enabled 1

 1029 10:52:01.666349  USB3 port 3: enabled 0

 1030 10:52:01.669959  USB2 port 0: enabled 1

 1031 10:52:01.673025  USB2 port 1: enabled 0

 1032 10:52:01.673524  USB2 port 2: enabled 1

 1033 10:52:01.676404  USB2 port 3: enabled 0

 1034 10:52:01.679797  USB2 port 4: enabled 0

 1035 10:52:01.680290  USB2 port 5: enabled 1

 1036 10:52:01.682608  USB2 port 6: enabled 0

 1037 10:52:01.686317  USB2 port 7: enabled 0

 1038 10:52:01.689792  USB2 port 8: enabled 1

 1039 10:52:01.690489  USB2 port 9: enabled 1

 1040 10:52:01.693134  USB3 port 0: enabled 1

 1041 10:52:01.696339  USB3 port 1: enabled 0

 1042 10:52:01.696761  USB3 port 2: enabled 0

 1043 10:52:01.699358  USB3 port 3: enabled 0

 1044 10:52:01.702638  GENERIC: 0.0: enabled 1

 1045 10:52:01.706020  GENERIC: 1.0: enabled 1

 1046 10:52:01.706446  APIC: 00: enabled 1

 1047 10:52:01.709246  APIC: 14: enabled 1

 1048 10:52:01.709836  APIC: 16: enabled 1

 1049 10:52:01.713089  APIC: 10: enabled 1

 1050 10:52:01.716068  APIC: 12: enabled 1

 1051 10:52:01.716491  APIC: 09: enabled 1

 1052 10:52:01.719497  APIC: 08: enabled 1

 1053 10:52:01.719923  APIC: 01: enabled 1

 1054 10:52:01.722522  Compare with tree...

 1055 10:52:01.726271  Root Device: enabled 1

 1056 10:52:01.729634   CPU_CLUSTER: 0: enabled 1

 1057 10:52:01.730096    APIC: 00: enabled 1

 1058 10:52:01.732880    APIC: 14: enabled 1

 1059 10:52:01.736050    APIC: 16: enabled 1

 1060 10:52:01.736591    APIC: 10: enabled 1

 1061 10:52:01.739322    APIC: 12: enabled 1

 1062 10:52:01.742756    APIC: 09: enabled 1

 1063 10:52:01.743282    APIC: 08: enabled 1

 1064 10:52:01.746433    APIC: 01: enabled 1

 1065 10:52:01.749331   DOMAIN: 0000: enabled 1

 1066 10:52:01.749981    GPIO: 0: enabled 1

 1067 10:52:01.752638    PCI: 00:00.0: enabled 1

 1068 10:52:01.756160    PCI: 00:01.0: enabled 0

 1069 10:52:01.759216    PCI: 00:01.1: enabled 0

 1070 10:52:01.763279    PCI: 00:02.0: enabled 1

 1071 10:52:01.763797    PCI: 00:04.0: enabled 1

 1072 10:52:01.765859     GENERIC: 0.0: enabled 1

 1073 10:52:01.769199    PCI: 00:05.0: enabled 0

 1074 10:52:01.772705    PCI: 00:06.0: enabled 1

 1075 10:52:01.776038    PCI: 00:06.2: enabled 0

 1076 10:52:01.776633    PCI: 00:08.0: enabled 0

 1077 10:52:01.779558    PCI: 00:09.0: enabled 0

 1078 10:52:01.782663    PCI: 00:0a.0: enabled 1

 1079 10:52:01.785753    PCI: 00:0d.0: enabled 1

 1080 10:52:01.789314     USB0 port 0: enabled 1

 1081 10:52:01.789740      USB3 port 0: enabled 1

 1082 10:52:01.792560      USB3 port 1: enabled 0

 1083 10:52:01.795627      USB3 port 2: enabled 1

 1084 10:52:01.799245      USB3 port 3: enabled 0

 1085 10:52:01.802761    PCI: 00:0d.1: enabled 0

 1086 10:52:01.803314    PCI: 00:0d.2: enabled 0

 1087 10:52:01.805776    PCI: 00:0d.3: enabled 0

 1088 10:52:01.809432    PCI: 00:0e.0: enabled 0

 1089 10:52:01.812570    PCI: 00:10.0: enabled 0

 1090 10:52:01.815997    PCI: 00:10.1: enabled 0

 1091 10:52:01.816494    PCI: 00:10.6: enabled 0

 1092 10:52:01.819025    PCI: 00:10.7: enabled 0

 1093 10:52:01.822341    PCI: 00:12.0: enabled 0

 1094 10:52:01.825778    PCI: 00:12.6: enabled 0

 1095 10:52:01.828866    PCI: 00:12.7: enabled 0

 1096 10:52:01.829303    PCI: 00:13.0: enabled 0

 1097 10:52:01.832659    PCI: 00:14.0: enabled 1

 1098 10:52:01.835493     USB0 port 0: enabled 1

 1099 10:52:01.839063      USB2 port 0: enabled 1

 1100 10:52:01.842748      USB2 port 1: enabled 0

 1101 10:52:01.843174      USB2 port 2: enabled 1

 1102 10:52:01.845758      USB2 port 3: enabled 0

 1103 10:52:01.849334      USB2 port 4: enabled 0

 1104 10:52:01.852533      USB2 port 5: enabled 1

 1105 10:52:01.855880      USB2 port 6: enabled 0

 1106 10:52:01.859021      USB2 port 7: enabled 0

 1107 10:52:01.859446      USB2 port 8: enabled 1

 1108 10:52:01.862523      USB2 port 9: enabled 1

 1109 10:52:01.866156      USB3 port 0: enabled 1

 1110 10:52:01.869843      USB3 port 1: enabled 0

 1111 10:52:01.872750      USB3 port 2: enabled 0

 1112 10:52:01.875678      USB3 port 3: enabled 0

 1113 10:52:01.876168    PCI: 00:14.1: enabled 0

 1114 10:52:01.878915    PCI: 00:14.2: enabled 1

 1115 10:52:01.882006    PCI: 00:14.3: enabled 1

 1116 10:52:01.885479     GENERIC: 0.0: enabled 1

 1117 10:52:01.888980    PCI: 00:15.0: enabled 1

 1118 10:52:01.889501     I2C: 00:1a: enabled 1

 1119 10:52:01.892608     I2C: 00:31: enabled 1

 1120 10:52:01.895295     I2C: 00:32: enabled 1

 1121 10:52:01.898520    PCI: 00:15.1: enabled 1

 1122 10:52:01.898945     I2C: 00:50: enabled 1

 1123 10:52:01.902366    PCI: 00:15.2: enabled 0

 1124 10:52:01.905416    PCI: 00:15.3: enabled 1

 1125 10:52:01.908965     I2C: 00:10: enabled 1

 1126 10:52:01.912653    PCI: 00:16.0: enabled 1

 1127 10:52:01.913078    PCI: 00:16.1: enabled 0

 1128 10:52:01.915198    PCI: 00:16.2: enabled 0

 1129 10:52:01.918883    PCI: 00:16.3: enabled 0

 1130 10:52:01.922153    PCI: 00:16.4: enabled 0

 1131 10:52:01.925264    PCI: 00:16.5: enabled 0

 1132 10:52:01.925687    PCI: 00:17.0: enabled 1

 1133 10:52:01.928858    PCI: 00:19.0: enabled 0

 1134 10:52:01.931840    PCI: 00:19.1: enabled 1

 1135 10:52:01.935000     I2C: 00:15: enabled 1

 1136 10:52:01.935427     I2C: 00:2c: enabled 1

 1137 10:52:01.938414    PCI: 00:19.2: enabled 0

 1138 10:52:01.941573    PCI: 00:1a.0: enabled 0

 1139 10:52:01.945129    PCI: 00:1e.0: enabled 1

 1140 10:52:01.948553    PCI: 00:1e.1: enabled 0

 1141 10:52:01.949063    PCI: 00:1e.2: enabled 0

 1142 10:52:01.951668    PCI: 00:1e.3: enabled 1

 1143 10:52:01.955004     SPI: 00: enabled 1

 1144 10:52:01.958500    PCI: 00:1f.0: enabled 1

 1145 10:52:01.961587     PNP: 0c09.0: enabled 1

 1146 10:52:01.962060    PCI: 00:1f.1: enabled 0

 1147 10:52:01.965003    PCI: 00:1f.2: enabled 1

 1148 10:52:01.968598     GENERIC: 0.0: enabled 1

 1149 10:52:01.971675      GENERIC: 0.0: enabled 1

 1150 10:52:01.975114      GENERIC: 1.0: enabled 1

 1151 10:52:01.975538    PCI: 00:1f.3: enabled 1

 1152 10:52:01.978308    PCI: 00:1f.4: enabled 0

 1153 10:52:01.981845    PCI: 00:1f.5: enabled 1

 1154 10:52:01.984690    PCI: 00:1f.6: enabled 0

 1155 10:52:01.988407    PCI: 00:1f.7: enabled 0

 1156 10:52:01.988863  Root Device scanning...

 1157 10:52:01.991649  scan_static_bus for Root Device

 1158 10:52:01.994860  CPU_CLUSTER: 0 enabled

 1159 10:52:01.998510  DOMAIN: 0000 enabled

 1160 10:52:01.998934  DOMAIN: 0000 scanning...

 1161 10:52:02.001748  PCI: pci_scan_bus for bus 00

 1162 10:52:02.004757  PCI: 00:00.0 [8086/0000] ops

 1163 10:52:02.008580  PCI: 00:00.0 [8086/4609] enabled

 1164 10:52:02.011900  PCI: 00:02.0 [8086/0000] bus ops

 1165 10:52:02.014890  PCI: 00:02.0 [8086/46b3] enabled

 1166 10:52:02.017950  PCI: 00:04.0 [8086/0000] bus ops

 1167 10:52:02.021579  PCI: 00:04.0 [8086/461d] enabled

 1168 10:52:02.024852  PCI: 00:06.0 [8086/0000] bus ops

 1169 10:52:02.028087  PCI: 00:06.0 [8086/464d] enabled

 1170 10:52:02.031657  PCI: 00:08.0 [8086/464f] disabled

 1171 10:52:02.034701  PCI: 00:0a.0 [8086/467d] enabled

 1172 10:52:02.038326  PCI: 00:0d.0 [8086/0000] bus ops

 1173 10:52:02.041182  PCI: 00:0d.0 [8086/461e] enabled

 1174 10:52:02.045155  PCI: 00:14.0 [8086/0000] bus ops

 1175 10:52:02.048528  PCI: 00:14.0 [8086/51ed] enabled

 1176 10:52:02.051932  PCI: 00:14.2 [8086/51ef] enabled

 1177 10:52:02.055246  PCI: 00:14.3 [8086/0000] bus ops

 1178 10:52:02.058457  PCI: 00:14.3 [8086/51f0] enabled

 1179 10:52:02.061706  PCI: 00:15.0 [8086/0000] bus ops

 1180 10:52:02.065021  PCI: 00:15.0 [8086/51e8] enabled

 1181 10:52:02.068299  PCI: 00:15.1 [8086/0000] bus ops

 1182 10:52:02.071522  PCI: 00:15.1 [8086/51e9] enabled

 1183 10:52:02.075100  PCI: 00:15.2 [8086/0000] bus ops

 1184 10:52:02.081983  PCI: 00:15.2 [8086/51ea] disabled

 1185 10:52:02.084928  PCI: 00:15.3 [8086/0000] bus ops

 1186 10:52:02.088275  PCI: 00:15.3 [8086/51eb] enabled

 1187 10:52:02.088698  PCI: 00:16.0 [8086/0000] ops

 1188 10:52:02.091558  PCI: 00:16.0 [8086/51e0] enabled

 1189 10:52:02.098140  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1190 10:52:02.101741  PCI: 00:19.0 [8086/0000] bus ops

 1191 10:52:02.104960  PCI: 00:19.0 [8086/51c5] disabled

 1192 10:52:02.108164  PCI: 00:19.1 [8086/0000] bus ops

 1193 10:52:02.111570  PCI: 00:19.1 [8086/51c6] enabled

 1194 10:52:02.114839  PCI: 00:1e.0 [8086/0000] ops

 1195 10:52:02.117952  PCI: 00:1e.0 [8086/51a8] enabled

 1196 10:52:02.121763  PCI: 00:1e.3 [8086/0000] bus ops

 1197 10:52:02.125022  PCI: 00:1e.3 [8086/51ab] enabled

 1198 10:52:02.128150  PCI: 00:1f.0 [8086/0000] bus ops

 1199 10:52:02.131210  PCI: 00:1f.0 [8086/5182] enabled

 1200 10:52:02.134794  RTC Init

 1201 10:52:02.138309  Set power on after power failure.

 1202 10:52:02.141738  Disabling Deep S3

 1203 10:52:02.142399  Disabling Deep S3

 1204 10:52:02.144777  Disabling Deep S4

 1205 10:52:02.145269  Disabling Deep S4

 1206 10:52:02.148526  Disabling Deep S5

 1207 10:52:02.149037  Disabling Deep S5

 1208 10:52:02.151212  PCI: 00:1f.2 [0000/0000] hidden

 1209 10:52:02.154768  PCI: 00:1f.3 [8086/0000] bus ops

 1210 10:52:02.158059  PCI: 00:1f.3 [8086/51c8] enabled

 1211 10:52:02.161372  PCI: 00:1f.5 [8086/0000] bus ops

 1212 10:52:02.164868  PCI: 00:1f.5 [8086/51a4] enabled

 1213 10:52:02.168265  GPIO: 0 enabled

 1214 10:52:02.171628  PCI: Leftover static devices:

 1215 10:52:02.172125  PCI: 00:01.0

 1216 10:52:02.172463  PCI: 00:01.1

 1217 10:52:02.175262  PCI: 00:05.0

 1218 10:52:02.175685  PCI: 00:06.2

 1219 10:52:02.178058  PCI: 00:09.0

 1220 10:52:02.178582  PCI: 00:0d.1

 1221 10:52:02.181336  PCI: 00:0d.2

 1222 10:52:02.181758  PCI: 00:0d.3

 1223 10:52:02.182146  PCI: 00:0e.0

 1224 10:52:02.184553  PCI: 00:10.0

 1225 10:52:02.184985  PCI: 00:10.1

 1226 10:52:02.188024  PCI: 00:10.6

 1227 10:52:02.188596  PCI: 00:10.7

 1228 10:52:02.188946  PCI: 00:12.0

 1229 10:52:02.191815  PCI: 00:12.6

 1230 10:52:02.192346  PCI: 00:12.7

 1231 10:52:02.194617  PCI: 00:13.0

 1232 10:52:02.195231  PCI: 00:14.1

 1233 10:52:02.195599  PCI: 00:16.1

 1234 10:52:02.198255  PCI: 00:16.2

 1235 10:52:02.198678  PCI: 00:16.3

 1236 10:52:02.201585  PCI: 00:16.4

 1237 10:52:02.202050  PCI: 00:16.5

 1238 10:52:02.204937  PCI: 00:17.0

 1239 10:52:02.205360  PCI: 00:19.2

 1240 10:52:02.205697  PCI: 00:1a.0

 1241 10:52:02.207732  PCI: 00:1e.1

 1242 10:52:02.208151  PCI: 00:1e.2

 1243 10:52:02.211433  PCI: 00:1f.1

 1244 10:52:02.211854  PCI: 00:1f.4

 1245 10:52:02.212190  PCI: 00:1f.6

 1246 10:52:02.214727  PCI: 00:1f.7

 1247 10:52:02.218534  PCI: Check your devicetree.cb.

 1248 10:52:02.221041  PCI: 00:02.0 scanning...

 1249 10:52:02.224501  scan_generic_bus for PCI: 00:02.0

 1250 10:52:02.228523  scan_generic_bus for PCI: 00:02.0 done

 1251 10:52:02.231472  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1252 10:52:02.234244  PCI: 00:04.0 scanning...

 1253 10:52:02.237908  scan_generic_bus for PCI: 00:04.0

 1254 10:52:02.241042  GENERIC: 0.0 enabled

 1255 10:52:02.247959  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1256 10:52:02.251222  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1257 10:52:02.254348  PCI: 00:06.0 scanning...

 1258 10:52:02.257778  do_pci_scan_bridge for PCI: 00:06.0

 1259 10:52:02.261559  PCI: pci_scan_bus for bus 01

 1260 10:52:02.264642  PCI: 01:00.0 [15b7/5009] enabled

 1261 10:52:02.267928  Enabling Common Clock Configuration

 1262 10:52:02.271157  L1 Sub-State supported from root port 6

 1263 10:52:02.274608  L1 Sub-State Support = 0x5

 1264 10:52:02.277876  CommonModeRestoreTime = 0x6e

 1265 10:52:02.280739  Power On Value = 0x5, Power On Scale = 0x2

 1266 10:52:02.283997  ASPM: Enabled L1

 1267 10:52:02.287647  PCIe: Max_Payload_Size adjusted to 256

 1268 10:52:02.291221  PCI: 01:00.0: Enabled LTR

 1269 10:52:02.294505  PCI: 01:00.0: Programmed LTR max latencies

 1270 10:52:02.297489  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1271 10:52:02.300641  PCI: 00:0d.0 scanning...

 1272 10:52:02.304493  scan_static_bus for PCI: 00:0d.0

 1273 10:52:02.307930  USB0 port 0 enabled

 1274 10:52:02.308423  USB0 port 0 scanning...

 1275 10:52:02.311130  scan_static_bus for USB0 port 0

 1276 10:52:02.314013  USB3 port 0 enabled

 1277 10:52:02.317701  USB3 port 1 disabled

 1278 10:52:02.318290  USB3 port 2 enabled

 1279 10:52:02.320574  USB3 port 3 disabled

 1280 10:52:02.323996  USB3 port 0 scanning...

 1281 10:52:02.327709  scan_static_bus for USB3 port 0

 1282 10:52:02.330776  scan_static_bus for USB3 port 0 done

 1283 10:52:02.333866  scan_bus: bus USB3 port 0 finished in 6 msecs

 1284 10:52:02.337359  USB3 port 2 scanning...

 1285 10:52:02.341276  scan_static_bus for USB3 port 2

 1286 10:52:02.344076  scan_static_bus for USB3 port 2 done

 1287 10:52:02.347312  scan_bus: bus USB3 port 2 finished in 6 msecs

 1288 10:52:02.350810  scan_static_bus for USB0 port 0 done

 1289 10:52:02.357716  scan_bus: bus USB0 port 0 finished in 43 msecs

 1290 10:52:02.360864  scan_static_bus for PCI: 00:0d.0 done

 1291 10:52:02.363808  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1292 10:52:02.367222  PCI: 00:14.0 scanning...

 1293 10:52:02.370576  scan_static_bus for PCI: 00:14.0

 1294 10:52:02.374199  USB0 port 0 enabled

 1295 10:52:02.377505  USB0 port 0 scanning...

 1296 10:52:02.380758  scan_static_bus for USB0 port 0

 1297 10:52:02.381279  USB2 port 0 enabled

 1298 10:52:02.384008  USB2 port 1 disabled

 1299 10:52:02.384447  USB2 port 2 enabled

 1300 10:52:02.387205  USB2 port 3 disabled

 1301 10:52:02.390732  USB2 port 4 disabled

 1302 10:52:02.391150  USB2 port 5 enabled

 1303 10:52:02.393593  USB2 port 6 disabled

 1304 10:52:02.396923  USB2 port 7 disabled

 1305 10:52:02.397338  USB2 port 8 enabled

 1306 10:52:02.400548  USB2 port 9 enabled

 1307 10:52:02.400965  USB3 port 0 enabled

 1308 10:52:02.404013  USB3 port 1 disabled

 1309 10:52:02.407414  USB3 port 2 disabled

 1310 10:52:02.407927  USB3 port 3 disabled

 1311 10:52:02.410258  USB2 port 0 scanning...

 1312 10:52:02.413988  scan_static_bus for USB2 port 0

 1313 10:52:02.417340  scan_static_bus for USB2 port 0 done

 1314 10:52:02.423664  scan_bus: bus USB2 port 0 finished in 6 msecs

 1315 10:52:02.424205  USB2 port 2 scanning...

 1316 10:52:02.426850  scan_static_bus for USB2 port 2

 1317 10:52:02.430142  scan_static_bus for USB2 port 2 done

 1318 10:52:02.437417  scan_bus: bus USB2 port 2 finished in 6 msecs

 1319 10:52:02.440523  USB2 port 5 scanning...

 1320 10:52:02.443538  scan_static_bus for USB2 port 5

 1321 10:52:02.446790  scan_static_bus for USB2 port 5 done

 1322 10:52:02.450395  scan_bus: bus USB2 port 5 finished in 6 msecs

 1323 10:52:02.453713  USB2 port 8 scanning...

 1324 10:52:02.457178  scan_static_bus for USB2 port 8

 1325 10:52:02.460356  scan_static_bus for USB2 port 8 done

 1326 10:52:02.463730  scan_bus: bus USB2 port 8 finished in 6 msecs

 1327 10:52:02.467130  USB2 port 9 scanning...

 1328 10:52:02.470467  scan_static_bus for USB2 port 9

 1329 10:52:02.473732  scan_static_bus for USB2 port 9 done

 1330 10:52:02.476524  scan_bus: bus USB2 port 9 finished in 6 msecs

 1331 10:52:02.479902  USB3 port 0 scanning...

 1332 10:52:02.483172  scan_static_bus for USB3 port 0

 1333 10:52:02.486612  scan_static_bus for USB3 port 0 done

 1334 10:52:02.493395  scan_bus: bus USB3 port 0 finished in 6 msecs

 1335 10:52:02.496745  scan_static_bus for USB0 port 0 done

 1336 10:52:02.500148  scan_bus: bus USB0 port 0 finished in 120 msecs

 1337 10:52:02.503275  scan_static_bus for PCI: 00:14.0 done

 1338 10:52:02.510284  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1339 10:52:02.513545  PCI: 00:14.3 scanning...

 1340 10:52:02.517016  scan_static_bus for PCI: 00:14.3

 1341 10:52:02.517545  GENERIC: 0.0 enabled

 1342 10:52:02.519898  scan_static_bus for PCI: 00:14.3 done

 1343 10:52:02.526828  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1344 10:52:02.530208  PCI: 00:15.0 scanning...

 1345 10:52:02.533530  scan_static_bus for PCI: 00:15.0

 1346 10:52:02.534193  I2C: 00:1a enabled

 1347 10:52:02.536671  I2C: 00:31 enabled

 1348 10:52:02.537130  I2C: 00:32 enabled

 1349 10:52:02.539864  scan_static_bus for PCI: 00:15.0 done

 1350 10:52:02.546815  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1351 10:52:02.550320  PCI: 00:15.1 scanning...

 1352 10:52:02.553188  scan_static_bus for PCI: 00:15.1

 1353 10:52:02.553607  I2C: 00:50 enabled

 1354 10:52:02.556524  scan_static_bus for PCI: 00:15.1 done

 1355 10:52:02.563668  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1356 10:52:02.567036  PCI: 00:15.3 scanning...

 1357 10:52:02.570479  scan_static_bus for PCI: 00:15.3

 1358 10:52:02.570991  I2C: 00:10 enabled

 1359 10:52:02.573358  scan_static_bus for PCI: 00:15.3 done

 1360 10:52:02.580150  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1361 10:52:02.580677  PCI: 00:19.1 scanning...

 1362 10:52:02.583731  scan_static_bus for PCI: 00:19.1

 1363 10:52:02.586536  I2C: 00:15 enabled

 1364 10:52:02.589580  I2C: 00:2c enabled

 1365 10:52:02.593049  scan_static_bus for PCI: 00:19.1 done

 1366 10:52:02.596519  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1367 10:52:02.599751  PCI: 00:1e.3 scanning...

 1368 10:52:02.602819  scan_generic_bus for PCI: 00:1e.3

 1369 10:52:02.606015  SPI: 00 enabled

 1370 10:52:02.609848  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1371 10:52:02.616658  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1372 10:52:02.619937  PCI: 00:1f.0 scanning...

 1373 10:52:02.622645  scan_static_bus for PCI: 00:1f.0

 1374 10:52:02.623065  PNP: 0c09.0 enabled

 1375 10:52:02.626048  PNP: 0c09.0 scanning...

 1376 10:52:02.629483  scan_static_bus for PNP: 0c09.0

 1377 10:52:02.633000  scan_static_bus for PNP: 0c09.0 done

 1378 10:52:02.636291  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1379 10:52:02.642657  scan_static_bus for PCI: 00:1f.0 done

 1380 10:52:02.646200  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1381 10:52:02.649317  PCI: 00:1f.2 scanning...

 1382 10:52:02.652768  scan_static_bus for PCI: 00:1f.2

 1383 10:52:02.653223  GENERIC: 0.0 enabled

 1384 10:52:02.656160  GENERIC: 0.0 scanning...

 1385 10:52:02.659196  scan_static_bus for GENERIC: 0.0

 1386 10:52:02.662967  GENERIC: 0.0 enabled

 1387 10:52:02.665663  GENERIC: 1.0 enabled

 1388 10:52:02.669572  scan_static_bus for GENERIC: 0.0 done

 1389 10:52:02.672571  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1390 10:52:02.676010  scan_static_bus for PCI: 00:1f.2 done

 1391 10:52:02.682409  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1392 10:52:02.682829  PCI: 00:1f.3 scanning...

 1393 10:52:02.685987  scan_static_bus for PCI: 00:1f.3

 1394 10:52:02.692964  scan_static_bus for PCI: 00:1f.3 done

 1395 10:52:02.695735  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1396 10:52:02.699331  PCI: 00:1f.5 scanning...

 1397 10:52:02.702749  scan_generic_bus for PCI: 00:1f.5

 1398 10:52:02.705968  scan_generic_bus for PCI: 00:1f.5 done

 1399 10:52:02.709347  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1400 10:52:02.715702  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1401 10:52:02.719164  scan_static_bus for Root Device done

 1402 10:52:02.722401  scan_bus: bus Root Device finished in 729 msecs

 1403 10:52:02.725566  done

 1404 10:52:02.729179  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1405 10:52:02.736097  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1406 10:52:02.742615  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1407 10:52:02.745605  SPI flash protection: WPSW=0 SRP0=0

 1408 10:52:02.752575  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1409 10:52:02.755924  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1410 10:52:02.759139  found VGA at PCI: 00:02.0

 1411 10:52:02.762406  Setting up VGA for PCI: 00:02.0

 1412 10:52:02.769853  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1413 10:52:02.772479  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1414 10:52:02.775861  Allocating resources...

 1415 10:52:02.779429  Reading resources...

 1416 10:52:02.782133  Root Device read_resources bus 0 link: 0

 1417 10:52:02.785481  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1418 10:52:02.792760  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1419 10:52:02.795489  DOMAIN: 0000 read_resources bus 0 link: 0

 1420 10:52:02.802520  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1421 10:52:02.808685  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1422 10:52:02.812763  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1423 10:52:02.818847  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1424 10:52:02.825238  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1425 10:52:02.831993  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1426 10:52:02.838599  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1427 10:52:02.845315  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1428 10:52:02.852297  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1429 10:52:02.858078  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1430 10:52:02.864762  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1431 10:52:02.871744  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1432 10:52:02.878162  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1433 10:52:02.885106  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1434 10:52:02.887989  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1435 10:52:02.895330  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1436 10:52:02.901766  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1437 10:52:02.907904  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1438 10:52:02.914634  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1439 10:52:02.921189  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1440 10:52:02.928083  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1441 10:52:02.931363  PCI: 00:04.0 read_resources bus 1 link: 0

 1442 10:52:02.934598  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1443 10:52:02.941380  PCI: 00:06.0 read_resources bus 1 link: 0

 1444 10:52:02.945008  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1445 10:52:02.948290  PCI: 00:0d.0 read_resources bus 0 link: 0

 1446 10:52:02.954856  USB0 port 0 read_resources bus 0 link: 0

 1447 10:52:02.957950  USB0 port 0 read_resources bus 0 link: 0 done

 1448 10:52:02.961215  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1449 10:52:02.968495  PCI: 00:14.0 read_resources bus 0 link: 0

 1450 10:52:02.971567  USB0 port 0 read_resources bus 0 link: 0

 1451 10:52:02.975164  USB0 port 0 read_resources bus 0 link: 0 done

 1452 10:52:02.981698  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1453 10:52:02.984326  PCI: 00:14.3 read_resources bus 0 link: 0

 1454 10:52:02.991232  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1455 10:52:02.994356  PCI: 00:15.0 read_resources bus 0 link: 0

 1456 10:52:02.998021  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1457 10:52:03.004856  PCI: 00:15.1 read_resources bus 0 link: 0

 1458 10:52:03.007440  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1459 10:52:03.011061  PCI: 00:15.3 read_resources bus 0 link: 0

 1460 10:52:03.017530  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1461 10:52:03.021055  PCI: 00:19.1 read_resources bus 0 link: 0

 1462 10:52:03.027479  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1463 10:52:03.030707  PCI: 00:1e.3 read_resources bus 2 link: 0

 1464 10:52:03.034109  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1465 10:52:03.040722  PCI: 00:1f.0 read_resources bus 0 link: 0

 1466 10:52:03.043601  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1467 10:52:03.046945  PCI: 00:1f.2 read_resources bus 0 link: 0

 1468 10:52:03.053738  GENERIC: 0.0 read_resources bus 0 link: 0

 1469 10:52:03.057141  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1470 10:52:03.060352  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1471 10:52:03.066805  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1472 10:52:03.070468  Root Device read_resources bus 0 link: 0 done

 1473 10:52:03.073584  Done reading resources.

 1474 10:52:03.080202  Show resources in subtree (Root Device)...After reading.

 1475 10:52:03.083753   Root Device child on link 0 CPU_CLUSTER: 0

 1476 10:52:03.087083    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1477 10:52:03.090231     APIC: 00

 1478 10:52:03.090651     APIC: 14

 1479 10:52:03.090982     APIC: 16

 1480 10:52:03.094049     APIC: 10

 1481 10:52:03.094532     APIC: 12

 1482 10:52:03.096935     APIC: 09

 1483 10:52:03.097416     APIC: 08

 1484 10:52:03.097751     APIC: 01

 1485 10:52:03.103961    DOMAIN: 0000 child on link 0 GPIO: 0

 1486 10:52:03.110463    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1487 10:52:03.120534    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1488 10:52:03.123613     GPIO: 0

 1489 10:52:03.124016     PCI: 00:00.0

 1490 10:52:03.133764     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1491 10:52:03.143447     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1492 10:52:03.153643     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1493 10:52:03.160153     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1494 10:52:03.170162     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1495 10:52:03.179863     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1496 10:52:03.190007     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1497 10:52:03.199750     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1498 10:52:03.209977     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1499 10:52:03.219710     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1500 10:52:03.226410     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1501 10:52:03.236534     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1502 10:52:03.246401     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1503 10:52:03.256258     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1504 10:52:03.266558     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1505 10:52:03.276167     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1506 10:52:03.282888     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1507 10:52:03.292533     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1508 10:52:03.302516     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1509 10:52:03.313090     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1510 10:52:03.322757     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1511 10:52:03.332709     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1512 10:52:03.342524     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1513 10:52:03.352943     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1514 10:52:03.362800     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1515 10:52:03.369328     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1516 10:52:03.379569     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1517 10:52:03.388701     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1518 10:52:03.392404     PCI: 00:02.0

 1519 10:52:03.402415     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1520 10:52:03.412020     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1521 10:52:03.422194     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1522 10:52:03.425407     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1523 10:52:03.435367     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1524 10:52:03.435851      GENERIC: 0.0

 1525 10:52:03.442089     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1526 10:52:03.448869     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1527 10:52:03.458724     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1528 10:52:03.468685     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1529 10:52:03.472374      PCI: 01:00.0

 1530 10:52:03.482218      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1531 10:52:03.492083      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1532 10:52:03.492632     PCI: 00:08.0

 1533 10:52:03.495316     PCI: 00:0a.0

 1534 10:52:03.504776     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1535 10:52:03.508301     PCI: 00:0d.0 child on link 0 USB0 port 0

 1536 10:52:03.518122     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1537 10:52:03.521621      USB0 port 0 child on link 0 USB3 port 0

 1538 10:52:03.524672       USB3 port 0

 1539 10:52:03.525089       USB3 port 1

 1540 10:52:03.528142       USB3 port 2

 1541 10:52:03.528560       USB3 port 3

 1542 10:52:03.535057     PCI: 00:14.0 child on link 0 USB0 port 0

 1543 10:52:03.544827     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1544 10:52:03.548480      USB0 port 0 child on link 0 USB2 port 0

 1545 10:52:03.551355       USB2 port 0

 1546 10:52:03.551774       USB2 port 1

 1547 10:52:03.554627       USB2 port 2

 1548 10:52:03.555042       USB2 port 3

 1549 10:52:03.558238       USB2 port 4

 1550 10:52:03.558652       USB2 port 5

 1551 10:52:03.561698       USB2 port 6

 1552 10:52:03.562267       USB2 port 7

 1553 10:52:03.565193       USB2 port 8

 1554 10:52:03.565606       USB2 port 9

 1555 10:52:03.568112       USB3 port 0

 1556 10:52:03.568637       USB3 port 1

 1557 10:52:03.571589       USB3 port 2

 1558 10:52:03.574880       USB3 port 3

 1559 10:52:03.575398     PCI: 00:14.2

 1560 10:52:03.584885     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1561 10:52:03.594577     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1562 10:52:03.598349     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1563 10:52:03.608084     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1564 10:52:03.611435      GENERIC: 0.0

 1565 10:52:03.615323     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1566 10:52:03.624964     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1567 10:52:03.628427      I2C: 00:1a

 1568 10:52:03.628954      I2C: 00:31

 1569 10:52:03.631605      I2C: 00:32

 1570 10:52:03.634563     PCI: 00:15.1 child on link 0 I2C: 00:50

 1571 10:52:03.644323     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1572 10:52:03.644743      I2C: 00:50

 1573 10:52:03.647898     PCI: 00:15.2

 1574 10:52:03.651280     PCI: 00:15.3 child on link 0 I2C: 00:10

 1575 10:52:03.661693     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1576 10:52:03.664808      I2C: 00:10

 1577 10:52:03.665389     PCI: 00:16.0

 1578 10:52:03.674764     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1579 10:52:03.678439     PCI: 00:19.0

 1580 10:52:03.681209     PCI: 00:19.1 child on link 0 I2C: 00:15

 1581 10:52:03.690722     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1582 10:52:03.691148      I2C: 00:15

 1583 10:52:03.694338      I2C: 00:2c

 1584 10:52:03.694755     PCI: 00:1e.0

 1585 10:52:03.707485     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1586 10:52:03.710912     PCI: 00:1e.3 child on link 0 SPI: 00

 1587 10:52:03.720892     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1588 10:52:03.721319      SPI: 00

 1589 10:52:03.727586     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1590 10:52:03.734083     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1591 10:52:03.737535      PNP: 0c09.0

 1592 10:52:03.744047      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1593 10:52:03.750682     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1594 10:52:03.760675     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1595 10:52:03.767647     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1596 10:52:03.773808      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1597 10:52:03.774313       GENERIC: 0.0

 1598 10:52:03.777554       GENERIC: 1.0

 1599 10:52:03.778026     PCI: 00:1f.3

 1600 10:52:03.787586     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1601 10:52:03.797530     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1602 10:52:03.800685     PCI: 00:1f.5

 1603 10:52:03.810753     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1604 10:52:03.817349  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1605 10:52:03.824292   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1606 10:52:03.826956   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1607 10:52:03.833728   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1608 10:52:03.840572    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1609 10:52:03.843736    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1610 10:52:03.850490   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1611 10:52:03.857000   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1612 10:52:03.867160   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1613 10:52:03.873725  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1614 10:52:03.880177  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1615 10:52:03.886857   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1616 10:52:03.893763   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1617 10:52:03.900372   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1618 10:52:03.904238   DOMAIN: 0000: Resource ranges:

 1619 10:52:03.906859   * Base: 1000, Size: 800, Tag: 100

 1620 10:52:03.913695   * Base: 1900, Size: e700, Tag: 100

 1621 10:52:03.917015    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1622 10:52:03.923808  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1623 10:52:03.930010  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1624 10:52:03.939996   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1625 10:52:03.946548   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1626 10:52:03.953085   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1627 10:52:03.963206   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1628 10:52:03.969765   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1629 10:52:03.976730   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1630 10:52:03.983896   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1631 10:52:03.993258   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1632 10:52:04.000105   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1633 10:52:04.006501   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1634 10:52:04.016251   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1635 10:52:04.023248   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1636 10:52:04.030188   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1637 10:52:04.039715   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1638 10:52:04.046285   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1639 10:52:04.052706   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1640 10:52:04.062680   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1641 10:52:04.069449   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1642 10:52:04.076147   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1643 10:52:04.086004   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1644 10:52:04.093339   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1645 10:52:04.099725   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1646 10:52:04.109017   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1647 10:52:04.115786   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1648 10:52:04.122422   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1649 10:52:04.132595   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1650 10:52:04.139567   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1651 10:52:04.146043   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1652 10:52:04.155586   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1653 10:52:04.162595   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1654 10:52:04.165530   DOMAIN: 0000: Resource ranges:

 1655 10:52:04.169137   * Base: 80400000, Size: 3fc00000, Tag: 200

 1656 10:52:04.175425   * Base: d0000000, Size: 28000000, Tag: 200

 1657 10:52:04.178922   * Base: fa000000, Size: 1000000, Tag: 200

 1658 10:52:04.182507   * Base: fb001000, Size: 17ff000, Tag: 200

 1659 10:52:04.185529   * Base: fe800000, Size: 300000, Tag: 200

 1660 10:52:04.191960   * Base: feb80000, Size: 80000, Tag: 200

 1661 10:52:04.196008   * Base: fed00000, Size: 40000, Tag: 200

 1662 10:52:04.198941   * Base: fed70000, Size: 10000, Tag: 200

 1663 10:52:04.202480   * Base: fed88000, Size: 8000, Tag: 200

 1664 10:52:04.208707   * Base: fed93000, Size: d000, Tag: 200

 1665 10:52:04.211647   * Base: feda2000, Size: 1e000, Tag: 200

 1666 10:52:04.215312   * Base: fede0000, Size: 1220000, Tag: 200

 1667 10:52:04.222132   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1668 10:52:04.228829    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1669 10:52:04.235396    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1670 10:52:04.241803    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1671 10:52:04.248445    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1672 10:52:04.254965    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1673 10:52:04.261631    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1674 10:52:04.268264    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1675 10:52:04.275218    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1676 10:52:04.282004    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1677 10:52:04.288460    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1678 10:52:04.294821    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1679 10:52:04.301669    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1680 10:52:04.308042    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1681 10:52:04.315335    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1682 10:52:04.321185    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1683 10:52:04.327965    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1684 10:52:04.334604    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1685 10:52:04.341402    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1686 10:52:04.347873    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1687 10:52:04.354548  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1688 10:52:04.360945  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1689 10:52:04.364508   PCI: 00:06.0: Resource ranges:

 1690 10:52:04.371043   * Base: 80400000, Size: 100000, Tag: 200

 1691 10:52:04.377796    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1692 10:52:04.384334    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1693 10:52:04.390743  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1694 10:52:04.398288  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1695 10:52:04.404272  Root Device assign_resources, bus 0 link: 0

 1696 10:52:04.407574  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1697 10:52:04.414473  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1698 10:52:04.424992  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1699 10:52:04.430920  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1700 10:52:04.440692  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1701 10:52:04.444381  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1702 10:52:04.450635  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1703 10:52:04.457678  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1704 10:52:04.467232  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1705 10:52:04.477665  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1706 10:52:04.480405  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1707 10:52:04.487201  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1708 10:52:04.497404  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1709 10:52:04.500416  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1710 10:52:04.510781  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1711 10:52:04.517417  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1712 10:52:04.520594  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1713 10:52:04.527576  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1714 10:52:04.533822  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1715 10:52:04.540559  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1716 10:52:04.543432  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1717 10:52:04.553573  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1718 10:52:04.560879  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1719 10:52:04.570020  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1720 10:52:04.573414  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1721 10:52:04.576822  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1722 10:52:04.586539  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1723 10:52:04.589938  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1724 10:52:04.597077  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1725 10:52:04.603308  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1726 10:52:04.606678  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1727 10:52:04.613240  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1728 10:52:04.620320  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1729 10:52:04.626654  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1730 10:52:04.630056  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1731 10:52:04.640054  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1732 10:52:04.647019  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1733 10:52:04.649985  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1734 10:52:04.656252  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1735 10:52:04.662866  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1736 10:52:04.669734  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1737 10:52:04.672719  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1738 10:52:04.679356  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1739 10:52:04.682913  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1740 10:52:04.689626  LPC: Trying to open IO window from 800 size 1ff

 1741 10:52:04.696249  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1742 10:52:04.702646  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1743 10:52:04.712413  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1744 10:52:04.715721  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1745 10:52:04.723009  Root Device assign_resources, bus 0 link: 0 done

 1746 10:52:04.723533  Done setting resources.

 1747 10:52:04.729414  Show resources in subtree (Root Device)...After assigning values.

 1748 10:52:04.735701   Root Device child on link 0 CPU_CLUSTER: 0

 1749 10:52:04.739519    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1750 10:52:04.740045     APIC: 00

 1751 10:52:04.742512     APIC: 14

 1752 10:52:04.742929     APIC: 16

 1753 10:52:04.745969     APIC: 10

 1754 10:52:04.746384     APIC: 12

 1755 10:52:04.746717     APIC: 09

 1756 10:52:04.749269     APIC: 08

 1757 10:52:04.749685     APIC: 01

 1758 10:52:04.752284    DOMAIN: 0000 child on link 0 GPIO: 0

 1759 10:52:04.762086    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1760 10:52:04.772100    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1761 10:52:04.772716     GPIO: 0

 1762 10:52:04.775268     PCI: 00:00.0

 1763 10:52:04.785370     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1764 10:52:04.795028     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1765 10:52:04.801754     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1766 10:52:04.811813     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1767 10:52:04.821485     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1768 10:52:04.831527     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1769 10:52:04.841332     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1770 10:52:04.851328     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1771 10:52:04.857866     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1772 10:52:04.867941     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1773 10:52:04.877595     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1774 10:52:04.888466     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1775 10:52:04.897788     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1776 10:52:04.908057     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1777 10:52:04.917777     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1778 10:52:04.924471     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1779 10:52:04.934761     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1780 10:52:04.944680     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1781 10:52:04.955178     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1782 10:52:04.964312     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1783 10:52:04.974196     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1784 10:52:04.984428     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1785 10:52:04.994072     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1786 10:52:05.000537     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1787 10:52:05.014136     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1788 10:52:05.020700     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1789 10:52:05.030294     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1790 10:52:05.040512     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1791 10:52:05.043649     PCI: 00:02.0

 1792 10:52:05.053784     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1793 10:52:05.063622     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1794 10:52:05.073460     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1795 10:52:05.076910     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1796 10:52:05.086884     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1797 10:52:05.090311      GENERIC: 0.0

 1798 10:52:05.093702     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1799 10:52:05.103433     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1800 10:52:05.113300     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1801 10:52:05.126648     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1802 10:52:05.127141      PCI: 01:00.0

 1803 10:52:05.136535      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1804 10:52:05.146411      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1805 10:52:05.150314     PCI: 00:08.0

 1806 10:52:05.150864     PCI: 00:0a.0

 1807 10:52:05.163183     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1808 10:52:05.166345     PCI: 00:0d.0 child on link 0 USB0 port 0

 1809 10:52:05.176336     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1810 10:52:05.179675      USB0 port 0 child on link 0 USB3 port 0

 1811 10:52:05.183036       USB3 port 0

 1812 10:52:05.183618       USB3 port 1

 1813 10:52:05.186126       USB3 port 2

 1814 10:52:05.189151       USB3 port 3

 1815 10:52:05.192916     PCI: 00:14.0 child on link 0 USB0 port 0

 1816 10:52:05.202765     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1817 10:52:05.206256      USB0 port 0 child on link 0 USB2 port 0

 1818 10:52:05.209512       USB2 port 0

 1819 10:52:05.210121       USB2 port 1

 1820 10:52:05.212219       USB2 port 2

 1821 10:52:05.212671       USB2 port 3

 1822 10:52:05.215966       USB2 port 4

 1823 10:52:05.219337       USB2 port 5

 1824 10:52:05.219757       USB2 port 6

 1825 10:52:05.222532       USB2 port 7

 1826 10:52:05.222983       USB2 port 8

 1827 10:52:05.225762       USB2 port 9

 1828 10:52:05.226218       USB3 port 0

 1829 10:52:05.229336       USB3 port 1

 1830 10:52:05.229783       USB3 port 2

 1831 10:52:05.232392       USB3 port 3

 1832 10:52:05.232821     PCI: 00:14.2

 1833 10:52:05.242178     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1834 10:52:05.255693     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1835 10:52:05.258719     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1836 10:52:05.268906     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1837 10:52:05.271835      GENERIC: 0.0

 1838 10:52:05.275246     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1839 10:52:05.285341     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1840 10:52:05.285766      I2C: 00:1a

 1841 10:52:05.289143      I2C: 00:31

 1842 10:52:05.289565      I2C: 00:32

 1843 10:52:05.295339     PCI: 00:15.1 child on link 0 I2C: 00:50

 1844 10:52:05.305288     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1845 10:52:05.305715      I2C: 00:50

 1846 10:52:05.308973     PCI: 00:15.2

 1847 10:52:05.312411     PCI: 00:15.3 child on link 0 I2C: 00:10

 1848 10:52:05.321722     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1849 10:52:05.325347      I2C: 00:10

 1850 10:52:05.325803     PCI: 00:16.0

 1851 10:52:05.335612     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1852 10:52:05.338330     PCI: 00:19.0

 1853 10:52:05.341736     PCI: 00:19.1 child on link 0 I2C: 00:15

 1854 10:52:05.351597     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1855 10:52:05.354955      I2C: 00:15

 1856 10:52:05.355419      I2C: 00:2c

 1857 10:52:05.358593     PCI: 00:1e.0

 1858 10:52:05.368093     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1859 10:52:05.371810     PCI: 00:1e.3 child on link 0 SPI: 00

 1860 10:52:05.381317     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1861 10:52:05.384816      SPI: 00

 1862 10:52:05.388340     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1863 10:52:05.397924     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1864 10:52:05.398353      PNP: 0c09.0

 1865 10:52:05.408366      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1866 10:52:05.411703     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1867 10:52:05.421429     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1868 10:52:05.431689     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1869 10:52:05.434378      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1870 10:52:05.437839       GENERIC: 0.0

 1871 10:52:05.438311       GENERIC: 1.0

 1872 10:52:05.441140     PCI: 00:1f.3

 1873 10:52:05.451241     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1874 10:52:05.460998     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1875 10:52:05.464414     PCI: 00:1f.5

 1876 10:52:05.474128     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1877 10:52:05.477427  Done allocating resources.

 1878 10:52:05.480867  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1879 10:52:05.487772  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1880 10:52:05.494541  Configure audio over I2S with MAX98373 NAU88L25B.

 1881 10:52:05.497768  Enabling BT offload

 1882 10:52:05.504873  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1883 10:52:05.508096  Enabling resources...

 1884 10:52:05.511229  PCI: 00:00.0 subsystem <- 8086/4609

 1885 10:52:05.514353  PCI: 00:00.0 cmd <- 06

 1886 10:52:05.517676  PCI: 00:02.0 subsystem <- 8086/46b3

 1887 10:52:05.521229  PCI: 00:02.0 cmd <- 03

 1888 10:52:05.524252  PCI: 00:04.0 subsystem <- 8086/461d

 1889 10:52:05.524816  PCI: 00:04.0 cmd <- 02

 1890 10:52:05.528055  PCI: 00:06.0 bridge ctrl <- 0013

 1891 10:52:05.531439  PCI: 00:06.0 subsystem <- 8086/464d

 1892 10:52:05.534307  PCI: 00:06.0 cmd <- 106

 1893 10:52:05.537846  PCI: 00:0a.0 subsystem <- 8086/467d

 1894 10:52:05.541134  PCI: 00:0a.0 cmd <- 02

 1895 10:52:05.544177  PCI: 00:0d.0 subsystem <- 8086/461e

 1896 10:52:05.547483  PCI: 00:0d.0 cmd <- 02

 1897 10:52:05.550716  PCI: 00:14.0 subsystem <- 8086/51ed

 1898 10:52:05.554391  PCI: 00:14.0 cmd <- 02

 1899 10:52:05.557360  PCI: 00:14.2 subsystem <- 8086/51ef

 1900 10:52:05.557808  PCI: 00:14.2 cmd <- 02

 1901 10:52:05.564106  PCI: 00:14.3 subsystem <- 8086/51f0

 1902 10:52:05.564555  PCI: 00:14.3 cmd <- 02

 1903 10:52:05.567196  PCI: 00:15.0 subsystem <- 8086/51e8

 1904 10:52:05.570912  PCI: 00:15.0 cmd <- 02

 1905 10:52:05.573876  PCI: 00:15.1 subsystem <- 8086/51e9

 1906 10:52:05.577186  PCI: 00:15.1 cmd <- 06

 1907 10:52:05.580508  PCI: 00:15.3 subsystem <- 8086/51eb

 1908 10:52:05.584036  PCI: 00:15.3 cmd <- 02

 1909 10:52:05.587405  PCI: 00:16.0 subsystem <- 8086/51e0

 1910 10:52:05.590607  PCI: 00:16.0 cmd <- 02

 1911 10:52:05.593931  PCI: 00:19.1 subsystem <- 8086/51c6

 1912 10:52:05.594361  PCI: 00:19.1 cmd <- 02

 1913 10:52:05.597275  PCI: 00:1e.0 subsystem <- 8086/51a8

 1914 10:52:05.600597  PCI: 00:1e.0 cmd <- 06

 1915 10:52:05.603798  PCI: 00:1e.3 subsystem <- 8086/51ab

 1916 10:52:05.607308  PCI: 00:1e.3 cmd <- 02

 1917 10:52:05.610608  PCI: 00:1f.0 subsystem <- 8086/5182

 1918 10:52:05.613810  PCI: 00:1f.0 cmd <- 407

 1919 10:52:05.617166  PCI: 00:1f.3 subsystem <- 8086/51c8

 1920 10:52:05.620108  PCI: 00:1f.3 cmd <- 02

 1921 10:52:05.623879  PCI: 00:1f.5 subsystem <- 8086/51a4

 1922 10:52:05.624308  PCI: 00:1f.5 cmd <- 406

 1923 10:52:05.626610  PCI: 01:00.0 cmd <- 02

 1924 10:52:05.627082  done.

 1925 10:52:05.633564  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1926 10:52:05.636650  ME: Version: Unavailable

 1927 10:52:05.643287  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1928 10:52:05.643976  Initializing devices...

 1929 10:52:05.646963  Root Device init

 1930 10:52:05.647434  mainboard: EC init

 1931 10:52:05.653092  Chrome EC: Set SMI mask to 0x0000000000000000

 1932 10:52:05.656904  Chrome EC: UHEPI supported

 1933 10:52:05.663300  Chrome EC: clear events_b mask to 0x0000000000000000

 1934 10:52:05.669721  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1935 10:52:05.673026  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1936 10:52:05.679563  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1937 10:52:05.686799  Chrome EC: Set WAKE mask to 0x0000000000000000

 1938 10:52:05.689515  Root Device init finished in 39 msecs

 1939 10:52:05.693027  PCI: 00:00.0 init

 1940 10:52:05.693604  CPU TDP = 15 Watts

 1941 10:52:05.696411  CPU PL1 = 15 Watts

 1942 10:52:05.699372  CPU PL2 = 55 Watts

 1943 10:52:05.699841  CPU PL4 = 123 Watts

 1944 10:52:05.702913  PCI: 00:00.0 init finished in 8 msecs

 1945 10:52:05.705999  PCI: 00:02.0 init

 1946 10:52:05.709631  GMA: Found VBT in CBFS

 1947 10:52:05.712816  GMA: Found valid VBT in CBFS

 1948 10:52:05.716032  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1949 10:52:05.725787                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1950 10:52:05.729272  PCI: 00:02.0 init finished in 18 msecs

 1951 10:52:05.729771  PCI: 00:06.0 init

 1952 10:52:05.732622  Initializing PCH PCIe bridge.

 1953 10:52:05.736068  PCI: 00:06.0 init finished in 3 msecs

 1954 10:52:05.739247  PCI: 00:0a.0 init

 1955 10:52:05.742861  PCI: 00:0a.0 init finished in 0 msecs

 1956 10:52:05.745648  PCI: 00:14.0 init

 1957 10:52:05.749286  PCI: 00:14.0 init finished in 0 msecs

 1958 10:52:05.749746  PCI: 00:14.2 init

 1959 10:52:05.755843  PCI: 00:14.2 init finished in 0 msecs

 1960 10:52:05.756429  PCI: 00:15.0 init

 1961 10:52:05.759069  I2C bus 0 version 0x3230302a

 1962 10:52:05.762532  DW I2C bus 0 at 0x80655000 (400 KHz)

 1963 10:52:05.765478  PCI: 00:15.0 init finished in 6 msecs

 1964 10:52:05.769249  PCI: 00:15.1 init

 1965 10:52:05.772642  I2C bus 1 version 0x3230302a

 1966 10:52:05.775676  DW I2C bus 1 at 0x80656000 (400 KHz)

 1967 10:52:05.779156  PCI: 00:15.1 init finished in 6 msecs

 1968 10:52:05.781948  PCI: 00:15.3 init

 1969 10:52:05.782372  I2C bus 3 version 0x3230302a

 1970 10:52:05.788835  DW I2C bus 3 at 0x80657000 (400 KHz)

 1971 10:52:05.792294  PCI: 00:15.3 init finished in 6 msecs

 1972 10:52:05.792757  PCI: 00:16.0 init

 1973 10:52:05.795198  PCI: 00:16.0 init finished in 0 msecs

 1974 10:52:05.798708  PCI: 00:19.1 init

 1975 10:52:05.802273  I2C bus 5 version 0x3230302a

 1976 10:52:05.805519  DW I2C bus 5 at 0x80659000 (400 KHz)

 1977 10:52:05.808689  PCI: 00:19.1 init finished in 6 msecs

 1978 10:52:05.812046  PCI: 00:1f.0 init

 1979 10:52:05.815182  IOAPIC: Initializing IOAPIC at 0xfec00000

 1980 10:52:05.818974  IOAPIC: ID = 0x02

 1981 10:52:05.819411  IOAPIC: Dumping registers

 1982 10:52:05.821719    reg 0x0000: 0x02000000

 1983 10:52:05.824964    reg 0x0001: 0x00770020

 1984 10:52:05.828477    reg 0x0002: 0x00000000

 1985 10:52:05.828928  IOAPIC: 120 interrupts

 1986 10:52:05.835227  IOAPIC: Clearing IOAPIC at 0xfec00000

 1987 10:52:05.838091  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1988 10:52:05.845147  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1989 10:52:05.848154  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1990 10:52:05.851686  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1991 10:52:05.858416  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1992 10:52:05.861799  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1993 10:52:05.868742  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1994 10:52:05.871948  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1995 10:52:05.878465  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1996 10:52:05.882036  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1997 10:52:05.885513  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1998 10:52:05.891699  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1999 10:52:05.895162  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2000 10:52:05.901631  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2001 10:52:05.904821  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2002 10:52:05.911580  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2003 10:52:05.914915  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2004 10:52:05.921409  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2005 10:52:05.924640  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2006 10:52:05.931545  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2007 10:52:05.934761  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2008 10:52:05.938468  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2009 10:52:05.944972  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2010 10:52:05.948156  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2011 10:52:05.954842  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2012 10:52:05.957943  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2013 10:52:05.964361  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2014 10:52:05.967984  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2015 10:52:05.974355  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2016 10:52:05.977948  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2017 10:52:05.981035  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2018 10:52:05.987865  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2019 10:52:05.990948  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2020 10:52:05.997663  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2021 10:52:06.001319  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2022 10:52:06.007933  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2023 10:52:06.011019  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2024 10:52:06.017481  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2025 10:52:06.021421  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2026 10:52:06.024191  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2027 10:52:06.031412  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2028 10:52:06.034192  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2029 10:52:06.040971  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2030 10:52:06.044276  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2031 10:52:06.050895  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2032 10:52:06.054561  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2033 10:52:06.060656  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2034 10:52:06.064020  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2035 10:52:06.067395  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2036 10:52:06.073769  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2037 10:52:06.077207  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2038 10:52:06.084094  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2039 10:52:06.087050  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2040 10:52:06.094046  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2041 10:52:06.097346  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2042 10:52:06.103895  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2043 10:52:06.107828  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2044 10:52:06.110531  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2045 10:52:06.116792  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2046 10:52:06.120222  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2047 10:52:06.126924  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2048 10:52:06.130221  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2049 10:52:06.137188  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2050 10:52:06.140444  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2051 10:52:06.147119  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2052 10:52:06.150468  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2053 10:52:06.153562  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2054 10:52:06.160572  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2055 10:52:06.163718  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2056 10:52:06.170516  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2057 10:52:06.173581  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2058 10:52:06.180145  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2059 10:52:06.183309  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2060 10:52:06.190813  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2061 10:52:06.193565  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2062 10:52:06.196726  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2063 10:52:06.203785  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2064 10:52:06.206852  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2065 10:52:06.213861  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2066 10:52:06.216585  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2067 10:52:06.223569  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2068 10:52:06.227007  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2069 10:52:06.230070  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2070 10:52:06.237132  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2071 10:52:06.239936  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2072 10:52:06.246463  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2073 10:52:06.249824  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2074 10:52:06.257356  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2075 10:52:06.259759  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2076 10:52:06.266223  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2077 10:52:06.269738  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2078 10:52:06.276506  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2079 10:52:06.279422  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2080 10:52:06.282924  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2081 10:52:06.289638  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2082 10:52:06.292837  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2083 10:52:06.299293  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2084 10:52:06.302717  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2085 10:52:06.309177  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2086 10:52:06.312728  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2087 10:52:06.318839  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2088 10:52:06.322044  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2089 10:52:06.329070  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2090 10:52:06.332388  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2091 10:52:06.335779  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2092 10:52:06.342366  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2093 10:52:06.345811  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2094 10:52:06.352284  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2095 10:52:06.355417  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2096 10:52:06.362197  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2097 10:52:06.365593  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2098 10:52:06.371857  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2099 10:52:06.375554  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2100 10:52:06.378599  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2101 10:52:06.385311  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2102 10:52:06.388792  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2103 10:52:06.395239  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2104 10:52:06.399022  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2105 10:52:06.405391  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2106 10:52:06.408632  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2107 10:52:06.412091  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2108 10:52:06.418522  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2109 10:52:06.421548  PCI: 00:1f.0 init finished in 607 msecs

 2110 10:52:06.425244  PCI: 00:1f.2 init

 2111 10:52:06.428983  apm_control: Disabling ACPI.

 2112 10:52:06.431887  APMC done.

 2113 10:52:06.434909  PCI: 00:1f.2 init finished in 6 msecs

 2114 10:52:06.435378  PCI: 00:1f.3 init

 2115 10:52:06.441774  PCI: 00:1f.3 init finished in 0 msecs

 2116 10:52:06.442280  PCI: 01:00.0 init

 2117 10:52:06.444883  PCI: 01:00.0 init finished in 0 msecs

 2118 10:52:06.448745  PNP: 0c09.0 init

 2119 10:52:06.451543  Google Chrome EC uptime: 12.137 seconds

 2120 10:52:06.457952  Google Chrome AP resets since EC boot: 1

 2121 10:52:06.461325  Google Chrome most recent AP reset causes:

 2122 10:52:06.465235  	0.341: 32775 shutdown: entering G3

 2123 10:52:06.471223  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2124 10:52:06.474547  PNP: 0c09.0 init finished in 23 msecs

 2125 10:52:06.477846  GENERIC: 0.0 init

 2126 10:52:06.481633  GENERIC: 0.0 init finished in 0 msecs

 2127 10:52:06.482190  GENERIC: 1.0 init

 2128 10:52:06.484941  GENERIC: 1.0 init finished in 0 msecs

 2129 10:52:06.487929  Devices initialized

 2130 10:52:06.491512  Show all devs... After init.

 2131 10:52:06.494527  Root Device: enabled 1

 2132 10:52:06.495025  CPU_CLUSTER: 0: enabled 1

 2133 10:52:06.497820  DOMAIN: 0000: enabled 1

 2134 10:52:06.501286  GPIO: 0: enabled 1

 2135 10:52:06.504916  PCI: 00:00.0: enabled 1

 2136 10:52:06.505492  PCI: 00:01.0: enabled 0

 2137 10:52:06.507788  PCI: 00:01.1: enabled 0

 2138 10:52:06.511015  PCI: 00:02.0: enabled 1

 2139 10:52:06.511500  PCI: 00:04.0: enabled 1

 2140 10:52:06.514475  PCI: 00:05.0: enabled 0

 2141 10:52:06.518213  PCI: 00:06.0: enabled 1

 2142 10:52:06.521288  PCI: 00:06.2: enabled 0

 2143 10:52:06.521770  PCI: 00:07.0: enabled 0

 2144 10:52:06.524723  PCI: 00:07.1: enabled 0

 2145 10:52:06.528032  PCI: 00:07.2: enabled 0

 2146 10:52:06.530953  PCI: 00:07.3: enabled 0

 2147 10:52:06.531388  PCI: 00:08.0: enabled 0

 2148 10:52:06.534508  PCI: 00:09.0: enabled 0

 2149 10:52:06.537673  PCI: 00:0a.0: enabled 1

 2150 10:52:06.541047  PCI: 00:0d.0: enabled 1

 2151 10:52:06.541572  PCI: 00:0d.1: enabled 0

 2152 10:52:06.544279  PCI: 00:0d.2: enabled 0

 2153 10:52:06.547707  PCI: 00:0d.3: enabled 0

 2154 10:52:06.551530  PCI: 00:0e.0: enabled 0

 2155 10:52:06.552060  PCI: 00:10.0: enabled 0

 2156 10:52:06.554489  PCI: 00:10.1: enabled 0

 2157 10:52:06.557751  PCI: 00:10.6: enabled 0

 2158 10:52:06.558319  PCI: 00:10.7: enabled 0

 2159 10:52:06.560844  PCI: 00:12.0: enabled 0

 2160 10:52:06.564346  PCI: 00:12.6: enabled 0

 2161 10:52:06.567725  PCI: 00:12.7: enabled 0

 2162 10:52:06.568259  PCI: 00:13.0: enabled 0

 2163 10:52:06.570863  PCI: 00:14.0: enabled 1

 2164 10:52:06.574232  PCI: 00:14.1: enabled 0

 2165 10:52:06.577967  PCI: 00:14.2: enabled 1

 2166 10:52:06.578504  PCI: 00:14.3: enabled 1

 2167 10:52:06.580602  PCI: 00:15.0: enabled 1

 2168 10:52:06.584004  PCI: 00:15.1: enabled 1

 2169 10:52:06.587434  PCI: 00:15.2: enabled 0

 2170 10:52:06.587999  PCI: 00:15.3: enabled 1

 2171 10:52:06.590616  PCI: 00:16.0: enabled 1

 2172 10:52:06.593872  PCI: 00:16.1: enabled 0

 2173 10:52:06.597576  PCI: 00:16.2: enabled 0

 2174 10:52:06.598093  PCI: 00:16.3: enabled 0

 2175 10:52:06.601036  PCI: 00:16.4: enabled 0

 2176 10:52:06.603988  PCI: 00:16.5: enabled 0

 2177 10:52:06.607516  PCI: 00:17.0: enabled 0

 2178 10:52:06.607982  PCI: 00:19.0: enabled 0

 2179 10:52:06.611067  PCI: 00:19.1: enabled 1

 2180 10:52:06.614202  PCI: 00:19.2: enabled 0

 2181 10:52:06.614774  PCI: 00:1a.0: enabled 0

 2182 10:52:06.617303  PCI: 00:1c.0: enabled 0

 2183 10:52:06.620599  PCI: 00:1c.1: enabled 0

 2184 10:52:06.624252  PCI: 00:1c.2: enabled 0

 2185 10:52:06.624725  PCI: 00:1c.3: enabled 0

 2186 10:52:06.626970  PCI: 00:1c.4: enabled 0

 2187 10:52:06.630389  PCI: 00:1c.5: enabled 0

 2188 10:52:06.633635  PCI: 00:1c.6: enabled 0

 2189 10:52:06.634179  PCI: 00:1c.7: enabled 0

 2190 10:52:06.636902  PCI: 00:1d.0: enabled 0

 2191 10:52:06.640524  PCI: 00:1d.1: enabled 0

 2192 10:52:06.644016  PCI: 00:1d.2: enabled 0

 2193 10:52:06.644487  PCI: 00:1d.3: enabled 0

 2194 10:52:06.646861  PCI: 00:1e.0: enabled 1

 2195 10:52:06.650468  PCI: 00:1e.1: enabled 0

 2196 10:52:06.653534  PCI: 00:1e.2: enabled 0

 2197 10:52:06.653988  PCI: 00:1e.3: enabled 1

 2198 10:52:06.656884  PCI: 00:1f.0: enabled 1

 2199 10:52:06.660517  PCI: 00:1f.1: enabled 0

 2200 10:52:06.661002  PCI: 00:1f.2: enabled 1

 2201 10:52:06.663598  PCI: 00:1f.3: enabled 1

 2202 10:52:06.666966  PCI: 00:1f.4: enabled 0

 2203 10:52:06.670373  PCI: 00:1f.5: enabled 1

 2204 10:52:06.670844  PCI: 00:1f.6: enabled 0

 2205 10:52:06.673436  PCI: 00:1f.7: enabled 0

 2206 10:52:06.677143  GENERIC: 0.0: enabled 1

 2207 10:52:06.680429  GENERIC: 0.0: enabled 1

 2208 10:52:06.680934  GENERIC: 1.0: enabled 1

 2209 10:52:06.683662  GENERIC: 0.0: enabled 1

 2210 10:52:06.686803  GENERIC: 1.0: enabled 1

 2211 10:52:06.687229  USB0 port 0: enabled 1

 2212 10:52:06.690476  USB0 port 0: enabled 1

 2213 10:52:06.693765  GENERIC: 0.0: enabled 1

 2214 10:52:06.696850  I2C: 00:1a: enabled 1

 2215 10:52:06.697319  I2C: 00:31: enabled 1

 2216 10:52:06.700290  I2C: 00:32: enabled 1

 2217 10:52:06.704092  I2C: 00:50: enabled 1

 2218 10:52:06.704625  I2C: 00:10: enabled 1

 2219 10:52:06.706772  I2C: 00:15: enabled 1

 2220 10:52:06.709967  I2C: 00:2c: enabled 1

 2221 10:52:06.710499  GENERIC: 0.0: enabled 1

 2222 10:52:06.713329  SPI: 00: enabled 1

 2223 10:52:06.716789  PNP: 0c09.0: enabled 1

 2224 10:52:06.720245  GENERIC: 0.0: enabled 1

 2225 10:52:06.720866  USB3 port 0: enabled 1

 2226 10:52:06.723495  USB3 port 1: enabled 0

 2227 10:52:06.726798  USB3 port 2: enabled 1

 2228 10:52:06.727321  USB3 port 3: enabled 0

 2229 10:52:06.730087  USB2 port 0: enabled 1

 2230 10:52:06.733315  USB2 port 1: enabled 0

 2231 10:52:06.733826  USB2 port 2: enabled 1

 2232 10:52:06.736438  USB2 port 3: enabled 0

 2233 10:52:06.739682  USB2 port 4: enabled 0

 2234 10:52:06.742965  USB2 port 5: enabled 1

 2235 10:52:06.743436  USB2 port 6: enabled 0

 2236 10:52:06.746170  USB2 port 7: enabled 0

 2237 10:52:06.749843  USB2 port 8: enabled 1

 2238 10:52:06.750346  USB2 port 9: enabled 1

 2239 10:52:06.752681  USB3 port 0: enabled 1

 2240 10:52:06.756254  USB3 port 1: enabled 0

 2241 10:52:06.759764  USB3 port 2: enabled 0

 2242 10:52:06.760193  USB3 port 3: enabled 0

 2243 10:52:06.763095  GENERIC: 0.0: enabled 1

 2244 10:52:06.765907  GENERIC: 1.0: enabled 1

 2245 10:52:06.766353  APIC: 00: enabled 1

 2246 10:52:06.769402  APIC: 14: enabled 1

 2247 10:52:06.772611  APIC: 16: enabled 1

 2248 10:52:06.773121  APIC: 10: enabled 1

 2249 10:52:06.776189  APIC: 12: enabled 1

 2250 10:52:06.779712  APIC: 09: enabled 1

 2251 10:52:06.780218  APIC: 08: enabled 1

 2252 10:52:06.782618  APIC: 01: enabled 1

 2253 10:52:06.783126  PCI: 01:00.0: enabled 1

 2254 10:52:06.789450  BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms

 2255 10:52:06.795928  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2256 10:52:06.799291  ELOG: NV offset 0xf20000 size 0x4000

 2257 10:52:06.806057  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2258 10:52:06.812344  ELOG: Event(17) added with size 13 at 2023-11-24 10:52:06 UTC

 2259 10:52:06.818753  ELOG: Event(9E) added with size 10 at 2023-11-24 10:52:06 UTC

 2260 10:52:06.825563  ELOG: Event(9F) added with size 14 at 2023-11-24 10:52:06 UTC

 2261 10:52:06.832246  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2262 10:52:06.838701  ELOG: Event(A0) added with size 9 at 2023-11-24 10:52:06 UTC

 2263 10:52:06.842534  elog_add_boot_reason: Logged dev mode boot

 2264 10:52:06.848872  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2265 10:52:06.849304  Finalize devices...

 2266 10:52:06.852164  PCI: 00:16.0 final

 2267 10:52:06.855513  PCI: 00:1f.2 final

 2268 10:52:06.855939  GENERIC: 0.0 final

 2269 10:52:06.861938  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2270 10:52:06.865701  GENERIC: 1.0 final

 2271 10:52:06.869064  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2272 10:52:06.872544  Devices finalized

 2273 10:52:06.878635  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2274 10:52:06.882220  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2275 10:52:06.888667  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2276 10:52:06.891931  ME: HFSTS1                      : 0x90000245

 2277 10:52:06.898467  ME: HFSTS2                      : 0x82100116

 2278 10:52:06.901804  ME: HFSTS3                      : 0x00000050

 2279 10:52:06.908379  ME: HFSTS4                      : 0x00004000

 2280 10:52:06.912265  ME: HFSTS5                      : 0x00000000

 2281 10:52:06.915251  ME: HFSTS6                      : 0x40600006

 2282 10:52:06.918628  ME: Manufacturing Mode          : NO

 2283 10:52:06.921864  ME: SPI Protection Mode Enabled : YES

 2284 10:52:06.928838  ME: FPFs Committed              : YES

 2285 10:52:06.931598  ME: Manufacturing Vars Locked   : YES

 2286 10:52:06.935337  ME: FW Partition Table          : OK

 2287 10:52:06.938397  ME: Bringup Loader Failure      : NO

 2288 10:52:06.941635  ME: Firmware Init Complete      : YES

 2289 10:52:06.945059  ME: Boot Options Present        : NO

 2290 10:52:06.948466  ME: Update In Progress          : NO

 2291 10:52:06.954843  ME: D0i3 Support                : YES

 2292 10:52:06.958617  ME: Low Power State Enabled     : NO

 2293 10:52:06.961341  ME: CPU Replaced                : YES

 2294 10:52:06.964841  ME: CPU Replacement Valid       : YES

 2295 10:52:06.968612  ME: Current Working State       : 5

 2296 10:52:06.971529  ME: Current Operation State     : 1

 2297 10:52:06.975606  ME: Current Operation Mode      : 0

 2298 10:52:06.978416  ME: Error Code                  : 0

 2299 10:52:06.981725  ME: Enhanced Debug Mode         : NO

 2300 10:52:06.988221  ME: CPU Debug Disabled          : YES

 2301 10:52:06.991363  ME: TXT Support                 : NO

 2302 10:52:06.994579  ME: WP for RO is enabled        : YES

 2303 10:52:07.001209  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2304 10:52:07.007699  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2305 10:52:07.011339  Ramoops buffer: 0x100000@0x76899000.

 2306 10:52:07.014628  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2307 10:52:07.024946  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2308 10:52:07.027940  CBFS: 'fallback/slic' not found.

 2309 10:52:07.031506  ACPI: Writing ACPI tables at 7686d000.

 2310 10:52:07.032112  ACPI:    * FACS

 2311 10:52:07.034161  ACPI:    * DSDT

 2312 10:52:07.041139  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2313 10:52:07.044200  ACPI:    * FADT

 2314 10:52:07.044631  SCI is IRQ9

 2315 10:52:07.047711  ACPI: added table 1/32, length now 40

 2316 10:52:07.051044  ACPI:     * SSDT

 2317 10:52:07.057184  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2318 10:52:07.060574  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2319 10:52:07.067946  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2320 10:52:07.070616  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2321 10:52:07.077620  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2322 10:52:07.080342  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2323 10:52:07.087973  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2324 10:52:07.093783  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2325 10:52:07.097142  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2326 10:52:07.103821  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2327 10:52:07.107107  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2328 10:52:07.113521  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2329 10:52:07.116891  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2330 10:52:07.123658  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2331 10:52:07.130262  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2332 10:52:07.133662  PS2K: Passing 80 keymaps to kernel

 2333 10:52:07.140435  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2334 10:52:07.147153  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2335 10:52:07.153105  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2336 10:52:07.159868  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2337 10:52:07.163396  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2338 10:52:07.170079  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2339 10:52:07.176877  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2340 10:52:07.183231  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2341 10:52:07.190087  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2342 10:52:07.196254  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2343 10:52:07.199961  ACPI: added table 2/32, length now 44

 2344 10:52:07.203436  ACPI:    * MCFG

 2345 10:52:07.206327  ACPI: added table 3/32, length now 48

 2346 10:52:07.206749  ACPI:    * TPM2

 2347 10:52:07.210108  TPM2 log created at 0x7685d000

 2348 10:52:07.212963  ACPI: added table 4/32, length now 52

 2349 10:52:07.216617  ACPI:     * LPIT

 2350 10:52:07.219990  ACPI: added table 5/32, length now 56

 2351 10:52:07.223021  ACPI:    * MADT

 2352 10:52:07.223439  SCI is IRQ9

 2353 10:52:07.226594  ACPI: added table 6/32, length now 60

 2354 10:52:07.229802  cmd_reg from pmc_make_ipc_cmd 1052838

 2355 10:52:07.236542  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2356 10:52:07.243105  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2357 10:52:07.249639  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2358 10:52:07.252926  PMC CrashLog size in discovery mode: 0xC00

 2359 10:52:07.256142  cpu crashlog bar addr: 0x80640000

 2360 10:52:07.259456  cpu discovery table offset: 0x6030

 2361 10:52:07.265921  cpu_crashlog_discovery_table buffer count: 0x3

 2362 10:52:07.272617  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2363 10:52:07.279217  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2364 10:52:07.285812  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2365 10:52:07.289352  PMC crashLog size in discovery mode : 0xC00

 2366 10:52:07.295752  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2367 10:52:07.299108  discover mode PMC crashlog size adjusted to: 0x200

 2368 10:52:07.308846  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2369 10:52:07.312231  discover mode PMC crashlog size adjusted to: 0x0

 2370 10:52:07.315776  m_cpu_crashLog_size : 0x3480 bytes

 2371 10:52:07.318711  CPU crashLog present.

 2372 10:52:07.322199  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2373 10:52:07.328825  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2374 10:52:07.332090  current = 76876550

 2375 10:52:07.335459  ACPI:    * DMAR

 2376 10:52:07.339063  ACPI: added table 7/32, length now 64

 2377 10:52:07.341993  ACPI: added table 8/32, length now 68

 2378 10:52:07.342432  ACPI:    * HPET

 2379 10:52:07.345377  ACPI: added table 9/32, length now 72

 2380 10:52:07.348563  ACPI: done.

 2381 10:52:07.352445  ACPI tables: 38528 bytes.

 2382 10:52:07.355593  smbios_write_tables: 76857000

 2383 10:52:07.358922  EC returned error result code 3

 2384 10:52:07.362426  Couldn't obtain OEM name from CBI

 2385 10:52:07.365349  Create SMBIOS type 16

 2386 10:52:07.368921  Create SMBIOS type 17

 2387 10:52:07.369416  Create SMBIOS type 20

 2388 10:52:07.372305  GENERIC: 0.0 (WIFI Device)

 2389 10:52:07.375807  SMBIOS tables: 2156 bytes.

 2390 10:52:07.378469  Writing table forward entry at 0x00000500

 2391 10:52:07.385128  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2392 10:52:07.388690  Writing coreboot table at 0x76891000

 2393 10:52:07.395339   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2394 10:52:07.398830   1. 0000000000001000-000000000009ffff: RAM

 2395 10:52:07.405474   2. 00000000000a0000-00000000000fffff: RESERVED

 2396 10:52:07.408422   3. 0000000000100000-0000000076856fff: RAM

 2397 10:52:07.415029   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2398 10:52:07.418540   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2399 10:52:07.424995   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2400 10:52:07.431886   7. 0000000077000000-00000000803fffff: RESERVED

 2401 10:52:07.434932   8. 00000000c0000000-00000000cfffffff: RESERVED

 2402 10:52:07.442047   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2403 10:52:07.445275  10. 00000000fb000000-00000000fb000fff: RESERVED

 2404 10:52:07.448386  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2405 10:52:07.455117  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2406 10:52:07.458463  13. 00000000fec00000-00000000fecfffff: RESERVED

 2407 10:52:07.464769  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2408 10:52:07.468052  15. 00000000fed80000-00000000fed87fff: RESERVED

 2409 10:52:07.475029  16. 00000000fed90000-00000000fed92fff: RESERVED

 2410 10:52:07.478110  17. 00000000feda0000-00000000feda1fff: RESERVED

 2411 10:52:07.481488  18. 00000000fedc0000-00000000feddffff: RESERVED

 2412 10:52:07.487909  19. 0000000100000000-000000027fbfffff: RAM

 2413 10:52:07.491432  Passing 4 GPIOs to payload:

 2414 10:52:07.494416              NAME |       PORT | POLARITY |     VALUE

 2415 10:52:07.501339               lid |  undefined |     high |      high

 2416 10:52:07.504562             power |  undefined |     high |       low

 2417 10:52:07.511207             oprom |  undefined |     high |       low

 2418 10:52:07.517932          EC in RW | 0x00000151 |     high |      high

 2419 10:52:07.518446  Board ID: 3

 2420 10:52:07.521275  FW config: 0x131

 2421 10:52:07.524541  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 48ff

 2422 10:52:07.527986  coreboot table: 1788 bytes.

 2423 10:52:07.530981  IMD ROOT    0. 0x76fff000 0x00001000

 2424 10:52:07.537769  IMD SMALL   1. 0x76ffe000 0x00001000

 2425 10:52:07.541223  FSP MEMORY  2. 0x76afe000 0x00500000

 2426 10:52:07.544901  CONSOLE     3. 0x76ade000 0x00020000

 2427 10:52:07.547449  RW MCACHE   4. 0x76add000 0x0000043c

 2428 10:52:07.551344  RO MCACHE   5. 0x76adc000 0x00000fd8

 2429 10:52:07.554339  FMAP        6. 0x76adb000 0x0000064a

 2430 10:52:07.557631  TIME STAMP  7. 0x76ada000 0x00000910

 2431 10:52:07.560978  VBOOT WORK  8. 0x76ac6000 0x00014000

 2432 10:52:07.567725  MEM INFO    9. 0x76ac5000 0x000003b8

 2433 10:52:07.570810  ROMSTG STCK10. 0x76ac4000 0x00001000

 2434 10:52:07.574492  AFTER CAR  11. 0x76ab8000 0x0000c000

 2435 10:52:07.577724  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2436 10:52:07.580955  ACPI BERT  13. 0x76a1e000 0x00010000

 2437 10:52:07.584165  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2438 10:52:07.587431  REFCODE    15. 0x769ae000 0x0006f000

 2439 10:52:07.593821  SMM BACKUP 16. 0x7699e000 0x00010000

 2440 10:52:07.597088  IGD OPREGION17. 0x76999000 0x00004203

 2441 10:52:07.600496  RAMOOPS    18. 0x76899000 0x00100000

 2442 10:52:07.604019  COREBOOT   19. 0x76891000 0x00008000

 2443 10:52:07.606983  ACPI       20. 0x7686d000 0x00024000

 2444 10:52:07.610311  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2445 10:52:07.613988  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2446 10:52:07.620058  CPU CRASHLOG23. 0x76858000 0x00003480

 2447 10:52:07.623649  SMBIOS     24. 0x76857000 0x00001000

 2448 10:52:07.624069  IMD small region:

 2449 10:52:07.626863    IMD ROOT    0. 0x76ffec00 0x00000400

 2450 10:52:07.633669    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2451 10:52:07.636962    VPD         2. 0x76ffeb60 0x0000006c

 2452 10:52:07.640708    POWER STATE 3. 0x76ffeb00 0x00000044

 2453 10:52:07.643661    ROMSTAGE    4. 0x76ffeae0 0x00000004

 2454 10:52:07.646611    ACPI GNVS   5. 0x76ffea80 0x00000048

 2455 10:52:07.653458    TYPE_C INFO 6. 0x76ffea60 0x0000000c

 2456 10:52:07.656468  BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms

 2457 10:52:07.660493  MTRR: Physical address space:

 2458 10:52:07.666597  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2459 10:52:07.673947  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2460 10:52:07.680274  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2461 10:52:07.686594  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2462 10:52:07.693304  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2463 10:52:07.700254  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2464 10:52:07.703099  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2465 10:52:07.709804  MTRR: Fixed MSR 0x250 0x0606060606060606

 2466 10:52:07.713056  MTRR: Fixed MSR 0x258 0x0606060606060606

 2467 10:52:07.716580  MTRR: Fixed MSR 0x259 0x0000000000000000

 2468 10:52:07.720040  MTRR: Fixed MSR 0x268 0x0606060606060606

 2469 10:52:07.726328  MTRR: Fixed MSR 0x269 0x0606060606060606

 2470 10:52:07.729518  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2471 10:52:07.733090  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2472 10:52:07.736545  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2473 10:52:07.743027  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2474 10:52:07.746483  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2475 10:52:07.749649  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2476 10:52:07.752856  call enable_fixed_mtrr()

 2477 10:52:07.756197  CPU physical address size: 39 bits

 2478 10:52:07.762620  MTRR: default type WB/UC MTRR counts: 6/6.

 2479 10:52:07.766318  MTRR: UC selected as default type.

 2480 10:52:07.773564  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2481 10:52:07.776637  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2482 10:52:07.782553  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2483 10:52:07.789356  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2484 10:52:07.795772  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2485 10:52:07.802492  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2486 10:52:07.809277  MTRR: Fixed MSR 0x250 0x0606060606060606

 2487 10:52:07.812709  MTRR: Fixed MSR 0x258 0x0606060606060606

 2488 10:52:07.816117  MTRR: Fixed MSR 0x259 0x0000000000000000

 2489 10:52:07.818944  MTRR: Fixed MSR 0x268 0x0606060606060606

 2490 10:52:07.825725  MTRR: Fixed MSR 0x269 0x0606060606060606

 2491 10:52:07.829055  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2492 10:52:07.832462  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2493 10:52:07.835889  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2494 10:52:07.842553  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2495 10:52:07.845775  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2496 10:52:07.848815  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2497 10:52:07.852247  MTRR: Fixed MSR 0x250 0x0606060606060606

 2498 10:52:07.855816  MTRR: Fixed MSR 0x250 0x0606060606060606

 2499 10:52:07.862032  MTRR: Fixed MSR 0x258 0x0606060606060606

 2500 10:52:07.865480  MTRR: Fixed MSR 0x259 0x0000000000000000

 2501 10:52:07.869067  MTRR: Fixed MSR 0x268 0x0606060606060606

 2502 10:52:07.871925  MTRR: Fixed MSR 0x269 0x0606060606060606

 2503 10:52:07.878549  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2504 10:52:07.881974  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2505 10:52:07.885336  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2506 10:52:07.888777  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2507 10:52:07.895341  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2508 10:52:07.898746  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2509 10:52:07.901940  MTRR: Fixed MSR 0x250 0x0606060606060606

 2510 10:52:07.905265  call enable_fixed_mtrr()

 2511 10:52:07.908327  MTRR: Fixed MSR 0x250 0x0606060606060606

 2512 10:52:07.911690  MTRR: Fixed MSR 0x258 0x0606060606060606

 2513 10:52:07.918483  MTRR: Fixed MSR 0x259 0x0000000000000000

 2514 10:52:07.921960  MTRR: Fixed MSR 0x268 0x0606060606060606

 2515 10:52:07.925116  MTRR: Fixed MSR 0x269 0x0606060606060606

 2516 10:52:07.928551  CPU physical address size: 39 bits

 2517 10:52:07.931543  MTRR: Fixed MSR 0x258 0x0606060606060606

 2518 10:52:07.938321  MTRR: Fixed MSR 0x250 0x0606060606060606

 2519 10:52:07.941798  MTRR: Fixed MSR 0x250 0x0606060606060606

 2520 10:52:07.945315  MTRR: Fixed MSR 0x259 0x0000000000000000

 2521 10:52:07.948495  MTRR: Fixed MSR 0x268 0x0606060606060606

 2522 10:52:07.951674  MTRR: Fixed MSR 0x269 0x0606060606060606

 2523 10:52:07.958569  MTRR: Fixed MSR 0x258 0x0606060606060606

 2524 10:52:07.961709  MTRR: Fixed MSR 0x259 0x0000000000000000

 2525 10:52:07.965259  MTRR: Fixed MSR 0x268 0x0606060606060606

 2526 10:52:07.968415  MTRR: Fixed MSR 0x269 0x0606060606060606

 2527 10:52:07.975134  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2528 10:52:07.978200  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2529 10:52:07.981664  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2530 10:52:07.984806  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2531 10:52:07.991321  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2532 10:52:07.995252  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2533 10:52:07.998301  MTRR: Fixed MSR 0x258 0x0606060606060606

 2534 10:52:08.001686  call enable_fixed_mtrr()

 2535 10:52:08.004638  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2536 10:52:08.007987  MTRR: Fixed MSR 0x258 0x0606060606060606

 2537 10:52:08.014689  MTRR: Fixed MSR 0x259 0x0000000000000000

 2538 10:52:08.018191  MTRR: Fixed MSR 0x268 0x0606060606060606

 2539 10:52:08.021214  MTRR: Fixed MSR 0x269 0x0606060606060606

 2540 10:52:08.024651  CPU physical address size: 39 bits

 2541 10:52:08.028314  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2542 10:52:08.034723  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2543 10:52:08.038135  MTRR: Fixed MSR 0x259 0x0000000000000000

 2544 10:52:08.041426  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2545 10:52:08.044452  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2546 10:52:08.048267  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2547 10:52:08.054375  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2548 10:52:08.057593  call enable_fixed_mtrr()

 2549 10:52:08.058200  call enable_fixed_mtrr()

 2550 10:52:08.064082  MTRR: Fixed MSR 0x268 0x0606060606060606

 2551 10:52:08.067394  CPU physical address size: 39 bits

 2552 10:52:08.071098  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2553 10:52:08.074301  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2554 10:52:08.077958  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2555 10:52:08.084203  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2556 10:52:08.087582  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2557 10:52:08.090756  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2558 10:52:08.094082  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2559 10:52:08.097493  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2560 10:52:08.103955  CPU physical address size: 39 bits

 2561 10:52:08.107561  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2562 10:52:08.110756  MTRR: Fixed MSR 0x269 0x0606060606060606

 2563 10:52:08.114379  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2564 10:52:08.117149  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2565 10:52:08.120941  call enable_fixed_mtrr()

 2566 10:52:08.123946  call enable_fixed_mtrr()

 2567 10:52:08.127113  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2568 10:52:08.130448  CPU physical address size: 39 bits

 2569 10:52:08.134149  CPU physical address size: 39 bits

 2570 10:52:08.140398  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2571 10:52:08.143895  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2572 10:52:08.147138  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2573 10:52:08.150521  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2574 10:52:08.157182  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2575 10:52:08.160540  call enable_fixed_mtrr()

 2576 10:52:08.163578  CPU physical address size: 39 bits

 2577 10:52:08.164089  

 2578 10:52:08.167371  MTRR check

 2579 10:52:08.167794  Fixed MTRRs   : Enabled

 2580 10:52:08.170146  Variable MTRRs: Enabled

 2581 10:52:08.170571  

 2582 10:52:08.177052  BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms

 2583 10:52:08.180261  Checking cr50 for pending updates

 2584 10:52:08.191865  Reading cr50 TPM mode

 2585 10:52:08.207332  BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms

 2586 10:52:08.217334  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2587 10:52:08.220585  Checking segment from ROM address 0xf96cbe6c

 2588 10:52:08.224129  Checking segment from ROM address 0xf96cbe88

 2589 10:52:08.230525  Loading segment from ROM address 0xf96cbe6c

 2590 10:52:08.230996    code (compression=1)

 2591 10:52:08.240323    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2592 10:52:08.250577  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2593 10:52:08.251113  using LZMA

 2594 10:52:08.272740  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2595 10:52:08.279076  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2596 10:52:08.286858  Loading segment from ROM address 0xf96cbe88

 2597 10:52:08.290435    Entry Point 0x30000000

 2598 10:52:08.290979  Loaded segments

 2599 10:52:08.296991  BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms

 2600 10:52:08.303782  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2601 10:52:08.306989  Finalizing chipset.

 2602 10:52:08.310340  apm_control: Finalizing SMM.

 2603 10:52:08.310904  APMC done.

 2604 10:52:08.313831  HECI: CSE device 16.1 is disabled

 2605 10:52:08.317363  HECI: CSE device 16.2 is disabled

 2606 10:52:08.320221  HECI: CSE device 16.3 is disabled

 2607 10:52:08.323451  HECI: CSE device 16.4 is disabled

 2608 10:52:08.327256  HECI: CSE device 16.5 is disabled

 2609 10:52:08.329988  HECI: Sending End-of-Post

 2610 10:52:08.338569  CSE: EOP requested action: continue boot

 2611 10:52:08.341998  CSE EOP successful, continuing boot

 2612 10:52:08.348529  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2613 10:52:08.351786  mp_park_aps done after 0 msecs.

 2614 10:52:08.355554  Jumping to boot code at 0x30000000(0x76891000)

 2615 10:52:08.364773  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2616 10:52:08.369364  

 2617 10:52:08.369864  

 2618 10:52:08.370256  

 2619 10:52:08.372340  Starting depthcharge on Volmar...

 2620 10:52:08.372856  

 2621 10:52:08.374084  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2622 10:52:08.374580  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2623 10:52:08.374976  Setting prompt string to ['brya:']
 2624 10:52:08.375361  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2625 10:52:08.379125  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2626 10:52:08.379673  

 2627 10:52:08.385542  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2628 10:52:08.386271  

 2629 10:52:08.392574  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2630 10:52:08.393268  

 2631 10:52:08.396122  configure_storage: Failed to remap 1C:2

 2632 10:52:08.396743  

 2633 10:52:08.399048  Wipe memory regions:

 2634 10:52:08.399559  

 2635 10:52:08.402446  	[0x00000000001000, 0x000000000a0000)

 2636 10:52:08.403031  

 2637 10:52:08.405939  	[0x00000000100000, 0x00000030000000)

 2638 10:52:08.510529  

 2639 10:52:08.514139  	[0x00000032668e60, 0x00000076857000)

 2640 10:52:08.658001  

 2641 10:52:08.661503  	[0x00000100000000, 0x0000027fc00000)

 2642 10:52:09.470970  

 2643 10:52:09.474428  ec_init: CrosEC protocol v3 supported (256, 256)

 2644 10:52:10.083914  

 2645 10:52:10.084048  R8152: Initializing

 2646 10:52:10.084116  

 2647 10:52:10.086623  Version 9 (ocp_data = 6010)

 2648 10:52:10.086700  

 2649 10:52:10.090056  R8152: Done initializing

 2650 10:52:10.090138  

 2651 10:52:10.093241  Adding net device

 2652 10:52:10.394920  

 2653 10:52:10.398101  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2654 10:52:10.398494  

 2655 10:52:10.398797  

 2656 10:52:10.399079  

 2657 10:52:10.399759  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2659 10:52:10.500788  brya: tftpboot 192.168.201.1 12073779/tftp-deploy-lr_xnqmy/kernel/bzImage 12073779/tftp-deploy-lr_xnqmy/kernel/cmdline 12073779/tftp-deploy-lr_xnqmy/ramdisk/ramdisk.cpio.gz

 2660 10:52:10.501318  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2661 10:52:10.501727  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2662 10:52:10.505952  tftpboot 192.168.201.1 12073779/tftp-deploy-lr_xnqmy/kernel/bzIploy-lr_xnqmy/kernel/cmdline 12073779/tftp-deploy-lr_xnqmy/ramdisk/ramdisk.cpio.gz

 2663 10:52:10.506352  

 2664 10:52:10.506656  Waiting for link

 2665 10:52:10.709077  

 2666 10:52:10.709404  done.

 2667 10:52:10.709621  

 2668 10:52:10.709822  MAC: 00:e0:4c:68:01:22

 2669 10:52:10.710059  

 2670 10:52:10.712396  Sending DHCP discover... done.

 2671 10:52:10.712672  

 2672 10:52:10.715792  Waiting for reply... done.

 2673 10:52:10.716071  

 2674 10:52:10.718766  Sending DHCP request... done.

 2675 10:52:10.719049  

 2676 10:52:10.725232  Waiting for reply... done.

 2677 10:52:10.725515  

 2678 10:52:10.725737  My ip is 192.168.201.15

 2679 10:52:10.725980  

 2680 10:52:10.728547  The DHCP server ip is 192.168.201.1

 2681 10:52:10.728828  

 2682 10:52:10.735263  TFTP server IP predefined by user: 192.168.201.1

 2683 10:52:10.735545  

 2684 10:52:10.742452  Bootfile predefined by user: 12073779/tftp-deploy-lr_xnqmy/kernel/bzImage

 2685 10:52:10.742758  

 2686 10:52:10.745391  Sending tftp read request... done.

 2687 10:52:10.745671  

 2688 10:52:10.752830  Waiting for the transfer... 

 2689 10:52:10.753155  

 2690 10:52:11.011692  00000000 ################################################################

 2691 10:52:11.011846  

 2692 10:52:11.293023  00080000 ################################################################

 2693 10:52:11.293295  

 2694 10:52:11.543651  00100000 ################################################################

 2695 10:52:11.543782  

 2696 10:52:11.794662  00180000 ################################################################

 2697 10:52:11.794799  

 2698 10:52:12.043648  00200000 ################################################################

 2699 10:52:12.043779  

 2700 10:52:12.293845  00280000 ################################################################

 2701 10:52:12.294075  

 2702 10:52:12.543413  00300000 ################################################################

 2703 10:52:12.543553  

 2704 10:52:12.791216  00380000 ################################################################

 2705 10:52:12.791372  

 2706 10:52:13.041866  00400000 ################################################################

 2707 10:52:13.042010  

 2708 10:52:13.296080  00480000 ################################################################

 2709 10:52:13.296219  

 2710 10:52:13.547748  00500000 ################################################################

 2711 10:52:13.547885  

 2712 10:52:13.797294  00580000 ################################################################

 2713 10:52:13.797455  

 2714 10:52:14.049308  00600000 ################################################################

 2715 10:52:14.049453  

 2716 10:52:14.300006  00680000 ################################################################

 2717 10:52:14.300196  

 2718 10:52:14.549734  00700000 ################################################################

 2719 10:52:14.549917  

 2720 10:52:14.801000  00780000 ################################################################

 2721 10:52:14.801138  

 2722 10:52:15.058626  00800000 ################################################################

 2723 10:52:15.058753  

 2724 10:52:15.313839  00880000 ################################################################

 2725 10:52:15.313980  

 2726 10:52:15.576194  00900000 ################################################################

 2727 10:52:15.576330  

 2728 10:52:15.832544  00980000 ################################################################

 2729 10:52:15.832677  

 2730 10:52:16.092947  00a00000 ################################################################

 2731 10:52:16.093079  

 2732 10:52:16.341812  00a80000 ################################################################

 2733 10:52:16.341997  

 2734 10:52:16.589292  00b00000 ################################################################

 2735 10:52:16.589424  

 2736 10:52:16.839792  00b80000 ################################################################

 2737 10:52:16.839929  

 2738 10:52:17.086782  00c00000 ################################################################

 2739 10:52:17.086919  

 2740 10:52:17.332351  00c80000 ################################################################

 2741 10:52:17.332479  

 2742 10:52:17.569549  00d00000 ############################################################# done.

 2743 10:52:17.569682  

 2744 10:52:17.572681  The bootfile was 14129248 bytes long.

 2745 10:52:17.572770  

 2746 10:52:17.575956  Sending tftp read request... done.

 2747 10:52:17.576036  

 2748 10:52:17.578877  Waiting for the transfer... 

 2749 10:52:17.578952  

 2750 10:52:17.833562  00000000 ################################################################

 2751 10:52:17.833692  

 2752 10:52:18.093444  00080000 ################################################################

 2753 10:52:18.093581  

 2754 10:52:18.344510  00100000 ################################################################

 2755 10:52:18.344656  

 2756 10:52:18.595386  00180000 ################################################################

 2757 10:52:18.595525  

 2758 10:52:18.841058  00200000 ################################################################

 2759 10:52:18.841188  

 2760 10:52:19.104283  00280000 ################################################################

 2761 10:52:19.104415  

 2762 10:52:19.360859  00300000 ################################################################

 2763 10:52:19.360994  

 2764 10:52:19.608770  00380000 ################################################################

 2765 10:52:19.608944  

 2766 10:52:19.859188  00400000 ################################################################

 2767 10:52:19.859352  

 2768 10:52:20.102997  00480000 ################################################################

 2769 10:52:20.103162  

 2770 10:52:20.346538  00500000 ################################################################

 2771 10:52:20.346705  

 2772 10:52:20.591243  00580000 ################################################################

 2773 10:52:20.591386  

 2774 10:52:20.842686  00600000 ################################################################

 2775 10:52:20.842843  

 2776 10:52:21.094604  00680000 ################################################################

 2777 10:52:21.094741  

 2778 10:52:21.350281  00700000 ################################################################

 2779 10:52:21.350425  

 2780 10:52:21.604796  00780000 ################################################################

 2781 10:52:21.604956  

 2782 10:52:21.862469  00800000 ################################################################

 2783 10:52:21.862629  

 2784 10:52:22.041008  00880000 ############################################## done.

 2785 10:52:22.041171  

 2786 10:52:22.043962  Sending tftp read request... done.

 2787 10:52:22.044045  

 2788 10:52:22.047494  Waiting for the transfer... 

 2789 10:52:22.047571  

 2790 10:52:22.047635  00000000 # done.

 2791 10:52:22.050691  

 2792 10:52:22.057777  Command line loaded dynamically from TFTP file: 12073779/tftp-deploy-lr_xnqmy/kernel/cmdline

 2793 10:52:22.057908  

 2794 10:52:22.073915  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2795 10:52:22.079438  

 2796 10:52:22.083124  Shutting down all USB controllers.

 2797 10:52:22.083228  

 2798 10:52:22.083327  Removing current net device

 2799 10:52:22.083419  

 2800 10:52:22.086500  Finalizing coreboot

 2801 10:52:22.086601  

 2802 10:52:22.092950  Exiting depthcharge with code 4 at timestamp: 23979122

 2803 10:52:22.093025  

 2804 10:52:22.093090  

 2805 10:52:22.093151  Starting kernel ...

 2806 10:52:22.093260  

 2807 10:52:22.093390  

 2808 10:52:22.093816  end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
 2809 10:52:22.093982  start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
 2810 10:52:22.094062  Setting prompt string to ['Linux version [0-9]']
 2811 10:52:22.094132  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2812 10:52:22.094200  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2814 10:56:49.094985  end: 2.2.5 auto-login-action (duration 00:04:27) [common]
 2816 10:56:49.096080  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
 2818 10:56:49.096957  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2821 10:56:49.098443  end: 2 depthcharge-action (duration 00:05:00) [common]
 2823 10:56:49.099674  Cleaning after the job
 2824 10:56:49.100065  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/ramdisk
 2825 10:56:49.101529  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/kernel
 2826 10:56:49.103643  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12073779/tftp-deploy-lr_xnqmy/modules
 2827 10:56:49.104256  start: 5.1 power-off (timeout 00:00:30) [common]
 2828 10:56:49.104496  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=off'
 2829 10:56:49.181638  >> Command sent successfully.

 2830 10:56:49.186492  Returned 0 in 0 seconds
 2831 10:56:49.287490  end: 5.1 power-off (duration 00:00:00) [common]
 2833 10:56:49.289073  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2834 10:56:49.290449  Listened to connection for namespace 'common' for up to 1s
 2836 10:56:49.291887  Listened to connection for namespace 'common' for up to 1s
 2837 10:56:50.290194  Finalising connection for namespace 'common'
 2838 10:56:50.290871  Disconnecting from shell: Finalise
 2839 10:56:50.291278  
 2840 10:56:50.392400  end: 5.2 read-feedback (duration 00:00:01) [common]
 2841 10:56:50.393035  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12073779
 2842 10:56:50.414023  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12073779
 2843 10:56:50.414155  JobError: Your job cannot terminate cleanly.