Boot log: acer-cbv514-1h-34uz-brya
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:20:29.733494 lava-dispatcher, installed at version: 2023.10
2 12:20:29.733716 start: 0 validate
3 12:20:29.733849 Start time: 2023-12-07 12:20:29.733840+00:00 (UTC)
4 12:20:29.733970 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:20:29.734099 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:20:29.996534 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:20:29.997323 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.201-cip41-16-g3c85fba3b6e5d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:20:37.500876 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:20:37.501660 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.201-cip41-16-g3c85fba3b6e5d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:20:38.510291 validate duration: 8.78
12 12:20:38.510572 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:20:38.510680 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:20:38.510777 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:20:38.510908 Not decompressing ramdisk as can be used compressed.
16 12:20:38.511000 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:20:38.511068 saving as /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/ramdisk/rootfs.cpio.gz
18 12:20:38.511133 total size: 8418130 (8 MB)
19 12:20:38.512253 progress 0 % (0 MB)
20 12:20:38.514603 progress 5 % (0 MB)
21 12:20:38.516862 progress 10 % (0 MB)
22 12:20:38.519180 progress 15 % (1 MB)
23 12:20:38.521487 progress 20 % (1 MB)
24 12:20:38.523743 progress 25 % (2 MB)
25 12:20:38.526052 progress 30 % (2 MB)
26 12:20:38.528140 progress 35 % (2 MB)
27 12:20:38.530454 progress 40 % (3 MB)
28 12:20:38.532946 progress 45 % (3 MB)
29 12:20:38.535441 progress 50 % (4 MB)
30 12:20:38.537876 progress 55 % (4 MB)
31 12:20:38.540346 progress 60 % (4 MB)
32 12:20:38.542570 progress 65 % (5 MB)
33 12:20:38.544904 progress 70 % (5 MB)
34 12:20:38.547317 progress 75 % (6 MB)
35 12:20:38.549775 progress 80 % (6 MB)
36 12:20:38.552201 progress 85 % (6 MB)
37 12:20:38.554599 progress 90 % (7 MB)
38 12:20:38.557074 progress 95 % (7 MB)
39 12:20:38.559346 progress 100 % (8 MB)
40 12:20:38.559600 8 MB downloaded in 0.05 s (165.65 MB/s)
41 12:20:38.559809 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:20:38.560189 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:20:38.560305 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:20:38.560393 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:20:38.560540 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.201-cip41-16-g3c85fba3b6e5d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:20:38.560616 saving as /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/kernel/bzImage
48 12:20:38.560679 total size: 14129248 (13 MB)
49 12:20:38.560782 No compression specified
50 12:20:38.562055 progress 0 % (0 MB)
51 12:20:38.566014 progress 5 % (0 MB)
52 12:20:38.569863 progress 10 % (1 MB)
53 12:20:38.573553 progress 15 % (2 MB)
54 12:20:38.577390 progress 20 % (2 MB)
55 12:20:38.581002 progress 25 % (3 MB)
56 12:20:38.584825 progress 30 % (4 MB)
57 12:20:38.588474 progress 35 % (4 MB)
58 12:20:38.592369 progress 40 % (5 MB)
59 12:20:38.596303 progress 45 % (6 MB)
60 12:20:38.600287 progress 50 % (6 MB)
61 12:20:38.604197 progress 55 % (7 MB)
62 12:20:38.607867 progress 60 % (8 MB)
63 12:20:38.611663 progress 65 % (8 MB)
64 12:20:38.615369 progress 70 % (9 MB)
65 12:20:38.619148 progress 75 % (10 MB)
66 12:20:38.623109 progress 80 % (10 MB)
67 12:20:38.627098 progress 85 % (11 MB)
68 12:20:38.631097 progress 90 % (12 MB)
69 12:20:38.635000 progress 95 % (12 MB)
70 12:20:38.639065 progress 100 % (13 MB)
71 12:20:38.639234 13 MB downloaded in 0.08 s (171.54 MB/s)
72 12:20:38.639395 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:20:38.639632 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:20:38.639728 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:20:38.639856 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:20:38.640032 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.201-cip41-16-g3c85fba3b6e5d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:20:38.640107 saving as /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/modules/modules.tar
79 12:20:38.640170 total size: 528264 (0 MB)
80 12:20:38.640241 Using unxz to decompress xz
81 12:20:38.644642 progress 6 % (0 MB)
82 12:20:38.645122 progress 12 % (0 MB)
83 12:20:38.645399 progress 18 % (0 MB)
84 12:20:38.646866 progress 24 % (0 MB)
85 12:20:38.648745 progress 31 % (0 MB)
86 12:20:38.650892 progress 37 % (0 MB)
87 12:20:38.652925 progress 43 % (0 MB)
88 12:20:38.654948 progress 49 % (0 MB)
89 12:20:38.656949 progress 55 % (0 MB)
90 12:20:38.658890 progress 62 % (0 MB)
91 12:20:38.660898 progress 68 % (0 MB)
92 12:20:38.662864 progress 74 % (0 MB)
93 12:20:38.664950 progress 80 % (0 MB)
94 12:20:38.667232 progress 86 % (0 MB)
95 12:20:38.669117 progress 93 % (0 MB)
96 12:20:38.671094 progress 99 % (0 MB)
97 12:20:38.678543 0 MB downloaded in 0.04 s (13.13 MB/s)
98 12:20:38.678879 end: 1.3.1 http-download (duration 00:00:00) [common]
100 12:20:38.679302 end: 1.3 download-retry (duration 00:00:00) [common]
101 12:20:38.679445 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 12:20:38.679592 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 12:20:38.679717 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 12:20:38.679850 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 12:20:38.680169 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604
106 12:20:38.680374 makedir: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin
107 12:20:38.680536 makedir: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/tests
108 12:20:38.680692 makedir: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/results
109 12:20:38.680861 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-add-keys
110 12:20:38.681122 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-add-sources
111 12:20:38.681320 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-background-process-start
112 12:20:38.681515 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-background-process-stop
113 12:20:38.681710 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-common-functions
114 12:20:38.681901 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-echo-ipv4
115 12:20:38.682092 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-install-packages
116 12:20:38.682284 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-installed-packages
117 12:20:38.682475 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-os-build
118 12:20:38.682666 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-probe-channel
119 12:20:38.682855 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-probe-ip
120 12:20:38.683049 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-target-ip
121 12:20:38.683237 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-target-mac
122 12:20:38.683427 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-target-storage
123 12:20:38.683626 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-case
124 12:20:38.683822 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-event
125 12:20:38.684011 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-feedback
126 12:20:38.684203 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-raise
127 12:20:38.684396 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-reference
128 12:20:38.684593 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-runner
129 12:20:38.684789 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-set
130 12:20:38.685007 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-test-shell
131 12:20:38.685213 Updating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-install-packages (oe)
132 12:20:38.685433 Updating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/bin/lava-installed-packages (oe)
133 12:20:38.685617 Creating /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/environment
134 12:20:38.685771 LAVA metadata
135 12:20:38.685884 - LAVA_JOB_ID=12207224
136 12:20:38.685987 - LAVA_DISPATCHER_IP=192.168.201.1
137 12:20:38.686141 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 12:20:38.686249 skipped lava-vland-overlay
139 12:20:38.686372 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 12:20:38.686494 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 12:20:38.686592 skipped lava-multinode-overlay
142 12:20:38.686723 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 12:20:38.686852 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 12:20:38.686971 Loading test definitions
145 12:20:38.687118 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 12:20:38.687236 Using /lava-12207224 at stage 0
147 12:20:38.687705 uuid=12207224_1.4.2.3.1 testdef=None
148 12:20:38.687832 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 12:20:38.687961 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 12:20:38.688749 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 12:20:38.689148 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 12:20:38.690110 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 12:20:38.690472 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 12:20:38.691400 runner path: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/0/tests/0_dmesg test_uuid 12207224_1.4.2.3.1
157 12:20:38.691611 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 12:20:38.691968 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 12:20:38.692078 Using /lava-12207224 at stage 1
161 12:20:38.692527 uuid=12207224_1.4.2.3.5 testdef=None
162 12:20:38.692657 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 12:20:38.692787 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 12:20:38.693547 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 12:20:38.693898 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 12:20:38.694889 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 12:20:38.695250 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 12:20:38.696194 runner path: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/1/tests/1_bootrr test_uuid 12207224_1.4.2.3.5
171 12:20:38.696405 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 12:20:38.696743 Creating lava-test-runner.conf files
174 12:20:38.696842 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/0 for stage 0
175 12:20:38.696984 - 0_dmesg
176 12:20:38.697138 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12207224/lava-overlay-8c69k604/lava-12207224/1 for stage 1
177 12:20:38.697273 - 1_bootrr
178 12:20:38.697414 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 12:20:38.697545 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 12:20:38.709844 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 12:20:38.709980 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 12:20:38.710080 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 12:20:38.710170 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 12:20:38.710256 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 12:20:38.963890 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 12:20:38.964387 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
187 12:20:38.964549 extracting modules file /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12207224/extract-overlay-ramdisk-ob9qobkq/ramdisk
188 12:20:38.990008 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 12:20:38.990167 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
190 12:20:38.990266 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12207224/compress-overlay-epgzjovr/overlay-1.4.2.4.tar.gz to ramdisk
191 12:20:38.990338 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12207224/compress-overlay-epgzjovr/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12207224/extract-overlay-ramdisk-ob9qobkq/ramdisk
192 12:20:38.999358 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 12:20:38.999505 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
194 12:20:38.999627 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 12:20:38.999746 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
196 12:20:38.999851 Building ramdisk /var/lib/lava/dispatcher/tmp/12207224/extract-overlay-ramdisk-ob9qobkq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12207224/extract-overlay-ramdisk-ob9qobkq/ramdisk
197 12:20:39.153790 >> 54150 blocks
198 12:20:40.046476 rename /var/lib/lava/dispatcher/tmp/12207224/extract-overlay-ramdisk-ob9qobkq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/ramdisk/ramdisk.cpio.gz
199 12:20:40.046915 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 12:20:40.047052 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 12:20:40.047155 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 12:20:40.047255 No mkimage arch provided, not using FIT.
203 12:20:40.047381 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 12:20:40.047506 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 12:20:40.047637 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 12:20:40.047738 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 12:20:40.047824 No LXC device requested
208 12:20:40.047902 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 12:20:40.047991 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 12:20:40.048075 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 12:20:40.048155 Checking files for TFTP limit of 4294967296 bytes.
212 12:20:40.048569 end: 1 tftp-deploy (duration 00:00:02) [common]
213 12:20:40.048676 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 12:20:40.048766 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 12:20:40.048887 substitutions:
216 12:20:40.048956 - {DTB}: None
217 12:20:40.049101 - {INITRD}: 12207224/tftp-deploy-y7apm1zy/ramdisk/ramdisk.cpio.gz
218 12:20:40.049188 - {KERNEL}: 12207224/tftp-deploy-y7apm1zy/kernel/bzImage
219 12:20:40.049267 - {LAVA_MAC}: None
220 12:20:40.049325 - {PRESEED_CONFIG}: None
221 12:20:40.049381 - {PRESEED_LOCAL}: None
222 12:20:40.049443 - {RAMDISK}: 12207224/tftp-deploy-y7apm1zy/ramdisk/ramdisk.cpio.gz
223 12:20:40.049499 - {ROOT_PART}: None
224 12:20:40.049554 - {ROOT}: None
225 12:20:40.049608 - {SERVER_IP}: 192.168.201.1
226 12:20:40.049662 - {TEE}: None
227 12:20:40.049715 Parsed boot commands:
228 12:20:40.049769 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 12:20:40.049955 Parsed boot commands: tftpboot 192.168.201.1 12207224/tftp-deploy-y7apm1zy/kernel/bzImage 12207224/tftp-deploy-y7apm1zy/kernel/cmdline 12207224/tftp-deploy-y7apm1zy/ramdisk/ramdisk.cpio.gz
230 12:20:40.050046 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 12:20:40.050129 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 12:20:40.050226 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 12:20:40.050317 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 12:20:40.050387 Not connected, no need to disconnect.
235 12:20:40.050463 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 12:20:40.050549 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 12:20:40.050618 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
238 12:20:40.054855 Setting prompt string to ['lava-test: # ']
239 12:20:40.055232 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 12:20:40.055340 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 12:20:40.055442 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 12:20:40.055531 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 12:20:40.055775 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
244 12:20:45.188052 >> Command sent successfully.
245 12:20:45.190645 Returned 0 in 5 seconds
246 12:20:45.291024 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 12:20:45.291347 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 12:20:45.291448 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 12:20:45.291537 Setting prompt string to 'Starting depthcharge on Volmar...'
251 12:20:45.291604 Changing prompt to 'Starting depthcharge on Volmar...'
252 12:20:45.291672 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 12:20:45.291938 [Enter `^Ec?' for help]
254 12:20:46.679765
255 12:20:46.679984
256 12:20:46.687622 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 12:20:46.690979 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 12:20:46.694840 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 12:20:46.702043 CPU: AES supported, TXT NOT supported, VT supported
260 12:20:46.709847 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 12:20:46.709991 Cache size = 10 MiB
262 12:20:46.716968 MCH: device id 4609 (rev 04) is Alderlake-P
263 12:20:46.720548 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 12:20:46.724146 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 12:20:46.728152 VBOOT: Loading verstage.
266 12:20:46.731653 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 12:20:46.739220 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 12:20:46.742676 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 12:20:46.749350 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 12:20:46.759253 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 12:20:46.759421
272 12:20:46.759548
273 12:20:46.769349 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 12:20:46.772554 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 12:20:46.776724 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 12:20:46.779981 I2C TX abort detected (00000001)
277 12:20:46.783263 cr50_i2c_read: Address write failed
278 12:20:46.796844 .done! DID_VID 0x00281ae0
279 12:20:46.800023 TPM ready after 0 ms
280 12:20:46.803335 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 12:20:46.813766 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 12:20:46.820951 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 12:20:46.904394 tlcl_send_startup: Startup return code is 0
284 12:20:46.904542 TPM: setup succeeded
285 12:20:46.923765 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 12:20:46.946833 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 12:20:46.950218 Chrome EC: UHEPI supported
288 12:20:46.953277 Reading cr50 boot mode
289 12:20:46.967846 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 12:20:46.967968 Phase 1
291 12:20:46.974692 FMAP: area GBB found @ 1805000 (458752 bytes)
292 12:20:46.981451 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 12:20:46.987866 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 12:20:46.994522 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 12:20:46.994653 Phase 2
296 12:20:46.997862 Phase 3
297 12:20:47.001447 FMAP: area GBB found @ 1805000 (458752 bytes)
298 12:20:47.005431 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 12:20:47.012768 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 12:20:47.016125 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 12:20:47.023366 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 12:20:47.030813 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 12:20:47.040516 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 12:20:47.053158 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 12:20:47.056243 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 12:20:47.062698 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 12:20:47.069596 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 12:20:47.076242 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 12:20:47.083068 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 12:20:47.086950 Phase 4
311 12:20:47.090030 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 12:20:47.096906 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 12:20:47.309430 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 12:20:47.315992 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 12:20:47.320180 Saving vboot hash.
316 12:20:47.326001 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 12:20:47.341825 tlcl_extend: response is 0
318 12:20:47.348803 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 12:20:47.354988 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 12:20:47.372686 tlcl_extend: response is 0
321 12:20:47.379367 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 12:20:47.397798 tlcl_lock_nv_write: response is 0
323 12:20:47.415465 tlcl_lock_nv_write: response is 0
324 12:20:47.415624 Slot A is selected
325 12:20:47.422126 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 12:20:47.428897 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 12:20:47.435570 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 12:20:47.442122 BS: verstage times (exec / console): total (unknown) / 264 ms
329 12:20:47.442267
330 12:20:47.442373
331 12:20:47.448668 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 12:20:47.452865 Google Chrome EC: version:
333 12:20:47.455739 ro: volmar_v2.0.14126-e605144e9c
334 12:20:47.459315 rw: volmar_v0.0.55-22d1557
335 12:20:47.462533 running image: 2
336 12:20:47.465927 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 12:20:47.476337 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 12:20:47.482472 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 12:20:47.489567 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 12:20:47.499496 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 12:20:47.509457 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 12:20:47.512749 EC took 940us to calculate image hash
343 12:20:47.522565 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 12:20:47.526034 VB2:sync_ec() select_rw=RW(active)
345 12:20:47.538753 Waited 275us to clear limit power flag.
346 12:20:47.542196 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 12:20:47.545365 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 12:20:47.548923 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 12:20:47.555809 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 12:20:47.558858 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
351 12:20:47.562329 TCO_STS: 0000 0000
352 12:20:47.562435 GEN_PMCON: d0015038 00002200
353 12:20:47.565470 GBLRST_CAUSE: 00000000 00000000
354 12:20:47.569084 HPR_CAUSE0: 00000000
355 12:20:47.571911 prev_sleep_state 5
356 12:20:47.575589 Abort disabling TXT, as CPU is not TXT capable.
357 12:20:47.583321 cse_lite: Number of partitions = 3
358 12:20:47.586788 cse_lite: Current partition = RO
359 12:20:47.586900 cse_lite: Next partition = RO
360 12:20:47.590186 cse_lite: Flags = 0x7
361 12:20:47.596844 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 12:20:47.606787 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 12:20:47.609964 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 12:20:47.616907 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 12:20:47.623819 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 12:20:47.630080 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 12:20:47.633297 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 12:20:47.640059 cse_lite: Set Boot Partition Info Command (RW)
369 12:20:47.643292 HECI: Global Reset(Type:1) Command
370 12:20:49.071287 c �3{�kcY�l�ٝ 00000423
371 12:20:49.078005 CPU: AES supported, TXT NOT supported, VT supported
372 12:20:49.084684 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
373 12:20:49.087956 Cache size = 10 MiB
374 12:20:49.091303 MCH: device id 4609 (rev 04) is Alderlake-P
375 12:20:49.098269 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
376 12:20:49.101528 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
377 12:20:49.104565 VBOOT: Loading verstage.
378 12:20:49.108187 FMAP: Found "FLASH" version 1.1 at 0x1804000.
379 12:20:49.111859 FMAP: base = 0x0 size = 0x2000000 #areas = 37
380 12:20:49.118936 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 12:20:49.125987 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
382 12:20:49.132646 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
383 12:20:49.136956
384 12:20:49.137524
385 12:20:49.143666 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
386 12:20:49.150267 Probing TPM I2C: I2C bus 1 version 0x3230302a
387 12:20:49.153435 DW I2C bus 1 at 0xfe022000 (400 KHz)
388 12:20:49.156601 done! DID_VID 0x00281ae0
389 12:20:49.159715 TPM ready after 0 ms
390 12:20:49.163441 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
391 12:20:49.172449 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
392 12:20:49.180459 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
393 12:20:49.260511 tlcl_send_startup: Startup return code is 0
394 12:20:49.261060 TPM: setup succeeded
395 12:20:49.280806 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
396 12:20:49.302891 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
397 12:20:49.306542 Chrome EC: UHEPI supported
398 12:20:49.309873 Reading cr50 boot mode
399 12:20:49.325138 Cr50 says boot_mode is VERIFIED_RW(0x00).
400 12:20:49.325679 Phase 1
401 12:20:49.331417 FMAP: area GBB found @ 1805000 (458752 bytes)
402 12:20:49.338135 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 12:20:49.345149 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 12:20:49.351364 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
405 12:20:49.351894 Phase 2
406 12:20:49.354970 Phase 3
407 12:20:49.358180 FMAP: area GBB found @ 1805000 (458752 bytes)
408 12:20:49.364599 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 12:20:49.367837 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 12:20:49.374634 VB2:vb2_verify_keyblock() Checking keyblock signature...
411 12:20:49.381354 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
412 12:20:49.387952 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
413 12:20:49.397772 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
414 12:20:49.409910 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 12:20:49.413281 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 12:20:49.420021 VB2:vb2_verify_fw_preamble() Verifying preamble.
417 12:20:49.426488 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
418 12:20:49.433037 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
419 12:20:49.439612 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
420 12:20:49.443551 Phase 4
421 12:20:49.447206 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
422 12:20:49.453738 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
423 12:20:49.665139 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
424 12:20:49.672232 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
425 12:20:49.675165 Saving vboot hash.
426 12:20:49.681983 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
427 12:20:49.698342 tlcl_extend: response is 0
428 12:20:49.705576 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
429 12:20:49.711412 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
430 12:20:49.725999 tlcl_extend: response is 0
431 12:20:49.732662 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
432 12:20:49.751208 tlcl_lock_nv_write: response is 0
433 12:20:49.769394 tlcl_lock_nv_write: response is 0
434 12:20:49.769924 Slot A is selected
435 12:20:49.775434 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 12:20:49.782063 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
437 12:20:49.789016 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
438 12:20:49.795761 BS: verstage times (exec / console): total (unknown) / 257 ms
439 12:20:49.796292
440 12:20:49.796627
441 12:20:49.802410 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
442 12:20:49.806953 Google Chrome EC: version:
443 12:20:49.810150 ro: volmar_v2.0.14126-e605144e9c
444 12:20:49.813334 rw: volmar_v0.0.55-22d1557
445 12:20:49.816401 running image: 2
446 12:20:49.820254 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
447 12:20:49.830118 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
448 12:20:49.837230 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
449 12:20:49.843738 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
450 12:20:49.853930 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 12:20:49.863715 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 12:20:49.876128 EC took 8031us to calculate image hash
453 12:20:49.885823 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 12:20:49.888983 VB2:sync_ec() select_rw=RW(active)
455 12:20:49.899957 Waited 275us to clear limit power flag.
456 12:20:49.903426 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
457 12:20:49.906623 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
458 12:20:49.910093 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
459 12:20:49.916667 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
460 12:20:49.920293 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
461 12:20:49.923300 TCO_STS: 0000 0000
462 12:20:49.923522 GEN_PMCON: d1001038 00002200
463 12:20:49.926658 GBLRST_CAUSE: 00000040 00000000
464 12:20:49.929989 HPR_CAUSE0: 00000000
465 12:20:49.933742 prev_sleep_state 5
466 12:20:49.936636 Abort disabling TXT, as CPU is not TXT capable.
467 12:20:49.944858 cse_lite: Number of partitions = 3
468 12:20:49.948112 cse_lite: Current partition = RW
469 12:20:49.951251 cse_lite: Next partition = RW
470 12:20:49.951779 cse_lite: Flags = 0x7
471 12:20:49.958179 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
472 12:20:49.967929 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
473 12:20:49.971561 FMAP: area SI_ME found @ 1000 (5238784 bytes)
474 12:20:49.977940 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
475 12:20:49.984661 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
476 12:20:49.991135 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
477 12:20:49.994735 cse_lite: CSE CBFS RW version : 16.1.25.2049
478 12:20:49.998150 Boot Count incremented to 5999
479 12:20:50.005001 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
480 12:20:50.011348 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 12:20:50.024617 Probing TPM I2C: done! DID_VID 0x00281ae0
482 12:20:50.027999 Locality already claimed
483 12:20:50.031118 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 12:20:50.050670 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 12:20:50.057314 MRC: Hash idx 0x100d comparison successful.
486 12:20:50.060454 MRC cache found, size f6c8
487 12:20:50.061004 bootmode is set to: 2
488 12:20:50.064114 EC returned error result code 3
489 12:20:50.067115 FW_CONFIG value from CBI is 0x131
490 12:20:50.074085 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
491 12:20:50.077432 SPD index = 0
492 12:20:50.083768 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
493 12:20:50.084300 SPD: module type is LPDDR4X
494 12:20:50.092061 SPD: module part number is K4U6E3S4AB-MGCL
495 12:20:50.098354 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
496 12:20:50.101855 SPD: device width 16 bits, bus width 16 bits
497 12:20:50.104994 SPD: module size is 1024 MB (per channel)
498 12:20:50.174521 CBMEM:
499 12:20:50.177690 IMD: root @ 0x76fff000 254 entries.
500 12:20:50.180871 IMD: root @ 0x76ffec00 62 entries.
501 12:20:50.188513 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
502 12:20:50.192112 RO_VPD is uninitialized or empty.
503 12:20:50.195923 FMAP: area RW_VPD found @ f29000 (8192 bytes)
504 12:20:50.202286 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
505 12:20:50.205506 External stage cache:
506 12:20:50.208724 IMD: root @ 0x7bbff000 254 entries.
507 12:20:50.212484 IMD: root @ 0x7bbfec00 62 entries.
508 12:20:50.218930 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 12:20:50.225892 MRC: Checking cached data update for 'RW_MRC_CACHE'.
510 12:20:50.228595 MRC: 'RW_MRC_CACHE' does not need update.
511 12:20:50.229049 8 DIMMs found
512 12:20:50.232683 SMM Memory Map
513 12:20:50.235983 SMRAM : 0x7b800000 0x800000
514 12:20:50.239439 Subregion 0: 0x7b800000 0x200000
515 12:20:50.242484 Subregion 1: 0x7ba00000 0x200000
516 12:20:50.245819 Subregion 2: 0x7bc00000 0x400000
517 12:20:50.249160 top_of_ram = 0x77000000
518 12:20:50.252671 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
519 12:20:50.259266 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
520 12:20:50.265823 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
521 12:20:50.269096 MTRR Range: Start=ff000000 End=0 (Size 1000000)
522 12:20:50.269697 Normal boot
523 12:20:50.279356 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
524 12:20:50.285637 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
525 12:20:50.292232 Processing 237 relocs. Offset value of 0x74ab9000
526 12:20:50.300409 BS: romstage times (exec / console): total (unknown) / 377 ms
527 12:20:50.307841
528 12:20:50.308419
529 12:20:50.314403 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
530 12:20:50.314924 Normal boot
531 12:20:50.321194 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
532 12:20:50.327837 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
533 12:20:50.333982 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
534 12:20:50.344122 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
535 12:20:50.392529 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
536 12:20:50.399231 Processing 5931 relocs. Offset value of 0x72a2f000
537 12:20:50.402146 BS: postcar times (exec / console): total (unknown) / 51 ms
538 12:20:50.406201
539 12:20:50.406724
540 12:20:50.412683 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
541 12:20:50.415698 Reserving BERT start 76a1e000, size 10000
542 12:20:50.419288 Normal boot
543 12:20:50.422229 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
544 12:20:50.429157 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
545 12:20:50.438734 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
546 12:20:50.442237 FMAP: area RW_VPD found @ f29000 (8192 bytes)
547 12:20:50.446599 Google Chrome EC: version:
548 12:20:50.449792 ro: volmar_v2.0.14126-e605144e9c
549 12:20:50.453379 rw: volmar_v0.0.55-22d1557
550 12:20:50.457077 running image: 2
551 12:20:50.459991 ACPI _SWS is PM1 Index 8 GPE Index -1
552 12:20:50.463164 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
553 12:20:50.466969 EC returned error result code 3
554 12:20:50.470514 FW_CONFIG value from CBI is 0x131
555 12:20:50.477215 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
556 12:20:50.480638 PCI: 00:1c.2 disabled by fw_config
557 12:20:50.487607 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 12:20:50.491253 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 12:20:50.497895 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 12:20:50.500883 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
561 12:20:50.507716 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
562 12:20:50.513961 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
563 12:20:50.521148 microcode: sig=0x906a4 pf=0x80 revision=0x423
564 12:20:50.524169 microcode: Update skipped, already up-to-date
565 12:20:50.530818 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
566 12:20:50.563563 Detected 6 core, 8 thread CPU.
567 12:20:50.566501 Setting up SMI for CPU
568 12:20:50.569712 IED base = 0x7bc00000
569 12:20:50.570177 IED size = 0x00400000
570 12:20:50.573227 Will perform SMM setup.
571 12:20:50.576822 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
572 12:20:50.579915 LAPIC 0x0 in XAPIC mode.
573 12:20:50.590187 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
574 12:20:50.593360 Processing 18 relocs. Offset value of 0x00030000
575 12:20:50.597984 Attempting to start 7 APs
576 12:20:50.600957 Waiting for 10ms after sending INIT.
577 12:20:50.614408 Waiting for SIPI to complete...
578 12:20:50.617700 LAPIC 0x1 in XAPIC mode.
579 12:20:50.620961 LAPIC 0x18 in XAPIC mode.
580 12:20:50.624302 LAPIC 0x9 in XAPIC mode.
581 12:20:50.627615 LAPIC 0x1a in XAPIC mode.
582 12:20:50.628189 LAPIC 0x8 in XAPIC mode.
583 12:20:50.634047 AP: slot 7 apic_id 9, MCU rev: 0x00000423
584 12:20:50.634622 LAPIC 0x1c in XAPIC mode.
585 12:20:50.640728 AP: slot 4 apic_id 18, MCU rev: 0x00000423
586 12:20:50.643785 AP: slot 2 apic_id 1c, MCU rev: 0x00000423
587 12:20:50.647554 AP: slot 6 apic_id 8, MCU rev: 0x00000423
588 12:20:50.650646 AP: slot 5 apic_id 1, MCU rev: 0x00000423
589 12:20:50.654042 LAPIC 0x1e in XAPIC mode.
590 12:20:50.661190 AP: slot 1 apic_id 1a, MCU rev: 0x00000423
591 12:20:50.664415 AP: slot 3 apic_id 1e, MCU rev: 0x00000423
592 12:20:50.664949 done.
593 12:20:50.667271 Waiting for SIPI to complete...
594 12:20:50.667960 done.
595 12:20:50.670839 smm_setup_relocation_handler: enter
596 12:20:50.674542 smm_setup_relocation_handler: exit
597 12:20:50.684319 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
598 12:20:50.687613 Processing 11 relocs. Offset value of 0x00038000
599 12:20:50.693776 smm_module_setup_stub: stack_top = 0x7b804000
600 12:20:50.697512 smm_module_setup_stub: per cpu stack_size = 0x800
601 12:20:50.704096 smm_module_setup_stub: runtime.start32_offset = 0x4c
602 12:20:50.707870 smm_module_setup_stub: runtime.smm_size = 0x10000
603 12:20:50.714059 SMM Module: stub loaded at 38000. Will call 0x76a52094
604 12:20:50.717660 Installing permanent SMM handler to 0x7b800000
605 12:20:50.724259 smm_load_module: total_smm_space_needed e468, available -> 200000
606 12:20:50.734014 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
607 12:20:50.737630 Processing 255 relocs. Offset value of 0x7b9f6000
608 12:20:50.740767 smm_load_module: smram_start: 0x7b800000
609 12:20:50.747693 smm_load_module: smram_end: 7ba00000
610 12:20:50.750787 smm_load_module: handler start 0x7b9f6d5f
611 12:20:50.754213 smm_load_module: handler_size 98d0
612 12:20:50.757463 smm_load_module: fxsave_area 0x7b9ff000
613 12:20:50.760798 smm_load_module: fxsave_size 1000
614 12:20:50.764074 smm_load_module: CONFIG_MSEG_SIZE 0x0
615 12:20:50.770731 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
616 12:20:50.774518 smm_load_module: handler_mod_params.smbase = 0x7b800000
617 12:20:50.780895 smm_load_module: per_cpu_save_state_size = 0x400
618 12:20:50.784268 smm_load_module: num_cpus = 0x8
619 12:20:50.790752 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
620 12:20:50.794032 smm_load_module: total_save_state_size = 0x2000
621 12:20:50.797080 smm_load_module: cpu0 entry: 7b9e6000
622 12:20:50.804020 smm_create_map: cpus allowed in one segment 30
623 12:20:50.807087 smm_create_map: min # of segments needed 1
624 12:20:50.807513 CPU 0x0
625 12:20:50.810249 smbase 7b9e6000 entry 7b9ee000
626 12:20:50.817001 ss_start 7b9f5c00 code_end 7b9ee208
627 12:20:50.817437 CPU 0x1
628 12:20:50.820605 smbase 7b9e5c00 entry 7b9edc00
629 12:20:50.826896 ss_start 7b9f5800 code_end 7b9ede08
630 12:20:50.827414 CPU 0x2
631 12:20:50.830397 smbase 7b9e5800 entry 7b9ed800
632 12:20:50.833926 ss_start 7b9f5400 code_end 7b9eda08
633 12:20:50.837402 CPU 0x3
634 12:20:50.840838 smbase 7b9e5400 entry 7b9ed400
635 12:20:50.843986 ss_start 7b9f5000 code_end 7b9ed608
636 12:20:50.844516 CPU 0x4
637 12:20:50.850500 smbase 7b9e5000 entry 7b9ed000
638 12:20:50.853578 ss_start 7b9f4c00 code_end 7b9ed208
639 12:20:50.854005 CPU 0x5
640 12:20:50.856933 smbase 7b9e4c00 entry 7b9ecc00
641 12:20:50.863950 ss_start 7b9f4800 code_end 7b9ece08
642 12:20:50.864486 CPU 0x6
643 12:20:50.866744 smbase 7b9e4800 entry 7b9ec800
644 12:20:50.886535 ss_start 7b9f4400 code_end 7b9eca08
645 12:20:50.887036 CPU 0x7
646 12:20:50.887378 smbase 7b9e4400 entry 7b9ec400
647 12:20:50.887692 ss_start 7b9f4000 code_end 7b9ec608
648 12:20:50.889963 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
649 12:20:50.894007 Processing 11 relocs. Offset value of 0x7b9ee000
650 12:20:50.900018 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
651 12:20:50.907231 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
652 12:20:50.913675 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
653 12:20:50.920424 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
654 12:20:50.926845 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
655 12:20:50.930497 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
656 12:20:50.937178 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
657 12:20:50.943867 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
658 12:20:50.950200 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
659 12:20:50.957066 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
660 12:20:50.963719 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
661 12:20:50.970114 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
662 12:20:50.977202 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
663 12:20:50.980537 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
664 12:20:50.986664 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
665 12:20:50.993424 smm_module_setup_stub: stack_top = 0x7b804000
666 12:20:50.996769 smm_module_setup_stub: per cpu stack_size = 0x800
667 12:20:51.003816 smm_module_setup_stub: runtime.start32_offset = 0x4c
668 12:20:51.007046 smm_module_setup_stub: runtime.smm_size = 0x200000
669 12:20:51.013364 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
670 12:20:51.017892 Clearing SMI status registers
671 12:20:51.021144 SMI_STS: PM1
672 12:20:51.021705 PM1_STS: WAK PWRBTN
673 12:20:51.031514 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
674 12:20:51.034710 In relocation handler: CPU 0
675 12:20:51.037878 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
676 12:20:51.041202 Writing SMRR. base = 0x7b800006, mask=0xff800c00
677 12:20:51.044961 Relocation complete.
678 12:20:51.051348 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
679 12:20:51.054697 In relocation handler: CPU 5
680 12:20:51.057878 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
681 12:20:51.061477 Relocation complete.
682 12:20:51.067929 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
683 12:20:51.071362 In relocation handler: CPU 1
684 12:20:51.074891 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
685 12:20:51.081197 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 12:20:51.081682 Relocation complete.
687 12:20:51.087969 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
688 12:20:51.091474 In relocation handler: CPU 3
689 12:20:51.094849 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
690 12:20:51.101118 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 12:20:51.104491 Relocation complete.
692 12:20:51.111249 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
693 12:20:51.114453 In relocation handler: CPU 4
694 12:20:51.117756 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
695 12:20:51.121024 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 12:20:51.124526 Relocation complete.
697 12:20:51.131420 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
698 12:20:51.134647 In relocation handler: CPU 2
699 12:20:51.138104 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
700 12:20:51.144672 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 12:20:51.145290 Relocation complete.
702 12:20:51.151187 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
703 12:20:51.154313 In relocation handler: CPU 7
704 12:20:51.161355 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
705 12:20:51.161945 Relocation complete.
706 12:20:51.167497 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
707 12:20:51.171015 In relocation handler: CPU 6
708 12:20:51.177545 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
709 12:20:51.180764 Writing SMRR. base = 0x7b800006, mask=0xff800c00
710 12:20:51.184678 Relocation complete.
711 12:20:51.185312 Initializing CPU #0
712 12:20:51.187961 CPU: vendor Intel device 906a4
713 12:20:51.190847 CPU: family 06, model 9a, stepping 04
714 12:20:51.194340 Clearing out pending MCEs
715 12:20:51.197872 cpu: energy policy set to 7
716 12:20:51.201208 Turbo is available but hidden
717 12:20:51.204404 Turbo is available and visible
718 12:20:51.207961 microcode: Update skipped, already up-to-date
719 12:20:51.211317 CPU #0 initialized
720 12:20:51.211852 Initializing CPU #5
721 12:20:51.214384 Initializing CPU #3
722 12:20:51.217606 Initializing CPU #4
723 12:20:51.218144 Initializing CPU #2
724 12:20:51.221236 CPU: vendor Intel device 906a4
725 12:20:51.224434 CPU: family 06, model 9a, stepping 04
726 12:20:51.227441 CPU: vendor Intel device 906a4
727 12:20:51.231001 CPU: family 06, model 9a, stepping 04
728 12:20:51.234598 Clearing out pending MCEs
729 12:20:51.237787 Initializing CPU #1
730 12:20:51.241035 CPU: vendor Intel device 906a4
731 12:20:51.244511 CPU: family 06, model 9a, stepping 04
732 12:20:51.247644 cpu: energy policy set to 7
733 12:20:51.250931 Clearing out pending MCEs
734 12:20:51.251471 Clearing out pending MCEs
735 12:20:51.254231 cpu: energy policy set to 7
736 12:20:51.257973 CPU: vendor Intel device 906a4
737 12:20:51.261213 CPU: family 06, model 9a, stepping 04
738 12:20:51.264249 cpu: energy policy set to 7
739 12:20:51.270922 microcode: Update skipped, already up-to-date
740 12:20:51.271364 CPU #4 initialized
741 12:20:51.277841 microcode: Update skipped, already up-to-date
742 12:20:51.278380 CPU #3 initialized
743 12:20:51.280754 Initializing CPU #7
744 12:20:51.284264 Clearing out pending MCEs
745 12:20:51.287569 microcode: Update skipped, already up-to-date
746 12:20:51.288107 CPU #2 initialized
747 12:20:51.290850 cpu: energy policy set to 7
748 12:20:51.294327 CPU: vendor Intel device 906a4
749 12:20:51.297439 CPU: family 06, model 9a, stepping 04
750 12:20:51.300877 Initializing CPU #6
751 12:20:51.304420 microcode: Update skipped, already up-to-date
752 12:20:51.307784 CPU #1 initialized
753 12:20:51.311008 CPU: vendor Intel device 906a4
754 12:20:51.314156 CPU: family 06, model 9a, stepping 04
755 12:20:51.317786 CPU: vendor Intel device 906a4
756 12:20:51.320728 CPU: family 06, model 9a, stepping 04
757 12:20:51.324315 Clearing out pending MCEs
758 12:20:51.327533 Clearing out pending MCEs
759 12:20:51.327967 Clearing out pending MCEs
760 12:20:51.331149 cpu: energy policy set to 7
761 12:20:51.334555 cpu: energy policy set to 7
762 12:20:51.341232 microcode: Update skipped, already up-to-date
763 12:20:51.341774 CPU #5 initialized
764 12:20:51.347691 microcode: Update skipped, already up-to-date
765 12:20:51.348230 CPU #7 initialized
766 12:20:51.351122 cpu: energy policy set to 7
767 12:20:51.354387 microcode: Update skipped, already up-to-date
768 12:20:51.358071 CPU #6 initialized
769 12:20:51.360808 bsp_do_flight_plan done after 689 msecs.
770 12:20:51.364351 CPU: frequency set to 4400 MHz
771 12:20:51.367322 Enabling SMIs.
772 12:20:51.374257 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
773 12:20:51.388837 Probing TPM I2C: done! DID_VID 0x00281ae0
774 12:20:51.391943 Locality already claimed
775 12:20:51.395174 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
776 12:20:51.406735 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
777 12:20:51.409781 Enabling GPIO PM b/c CR50 has long IRQ pulse support
778 12:20:51.417122 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
779 12:20:51.423197 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
780 12:20:51.426420 Found a VBT of 9216 bytes after decompression
781 12:20:51.429674 PCI 1.0, PIN A, using IRQ #16
782 12:20:51.433263 PCI 2.0, PIN A, using IRQ #17
783 12:20:51.436737 PCI 4.0, PIN A, using IRQ #18
784 12:20:51.440379 PCI 5.0, PIN A, using IRQ #16
785 12:20:51.443203 PCI 6.0, PIN A, using IRQ #16
786 12:20:51.447169 PCI 6.2, PIN C, using IRQ #18
787 12:20:51.450128 PCI 7.0, PIN A, using IRQ #19
788 12:20:51.453982 PCI 7.1, PIN B, using IRQ #20
789 12:20:51.457033 PCI 7.2, PIN C, using IRQ #21
790 12:20:51.460260 PCI 7.3, PIN D, using IRQ #22
791 12:20:51.463556 PCI 8.0, PIN A, using IRQ #23
792 12:20:51.464096 PCI D.0, PIN A, using IRQ #17
793 12:20:51.466810 PCI D.1, PIN B, using IRQ #19
794 12:20:51.470039 PCI 10.0, PIN A, using IRQ #24
795 12:20:51.473113 PCI 10.1, PIN B, using IRQ #25
796 12:20:51.476557 PCI 10.6, PIN C, using IRQ #20
797 12:20:51.480423 PCI 10.7, PIN D, using IRQ #21
798 12:20:51.483458 PCI 11.0, PIN A, using IRQ #26
799 12:20:51.486934 PCI 11.1, PIN B, using IRQ #27
800 12:20:51.490168 PCI 11.2, PIN C, using IRQ #28
801 12:20:51.493255 PCI 11.3, PIN D, using IRQ #29
802 12:20:51.497083 PCI 12.0, PIN A, using IRQ #30
803 12:20:51.500231 PCI 12.6, PIN B, using IRQ #31
804 12:20:51.503687 PCI 12.7, PIN C, using IRQ #22
805 12:20:51.507083 PCI 13.0, PIN A, using IRQ #32
806 12:20:51.510353 PCI 13.1, PIN B, using IRQ #33
807 12:20:51.513636 PCI 13.2, PIN C, using IRQ #34
808 12:20:51.514179 PCI 13.3, PIN D, using IRQ #35
809 12:20:51.516892 PCI 14.0, PIN B, using IRQ #23
810 12:20:51.520428 PCI 14.1, PIN A, using IRQ #36
811 12:20:51.523768 PCI 14.3, PIN C, using IRQ #17
812 12:20:51.526928 PCI 15.0, PIN A, using IRQ #37
813 12:20:51.530199 PCI 15.1, PIN B, using IRQ #38
814 12:20:51.533554 PCI 15.2, PIN C, using IRQ #39
815 12:20:51.537496 PCI 15.3, PIN D, using IRQ #40
816 12:20:51.540075 PCI 16.0, PIN A, using IRQ #18
817 12:20:51.543920 PCI 16.1, PIN B, using IRQ #19
818 12:20:51.547197 PCI 16.2, PIN C, using IRQ #20
819 12:20:51.550355 PCI 16.3, PIN D, using IRQ #21
820 12:20:51.553633 PCI 16.4, PIN A, using IRQ #18
821 12:20:51.556830 PCI 16.5, PIN B, using IRQ #19
822 12:20:51.560118 PCI 17.0, PIN A, using IRQ #22
823 12:20:51.563419 PCI 19.0, PIN A, using IRQ #41
824 12:20:51.563958 PCI 19.1, PIN B, using IRQ #42
825 12:20:51.566952 PCI 19.2, PIN C, using IRQ #43
826 12:20:51.569925 PCI 1C.0, PIN A, using IRQ #16
827 12:20:51.573077 PCI 1C.1, PIN B, using IRQ #17
828 12:20:51.576636 PCI 1C.2, PIN C, using IRQ #18
829 12:20:51.580188 PCI 1C.3, PIN D, using IRQ #19
830 12:20:51.583325 PCI 1C.4, PIN A, using IRQ #16
831 12:20:51.587062 PCI 1C.5, PIN B, using IRQ #17
832 12:20:51.590129 PCI 1C.6, PIN C, using IRQ #18
833 12:20:51.593220 PCI 1C.7, PIN D, using IRQ #19
834 12:20:51.596889 PCI 1D.0, PIN A, using IRQ #16
835 12:20:51.600221 PCI 1D.1, PIN B, using IRQ #17
836 12:20:51.603469 PCI 1D.2, PIN C, using IRQ #18
837 12:20:51.606623 PCI 1D.3, PIN D, using IRQ #19
838 12:20:51.610167 PCI 1E.0, PIN A, using IRQ #23
839 12:20:51.613596 PCI 1E.1, PIN B, using IRQ #20
840 12:20:51.616596 PCI 1E.2, PIN C, using IRQ #44
841 12:20:51.617205 PCI 1E.3, PIN D, using IRQ #45
842 12:20:51.620011 PCI 1F.3, PIN B, using IRQ #22
843 12:20:51.623545 PCI 1F.4, PIN C, using IRQ #23
844 12:20:51.626722 PCI 1F.6, PIN D, using IRQ #20
845 12:20:51.629891 PCI 1F.7, PIN A, using IRQ #21
846 12:20:51.636858 IRQ: Using dynamically assigned PCI IO-APIC IRQs
847 12:20:51.643258 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
848 12:20:51.818713 FSPS returned 0
849 12:20:51.821871 Executing Phase 1 of FspMultiPhaseSiInit
850 12:20:51.832209 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
851 12:20:51.835317 port C0 DISC req: usage 1 usb3 1 usb2 1
852 12:20:51.838713 Raw Buffer output 0 00000111
853 12:20:51.841922 Raw Buffer output 1 00000000
854 12:20:51.845794 pmc_send_ipc_cmd succeeded
855 12:20:51.852257 port C1 DISC req: usage 1 usb3 3 usb2 3
856 12:20:51.852826 Raw Buffer output 0 00000331
857 12:20:51.855914 Raw Buffer output 1 00000000
858 12:20:51.859868 pmc_send_ipc_cmd succeeded
859 12:20:51.863669 Detected 6 core, 8 thread CPU.
860 12:20:51.867011 Detected 6 core, 8 thread CPU.
861 12:20:51.872007 Detected 6 core, 8 thread CPU.
862 12:20:51.875119 Detected 6 core, 8 thread CPU.
863 12:20:51.878732 Detected 6 core, 8 thread CPU.
864 12:20:51.881803 Detected 6 core, 8 thread CPU.
865 12:20:51.885872 Detected 6 core, 8 thread CPU.
866 12:20:51.889143 Detected 6 core, 8 thread CPU.
867 12:20:51.892456 Detected 6 core, 8 thread CPU.
868 12:20:51.895636 Detected 6 core, 8 thread CPU.
869 12:20:51.899328 Detected 6 core, 8 thread CPU.
870 12:20:51.902337 Detected 6 core, 8 thread CPU.
871 12:20:51.905851 Detected 6 core, 8 thread CPU.
872 12:20:51.909332 Detected 6 core, 8 thread CPU.
873 12:20:51.912710 Detected 6 core, 8 thread CPU.
874 12:20:51.916020 Detected 6 core, 8 thread CPU.
875 12:20:51.919163 Detected 6 core, 8 thread CPU.
876 12:20:51.922405 Detected 6 core, 8 thread CPU.
877 12:20:51.925755 Detected 6 core, 8 thread CPU.
878 12:20:51.926328 Detected 6 core, 8 thread CPU.
879 12:20:51.929302 Detected 6 core, 8 thread CPU.
880 12:20:51.932413 Detected 6 core, 8 thread CPU.
881 12:20:52.224459 Detected 6 core, 8 thread CPU.
882 12:20:52.228114 Detected 6 core, 8 thread CPU.
883 12:20:52.230885 Detected 6 core, 8 thread CPU.
884 12:20:52.234453 Detected 6 core, 8 thread CPU.
885 12:20:52.237605 Detected 6 core, 8 thread CPU.
886 12:20:52.240806 Detected 6 core, 8 thread CPU.
887 12:20:52.244427 Detected 6 core, 8 thread CPU.
888 12:20:52.248043 Detected 6 core, 8 thread CPU.
889 12:20:52.251291 Detected 6 core, 8 thread CPU.
890 12:20:52.254943 Detected 6 core, 8 thread CPU.
891 12:20:52.257895 Detected 6 core, 8 thread CPU.
892 12:20:52.261355 Detected 6 core, 8 thread CPU.
893 12:20:52.264595 Detected 6 core, 8 thread CPU.
894 12:20:52.267870 Detected 6 core, 8 thread CPU.
895 12:20:52.271230 Detected 6 core, 8 thread CPU.
896 12:20:52.274605 Detected 6 core, 8 thread CPU.
897 12:20:52.278007 Detected 6 core, 8 thread CPU.
898 12:20:52.278477 Detected 6 core, 8 thread CPU.
899 12:20:52.281526 Detected 6 core, 8 thread CPU.
900 12:20:52.284682 Detected 6 core, 8 thread CPU.
901 12:20:52.288305 Display FSP Version Info HOB
902 12:20:52.291424 Reference Code - CPU = c.0.65.70
903 12:20:52.294668 uCode Version = 0.0.4.23
904 12:20:52.297733 TXT ACM version = ff.ff.ff.ffff
905 12:20:52.301585 Reference Code - ME = c.0.65.70
906 12:20:52.304782 MEBx version = 0.0.0.0
907 12:20:52.308107 ME Firmware Version = Lite SKU
908 12:20:52.311384 Reference Code - PCH = c.0.65.70
909 12:20:52.314809 PCH-CRID Status = Disabled
910 12:20:52.318349 PCH-CRID Original Value = ff.ff.ff.ffff
911 12:20:52.321027 PCH-CRID New Value = ff.ff.ff.ffff
912 12:20:52.324920 OPROM - RST - RAID = ff.ff.ff.ffff
913 12:20:52.327938 PCH Hsio Version = 4.0.0.0
914 12:20:52.331123 Reference Code - SA - System Agent = c.0.65.70
915 12:20:52.334694 Reference Code - MRC = 0.0.3.80
916 12:20:52.338224 SA - PCIe Version = c.0.65.70
917 12:20:52.341328 SA-CRID Status = Disabled
918 12:20:52.344563 SA-CRID Original Value = 0.0.0.4
919 12:20:52.348065 SA-CRID New Value = 0.0.0.4
920 12:20:52.351633 OPROM - VBIOS = ff.ff.ff.ffff
921 12:20:52.354989 IO Manageability Engine FW Version = 24.0.4.0
922 12:20:52.358184 PHY Build Version = 0.0.0.2016
923 12:20:52.361450 Thunderbolt(TM) FW Version = 0.0.0.0
924 12:20:52.367931 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
925 12:20:52.374614 BS: BS_DEV_INIT_CHIPS run times (exec / console): 487 / 507 ms
926 12:20:52.375088 Enumerating buses...
927 12:20:52.381411 Show all devs... Before device enumeration.
928 12:20:52.381989 Root Device: enabled 1
929 12:20:52.384594 CPU_CLUSTER: 0: enabled 1
930 12:20:52.388288 DOMAIN: 0000: enabled 1
931 12:20:52.391453 GPIO: 0: enabled 1
932 12:20:52.392030 PCI: 00:00.0: enabled 1
933 12:20:52.394679 PCI: 00:01.0: enabled 0
934 12:20:52.397754 PCI: 00:01.1: enabled 0
935 12:20:52.398227 PCI: 00:02.0: enabled 1
936 12:20:52.401231 PCI: 00:04.0: enabled 1
937 12:20:52.404574 PCI: 00:05.0: enabled 0
938 12:20:52.408033 PCI: 00:06.0: enabled 1
939 12:20:52.408616 PCI: 00:06.2: enabled 0
940 12:20:52.411591 PCI: 00:07.0: enabled 0
941 12:20:52.414583 PCI: 00:07.1: enabled 0
942 12:20:52.418031 PCI: 00:07.2: enabled 0
943 12:20:52.418622 PCI: 00:07.3: enabled 0
944 12:20:52.421147 PCI: 00:08.0: enabled 0
945 12:20:52.424739 PCI: 00:09.0: enabled 0
946 12:20:52.428099 PCI: 00:0a.0: enabled 1
947 12:20:52.428659 PCI: 00:0d.0: enabled 1
948 12:20:52.431286 PCI: 00:0d.1: enabled 0
949 12:20:52.434345 PCI: 00:0d.2: enabled 0
950 12:20:52.434917 PCI: 00:0d.3: enabled 0
951 12:20:52.437531 PCI: 00:0e.0: enabled 0
952 12:20:52.440757 PCI: 00:10.0: enabled 0
953 12:20:52.444517 PCI: 00:10.1: enabled 0
954 12:20:52.445132 PCI: 00:10.6: enabled 0
955 12:20:52.447964 PCI: 00:10.7: enabled 0
956 12:20:52.451225 PCI: 00:12.0: enabled 0
957 12:20:52.454454 PCI: 00:12.6: enabled 0
958 12:20:52.455023 PCI: 00:12.7: enabled 0
959 12:20:52.457348 PCI: 00:13.0: enabled 0
960 12:20:52.460610 PCI: 00:14.0: enabled 1
961 12:20:52.464124 PCI: 00:14.1: enabled 0
962 12:20:52.464590 PCI: 00:14.2: enabled 1
963 12:20:52.467864 PCI: 00:14.3: enabled 1
964 12:20:52.470924 PCI: 00:15.0: enabled 1
965 12:20:52.474220 PCI: 00:15.1: enabled 1
966 12:20:52.474889 PCI: 00:15.2: enabled 0
967 12:20:52.477688 PCI: 00:15.3: enabled 1
968 12:20:52.480910 PCI: 00:16.0: enabled 1
969 12:20:52.481434 PCI: 00:16.1: enabled 0
970 12:20:52.484494 PCI: 00:16.2: enabled 0
971 12:20:52.487738 PCI: 00:16.3: enabled 0
972 12:20:52.490979 PCI: 00:16.4: enabled 0
973 12:20:52.491552 PCI: 00:16.5: enabled 0
974 12:20:52.493960 PCI: 00:17.0: enabled 1
975 12:20:52.497816 PCI: 00:19.0: enabled 0
976 12:20:52.500901 PCI: 00:19.1: enabled 1
977 12:20:52.501548 PCI: 00:19.2: enabled 0
978 12:20:52.504127 PCI: 00:1a.0: enabled 0
979 12:20:52.507494 PCI: 00:1c.0: enabled 0
980 12:20:52.510918 PCI: 00:1c.1: enabled 0
981 12:20:52.511491 PCI: 00:1c.2: enabled 0
982 12:20:52.513716 PCI: 00:1c.3: enabled 0
983 12:20:52.517575 PCI: 00:1c.4: enabled 0
984 12:20:52.520629 PCI: 00:1c.5: enabled 0
985 12:20:52.521246 PCI: 00:1c.6: enabled 0
986 12:20:52.523808 PCI: 00:1c.7: enabled 0
987 12:20:52.527183 PCI: 00:1d.0: enabled 0
988 12:20:52.530200 PCI: 00:1d.1: enabled 0
989 12:20:52.530677 PCI: 00:1d.2: enabled 0
990 12:20:52.533846 PCI: 00:1d.3: enabled 0
991 12:20:52.537356 PCI: 00:1e.0: enabled 1
992 12:20:52.537933 PCI: 00:1e.1: enabled 0
993 12:20:52.540833 PCI: 00:1e.2: enabled 0
994 12:20:52.544120 PCI: 00:1e.3: enabled 1
995 12:20:52.547273 PCI: 00:1f.0: enabled 1
996 12:20:52.547847 PCI: 00:1f.1: enabled 0
997 12:20:52.550593 PCI: 00:1f.2: enabled 1
998 12:20:52.553560 PCI: 00:1f.3: enabled 1
999 12:20:52.557155 PCI: 00:1f.4: enabled 0
1000 12:20:52.557729 PCI: 00:1f.5: enabled 1
1001 12:20:52.560728 PCI: 00:1f.6: enabled 0
1002 12:20:52.563976 PCI: 00:1f.7: enabled 0
1003 12:20:52.567212 GENERIC: 0.0: enabled 1
1004 12:20:52.567861 GENERIC: 0.0: enabled 1
1005 12:20:52.570583 GENERIC: 1.0: enabled 1
1006 12:20:52.573748 GENERIC: 0.0: enabled 1
1007 12:20:52.574239 GENERIC: 1.0: enabled 1
1008 12:20:52.576960 USB0 port 0: enabled 1
1009 12:20:52.580453 USB0 port 0: enabled 1
1010 12:20:52.583687 GENERIC: 0.0: enabled 1
1011 12:20:52.584291 I2C: 00:1a: enabled 1
1012 12:20:52.587325 I2C: 00:31: enabled 1
1013 12:20:52.590812 I2C: 00:32: enabled 1
1014 12:20:52.591419 I2C: 00:50: enabled 1
1015 12:20:52.593613 I2C: 00:10: enabled 1
1016 12:20:52.597154 I2C: 00:15: enabled 1
1017 12:20:52.597762 I2C: 00:2c: enabled 1
1018 12:20:52.600404 GENERIC: 0.0: enabled 1
1019 12:20:52.603676 SPI: 00: enabled 1
1020 12:20:52.604269 PNP: 0c09.0: enabled 1
1021 12:20:52.606967 GENERIC: 0.0: enabled 1
1022 12:20:52.610711 USB3 port 0: enabled 1
1023 12:20:52.613952 USB3 port 1: enabled 0
1024 12:20:52.614549 USB3 port 2: enabled 1
1025 12:20:52.617370 USB3 port 3: enabled 0
1026 12:20:52.620158 USB2 port 0: enabled 1
1027 12:20:52.620646 USB2 port 1: enabled 0
1028 12:20:52.623687 USB2 port 2: enabled 1
1029 12:20:52.627340 USB2 port 3: enabled 0
1030 12:20:52.627927 USB2 port 4: enabled 0
1031 12:20:52.630430 USB2 port 5: enabled 1
1032 12:20:52.633550 USB2 port 6: enabled 0
1033 12:20:52.636903 USB2 port 7: enabled 0
1034 12:20:52.637553 USB2 port 8: enabled 1
1035 12:20:52.640169 USB2 port 9: enabled 1
1036 12:20:52.643752 USB3 port 0: enabled 1
1037 12:20:52.644342 USB3 port 1: enabled 0
1038 12:20:52.646891 USB3 port 2: enabled 0
1039 12:20:52.650688 USB3 port 3: enabled 0
1040 12:20:52.653697 GENERIC: 0.0: enabled 1
1041 12:20:52.654187 GENERIC: 1.0: enabled 1
1042 12:20:52.657086 APIC: 00: enabled 1
1043 12:20:52.660231 APIC: 1a: enabled 1
1044 12:20:52.660818 APIC: 1c: enabled 1
1045 12:20:52.663513 APIC: 1e: enabled 1
1046 12:20:52.664097 APIC: 18: enabled 1
1047 12:20:52.666762 APIC: 01: enabled 1
1048 12:20:52.669783 APIC: 08: enabled 1
1049 12:20:52.670283 APIC: 09: enabled 1
1050 12:20:52.673100 Compare with tree...
1051 12:20:52.676570 Root Device: enabled 1
1052 12:20:52.677205 CPU_CLUSTER: 0: enabled 1
1053 12:20:52.680072 APIC: 00: enabled 1
1054 12:20:52.683442 APIC: 1a: enabled 1
1055 12:20:52.684028 APIC: 1c: enabled 1
1056 12:20:52.686665 APIC: 1e: enabled 1
1057 12:20:52.689702 APIC: 18: enabled 1
1058 12:20:52.690190 APIC: 01: enabled 1
1059 12:20:52.693167 APIC: 08: enabled 1
1060 12:20:52.696776 APIC: 09: enabled 1
1061 12:20:52.700122 DOMAIN: 0000: enabled 1
1062 12:20:52.700712 GPIO: 0: enabled 1
1063 12:20:52.703357 PCI: 00:00.0: enabled 1
1064 12:20:52.706699 PCI: 00:01.0: enabled 0
1065 12:20:52.709767 PCI: 00:01.1: enabled 0
1066 12:20:52.710255 PCI: 00:02.0: enabled 1
1067 12:20:52.713557 PCI: 00:04.0: enabled 1
1068 12:20:52.716748 GENERIC: 0.0: enabled 1
1069 12:20:52.720032 PCI: 00:05.0: enabled 0
1070 12:20:52.723294 PCI: 00:06.0: enabled 1
1071 12:20:52.723786 PCI: 00:06.2: enabled 0
1072 12:20:52.726712 PCI: 00:08.0: enabled 0
1073 12:20:52.729875 PCI: 00:09.0: enabled 0
1074 12:20:52.733521 PCI: 00:0a.0: enabled 1
1075 12:20:52.736700 PCI: 00:0d.0: enabled 1
1076 12:20:52.737332 USB0 port 0: enabled 1
1077 12:20:52.739879 USB3 port 0: enabled 1
1078 12:20:52.742774 USB3 port 1: enabled 0
1079 12:20:52.746807 USB3 port 2: enabled 1
1080 12:20:52.749531 USB3 port 3: enabled 0
1081 12:20:52.753274 PCI: 00:0d.1: enabled 0
1082 12:20:52.753860 PCI: 00:0d.2: enabled 0
1083 12:20:52.756537 PCI: 00:0d.3: enabled 0
1084 12:20:52.759988 PCI: 00:0e.0: enabled 0
1085 12:20:52.762871 PCI: 00:10.0: enabled 0
1086 12:20:52.763457 PCI: 00:10.1: enabled 0
1087 12:20:52.766573 PCI: 00:10.6: enabled 0
1088 12:20:52.769895 PCI: 00:10.7: enabled 0
1089 12:20:52.772736 PCI: 00:12.0: enabled 0
1090 12:20:52.776846 PCI: 00:12.6: enabled 0
1091 12:20:52.777481 PCI: 00:12.7: enabled 0
1092 12:20:52.779688 PCI: 00:13.0: enabled 0
1093 12:20:52.782929 PCI: 00:14.0: enabled 1
1094 12:20:52.786412 USB0 port 0: enabled 1
1095 12:20:52.789900 USB2 port 0: enabled 1
1096 12:20:52.790463 USB2 port 1: enabled 0
1097 12:20:52.793280 USB2 port 2: enabled 1
1098 12:20:52.796592 USB2 port 3: enabled 0
1099 12:20:52.799720 USB2 port 4: enabled 0
1100 12:20:52.803225 USB2 port 5: enabled 1
1101 12:20:52.806521 USB2 port 6: enabled 0
1102 12:20:52.807112 USB2 port 7: enabled 0
1103 12:20:52.809650 USB2 port 8: enabled 1
1104 12:20:52.813121 USB2 port 9: enabled 1
1105 12:20:52.816422 USB3 port 0: enabled 1
1106 12:20:52.819883 USB3 port 1: enabled 0
1107 12:20:52.822726 USB3 port 2: enabled 0
1108 12:20:52.823245 USB3 port 3: enabled 0
1109 12:20:52.826172 PCI: 00:14.1: enabled 0
1110 12:20:52.829496 PCI: 00:14.2: enabled 1
1111 12:20:52.832506 PCI: 00:14.3: enabled 1
1112 12:20:52.836086 GENERIC: 0.0: enabled 1
1113 12:20:52.836678 PCI: 00:15.0: enabled 1
1114 12:20:52.839349 I2C: 00:1a: enabled 1
1115 12:20:52.843184 I2C: 00:31: enabled 1
1116 12:20:52.846263 I2C: 00:32: enabled 1
1117 12:20:52.846823 PCI: 00:15.1: enabled 1
1118 12:20:52.849586 I2C: 00:50: enabled 1
1119 12:20:52.852593 PCI: 00:15.2: enabled 0
1120 12:20:52.856161 PCI: 00:15.3: enabled 1
1121 12:20:52.859318 I2C: 00:10: enabled 1
1122 12:20:52.859885 PCI: 00:16.0: enabled 1
1123 12:20:52.862966 PCI: 00:16.1: enabled 0
1124 12:20:52.865969 PCI: 00:16.2: enabled 0
1125 12:20:52.869228 PCI: 00:16.3: enabled 0
1126 12:20:52.872359 PCI: 00:16.4: enabled 0
1127 12:20:52.872830 PCI: 00:16.5: enabled 0
1128 12:20:52.875951 PCI: 00:17.0: enabled 1
1129 12:20:52.879005 PCI: 00:19.0: enabled 0
1130 12:20:52.882925 PCI: 00:19.1: enabled 1
1131 12:20:52.886082 I2C: 00:15: enabled 1
1132 12:20:52.886671 I2C: 00:2c: enabled 1
1133 12:20:52.889300 PCI: 00:19.2: enabled 0
1134 12:20:52.892477 PCI: 00:1a.0: enabled 0
1135 12:20:52.895793 PCI: 00:1e.0: enabled 1
1136 12:20:52.896378 PCI: 00:1e.1: enabled 0
1137 12:20:52.899304 PCI: 00:1e.2: enabled 0
1138 12:20:52.902498 PCI: 00:1e.3: enabled 1
1139 12:20:52.905840 SPI: 00: enabled 1
1140 12:20:52.908944 PCI: 00:1f.0: enabled 1
1141 12:20:52.909587 PNP: 0c09.0: enabled 1
1142 12:20:52.912737 PCI: 00:1f.1: enabled 0
1143 12:20:52.915939 PCI: 00:1f.2: enabled 1
1144 12:20:52.919159 GENERIC: 0.0: enabled 1
1145 12:20:52.922097 GENERIC: 0.0: enabled 1
1146 12:20:52.922633 GENERIC: 1.0: enabled 1
1147 12:20:52.926297 PCI: 00:1f.3: enabled 1
1148 12:20:52.929009 PCI: 00:1f.4: enabled 0
1149 12:20:52.932566 PCI: 00:1f.5: enabled 1
1150 12:20:52.936075 PCI: 00:1f.6: enabled 0
1151 12:20:52.936664 PCI: 00:1f.7: enabled 0
1152 12:20:52.939020 Root Device scanning...
1153 12:20:52.942086 scan_static_bus for Root Device
1154 12:20:52.945754 CPU_CLUSTER: 0 enabled
1155 12:20:52.946343 DOMAIN: 0000 enabled
1156 12:20:52.948833 DOMAIN: 0000 scanning...
1157 12:20:52.952329 PCI: pci_scan_bus for bus 00
1158 12:20:52.955330 PCI: 00:00.0 [8086/0000] ops
1159 12:20:52.959087 PCI: 00:00.0 [8086/4609] enabled
1160 12:20:52.962266 PCI: 00:02.0 [8086/0000] bus ops
1161 12:20:52.965609 PCI: 00:02.0 [8086/46b3] enabled
1162 12:20:52.969062 PCI: 00:04.0 [8086/0000] bus ops
1163 12:20:52.971880 PCI: 00:04.0 [8086/461d] enabled
1164 12:20:52.975565 PCI: 00:06.0 [8086/0000] bus ops
1165 12:20:52.978725 PCI: 00:06.0 [8086/464d] enabled
1166 12:20:52.981835 PCI: 00:08.0 [8086/464f] disabled
1167 12:20:52.985617 PCI: 00:0a.0 [8086/467d] enabled
1168 12:20:52.989019 PCI: 00:0d.0 [8086/0000] bus ops
1169 12:20:52.992328 PCI: 00:0d.0 [8086/461e] enabled
1170 12:20:52.995297 PCI: 00:14.0 [8086/0000] bus ops
1171 12:20:52.999156 PCI: 00:14.0 [8086/51ed] enabled
1172 12:20:53.002335 PCI: 00:14.2 [8086/51ef] enabled
1173 12:20:53.005474 PCI: 00:14.3 [8086/0000] bus ops
1174 12:20:53.008892 PCI: 00:14.3 [8086/51f0] enabled
1175 12:20:53.012305 PCI: 00:15.0 [8086/0000] bus ops
1176 12:20:53.015667 PCI: 00:15.0 [8086/51e8] enabled
1177 12:20:53.018813 PCI: 00:15.1 [8086/0000] bus ops
1178 12:20:53.022341 PCI: 00:15.1 [8086/51e9] enabled
1179 12:20:53.025892 PCI: 00:15.2 [8086/0000] bus ops
1180 12:20:53.029115 PCI: 00:15.2 [8086/51ea] disabled
1181 12:20:53.032218 PCI: 00:15.3 [8086/0000] bus ops
1182 12:20:53.035676 PCI: 00:15.3 [8086/51eb] enabled
1183 12:20:53.038916 PCI: 00:16.0 [8086/0000] ops
1184 12:20:53.042204 PCI: 00:16.0 [8086/51e0] enabled
1185 12:20:53.048932 PCI: Static device PCI: 00:17.0 not found, disabling it.
1186 12:20:53.051960 PCI: 00:19.0 [8086/0000] bus ops
1187 12:20:53.055539 PCI: 00:19.0 [8086/51c5] disabled
1188 12:20:53.058667 PCI: 00:19.1 [8086/0000] bus ops
1189 12:20:53.061894 PCI: 00:19.1 [8086/51c6] enabled
1190 12:20:53.065528 PCI: 00:1e.0 [8086/0000] ops
1191 12:20:53.068885 PCI: 00:1e.0 [8086/51a8] enabled
1192 12:20:53.071917 PCI: 00:1e.3 [8086/0000] bus ops
1193 12:20:53.075157 PCI: 00:1e.3 [8086/51ab] enabled
1194 12:20:53.079063 PCI: 00:1f.0 [8086/0000] bus ops
1195 12:20:53.081783 PCI: 00:1f.0 [8086/5182] enabled
1196 12:20:53.085434 RTC Init
1197 12:20:53.088811 Set power on after power failure.
1198 12:20:53.089435 Disabling Deep S3
1199 12:20:53.092027 Disabling Deep S3
1200 12:20:53.092586 Disabling Deep S4
1201 12:20:53.095217 Disabling Deep S4
1202 12:20:53.098688 Disabling Deep S5
1203 12:20:53.099153 Disabling Deep S5
1204 12:20:53.101839 PCI: 00:1f.2 [0000/0000] hidden
1205 12:20:53.105109 PCI: 00:1f.3 [8086/0000] bus ops
1206 12:20:53.108715 PCI: 00:1f.3 [8086/51c8] enabled
1207 12:20:53.111750 PCI: 00:1f.5 [8086/0000] bus ops
1208 12:20:53.115459 PCI: 00:1f.5 [8086/51a4] enabled
1209 12:20:53.118819 GPIO: 0 enabled
1210 12:20:53.119375 PCI: Leftover static devices:
1211 12:20:53.121906 PCI: 00:01.0
1212 12:20:53.122464 PCI: 00:01.1
1213 12:20:53.125217 PCI: 00:05.0
1214 12:20:53.125770 PCI: 00:06.2
1215 12:20:53.129005 PCI: 00:09.0
1216 12:20:53.129583 PCI: 00:0d.1
1217 12:20:53.129950 PCI: 00:0d.2
1218 12:20:53.132211 PCI: 00:0d.3
1219 12:20:53.132767 PCI: 00:0e.0
1220 12:20:53.135401 PCI: 00:10.0
1221 12:20:53.135960 PCI: 00:10.1
1222 12:20:53.136331 PCI: 00:10.6
1223 12:20:53.138777 PCI: 00:10.7
1224 12:20:53.139334 PCI: 00:12.0
1225 12:20:53.141989 PCI: 00:12.6
1226 12:20:53.142549 PCI: 00:12.7
1227 12:20:53.142921 PCI: 00:13.0
1228 12:20:53.145298 PCI: 00:14.1
1229 12:20:53.145852 PCI: 00:16.1
1230 12:20:53.148911 PCI: 00:16.2
1231 12:20:53.149505 PCI: 00:16.3
1232 12:20:53.151910 PCI: 00:16.4
1233 12:20:53.152464 PCI: 00:16.5
1234 12:20:53.152832 PCI: 00:17.0
1235 12:20:53.155561 PCI: 00:19.2
1236 12:20:53.156119 PCI: 00:1a.0
1237 12:20:53.158506 PCI: 00:1e.1
1238 12:20:53.159065 PCI: 00:1e.2
1239 12:20:53.159507 PCI: 00:1f.1
1240 12:20:53.161754 PCI: 00:1f.4
1241 12:20:53.162213 PCI: 00:1f.6
1242 12:20:53.165366 PCI: 00:1f.7
1243 12:20:53.168560 PCI: Check your devicetree.cb.
1244 12:20:53.169152 PCI: 00:02.0 scanning...
1245 12:20:53.171744 scan_generic_bus for PCI: 00:02.0
1246 12:20:53.178530 scan_generic_bus for PCI: 00:02.0 done
1247 12:20:53.182133 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1248 12:20:53.184921 PCI: 00:04.0 scanning...
1249 12:20:53.188526 scan_generic_bus for PCI: 00:04.0
1250 12:20:53.189140 GENERIC: 0.0 enabled
1251 12:20:53.195385 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1252 12:20:53.202089 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1253 12:20:53.202640 PCI: 00:06.0 scanning...
1254 12:20:53.208548 do_pci_scan_bridge for PCI: 00:06.0
1255 12:20:53.209159 PCI: pci_scan_bus for bus 01
1256 12:20:53.211869 PCI: 01:00.0 [15b7/5009] enabled
1257 12:20:53.215598 Enabling Common Clock Configuration
1258 12:20:53.222130 L1 Sub-State supported from root port 6
1259 12:20:53.225429 L1 Sub-State Support = 0x5
1260 12:20:53.225984 CommonModeRestoreTime = 0x6e
1261 12:20:53.231970 Power On Value = 0x5, Power On Scale = 0x2
1262 12:20:53.232531 ASPM: Enabled L1
1263 12:20:53.235602 PCIe: Max_Payload_Size adjusted to 256
1264 12:20:53.238572 PCI: 01:00.0: Enabled LTR
1265 12:20:53.241887 PCI: 01:00.0: Programmed LTR max latencies
1266 12:20:53.248458 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1267 12:20:53.251690 PCI: 00:0d.0 scanning...
1268 12:20:53.255459 scan_static_bus for PCI: 00:0d.0
1269 12:20:53.256015 USB0 port 0 enabled
1270 12:20:53.258794 USB0 port 0 scanning...
1271 12:20:53.262087 scan_static_bus for USB0 port 0
1272 12:20:53.265145 USB3 port 0 enabled
1273 12:20:53.265696 USB3 port 1 disabled
1274 12:20:53.268950 USB3 port 2 enabled
1275 12:20:53.271957 USB3 port 3 disabled
1276 12:20:53.272415 USB3 port 0 scanning...
1277 12:20:53.275216 scan_static_bus for USB3 port 0
1278 12:20:53.278555 scan_static_bus for USB3 port 0 done
1279 12:20:53.285233 scan_bus: bus USB3 port 0 finished in 6 msecs
1280 12:20:53.285783 USB3 port 2 scanning...
1281 12:20:53.288935 scan_static_bus for USB3 port 2
1282 12:20:53.295325 scan_static_bus for USB3 port 2 done
1283 12:20:53.298704 scan_bus: bus USB3 port 2 finished in 6 msecs
1284 12:20:53.301793 scan_static_bus for USB0 port 0 done
1285 12:20:53.305412 scan_bus: bus USB0 port 0 finished in 43 msecs
1286 12:20:53.311933 scan_static_bus for PCI: 00:0d.0 done
1287 12:20:53.315838 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1288 12:20:53.319199 PCI: 00:14.0 scanning...
1289 12:20:53.322303 scan_static_bus for PCI: 00:14.0
1290 12:20:53.322952 USB0 port 0 enabled
1291 12:20:53.325120 USB0 port 0 scanning...
1292 12:20:53.328925 scan_static_bus for USB0 port 0
1293 12:20:53.332255 USB2 port 0 enabled
1294 12:20:53.332811 USB2 port 1 disabled
1295 12:20:53.335418 USB2 port 2 enabled
1296 12:20:53.338614 USB2 port 3 disabled
1297 12:20:53.339171 USB2 port 4 disabled
1298 12:20:53.341930 USB2 port 5 enabled
1299 12:20:53.342484 USB2 port 6 disabled
1300 12:20:53.345578 USB2 port 7 disabled
1301 12:20:53.348277 USB2 port 8 enabled
1302 12:20:53.348735 USB2 port 9 enabled
1303 12:20:53.351982 USB3 port 0 enabled
1304 12:20:53.355291 USB3 port 1 disabled
1305 12:20:53.355748 USB3 port 2 disabled
1306 12:20:53.358549 USB3 port 3 disabled
1307 12:20:53.361573 USB2 port 0 scanning...
1308 12:20:53.365499 scan_static_bus for USB2 port 0
1309 12:20:53.368467 scan_static_bus for USB2 port 0 done
1310 12:20:53.371770 scan_bus: bus USB2 port 0 finished in 6 msecs
1311 12:20:53.375059 USB2 port 2 scanning...
1312 12:20:53.378558 scan_static_bus for USB2 port 2
1313 12:20:53.381876 scan_static_bus for USB2 port 2 done
1314 12:20:53.385270 scan_bus: bus USB2 port 2 finished in 6 msecs
1315 12:20:53.388723 USB2 port 5 scanning...
1316 12:20:53.392057 scan_static_bus for USB2 port 5
1317 12:20:53.394964 scan_static_bus for USB2 port 5 done
1318 12:20:53.401994 scan_bus: bus USB2 port 5 finished in 6 msecs
1319 12:20:53.402554 USB2 port 8 scanning...
1320 12:20:53.405152 scan_static_bus for USB2 port 8
1321 12:20:53.408576 scan_static_bus for USB2 port 8 done
1322 12:20:53.415247 scan_bus: bus USB2 port 8 finished in 6 msecs
1323 12:20:53.415803 USB2 port 9 scanning...
1324 12:20:53.418958 scan_static_bus for USB2 port 9
1325 12:20:53.425454 scan_static_bus for USB2 port 9 done
1326 12:20:53.428722 scan_bus: bus USB2 port 9 finished in 6 msecs
1327 12:20:53.431829 USB3 port 0 scanning...
1328 12:20:53.434827 scan_static_bus for USB3 port 0
1329 12:20:53.438797 scan_static_bus for USB3 port 0 done
1330 12:20:53.441731 scan_bus: bus USB3 port 0 finished in 6 msecs
1331 12:20:53.445097 scan_static_bus for USB0 port 0 done
1332 12:20:53.451884 scan_bus: bus USB0 port 0 finished in 120 msecs
1333 12:20:53.455025 scan_static_bus for PCI: 00:14.0 done
1334 12:20:53.458720 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1335 12:20:53.461707 PCI: 00:14.3 scanning...
1336 12:20:53.465076 scan_static_bus for PCI: 00:14.3
1337 12:20:53.468521 GENERIC: 0.0 enabled
1338 12:20:53.471625 scan_static_bus for PCI: 00:14.3 done
1339 12:20:53.474982 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1340 12:20:53.478515 PCI: 00:15.0 scanning...
1341 12:20:53.481846 scan_static_bus for PCI: 00:15.0
1342 12:20:53.484904 I2C: 00:1a enabled
1343 12:20:53.485466 I2C: 00:31 enabled
1344 12:20:53.488160 I2C: 00:32 enabled
1345 12:20:53.491984 scan_static_bus for PCI: 00:15.0 done
1346 12:20:53.495245 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1347 12:20:53.498327 PCI: 00:15.1 scanning...
1348 12:20:53.501608 scan_static_bus for PCI: 00:15.1
1349 12:20:53.505008 I2C: 00:50 enabled
1350 12:20:53.508624 scan_static_bus for PCI: 00:15.1 done
1351 12:20:53.511915 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1352 12:20:53.514927 PCI: 00:15.3 scanning...
1353 12:20:53.518726 scan_static_bus for PCI: 00:15.3
1354 12:20:53.521847 I2C: 00:10 enabled
1355 12:20:53.524948 scan_static_bus for PCI: 00:15.3 done
1356 12:20:53.528559 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1357 12:20:53.531849 PCI: 00:19.1 scanning...
1358 12:20:53.534721 scan_static_bus for PCI: 00:19.1
1359 12:20:53.535185 I2C: 00:15 enabled
1360 12:20:53.538203 I2C: 00:2c enabled
1361 12:20:53.541649 scan_static_bus for PCI: 00:19.1 done
1362 12:20:53.548271 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1363 12:20:53.548760 PCI: 00:1e.3 scanning...
1364 12:20:53.551928 scan_generic_bus for PCI: 00:1e.3
1365 12:20:53.554984 SPI: 00 enabled
1366 12:20:53.561677 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1367 12:20:53.565333 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1368 12:20:53.568452 PCI: 00:1f.0 scanning...
1369 12:20:53.571424 scan_static_bus for PCI: 00:1f.0
1370 12:20:53.574759 PNP: 0c09.0 enabled
1371 12:20:53.575239 PNP: 0c09.0 scanning...
1372 12:20:53.577843 scan_static_bus for PNP: 0c09.0
1373 12:20:53.581633 scan_static_bus for PNP: 0c09.0 done
1374 12:20:53.588342 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1375 12:20:53.591765 scan_static_bus for PCI: 00:1f.0 done
1376 12:20:53.595235 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1377 12:20:53.598363 PCI: 00:1f.2 scanning...
1378 12:20:53.601519 scan_static_bus for PCI: 00:1f.2
1379 12:20:53.604929 GENERIC: 0.0 enabled
1380 12:20:53.608157 GENERIC: 0.0 scanning...
1381 12:20:53.611893 scan_static_bus for GENERIC: 0.0
1382 12:20:53.612453 GENERIC: 0.0 enabled
1383 12:20:53.615186 GENERIC: 1.0 enabled
1384 12:20:53.618220 scan_static_bus for GENERIC: 0.0 done
1385 12:20:53.621637 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1386 12:20:53.628424 scan_static_bus for PCI: 00:1f.2 done
1387 12:20:53.631643 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1388 12:20:53.635207 PCI: 00:1f.3 scanning...
1389 12:20:53.638494 scan_static_bus for PCI: 00:1f.3
1390 12:20:53.641456 scan_static_bus for PCI: 00:1f.3 done
1391 12:20:53.644881 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1392 12:20:53.648536 PCI: 00:1f.5 scanning...
1393 12:20:53.651412 scan_generic_bus for PCI: 00:1f.5
1394 12:20:53.654855 scan_generic_bus for PCI: 00:1f.5 done
1395 12:20:53.661512 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1396 12:20:53.665190 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1397 12:20:53.668034 scan_static_bus for Root Device done
1398 12:20:53.674508 scan_bus: bus Root Device finished in 729 msecs
1399 12:20:53.675055 done
1400 12:20:53.681529 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1401 12:20:53.684639 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1402 12:20:53.691468 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1403 12:20:53.694628 SPI flash protection: WPSW=1 SRP0=0
1404 12:20:53.701382 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1405 12:20:53.707860 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1406 12:20:53.708421 found VGA at PCI: 00:02.0
1407 12:20:53.711624 Setting up VGA for PCI: 00:02.0
1408 12:20:53.718035 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1409 12:20:53.721327 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1410 12:20:53.724274 Allocating resources...
1411 12:20:53.728203 Reading resources...
1412 12:20:53.731477 Root Device read_resources bus 0 link: 0
1413 12:20:53.734565 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1414 12:20:53.741129 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1415 12:20:53.744401 DOMAIN: 0000 read_resources bus 0 link: 0
1416 12:20:53.751435 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1417 12:20:53.757881 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1418 12:20:53.764453 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1419 12:20:53.770963 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1420 12:20:53.774245 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1421 12:20:53.781209 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1422 12:20:53.787935 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1423 12:20:53.794104 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1424 12:20:53.800777 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1425 12:20:53.807968 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1426 12:20:53.814282 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1427 12:20:53.821272 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1428 12:20:53.827873 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1429 12:20:53.834264 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1430 12:20:53.840875 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1431 12:20:53.844753 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1432 12:20:53.851141 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1433 12:20:53.857951 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1434 12:20:53.864586 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1435 12:20:53.871162 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1436 12:20:53.877765 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1437 12:20:53.881051 PCI: 00:04.0 read_resources bus 1 link: 0
1438 12:20:53.884634 PCI: 00:04.0 read_resources bus 1 link: 0 done
1439 12:20:53.891276 PCI: 00:06.0 read_resources bus 1 link: 0
1440 12:20:53.894636 PCI: 00:06.0 read_resources bus 1 link: 0 done
1441 12:20:53.898809 PCI: 00:0d.0 read_resources bus 0 link: 0
1442 12:20:53.902357 USB0 port 0 read_resources bus 0 link: 0
1443 12:20:53.908877 USB0 port 0 read_resources bus 0 link: 0 done
1444 12:20:53.912372 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1445 12:20:53.915923 PCI: 00:14.0 read_resources bus 0 link: 0
1446 12:20:53.922664 USB0 port 0 read_resources bus 0 link: 0
1447 12:20:53.925651 USB0 port 0 read_resources bus 0 link: 0 done
1448 12:20:53.929079 PCI: 00:14.0 read_resources bus 0 link: 0 done
1449 12:20:53.936040 PCI: 00:14.3 read_resources bus 0 link: 0
1450 12:20:53.938827 PCI: 00:14.3 read_resources bus 0 link: 0 done
1451 12:20:53.942143 PCI: 00:15.0 read_resources bus 0 link: 0
1452 12:20:53.949309 PCI: 00:15.0 read_resources bus 0 link: 0 done
1453 12:20:53.952362 PCI: 00:15.1 read_resources bus 0 link: 0
1454 12:20:53.955874 PCI: 00:15.1 read_resources bus 0 link: 0 done
1455 12:20:53.962639 PCI: 00:15.3 read_resources bus 0 link: 0
1456 12:20:53.965754 PCI: 00:15.3 read_resources bus 0 link: 0 done
1457 12:20:53.969104 PCI: 00:19.1 read_resources bus 0 link: 0
1458 12:20:53.975712 PCI: 00:19.1 read_resources bus 0 link: 0 done
1459 12:20:53.978823 PCI: 00:1e.3 read_resources bus 2 link: 0
1460 12:20:53.985738 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1461 12:20:53.989003 PCI: 00:1f.0 read_resources bus 0 link: 0
1462 12:20:53.992130 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1463 12:20:53.999062 PCI: 00:1f.2 read_resources bus 0 link: 0
1464 12:20:54.002260 GENERIC: 0.0 read_resources bus 0 link: 0
1465 12:20:54.005743 GENERIC: 0.0 read_resources bus 0 link: 0 done
1466 12:20:54.012727 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1467 12:20:54.015862 DOMAIN: 0000 read_resources bus 0 link: 0 done
1468 12:20:54.022358 Root Device read_resources bus 0 link: 0 done
1469 12:20:54.022820 Done reading resources.
1470 12:20:54.029138 Show resources in subtree (Root Device)...After reading.
1471 12:20:54.032210 Root Device child on link 0 CPU_CLUSTER: 0
1472 12:20:54.038799 CPU_CLUSTER: 0 child on link 0 APIC: 00
1473 12:20:54.039278 APIC: 00
1474 12:20:54.039755 APIC: 1a
1475 12:20:54.042207 APIC: 1c
1476 12:20:54.042694 APIC: 1e
1477 12:20:54.045834 APIC: 18
1478 12:20:54.046337 APIC: 01
1479 12:20:54.046818 APIC: 08
1480 12:20:54.049255 APIC: 09
1481 12:20:54.052061 DOMAIN: 0000 child on link 0 GPIO: 0
1482 12:20:54.062480 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1483 12:20:54.072009 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1484 12:20:54.072503 GPIO: 0
1485 12:20:54.073128 PCI: 00:00.0
1486 12:20:54.082210 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 12:20:54.092400 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1488 12:20:54.102255 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1489 12:20:54.112365 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1490 12:20:54.122118 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1491 12:20:54.128897 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1492 12:20:54.139119 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1493 12:20:54.148831 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1494 12:20:54.158917 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1495 12:20:54.168441 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1496 12:20:54.178796 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1497 12:20:54.185433 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1498 12:20:54.195828 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1499 12:20:54.205936 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1500 12:20:54.215534 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1501 12:20:54.225341 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1502 12:20:54.235517 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1503 12:20:54.245377 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1504 12:20:54.252378 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1505 12:20:54.262017 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1506 12:20:54.272180 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1507 12:20:54.282232 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1508 12:20:54.292134 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1509 12:20:54.301913 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1510 12:20:54.312236 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1511 12:20:54.322147 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1512 12:20:54.328647 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1513 12:20:54.338884 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1514 12:20:54.341895 PCI: 00:02.0
1515 12:20:54.351846 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1516 12:20:54.361951 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1517 12:20:54.368804 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1518 12:20:54.375279 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1519 12:20:54.385428 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1520 12:20:54.385988 GENERIC: 0.0
1521 12:20:54.391942 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1522 12:20:54.398842 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1523 12:20:54.408539 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1524 12:20:54.418607 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1525 12:20:54.421989 PCI: 01:00.0
1526 12:20:54.431978 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1527 12:20:54.441868 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1528 12:20:54.442445 PCI: 00:08.0
1529 12:20:54.444949 PCI: 00:0a.0
1530 12:20:54.455045 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1531 12:20:54.458662 PCI: 00:0d.0 child on link 0 USB0 port 0
1532 12:20:54.468254 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1533 12:20:54.471871 USB0 port 0 child on link 0 USB3 port 0
1534 12:20:54.475007 USB3 port 0
1535 12:20:54.475675 USB3 port 1
1536 12:20:54.478329 USB3 port 2
1537 12:20:54.478875 USB3 port 3
1538 12:20:54.484954 PCI: 00:14.0 child on link 0 USB0 port 0
1539 12:20:54.495208 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1540 12:20:54.498383 USB0 port 0 child on link 0 USB2 port 0
1541 12:20:54.498942 USB2 port 0
1542 12:20:54.501680 USB2 port 1
1543 12:20:54.504754 USB2 port 2
1544 12:20:54.505366 USB2 port 3
1545 12:20:54.508282 USB2 port 4
1546 12:20:54.508744 USB2 port 5
1547 12:20:54.511633 USB2 port 6
1548 12:20:54.512180 USB2 port 7
1549 12:20:54.515285 USB2 port 8
1550 12:20:54.515858 USB2 port 9
1551 12:20:54.518524 USB3 port 0
1552 12:20:54.519098 USB3 port 1
1553 12:20:54.521461 USB3 port 2
1554 12:20:54.521919 USB3 port 3
1555 12:20:54.525180 PCI: 00:14.2
1556 12:20:54.535101 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1557 12:20:54.545021 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1558 12:20:54.548732 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1559 12:20:54.558315 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1560 12:20:54.561673 GENERIC: 0.0
1561 12:20:54.565036 PCI: 00:15.0 child on link 0 I2C: 00:1a
1562 12:20:54.574806 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 12:20:54.575396 I2C: 00:1a
1564 12:20:54.578214 I2C: 00:31
1565 12:20:54.578689 I2C: 00:32
1566 12:20:54.585095 PCI: 00:15.1 child on link 0 I2C: 00:50
1567 12:20:54.594739 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 12:20:54.595298 I2C: 00:50
1569 12:20:54.598309 PCI: 00:15.2
1570 12:20:54.601604 PCI: 00:15.3 child on link 0 I2C: 00:10
1571 12:20:54.611730 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 12:20:54.612286 I2C: 00:10
1573 12:20:54.615417 PCI: 00:16.0
1574 12:20:54.625223 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1575 12:20:54.625800 PCI: 00:19.0
1576 12:20:54.632011 PCI: 00:19.1 child on link 0 I2C: 00:15
1577 12:20:54.642053 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 12:20:54.642615 I2C: 00:15
1579 12:20:54.644958 I2C: 00:2c
1580 12:20:54.645472 PCI: 00:1e.0
1581 12:20:54.655022 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1582 12:20:54.661867 PCI: 00:1e.3 child on link 0 SPI: 00
1583 12:20:54.672060 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1584 12:20:54.672602 SPI: 00
1585 12:20:54.675147 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1586 12:20:54.685319 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1587 12:20:54.685896 PNP: 0c09.0
1588 12:20:54.695129 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1589 12:20:54.698870 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1590 12:20:54.708398 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1591 12:20:54.718393 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1592 12:20:54.721950 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1593 12:20:54.725377 GENERIC: 0.0
1594 12:20:54.725976 GENERIC: 1.0
1595 12:20:54.728607 PCI: 00:1f.3
1596 12:20:54.738680 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1597 12:20:54.748366 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1598 12:20:54.751880 PCI: 00:1f.5
1599 12:20:54.758291 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1600 12:20:54.768386 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1601 12:20:54.771426 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1602 12:20:54.777891 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1603 12:20:54.784782 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1604 12:20:54.787883 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1605 12:20:54.791154 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1606 12:20:54.801622 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1607 12:20:54.808120 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1608 12:20:54.814749 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1609 12:20:54.821614 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1610 12:20:54.828192 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1611 12:20:54.835110 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1612 12:20:54.844946 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1613 12:20:54.851337 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1614 12:20:54.854641 DOMAIN: 0000: Resource ranges:
1615 12:20:54.858490 * Base: 1000, Size: 800, Tag: 100
1616 12:20:54.861101 * Base: 1900, Size: e700, Tag: 100
1617 12:20:54.867922 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1618 12:20:54.874765 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1619 12:20:54.881194 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1620 12:20:54.888211 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1621 12:20:54.894717 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1622 12:20:54.904801 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1623 12:20:54.911170 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1624 12:20:54.917574 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1625 12:20:54.927668 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1626 12:20:54.934384 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1627 12:20:54.940922 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1628 12:20:54.950996 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1629 12:20:54.957735 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1630 12:20:54.964447 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1631 12:20:54.974387 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1632 12:20:54.980723 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1633 12:20:54.987691 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1634 12:20:54.997497 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1635 12:20:55.004170 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1636 12:20:55.010772 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1637 12:20:55.017857 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1638 12:20:55.027341 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1639 12:20:55.034593 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1640 12:20:55.041073 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1641 12:20:55.050853 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1642 12:20:55.057548 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1643 12:20:55.063777 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1644 12:20:55.073819 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1645 12:20:55.080177 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1646 12:20:55.086994 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1647 12:20:55.096725 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1648 12:20:55.103519 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1649 12:20:55.110332 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1650 12:20:55.113318 DOMAIN: 0000: Resource ranges:
1651 12:20:55.119959 * Base: 80400000, Size: 3fc00000, Tag: 200
1652 12:20:55.123284 * Base: d0000000, Size: 28000000, Tag: 200
1653 12:20:55.126764 * Base: fa000000, Size: 1000000, Tag: 200
1654 12:20:55.133227 * Base: fb001000, Size: 17ff000, Tag: 200
1655 12:20:55.136818 * Base: fe800000, Size: 300000, Tag: 200
1656 12:20:55.139930 * Base: feb80000, Size: 80000, Tag: 200
1657 12:20:55.143689 * Base: fed00000, Size: 40000, Tag: 200
1658 12:20:55.146639 * Base: fed70000, Size: 10000, Tag: 200
1659 12:20:55.154094 * Base: fed88000, Size: 8000, Tag: 200
1660 12:20:55.156980 * Base: fed93000, Size: d000, Tag: 200
1661 12:20:55.159983 * Base: feda2000, Size: 1e000, Tag: 200
1662 12:20:55.163424 * Base: fede0000, Size: 1220000, Tag: 200
1663 12:20:55.170239 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1664 12:20:55.176727 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1665 12:20:55.183197 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1666 12:20:55.190274 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1667 12:20:55.197013 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1668 12:20:55.203635 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1669 12:20:55.210348 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1670 12:20:55.217127 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1671 12:20:55.223813 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1672 12:20:55.230147 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1673 12:20:55.237148 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1674 12:20:55.243678 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1675 12:20:55.249956 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1676 12:20:55.256576 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1677 12:20:55.263348 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1678 12:20:55.269688 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1679 12:20:55.276223 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1680 12:20:55.283336 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1681 12:20:55.289848 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1682 12:20:55.296340 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1683 12:20:55.303037 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1684 12:20:55.312839 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1685 12:20:55.315930 PCI: 00:06.0: Resource ranges:
1686 12:20:55.319622 * Base: 80400000, Size: 100000, Tag: 200
1687 12:20:55.326017 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1688 12:20:55.332506 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1689 12:20:55.342271 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1690 12:20:55.349500 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1691 12:20:55.352673 Root Device assign_resources, bus 0 link: 0
1692 12:20:55.356042 DOMAIN: 0000 assign_resources, bus 0 link: 0
1693 12:20:55.365653 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1694 12:20:55.372281 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1695 12:20:55.382494 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1696 12:20:55.389085 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1697 12:20:55.392472 PCI: 00:04.0 assign_resources, bus 1 link: 0
1698 12:20:55.398821 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1699 12:20:55.405712 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1700 12:20:55.415796 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1701 12:20:55.425625 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1702 12:20:55.428853 PCI: 00:06.0 assign_resources, bus 1 link: 0
1703 12:20:55.438979 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1704 12:20:55.445363 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1705 12:20:55.451928 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1706 12:20:55.458891 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1707 12:20:55.468646 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1708 12:20:55.472443 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1709 12:20:55.475297 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1710 12:20:55.485143 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1711 12:20:55.488746 PCI: 00:14.0 assign_resources, bus 0 link: 0
1712 12:20:55.494871 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1713 12:20:55.501596 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1714 12:20:55.508650 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1715 12:20:55.518297 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1716 12:20:55.522079 PCI: 00:14.3 assign_resources, bus 0 link: 0
1717 12:20:55.528182 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1718 12:20:55.534824 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1719 12:20:55.541570 PCI: 00:15.0 assign_resources, bus 0 link: 0
1720 12:20:55.544935 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1721 12:20:55.551212 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1722 12:20:55.558332 PCI: 00:15.1 assign_resources, bus 0 link: 0
1723 12:20:55.561549 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1724 12:20:55.571614 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1725 12:20:55.574780 PCI: 00:15.3 assign_resources, bus 0 link: 0
1726 12:20:55.581496 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1727 12:20:55.588315 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1728 12:20:55.594479 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1729 12:20:55.601346 PCI: 00:19.1 assign_resources, bus 0 link: 0
1730 12:20:55.604573 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1731 12:20:55.614658 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1732 12:20:55.617768 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1733 12:20:55.621754 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1734 12:20:55.628141 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1735 12:20:55.631571 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1736 12:20:55.637662 LPC: Trying to open IO window from 800 size 1ff
1737 12:20:55.644801 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1738 12:20:55.654662 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1739 12:20:55.661281 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1740 12:20:55.664839 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1741 12:20:55.670962 Root Device assign_resources, bus 0 link: 0 done
1742 12:20:55.674633 Done setting resources.
1743 12:20:55.681003 Show resources in subtree (Root Device)...After assigning values.
1744 12:20:55.684442 Root Device child on link 0 CPU_CLUSTER: 0
1745 12:20:55.687720 CPU_CLUSTER: 0 child on link 0 APIC: 00
1746 12:20:55.691162 APIC: 00
1747 12:20:55.691621 APIC: 1a
1748 12:20:55.691989 APIC: 1c
1749 12:20:55.694471 APIC: 1e
1750 12:20:55.695036 APIC: 18
1751 12:20:55.697532 APIC: 01
1752 12:20:55.697996 APIC: 08
1753 12:20:55.698356 APIC: 09
1754 12:20:55.701052 DOMAIN: 0000 child on link 0 GPIO: 0
1755 12:20:55.710896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1756 12:20:55.720636 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1757 12:20:55.724307 GPIO: 0
1758 12:20:55.724765 PCI: 00:00.0
1759 12:20:55.734004 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1760 12:20:55.744442 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1761 12:20:55.754499 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1762 12:20:55.760794 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1763 12:20:55.770963 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1764 12:20:55.780571 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1765 12:20:55.790392 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1766 12:20:55.800424 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1767 12:20:55.810445 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1768 12:20:55.820378 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1769 12:20:55.827158 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1770 12:20:55.836879 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1771 12:20:55.847305 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1772 12:20:55.856893 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1773 12:20:55.866699 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1774 12:20:55.876441 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1775 12:20:55.883209 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1776 12:20:55.893086 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1777 12:20:55.903435 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1778 12:20:55.912871 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1779 12:20:55.922959 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1780 12:20:55.933021 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1781 12:20:55.942981 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1782 12:20:55.952790 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1783 12:20:55.963181 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1784 12:20:55.969724 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1785 12:20:55.979566 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1786 12:20:55.989493 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1787 12:20:55.992757 PCI: 00:02.0
1788 12:20:56.002471 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1789 12:20:56.012727 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1790 12:20:56.022815 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1791 12:20:56.026190 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1792 12:20:56.036488 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1793 12:20:56.039771 GENERIC: 0.0
1794 12:20:56.042924 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1795 12:20:56.052782 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1796 12:20:56.065603 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1797 12:20:56.075589 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1798 12:20:56.076105 PCI: 01:00.0
1799 12:20:56.085914 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1800 12:20:56.095780 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1801 12:20:56.098846 PCI: 00:08.0
1802 12:20:56.099318 PCI: 00:0a.0
1803 12:20:56.112715 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1804 12:20:56.115723 PCI: 00:0d.0 child on link 0 USB0 port 0
1805 12:20:56.126156 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1806 12:20:56.128868 USB0 port 0 child on link 0 USB3 port 0
1807 12:20:56.132307 USB3 port 0
1808 12:20:56.132816 USB3 port 1
1809 12:20:56.135680 USB3 port 2
1810 12:20:56.136242 USB3 port 3
1811 12:20:56.142107 PCI: 00:14.0 child on link 0 USB0 port 0
1812 12:20:56.152240 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1813 12:20:56.155558 USB0 port 0 child on link 0 USB2 port 0
1814 12:20:56.158739 USB2 port 0
1815 12:20:56.159195 USB2 port 1
1816 12:20:56.162038 USB2 port 2
1817 12:20:56.162496 USB2 port 3
1818 12:20:56.165261 USB2 port 4
1819 12:20:56.165719 USB2 port 5
1820 12:20:56.168709 USB2 port 6
1821 12:20:56.172000 USB2 port 7
1822 12:20:56.172457 USB2 port 8
1823 12:20:56.175254 USB2 port 9
1824 12:20:56.175880 USB3 port 0
1825 12:20:56.178953 USB3 port 1
1826 12:20:56.179485 USB3 port 2
1827 12:20:56.182330 USB3 port 3
1828 12:20:56.182793 PCI: 00:14.2
1829 12:20:56.191872 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1830 12:20:56.201607 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1831 12:20:56.208901 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1832 12:20:56.218650 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1833 12:20:56.219403 GENERIC: 0.0
1834 12:20:56.224835 PCI: 00:15.0 child on link 0 I2C: 00:1a
1835 12:20:56.234912 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1836 12:20:56.235550 I2C: 00:1a
1837 12:20:56.238165 I2C: 00:31
1838 12:20:56.238803 I2C: 00:32
1839 12:20:56.244384 PCI: 00:15.1 child on link 0 I2C: 00:50
1840 12:20:56.254669 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1841 12:20:56.254755 I2C: 00:50
1842 12:20:56.258075 PCI: 00:15.2
1843 12:20:56.261479 PCI: 00:15.3 child on link 0 I2C: 00:10
1844 12:20:56.271238 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1845 12:20:56.274804 I2C: 00:10
1846 12:20:56.275225 PCI: 00:16.0
1847 12:20:56.284756 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1848 12:20:56.288016 PCI: 00:19.0
1849 12:20:56.291346 PCI: 00:19.1 child on link 0 I2C: 00:15
1850 12:20:56.301415 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1851 12:20:56.304767 I2C: 00:15
1852 12:20:56.305307 I2C: 00:2c
1853 12:20:56.308252 PCI: 00:1e.0
1854 12:20:56.317822 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1855 12:20:56.321185 PCI: 00:1e.3 child on link 0 SPI: 00
1856 12:20:56.330885 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1857 12:20:56.334566 SPI: 00
1858 12:20:56.337724 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1859 12:20:56.347747 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1860 12:20:56.348216 PNP: 0c09.0
1861 12:20:56.357722 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1862 12:20:56.361053 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1863 12:20:56.370779 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1864 12:20:56.381049 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1865 12:20:56.384299 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1866 12:20:56.387697 GENERIC: 0.0
1867 12:20:56.388119 GENERIC: 1.0
1868 12:20:56.391094 PCI: 00:1f.3
1869 12:20:56.400668 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1870 12:20:56.411129 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1871 12:20:56.414484 PCI: 00:1f.5
1872 12:20:56.424022 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1873 12:20:56.424555 Done allocating resources.
1874 12:20:56.430501 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1875 12:20:56.436967 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1876 12:20:56.440503 Configure audio over I2S with MAX98373 NAU88L25B.
1877 12:20:56.446087 Enabling BT offload
1878 12:20:56.453807 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1879 12:20:56.457021 Enabling resources...
1880 12:20:56.460560 PCI: 00:00.0 subsystem <- 8086/4609
1881 12:20:56.463616 PCI: 00:00.0 cmd <- 06
1882 12:20:56.467202 PCI: 00:02.0 subsystem <- 8086/46b3
1883 12:20:56.470498 PCI: 00:02.0 cmd <- 03
1884 12:20:56.473534 PCI: 00:04.0 subsystem <- 8086/461d
1885 12:20:56.474104 PCI: 00:04.0 cmd <- 02
1886 12:20:56.477106 PCI: 00:06.0 bridge ctrl <- 0013
1887 12:20:56.480322 PCI: 00:06.0 subsystem <- 8086/464d
1888 12:20:56.483839 PCI: 00:06.0 cmd <- 106
1889 12:20:56.487120 PCI: 00:0a.0 subsystem <- 8086/467d
1890 12:20:56.490221 PCI: 00:0a.0 cmd <- 02
1891 12:20:56.493721 PCI: 00:0d.0 subsystem <- 8086/461e
1892 12:20:56.497044 PCI: 00:0d.0 cmd <- 02
1893 12:20:56.500443 PCI: 00:14.0 subsystem <- 8086/51ed
1894 12:20:56.503619 PCI: 00:14.0 cmd <- 02
1895 12:20:56.506823 PCI: 00:14.2 subsystem <- 8086/51ef
1896 12:20:56.507454 PCI: 00:14.2 cmd <- 02
1897 12:20:56.510137 PCI: 00:14.3 subsystem <- 8086/51f0
1898 12:20:56.513351 PCI: 00:14.3 cmd <- 02
1899 12:20:56.516721 PCI: 00:15.0 subsystem <- 8086/51e8
1900 12:20:56.520070 PCI: 00:15.0 cmd <- 02
1901 12:20:56.523709 PCI: 00:15.1 subsystem <- 8086/51e9
1902 12:20:56.527071 PCI: 00:15.1 cmd <- 06
1903 12:20:56.530360 PCI: 00:15.3 subsystem <- 8086/51eb
1904 12:20:56.533502 PCI: 00:15.3 cmd <- 02
1905 12:20:56.536896 PCI: 00:16.0 subsystem <- 8086/51e0
1906 12:20:56.537440 PCI: 00:16.0 cmd <- 02
1907 12:20:56.540085 PCI: 00:19.1 subsystem <- 8086/51c6
1908 12:20:56.543829 PCI: 00:19.1 cmd <- 02
1909 12:20:56.546843 PCI: 00:1e.0 subsystem <- 8086/51a8
1910 12:20:56.550478 PCI: 00:1e.0 cmd <- 06
1911 12:20:56.553379 PCI: 00:1e.3 subsystem <- 8086/51ab
1912 12:20:56.557036 PCI: 00:1e.3 cmd <- 02
1913 12:20:56.560110 PCI: 00:1f.0 subsystem <- 8086/5182
1914 12:20:56.563201 PCI: 00:1f.0 cmd <- 407
1915 12:20:56.566665 PCI: 00:1f.3 subsystem <- 8086/51c8
1916 12:20:56.567271 PCI: 00:1f.3 cmd <- 02
1917 12:20:56.573448 PCI: 00:1f.5 subsystem <- 8086/51a4
1918 12:20:56.573916 PCI: 00:1f.5 cmd <- 406
1919 12:20:56.576772 PCI: 01:00.0 cmd <- 02
1920 12:20:56.577519 done.
1921 12:20:56.583553 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1922 12:20:56.586524 ME: Version: Unavailable
1923 12:20:56.590008 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1924 12:20:56.593663 Initializing devices...
1925 12:20:56.596762 Root Device init
1926 12:20:56.597287 mainboard: EC init
1927 12:20:56.603127 Chrome EC: Set SMI mask to 0x0000000000000000
1928 12:20:56.606900 Chrome EC: UHEPI supported
1929 12:20:56.609603 Chrome EC: clear events_b mask to 0x0000000000000000
1930 12:20:56.616327 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1931 12:20:56.622892 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1932 12:20:56.629861 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1933 12:20:56.633050 Chrome EC: Set WAKE mask to 0x0000000000000000
1934 12:20:56.639638 Root Device init finished in 39 msecs
1935 12:20:56.640121 PCI: 00:00.0 init
1936 12:20:56.642808 CPU TDP = 15 Watts
1937 12:20:56.646025 CPU PL1 = 15 Watts
1938 12:20:56.646505 CPU PL2 = 55 Watts
1939 12:20:56.649822 CPU PL4 = 123 Watts
1940 12:20:56.653045 PCI: 00:00.0 init finished in 8 msecs
1941 12:20:56.656219 PCI: 00:02.0 init
1942 12:20:56.656698 GMA: Found VBT in CBFS
1943 12:20:56.659694 GMA: Found valid VBT in CBFS
1944 12:20:56.666266 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1945 12:20:56.672802 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1946 12:20:56.676084 PCI: 00:02.0 init finished in 18 msecs
1947 12:20:56.679286 PCI: 00:06.0 init
1948 12:20:56.683043 Initializing PCH PCIe bridge.
1949 12:20:56.686263 PCI: 00:06.0 init finished in 3 msecs
1950 12:20:56.689660 PCI: 00:0a.0 init
1951 12:20:56.693131 PCI: 00:0a.0 init finished in 0 msecs
1952 12:20:56.693600 PCI: 00:14.0 init
1953 12:20:56.696218 PCI: 00:14.0 init finished in 0 msecs
1954 12:20:56.699350 PCI: 00:14.2 init
1955 12:20:56.702643 PCI: 00:14.2 init finished in 0 msecs
1956 12:20:56.706525 PCI: 00:15.0 init
1957 12:20:56.709383 I2C bus 0 version 0x3230302a
1958 12:20:56.712826 DW I2C bus 0 at 0x80655000 (400 KHz)
1959 12:20:56.716676 PCI: 00:15.0 init finished in 6 msecs
1960 12:20:56.717318 PCI: 00:15.1 init
1961 12:20:56.719233 I2C bus 1 version 0x3230302a
1962 12:20:56.722569 DW I2C bus 1 at 0x80656000 (400 KHz)
1963 12:20:56.729440 PCI: 00:15.1 init finished in 6 msecs
1964 12:20:56.729978 PCI: 00:15.3 init
1965 12:20:56.732676 I2C bus 3 version 0x3230302a
1966 12:20:56.735930 DW I2C bus 3 at 0x80657000 (400 KHz)
1967 12:20:56.739326 PCI: 00:15.3 init finished in 6 msecs
1968 12:20:56.742665 PCI: 00:16.0 init
1969 12:20:56.745786 PCI: 00:16.0 init finished in 0 msecs
1970 12:20:56.749462 PCI: 00:19.1 init
1971 12:20:56.749927 I2C bus 5 version 0x3230302a
1972 12:20:56.755549 DW I2C bus 5 at 0x80659000 (400 KHz)
1973 12:20:56.759410 PCI: 00:19.1 init finished in 6 msecs
1974 12:20:56.759978 PCI: 00:1f.0 init
1975 12:20:56.765851 IOAPIC: Initializing IOAPIC at 0xfec00000
1976 12:20:56.766321 IOAPIC: ID = 0x02
1977 12:20:56.769133 IOAPIC: Dumping registers
1978 12:20:56.772686 reg 0x0000: 0x02000000
1979 12:20:56.773346 reg 0x0001: 0x00770020
1980 12:20:56.775601 reg 0x0002: 0x00000000
1981 12:20:56.779161 IOAPIC: 120 interrupts
1982 12:20:56.782487 IOAPIC: Clearing IOAPIC at 0xfec00000
1983 12:20:56.785735 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1984 12:20:56.792342 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1985 12:20:56.795599 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1986 12:20:56.802063 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1987 12:20:56.805436 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1988 12:20:56.811996 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1989 12:20:56.815500 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1990 12:20:56.822159 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1991 12:20:56.825345 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1992 12:20:56.828603 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1993 12:20:56.835296 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1994 12:20:56.838536 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1995 12:20:56.845363 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1996 12:20:56.848809 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1997 12:20:56.855140 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1998 12:20:56.858432 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1999 12:20:56.865161 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2000 12:20:56.868468 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2001 12:20:56.871710 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2002 12:20:56.878137 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2003 12:20:56.881494 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2004 12:20:56.888202 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2005 12:20:56.891500 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2006 12:20:56.898015 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2007 12:20:56.901459 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2008 12:20:56.908249 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2009 12:20:56.911349 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2010 12:20:56.914745 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2011 12:20:56.921443 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2012 12:20:56.924904 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2013 12:20:56.931524 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2014 12:20:56.934716 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2015 12:20:56.941451 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2016 12:20:56.944663 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2017 12:20:56.951075 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2018 12:20:56.954643 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2019 12:20:56.958223 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2020 12:20:56.964796 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2021 12:20:56.968392 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2022 12:20:56.974660 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2023 12:20:56.978310 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2024 12:20:56.984752 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2025 12:20:56.988192 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2026 12:20:56.995000 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2027 12:20:56.998095 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2028 12:20:57.001581 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2029 12:20:57.007965 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2030 12:20:57.011422 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2031 12:20:57.018154 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2032 12:20:57.021333 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2033 12:20:57.028191 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2034 12:20:57.031493 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2035 12:20:57.038377 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2036 12:20:57.041289 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2037 12:20:57.045143 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2038 12:20:57.051385 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2039 12:20:57.055004 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2040 12:20:57.061256 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2041 12:20:57.065023 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2042 12:20:57.071585 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2043 12:20:57.074557 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2044 12:20:57.081324 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2045 12:20:57.084149 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2046 12:20:57.087895 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2047 12:20:57.094412 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2048 12:20:57.097950 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2049 12:20:57.104293 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2050 12:20:57.107934 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2051 12:20:57.114163 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2052 12:20:57.117587 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2053 12:20:57.124642 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2054 12:20:57.128057 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2055 12:20:57.130970 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2056 12:20:57.137691 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2057 12:20:57.141389 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2058 12:20:57.147730 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2059 12:20:57.150951 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2060 12:20:57.157648 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2061 12:20:57.160699 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2062 12:20:57.167307 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2063 12:20:57.170861 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2064 12:20:57.173929 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2065 12:20:57.180900 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2066 12:20:57.184269 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2067 12:20:57.190645 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2068 12:20:57.194293 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2069 12:20:57.201028 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2070 12:20:57.203955 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2071 12:20:57.210257 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2072 12:20:57.213733 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2073 12:20:57.217103 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2074 12:20:57.224297 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2075 12:20:57.227439 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2076 12:20:57.233927 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2077 12:20:57.237362 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2078 12:20:57.243813 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2079 12:20:57.246975 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2080 12:20:57.253950 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2081 12:20:57.257010 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2082 12:20:57.260082 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2083 12:20:57.266904 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2084 12:20:57.270676 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2085 12:20:57.277212 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2086 12:20:57.280528 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2087 12:20:57.287104 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2088 12:20:57.290490 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2089 12:20:57.296956 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2090 12:20:57.300443 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2091 12:20:57.303447 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2092 12:20:57.310106 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2093 12:20:57.313482 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2094 12:20:57.320106 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2095 12:20:57.323266 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2096 12:20:57.329630 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2097 12:20:57.333460 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2098 12:20:57.340244 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2099 12:20:57.343453 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2100 12:20:57.346748 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2101 12:20:57.353777 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2102 12:20:57.356960 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2103 12:20:57.363438 IOAPIC: Bootstrap Processor Local APIC = 0x00
2104 12:20:57.366594 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2105 12:20:57.369852 PCI: 00:1f.0 init finished in 607 msecs
2106 12:20:57.373436 PCI: 00:1f.2 init
2107 12:20:57.376619 apm_control: Disabling ACPI.
2108 12:20:57.381947 APMC done.
2109 12:20:57.384895 PCI: 00:1f.2 init finished in 7 msecs
2110 12:20:57.388184 PCI: 00:1f.3 init
2111 12:20:57.391682 PCI: 00:1f.3 init finished in 0 msecs
2112 12:20:57.392260 PCI: 01:00.0 init
2113 12:20:57.394592 PCI: 01:00.0 init finished in 0 msecs
2114 12:20:57.397709 PNP: 0c09.0 init
2115 12:20:57.401408 Google Chrome EC uptime: 12.097 seconds
2116 12:20:57.407942 Google Chrome AP resets since EC boot: 1
2117 12:20:57.411480 Google Chrome most recent AP reset causes:
2118 12:20:57.414716 0.338: 32775 shutdown: entering G3
2119 12:20:57.421405 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2120 12:20:57.424752 PNP: 0c09.0 init finished in 23 msecs
2121 12:20:57.427866 GENERIC: 0.0 init
2122 12:20:57.431222 GENERIC: 0.0 init finished in 0 msecs
2123 12:20:57.431703 GENERIC: 1.0 init
2124 12:20:57.434748 GENERIC: 1.0 init finished in 0 msecs
2125 12:20:57.438234 Devices initialized
2126 12:20:57.441475 Show all devs... After init.
2127 12:20:57.444927 Root Device: enabled 1
2128 12:20:57.445552 CPU_CLUSTER: 0: enabled 1
2129 12:20:57.448099 DOMAIN: 0000: enabled 1
2130 12:20:57.451287 GPIO: 0: enabled 1
2131 12:20:57.454853 PCI: 00:00.0: enabled 1
2132 12:20:57.455427 PCI: 00:01.0: enabled 0
2133 12:20:57.458157 PCI: 00:01.1: enabled 0
2134 12:20:57.461511 PCI: 00:02.0: enabled 1
2135 12:20:57.462088 PCI: 00:04.0: enabled 1
2136 12:20:57.464598 PCI: 00:05.0: enabled 0
2137 12:20:57.467739 PCI: 00:06.0: enabled 1
2138 12:20:57.471576 PCI: 00:06.2: enabled 0
2139 12:20:57.472159 PCI: 00:07.0: enabled 0
2140 12:20:57.474539 PCI: 00:07.1: enabled 0
2141 12:20:57.477821 PCI: 00:07.2: enabled 0
2142 12:20:57.481278 PCI: 00:07.3: enabled 0
2143 12:20:57.481773 PCI: 00:08.0: enabled 0
2144 12:20:57.484716 PCI: 00:09.0: enabled 0
2145 12:20:57.487881 PCI: 00:0a.0: enabled 1
2146 12:20:57.491002 PCI: 00:0d.0: enabled 1
2147 12:20:57.491460 PCI: 00:0d.1: enabled 0
2148 12:20:57.494589 PCI: 00:0d.2: enabled 0
2149 12:20:57.497741 PCI: 00:0d.3: enabled 0
2150 12:20:57.498203 PCI: 00:0e.0: enabled 0
2151 12:20:57.501229 PCI: 00:10.0: enabled 0
2152 12:20:57.504650 PCI: 00:10.1: enabled 0
2153 12:20:57.508040 PCI: 00:10.6: enabled 0
2154 12:20:57.508498 PCI: 00:10.7: enabled 0
2155 12:20:57.511292 PCI: 00:12.0: enabled 0
2156 12:20:57.514844 PCI: 00:12.6: enabled 0
2157 12:20:57.517757 PCI: 00:12.7: enabled 0
2158 12:20:57.518219 PCI: 00:13.0: enabled 0
2159 12:20:57.521316 PCI: 00:14.0: enabled 1
2160 12:20:57.524391 PCI: 00:14.1: enabled 0
2161 12:20:57.527893 PCI: 00:14.2: enabled 1
2162 12:20:57.528405 PCI: 00:14.3: enabled 1
2163 12:20:57.530940 PCI: 00:15.0: enabled 1
2164 12:20:57.534372 PCI: 00:15.1: enabled 1
2165 12:20:57.537623 PCI: 00:15.2: enabled 0
2166 12:20:57.538084 PCI: 00:15.3: enabled 1
2167 12:20:57.540826 PCI: 00:16.0: enabled 1
2168 12:20:57.544518 PCI: 00:16.1: enabled 0
2169 12:20:57.545110 PCI: 00:16.2: enabled 0
2170 12:20:57.547563 PCI: 00:16.3: enabled 0
2171 12:20:57.550767 PCI: 00:16.4: enabled 0
2172 12:20:57.554259 PCI: 00:16.5: enabled 0
2173 12:20:57.554792 PCI: 00:17.0: enabled 0
2174 12:20:57.557377 PCI: 00:19.0: enabled 0
2175 12:20:57.561044 PCI: 00:19.1: enabled 1
2176 12:20:57.564541 PCI: 00:19.2: enabled 0
2177 12:20:57.565142 PCI: 00:1a.0: enabled 0
2178 12:20:57.567725 PCI: 00:1c.0: enabled 0
2179 12:20:57.571486 PCI: 00:1c.1: enabled 0
2180 12:20:57.574512 PCI: 00:1c.2: enabled 0
2181 12:20:57.575072 PCI: 00:1c.3: enabled 0
2182 12:20:57.577596 PCI: 00:1c.4: enabled 0
2183 12:20:57.580831 PCI: 00:1c.5: enabled 0
2184 12:20:57.581343 PCI: 00:1c.6: enabled 0
2185 12:20:57.584116 PCI: 00:1c.7: enabled 0
2186 12:20:57.587596 PCI: 00:1d.0: enabled 0
2187 12:20:57.590985 PCI: 00:1d.1: enabled 0
2188 12:20:57.591545 PCI: 00:1d.2: enabled 0
2189 12:20:57.594516 PCI: 00:1d.3: enabled 0
2190 12:20:57.597700 PCI: 00:1e.0: enabled 1
2191 12:20:57.601215 PCI: 00:1e.1: enabled 0
2192 12:20:57.601774 PCI: 00:1e.2: enabled 0
2193 12:20:57.604471 PCI: 00:1e.3: enabled 1
2194 12:20:57.607761 PCI: 00:1f.0: enabled 1
2195 12:20:57.610948 PCI: 00:1f.1: enabled 0
2196 12:20:57.611409 PCI: 00:1f.2: enabled 1
2197 12:20:57.614275 PCI: 00:1f.3: enabled 1
2198 12:20:57.617752 PCI: 00:1f.4: enabled 0
2199 12:20:57.621231 PCI: 00:1f.5: enabled 1
2200 12:20:57.621787 PCI: 00:1f.6: enabled 0
2201 12:20:57.624010 PCI: 00:1f.7: enabled 0
2202 12:20:57.627546 GENERIC: 0.0: enabled 1
2203 12:20:57.628037 GENERIC: 0.0: enabled 1
2204 12:20:57.630764 GENERIC: 1.0: enabled 1
2205 12:20:57.634163 GENERIC: 0.0: enabled 1
2206 12:20:57.637087 GENERIC: 1.0: enabled 1
2207 12:20:57.637593 USB0 port 0: enabled 1
2208 12:20:57.640694 USB0 port 0: enabled 1
2209 12:20:57.644105 GENERIC: 0.0: enabled 1
2210 12:20:57.644564 I2C: 00:1a: enabled 1
2211 12:20:57.647590 I2C: 00:31: enabled 1
2212 12:20:57.650908 I2C: 00:32: enabled 1
2213 12:20:57.654147 I2C: 00:50: enabled 1
2214 12:20:57.654607 I2C: 00:10: enabled 1
2215 12:20:57.657533 I2C: 00:15: enabled 1
2216 12:20:57.660754 I2C: 00:2c: enabled 1
2217 12:20:57.661265 GENERIC: 0.0: enabled 1
2218 12:20:57.664026 SPI: 00: enabled 1
2219 12:20:57.667460 PNP: 0c09.0: enabled 1
2220 12:20:57.668076 GENERIC: 0.0: enabled 1
2221 12:20:57.670932 USB3 port 0: enabled 1
2222 12:20:57.673880 USB3 port 1: enabled 0
2223 12:20:57.674441 USB3 port 2: enabled 1
2224 12:20:57.677092 USB3 port 3: enabled 0
2225 12:20:57.680773 USB2 port 0: enabled 1
2226 12:20:57.684066 USB2 port 1: enabled 0
2227 12:20:57.684586 USB2 port 2: enabled 1
2228 12:20:57.687390 USB2 port 3: enabled 0
2229 12:20:57.690457 USB2 port 4: enabled 0
2230 12:20:57.690915 USB2 port 5: enabled 1
2231 12:20:57.694308 USB2 port 6: enabled 0
2232 12:20:57.697053 USB2 port 7: enabled 0
2233 12:20:57.697512 USB2 port 8: enabled 1
2234 12:20:57.700699 USB2 port 9: enabled 1
2235 12:20:57.703704 USB3 port 0: enabled 1
2236 12:20:57.707228 USB3 port 1: enabled 0
2237 12:20:57.707721 USB3 port 2: enabled 0
2238 12:20:57.710497 USB3 port 3: enabled 0
2239 12:20:57.713565 GENERIC: 0.0: enabled 1
2240 12:20:57.714041 GENERIC: 1.0: enabled 1
2241 12:20:57.717361 APIC: 00: enabled 1
2242 12:20:57.720674 APIC: 1a: enabled 1
2243 12:20:57.721352 APIC: 1c: enabled 1
2244 12:20:57.723992 APIC: 1e: enabled 1
2245 12:20:57.726980 APIC: 18: enabled 1
2246 12:20:57.727461 APIC: 01: enabled 1
2247 12:20:57.730216 APIC: 08: enabled 1
2248 12:20:57.730695 APIC: 09: enabled 1
2249 12:20:57.734011 PCI: 01:00.0: enabled 1
2250 12:20:57.740451 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2251 12:20:57.744129 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2252 12:20:57.747002 ELOG: NV offset 0xf20000 size 0x4000
2253 12:20:57.755527 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2254 12:20:57.762363 ELOG: Event(17) added with size 13 at 2023-12-07 12:20:57 UTC
2255 12:20:57.769191 ELOG: Event(9E) added with size 10 at 2023-12-07 12:20:57 UTC
2256 12:20:57.775800 ELOG: Event(9F) added with size 14 at 2023-12-07 12:20:57 UTC
2257 12:20:57.782063 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2258 12:20:57.788842 ELOG: Event(A0) added with size 9 at 2023-12-07 12:20:57 UTC
2259 12:20:57.792181 elog_add_boot_reason: Logged dev mode boot
2260 12:20:57.799066 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2261 12:20:57.799634 Finalize devices...
2262 12:20:57.802429 PCI: 00:16.0 final
2263 12:20:57.805451 PCI: 00:1f.2 final
2264 12:20:57.806007 GENERIC: 0.0 final
2265 12:20:57.812325 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2266 12:20:57.815217 GENERIC: 1.0 final
2267 12:20:57.819066 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2268 12:20:57.822304 Devices finalized
2269 12:20:57.828760 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2270 12:20:57.832171 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2271 12:20:57.838860 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2272 12:20:57.841995 ME: HFSTS1 : 0x90000245
2273 12:20:57.848497 ME: HFSTS2 : 0x82100116
2274 12:20:57.852049 ME: HFSTS3 : 0x00000050
2275 12:20:57.855131 ME: HFSTS4 : 0x00004000
2276 12:20:57.861741 ME: HFSTS5 : 0x00000000
2277 12:20:57.865277 ME: HFSTS6 : 0x40600006
2278 12:20:57.868244 ME: Manufacturing Mode : NO
2279 12:20:57.871550 ME: SPI Protection Mode Enabled : YES
2280 12:20:57.878562 ME: FPFs Committed : YES
2281 12:20:57.881758 ME: Manufacturing Vars Locked : YES
2282 12:20:57.885122 ME: FW Partition Table : OK
2283 12:20:57.888316 ME: Bringup Loader Failure : NO
2284 12:20:57.891983 ME: Firmware Init Complete : YES
2285 12:20:57.895068 ME: Boot Options Present : NO
2286 12:20:57.898475 ME: Update In Progress : NO
2287 12:20:57.905289 ME: D0i3 Support : YES
2288 12:20:57.908495 ME: Low Power State Enabled : NO
2289 12:20:57.911698 ME: CPU Replaced : YES
2290 12:20:57.915069 ME: CPU Replacement Valid : YES
2291 12:20:57.918437 ME: Current Working State : 5
2292 12:20:57.921659 ME: Current Operation State : 1
2293 12:20:57.924875 ME: Current Operation Mode : 0
2294 12:20:57.928493 ME: Error Code : 0
2295 12:20:57.931561 ME: Enhanced Debug Mode : NO
2296 12:20:57.938120 ME: CPU Debug Disabled : YES
2297 12:20:57.941692 ME: TXT Support : NO
2298 12:20:57.944714 ME: WP for RO is enabled : YES
2299 12:20:57.951248 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2300 12:20:57.955095 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2301 12:20:57.961792 Ramoops buffer: 0x100000@0x76899000.
2302 12:20:57.964865 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2303 12:20:57.974960 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2304 12:20:57.977983 CBFS: 'fallback/slic' not found.
2305 12:20:57.981421 ACPI: Writing ACPI tables at 7686d000.
2306 12:20:57.981951 ACPI: * FACS
2307 12:20:57.984874 ACPI: * DSDT
2308 12:20:57.991471 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2309 12:20:57.994903 ACPI: * FADT
2310 12:20:57.995457 SCI is IRQ9
2311 12:20:57.998284 ACPI: added table 1/32, length now 40
2312 12:20:58.001315 ACPI: * SSDT
2313 12:20:58.007945 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2314 12:20:58.011548 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2315 12:20:58.018195 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2316 12:20:58.021327 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2317 12:20:58.027668 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2318 12:20:58.031079 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2319 12:20:58.037613 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2320 12:20:58.044791 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2321 12:20:58.047959 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2322 12:20:58.051185 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2323 12:20:58.058028 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2324 12:20:58.064479 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2325 12:20:58.067895 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2326 12:20:58.071311 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2327 12:20:58.079409 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2328 12:20:58.082273 PS2K: Passing 80 keymaps to kernel
2329 12:20:58.089008 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2330 12:20:58.096217 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2331 12:20:58.102809 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2332 12:20:58.109158 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2333 12:20:58.115362 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2334 12:20:58.122612 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2335 12:20:58.125691 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2336 12:20:58.132314 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2337 12:20:58.139141 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2338 12:20:58.145408 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2339 12:20:58.149038 ACPI: added table 2/32, length now 44
2340 12:20:58.152228 ACPI: * MCFG
2341 12:20:58.155794 ACPI: added table 3/32, length now 48
2342 12:20:58.156359 ACPI: * TPM2
2343 12:20:58.158790 TPM2 log created at 0x7685d000
2344 12:20:58.165676 ACPI: added table 4/32, length now 52
2345 12:20:58.166251 ACPI: * LPIT
2346 12:20:58.169099 ACPI: added table 5/32, length now 56
2347 12:20:58.172210 ACPI: * MADT
2348 12:20:58.172786 SCI is IRQ9
2349 12:20:58.176263 ACPI: added table 6/32, length now 60
2350 12:20:58.178858 cmd_reg from pmc_make_ipc_cmd 1052838
2351 12:20:58.185076 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2352 12:20:58.191930 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2353 12:20:58.198832 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2354 12:20:58.202260 PMC CrashLog size in discovery mode: 0xC00
2355 12:20:58.205506 cpu crashlog bar addr: 0x80640000
2356 12:20:58.209369 cpu discovery table offset: 0x6030
2357 12:20:58.214816 cpu_crashlog_discovery_table buffer count: 0x3
2358 12:20:58.221564 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2359 12:20:58.228438 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2360 12:20:58.235065 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2361 12:20:58.238616 PMC crashLog size in discovery mode : 0xC00
2362 12:20:58.245106 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2363 12:20:58.251713 discover mode PMC crashlog size adjusted to: 0x200
2364 12:20:58.258600 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2365 12:20:58.261614 discover mode PMC crashlog size adjusted to: 0x0
2366 12:20:58.264868 m_cpu_crashLog_size : 0x3480 bytes
2367 12:20:58.268529 CPU crashLog present.
2368 12:20:58.271690 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2369 12:20:58.281644 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2370 12:20:58.282220 current = 76876550
2371 12:20:58.284907 ACPI: * DMAR
2372 12:20:58.288421 ACPI: added table 7/32, length now 64
2373 12:20:58.291563 ACPI: added table 8/32, length now 68
2374 12:20:58.292123 ACPI: * HPET
2375 12:20:58.298634 ACPI: added table 9/32, length now 72
2376 12:20:58.299201 ACPI: done.
2377 12:20:58.301686 ACPI tables: 38528 bytes.
2378 12:20:58.305573 smbios_write_tables: 76857000
2379 12:20:58.308500 EC returned error result code 3
2380 12:20:58.311851 Couldn't obtain OEM name from CBI
2381 12:20:58.315228 Create SMBIOS type 16
2382 12:20:58.318971 Create SMBIOS type 17
2383 12:20:58.319526 Create SMBIOS type 20
2384 12:20:58.321771 GENERIC: 0.0 (WIFI Device)
2385 12:20:58.324870 SMBIOS tables: 2156 bytes.
2386 12:20:58.328864 Writing table forward entry at 0x00000500
2387 12:20:58.335116 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2388 12:20:58.338116 Writing coreboot table at 0x76891000
2389 12:20:58.345165 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2390 12:20:58.348663 1. 0000000000001000-000000000009ffff: RAM
2391 12:20:58.355563 2. 00000000000a0000-00000000000fffff: RESERVED
2392 12:20:58.358442 3. 0000000000100000-0000000076856fff: RAM
2393 12:20:58.365157 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2394 12:20:58.368237 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2395 12:20:58.374938 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2396 12:20:58.381644 7. 0000000077000000-00000000803fffff: RESERVED
2397 12:20:58.385053 8. 00000000c0000000-00000000cfffffff: RESERVED
2398 12:20:58.388515 9. 00000000f8000000-00000000f9ffffff: RESERVED
2399 12:20:58.395149 10. 00000000fb000000-00000000fb000fff: RESERVED
2400 12:20:58.398295 11. 00000000fc800000-00000000fe7fffff: RESERVED
2401 12:20:58.404841 12. 00000000feb00000-00000000feb7ffff: RESERVED
2402 12:20:58.408213 13. 00000000fec00000-00000000fecfffff: RESERVED
2403 12:20:58.414980 14. 00000000fed40000-00000000fed6ffff: RESERVED
2404 12:20:58.417903 15. 00000000fed80000-00000000fed87fff: RESERVED
2405 12:20:58.424712 16. 00000000fed90000-00000000fed92fff: RESERVED
2406 12:20:58.427721 17. 00000000feda0000-00000000feda1fff: RESERVED
2407 12:20:58.431248 18. 00000000fedc0000-00000000feddffff: RESERVED
2408 12:20:58.438115 19. 0000000100000000-000000027fbfffff: RAM
2409 12:20:58.441470 Passing 4 GPIOs to payload:
2410 12:20:58.444738 NAME | PORT | POLARITY | VALUE
2411 12:20:58.451259 lid | undefined | high | high
2412 12:20:58.454922 power | undefined | high | low
2413 12:20:58.461515 oprom | undefined | high | low
2414 12:20:58.468112 EC in RW | 0x00000151 | high | high
2415 12:20:58.468681 Board ID: 3
2416 12:20:58.469082 FW config: 0x131
2417 12:20:58.475024 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 650
2418 12:20:58.477953 coreboot table: 1788 bytes.
2419 12:20:58.481039 IMD ROOT 0. 0x76fff000 0x00001000
2420 12:20:58.484262 IMD SMALL 1. 0x76ffe000 0x00001000
2421 12:20:58.491355 FSP MEMORY 2. 0x76afe000 0x00500000
2422 12:20:58.494257 CONSOLE 3. 0x76ade000 0x00020000
2423 12:20:58.497936 RW MCACHE 4. 0x76add000 0x0000043c
2424 12:20:58.500965 RO MCACHE 5. 0x76adc000 0x00000fd8
2425 12:20:58.504554 FMAP 6. 0x76adb000 0x0000064a
2426 12:20:58.507768 TIME STAMP 7. 0x76ada000 0x00000910
2427 12:20:58.511152 VBOOT WORK 8. 0x76ac6000 0x00014000
2428 12:20:58.514681 MEM INFO 9. 0x76ac5000 0x000003b8
2429 12:20:58.521031 ROMSTG STCK10. 0x76ac4000 0x00001000
2430 12:20:58.524808 AFTER CAR 11. 0x76ab8000 0x0000c000
2431 12:20:58.527918 RAMSTAGE 12. 0x76a2e000 0x0008a000
2432 12:20:58.531413 ACPI BERT 13. 0x76a1e000 0x00010000
2433 12:20:58.534309 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2434 12:20:58.537812 REFCODE 15. 0x769ae000 0x0006f000
2435 12:20:58.541188 SMM BACKUP 16. 0x7699e000 0x00010000
2436 12:20:58.545078 IGD OPREGION17. 0x76999000 0x00004203
2437 12:20:58.551296 RAMOOPS 18. 0x76899000 0x00100000
2438 12:20:58.554927 COREBOOT 19. 0x76891000 0x00008000
2439 12:20:58.557948 ACPI 20. 0x7686d000 0x00024000
2440 12:20:58.561622 TPM2 TCGLOG21. 0x7685d000 0x00010000
2441 12:20:58.564799 PMC CRASHLOG22. 0x7685c000 0x00000c00
2442 12:20:58.568183 CPU CRASHLOG23. 0x76858000 0x00003480
2443 12:20:58.571028 SMBIOS 24. 0x76857000 0x00001000
2444 12:20:58.574294 IMD small region:
2445 12:20:58.577693 IMD ROOT 0. 0x76ffec00 0x00000400
2446 12:20:58.581091 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2447 12:20:58.584755 VPD 2. 0x76ffeb60 0x0000006c
2448 12:20:58.591340 POWER STATE 3. 0x76ffeb00 0x00000044
2449 12:20:58.594853 ROMSTAGE 4. 0x76ffeae0 0x00000004
2450 12:20:58.597932 ACPI GNVS 5. 0x76ffea80 0x00000048
2451 12:20:58.601340 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2452 12:20:58.607741 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2453 12:20:58.611176 MTRR: Physical address space:
2454 12:20:58.617777 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2455 12:20:58.624420 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2456 12:20:58.627860 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2457 12:20:58.634728 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2458 12:20:58.641222 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2459 12:20:58.647826 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2460 12:20:58.654668 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2461 12:20:58.657703 MTRR: Fixed MSR 0x250 0x0606060606060606
2462 12:20:58.661114 MTRR: Fixed MSR 0x258 0x0606060606060606
2463 12:20:58.667483 MTRR: Fixed MSR 0x259 0x0000000000000000
2464 12:20:58.671270 MTRR: Fixed MSR 0x268 0x0606060606060606
2465 12:20:58.674620 MTRR: Fixed MSR 0x269 0x0606060606060606
2466 12:20:58.677673 MTRR: Fixed MSR 0x26a 0x0606060606060606
2467 12:20:58.684170 MTRR: Fixed MSR 0x26b 0x0606060606060606
2468 12:20:58.687878 MTRR: Fixed MSR 0x26c 0x0606060606060606
2469 12:20:58.690945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2470 12:20:58.694315 MTRR: Fixed MSR 0x26e 0x0606060606060606
2471 12:20:58.700703 MTRR: Fixed MSR 0x26f 0x0606060606060606
2472 12:20:58.704182 call enable_fixed_mtrr()
2473 12:20:58.707893 CPU physical address size: 39 bits
2474 12:20:58.710971 MTRR: default type WB/UC MTRR counts: 6/6.
2475 12:20:58.714493 MTRR: UC selected as default type.
2476 12:20:58.720762 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2477 12:20:58.727228 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2478 12:20:58.733687 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2479 12:20:58.740647 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2480 12:20:58.747525 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2481 12:20:58.750583 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2482 12:20:58.758739 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 12:20:58.762347 MTRR: Fixed MSR 0x258 0x0606060606060606
2484 12:20:58.765443 MTRR: Fixed MSR 0x259 0x0000000000000000
2485 12:20:58.768888 MTRR: Fixed MSR 0x268 0x0606060606060606
2486 12:20:58.775488 MTRR: Fixed MSR 0x269 0x0606060606060606
2487 12:20:58.778582 MTRR: Fixed MSR 0x26a 0x0606060606060606
2488 12:20:58.781761 MTRR: Fixed MSR 0x26b 0x0606060606060606
2489 12:20:58.785551 MTRR: Fixed MSR 0x26c 0x0606060606060606
2490 12:20:58.792271 MTRR: Fixed MSR 0x26d 0x0606060606060606
2491 12:20:58.795401 MTRR: Fixed MSR 0x26e 0x0606060606060606
2492 12:20:58.798462 MTRR: Fixed MSR 0x26f 0x0606060606060606
2493 12:20:58.801979 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 12:20:58.808552 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 12:20:58.812059 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 12:20:58.815325 MTRR: Fixed MSR 0x259 0x0000000000000000
2497 12:20:58.818582 MTRR: Fixed MSR 0x268 0x0606060606060606
2498 12:20:58.822246 MTRR: Fixed MSR 0x269 0x0606060606060606
2499 12:20:58.828602 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 12:20:58.831541 MTRR: Fixed MSR 0x250 0x0606060606060606
2501 12:20:58.834919 MTRR: Fixed MSR 0x250 0x0606060606060606
2502 12:20:58.838312 MTRR: Fixed MSR 0x258 0x0606060606060606
2503 12:20:58.845079 MTRR: Fixed MSR 0x259 0x0000000000000000
2504 12:20:58.848320 MTRR: Fixed MSR 0x268 0x0606060606060606
2505 12:20:58.851849 MTRR: Fixed MSR 0x269 0x0606060606060606
2506 12:20:58.854921 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 12:20:58.861843 MTRR: Fixed MSR 0x259 0x0000000000000000
2508 12:20:58.864914 MTRR: Fixed MSR 0x268 0x0606060606060606
2509 12:20:58.868402 MTRR: Fixed MSR 0x269 0x0606060606060606
2510 12:20:58.871587 MTRR: Fixed MSR 0x258 0x0606060606060606
2511 12:20:58.874868 MTRR: Fixed MSR 0x259 0x0000000000000000
2512 12:20:58.881303 MTRR: Fixed MSR 0x268 0x0606060606060606
2513 12:20:58.884687 MTRR: Fixed MSR 0x269 0x0606060606060606
2514 12:20:58.888035 MTRR: Fixed MSR 0x26a 0x0606060606060606
2515 12:20:58.891146 MTRR: Fixed MSR 0x26b 0x0606060606060606
2516 12:20:58.897970 MTRR: Fixed MSR 0x26c 0x0606060606060606
2517 12:20:58.901255 MTRR: Fixed MSR 0x26d 0x0606060606060606
2518 12:20:58.904444 MTRR: Fixed MSR 0x26e 0x0606060606060606
2519 12:20:58.908178 MTRR: Fixed MSR 0x26f 0x0606060606060606
2520 12:20:58.915035 MTRR: Fixed MSR 0x26a 0x0606060606060606
2521 12:20:58.918550 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 12:20:58.921868 call enable_fixed_mtrr()
2523 12:20:58.924820 MTRR: Fixed MSR 0x26b 0x0606060606060606
2524 12:20:58.928066 MTRR: Fixed MSR 0x26c 0x0606060606060606
2525 12:20:58.931657 MTRR: Fixed MSR 0x26d 0x0606060606060606
2526 12:20:58.938100 MTRR: Fixed MSR 0x26e 0x0606060606060606
2527 12:20:58.941807 MTRR: Fixed MSR 0x26f 0x0606060606060606
2528 12:20:58.942321 call enable_fixed_mtrr()
2529 12:20:58.948154 CPU physical address size: 39 bits
2530 12:20:58.951937 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 12:20:58.954952 call enable_fixed_mtrr()
2532 12:20:58.958270 MTRR: Fixed MSR 0x26b 0x0606060606060606
2533 12:20:58.961466 CPU physical address size: 39 bits
2534 12:20:58.964820 MTRR: Fixed MSR 0x259 0x0000000000000000
2535 12:20:58.967927 CPU physical address size: 39 bits
2536 12:20:58.971417 MTRR: Fixed MSR 0x26c 0x0606060606060606
2537 12:20:58.978185 MTRR: Fixed MSR 0x26a 0x0606060606060606
2538 12:20:58.981415 MTRR: Fixed MSR 0x26d 0x0606060606060606
2539 12:20:58.984683 MTRR: Fixed MSR 0x26e 0x0606060606060606
2540 12:20:58.988052 MTRR: Fixed MSR 0x26f 0x0606060606060606
2541 12:20:58.995214 MTRR: Fixed MSR 0x26b 0x0606060606060606
2542 12:20:58.998353 call enable_fixed_mtrr()
2543 12:20:59.001578 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 12:20:59.004649 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 12:20:59.008168 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 12:20:59.011480 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 12:20:59.018141 MTRR: Fixed MSR 0x268 0x0606060606060606
2548 12:20:59.021311 CPU physical address size: 39 bits
2549 12:20:59.025129 call enable_fixed_mtrr()
2550 12:20:59.027936 MTRR: Fixed MSR 0x269 0x0606060606060606
2551 12:20:59.031295 CPU physical address size: 39 bits
2552 12:20:59.034488 MTRR: Fixed MSR 0x26a 0x0606060606060606
2553 12:20:59.037691 MTRR: Fixed MSR 0x250 0x0606060606060606
2554 12:20:59.044353 MTRR: Fixed MSR 0x26b 0x0606060606060606
2555 12:20:59.047612 MTRR: Fixed MSR 0x26c 0x0606060606060606
2556 12:20:59.051165 MTRR: Fixed MSR 0x26d 0x0606060606060606
2557 12:20:59.054594 MTRR: Fixed MSR 0x26e 0x0606060606060606
2558 12:20:59.061665 MTRR: Fixed MSR 0x26f 0x0606060606060606
2559 12:20:59.064836 MTRR: Fixed MSR 0x258 0x0606060606060606
2560 12:20:59.067615 call enable_fixed_mtrr()
2561 12:20:59.070800 MTRR: Fixed MSR 0x259 0x0000000000000000
2562 12:20:59.074550 MTRR: Fixed MSR 0x268 0x0606060606060606
2563 12:20:59.077608 MTRR: Fixed MSR 0x269 0x0606060606060606
2564 12:20:59.084246 MTRR: Fixed MSR 0x26a 0x0606060606060606
2565 12:20:59.087409 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 12:20:59.090782 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 12:20:59.094137 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 12:20:59.101141 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 12:20:59.104000 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 12:20:59.107378 CPU physical address size: 39 bits
2571 12:20:59.110652 call enable_fixed_mtrr()
2572 12:20:59.114188 CPU physical address size: 39 bits
2573 12:20:59.114755
2574 12:20:59.117256 MTRR check
2575 12:20:59.117680 Fixed MTRRs : Enabled
2576 12:20:59.120504 Variable MTRRs: Enabled
2577 12:20:59.121111
2578 12:20:59.127588 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2579 12:20:59.130545 Checking cr50 for pending updates
2580 12:20:59.142276 Reading cr50 TPM mode
2581 12:20:59.157770 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2582 12:20:59.167752 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2583 12:20:59.170677 Checking segment from ROM address 0xf96cbe6c
2584 12:20:59.173753 Checking segment from ROM address 0xf96cbe88
2585 12:20:59.180962 Loading segment from ROM address 0xf96cbe6c
2586 12:20:59.181607 code (compression=1)
2587 12:20:59.190482 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2588 12:20:59.197150 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2589 12:20:59.200470 using LZMA
2590 12:20:59.223147 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2591 12:20:59.229841 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2592 12:20:59.237706 Loading segment from ROM address 0xf96cbe88
2593 12:20:59.241137 Entry Point 0x30000000
2594 12:20:59.241558 Loaded segments
2595 12:20:59.247958 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2596 12:20:59.254768 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2597 12:20:59.257833 Finalizing chipset.
2598 12:20:59.258370 apm_control: Finalizing SMM.
2599 12:20:59.260925 APMC done.
2600 12:20:59.264924 HECI: CSE device 16.1 is disabled
2601 12:20:59.267981 HECI: CSE device 16.2 is disabled
2602 12:20:59.271410 HECI: CSE device 16.3 is disabled
2603 12:20:59.274331 HECI: CSE device 16.4 is disabled
2604 12:20:59.277884 HECI: CSE device 16.5 is disabled
2605 12:20:59.281064 HECI: Sending End-of-Post
2606 12:20:59.289462 CSE: EOP requested action: continue boot
2607 12:20:59.292497 CSE EOP successful, continuing boot
2608 12:20:59.299016 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2609 12:20:59.302886 mp_park_aps done after 0 msecs.
2610 12:20:59.305815 Jumping to boot code at 0x30000000(0x76891000)
2611 12:20:59.315948 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2612 12:20:59.319889
2613 12:20:59.320422
2614 12:20:59.320785
2615 12:20:59.323665 Starting depthcharge on Volmar...
2616 12:20:59.324216
2617 12:20:59.326217 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2618 12:20:59.326783 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2619 12:20:59.327231 Setting prompt string to ['brya:']
2620 12:20:59.327646 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2621 12:20:59.329962 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2622 12:20:59.330431
2623 12:20:59.336847 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2624 12:20:59.337465
2625 12:20:59.343421 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2626 12:20:59.343982
2627 12:20:59.346700 configure_storage: Failed to remap 1C:2
2628 12:20:59.347255
2629 12:20:59.350438 Wipe memory regions:
2630 12:20:59.350992
2631 12:20:59.353069 [0x00000000001000, 0x000000000a0000)
2632 12:20:59.353536
2633 12:20:59.356681 [0x00000000100000, 0x00000030000000)
2634 12:20:59.464969
2635 12:20:59.468116 [0x00000032668e60, 0x00000076857000)
2636 12:20:59.620060
2637 12:20:59.623155 [0x00000100000000, 0x0000027fc00000)
2638 12:21:00.475837
2639 12:21:00.478666 ec_init: CrosEC protocol v3 supported (256, 256)
2640 12:21:01.087968
2641 12:21:01.088112 R8152: Initializing
2642 12:21:01.088213
2643 12:21:01.091517 Version 9 (ocp_data = 6010)
2644 12:21:01.091605
2645 12:21:01.094716 R8152: Done initializing
2646 12:21:01.094806
2647 12:21:01.097949 Adding net device
2648 12:21:01.398780
2649 12:21:01.402167 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2650 12:21:01.402284
2651 12:21:01.402374
2652 12:21:01.402456
2653 12:21:01.402757 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 12:21:01.503174 brya: tftpboot 192.168.201.1 12207224/tftp-deploy-y7apm1zy/kernel/bzImage 12207224/tftp-deploy-y7apm1zy/kernel/cmdline 12207224/tftp-deploy-y7apm1zy/ramdisk/ramdisk.cpio.gz
2656 12:21:01.503326 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 12:21:01.503436 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2658 12:21:01.507450 tftpboot 192.168.201.1 12207224/tftp-deploy-y7apm1zy/kernel/bzImaploy-y7apm1zy/kernel/cmdline 12207224/tftp-deploy-y7apm1zy/ramdisk/ramdisk.cpio.gz
2659 12:21:01.507542
2660 12:21:01.507628 Waiting for link
2661 12:21:01.711126
2662 12:21:01.711389 done.
2663 12:21:01.711608
2664 12:21:01.711808 MAC: 00:e0:4c:68:05:c6
2665 12:21:01.712005
2666 12:21:01.714267 Sending DHCP discover... done.
2667 12:21:01.714497
2668 12:21:01.717473 Waiting for reply... done.
2669 12:21:01.717677
2670 12:21:01.721006 Sending DHCP request... done.
2671 12:21:01.721283
2672 12:21:01.745069 Waiting for reply... done.
2673 12:21:01.745295
2674 12:21:01.745456 My ip is 192.168.201.17
2675 12:21:01.745607
2676 12:21:01.748519 The DHCP server ip is 192.168.201.1
2677 12:21:01.751976
2678 12:21:01.755370 TFTP server IP predefined by user: 192.168.201.1
2679 12:21:01.755573
2680 12:21:01.761772 Bootfile predefined by user: 12207224/tftp-deploy-y7apm1zy/kernel/bzImage
2681 12:21:01.761976
2682 12:21:01.765110 Sending tftp read request... done.
2683 12:21:01.765312
2684 12:21:01.771833 Waiting for the transfer...
2685 12:21:01.772041
2686 12:21:02.030032 00000000 ################################################################
2687 12:21:02.030196
2688 12:21:02.277048 00080000 ################################################################
2689 12:21:02.277179
2690 12:21:02.525737 00100000 ################################################################
2691 12:21:02.525899
2692 12:21:02.774634 00180000 ################################################################
2693 12:21:02.774787
2694 12:21:03.039818 00200000 ################################################################
2695 12:21:03.039981
2696 12:21:03.287335 00280000 ################################################################
2697 12:21:03.287495
2698 12:21:03.534606 00300000 ################################################################
2699 12:21:03.534742
2700 12:21:03.782925 00380000 ################################################################
2701 12:21:03.783055
2702 12:21:04.036702 00400000 ################################################################
2703 12:21:04.036854
2704 12:21:04.287317 00480000 ################################################################
2705 12:21:04.287478
2706 12:21:04.534419 00500000 ################################################################
2707 12:21:04.534586
2708 12:21:04.793731 00580000 ################################################################
2709 12:21:04.793892
2710 12:21:05.043286 00600000 ################################################################
2711 12:21:05.043438
2712 12:21:05.293908 00680000 ################################################################
2713 12:21:05.294036
2714 12:21:05.544908 00700000 ################################################################
2715 12:21:05.545054
2716 12:21:05.793773 00780000 ################################################################
2717 12:21:05.793901
2718 12:21:06.047254 00800000 ################################################################
2719 12:21:06.047380
2720 12:21:06.314615 00880000 ################################################################
2721 12:21:06.314742
2722 12:21:06.567767 00900000 ################################################################
2723 12:21:06.567920
2724 12:21:06.819992 00980000 ################################################################
2725 12:21:06.820125
2726 12:21:07.066954 00a00000 ################################################################
2727 12:21:07.067109
2728 12:21:07.311643 00a80000 ################################################################
2729 12:21:07.311800
2730 12:21:07.587308 00b00000 ################################################################
2731 12:21:07.587463
2732 12:21:07.836474 00b80000 ################################################################
2733 12:21:07.836637
2734 12:21:08.094046 00c00000 ################################################################
2735 12:21:08.094240
2736 12:21:08.347110 00c80000 ################################################################
2737 12:21:08.347266
2738 12:21:08.594749 00d00000 ############################################################# done.
2739 12:21:08.594984
2740 12:21:08.598613 The bootfile was 14129248 bytes long.
2741 12:21:08.598705
2742 12:21:08.601941 Sending tftp read request... done.
2743 12:21:08.602016
2744 12:21:08.605228 Waiting for the transfer...
2745 12:21:08.605309
2746 12:21:08.853676 00000000 ################################################################
2747 12:21:08.853832
2748 12:21:09.099140 00080000 ################################################################
2749 12:21:09.099290
2750 12:21:09.347963 00100000 ################################################################
2751 12:21:09.348176
2752 12:21:09.595086 00180000 ################################################################
2753 12:21:09.595249
2754 12:21:09.840793 00200000 ################################################################
2755 12:21:09.840952
2756 12:21:10.086971 00280000 ################################################################
2757 12:21:10.087127
2758 12:21:10.334939 00300000 ################################################################
2759 12:21:10.335071
2760 12:21:10.586488 00380000 ################################################################
2761 12:21:10.586620
2762 12:21:10.829604 00400000 ################################################################
2763 12:21:10.829733
2764 12:21:11.074462 00480000 ################################################################
2765 12:21:11.074599
2766 12:21:11.319324 00500000 ################################################################
2767 12:21:11.319462
2768 12:21:11.565462 00580000 ################################################################
2769 12:21:11.565652
2770 12:21:11.811336 00600000 ################################################################
2771 12:21:11.811496
2772 12:21:12.061209 00680000 ################################################################
2773 12:21:12.061343
2774 12:21:12.305918 00700000 ################################################################
2775 12:21:12.306079
2776 12:21:12.553218 00780000 ################################################################
2777 12:21:12.553371
2778 12:21:12.803121 00800000 ################################################################
2779 12:21:12.803287
2780 12:21:12.968070 00880000 ########################################### done.
2781 12:21:12.968212
2782 12:21:12.971001 Sending tftp read request... done.
2783 12:21:12.971080
2784 12:21:12.974684 Waiting for the transfer...
2785 12:21:12.974785
2786 12:21:12.974866 00000000 # done.
2787 12:21:12.974976
2788 12:21:12.984464 Command line loaded dynamically from TFTP file: 12207224/tftp-deploy-y7apm1zy/kernel/cmdline
2789 12:21:12.984546
2790 12:21:12.997602 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2791 12:21:13.005553
2792 12:21:13.008965 Shutting down all USB controllers.
2793 12:21:13.009080
2794 12:21:13.009150 Removing current net device
2795 12:21:13.009213
2796 12:21:13.012055 Finalizing coreboot
2797 12:21:13.012139
2798 12:21:13.018993 Exiting depthcharge with code 4 at timestamp: 23974375
2799 12:21:13.019073
2800 12:21:13.019144
2801 12:21:13.019206 Starting kernel ...
2802 12:21:13.019264
2803 12:21:13.019320
2804 12:21:13.019715 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2805 12:21:13.019809 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2806 12:21:13.019885 Setting prompt string to ['Linux version [0-9]']
2807 12:21:13.019959 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2808 12:21:13.020026 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2810 12:25:40.020780 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2812 12:25:40.021945 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2814 12:25:40.022815 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2817 12:25:40.024222 end: 2 depthcharge-action (duration 00:05:00) [common]
2819 12:25:40.025338 Cleaning after the job
2820 12:25:40.025426 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/ramdisk
2821 12:25:40.026853 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/kernel
2822 12:25:40.028915 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12207224/tftp-deploy-y7apm1zy/modules
2823 12:25:40.029808 start: 5.1 power-off (timeout 00:00:30) [common]
2824 12:25:40.029973 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2825 12:25:40.107041 >> Command sent successfully.
2826 12:25:40.111997 Returned 0 in 0 seconds
2827 12:25:40.213080 end: 5.1 power-off (duration 00:00:00) [common]
2829 12:25:40.214661 start: 5.2 read-feedback (timeout 00:10:00) [common]
2830 12:25:40.215996 Listened to connection for namespace 'common' for up to 1s
2832 12:25:40.217456 Listened to connection for namespace 'common' for up to 1s
2833 12:25:41.216631 Finalising connection for namespace 'common'
2834 12:25:41.217474 Disconnecting from shell: Finalise
2835 12:25:41.217876
2836 12:25:41.319065 end: 5.2 read-feedback (duration 00:00:01) [common]
2837 12:25:41.319712 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12207224
2838 12:25:41.376323 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12207224
2839 12:25:41.376522 JobError: Your job cannot terminate cleanly.