Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 09:52:37.159501 lava-dispatcher, installed at version: 2023.10
2 09:52:37.159709 start: 0 validate
3 09:52:37.159848 Start time: 2023-12-11 09:52:37.159841+00:00 (UTC)
4 09:52:37.159984 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:52:37.160117 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 09:52:37.428209 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:52:37.428388 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.201-cip41-63-gfdfe1fbf93bc6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:52:37.686912 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:52:37.687090 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.201-cip41-63-gfdfe1fbf93bc6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 09:52:37.953857 validate duration: 0.79
12 09:52:37.954159 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:52:37.954281 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:52:37.954380 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:52:37.954561 Not decompressing ramdisk as can be used compressed.
16 09:52:37.954651 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 09:52:37.954725 saving as /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/ramdisk/rootfs.cpio.gz
18 09:52:37.954790 total size: 35760064 (34 MB)
19 09:52:37.955873 progress 0 % (0 MB)
20 09:52:37.965453 progress 5 % (1 MB)
21 09:52:37.974953 progress 10 % (3 MB)
22 09:52:37.984100 progress 15 % (5 MB)
23 09:52:37.993478 progress 20 % (6 MB)
24 09:52:38.002837 progress 25 % (8 MB)
25 09:52:38.012307 progress 30 % (10 MB)
26 09:52:38.021687 progress 35 % (11 MB)
27 09:52:38.031086 progress 40 % (13 MB)
28 09:52:38.040425 progress 45 % (15 MB)
29 09:52:38.049751 progress 50 % (17 MB)
30 09:52:38.059159 progress 55 % (18 MB)
31 09:52:38.068367 progress 60 % (20 MB)
32 09:52:38.077817 progress 65 % (22 MB)
33 09:52:38.087607 progress 70 % (23 MB)
34 09:52:38.097711 progress 75 % (25 MB)
35 09:52:38.107878 progress 80 % (27 MB)
36 09:52:38.117852 progress 85 % (29 MB)
37 09:52:38.127695 progress 90 % (30 MB)
38 09:52:38.137753 progress 95 % (32 MB)
39 09:52:38.147285 progress 100 % (34 MB)
40 09:52:38.147465 34 MB downloaded in 0.19 s (177.00 MB/s)
41 09:52:38.147632 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:52:38.147876 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:52:38.147978 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:52:38.148091 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:52:38.148241 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.201-cip41-63-gfdfe1fbf93bc6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 09:52:38.148315 saving as /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/kernel/bzImage
48 09:52:38.148376 total size: 14129248 (13 MB)
49 09:52:38.148437 No compression specified
50 09:52:38.149582 progress 0 % (0 MB)
51 09:52:38.153410 progress 5 % (0 MB)
52 09:52:38.157346 progress 10 % (1 MB)
53 09:52:38.161119 progress 15 % (2 MB)
54 09:52:38.165030 progress 20 % (2 MB)
55 09:52:38.168771 progress 25 % (3 MB)
56 09:52:38.172742 progress 30 % (4 MB)
57 09:52:38.176467 progress 35 % (4 MB)
58 09:52:38.180374 progress 40 % (5 MB)
59 09:52:38.184269 progress 45 % (6 MB)
60 09:52:38.188063 progress 50 % (6 MB)
61 09:52:38.191998 progress 55 % (7 MB)
62 09:52:38.195729 progress 60 % (8 MB)
63 09:52:38.199811 progress 65 % (8 MB)
64 09:52:38.203715 progress 70 % (9 MB)
65 09:52:38.207579 progress 75 % (10 MB)
66 09:52:38.211220 progress 80 % (10 MB)
67 09:52:38.215037 progress 85 % (11 MB)
68 09:52:38.218878 progress 90 % (12 MB)
69 09:52:38.222516 progress 95 % (12 MB)
70 09:52:38.226349 progress 100 % (13 MB)
71 09:52:38.226506 13 MB downloaded in 0.08 s (172.47 MB/s)
72 09:52:38.226660 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:52:38.226908 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:52:38.226996 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:52:38.227088 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:52:38.227235 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.201-cip41-63-gfdfe1fbf93bc6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 09:52:38.227310 saving as /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/modules/modules.tar
79 09:52:38.227396 total size: 526880 (0 MB)
80 09:52:38.227496 Using unxz to decompress xz
81 09:52:38.231978 progress 6 % (0 MB)
82 09:52:38.232436 progress 12 % (0 MB)
83 09:52:38.232685 progress 18 % (0 MB)
84 09:52:38.234335 progress 24 % (0 MB)
85 09:52:38.236261 progress 31 % (0 MB)
86 09:52:38.238293 progress 37 % (0 MB)
87 09:52:38.240487 progress 43 % (0 MB)
88 09:52:38.242475 progress 49 % (0 MB)
89 09:52:38.244532 progress 55 % (0 MB)
90 09:52:38.246615 progress 62 % (0 MB)
91 09:52:38.248801 progress 68 % (0 MB)
92 09:52:38.250952 progress 74 % (0 MB)
93 09:52:38.253054 progress 80 % (0 MB)
94 09:52:38.255403 progress 87 % (0 MB)
95 09:52:38.257340 progress 93 % (0 MB)
96 09:52:38.259423 progress 99 % (0 MB)
97 09:52:38.267008 0 MB downloaded in 0.04 s (12.69 MB/s)
98 09:52:38.267265 end: 1.3.1 http-download (duration 00:00:00) [common]
100 09:52:38.267536 end: 1.3 download-retry (duration 00:00:00) [common]
101 09:52:38.267632 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 09:52:38.267729 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 09:52:38.267810 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 09:52:38.267895 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 09:52:38.268131 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6
106 09:52:38.268265 makedir: /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin
107 09:52:38.268370 makedir: /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/tests
108 09:52:38.268470 makedir: /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/results
109 09:52:38.268587 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-add-keys
110 09:52:38.268772 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-add-sources
111 09:52:38.268906 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-background-process-start
112 09:52:38.269039 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-background-process-stop
113 09:52:38.269167 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-common-functions
114 09:52:38.269293 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-echo-ipv4
115 09:52:38.269419 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-install-packages
116 09:52:38.269545 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-installed-packages
117 09:52:38.269670 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-os-build
118 09:52:38.269797 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-probe-channel
119 09:52:38.269929 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-probe-ip
120 09:52:38.270057 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-target-ip
121 09:52:38.270185 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-target-mac
122 09:52:38.270310 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-target-storage
123 09:52:38.270482 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-case
124 09:52:38.270609 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-event
125 09:52:38.270751 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-feedback
126 09:52:38.270879 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-raise
127 09:52:38.271007 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-reference
128 09:52:38.271173 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-runner
129 09:52:38.271358 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-set
130 09:52:38.271487 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-test-shell
131 09:52:38.271619 Updating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-install-packages (oe)
132 09:52:38.271779 Updating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/bin/lava-installed-packages (oe)
133 09:52:38.271905 Creating /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/environment
134 09:52:38.272011 LAVA metadata
135 09:52:38.272085 - LAVA_JOB_ID=12244029
136 09:52:38.272148 - LAVA_DISPATCHER_IP=192.168.201.1
137 09:52:38.272252 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 09:52:38.272320 skipped lava-vland-overlay
139 09:52:38.272398 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 09:52:38.272480 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 09:52:38.272542 skipped lava-multinode-overlay
142 09:52:38.272614 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 09:52:38.272740 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 09:52:38.272819 Loading test definitions
145 09:52:38.272914 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 09:52:38.272991 Using /lava-12244029 at stage 0
147 09:52:38.273301 uuid=12244029_1.4.2.3.1 testdef=None
148 09:52:38.273391 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 09:52:38.273474 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 09:52:38.273984 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 09:52:38.274208 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 09:52:38.274898 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 09:52:38.275125 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 09:52:38.275718 runner path: /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/0/tests/0_cros-ec test_uuid 12244029_1.4.2.3.1
157 09:52:38.275873 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 09:52:38.276074 Creating lava-test-runner.conf files
160 09:52:38.276138 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12244029/lava-overlay-2wux1qn6/lava-12244029/0 for stage 0
161 09:52:38.276228 - 0_cros-ec
162 09:52:38.276357 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
163 09:52:38.276441 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
164 09:52:38.283438 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
165 09:52:38.283556 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
166 09:52:38.283643 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
167 09:52:38.283729 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
168 09:52:38.283814 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
169 09:52:39.341718 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
170 09:52:39.342113 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
171 09:52:39.342223 extracting modules file /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12244029/extract-overlay-ramdisk-7vgtb19p/ramdisk
172 09:52:39.370079 end: 1.4.4 extract-modules (duration 00:00:00) [common]
173 09:52:39.370247 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
174 09:52:39.370354 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12244029/compress-overlay-x_pn0iaa/overlay-1.4.2.4.tar.gz to ramdisk
175 09:52:39.370458 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12244029/compress-overlay-x_pn0iaa/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12244029/extract-overlay-ramdisk-7vgtb19p/ramdisk
176 09:52:39.377436 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
177 09:52:39.377548 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
178 09:52:39.377639 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
179 09:52:39.377731 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
180 09:52:39.377812 Building ramdisk /var/lib/lava/dispatcher/tmp/12244029/extract-overlay-ramdisk-7vgtb19p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12244029/extract-overlay-ramdisk-7vgtb19p/ramdisk
181 09:52:39.936678 >> 188444 blocks
182 09:52:43.500878 rename /var/lib/lava/dispatcher/tmp/12244029/extract-overlay-ramdisk-7vgtb19p/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/ramdisk/ramdisk.cpio.gz
183 09:52:43.501331 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
184 09:52:43.501455 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
185 09:52:43.501578 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
186 09:52:43.501675 No mkimage arch provided, not using FIT.
187 09:52:43.501766 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
188 09:52:43.501850 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
189 09:52:43.501952 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
190 09:52:43.502040 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
191 09:52:43.502119 No LXC device requested
192 09:52:43.502197 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
193 09:52:43.502281 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
194 09:52:43.502362 end: 1.6 deploy-device-env (duration 00:00:00) [common]
195 09:52:43.502445 Checking files for TFTP limit of 4294967296 bytes.
196 09:52:43.502844 end: 1 tftp-deploy (duration 00:00:06) [common]
197 09:52:43.502950 start: 2 depthcharge-action (timeout 00:05:00) [common]
198 09:52:43.503036 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
199 09:52:43.503157 substitutions:
200 09:52:43.503224 - {DTB}: None
201 09:52:43.503287 - {INITRD}: 12244029/tftp-deploy-lmuhfxqd/ramdisk/ramdisk.cpio.gz
202 09:52:43.503346 - {KERNEL}: 12244029/tftp-deploy-lmuhfxqd/kernel/bzImage
203 09:52:43.503403 - {LAVA_MAC}: None
204 09:52:43.503458 - {PRESEED_CONFIG}: None
205 09:52:43.503513 - {PRESEED_LOCAL}: None
206 09:52:43.503567 - {RAMDISK}: 12244029/tftp-deploy-lmuhfxqd/ramdisk/ramdisk.cpio.gz
207 09:52:43.503622 - {ROOT_PART}: None
208 09:52:43.503676 - {ROOT}: None
209 09:52:43.503729 - {SERVER_IP}: 192.168.201.1
210 09:52:43.503782 - {TEE}: None
211 09:52:43.503835 Parsed boot commands:
212 09:52:43.503888 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
213 09:52:43.504059 Parsed boot commands: tftpboot 192.168.201.1 12244029/tftp-deploy-lmuhfxqd/kernel/bzImage 12244029/tftp-deploy-lmuhfxqd/kernel/cmdline 12244029/tftp-deploy-lmuhfxqd/ramdisk/ramdisk.cpio.gz
214 09:52:43.504146 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
215 09:52:43.504230 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
216 09:52:43.504323 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
217 09:52:43.504410 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
218 09:52:43.504478 Not connected, no need to disconnect.
219 09:52:43.504551 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
220 09:52:43.504637 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
221 09:52:43.504754 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
222 09:52:43.508888 Setting prompt string to ['lava-test: # ']
223 09:52:43.509251 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
224 09:52:43.509354 end: 2.2.1 reset-connection (duration 00:00:00) [common]
225 09:52:43.509457 start: 2.2.2 reset-device (timeout 00:05:00) [common]
226 09:52:43.509547 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
227 09:52:43.509783 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
228 09:52:48.656422 >> Command sent successfully.
229 09:52:48.666974 Returned 0 in 5 seconds
230 09:52:48.768162 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
232 09:52:48.769437 end: 2.2.2 reset-device (duration 00:00:05) [common]
233 09:52:48.769918 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
234 09:52:48.770334 Setting prompt string to 'Starting depthcharge on Voema...'
235 09:52:48.770696 Changing prompt to 'Starting depthcharge on Voema...'
236 09:52:48.771019 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
237 09:52:48.772142 [Enter `^Ec?' for help]
238 09:52:50.361066
239 09:52:50.361601
240 09:52:50.370531 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
241 09:52:50.373975 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
242 09:52:50.380563 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
243 09:52:50.383781 CPU: AES supported, TXT NOT supported, VT supported
244 09:52:50.390327 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
245 09:52:50.393834 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
246 09:52:50.400181 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
247 09:52:50.403880 VBOOT: Loading verstage.
248 09:52:50.407017 FMAP: Found "FLASH" version 1.1 at 0x1804000.
249 09:52:50.414085 FMAP: base = 0x0 size = 0x2000000 #areas = 32
250 09:52:50.417573 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
251 09:52:50.427227 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
252 09:52:50.434063 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
253 09:52:50.434635
254 09:52:50.434971
255 09:52:50.447469 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
256 09:52:50.461267 Probing TPM: . done!
257 09:52:50.464596 TPM ready after 0 ms
258 09:52:50.468228 Connected to device vid:did:rid of 1ae0:0028:00
259 09:52:50.478875 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
260 09:52:50.486166 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
261 09:52:50.488963 Initialized TPM device CR50 revision 0
262 09:52:50.539887 tlcl_send_startup: Startup return code is 0
263 09:52:50.540501 TPM: setup succeeded
264 09:52:50.553580 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
265 09:52:50.568209 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 09:52:50.581121 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
267 09:52:50.590489 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 09:52:50.594098 Chrome EC: UHEPI supported
269 09:52:50.597239 Phase 1
270 09:52:50.601120 FMAP: area GBB found @ 1805000 (458752 bytes)
271 09:52:50.610966 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
272 09:52:50.617628 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
273 09:52:50.623967 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
274 09:52:50.630597 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
275 09:52:50.633987 Recovery requested (1009000e)
276 09:52:50.637547 TPM: Extending digest for VBOOT: boot mode into PCR 0
277 09:52:50.648901 tlcl_extend: response is 0
278 09:52:50.655655 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
279 09:52:50.665695 tlcl_extend: response is 0
280 09:52:50.672010 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
281 09:52:50.678726 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
282 09:52:50.686342 BS: verstage times (exec / console): total (unknown) / 142 ms
283 09:52:50.686675
284 09:52:50.686913
285 09:52:50.698820 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
286 09:52:50.705415 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
287 09:52:50.708849 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
288 09:52:50.712083 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
289 09:52:50.718681 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
290 09:52:50.722125 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
291 09:52:50.724951 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
292 09:52:50.728728 TCO_STS: 0000 0000
293 09:52:50.731971 GEN_PMCON: d0015038 00002200
294 09:52:50.735430 GBLRST_CAUSE: 00000000 00000000
295 09:52:50.735817 HPR_CAUSE0: 00000000
296 09:52:50.738795 prev_sleep_state 5
297 09:52:50.741945 Boot Count incremented to 25774
298 09:52:50.749188 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
299 09:52:50.754972 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
300 09:52:50.761854 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
301 09:52:50.768248 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
302 09:52:50.773139 Chrome EC: UHEPI supported
303 09:52:50.779920 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
304 09:52:50.793482 Probing TPM: done!
305 09:52:50.799413 Connected to device vid:did:rid of 1ae0:0028:00
306 09:52:50.810579 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
307 09:52:50.817377 Initialized TPM device CR50 revision 0
308 09:52:50.826831 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
309 09:52:50.833632 MRC: Hash idx 0x100b comparison successful.
310 09:52:50.837871 MRC cache found, size faa8
311 09:52:50.838491 bootmode is set to: 2
312 09:52:50.840287 SPD index = 0
313 09:52:50.846454 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
314 09:52:50.849842 SPD: module type is LPDDR4X
315 09:52:50.857244 SPD: module part number is MT53E512M64D4NW-046
316 09:52:50.860231 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
317 09:52:50.866717 SPD: device width 16 bits, bus width 16 bits
318 09:52:50.869848 SPD: module size is 1024 MB (per channel)
319 09:52:51.303745 CBMEM:
320 09:52:51.306746 IMD: root @ 0x76fff000 254 entries.
321 09:52:51.310048 IMD: root @ 0x76ffec00 62 entries.
322 09:52:51.312764 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
323 09:52:51.320269 FMAP: area RW_VPD found @ f35000 (8192 bytes)
324 09:52:51.323327 External stage cache:
325 09:52:51.326472 IMD: root @ 0x7b3ff000 254 entries.
326 09:52:51.329826 IMD: root @ 0x7b3fec00 62 entries.
327 09:52:51.345150 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
328 09:52:51.352192 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
329 09:52:51.358364 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
330 09:52:51.372159 MRC: 'RECOVERY_MRC_CACHE' does not need update.
331 09:52:51.378830 cse_lite: Skip switching to RW in the recovery path
332 09:52:51.379199 8 DIMMs found
333 09:52:51.379492 SMM Memory Map
334 09:52:51.382473 SMRAM : 0x7b000000 0x800000
335 09:52:51.386231 Subregion 0: 0x7b000000 0x200000
336 09:52:51.389967 Subregion 1: 0x7b200000 0x200000
337 09:52:51.393661 Subregion 2: 0x7b400000 0x400000
338 09:52:51.396947 top_of_ram = 0x77000000
339 09:52:51.403487 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
340 09:52:51.406551 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
341 09:52:51.413771 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
342 09:52:51.417121 MTRR Range: Start=ff000000 End=0 (Size 1000000)
343 09:52:51.427264 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
344 09:52:51.430106 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
345 09:52:51.442099 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
346 09:52:51.448542 Processing 211 relocs. Offset value of 0x74c0b000
347 09:52:51.454933 BS: romstage times (exec / console): total (unknown) / 277 ms
348 09:52:51.461304
349 09:52:51.461844
350 09:52:51.471218 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
351 09:52:51.474264 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
352 09:52:51.484895 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
353 09:52:51.491221 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
354 09:52:51.497677 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
355 09:52:51.504321 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
356 09:52:51.551671 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
357 09:52:51.558083 Processing 5008 relocs. Offset value of 0x75d98000
358 09:52:51.561125 BS: postcar times (exec / console): total (unknown) / 59 ms
359 09:52:51.564520
360 09:52:51.564913
361 09:52:51.574260 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
362 09:52:51.574778 Normal boot
363 09:52:51.578010 FW_CONFIG value is 0x804c02
364 09:52:51.581044 PCI: 00:07.0 disabled by fw_config
365 09:52:51.584877 PCI: 00:07.1 disabled by fw_config
366 09:52:51.588060 PCI: 00:0d.2 disabled by fw_config
367 09:52:51.591334 PCI: 00:1c.7 disabled by fw_config
368 09:52:51.598245 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 09:52:51.604620 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 09:52:51.608389 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 09:52:51.611501 GENERIC: 0.0 disabled by fw_config
372 09:52:51.614549 GENERIC: 1.0 disabled by fw_config
373 09:52:51.621506 fw_config match found: DB_USB=USB3_ACTIVE
374 09:52:51.624901 fw_config match found: DB_USB=USB3_ACTIVE
375 09:52:51.627740 fw_config match found: DB_USB=USB3_ACTIVE
376 09:52:51.631505 fw_config match found: DB_USB=USB3_ACTIVE
377 09:52:51.637964 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
378 09:52:51.644398 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
379 09:52:51.654254 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
380 09:52:51.660960 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
381 09:52:51.664428 microcode: sig=0x806c1 pf=0x80 revision=0x86
382 09:52:51.670889 microcode: Update skipped, already up-to-date
383 09:52:51.677612 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
384 09:52:51.704880 Detected 4 core, 8 thread CPU.
385 09:52:51.708060 Setting up SMI for CPU
386 09:52:51.711969 IED base = 0x7b400000
387 09:52:51.712389 IED size = 0x00400000
388 09:52:51.714685 Will perform SMM setup.
389 09:52:51.721958 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
390 09:52:51.728019 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
391 09:52:51.734344 Processing 16 relocs. Offset value of 0x00030000
392 09:52:51.737977 Attempting to start 7 APs
393 09:52:51.741367 Waiting for 10ms after sending INIT.
394 09:52:51.756981 Waiting for 1st SIPI to complete...done.
395 09:52:51.757415 AP: slot 1 apic_id 1.
396 09:52:51.760766 AP: slot 6 apic_id 2.
397 09:52:51.763577 AP: slot 2 apic_id 3.
398 09:52:51.764314 AP: slot 7 apic_id 4.
399 09:52:51.766749 AP: slot 3 apic_id 5.
400 09:52:51.770080 Waiting for 2nd SIPI to complete...done.
401 09:52:51.773620 AP: slot 4 apic_id 7.
402 09:52:51.776919 AP: slot 5 apic_id 6.
403 09:52:51.783337 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
404 09:52:51.789836 Processing 13 relocs. Offset value of 0x00038000
405 09:52:51.790276 Unable to locate Global NVS
406 09:52:51.800163 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
407 09:52:51.803709 Installing permanent SMM handler to 0x7b000000
408 09:52:51.813826 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
409 09:52:51.816615 Processing 794 relocs. Offset value of 0x7b010000
410 09:52:51.826496 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
411 09:52:51.829769 Processing 13 relocs. Offset value of 0x7b008000
412 09:52:51.836725 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
413 09:52:51.843131 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
414 09:52:51.846046 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
415 09:52:51.852733 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
416 09:52:51.859362 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
417 09:52:51.866362 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
418 09:52:51.872719 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
419 09:52:51.873121 Unable to locate Global NVS
420 09:52:51.882840 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
421 09:52:51.886133 Clearing SMI status registers
422 09:52:51.886467 SMI_STS: PM1
423 09:52:51.889746 PM1_STS: PWRBTN
424 09:52:51.896032 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 09:52:51.899583 In relocation handler: CPU 0
426 09:52:51.903073 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 09:52:51.909012 Writing SMRR. base = 0x7b000006, mask=0xff800c00
428 09:52:51.909319 Relocation complete.
429 09:52:51.919766 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 09:52:51.920248 In relocation handler: CPU 1
431 09:52:51.925675 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 09:52:51.925983 Relocation complete.
433 09:52:51.935602 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
434 09:52:51.936149 In relocation handler: CPU 5
435 09:52:51.942734 New SMBASE=0x7affec00 IEDBASE=0x7b400000
436 09:52:51.946487 Writing SMRR. base = 0x7b000006, mask=0xff800c00
437 09:52:51.949523 Relocation complete.
438 09:52:51.955816 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
439 09:52:51.959208 In relocation handler: CPU 4
440 09:52:51.962589 New SMBASE=0x7afff000 IEDBASE=0x7b400000
441 09:52:51.965847 Relocation complete.
442 09:52:51.972120 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
443 09:52:51.975625 In relocation handler: CPU 2
444 09:52:51.978999 New SMBASE=0x7afff800 IEDBASE=0x7b400000
445 09:52:51.982358 Relocation complete.
446 09:52:51.989079 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
447 09:52:51.992166 In relocation handler: CPU 6
448 09:52:51.996403 New SMBASE=0x7affe800 IEDBASE=0x7b400000
449 09:52:52.002904 Writing SMRR. base = 0x7b000006, mask=0xff800c00
450 09:52:52.003203 Relocation complete.
451 09:52:52.009177 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
452 09:52:52.012290 In relocation handler: CPU 3
453 09:52:52.015723 New SMBASE=0x7afff400 IEDBASE=0x7b400000
454 09:52:52.019244 Relocation complete.
455 09:52:52.025832 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
456 09:52:52.029151 In relocation handler: CPU 7
457 09:52:52.032137 New SMBASE=0x7affe400 IEDBASE=0x7b400000
458 09:52:52.039105 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 09:52:52.042144 Relocation complete.
460 09:52:52.042583 Initializing CPU #0
461 09:52:52.045340 CPU: vendor Intel device 806c1
462 09:52:52.049318 CPU: family 06, model 8c, stepping 01
463 09:52:52.053018 Clearing out pending MCEs
464 09:52:52.056242 Setting up local APIC...
465 09:52:52.056571 apic_id: 0x00 done.
466 09:52:52.059564 Turbo is available but hidden
467 09:52:52.063199 Turbo is available and visible
468 09:52:52.069905 microcode: Update skipped, already up-to-date
469 09:52:52.070325 CPU #0 initialized
470 09:52:52.073275 Initializing CPU #4
471 09:52:52.076143 Initializing CPU #2
472 09:52:52.076561 Initializing CPU #6
473 09:52:52.079735 CPU: vendor Intel device 806c1
474 09:52:52.082777 CPU: family 06, model 8c, stepping 01
475 09:52:52.085992 CPU: vendor Intel device 806c1
476 09:52:52.089825 CPU: family 06, model 8c, stepping 01
477 09:52:52.092906 Clearing out pending MCEs
478 09:52:52.096709 Clearing out pending MCEs
479 09:52:52.099098 CPU: vendor Intel device 806c1
480 09:52:52.102694 CPU: family 06, model 8c, stepping 01
481 09:52:52.106148 Initializing CPU #7
482 09:52:52.106596 Initializing CPU #3
483 09:52:52.109608 CPU: vendor Intel device 806c1
484 09:52:52.112715 CPU: family 06, model 8c, stepping 01
485 09:52:52.116470 CPU: vendor Intel device 806c1
486 09:52:52.119379 CPU: family 06, model 8c, stepping 01
487 09:52:52.122659 Clearing out pending MCEs
488 09:52:52.125865 Clearing out pending MCEs
489 09:52:52.129308 Setting up local APIC...
490 09:52:52.132795 Setting up local APIC...
491 09:52:52.133130 Initializing CPU #1
492 09:52:52.136045 apic_id: 0x02 done.
493 09:52:52.139675 Setting up local APIC...
494 09:52:52.140019 Initializing CPU #5
495 09:52:52.142451 Clearing out pending MCEs
496 09:52:52.145805 CPU: vendor Intel device 806c1
497 09:52:52.149063 CPU: family 06, model 8c, stepping 01
498 09:52:52.152194 Setting up local APIC...
499 09:52:52.155686 Clearing out pending MCEs
500 09:52:52.155908 apic_id: 0x07 done.
501 09:52:52.158795 Setting up local APIC...
502 09:52:52.161932 apic_id: 0x04 done.
503 09:52:52.162247 Setting up local APIC...
504 09:52:52.168761 microcode: Update skipped, already up-to-date
505 09:52:52.169067 apic_id: 0x03 done.
506 09:52:52.172299 CPU #6 initialized
507 09:52:52.175483 microcode: Update skipped, already up-to-date
508 09:52:52.178851 apic_id: 0x06 done.
509 09:52:52.182153 CPU #4 initialized
510 09:52:52.185430 microcode: Update skipped, already up-to-date
511 09:52:52.189207 microcode: Update skipped, already up-to-date
512 09:52:52.195472 microcode: Update skipped, already up-to-date
513 09:52:52.198899 CPU: vendor Intel device 806c1
514 09:52:52.202756 CPU: family 06, model 8c, stepping 01
515 09:52:52.205428 CPU #7 initialized
516 09:52:52.205617 apic_id: 0x05 done.
517 09:52:52.208828 CPU #2 initialized
518 09:52:52.212032 microcode: Update skipped, already up-to-date
519 09:52:52.215264 Clearing out pending MCEs
520 09:52:52.219070 CPU #5 initialized
521 09:52:52.219194 Setting up local APIC...
522 09:52:52.221627 CPU #3 initialized
523 09:52:52.225049 apic_id: 0x01 done.
524 09:52:52.229154 microcode: Update skipped, already up-to-date
525 09:52:52.232030 CPU #1 initialized
526 09:52:52.235141 bsp_do_flight_plan done after 459 msecs.
527 09:52:52.238374 CPU: frequency set to 4000 MHz
528 09:52:52.238487 Enabling SMIs.
529 09:52:52.245420 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
530 09:52:52.261518 SATAXPCIE1 indicates PCIe NVMe is present
531 09:52:52.264868 Probing TPM: done!
532 09:52:52.268773 Connected to device vid:did:rid of 1ae0:0028:00
533 09:52:52.278703 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
534 09:52:52.282126 Initialized TPM device CR50 revision 0
535 09:52:52.285790 Enabling S0i3.4
536 09:52:52.291974 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
537 09:52:52.295764 Found a VBT of 8704 bytes after decompression
538 09:52:52.302278 cse_lite: CSE RO boot. HybridStorageMode disabled
539 09:52:52.308462 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
540 09:52:52.385405 FSPS returned 0
541 09:52:52.388177 Executing Phase 1 of FspMultiPhaseSiInit
542 09:52:52.398233 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
543 09:52:52.401411 port C0 DISC req: usage 1 usb3 1 usb2 5
544 09:52:52.405075 Raw Buffer output 0 00000511
545 09:52:52.407999 Raw Buffer output 1 00000000
546 09:52:52.411815 pmc_send_ipc_cmd succeeded
547 09:52:52.418583 port C1 DISC req: usage 1 usb3 2 usb2 3
548 09:52:52.418668 Raw Buffer output 0 00000321
549 09:52:52.421915 Raw Buffer output 1 00000000
550 09:52:52.426248 pmc_send_ipc_cmd succeeded
551 09:52:52.431076 Detected 4 core, 8 thread CPU.
552 09:52:52.434285 Detected 4 core, 8 thread CPU.
553 09:52:52.668359 Display FSP Version Info HOB
554 09:52:52.672225 Reference Code - CPU = a.0.4c.31
555 09:52:52.675223 uCode Version = 0.0.0.86
556 09:52:52.678339 TXT ACM version = ff.ff.ff.ffff
557 09:52:52.681693 Reference Code - ME = a.0.4c.31
558 09:52:52.685176 MEBx version = 0.0.0.0
559 09:52:52.688429 ME Firmware Version = Consumer SKU
560 09:52:52.691888 Reference Code - PCH = a.0.4c.31
561 09:52:52.695192 PCH-CRID Status = Disabled
562 09:52:52.699032 PCH-CRID Original Value = ff.ff.ff.ffff
563 09:52:52.701711 PCH-CRID New Value = ff.ff.ff.ffff
564 09:52:52.705671 OPROM - RST - RAID = ff.ff.ff.ffff
565 09:52:52.709322 PCH Hsio Version = 4.0.0.0
566 09:52:52.712156 Reference Code - SA - System Agent = a.0.4c.31
567 09:52:52.715336 Reference Code - MRC = 2.0.0.1
568 09:52:52.718389 SA - PCIe Version = a.0.4c.31
569 09:52:52.722294 SA-CRID Status = Disabled
570 09:52:52.725799 SA-CRID Original Value = 0.0.0.1
571 09:52:52.728817 SA-CRID New Value = 0.0.0.1
572 09:52:52.731667 OPROM - VBIOS = ff.ff.ff.ffff
573 09:52:52.734990 IO Manageability Engine FW Version = 11.1.4.0
574 09:52:52.738516 PHY Build Version = 0.0.0.e0
575 09:52:52.741849 Thunderbolt(TM) FW Version = 0.0.0.0
576 09:52:52.748173 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
577 09:52:52.751817 ITSS IRQ Polarities Before:
578 09:52:52.751902 IPC0: 0xffffffff
579 09:52:52.755351 IPC1: 0xffffffff
580 09:52:52.755440 IPC2: 0xffffffff
581 09:52:52.758292 IPC3: 0xffffffff
582 09:52:52.761784 ITSS IRQ Polarities After:
583 09:52:52.761876 IPC0: 0xffffffff
584 09:52:52.764994 IPC1: 0xffffffff
585 09:52:52.765085 IPC2: 0xffffffff
586 09:52:52.768179 IPC3: 0xffffffff
587 09:52:52.771486 Found PCIe Root Port #9 at PCI: 00:1d.0.
588 09:52:52.785159 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
589 09:52:52.794884 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
590 09:52:52.808513 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
591 09:52:52.815182 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
592 09:52:52.815281 Enumerating buses...
593 09:52:52.821794 Show all devs... Before device enumeration.
594 09:52:52.821876 Root Device: enabled 1
595 09:52:52.824922 DOMAIN: 0000: enabled 1
596 09:52:52.828074 CPU_CLUSTER: 0: enabled 1
597 09:52:52.831419 PCI: 00:00.0: enabled 1
598 09:52:52.831503 PCI: 00:02.0: enabled 1
599 09:52:52.834825 PCI: 00:04.0: enabled 1
600 09:52:52.838237 PCI: 00:05.0: enabled 1
601 09:52:52.841401 PCI: 00:06.0: enabled 0
602 09:52:52.841511 PCI: 00:07.0: enabled 0
603 09:52:52.844515 PCI: 00:07.1: enabled 0
604 09:52:52.847791 PCI: 00:07.2: enabled 0
605 09:52:52.851343 PCI: 00:07.3: enabled 0
606 09:52:52.851420 PCI: 00:08.0: enabled 1
607 09:52:52.854933 PCI: 00:09.0: enabled 0
608 09:52:52.858347 PCI: 00:0a.0: enabled 0
609 09:52:52.861199 PCI: 00:0d.0: enabled 1
610 09:52:52.861277 PCI: 00:0d.1: enabled 0
611 09:52:52.864488 PCI: 00:0d.2: enabled 0
612 09:52:52.867777 PCI: 00:0d.3: enabled 0
613 09:52:52.871608 PCI: 00:0e.0: enabled 0
614 09:52:52.871720 PCI: 00:10.2: enabled 1
615 09:52:52.874676 PCI: 00:10.6: enabled 0
616 09:52:52.877822 PCI: 00:10.7: enabled 0
617 09:52:52.877903 PCI: 00:12.0: enabled 0
618 09:52:52.881499 PCI: 00:12.6: enabled 0
619 09:52:52.884582 PCI: 00:13.0: enabled 0
620 09:52:52.888283 PCI: 00:14.0: enabled 1
621 09:52:52.888362 PCI: 00:14.1: enabled 0
622 09:52:52.891194 PCI: 00:14.2: enabled 1
623 09:52:52.894903 PCI: 00:14.3: enabled 1
624 09:52:52.897869 PCI: 00:15.0: enabled 1
625 09:52:52.897944 PCI: 00:15.1: enabled 1
626 09:52:52.901200 PCI: 00:15.2: enabled 1
627 09:52:52.904545 PCI: 00:15.3: enabled 1
628 09:52:52.908161 PCI: 00:16.0: enabled 1
629 09:52:52.908243 PCI: 00:16.1: enabled 0
630 09:52:52.911183 PCI: 00:16.2: enabled 0
631 09:52:52.914755 PCI: 00:16.3: enabled 0
632 09:52:52.914837 PCI: 00:16.4: enabled 0
633 09:52:52.917794 PCI: 00:16.5: enabled 0
634 09:52:52.921187 PCI: 00:17.0: enabled 1
635 09:52:52.924243 PCI: 00:19.0: enabled 0
636 09:52:52.924325 PCI: 00:19.1: enabled 1
637 09:52:52.927841 PCI: 00:19.2: enabled 0
638 09:52:52.931187 PCI: 00:1c.0: enabled 1
639 09:52:52.934703 PCI: 00:1c.1: enabled 0
640 09:52:52.934789 PCI: 00:1c.2: enabled 0
641 09:52:52.938308 PCI: 00:1c.3: enabled 0
642 09:52:52.941211 PCI: 00:1c.4: enabled 0
643 09:52:52.945004 PCI: 00:1c.5: enabled 0
644 09:52:52.945534 PCI: 00:1c.6: enabled 1
645 09:52:52.947966 PCI: 00:1c.7: enabled 0
646 09:52:52.951812 PCI: 00:1d.0: enabled 1
647 09:52:52.954724 PCI: 00:1d.1: enabled 0
648 09:52:52.955197 PCI: 00:1d.2: enabled 1
649 09:52:52.958064 PCI: 00:1d.3: enabled 0
650 09:52:52.961538 PCI: 00:1e.0: enabled 1
651 09:52:52.962229 PCI: 00:1e.1: enabled 0
652 09:52:52.964605 PCI: 00:1e.2: enabled 1
653 09:52:52.967604 PCI: 00:1e.3: enabled 1
654 09:52:52.971042 PCI: 00:1f.0: enabled 1
655 09:52:52.971130 PCI: 00:1f.1: enabled 0
656 09:52:52.974323 PCI: 00:1f.2: enabled 1
657 09:52:52.977667 PCI: 00:1f.3: enabled 1
658 09:52:52.980877 PCI: 00:1f.4: enabled 0
659 09:52:52.981013 PCI: 00:1f.5: enabled 1
660 09:52:52.984210 PCI: 00:1f.6: enabled 0
661 09:52:52.987856 PCI: 00:1f.7: enabled 0
662 09:52:52.987971 APIC: 00: enabled 1
663 09:52:52.991094 GENERIC: 0.0: enabled 1
664 09:52:52.994145 GENERIC: 0.0: enabled 1
665 09:52:52.998265 GENERIC: 1.0: enabled 1
666 09:52:52.998428 GENERIC: 0.0: enabled 1
667 09:52:53.000892 GENERIC: 1.0: enabled 1
668 09:52:53.004186 USB0 port 0: enabled 1
669 09:52:53.007776 GENERIC: 0.0: enabled 1
670 09:52:53.007858 USB0 port 0: enabled 1
671 09:52:53.010792 GENERIC: 0.0: enabled 1
672 09:52:53.014616 I2C: 00:1a: enabled 1
673 09:52:53.014697 I2C: 00:31: enabled 1
674 09:52:53.017636 I2C: 00:32: enabled 1
675 09:52:53.021417 I2C: 00:10: enabled 1
676 09:52:53.021491 I2C: 00:15: enabled 1
677 09:52:53.024098 GENERIC: 0.0: enabled 0
678 09:52:53.027265 GENERIC: 1.0: enabled 0
679 09:52:53.030874 GENERIC: 0.0: enabled 1
680 09:52:53.030955 SPI: 00: enabled 1
681 09:52:53.034135 SPI: 00: enabled 1
682 09:52:53.034226 PNP: 0c09.0: enabled 1
683 09:52:53.037451 GENERIC: 0.0: enabled 1
684 09:52:53.040844 USB3 port 0: enabled 1
685 09:52:53.043953 USB3 port 1: enabled 1
686 09:52:53.044026 USB3 port 2: enabled 0
687 09:52:53.047980 USB3 port 3: enabled 0
688 09:52:53.050793 USB2 port 0: enabled 0
689 09:52:53.050899 USB2 port 1: enabled 1
690 09:52:53.054325 USB2 port 2: enabled 1
691 09:52:53.057200 USB2 port 3: enabled 0
692 09:52:53.060666 USB2 port 4: enabled 1
693 09:52:53.060748 USB2 port 5: enabled 0
694 09:52:53.064966 USB2 port 6: enabled 0
695 09:52:53.067303 USB2 port 7: enabled 0
696 09:52:53.067385 USB2 port 8: enabled 0
697 09:52:53.070622 USB2 port 9: enabled 0
698 09:52:53.074010 USB3 port 0: enabled 0
699 09:52:53.074091 USB3 port 1: enabled 1
700 09:52:53.077317 USB3 port 2: enabled 0
701 09:52:53.081228 USB3 port 3: enabled 0
702 09:52:53.084003 GENERIC: 0.0: enabled 1
703 09:52:53.084084 GENERIC: 1.0: enabled 1
704 09:52:53.087562 APIC: 01: enabled 1
705 09:52:53.090540 APIC: 03: enabled 1
706 09:52:53.090622 APIC: 05: enabled 1
707 09:52:53.094076 APIC: 07: enabled 1
708 09:52:53.094162 APIC: 06: enabled 1
709 09:52:53.097192 APIC: 02: enabled 1
710 09:52:53.100823 APIC: 04: enabled 1
711 09:52:53.100905 Compare with tree...
712 09:52:53.103766 Root Device: enabled 1
713 09:52:53.107602 DOMAIN: 0000: enabled 1
714 09:52:53.110286 PCI: 00:00.0: enabled 1
715 09:52:53.110360 PCI: 00:02.0: enabled 1
716 09:52:53.113915 PCI: 00:04.0: enabled 1
717 09:52:53.117147 GENERIC: 0.0: enabled 1
718 09:52:53.120269 PCI: 00:05.0: enabled 1
719 09:52:53.123990 PCI: 00:06.0: enabled 0
720 09:52:53.124063 PCI: 00:07.0: enabled 0
721 09:52:53.127272 GENERIC: 0.0: enabled 1
722 09:52:53.130519 PCI: 00:07.1: enabled 0
723 09:52:53.134054 GENERIC: 1.0: enabled 1
724 09:52:53.136915 PCI: 00:07.2: enabled 0
725 09:52:53.136988 GENERIC: 0.0: enabled 1
726 09:52:53.140154 PCI: 00:07.3: enabled 0
727 09:52:53.143809 GENERIC: 1.0: enabled 1
728 09:52:53.147294 PCI: 00:08.0: enabled 1
729 09:52:53.150819 PCI: 00:09.0: enabled 0
730 09:52:53.150901 PCI: 00:0a.0: enabled 0
731 09:52:53.153716 PCI: 00:0d.0: enabled 1
732 09:52:53.157032 USB0 port 0: enabled 1
733 09:52:53.160237 USB3 port 0: enabled 1
734 09:52:53.163659 USB3 port 1: enabled 1
735 09:52:53.163747 USB3 port 2: enabled 0
736 09:52:53.166943 USB3 port 3: enabled 0
737 09:52:53.170575 PCI: 00:0d.1: enabled 0
738 09:52:53.174509 PCI: 00:0d.2: enabled 0
739 09:52:53.176923 GENERIC: 0.0: enabled 1
740 09:52:53.181106 PCI: 00:0d.3: enabled 0
741 09:52:53.181193 PCI: 00:0e.0: enabled 0
742 09:52:53.184023 PCI: 00:10.2: enabled 1
743 09:52:53.187268 PCI: 00:10.6: enabled 0
744 09:52:53.190237 PCI: 00:10.7: enabled 0
745 09:52:53.190309 PCI: 00:12.0: enabled 0
746 09:52:53.193959 PCI: 00:12.6: enabled 0
747 09:52:53.197033 PCI: 00:13.0: enabled 0
748 09:52:53.200787 PCI: 00:14.0: enabled 1
749 09:52:53.204002 USB0 port 0: enabled 1
750 09:52:53.204077 USB2 port 0: enabled 0
751 09:52:53.207130 USB2 port 1: enabled 1
752 09:52:53.210150 USB2 port 2: enabled 1
753 09:52:53.213494 USB2 port 3: enabled 0
754 09:52:53.217162 USB2 port 4: enabled 1
755 09:52:53.220540 USB2 port 5: enabled 0
756 09:52:53.220610 USB2 port 6: enabled 0
757 09:52:53.223820 USB2 port 7: enabled 0
758 09:52:53.227074 USB2 port 8: enabled 0
759 09:52:53.230286 USB2 port 9: enabled 0
760 09:52:53.233620 USB3 port 0: enabled 0
761 09:52:53.237529 USB3 port 1: enabled 1
762 09:52:53.237600 USB3 port 2: enabled 0
763 09:52:53.240390 USB3 port 3: enabled 0
764 09:52:53.243506 PCI: 00:14.1: enabled 0
765 09:52:53.246550 PCI: 00:14.2: enabled 1
766 09:52:53.250641 PCI: 00:14.3: enabled 1
767 09:52:53.250722 GENERIC: 0.0: enabled 1
768 09:52:53.253682 PCI: 00:15.0: enabled 1
769 09:52:53.257022 I2C: 00:1a: enabled 1
770 09:52:53.260037 I2C: 00:31: enabled 1
771 09:52:53.260125 I2C: 00:32: enabled 1
772 09:52:53.263256 PCI: 00:15.1: enabled 1
773 09:52:53.266756 I2C: 00:10: enabled 1
774 09:52:53.270302 PCI: 00:15.2: enabled 1
775 09:52:53.273318 PCI: 00:15.3: enabled 1
776 09:52:53.273401 PCI: 00:16.0: enabled 1
777 09:52:53.277033 PCI: 00:16.1: enabled 0
778 09:52:53.280036 PCI: 00:16.2: enabled 0
779 09:52:53.283434 PCI: 00:16.3: enabled 0
780 09:52:53.286732 PCI: 00:16.4: enabled 0
781 09:52:53.286808 PCI: 00:16.5: enabled 0
782 09:52:53.289803 PCI: 00:17.0: enabled 1
783 09:52:53.293874 PCI: 00:19.0: enabled 0
784 09:52:53.298356 PCI: 00:19.1: enabled 1
785 09:52:53.298476 I2C: 00:15: enabled 1
786 09:52:53.301695 PCI: 00:19.2: enabled 0
787 09:52:53.304348 PCI: 00:1d.0: enabled 1
788 09:52:53.307750 GENERIC: 0.0: enabled 1
789 09:52:53.307827 PCI: 00:1e.0: enabled 1
790 09:52:53.358116 PCI: 00:1e.1: enabled 0
791 09:52:53.358712 PCI: 00:1e.2: enabled 1
792 09:52:53.359506 SPI: 00: enabled 1
793 09:52:53.359932 PCI: 00:1e.3: enabled 1
794 09:52:53.360348 SPI: 00: enabled 1
795 09:52:53.360768 PCI: 00:1f.0: enabled 1
796 09:52:53.361182 PNP: 0c09.0: enabled 1
797 09:52:53.361658 PCI: 00:1f.1: enabled 0
798 09:52:53.362027 PCI: 00:1f.2: enabled 1
799 09:52:53.362463 GENERIC: 0.0: enabled 1
800 09:52:53.362987 GENERIC: 0.0: enabled 1
801 09:52:53.363517 GENERIC: 1.0: enabled 1
802 09:52:53.364008 PCI: 00:1f.3: enabled 1
803 09:52:53.364401 PCI: 00:1f.4: enabled 0
804 09:52:53.364880 PCI: 00:1f.5: enabled 1
805 09:52:53.365310 PCI: 00:1f.6: enabled 0
806 09:52:53.365828 PCI: 00:1f.7: enabled 0
807 09:52:53.366188 CPU_CLUSTER: 0: enabled 1
808 09:52:53.366676 APIC: 00: enabled 1
809 09:52:53.382567 APIC: 01: enabled 1
810 09:52:53.383134 APIC: 03: enabled 1
811 09:52:53.383579 APIC: 05: enabled 1
812 09:52:53.384336 APIC: 07: enabled 1
813 09:52:53.384701 APIC: 06: enabled 1
814 09:52:53.385107 APIC: 02: enabled 1
815 09:52:53.385507 APIC: 04: enabled 1
816 09:52:53.385902 Root Device scanning...
817 09:52:53.386543 scan_static_bus for Root Device
818 09:52:53.386928 DOMAIN: 0000 enabled
819 09:52:53.387330 CPU_CLUSTER: 0 enabled
820 09:52:53.389196 DOMAIN: 0000 scanning...
821 09:52:53.392909 PCI: pci_scan_bus for bus 00
822 09:52:53.396478 PCI: 00:00.0 [8086/0000] ops
823 09:52:53.399398 PCI: 00:00.0 [8086/9a12] enabled
824 09:52:53.402825 PCI: 00:02.0 [8086/0000] bus ops
825 09:52:53.405839 PCI: 00:02.0 [8086/9a40] enabled
826 09:52:53.409675 PCI: 00:04.0 [8086/0000] bus ops
827 09:52:53.412851 PCI: 00:04.0 [8086/9a03] enabled
828 09:52:53.416260 PCI: 00:05.0 [8086/9a19] enabled
829 09:52:53.419767 PCI: 00:07.0 [0000/0000] hidden
830 09:52:53.422877 PCI: 00:08.0 [8086/9a11] enabled
831 09:52:53.426309 PCI: 00:0a.0 [8086/9a0d] disabled
832 09:52:53.429291 PCI: 00:0d.0 [8086/0000] bus ops
833 09:52:53.432723 PCI: 00:0d.0 [8086/9a13] enabled
834 09:52:53.436571 PCI: 00:14.0 [8086/0000] bus ops
835 09:52:53.439438 PCI: 00:14.0 [8086/a0ed] enabled
836 09:52:53.442715 PCI: 00:14.2 [8086/a0ef] enabled
837 09:52:53.446017 PCI: 00:14.3 [8086/0000] bus ops
838 09:52:53.449294 PCI: 00:14.3 [8086/a0f0] enabled
839 09:52:53.453312 PCI: 00:15.0 [8086/0000] bus ops
840 09:52:53.455827 PCI: 00:15.0 [8086/a0e8] enabled
841 09:52:53.459211 PCI: 00:15.1 [8086/0000] bus ops
842 09:52:53.462463 PCI: 00:15.1 [8086/a0e9] enabled
843 09:52:53.465758 PCI: 00:15.2 [8086/0000] bus ops
844 09:52:53.469587 PCI: 00:15.2 [8086/a0ea] enabled
845 09:52:53.472595 PCI: 00:15.3 [8086/0000] bus ops
846 09:52:53.475959 PCI: 00:15.3 [8086/a0eb] enabled
847 09:52:53.479647 PCI: 00:16.0 [8086/0000] ops
848 09:52:53.483090 PCI: 00:16.0 [8086/a0e0] enabled
849 09:52:53.486026 PCI: Static device PCI: 00:17.0 not found, disabling it.
850 09:52:53.489260 PCI: 00:19.0 [8086/0000] bus ops
851 09:52:53.492471 PCI: 00:19.0 [8086/a0c5] disabled
852 09:52:53.496034 PCI: 00:19.1 [8086/0000] bus ops
853 09:52:53.499081 PCI: 00:19.1 [8086/a0c6] enabled
854 09:52:53.502812 PCI: 00:1d.0 [8086/0000] bus ops
855 09:52:53.505675 PCI: 00:1d.0 [8086/a0b0] enabled
856 09:52:53.509099 PCI: 00:1e.0 [8086/0000] ops
857 09:52:53.512559 PCI: 00:1e.0 [8086/a0a8] enabled
858 09:52:53.516431 PCI: 00:1e.2 [8086/0000] bus ops
859 09:52:53.519128 PCI: 00:1e.2 [8086/a0aa] enabled
860 09:52:53.522461 PCI: 00:1e.3 [8086/0000] bus ops
861 09:52:53.525748 PCI: 00:1e.3 [8086/a0ab] enabled
862 09:52:53.528985 PCI: 00:1f.0 [8086/0000] bus ops
863 09:52:53.532419 PCI: 00:1f.0 [8086/a087] enabled
864 09:52:53.535962 RTC Init
865 09:52:53.539242 Set power on after power failure.
866 09:52:53.539604 Disabling Deep S3
867 09:52:53.542365 Disabling Deep S3
868 09:52:53.542696 Disabling Deep S4
869 09:52:53.545823 Disabling Deep S4
870 09:52:53.549077 Disabling Deep S5
871 09:52:53.549445 Disabling Deep S5
872 09:52:53.552194 PCI: 00:1f.2 [0000/0000] hidden
873 09:52:53.555923 PCI: 00:1f.3 [8086/0000] bus ops
874 09:52:53.559010 PCI: 00:1f.3 [8086/a0c8] enabled
875 09:52:53.562645 PCI: 00:1f.5 [8086/0000] bus ops
876 09:52:53.566225 PCI: 00:1f.5 [8086/a0a4] enabled
877 09:52:53.569155 PCI: Leftover static devices:
878 09:52:53.569548 PCI: 00:10.2
879 09:52:53.572568 PCI: 00:10.6
880 09:52:53.572934 PCI: 00:10.7
881 09:52:53.575693 PCI: 00:06.0
882 09:52:53.575988 PCI: 00:07.1
883 09:52:53.579208 PCI: 00:07.2
884 09:52:53.579544 PCI: 00:07.3
885 09:52:53.579830 PCI: 00:09.0
886 09:52:53.582600 PCI: 00:0d.1
887 09:52:53.582946 PCI: 00:0d.2
888 09:52:53.585689 PCI: 00:0d.3
889 09:52:53.585942 PCI: 00:0e.0
890 09:52:53.586157 PCI: 00:12.0
891 09:52:53.588833 PCI: 00:12.6
892 09:52:53.589080 PCI: 00:13.0
893 09:52:53.592282 PCI: 00:14.1
894 09:52:53.592582 PCI: 00:16.1
895 09:52:53.592834 PCI: 00:16.2
896 09:52:53.595953 PCI: 00:16.3
897 09:52:53.596300 PCI: 00:16.4
898 09:52:53.598847 PCI: 00:16.5
899 09:52:53.599206 PCI: 00:17.0
900 09:52:53.602211 PCI: 00:19.2
901 09:52:53.602546 PCI: 00:1e.1
902 09:52:53.602789 PCI: 00:1f.1
903 09:52:53.605765 PCI: 00:1f.4
904 09:52:53.606080 PCI: 00:1f.6
905 09:52:53.609234 PCI: 00:1f.7
906 09:52:53.612323 PCI: Check your devicetree.cb.
907 09:52:53.612665 PCI: 00:02.0 scanning...
908 09:52:53.615919 scan_generic_bus for PCI: 00:02.0
909 09:52:53.622236 scan_generic_bus for PCI: 00:02.0 done
910 09:52:53.626087 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
911 09:52:53.629455 PCI: 00:04.0 scanning...
912 09:52:53.632508 scan_generic_bus for PCI: 00:04.0
913 09:52:53.632806 GENERIC: 0.0 enabled
914 09:52:53.639029 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
915 09:52:53.645619 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
916 09:52:53.648657 PCI: 00:0d.0 scanning...
917 09:52:53.651899 scan_static_bus for PCI: 00:0d.0
918 09:52:53.652369 USB0 port 0 enabled
919 09:52:53.655337 USB0 port 0 scanning...
920 09:52:53.658593 scan_static_bus for USB0 port 0
921 09:52:53.662147 USB3 port 0 enabled
922 09:52:53.662619 USB3 port 1 enabled
923 09:52:53.665611 USB3 port 2 disabled
924 09:52:53.669356 USB3 port 3 disabled
925 09:52:53.669877 USB3 port 0 scanning...
926 09:52:53.672487 scan_static_bus for USB3 port 0
927 09:52:53.675267 scan_static_bus for USB3 port 0 done
928 09:52:53.682083 scan_bus: bus USB3 port 0 finished in 6 msecs
929 09:52:53.684996 USB3 port 1 scanning...
930 09:52:53.688595 scan_static_bus for USB3 port 1
931 09:52:53.691808 scan_static_bus for USB3 port 1 done
932 09:52:53.695361 scan_bus: bus USB3 port 1 finished in 6 msecs
933 09:52:53.698469 scan_static_bus for USB0 port 0 done
934 09:52:53.705077 scan_bus: bus USB0 port 0 finished in 43 msecs
935 09:52:53.708388 scan_static_bus for PCI: 00:0d.0 done
936 09:52:53.711825 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
937 09:52:53.715092 PCI: 00:14.0 scanning...
938 09:52:53.718586 scan_static_bus for PCI: 00:14.0
939 09:52:53.721658 USB0 port 0 enabled
940 09:52:53.722070 USB0 port 0 scanning...
941 09:52:53.725109 scan_static_bus for USB0 port 0
942 09:52:53.728311 USB2 port 0 disabled
943 09:52:53.731881 USB2 port 1 enabled
944 09:52:53.732295 USB2 port 2 enabled
945 09:52:53.735152 USB2 port 3 disabled
946 09:52:53.738266 USB2 port 4 enabled
947 09:52:53.738727 USB2 port 5 disabled
948 09:52:53.741579 USB2 port 6 disabled
949 09:52:53.745213 USB2 port 7 disabled
950 09:52:53.745621 USB2 port 8 disabled
951 09:52:53.748367 USB2 port 9 disabled
952 09:52:53.748774 USB3 port 0 disabled
953 09:52:53.751836 USB3 port 1 enabled
954 09:52:53.755219 USB3 port 2 disabled
955 09:52:53.755802 USB3 port 3 disabled
956 09:52:53.758565 USB2 port 1 scanning...
957 09:52:53.761769 scan_static_bus for USB2 port 1
958 09:52:53.765003 scan_static_bus for USB2 port 1 done
959 09:52:53.771276 scan_bus: bus USB2 port 1 finished in 6 msecs
960 09:52:53.771519 USB2 port 2 scanning...
961 09:52:53.775095 scan_static_bus for USB2 port 2
962 09:52:53.781583 scan_static_bus for USB2 port 2 done
963 09:52:53.784632 scan_bus: bus USB2 port 2 finished in 6 msecs
964 09:52:53.787773 USB2 port 4 scanning...
965 09:52:53.791245 scan_static_bus for USB2 port 4
966 09:52:53.794605 scan_static_bus for USB2 port 4 done
967 09:52:53.797862 scan_bus: bus USB2 port 4 finished in 6 msecs
968 09:52:53.801622 USB3 port 1 scanning...
969 09:52:53.804190 scan_static_bus for USB3 port 1
970 09:52:53.808040 scan_static_bus for USB3 port 1 done
971 09:52:53.814716 scan_bus: bus USB3 port 1 finished in 6 msecs
972 09:52:53.817562 scan_static_bus for USB0 port 0 done
973 09:52:53.820920 scan_bus: bus USB0 port 0 finished in 93 msecs
974 09:52:53.824103 scan_static_bus for PCI: 00:14.0 done
975 09:52:53.830750 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
976 09:52:53.830831 PCI: 00:14.3 scanning...
977 09:52:53.834153 scan_static_bus for PCI: 00:14.3
978 09:52:53.837757 GENERIC: 0.0 enabled
979 09:52:53.841310 scan_static_bus for PCI: 00:14.3 done
980 09:52:53.847729 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
981 09:52:53.847810 PCI: 00:15.0 scanning...
982 09:52:53.851153 scan_static_bus for PCI: 00:15.0
983 09:52:53.855032 I2C: 00:1a enabled
984 09:52:53.858017 I2C: 00:31 enabled
985 09:52:53.858098 I2C: 00:32 enabled
986 09:52:53.861070 scan_static_bus for PCI: 00:15.0 done
987 09:52:53.867722 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
988 09:52:53.871241 PCI: 00:15.1 scanning...
989 09:52:53.875092 scan_static_bus for PCI: 00:15.1
990 09:52:53.875173 I2C: 00:10 enabled
991 09:52:53.878897 scan_static_bus for PCI: 00:15.1 done
992 09:52:53.885675 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
993 09:52:53.886091 PCI: 00:15.2 scanning...
994 09:52:53.888966 scan_static_bus for PCI: 00:15.2
995 09:52:53.895399 scan_static_bus for PCI: 00:15.2 done
996 09:52:53.899118 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
997 09:52:53.902328 PCI: 00:15.3 scanning...
998 09:52:53.905286 scan_static_bus for PCI: 00:15.3
999 09:52:53.908952 scan_static_bus for PCI: 00:15.3 done
1000 09:52:53.911723 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1001 09:52:53.914904 PCI: 00:19.1 scanning...
1002 09:52:53.918301 scan_static_bus for PCI: 00:19.1
1003 09:52:53.922089 I2C: 00:15 enabled
1004 09:52:53.924978 scan_static_bus for PCI: 00:19.1 done
1005 09:52:53.928704 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1006 09:52:53.931628 PCI: 00:1d.0 scanning...
1007 09:52:53.935106 do_pci_scan_bridge for PCI: 00:1d.0
1008 09:52:53.938354 PCI: pci_scan_bus for bus 01
1009 09:52:53.941630 PCI: 01:00.0 [1c5c/174a] enabled
1010 09:52:53.944900 GENERIC: 0.0 enabled
1011 09:52:53.947866 Enabling Common Clock Configuration
1012 09:52:53.951301 L1 Sub-State supported from root port 29
1013 09:52:53.954548 L1 Sub-State Support = 0xf
1014 09:52:53.958002 CommonModeRestoreTime = 0x28
1015 09:52:53.961634 Power On Value = 0x16, Power On Scale = 0x0
1016 09:52:53.964732 ASPM: Enabled L1
1017 09:52:53.968340 PCIe: Max_Payload_Size adjusted to 128
1018 09:52:53.974811 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1019 09:52:53.975115 PCI: 00:1e.2 scanning...
1020 09:52:53.978312 scan_generic_bus for PCI: 00:1e.2
1021 09:52:53.981453 SPI: 00 enabled
1022 09:52:53.988101 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1023 09:52:53.991333 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1024 09:52:53.995196 PCI: 00:1e.3 scanning...
1025 09:52:53.998066 scan_generic_bus for PCI: 00:1e.3
1026 09:52:54.001651 SPI: 00 enabled
1027 09:52:54.004901 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1028 09:52:54.011857 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1029 09:52:54.014493 PCI: 00:1f.0 scanning...
1030 09:52:54.018046 scan_static_bus for PCI: 00:1f.0
1031 09:52:54.018498 PNP: 0c09.0 enabled
1032 09:52:54.021431 PNP: 0c09.0 scanning...
1033 09:52:54.025195 scan_static_bus for PNP: 0c09.0
1034 09:52:54.027871 scan_static_bus for PNP: 0c09.0 done
1035 09:52:54.034661 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1036 09:52:54.037812 scan_static_bus for PCI: 00:1f.0 done
1037 09:52:54.041086 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1038 09:52:54.044603 PCI: 00:1f.2 scanning...
1039 09:52:54.047947 scan_static_bus for PCI: 00:1f.2
1040 09:52:54.050895 GENERIC: 0.0 enabled
1041 09:52:54.051310 GENERIC: 0.0 scanning...
1042 09:52:54.054446 scan_static_bus for GENERIC: 0.0
1043 09:52:54.058124 GENERIC: 0.0 enabled
1044 09:52:54.061006 GENERIC: 1.0 enabled
1045 09:52:54.064592 scan_static_bus for GENERIC: 0.0 done
1046 09:52:54.068116 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1047 09:52:54.074835 scan_static_bus for PCI: 00:1f.2 done
1048 09:52:54.078120 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1049 09:52:54.081027 PCI: 00:1f.3 scanning...
1050 09:52:54.084357 scan_static_bus for PCI: 00:1f.3
1051 09:52:54.087990 scan_static_bus for PCI: 00:1f.3 done
1052 09:52:54.090957 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1053 09:52:54.094893 PCI: 00:1f.5 scanning...
1054 09:52:54.097685 scan_generic_bus for PCI: 00:1f.5
1055 09:52:54.101467 scan_generic_bus for PCI: 00:1f.5 done
1056 09:52:54.107773 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1057 09:52:54.111201 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1058 09:52:54.114728 scan_static_bus for Root Device done
1059 09:52:54.121032 scan_bus: bus Root Device finished in 737 msecs
1060 09:52:54.121254 done
1061 09:52:54.127363 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1062 09:52:54.130364 Chrome EC: UHEPI supported
1063 09:52:54.137456 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1064 09:52:54.144568 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1065 09:52:54.147157 SPI flash protection: WPSW=0 SRP0=0
1066 09:52:54.150475 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 09:52:54.157448 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1068 09:52:54.160668 found VGA at PCI: 00:02.0
1069 09:52:54.164225 Setting up VGA for PCI: 00:02.0
1070 09:52:54.170632 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 09:52:54.173671 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 09:52:54.177238 Allocating resources...
1073 09:52:54.177566 Reading resources...
1074 09:52:54.184779 Root Device read_resources bus 0 link: 0
1075 09:52:54.187059 DOMAIN: 0000 read_resources bus 0 link: 0
1076 09:52:54.193560 PCI: 00:04.0 read_resources bus 1 link: 0
1077 09:52:54.197175 PCI: 00:04.0 read_resources bus 1 link: 0 done
1078 09:52:54.203642 PCI: 00:0d.0 read_resources bus 0 link: 0
1079 09:52:54.206927 USB0 port 0 read_resources bus 0 link: 0
1080 09:52:54.213382 USB0 port 0 read_resources bus 0 link: 0 done
1081 09:52:54.216709 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1082 09:52:54.219735 PCI: 00:14.0 read_resources bus 0 link: 0
1083 09:52:54.226700 USB0 port 0 read_resources bus 0 link: 0
1084 09:52:54.229992 USB0 port 0 read_resources bus 0 link: 0 done
1085 09:52:54.237007 PCI: 00:14.0 read_resources bus 0 link: 0 done
1086 09:52:54.240245 PCI: 00:14.3 read_resources bus 0 link: 0
1087 09:52:54.247109 PCI: 00:14.3 read_resources bus 0 link: 0 done
1088 09:52:54.250283 PCI: 00:15.0 read_resources bus 0 link: 0
1089 09:52:54.257293 PCI: 00:15.0 read_resources bus 0 link: 0 done
1090 09:52:54.260465 PCI: 00:15.1 read_resources bus 0 link: 0
1091 09:52:54.267061 PCI: 00:15.1 read_resources bus 0 link: 0 done
1092 09:52:54.270120 PCI: 00:19.1 read_resources bus 0 link: 0
1093 09:52:54.277357 PCI: 00:19.1 read_resources bus 0 link: 0 done
1094 09:52:54.280536 PCI: 00:1d.0 read_resources bus 1 link: 0
1095 09:52:54.287445 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1096 09:52:54.290091 PCI: 00:1e.2 read_resources bus 2 link: 0
1097 09:52:54.296713 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1098 09:52:54.300460 PCI: 00:1e.3 read_resources bus 3 link: 0
1099 09:52:54.306762 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1100 09:52:54.310215 PCI: 00:1f.0 read_resources bus 0 link: 0
1101 09:52:54.316662 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1102 09:52:54.320116 PCI: 00:1f.2 read_resources bus 0 link: 0
1103 09:52:54.323485 GENERIC: 0.0 read_resources bus 0 link: 0
1104 09:52:54.330835 GENERIC: 0.0 read_resources bus 0 link: 0 done
1105 09:52:54.333879 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1106 09:52:54.341095 DOMAIN: 0000 read_resources bus 0 link: 0 done
1107 09:52:54.344624 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1108 09:52:54.350835 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1109 09:52:54.354444 Root Device read_resources bus 0 link: 0 done
1110 09:52:54.357764 Done reading resources.
1111 09:52:54.364375 Show resources in subtree (Root Device)...After reading.
1112 09:52:54.367735 Root Device child on link 0 DOMAIN: 0000
1113 09:52:54.371038 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1114 09:52:54.381314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1115 09:52:54.391601 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1116 09:52:54.394203 PCI: 00:00.0
1117 09:52:54.404644 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1118 09:52:54.411321 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1119 09:52:54.420917 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1120 09:52:54.430822 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1121 09:52:54.440786 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1122 09:52:54.450334 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1123 09:52:54.460437 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1124 09:52:54.467446 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1125 09:52:54.477119 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1126 09:52:54.487284 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1127 09:52:54.497072 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1128 09:52:54.507586 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1129 09:52:54.513491 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1130 09:52:54.523565 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1131 09:52:54.533521 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1132 09:52:54.543235 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1133 09:52:54.553373 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1134 09:52:54.563552 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1135 09:52:54.573221 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1136 09:52:54.579646 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1137 09:52:54.583318 PCI: 00:02.0
1138 09:52:54.593142 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1139 09:52:54.602937 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1140 09:52:54.612814 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1141 09:52:54.616669 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1142 09:52:54.626297 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1143 09:52:54.629771 GENERIC: 0.0
1144 09:52:54.629861 PCI: 00:05.0
1145 09:52:54.639609 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1146 09:52:54.646400 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1147 09:52:54.646529 GENERIC: 0.0
1148 09:52:54.649759 PCI: 00:08.0
1149 09:52:54.659406 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 09:52:54.659495 PCI: 00:0a.0
1151 09:52:54.662661 PCI: 00:0d.0 child on link 0 USB0 port 0
1152 09:52:54.672787 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1153 09:52:54.679239 USB0 port 0 child on link 0 USB3 port 0
1154 09:52:54.679343 USB3 port 0
1155 09:52:54.683043 USB3 port 1
1156 09:52:54.683127 USB3 port 2
1157 09:52:54.685877 USB3 port 3
1158 09:52:54.689561 PCI: 00:14.0 child on link 0 USB0 port 0
1159 09:52:54.699349 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1160 09:52:54.706211 USB0 port 0 child on link 0 USB2 port 0
1161 09:52:54.706294 USB2 port 0
1162 09:52:54.709253 USB2 port 1
1163 09:52:54.709334 USB2 port 2
1164 09:52:54.712441 USB2 port 3
1165 09:52:54.712537 USB2 port 4
1166 09:52:54.715942 USB2 port 5
1167 09:52:54.716037 USB2 port 6
1168 09:52:54.719353 USB2 port 7
1169 09:52:54.719433 USB2 port 8
1170 09:52:54.722954 USB2 port 9
1171 09:52:54.723025 USB3 port 0
1172 09:52:54.725850 USB3 port 1
1173 09:52:54.725923 USB3 port 2
1174 09:52:54.729231 USB3 port 3
1175 09:52:54.729323 PCI: 00:14.2
1176 09:52:54.739412 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1177 09:52:54.749069 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 09:52:54.755661 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1179 09:52:54.765972 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1180 09:52:54.766056 GENERIC: 0.0
1181 09:52:54.772821 PCI: 00:15.0 child on link 0 I2C: 00:1a
1182 09:52:54.782436 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 09:52:54.782544 I2C: 00:1a
1184 09:52:54.786015 I2C: 00:31
1185 09:52:54.786101 I2C: 00:32
1186 09:52:54.789034 PCI: 00:15.1 child on link 0 I2C: 00:10
1187 09:52:54.799138 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 09:52:54.802568 I2C: 00:10
1189 09:52:54.802650 PCI: 00:15.2
1190 09:52:54.812554 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 09:52:54.815542 PCI: 00:15.3
1192 09:52:54.826186 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 09:52:54.826273 PCI: 00:16.0
1194 09:52:54.836168 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 09:52:54.838902 PCI: 00:19.0
1196 09:52:54.842827 PCI: 00:19.1 child on link 0 I2C: 00:15
1197 09:52:54.853199 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 09:52:54.855860 I2C: 00:15
1199 09:52:54.859043 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1200 09:52:54.865692 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1201 09:52:54.875720 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1202 09:52:54.885430 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1203 09:52:54.889109 GENERIC: 0.0
1204 09:52:54.889191 PCI: 01:00.0
1205 09:52:54.898847 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 09:52:54.908795 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1207 09:52:54.918604 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1208 09:52:54.918692 PCI: 00:1e.0
1209 09:52:54.932493 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1210 09:52:54.935511 PCI: 00:1e.2 child on link 0 SPI: 00
1211 09:52:54.945509 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 09:52:54.945593 SPI: 00
1213 09:52:54.952427 PCI: 00:1e.3 child on link 0 SPI: 00
1214 09:52:54.962009 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 09:52:54.962090 SPI: 00
1216 09:52:54.965615 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1217 09:52:54.975473 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1218 09:52:54.975568 PNP: 0c09.0
1219 09:52:54.985025 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1220 09:52:54.988724 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1221 09:52:54.998308 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1222 09:52:55.008643 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1223 09:52:55.011709 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1224 09:52:55.015001 GENERIC: 0.0
1225 09:52:55.015081 GENERIC: 1.0
1226 09:52:55.018382 PCI: 00:1f.3
1227 09:52:55.028721 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 09:52:55.038234 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1229 09:52:55.041435 PCI: 00:1f.5
1230 09:52:55.048434 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1231 09:52:55.055112 CPU_CLUSTER: 0 child on link 0 APIC: 00
1232 09:52:55.055214 APIC: 00
1233 09:52:55.055279 APIC: 01
1234 09:52:55.057965 APIC: 03
1235 09:52:55.058058 APIC: 05
1236 09:52:55.058121 APIC: 07
1237 09:52:55.061530 APIC: 06
1238 09:52:55.061626 APIC: 02
1239 09:52:55.064583 APIC: 04
1240 09:52:55.071108 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1241 09:52:55.077796 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1242 09:52:55.084299 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1243 09:52:55.087949 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1244 09:52:55.094421 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 09:52:55.097685 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1246 09:52:55.101131 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1247 09:52:55.107858 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 09:52:55.117702 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 09:52:55.124507 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 09:52:55.130909 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 09:52:55.137619 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 09:52:55.144400 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 09:52:55.151566 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 09:52:55.161195 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 09:52:55.164235 DOMAIN: 0000: Resource ranges:
1256 09:52:55.167565 * Base: 1000, Size: 800, Tag: 100
1257 09:52:55.171295 * Base: 1900, Size: e700, Tag: 100
1258 09:52:55.174660 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 09:52:55.180823 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 09:52:55.190931 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 09:52:55.197685 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 09:52:55.204061 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 09:52:55.214140 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 09:52:55.220867 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 09:52:55.227780 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 09:52:55.233787 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 09:52:55.243897 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 09:52:55.251350 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 09:52:55.257134 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 09:52:55.267491 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 09:52:55.273514 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 09:52:55.280406 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 09:52:55.290800 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 09:52:55.297215 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 09:52:55.303874 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 09:52:55.313519 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 09:52:55.320426 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1278 09:52:55.326634 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 09:52:55.336787 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 09:52:55.343935 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 09:52:55.350052 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 09:52:55.359872 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 09:52:55.363211 DOMAIN: 0000: Resource ranges:
1284 09:52:55.366433 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 09:52:55.369702 * Base: d0000000, Size: 28000000, Tag: 200
1286 09:52:55.376688 * Base: fa000000, Size: 1000000, Tag: 200
1287 09:52:55.380088 * Base: fb001000, Size: 2fff000, Tag: 200
1288 09:52:55.383394 * Base: fe010000, Size: 2e000, Tag: 200
1289 09:52:55.387110 * Base: fe03f000, Size: d41000, Tag: 200
1290 09:52:55.393208 * Base: fed88000, Size: 8000, Tag: 200
1291 09:52:55.396589 * Base: fed93000, Size: d000, Tag: 200
1292 09:52:55.400073 * Base: feda2000, Size: 1e000, Tag: 200
1293 09:52:55.403091 * Base: fede0000, Size: 1220000, Tag: 200
1294 09:52:55.409709 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1295 09:52:55.416738 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 09:52:55.423205 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 09:52:55.429663 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 09:52:55.436210 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 09:52:55.443255 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 09:52:55.449790 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 09:52:55.456037 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 09:52:55.462770 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 09:52:55.470025 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 09:52:55.476510 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 09:52:55.482921 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 09:52:55.489786 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 09:52:55.496074 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 09:52:55.502451 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 09:52:55.509100 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 09:52:55.515730 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 09:52:55.522773 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 09:52:55.528917 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 09:52:55.535849 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 09:52:55.542383 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 09:52:55.549301 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 09:52:55.555786 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 09:52:55.562233 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 09:52:55.572477 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 09:52:55.575565 PCI: 00:1d.0: Resource ranges:
1320 09:52:55.579258 * Base: 7fc00000, Size: 100000, Tag: 200
1321 09:52:55.585582 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 09:52:55.592620 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1323 09:52:55.599423 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1324 09:52:55.605421 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1325 09:52:55.612226 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1326 09:52:55.619116 Root Device assign_resources, bus 0 link: 0
1327 09:52:55.622384 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 09:52:55.632416 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1329 09:52:55.638801 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1330 09:52:55.649087 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1331 09:52:55.655327 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1332 09:52:55.658986 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 09:52:55.665292 PCI: 00:04.0 assign_resources, bus 1 link: 0
1334 09:52:55.672014 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1335 09:52:55.681825 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1336 09:52:55.688809 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1337 09:52:55.695756 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 09:52:55.698833 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1339 09:52:55.708614 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1340 09:52:55.712192 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 09:52:55.715388 PCI: 00:14.0 assign_resources, bus 0 link: 0
1342 09:52:55.725129 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1343 09:52:55.731994 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1344 09:52:55.741734 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1345 09:52:55.745020 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 09:52:55.751646 PCI: 00:14.3 assign_resources, bus 0 link: 0
1347 09:52:55.757979 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1348 09:52:55.761515 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 09:52:55.767956 PCI: 00:15.0 assign_resources, bus 0 link: 0
1350 09:52:55.775140 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1351 09:52:55.781658 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 09:52:55.784757 PCI: 00:15.1 assign_resources, bus 0 link: 0
1353 09:52:55.794622 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1354 09:52:55.801418 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1355 09:52:55.811478 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1356 09:52:55.817827 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1357 09:52:55.820897 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 09:52:55.828027 PCI: 00:19.1 assign_resources, bus 0 link: 0
1359 09:52:55.834705 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1360 09:52:55.844545 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1361 09:52:55.854148 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1362 09:52:55.857450 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1363 09:52:55.867809 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1364 09:52:55.874281 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1365 09:52:55.883860 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1366 09:52:55.887449 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1367 09:52:55.897237 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1368 09:52:55.900711 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 09:52:55.904147 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1370 09:52:55.914102 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1371 09:52:55.918232 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 09:52:55.924035 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1373 09:52:55.927214 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 09:52:55.934248 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1375 09:52:55.936942 LPC: Trying to open IO window from 800 size 1ff
1376 09:52:55.947589 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1377 09:52:55.953601 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1378 09:52:55.960142 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1379 09:52:55.966952 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 09:52:55.970510 Root Device assign_resources, bus 0 link: 0
1381 09:52:55.973366 Done setting resources.
1382 09:52:55.979871 Show resources in subtree (Root Device)...After assigning values.
1383 09:52:55.983402 Root Device child on link 0 DOMAIN: 0000
1384 09:52:55.989934 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1385 09:52:55.996573 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1386 09:52:56.006879 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1387 09:52:56.009954 PCI: 00:00.0
1388 09:52:56.019593 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1389 09:52:56.029766 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1390 09:52:56.036239 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1391 09:52:56.046449 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1392 09:52:56.056051 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1393 09:52:56.066550 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1394 09:52:56.076198 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1395 09:52:56.085905 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1396 09:52:56.092612 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1397 09:52:56.102930 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1398 09:52:56.112432 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1399 09:52:56.122293 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1400 09:52:56.132246 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1401 09:52:56.139332 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1402 09:52:56.149332 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1403 09:52:56.158844 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1404 09:52:56.169454 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1405 09:52:56.179351 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1406 09:52:56.189714 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1407 09:52:56.198973 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1408 09:52:56.199077 PCI: 00:02.0
1409 09:52:56.208877 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1410 09:52:56.222666 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1411 09:52:56.229158 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1412 09:52:56.235454 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1413 09:52:56.246367 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1414 09:52:56.246486 GENERIC: 0.0
1415 09:52:56.248938 PCI: 00:05.0
1416 09:52:56.258733 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1417 09:52:56.262263 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1418 09:52:56.265805 GENERIC: 0.0
1419 09:52:56.265908 PCI: 00:08.0
1420 09:52:56.278651 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1421 09:52:56.278740 PCI: 00:0a.0
1422 09:52:56.282300 PCI: 00:0d.0 child on link 0 USB0 port 0
1423 09:52:56.295209 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1424 09:52:56.299101 USB0 port 0 child on link 0 USB3 port 0
1425 09:52:56.299207 USB3 port 0
1426 09:52:56.302110 USB3 port 1
1427 09:52:56.302207 USB3 port 2
1428 09:52:56.305115 USB3 port 3
1429 09:52:56.308827 PCI: 00:14.0 child on link 0 USB0 port 0
1430 09:52:56.318470 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1431 09:52:56.325156 USB0 port 0 child on link 0 USB2 port 0
1432 09:52:56.325266 USB2 port 0
1433 09:52:56.328911 USB2 port 1
1434 09:52:56.329013 USB2 port 2
1435 09:52:56.331804 USB2 port 3
1436 09:52:56.331902 USB2 port 4
1437 09:52:56.335221 USB2 port 5
1438 09:52:56.335294 USB2 port 6
1439 09:52:56.339039 USB2 port 7
1440 09:52:56.339112 USB2 port 8
1441 09:52:56.342035 USB2 port 9
1442 09:52:56.345537 USB3 port 0
1443 09:52:56.345639 USB3 port 1
1444 09:52:56.348662 USB3 port 2
1445 09:52:56.348758 USB3 port 3
1446 09:52:56.352260 PCI: 00:14.2
1447 09:52:56.361616 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1448 09:52:56.372036 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1449 09:52:56.375468 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1450 09:52:56.385120 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1451 09:52:56.388182 GENERIC: 0.0
1452 09:52:56.391647 PCI: 00:15.0 child on link 0 I2C: 00:1a
1453 09:52:56.401786 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1454 09:52:56.405171 I2C: 00:1a
1455 09:52:56.405275 I2C: 00:31
1456 09:52:56.408439 I2C: 00:32
1457 09:52:56.411539 PCI: 00:15.1 child on link 0 I2C: 00:10
1458 09:52:56.421507 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1459 09:52:56.424738 I2C: 00:10
1460 09:52:56.424842 PCI: 00:15.2
1461 09:52:56.434633 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1462 09:52:56.438038 PCI: 00:15.3
1463 09:52:56.447945 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1464 09:52:56.448049 PCI: 00:16.0
1465 09:52:56.458043 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1466 09:52:56.461294 PCI: 00:19.0
1467 09:52:56.464982 PCI: 00:19.1 child on link 0 I2C: 00:15
1468 09:52:56.475359 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1469 09:52:56.478007 I2C: 00:15
1470 09:52:56.481395 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1471 09:52:56.491289 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1472 09:52:56.501569 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1473 09:52:56.514370 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1474 09:52:56.514520 GENERIC: 0.0
1475 09:52:56.517640 PCI: 01:00.0
1476 09:52:56.527896 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1477 09:52:56.538243 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1478 09:52:56.547824 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1479 09:52:56.550811 PCI: 00:1e.0
1480 09:52:56.561352 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1481 09:52:56.564048 PCI: 00:1e.2 child on link 0 SPI: 00
1482 09:52:56.574626 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1483 09:52:56.577556 SPI: 00
1484 09:52:56.580970 PCI: 00:1e.3 child on link 0 SPI: 00
1485 09:52:56.590699 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1486 09:52:56.590807 SPI: 00
1487 09:52:56.597967 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1488 09:52:56.606432 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1489 09:52:56.607712 PNP: 0c09.0
1490 09:52:56.617374 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1491 09:52:56.620634 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1492 09:52:56.630955 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1493 09:52:56.637357 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1494 09:52:56.644085 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1495 09:52:56.644195 GENERIC: 0.0
1496 09:52:56.647896 GENERIC: 1.0
1497 09:52:56.648001 PCI: 00:1f.3
1498 09:52:56.660893 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1499 09:52:56.670697 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1500 09:52:56.670787 PCI: 00:1f.5
1501 09:52:56.680816 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1502 09:52:56.687235 CPU_CLUSTER: 0 child on link 0 APIC: 00
1503 09:52:56.687324 APIC: 00
1504 09:52:56.687389 APIC: 01
1505 09:52:56.690836 APIC: 03
1506 09:52:56.690916 APIC: 05
1507 09:52:56.694093 APIC: 07
1508 09:52:56.694173 APIC: 06
1509 09:52:56.694237 APIC: 02
1510 09:52:56.697894 APIC: 04
1511 09:52:56.700671 Done allocating resources.
1512 09:52:56.704079 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1513 09:52:56.710393 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1514 09:52:56.713784 Configure GPIOs for I2S audio on UP4.
1515 09:52:56.721780 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1516 09:52:56.724945 Enabling resources...
1517 09:52:56.727894 PCI: 00:00.0 subsystem <- 8086/9a12
1518 09:52:56.731295 PCI: 00:00.0 cmd <- 06
1519 09:52:56.734790 PCI: 00:02.0 subsystem <- 8086/9a40
1520 09:52:56.738103 PCI: 00:02.0 cmd <- 03
1521 09:52:56.741331 PCI: 00:04.0 subsystem <- 8086/9a03
1522 09:52:56.744365 PCI: 00:04.0 cmd <- 02
1523 09:52:56.747889 PCI: 00:05.0 subsystem <- 8086/9a19
1524 09:52:56.747972 PCI: 00:05.0 cmd <- 02
1525 09:52:56.754592 PCI: 00:08.0 subsystem <- 8086/9a11
1526 09:52:56.754674 PCI: 00:08.0 cmd <- 06
1527 09:52:56.757789 PCI: 00:0d.0 subsystem <- 8086/9a13
1528 09:52:56.761563 PCI: 00:0d.0 cmd <- 02
1529 09:52:56.764833 PCI: 00:14.0 subsystem <- 8086/a0ed
1530 09:52:56.767676 PCI: 00:14.0 cmd <- 02
1531 09:52:56.771273 PCI: 00:14.2 subsystem <- 8086/a0ef
1532 09:52:56.774382 PCI: 00:14.2 cmd <- 02
1533 09:52:56.777885 PCI: 00:14.3 subsystem <- 8086/a0f0
1534 09:52:56.781093 PCI: 00:14.3 cmd <- 02
1535 09:52:56.784340 PCI: 00:15.0 subsystem <- 8086/a0e8
1536 09:52:56.788061 PCI: 00:15.0 cmd <- 02
1537 09:52:56.790696 PCI: 00:15.1 subsystem <- 8086/a0e9
1538 09:52:56.794028 PCI: 00:15.1 cmd <- 02
1539 09:52:56.797663 PCI: 00:15.2 subsystem <- 8086/a0ea
1540 09:52:56.797739 PCI: 00:15.2 cmd <- 02
1541 09:52:56.804291 PCI: 00:15.3 subsystem <- 8086/a0eb
1542 09:52:56.804373 PCI: 00:15.3 cmd <- 02
1543 09:52:56.807569 PCI: 00:16.0 subsystem <- 8086/a0e0
1544 09:52:56.810848 PCI: 00:16.0 cmd <- 02
1545 09:52:56.813964 PCI: 00:19.1 subsystem <- 8086/a0c6
1546 09:52:56.817556 PCI: 00:19.1 cmd <- 02
1547 09:52:56.820699 PCI: 00:1d.0 bridge ctrl <- 0013
1548 09:52:56.824090 PCI: 00:1d.0 subsystem <- 8086/a0b0
1549 09:52:56.827489 PCI: 00:1d.0 cmd <- 06
1550 09:52:56.831070 PCI: 00:1e.0 subsystem <- 8086/a0a8
1551 09:52:56.834143 PCI: 00:1e.0 cmd <- 06
1552 09:52:56.837397 PCI: 00:1e.2 subsystem <- 8086/a0aa
1553 09:52:56.840884 PCI: 00:1e.2 cmd <- 06
1554 09:52:56.844579 PCI: 00:1e.3 subsystem <- 8086/a0ab
1555 09:52:56.847522 PCI: 00:1e.3 cmd <- 02
1556 09:52:56.850632 PCI: 00:1f.0 subsystem <- 8086/a087
1557 09:52:56.850713 PCI: 00:1f.0 cmd <- 407
1558 09:52:56.857283 PCI: 00:1f.3 subsystem <- 8086/a0c8
1559 09:52:56.857364 PCI: 00:1f.3 cmd <- 02
1560 09:52:56.860618 PCI: 00:1f.5 subsystem <- 8086/a0a4
1561 09:52:56.863854 PCI: 00:1f.5 cmd <- 406
1562 09:52:56.869149 PCI: 01:00.0 cmd <- 02
1563 09:52:56.874007 done.
1564 09:52:56.877139 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1565 09:52:56.880038 Initializing devices...
1566 09:52:56.883392 Root Device init
1567 09:52:56.886987 Chrome EC: Set SMI mask to 0x0000000000000000
1568 09:52:56.893741 Chrome EC: clear events_b mask to 0x0000000000000000
1569 09:52:56.899841 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1570 09:52:56.907070 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1571 09:52:56.913272 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1572 09:52:56.916515 Chrome EC: Set WAKE mask to 0x0000000000000000
1573 09:52:56.923467 fw_config match found: DB_USB=USB3_ACTIVE
1574 09:52:56.926536 Configure Right Type-C port orientation for retimer
1575 09:52:56.930212 Root Device init finished in 45 msecs
1576 09:52:56.934317 PCI: 00:00.0 init
1577 09:52:56.937371 CPU TDP = 9 Watts
1578 09:52:56.937453 CPU PL1 = 9 Watts
1579 09:52:56.941084 CPU PL2 = 40 Watts
1580 09:52:56.944165 CPU PL4 = 83 Watts
1581 09:52:56.947687 PCI: 00:00.0 init finished in 8 msecs
1582 09:52:56.947768 PCI: 00:02.0 init
1583 09:52:56.951011 GMA: Found VBT in CBFS
1584 09:52:56.953984 GMA: Found valid VBT in CBFS
1585 09:52:56.961135 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1586 09:52:56.967376 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1587 09:52:56.970614 PCI: 00:02.0 init finished in 18 msecs
1588 09:52:56.973752 PCI: 00:05.0 init
1589 09:52:56.977516 PCI: 00:05.0 init finished in 0 msecs
1590 09:52:56.980197 PCI: 00:08.0 init
1591 09:52:56.983885 PCI: 00:08.0 init finished in 0 msecs
1592 09:52:56.987539 PCI: 00:14.0 init
1593 09:52:56.990385 PCI: 00:14.0 init finished in 0 msecs
1594 09:52:56.994014 PCI: 00:14.2 init
1595 09:52:56.996921 PCI: 00:14.2 init finished in 0 msecs
1596 09:52:57.000682 PCI: 00:15.0 init
1597 09:52:57.003456 I2C bus 0 version 0x3230302a
1598 09:52:57.007238 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1599 09:52:57.010392 PCI: 00:15.0 init finished in 6 msecs
1600 09:52:57.010510 PCI: 00:15.1 init
1601 09:52:57.013571 I2C bus 1 version 0x3230302a
1602 09:52:57.016887 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1603 09:52:57.023737 PCI: 00:15.1 init finished in 6 msecs
1604 09:52:57.023817 PCI: 00:15.2 init
1605 09:52:57.027125 I2C bus 2 version 0x3230302a
1606 09:52:57.030244 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1607 09:52:57.033697 PCI: 00:15.2 init finished in 6 msecs
1608 09:52:57.037128 PCI: 00:15.3 init
1609 09:52:57.040457 I2C bus 3 version 0x3230302a
1610 09:52:57.043330 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1611 09:52:57.046788 PCI: 00:15.3 init finished in 6 msecs
1612 09:52:57.050316 PCI: 00:16.0 init
1613 09:52:57.053506 PCI: 00:16.0 init finished in 0 msecs
1614 09:52:57.056551 PCI: 00:19.1 init
1615 09:52:57.060260 I2C bus 5 version 0x3230302a
1616 09:52:57.063435 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1617 09:52:57.066881 PCI: 00:19.1 init finished in 6 msecs
1618 09:52:57.070028 PCI: 00:1d.0 init
1619 09:52:57.070108 Initializing PCH PCIe bridge.
1620 09:52:57.076558 PCI: 00:1d.0 init finished in 3 msecs
1621 09:52:57.079909 PCI: 00:1f.0 init
1622 09:52:57.082989 IOAPIC: Initializing IOAPIC at 0xfec00000
1623 09:52:57.086768 IOAPIC: Bootstrap Processor Local APIC = 0x00
1624 09:52:57.089887 IOAPIC: ID = 0x02
1625 09:52:57.093708 IOAPIC: Dumping registers
1626 09:52:57.093790 reg 0x0000: 0x02000000
1627 09:52:57.096443 reg 0x0001: 0x00770020
1628 09:52:57.099792 reg 0x0002: 0x00000000
1629 09:52:57.103040 PCI: 00:1f.0 init finished in 21 msecs
1630 09:52:57.106974 PCI: 00:1f.2 init
1631 09:52:57.109899 Disabling ACPI via APMC.
1632 09:52:57.110004 APMC done.
1633 09:52:57.113309 PCI: 00:1f.2 init finished in 5 msecs
1634 09:52:57.127282 PCI: 01:00.0 init
1635 09:52:57.130029 PCI: 01:00.0 init finished in 0 msecs
1636 09:52:57.134027 PNP: 0c09.0 init
1637 09:52:57.136853 Google Chrome EC uptime: 8.401 seconds
1638 09:52:57.143835 Google Chrome AP resets since EC boot: 1
1639 09:52:57.146962 Google Chrome most recent AP reset causes:
1640 09:52:57.150558 0.348: 32775 shutdown: entering G3
1641 09:52:57.156621 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1642 09:52:57.160068 PNP: 0c09.0 init finished in 22 msecs
1643 09:52:57.165980 Devices initialized
1644 09:52:57.169350 Show all devs... After init.
1645 09:52:57.173215 Root Device: enabled 1
1646 09:52:57.173298 DOMAIN: 0000: enabled 1
1647 09:52:57.176408 CPU_CLUSTER: 0: enabled 1
1648 09:52:57.179390 PCI: 00:00.0: enabled 1
1649 09:52:57.182669 PCI: 00:02.0: enabled 1
1650 09:52:57.182750 PCI: 00:04.0: enabled 1
1651 09:52:57.185739 PCI: 00:05.0: enabled 1
1652 09:52:57.188885 PCI: 00:06.0: enabled 0
1653 09:52:57.192641 PCI: 00:07.0: enabled 0
1654 09:52:57.192722 PCI: 00:07.1: enabled 0
1655 09:52:57.195882 PCI: 00:07.2: enabled 0
1656 09:52:57.199082 PCI: 00:07.3: enabled 0
1657 09:52:57.202278 PCI: 00:08.0: enabled 1
1658 09:52:57.202359 PCI: 00:09.0: enabled 0
1659 09:52:57.205571 PCI: 00:0a.0: enabled 0
1660 09:52:57.209086 PCI: 00:0d.0: enabled 1
1661 09:52:57.212359 PCI: 00:0d.1: enabled 0
1662 09:52:57.212440 PCI: 00:0d.2: enabled 0
1663 09:52:57.216261 PCI: 00:0d.3: enabled 0
1664 09:52:57.219433 PCI: 00:0e.0: enabled 0
1665 09:52:57.219514 PCI: 00:10.2: enabled 1
1666 09:52:57.222136 PCI: 00:10.6: enabled 0
1667 09:52:57.225682 PCI: 00:10.7: enabled 0
1668 09:52:57.229068 PCI: 00:12.0: enabled 0
1669 09:52:57.229149 PCI: 00:12.6: enabled 0
1670 09:52:57.232573 PCI: 00:13.0: enabled 0
1671 09:52:57.235500 PCI: 00:14.0: enabled 1
1672 09:52:57.239127 PCI: 00:14.1: enabled 0
1673 09:52:57.239208 PCI: 00:14.2: enabled 1
1674 09:52:57.242022 PCI: 00:14.3: enabled 1
1675 09:52:57.245559 PCI: 00:15.0: enabled 1
1676 09:52:57.248872 PCI: 00:15.1: enabled 1
1677 09:52:57.248953 PCI: 00:15.2: enabled 1
1678 09:52:57.252344 PCI: 00:15.3: enabled 1
1679 09:52:57.255433 PCI: 00:16.0: enabled 1
1680 09:52:57.255514 PCI: 00:16.1: enabled 0
1681 09:52:57.258676 PCI: 00:16.2: enabled 0
1682 09:52:57.262051 PCI: 00:16.3: enabled 0
1683 09:52:57.265538 PCI: 00:16.4: enabled 0
1684 09:52:57.265618 PCI: 00:16.5: enabled 0
1685 09:52:57.268801 PCI: 00:17.0: enabled 0
1686 09:52:57.272374 PCI: 00:19.0: enabled 0
1687 09:52:57.275587 PCI: 00:19.1: enabled 1
1688 09:52:57.275668 PCI: 00:19.2: enabled 0
1689 09:52:57.279123 PCI: 00:1c.0: enabled 1
1690 09:52:57.282444 PCI: 00:1c.1: enabled 0
1691 09:52:57.285662 PCI: 00:1c.2: enabled 0
1692 09:52:57.285741 PCI: 00:1c.3: enabled 0
1693 09:52:57.288705 PCI: 00:1c.4: enabled 0
1694 09:52:57.292260 PCI: 00:1c.5: enabled 0
1695 09:52:57.292341 PCI: 00:1c.6: enabled 1
1696 09:52:57.295463 PCI: 00:1c.7: enabled 0
1697 09:52:57.298752 PCI: 00:1d.0: enabled 1
1698 09:52:57.301968 PCI: 00:1d.1: enabled 0
1699 09:52:57.302048 PCI: 00:1d.2: enabled 1
1700 09:52:57.305527 PCI: 00:1d.3: enabled 0
1701 09:52:57.309051 PCI: 00:1e.0: enabled 1
1702 09:52:57.312540 PCI: 00:1e.1: enabled 0
1703 09:52:57.312621 PCI: 00:1e.2: enabled 1
1704 09:52:57.315539 PCI: 00:1e.3: enabled 1
1705 09:52:57.319012 PCI: 00:1f.0: enabled 1
1706 09:52:57.321875 PCI: 00:1f.1: enabled 0
1707 09:52:57.321955 PCI: 00:1f.2: enabled 1
1708 09:52:57.325779 PCI: 00:1f.3: enabled 1
1709 09:52:57.328396 PCI: 00:1f.4: enabled 0
1710 09:52:57.331687 PCI: 00:1f.5: enabled 1
1711 09:52:57.331768 PCI: 00:1f.6: enabled 0
1712 09:52:57.335403 PCI: 00:1f.7: enabled 0
1713 09:52:57.338670 APIC: 00: enabled 1
1714 09:52:57.338751 GENERIC: 0.0: enabled 1
1715 09:52:57.342036 GENERIC: 0.0: enabled 1
1716 09:52:57.345116 GENERIC: 1.0: enabled 1
1717 09:52:57.348691 GENERIC: 0.0: enabled 1
1718 09:52:57.348788 GENERIC: 1.0: enabled 1
1719 09:52:57.352238 USB0 port 0: enabled 1
1720 09:52:57.355011 GENERIC: 0.0: enabled 1
1721 09:52:57.355092 USB0 port 0: enabled 1
1722 09:52:57.358290 GENERIC: 0.0: enabled 1
1723 09:52:57.361725 I2C: 00:1a: enabled 1
1724 09:52:57.365533 I2C: 00:31: enabled 1
1725 09:52:57.365614 I2C: 00:32: enabled 1
1726 09:52:57.368257 I2C: 00:10: enabled 1
1727 09:52:57.371663 I2C: 00:15: enabled 1
1728 09:52:57.371770 GENERIC: 0.0: enabled 0
1729 09:52:57.375644 GENERIC: 1.0: enabled 0
1730 09:52:57.378259 GENERIC: 0.0: enabled 1
1731 09:52:57.378341 SPI: 00: enabled 1
1732 09:52:57.382041 SPI: 00: enabled 1
1733 09:52:57.384761 PNP: 0c09.0: enabled 1
1734 09:52:57.384842 GENERIC: 0.0: enabled 1
1735 09:52:57.388461 USB3 port 0: enabled 1
1736 09:52:57.391953 USB3 port 1: enabled 1
1737 09:52:57.392033 USB3 port 2: enabled 0
1738 09:52:57.395065 USB3 port 3: enabled 0
1739 09:52:57.398200 USB2 port 0: enabled 0
1740 09:52:57.401619 USB2 port 1: enabled 1
1741 09:52:57.401700 USB2 port 2: enabled 1
1742 09:52:57.405041 USB2 port 3: enabled 0
1743 09:52:57.408491 USB2 port 4: enabled 1
1744 09:52:57.408572 USB2 port 5: enabled 0
1745 09:52:57.411707 USB2 port 6: enabled 0
1746 09:52:57.415017 USB2 port 7: enabled 0
1747 09:52:57.418514 USB2 port 8: enabled 0
1748 09:52:57.418595 USB2 port 9: enabled 0
1749 09:52:57.422044 USB3 port 0: enabled 0
1750 09:52:57.425184 USB3 port 1: enabled 1
1751 09:52:57.425264 USB3 port 2: enabled 0
1752 09:52:57.428489 USB3 port 3: enabled 0
1753 09:52:57.431950 GENERIC: 0.0: enabled 1
1754 09:52:57.434887 GENERIC: 1.0: enabled 1
1755 09:52:57.434974 APIC: 01: enabled 1
1756 09:52:57.438696 APIC: 03: enabled 1
1757 09:52:57.438777 APIC: 05: enabled 1
1758 09:52:57.441867 APIC: 07: enabled 1
1759 09:52:57.445142 APIC: 06: enabled 1
1760 09:52:57.445222 APIC: 02: enabled 1
1761 09:52:57.448120 APIC: 04: enabled 1
1762 09:52:57.451454 PCI: 01:00.0: enabled 1
1763 09:52:57.454824 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1764 09:52:57.461172 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1765 09:52:57.464647 ELOG: NV offset 0xf30000 size 0x1000
1766 09:52:57.471513 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1767 09:52:57.478152 ELOG: Event(17) added with size 13 at 2023-12-11 09:52:57 UTC
1768 09:52:57.484448 ELOG: Event(92) added with size 9 at 2023-12-11 09:52:57 UTC
1769 09:52:57.491028 ELOG: Event(93) added with size 9 at 2023-12-11 09:52:57 UTC
1770 09:52:57.497737 ELOG: Event(9E) added with size 10 at 2023-12-11 09:52:57 UTC
1771 09:52:57.504555 ELOG: Event(9F) added with size 14 at 2023-12-11 09:52:57 UTC
1772 09:52:57.511263 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1773 09:52:57.514881 ELOG: Event(A1) added with size 10 at 2023-12-11 09:52:57 UTC
1774 09:52:57.520922 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1775 09:52:57.527572 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1776 09:52:57.530819 Finalize devices...
1777 09:52:57.530900 Devices finalized
1778 09:52:57.537915 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1779 09:52:57.541099 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1780 09:52:57.548018 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1781 09:52:57.553945 ME: HFSTS1 : 0x80030055
1782 09:52:57.557695 ME: HFSTS2 : 0x30280116
1783 09:52:57.560935 ME: HFSTS3 : 0x00000050
1784 09:52:57.567936 ME: HFSTS4 : 0x00004000
1785 09:52:57.570880 ME: HFSTS5 : 0x00000000
1786 09:52:57.573824 ME: HFSTS6 : 0x00400006
1787 09:52:57.577328 ME: Manufacturing Mode : YES
1788 09:52:57.583965 ME: SPI Protection Mode Enabled : NO
1789 09:52:57.587225 ME: FW Partition Table : OK
1790 09:52:57.590671 ME: Bringup Loader Failure : NO
1791 09:52:57.594231 ME: Firmware Init Complete : NO
1792 09:52:57.597372 ME: Boot Options Present : NO
1793 09:52:57.600508 ME: Update In Progress : NO
1794 09:52:57.604297 ME: D0i3 Support : YES
1795 09:52:57.607263 ME: Low Power State Enabled : NO
1796 09:52:57.613667 ME: CPU Replaced : YES
1797 09:52:57.617476 ME: CPU Replacement Valid : YES
1798 09:52:57.620453 ME: Current Working State : 5
1799 09:52:57.623667 ME: Current Operation State : 1
1800 09:52:57.627064 ME: Current Operation Mode : 3
1801 09:52:57.630715 ME: Error Code : 0
1802 09:52:57.634171 ME: Enhanced Debug Mode : NO
1803 09:52:57.636932 ME: CPU Debug Disabled : YES
1804 09:52:57.643606 ME: TXT Support : NO
1805 09:52:57.646826 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1806 09:52:57.656653 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1807 09:52:57.660363 CBFS: 'fallback/slic' not found.
1808 09:52:57.663086 ACPI: Writing ACPI tables at 76b01000.
1809 09:52:57.663167 ACPI: * FACS
1810 09:52:57.666949 ACPI: * DSDT
1811 09:52:57.669871 Ramoops buffer: 0x100000@0x76a00000.
1812 09:52:57.676379 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1813 09:52:57.679798 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1814 09:52:57.683401 Google Chrome EC: version:
1815 09:52:57.686460 ro: voema_v2.0.7540-147f8d37d1
1816 09:52:57.689694 rw: voema_v2.0.7540-147f8d37d1
1817 09:52:57.692890 running image: 2
1818 09:52:57.699427 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1819 09:52:57.702819 ACPI: * FADT
1820 09:52:57.702900 SCI is IRQ9
1821 09:52:57.706226 ACPI: added table 1/32, length now 40
1822 09:52:57.709786 ACPI: * SSDT
1823 09:52:57.712859 Found 1 CPU(s) with 8 core(s) each.
1824 09:52:57.719931 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1825 09:52:57.723397 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1826 09:52:57.726439 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1827 09:52:57.729283 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1828 09:52:57.736336 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1829 09:52:57.742893 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1830 09:52:57.745956 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1831 09:52:57.752740 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1832 09:52:57.759188 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1833 09:52:57.763054 \_SB.PCI0.RP09: Added StorageD3Enable property
1834 09:52:57.766267 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1835 09:52:57.772472 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1836 09:52:57.779537 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1837 09:52:57.782601 PS2K: Passing 80 keymaps to kernel
1838 09:52:57.789047 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1839 09:52:57.796055 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1840 09:52:57.802887 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1841 09:52:57.809262 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1842 09:52:57.816026 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1843 09:52:57.822272 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1844 09:52:57.829155 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1845 09:52:57.835529 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1846 09:52:57.839159 ACPI: added table 2/32, length now 44
1847 09:52:57.839240 ACPI: * MCFG
1848 09:52:57.842204 ACPI: added table 3/32, length now 48
1849 09:52:57.845575 ACPI: * TPM2
1850 09:52:57.848991 TPM2 log created at 0x769f0000
1851 09:52:57.852428 ACPI: added table 4/32, length now 52
1852 09:52:57.852523 ACPI: * MADT
1853 09:52:57.856299 SCI is IRQ9
1854 09:52:57.858818 ACPI: added table 5/32, length now 56
1855 09:52:57.862134 current = 76b09850
1856 09:52:57.862213 ACPI: * DMAR
1857 09:52:57.865665 ACPI: added table 6/32, length now 60
1858 09:52:57.868905 ACPI: added table 7/32, length now 64
1859 09:52:57.872039 ACPI: * HPET
1860 09:52:57.875785 ACPI: added table 8/32, length now 68
1861 09:52:57.875866 ACPI: done.
1862 09:52:57.879050 ACPI tables: 35216 bytes.
1863 09:52:57.882303 smbios_write_tables: 769ef000
1864 09:52:57.885842 EC returned error result code 3
1865 09:52:57.888550 Couldn't obtain OEM name from CBI
1866 09:52:57.892137 Create SMBIOS type 16
1867 09:52:57.895731 Create SMBIOS type 17
1868 09:52:57.898677 GENERIC: 0.0 (WIFI Device)
1869 09:52:57.898757 SMBIOS tables: 1750 bytes.
1870 09:52:57.905394 Writing table forward entry at 0x00000500
1871 09:52:57.912159 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1872 09:52:57.915267 Writing coreboot table at 0x76b25000
1873 09:52:57.918660 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1874 09:52:57.925388 1. 0000000000001000-000000000009ffff: RAM
1875 09:52:57.929191 2. 00000000000a0000-00000000000fffff: RESERVED
1876 09:52:57.932010 3. 0000000000100000-00000000769eefff: RAM
1877 09:52:57.938435 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1878 09:52:57.945261 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1879 09:52:57.948375 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1880 09:52:57.955006 7. 0000000077000000-000000007fbfffff: RESERVED
1881 09:52:57.958320 8. 00000000c0000000-00000000cfffffff: RESERVED
1882 09:52:57.965347 9. 00000000f8000000-00000000f9ffffff: RESERVED
1883 09:52:57.968717 10. 00000000fb000000-00000000fb000fff: RESERVED
1884 09:52:57.975260 11. 00000000fe000000-00000000fe00ffff: RESERVED
1885 09:52:57.978344 12. 00000000fed80000-00000000fed87fff: RESERVED
1886 09:52:57.985258 13. 00000000fed90000-00000000fed92fff: RESERVED
1887 09:52:57.988757 14. 00000000feda0000-00000000feda1fff: RESERVED
1888 09:52:57.991721 15. 00000000fedc0000-00000000feddffff: RESERVED
1889 09:52:57.998583 16. 0000000100000000-00000002803fffff: RAM
1890 09:52:58.002122 Passing 4 GPIOs to payload:
1891 09:52:58.005365 NAME | PORT | POLARITY | VALUE
1892 09:52:58.011631 lid | undefined | high | high
1893 09:52:58.015049 power | undefined | high | low
1894 09:52:58.021857 oprom | undefined | high | low
1895 09:52:58.028103 EC in RW | 0x000000e5 | high | high
1896 09:52:58.031551 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ab06
1897 09:52:58.035036 coreboot table: 1576 bytes.
1898 09:52:58.038484 IMD ROOT 0. 0x76fff000 0x00001000
1899 09:52:58.044776 IMD SMALL 1. 0x76ffe000 0x00001000
1900 09:52:58.048118 FSP MEMORY 2. 0x76c4e000 0x003b0000
1901 09:52:58.051490 VPD 3. 0x76c4d000 0x00000367
1902 09:52:58.054902 RO MCACHE 4. 0x76c4c000 0x00000fdc
1903 09:52:58.058262 CONSOLE 5. 0x76c2c000 0x00020000
1904 09:52:58.061232 FMAP 6. 0x76c2b000 0x00000578
1905 09:52:58.064940 TIME STAMP 7. 0x76c2a000 0x00000910
1906 09:52:58.068028 VBOOT WORK 8. 0x76c16000 0x00014000
1907 09:52:58.075065 ROMSTG STCK 9. 0x76c15000 0x00001000
1908 09:52:58.078672 AFTER CAR 10. 0x76c0a000 0x0000b000
1909 09:52:58.081317 RAMSTAGE 11. 0x76b97000 0x00073000
1910 09:52:58.085105 REFCODE 12. 0x76b42000 0x00055000
1911 09:52:58.087876 SMM BACKUP 13. 0x76b32000 0x00010000
1912 09:52:58.091512 4f444749 14. 0x76b30000 0x00002000
1913 09:52:58.094819 EXT VBT15. 0x76b2d000 0x0000219f
1914 09:52:58.098280 COREBOOT 16. 0x76b25000 0x00008000
1915 09:52:58.101403 ACPI 17. 0x76b01000 0x00024000
1916 09:52:58.104939 ACPI GNVS 18. 0x76b00000 0x00001000
1917 09:52:58.111547 RAMOOPS 19. 0x76a00000 0x00100000
1918 09:52:58.114746 TPM2 TCGLOG20. 0x769f0000 0x00010000
1919 09:52:58.118103 SMBIOS 21. 0x769ef000 0x00000800
1920 09:52:58.118215 IMD small region:
1921 09:52:58.124729 IMD ROOT 0. 0x76ffec00 0x00000400
1922 09:52:58.127823 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1923 09:52:58.132014 POWER STATE 2. 0x76ffeb80 0x00000044
1924 09:52:58.134848 ROMSTAGE 3. 0x76ffeb60 0x00000004
1925 09:52:58.138237 MEM INFO 4. 0x76ffe980 0x000001e0
1926 09:52:58.144686 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1927 09:52:58.148016 MTRR: Physical address space:
1928 09:52:58.154525 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1929 09:52:58.161617 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1930 09:52:58.167912 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1931 09:52:58.171205 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1932 09:52:58.177816 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1933 09:52:58.184403 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1934 09:52:58.191416 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1935 09:52:58.195118 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 09:52:58.200989 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 09:52:58.204313 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 09:52:58.207903 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 09:52:58.211226 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 09:52:58.218205 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 09:52:58.221303 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 09:52:58.224859 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 09:52:58.227717 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 09:52:58.231127 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 09:52:58.237722 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 09:52:58.240842 call enable_fixed_mtrr()
1947 09:52:58.244536 CPU physical address size: 39 bits
1948 09:52:58.247763 MTRR: default type WB/UC MTRR counts: 6/6.
1949 09:52:58.251253 MTRR: UC selected as default type.
1950 09:52:58.257733 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1951 09:52:58.264517 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1952 09:52:58.271205 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1953 09:52:58.277359 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1954 09:52:58.284065 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1955 09:52:58.290524 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1956 09:52:58.290607
1957 09:52:58.290670 MTRR check
1958 09:52:58.293971 Fixed MTRRs : Enabled
1959 09:52:58.297242 Variable MTRRs: Enabled
1960 09:52:58.297322
1961 09:52:58.300444 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 09:52:58.303739 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 09:52:58.310853 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 09:52:58.314305 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 09:52:58.316985 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 09:52:58.320534 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 09:52:58.327144 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 09:52:58.330385 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 09:52:58.333965 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 09:52:58.337240 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 09:52:58.343576 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 09:52:58.350316 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1973 09:52:58.350404 call enable_fixed_mtrr()
1974 09:52:58.354415 Checking cr50 for pending updates
1975 09:52:58.358119 CPU physical address size: 39 bits
1976 09:52:58.364383 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 09:52:58.367867 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 09:52:58.370845 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 09:52:58.374519 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 09:52:58.377529 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 09:52:58.384420 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 09:52:58.387414 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 09:52:58.391155 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 09:52:58.394095 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 09:52:58.401128 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 09:52:58.404159 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 09:52:58.407276 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 09:52:58.414084 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 09:52:58.414172 call enable_fixed_mtrr()
1990 09:52:58.420537 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 09:52:58.424042 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 09:52:58.427256 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 09:52:58.430451 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 09:52:58.437409 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 09:52:58.440787 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 09:52:58.444124 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 09:52:58.447120 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 09:52:58.453913 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 09:52:58.457054 CPU physical address size: 39 bits
2000 09:52:58.460620 call enable_fixed_mtrr()
2001 09:52:58.463860 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 09:52:58.467104 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 09:52:58.473935 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 09:52:58.476954 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 09:52:58.480855 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 09:52:58.484361 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 09:52:58.490323 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 09:52:58.494098 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 09:52:58.496976 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 09:52:58.500226 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 09:52:58.506808 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 09:52:58.510761 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 09:52:58.513799 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 09:52:58.517300 call enable_fixed_mtrr()
2015 09:52:58.520166 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 09:52:58.527381 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 09:52:58.529983 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 09:52:58.533635 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 09:52:58.537189 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 09:52:58.543430 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 09:52:58.546860 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 09:52:58.550116 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 09:52:58.553530 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 09:52:58.557622 CPU physical address size: 39 bits
2025 09:52:58.565210 call enable_fixed_mtrr()
2026 09:52:58.565290 Reading cr50 TPM mode
2027 09:52:58.568589 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 09:52:58.572490 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 09:52:58.578899 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 09:52:58.582076 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 09:52:58.585130 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 09:52:58.588764 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 09:52:58.591688 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 09:52:58.598971 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 09:52:58.602059 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 09:52:58.605217 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 09:52:58.609087 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 09:52:58.615221 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 09:52:58.618359 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 09:52:58.622058 call enable_fixed_mtrr()
2041 09:52:58.624970 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 09:52:58.628686 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 09:52:58.635012 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 09:52:58.638120 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 09:52:58.641465 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 09:52:58.645216 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 09:52:58.651509 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 09:52:58.654763 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 09:52:58.658136 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 09:52:58.661503 CPU physical address size: 39 bits
2051 09:52:58.668420 call enable_fixed_mtrr()
2052 09:52:58.671757 CPU physical address size: 39 bits
2053 09:52:58.675163 CPU physical address size: 39 bits
2054 09:52:58.678376 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2055 09:52:58.685164 CPU physical address size: 39 bits
2056 09:52:58.691507 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2057 09:52:58.694881 Checking segment from ROM address 0xffc02b38
2058 09:52:58.701354 Checking segment from ROM address 0xffc02b54
2059 09:52:58.704582 Loading segment from ROM address 0xffc02b38
2060 09:52:58.708064 code (compression=0)
2061 09:52:58.714974 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2062 09:52:58.724993 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2063 09:52:58.725084 it's not compressed!
2064 09:52:58.865128 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2065 09:52:58.871516 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2066 09:52:58.878092 Loading segment from ROM address 0xffc02b54
2067 09:52:58.878176 Entry Point 0x30000000
2068 09:52:58.881857 Loaded segments
2069 09:52:58.887836 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2070 09:52:58.930808 Finalizing chipset.
2071 09:52:58.934430 Finalizing SMM.
2072 09:52:58.934524 APMC done.
2073 09:52:58.940893 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2074 09:52:58.944614 mp_park_aps done after 0 msecs.
2075 09:52:58.947682 Jumping to boot code at 0x30000000(0x76b25000)
2076 09:52:58.957537 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2077 09:52:58.957616
2078 09:52:58.957678
2079 09:52:58.957736
2080 09:52:58.960875 Starting depthcharge on Voema...
2081 09:52:58.960953
2082 09:52:58.961292 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2083 09:52:58.961384 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2084 09:52:58.961491 Setting prompt string to ['volteer:']
2085 09:52:58.961744 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2086 09:52:58.970650 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2087 09:52:58.970732
2088 09:52:58.977507 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 09:52:58.977589
2090 09:52:58.980679 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2091 09:52:58.984022
2092 09:52:58.987693 Failed to find eMMC card reader
2093 09:52:58.987773
2094 09:52:58.987835 Wipe memory regions:
2095 09:52:58.987893
2096 09:52:58.994345 [0x00000000001000, 0x000000000a0000)
2097 09:52:58.994483
2098 09:52:58.997173 [0x00000000100000, 0x00000030000000)
2099 09:52:59.022811
2100 09:52:59.025876 [0x00000032662db0, 0x000000769ef000)
2101 09:52:59.061233
2102 09:52:59.065044 [0x00000100000000, 0x00000280400000)
2103 09:52:59.265649
2104 09:52:59.269153 ec_init: CrosEC protocol v3 supported (256, 256)
2105 09:52:59.269236
2106 09:52:59.276003 update_port_state: port C0 state: usb enable 1 mux conn 0
2107 09:52:59.276089
2108 09:52:59.282575 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2109 09:52:59.285292
2110 09:52:59.288971 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2111 09:52:59.289078
2112 09:52:59.295201 send_conn_disc_msg: pmc_send_cmd succeeded
2113 09:52:59.725602
2114 09:52:59.725737 R8152: Initializing
2115 09:52:59.725807
2116 09:52:59.728622 Version 6 (ocp_data = 5c30)
2117 09:52:59.728703
2118 09:52:59.731735 R8152: Done initializing
2119 09:52:59.731815
2120 09:52:59.735266 Adding net device
2121 09:53:00.036656
2122 09:53:00.039813 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2123 09:53:00.039900
2124 09:53:00.039963
2125 09:53:00.040022
2126 09:53:00.043795 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 09:53:00.144178 volteer: tftpboot 192.168.201.1 12244029/tftp-deploy-lmuhfxqd/kernel/bzImage 12244029/tftp-deploy-lmuhfxqd/kernel/cmdline 12244029/tftp-deploy-lmuhfxqd/ramdisk/ramdisk.cpio.gz
2129 09:53:00.144301 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2130 09:53:00.144465 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2131 09:53:00.149333 tftpboot 192.168.201.1 12244029/tftp-deploy-lmuhfxqd/kernel/bzImploy-lmuhfxqd/kernel/cmdline 12244029/tftp-deploy-lmuhfxqd/ramdisk/ramdisk.cpio.gz
2132 09:53:00.149416
2133 09:53:00.149478 Waiting for link
2134 09:53:00.351478
2135 09:53:00.351658 done.
2136 09:53:00.351772
2137 09:53:00.351939 MAC: 00:24:32:30:7b:ec
2138 09:53:00.352054
2139 09:53:00.354721 Sending DHCP discover... done.
2140 09:53:00.354810
2141 09:53:00.358333 Waiting for reply... done.
2142 09:53:00.358499
2143 09:53:00.362259 Sending DHCP request... done.
2144 09:53:00.362347
2145 09:53:00.367919 Waiting for reply... done.
2146 09:53:00.368014
2147 09:53:00.368099 My ip is 192.168.201.11
2148 09:53:00.368177
2149 09:53:00.371789 The DHCP server ip is 192.168.201.1
2150 09:53:00.371890
2151 09:53:00.377922 TFTP server IP predefined by user: 192.168.201.1
2152 09:53:00.378007
2153 09:53:00.384701 Bootfile predefined by user: 12244029/tftp-deploy-lmuhfxqd/kernel/bzImage
2154 09:53:00.384786
2155 09:53:00.387936 Sending tftp read request... done.
2156 09:53:00.388018
2157 09:53:00.391012 Waiting for the transfer...
2158 09:53:00.391095
2159 09:53:00.977762 00000000 ################################################################
2160 09:53:00.977906
2161 09:53:01.559106 00080000 ################################################################
2162 09:53:01.559245
2163 09:53:02.128023 00100000 ################################################################
2164 09:53:02.128166
2165 09:53:02.695490 00180000 ################################################################
2166 09:53:02.695635
2167 09:53:03.262952 00200000 ################################################################
2168 09:53:03.263097
2169 09:53:03.851283 00280000 ################################################################
2170 09:53:03.851430
2171 09:53:04.502195 00300000 ################################################################
2172 09:53:04.502699
2173 09:53:05.219095 00380000 ################################################################
2174 09:53:05.219624
2175 09:53:05.923231 00400000 ################################################################
2176 09:53:05.923778
2177 09:53:06.643130 00480000 ################################################################
2178 09:53:06.643748
2179 09:53:07.366296 00500000 ################################################################
2180 09:53:07.366851
2181 09:53:08.081821 00580000 ################################################################
2182 09:53:08.082349
2183 09:53:08.767347 00600000 ################################################################
2184 09:53:08.767846
2185 09:53:09.463700 00680000 ################################################################
2186 09:53:09.464259
2187 09:53:10.169079 00700000 ################################################################
2188 09:53:10.169729
2189 09:53:10.876885 00780000 ################################################################
2190 09:53:10.877430
2191 09:53:11.604229 00800000 ################################################################
2192 09:53:11.604738
2193 09:53:12.300005 00880000 ################################################################
2194 09:53:12.300525
2195 09:53:13.021957 00900000 ################################################################
2196 09:53:13.022561
2197 09:53:13.626525 00980000 ################################################################
2198 09:53:13.626687
2199 09:53:14.322129 00a00000 ################################################################
2200 09:53:14.322730
2201 09:53:15.038979 00a80000 ################################################################
2202 09:53:15.039488
2203 09:53:15.755686 00b00000 ################################################################
2204 09:53:15.756259
2205 09:53:16.466151 00b80000 ################################################################
2206 09:53:16.466696
2207 09:53:17.159019 00c00000 ################################################################
2208 09:53:17.159524
2209 09:53:17.833639 00c80000 ################################################################
2210 09:53:17.834155
2211 09:53:18.472619 00d00000 ############################################################# done.
2212 09:53:18.472777
2213 09:53:18.475973 The bootfile was 14129248 bytes long.
2214 09:53:18.476083
2215 09:53:18.479132 Sending tftp read request... done.
2216 09:53:18.479234
2217 09:53:18.482516 Waiting for the transfer...
2218 09:53:18.482598
2219 09:53:19.058354 00000000 ################################################################
2220 09:53:19.058523
2221 09:53:19.647167 00080000 ################################################################
2222 09:53:19.647295
2223 09:53:20.255628 00100000 ################################################################
2224 09:53:20.256120
2225 09:53:20.896143 00180000 ################################################################
2226 09:53:20.896275
2227 09:53:21.515170 00200000 ################################################################
2228 09:53:21.515682
2229 09:53:22.122316 00280000 ################################################################
2230 09:53:22.122491
2231 09:53:22.781763 00300000 ################################################################
2232 09:53:22.782214
2233 09:53:23.493548 00380000 ################################################################
2234 09:53:23.494082
2235 09:53:24.171715 00400000 ################################################################
2236 09:53:24.171913
2237 09:53:24.752625 00480000 ################################################################
2238 09:53:24.752771
2239 09:53:25.324297 00500000 ################################################################
2240 09:53:25.324476
2241 09:53:25.867745 00580000 ################################################################
2242 09:53:25.867881
2243 09:53:26.434541 00600000 ################################################################
2244 09:53:26.434686
2245 09:53:27.006749 00680000 ################################################################
2246 09:53:27.006909
2247 09:53:27.574624 00700000 ################################################################
2248 09:53:27.574770
2249 09:53:28.129925 00780000 ################################################################
2250 09:53:28.130089
2251 09:53:28.691720 00800000 ################################################################
2252 09:53:28.691878
2253 09:53:29.260547 00880000 ################################################################
2254 09:53:29.260706
2255 09:53:29.826431 00900000 ################################################################
2256 09:53:29.826590
2257 09:53:30.392260 00980000 ################################################################
2258 09:53:30.392414
2259 09:53:30.953898 00a00000 ################################################################
2260 09:53:30.954053
2261 09:53:31.506166 00a80000 ################################################################
2262 09:53:31.506310
2263 09:53:32.029592 00b00000 ################################################################
2264 09:53:32.029733
2265 09:53:32.569788 00b80000 ################################################################
2266 09:53:32.569926
2267 09:53:33.120064 00c00000 ################################################################
2268 09:53:33.120201
2269 09:53:33.667207 00c80000 ################################################################
2270 09:53:33.667344
2271 09:53:34.290596 00d00000 ################################################################
2272 09:53:34.291123
2273 09:53:34.991658 00d80000 ################################################################
2274 09:53:34.992175
2275 09:53:35.645307 00e00000 ################################################################
2276 09:53:35.645709
2277 09:53:36.212011 00e80000 ################################################################
2278 09:53:36.212167
2279 09:53:36.798945 00f00000 ################################################################
2280 09:53:36.799310
2281 09:53:37.412427 00f80000 ################################################################
2282 09:53:37.412585
2283 09:53:38.010307 01000000 ################################################################
2284 09:53:38.010495
2285 09:53:38.616587 01080000 ################################################################
2286 09:53:38.616719
2287 09:53:39.253078 01100000 ################################################################
2288 09:53:39.253561
2289 09:53:39.954433 01180000 ################################################################
2290 09:53:39.954964
2291 09:53:40.651223 01200000 ################################################################
2292 09:53:40.651740
2293 09:53:41.368744 01280000 ################################################################
2294 09:53:41.369472
2295 09:53:42.088873 01300000 ################################################################
2296 09:53:42.089408
2297 09:53:42.814384 01380000 ################################################################
2298 09:53:42.814959
2299 09:53:43.479615 01400000 ################################################################
2300 09:53:43.480120
2301 09:53:44.161320 01480000 ################################################################
2302 09:53:44.161864
2304 09:57:43.597623 end: 2.2.4 bootloader-commands (duration 00:04:45) [common]
2306 09:57:43.598718 depthcharge-retry failed: 1 of 1 attempts. 'wait for prompt timed out'
2308 09:57:43.599553 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2311 09:57:43.600947 end: 2 depthcharge-action (duration 00:05:00) [common]
2313 09:57:43.602102 Cleaning after the job
2314 09:57:43.602607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/ramdisk
2315 09:57:43.626255 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/kernel
2316 09:57:43.633686 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12244029/tftp-deploy-lmuhfxqd/modules
2317 09:57:43.635406 start: 4.1 power-off (timeout 00:00:30) [common]
2318 09:57:43.635819 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2319 09:57:43.720457 >> Command sent successfully.
2320 09:57:43.730932 Returned 0 in 0 seconds
2321 09:57:43.832190 end: 4.1 power-off (duration 00:00:00) [common]
2323 09:57:43.833851 start: 4.2 read-feedback (timeout 00:10:00) [common]
2324 09:57:43.835198 Listened to connection for namespace 'common' for up to 1s
2325 09:57:44.835738 Finalising connection for namespace 'common'
2326 09:57:44.836357 Disconnecting from shell: Finalise
2327 09:57:44.836724 01500000 ##################################################
2328 09:57:44.937689 end: 4.2 read-feedback (duration 00:00:01) [common]
2329 09:57:44.938249 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12244029
2330 09:57:45.071290 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12244029
2331 09:57:45.071488 JobError: Your job cannot terminate cleanly.