Boot log: acer-cbv514-1h-34uz-brya

    1 17:35:14.062564  lava-dispatcher, installed at version: 2024.01
    2 17:35:14.062784  start: 0 validate
    3 17:35:14.062918  Start time: 2024-02-13 17:35:14.062911+00:00 (UTC)
    4 17:35:14.063047  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:35:14.063179  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 17:35:14.323048  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:35:14.323221  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.209-cip44-51-gdb99ac443b0da%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:35:18.830306  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:35:18.830995  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.209-cip44-51-gdb99ac443b0da%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 17:35:19.100460  validate duration: 5.04
   12 17:35:19.101828  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 17:35:19.102467  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 17:35:19.103047  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 17:35:19.103771  Not decompressing ramdisk as can be used compressed.
   16 17:35:19.104242  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 17:35:19.104610  saving as /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/ramdisk/rootfs.cpio.gz
   18 17:35:19.104961  total size: 8418130 (8 MB)
   19 17:35:19.746640  progress   0 % (0 MB)
   20 17:35:19.752490  progress   5 % (0 MB)
   21 17:35:19.754696  progress  10 % (0 MB)
   22 17:35:19.756956  progress  15 % (1 MB)
   23 17:35:19.759318  progress  20 % (1 MB)
   24 17:35:19.761561  progress  25 % (2 MB)
   25 17:35:19.763805  progress  30 % (2 MB)
   26 17:35:19.765846  progress  35 % (2 MB)
   27 17:35:19.768093  progress  40 % (3 MB)
   28 17:35:19.770290  progress  45 % (3 MB)
   29 17:35:19.772532  progress  50 % (4 MB)
   30 17:35:19.774791  progress  55 % (4 MB)
   31 17:35:19.777010  progress  60 % (4 MB)
   32 17:35:19.779050  progress  65 % (5 MB)
   33 17:35:19.781271  progress  70 % (5 MB)
   34 17:35:19.783499  progress  75 % (6 MB)
   35 17:35:19.785738  progress  80 % (6 MB)
   36 17:35:19.788035  progress  85 % (6 MB)
   37 17:35:19.790296  progress  90 % (7 MB)
   38 17:35:19.792515  progress  95 % (7 MB)
   39 17:35:19.794525  progress 100 % (8 MB)
   40 17:35:19.794750  8 MB downloaded in 0.69 s (11.64 MB/s)
   41 17:35:19.794908  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 17:35:19.795138  end: 1.1 download-retry (duration 00:00:01) [common]
   44 17:35:19.795224  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 17:35:19.795306  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 17:35:19.795507  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.209-cip44-51-gdb99ac443b0da/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 17:35:19.795576  saving as /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/kernel/bzImage
   48 17:35:19.795636  total size: 14127744 (13 MB)
   49 17:35:19.795695  No compression specified
   50 17:35:19.796802  progress   0 % (0 MB)
   51 17:35:19.800480  progress   5 % (0 MB)
   52 17:35:19.804213  progress  10 % (1 MB)
   53 17:35:19.807773  progress  15 % (2 MB)
   54 17:35:19.811516  progress  20 % (2 MB)
   55 17:35:19.815019  progress  25 % (3 MB)
   56 17:35:19.818736  progress  30 % (4 MB)
   57 17:35:19.822356  progress  35 % (4 MB)
   58 17:35:19.826089  progress  40 % (5 MB)
   59 17:35:19.829810  progress  45 % (6 MB)
   60 17:35:19.833351  progress  50 % (6 MB)
   61 17:35:19.837069  progress  55 % (7 MB)
   62 17:35:19.840631  progress  60 % (8 MB)
   63 17:35:19.844500  progress  65 % (8 MB)
   64 17:35:19.848007  progress  70 % (9 MB)
   65 17:35:19.851670  progress  75 % (10 MB)
   66 17:35:19.855097  progress  80 % (10 MB)
   67 17:35:19.858687  progress  85 % (11 MB)
   68 17:35:19.862341  progress  90 % (12 MB)
   69 17:35:19.865830  progress  95 % (12 MB)
   70 17:35:19.869533  progress 100 % (13 MB)
   71 17:35:19.869654  13 MB downloaded in 0.07 s (182.04 MB/s)
   72 17:35:19.869796  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 17:35:19.870019  end: 1.2 download-retry (duration 00:00:00) [common]
   75 17:35:19.870107  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 17:35:19.870188  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 17:35:19.870327  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.209-cip44-51-gdb99ac443b0da/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 17:35:19.870393  saving as /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/modules/modules.tar
   79 17:35:19.870451  total size: 526864 (0 MB)
   80 17:35:19.870510  Using unxz to decompress xz
   81 17:35:19.874830  progress   6 % (0 MB)
   82 17:35:19.875234  progress  12 % (0 MB)
   83 17:35:19.875514  progress  18 % (0 MB)
   84 17:35:19.877116  progress  24 % (0 MB)
   85 17:35:19.879071  progress  31 % (0 MB)
   86 17:35:19.880957  progress  37 % (0 MB)
   87 17:35:19.883048  progress  43 % (0 MB)
   88 17:35:19.885095  progress  49 % (0 MB)
   89 17:35:19.886944  progress  55 % (0 MB)
   90 17:35:19.889542  progress  62 % (0 MB)
   91 17:35:19.891701  progress  68 % (0 MB)
   92 17:35:19.893675  progress  74 % (0 MB)
   93 17:35:19.895636  progress  80 % (0 MB)
   94 17:35:19.897741  progress  87 % (0 MB)
   95 17:35:19.899683  progress  93 % (0 MB)
   96 17:35:19.901639  progress  99 % (0 MB)
   97 17:35:19.908344  0 MB downloaded in 0.04 s (13.26 MB/s)
   98 17:35:19.908586  end: 1.3.1 http-download (duration 00:00:00) [common]
  100 17:35:19.908852  end: 1.3 download-retry (duration 00:00:00) [common]
  101 17:35:19.908944  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  102 17:35:19.909034  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  103 17:35:19.909113  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  104 17:35:19.909196  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  105 17:35:19.909394  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws
  106 17:35:19.909528  makedir: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin
  107 17:35:19.909629  makedir: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/tests
  108 17:35:19.909726  makedir: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/results
  109 17:35:19.909835  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-add-keys
  110 17:35:19.909976  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-add-sources
  111 17:35:19.910103  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-background-process-start
  112 17:35:19.910243  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-background-process-stop
  113 17:35:19.910398  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-common-functions
  114 17:35:19.910522  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-echo-ipv4
  115 17:35:19.910659  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-install-packages
  116 17:35:19.910779  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-installed-packages
  117 17:35:19.910898  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-os-build
  118 17:35:19.911018  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-probe-channel
  119 17:35:19.911156  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-probe-ip
  120 17:35:19.911280  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-target-ip
  121 17:35:19.911411  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-target-mac
  122 17:35:19.911546  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-target-storage
  123 17:35:19.911670  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-case
  124 17:35:19.911792  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-event
  125 17:35:19.911911  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-feedback
  126 17:35:19.912032  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-raise
  127 17:35:19.912156  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-reference
  128 17:35:19.912278  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-runner
  129 17:35:19.912397  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-set
  130 17:35:19.912519  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-test-shell
  131 17:35:19.912643  Updating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-install-packages (oe)
  132 17:35:19.912791  Updating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/bin/lava-installed-packages (oe)
  133 17:35:19.912910  Creating /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/environment
  134 17:35:19.913007  LAVA metadata
  135 17:35:19.913080  - LAVA_JOB_ID=12757521
  136 17:35:19.913144  - LAVA_DISPATCHER_IP=192.168.201.1
  137 17:35:19.913247  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  138 17:35:19.913311  skipped lava-vland-overlay
  139 17:35:19.913385  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  140 17:35:19.913464  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  141 17:35:19.913523  skipped lava-multinode-overlay
  142 17:35:19.913591  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  143 17:35:19.913669  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  144 17:35:19.913756  Loading test definitions
  145 17:35:19.913856  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  146 17:35:19.913944  Using /lava-12757521 at stage 0
  147 17:35:19.914283  uuid=12757521_1.4.2.3.1 testdef=None
  148 17:35:19.914368  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  149 17:35:19.914449  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  150 17:35:19.914980  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  152 17:35:19.915199  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  153 17:35:19.915899  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  155 17:35:19.916123  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  156 17:35:19.916717  runner path: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/0/tests/0_dmesg test_uuid 12757521_1.4.2.3.1
  157 17:35:19.916872  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  159 17:35:19.917095  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  160 17:35:19.917165  Using /lava-12757521 at stage 1
  161 17:35:19.917494  uuid=12757521_1.4.2.3.5 testdef=None
  162 17:35:19.917579  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  163 17:35:19.917660  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  164 17:35:19.918113  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  166 17:35:19.918325  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  167 17:35:19.918947  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  169 17:35:19.919206  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  170 17:35:19.919893  runner path: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/1/tests/1_bootrr test_uuid 12757521_1.4.2.3.5
  171 17:35:19.920041  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  173 17:35:19.920241  Creating lava-test-runner.conf files
  174 17:35:19.920302  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/0 for stage 0
  175 17:35:19.920388  - 0_dmesg
  176 17:35:19.920465  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12757521/lava-overlay-to1q01ws/lava-12757521/1 for stage 1
  177 17:35:19.920552  - 1_bootrr
  178 17:35:19.920643  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  179 17:35:19.920722  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  180 17:35:19.928910  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  181 17:35:19.929043  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  182 17:35:19.929160  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  183 17:35:19.929274  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  184 17:35:19.929388  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  185 17:35:20.199118  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  186 17:35:20.199550  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  187 17:35:20.199721  extracting modules file /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12757521/extract-overlay-ramdisk-lr92mjp_/ramdisk
  188 17:35:20.225620  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  189 17:35:20.225815  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  190 17:35:20.225925  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12757521/compress-overlay-dp7_ntsg/overlay-1.4.2.4.tar.gz to ramdisk
  191 17:35:20.225994  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12757521/compress-overlay-dp7_ntsg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12757521/extract-overlay-ramdisk-lr92mjp_/ramdisk
  192 17:35:20.235162  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  193 17:35:20.235306  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  194 17:35:20.235480  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  195 17:35:20.235651  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  196 17:35:20.235761  Building ramdisk /var/lib/lava/dispatcher/tmp/12757521/extract-overlay-ramdisk-lr92mjp_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12757521/extract-overlay-ramdisk-lr92mjp_/ramdisk
  197 17:35:20.381261  >> 54152 blocks

  198 17:35:21.317148  rename /var/lib/lava/dispatcher/tmp/12757521/extract-overlay-ramdisk-lr92mjp_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/ramdisk/ramdisk.cpio.gz
  199 17:35:21.317686  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  200 17:35:21.317875  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  201 17:35:21.318034  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  202 17:35:21.318179  No mkimage arch provided, not using FIT.
  203 17:35:21.318319  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  204 17:35:21.318448  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  205 17:35:21.318592  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  206 17:35:21.318730  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  207 17:35:21.318857  No LXC device requested
  208 17:35:21.318980  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  209 17:35:21.319116  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  210 17:35:21.319248  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  211 17:35:21.319379  Checking files for TFTP limit of 4294967296 bytes.
  212 17:35:21.319958  end: 1 tftp-deploy (duration 00:00:02) [common]
  213 17:35:21.320108  start: 2 depthcharge-action (timeout 00:05:00) [common]
  214 17:35:21.320247  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  215 17:35:21.320428  substitutions:
  216 17:35:21.320531  - {DTB}: None
  217 17:35:21.320630  - {INITRD}: 12757521/tftp-deploy-cwrouvk8/ramdisk/ramdisk.cpio.gz
  218 17:35:21.320729  - {KERNEL}: 12757521/tftp-deploy-cwrouvk8/kernel/bzImage
  219 17:35:21.320824  - {LAVA_MAC}: None
  220 17:35:21.320917  - {PRESEED_CONFIG}: None
  221 17:35:21.321009  - {PRESEED_LOCAL}: None
  222 17:35:21.321100  - {RAMDISK}: 12757521/tftp-deploy-cwrouvk8/ramdisk/ramdisk.cpio.gz
  223 17:35:21.321195  - {ROOT_PART}: None
  224 17:35:21.321287  - {ROOT}: None
  225 17:35:21.321379  - {SERVER_IP}: 192.168.201.1
  226 17:35:21.321469  - {TEE}: None
  227 17:35:21.321562  Parsed boot commands:
  228 17:35:21.321658  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  229 17:35:21.321901  Parsed boot commands: tftpboot 192.168.201.1 12757521/tftp-deploy-cwrouvk8/kernel/bzImage 12757521/tftp-deploy-cwrouvk8/kernel/cmdline 12757521/tftp-deploy-cwrouvk8/ramdisk/ramdisk.cpio.gz
  230 17:35:21.322037  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  231 17:35:21.322163  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  232 17:35:21.322300  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  233 17:35:21.322429  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  234 17:35:21.322537  Not connected, no need to disconnect.
  235 17:35:21.322652  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  236 17:35:21.322771  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  237 17:35:21.322883  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
  238 17:35:21.327745  Setting prompt string to ['lava-test: # ']
  239 17:35:21.328205  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  240 17:35:21.328356  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  241 17:35:21.328508  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  242 17:35:21.328642  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  243 17:35:21.328939  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
  244 17:35:26.466354  >> Command sent successfully.

  245 17:35:26.469252  Returned 0 in 5 seconds
  246 17:35:26.569626  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  248 17:35:26.569951  end: 2.2.2 reset-device (duration 00:00:05) [common]
  249 17:35:26.570048  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  250 17:35:26.570132  Setting prompt string to 'Starting depthcharge on Volmar...'
  251 17:35:26.570198  Changing prompt to 'Starting depthcharge on Volmar...'
  252 17:35:26.570262  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  253 17:35:26.570523  [Enter `^Ec?' for help]

  254 17:35:27.946722  

  255 17:35:27.946927  

  256 17:35:27.953319  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  257 17:35:27.956856  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  258 17:35:27.960811  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  259 17:35:27.968119  CPU: AES supported, TXT NOT supported, VT supported

  260 17:35:27.976802  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  261 17:35:27.976926  Cache size = 10 MiB

  262 17:35:27.983513  MCH: device id 4609 (rev 04) is Alderlake-P

  263 17:35:27.987293  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  264 17:35:27.990889  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  265 17:35:27.994424  VBOOT: Loading verstage.

  266 17:35:27.998320  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  267 17:35:28.005630  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  268 17:35:28.008969  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  269 17:35:28.015277  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  270 17:35:28.024997  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  271 17:35:28.025121  

  272 17:35:28.025230  

  273 17:35:28.035591  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  274 17:35:28.039242  Probing TPM I2C: I2C bus 1 version 0x3230302a

  275 17:35:28.043422  DW I2C bus 1 at 0xfe022000 (400 KHz)

  276 17:35:28.046724  done! DID_VID 0x00281ae0

  277 17:35:28.049886  TPM ready after 0 ms

  278 17:35:28.053570  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  279 17:35:28.066046  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  280 17:35:28.072386  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  281 17:35:28.124758  tlcl_send_startup: Startup return code is 0

  282 17:35:28.124912  TPM: setup succeeded

  283 17:35:28.144494  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  284 17:35:28.168707  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  285 17:35:28.171874  Chrome EC: UHEPI supported

  286 17:35:28.175277  Reading cr50 boot mode

  287 17:35:28.190185  Cr50 says boot_mode is VERIFIED_RW(0x00).

  288 17:35:28.190311  Phase 1

  289 17:35:28.197380  FMAP: area GBB found @ 1805000 (458752 bytes)

  290 17:35:28.203544  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  291 17:35:28.211237  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  292 17:35:28.218982  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  293 17:35:28.219123  Phase 2

  294 17:35:28.219244  Phase 3

  295 17:35:28.225418  FMAP: area GBB found @ 1805000 (458752 bytes)

  296 17:35:28.229175  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  297 17:35:28.235462  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  298 17:35:28.238695  VB2:vb2_verify_keyblock() Checking keyblock signature...

  299 17:35:28.248677  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  300 17:35:28.255193  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  301 17:35:28.262111  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  302 17:35:28.276285  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  303 17:35:28.280184  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  304 17:35:28.283787  VB2:vb2_verify_fw_preamble() Verifying preamble.

  305 17:35:28.290890  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  306 17:35:28.297438  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  307 17:35:28.303876  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  308 17:35:28.309104  Phase 4

  309 17:35:28.313183  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  310 17:35:28.319327  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  311 17:35:28.531913  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  312 17:35:28.538341  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  313 17:35:28.541555  Saving vboot hash.

  314 17:35:28.548001  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  315 17:35:28.564338  tlcl_extend: response is 0

  316 17:35:28.570483  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  317 17:35:28.573606  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  318 17:35:28.591541  tlcl_extend: response is 0

  319 17:35:28.598207  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  320 17:35:28.616538  tlcl_lock_nv_write: response is 0

  321 17:35:28.639042  tlcl_lock_nv_write: response is 0

  322 17:35:28.639250  Slot A is selected

  323 17:35:28.645686  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  324 17:35:28.651858  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  325 17:35:28.658564  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  326 17:35:28.665162  BS: verstage times (exec / console): total (unknown) / 256 ms

  327 17:35:28.665316  

  328 17:35:28.665439  

  329 17:35:28.672272  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  330 17:35:28.677163  Google Chrome EC: version:

  331 17:35:28.680304  	ro: volmar_v2.0.14126-e605144e9c

  332 17:35:28.683751  	rw: volmar_v0.0.55-22d1557

  333 17:35:28.686997    running image: 2

  334 17:35:28.690087  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  335 17:35:28.700198  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  336 17:35:28.707189  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  337 17:35:28.714088  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  338 17:35:28.723814  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  339 17:35:28.733939  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  340 17:35:28.737045  EC took 937us to calculate image hash

  341 17:35:28.747236  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  342 17:35:28.751098  VB2:sync_ec() select_rw=RW(active)

  343 17:35:28.762018  Waited 270us to clear limit power flag.

  344 17:35:28.765490  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 17:35:28.768508  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 17:35:28.771709  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  347 17:35:28.778435  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  348 17:35:28.781997  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  349 17:35:28.785070  TCO_STS:   0000 0000

  350 17:35:28.785161  GEN_PMCON: d0015038 00002200

  351 17:35:28.788751  GBLRST_CAUSE: 00000000 00000000

  352 17:35:28.791784  HPR_CAUSE0: 00000000

  353 17:35:28.795406  prev_sleep_state 5

  354 17:35:28.798698  Abort disabling TXT, as CPU is not TXT capable.

  355 17:35:28.806550  cse_lite: Number of partitions = 3

  356 17:35:28.809867  cse_lite: Current partition = RO

  357 17:35:28.809973  cse_lite: Next partition = RO

  358 17:35:28.813289  cse_lite: Flags = 0x7

  359 17:35:28.819890  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  360 17:35:28.830099  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  361 17:35:28.833323  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  362 17:35:28.840252  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  363 17:35:28.846455  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  364 17:35:28.853567  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  365 17:35:28.856914  cse_lite: CSE CBFS RW version : 16.1.25.2049

  366 17:35:28.863681  cse_lite: Set Boot Partition Info Command (RW)

  367 17:35:28.866630  HECI: Global Reset(Type:1) Command

  368 17:35:30.278096  

  369 17:35:30.278299  

  370 17:35:30.284603  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  371 17:35:30.288752  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  372 17:35:30.295022  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  373 17:35:30.298330  CPU: AES supported, TXT NOT supported, VT supported

  374 17:35:30.308444  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  375 17:35:30.308558  Cache size = 10 MiB

  376 17:35:30.315094  MCH: device id 4609 (rev 04) is Alderlake-P

  377 17:35:30.318455  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  378 17:35:30.325686  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  379 17:35:30.325813  VBOOT: Loading verstage.

  380 17:35:30.332159  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  381 17:35:30.335663  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  382 17:35:30.339489  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  383 17:35:30.347570  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  384 17:35:30.357760  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  385 17:35:30.357873  

  386 17:35:30.357971  

  387 17:35:30.367779  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  388 17:35:30.371191  Probing TPM I2C: I2C bus 1 version 0x3230302a

  389 17:35:30.377290  DW I2C bus 1 at 0xfe022000 (400 KHz)

  390 17:35:30.377395  done! DID_VID 0x00281ae0

  391 17:35:30.380653  TPM ready after 0 ms

  392 17:35:30.385300  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  393 17:35:30.395165  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  394 17:35:30.402237  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  395 17:35:30.458707  tlcl_send_startup: Startup return code is 0

  396 17:35:30.458856  TPM: setup succeeded

  397 17:35:30.478730  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  398 17:35:30.500396  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  399 17:35:30.504273  Chrome EC: UHEPI supported

  400 17:35:30.507594  Reading cr50 boot mode

  401 17:35:30.522572  Cr50 says boot_mode is VERIFIED_RW(0x00).

  402 17:35:30.522660  Phase 1

  403 17:35:30.529050  FMAP: area GBB found @ 1805000 (458752 bytes)

  404 17:35:30.535979  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  405 17:35:30.542288  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  406 17:35:30.548938  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  407 17:35:30.552556  Phase 2

  408 17:35:30.552662  Phase 3

  409 17:35:30.555556  FMAP: area GBB found @ 1805000 (458752 bytes)

  410 17:35:30.562193  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  411 17:35:30.565980  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  412 17:35:30.572594  VB2:vb2_verify_keyblock() Checking keyblock signature...

  413 17:35:30.579261  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  414 17:35:30.585995  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  415 17:35:30.595533  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  416 17:35:30.607493  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  417 17:35:30.610860  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  418 17:35:30.618130  VB2:vb2_verify_fw_preamble() Verifying preamble.

  419 17:35:30.624149  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  420 17:35:30.630966  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  421 17:35:30.637699  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  422 17:35:30.641355  Phase 4

  423 17:35:30.644583  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  424 17:35:30.651689  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  425 17:35:30.864959  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  426 17:35:30.870968  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  427 17:35:30.874835  Saving vboot hash.

  428 17:35:30.881169  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  429 17:35:30.896783  tlcl_extend: response is 0

  430 17:35:30.903425  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  431 17:35:30.910262  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  432 17:35:30.925217  tlcl_extend: response is 0

  433 17:35:30.931370  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  434 17:35:30.949918  tlcl_lock_nv_write: response is 0

  435 17:35:30.969251  tlcl_lock_nv_write: response is 0

  436 17:35:30.969737  Slot A is selected

  437 17:35:30.976027  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  438 17:35:30.982824  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  439 17:35:30.988903  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  440 17:35:30.995916  BS: verstage times (exec / console): total (unknown) / 256 ms

  441 17:35:30.996444  

  442 17:35:30.996888  

  443 17:35:31.002298  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  444 17:35:31.006698  Google Chrome EC: version:

  445 17:35:31.009522  	ro: volmar_v2.0.14126-e605144e9c

  446 17:35:31.013019  	rw: volmar_v0.0.55-22d1557

  447 17:35:31.016296    running image: 2

  448 17:35:31.019603  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  449 17:35:31.029388  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  450 17:35:31.036155  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  451 17:35:31.042678  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  452 17:35:31.052632  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  453 17:35:31.062597  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  454 17:35:31.066404  EC took 941us to calculate image hash

  455 17:35:31.076342  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  456 17:35:31.079718  VB2:sync_ec() select_rw=RW(active)

  457 17:35:31.091279  Waited 305us to clear limit power flag.

  458 17:35:31.094723  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  459 17:35:31.098252  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  460 17:35:31.101761  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  461 17:35:31.108790  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  462 17:35:31.112076  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  463 17:35:31.112493  TCO_STS:   0000 0000

  464 17:35:31.115613  GEN_PMCON: d1001038 00002200

  465 17:35:31.119546  GBLRST_CAUSE: 00000040 00000000

  466 17:35:31.122799  HPR_CAUSE0: 00000000

  467 17:35:31.123318  prev_sleep_state 5

  468 17:35:31.129763  Abort disabling TXT, as CPU is not TXT capable.

  469 17:35:31.135964  cse_lite: Number of partitions = 3

  470 17:35:31.139124  cse_lite: Current partition = RW

  471 17:35:31.139566  cse_lite: Next partition = RW

  472 17:35:31.142638  cse_lite: Flags = 0x7

  473 17:35:31.149410  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  474 17:35:31.159301  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  475 17:35:31.162486  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  476 17:35:31.169223  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  477 17:35:31.175990  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  478 17:35:31.182714  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  479 17:35:31.185568  cse_lite: CSE CBFS RW version : 16.1.25.2049

  480 17:35:31.188827  Boot Count incremented to 4908

  481 17:35:31.196240  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  482 17:35:31.202280  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  483 17:35:31.215728  Probing TPM I2C: done! DID_VID 0x00281ae0

  484 17:35:31.218751  Locality already claimed

  485 17:35:31.222170  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  486 17:35:31.241561  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  487 17:35:31.248029  MRC: Hash idx 0x100d comparison successful.

  488 17:35:31.251522  MRC cache found, size f6c8

  489 17:35:31.252042  bootmode is set to: 2

  490 17:35:31.255054  EC returned error result code 3

  491 17:35:31.258057  FW_CONFIG value from CBI is 0x131

  492 17:35:31.265005  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  493 17:35:31.268523  SPD index = 0

  494 17:35:31.274680  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  495 17:35:31.275110  SPD: module type is LPDDR4X

  496 17:35:31.281864  SPD: module part number is K4U6E3S4AB-MGCL

  497 17:35:31.288375  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  498 17:35:31.291340  SPD: device width 16 bits, bus width 16 bits

  499 17:35:31.295580  SPD: module size is 1024 MB (per channel)

  500 17:35:31.363865  CBMEM:

  501 17:35:31.367779  IMD: root @ 0x76fff000 254 entries.

  502 17:35:31.370590  IMD: root @ 0x76ffec00 62 entries.

  503 17:35:31.378458  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  504 17:35:31.381445  RO_VPD is uninitialized or empty.

  505 17:35:31.384833  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  506 17:35:31.391496  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  507 17:35:31.394767  External stage cache:

  508 17:35:31.398401  IMD: root @ 0x7bbff000 254 entries.

  509 17:35:31.401216  IMD: root @ 0x7bbfec00 62 entries.

  510 17:35:31.408431  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  511 17:35:31.414791  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  512 17:35:31.418695  MRC: 'RW_MRC_CACHE' does not need update.

  513 17:35:31.419211  8 DIMMs found

  514 17:35:31.422064  SMM Memory Map

  515 17:35:31.425246  SMRAM       : 0x7b800000 0x800000

  516 17:35:31.428937   Subregion 0: 0x7b800000 0x200000

  517 17:35:31.431905   Subregion 1: 0x7ba00000 0x200000

  518 17:35:31.435031   Subregion 2: 0x7bc00000 0x400000

  519 17:35:31.438195  top_of_ram = 0x77000000

  520 17:35:31.441801  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  521 17:35:31.448646  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  522 17:35:31.455188  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  523 17:35:31.458445  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  524 17:35:31.458869  Normal boot

  525 17:35:31.468203  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  526 17:35:31.475137  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  527 17:35:31.481655  Processing 237 relocs. Offset value of 0x74ab9000

  528 17:35:31.489921  BS: romstage times (exec / console): total (unknown) / 377 ms

  529 17:35:31.497125  

  530 17:35:31.497639  

  531 17:35:31.503836  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  532 17:35:31.504436  Normal boot

  533 17:35:31.510253  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  534 17:35:31.516867  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  535 17:35:31.523872  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  536 17:35:31.533013  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  537 17:35:31.581059  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  538 17:35:31.587959  Processing 5931 relocs. Offset value of 0x72a2f000

  539 17:35:31.591384  BS: postcar times (exec / console): total (unknown) / 51 ms

  540 17:35:31.595077  

  541 17:35:31.595636  

  542 17:35:31.601486  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  543 17:35:31.604657  Reserving BERT start 76a1e000, size 10000

  544 17:35:31.607705  Normal boot

  545 17:35:31.611195  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  546 17:35:31.617966  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  547 17:35:31.627722  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  548 17:35:31.630902  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  549 17:35:31.634214  Google Chrome EC: version:

  550 17:35:31.637594  	ro: volmar_v2.0.14126-e605144e9c

  551 17:35:31.640850  	rw: volmar_v0.0.55-22d1557

  552 17:35:31.643932    running image: 2

  553 17:35:31.647772  ACPI _SWS is PM1 Index 8 GPE Index -1

  554 17:35:31.650914  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  555 17:35:31.654519  EC returned error result code 3

  556 17:35:31.657963  FW_CONFIG value from CBI is 0x131

  557 17:35:31.665334  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  558 17:35:31.668359  PCI: 00:1c.2 disabled by fw_config

  559 17:35:31.674593  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  560 17:35:31.678118  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  561 17:35:31.685779  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  562 17:35:31.688800  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  563 17:35:31.695825  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  564 17:35:31.702759  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  565 17:35:31.705609  microcode: sig=0x906a4 pf=0x80 revision=0x423

  566 17:35:31.712583  microcode: Update skipped, already up-to-date

  567 17:35:31.718704  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  568 17:35:31.750732  Detected 6 core, 8 thread CPU.

  569 17:35:31.753902  Setting up SMI for CPU

  570 17:35:31.757273  IED base = 0x7bc00000

  571 17:35:31.757765  IED size = 0x00400000

  572 17:35:31.760236  Will perform SMM setup.

  573 17:35:31.763946  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  574 17:35:31.767522  LAPIC 0x0 in XAPIC mode.

  575 17:35:31.777247  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  576 17:35:31.780604  Processing 18 relocs. Offset value of 0x00030000

  577 17:35:31.785111  Attempting to start 7 APs

  578 17:35:31.788311  Waiting for 10ms after sending INIT.

  579 17:35:31.801932  Waiting for SIPI to complete...

  580 17:35:31.804660  LAPIC 0x1 in XAPIC mode.

  581 17:35:31.807713  LAPIC 0x10 in XAPIC mode.

  582 17:35:31.808143  done.

  583 17:35:31.815011  AP: slot 2 apic_id 10, MCU rev: 0x00000423

  584 17:35:31.815568  LAPIC 0x8 in XAPIC mode.

  585 17:35:31.817863  LAPIC 0x14 in XAPIC mode.

  586 17:35:31.821285  LAPIC 0x12 in XAPIC mode.

  587 17:35:31.824835  AP: slot 4 apic_id 14, MCU rev: 0x00000423

  588 17:35:31.828281  AP: slot 3 apic_id 12, MCU rev: 0x00000423

  589 17:35:31.831775  LAPIC 0x16 in XAPIC mode.

  590 17:35:31.834487  Waiting for SIPI to complete...

  591 17:35:31.834922  done.

  592 17:35:31.841456  AP: slot 1 apic_id 16, MCU rev: 0x00000423

  593 17:35:31.844631  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  594 17:35:31.848054  LAPIC 0x9 in XAPIC mode.

  595 17:35:31.850912  AP: slot 6 apic_id 1, MCU rev: 0x00000423

  596 17:35:31.854228  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  597 17:35:31.857495  smm_setup_relocation_handler: enter

  598 17:35:31.861469  smm_setup_relocation_handler: exit

  599 17:35:31.871482  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  600 17:35:31.874486  Processing 11 relocs. Offset value of 0x00038000

  601 17:35:31.881694  smm_module_setup_stub: stack_top = 0x7b804000

  602 17:35:31.884145  smm_module_setup_stub: per cpu stack_size = 0x800

  603 17:35:31.891083  smm_module_setup_stub: runtime.start32_offset = 0x4c

  604 17:35:31.894885  smm_module_setup_stub: runtime.smm_size = 0x10000

  605 17:35:31.901016  SMM Module: stub loaded at 38000. Will call 0x76a52094

  606 17:35:31.904283  Installing permanent SMM handler to 0x7b800000

  607 17:35:31.911213  smm_load_module: total_smm_space_needed e468, available -> 200000

  608 17:35:31.921291  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  609 17:35:31.924250  Processing 255 relocs. Offset value of 0x7b9f6000

  610 17:35:31.931160  smm_load_module: smram_start: 0x7b800000

  611 17:35:31.934531  smm_load_module: smram_end: 7ba00000

  612 17:35:31.937638  smm_load_module: handler start 0x7b9f6d5f

  613 17:35:31.940551  smm_load_module: handler_size 98d0

  614 17:35:31.944241  smm_load_module: fxsave_area 0x7b9ff000

  615 17:35:31.947692  smm_load_module: fxsave_size 1000

  616 17:35:31.951058  smm_load_module: CONFIG_MSEG_SIZE 0x0

  617 17:35:31.957474  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  618 17:35:31.964286  smm_load_module: handler_mod_params.smbase = 0x7b800000

  619 17:35:31.967179  smm_load_module: per_cpu_save_state_size = 0x400

  620 17:35:31.971078  smm_load_module: num_cpus = 0x8

  621 17:35:31.977546  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  622 17:35:31.980523  smm_load_module: total_save_state_size = 0x2000

  623 17:35:31.984256  smm_load_module: cpu0 entry: 7b9e6000

  624 17:35:31.990603  smm_create_map: cpus allowed in one segment 30

  625 17:35:31.994159  smm_create_map: min # of segments needed 1

  626 17:35:31.994692  CPU 0x0

  627 17:35:32.000812      smbase 7b9e6000  entry 7b9ee000

  628 17:35:32.003968             ss_start 7b9f5c00  code_end 7b9ee208

  629 17:35:32.004529  CPU 0x1

  630 17:35:32.007435      smbase 7b9e5c00  entry 7b9edc00

  631 17:35:32.013865             ss_start 7b9f5800  code_end 7b9ede08

  632 17:35:32.014592  CPU 0x2

  633 17:35:32.017314      smbase 7b9e5800  entry 7b9ed800

  634 17:35:32.023773             ss_start 7b9f5400  code_end 7b9eda08

  635 17:35:32.024283  CPU 0x3

  636 17:35:32.027520      smbase 7b9e5400  entry 7b9ed400

  637 17:35:32.030782             ss_start 7b9f5000  code_end 7b9ed608

  638 17:35:32.034165  CPU 0x4

  639 17:35:32.037021      smbase 7b9e5000  entry 7b9ed000

  640 17:35:32.040210             ss_start 7b9f4c00  code_end 7b9ed208

  641 17:35:32.040637  CPU 0x5

  642 17:35:32.047468      smbase 7b9e4c00  entry 7b9ecc00

  643 17:35:32.050881             ss_start 7b9f4800  code_end 7b9ece08

  644 17:35:32.051450  CPU 0x6

  645 17:35:32.053587      smbase 7b9e4800  entry 7b9ec800

  646 17:35:32.060202             ss_start 7b9f4400  code_end 7b9eca08

  647 17:35:32.060632  CPU 0x7

  648 17:35:32.063721      smbase 7b9e4400  entry 7b9ec400

  649 17:35:32.070534             ss_start 7b9f4000  code_end 7b9ec608

  650 17:35:32.076999  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  651 17:35:32.080480  Processing 11 relocs. Offset value of 0x7b9ee000

  652 17:35:32.086924  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  653 17:35:32.093305  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  654 17:35:32.100168  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  655 17:35:32.106654  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  656 17:35:32.113299  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  657 17:35:32.120151  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  658 17:35:32.126397  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  659 17:35:32.130033  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  660 17:35:32.137009  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  661 17:35:32.143214  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  662 17:35:32.150183  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  663 17:35:32.156810  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  664 17:35:32.162998  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  665 17:35:32.170040  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  666 17:35:32.176345  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  667 17:35:32.179794  smm_module_setup_stub: stack_top = 0x7b804000

  668 17:35:32.186299  smm_module_setup_stub: per cpu stack_size = 0x800

  669 17:35:32.189409  smm_module_setup_stub: runtime.start32_offset = 0x4c

  670 17:35:32.196702  smm_module_setup_stub: runtime.smm_size = 0x200000

  671 17:35:32.203017  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  672 17:35:32.206169  Clearing SMI status registers

  673 17:35:32.209572  SMI_STS: PM1 

  674 17:35:32.209994  PM1_STS: WAK PWRBTN 

  675 17:35:32.216364  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  676 17:35:32.219794  In relocation handler: CPU 0

  677 17:35:32.222969  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  678 17:35:32.229472  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  679 17:35:32.232486  Relocation complete.

  680 17:35:32.239188  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  681 17:35:32.243108  In relocation handler: CPU 6

  682 17:35:32.245890  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  683 17:35:32.249616  Relocation complete.

  684 17:35:32.256224  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  685 17:35:32.259549  In relocation handler: CPU 1

  686 17:35:32.262593  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  687 17:35:32.266334  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  688 17:35:32.269546  Relocation complete.

  689 17:35:32.276206  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  690 17:35:32.279559  In relocation handler: CPU 4

  691 17:35:32.283124  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  692 17:35:32.289423  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  693 17:35:32.289936  Relocation complete.

  694 17:35:32.296501  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  695 17:35:32.299908  In relocation handler: CPU 3

  696 17:35:32.306447  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  697 17:35:32.309496  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  698 17:35:32.312880  Relocation complete.

  699 17:35:32.319820  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  700 17:35:32.323252  In relocation handler: CPU 2

  701 17:35:32.326010  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  702 17:35:32.329749  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  703 17:35:32.332883  Relocation complete.

  704 17:35:32.339478  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  705 17:35:32.342926  In relocation handler: CPU 5

  706 17:35:32.345782  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  707 17:35:32.348868  Relocation complete.

  708 17:35:32.355939  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  709 17:35:32.359225  In relocation handler: CPU 7

  710 17:35:32.362497  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  711 17:35:32.368984  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  712 17:35:32.369438  Relocation complete.

  713 17:35:32.372530  Initializing CPU #0

  714 17:35:32.376083  CPU: vendor Intel device 906a4

  715 17:35:32.379561  CPU: family 06, model 9a, stepping 04

  716 17:35:32.382546  Clearing out pending MCEs

  717 17:35:32.385566  cpu: energy policy set to 7

  718 17:35:32.389078  Turbo is available but hidden

  719 17:35:32.392441  Turbo is available and visible

  720 17:35:32.395558  microcode: Update skipped, already up-to-date

  721 17:35:32.398991  CPU #0 initialized

  722 17:35:32.399464  Initializing CPU #6

  723 17:35:32.402082  Initializing CPU #2

  724 17:35:32.405569  Initializing CPU #4

  725 17:35:32.406007  Initializing CPU #1

  726 17:35:32.408507  CPU: vendor Intel device 906a4

  727 17:35:32.412242  CPU: family 06, model 9a, stepping 04

  728 17:35:32.415702  CPU: vendor Intel device 906a4

  729 17:35:32.418606  CPU: family 06, model 9a, stepping 04

  730 17:35:32.422009  CPU: vendor Intel device 906a4

  731 17:35:32.425324  CPU: family 06, model 9a, stepping 04

  732 17:35:32.428670  Clearing out pending MCEs

  733 17:35:32.431979  Clearing out pending MCEs

  734 17:35:32.435504  CPU: vendor Intel device 906a4

  735 17:35:32.438677  CPU: family 06, model 9a, stepping 04

  736 17:35:32.441872  Clearing out pending MCEs

  737 17:35:32.445207  cpu: energy policy set to 7

  738 17:35:32.445640  Initializing CPU #5

  739 17:35:32.448685  cpu: energy policy set to 7

  740 17:35:32.451563  Initializing CPU #3

  741 17:35:32.455104  cpu: energy policy set to 7

  742 17:35:32.458487  CPU: vendor Intel device 906a4

  743 17:35:32.461821  CPU: family 06, model 9a, stepping 04

  744 17:35:32.464779  microcode: Update skipped, already up-to-date

  745 17:35:32.468067  CPU #4 initialized

  746 17:35:32.471499  Clearing out pending MCEs

  747 17:35:32.474706  microcode: Update skipped, already up-to-date

  748 17:35:32.478222  CPU #1 initialized

  749 17:35:32.478758  Clearing out pending MCEs

  750 17:35:32.481252  cpu: energy policy set to 7

  751 17:35:32.484968  CPU: vendor Intel device 906a4

  752 17:35:32.488032  CPU: family 06, model 9a, stepping 04

  753 17:35:32.494959  microcode: Update skipped, already up-to-date

  754 17:35:32.495536  CPU #3 initialized

  755 17:35:32.501424  microcode: Update skipped, already up-to-date

  756 17:35:32.501939  CPU #2 initialized

  757 17:35:32.504406  cpu: energy policy set to 7

  758 17:35:32.508159  Initializing CPU #7

  759 17:35:32.511787  Clearing out pending MCEs

  760 17:35:32.512306  CPU: vendor Intel device 906a4

  761 17:35:32.517611  CPU: family 06, model 9a, stepping 04

  762 17:35:32.518061  cpu: energy policy set to 7

  763 17:35:32.524549  microcode: Update skipped, already up-to-date

  764 17:35:32.525079  CPU #6 initialized

  765 17:35:32.527838  Clearing out pending MCEs

  766 17:35:32.533964  microcode: Update skipped, already up-to-date

  767 17:35:32.534401  CPU #5 initialized

  768 17:35:32.537622  cpu: energy policy set to 7

  769 17:35:32.544043  microcode: Update skipped, already up-to-date

  770 17:35:32.544461  CPU #7 initialized

  771 17:35:32.547780  bsp_do_flight_plan done after 708 msecs.

  772 17:35:32.550695  CPU: frequency set to 4400 MHz

  773 17:35:32.554153  Enabling SMIs.

  774 17:35:32.560726  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  775 17:35:32.576223  Probing TPM I2C: done! DID_VID 0x00281ae0

  776 17:35:32.579128  Locality already claimed

  777 17:35:32.582574  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  778 17:35:32.594197  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  779 17:35:32.597399  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  780 17:35:32.603895  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  781 17:35:32.610360  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  782 17:35:32.613826  Found a VBT of 9216 bytes after decompression

  783 17:35:32.616846  PCI  1.0, PIN A, using IRQ #16

  784 17:35:32.620860  PCI  2.0, PIN A, using IRQ #17

  785 17:35:32.623818  PCI  4.0, PIN A, using IRQ #18

  786 17:35:32.627729  PCI  5.0, PIN A, using IRQ #16

  787 17:35:32.630404  PCI  6.0, PIN A, using IRQ #16

  788 17:35:32.633983  PCI  6.2, PIN C, using IRQ #18

  789 17:35:32.637019  PCI  7.0, PIN A, using IRQ #19

  790 17:35:32.640415  PCI  7.1, PIN B, using IRQ #20

  791 17:35:32.643789  PCI  7.2, PIN C, using IRQ #21

  792 17:35:32.647296  PCI  7.3, PIN D, using IRQ #22

  793 17:35:32.650554  PCI  8.0, PIN A, using IRQ #23

  794 17:35:32.654326  PCI  D.0, PIN A, using IRQ #17

  795 17:35:32.656822  PCI  D.1, PIN B, using IRQ #19

  796 17:35:32.657240  PCI 10.0, PIN A, using IRQ #24

  797 17:35:32.660182  PCI 10.1, PIN B, using IRQ #25

  798 17:35:32.664003  PCI 10.6, PIN C, using IRQ #20

  799 17:35:32.667473  PCI 10.7, PIN D, using IRQ #21

  800 17:35:32.670247  PCI 11.0, PIN A, using IRQ #26

  801 17:35:32.673788  PCI 11.1, PIN B, using IRQ #27

  802 17:35:32.676844  PCI 11.2, PIN C, using IRQ #28

  803 17:35:32.680244  PCI 11.3, PIN D, using IRQ #29

  804 17:35:32.683576  PCI 12.0, PIN A, using IRQ #30

  805 17:35:32.686946  PCI 12.6, PIN B, using IRQ #31

  806 17:35:32.690125  PCI 12.7, PIN C, using IRQ #22

  807 17:35:32.693871  PCI 13.0, PIN A, using IRQ #32

  808 17:35:32.696497  PCI 13.1, PIN B, using IRQ #33

  809 17:35:32.699891  PCI 13.2, PIN C, using IRQ #34

  810 17:35:32.703195  PCI 13.3, PIN D, using IRQ #35

  811 17:35:32.706496  PCI 14.0, PIN B, using IRQ #23

  812 17:35:32.710269  PCI 14.1, PIN A, using IRQ #36

  813 17:35:32.710786  PCI 14.3, PIN C, using IRQ #17

  814 17:35:32.714071  PCI 15.0, PIN A, using IRQ #37

  815 17:35:32.716660  PCI 15.1, PIN B, using IRQ #38

  816 17:35:32.719986  PCI 15.2, PIN C, using IRQ #39

  817 17:35:32.723252  PCI 15.3, PIN D, using IRQ #40

  818 17:35:32.726411  PCI 16.0, PIN A, using IRQ #18

  819 17:35:32.729988  PCI 16.1, PIN B, using IRQ #19

  820 17:35:32.733081  PCI 16.2, PIN C, using IRQ #20

  821 17:35:32.736832  PCI 16.3, PIN D, using IRQ #21

  822 17:35:32.739673  PCI 16.4, PIN A, using IRQ #18

  823 17:35:32.743555  PCI 16.5, PIN B, using IRQ #19

  824 17:35:32.746599  PCI 17.0, PIN A, using IRQ #22

  825 17:35:32.750412  PCI 19.0, PIN A, using IRQ #41

  826 17:35:32.753616  PCI 19.1, PIN B, using IRQ #42

  827 17:35:32.756985  PCI 19.2, PIN C, using IRQ #43

  828 17:35:32.759611  PCI 1C.0, PIN A, using IRQ #16

  829 17:35:32.763106  PCI 1C.1, PIN B, using IRQ #17

  830 17:35:32.763553  PCI 1C.2, PIN C, using IRQ #18

  831 17:35:32.766490  PCI 1C.3, PIN D, using IRQ #19

  832 17:35:32.770107  PCI 1C.4, PIN A, using IRQ #16

  833 17:35:32.773401  PCI 1C.5, PIN B, using IRQ #17

  834 17:35:32.776566  PCI 1C.6, PIN C, using IRQ #18

  835 17:35:32.779640  PCI 1C.7, PIN D, using IRQ #19

  836 17:35:32.783327  PCI 1D.0, PIN A, using IRQ #16

  837 17:35:32.786436  PCI 1D.1, PIN B, using IRQ #17

  838 17:35:32.789946  PCI 1D.2, PIN C, using IRQ #18

  839 17:35:32.793165  PCI 1D.3, PIN D, using IRQ #19

  840 17:35:32.796743  PCI 1E.0, PIN A, using IRQ #23

  841 17:35:32.800055  PCI 1E.1, PIN B, using IRQ #20

  842 17:35:32.803478  PCI 1E.2, PIN C, using IRQ #44

  843 17:35:32.806339  PCI 1E.3, PIN D, using IRQ #45

  844 17:35:32.809665  PCI 1F.3, PIN B, using IRQ #22

  845 17:35:32.813384  PCI 1F.4, PIN C, using IRQ #23

  846 17:35:32.816275  PCI 1F.6, PIN D, using IRQ #20

  847 17:35:32.819315  PCI 1F.7, PIN A, using IRQ #21

  848 17:35:32.822611  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  849 17:35:32.829579  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  850 17:35:33.009334  FSPS returned 0

  851 17:35:33.012644  Executing Phase 1 of FspMultiPhaseSiInit

  852 17:35:33.022473  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  853 17:35:33.026007  port C0 DISC req: usage 1 usb3 1 usb2 1

  854 17:35:33.029364  Raw Buffer output 0 00000111

  855 17:35:33.032787  Raw Buffer output 1 00000000

  856 17:35:33.036252  pmc_send_ipc_cmd succeeded

  857 17:35:33.042838  port C1 DISC req: usage 1 usb3 3 usb2 3

  858 17:35:33.043394  Raw Buffer output 0 00000331

  859 17:35:33.045997  Raw Buffer output 1 00000000

  860 17:35:33.050186  pmc_send_ipc_cmd succeeded

  861 17:35:33.054071  Detected 6 core, 8 thread CPU.

  862 17:35:33.057092  Detected 6 core, 8 thread CPU.

  863 17:35:33.062463  Detected 6 core, 8 thread CPU.

  864 17:35:33.065846  Detected 6 core, 8 thread CPU.

  865 17:35:33.069061  Detected 6 core, 8 thread CPU.

  866 17:35:33.072296  Detected 6 core, 8 thread CPU.

  867 17:35:33.075949  Detected 6 core, 8 thread CPU.

  868 17:35:33.078769  Detected 6 core, 8 thread CPU.

  869 17:35:33.082871  Detected 6 core, 8 thread CPU.

  870 17:35:33.086128  Detected 6 core, 8 thread CPU.

  871 17:35:33.089313  Detected 6 core, 8 thread CPU.

  872 17:35:33.092268  Detected 6 core, 8 thread CPU.

  873 17:35:33.095744  Detected 6 core, 8 thread CPU.

  874 17:35:33.098848  Detected 6 core, 8 thread CPU.

  875 17:35:33.102257  Detected 6 core, 8 thread CPU.

  876 17:35:33.105462  Detected 6 core, 8 thread CPU.

  877 17:35:33.108637  Detected 6 core, 8 thread CPU.

  878 17:35:33.112156  Detected 6 core, 8 thread CPU.

  879 17:35:33.115432  Detected 6 core, 8 thread CPU.

  880 17:35:33.119061  Detected 6 core, 8 thread CPU.

  881 17:35:33.122525  Detected 6 core, 8 thread CPU.

  882 17:35:33.125486  Detected 6 core, 8 thread CPU.

  883 17:35:33.415949  Detected 6 core, 8 thread CPU.

  884 17:35:33.419485  Detected 6 core, 8 thread CPU.

  885 17:35:33.422622  Detected 6 core, 8 thread CPU.

  886 17:35:33.426154  Detected 6 core, 8 thread CPU.

  887 17:35:33.429479  Detected 6 core, 8 thread CPU.

  888 17:35:33.432655  Detected 6 core, 8 thread CPU.

  889 17:35:33.435877  Detected 6 core, 8 thread CPU.

  890 17:35:33.439517  Detected 6 core, 8 thread CPU.

  891 17:35:33.442420  Detected 6 core, 8 thread CPU.

  892 17:35:33.446385  Detected 6 core, 8 thread CPU.

  893 17:35:33.449271  Detected 6 core, 8 thread CPU.

  894 17:35:33.452261  Detected 6 core, 8 thread CPU.

  895 17:35:33.455589  Detected 6 core, 8 thread CPU.

  896 17:35:33.459337  Detected 6 core, 8 thread CPU.

  897 17:35:33.462488  Detected 6 core, 8 thread CPU.

  898 17:35:33.466096  Detected 6 core, 8 thread CPU.

  899 17:35:33.469314  Detected 6 core, 8 thread CPU.

  900 17:35:33.472292  Detected 6 core, 8 thread CPU.

  901 17:35:33.475874  Detected 6 core, 8 thread CPU.

  902 17:35:33.479675  Detected 6 core, 8 thread CPU.

  903 17:35:33.482079  Display FSP Version Info HOB

  904 17:35:33.485686  Reference Code - CPU = c.0.65.70

  905 17:35:33.485778  uCode Version = 0.0.4.23

  906 17:35:33.488418  TXT ACM version = ff.ff.ff.ffff

  907 17:35:33.491853  Reference Code - ME = c.0.65.70

  908 17:35:33.495344  MEBx version = 0.0.0.0

  909 17:35:33.498642  ME Firmware Version = Lite SKU

  910 17:35:33.502841  Reference Code - PCH = c.0.65.70

  911 17:35:33.505264  PCH-CRID Status = Disabled

  912 17:35:33.508683  PCH-CRID Original Value = ff.ff.ff.ffff

  913 17:35:33.512406  PCH-CRID New Value = ff.ff.ff.ffff

  914 17:35:33.515456  OPROM - RST - RAID = ff.ff.ff.ffff

  915 17:35:33.519030  PCH Hsio Version = 4.0.0.0

  916 17:35:33.522222  Reference Code - SA - System Agent = c.0.65.70

  917 17:35:33.525929  Reference Code - MRC = 0.0.3.80

  918 17:35:33.529356  SA - PCIe Version = c.0.65.70

  919 17:35:33.532498  SA-CRID Status = Disabled

  920 17:35:33.535797  SA-CRID Original Value = 0.0.0.4

  921 17:35:33.538727  SA-CRID New Value = 0.0.0.4

  922 17:35:33.541928  OPROM - VBIOS = ff.ff.ff.ffff

  923 17:35:33.545324  IO Manageability Engine FW Version = 24.0.4.0

  924 17:35:33.548837  PHY Build Version = 0.0.0.2016

  925 17:35:33.552619  Thunderbolt(TM) FW Version = 0.0.0.0

  926 17:35:33.559052  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  927 17:35:33.566035  BS: BS_DEV_INIT_CHIPS run times (exec / console): 491 / 507 ms

  928 17:35:33.568935  Enumerating buses...

  929 17:35:33.572374  Show all devs... Before device enumeration.

  930 17:35:33.575802  Root Device: enabled 1

  931 17:35:33.576357  CPU_CLUSTER: 0: enabled 1

  932 17:35:33.579246  DOMAIN: 0000: enabled 1

  933 17:35:33.582067  GPIO: 0: enabled 1

  934 17:35:33.582625  PCI: 00:00.0: enabled 1

  935 17:35:33.585540  PCI: 00:01.0: enabled 0

  936 17:35:33.588580  PCI: 00:01.1: enabled 0

  937 17:35:33.591975  PCI: 00:02.0: enabled 1

  938 17:35:33.592529  PCI: 00:04.0: enabled 1

  939 17:35:33.595514  PCI: 00:05.0: enabled 0

  940 17:35:33.599039  PCI: 00:06.0: enabled 1

  941 17:35:33.602380  PCI: 00:06.2: enabled 0

  942 17:35:33.602958  PCI: 00:07.0: enabled 0

  943 17:35:33.605624  PCI: 00:07.1: enabled 0

  944 17:35:33.608872  PCI: 00:07.2: enabled 0

  945 17:35:33.612023  PCI: 00:07.3: enabled 0

  946 17:35:33.612438  PCI: 00:08.0: enabled 0

  947 17:35:33.615463  PCI: 00:09.0: enabled 0

  948 17:35:33.618650  PCI: 00:0a.0: enabled 1

  949 17:35:33.621983  PCI: 00:0d.0: enabled 1

  950 17:35:33.622550  PCI: 00:0d.1: enabled 0

  951 17:35:33.625766  PCI: 00:0d.2: enabled 0

  952 17:35:33.628888  PCI: 00:0d.3: enabled 0

  953 17:35:33.629453  PCI: 00:0e.0: enabled 0

  954 17:35:33.631916  PCI: 00:10.0: enabled 0

  955 17:35:33.635435  PCI: 00:10.1: enabled 0

  956 17:35:33.638619  PCI: 00:10.6: enabled 0

  957 17:35:33.639032  PCI: 00:10.7: enabled 0

  958 17:35:33.642126  PCI: 00:12.0: enabled 0

  959 17:35:33.645435  PCI: 00:12.6: enabled 0

  960 17:35:33.648324  PCI: 00:12.7: enabled 0

  961 17:35:33.648738  PCI: 00:13.0: enabled 0

  962 17:35:33.651588  PCI: 00:14.0: enabled 1

  963 17:35:33.655374  PCI: 00:14.1: enabled 0

  964 17:35:33.658716  PCI: 00:14.2: enabled 1

  965 17:35:33.659239  PCI: 00:14.3: enabled 1

  966 17:35:33.661953  PCI: 00:15.0: enabled 1

  967 17:35:33.665311  PCI: 00:15.1: enabled 1

  968 17:35:33.665730  PCI: 00:15.2: enabled 0

  969 17:35:33.669029  PCI: 00:15.3: enabled 1

  970 17:35:33.671880  PCI: 00:16.0: enabled 1

  971 17:35:33.675533  PCI: 00:16.1: enabled 0

  972 17:35:33.676055  PCI: 00:16.2: enabled 0

  973 17:35:33.678778  PCI: 00:16.3: enabled 0

  974 17:35:33.682082  PCI: 00:16.4: enabled 0

  975 17:35:33.685421  PCI: 00:16.5: enabled 0

  976 17:35:33.685940  PCI: 00:17.0: enabled 1

  977 17:35:33.688671  PCI: 00:19.0: enabled 0

  978 17:35:33.692175  PCI: 00:19.1: enabled 1

  979 17:35:33.695276  PCI: 00:19.2: enabled 0

  980 17:35:33.695828  PCI: 00:1a.0: enabled 0

  981 17:35:33.698941  PCI: 00:1c.0: enabled 0

  982 17:35:33.702145  PCI: 00:1c.1: enabled 0

  983 17:35:33.705675  PCI: 00:1c.2: enabled 0

  984 17:35:33.706237  PCI: 00:1c.3: enabled 0

  985 17:35:33.708134  PCI: 00:1c.4: enabled 0

  986 17:35:33.711698  PCI: 00:1c.5: enabled 0

  987 17:35:33.712112  PCI: 00:1c.6: enabled 0

  988 17:35:33.715145  PCI: 00:1c.7: enabled 0

  989 17:35:33.719032  PCI: 00:1d.0: enabled 0

  990 17:35:33.721953  PCI: 00:1d.1: enabled 0

  991 17:35:33.722518  PCI: 00:1d.2: enabled 0

  992 17:35:33.725503  PCI: 00:1d.3: enabled 0

  993 17:35:33.728704  PCI: 00:1e.0: enabled 1

  994 17:35:33.731951  PCI: 00:1e.1: enabled 0

  995 17:35:33.732410  PCI: 00:1e.2: enabled 0

  996 17:35:33.735247  PCI: 00:1e.3: enabled 1

  997 17:35:33.738530  PCI: 00:1f.0: enabled 1

  998 17:35:33.742015  PCI: 00:1f.1: enabled 0

  999 17:35:33.742465  PCI: 00:1f.2: enabled 1

 1000 17:35:33.744723  PCI: 00:1f.3: enabled 1

 1001 17:35:33.748184  PCI: 00:1f.4: enabled 0

 1002 17:35:33.748710  PCI: 00:1f.5: enabled 1

 1003 17:35:33.751912  PCI: 00:1f.6: enabled 0

 1004 17:35:33.755268  PCI: 00:1f.7: enabled 0

 1005 17:35:33.758818  GENERIC: 0.0: enabled 1

 1006 17:35:33.759245  GENERIC: 0.0: enabled 1

 1007 17:35:33.761424  GENERIC: 1.0: enabled 1

 1008 17:35:33.765165  GENERIC: 0.0: enabled 1

 1009 17:35:33.768333  GENERIC: 1.0: enabled 1

 1010 17:35:33.768781  USB0 port 0: enabled 1

 1011 17:35:33.771578  USB0 port 0: enabled 1

 1012 17:35:33.774942  GENERIC: 0.0: enabled 1

 1013 17:35:33.775412  I2C: 00:1a: enabled 1

 1014 17:35:33.778032  I2C: 00:31: enabled 1

 1015 17:35:33.781703  I2C: 00:32: enabled 1

 1016 17:35:33.784755  I2C: 00:50: enabled 1

 1017 17:35:33.785178  I2C: 00:10: enabled 1

 1018 17:35:33.788302  I2C: 00:15: enabled 1

 1019 17:35:33.791885  I2C: 00:2c: enabled 1

 1020 17:35:33.792411  GENERIC: 0.0: enabled 1

 1021 17:35:33.794667  SPI: 00: enabled 1

 1022 17:35:33.798033  PNP: 0c09.0: enabled 1

 1023 17:35:33.798558  GENERIC: 0.0: enabled 1

 1024 17:35:33.801347  USB3 port 0: enabled 1

 1025 17:35:33.805003  USB3 port 1: enabled 0

 1026 17:35:33.805517  USB3 port 2: enabled 1

 1027 17:35:33.808057  USB3 port 3: enabled 0

 1028 17:35:33.811129  USB2 port 0: enabled 1

 1029 17:35:33.814974  USB2 port 1: enabled 0

 1030 17:35:33.815571  USB2 port 2: enabled 1

 1031 17:35:33.818116  USB2 port 3: enabled 0

 1032 17:35:33.821380  USB2 port 4: enabled 0

 1033 17:35:33.821898  USB2 port 5: enabled 1

 1034 17:35:33.824693  USB2 port 6: enabled 0

 1035 17:35:33.827869  USB2 port 7: enabled 0

 1036 17:35:33.831641  USB2 port 8: enabled 1

 1037 17:35:33.832160  USB2 port 9: enabled 1

 1038 17:35:33.834962  USB3 port 0: enabled 1

 1039 17:35:33.837802  USB3 port 1: enabled 0

 1040 17:35:33.838363  USB3 port 2: enabled 0

 1041 17:35:33.841503  USB3 port 3: enabled 0

 1042 17:35:33.844506  GENERIC: 0.0: enabled 1

 1043 17:35:33.848279  GENERIC: 1.0: enabled 1

 1044 17:35:33.848760  APIC: 00: enabled 1

 1045 17:35:33.851155  APIC: 16: enabled 1

 1046 17:35:33.851758  APIC: 10: enabled 1

 1047 17:35:33.854758  APIC: 12: enabled 1

 1048 17:35:33.857986  APIC: 14: enabled 1

 1049 17:35:33.858507  APIC: 09: enabled 1

 1050 17:35:33.861086  APIC: 01: enabled 1

 1051 17:35:33.861499  APIC: 08: enabled 1

 1052 17:35:33.864449  Compare with tree...

 1053 17:35:33.867550  Root Device: enabled 1

 1054 17:35:33.871471   CPU_CLUSTER: 0: enabled 1

 1055 17:35:33.871989    APIC: 00: enabled 1

 1056 17:35:33.874278    APIC: 16: enabled 1

 1057 17:35:33.877734    APIC: 10: enabled 1

 1058 17:35:33.878252    APIC: 12: enabled 1

 1059 17:35:33.881463    APIC: 14: enabled 1

 1060 17:35:33.884817    APIC: 09: enabled 1

 1061 17:35:33.885292    APIC: 01: enabled 1

 1062 17:35:33.887313    APIC: 08: enabled 1

 1063 17:35:33.891768   DOMAIN: 0000: enabled 1

 1064 17:35:33.892283    GPIO: 0: enabled 1

 1065 17:35:33.894526    PCI: 00:00.0: enabled 1

 1066 17:35:33.897864    PCI: 00:01.0: enabled 0

 1067 17:35:33.900593    PCI: 00:01.1: enabled 0

 1068 17:35:33.903767    PCI: 00:02.0: enabled 1

 1069 17:35:33.904191    PCI: 00:04.0: enabled 1

 1070 17:35:33.907794     GENERIC: 0.0: enabled 1

 1071 17:35:33.911142    PCI: 00:05.0: enabled 0

 1072 17:35:33.914507    PCI: 00:06.0: enabled 1

 1073 17:35:33.917701    PCI: 00:06.2: enabled 0

 1074 17:35:33.918221    PCI: 00:08.0: enabled 0

 1075 17:35:33.920834    PCI: 00:09.0: enabled 0

 1076 17:35:33.924037    PCI: 00:0a.0: enabled 1

 1077 17:35:33.927758    PCI: 00:0d.0: enabled 1

 1078 17:35:33.931377     USB0 port 0: enabled 1

 1079 17:35:33.931900      USB3 port 0: enabled 1

 1080 17:35:33.934254      USB3 port 1: enabled 0

 1081 17:35:33.937738      USB3 port 2: enabled 1

 1082 17:35:33.940992      USB3 port 3: enabled 0

 1083 17:35:33.944069    PCI: 00:0d.1: enabled 0

 1084 17:35:33.947461    PCI: 00:0d.2: enabled 0

 1085 17:35:33.947878    PCI: 00:0d.3: enabled 0

 1086 17:35:33.951295    PCI: 00:0e.0: enabled 0

 1087 17:35:33.954023    PCI: 00:10.0: enabled 0

 1088 17:35:33.957557    PCI: 00:10.1: enabled 0

 1089 17:35:33.958084    PCI: 00:10.6: enabled 0

 1090 17:35:33.961073    PCI: 00:10.7: enabled 0

 1091 17:35:33.964293    PCI: 00:12.0: enabled 0

 1092 17:35:33.967194    PCI: 00:12.6: enabled 0

 1093 17:35:33.970863    PCI: 00:12.7: enabled 0

 1094 17:35:33.971475    PCI: 00:13.0: enabled 0

 1095 17:35:33.974375    PCI: 00:14.0: enabled 1

 1096 17:35:33.977505     USB0 port 0: enabled 1

 1097 17:35:33.980587      USB2 port 0: enabled 1

 1098 17:35:33.984280      USB2 port 1: enabled 0

 1099 17:35:33.984846      USB2 port 2: enabled 1

 1100 17:35:33.987646      USB2 port 3: enabled 0

 1101 17:35:33.991139      USB2 port 4: enabled 0

 1102 17:35:33.994268      USB2 port 5: enabled 1

 1103 17:35:33.997389      USB2 port 6: enabled 0

 1104 17:35:34.000836      USB2 port 7: enabled 0

 1105 17:35:34.001475      USB2 port 8: enabled 1

 1106 17:35:34.003879      USB2 port 9: enabled 1

 1107 17:35:34.007919      USB3 port 0: enabled 1

 1108 17:35:34.010518      USB3 port 1: enabled 0

 1109 17:35:34.014795      USB3 port 2: enabled 0

 1110 17:35:34.017530      USB3 port 3: enabled 0

 1111 17:35:34.018092    PCI: 00:14.1: enabled 0

 1112 17:35:34.020744    PCI: 00:14.2: enabled 1

 1113 17:35:34.023832    PCI: 00:14.3: enabled 1

 1114 17:35:34.027252     GENERIC: 0.0: enabled 1

 1115 17:35:34.030695    PCI: 00:15.0: enabled 1

 1116 17:35:34.031214     I2C: 00:1a: enabled 1

 1117 17:35:34.034306     I2C: 00:31: enabled 1

 1118 17:35:34.037820     I2C: 00:32: enabled 1

 1119 17:35:34.040781    PCI: 00:15.1: enabled 1

 1120 17:35:34.041201     I2C: 00:50: enabled 1

 1121 17:35:34.043842    PCI: 00:15.2: enabled 0

 1122 17:35:34.047215    PCI: 00:15.3: enabled 1

 1123 17:35:34.051072     I2C: 00:10: enabled 1

 1124 17:35:34.054398    PCI: 00:16.0: enabled 1

 1125 17:35:34.054920    PCI: 00:16.1: enabled 0

 1126 17:35:34.057248    PCI: 00:16.2: enabled 0

 1127 17:35:34.060477    PCI: 00:16.3: enabled 0

 1128 17:35:34.064051    PCI: 00:16.4: enabled 0

 1129 17:35:34.064570    PCI: 00:16.5: enabled 0

 1130 17:35:34.067206    PCI: 00:17.0: enabled 1

 1131 17:35:34.071212    PCI: 00:19.0: enabled 0

 1132 17:35:34.073545    PCI: 00:19.1: enabled 1

 1133 17:35:34.077193     I2C: 00:15: enabled 1

 1134 17:35:34.077711     I2C: 00:2c: enabled 1

 1135 17:35:34.080669    PCI: 00:19.2: enabled 0

 1136 17:35:34.084319    PCI: 00:1a.0: enabled 0

 1137 17:35:34.087736    PCI: 00:1e.0: enabled 1

 1138 17:35:34.091011    PCI: 00:1e.1: enabled 0

 1139 17:35:34.091568    PCI: 00:1e.2: enabled 0

 1140 17:35:34.093928    PCI: 00:1e.3: enabled 1

 1141 17:35:34.097096     SPI: 00: enabled 1

 1142 17:35:34.100572    PCI: 00:1f.0: enabled 1

 1143 17:35:34.101085     PNP: 0c09.0: enabled 1

 1144 17:35:34.103767    PCI: 00:1f.1: enabled 0

 1145 17:35:34.107045    PCI: 00:1f.2: enabled 1

 1146 17:35:34.109999     GENERIC: 0.0: enabled 1

 1147 17:35:34.113724      GENERIC: 0.0: enabled 1

 1148 17:35:34.117120      GENERIC: 1.0: enabled 1

 1149 17:35:34.117665    PCI: 00:1f.3: enabled 1

 1150 17:35:34.120542    PCI: 00:1f.4: enabled 0

 1151 17:35:34.123969    PCI: 00:1f.5: enabled 1

 1152 17:35:34.127110    PCI: 00:1f.6: enabled 0

 1153 17:35:34.130475    PCI: 00:1f.7: enabled 0

 1154 17:35:34.130984  Root Device scanning...

 1155 17:35:34.134087  scan_static_bus for Root Device

 1156 17:35:34.136943  CPU_CLUSTER: 0 enabled

 1157 17:35:34.140513  DOMAIN: 0000 enabled

 1158 17:35:34.141034  DOMAIN: 0000 scanning...

 1159 17:35:34.143898  PCI: pci_scan_bus for bus 00

 1160 17:35:34.146923  PCI: 00:00.0 [8086/0000] ops

 1161 17:35:34.150232  PCI: 00:00.0 [8086/4609] enabled

 1162 17:35:34.153471  PCI: 00:02.0 [8086/0000] bus ops

 1163 17:35:34.157237  PCI: 00:02.0 [8086/46b3] enabled

 1164 17:35:34.159992  PCI: 00:04.0 [8086/0000] bus ops

 1165 17:35:34.163451  PCI: 00:04.0 [8086/461d] enabled

 1166 17:35:34.166586  PCI: 00:06.0 [8086/0000] bus ops

 1167 17:35:34.170284  PCI: 00:06.0 [8086/464d] enabled

 1168 17:35:34.173753  PCI: 00:08.0 [8086/464f] disabled

 1169 17:35:34.177391  PCI: 00:0a.0 [8086/467d] enabled

 1170 17:35:34.180320  PCI: 00:0d.0 [8086/0000] bus ops

 1171 17:35:34.183812  PCI: 00:0d.0 [8086/461e] enabled

 1172 17:35:34.186999  PCI: 00:14.0 [8086/0000] bus ops

 1173 17:35:34.190388  PCI: 00:14.0 [8086/51ed] enabled

 1174 17:35:34.193799  PCI: 00:14.2 [8086/51ef] enabled

 1175 17:35:34.197129  PCI: 00:14.3 [8086/0000] bus ops

 1176 17:35:34.199938  PCI: 00:14.3 [8086/51f0] enabled

 1177 17:35:34.203512  PCI: 00:15.0 [8086/0000] bus ops

 1178 17:35:34.207003  PCI: 00:15.0 [8086/51e8] enabled

 1179 17:35:34.209858  PCI: 00:15.1 [8086/0000] bus ops

 1180 17:35:34.213578  PCI: 00:15.1 [8086/51e9] enabled

 1181 17:35:34.217005  PCI: 00:15.2 [8086/0000] bus ops

 1182 17:35:34.219815  PCI: 00:15.2 [8086/51ea] disabled

 1183 17:35:34.223574  PCI: 00:15.3 [8086/0000] bus ops

 1184 17:35:34.226463  PCI: 00:15.3 [8086/51eb] enabled

 1185 17:35:34.230158  PCI: 00:16.0 [8086/0000] ops

 1186 17:35:34.233268  PCI: 00:16.0 [8086/51e0] enabled

 1187 17:35:34.240398  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1188 17:35:34.243427  PCI: 00:19.0 [8086/0000] bus ops

 1189 17:35:34.247119  PCI: 00:19.0 [8086/51c5] disabled

 1190 17:35:34.250287  PCI: 00:19.1 [8086/0000] bus ops

 1191 17:35:34.253726  PCI: 00:19.1 [8086/51c6] enabled

 1192 17:35:34.257329  PCI: 00:1e.0 [8086/0000] ops

 1193 17:35:34.260373  PCI: 00:1e.0 [8086/51a8] enabled

 1194 17:35:34.263691  PCI: 00:1e.3 [8086/0000] bus ops

 1195 17:35:34.267115  PCI: 00:1e.3 [8086/51ab] enabled

 1196 17:35:34.270325  PCI: 00:1f.0 [8086/0000] bus ops

 1197 17:35:34.273480  PCI: 00:1f.0 [8086/5182] enabled

 1198 17:35:34.279566  RTC Init

 1199 17:35:34.280030  Set power on after power failure.

 1200 17:35:34.280114  Disabling Deep S3

 1201 17:35:34.282920  Disabling Deep S3

 1202 17:35:34.283002  Disabling Deep S4

 1203 17:35:34.286446  Disabling Deep S4

 1204 17:35:34.289963  Disabling Deep S5

 1205 17:35:34.290127  Disabling Deep S5

 1206 17:35:34.293524  PCI: 00:1f.2 [0000/0000] hidden

 1207 17:35:34.296852  PCI: 00:1f.3 [8086/0000] bus ops

 1208 17:35:34.299797  PCI: 00:1f.3 [8086/51c8] enabled

 1209 17:35:34.303629  PCI: 00:1f.5 [8086/0000] bus ops

 1210 17:35:34.306515  PCI: 00:1f.5 [8086/51a4] enabled

 1211 17:35:34.309894  GPIO: 0 enabled

 1212 17:35:34.313332  PCI: Leftover static devices:

 1213 17:35:34.313548  PCI: 00:01.0

 1214 17:35:34.313669  PCI: 00:01.1

 1215 17:35:34.317317  PCI: 00:05.0

 1216 17:35:34.317552  PCI: 00:06.2

 1217 17:35:34.319563  PCI: 00:09.0

 1218 17:35:34.319753  PCI: 00:0d.1

 1219 17:35:34.319891  PCI: 00:0d.2

 1220 17:35:34.323136  PCI: 00:0d.3

 1221 17:35:34.323410  PCI: 00:0e.0

 1222 17:35:34.326300  PCI: 00:10.0

 1223 17:35:34.326568  PCI: 00:10.1

 1224 17:35:34.330210  PCI: 00:10.6

 1225 17:35:34.330499  PCI: 00:10.7

 1226 17:35:34.330698  PCI: 00:12.0

 1227 17:35:34.333232  PCI: 00:12.6

 1228 17:35:34.333472  PCI: 00:12.7

 1229 17:35:34.337195  PCI: 00:13.0

 1230 17:35:34.337585  PCI: 00:14.1

 1231 17:35:34.337829  PCI: 00:16.1

 1232 17:35:34.339742  PCI: 00:16.2

 1233 17:35:34.340040  PCI: 00:16.3

 1234 17:35:34.343136  PCI: 00:16.4

 1235 17:35:34.343566  PCI: 00:16.5

 1236 17:35:34.346520  PCI: 00:17.0

 1237 17:35:34.347035  PCI: 00:19.2

 1238 17:35:34.347526  PCI: 00:1a.0

 1239 17:35:34.349928  PCI: 00:1e.1

 1240 17:35:34.350446  PCI: 00:1e.2

 1241 17:35:34.353570  PCI: 00:1f.1

 1242 17:35:34.354110  PCI: 00:1f.4

 1243 17:35:34.354450  PCI: 00:1f.6

 1244 17:35:34.356675  PCI: 00:1f.7

 1245 17:35:34.360448  PCI: Check your devicetree.cb.

 1246 17:35:34.362968  PCI: 00:02.0 scanning...

 1247 17:35:34.366245  scan_generic_bus for PCI: 00:02.0

 1248 17:35:34.370026  scan_generic_bus for PCI: 00:02.0 done

 1249 17:35:34.373226  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1250 17:35:34.376893  PCI: 00:04.0 scanning...

 1251 17:35:34.380105  scan_generic_bus for PCI: 00:04.0

 1252 17:35:34.382997  GENERIC: 0.0 enabled

 1253 17:35:34.386607  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1254 17:35:34.392744  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1255 17:35:34.396226  PCI: 00:06.0 scanning...

 1256 17:35:34.399823  do_pci_scan_bridge for PCI: 00:06.0

 1257 17:35:34.403155  PCI: pci_scan_bus for bus 01

 1258 17:35:34.406482  PCI: 01:00.0 [15b7/5009] enabled

 1259 17:35:34.409606  Enabling Common Clock Configuration

 1260 17:35:34.413062  L1 Sub-State supported from root port 6

 1261 17:35:34.415897  L1 Sub-State Support = 0x5

 1262 17:35:34.419608  CommonModeRestoreTime = 0x6e

 1263 17:35:34.422860  Power On Value = 0x5, Power On Scale = 0x2

 1264 17:35:34.423413  ASPM: Enabled L1

 1265 17:35:34.430102  PCIe: Max_Payload_Size adjusted to 256

 1266 17:35:34.430623  PCI: 01:00.0: Enabled LTR

 1267 17:35:34.436183  PCI: 01:00.0: Programmed LTR max latencies

 1268 17:35:34.439308  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1269 17:35:34.442918  PCI: 00:0d.0 scanning...

 1270 17:35:34.446446  scan_static_bus for PCI: 00:0d.0

 1271 17:35:34.449676  USB0 port 0 enabled

 1272 17:35:34.450269  USB0 port 0 scanning...

 1273 17:35:34.452684  scan_static_bus for USB0 port 0

 1274 17:35:34.456145  USB3 port 0 enabled

 1275 17:35:34.459233  USB3 port 1 disabled

 1276 17:35:34.459690  USB3 port 2 enabled

 1277 17:35:34.462465  USB3 port 3 disabled

 1278 17:35:34.465991  USB3 port 0 scanning...

 1279 17:35:34.469586  scan_static_bus for USB3 port 0

 1280 17:35:34.473057  scan_static_bus for USB3 port 0 done

 1281 17:35:34.475761  scan_bus: bus USB3 port 0 finished in 6 msecs

 1282 17:35:34.479411  USB3 port 2 scanning...

 1283 17:35:34.482547  scan_static_bus for USB3 port 2

 1284 17:35:34.486253  scan_static_bus for USB3 port 2 done

 1285 17:35:34.489688  scan_bus: bus USB3 port 2 finished in 6 msecs

 1286 17:35:34.492660  scan_static_bus for USB0 port 0 done

 1287 17:35:34.499191  scan_bus: bus USB0 port 0 finished in 43 msecs

 1288 17:35:34.502464  scan_static_bus for PCI: 00:0d.0 done

 1289 17:35:34.506424  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1290 17:35:34.509138  PCI: 00:14.0 scanning...

 1291 17:35:34.512294  scan_static_bus for PCI: 00:14.0

 1292 17:35:34.516323  USB0 port 0 enabled

 1293 17:35:34.516877  USB0 port 0 scanning...

 1294 17:35:34.518735  scan_static_bus for USB0 port 0

 1295 17:35:34.522747  USB2 port 0 enabled

 1296 17:35:34.526196  USB2 port 1 disabled

 1297 17:35:34.526792  USB2 port 2 enabled

 1298 17:35:34.529433  USB2 port 3 disabled

 1299 17:35:34.532658  USB2 port 4 disabled

 1300 17:35:34.533117  USB2 port 5 enabled

 1301 17:35:34.535473  USB2 port 6 disabled

 1302 17:35:34.539417  USB2 port 7 disabled

 1303 17:35:34.539937  USB2 port 8 enabled

 1304 17:35:34.542349  USB2 port 9 enabled

 1305 17:35:34.542868  USB3 port 0 enabled

 1306 17:35:34.545637  USB3 port 1 disabled

 1307 17:35:34.549352  USB3 port 2 disabled

 1308 17:35:34.549869  USB3 port 3 disabled

 1309 17:35:34.552412  USB2 port 0 scanning...

 1310 17:35:34.555807  scan_static_bus for USB2 port 0

 1311 17:35:34.559077  scan_static_bus for USB2 port 0 done

 1312 17:35:34.565895  scan_bus: bus USB2 port 0 finished in 6 msecs

 1313 17:35:34.566401  USB2 port 2 scanning...

 1314 17:35:34.568926  scan_static_bus for USB2 port 2

 1315 17:35:34.572562  scan_static_bus for USB2 port 2 done

 1316 17:35:34.579009  scan_bus: bus USB2 port 2 finished in 6 msecs

 1317 17:35:34.579566  USB2 port 5 scanning...

 1318 17:35:34.582293  scan_static_bus for USB2 port 5

 1319 17:35:34.589213  scan_static_bus for USB2 port 5 done

 1320 17:35:34.593223  scan_bus: bus USB2 port 5 finished in 6 msecs

 1321 17:35:34.595781  USB2 port 8 scanning...

 1322 17:35:34.599129  scan_static_bus for USB2 port 8

 1323 17:35:34.602413  scan_static_bus for USB2 port 8 done

 1324 17:35:34.605727  scan_bus: bus USB2 port 8 finished in 6 msecs

 1325 17:35:34.609301  USB2 port 9 scanning...

 1326 17:35:34.612934  scan_static_bus for USB2 port 9

 1327 17:35:34.615730  scan_static_bus for USB2 port 9 done

 1328 17:35:34.619171  scan_bus: bus USB2 port 9 finished in 6 msecs

 1329 17:35:34.622982  USB3 port 0 scanning...

 1330 17:35:34.625579  scan_static_bus for USB3 port 0

 1331 17:35:34.628543  scan_static_bus for USB3 port 0 done

 1332 17:35:34.632210  scan_bus: bus USB3 port 0 finished in 6 msecs

 1333 17:35:34.639111  scan_static_bus for USB0 port 0 done

 1334 17:35:34.642317  scan_bus: bus USB0 port 0 finished in 120 msecs

 1335 17:35:34.646110  scan_static_bus for PCI: 00:14.0 done

 1336 17:35:34.652064  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1337 17:35:34.652528  PCI: 00:14.3 scanning...

 1338 17:35:34.655705  scan_static_bus for PCI: 00:14.3

 1339 17:35:34.658915  GENERIC: 0.0 enabled

 1340 17:35:34.661893  scan_static_bus for PCI: 00:14.3 done

 1341 17:35:34.668535  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1342 17:35:34.668979  PCI: 00:15.0 scanning...

 1343 17:35:34.672216  scan_static_bus for PCI: 00:15.0

 1344 17:35:34.675592  I2C: 00:1a enabled

 1345 17:35:34.678681  I2C: 00:31 enabled

 1346 17:35:34.679096  I2C: 00:32 enabled

 1347 17:35:34.682542  scan_static_bus for PCI: 00:15.0 done

 1348 17:35:34.688933  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1349 17:35:34.692341  PCI: 00:15.1 scanning...

 1350 17:35:34.695768  scan_static_bus for PCI: 00:15.1

 1351 17:35:34.696287  I2C: 00:50 enabled

 1352 17:35:34.698877  scan_static_bus for PCI: 00:15.1 done

 1353 17:35:34.705706  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1354 17:35:34.706234  PCI: 00:15.3 scanning...

 1355 17:35:34.709133  scan_static_bus for PCI: 00:15.3

 1356 17:35:34.711927  I2C: 00:10 enabled

 1357 17:35:34.715646  scan_static_bus for PCI: 00:15.3 done

 1358 17:35:34.722194  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1359 17:35:34.722758  PCI: 00:19.1 scanning...

 1360 17:35:34.725468  scan_static_bus for PCI: 00:19.1

 1361 17:35:34.728344  I2C: 00:15 enabled

 1362 17:35:34.732153  I2C: 00:2c enabled

 1363 17:35:34.735604  scan_static_bus for PCI: 00:19.1 done

 1364 17:35:34.738576  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1365 17:35:34.742391  PCI: 00:1e.3 scanning...

 1366 17:35:34.745537  scan_generic_bus for PCI: 00:1e.3

 1367 17:35:34.745995  SPI: 00 enabled

 1368 17:35:34.752111  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1369 17:35:34.758880  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1370 17:35:34.759423  PCI: 00:1f.0 scanning...

 1371 17:35:34.761688  scan_static_bus for PCI: 00:1f.0

 1372 17:35:34.765140  PNP: 0c09.0 enabled

 1373 17:35:34.768354  PNP: 0c09.0 scanning...

 1374 17:35:34.771813  scan_static_bus for PNP: 0c09.0

 1375 17:35:34.775299  scan_static_bus for PNP: 0c09.0 done

 1376 17:35:34.778719  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1377 17:35:34.781985  scan_static_bus for PCI: 00:1f.0 done

 1378 17:35:34.788682  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1379 17:35:34.792144  PCI: 00:1f.2 scanning...

 1380 17:35:34.796008  scan_static_bus for PCI: 00:1f.2

 1381 17:35:34.796565  GENERIC: 0.0 enabled

 1382 17:35:34.798428  GENERIC: 0.0 scanning...

 1383 17:35:34.802191  scan_static_bus for GENERIC: 0.0

 1384 17:35:34.805201  GENERIC: 0.0 enabled

 1385 17:35:34.805760  GENERIC: 1.0 enabled

 1386 17:35:34.808867  scan_static_bus for GENERIC: 0.0 done

 1387 17:35:34.815208  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1388 17:35:34.818548  scan_static_bus for PCI: 00:1f.2 done

 1389 17:35:34.822012  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1390 17:35:34.825404  PCI: 00:1f.3 scanning...

 1391 17:35:34.828071  scan_static_bus for PCI: 00:1f.3

 1392 17:35:34.832112  scan_static_bus for PCI: 00:1f.3 done

 1393 17:35:34.838342  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1394 17:35:34.841806  PCI: 00:1f.5 scanning...

 1395 17:35:34.844817  scan_generic_bus for PCI: 00:1f.5

 1396 17:35:34.848770  scan_generic_bus for PCI: 00:1f.5 done

 1397 17:35:34.851762  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1398 17:35:34.858295  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1399 17:35:34.862020  scan_static_bus for Root Device done

 1400 17:35:34.864923  scan_bus: bus Root Device finished in 729 msecs

 1401 17:35:34.865396  done

 1402 17:35:34.871522  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1403 17:35:34.878384  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1404 17:35:34.884931  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1405 17:35:34.888240  SPI flash protection: WPSW=1 SRP0=0

 1406 17:35:34.891407  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1407 17:35:34.898596  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1408 17:35:34.901745  found VGA at PCI: 00:02.0

 1409 17:35:34.904966  Setting up VGA for PCI: 00:02.0

 1410 17:35:34.908148  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1411 17:35:34.915054  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1412 17:35:34.918709  Allocating resources...

 1413 17:35:34.919266  Reading resources...

 1414 17:35:34.921737  Root Device read_resources bus 0 link: 0

 1415 17:35:34.928912  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1416 17:35:34.931887  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1417 17:35:34.934905  DOMAIN: 0000 read_resources bus 0 link: 0

 1418 17:35:34.941572  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1419 17:35:34.948602  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1420 17:35:34.955096  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1421 17:35:34.961338  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1422 17:35:34.968623  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1423 17:35:34.974955  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1424 17:35:34.981776  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1425 17:35:34.988129  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1426 17:35:34.991900  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1427 17:35:35.001872  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1428 17:35:35.004895  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1429 17:35:35.011845  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1430 17:35:35.017996  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1431 17:35:35.024554  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1432 17:35:35.031443  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1433 17:35:35.038402  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1434 17:35:35.044473  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1435 17:35:35.050967  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1436 17:35:35.058211  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1437 17:35:35.061512  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1438 17:35:35.067520  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1439 17:35:35.074557  PCI: 00:04.0 read_resources bus 1 link: 0

 1440 17:35:35.077929  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1441 17:35:35.081219  PCI: 00:06.0 read_resources bus 1 link: 0

 1442 17:35:35.088189  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1443 17:35:35.091424  PCI: 00:0d.0 read_resources bus 0 link: 0

 1444 17:35:35.094522  USB0 port 0 read_resources bus 0 link: 0

 1445 17:35:35.101300  USB0 port 0 read_resources bus 0 link: 0 done

 1446 17:35:35.104567  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1447 17:35:35.108030  PCI: 00:14.0 read_resources bus 0 link: 0

 1448 17:35:35.114267  USB0 port 0 read_resources bus 0 link: 0

 1449 17:35:35.117616  USB0 port 0 read_resources bus 0 link: 0 done

 1450 17:35:35.120767  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1451 17:35:35.127814  PCI: 00:14.3 read_resources bus 0 link: 0

 1452 17:35:35.131057  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1453 17:35:35.134528  PCI: 00:15.0 read_resources bus 0 link: 0

 1454 17:35:35.140998  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1455 17:35:35.144150  PCI: 00:15.1 read_resources bus 0 link: 0

 1456 17:35:35.148013  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1457 17:35:35.154577  PCI: 00:15.3 read_resources bus 0 link: 0

 1458 17:35:35.157986  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1459 17:35:35.161468  PCI: 00:19.1 read_resources bus 0 link: 0

 1460 17:35:35.167867  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1461 17:35:35.171303  PCI: 00:1e.3 read_resources bus 2 link: 0

 1462 17:35:35.177812  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1463 17:35:35.181274  PCI: 00:1f.0 read_resources bus 0 link: 0

 1464 17:35:35.184581  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1465 17:35:35.191268  PCI: 00:1f.2 read_resources bus 0 link: 0

 1466 17:35:35.194241  GENERIC: 0.0 read_resources bus 0 link: 0

 1467 17:35:35.197816  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1468 17:35:35.204529  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1469 17:35:35.207820  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1470 17:35:35.214632  Root Device read_resources bus 0 link: 0 done

 1471 17:35:35.215190  Done reading resources.

 1472 17:35:35.220870  Show resources in subtree (Root Device)...After reading.

 1473 17:35:35.224478   Root Device child on link 0 CPU_CLUSTER: 0

 1474 17:35:35.230830    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1475 17:35:35.231408     APIC: 00

 1476 17:35:35.231781     APIC: 16

 1477 17:35:35.234228     APIC: 10

 1478 17:35:35.234788     APIC: 12

 1479 17:35:35.237486     APIC: 14

 1480 17:35:35.237896     APIC: 09

 1481 17:35:35.238287     APIC: 01

 1482 17:35:35.241018     APIC: 08

 1483 17:35:35.244153    DOMAIN: 0000 child on link 0 GPIO: 0

 1484 17:35:35.254375    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1485 17:35:35.263950    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1486 17:35:35.264453     GPIO: 0

 1487 17:35:35.267435     PCI: 00:00.0

 1488 17:35:35.274413     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1489 17:35:35.283972     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1490 17:35:35.294030     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1491 17:35:35.304196     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1492 17:35:35.314113     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1493 17:35:35.324192     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1494 17:35:35.330417     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1495 17:35:35.340205     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1496 17:35:35.350784     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1497 17:35:35.360043     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1498 17:35:35.370201     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1499 17:35:35.380166     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1500 17:35:35.387084     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1501 17:35:35.396580     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1502 17:35:35.406716     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1503 17:35:35.416629     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1504 17:35:35.426637     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1505 17:35:35.436648     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1506 17:35:35.446508     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1507 17:35:35.456791     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1508 17:35:35.463252     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1509 17:35:35.473632     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1510 17:35:35.483555     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1511 17:35:35.493250     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1512 17:35:35.503562     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1513 17:35:35.513085     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1514 17:35:35.523241     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1515 17:35:35.532579     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1516 17:35:35.533289     PCI: 00:02.0

 1517 17:35:35.543149     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1518 17:35:35.552941     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1519 17:35:35.562195     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1520 17:35:35.565572     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1521 17:35:35.576332     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1522 17:35:35.579460      GENERIC: 0.0

 1523 17:35:35.583133     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1524 17:35:35.592697     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1525 17:35:35.602111     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1526 17:35:35.608664     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1527 17:35:35.612151      PCI: 01:00.0

 1528 17:35:35.622256      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1529 17:35:35.632285      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1530 17:35:35.632828     PCI: 00:08.0

 1531 17:35:35.635555     PCI: 00:0a.0

 1532 17:35:35.645112     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1533 17:35:35.648790     PCI: 00:0d.0 child on link 0 USB0 port 0

 1534 17:35:35.658815     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1535 17:35:35.665146      USB0 port 0 child on link 0 USB3 port 0

 1536 17:35:35.665677       USB3 port 0

 1537 17:35:35.669035       USB3 port 1

 1538 17:35:35.669462       USB3 port 2

 1539 17:35:35.671632       USB3 port 3

 1540 17:35:35.675102     PCI: 00:14.0 child on link 0 USB0 port 0

 1541 17:35:35.685099     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1542 17:35:35.688435      USB0 port 0 child on link 0 USB2 port 0

 1543 17:35:35.691721       USB2 port 0

 1544 17:35:35.694801       USB2 port 1

 1545 17:35:35.695219       USB2 port 2

 1546 17:35:35.698264       USB2 port 3

 1547 17:35:35.698680       USB2 port 4

 1548 17:35:35.701644       USB2 port 5

 1549 17:35:35.702058       USB2 port 6

 1550 17:35:35.704908       USB2 port 7

 1551 17:35:35.705428       USB2 port 8

 1552 17:35:35.708217       USB2 port 9

 1553 17:35:35.708733       USB3 port 0

 1554 17:35:35.711798       USB3 port 1

 1555 17:35:35.712389       USB3 port 2

 1556 17:35:35.714946       USB3 port 3

 1557 17:35:35.715628     PCI: 00:14.2

 1558 17:35:35.725456     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1559 17:35:35.734805     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1560 17:35:35.741768     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1561 17:35:35.751831     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1562 17:35:35.752249      GENERIC: 0.0

 1563 17:35:35.755270     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1564 17:35:35.764846     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1565 17:35:35.768318      I2C: 00:1a

 1566 17:35:35.768836      I2C: 00:31

 1567 17:35:35.771841      I2C: 00:32

 1568 17:35:35.775011     PCI: 00:15.1 child on link 0 I2C: 00:50

 1569 17:35:35.785099     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1570 17:35:35.788695      I2C: 00:50

 1571 17:35:35.789229     PCI: 00:15.2

 1572 17:35:35.791827     PCI: 00:15.3 child on link 0 I2C: 00:10

 1573 17:35:35.802253     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1574 17:35:35.804981      I2C: 00:10

 1575 17:35:35.805394     PCI: 00:16.0

 1576 17:35:35.815313     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1577 17:35:35.818725     PCI: 00:19.0

 1578 17:35:35.821906     PCI: 00:19.1 child on link 0 I2C: 00:15

 1579 17:35:35.832082     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1580 17:35:35.835212      I2C: 00:15

 1581 17:35:35.835675      I2C: 00:2c

 1582 17:35:35.839049     PCI: 00:1e.0

 1583 17:35:35.848555     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1584 17:35:35.852160     PCI: 00:1e.3 child on link 0 SPI: 00

 1585 17:35:35.862198     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1586 17:35:35.862760      SPI: 00

 1587 17:35:35.868798     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1588 17:35:35.875156     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1589 17:35:35.878743      PNP: 0c09.0

 1590 17:35:35.888515      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1591 17:35:35.891608     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1592 17:35:35.902186     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1593 17:35:35.911295     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1594 17:35:35.914926      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1595 17:35:35.915532       GENERIC: 0.0

 1596 17:35:35.918292       GENERIC: 1.0

 1597 17:35:35.921713     PCI: 00:1f.3

 1598 17:35:35.931448     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1599 17:35:35.941611     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1600 17:35:35.942133     PCI: 00:1f.5

 1601 17:35:35.951882     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1602 17:35:35.958535  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1603 17:35:35.965068   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1604 17:35:35.971442   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1605 17:35:35.974994   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1606 17:35:35.981296    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1607 17:35:35.984884    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1608 17:35:35.991620   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1609 17:35:35.998521   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1610 17:35:36.008123   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1611 17:35:36.014574  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1612 17:35:36.021418  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1613 17:35:36.028312   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1614 17:35:36.034533   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1615 17:35:36.044866   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1616 17:35:36.045524   DOMAIN: 0000: Resource ranges:

 1617 17:35:36.051865   * Base: 1000, Size: 800, Tag: 100

 1618 17:35:36.054452   * Base: 1900, Size: e700, Tag: 100

 1619 17:35:36.058297    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1620 17:35:36.064500  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1621 17:35:36.071314  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1622 17:35:36.081732   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1623 17:35:36.088186   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1624 17:35:36.094643   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1625 17:35:36.101422   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1626 17:35:36.111628   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1627 17:35:36.117905   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1628 17:35:36.124366   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1629 17:35:36.134303   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1630 17:35:36.141399   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1631 17:35:36.147853   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1632 17:35:36.158146   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1633 17:35:36.163924   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1634 17:35:36.171090   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1635 17:35:36.181542   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1636 17:35:36.187679   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1637 17:35:36.194424   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1638 17:35:36.203991   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1639 17:35:36.211066   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1640 17:35:36.217169   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1641 17:35:36.227539   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1642 17:35:36.234404   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1643 17:35:36.241045   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1644 17:35:36.250619   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1645 17:35:36.257183   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1646 17:35:36.263688   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1647 17:35:36.273707   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1648 17:35:36.280534   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1649 17:35:36.287779   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1650 17:35:36.297241   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1651 17:35:36.303607   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1652 17:35:36.307248   DOMAIN: 0000: Resource ranges:

 1653 17:35:36.310905   * Base: 80400000, Size: 3fc00000, Tag: 200

 1654 17:35:36.317038   * Base: d0000000, Size: 28000000, Tag: 200

 1655 17:35:36.320278   * Base: fa000000, Size: 1000000, Tag: 200

 1656 17:35:36.323457   * Base: fb001000, Size: 17ff000, Tag: 200

 1657 17:35:36.327118   * Base: fe800000, Size: 300000, Tag: 200

 1658 17:35:36.333717   * Base: feb80000, Size: 80000, Tag: 200

 1659 17:35:36.336924   * Base: fed00000, Size: 40000, Tag: 200

 1660 17:35:36.340376   * Base: fed70000, Size: 10000, Tag: 200

 1661 17:35:36.343727   * Base: fed88000, Size: 8000, Tag: 200

 1662 17:35:36.349921   * Base: fed93000, Size: d000, Tag: 200

 1663 17:35:36.353431   * Base: feda2000, Size: 1e000, Tag: 200

 1664 17:35:36.356945   * Base: fede0000, Size: 1220000, Tag: 200

 1665 17:35:36.363934   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1666 17:35:36.370224    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1667 17:35:36.376940    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1668 17:35:36.383999    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1669 17:35:36.390205    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1670 17:35:36.396679    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1671 17:35:36.403898    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1672 17:35:36.410127    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1673 17:35:36.416776    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1674 17:35:36.423471    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1675 17:35:36.429851    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1676 17:35:36.436455    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1677 17:35:36.443279    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1678 17:35:36.449589    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1679 17:35:36.456235    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1680 17:35:36.463101    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1681 17:35:36.469724    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1682 17:35:36.476115    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1683 17:35:36.482943    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1684 17:35:36.489860    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1685 17:35:36.496122  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1686 17:35:36.503198  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1687 17:35:36.506128   PCI: 00:06.0: Resource ranges:

 1688 17:35:36.512523   * Base: 80400000, Size: 100000, Tag: 200

 1689 17:35:36.519467    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1690 17:35:36.526155    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1691 17:35:36.532582  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1692 17:35:36.539473  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1693 17:35:36.546318  Root Device assign_resources, bus 0 link: 0

 1694 17:35:36.549387  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1695 17:35:36.556258  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1696 17:35:36.566088  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1697 17:35:36.573023  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1698 17:35:36.582479  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1699 17:35:36.586068  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1700 17:35:36.589584  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1701 17:35:36.599063  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1702 17:35:36.608765  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1703 17:35:36.618996  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1704 17:35:36.622112  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1705 17:35:36.629474  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1706 17:35:36.639050  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1707 17:35:36.641875  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1708 17:35:36.652286  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1709 17:35:36.659344  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1710 17:35:36.662366  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1711 17:35:36.668879  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1712 17:35:36.675334  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1713 17:35:36.681905  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1714 17:35:36.685264  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1715 17:35:36.695042  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1716 17:35:36.701805  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1717 17:35:36.708545  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1718 17:35:36.714828  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1719 17:35:36.718269  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1720 17:35:36.728034  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1721 17:35:36.731212  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1722 17:35:36.737860  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1723 17:35:36.744730  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1724 17:35:36.747943  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1725 17:35:36.754545  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1726 17:35:36.761207  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1727 17:35:36.767650  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1728 17:35:36.771114  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1729 17:35:36.781558  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1730 17:35:36.787698  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1731 17:35:36.791364  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1732 17:35:36.797445  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1733 17:35:36.804689  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1734 17:35:36.810710  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1735 17:35:36.814010  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1736 17:35:36.817826  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1737 17:35:36.824212  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1738 17:35:36.827581  LPC: Trying to open IO window from 800 size 1ff

 1739 17:35:36.837840  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1740 17:35:36.844429  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1741 17:35:36.850846  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1742 17:35:36.857582  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1743 17:35:36.860939  Root Device assign_resources, bus 0 link: 0 done

 1744 17:35:36.864165  Done setting resources.

 1745 17:35:36.870657  Show resources in subtree (Root Device)...After assigning values.

 1746 17:35:36.874042   Root Device child on link 0 CPU_CLUSTER: 0

 1747 17:35:36.881309    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1748 17:35:36.881498     APIC: 00

 1749 17:35:36.884132     APIC: 16

 1750 17:35:36.884331     APIC: 10

 1751 17:35:36.884436     APIC: 12

 1752 17:35:36.887568     APIC: 14

 1753 17:35:36.887792     APIC: 09

 1754 17:35:36.887911     APIC: 01

 1755 17:35:36.891000     APIC: 08

 1756 17:35:36.894068    DOMAIN: 0000 child on link 0 GPIO: 0

 1757 17:35:36.904448    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1758 17:35:36.914568    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1759 17:35:36.914991     GPIO: 0

 1760 17:35:36.917378     PCI: 00:00.0

 1761 17:35:36.927612     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1762 17:35:36.934096     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1763 17:35:36.943894     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1764 17:35:36.953988     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1765 17:35:36.963493     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1766 17:35:36.973969     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1767 17:35:36.983771     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1768 17:35:36.990228     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1769 17:35:37.000059     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1770 17:35:37.010295     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1771 17:35:37.020004     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1772 17:35:37.030246     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1773 17:35:37.039928     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1774 17:35:37.049676     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1775 17:35:37.056601     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1776 17:35:37.066203     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1777 17:35:37.076073     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1778 17:35:37.086063     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1779 17:35:37.095746     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1780 17:35:37.105585     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1781 17:35:37.115625     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1782 17:35:37.125962     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1783 17:35:37.132126     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1784 17:35:37.142347     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1785 17:35:37.152090     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1786 17:35:37.161756     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1787 17:35:37.172257     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1788 17:35:37.181626     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1789 17:35:37.184917     PCI: 00:02.0

 1790 17:35:37.194906     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1791 17:35:37.205289     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1792 17:35:37.215131     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1793 17:35:37.218118     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1794 17:35:37.228334     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1795 17:35:37.231581      GENERIC: 0.0

 1796 17:35:37.234978     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1797 17:35:37.244870     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1798 17:35:37.254810     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1799 17:35:37.267752     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1800 17:35:37.268402      PCI: 01:00.0

 1801 17:35:37.278424      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1802 17:35:37.288090      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1803 17:35:37.291112     PCI: 00:08.0

 1804 17:35:37.291624     PCI: 00:0a.0

 1805 17:35:37.301436     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1806 17:35:37.307607     PCI: 00:0d.0 child on link 0 USB0 port 0

 1807 17:35:37.317550     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1808 17:35:37.320818      USB0 port 0 child on link 0 USB3 port 0

 1809 17:35:37.324358       USB3 port 0

 1810 17:35:37.324793       USB3 port 1

 1811 17:35:37.327891       USB3 port 2

 1812 17:35:37.328351       USB3 port 3

 1813 17:35:37.334523     PCI: 00:14.0 child on link 0 USB0 port 0

 1814 17:35:37.344025     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1815 17:35:37.347167      USB0 port 0 child on link 0 USB2 port 0

 1816 17:35:37.350972       USB2 port 0

 1817 17:35:37.351539       USB2 port 1

 1818 17:35:37.354382       USB2 port 2

 1819 17:35:37.354805       USB2 port 3

 1820 17:35:37.357351       USB2 port 4

 1821 17:35:37.357776       USB2 port 5

 1822 17:35:37.361296       USB2 port 6

 1823 17:35:37.361720       USB2 port 7

 1824 17:35:37.364437       USB2 port 8

 1825 17:35:37.367742       USB2 port 9

 1826 17:35:37.368156       USB3 port 0

 1827 17:35:37.370586       USB3 port 1

 1828 17:35:37.371064       USB3 port 2

 1829 17:35:37.374141       USB3 port 3

 1830 17:35:37.374711     PCI: 00:14.2

 1831 17:35:37.383961     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1832 17:35:37.394126     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1833 17:35:37.400588     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1834 17:35:37.411107     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1835 17:35:37.411845      GENERIC: 0.0

 1836 17:35:37.417873     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1837 17:35:37.427072     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1838 17:35:37.427603      I2C: 00:1a

 1839 17:35:37.430687      I2C: 00:31

 1840 17:35:37.431093      I2C: 00:32

 1841 17:35:37.437396     PCI: 00:15.1 child on link 0 I2C: 00:50

 1842 17:35:37.447000     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1843 17:35:37.447458      I2C: 00:50

 1844 17:35:37.450637     PCI: 00:15.2

 1845 17:35:37.454047     PCI: 00:15.3 child on link 0 I2C: 00:10

 1846 17:35:37.464271     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1847 17:35:37.464695      I2C: 00:10

 1848 17:35:37.467172     PCI: 00:16.0

 1849 17:35:37.477392     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1850 17:35:37.480173     PCI: 00:19.0

 1851 17:35:37.483799     PCI: 00:19.1 child on link 0 I2C: 00:15

 1852 17:35:37.494105     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1853 17:35:37.494662      I2C: 00:15

 1854 17:35:37.497431      I2C: 00:2c

 1855 17:35:37.497980     PCI: 00:1e.0

 1856 17:35:37.510818     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1857 17:35:37.513928     PCI: 00:1e.3 child on link 0 SPI: 00

 1858 17:35:37.523435     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1859 17:35:37.526917      SPI: 00

 1860 17:35:37.530393     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1861 17:35:37.537137     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1862 17:35:37.539943      PNP: 0c09.0

 1863 17:35:37.550272      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1864 17:35:37.553745     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1865 17:35:37.563413     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1866 17:35:37.573568     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1867 17:35:37.576612      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1868 17:35:37.580189       GENERIC: 0.0

 1869 17:35:37.580639       GENERIC: 1.0

 1870 17:35:37.583659     PCI: 00:1f.3

 1871 17:35:37.593452     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1872 17:35:37.603339     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1873 17:35:37.603883     PCI: 00:1f.5

 1874 17:35:37.613237     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1875 17:35:37.616524  Done allocating resources.

 1876 17:35:37.622889  BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms

 1877 17:35:37.629749  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1878 17:35:37.633106  Configure audio over I2S with MAX98373 NAU88L25B.

 1879 17:35:37.638298  Enabling BT offload

 1880 17:35:37.645586  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1881 17:35:37.649301  Enabling resources...

 1882 17:35:37.652468  PCI: 00:00.0 subsystem <- 8086/4609

 1883 17:35:37.656079  PCI: 00:00.0 cmd <- 06

 1884 17:35:37.659221  PCI: 00:02.0 subsystem <- 8086/46b3

 1885 17:35:37.662652  PCI: 00:02.0 cmd <- 03

 1886 17:35:37.665794  PCI: 00:04.0 subsystem <- 8086/461d

 1887 17:35:37.666258  PCI: 00:04.0 cmd <- 02

 1888 17:35:37.669196  PCI: 00:06.0 bridge ctrl <- 0013

 1889 17:35:37.672163  PCI: 00:06.0 subsystem <- 8086/464d

 1890 17:35:37.675962  PCI: 00:06.0 cmd <- 106

 1891 17:35:37.679260  PCI: 00:0a.0 subsystem <- 8086/467d

 1892 17:35:37.682314  PCI: 00:0a.0 cmd <- 02

 1893 17:35:37.685671  PCI: 00:0d.0 subsystem <- 8086/461e

 1894 17:35:37.688964  PCI: 00:0d.0 cmd <- 02

 1895 17:35:37.692283  PCI: 00:14.0 subsystem <- 8086/51ed

 1896 17:35:37.695509  PCI: 00:14.0 cmd <- 02

 1897 17:35:37.699226  PCI: 00:14.2 subsystem <- 8086/51ef

 1898 17:35:37.699744  PCI: 00:14.2 cmd <- 02

 1899 17:35:37.702145  PCI: 00:14.3 subsystem <- 8086/51f0

 1900 17:35:37.705604  PCI: 00:14.3 cmd <- 02

 1901 17:35:37.708734  PCI: 00:15.0 subsystem <- 8086/51e8

 1902 17:35:37.712610  PCI: 00:15.0 cmd <- 02

 1903 17:35:37.715540  PCI: 00:15.1 subsystem <- 8086/51e9

 1904 17:35:37.718717  PCI: 00:15.1 cmd <- 06

 1905 17:35:37.721917  PCI: 00:15.3 subsystem <- 8086/51eb

 1906 17:35:37.725793  PCI: 00:15.3 cmd <- 02

 1907 17:35:37.728528  PCI: 00:16.0 subsystem <- 8086/51e0

 1908 17:35:37.728971  PCI: 00:16.0 cmd <- 02

 1909 17:35:37.732074  PCI: 00:19.1 subsystem <- 8086/51c6

 1910 17:35:37.735462  PCI: 00:19.1 cmd <- 02

 1911 17:35:37.739027  PCI: 00:1e.0 subsystem <- 8086/51a8

 1912 17:35:37.741846  PCI: 00:1e.0 cmd <- 06

 1913 17:35:37.745219  PCI: 00:1e.3 subsystem <- 8086/51ab

 1914 17:35:37.748967  PCI: 00:1e.3 cmd <- 02

 1915 17:35:37.752209  PCI: 00:1f.0 subsystem <- 8086/5182

 1916 17:35:37.755561  PCI: 00:1f.0 cmd <- 407

 1917 17:35:37.758859  PCI: 00:1f.3 subsystem <- 8086/51c8

 1918 17:35:37.759416  PCI: 00:1f.3 cmd <- 02

 1919 17:35:37.762173  PCI: 00:1f.5 subsystem <- 8086/51a4

 1920 17:35:37.765471  PCI: 00:1f.5 cmd <- 406

 1921 17:35:37.768977  PCI: 01:00.0 cmd <- 02

 1922 17:35:37.769546  done.

 1923 17:35:37.775272  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1924 17:35:37.778781  ME: Version: Unavailable

 1925 17:35:37.782330  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1926 17:35:37.785807  Initializing devices...

 1927 17:35:37.788548  Root Device init

 1928 17:35:37.788959  mainboard: EC init

 1929 17:35:37.795461  Chrome EC: Set SMI mask to 0x0000000000000000

 1930 17:35:37.795970  Chrome EC: UHEPI supported

 1931 17:35:37.803443  Chrome EC: clear events_b mask to 0x0000000000000000

 1932 17:35:37.810294  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1933 17:35:37.816686  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1934 17:35:37.823090  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1935 17:35:37.826600  Chrome EC: Set WAKE mask to 0x0000000000000000

 1936 17:35:37.835028  Root Device init finished in 42 msecs

 1937 17:35:37.835487  PCI: 00:00.0 init

 1938 17:35:37.838455  CPU TDP = 15 Watts

 1939 17:35:37.841918  CPU PL1 = 15 Watts

 1940 17:35:37.842457  CPU PL2 = 55 Watts

 1941 17:35:37.845354  CPU PL4 = 123 Watts

 1942 17:35:37.848544  PCI: 00:00.0 init finished in 8 msecs

 1943 17:35:37.851925  PCI: 00:02.0 init

 1944 17:35:37.852421  GMA: Found VBT in CBFS

 1945 17:35:37.855748  GMA: Found valid VBT in CBFS

 1946 17:35:37.861759  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1947 17:35:37.868276                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1948 17:35:37.871769  PCI: 00:02.0 init finished in 18 msecs

 1949 17:35:37.875170  PCI: 00:06.0 init

 1950 17:35:37.878842  Initializing PCH PCIe bridge.

 1951 17:35:37.881651  PCI: 00:06.0 init finished in 3 msecs

 1952 17:35:37.882069  PCI: 00:0a.0 init

 1953 17:35:37.888412  PCI: 00:0a.0 init finished in 0 msecs

 1954 17:35:37.888828  PCI: 00:14.0 init

 1955 17:35:37.891878  PCI: 00:14.0 init finished in 0 msecs

 1956 17:35:37.895397  PCI: 00:14.2 init

 1957 17:35:37.898238  PCI: 00:14.2 init finished in 0 msecs

 1958 17:35:37.901896  PCI: 00:15.0 init

 1959 17:35:37.902322  I2C bus 0 version 0x3230302a

 1960 17:35:37.908731  DW I2C bus 0 at 0x80655000 (400 KHz)

 1961 17:35:37.911424  PCI: 00:15.0 init finished in 6 msecs

 1962 17:35:37.911844  PCI: 00:15.1 init

 1963 17:35:37.915035  I2C bus 1 version 0x3230302a

 1964 17:35:37.918414  DW I2C bus 1 at 0x80656000 (400 KHz)

 1965 17:35:37.921640  PCI: 00:15.1 init finished in 6 msecs

 1966 17:35:37.924810  PCI: 00:15.3 init

 1967 17:35:37.928553  I2C bus 3 version 0x3230302a

 1968 17:35:37.931393  DW I2C bus 3 at 0x80657000 (400 KHz)

 1969 17:35:37.934888  PCI: 00:15.3 init finished in 6 msecs

 1970 17:35:37.938668  PCI: 00:16.0 init

 1971 17:35:37.941345  PCI: 00:16.0 init finished in 0 msecs

 1972 17:35:37.944601  PCI: 00:19.1 init

 1973 17:35:37.945042  I2C bus 5 version 0x3230302a

 1974 17:35:37.951339  DW I2C bus 5 at 0x80659000 (400 KHz)

 1975 17:35:37.954487  PCI: 00:19.1 init finished in 6 msecs

 1976 17:35:37.955030  PCI: 00:1f.0 init

 1977 17:35:37.961431  IOAPIC: Initializing IOAPIC at 0xfec00000

 1978 17:35:37.961849  IOAPIC: ID = 0x02

 1979 17:35:37.964674  IOAPIC: Dumping registers

 1980 17:35:37.967876    reg 0x0000: 0x02000000

 1981 17:35:37.968293    reg 0x0001: 0x00770020

 1982 17:35:37.971512    reg 0x0002: 0x00000000

 1983 17:35:37.974709  IOAPIC: 120 interrupts

 1984 17:35:37.978220  IOAPIC: Clearing IOAPIC at 0xfec00000

 1985 17:35:37.981525  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1986 17:35:37.988138  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1987 17:35:37.991470  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1988 17:35:37.997687  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1989 17:35:38.001333  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1990 17:35:38.007924  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1991 17:35:38.011268  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1992 17:35:38.017849  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1993 17:35:38.021394  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1994 17:35:38.024821  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1995 17:35:38.031082  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1996 17:35:38.034272  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1997 17:35:38.041453  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1998 17:35:38.044431  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1999 17:35:38.051266  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2000 17:35:38.054784  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2001 17:35:38.061344  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2002 17:35:38.064699  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2003 17:35:38.067594  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2004 17:35:38.074685  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2005 17:35:38.077523  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2006 17:35:38.084271  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2007 17:35:38.087796  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2008 17:35:38.094565  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2009 17:35:38.097451  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2010 17:35:38.104205  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2011 17:35:38.107587  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2012 17:35:38.111183  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2013 17:35:38.117542  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2014 17:35:38.121214  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2015 17:35:38.127801  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2016 17:35:38.131212  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2017 17:35:38.137867  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2018 17:35:38.140797  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2019 17:35:38.144177  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2020 17:35:38.150979  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2021 17:35:38.154710  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2022 17:35:38.161298  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2023 17:35:38.164168  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2024 17:35:38.170646  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2025 17:35:38.174128  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2026 17:35:38.181082  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2027 17:35:38.184484  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2028 17:35:38.187568  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2029 17:35:38.193915  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2030 17:35:38.197444  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2031 17:35:38.204552  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2032 17:35:38.207565  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2033 17:35:38.214261  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2034 17:35:38.217694  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2035 17:35:38.224023  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2036 17:35:38.227647  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2037 17:35:38.230690  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2038 17:35:38.237360  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2039 17:35:38.240508  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2040 17:35:38.247103  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2041 17:35:38.250784  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2042 17:35:38.257421  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2043 17:35:38.260728  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2044 17:35:38.266896  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2045 17:35:38.270885  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2046 17:35:38.274025  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2047 17:35:38.280805  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2048 17:35:38.283852  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2049 17:35:38.290253  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2050 17:35:38.293696  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2051 17:35:38.300234  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2052 17:35:38.304265  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2053 17:35:38.306939  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2054 17:35:38.313619  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2055 17:35:38.316968  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2056 17:35:38.323329  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2057 17:35:38.326671  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2058 17:35:38.333934  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2059 17:35:38.336857  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2060 17:35:38.343816  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2061 17:35:38.347208  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2062 17:35:38.350033  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2063 17:35:38.356667  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2064 17:35:38.360386  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2065 17:35:38.366606  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2066 17:35:38.370198  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2067 17:35:38.376960  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2068 17:35:38.380028  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2069 17:35:38.386846  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2070 17:35:38.390000  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2071 17:35:38.393437  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2072 17:35:38.400093  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2073 17:35:38.403490  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2074 17:35:38.410287  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2075 17:35:38.413314  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2076 17:35:38.420285  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2077 17:35:38.423128  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2078 17:35:38.430169  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2079 17:35:38.433900  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2080 17:35:38.437018  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2081 17:35:38.443455  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2082 17:35:38.446787  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2083 17:35:38.453826  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2084 17:35:38.457048  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2085 17:35:38.463629  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2086 17:35:38.466918  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2087 17:35:38.469967  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2088 17:35:38.476218  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2089 17:35:38.479673  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2090 17:35:38.486831  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2091 17:35:38.489974  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2092 17:35:38.496817  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2093 17:35:38.499905  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2094 17:35:38.506535  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2095 17:35:38.509381  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2096 17:35:38.516287  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2097 17:35:38.519614  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2098 17:35:38.522851  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2099 17:35:38.529346  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2100 17:35:38.532935  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2101 17:35:38.539589  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2102 17:35:38.542580  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2103 17:35:38.549169  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2104 17:35:38.552062  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2105 17:35:38.555440  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2106 17:35:38.562038  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2107 17:35:38.565646  PCI: 00:1f.0 init finished in 607 msecs

 2108 17:35:38.569147  PCI: 00:1f.2 init

 2109 17:35:38.572313  apm_control: Disabling ACPI.

 2110 17:35:38.575660  APMC done.

 2111 17:35:38.579180  PCI: 00:1f.2 init finished in 6 msecs

 2112 17:35:38.579261  PCI: 00:1f.3 init

 2113 17:35:38.582668  PCI: 00:1f.3 init finished in 0 msecs

 2114 17:35:38.585586  PCI: 01:00.0 init

 2115 17:35:38.589276  PCI: 01:00.0 init finished in 0 msecs

 2116 17:35:38.592120  PNP: 0c09.0 init

 2117 17:35:38.595689  Google Chrome EC uptime: 12.106 seconds

 2118 17:35:38.599431  Google Chrome AP resets since EC boot: 1

 2119 17:35:38.605892  Google Chrome most recent AP reset causes:

 2120 17:35:38.609620  	0.341: 32775 shutdown: entering G3

 2121 17:35:38.615526  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2122 17:35:38.618857  PNP: 0c09.0 init finished in 23 msecs

 2123 17:35:38.618990  GENERIC: 0.0 init

 2124 17:35:38.625850  GENERIC: 0.0 init finished in 0 msecs

 2125 17:35:38.626001  GENERIC: 1.0 init

 2126 17:35:38.629416  GENERIC: 1.0 init finished in 0 msecs

 2127 17:35:38.632608  Devices initialized

 2128 17:35:38.635891  Show all devs... After init.

 2129 17:35:38.636090  Root Device: enabled 1

 2130 17:35:38.638815  CPU_CLUSTER: 0: enabled 1

 2131 17:35:38.642717  DOMAIN: 0000: enabled 1

 2132 17:35:38.645835  GPIO: 0: enabled 1

 2133 17:35:38.646129  PCI: 00:00.0: enabled 1

 2134 17:35:38.649269  PCI: 00:01.0: enabled 0

 2135 17:35:38.652878  PCI: 00:01.1: enabled 0

 2136 17:35:38.655685  PCI: 00:02.0: enabled 1

 2137 17:35:38.656062  PCI: 00:04.0: enabled 1

 2138 17:35:38.659054  PCI: 00:05.0: enabled 0

 2139 17:35:38.662582  PCI: 00:06.0: enabled 1

 2140 17:35:38.662962  PCI: 00:06.2: enabled 0

 2141 17:35:38.666127  PCI: 00:07.0: enabled 0

 2142 17:35:38.669332  PCI: 00:07.1: enabled 0

 2143 17:35:38.672514  PCI: 00:07.2: enabled 0

 2144 17:35:38.672894  PCI: 00:07.3: enabled 0

 2145 17:35:38.676325  PCI: 00:08.0: enabled 0

 2146 17:35:38.679027  PCI: 00:09.0: enabled 0

 2147 17:35:38.682609  PCI: 00:0a.0: enabled 1

 2148 17:35:38.682986  PCI: 00:0d.0: enabled 1

 2149 17:35:38.685919  PCI: 00:0d.1: enabled 0

 2150 17:35:38.688990  PCI: 00:0d.2: enabled 0

 2151 17:35:38.692436  PCI: 00:0d.3: enabled 0

 2152 17:35:38.692817  PCI: 00:0e.0: enabled 0

 2153 17:35:38.695981  PCI: 00:10.0: enabled 0

 2154 17:35:38.699234  PCI: 00:10.1: enabled 0

 2155 17:35:38.699676  PCI: 00:10.6: enabled 0

 2156 17:35:38.702581  PCI: 00:10.7: enabled 0

 2157 17:35:38.706041  PCI: 00:12.0: enabled 0

 2158 17:35:38.709393  PCI: 00:12.6: enabled 0

 2159 17:35:38.709775  PCI: 00:12.7: enabled 0

 2160 17:35:38.712299  PCI: 00:13.0: enabled 0

 2161 17:35:38.716147  PCI: 00:14.0: enabled 1

 2162 17:35:38.718987  PCI: 00:14.1: enabled 0

 2163 17:35:38.719393  PCI: 00:14.2: enabled 1

 2164 17:35:38.722662  PCI: 00:14.3: enabled 1

 2165 17:35:38.726069  PCI: 00:15.0: enabled 1

 2166 17:35:38.729302  PCI: 00:15.1: enabled 1

 2167 17:35:38.729680  PCI: 00:15.2: enabled 0

 2168 17:35:38.732627  PCI: 00:15.3: enabled 1

 2169 17:35:38.736046  PCI: 00:16.0: enabled 1

 2170 17:35:38.736700  PCI: 00:16.1: enabled 0

 2171 17:35:38.739496  PCI: 00:16.2: enabled 0

 2172 17:35:38.742915  PCI: 00:16.3: enabled 0

 2173 17:35:38.746508  PCI: 00:16.4: enabled 0

 2174 17:35:38.746988  PCI: 00:16.5: enabled 0

 2175 17:35:38.749298  PCI: 00:17.0: enabled 0

 2176 17:35:38.752717  PCI: 00:19.0: enabled 0

 2177 17:35:38.755833  PCI: 00:19.1: enabled 1

 2178 17:35:38.756210  PCI: 00:19.2: enabled 0

 2179 17:35:38.759009  PCI: 00:1a.0: enabled 0

 2180 17:35:38.762628  PCI: 00:1c.0: enabled 0

 2181 17:35:38.766338  PCI: 00:1c.1: enabled 0

 2182 17:35:38.766812  PCI: 00:1c.2: enabled 0

 2183 17:35:38.769310  PCI: 00:1c.3: enabled 0

 2184 17:35:38.772309  PCI: 00:1c.4: enabled 0

 2185 17:35:38.775652  PCI: 00:1c.5: enabled 0

 2186 17:35:38.776032  PCI: 00:1c.6: enabled 0

 2187 17:35:38.779422  PCI: 00:1c.7: enabled 0

 2188 17:35:38.782718  PCI: 00:1d.0: enabled 0

 2189 17:35:38.783218  PCI: 00:1d.1: enabled 0

 2190 17:35:38.786356  PCI: 00:1d.2: enabled 0

 2191 17:35:38.788747  PCI: 00:1d.3: enabled 0

 2192 17:35:38.792394  PCI: 00:1e.0: enabled 1

 2193 17:35:38.792885  PCI: 00:1e.1: enabled 0

 2194 17:35:38.795442  PCI: 00:1e.2: enabled 0

 2195 17:35:38.798948  PCI: 00:1e.3: enabled 1

 2196 17:35:38.802616  PCI: 00:1f.0: enabled 1

 2197 17:35:38.803092  PCI: 00:1f.1: enabled 0

 2198 17:35:38.805847  PCI: 00:1f.2: enabled 1

 2199 17:35:38.809322  PCI: 00:1f.3: enabled 1

 2200 17:35:38.812911  PCI: 00:1f.4: enabled 0

 2201 17:35:38.813386  PCI: 00:1f.5: enabled 1

 2202 17:35:38.815432  PCI: 00:1f.6: enabled 0

 2203 17:35:38.818903  PCI: 00:1f.7: enabled 0

 2204 17:35:38.819299  GENERIC: 0.0: enabled 1

 2205 17:35:38.822525  GENERIC: 0.0: enabled 1

 2206 17:35:38.825871  GENERIC: 1.0: enabled 1

 2207 17:35:38.828801  GENERIC: 0.0: enabled 1

 2208 17:35:38.829183  GENERIC: 1.0: enabled 1

 2209 17:35:38.832241  USB0 port 0: enabled 1

 2210 17:35:38.835787  USB0 port 0: enabled 1

 2211 17:35:38.838847  GENERIC: 0.0: enabled 1

 2212 17:35:38.839534  I2C: 00:1a: enabled 1

 2213 17:35:38.842779  I2C: 00:31: enabled 1

 2214 17:35:38.845658  I2C: 00:32: enabled 1

 2215 17:35:38.846137  I2C: 00:50: enabled 1

 2216 17:35:38.848958  I2C: 00:10: enabled 1

 2217 17:35:38.852652  I2C: 00:15: enabled 1

 2218 17:35:38.853166  I2C: 00:2c: enabled 1

 2219 17:35:38.855473  GENERIC: 0.0: enabled 1

 2220 17:35:38.859049  SPI: 00: enabled 1

 2221 17:35:38.859552  PNP: 0c09.0: enabled 1

 2222 17:35:38.862882  GENERIC: 0.0: enabled 1

 2223 17:35:38.865601  USB3 port 0: enabled 1

 2224 17:35:38.866164  USB3 port 1: enabled 0

 2225 17:35:38.868667  USB3 port 2: enabled 1

 2226 17:35:38.872079  USB3 port 3: enabled 0

 2227 17:35:38.875503  USB2 port 0: enabled 1

 2228 17:35:38.875974  USB2 port 1: enabled 0

 2229 17:35:38.878628  USB2 port 2: enabled 1

 2230 17:35:38.882162  USB2 port 3: enabled 0

 2231 17:35:38.882589  USB2 port 4: enabled 0

 2232 17:35:38.885691  USB2 port 5: enabled 1

 2233 17:35:38.888587  USB2 port 6: enabled 0

 2234 17:35:38.892017  USB2 port 7: enabled 0

 2235 17:35:38.892581  USB2 port 8: enabled 1

 2236 17:35:38.895540  USB2 port 9: enabled 1

 2237 17:35:38.898862  USB3 port 0: enabled 1

 2238 17:35:38.899471  USB3 port 1: enabled 0

 2239 17:35:38.901925  USB3 port 2: enabled 0

 2240 17:35:38.905551  USB3 port 3: enabled 0

 2241 17:35:38.908916  GENERIC: 0.0: enabled 1

 2242 17:35:38.909482  GENERIC: 1.0: enabled 1

 2243 17:35:38.912317  APIC: 00: enabled 1

 2244 17:35:38.912879  APIC: 16: enabled 1

 2245 17:35:38.915817  APIC: 10: enabled 1

 2246 17:35:38.918406  APIC: 12: enabled 1

 2247 17:35:38.918918  APIC: 14: enabled 1

 2248 17:35:38.922097  APIC: 09: enabled 1

 2249 17:35:38.925286  APIC: 01: enabled 1

 2250 17:35:38.925738  APIC: 08: enabled 1

 2251 17:35:38.928838  PCI: 01:00.0: enabled 1

 2252 17:35:38.935751  BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms

 2253 17:35:38.938509  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2254 17:35:38.942104  ELOG: NV offset 0xf20000 size 0x4000

 2255 17:35:38.949519  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2256 17:35:38.956237  ELOG: Event(17) added with size 13 at 2024-02-13 17:35:38 UTC

 2257 17:35:38.962653  ELOG: Event(9E) added with size 10 at 2024-02-13 17:35:38 UTC

 2258 17:35:38.969514  ELOG: Event(9F) added with size 14 at 2024-02-13 17:35:38 UTC

 2259 17:35:38.975899  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2260 17:35:38.982979  ELOG: Event(A0) added with size 9 at 2024-02-13 17:35:38 UTC

 2261 17:35:38.986478  elog_add_boot_reason: Logged dev mode boot

 2262 17:35:38.992508  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2263 17:35:38.996154  Finalize devices...

 2264 17:35:38.996607  PCI: 00:16.0 final

 2265 17:35:38.999341  PCI: 00:1f.2 final

 2266 17:35:38.999824  GENERIC: 0.0 final

 2267 17:35:39.006690  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2268 17:35:39.009392  GENERIC: 1.0 final

 2269 17:35:39.016289  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2270 17:35:39.016842  Devices finalized

 2271 17:35:39.022645  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2272 17:35:39.026128  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2273 17:35:39.032834  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2274 17:35:39.036241  ME: HFSTS1                      : 0x90000245

 2275 17:35:39.043003  ME: HFSTS2                      : 0x82100116

 2276 17:35:39.046288  ME: HFSTS3                      : 0x00000050

 2277 17:35:39.052685  ME: HFSTS4                      : 0x00004000

 2278 17:35:39.055552  ME: HFSTS5                      : 0x00000000

 2279 17:35:39.059479  ME: HFSTS6                      : 0x40600006

 2280 17:35:39.062186  ME: Manufacturing Mode          : NO

 2281 17:35:39.069170  ME: SPI Protection Mode Enabled : YES

 2282 17:35:39.072236  ME: FPFs Committed              : YES

 2283 17:35:39.075732  ME: Manufacturing Vars Locked   : YES

 2284 17:35:39.078804  ME: FW Partition Table          : OK

 2285 17:35:39.082750  ME: Bringup Loader Failure      : NO

 2286 17:35:39.085467  ME: Firmware Init Complete      : YES

 2287 17:35:39.089429  ME: Boot Options Present        : NO

 2288 17:35:39.092259  ME: Update In Progress          : NO

 2289 17:35:39.098679  ME: D0i3 Support                : YES

 2290 17:35:39.102588  ME: Low Power State Enabled     : NO

 2291 17:35:39.105749  ME: CPU Replaced                : YES

 2292 17:35:39.108735  ME: CPU Replacement Valid       : YES

 2293 17:35:39.112396  ME: Current Working State       : 5

 2294 17:35:39.115512  ME: Current Operation State     : 1

 2295 17:35:39.119089  ME: Current Operation Mode      : 0

 2296 17:35:39.122529  ME: Error Code                  : 0

 2297 17:35:39.125934  ME: Enhanced Debug Mode         : NO

 2298 17:35:39.132216  ME: CPU Debug Disabled          : YES

 2299 17:35:39.135734  ME: TXT Support                 : NO

 2300 17:35:39.139396  ME: WP for RO is enabled        : YES

 2301 17:35:39.145935  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2302 17:35:39.149371  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2303 17:35:39.155576  Ramoops buffer: 0x100000@0x76899000.

 2304 17:35:39.159010  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2305 17:35:39.168843  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2306 17:35:39.171770  CBFS: 'fallback/slic' not found.

 2307 17:35:39.175672  ACPI: Writing ACPI tables at 7686d000.

 2308 17:35:39.176345  ACPI:    * FACS

 2309 17:35:39.178791  ACPI:    * DSDT

 2310 17:35:39.185523  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2311 17:35:39.188568  ACPI:    * FADT

 2312 17:35:39.189019  SCI is IRQ9

 2313 17:35:39.191763  ACPI: added table 1/32, length now 40

 2314 17:35:39.195336  ACPI:     * SSDT

 2315 17:35:39.202315  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2316 17:35:39.205703  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2317 17:35:39.211931  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2318 17:35:39.215396  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2319 17:35:39.222001  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2320 17:35:39.225496  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2321 17:35:39.232031  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2322 17:35:39.238355  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2323 17:35:39.242202  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2324 17:35:39.245451  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2325 17:35:39.252074  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2326 17:35:39.258533  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2327 17:35:39.262148  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2328 17:35:39.265366  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2329 17:35:39.273420  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2330 17:35:39.276940  PS2K: Passing 80 keymaps to kernel

 2331 17:35:39.283548  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2332 17:35:39.290188  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2333 17:35:39.297021  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2334 17:35:39.303670  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2335 17:35:39.310609  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2336 17:35:39.317154  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2337 17:35:39.320024  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2338 17:35:39.326731  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2339 17:35:39.333384  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2340 17:35:39.339935  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2341 17:35:39.343466  ACPI: added table 2/32, length now 44

 2342 17:35:39.346777  ACPI:    * MCFG

 2343 17:35:39.350068  ACPI: added table 3/32, length now 48

 2344 17:35:39.350622  ACPI:    * TPM2

 2345 17:35:39.353251  TPM2 log created at 0x7685d000

 2346 17:35:39.360217  ACPI: added table 4/32, length now 52

 2347 17:35:39.360669  ACPI:     * LPIT

 2348 17:35:39.363454  ACPI: added table 5/32, length now 56

 2349 17:35:39.366335  ACPI:    * MADT

 2350 17:35:39.366784  SCI is IRQ9

 2351 17:35:39.370162  ACPI: added table 6/32, length now 60

 2352 17:35:39.373410  cmd_reg from pmc_make_ipc_cmd 1052838

 2353 17:35:39.379593  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2354 17:35:39.386363  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2355 17:35:39.393102  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2356 17:35:39.396518  PMC CrashLog size in discovery mode: 0xC00

 2357 17:35:39.399492  cpu crashlog bar addr: 0x80640000

 2358 17:35:39.402757  cpu discovery table offset: 0x6030

 2359 17:35:39.409849  cpu_crashlog_discovery_table buffer count: 0x3

 2360 17:35:39.416206  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2361 17:35:39.423109  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2362 17:35:39.429585  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2363 17:35:39.433138  PMC crashLog size in discovery mode : 0xC00

 2364 17:35:39.439678  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2365 17:35:39.446193  discover mode PMC crashlog size adjusted to: 0x200

 2366 17:35:39.452666  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2367 17:35:39.456252  discover mode PMC crashlog size adjusted to: 0x0

 2368 17:35:39.459218  m_cpu_crashLog_size : 0x3480 bytes

 2369 17:35:39.462420  CPU crashLog present.

 2370 17:35:39.465810  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2371 17:35:39.476088  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2372 17:35:39.476651  current = 76876550

 2373 17:35:39.479504  ACPI:    * DMAR

 2374 17:35:39.482358  ACPI: added table 7/32, length now 64

 2375 17:35:39.485808  ACPI: added table 8/32, length now 68

 2376 17:35:39.486302  ACPI:    * HPET

 2377 17:35:39.492393  ACPI: added table 9/32, length now 72

 2378 17:35:39.492873  ACPI: done.

 2379 17:35:39.495929  ACPI tables: 38528 bytes.

 2380 17:35:39.499331  smbios_write_tables: 76857000

 2381 17:35:39.503055  EC returned error result code 3

 2382 17:35:39.506339  Couldn't obtain OEM name from CBI

 2383 17:35:39.510229  Create SMBIOS type 16

 2384 17:35:39.513141  Create SMBIOS type 17

 2385 17:35:39.516173  Create SMBIOS type 20

 2386 17:35:39.516583  GENERIC: 0.0 (WIFI Device)

 2387 17:35:39.519485  SMBIOS tables: 2156 bytes.

 2388 17:35:39.523127  Writing table forward entry at 0x00000500

 2389 17:35:39.529488  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2390 17:35:39.532774  Writing coreboot table at 0x76891000

 2391 17:35:39.539899   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2392 17:35:39.545791   1. 0000000000001000-000000000009ffff: RAM

 2393 17:35:39.549114   2. 00000000000a0000-00000000000fffff: RESERVED

 2394 17:35:39.552973   3. 0000000000100000-0000000076856fff: RAM

 2395 17:35:39.559534   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2396 17:35:39.562769   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2397 17:35:39.569456   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2398 17:35:39.575745   7. 0000000077000000-00000000803fffff: RESERVED

 2399 17:35:39.579076   8. 00000000c0000000-00000000cfffffff: RESERVED

 2400 17:35:39.585662   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2401 17:35:39.589120  10. 00000000fb000000-00000000fb000fff: RESERVED

 2402 17:35:39.592667  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2403 17:35:39.599183  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2404 17:35:39.602413  13. 00000000fec00000-00000000fecfffff: RESERVED

 2405 17:35:39.609352  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2406 17:35:39.613081  15. 00000000fed80000-00000000fed87fff: RESERVED

 2407 17:35:39.618868  16. 00000000fed90000-00000000fed92fff: RESERVED

 2408 17:35:39.622056  17. 00000000feda0000-00000000feda1fff: RESERVED

 2409 17:35:39.629056  18. 00000000fedc0000-00000000feddffff: RESERVED

 2410 17:35:39.632279  19. 0000000100000000-000000027fbfffff: RAM

 2411 17:35:39.635548  Passing 4 GPIOs to payload:

 2412 17:35:39.639048              NAME |       PORT | POLARITY |     VALUE

 2413 17:35:39.645391               lid |  undefined |     high |      high

 2414 17:35:39.648744             power |  undefined |     high |       low

 2415 17:35:39.655549             oprom |  undefined |     high |       low

 2416 17:35:39.662530          EC in RW | 0x00000151 |     high |      high

 2417 17:35:39.663005  Board ID: 3

 2418 17:35:39.665546  FW config: 0x131

 2419 17:35:39.668626  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum b4b6

 2420 17:35:39.672449  coreboot table: 1788 bytes.

 2421 17:35:39.675713  IMD ROOT    0. 0x76fff000 0x00001000

 2422 17:35:39.682159  IMD SMALL   1. 0x76ffe000 0x00001000

 2423 17:35:39.685463  FSP MEMORY  2. 0x76afe000 0x00500000

 2424 17:35:39.688601  CONSOLE     3. 0x76ade000 0x00020000

 2425 17:35:39.692248  RW MCACHE   4. 0x76add000 0x0000043c

 2426 17:35:39.695780  RO MCACHE   5. 0x76adc000 0x00000fd8

 2427 17:35:39.698566  FMAP        6. 0x76adb000 0x0000064a

 2428 17:35:39.702261  TIME STAMP  7. 0x76ada000 0x00000910

 2429 17:35:39.705538  VBOOT WORK  8. 0x76ac6000 0x00014000

 2430 17:35:39.712248  MEM INFO    9. 0x76ac5000 0x000003b8

 2431 17:35:39.715553  ROMSTG STCK10. 0x76ac4000 0x00001000

 2432 17:35:39.719044  AFTER CAR  11. 0x76ab8000 0x0000c000

 2433 17:35:39.721975  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2434 17:35:39.725240  ACPI BERT  13. 0x76a1e000 0x00010000

 2435 17:35:39.728657  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2436 17:35:39.731846  REFCODE    15. 0x769ae000 0x0006f000

 2437 17:35:39.735567  SMM BACKUP 16. 0x7699e000 0x00010000

 2438 17:35:39.742409  IGD OPREGION17. 0x76999000 0x00004203

 2439 17:35:39.745247  RAMOOPS    18. 0x76899000 0x00100000

 2440 17:35:39.748808  COREBOOT   19. 0x76891000 0x00008000

 2441 17:35:39.751571  ACPI       20. 0x7686d000 0x00024000

 2442 17:35:39.755098  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2443 17:35:39.758537  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2444 17:35:39.761938  CPU CRASHLOG23. 0x76858000 0x00003480

 2445 17:35:39.768499  SMBIOS     24. 0x76857000 0x00001000

 2446 17:35:39.768917  IMD small region:

 2447 17:35:39.771771    IMD ROOT    0. 0x76ffec00 0x00000400

 2448 17:35:39.775028    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2449 17:35:39.781700    VPD         2. 0x76ffeb80 0x00000058

 2450 17:35:39.785178    POWER STATE 3. 0x76ffeb20 0x00000044

 2451 17:35:39.788591    ROMSTAGE    4. 0x76ffeb00 0x00000004

 2452 17:35:39.791506    ACPI GNVS   5. 0x76ffeaa0 0x00000048

 2453 17:35:39.795448    TYPE_C INFO 6. 0x76ffea80 0x0000000c

 2454 17:35:39.802090  BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms

 2455 17:35:39.804806  MTRR: Physical address space:

 2456 17:35:39.812020  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2457 17:35:39.818380  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2458 17:35:39.824768  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2459 17:35:39.831838  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2460 17:35:39.835017  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2461 17:35:39.841365  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2462 17:35:39.847971  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2463 17:35:39.851471  MTRR: Fixed MSR 0x250 0x0606060606060606

 2464 17:35:39.858141  MTRR: Fixed MSR 0x258 0x0606060606060606

 2465 17:35:39.861127  MTRR: Fixed MSR 0x259 0x0000000000000000

 2466 17:35:39.864768  MTRR: Fixed MSR 0x268 0x0606060606060606

 2467 17:35:39.868236  MTRR: Fixed MSR 0x269 0x0606060606060606

 2468 17:35:39.874277  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2469 17:35:39.877724  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2470 17:35:39.881570  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2471 17:35:39.884370  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2472 17:35:39.890845  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2473 17:35:39.894286  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2474 17:35:39.897621  call enable_fixed_mtrr()

 2475 17:35:39.901142  CPU physical address size: 39 bits

 2476 17:35:39.904537  MTRR: default type WB/UC MTRR counts: 6/6.

 2477 17:35:39.907972  MTRR: UC selected as default type.

 2478 17:35:39.914472  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2479 17:35:39.920905  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2480 17:35:39.928148  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2481 17:35:39.934442  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2482 17:35:39.941280  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2483 17:35:39.947620  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2484 17:35:39.950954  MTRR: Fixed MSR 0x250 0x0606060606060606

 2485 17:35:39.957440  MTRR: Fixed MSR 0x258 0x0606060606060606

 2486 17:35:39.960541  MTRR: Fixed MSR 0x259 0x0000000000000000

 2487 17:35:39.963989  MTRR: Fixed MSR 0x268 0x0606060606060606

 2488 17:35:39.967516  MTRR: Fixed MSR 0x269 0x0606060606060606

 2489 17:35:39.974495  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2490 17:35:39.977085  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2491 17:35:39.980582  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2492 17:35:39.984046  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2493 17:35:39.990508  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2494 17:35:39.993872  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2495 17:35:39.997759  MTRR: Fixed MSR 0x250 0x0606060606060606

 2496 17:35:40.000772  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 17:35:40.007421  MTRR: Fixed MSR 0x250 0x0606060606060606

 2498 17:35:40.010245  MTRR: Fixed MSR 0x250 0x0606060606060606

 2499 17:35:40.013782  MTRR: Fixed MSR 0x250 0x0606060606060606

 2500 17:35:40.017158  call enable_fixed_mtrr()

 2501 17:35:40.020635  MTRR: Fixed MSR 0x258 0x0606060606060606

 2502 17:35:40.023954  MTRR: Fixed MSR 0x259 0x0000000000000000

 2503 17:35:40.027502  MTRR: Fixed MSR 0x268 0x0606060606060606

 2504 17:35:40.033984  MTRR: Fixed MSR 0x269 0x0606060606060606

 2505 17:35:40.037125  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2506 17:35:40.040429  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2507 17:35:40.043679  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2508 17:35:40.050212  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2509 17:35:40.053855  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2510 17:35:40.056659  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2511 17:35:40.060126  MTRR: Fixed MSR 0x258 0x0606060606060606

 2512 17:35:40.066918  MTRR: Fixed MSR 0x258 0x0606060606060606

 2513 17:35:40.070587  MTRR: Fixed MSR 0x250 0x0606060606060606

 2514 17:35:40.073435  call enable_fixed_mtrr()

 2515 17:35:40.077103  MTRR: Fixed MSR 0x259 0x0000000000000000

 2516 17:35:40.080185  MTRR: Fixed MSR 0x268 0x0606060606060606

 2517 17:35:40.083765  MTRR: Fixed MSR 0x269 0x0606060606060606

 2518 17:35:40.089965  MTRR: Fixed MSR 0x258 0x0606060606060606

 2519 17:35:40.093452  CPU physical address size: 39 bits

 2520 17:35:40.097015  MTRR: Fixed MSR 0x258 0x0606060606060606

 2521 17:35:40.100375  CPU physical address size: 39 bits

 2522 17:35:40.103498  MTRR: Fixed MSR 0x258 0x0606060606060606

 2523 17:35:40.106738  MTRR: Fixed MSR 0x259 0x0000000000000000

 2524 17:35:40.113378  MTRR: Fixed MSR 0x259 0x0000000000000000

 2525 17:35:40.116964  MTRR: Fixed MSR 0x268 0x0606060606060606

 2526 17:35:40.120128  MTRR: Fixed MSR 0x269 0x0606060606060606

 2527 17:35:40.123441  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2528 17:35:40.129850  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2529 17:35:40.133459  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2530 17:35:40.136725  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2531 17:35:40.140267  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2532 17:35:40.143310  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2533 17:35:40.149944  MTRR: Fixed MSR 0x268 0x0606060606060606

 2534 17:35:40.150326  call enable_fixed_mtrr()

 2535 17:35:40.156762  MTRR: Fixed MSR 0x259 0x0000000000000000

 2536 17:35:40.159872  MTRR: Fixed MSR 0x269 0x0606060606060606

 2537 17:35:40.163040  MTRR: Fixed MSR 0x268 0x0606060606060606

 2538 17:35:40.166627  MTRR: Fixed MSR 0x269 0x0606060606060606

 2539 17:35:40.173167  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2540 17:35:40.176782  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2541 17:35:40.179914  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2542 17:35:40.182980  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2543 17:35:40.189932  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2544 17:35:40.193184  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2545 17:35:40.196669  MTRR: Fixed MSR 0x259 0x0000000000000000

 2546 17:35:40.199456  call enable_fixed_mtrr()

 2547 17:35:40.202990  CPU physical address size: 39 bits

 2548 17:35:40.206689  CPU physical address size: 39 bits

 2549 17:35:40.210000  MTRR: Fixed MSR 0x268 0x0606060606060606

 2550 17:35:40.212909  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2551 17:35:40.219880  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2552 17:35:40.223218  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2553 17:35:40.226040  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2554 17:35:40.229516  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2555 17:35:40.236374  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2556 17:35:40.239732  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2557 17:35:40.242760  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2558 17:35:40.246259  call enable_fixed_mtrr()

 2559 17:35:40.249423  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2560 17:35:40.252767  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2561 17:35:40.259184  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2562 17:35:40.262605  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2563 17:35:40.266345  CPU physical address size: 39 bits

 2564 17:35:40.270058  call enable_fixed_mtrr()

 2565 17:35:40.273316  MTRR: Fixed MSR 0x269 0x0606060606060606

 2566 17:35:40.276574  CPU physical address size: 39 bits

 2567 17:35:40.283092  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2568 17:35:40.286476  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2569 17:35:40.290070  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2570 17:35:40.293701  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2571 17:35:40.296244  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2572 17:35:40.303431  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2573 17:35:40.306544  call enable_fixed_mtrr()

 2574 17:35:40.309464  CPU physical address size: 39 bits

 2575 17:35:40.312862  

 2576 17:35:40.313314  MTRR check

 2577 17:35:40.316231  Fixed MTRRs   : Enabled

 2578 17:35:40.316689  Variable MTRRs: Enabled

 2579 17:35:40.317044  

 2580 17:35:40.323028  BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms

 2581 17:35:40.326252  Checking cr50 for pending updates

 2582 17:35:40.338350  Reading cr50 TPM mode

 2583 17:35:40.353790  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2584 17:35:40.363857  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2585 17:35:40.366944  Checking segment from ROM address 0xf96cbe6c

 2586 17:35:40.370958  Checking segment from ROM address 0xf96cbe88

 2587 17:35:40.376822  Loading segment from ROM address 0xf96cbe6c

 2588 17:35:40.377285    code (compression=1)

 2589 17:35:40.387107    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2590 17:35:40.394201  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2591 17:35:40.397526  using LZMA

 2592 17:35:40.419523  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2593 17:35:40.425931  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2594 17:35:40.434341  Loading segment from ROM address 0xf96cbe88

 2595 17:35:40.437725    Entry Point 0x30000000

 2596 17:35:40.438269  Loaded segments

 2597 17:35:40.444202  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2598 17:35:40.450900  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2599 17:35:40.454124  Finalizing chipset.

 2600 17:35:40.454582  apm_control: Finalizing SMM.

 2601 17:35:40.457555  APMC done.

 2602 17:35:40.460808  HECI: CSE device 16.1 is disabled

 2603 17:35:40.464430  HECI: CSE device 16.2 is disabled

 2604 17:35:40.467299  HECI: CSE device 16.3 is disabled

 2605 17:35:40.470766  HECI: CSE device 16.4 is disabled

 2606 17:35:40.474032  HECI: CSE device 16.5 is disabled

 2607 17:35:40.477282  HECI: Sending End-of-Post

 2608 17:35:40.485794  CSE: EOP requested action: continue boot

 2609 17:35:40.488929  CSE EOP successful, continuing boot

 2610 17:35:40.495605  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2611 17:35:40.498797  mp_park_aps done after 0 msecs.

 2612 17:35:40.501978  Jumping to boot code at 0x30000000(0x76891000)

 2613 17:35:40.512559  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2614 17:35:40.516280  

 2615 17:35:40.516750  

 2616 17:35:40.517085  

 2617 17:35:40.519816  Starting depthcharge on Volmar...

 2618 17:35:40.520231  

 2619 17:35:40.521606  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2620 17:35:40.522258  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2621 17:35:40.522669  Setting prompt string to ['brya:']
 2622 17:35:40.523043  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2623 17:35:40.526496  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2624 17:35:40.527048  

 2625 17:35:40.532855  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2626 17:35:40.533526  

 2627 17:35:40.539741  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2628 17:35:40.540331  

 2629 17:35:40.543255  configure_storage: Failed to remap 1C:2

 2630 17:35:40.543719  

 2631 17:35:40.546490  Wipe memory regions:

 2632 17:35:40.546906  

 2633 17:35:40.549831  	[0x00000000001000, 0x000000000a0000)

 2634 17:35:40.550268  

 2635 17:35:40.552728  	[0x00000000100000, 0x00000030000000)

 2636 17:35:40.658952  

 2637 17:35:40.661771  	[0x00000032668e60, 0x00000076857000)

 2638 17:35:40.810011  

 2639 17:35:40.813404  	[0x00000100000000, 0x0000027fc00000)

 2640 17:35:41.645306  

 2641 17:35:41.648364  ec_init: CrosEC protocol v3 supported (256, 256)

 2642 17:35:42.258925  

 2643 17:35:42.259084  R8152: Initializing

 2644 17:35:42.259181  

 2645 17:35:42.262199  Version 9 (ocp_data = 6010)

 2646 17:35:42.262287  

 2647 17:35:42.265619  R8152: Done initializing

 2648 17:35:42.265709  

 2649 17:35:42.269022  Adding net device

 2650 17:35:42.570186  

 2651 17:35:42.573607  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2652 17:35:42.573707  

 2653 17:35:42.573776  

 2654 17:35:42.573892  

 2655 17:35:42.574208  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2657 17:35:42.674590  brya: tftpboot 192.168.201.1 12757521/tftp-deploy-cwrouvk8/kernel/bzImage 12757521/tftp-deploy-cwrouvk8/kernel/cmdline 12757521/tftp-deploy-cwrouvk8/ramdisk/ramdisk.cpio.gz

 2658 17:35:42.674781  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2659 17:35:42.674891  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2660 17:35:42.679342  tftpboot 192.168.201.1 12757521/tftp-deploy-cwrouvk8/kernel/bzImploy-cwrouvk8/kernel/cmdline 12757521/tftp-deploy-cwrouvk8/ramdisk/ramdisk.cpio.gz

 2661 17:35:42.679478  

 2662 17:35:42.679574  Waiting for link

 2663 17:35:42.881993  

 2664 17:35:42.882128  done.

 2665 17:35:42.882196  

 2666 17:35:42.882256  MAC: 00:e0:4c:68:00:8b

 2667 17:35:42.882319  

 2668 17:35:42.885275  Sending DHCP discover... done.

 2669 17:35:42.885359  

 2670 17:35:42.888073  Waiting for reply... done.

 2671 17:35:42.888180  

 2672 17:35:42.891855  Sending DHCP request... done.

 2673 17:35:42.891938  

 2674 17:35:43.044546  Waiting for reply... done.

 2675 17:35:43.044684  

 2676 17:35:43.044788  My ip is 192.168.201.16

 2677 17:35:43.044854  

 2678 17:35:43.047860  The DHCP server ip is 192.168.201.1

 2679 17:35:43.051203  

 2680 17:35:43.054490  TFTP server IP predefined by user: 192.168.201.1

 2681 17:35:43.054566  

 2682 17:35:43.061234  Bootfile predefined by user: 12757521/tftp-deploy-cwrouvk8/kernel/bzImage

 2683 17:35:43.061320  

 2684 17:35:43.064669  Sending tftp read request... done.

 2685 17:35:43.064755  

 2686 17:35:43.067978  Waiting for the transfer... 

 2687 17:35:43.068075  

 2688 17:35:43.311165  00000000 ################################################################

 2689 17:35:43.311317  

 2690 17:35:43.548822  00080000 ################################################################

 2691 17:35:43.548956  

 2692 17:35:43.783436  00100000 ################################################################

 2693 17:35:43.783574  

 2694 17:35:44.021354  00180000 ################################################################

 2695 17:35:44.021490  

 2696 17:35:44.268033  00200000 ################################################################

 2697 17:35:44.268166  

 2698 17:35:44.523916  00280000 ################################################################

 2699 17:35:44.524049  

 2700 17:35:44.779564  00300000 ################################################################

 2701 17:35:44.779729  

 2702 17:35:45.031924  00380000 ################################################################

 2703 17:35:45.032055  

 2704 17:35:45.289010  00400000 ################################################################

 2705 17:35:45.289172  

 2706 17:35:45.546342  00480000 ################################################################

 2707 17:35:45.546478  

 2708 17:35:45.799737  00500000 ################################################################

 2709 17:35:45.799872  

 2710 17:35:46.061061  00580000 ################################################################

 2711 17:35:46.061198  

 2712 17:35:46.311019  00600000 ################################################################

 2713 17:35:46.311202  

 2714 17:35:46.577313  00680000 ################################################################

 2715 17:35:46.577456  

 2716 17:35:46.832971  00700000 ################################################################

 2717 17:35:46.833146  

 2718 17:35:47.095490  00780000 ################################################################

 2719 17:35:47.095622  

 2720 17:35:47.347520  00800000 ################################################################

 2721 17:35:47.347650  

 2722 17:35:47.614031  00880000 ################################################################

 2723 17:35:47.614163  

 2724 17:35:47.887781  00900000 ################################################################

 2725 17:35:47.887947  

 2726 17:35:48.150165  00980000 ################################################################

 2727 17:35:48.150302  

 2728 17:35:48.411045  00a00000 ################################################################

 2729 17:35:48.411190  

 2730 17:35:48.655266  00a80000 ################################################################

 2731 17:35:48.655409  

 2732 17:35:48.902009  00b00000 ################################################################

 2733 17:35:48.902174  

 2734 17:35:49.153835  00b80000 ################################################################

 2735 17:35:49.153978  

 2736 17:35:49.422466  00c00000 ################################################################

 2737 17:35:49.422596  

 2738 17:35:49.684631  00c80000 ################################################################

 2739 17:35:49.684794  

 2740 17:35:49.928907  00d00000 ############################################################# done.

 2741 17:35:49.929053  

 2742 17:35:49.935676  The bootfile was 14127744 bytes long.

 2743 17:35:49.935764  

 2744 17:35:49.939147  Sending tftp read request... done.

 2745 17:35:49.939249  

 2746 17:35:49.939354  Waiting for the transfer... 

 2747 17:35:49.941976  

 2748 17:35:50.200392  00000000 ################################################################

 2749 17:35:50.200525  

 2750 17:35:50.451687  00080000 ################################################################

 2751 17:35:50.451833  

 2752 17:35:50.706834  00100000 ################################################################

 2753 17:35:50.706999  

 2754 17:35:50.962874  00180000 ################################################################

 2755 17:35:50.963037  

 2756 17:35:51.226096  00200000 ################################################################

 2757 17:35:51.226233  

 2758 17:35:51.476350  00280000 ################################################################

 2759 17:35:51.476492  

 2760 17:35:51.726294  00300000 ################################################################

 2761 17:35:51.726459  

 2762 17:35:51.974231  00380000 ################################################################

 2763 17:35:51.974368  

 2764 17:35:52.218838  00400000 ################################################################

 2765 17:35:52.218993  

 2766 17:35:52.466302  00480000 ################################################################

 2767 17:35:52.466450  

 2768 17:35:52.717846  00500000 ################################################################

 2769 17:35:52.718001  

 2770 17:35:52.968182  00580000 ################################################################

 2771 17:35:52.968338  

 2772 17:35:53.219635  00600000 ################################################################

 2773 17:35:53.219784  

 2774 17:35:53.470866  00680000 ################################################################

 2775 17:35:53.471007  

 2776 17:35:53.723488  00700000 ################################################################

 2777 17:35:53.723618  

 2778 17:35:53.972701  00780000 ################################################################

 2779 17:35:53.972835  

 2780 17:35:54.223280  00800000 ################################################################

 2781 17:35:54.223481  

 2782 17:35:54.398641  00880000 ############################################## done.

 2783 17:35:54.398778  

 2784 17:35:54.401792  Sending tftp read request... done.

 2785 17:35:54.401889  

 2786 17:35:54.404825  Waiting for the transfer... 

 2787 17:35:54.404909  

 2788 17:35:54.404973  00000000 # done.

 2789 17:35:54.405034  

 2790 17:35:54.414890  Command line loaded dynamically from TFTP file: 12757521/tftp-deploy-cwrouvk8/kernel/cmdline

 2791 17:35:54.414979  

 2792 17:35:54.431451  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2793 17:35:54.436660  

 2794 17:35:54.440200  Shutting down all USB controllers.

 2795 17:35:54.440282  

 2796 17:35:54.440390  Removing current net device

 2797 17:35:54.440454  

 2798 17:35:54.443259  Finalizing coreboot

 2799 17:35:54.443338  

 2800 17:35:54.450292  Exiting depthcharge with code 4 at timestamp: 24182076

 2801 17:35:54.450378  

 2802 17:35:54.450442  

 2803 17:35:54.450502  Starting kernel ...

 2804 17:35:54.450559  

 2805 17:35:54.450614  

 2806 17:35:54.450995  end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
 2807 17:35:54.451085  start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
 2808 17:35:54.451157  Setting prompt string to ['Linux version [0-9]']
 2809 17:35:54.451223  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2810 17:35:54.451287  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2812 17:40:21.452118  end: 2.2.5 auto-login-action (duration 00:04:27) [common]
 2814 17:40:21.453200  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
 2816 17:40:21.454063  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2819 17:40:21.455454  end: 2 depthcharge-action (duration 00:05:00) [common]
 2821 17:40:21.456731  Cleaning after the job
 2822 17:40:21.457201  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/ramdisk
 2823 17:40:21.464302  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/kernel
 2824 17:40:21.475401  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757521/tftp-deploy-cwrouvk8/modules
 2825 17:40:21.479317  start: 5.1 power-off (timeout 00:00:30) [common]
 2826 17:40:21.480393  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
 2827 17:40:21.563982  >> Command sent successfully.

 2828 17:40:21.568514  Returned 0 in 0 seconds
 2829 17:40:21.669586  end: 5.1 power-off (duration 00:00:00) [common]
 2831 17:40:21.671135  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2832 17:40:21.672494  Listened to connection for namespace 'common' for up to 1s
 2834 17:40:21.673844  Listened to connection for namespace 'common' for up to 1s
 2835 17:40:22.673147  Finalising connection for namespace 'common'
 2836 17:40:22.673859  Disconnecting from shell: Finalise
 2837 17:40:22.674248  
 2838 17:40:22.775287  end: 5.2 read-feedback (duration 00:00:01) [common]
 2839 17:40:22.776023  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12757521
 2840 17:40:22.832351  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12757521
 2841 17:40:22.832560  JobError: Your job cannot terminate cleanly.