Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 17:35:13.912277 lava-dispatcher, installed at version: 2024.01
2 17:35:13.912499 start: 0 validate
3 17:35:13.912632 Start time: 2024-02-13 17:35:13.912624+00:00 (UTC)
4 17:35:13.912767 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:35:13.912899 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:35:14.164643 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:35:14.164817 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.209-cip44-51-gdb99ac443b0da%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:35:14.431103 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:35:14.431257 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:35:18.903018 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:35:18.903875 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.209-cip44-51-gdb99ac443b0da%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 17:35:19.908704 validate duration: 6.00
14 17:35:19.908980 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:35:19.909080 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:35:19.909165 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:35:19.909290 Not decompressing ramdisk as can be used compressed.
18 17:35:19.909375 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:35:19.909438 saving as /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/ramdisk/initrd.cpio.gz
20 17:35:19.909501 total size: 5432690 (5 MB)
21 17:35:19.910576 progress 0 % (0 MB)
22 17:35:19.912215 progress 5 % (0 MB)
23 17:35:19.913627 progress 10 % (0 MB)
24 17:35:19.915089 progress 15 % (0 MB)
25 17:35:19.916746 progress 20 % (1 MB)
26 17:35:19.918219 progress 25 % (1 MB)
27 17:35:19.919716 progress 30 % (1 MB)
28 17:35:19.921286 progress 35 % (1 MB)
29 17:35:19.922803 progress 40 % (2 MB)
30 17:35:19.924348 progress 45 % (2 MB)
31 17:35:19.925779 progress 50 % (2 MB)
32 17:35:19.927341 progress 55 % (2 MB)
33 17:35:19.928835 progress 60 % (3 MB)
34 17:35:19.930365 progress 65 % (3 MB)
35 17:35:19.931995 progress 70 % (3 MB)
36 17:35:19.933418 progress 75 % (3 MB)
37 17:35:19.934856 progress 80 % (4 MB)
38 17:35:19.936321 progress 85 % (4 MB)
39 17:35:19.937882 progress 90 % (4 MB)
40 17:35:19.939266 progress 95 % (4 MB)
41 17:35:19.940756 progress 100 % (5 MB)
42 17:35:19.940971 5 MB downloaded in 0.03 s (164.64 MB/s)
43 17:35:19.941127 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:35:19.941396 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:35:19.941499 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:35:19.941586 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:35:19.941721 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.209-cip44-51-gdb99ac443b0da/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 17:35:19.941792 saving as /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/kernel/bzImage
50 17:35:19.941854 total size: 14127744 (13 MB)
51 17:35:19.941915 No compression specified
52 17:35:19.943242 progress 0 % (0 MB)
53 17:35:19.947041 progress 5 % (0 MB)
54 17:35:19.951005 progress 10 % (1 MB)
55 17:35:19.954631 progress 15 % (2 MB)
56 17:35:19.958485 progress 20 % (2 MB)
57 17:35:19.962132 progress 25 % (3 MB)
58 17:35:19.965981 progress 30 % (4 MB)
59 17:35:19.969637 progress 35 % (4 MB)
60 17:35:19.973535 progress 40 % (5 MB)
61 17:35:19.977311 progress 45 % (6 MB)
62 17:35:19.981096 progress 50 % (6 MB)
63 17:35:19.985021 progress 55 % (7 MB)
64 17:35:19.988944 progress 60 % (8 MB)
65 17:35:19.992835 progress 65 % (8 MB)
66 17:35:19.996560 progress 70 % (9 MB)
67 17:35:20.000389 progress 75 % (10 MB)
68 17:35:20.003988 progress 80 % (10 MB)
69 17:35:20.007711 progress 85 % (11 MB)
70 17:35:20.011423 progress 90 % (12 MB)
71 17:35:20.015130 progress 95 % (12 MB)
72 17:35:20.019104 progress 100 % (13 MB)
73 17:35:20.019265 13 MB downloaded in 0.08 s (174.06 MB/s)
74 17:35:20.019507 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:35:20.019881 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:35:20.019999 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:35:20.020117 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:35:20.020289 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:35:20.020386 saving as /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/nfsrootfs/full.rootfs.tar
81 17:35:20.020476 total size: 133380384 (127 MB)
82 17:35:20.020568 Using unxz to decompress xz
83 17:35:20.025102 progress 0 % (0 MB)
84 17:35:20.385685 progress 5 % (6 MB)
85 17:35:20.751153 progress 10 % (12 MB)
86 17:35:21.055788 progress 15 % (19 MB)
87 17:35:21.265276 progress 20 % (25 MB)
88 17:35:21.518185 progress 25 % (31 MB)
89 17:35:21.873473 progress 30 % (38 MB)
90 17:35:22.225785 progress 35 % (44 MB)
91 17:35:22.637057 progress 40 % (50 MB)
92 17:35:23.032184 progress 45 % (57 MB)
93 17:35:23.401545 progress 50 % (63 MB)
94 17:35:23.783635 progress 55 % (69 MB)
95 17:35:24.154993 progress 60 % (76 MB)
96 17:35:24.530356 progress 65 % (82 MB)
97 17:35:24.905442 progress 70 % (89 MB)
98 17:35:25.281791 progress 75 % (95 MB)
99 17:35:25.731252 progress 80 % (101 MB)
100 17:35:26.182681 progress 85 % (108 MB)
101 17:35:26.469950 progress 90 % (114 MB)
102 17:35:26.839889 progress 95 % (120 MB)
103 17:35:27.257879 progress 100 % (127 MB)
104 17:35:27.263565 127 MB downloaded in 7.24 s (17.56 MB/s)
105 17:35:27.263903 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:35:27.264310 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:35:27.264442 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:35:27.264573 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:35:27.264781 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.209-cip44-51-gdb99ac443b0da/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 17:35:27.264889 saving as /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/modules/modules.tar
112 17:35:27.264985 total size: 526864 (0 MB)
113 17:35:27.265092 Using unxz to decompress xz
114 17:35:27.270516 progress 6 % (0 MB)
115 17:35:27.271086 progress 12 % (0 MB)
116 17:35:27.271497 progress 18 % (0 MB)
117 17:35:27.272881 progress 24 % (0 MB)
118 17:35:27.274805 progress 31 % (0 MB)
119 17:35:27.276704 progress 37 % (0 MB)
120 17:35:27.278860 progress 43 % (0 MB)
121 17:35:27.280851 progress 49 % (0 MB)
122 17:35:27.282666 progress 55 % (0 MB)
123 17:35:27.285169 progress 62 % (0 MB)
124 17:35:27.287308 progress 68 % (0 MB)
125 17:35:27.289335 progress 74 % (0 MB)
126 17:35:27.291289 progress 80 % (0 MB)
127 17:35:27.293415 progress 87 % (0 MB)
128 17:35:27.295384 progress 93 % (0 MB)
129 17:35:27.297418 progress 99 % (0 MB)
130 17:35:27.304571 0 MB downloaded in 0.04 s (12.70 MB/s)
131 17:35:27.304840 end: 1.4.1 http-download (duration 00:00:00) [common]
133 17:35:27.305142 end: 1.4 download-retry (duration 00:00:00) [common]
134 17:35:27.305239 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
135 17:35:27.305341 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
136 17:35:29.484890 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12757518/extract-nfsrootfs-hkqz4bs6
137 17:35:29.485101 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
138 17:35:29.485210 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
139 17:35:29.485370 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76
140 17:35:29.485502 makedir: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin
141 17:35:29.485604 makedir: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/tests
142 17:35:29.485705 makedir: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/results
143 17:35:29.485805 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-add-keys
144 17:35:29.485946 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-add-sources
145 17:35:29.486075 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-background-process-start
146 17:35:29.486203 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-background-process-stop
147 17:35:29.486329 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-common-functions
148 17:35:29.486459 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-echo-ipv4
149 17:35:29.486586 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-install-packages
150 17:35:29.486710 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-installed-packages
151 17:35:29.486838 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-os-build
152 17:35:29.486963 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-probe-channel
153 17:35:29.487089 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-probe-ip
154 17:35:29.487213 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-target-ip
155 17:35:29.487340 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-target-mac
156 17:35:29.487509 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-target-storage
157 17:35:29.487634 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-case
158 17:35:29.487759 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-event
159 17:35:29.487881 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-feedback
160 17:35:29.488022 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-raise
161 17:35:29.488158 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-reference
162 17:35:29.488284 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-runner
163 17:35:29.488406 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-set
164 17:35:29.488530 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-test-shell
165 17:35:29.488655 Updating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-install-packages (oe)
166 17:35:29.488807 Updating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/bin/lava-installed-packages (oe)
167 17:35:29.488929 Creating /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/environment
168 17:35:29.489025 LAVA metadata
169 17:35:29.489095 - LAVA_JOB_ID=12757518
170 17:35:29.489158 - LAVA_DISPATCHER_IP=192.168.201.1
171 17:35:29.489259 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
172 17:35:29.489325 skipped lava-vland-overlay
173 17:35:29.489398 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
174 17:35:29.489477 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
175 17:35:29.489536 skipped lava-multinode-overlay
176 17:35:29.489607 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
177 17:35:29.489683 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
178 17:35:29.489754 Loading test definitions
179 17:35:29.489839 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
180 17:35:29.489907 Using /lava-12757518 at stage 0
181 17:35:29.490207 uuid=12757518_1.5.2.3.1 testdef=None
182 17:35:29.490295 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
183 17:35:29.490377 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
184 17:35:29.490890 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
186 17:35:29.491109 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
187 17:35:29.491927 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
189 17:35:29.492157 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
190 17:35:29.492772 runner path: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/0/tests/0_dmesg test_uuid 12757518_1.5.2.3.1
191 17:35:29.492930 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 17:35:29.493153 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
194 17:35:29.493224 Using /lava-12757518 at stage 1
195 17:35:29.493520 uuid=12757518_1.5.2.3.5 testdef=None
196 17:35:29.493606 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
197 17:35:29.493689 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
198 17:35:29.494234 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 17:35:29.494447 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
201 17:35:29.495080 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 17:35:29.495305 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
204 17:35:29.495964 runner path: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/1/tests/1_bootrr test_uuid 12757518_1.5.2.3.5
205 17:35:29.496115 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 17:35:29.496316 Creating lava-test-runner.conf files
208 17:35:29.496377 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/0 for stage 0
209 17:35:29.496466 - 0_dmesg
210 17:35:29.496544 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12757518/lava-overlay-bcwo2s76/lava-12757518/1 for stage 1
211 17:35:29.496634 - 1_bootrr
212 17:35:29.496727 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
213 17:35:29.496810 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
214 17:35:29.504398 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
215 17:35:29.504516 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
216 17:35:29.504602 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 17:35:29.504687 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
218 17:35:29.504796 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
219 17:35:29.641629 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 17:35:29.642053 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
221 17:35:29.642198 extracting modules file /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12757518/extract-nfsrootfs-hkqz4bs6
222 17:35:29.670062 extracting modules file /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12757518/extract-overlay-ramdisk-pldg7gco/ramdisk
223 17:35:29.694331 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 17:35:29.694493 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
225 17:35:29.694591 [common] Applying overlay to NFS
226 17:35:29.694661 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12757518/compress-overlay-t_oycyhn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12757518/extract-nfsrootfs-hkqz4bs6
227 17:35:29.702731 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 17:35:29.702863 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
229 17:35:29.702957 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 17:35:29.703049 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
231 17:35:29.703129 Building ramdisk /var/lib/lava/dispatcher/tmp/12757518/extract-overlay-ramdisk-pldg7gco/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12757518/extract-overlay-ramdisk-pldg7gco/ramdisk
232 17:35:29.795091 >> 30524 blocks
233 17:35:30.393516 rename /var/lib/lava/dispatcher/tmp/12757518/extract-overlay-ramdisk-pldg7gco/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/ramdisk/ramdisk.cpio.gz
234 17:35:30.394053 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 17:35:30.394224 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
236 17:35:30.394371 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
237 17:35:30.394498 No mkimage arch provided, not using FIT.
238 17:35:30.394626 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 17:35:30.394751 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 17:35:30.394896 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
241 17:35:30.395025 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
242 17:35:30.395139 No LXC device requested
243 17:35:30.395255 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 17:35:30.395421 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
245 17:35:30.395550 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 17:35:30.395658 Checking files for TFTP limit of 4294967296 bytes.
247 17:35:30.396211 end: 1 tftp-deploy (duration 00:00:10) [common]
248 17:35:30.396356 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 17:35:30.396492 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 17:35:30.396673 substitutions:
251 17:35:30.396774 - {DTB}: None
252 17:35:30.396869 - {INITRD}: 12757518/tftp-deploy-liwav8x7/ramdisk/ramdisk.cpio.gz
253 17:35:30.396959 - {KERNEL}: 12757518/tftp-deploy-liwav8x7/kernel/bzImage
254 17:35:30.397043 - {LAVA_MAC}: None
255 17:35:30.397130 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12757518/extract-nfsrootfs-hkqz4bs6
256 17:35:30.397222 - {NFS_SERVER_IP}: 192.168.201.1
257 17:35:30.397311 - {PRESEED_CONFIG}: None
258 17:35:30.397400 - {PRESEED_LOCAL}: None
259 17:35:30.397517 - {RAMDISK}: 12757518/tftp-deploy-liwav8x7/ramdisk/ramdisk.cpio.gz
260 17:35:30.397607 - {ROOT_PART}: None
261 17:35:30.397696 - {ROOT}: None
262 17:35:30.397786 - {SERVER_IP}: 192.168.201.1
263 17:35:30.397875 - {TEE}: None
264 17:35:30.397963 Parsed boot commands:
265 17:35:30.398051 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 17:35:30.398295 Parsed boot commands: tftpboot 192.168.201.1 12757518/tftp-deploy-liwav8x7/kernel/bzImage 12757518/tftp-deploy-liwav8x7/kernel/cmdline 12757518/tftp-deploy-liwav8x7/ramdisk/ramdisk.cpio.gz
267 17:35:30.398424 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 17:35:30.398552 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 17:35:30.398691 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 17:35:30.398826 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 17:35:30.398932 Not connected, no need to disconnect.
272 17:35:30.399045 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 17:35:30.399165 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 17:35:30.399269 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-4'
275 17:35:30.404126 Setting prompt string to ['lava-test: # ']
276 17:35:30.404568 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 17:35:30.404722 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 17:35:30.404876 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 17:35:30.405018 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 17:35:30.405312 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=reboot'
281 17:35:35.545792 >> Command sent successfully.
282 17:35:35.556562 Returned 0 in 5 seconds
283 17:35:35.657810 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
285 17:35:35.659166 end: 2.2.2 reset-device (duration 00:00:05) [common]
286 17:35:35.659711 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
287 17:35:35.660148 Setting prompt string to 'Starting depthcharge on Volmar...'
288 17:35:35.660491 Changing prompt to 'Starting depthcharge on Volmar...'
289 17:35:35.660833 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
290 17:35:35.662025 [Enter `^Ec?' for help]
291 17:35:37.026842
292 17:35:37.027533
293 17:35:37.034349 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
294 17:35:37.037697 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
295 17:35:37.041999 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
296 17:35:37.049425 CPU: AES supported, TXT NOT supported, VT supported
297 17:35:37.056767 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
298 17:35:37.057277 Cache size = 10 MiB
299 17:35:37.060679 MCH: device id 4609 (rev 04) is Alderlake-P
300 17:35:37.068697 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
301 17:35:37.072353 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
302 17:35:37.076321 VBOOT: Loading verstage.
303 17:35:37.080555 FMAP: Found "FLASH" version 1.1 at 0x1804000.
304 17:35:37.084487 FMAP: base = 0x0 size = 0x2000000 #areas = 37
305 17:35:37.087462 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
306 17:35:37.095093 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
307 17:35:37.102992 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
308 17:35:37.107780
309 17:35:37.108200
310 17:35:37.115522 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
311 17:35:37.118787 Probing TPM I2C: I2C bus 1 version 0x3230302a
312 17:35:37.122964 DW I2C bus 1 at 0xfe022000 (400 KHz)
313 17:35:37.126731 I2C TX abort detected (00000001)
314 17:35:37.130356 cr50_i2c_read: Address write failed
315 17:35:37.142696 .done! DID_VID 0x00281ae0
316 17:35:37.146751 TPM ready after 0 ms
317 17:35:37.150093 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
318 17:35:37.160881 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
319 17:35:37.167975 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 17:35:37.222546 tlcl_send_startup: Startup return code is 0
321 17:35:37.223058 TPM: setup succeeded
322 17:35:37.245742 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
323 17:35:37.267069 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
324 17:35:37.270882 Chrome EC: UHEPI supported
325 17:35:37.274476 Reading cr50 boot mode
326 17:35:37.289886 Cr50 says boot_mode is VERIFIED_RW(0x00).
327 17:35:37.290428 Phase 1
328 17:35:37.293244 FMAP: area GBB found @ 1805000 (458752 bytes)
329 17:35:37.300558 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 17:35:37.310617 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 17:35:37.317556 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
332 17:35:37.318014 Phase 2
333 17:35:37.318357 Phase 3
334 17:35:37.324226 FMAP: area GBB found @ 1805000 (458752 bytes)
335 17:35:37.327668 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
336 17:35:37.333685 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
337 17:35:37.340765 VB2:vb2_verify_keyblock() Checking keyblock signature...
338 17:35:37.347788 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
339 17:35:37.355334 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
340 17:35:37.362319 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
341 17:35:37.374273 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
342 17:35:37.377999 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
343 17:35:37.384340 VB2:vb2_verify_fw_preamble() Verifying preamble.
344 17:35:37.390972 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
345 17:35:37.397363 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
346 17:35:37.404212 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
347 17:35:37.408219 Phase 4
348 17:35:37.411243 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
349 17:35:37.417929 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
350 17:35:37.630433 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
351 17:35:37.636677 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
352 17:35:37.640154 Saving vboot hash.
353 17:35:37.647077 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
354 17:35:37.663113 tlcl_extend: response is 0
355 17:35:37.669364 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
356 17:35:37.673251 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
357 17:35:37.690886 tlcl_extend: response is 0
358 17:35:37.697839 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
359 17:35:37.717310 tlcl_lock_nv_write: response is 0
360 17:35:37.734623 tlcl_lock_nv_write: response is 0
361 17:35:37.735066 Slot A is selected
362 17:35:37.741580 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
363 17:35:37.748105 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
364 17:35:37.754955 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
365 17:35:37.761510 BS: verstage times (exec / console): total (unknown) / 264 ms
366 17:35:37.761950
367 17:35:37.762294
368 17:35:37.768184 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
369 17:35:37.773867 Google Chrome EC: version:
370 17:35:37.776954 ro: volmar_v2.0.14126-e605144e9c
371 17:35:37.780275 rw: volmar_v0.0.55-22d1557
372 17:35:37.783429 running image: 2
373 17:35:37.786934 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
374 17:35:37.797004 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
375 17:35:37.803197 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
376 17:35:37.809938 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
377 17:35:37.819797 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
378 17:35:37.829461 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
379 17:35:37.833310 EC took 986us to calculate image hash
380 17:35:37.842716 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
381 17:35:37.849600 VB2:sync_ec() select_rw=RW(active)
382 17:35:37.858114 Waited 270us to clear limit power flag.
383 17:35:37.861397 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
384 17:35:37.864866 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
385 17:35:37.867827 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
386 17:35:37.874960 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
387 17:35:37.878346 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
388 17:35:37.881299 TCO_STS: 0000 0000
389 17:35:37.881748 GEN_PMCON: d0015038 00002200
390 17:35:37.884653 GBLRST_CAUSE: 00000000 00000000
391 17:35:37.888047 HPR_CAUSE0: 00000000
392 17:35:37.891460 prev_sleep_state 5
393 17:35:37.894242 Abort disabling TXT, as CPU is not TXT capable.
394 17:35:37.902777 cse_lite: Number of partitions = 3
395 17:35:37.905817 cse_lite: Current partition = RO
396 17:35:37.909054 cse_lite: Next partition = RO
397 17:35:37.909554 cse_lite: Flags = 0x7
398 17:35:37.915438 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
399 17:35:37.925073 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
400 17:35:37.928740 FMAP: area SI_ME found @ 1000 (5238784 bytes)
401 17:35:37.935233 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
402 17:35:37.942152 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
403 17:35:37.948798 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
404 17:35:37.952035 cse_lite: CSE CBFS RW version : 16.1.25.2049
405 17:35:37.958725 cse_lite: Set Boot Partition Info Command (RW)
406 17:35:37.961618 HECI: Global Reset(Type:1) Command
407 17:35:39.372318
408 17:35:39.372873
409 17:35:39.379194 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
410 17:35:39.382917 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
411 17:35:39.389943 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
412 17:35:39.392885 CPU: AES supported, TXT NOT supported, VT supported
413 17:35:39.402864 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
414 17:35:39.403320 Cache size = 10 MiB
415 17:35:39.409412 MCH: device id 4609 (rev 04) is Alderlake-P
416 17:35:39.413045 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
417 17:35:39.419415 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
418 17:35:39.420024 VBOOT: Loading verstage.
419 17:35:39.426837 FMAP: Found "FLASH" version 1.1 at 0x1804000.
420 17:35:39.430519 FMAP: base = 0x0 size = 0x2000000 #areas = 37
421 17:35:39.434017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 17:35:39.445049 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
423 17:35:39.451452 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
424 17:35:39.451940
425 17:35:39.452422
426 17:35:39.461698 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
427 17:35:39.468075 Probing TPM I2C: I2C bus 1 version 0x3230302a
428 17:35:39.471107 DW I2C bus 1 at 0xfe022000 (400 KHz)
429 17:35:39.474676 done! DID_VID 0x00281ae0
430 17:35:39.475122 TPM ready after 0 ms
431 17:35:39.482040 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
432 17:35:39.492830 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
433 17:35:39.496635 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
434 17:35:39.553508 tlcl_send_startup: Startup return code is 0
435 17:35:39.554127 TPM: setup succeeded
436 17:35:39.573199 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
437 17:35:39.594944 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
438 17:35:39.598746 Chrome EC: UHEPI supported
439 17:35:39.602389 Reading cr50 boot mode
440 17:35:39.617105 Cr50 says boot_mode is VERIFIED_RW(0x00).
441 17:35:39.617686 Phase 1
442 17:35:39.623454 FMAP: area GBB found @ 1805000 (458752 bytes)
443 17:35:39.630321 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
444 17:35:39.636964 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
445 17:35:39.643556 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
446 17:35:39.646759 Phase 2
447 17:35:39.647227 Phase 3
448 17:35:39.649988 FMAP: area GBB found @ 1805000 (458752 bytes)
449 17:35:39.656385 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
450 17:35:39.659744 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
451 17:35:39.666418 VB2:vb2_verify_keyblock() Checking keyblock signature...
452 17:35:39.673138 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
453 17:35:39.679516 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
454 17:35:39.690042 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
455 17:35:39.702261 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
456 17:35:39.705028 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
457 17:35:39.712364 VB2:vb2_verify_fw_preamble() Verifying preamble.
458 17:35:39.718945 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
459 17:35:39.724937 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
460 17:35:39.731733 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
461 17:35:39.736222 Phase 4
462 17:35:39.739624 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
463 17:35:39.745712 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
464 17:35:39.958497 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
465 17:35:39.964797 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
466 17:35:39.968308 Saving vboot hash.
467 17:35:39.974390 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
468 17:35:39.990436 tlcl_extend: response is 0
469 17:35:39.997398 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
470 17:35:40.003960 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
471 17:35:40.018391 tlcl_extend: response is 0
472 17:35:40.024808 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
473 17:35:40.043392 tlcl_lock_nv_write: response is 0
474 17:35:40.062749 tlcl_lock_nv_write: response is 0
475 17:35:40.063080 Slot A is selected
476 17:35:40.068918 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
477 17:35:40.075887 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
478 17:35:40.082196 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
479 17:35:40.089292 BS: verstage times (exec / console): total (unknown) / 256 ms
480 17:35:40.089767
481 17:35:40.090101
482 17:35:40.095525 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
483 17:35:40.100408 Google Chrome EC: version:
484 17:35:40.103595 ro: volmar_v2.0.14126-e605144e9c
485 17:35:40.107101 rw: volmar_v0.0.55-22d1557
486 17:35:40.110030 running image: 2
487 17:35:40.113660 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
488 17:35:40.123193 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
489 17:35:40.130238 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
490 17:35:40.136737 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
491 17:35:40.146705 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
492 17:35:40.156328 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
493 17:35:40.159978 EC took 941us to calculate image hash
494 17:35:40.169910 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
495 17:35:40.176388 VB2:sync_ec() select_rw=RW(active)
496 17:35:40.185031 Waited 554us to clear limit power flag.
497 17:35:40.189050 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
498 17:35:40.191913 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
499 17:35:40.196013 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
500 17:35:40.199336 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
501 17:35:40.205576 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
502 17:35:40.206008 TCO_STS: 0000 0000
503 17:35:40.208695 GEN_PMCON: d1001038 00002200
504 17:35:40.212081 GBLRST_CAUSE: 00000040 00000000
505 17:35:40.215600 HPR_CAUSE0: 00000000
506 17:35:40.219044 prev_sleep_state 5
507 17:35:40.222286 Abort disabling TXT, as CPU is not TXT capable.
508 17:35:40.230101 cse_lite: Number of partitions = 3
509 17:35:40.233457 cse_lite: Current partition = RW
510 17:35:40.233993 cse_lite: Next partition = RW
511 17:35:40.236363 cse_lite: Flags = 0x7
512 17:35:40.243060 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
513 17:35:40.253641 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
514 17:35:40.256627 FMAP: area SI_ME found @ 1000 (5238784 bytes)
515 17:35:40.262857 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
516 17:35:40.270071 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
517 17:35:40.276533 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
518 17:35:40.279879 cse_lite: CSE CBFS RW version : 16.1.25.2049
519 17:35:40.283465 Boot Count incremented to 4912
520 17:35:40.289914 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
521 17:35:40.296449 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
522 17:35:40.309656 Probing TPM I2C: done! DID_VID 0x00281ae0
523 17:35:40.313244 Locality already claimed
524 17:35:40.316048 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
525 17:35:40.335671 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
526 17:35:40.342175 MRC: Hash idx 0x100d comparison successful.
527 17:35:40.345627 MRC cache found, size f6c8
528 17:35:40.346155 bootmode is set to: 2
529 17:35:40.348844 EC returned error result code 3
530 17:35:40.352367 FW_CONFIG value from CBI is 0x131
531 17:35:40.359034 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
532 17:35:40.362042 SPD index = 0
533 17:35:40.368904 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
534 17:35:40.369506 SPD: module type is LPDDR4X
535 17:35:40.375954 SPD: module part number is K4U6E3S4AB-MGCL
536 17:35:40.382564 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
537 17:35:40.385661 SPD: device width 16 bits, bus width 16 bits
538 17:35:40.389031 SPD: module size is 1024 MB (per channel)
539 17:35:40.458128 CBMEM:
540 17:35:40.461651 IMD: root @ 0x76fff000 254 entries.
541 17:35:40.464713 IMD: root @ 0x76ffec00 62 entries.
542 17:35:40.472658 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 17:35:40.475748 RO_VPD is uninitialized or empty.
544 17:35:40.479176 FMAP: area RW_VPD found @ f29000 (8192 bytes)
545 17:35:40.485783 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
546 17:35:40.489277 External stage cache:
547 17:35:40.492495 IMD: root @ 0x7bbff000 254 entries.
548 17:35:40.495605 IMD: root @ 0x7bbfec00 62 entries.
549 17:35:40.502892 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
550 17:35:40.509807 MRC: Checking cached data update for 'RW_MRC_CACHE'.
551 17:35:40.512559 MRC: 'RW_MRC_CACHE' does not need update.
552 17:35:40.513084 8 DIMMs found
553 17:35:40.516281 SMM Memory Map
554 17:35:40.519293 SMRAM : 0x7b800000 0x800000
555 17:35:40.522560 Subregion 0: 0x7b800000 0x200000
556 17:35:40.526136 Subregion 1: 0x7ba00000 0x200000
557 17:35:40.529139 Subregion 2: 0x7bc00000 0x400000
558 17:35:40.532855 top_of_ram = 0x77000000
559 17:35:40.536012 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
560 17:35:40.542448 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
561 17:35:40.549109 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
562 17:35:40.552390 MTRR Range: Start=ff000000 End=0 (Size 1000000)
563 17:35:40.555718 Normal boot
564 17:35:40.562753 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
565 17:35:40.569308 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
566 17:35:40.575534 Processing 237 relocs. Offset value of 0x74ab9000
567 17:35:40.584141 BS: romstage times (exec / console): total (unknown) / 377 ms
568 17:35:40.591133
569 17:35:40.591613
570 17:35:40.598358 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
571 17:35:40.598880 Normal boot
572 17:35:40.604748 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
573 17:35:40.611269 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
574 17:35:40.618176 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
575 17:35:40.628073 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
576 17:35:40.675975 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
577 17:35:40.683219 Processing 5931 relocs. Offset value of 0x72a2f000
578 17:35:40.685836 BS: postcar times (exec / console): total (unknown) / 51 ms
579 17:35:40.689006
580 17:35:40.689452
581 17:35:40.695604 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
582 17:35:40.699293 Reserving BERT start 76a1e000, size 10000
583 17:35:40.702240 Normal boot
584 17:35:40.705910 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
585 17:35:40.712400 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
586 17:35:40.722704 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
587 17:35:40.725534 FMAP: area RW_VPD found @ f29000 (8192 bytes)
588 17:35:40.728960 Google Chrome EC: version:
589 17:35:40.732486 ro: volmar_v2.0.14126-e605144e9c
590 17:35:40.735837 rw: volmar_v0.0.55-22d1557
591 17:35:40.738971 running image: 2
592 17:35:40.742723 ACPI _SWS is PM1 Index 8 GPE Index -1
593 17:35:40.746125 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
594 17:35:40.750028 EC returned error result code 3
595 17:35:40.752868 FW_CONFIG value from CBI is 0x131
596 17:35:40.759716 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
597 17:35:40.763632 PCI: 00:1c.2 disabled by fw_config
598 17:35:40.770404 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
599 17:35:40.773787 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
600 17:35:40.780410 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
601 17:35:40.783178 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
602 17:35:40.790271 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
603 17:35:40.796973 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
604 17:35:40.800248 microcode: sig=0x906a4 pf=0x80 revision=0x423
605 17:35:40.806868 microcode: Update skipped, already up-to-date
606 17:35:40.813125 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
607 17:35:40.845510 Detected 6 core, 8 thread CPU.
608 17:35:40.848528 Setting up SMI for CPU
609 17:35:40.851788 IED base = 0x7bc00000
610 17:35:40.852261 IED size = 0x00400000
611 17:35:40.855679 Will perform SMM setup.
612 17:35:40.861835 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
613 17:35:40.862375 LAPIC 0x0 in XAPIC mode.
614 17:35:40.871626 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
615 17:35:40.875074 Processing 18 relocs. Offset value of 0x00030000
616 17:35:40.880289 Attempting to start 7 APs
617 17:35:40.883092 Waiting for 10ms after sending INIT.
618 17:35:40.896744 Waiting for SIPI to complete...
619 17:35:40.899311 LAPIC 0x16 in XAPIC mode.
620 17:35:40.902944 LAPIC 0x10 in XAPIC mode.
621 17:35:40.906194 LAPIC 0x12 in XAPIC mode.
622 17:35:40.909395 LAPIC 0x8 in XAPIC mode.
623 17:35:40.909865 LAPIC 0x14 in XAPIC mode.
624 17:35:40.916278 AP: slot 1 apic_id 16, MCU rev: 0x00000423
625 17:35:40.916814 LAPIC 0x9 in XAPIC mode.
626 17:35:40.922652 AP: slot 3 apic_id 12, MCU rev: 0x00000423
627 17:35:40.926060 AP: slot 2 apic_id 10, MCU rev: 0x00000423
628 17:35:40.929447 AP: slot 5 apic_id 9, MCU rev: 0x00000423
629 17:35:40.936054 AP: slot 7 apic_id 8, MCU rev: 0x00000423
630 17:35:40.939518 AP: slot 4 apic_id 14, MCU rev: 0x00000423
631 17:35:40.942920 LAPIC 0x1 in XAPIC mode.
632 17:35:40.943443 done.
633 17:35:40.945701 AP: slot 6 apic_id 1, MCU rev: 0x00000423
634 17:35:40.949675 Waiting for SIPI to complete...
635 17:35:40.950144 done.
636 17:35:40.952321 smm_setup_relocation_handler: enter
637 17:35:40.955787 smm_setup_relocation_handler: exit
638 17:35:40.966114 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
639 17:35:40.969710 Processing 11 relocs. Offset value of 0x00038000
640 17:35:40.975813 smm_module_setup_stub: stack_top = 0x7b804000
641 17:35:40.979225 smm_module_setup_stub: per cpu stack_size = 0x800
642 17:35:40.986234 smm_module_setup_stub: runtime.start32_offset = 0x4c
643 17:35:40.989377 smm_module_setup_stub: runtime.smm_size = 0x10000
644 17:35:40.995530 SMM Module: stub loaded at 38000. Will call 0x76a52094
645 17:35:40.999023 Installing permanent SMM handler to 0x7b800000
646 17:35:41.006096 smm_load_module: total_smm_space_needed e468, available -> 200000
647 17:35:41.016004 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
648 17:35:41.019205 Processing 255 relocs. Offset value of 0x7b9f6000
649 17:35:41.025804 smm_load_module: smram_start: 0x7b800000
650 17:35:41.028811 smm_load_module: smram_end: 7ba00000
651 17:35:41.032363 smm_load_module: handler start 0x7b9f6d5f
652 17:35:41.035807 smm_load_module: handler_size 98d0
653 17:35:41.038695 smm_load_module: fxsave_area 0x7b9ff000
654 17:35:41.042557 smm_load_module: fxsave_size 1000
655 17:35:41.045795 smm_load_module: CONFIG_MSEG_SIZE 0x0
656 17:35:41.052056 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
657 17:35:41.059115 smm_load_module: handler_mod_params.smbase = 0x7b800000
658 17:35:41.062431 smm_load_module: per_cpu_save_state_size = 0x400
659 17:35:41.065286 smm_load_module: num_cpus = 0x8
660 17:35:41.072320 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
661 17:35:41.075430 smm_load_module: total_save_state_size = 0x2000
662 17:35:41.079041 smm_load_module: cpu0 entry: 7b9e6000
663 17:35:41.085688 smm_create_map: cpus allowed in one segment 30
664 17:35:41.088627 smm_create_map: min # of segments needed 1
665 17:35:41.089104 CPU 0x0
666 17:35:41.095452 smbase 7b9e6000 entry 7b9ee000
667 17:35:41.098840 ss_start 7b9f5c00 code_end 7b9ee208
668 17:35:41.099319 CPU 0x1
669 17:35:41.102340 smbase 7b9e5c00 entry 7b9edc00
670 17:35:41.108942 ss_start 7b9f5800 code_end 7b9ede08
671 17:35:41.109484 CPU 0x2
672 17:35:41.112185 smbase 7b9e5800 entry 7b9ed800
673 17:35:41.118395 ss_start 7b9f5400 code_end 7b9eda08
674 17:35:41.118894 CPU 0x3
675 17:35:41.121764 smbase 7b9e5400 entry 7b9ed400
676 17:35:41.125405 ss_start 7b9f5000 code_end 7b9ed608
677 17:35:41.128930 CPU 0x4
678 17:35:41.131577 smbase 7b9e5000 entry 7b9ed000
679 17:35:41.135393 ss_start 7b9f4c00 code_end 7b9ed208
680 17:35:41.135936 CPU 0x5
681 17:35:41.141966 smbase 7b9e4c00 entry 7b9ecc00
682 17:35:41.144930 ss_start 7b9f4800 code_end 7b9ece08
683 17:35:41.145363 CPU 0x6
684 17:35:41.148386 smbase 7b9e4800 entry 7b9ec800
685 17:35:41.155059 ss_start 7b9f4400 code_end 7b9eca08
686 17:35:41.155527 CPU 0x7
687 17:35:41.158305 smbase 7b9e4400 entry 7b9ec400
688 17:35:41.164981 ss_start 7b9f4000 code_end 7b9ec608
689 17:35:41.171664 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
690 17:35:41.178426 Processing 11 relocs. Offset value of 0x7b9ee000
691 17:35:41.181480 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
692 17:35:41.188005 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
693 17:35:41.195139 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
694 17:35:41.201609 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
695 17:35:41.208091 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
696 17:35:41.214783 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
697 17:35:41.221079 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
698 17:35:41.224984 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
699 17:35:41.231213 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
700 17:35:41.237856 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
701 17:35:41.245025 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
702 17:35:41.251535 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
703 17:35:41.258052 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
704 17:35:41.264604 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
705 17:35:41.270859 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
706 17:35:41.274453 smm_module_setup_stub: stack_top = 0x7b804000
707 17:35:41.280674 smm_module_setup_stub: per cpu stack_size = 0x800
708 17:35:41.284415 smm_module_setup_stub: runtime.start32_offset = 0x4c
709 17:35:41.290721 smm_module_setup_stub: runtime.smm_size = 0x200000
710 17:35:41.297902 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
711 17:35:41.301342 Clearing SMI status registers
712 17:35:41.304116 SMI_STS: PM1
713 17:35:41.304550 PM1_STS: WAK PWRBTN
714 17:35:41.310911 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
715 17:35:41.314110 In relocation handler: CPU 0
716 17:35:41.320906 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
717 17:35:41.324335 Writing SMRR. base = 0x7b800006, mask=0xff800c00
718 17:35:41.327246 Relocation complete.
719 17:35:41.334164 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
720 17:35:41.337598 In relocation handler: CPU 6
721 17:35:41.341064 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
722 17:35:41.343562 Relocation complete.
723 17:35:41.350511 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
724 17:35:41.353742 In relocation handler: CPU 2
725 17:35:41.357224 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
726 17:35:41.360528 Writing SMRR. base = 0x7b800006, mask=0xff800c00
727 17:35:41.363872 Relocation complete.
728 17:35:41.370553 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
729 17:35:41.374156 In relocation handler: CPU 4
730 17:35:41.377444 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
731 17:35:41.383536 Writing SMRR. base = 0x7b800006, mask=0xff800c00
732 17:35:41.383964 Relocation complete.
733 17:35:41.393997 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
734 17:35:41.394538 In relocation handler: CPU 3
735 17:35:41.400360 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
736 17:35:41.403801 Writing SMRR. base = 0x7b800006, mask=0xff800c00
737 17:35:41.406808 Relocation complete.
738 17:35:41.413883 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
739 17:35:41.417059 In relocation handler: CPU 1
740 17:35:41.420340 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
741 17:35:41.423727 Writing SMRR. base = 0x7b800006, mask=0xff800c00
742 17:35:41.427177 Relocation complete.
743 17:35:41.434022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
744 17:35:41.436578 In relocation handler: CPU 5
745 17:35:41.439988 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
746 17:35:41.443584 Relocation complete.
747 17:35:41.450258 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
748 17:35:41.453655 In relocation handler: CPU 7
749 17:35:41.456655 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
750 17:35:41.463242 Writing SMRR. base = 0x7b800006, mask=0xff800c00
751 17:35:41.466507 Relocation complete.
752 17:35:41.466978 Initializing CPU #0
753 17:35:41.470376 CPU: vendor Intel device 906a4
754 17:35:41.473347 CPU: family 06, model 9a, stepping 04
755 17:35:41.476611 Clearing out pending MCEs
756 17:35:41.479784 cpu: energy policy set to 7
757 17:35:41.483502 Turbo is available but hidden
758 17:35:41.486564 Turbo is available and visible
759 17:35:41.490248 microcode: Update skipped, already up-to-date
760 17:35:41.493314 CPU #0 initialized
761 17:35:41.493883 Initializing CPU #6
762 17:35:41.496493 Initializing CPU #1
763 17:35:41.500307 Initializing CPU #4
764 17:35:41.500857 Initializing CPU #2
765 17:35:41.503235 CPU: vendor Intel device 906a4
766 17:35:41.506678 CPU: family 06, model 9a, stepping 04
767 17:35:41.510327 CPU: vendor Intel device 906a4
768 17:35:41.513258 CPU: family 06, model 9a, stepping 04
769 17:35:41.516413 CPU: vendor Intel device 906a4
770 17:35:41.519947 CPU: family 06, model 9a, stepping 04
771 17:35:41.523201 CPU: vendor Intel device 906a4
772 17:35:41.529964 CPU: family 06, model 9a, stepping 04
773 17:35:41.530513 Initializing CPU #3
774 17:35:41.533565 Clearing out pending MCEs
775 17:35:41.536472 Clearing out pending MCEs
776 17:35:41.539976 cpu: energy policy set to 7
777 17:35:41.540551 Clearing out pending MCEs
778 17:35:41.543186 CPU: vendor Intel device 906a4
779 17:35:41.549747 CPU: family 06, model 9a, stepping 04
780 17:35:41.552934 microcode: Update skipped, already up-to-date
781 17:35:41.553519 CPU #4 initialized
782 17:35:41.556855 cpu: energy policy set to 7
783 17:35:41.559956 Clearing out pending MCEs
784 17:35:41.566620 microcode: Update skipped, already up-to-date
785 17:35:41.567120 CPU #1 initialized
786 17:35:41.569572 Clearing out pending MCEs
787 17:35:41.573030 cpu: energy policy set to 7
788 17:35:41.576062 cpu: energy policy set to 7
789 17:35:41.579743 microcode: Update skipped, already up-to-date
790 17:35:41.583071 CPU #2 initialized
791 17:35:41.583713 Initializing CPU #5
792 17:35:41.589415 microcode: Update skipped, already up-to-date
793 17:35:41.589974 CPU #3 initialized
794 17:35:41.593191 CPU: vendor Intel device 906a4
795 17:35:41.595998 CPU: family 06, model 9a, stepping 04
796 17:35:41.599603 Initializing CPU #7
797 17:35:41.602720 cpu: energy policy set to 7
798 17:35:41.606294 Clearing out pending MCEs
799 17:35:41.606921 CPU: vendor Intel device 906a4
800 17:35:41.613084 CPU: family 06, model 9a, stepping 04
801 17:35:41.613667 cpu: energy policy set to 7
802 17:35:41.615911 Clearing out pending MCEs
803 17:35:41.622880 microcode: Update skipped, already up-to-date
804 17:35:41.623506 CPU #6 initialized
805 17:35:41.626218 cpu: energy policy set to 7
806 17:35:41.629282 microcode: Update skipped, already up-to-date
807 17:35:41.633029 CPU #5 initialized
808 17:35:41.635965 microcode: Update skipped, already up-to-date
809 17:35:41.639537 CPU #7 initialized
810 17:35:41.643049 bsp_do_flight_plan done after 688 msecs.
811 17:35:41.645883 CPU: frequency set to 4400 MHz
812 17:35:41.649256 Enabling SMIs.
813 17:35:41.656044 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
814 17:35:41.670520 Probing TPM I2C: done! DID_VID 0x00281ae0
815 17:35:41.674151 Locality already claimed
816 17:35:41.677368 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
817 17:35:41.688435 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
818 17:35:41.691849 Enabling GPIO PM b/c CR50 has long IRQ pulse support
819 17:35:41.698719 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
820 17:35:41.705548 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
821 17:35:41.708513 Found a VBT of 9216 bytes after decompression
822 17:35:41.712244 PCI 1.0, PIN A, using IRQ #16
823 17:35:41.715213 PCI 2.0, PIN A, using IRQ #17
824 17:35:41.718870 PCI 4.0, PIN A, using IRQ #18
825 17:35:41.722111 PCI 5.0, PIN A, using IRQ #16
826 17:35:41.725067 PCI 6.0, PIN A, using IRQ #16
827 17:35:41.728504 PCI 6.2, PIN C, using IRQ #18
828 17:35:41.731522 PCI 7.0, PIN A, using IRQ #19
829 17:35:41.734728 PCI 7.1, PIN B, using IRQ #20
830 17:35:41.738124 PCI 7.2, PIN C, using IRQ #21
831 17:35:41.742068 PCI 7.3, PIN D, using IRQ #22
832 17:35:41.745020 PCI 8.0, PIN A, using IRQ #23
833 17:35:41.748551 PCI D.0, PIN A, using IRQ #17
834 17:35:41.751465 PCI D.1, PIN B, using IRQ #19
835 17:35:41.755281 PCI 10.0, PIN A, using IRQ #24
836 17:35:41.755903 PCI 10.1, PIN B, using IRQ #25
837 17:35:41.758732 PCI 10.6, PIN C, using IRQ #20
838 17:35:41.762114 PCI 10.7, PIN D, using IRQ #21
839 17:35:41.764971 PCI 11.0, PIN A, using IRQ #26
840 17:35:41.768328 PCI 11.1, PIN B, using IRQ #27
841 17:35:41.771801 PCI 11.2, PIN C, using IRQ #28
842 17:35:41.775278 PCI 11.3, PIN D, using IRQ #29
843 17:35:41.778455 PCI 12.0, PIN A, using IRQ #30
844 17:35:41.781570 PCI 12.6, PIN B, using IRQ #31
845 17:35:41.784642 PCI 12.7, PIN C, using IRQ #22
846 17:35:41.788176 PCI 13.0, PIN A, using IRQ #32
847 17:35:41.791624 PCI 13.1, PIN B, using IRQ #33
848 17:35:41.794788 PCI 13.2, PIN C, using IRQ #34
849 17:35:41.797798 PCI 13.3, PIN D, using IRQ #35
850 17:35:41.801364 PCI 14.0, PIN B, using IRQ #23
851 17:35:41.804507 PCI 14.1, PIN A, using IRQ #36
852 17:35:41.807794 PCI 14.3, PIN C, using IRQ #17
853 17:35:41.808263 PCI 15.0, PIN A, using IRQ #37
854 17:35:41.811655 PCI 15.1, PIN B, using IRQ #38
855 17:35:41.814722 PCI 15.2, PIN C, using IRQ #39
856 17:35:41.817972 PCI 15.3, PIN D, using IRQ #40
857 17:35:41.821041 PCI 16.0, PIN A, using IRQ #18
858 17:35:41.824367 PCI 16.1, PIN B, using IRQ #19
859 17:35:41.827627 PCI 16.2, PIN C, using IRQ #20
860 17:35:41.831289 PCI 16.3, PIN D, using IRQ #21
861 17:35:41.834543 PCI 16.4, PIN A, using IRQ #18
862 17:35:41.837476 PCI 16.5, PIN B, using IRQ #19
863 17:35:41.840914 PCI 17.0, PIN A, using IRQ #22
864 17:35:41.844800 PCI 19.0, PIN A, using IRQ #41
865 17:35:41.848118 PCI 19.1, PIN B, using IRQ #42
866 17:35:41.850975 PCI 19.2, PIN C, using IRQ #43
867 17:35:41.854479 PCI 1C.0, PIN A, using IRQ #16
868 17:35:41.857955 PCI 1C.1, PIN B, using IRQ #17
869 17:35:41.860848 PCI 1C.2, PIN C, using IRQ #18
870 17:35:41.861276 PCI 1C.3, PIN D, using IRQ #19
871 17:35:41.864545 PCI 1C.4, PIN A, using IRQ #16
872 17:35:41.867670 PCI 1C.5, PIN B, using IRQ #17
873 17:35:41.870665 PCI 1C.6, PIN C, using IRQ #18
874 17:35:41.874273 PCI 1C.7, PIN D, using IRQ #19
875 17:35:41.877274 PCI 1D.0, PIN A, using IRQ #16
876 17:35:41.880795 PCI 1D.1, PIN B, using IRQ #17
877 17:35:41.884298 PCI 1D.2, PIN C, using IRQ #18
878 17:35:41.887171 PCI 1D.3, PIN D, using IRQ #19
879 17:35:41.890463 PCI 1E.0, PIN A, using IRQ #23
880 17:35:41.893983 PCI 1E.1, PIN B, using IRQ #20
881 17:35:41.897510 PCI 1E.2, PIN C, using IRQ #44
882 17:35:41.900804 PCI 1E.3, PIN D, using IRQ #45
883 17:35:41.904171 PCI 1F.3, PIN B, using IRQ #22
884 17:35:41.907198 PCI 1F.4, PIN C, using IRQ #23
885 17:35:41.910557 PCI 1F.6, PIN D, using IRQ #20
886 17:35:41.914145 PCI 1F.7, PIN A, using IRQ #21
887 17:35:41.917190 IRQ: Using dynamically assigned PCI IO-APIC IRQs
888 17:35:41.924062 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
889 17:35:42.104199 FSPS returned 0
890 17:35:42.107705 Executing Phase 1 of FspMultiPhaseSiInit
891 17:35:42.117516 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
892 17:35:42.121072 port C0 DISC req: usage 1 usb3 1 usb2 1
893 17:35:42.124582 Raw Buffer output 0 00000111
894 17:35:42.127417 Raw Buffer output 1 00000000
895 17:35:42.131101 pmc_send_ipc_cmd succeeded
896 17:35:42.137943 port C1 DISC req: usage 1 usb3 3 usb2 3
897 17:35:42.138109 Raw Buffer output 0 00000331
898 17:35:42.141460 Raw Buffer output 1 00000000
899 17:35:42.145512 pmc_send_ipc_cmd succeeded
900 17:35:42.149526 Detected 6 core, 8 thread CPU.
901 17:35:42.152219 Detected 6 core, 8 thread CPU.
902 17:35:42.157748 Detected 6 core, 8 thread CPU.
903 17:35:42.161104 Detected 6 core, 8 thread CPU.
904 17:35:42.163999 Detected 6 core, 8 thread CPU.
905 17:35:42.167881 Detected 6 core, 8 thread CPU.
906 17:35:42.170880 Detected 6 core, 8 thread CPU.
907 17:35:42.174385 Detected 6 core, 8 thread CPU.
908 17:35:42.177721 Detected 6 core, 8 thread CPU.
909 17:35:42.180785 Detected 6 core, 8 thread CPU.
910 17:35:42.184094 Detected 6 core, 8 thread CPU.
911 17:35:42.187328 Detected 6 core, 8 thread CPU.
912 17:35:42.190923 Detected 6 core, 8 thread CPU.
913 17:35:42.193983 Detected 6 core, 8 thread CPU.
914 17:35:42.197708 Detected 6 core, 8 thread CPU.
915 17:35:42.200550 Detected 6 core, 8 thread CPU.
916 17:35:42.204061 Detected 6 core, 8 thread CPU.
917 17:35:42.207184 Detected 6 core, 8 thread CPU.
918 17:35:42.210707 Detected 6 core, 8 thread CPU.
919 17:35:42.214150 Detected 6 core, 8 thread CPU.
920 17:35:42.217357 Detected 6 core, 8 thread CPU.
921 17:35:42.220602 Detected 6 core, 8 thread CPU.
922 17:35:42.511095 Detected 6 core, 8 thread CPU.
923 17:35:42.513836 Detected 6 core, 8 thread CPU.
924 17:35:42.517189 Detected 6 core, 8 thread CPU.
925 17:35:42.520598 Detected 6 core, 8 thread CPU.
926 17:35:42.523971 Detected 6 core, 8 thread CPU.
927 17:35:42.527527 Detected 6 core, 8 thread CPU.
928 17:35:42.530973 Detected 6 core, 8 thread CPU.
929 17:35:42.534230 Detected 6 core, 8 thread CPU.
930 17:35:42.537621 Detected 6 core, 8 thread CPU.
931 17:35:42.540405 Detected 6 core, 8 thread CPU.
932 17:35:42.543795 Detected 6 core, 8 thread CPU.
933 17:35:42.547142 Detected 6 core, 8 thread CPU.
934 17:35:42.550492 Detected 6 core, 8 thread CPU.
935 17:35:42.553788 Detected 6 core, 8 thread CPU.
936 17:35:42.557205 Detected 6 core, 8 thread CPU.
937 17:35:42.560577 Detected 6 core, 8 thread CPU.
938 17:35:42.564049 Detected 6 core, 8 thread CPU.
939 17:35:42.567239 Detected 6 core, 8 thread CPU.
940 17:35:42.570536 Detected 6 core, 8 thread CPU.
941 17:35:42.573825 Detected 6 core, 8 thread CPU.
942 17:35:42.576949 Display FSP Version Info HOB
943 17:35:42.580359 Reference Code - CPU = c.0.65.70
944 17:35:42.580462 uCode Version = 0.0.4.23
945 17:35:42.583698 TXT ACM version = ff.ff.ff.ffff
946 17:35:42.587027 Reference Code - ME = c.0.65.70
947 17:35:42.590685 MEBx version = 0.0.0.0
948 17:35:42.593992 ME Firmware Version = Lite SKU
949 17:35:42.596904 Reference Code - PCH = c.0.65.70
950 17:35:42.600196 PCH-CRID Status = Disabled
951 17:35:42.603634 PCH-CRID Original Value = ff.ff.ff.ffff
952 17:35:42.607163 PCH-CRID New Value = ff.ff.ff.ffff
953 17:35:42.610691 OPROM - RST - RAID = ff.ff.ff.ffff
954 17:35:42.613801 PCH Hsio Version = 4.0.0.0
955 17:35:42.617083 Reference Code - SA - System Agent = c.0.65.70
956 17:35:42.620611 Reference Code - MRC = 0.0.3.80
957 17:35:42.623511 SA - PCIe Version = c.0.65.70
958 17:35:42.626978 SA-CRID Status = Disabled
959 17:35:42.630430 SA-CRID Original Value = 0.0.0.4
960 17:35:42.633902 SA-CRID New Value = 0.0.0.4
961 17:35:42.637142 OPROM - VBIOS = ff.ff.ff.ffff
962 17:35:42.640046 IO Manageability Engine FW Version = 24.0.4.0
963 17:35:42.643457 PHY Build Version = 0.0.0.2016
964 17:35:42.646884 Thunderbolt(TM) FW Version = 0.0.0.0
965 17:35:42.653485 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
966 17:35:42.660315 BS: BS_DEV_INIT_CHIPS run times (exec / console): 491 / 507 ms
967 17:35:42.663495 Enumerating buses...
968 17:35:42.667051 Show all devs... Before device enumeration.
969 17:35:42.670264 Root Device: enabled 1
970 17:35:42.670366 CPU_CLUSTER: 0: enabled 1
971 17:35:42.673328 DOMAIN: 0000: enabled 1
972 17:35:42.676866 GPIO: 0: enabled 1
973 17:35:42.680098 PCI: 00:00.0: enabled 1
974 17:35:42.680198 PCI: 00:01.0: enabled 0
975 17:35:42.683270 PCI: 00:01.1: enabled 0
976 17:35:42.686622 PCI: 00:02.0: enabled 1
977 17:35:42.686714 PCI: 00:04.0: enabled 1
978 17:35:42.690092 PCI: 00:05.0: enabled 0
979 17:35:42.693593 PCI: 00:06.0: enabled 1
980 17:35:42.696752 PCI: 00:06.2: enabled 0
981 17:35:42.696864 PCI: 00:07.0: enabled 0
982 17:35:42.700503 PCI: 00:07.1: enabled 0
983 17:35:42.703326 PCI: 00:07.2: enabled 0
984 17:35:42.707131 PCI: 00:07.3: enabled 0
985 17:35:42.707210 PCI: 00:08.0: enabled 0
986 17:35:42.710059 PCI: 00:09.0: enabled 0
987 17:35:42.713548 PCI: 00:0a.0: enabled 1
988 17:35:42.716685 PCI: 00:0d.0: enabled 1
989 17:35:42.716771 PCI: 00:0d.1: enabled 0
990 17:35:42.720350 PCI: 00:0d.2: enabled 0
991 17:35:42.723509 PCI: 00:0d.3: enabled 0
992 17:35:42.723595 PCI: 00:0e.0: enabled 0
993 17:35:42.726685 PCI: 00:10.0: enabled 0
994 17:35:42.730252 PCI: 00:10.1: enabled 0
995 17:35:42.733635 PCI: 00:10.6: enabled 0
996 17:35:42.733721 PCI: 00:10.7: enabled 0
997 17:35:42.737096 PCI: 00:12.0: enabled 0
998 17:35:42.739788 PCI: 00:12.6: enabled 0
999 17:35:42.743361 PCI: 00:12.7: enabled 0
1000 17:35:42.743447 PCI: 00:13.0: enabled 0
1001 17:35:42.746441 PCI: 00:14.0: enabled 1
1002 17:35:42.749946 PCI: 00:14.1: enabled 0
1003 17:35:42.753316 PCI: 00:14.2: enabled 1
1004 17:35:42.753402 PCI: 00:14.3: enabled 1
1005 17:35:42.756817 PCI: 00:15.0: enabled 1
1006 17:35:42.760055 PCI: 00:15.1: enabled 1
1007 17:35:42.763678 PCI: 00:15.2: enabled 0
1008 17:35:42.763767 PCI: 00:15.3: enabled 1
1009 17:35:42.766248 PCI: 00:16.0: enabled 1
1010 17:35:42.770100 PCI: 00:16.1: enabled 0
1011 17:35:42.770192 PCI: 00:16.2: enabled 0
1012 17:35:42.773156 PCI: 00:16.3: enabled 0
1013 17:35:42.776498 PCI: 00:16.4: enabled 0
1014 17:35:42.779895 PCI: 00:16.5: enabled 0
1015 17:35:42.779982 PCI: 00:17.0: enabled 1
1016 17:35:42.783302 PCI: 00:19.0: enabled 0
1017 17:35:42.786761 PCI: 00:19.1: enabled 1
1018 17:35:42.789992 PCI: 00:19.2: enabled 0
1019 17:35:42.790083 PCI: 00:1a.0: enabled 0
1020 17:35:42.793529 PCI: 00:1c.0: enabled 0
1021 17:35:42.796974 PCI: 00:1c.1: enabled 0
1022 17:35:42.799801 PCI: 00:1c.2: enabled 0
1023 17:35:42.799923 PCI: 00:1c.3: enabled 0
1024 17:35:42.803245 PCI: 00:1c.4: enabled 0
1025 17:35:42.806314 PCI: 00:1c.5: enabled 0
1026 17:35:42.806398 PCI: 00:1c.6: enabled 0
1027 17:35:42.810006 PCI: 00:1c.7: enabled 0
1028 17:35:42.813456 PCI: 00:1d.0: enabled 0
1029 17:35:42.816730 PCI: 00:1d.1: enabled 0
1030 17:35:42.816833 PCI: 00:1d.2: enabled 0
1031 17:35:42.819606 PCI: 00:1d.3: enabled 0
1032 17:35:42.822880 PCI: 00:1e.0: enabled 1
1033 17:35:42.826524 PCI: 00:1e.1: enabled 0
1034 17:35:42.826607 PCI: 00:1e.2: enabled 0
1035 17:35:42.829521 PCI: 00:1e.3: enabled 1
1036 17:35:42.833118 PCI: 00:1f.0: enabled 1
1037 17:35:42.836034 PCI: 00:1f.1: enabled 0
1038 17:35:42.836119 PCI: 00:1f.2: enabled 1
1039 17:35:42.839647 PCI: 00:1f.3: enabled 1
1040 17:35:42.842941 PCI: 00:1f.4: enabled 0
1041 17:35:42.846565 PCI: 00:1f.5: enabled 1
1042 17:35:42.846648 PCI: 00:1f.6: enabled 0
1043 17:35:42.849366 PCI: 00:1f.7: enabled 0
1044 17:35:42.852563 GENERIC: 0.0: enabled 1
1045 17:35:42.852705 GENERIC: 0.0: enabled 1
1046 17:35:42.856427 GENERIC: 1.0: enabled 1
1047 17:35:42.859248 GENERIC: 0.0: enabled 1
1048 17:35:42.862730 GENERIC: 1.0: enabled 1
1049 17:35:42.862816 USB0 port 0: enabled 1
1050 17:35:42.865998 USB0 port 0: enabled 1
1051 17:35:42.869402 GENERIC: 0.0: enabled 1
1052 17:35:42.872722 I2C: 00:1a: enabled 1
1053 17:35:42.872831 I2C: 00:31: enabled 1
1054 17:35:42.876398 I2C: 00:32: enabled 1
1055 17:35:42.879267 I2C: 00:50: enabled 1
1056 17:35:42.879374 I2C: 00:10: enabled 1
1057 17:35:42.882688 I2C: 00:15: enabled 1
1058 17:35:42.886093 I2C: 00:2c: enabled 1
1059 17:35:42.886199 GENERIC: 0.0: enabled 1
1060 17:35:42.889505 SPI: 00: enabled 1
1061 17:35:42.892576 PNP: 0c09.0: enabled 1
1062 17:35:42.892667 GENERIC: 0.0: enabled 1
1063 17:35:42.896104 USB3 port 0: enabled 1
1064 17:35:42.899496 USB3 port 1: enabled 0
1065 17:35:42.899597 USB3 port 2: enabled 1
1066 17:35:42.902609 USB3 port 3: enabled 0
1067 17:35:42.905995 USB2 port 0: enabled 1
1068 17:35:42.909225 USB2 port 1: enabled 0
1069 17:35:42.909308 USB2 port 2: enabled 1
1070 17:35:42.912520 USB2 port 3: enabled 0
1071 17:35:42.915925 USB2 port 4: enabled 0
1072 17:35:42.916035 USB2 port 5: enabled 1
1073 17:35:42.919207 USB2 port 6: enabled 0
1074 17:35:42.922921 USB2 port 7: enabled 0
1075 17:35:42.925607 USB2 port 8: enabled 1
1076 17:35:42.925744 USB2 port 9: enabled 1
1077 17:35:42.929228 USB3 port 0: enabled 1
1078 17:35:42.932493 USB3 port 1: enabled 0
1079 17:35:42.932657 USB3 port 2: enabled 0
1080 17:35:42.935801 USB3 port 3: enabled 0
1081 17:35:42.939172 GENERIC: 0.0: enabled 1
1082 17:35:42.942340 GENERIC: 1.0: enabled 1
1083 17:35:42.942487 APIC: 00: enabled 1
1084 17:35:42.945817 APIC: 16: enabled 1
1085 17:35:42.945921 APIC: 10: enabled 1
1086 17:35:42.949307 APIC: 12: enabled 1
1087 17:35:42.952419 APIC: 14: enabled 1
1088 17:35:42.952518 APIC: 09: enabled 1
1089 17:35:42.955883 APIC: 01: enabled 1
1090 17:35:42.955980 APIC: 08: enabled 1
1091 17:35:42.959068 Compare with tree...
1092 17:35:42.962237 Root Device: enabled 1
1093 17:35:42.965550 CPU_CLUSTER: 0: enabled 1
1094 17:35:42.965683 APIC: 00: enabled 1
1095 17:35:42.968926 APIC: 16: enabled 1
1096 17:35:42.972207 APIC: 10: enabled 1
1097 17:35:42.972300 APIC: 12: enabled 1
1098 17:35:42.975498 APIC: 14: enabled 1
1099 17:35:42.979030 APIC: 09: enabled 1
1100 17:35:42.979113 APIC: 01: enabled 1
1101 17:35:42.982343 APIC: 08: enabled 1
1102 17:35:42.985776 DOMAIN: 0000: enabled 1
1103 17:35:42.985885 GPIO: 0: enabled 1
1104 17:35:42.989118 PCI: 00:00.0: enabled 1
1105 17:35:42.992651 PCI: 00:01.0: enabled 0
1106 17:35:42.995887 PCI: 00:01.1: enabled 0
1107 17:35:42.998793 PCI: 00:02.0: enabled 1
1108 17:35:42.998863 PCI: 00:04.0: enabled 1
1109 17:35:43.002123 GENERIC: 0.0: enabled 1
1110 17:35:43.005833 PCI: 00:05.0: enabled 0
1111 17:35:43.008839 PCI: 00:06.0: enabled 1
1112 17:35:43.012599 PCI: 00:06.2: enabled 0
1113 17:35:43.012703 PCI: 00:08.0: enabled 0
1114 17:35:43.015770 PCI: 00:09.0: enabled 0
1115 17:35:43.018924 PCI: 00:0a.0: enabled 1
1116 17:35:43.022406 PCI: 00:0d.0: enabled 1
1117 17:35:43.025372 USB0 port 0: enabled 1
1118 17:35:43.025474 USB3 port 0: enabled 1
1119 17:35:43.028861 USB3 port 1: enabled 0
1120 17:35:43.032248 USB3 port 2: enabled 1
1121 17:35:43.035561 USB3 port 3: enabled 0
1122 17:35:43.038697 PCI: 00:0d.1: enabled 0
1123 17:35:43.038772 PCI: 00:0d.2: enabled 0
1124 17:35:43.042119 PCI: 00:0d.3: enabled 0
1125 17:35:43.045778 PCI: 00:0e.0: enabled 0
1126 17:35:43.048605 PCI: 00:10.0: enabled 0
1127 17:35:43.052063 PCI: 00:10.1: enabled 0
1128 17:35:43.052145 PCI: 00:10.6: enabled 0
1129 17:35:43.055181 PCI: 00:10.7: enabled 0
1130 17:35:43.058648 PCI: 00:12.0: enabled 0
1131 17:35:43.062109 PCI: 00:12.6: enabled 0
1132 17:35:43.065527 PCI: 00:12.7: enabled 0
1133 17:35:43.065614 PCI: 00:13.0: enabled 0
1134 17:35:43.068680 PCI: 00:14.0: enabled 1
1135 17:35:43.071938 USB0 port 0: enabled 1
1136 17:35:43.075234 USB2 port 0: enabled 1
1137 17:35:43.078670 USB2 port 1: enabled 0
1138 17:35:43.078758 USB2 port 2: enabled 1
1139 17:35:43.081856 USB2 port 3: enabled 0
1140 17:35:43.085668 USB2 port 4: enabled 0
1141 17:35:43.089017 USB2 port 5: enabled 1
1142 17:35:43.091856 USB2 port 6: enabled 0
1143 17:35:43.095315 USB2 port 7: enabled 0
1144 17:35:43.095423 USB2 port 8: enabled 1
1145 17:35:43.098645 USB2 port 9: enabled 1
1146 17:35:43.101915 USB3 port 0: enabled 1
1147 17:35:43.105523 USB3 port 1: enabled 0
1148 17:35:43.108668 USB3 port 2: enabled 0
1149 17:35:43.112181 USB3 port 3: enabled 0
1150 17:35:43.112295 PCI: 00:14.1: enabled 0
1151 17:35:43.114965 PCI: 00:14.2: enabled 1
1152 17:35:43.118927 PCI: 00:14.3: enabled 1
1153 17:35:43.121589 GENERIC: 0.0: enabled 1
1154 17:35:43.125260 PCI: 00:15.0: enabled 1
1155 17:35:43.125341 I2C: 00:1a: enabled 1
1156 17:35:43.128642 I2C: 00:31: enabled 1
1157 17:35:43.131570 I2C: 00:32: enabled 1
1158 17:35:43.135395 PCI: 00:15.1: enabled 1
1159 17:35:43.135474 I2C: 00:50: enabled 1
1160 17:35:43.138330 PCI: 00:15.2: enabled 0
1161 17:35:43.141712 PCI: 00:15.3: enabled 1
1162 17:35:43.145079 I2C: 00:10: enabled 1
1163 17:35:43.148387 PCI: 00:16.0: enabled 1
1164 17:35:43.148471 PCI: 00:16.1: enabled 0
1165 17:35:43.151630 PCI: 00:16.2: enabled 0
1166 17:35:43.155298 PCI: 00:16.3: enabled 0
1167 17:35:43.158314 PCI: 00:16.4: enabled 0
1168 17:35:43.161189 PCI: 00:16.5: enabled 0
1169 17:35:43.161268 PCI: 00:17.0: enabled 1
1170 17:35:43.164662 PCI: 00:19.0: enabled 0
1171 17:35:43.168255 PCI: 00:19.1: enabled 1
1172 17:35:43.171714 I2C: 00:15: enabled 1
1173 17:35:43.175085 I2C: 00:2c: enabled 1
1174 17:35:43.175162 PCI: 00:19.2: enabled 0
1175 17:35:43.177898 PCI: 00:1a.0: enabled 0
1176 17:35:43.181059 PCI: 00:1e.0: enabled 1
1177 17:35:43.184626 PCI: 00:1e.1: enabled 0
1178 17:35:43.184710 PCI: 00:1e.2: enabled 0
1179 17:35:43.187828 PCI: 00:1e.3: enabled 1
1180 17:35:43.191277 SPI: 00: enabled 1
1181 17:35:43.194651 PCI: 00:1f.0: enabled 1
1182 17:35:43.197627 PNP: 0c09.0: enabled 1
1183 17:35:43.197712 PCI: 00:1f.1: enabled 0
1184 17:35:43.201252 PCI: 00:1f.2: enabled 1
1185 17:35:43.204545 GENERIC: 0.0: enabled 1
1186 17:35:43.207842 GENERIC: 0.0: enabled 1
1187 17:35:43.211217 GENERIC: 1.0: enabled 1
1188 17:35:43.211302 PCI: 00:1f.3: enabled 1
1189 17:35:43.214630 PCI: 00:1f.4: enabled 0
1190 17:35:43.217740 PCI: 00:1f.5: enabled 1
1191 17:35:43.221211 PCI: 00:1f.6: enabled 0
1192 17:35:43.224667 PCI: 00:1f.7: enabled 0
1193 17:35:43.224751 Root Device scanning...
1194 17:35:43.227962 scan_static_bus for Root Device
1195 17:35:43.231201 CPU_CLUSTER: 0 enabled
1196 17:35:43.234524 DOMAIN: 0000 enabled
1197 17:35:43.234607 DOMAIN: 0000 scanning...
1198 17:35:43.237803 PCI: pci_scan_bus for bus 00
1199 17:35:43.241278 PCI: 00:00.0 [8086/0000] ops
1200 17:35:43.244802 PCI: 00:00.0 [8086/4609] enabled
1201 17:35:43.248138 PCI: 00:02.0 [8086/0000] bus ops
1202 17:35:43.251055 PCI: 00:02.0 [8086/46b3] enabled
1203 17:35:43.254396 PCI: 00:04.0 [8086/0000] bus ops
1204 17:35:43.257659 PCI: 00:04.0 [8086/461d] enabled
1205 17:35:43.260971 PCI: 00:06.0 [8086/0000] bus ops
1206 17:35:43.264461 PCI: 00:06.0 [8086/464d] enabled
1207 17:35:43.267803 PCI: 00:08.0 [8086/464f] disabled
1208 17:35:43.271274 PCI: 00:0a.0 [8086/467d] enabled
1209 17:35:43.274601 PCI: 00:0d.0 [8086/0000] bus ops
1210 17:35:43.277456 PCI: 00:0d.0 [8086/461e] enabled
1211 17:35:43.281540 PCI: 00:14.0 [8086/0000] bus ops
1212 17:35:43.284767 PCI: 00:14.0 [8086/51ed] enabled
1213 17:35:43.287933 PCI: 00:14.2 [8086/51ef] enabled
1214 17:35:43.291386 PCI: 00:14.3 [8086/0000] bus ops
1215 17:35:43.294629 PCI: 00:14.3 [8086/51f0] enabled
1216 17:35:43.297763 PCI: 00:15.0 [8086/0000] bus ops
1217 17:35:43.301329 PCI: 00:15.0 [8086/51e8] enabled
1218 17:35:43.304736 PCI: 00:15.1 [8086/0000] bus ops
1219 17:35:43.308033 PCI: 00:15.1 [8086/51e9] enabled
1220 17:35:43.311158 PCI: 00:15.2 [8086/0000] bus ops
1221 17:35:43.318031 PCI: 00:15.2 [8086/51ea] disabled
1222 17:35:43.321508 PCI: 00:15.3 [8086/0000] bus ops
1223 17:35:43.324668 PCI: 00:15.3 [8086/51eb] enabled
1224 17:35:43.324753 PCI: 00:16.0 [8086/0000] ops
1225 17:35:43.328214 PCI: 00:16.0 [8086/51e0] enabled
1226 17:35:43.334543 PCI: Static device PCI: 00:17.0 not found, disabling it.
1227 17:35:43.337937 PCI: 00:19.0 [8086/0000] bus ops
1228 17:35:43.341351 PCI: 00:19.0 [8086/51c5] disabled
1229 17:35:43.344244 PCI: 00:19.1 [8086/0000] bus ops
1230 17:35:43.347733 PCI: 00:19.1 [8086/51c6] enabled
1231 17:35:43.351246 PCI: 00:1e.0 [8086/0000] ops
1232 17:35:43.354654 PCI: 00:1e.0 [8086/51a8] enabled
1233 17:35:43.358083 PCI: 00:1e.3 [8086/0000] bus ops
1234 17:35:43.361186 PCI: 00:1e.3 [8086/51ab] enabled
1235 17:35:43.364736 PCI: 00:1f.0 [8086/0000] bus ops
1236 17:35:43.367919 PCI: 00:1f.0 [8086/5182] enabled
1237 17:35:43.371160 RTC Init
1238 17:35:43.374329 Set power on after power failure.
1239 17:35:43.377480 Disabling Deep S3
1240 17:35:43.377565 Disabling Deep S3
1241 17:35:43.380784 Disabling Deep S4
1242 17:35:43.380869 Disabling Deep S4
1243 17:35:43.384321 Disabling Deep S5
1244 17:35:43.384410 Disabling Deep S5
1245 17:35:43.387698 PCI: 00:1f.2 [0000/0000] hidden
1246 17:35:43.391042 PCI: 00:1f.3 [8086/0000] bus ops
1247 17:35:43.394497 PCI: 00:1f.3 [8086/51c8] enabled
1248 17:35:43.397987 PCI: 00:1f.5 [8086/0000] bus ops
1249 17:35:43.400789 PCI: 00:1f.5 [8086/51a4] enabled
1250 17:35:43.404473 GPIO: 0 enabled
1251 17:35:43.407414 PCI: Leftover static devices:
1252 17:35:43.407517 PCI: 00:01.0
1253 17:35:43.410798 PCI: 00:01.1
1254 17:35:43.410916 PCI: 00:05.0
1255 17:35:43.411011 PCI: 00:06.2
1256 17:35:43.414127 PCI: 00:09.0
1257 17:35:43.414237 PCI: 00:0d.1
1258 17:35:43.417466 PCI: 00:0d.2
1259 17:35:43.417547 PCI: 00:0d.3
1260 17:35:43.417630 PCI: 00:0e.0
1261 17:35:43.420593 PCI: 00:10.0
1262 17:35:43.420676 PCI: 00:10.1
1263 17:35:43.424171 PCI: 00:10.6
1264 17:35:43.424255 PCI: 00:10.7
1265 17:35:43.427217 PCI: 00:12.0
1266 17:35:43.427322 PCI: 00:12.6
1267 17:35:43.427409 PCI: 00:12.7
1268 17:35:43.430748 PCI: 00:13.0
1269 17:35:43.430829 PCI: 00:14.1
1270 17:35:43.434318 PCI: 00:16.1
1271 17:35:43.434418 PCI: 00:16.2
1272 17:35:43.434492 PCI: 00:16.3
1273 17:35:43.437778 PCI: 00:16.4
1274 17:35:43.437934 PCI: 00:16.5
1275 17:35:43.440565 PCI: 00:17.0
1276 17:35:43.440662 PCI: 00:19.2
1277 17:35:43.440745 PCI: 00:1a.0
1278 17:35:43.443923 PCI: 00:1e.1
1279 17:35:43.444005 PCI: 00:1e.2
1280 17:35:43.447314 PCI: 00:1f.1
1281 17:35:43.447441 PCI: 00:1f.4
1282 17:35:43.450925 PCI: 00:1f.6
1283 17:35:43.451032 PCI: 00:1f.7
1284 17:35:43.454075 PCI: Check your devicetree.cb.
1285 17:35:43.457617 PCI: 00:02.0 scanning...
1286 17:35:43.460960 scan_generic_bus for PCI: 00:02.0
1287 17:35:43.463851 scan_generic_bus for PCI: 00:02.0 done
1288 17:35:43.467161 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1289 17:35:43.470622 PCI: 00:04.0 scanning...
1290 17:35:43.473705 scan_generic_bus for PCI: 00:04.0
1291 17:35:43.477280 GENERIC: 0.0 enabled
1292 17:35:43.483869 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1293 17:35:43.486988 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1294 17:35:43.490574 PCI: 00:06.0 scanning...
1295 17:35:43.493746 do_pci_scan_bridge for PCI: 00:06.0
1296 17:35:43.497326 PCI: pci_scan_bus for bus 01
1297 17:35:43.500249 PCI: 01:00.0 [15b7/5009] enabled
1298 17:35:43.503508 Enabling Common Clock Configuration
1299 17:35:43.506976 L1 Sub-State supported from root port 6
1300 17:35:43.510336 L1 Sub-State Support = 0x5
1301 17:35:43.513435 CommonModeRestoreTime = 0x6e
1302 17:35:43.516782 Power On Value = 0x5, Power On Scale = 0x2
1303 17:35:43.520225 ASPM: Enabled L1
1304 17:35:43.523667 PCIe: Max_Payload_Size adjusted to 256
1305 17:35:43.527210 PCI: 01:00.0: Enabled LTR
1306 17:35:43.530259 PCI: 01:00.0: Programmed LTR max latencies
1307 17:35:43.533817 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1308 17:35:43.536759 PCI: 00:0d.0 scanning...
1309 17:35:43.540457 scan_static_bus for PCI: 00:0d.0
1310 17:35:43.543282 USB0 port 0 enabled
1311 17:35:43.543394 USB0 port 0 scanning...
1312 17:35:43.546755 scan_static_bus for USB0 port 0
1313 17:35:43.550296 USB3 port 0 enabled
1314 17:35:43.553811 USB3 port 1 disabled
1315 17:35:43.553939 USB3 port 2 enabled
1316 17:35:43.557005 USB3 port 3 disabled
1317 17:35:43.560029 USB3 port 0 scanning...
1318 17:35:43.563215 scan_static_bus for USB3 port 0
1319 17:35:43.566713 scan_static_bus for USB3 port 0 done
1320 17:35:43.570375 scan_bus: bus USB3 port 0 finished in 6 msecs
1321 17:35:43.573734 USB3 port 2 scanning...
1322 17:35:43.577168 scan_static_bus for USB3 port 2
1323 17:35:43.580010 scan_static_bus for USB3 port 2 done
1324 17:35:43.583843 scan_bus: bus USB3 port 2 finished in 6 msecs
1325 17:35:43.586503 scan_static_bus for USB0 port 0 done
1326 17:35:43.593191 scan_bus: bus USB0 port 0 finished in 43 msecs
1327 17:35:43.597004 scan_static_bus for PCI: 00:0d.0 done
1328 17:35:43.600317 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1329 17:35:43.603121 PCI: 00:14.0 scanning...
1330 17:35:43.606597 scan_static_bus for PCI: 00:14.0
1331 17:35:43.609824 USB0 port 0 enabled
1332 17:35:43.613218 USB0 port 0 scanning...
1333 17:35:43.616771 scan_static_bus for USB0 port 0
1334 17:35:43.616855 USB2 port 0 enabled
1335 17:35:43.620239 USB2 port 1 disabled
1336 17:35:43.620322 USB2 port 2 enabled
1337 17:35:43.623191 USB2 port 3 disabled
1338 17:35:43.626520 USB2 port 4 disabled
1339 17:35:43.626634 USB2 port 5 enabled
1340 17:35:43.629988 USB2 port 6 disabled
1341 17:35:43.633251 USB2 port 7 disabled
1342 17:35:43.633357 USB2 port 8 enabled
1343 17:35:43.636609 USB2 port 9 enabled
1344 17:35:43.639953 USB3 port 0 enabled
1345 17:35:43.640066 USB3 port 1 disabled
1346 17:35:43.643531 USB3 port 2 disabled
1347 17:35:43.643641 USB3 port 3 disabled
1348 17:35:43.646772 USB2 port 0 scanning...
1349 17:35:43.650036 scan_static_bus for USB2 port 0
1350 17:35:43.653115 scan_static_bus for USB2 port 0 done
1351 17:35:43.659589 scan_bus: bus USB2 port 0 finished in 6 msecs
1352 17:35:43.659694 USB2 port 2 scanning...
1353 17:35:43.663518 scan_static_bus for USB2 port 2
1354 17:35:43.666189 scan_static_bus for USB2 port 2 done
1355 17:35:43.672938 scan_bus: bus USB2 port 2 finished in 6 msecs
1356 17:35:43.676230 USB2 port 5 scanning...
1357 17:35:43.679858 scan_static_bus for USB2 port 5
1358 17:35:43.683367 scan_static_bus for USB2 port 5 done
1359 17:35:43.686260 scan_bus: bus USB2 port 5 finished in 6 msecs
1360 17:35:43.689938 USB2 port 8 scanning...
1361 17:35:43.692802 scan_static_bus for USB2 port 8
1362 17:35:43.696731 scan_static_bus for USB2 port 8 done
1363 17:35:43.699712 scan_bus: bus USB2 port 8 finished in 6 msecs
1364 17:35:43.702887 USB2 port 9 scanning...
1365 17:35:43.706134 scan_static_bus for USB2 port 9
1366 17:35:43.709522 scan_static_bus for USB2 port 9 done
1367 17:35:43.713151 scan_bus: bus USB2 port 9 finished in 6 msecs
1368 17:35:43.715959 USB3 port 0 scanning...
1369 17:35:43.719536 scan_static_bus for USB3 port 0
1370 17:35:43.723041 scan_static_bus for USB3 port 0 done
1371 17:35:43.729552 scan_bus: bus USB3 port 0 finished in 6 msecs
1372 17:35:43.732745 scan_static_bus for USB0 port 0 done
1373 17:35:43.736047 scan_bus: bus USB0 port 0 finished in 120 msecs
1374 17:35:43.739420 scan_static_bus for PCI: 00:14.0 done
1375 17:35:43.746596 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1376 17:35:43.749497 PCI: 00:14.3 scanning...
1377 17:35:43.752554 scan_static_bus for PCI: 00:14.3
1378 17:35:43.752666 GENERIC: 0.0 enabled
1379 17:35:43.756246 scan_static_bus for PCI: 00:14.3 done
1380 17:35:43.762908 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1381 17:35:43.766232 PCI: 00:15.0 scanning...
1382 17:35:43.769845 scan_static_bus for PCI: 00:15.0
1383 17:35:43.769963 I2C: 00:1a enabled
1384 17:35:43.772534 I2C: 00:31 enabled
1385 17:35:43.772635 I2C: 00:32 enabled
1386 17:35:43.779104 scan_static_bus for PCI: 00:15.0 done
1387 17:35:43.782628 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1388 17:35:43.786099 PCI: 00:15.1 scanning...
1389 17:35:43.789264 scan_static_bus for PCI: 00:15.1
1390 17:35:43.789372 I2C: 00:50 enabled
1391 17:35:43.792561 scan_static_bus for PCI: 00:15.1 done
1392 17:35:43.799207 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1393 17:35:43.802585 PCI: 00:15.3 scanning...
1394 17:35:43.805834 scan_static_bus for PCI: 00:15.3
1395 17:35:43.805913 I2C: 00:10 enabled
1396 17:35:43.809303 scan_static_bus for PCI: 00:15.3 done
1397 17:35:43.816197 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1398 17:35:43.819045 PCI: 00:19.1 scanning...
1399 17:35:43.822384 scan_static_bus for PCI: 00:19.1
1400 17:35:43.822492 I2C: 00:15 enabled
1401 17:35:43.825750 I2C: 00:2c enabled
1402 17:35:43.829072 scan_static_bus for PCI: 00:19.1 done
1403 17:35:43.832387 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1404 17:35:43.835806 PCI: 00:1e.3 scanning...
1405 17:35:43.838790 scan_generic_bus for PCI: 00:1e.3
1406 17:35:43.842209 SPI: 00 enabled
1407 17:35:43.845649 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1408 17:35:43.852436 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1409 17:35:43.855768 PCI: 00:1f.0 scanning...
1410 17:35:43.858650 scan_static_bus for PCI: 00:1f.0
1411 17:35:43.858764 PNP: 0c09.0 enabled
1412 17:35:43.862257 PNP: 0c09.0 scanning...
1413 17:35:43.865395 scan_static_bus for PNP: 0c09.0
1414 17:35:43.868670 scan_static_bus for PNP: 0c09.0 done
1415 17:35:43.875400 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1416 17:35:43.878855 scan_static_bus for PCI: 00:1f.0 done
1417 17:35:43.882399 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1418 17:35:43.885536 PCI: 00:1f.2 scanning...
1419 17:35:43.888882 scan_static_bus for PCI: 00:1f.2
1420 17:35:43.892353 GENERIC: 0.0 enabled
1421 17:35:43.892462 GENERIC: 0.0 scanning...
1422 17:35:43.895525 scan_static_bus for GENERIC: 0.0
1423 17:35:43.898788 GENERIC: 0.0 enabled
1424 17:35:43.901748 GENERIC: 1.0 enabled
1425 17:35:43.905310 scan_static_bus for GENERIC: 0.0 done
1426 17:35:43.908851 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1427 17:35:43.912055 scan_static_bus for PCI: 00:1f.2 done
1428 17:35:43.918730 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1429 17:35:43.921971 PCI: 00:1f.3 scanning...
1430 17:35:43.925371 scan_static_bus for PCI: 00:1f.3
1431 17:35:43.928351 scan_static_bus for PCI: 00:1f.3 done
1432 17:35:43.932120 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1433 17:35:43.934948 PCI: 00:1f.5 scanning...
1434 17:35:43.938329 scan_generic_bus for PCI: 00:1f.5
1435 17:35:43.942169 scan_generic_bus for PCI: 00:1f.5 done
1436 17:35:43.945201 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1437 17:35:43.951796 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1438 17:35:43.955403 scan_static_bus for Root Device done
1439 17:35:43.958181 scan_bus: bus Root Device finished in 729 msecs
1440 17:35:43.961640 done
1441 17:35:43.964848 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1442 17:35:43.971975 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1443 17:35:43.978621 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1444 17:35:43.981588 SPI flash protection: WPSW=1 SRP0=0
1445 17:35:43.988476 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1446 17:35:43.991736 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1447 17:35:43.995005 found VGA at PCI: 00:02.0
1448 17:35:43.998320 Setting up VGA for PCI: 00:02.0
1449 17:35:44.005124 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1450 17:35:44.008218 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1451 17:35:44.011690 Allocating resources...
1452 17:35:44.014811 Reading resources...
1453 17:35:44.018312 Root Device read_resources bus 0 link: 0
1454 17:35:44.021710 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1455 17:35:44.028665 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1456 17:35:44.031397 DOMAIN: 0000 read_resources bus 0 link: 0
1457 17:35:44.038521 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1458 17:35:44.044891 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1459 17:35:44.048303 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1460 17:35:44.055011 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1461 17:35:44.061407 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1462 17:35:44.068059 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1463 17:35:44.074492 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1464 17:35:44.081032 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1465 17:35:44.087739 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1466 17:35:44.094603 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1467 17:35:44.101237 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1468 17:35:44.108056 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1469 17:35:44.114227 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1470 17:35:44.120945 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1471 17:35:44.124417 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1472 17:35:44.131012 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1473 17:35:44.137666 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1474 17:35:44.144871 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1475 17:35:44.150964 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1476 17:35:44.157653 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1477 17:35:44.164580 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1478 17:35:44.167536 PCI: 00:04.0 read_resources bus 1 link: 0
1479 17:35:44.171064 PCI: 00:04.0 read_resources bus 1 link: 0 done
1480 17:35:44.177447 PCI: 00:06.0 read_resources bus 1 link: 0
1481 17:35:44.180870 PCI: 00:06.0 read_resources bus 1 link: 0 done
1482 17:35:44.184249 PCI: 00:0d.0 read_resources bus 0 link: 0
1483 17:35:44.190450 USB0 port 0 read_resources bus 0 link: 0
1484 17:35:44.193921 USB0 port 0 read_resources bus 0 link: 0 done
1485 17:35:44.200679 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1486 17:35:44.204040 PCI: 00:14.0 read_resources bus 0 link: 0
1487 17:35:44.207191 USB0 port 0 read_resources bus 0 link: 0
1488 17:35:44.210452 USB0 port 0 read_resources bus 0 link: 0 done
1489 17:35:44.217226 PCI: 00:14.0 read_resources bus 0 link: 0 done
1490 17:35:44.220383 PCI: 00:14.3 read_resources bus 0 link: 0
1491 17:35:44.227359 PCI: 00:14.3 read_resources bus 0 link: 0 done
1492 17:35:44.230396 PCI: 00:15.0 read_resources bus 0 link: 0
1493 17:35:44.234109 PCI: 00:15.0 read_resources bus 0 link: 0 done
1494 17:35:44.240795 PCI: 00:15.1 read_resources bus 0 link: 0
1495 17:35:44.243770 PCI: 00:15.1 read_resources bus 0 link: 0 done
1496 17:35:44.247213 PCI: 00:15.3 read_resources bus 0 link: 0
1497 17:35:44.253606 PCI: 00:15.3 read_resources bus 0 link: 0 done
1498 17:35:44.257172 PCI: 00:19.1 read_resources bus 0 link: 0
1499 17:35:44.260660 PCI: 00:19.1 read_resources bus 0 link: 0 done
1500 17:35:44.266784 PCI: 00:1e.3 read_resources bus 2 link: 0
1501 17:35:44.270362 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1502 17:35:44.273655 PCI: 00:1f.0 read_resources bus 0 link: 0
1503 17:35:44.280546 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1504 17:35:44.283565 PCI: 00:1f.2 read_resources bus 0 link: 0
1505 17:35:44.286920 GENERIC: 0.0 read_resources bus 0 link: 0
1506 17:35:44.293832 GENERIC: 0.0 read_resources bus 0 link: 0 done
1507 17:35:44.297363 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1508 17:35:44.303803 DOMAIN: 0000 read_resources bus 0 link: 0 done
1509 17:35:44.306642 Root Device read_resources bus 0 link: 0 done
1510 17:35:44.309972 Done reading resources.
1511 17:35:44.316801 Show resources in subtree (Root Device)...After reading.
1512 17:35:44.320038 Root Device child on link 0 CPU_CLUSTER: 0
1513 17:35:44.323551 CPU_CLUSTER: 0 child on link 0 APIC: 00
1514 17:35:44.326931 APIC: 00
1515 17:35:44.327031 APIC: 16
1516 17:35:44.327124 APIC: 10
1517 17:35:44.330331 APIC: 12
1518 17:35:44.330437 APIC: 14
1519 17:35:44.333612 APIC: 09
1520 17:35:44.333714 APIC: 01
1521 17:35:44.333804 APIC: 08
1522 17:35:44.336772 DOMAIN: 0000 child on link 0 GPIO: 0
1523 17:35:44.346729 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1524 17:35:44.357071 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1525 17:35:44.360295 GPIO: 0
1526 17:35:44.360377 PCI: 00:00.0
1527 17:35:44.370124 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1528 17:35:44.379798 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1529 17:35:44.390197 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1530 17:35:44.396646 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1531 17:35:44.406158 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1532 17:35:44.416200 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1533 17:35:44.426372 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1534 17:35:44.435998 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1535 17:35:44.446259 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1536 17:35:44.455959 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1537 17:35:44.462962 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1538 17:35:44.472520 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1539 17:35:44.482642 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1540 17:35:44.492340 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1541 17:35:44.502675 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1542 17:35:44.512576 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1543 17:35:44.519399 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1544 17:35:44.529096 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1545 17:35:44.539362 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1546 17:35:44.548780 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1547 17:35:44.558564 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1548 17:35:44.568591 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1549 17:35:44.578547 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1550 17:35:44.588823 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1551 17:35:44.598543 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1552 17:35:44.605228 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1553 17:35:44.615344 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1554 17:35:44.625251 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1555 17:35:44.628298 PCI: 00:02.0
1556 17:35:44.638174 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1557 17:35:44.648281 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1558 17:35:44.655213 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1559 17:35:44.661501 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1560 17:35:44.671781 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1561 17:35:44.671902 GENERIC: 0.0
1562 17:35:44.677897 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1563 17:35:44.684982 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1564 17:35:44.694640 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1565 17:35:44.704578 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1566 17:35:44.708403 PCI: 01:00.0
1567 17:35:44.717878 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1568 17:35:44.727782 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1569 17:35:44.727868 PCI: 00:08.0
1570 17:35:44.731163 PCI: 00:0a.0
1571 17:35:44.741408 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1572 17:35:44.744248 PCI: 00:0d.0 child on link 0 USB0 port 0
1573 17:35:44.754201 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1574 17:35:44.757713 USB0 port 0 child on link 0 USB3 port 0
1575 17:35:44.761072 USB3 port 0
1576 17:35:44.761183 USB3 port 1
1577 17:35:44.764463 USB3 port 2
1578 17:35:44.764544 USB3 port 3
1579 17:35:44.770964 PCI: 00:14.0 child on link 0 USB0 port 0
1580 17:35:44.780931 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1581 17:35:44.784442 USB0 port 0 child on link 0 USB2 port 0
1582 17:35:44.787796 USB2 port 0
1583 17:35:44.787877 USB2 port 1
1584 17:35:44.790743 USB2 port 2
1585 17:35:44.790851 USB2 port 3
1586 17:35:44.794066 USB2 port 4
1587 17:35:44.794172 USB2 port 5
1588 17:35:44.797465 USB2 port 6
1589 17:35:44.797578 USB2 port 7
1590 17:35:44.801123 USB2 port 8
1591 17:35:44.801206 USB2 port 9
1592 17:35:44.804752 USB3 port 0
1593 17:35:44.804836 USB3 port 1
1594 17:35:44.807596 USB3 port 2
1595 17:35:44.811055 USB3 port 3
1596 17:35:44.811139 PCI: 00:14.2
1597 17:35:44.820759 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1598 17:35:44.830468 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1599 17:35:44.833849 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1600 17:35:44.844073 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1601 17:35:44.847162 GENERIC: 0.0
1602 17:35:44.850453 PCI: 00:15.0 child on link 0 I2C: 00:1a
1603 17:35:44.861004 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1604 17:35:44.864031 I2C: 00:1a
1605 17:35:44.864139 I2C: 00:31
1606 17:35:44.867212 I2C: 00:32
1607 17:35:44.870426 PCI: 00:15.1 child on link 0 I2C: 00:50
1608 17:35:44.880652 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1609 17:35:44.880743 I2C: 00:50
1610 17:35:44.883950 PCI: 00:15.2
1611 17:35:44.887325 PCI: 00:15.3 child on link 0 I2C: 00:10
1612 17:35:44.897442 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1613 17:35:44.900749 I2C: 00:10
1614 17:35:44.900833 PCI: 00:16.0
1615 17:35:44.910509 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1616 17:35:44.913790 PCI: 00:19.0
1617 17:35:44.917095 PCI: 00:19.1 child on link 0 I2C: 00:15
1618 17:35:44.926984 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1619 17:35:44.927069 I2C: 00:15
1620 17:35:44.930464 I2C: 00:2c
1621 17:35:44.930547 PCI: 00:1e.0
1622 17:35:44.943525 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1623 17:35:44.946944 PCI: 00:1e.3 child on link 0 SPI: 00
1624 17:35:44.957082 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1625 17:35:44.957167 SPI: 00
1626 17:35:44.963537 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1627 17:35:44.970049 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1628 17:35:44.973301 PNP: 0c09.0
1629 17:35:44.983248 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1630 17:35:44.986419 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1631 17:35:44.996255 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1632 17:35:45.003119 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1633 17:35:45.009608 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1634 17:35:45.009712 GENERIC: 0.0
1635 17:35:45.012634 GENERIC: 1.0
1636 17:35:45.016307 PCI: 00:1f.3
1637 17:35:45.026040 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1638 17:35:45.036453 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1639 17:35:45.036567 PCI: 00:1f.5
1640 17:35:45.046350 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1641 17:35:45.052457 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1642 17:35:45.059226 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1643 17:35:45.065759 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1644 17:35:45.072754 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1645 17:35:45.075723 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1646 17:35:45.079282 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1647 17:35:45.085554 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1648 17:35:45.092411 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1649 17:35:45.102294 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1650 17:35:45.109181 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1651 17:35:45.115687 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1652 17:35:45.122372 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1653 17:35:45.129592 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1654 17:35:45.138881 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1655 17:35:45.142420 DOMAIN: 0000: Resource ranges:
1656 17:35:45.145428 * Base: 1000, Size: 800, Tag: 100
1657 17:35:45.148909 * Base: 1900, Size: e700, Tag: 100
1658 17:35:45.152242 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1659 17:35:45.158671 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1660 17:35:45.165543 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1661 17:35:45.175399 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1662 17:35:45.181783 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1663 17:35:45.188575 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1664 17:35:45.198807 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1665 17:35:45.205364 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1666 17:35:45.212109 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1667 17:35:45.221983 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1668 17:35:45.228413 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1669 17:35:45.234914 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1670 17:35:45.245287 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1671 17:35:45.251522 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1672 17:35:45.258588 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1673 17:35:45.268358 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1674 17:35:45.274700 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1675 17:35:45.281187 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1676 17:35:45.291569 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1677 17:35:45.297904 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1678 17:35:45.304516 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1679 17:35:45.314489 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1680 17:35:45.321374 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1681 17:35:45.327917 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1682 17:35:45.337639 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1683 17:35:45.344371 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1684 17:35:45.351440 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1685 17:35:45.361050 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1686 17:35:45.367837 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1687 17:35:45.374426 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1688 17:35:45.384070 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1689 17:35:45.390849 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1690 17:35:45.397747 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1691 17:35:45.401227 DOMAIN: 0000: Resource ranges:
1692 17:35:45.404174 * Base: 80400000, Size: 3fc00000, Tag: 200
1693 17:35:45.410686 * Base: d0000000, Size: 28000000, Tag: 200
1694 17:35:45.413893 * Base: fa000000, Size: 1000000, Tag: 200
1695 17:35:45.417450 * Base: fb001000, Size: 17ff000, Tag: 200
1696 17:35:45.424167 * Base: fe800000, Size: 300000, Tag: 200
1697 17:35:45.427571 * Base: feb80000, Size: 80000, Tag: 200
1698 17:35:45.430540 * Base: fed00000, Size: 40000, Tag: 200
1699 17:35:45.433946 * Base: fed70000, Size: 10000, Tag: 200
1700 17:35:45.440300 * Base: fed88000, Size: 8000, Tag: 200
1701 17:35:45.443902 * Base: fed93000, Size: d000, Tag: 200
1702 17:35:45.447050 * Base: feda2000, Size: 1e000, Tag: 200
1703 17:35:45.450363 * Base: fede0000, Size: 1220000, Tag: 200
1704 17:35:45.457256 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1705 17:35:45.463500 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1706 17:35:45.470269 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1707 17:35:45.476796 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1708 17:35:45.483848 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1709 17:35:45.489968 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1710 17:35:45.496694 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1711 17:35:45.503466 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1712 17:35:45.510013 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1713 17:35:45.516670 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1714 17:35:45.523252 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1715 17:35:45.530029 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1716 17:35:45.536358 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1717 17:35:45.543259 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1718 17:35:45.549619 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1719 17:35:45.556541 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1720 17:35:45.563229 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1721 17:35:45.569516 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1722 17:35:45.576319 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1723 17:35:45.582882 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1724 17:35:45.589746 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1725 17:35:45.599640 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1726 17:35:45.602692 PCI: 00:06.0: Resource ranges:
1727 17:35:45.606266 * Base: 80400000, Size: 100000, Tag: 200
1728 17:35:45.612711 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1729 17:35:45.619281 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1730 17:35:45.626431 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1731 17:35:45.636096 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1732 17:35:45.639582 Root Device assign_resources, bus 0 link: 0
1733 17:35:45.642532 DOMAIN: 0000 assign_resources, bus 0 link: 0
1734 17:35:45.652797 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1735 17:35:45.659279 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1736 17:35:45.665981 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1737 17:35:45.675961 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1738 17:35:45.679469 PCI: 00:04.0 assign_resources, bus 1 link: 0
1739 17:35:45.685938 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1740 17:35:45.692354 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1741 17:35:45.702197 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1742 17:35:45.712222 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1743 17:35:45.715635 PCI: 00:06.0 assign_resources, bus 1 link: 0
1744 17:35:45.725761 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1745 17:35:45.732346 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1746 17:35:45.738877 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1747 17:35:45.745182 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1748 17:35:45.751795 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1749 17:35:45.758616 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1750 17:35:45.762056 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1751 17:35:45.772228 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1752 17:35:45.775194 PCI: 00:14.0 assign_resources, bus 0 link: 0
1753 17:35:45.781737 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1754 17:35:45.788252 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1755 17:35:45.795059 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1756 17:35:45.805257 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1757 17:35:45.808499 PCI: 00:14.3 assign_resources, bus 0 link: 0
1758 17:35:45.814979 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1759 17:35:45.821385 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1760 17:35:45.825204 PCI: 00:15.0 assign_resources, bus 0 link: 0
1761 17:35:45.831440 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1762 17:35:45.838006 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1763 17:35:45.844729 PCI: 00:15.1 assign_resources, bus 0 link: 0
1764 17:35:45.847612 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1765 17:35:45.858115 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1766 17:35:45.860970 PCI: 00:15.3 assign_resources, bus 0 link: 0
1767 17:35:45.867770 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1768 17:35:45.874651 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1769 17:35:45.880799 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1770 17:35:45.887765 PCI: 00:19.1 assign_resources, bus 0 link: 0
1771 17:35:45.890738 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1772 17:35:45.900705 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1773 17:35:45.904105 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1774 17:35:45.910581 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1775 17:35:45.913941 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1776 17:35:45.917543 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1777 17:35:45.923919 LPC: Trying to open IO window from 800 size 1ff
1778 17:35:45.930623 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1779 17:35:45.940595 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1780 17:35:45.947156 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1781 17:35:45.953918 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1782 17:35:45.956859 Root Device assign_resources, bus 0 link: 0 done
1783 17:35:45.960584 Done setting resources.
1784 17:35:45.966696 Show resources in subtree (Root Device)...After assigning values.
1785 17:35:45.970529 Root Device child on link 0 CPU_CLUSTER: 0
1786 17:35:45.973532 CPU_CLUSTER: 0 child on link 0 APIC: 00
1787 17:35:45.976643 APIC: 00
1788 17:35:45.976769 APIC: 16
1789 17:35:45.980195 APIC: 10
1790 17:35:45.980337 APIC: 12
1791 17:35:45.980435 APIC: 14
1792 17:35:45.983777 APIC: 09
1793 17:35:45.983899 APIC: 01
1794 17:35:45.984001 APIC: 08
1795 17:35:45.990029 DOMAIN: 0000 child on link 0 GPIO: 0
1796 17:35:45.996902 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1797 17:35:46.006915 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1798 17:35:46.009695 GPIO: 0
1799 17:35:46.009779 PCI: 00:00.0
1800 17:35:46.020239 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1801 17:35:46.030045 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1802 17:35:46.040046 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1803 17:35:46.049930 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1804 17:35:46.056401 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1805 17:35:46.066257 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1806 17:35:46.076246 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1807 17:35:46.086066 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1808 17:35:46.096072 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1809 17:35:46.106043 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1810 17:35:46.115860 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1811 17:35:46.122778 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1812 17:35:46.132658 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1813 17:35:46.142570 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1814 17:35:46.152514 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1815 17:35:46.162337 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1816 17:35:46.172686 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1817 17:35:46.182477 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1818 17:35:46.192264 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1819 17:35:46.198734 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1820 17:35:46.208605 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1821 17:35:46.218547 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1822 17:35:46.228863 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1823 17:35:46.238598 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1824 17:35:46.248737 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1825 17:35:46.258304 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1826 17:35:46.264889 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1827 17:35:46.275149 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1828 17:35:46.278911 PCI: 00:02.0
1829 17:35:46.288193 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1830 17:35:46.298030 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1831 17:35:46.307894 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1832 17:35:46.311769 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1833 17:35:46.324690 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1834 17:35:46.324819 GENERIC: 0.0
1835 17:35:46.331194 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1836 17:35:46.337993 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1837 17:35:46.351200 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1838 17:35:46.361227 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1839 17:35:46.364003 PCI: 01:00.0
1840 17:35:46.374343 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1841 17:35:46.384049 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1842 17:35:46.384135 PCI: 00:08.0
1843 17:35:46.387688 PCI: 00:0a.0
1844 17:35:46.397243 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1845 17:35:46.400773 PCI: 00:0d.0 child on link 0 USB0 port 0
1846 17:35:46.414152 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1847 17:35:46.417026 USB0 port 0 child on link 0 USB3 port 0
1848 17:35:46.417110 USB3 port 0
1849 17:35:46.420661 USB3 port 1
1850 17:35:46.420744 USB3 port 2
1851 17:35:46.423516 USB3 port 3
1852 17:35:46.426785 PCI: 00:14.0 child on link 0 USB0 port 0
1853 17:35:46.436915 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1854 17:35:46.443266 USB0 port 0 child on link 0 USB2 port 0
1855 17:35:46.443358 USB2 port 0
1856 17:35:46.447022 USB2 port 1
1857 17:35:46.447105 USB2 port 2
1858 17:35:46.449878 USB2 port 3
1859 17:35:46.449961 USB2 port 4
1860 17:35:46.453259 USB2 port 5
1861 17:35:46.456657 USB2 port 6
1862 17:35:46.456741 USB2 port 7
1863 17:35:46.460027 USB2 port 8
1864 17:35:46.460110 USB2 port 9
1865 17:35:46.463594 USB3 port 0
1866 17:35:46.463682 USB3 port 1
1867 17:35:46.466841 USB3 port 2
1868 17:35:46.466924 USB3 port 3
1869 17:35:46.470172 PCI: 00:14.2
1870 17:35:46.479920 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1871 17:35:46.490222 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1872 17:35:46.493079 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1873 17:35:46.503285 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1874 17:35:46.506372 GENERIC: 0.0
1875 17:35:46.509805 PCI: 00:15.0 child on link 0 I2C: 00:1a
1876 17:35:46.519765 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1877 17:35:46.523208 I2C: 00:1a
1878 17:35:46.523289 I2C: 00:31
1879 17:35:46.526607 I2C: 00:32
1880 17:35:46.529603 PCI: 00:15.1 child on link 0 I2C: 00:50
1881 17:35:46.539463 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1882 17:35:46.543277 I2C: 00:50
1883 17:35:46.543385 PCI: 00:15.2
1884 17:35:46.549272 PCI: 00:15.3 child on link 0 I2C: 00:10
1885 17:35:46.559178 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1886 17:35:46.559261 I2C: 00:10
1887 17:35:46.562508 PCI: 00:16.0
1888 17:35:46.572298 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1889 17:35:46.572385 PCI: 00:19.0
1890 17:35:46.579739 PCI: 00:19.1 child on link 0 I2C: 00:15
1891 17:35:46.589017 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1892 17:35:46.589119 I2C: 00:15
1893 17:35:46.592529 I2C: 00:2c
1894 17:35:46.592644 PCI: 00:1e.0
1895 17:35:46.605746 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1896 17:35:46.608820 PCI: 00:1e.3 child on link 0 SPI: 00
1897 17:35:46.618821 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1898 17:35:46.618934 SPI: 00
1899 17:35:46.625701 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1900 17:35:46.632116 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1901 17:35:46.635646 PNP: 0c09.0
1902 17:35:46.642067 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1903 17:35:46.648855 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1904 17:35:46.658985 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1905 17:35:46.665412 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1906 17:35:46.672383 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1907 17:35:46.672466 GENERIC: 0.0
1908 17:35:46.675108 GENERIC: 1.0
1909 17:35:46.675222 PCI: 00:1f.3
1910 17:35:46.685665 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1911 17:35:46.698508 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1912 17:35:46.698602 PCI: 00:1f.5
1913 17:35:46.708392 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1914 17:35:46.711622 Done allocating resources.
1915 17:35:46.718549 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1916 17:35:46.725126 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1917 17:35:46.728394 Configure audio over I2S with MAX98373 NAU88L25B.
1918 17:35:46.733154 Enabling BT offload
1919 17:35:46.740133 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1920 17:35:46.743562 Enabling resources...
1921 17:35:46.747130 PCI: 00:00.0 subsystem <- 8086/4609
1922 17:35:46.750602 PCI: 00:00.0 cmd <- 06
1923 17:35:46.753415 PCI: 00:02.0 subsystem <- 8086/46b3
1924 17:35:46.756842 PCI: 00:02.0 cmd <- 03
1925 17:35:46.760411 PCI: 00:04.0 subsystem <- 8086/461d
1926 17:35:46.760518 PCI: 00:04.0 cmd <- 02
1927 17:35:46.763322 PCI: 00:06.0 bridge ctrl <- 0013
1928 17:35:46.766972 PCI: 00:06.0 subsystem <- 8086/464d
1929 17:35:46.770295 PCI: 00:06.0 cmd <- 106
1930 17:35:46.773672 PCI: 00:0a.0 subsystem <- 8086/467d
1931 17:35:46.777207 PCI: 00:0a.0 cmd <- 02
1932 17:35:46.780154 PCI: 00:0d.0 subsystem <- 8086/461e
1933 17:35:46.783658 PCI: 00:0d.0 cmd <- 02
1934 17:35:46.786457 PCI: 00:14.0 subsystem <- 8086/51ed
1935 17:35:46.790142 PCI: 00:14.0 cmd <- 02
1936 17:35:46.793186 PCI: 00:14.2 subsystem <- 8086/51ef
1937 17:35:46.793329 PCI: 00:14.2 cmd <- 02
1938 17:35:46.800087 PCI: 00:14.3 subsystem <- 8086/51f0
1939 17:35:46.800201 PCI: 00:14.3 cmd <- 02
1940 17:35:46.802894 PCI: 00:15.0 subsystem <- 8086/51e8
1941 17:35:46.806362 PCI: 00:15.0 cmd <- 02
1942 17:35:46.809495 PCI: 00:15.1 subsystem <- 8086/51e9
1943 17:35:46.812870 PCI: 00:15.1 cmd <- 06
1944 17:35:46.816658 PCI: 00:15.3 subsystem <- 8086/51eb
1945 17:35:46.819997 PCI: 00:15.3 cmd <- 02
1946 17:35:46.823165 PCI: 00:16.0 subsystem <- 8086/51e0
1947 17:35:46.826652 PCI: 00:16.0 cmd <- 02
1948 17:35:46.829473 PCI: 00:19.1 subsystem <- 8086/51c6
1949 17:35:46.829557 PCI: 00:19.1 cmd <- 02
1950 17:35:46.833021 PCI: 00:1e.0 subsystem <- 8086/51a8
1951 17:35:46.836263 PCI: 00:1e.0 cmd <- 06
1952 17:35:46.839254 PCI: 00:1e.3 subsystem <- 8086/51ab
1953 17:35:46.842812 PCI: 00:1e.3 cmd <- 02
1954 17:35:46.846298 PCI: 00:1f.0 subsystem <- 8086/5182
1955 17:35:46.849281 PCI: 00:1f.0 cmd <- 407
1956 17:35:46.852735 PCI: 00:1f.3 subsystem <- 8086/51c8
1957 17:35:46.856415 PCI: 00:1f.3 cmd <- 02
1958 17:35:46.859327 PCI: 00:1f.5 subsystem <- 8086/51a4
1959 17:35:46.859429 PCI: 00:1f.5 cmd <- 406
1960 17:35:46.862516 PCI: 01:00.0 cmd <- 02
1961 17:35:46.862599 done.
1962 17:35:46.869185 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1963 17:35:46.872427 ME: Version: Unavailable
1964 17:35:46.879002 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1965 17:35:46.879084 Initializing devices...
1966 17:35:46.882468 Root Device init
1967 17:35:46.882564 mainboard: EC init
1968 17:35:46.889631 Chrome EC: Set SMI mask to 0x0000000000000000
1969 17:35:46.892606 Chrome EC: UHEPI supported
1970 17:35:46.895902 Chrome EC: clear events_b mask to 0x0000000000000000
1971 17:35:46.902564 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1972 17:35:46.909810 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1973 17:35:46.915960 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1974 17:35:46.919245 Chrome EC: Set WAKE mask to 0x0000000000000000
1975 17:35:46.925783 Root Device init finished in 38 msecs
1976 17:35:46.925903 PCI: 00:00.0 init
1977 17:35:46.929212 CPU TDP = 15 Watts
1978 17:35:46.932478 CPU PL1 = 15 Watts
1979 17:35:46.932583 CPU PL2 = 55 Watts
1980 17:35:46.935652 CPU PL4 = 123 Watts
1981 17:35:46.939555 PCI: 00:00.0 init finished in 8 msecs
1982 17:35:46.942258 PCI: 00:02.0 init
1983 17:35:46.942339 GMA: Found VBT in CBFS
1984 17:35:46.946357 GMA: Found valid VBT in CBFS
1985 17:35:46.952612 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1986 17:35:46.958876 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1987 17:35:46.962462 PCI: 00:02.0 init finished in 18 msecs
1988 17:35:46.965735 PCI: 00:06.0 init
1989 17:35:46.969179 Initializing PCH PCIe bridge.
1990 17:35:46.972086 PCI: 00:06.0 init finished in 3 msecs
1991 17:35:46.972168 PCI: 00:0a.0 init
1992 17:35:46.979035 PCI: 00:0a.0 init finished in 0 msecs
1993 17:35:46.979117 PCI: 00:14.0 init
1994 17:35:46.982107 PCI: 00:14.0 init finished in 0 msecs
1995 17:35:46.985472 PCI: 00:14.2 init
1996 17:35:46.988489 PCI: 00:14.2 init finished in 0 msecs
1997 17:35:46.992015 PCI: 00:15.0 init
1998 17:35:46.995469 I2C bus 0 version 0x3230302a
1999 17:35:46.998547 DW I2C bus 0 at 0x80655000 (400 KHz)
2000 17:35:47.001959 PCI: 00:15.0 init finished in 6 msecs
2001 17:35:47.002040 PCI: 00:15.1 init
2002 17:35:47.005452 I2C bus 1 version 0x3230302a
2003 17:35:47.008528 DW I2C bus 1 at 0x80656000 (400 KHz)
2004 17:35:47.015021 PCI: 00:15.1 init finished in 6 msecs
2005 17:35:47.015103 PCI: 00:15.3 init
2006 17:35:47.018571 I2C bus 3 version 0x3230302a
2007 17:35:47.021875 DW I2C bus 3 at 0x80657000 (400 KHz)
2008 17:35:47.025351 PCI: 00:15.3 init finished in 6 msecs
2009 17:35:47.028381 PCI: 00:16.0 init
2010 17:35:47.031590 PCI: 00:16.0 init finished in 0 msecs
2011 17:35:47.035256 PCI: 00:19.1 init
2012 17:35:47.035357 I2C bus 5 version 0x3230302a
2013 17:35:47.041505 DW I2C bus 5 at 0x80659000 (400 KHz)
2014 17:35:47.044979 PCI: 00:19.1 init finished in 6 msecs
2015 17:35:47.045060 PCI: 00:1f.0 init
2016 17:35:47.051266 IOAPIC: Initializing IOAPIC at 0xfec00000
2017 17:35:47.051368 IOAPIC: ID = 0x02
2018 17:35:47.055028 IOAPIC: Dumping registers
2019 17:35:47.057894 reg 0x0000: 0x02000000
2020 17:35:47.061413 reg 0x0001: 0x00770020
2021 17:35:47.061495 reg 0x0002: 0x00000000
2022 17:35:47.064453 IOAPIC: 120 interrupts
2023 17:35:47.068055 IOAPIC: Clearing IOAPIC at 0xfec00000
2024 17:35:47.074793 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2025 17:35:47.077817 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2026 17:35:47.081268 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2027 17:35:47.087891 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2028 17:35:47.091205 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2029 17:35:47.097960 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2030 17:35:47.101176 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2031 17:35:47.107541 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2032 17:35:47.111605 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2033 17:35:47.117890 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2034 17:35:47.121217 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2035 17:35:47.124236 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2036 17:35:47.130845 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2037 17:35:47.134403 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2038 17:35:47.141003 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2039 17:35:47.144568 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2040 17:35:47.150733 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2041 17:35:47.154291 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2042 17:35:47.160869 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2043 17:35:47.164205 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2044 17:35:47.167480 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2045 17:35:47.174198 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2046 17:35:47.177524 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2047 17:35:47.184016 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2048 17:35:47.187537 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2049 17:35:47.194086 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2050 17:35:47.197593 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2051 17:35:47.204006 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2052 17:35:47.207153 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2053 17:35:47.210657 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2054 17:35:47.217774 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2055 17:35:47.220651 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2056 17:35:47.227057 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2057 17:35:47.230791 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2058 17:35:47.237518 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2059 17:35:47.240441 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2060 17:35:47.247353 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2061 17:35:47.250220 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2062 17:35:47.253742 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2063 17:35:47.260444 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2064 17:35:47.263501 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2065 17:35:47.270639 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2066 17:35:47.274035 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2067 17:35:47.280354 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2068 17:35:47.283491 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2069 17:35:47.290731 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2070 17:35:47.293878 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2071 17:35:47.297274 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2072 17:35:47.303812 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2073 17:35:47.307192 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2074 17:35:47.313401 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2075 17:35:47.317013 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2076 17:35:47.323465 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2077 17:35:47.326472 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2078 17:35:47.333350 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2079 17:35:47.337102 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2080 17:35:47.340528 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2081 17:35:47.346561 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2082 17:35:47.349627 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2083 17:35:47.356555 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2084 17:35:47.359928 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2085 17:35:47.366426 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2086 17:35:47.369593 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2087 17:35:47.376719 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2088 17:35:47.379663 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2089 17:35:47.386333 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2090 17:35:47.389847 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2091 17:35:47.392987 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2092 17:35:47.399480 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2093 17:35:47.402519 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2094 17:35:47.410201 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2095 17:35:47.412755 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2096 17:35:47.419765 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2097 17:35:47.422485 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2098 17:35:47.429278 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2099 17:35:47.432386 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2100 17:35:47.435857 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2101 17:35:47.442469 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2102 17:35:47.445990 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2103 17:35:47.452396 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2104 17:35:47.456129 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2105 17:35:47.462945 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2106 17:35:47.465985 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2107 17:35:47.472645 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2108 17:35:47.475736 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2109 17:35:47.478829 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2110 17:35:47.485646 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2111 17:35:47.489061 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2112 17:35:47.495464 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2113 17:35:47.499324 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2114 17:35:47.505611 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2115 17:35:47.509081 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2116 17:35:47.515627 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2117 17:35:47.518737 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2118 17:35:47.522044 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2119 17:35:47.529060 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2120 17:35:47.532237 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2121 17:35:47.538705 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2122 17:35:47.542115 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2123 17:35:47.548620 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2124 17:35:47.552150 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2125 17:35:47.558269 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2126 17:35:47.561682 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2127 17:35:47.565184 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2128 17:35:47.571597 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2129 17:35:47.574898 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2130 17:35:47.581638 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2131 17:35:47.585209 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2132 17:35:47.591987 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2133 17:35:47.594829 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2134 17:35:47.601669 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2135 17:35:47.605010 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2136 17:35:47.608484 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2137 17:35:47.614821 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2138 17:35:47.618308 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2139 17:35:47.624702 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2140 17:35:47.628015 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2141 17:35:47.635140 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2142 17:35:47.638236 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2143 17:35:47.644895 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2144 17:35:47.648016 IOAPIC: Bootstrap Processor Local APIC = 0x00
2145 17:35:47.651917 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2146 17:35:47.658224 PCI: 00:1f.0 init finished in 607 msecs
2147 17:35:47.658306 PCI: 00:1f.2 init
2148 17:35:47.661729 apm_control: Disabling ACPI.
2149 17:35:47.665453 APMC done.
2150 17:35:47.669494 PCI: 00:1f.2 init finished in 6 msecs
2151 17:35:47.672324 PCI: 00:1f.3 init
2152 17:35:47.675643 PCI: 00:1f.3 init finished in 0 msecs
2153 17:35:47.675727 PCI: 01:00.0 init
2154 17:35:47.679065 PCI: 01:00.0 init finished in 0 msecs
2155 17:35:47.682638 PNP: 0c09.0 init
2156 17:35:47.685488 Google Chrome EC uptime: 12.118 seconds
2157 17:35:47.691909 Google Chrome AP resets since EC boot: 1
2158 17:35:47.695386 Google Chrome most recent AP reset causes:
2159 17:35:47.698957 0.341: 32775 shutdown: entering G3
2160 17:35:47.705761 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2161 17:35:47.708562 PNP: 0c09.0 init finished in 23 msecs
2162 17:35:47.711968 GENERIC: 0.0 init
2163 17:35:47.715599 GENERIC: 0.0 init finished in 0 msecs
2164 17:35:47.715689 GENERIC: 1.0 init
2165 17:35:47.721951 GENERIC: 1.0 init finished in 0 msecs
2166 17:35:47.722027 Devices initialized
2167 17:35:47.725333 Show all devs... After init.
2168 17:35:47.728643 Root Device: enabled 1
2169 17:35:47.731792 CPU_CLUSTER: 0: enabled 1
2170 17:35:47.731865 DOMAIN: 0000: enabled 1
2171 17:35:47.734962 GPIO: 0: enabled 1
2172 17:35:47.738590 PCI: 00:00.0: enabled 1
2173 17:35:47.738661 PCI: 00:01.0: enabled 0
2174 17:35:47.742039 PCI: 00:01.1: enabled 0
2175 17:35:47.745303 PCI: 00:02.0: enabled 1
2176 17:35:47.748650 PCI: 00:04.0: enabled 1
2177 17:35:47.748726 PCI: 00:05.0: enabled 0
2178 17:35:47.751252 PCI: 00:06.0: enabled 1
2179 17:35:47.755197 PCI: 00:06.2: enabled 0
2180 17:35:47.758353 PCI: 00:07.0: enabled 0
2181 17:35:47.758454 PCI: 00:07.1: enabled 0
2182 17:35:47.761490 PCI: 00:07.2: enabled 0
2183 17:35:47.764706 PCI: 00:07.3: enabled 0
2184 17:35:47.768311 PCI: 00:08.0: enabled 0
2185 17:35:47.768380 PCI: 00:09.0: enabled 0
2186 17:35:47.771384 PCI: 00:0a.0: enabled 1
2187 17:35:47.775070 PCI: 00:0d.0: enabled 1
2188 17:35:47.778615 PCI: 00:0d.1: enabled 0
2189 17:35:47.778725 PCI: 00:0d.2: enabled 0
2190 17:35:47.781509 PCI: 00:0d.3: enabled 0
2191 17:35:47.784711 PCI: 00:0e.0: enabled 0
2192 17:35:47.784787 PCI: 00:10.0: enabled 0
2193 17:35:47.788236 PCI: 00:10.1: enabled 0
2194 17:35:47.791482 PCI: 00:10.6: enabled 0
2195 17:35:47.794850 PCI: 00:10.7: enabled 0
2196 17:35:47.794921 PCI: 00:12.0: enabled 0
2197 17:35:47.798103 PCI: 00:12.6: enabled 0
2198 17:35:47.801239 PCI: 00:12.7: enabled 0
2199 17:35:47.804762 PCI: 00:13.0: enabled 0
2200 17:35:47.804832 PCI: 00:14.0: enabled 1
2201 17:35:47.807707 PCI: 00:14.1: enabled 0
2202 17:35:47.811220 PCI: 00:14.2: enabled 1
2203 17:35:47.814620 PCI: 00:14.3: enabled 1
2204 17:35:47.814700 PCI: 00:15.0: enabled 1
2205 17:35:47.817632 PCI: 00:15.1: enabled 1
2206 17:35:47.821043 PCI: 00:15.2: enabled 0
2207 17:35:47.824443 PCI: 00:15.3: enabled 1
2208 17:35:47.824523 PCI: 00:16.0: enabled 1
2209 17:35:47.827708 PCI: 00:16.1: enabled 0
2210 17:35:47.831151 PCI: 00:16.2: enabled 0
2211 17:35:47.834197 PCI: 00:16.3: enabled 0
2212 17:35:47.834267 PCI: 00:16.4: enabled 0
2213 17:35:47.837348 PCI: 00:16.5: enabled 0
2214 17:35:47.840985 PCI: 00:17.0: enabled 0
2215 17:35:47.841064 PCI: 00:19.0: enabled 0
2216 17:35:47.844187 PCI: 00:19.1: enabled 1
2217 17:35:47.847732 PCI: 00:19.2: enabled 0
2218 17:35:47.851221 PCI: 00:1a.0: enabled 0
2219 17:35:47.851316 PCI: 00:1c.0: enabled 0
2220 17:35:47.854316 PCI: 00:1c.1: enabled 0
2221 17:35:47.857663 PCI: 00:1c.2: enabled 0
2222 17:35:47.860857 PCI: 00:1c.3: enabled 0
2223 17:35:47.860931 PCI: 00:1c.4: enabled 0
2224 17:35:47.864236 PCI: 00:1c.5: enabled 0
2225 17:35:47.867582 PCI: 00:1c.6: enabled 0
2226 17:35:47.871050 PCI: 00:1c.7: enabled 0
2227 17:35:47.871118 PCI: 00:1d.0: enabled 0
2228 17:35:47.873989 PCI: 00:1d.1: enabled 0
2229 17:35:47.877586 PCI: 00:1d.2: enabled 0
2230 17:35:47.880918 PCI: 00:1d.3: enabled 0
2231 17:35:47.880990 PCI: 00:1e.0: enabled 1
2232 17:35:47.884057 PCI: 00:1e.1: enabled 0
2233 17:35:47.888105 PCI: 00:1e.2: enabled 0
2234 17:35:47.888179 PCI: 00:1e.3: enabled 1
2235 17:35:47.890900 PCI: 00:1f.0: enabled 1
2236 17:35:47.894198 PCI: 00:1f.1: enabled 0
2237 17:35:47.897413 PCI: 00:1f.2: enabled 1
2238 17:35:47.897490 PCI: 00:1f.3: enabled 1
2239 17:35:47.900370 PCI: 00:1f.4: enabled 0
2240 17:35:47.904059 PCI: 00:1f.5: enabled 1
2241 17:35:47.907327 PCI: 00:1f.6: enabled 0
2242 17:35:47.907450 PCI: 00:1f.7: enabled 0
2243 17:35:47.910207 GENERIC: 0.0: enabled 1
2244 17:35:47.913822 GENERIC: 0.0: enabled 1
2245 17:35:47.917114 GENERIC: 1.0: enabled 1
2246 17:35:47.917220 GENERIC: 0.0: enabled 1
2247 17:35:47.920254 GENERIC: 1.0: enabled 1
2248 17:35:47.923920 USB0 port 0: enabled 1
2249 17:35:47.923999 USB0 port 0: enabled 1
2250 17:35:47.927420 GENERIC: 0.0: enabled 1
2251 17:35:47.932247 I2C: 00:1a: enabled 1
2252 17:35:47.933798 I2C: 00:31: enabled 1
2253 17:35:47.933880 I2C: 00:32: enabled 1
2254 17:35:47.937181 I2C: 00:50: enabled 1
2255 17:35:47.940129 I2C: 00:10: enabled 1
2256 17:35:47.940210 I2C: 00:15: enabled 1
2257 17:35:47.943781 I2C: 00:2c: enabled 1
2258 17:35:47.947066 GENERIC: 0.0: enabled 1
2259 17:35:47.947147 SPI: 00: enabled 1
2260 17:35:47.950220 PNP: 0c09.0: enabled 1
2261 17:35:47.953598 GENERIC: 0.0: enabled 1
2262 17:35:47.953679 USB3 port 0: enabled 1
2263 17:35:47.956783 USB3 port 1: enabled 0
2264 17:35:47.960290 USB3 port 2: enabled 1
2265 17:35:47.963530 USB3 port 3: enabled 0
2266 17:35:47.963611 USB2 port 0: enabled 1
2267 17:35:47.966766 USB2 port 1: enabled 0
2268 17:35:47.970242 USB2 port 2: enabled 1
2269 17:35:47.970323 USB2 port 3: enabled 0
2270 17:35:47.973541 USB2 port 4: enabled 0
2271 17:35:47.977091 USB2 port 5: enabled 1
2272 17:35:47.980383 USB2 port 6: enabled 0
2273 17:35:47.980465 USB2 port 7: enabled 0
2274 17:35:47.983207 USB2 port 8: enabled 1
2275 17:35:47.986776 USB2 port 9: enabled 1
2276 17:35:47.986851 USB3 port 0: enabled 1
2277 17:35:47.990127 USB3 port 1: enabled 0
2278 17:35:47.993180 USB3 port 2: enabled 0
2279 17:35:47.993258 USB3 port 3: enabled 0
2280 17:35:47.996580 GENERIC: 0.0: enabled 1
2281 17:35:48.000146 GENERIC: 1.0: enabled 1
2282 17:35:48.003207 APIC: 00: enabled 1
2283 17:35:48.003315 APIC: 16: enabled 1
2284 17:35:48.006324 APIC: 10: enabled 1
2285 17:35:48.006405 APIC: 12: enabled 1
2286 17:35:48.009691 APIC: 14: enabled 1
2287 17:35:48.013387 APIC: 09: enabled 1
2288 17:35:48.013470 APIC: 01: enabled 1
2289 17:35:48.016647 APIC: 08: enabled 1
2290 17:35:48.019556 PCI: 01:00.0: enabled 1
2291 17:35:48.022915 BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms
2292 17:35:48.030113 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2293 17:35:48.033142 ELOG: NV offset 0xf20000 size 0x4000
2294 17:35:48.039563 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2295 17:35:48.046478 ELOG: Event(17) added with size 13 at 2024-02-13 17:35:47 UTC
2296 17:35:48.053160 ELOG: Event(9E) added with size 10 at 2024-02-13 17:35:47 UTC
2297 17:35:48.059466 ELOG: Event(9F) added with size 14 at 2024-02-13 17:35:47 UTC
2298 17:35:48.065924 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2299 17:35:48.072961 ELOG: Event(A0) added with size 9 at 2024-02-13 17:35:47 UTC
2300 17:35:48.075845 elog_add_boot_reason: Logged dev mode boot
2301 17:35:48.082694 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2302 17:35:48.085988 Finalize devices...
2303 17:35:48.086072 PCI: 00:16.0 final
2304 17:35:48.089134 PCI: 00:1f.2 final
2305 17:35:48.089217 GENERIC: 0.0 final
2306 17:35:48.095487 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2307 17:35:48.098767 GENERIC: 1.0 final
2308 17:35:48.105473 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2309 17:35:48.105557 Devices finalized
2310 17:35:48.112162 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2311 17:35:48.119255 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2312 17:35:48.122357 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2313 17:35:48.128886 ME: HFSTS1 : 0x90000245
2314 17:35:48.131999 ME: HFSTS2 : 0x82100116
2315 17:35:48.135324 ME: HFSTS3 : 0x00000050
2316 17:35:48.142516 ME: HFSTS4 : 0x00004000
2317 17:35:48.145485 ME: HFSTS5 : 0x00000000
2318 17:35:48.148853 ME: HFSTS6 : 0x40600006
2319 17:35:48.152271 ME: Manufacturing Mode : NO
2320 17:35:48.159004 ME: SPI Protection Mode Enabled : YES
2321 17:35:48.162138 ME: FPFs Committed : YES
2322 17:35:48.165367 ME: Manufacturing Vars Locked : YES
2323 17:35:48.168361 ME: FW Partition Table : OK
2324 17:35:48.172226 ME: Bringup Loader Failure : NO
2325 17:35:48.175628 ME: Firmware Init Complete : YES
2326 17:35:48.178711 ME: Boot Options Present : NO
2327 17:35:48.185001 ME: Update In Progress : NO
2328 17:35:48.188560 ME: D0i3 Support : YES
2329 17:35:48.191955 ME: Low Power State Enabled : NO
2330 17:35:48.195327 ME: CPU Replaced : YES
2331 17:35:48.198764 ME: CPU Replacement Valid : YES
2332 17:35:48.201878 ME: Current Working State : 5
2333 17:35:48.205159 ME: Current Operation State : 1
2334 17:35:48.208256 ME: Current Operation Mode : 0
2335 17:35:48.212105 ME: Error Code : 0
2336 17:35:48.218194 ME: Enhanced Debug Mode : NO
2337 17:35:48.221699 ME: CPU Debug Disabled : YES
2338 17:35:48.225124 ME: TXT Support : NO
2339 17:35:48.228353 ME: WP for RO is enabled : YES
2340 17:35:48.235056 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2341 17:35:48.241864 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2342 17:35:48.245263 Ramoops buffer: 0x100000@0x76899000.
2343 17:35:48.251765 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2344 17:35:48.258565 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2345 17:35:48.261883 CBFS: 'fallback/slic' not found.
2346 17:35:48.264847 ACPI: Writing ACPI tables at 7686d000.
2347 17:35:48.264921 ACPI: * FACS
2348 17:35:48.268042 ACPI: * DSDT
2349 17:35:48.274902 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2350 17:35:48.278393 ACPI: * FADT
2351 17:35:48.278479 SCI is IRQ9
2352 17:35:48.284994 ACPI: added table 1/32, length now 40
2353 17:35:48.285077 ACPI: * SSDT
2354 17:35:48.291988 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2355 17:35:48.294766 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2356 17:35:48.301663 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2357 17:35:48.305105 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2358 17:35:48.311275 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2359 17:35:48.314678 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2360 17:35:48.321378 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2361 17:35:48.328059 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2362 17:35:48.331677 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2363 17:35:48.338340 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2364 17:35:48.341559 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2365 17:35:48.347765 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2366 17:35:48.351325 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2367 17:35:48.358140 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2368 17:35:48.364229 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2369 17:35:48.367925 PS2K: Passing 80 keymaps to kernel
2370 17:35:48.374096 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2371 17:35:48.380951 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2372 17:35:48.387469 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2373 17:35:48.394504 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2374 17:35:48.397549 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2375 17:35:48.404479 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2376 17:35:48.411052 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2377 17:35:48.417475 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2378 17:35:48.424180 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2379 17:35:48.430879 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2380 17:35:48.434048 ACPI: added table 2/32, length now 44
2381 17:35:48.434142 ACPI: * MCFG
2382 17:35:48.441043 ACPI: added table 3/32, length now 48
2383 17:35:48.441119 ACPI: * TPM2
2384 17:35:48.443911 TPM2 log created at 0x7685d000
2385 17:35:48.447215 ACPI: added table 4/32, length now 52
2386 17:35:48.450927 ACPI: * LPIT
2387 17:35:48.453969 ACPI: added table 5/32, length now 56
2388 17:35:48.454051 ACPI: * MADT
2389 17:35:48.457265 SCI is IRQ9
2390 17:35:48.460826 ACPI: added table 6/32, length now 60
2391 17:35:48.464334 cmd_reg from pmc_make_ipc_cmd 1052838
2392 17:35:48.470722 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2393 17:35:48.477246 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2394 17:35:48.484175 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2395 17:35:48.487225 PMC CrashLog size in discovery mode: 0xC00
2396 17:35:48.490404 cpu crashlog bar addr: 0x80640000
2397 17:35:48.493849 cpu discovery table offset: 0x6030
2398 17:35:48.497438 cpu_crashlog_discovery_table buffer count: 0x3
2399 17:35:48.503569 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2400 17:35:48.510532 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2401 17:35:48.517217 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2402 17:35:48.523974 PMC crashLog size in discovery mode : 0xC00
2403 17:35:48.530260 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2404 17:35:48.533737 discover mode PMC crashlog size adjusted to: 0x200
2405 17:35:48.540013 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2406 17:35:48.546961 discover mode PMC crashlog size adjusted to: 0x0
2407 17:35:48.550221 m_cpu_crashLog_size : 0x3480 bytes
2408 17:35:48.553667 CPU crashLog present.
2409 17:35:48.557108 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2410 17:35:48.563159 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2411 17:35:48.566778 current = 76876550
2412 17:35:48.566862 ACPI: * DMAR
2413 17:35:48.573255 ACPI: added table 7/32, length now 64
2414 17:35:48.576664 ACPI: added table 8/32, length now 68
2415 17:35:48.576749 ACPI: * HPET
2416 17:35:48.580059 ACPI: added table 9/32, length now 72
2417 17:35:48.583155 ACPI: done.
2418 17:35:48.583239 ACPI tables: 38528 bytes.
2419 17:35:48.586650 smbios_write_tables: 76857000
2420 17:35:48.592481 EC returned error result code 3
2421 17:35:48.595755 Couldn't obtain OEM name from CBI
2422 17:35:48.599159 Create SMBIOS type 16
2423 17:35:48.602399 Create SMBIOS type 17
2424 17:35:48.605847 Create SMBIOS type 20
2425 17:35:48.605936 GENERIC: 0.0 (WIFI Device)
2426 17:35:48.608823 SMBIOS tables: 2156 bytes.
2427 17:35:48.612349 Writing table forward entry at 0x00000500
2428 17:35:48.618971 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2429 17:35:48.622099 Writing coreboot table at 0x76891000
2430 17:35:48.628545 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2431 17:35:48.635188 1. 0000000000001000-000000000009ffff: RAM
2432 17:35:48.638646 2. 00000000000a0000-00000000000fffff: RESERVED
2433 17:35:48.641825 3. 0000000000100000-0000000076856fff: RAM
2434 17:35:48.648696 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2435 17:35:48.655496 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2436 17:35:48.658341 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2437 17:35:48.665131 7. 0000000077000000-00000000803fffff: RESERVED
2438 17:35:48.668317 8. 00000000c0000000-00000000cfffffff: RESERVED
2439 17:35:48.675482 9. 00000000f8000000-00000000f9ffffff: RESERVED
2440 17:35:48.678629 10. 00000000fb000000-00000000fb000fff: RESERVED
2441 17:35:48.685240 11. 00000000fc800000-00000000fe7fffff: RESERVED
2442 17:35:48.688534 12. 00000000feb00000-00000000feb7ffff: RESERVED
2443 17:35:48.691523 13. 00000000fec00000-00000000fecfffff: RESERVED
2444 17:35:48.698411 14. 00000000fed40000-00000000fed6ffff: RESERVED
2445 17:35:48.701614 15. 00000000fed80000-00000000fed87fff: RESERVED
2446 17:35:48.708519 16. 00000000fed90000-00000000fed92fff: RESERVED
2447 17:35:48.711967 17. 00000000feda0000-00000000feda1fff: RESERVED
2448 17:35:48.718305 18. 00000000fedc0000-00000000feddffff: RESERVED
2449 17:35:48.722042 19. 0000000100000000-000000027fbfffff: RAM
2450 17:35:48.724651 Passing 4 GPIOs to payload:
2451 17:35:48.728609 NAME | PORT | POLARITY | VALUE
2452 17:35:48.734991 lid | undefined | high | high
2453 17:35:48.741651 power | undefined | high | low
2454 17:35:48.745103 oprom | undefined | high | low
2455 17:35:48.751420 EC in RW | 0x00000151 | high | high
2456 17:35:48.751518 Board ID: 3
2457 17:35:48.754435 FW config: 0x131
2458 17:35:48.761367 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 48ff
2459 17:35:48.761447 coreboot table: 1788 bytes.
2460 17:35:48.768181 IMD ROOT 0. 0x76fff000 0x00001000
2461 17:35:48.771513 IMD SMALL 1. 0x76ffe000 0x00001000
2462 17:35:48.774418 FSP MEMORY 2. 0x76afe000 0x00500000
2463 17:35:48.777890 CONSOLE 3. 0x76ade000 0x00020000
2464 17:35:48.781213 RW MCACHE 4. 0x76add000 0x0000043c
2465 17:35:48.784191 RO MCACHE 5. 0x76adc000 0x00000fd8
2466 17:35:48.787673 FMAP 6. 0x76adb000 0x0000064a
2467 17:35:48.794763 TIME STAMP 7. 0x76ada000 0x00000910
2468 17:35:48.797612 VBOOT WORK 8. 0x76ac6000 0x00014000
2469 17:35:48.800771 MEM INFO 9. 0x76ac5000 0x000003b8
2470 17:35:48.804191 ROMSTG STCK10. 0x76ac4000 0x00001000
2471 17:35:48.807873 AFTER CAR 11. 0x76ab8000 0x0000c000
2472 17:35:48.810818 RAMSTAGE 12. 0x76a2e000 0x0008a000
2473 17:35:48.813916 ACPI BERT 13. 0x76a1e000 0x00010000
2474 17:35:48.817229 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2475 17:35:48.823810 REFCODE 15. 0x769ae000 0x0006f000
2476 17:35:48.827444 SMM BACKUP 16. 0x7699e000 0x00010000
2477 17:35:48.830292 IGD OPREGION17. 0x76999000 0x00004203
2478 17:35:48.833865 RAMOOPS 18. 0x76899000 0x00100000
2479 17:35:48.837499 COREBOOT 19. 0x76891000 0x00008000
2480 17:35:48.840232 ACPI 20. 0x7686d000 0x00024000
2481 17:35:48.843695 TPM2 TCGLOG21. 0x7685d000 0x00010000
2482 17:35:48.850860 PMC CRASHLOG22. 0x7685c000 0x00000c00
2483 17:35:48.853487 CPU CRASHLOG23. 0x76858000 0x00003480
2484 17:35:48.857407 SMBIOS 24. 0x76857000 0x00001000
2485 17:35:48.857491 IMD small region:
2486 17:35:48.863358 IMD ROOT 0. 0x76ffec00 0x00000400
2487 17:35:48.866962 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2488 17:35:48.870325 VPD 2. 0x76ffeb60 0x0000006c
2489 17:35:48.873682 POWER STATE 3. 0x76ffeb00 0x00000044
2490 17:35:48.877149 ROMSTAGE 4. 0x76ffeae0 0x00000004
2491 17:35:48.883238 ACPI GNVS 5. 0x76ffea80 0x00000048
2492 17:35:48.886785 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2493 17:35:48.893699 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2494 17:35:48.893784 MTRR: Physical address space:
2495 17:35:48.900216 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2496 17:35:48.906497 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2497 17:35:48.913724 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2498 17:35:48.920284 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2499 17:35:48.926322 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2500 17:35:48.932925 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2501 17:35:48.939577 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2502 17:35:48.943141 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 17:35:48.946608 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 17:35:48.949400 MTRR: Fixed MSR 0x259 0x0000000000000000
2505 17:35:48.956617 MTRR: Fixed MSR 0x268 0x0606060606060606
2506 17:35:48.959455 MTRR: Fixed MSR 0x269 0x0606060606060606
2507 17:35:48.962882 MTRR: Fixed MSR 0x26a 0x0606060606060606
2508 17:35:48.965905 MTRR: Fixed MSR 0x26b 0x0606060606060606
2509 17:35:48.972694 MTRR: Fixed MSR 0x26c 0x0606060606060606
2510 17:35:48.976167 MTRR: Fixed MSR 0x26d 0x0606060606060606
2511 17:35:48.979251 MTRR: Fixed MSR 0x26e 0x0606060606060606
2512 17:35:48.982844 MTRR: Fixed MSR 0x26f 0x0606060606060606
2513 17:35:48.986753 call enable_fixed_mtrr()
2514 17:35:48.990146 CPU physical address size: 39 bits
2515 17:35:48.996490 MTRR: default type WB/UC MTRR counts: 6/6.
2516 17:35:49.000050 MTRR: UC selected as default type.
2517 17:35:49.006820 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2518 17:35:49.010238 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2519 17:35:49.016688 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2520 17:35:49.023270 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2521 17:35:49.029539 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2522 17:35:49.036468 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2523 17:35:49.043068 MTRR: Fixed MSR 0x250 0x0606060606060606
2524 17:35:49.046315 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 17:35:49.049852 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 17:35:49.053331 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 17:35:49.060063 MTRR: Fixed MSR 0x269 0x0606060606060606
2528 17:35:49.062851 MTRR: Fixed MSR 0x26a 0x0606060606060606
2529 17:35:49.066348 MTRR: Fixed MSR 0x26b 0x0606060606060606
2530 17:35:49.069916 MTRR: Fixed MSR 0x26c 0x0606060606060606
2531 17:35:49.076351 MTRR: Fixed MSR 0x26d 0x0606060606060606
2532 17:35:49.079212 MTRR: Fixed MSR 0x26e 0x0606060606060606
2533 17:35:49.082581 MTRR: Fixed MSR 0x26f 0x0606060606060606
2534 17:35:49.086268 MTRR: Fixed MSR 0x250 0x0606060606060606
2535 17:35:49.092762 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 17:35:49.096241 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 17:35:49.099310 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 17:35:49.102444 MTRR: Fixed MSR 0x269 0x0606060606060606
2539 17:35:49.109712 MTRR: Fixed MSR 0x250 0x0606060606060606
2540 17:35:49.112458 MTRR: Fixed MSR 0x250 0x0606060606060606
2541 17:35:49.115972 MTRR: Fixed MSR 0x250 0x0606060606060606
2542 17:35:49.119380 MTRR: Fixed MSR 0x250 0x0606060606060606
2543 17:35:49.122283 MTRR: Fixed MSR 0x258 0x0606060606060606
2544 17:35:49.129339 MTRR: Fixed MSR 0x259 0x0000000000000000
2545 17:35:49.132729 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 17:35:49.136137 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 17:35:49.138839 call enable_fixed_mtrr()
2548 17:35:49.142306 MTRR: Fixed MSR 0x258 0x0606060606060606
2549 17:35:49.145569 MTRR: Fixed MSR 0x259 0x0000000000000000
2550 17:35:49.152538 MTRR: Fixed MSR 0x268 0x0606060606060606
2551 17:35:49.155355 MTRR: Fixed MSR 0x269 0x0606060606060606
2552 17:35:49.159342 MTRR: Fixed MSR 0x26a 0x0606060606060606
2553 17:35:49.162676 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 17:35:49.168982 MTRR: Fixed MSR 0x26c 0x0606060606060606
2555 17:35:49.172307 MTRR: Fixed MSR 0x26d 0x0606060606060606
2556 17:35:49.175995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2557 17:35:49.179210 MTRR: Fixed MSR 0x26f 0x0606060606060606
2558 17:35:49.185377 MTRR: Fixed MSR 0x258 0x0606060606060606
2559 17:35:49.185496 call enable_fixed_mtrr()
2560 17:35:49.192313 MTRR: Fixed MSR 0x26a 0x0606060606060606
2561 17:35:49.195747 MTRR: Fixed MSR 0x259 0x0000000000000000
2562 17:35:49.199104 MTRR: Fixed MSR 0x268 0x0606060606060606
2563 17:35:49.202210 MTRR: Fixed MSR 0x269 0x0606060606060606
2564 17:35:49.205326 MTRR: Fixed MSR 0x250 0x0606060606060606
2565 17:35:49.212292 MTRR: Fixed MSR 0x26a 0x0606060606060606
2566 17:35:49.215600 MTRR: Fixed MSR 0x26b 0x0606060606060606
2567 17:35:49.218693 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 17:35:49.222027 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 17:35:49.228445 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 17:35:49.231837 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 17:35:49.235490 MTRR: Fixed MSR 0x258 0x0606060606060606
2572 17:35:49.238769 CPU physical address size: 39 bits
2573 17:35:49.241705 MTRR: Fixed MSR 0x259 0x0000000000000000
2574 17:35:49.248443 MTRR: Fixed MSR 0x258 0x0606060606060606
2575 17:35:49.251951 MTRR: Fixed MSR 0x26b 0x0606060606060606
2576 17:35:49.255057 MTRR: Fixed MSR 0x26c 0x0606060606060606
2577 17:35:49.258139 MTRR: Fixed MSR 0x26d 0x0606060606060606
2578 17:35:49.265332 MTRR: Fixed MSR 0x26e 0x0606060606060606
2579 17:35:49.268765 MTRR: Fixed MSR 0x26f 0x0606060606060606
2580 17:35:49.271612 MTRR: Fixed MSR 0x268 0x0606060606060606
2581 17:35:49.274876 call enable_fixed_mtrr()
2582 17:35:49.278273 call enable_fixed_mtrr()
2583 17:35:49.281961 MTRR: Fixed MSR 0x259 0x0000000000000000
2584 17:35:49.284850 MTRR: Fixed MSR 0x269 0x0606060606060606
2585 17:35:49.288155 CPU physical address size: 39 bits
2586 17:35:49.291390 CPU physical address size: 39 bits
2587 17:35:49.294611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2588 17:35:49.301645 MTRR: Fixed MSR 0x26b 0x0606060606060606
2589 17:35:49.304447 MTRR: Fixed MSR 0x26c 0x0606060606060606
2590 17:35:49.308001 MTRR: Fixed MSR 0x26d 0x0606060606060606
2591 17:35:49.311516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2592 17:35:49.317697 MTRR: Fixed MSR 0x26f 0x0606060606060606
2593 17:35:49.321295 CPU physical address size: 39 bits
2594 17:35:49.324890 call enable_fixed_mtrr()
2595 17:35:49.327767 MTRR: Fixed MSR 0x26a 0x0606060606060606
2596 17:35:49.331005 CPU physical address size: 39 bits
2597 17:35:49.334884 MTRR: Fixed MSR 0x268 0x0606060606060606
2598 17:35:49.337778 MTRR: Fixed MSR 0x26b 0x0606060606060606
2599 17:35:49.344112 MTRR: Fixed MSR 0x269 0x0606060606060606
2600 17:35:49.347381 MTRR: Fixed MSR 0x26c 0x0606060606060606
2601 17:35:49.351168 MTRR: Fixed MSR 0x26d 0x0606060606060606
2602 17:35:49.353914 MTRR: Fixed MSR 0x26e 0x0606060606060606
2603 17:35:49.357722 MTRR: Fixed MSR 0x26f 0x0606060606060606
2604 17:35:49.364330 MTRR: Fixed MSR 0x26a 0x0606060606060606
2605 17:35:49.364433 call enable_fixed_mtrr()
2606 17:35:49.370937 MTRR: Fixed MSR 0x26b 0x0606060606060606
2607 17:35:49.373978 MTRR: Fixed MSR 0x26c 0x0606060606060606
2608 17:35:49.377377 MTRR: Fixed MSR 0x26d 0x0606060606060606
2609 17:35:49.380784 MTRR: Fixed MSR 0x26e 0x0606060606060606
2610 17:35:49.387754 MTRR: Fixed MSR 0x26f 0x0606060606060606
2611 17:35:49.390720 CPU physical address size: 39 bits
2612 17:35:49.390802 call enable_fixed_mtrr()
2613 17:35:49.397289 CPU physical address size: 39 bits
2614 17:35:49.397388
2615 17:35:49.397453 MTRR check
2616 17:35:49.400576 Fixed MTRRs : Enabled
2617 17:35:49.403625 Variable MTRRs: Enabled
2618 17:35:49.403711
2619 17:35:49.410592 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2620 17:35:49.413730 Checking cr50 for pending updates
2621 17:35:49.424913 Reading cr50 TPM mode
2622 17:35:49.440193 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2623 17:35:49.450091 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2624 17:35:49.453279 Checking segment from ROM address 0xf96cbe6c
2625 17:35:49.456641 Checking segment from ROM address 0xf96cbe88
2626 17:35:49.463157 Loading segment from ROM address 0xf96cbe6c
2627 17:35:49.463241 code (compression=1)
2628 17:35:49.473012 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2629 17:35:49.479564 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2630 17:35:49.483192 using LZMA
2631 17:35:49.504810 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2632 17:35:49.511576 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2633 17:35:49.519715 Loading segment from ROM address 0xf96cbe88
2634 17:35:49.522471 Entry Point 0x30000000
2635 17:35:49.522554 Loaded segments
2636 17:35:49.529282 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2637 17:35:49.535930 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2638 17:35:49.539685 Finalizing chipset.
2639 17:35:49.542541 apm_control: Finalizing SMM.
2640 17:35:49.542624 APMC done.
2641 17:35:49.546002 HECI: CSE device 16.1 is disabled
2642 17:35:49.549406 HECI: CSE device 16.2 is disabled
2643 17:35:49.552588 HECI: CSE device 16.3 is disabled
2644 17:35:49.555912 HECI: CSE device 16.4 is disabled
2645 17:35:49.559316 HECI: CSE device 16.5 is disabled
2646 17:35:49.562746 HECI: Sending End-of-Post
2647 17:35:49.571099 CSE: EOP requested action: continue boot
2648 17:35:49.574408 CSE EOP successful, continuing boot
2649 17:35:49.580600 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2650 17:35:49.584173 mp_park_aps done after 0 msecs.
2651 17:35:49.587192 Jumping to boot code at 0x30000000(0x76891000)
2652 17:35:49.597182 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2653 17:35:49.601592
2654 17:35:49.601676
2655 17:35:49.601741
2656 17:35:49.604707 Starting depthcharge on Volmar...
2657 17:35:49.604790
2658 17:35:49.605211 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2659 17:35:49.605314 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2660 17:35:49.605398 Setting prompt string to ['brya:']
2661 17:35:49.605480 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2662 17:35:49.611408 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2663 17:35:49.611493
2664 17:35:49.618652 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2665 17:35:49.618802
2666 17:35:49.625128 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2667 17:35:49.625256
2668 17:35:49.628241 configure_storage: Failed to remap 1C:2
2669 17:35:49.628323
2670 17:35:49.631623 Wipe memory regions:
2671 17:35:49.631706
2672 17:35:49.634471 [0x00000000001000, 0x000000000a0000)
2673 17:35:49.634554
2674 17:35:49.638133 [0x00000000100000, 0x00000030000000)
2675 17:35:49.740434
2676 17:35:49.743696 [0x00000032668e60, 0x00000076857000)
2677 17:35:49.888096
2678 17:35:49.891252 [0x00000100000000, 0x0000027fc00000)
2679 17:35:50.702228
2680 17:35:50.705456 ec_init: CrosEC protocol v3 supported (256, 256)
2681 17:35:51.316824
2682 17:35:51.317014 R8152: Initializing
2683 17:35:51.317120
2684 17:35:51.320170 Version 9 (ocp_data = 6010)
2685 17:35:51.320279
2686 17:35:51.323522 R8152: Done initializing
2687 17:35:51.323604
2688 17:35:51.326457 Adding net device
2689 17:35:51.627448
2690 17:35:51.630673 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2691 17:35:51.630781
2692 17:35:51.630881
2693 17:35:51.630980
2694 17:35:51.631308 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2696 17:35:51.731646 brya: tftpboot 192.168.201.1 12757518/tftp-deploy-liwav8x7/kernel/bzImage 12757518/tftp-deploy-liwav8x7/kernel/cmdline 12757518/tftp-deploy-liwav8x7/ramdisk/ramdisk.cpio.gz
2697 17:35:51.731983 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2698 17:35:51.732085 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2699 17:35:51.735813 tftpboot 192.168.201.1 12757518/tftp-deploy-liwav8x7/kernel/bzIploy-liwav8x7/kernel/cmdline 12757518/tftp-deploy-liwav8x7/ramdisk/ramdisk.cpio.gz
2700 17:35:51.735897
2701 17:35:51.735965 Waiting for link
2702 17:35:51.938537
2703 17:35:51.938680 done.
2704 17:35:51.938753
2705 17:35:51.938824 MAC: 00:e0:4c:68:01:22
2706 17:35:51.938884
2707 17:35:51.941921 Sending DHCP discover... done.
2708 17:35:51.942053
2709 17:35:51.945386 Waiting for reply... done.
2710 17:35:51.945464
2711 17:35:51.948817 Sending DHCP request... done.
2712 17:35:51.948895
2713 17:35:51.955540 Waiting for reply... done.
2714 17:35:51.955652
2715 17:35:51.955750 My ip is 192.168.201.15
2716 17:35:51.955854
2717 17:35:51.958377 The DHCP server ip is 192.168.201.1
2718 17:35:51.958450
2719 17:35:51.965214 TFTP server IP predefined by user: 192.168.201.1
2720 17:35:51.965321
2721 17:35:51.971688 Bootfile predefined by user: 12757518/tftp-deploy-liwav8x7/kernel/bzImage
2722 17:35:51.971772
2723 17:35:51.975168 Sending tftp read request... done.
2724 17:35:51.975274
2725 17:35:51.978626 Waiting for the transfer...
2726 17:35:51.978706
2727 17:35:52.228296 00000000 ################################################################
2728 17:35:52.228435
2729 17:35:52.478183 00080000 ################################################################
2730 17:35:52.478365
2731 17:35:52.733284 00100000 ################################################################
2732 17:35:52.733433
2733 17:35:52.987370 00180000 ################################################################
2734 17:35:52.987506
2735 17:35:53.243920 00200000 ################################################################
2736 17:35:53.244074
2737 17:35:53.496633 00280000 ################################################################
2738 17:35:53.496770
2739 17:35:53.747111 00300000 ################################################################
2740 17:35:53.747248
2741 17:35:53.995119 00380000 ################################################################
2742 17:35:53.995288
2743 17:35:54.244177 00400000 ################################################################
2744 17:35:54.244310
2745 17:35:54.493006 00480000 ################################################################
2746 17:35:54.493150
2747 17:35:54.752863 00500000 ################################################################
2748 17:35:54.753002
2749 17:35:55.005770 00580000 ################################################################
2750 17:35:55.005914
2751 17:35:55.260820 00600000 ################################################################
2752 17:35:55.260989
2753 17:35:55.521208 00680000 ################################################################
2754 17:35:55.521382
2755 17:35:55.769066 00700000 ################################################################
2756 17:35:55.769243
2757 17:35:56.026811 00780000 ################################################################
2758 17:35:56.026982
2759 17:35:56.273386 00800000 ################################################################
2760 17:35:56.273577
2761 17:35:56.519441 00880000 ################################################################
2762 17:35:56.519619
2763 17:35:56.764840 00900000 ################################################################
2764 17:35:56.765004
2765 17:35:57.001603 00980000 ################################################################
2766 17:35:57.001768
2767 17:35:57.245435 00a00000 ################################################################
2768 17:35:57.245567
2769 17:35:57.500187 00a80000 ################################################################
2770 17:35:57.500337
2771 17:35:57.778731 00b00000 ################################################################
2772 17:35:57.778900
2773 17:35:58.052102 00b80000 ################################################################
2774 17:35:58.052242
2775 17:35:58.330796 00c00000 ################################################################
2776 17:35:58.330964
2777 17:35:58.582460 00c80000 ################################################################
2778 17:35:58.582616
2779 17:35:58.843157 00d00000 ############################################################# done.
2780 17:35:58.843731
2781 17:35:58.846678 The bootfile was 14127744 bytes long.
2782 17:35:58.847104
2783 17:35:58.850214 Sending tftp read request... done.
2784 17:35:58.850641
2785 17:35:58.853042 Waiting for the transfer...
2786 17:35:58.853465
2787 17:35:59.168735 00000000 ################################################################
2788 17:35:59.168867
2789 17:35:59.449402 00080000 ################################################################
2790 17:35:59.449536
2791 17:35:59.704257 00100000 ################################################################
2792 17:35:59.704394
2793 17:35:59.957523 00180000 ################################################################
2794 17:35:59.957660
2795 17:36:00.227748 00200000 ################################################################
2796 17:36:00.227910
2797 17:36:00.496991 00280000 ################################################################
2798 17:36:00.497127
2799 17:36:00.752546 00300000 ################################################################
2800 17:36:00.752709
2801 17:36:01.008318 00380000 ################################################################
2802 17:36:01.008452
2803 17:36:01.268365 00400000 ################################################################
2804 17:36:01.268526
2805 17:36:01.530021 00480000 ################################################################
2806 17:36:01.530154
2807 17:36:01.792957 00500000 ################################################################
2808 17:36:01.793089
2809 17:36:02.008975 00580000 ####################################################### done.
2810 17:36:02.012214
2811 17:36:02.015576 Sending tftp read request... done.
2812 17:36:02.015689
2813 17:36:02.015785 Waiting for the transfer...
2814 17:36:02.015877
2815 17:36:02.018742 00000000 # done.
2816 17:36:02.018828
2817 17:36:02.028449 Command line loaded dynamically from TFTP file: 12757518/tftp-deploy-liwav8x7/kernel/cmdline
2818 17:36:02.028538
2819 17:36:02.051569 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12757518/extract-nfsrootfs-hkqz4bs6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2820 17:36:02.058386
2821 17:36:02.061996 Shutting down all USB controllers.
2822 17:36:02.062081
2823 17:36:02.062148 Removing current net device
2824 17:36:02.062211
2825 17:36:02.064840 Finalizing coreboot
2826 17:36:02.064924
2827 17:36:02.071314 Exiting depthcharge with code 4 at timestamp: 22709508
2828 17:36:02.071415
2829 17:36:02.071481
2830 17:36:02.071543 Starting kernel ...
2831 17:36:02.071602
2832 17:36:02.071659
2833 17:36:02.072038 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2834 17:36:02.072135 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2835 17:36:02.072213 Setting prompt string to ['Linux version [0-9]']
2836 17:36:02.072283 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2837 17:36:02.072354 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2839 17:40:30.073044 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2841 17:40:30.074114 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2843 17:40:30.074983 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2846 17:40:30.076442 end: 2 depthcharge-action (duration 00:05:00) [common]
2848 17:40:30.077598 Cleaning after the job
2849 17:40:30.077785 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/ramdisk
2850 17:40:30.078788 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/kernel
2851 17:40:30.080977 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/nfsrootfs
2852 17:40:30.156976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12757518/tftp-deploy-liwav8x7/modules
2853 17:40:30.157690 start: 5.1 power-off (timeout 00:00:30) [common]
2854 17:40:30.157866 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=off'
2855 17:40:30.235198 >> Command sent successfully.
2856 17:40:30.240037 Returned 0 in 0 seconds
2857 17:40:30.341004 end: 5.1 power-off (duration 00:00:00) [common]
2859 17:40:30.342558 start: 5.2 read-feedback (timeout 00:10:00) [common]
2860 17:40:30.344323 Listened to connection for namespace 'common' for up to 1s
2862 17:40:30.345727 Listened to connection for namespace 'common' for up to 1s
2863 17:40:31.344584 Finalising connection for namespace 'common'
2864 17:40:31.345364 Disconnecting from shell: Finalise
2865 17:40:31.345840
2866 17:40:31.446897 end: 5.2 read-feedback (duration 00:00:01) [common]
2867 17:40:31.447569 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12757518
2868 17:40:31.807273 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12757518
2869 17:40:31.807537 JobError: Your job cannot terminate cleanly.