Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Kernel Errors: 0
1 16:52:05.605456 lava-dispatcher, installed at version: 2024.01
2 16:52:05.605682 start: 0 validate
3 16:52:05.605812 Start time: 2024-02-05 16:52:05.605805+00:00 (UTC)
4 16:52:05.605938 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:52:05.606065 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 16:52:05.872965 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:52:05.873406 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.209-cip44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 16:52:06.141208 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:52:06.141900 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.209-cip44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 16:52:06.427383 validate duration: 0.82
12 16:52:06.428752 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 16:52:06.429425 start: 1.1 download-retry (timeout 00:10:00) [common]
14 16:52:06.430073 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 16:52:06.430775 Not decompressing ramdisk as can be used compressed.
16 16:52:06.431243 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 16:52:06.431599 saving as /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/ramdisk/rootfs.cpio.gz
18 16:52:06.431955 total size: 8418130 (8 MB)
19 16:52:06.437745 progress 0 % (0 MB)
20 16:52:06.449458 progress 5 % (0 MB)
21 16:52:06.456327 progress 10 % (0 MB)
22 16:52:06.461481 progress 15 % (1 MB)
23 16:52:06.465899 progress 20 % (1 MB)
24 16:52:06.469659 progress 25 % (2 MB)
25 16:52:06.473105 progress 30 % (2 MB)
26 16:52:06.476106 progress 35 % (2 MB)
27 16:52:06.479009 progress 40 % (3 MB)
28 16:52:06.481829 progress 45 % (3 MB)
29 16:52:06.484448 progress 50 % (4 MB)
30 16:52:06.486922 progress 55 % (4 MB)
31 16:52:06.489255 progress 60 % (4 MB)
32 16:52:06.491401 progress 65 % (5 MB)
33 16:52:06.493666 progress 70 % (5 MB)
34 16:52:06.495883 progress 75 % (6 MB)
35 16:52:06.498152 progress 80 % (6 MB)
36 16:52:06.500379 progress 85 % (6 MB)
37 16:52:06.502602 progress 90 % (7 MB)
38 16:52:06.504819 progress 95 % (7 MB)
39 16:52:06.506944 progress 100 % (8 MB)
40 16:52:06.507177 8 MB downloaded in 0.08 s (106.69 MB/s)
41 16:52:06.507337 end: 1.1.1 http-download (duration 00:00:00) [common]
43 16:52:06.507575 end: 1.1 download-retry (duration 00:00:00) [common]
44 16:52:06.507663 start: 1.2 download-retry (timeout 00:10:00) [common]
45 16:52:06.507746 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 16:52:06.507882 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.209-cip44/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 16:52:06.507953 saving as /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/kernel/bzImage
48 16:52:06.508013 total size: 14127296 (13 MB)
49 16:52:06.508073 No compression specified
50 16:52:06.509321 progress 0 % (0 MB)
51 16:52:06.513054 progress 5 % (0 MB)
52 16:52:06.516937 progress 10 % (1 MB)
53 16:52:06.520672 progress 15 % (2 MB)
54 16:52:06.524538 progress 20 % (2 MB)
55 16:52:06.528200 progress 25 % (3 MB)
56 16:52:06.532077 progress 30 % (4 MB)
57 16:52:06.535739 progress 35 % (4 MB)
58 16:52:06.539536 progress 40 % (5 MB)
59 16:52:06.543371 progress 45 % (6 MB)
60 16:52:06.546998 progress 50 % (6 MB)
61 16:52:06.550839 progress 55 % (7 MB)
62 16:52:06.554469 progress 60 % (8 MB)
63 16:52:06.558307 progress 65 % (8 MB)
64 16:52:06.562056 progress 70 % (9 MB)
65 16:52:06.565825 progress 75 % (10 MB)
66 16:52:06.569481 progress 80 % (10 MB)
67 16:52:06.573249 progress 85 % (11 MB)
68 16:52:06.576994 progress 90 % (12 MB)
69 16:52:06.580546 progress 95 % (12 MB)
70 16:52:06.584308 progress 100 % (13 MB)
71 16:52:06.584433 13 MB downloaded in 0.08 s (176.31 MB/s)
72 16:52:06.584580 end: 1.2.1 http-download (duration 00:00:00) [common]
74 16:52:06.584807 end: 1.2 download-retry (duration 00:00:00) [common]
75 16:52:06.584894 start: 1.3 download-retry (timeout 00:10:00) [common]
76 16:52:06.584988 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 16:52:06.585128 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.209-cip44/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 16:52:06.585201 saving as /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/modules/modules.tar
79 16:52:06.585262 total size: 526828 (0 MB)
80 16:52:06.585323 Using unxz to decompress xz
81 16:52:06.589664 progress 6 % (0 MB)
82 16:52:06.590095 progress 12 % (0 MB)
83 16:52:06.590337 progress 18 % (0 MB)
84 16:52:06.591866 progress 24 % (0 MB)
85 16:52:06.593790 progress 31 % (0 MB)
86 16:52:06.595766 progress 37 % (0 MB)
87 16:52:06.597789 progress 43 % (0 MB)
88 16:52:06.599718 progress 49 % (0 MB)
89 16:52:06.601751 progress 55 % (0 MB)
90 16:52:06.603625 progress 62 % (0 MB)
91 16:52:06.605678 progress 68 % (0 MB)
92 16:52:06.607637 progress 74 % (0 MB)
93 16:52:06.609744 progress 80 % (0 MB)
94 16:52:06.611949 progress 87 % (0 MB)
95 16:52:06.613809 progress 93 % (0 MB)
96 16:52:06.615748 progress 99 % (0 MB)
97 16:52:06.623059 0 MB downloaded in 0.04 s (13.29 MB/s)
98 16:52:06.623304 end: 1.3.1 http-download (duration 00:00:00) [common]
100 16:52:06.623590 end: 1.3 download-retry (duration 00:00:00) [common]
101 16:52:06.623687 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 16:52:06.623780 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 16:52:06.623861 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 16:52:06.623945 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 16:52:06.624165 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0
106 16:52:06.624298 makedir: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin
107 16:52:06.624401 makedir: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/tests
108 16:52:06.624499 makedir: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/results
109 16:52:06.624611 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-add-keys
110 16:52:06.624759 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-add-sources
111 16:52:06.624889 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-background-process-start
112 16:52:06.625067 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-background-process-stop
113 16:52:06.625198 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-common-functions
114 16:52:06.625326 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-echo-ipv4
115 16:52:06.625453 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-install-packages
116 16:52:06.625578 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-installed-packages
117 16:52:06.625704 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-os-build
118 16:52:06.625828 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-probe-channel
119 16:52:06.625952 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-probe-ip
120 16:52:06.626077 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-target-ip
121 16:52:06.626203 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-target-mac
122 16:52:06.626326 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-target-storage
123 16:52:06.626457 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-case
124 16:52:06.626600 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-event
125 16:52:06.626725 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-feedback
126 16:52:06.626850 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-raise
127 16:52:06.626974 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-reference
128 16:52:06.627098 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-runner
129 16:52:06.627221 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-set
130 16:52:06.627347 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-test-shell
131 16:52:06.627475 Updating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-install-packages (oe)
132 16:52:06.627623 Updating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/bin/lava-installed-packages (oe)
133 16:52:06.627754 Creating /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/environment
134 16:52:06.627856 LAVA metadata
135 16:52:06.627930 - LAVA_JOB_ID=12704394
136 16:52:06.627995 - LAVA_DISPATCHER_IP=192.168.201.1
137 16:52:06.628096 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 16:52:06.628163 skipped lava-vland-overlay
139 16:52:06.628241 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 16:52:06.628319 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 16:52:06.628380 skipped lava-multinode-overlay
142 16:52:06.628452 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 16:52:06.628543 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 16:52:06.628617 Loading test definitions
145 16:52:06.628709 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 16:52:06.628782 Using /lava-12704394 at stage 0
147 16:52:06.629134 uuid=12704394_1.4.2.3.1 testdef=None
148 16:52:06.629221 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 16:52:06.629305 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 16:52:06.629859 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 16:52:06.630091 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 16:52:06.630725 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 16:52:06.630951 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 16:52:06.631564 runner path: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/0/tests/0_dmesg test_uuid 12704394_1.4.2.3.1
157 16:52:06.631717 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 16:52:06.631946 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 16:52:06.632017 Using /lava-12704394 at stage 1
161 16:52:06.632314 uuid=12704394_1.4.2.3.5 testdef=None
162 16:52:06.632399 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 16:52:06.632483 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 16:52:06.633036 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 16:52:06.633258 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 16:52:06.633897 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 16:52:06.634121 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 16:52:06.634743 runner path: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/1/tests/1_bootrr test_uuid 12704394_1.4.2.3.5
171 16:52:06.634893 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 16:52:06.635095 Creating lava-test-runner.conf files
174 16:52:06.635158 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/0 for stage 0
175 16:52:06.635248 - 0_dmesg
176 16:52:06.635328 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12704394/lava-overlay-_hhpoce0/lava-12704394/1 for stage 1
177 16:52:06.635418 - 1_bootrr
178 16:52:06.635511 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 16:52:06.635593 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 16:52:06.643647 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 16:52:06.643749 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 16:52:06.643834 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 16:52:06.643918 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 16:52:06.644004 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 16:52:06.895142 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 16:52:06.895526 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
187 16:52:06.895641 extracting modules file /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12704394/extract-overlay-ramdisk-_g5sj1qp/ramdisk
188 16:52:06.920067 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 16:52:06.920211 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
190 16:52:06.920304 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12704394/compress-overlay-s5gzkinh/overlay-1.4.2.4.tar.gz to ramdisk
191 16:52:06.920373 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12704394/compress-overlay-s5gzkinh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12704394/extract-overlay-ramdisk-_g5sj1qp/ramdisk
192 16:52:06.928615 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 16:52:06.928728 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 16:52:06.928819 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 16:52:06.928907 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 16:52:06.929062 Building ramdisk /var/lib/lava/dispatcher/tmp/12704394/extract-overlay-ramdisk-_g5sj1qp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12704394/extract-overlay-ramdisk-_g5sj1qp/ramdisk
197 16:52:07.084116 >> 54152 blocks
198 16:52:08.012952 rename /var/lib/lava/dispatcher/tmp/12704394/extract-overlay-ramdisk-_g5sj1qp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/ramdisk/ramdisk.cpio.gz
199 16:52:08.013425 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 16:52:08.013553 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 16:52:08.013655 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 16:52:08.013750 No mkimage arch provided, not using FIT.
203 16:52:08.013840 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 16:52:08.013922 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 16:52:08.014017 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 16:52:08.014106 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 16:52:08.014186 No LXC device requested
208 16:52:08.014263 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 16:52:08.014347 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 16:52:08.014426 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 16:52:08.014499 Checking files for TFTP limit of 4294967296 bytes.
212 16:52:08.014906 end: 1 tftp-deploy (duration 00:00:02) [common]
213 16:52:08.015025 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 16:52:08.015119 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 16:52:08.015243 substitutions:
216 16:52:08.015313 - {DTB}: None
217 16:52:08.015374 - {INITRD}: 12704394/tftp-deploy-z7hzfi68/ramdisk/ramdisk.cpio.gz
218 16:52:08.015433 - {KERNEL}: 12704394/tftp-deploy-z7hzfi68/kernel/bzImage
219 16:52:08.015490 - {LAVA_MAC}: None
220 16:52:08.015546 - {PRESEED_CONFIG}: None
221 16:52:08.015601 - {PRESEED_LOCAL}: None
222 16:52:08.015655 - {RAMDISK}: 12704394/tftp-deploy-z7hzfi68/ramdisk/ramdisk.cpio.gz
223 16:52:08.015709 - {ROOT_PART}: None
224 16:52:08.015762 - {ROOT}: None
225 16:52:08.015815 - {SERVER_IP}: 192.168.201.1
226 16:52:08.015868 - {TEE}: None
227 16:52:08.015921 Parsed boot commands:
228 16:52:08.015974 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 16:52:08.016155 Parsed boot commands: tftpboot 192.168.201.1 12704394/tftp-deploy-z7hzfi68/kernel/bzImage 12704394/tftp-deploy-z7hzfi68/kernel/cmdline 12704394/tftp-deploy-z7hzfi68/ramdisk/ramdisk.cpio.gz
230 16:52:08.016245 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 16:52:08.016329 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 16:52:08.016419 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 16:52:08.016503 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 16:52:08.016577 Not connected, no need to disconnect.
235 16:52:08.016655 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 16:52:08.016740 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 16:52:08.016810 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
238 16:52:08.020920 Setting prompt string to ['lava-test: # ']
239 16:52:08.021317 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 16:52:08.021421 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 16:52:08.021517 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 16:52:08.021602 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 16:52:08.021801 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
244 16:52:13.163659 >> Command sent successfully.
245 16:52:13.174330 Returned 0 in 5 seconds
246 16:52:13.275505 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 16:52:13.276824 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 16:52:13.277331 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 16:52:13.277764 Setting prompt string to 'Starting depthcharge on Volmar...'
251 16:52:13.278116 Changing prompt to 'Starting depthcharge on Volmar...'
252 16:52:13.278451 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 16:52:13.279622 [Enter `^Ec?' for help]
254 16:52:14.645190
255 16:52:14.645777
256 16:52:14.652545 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 16:52:14.655840 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 16:52:14.663239 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 16:52:14.666779 CPU: AES supported, TXT NOT supported, VT supported
260 16:52:14.674185 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 16:52:14.678001 Cache size = 10 MiB
262 16:52:14.681464 MCH: device id 4609 (rev 04) is Alderlake-P
263 16:52:14.685379 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 16:52:14.688755 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 16:52:14.692014 VBOOT: Loading verstage.
266 16:52:14.699478 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 16:52:14.703129 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 16:52:14.706525 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 16:52:14.716578 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 16:52:14.723787 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 16:52:14.724226
272 16:52:14.724556
273 16:52:14.733470 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 16:52:14.740919 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 16:52:14.744593 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 16:52:14.745079 I2C TX abort detected (00000001)
277 16:52:14.751177 cr50_i2c_read: Address write failed
278 16:52:14.761313 .done! DID_VID 0x00281ae0
279 16:52:14.764601 TPM ready after 0 ms
280 16:52:14.767912 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 16:52:14.781971 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 16:52:14.788515 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 16:52:14.840911 tlcl_send_startup: Startup return code is 0
284 16:52:14.841402 TPM: setup succeeded
285 16:52:14.862837 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 16:52:14.884282 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 16:52:14.888131 Chrome EC: UHEPI supported
288 16:52:14.891651 Reading cr50 boot mode
289 16:52:14.906467 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 16:52:14.906902 Phase 1
291 16:52:14.910413 FMAP: area GBB found @ 1805000 (458752 bytes)
292 16:52:14.921346 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 16:52:14.928088 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 16:52:14.934733 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 16:52:14.935250 Phase 2
296 16:52:14.935755 Phase 3
297 16:52:14.941507 FMAP: area GBB found @ 1805000 (458752 bytes)
298 16:52:14.944716 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 16:52:14.951240 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 16:52:14.958110 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 16:52:14.964455 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 16:52:14.972160 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 16:52:14.978563 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 16:52:14.991918 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 16:52:14.995528 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 16:52:15.002339 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 16:52:15.008483 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 16:52:15.015406 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 16:52:15.021936 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 16:52:15.025466 Phase 4
311 16:52:15.028798 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 16:52:15.035614 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 16:52:15.247885 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 16:52:15.254579 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 16:52:15.258040 Saving vboot hash.
316 16:52:15.264523 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 16:52:15.280812 tlcl_extend: response is 0
318 16:52:15.287396 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 16:52:15.293957 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 16:52:15.308656 tlcl_extend: response is 0
321 16:52:15.314991 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 16:52:15.332117 tlcl_lock_nv_write: response is 0
323 16:52:15.354275 tlcl_lock_nv_write: response is 0
324 16:52:15.354728 Slot A is selected
325 16:52:15.360586 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 16:52:15.367580 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 16:52:15.374199 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 16:52:15.380512 BS: verstage times (exec / console): total (unknown) / 264 ms
329 16:52:15.380940
330 16:52:15.381329
331 16:52:15.387461 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 16:52:15.391100 Google Chrome EC: version:
333 16:52:15.394535 ro: volmar_v2.0.14126-e605144e9c
334 16:52:15.398003 rw: volmar_v0.0.55-22d1557
335 16:52:15.401221 running image: 2
336 16:52:15.404599 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 16:52:15.414469 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 16:52:15.421038 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 16:52:15.427513 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 16:52:15.438004 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 16:52:15.447873 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 16:52:15.451315 EC took 1228us to calculate image hash
343 16:52:15.461536 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 16:52:15.467703 VB2:sync_ec() select_rw=RW(active)
345 16:52:15.477693 Waited 375us to clear limit power flag.
346 16:52:15.481468 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 16:52:15.484707 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 16:52:15.487860 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 16:52:15.494358 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 16:52:15.497911 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
351 16:52:15.501558 TCO_STS: 0000 0000
352 16:52:15.504610 GEN_PMCON: d0015038 00002200
353 16:52:15.505191 GBLRST_CAUSE: 00000000 00000000
354 16:52:15.508112 HPR_CAUSE0: 00000000
355 16:52:15.511773 prev_sleep_state 5
356 16:52:15.514242 Abort disabling TXT, as CPU is not TXT capable.
357 16:52:15.522607 cse_lite: Number of partitions = 3
358 16:52:15.525452 cse_lite: Current partition = RO
359 16:52:15.525904 cse_lite: Next partition = RO
360 16:52:15.529080 cse_lite: Flags = 0x7
361 16:52:15.535636 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 16:52:15.545429 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 16:52:15.549170 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 16:52:15.555579 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 16:52:15.562019 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 16:52:15.568511 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 16:52:15.572259 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 16:52:15.578534 cse_lite: Set Boot Partition Info Command (RW)
369 16:52:15.582030 HECI: Global Reset(Type:1) Command
370 16:52:17.016743 ted, TXT NOT supported, VT supported
371 16:52:17.023791 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
372 16:52:17.024334 Cache size = 10 MiB
373 16:52:17.030357 MCH: device id 4609 (rev 04) is Alderlake-P
374 16:52:17.033909 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
375 16:52:17.040160 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
376 16:52:17.043950 VBOOT: Loading verstage.
377 16:52:17.047710 FMAP: Found "FLASH" version 1.1 at 0x1804000.
378 16:52:17.051016 FMAP: base = 0x0 size = 0x2000000 #areas = 37
379 16:52:17.057444 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 16:52:17.065034 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
381 16:52:17.071332 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
382 16:52:17.074802
383 16:52:17.075252
384 16:52:17.081478 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
385 16:52:17.088380 Probing TPM I2C: I2C bus 1 version 0x3230302a
386 16:52:17.091953 DW I2C bus 1 at 0xfe022000 (400 KHz)
387 16:52:17.095039 done! DID_VID 0x00281ae0
388 16:52:17.098405 TPM ready after 0 ms
389 16:52:17.101935 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
390 16:52:17.111118 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
391 16:52:17.118426 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
392 16:52:17.173942 tlcl_send_startup: Startup return code is 0
393 16:52:17.174486 TPM: setup succeeded
394 16:52:17.193748 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
395 16:52:17.215521 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
396 16:52:17.219546 Chrome EC: UHEPI supported
397 16:52:17.222861 Reading cr50 boot mode
398 16:52:17.237425 Cr50 says boot_mode is VERIFIED_RW(0x00).
399 16:52:17.237963 Phase 1
400 16:52:17.244367 FMAP: area GBB found @ 1805000 (458752 bytes)
401 16:52:17.251102 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
402 16:52:17.257627 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
403 16:52:17.264618 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
404 16:52:17.265135 Phase 2
405 16:52:17.267566 Phase 3
406 16:52:17.270974 FMAP: area GBB found @ 1805000 (458752 bytes)
407 16:52:17.277534 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 16:52:17.281169 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 16:52:17.287712 VB2:vb2_verify_keyblock() Checking keyblock signature...
410 16:52:17.294600 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
411 16:52:17.301289 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
412 16:52:17.311050 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
413 16:52:17.322830 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 16:52:17.326191 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 16:52:17.332450 VB2:vb2_verify_fw_preamble() Verifying preamble.
416 16:52:17.339375 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
417 16:52:17.345929 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
418 16:52:17.352596 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
419 16:52:17.356738 Phase 4
420 16:52:17.359903 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
421 16:52:17.366700 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
422 16:52:17.579413 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
423 16:52:17.586496 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
424 16:52:17.589048 Saving vboot hash.
425 16:52:17.595640 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
426 16:52:17.611505 tlcl_extend: response is 0
427 16:52:17.618094 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
428 16:52:17.625109 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
429 16:52:17.639194 tlcl_extend: response is 0
430 16:52:17.645750 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
431 16:52:17.664634 tlcl_lock_nv_write: response is 0
432 16:52:17.682416 tlcl_lock_nv_write: response is 0
433 16:52:17.682857 Slot A is selected
434 16:52:17.689217 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
435 16:52:17.695918 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
436 16:52:17.702222 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
437 16:52:17.709011 BS: verstage times (exec / console): total (unknown) / 257 ms
438 16:52:17.709623
439 16:52:17.710090
440 16:52:17.715656 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
441 16:52:17.719541 Google Chrome EC: version:
442 16:52:17.722543 ro: volmar_v2.0.14126-e605144e9c
443 16:52:17.726155 rw: volmar_v0.0.55-22d1557
444 16:52:17.729574 running image: 2
445 16:52:17.732687 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
446 16:52:17.742857 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
447 16:52:17.749368 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
448 16:52:17.756170 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
449 16:52:17.766185 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 16:52:17.776333 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 16:52:17.779637 EC took 1526us to calculate image hash
452 16:52:17.789596 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 16:52:17.796291 VB2:sync_ec() select_rw=RW(active)
454 16:52:17.805166 Waited 299us to clear limit power flag.
455 16:52:17.808485 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
456 16:52:17.811664 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
457 16:52:17.818646 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
458 16:52:17.821620 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
459 16:52:17.825257 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
460 16:52:17.828552 TCO_STS: 0000 0000
461 16:52:17.833160 GEN_PMCON: d1001038 00002200
462 16:52:17.833600 GBLRST_CAUSE: 00000040 00000000
463 16:52:17.835825 HPR_CAUSE0: 00000000
464 16:52:17.836333 prev_sleep_state 5
465 16:52:17.843428 Abort disabling TXT, as CPU is not TXT capable.
466 16:52:17.850050 cse_lite: Number of partitions = 3
467 16:52:17.853336 cse_lite: Current partition = RW
468 16:52:17.853780 cse_lite: Next partition = RW
469 16:52:17.856792 cse_lite: Flags = 0x7
470 16:52:17.863578 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
471 16:52:17.873557 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
472 16:52:17.876718 FMAP: area SI_ME found @ 1000 (5238784 bytes)
473 16:52:17.883194 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
474 16:52:17.890027 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
475 16:52:17.896778 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
476 16:52:17.900356 cse_lite: CSE CBFS RW version : 16.1.25.2049
477 16:52:17.902960 Boot Count incremented to 6841
478 16:52:17.910032 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
479 16:52:17.916150 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
480 16:52:17.929627 Probing TPM I2C: done! DID_VID 0x00281ae0
481 16:52:17.932580 Locality already claimed
482 16:52:17.936187 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
483 16:52:17.956043 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
484 16:52:17.962225 MRC: Hash idx 0x100d comparison successful.
485 16:52:17.965632 MRC cache found, size f6c8
486 16:52:17.966112 bootmode is set to: 2
487 16:52:17.969077 EC returned error result code 3
488 16:52:17.972235 FW_CONFIG value from CBI is 0x131
489 16:52:17.979303 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
490 16:52:17.982429 SPD index = 0
491 16:52:17.989488 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
492 16:52:17.989991 SPD: module type is LPDDR4X
493 16:52:17.997154 SPD: module part number is K4U6E3S4AB-MGCL
494 16:52:18.003612 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
495 16:52:18.007048 SPD: device width 16 bits, bus width 16 bits
496 16:52:18.010172 SPD: module size is 1024 MB (per channel)
497 16:52:18.080716 CBMEM:
498 16:52:18.083690 IMD: root @ 0x76fff000 254 entries.
499 16:52:18.086829 IMD: root @ 0x76ffec00 62 entries.
500 16:52:18.095028 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
501 16:52:18.098671 RO_VPD is uninitialized or empty.
502 16:52:18.101566 FMAP: area RW_VPD found @ f29000 (8192 bytes)
503 16:52:18.108595 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
504 16:52:18.111896 External stage cache:
505 16:52:18.115072 IMD: root @ 0x7bbff000 254 entries.
506 16:52:18.118468 IMD: root @ 0x7bbfec00 62 entries.
507 16:52:18.125388 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 16:52:18.132115 MRC: Checking cached data update for 'RW_MRC_CACHE'.
509 16:52:18.135486 MRC: 'RW_MRC_CACHE' does not need update.
510 16:52:18.135936 8 DIMMs found
511 16:52:18.138757 SMM Memory Map
512 16:52:18.142221 SMRAM : 0x7b800000 0x800000
513 16:52:18.145089 Subregion 0: 0x7b800000 0x200000
514 16:52:18.148755 Subregion 1: 0x7ba00000 0x200000
515 16:52:18.152182 Subregion 2: 0x7bc00000 0x400000
516 16:52:18.155314 top_of_ram = 0x77000000
517 16:52:18.158705 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
518 16:52:18.165084 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
519 16:52:18.172064 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
520 16:52:18.175312 MTRR Range: Start=ff000000 End=0 (Size 1000000)
521 16:52:18.175737 Normal boot
522 16:52:18.185535 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
523 16:52:18.191786 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
524 16:52:18.198572 Processing 237 relocs. Offset value of 0x74ab9000
525 16:52:18.206972 BS: romstage times (exec / console): total (unknown) / 377 ms
526 16:52:18.214232
527 16:52:18.214674
528 16:52:18.220480 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
529 16:52:18.220928 Normal boot
530 16:52:18.227128 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
531 16:52:18.233783 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
532 16:52:18.240786 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
533 16:52:18.250439 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
534 16:52:18.298566 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
535 16:52:18.305040 Processing 5931 relocs. Offset value of 0x72a2f000
536 16:52:18.308513 BS: postcar times (exec / console): total (unknown) / 51 ms
537 16:52:18.311857
538 16:52:18.312390
539 16:52:18.318405 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
540 16:52:18.321647 Reserving BERT start 76a1e000, size 10000
541 16:52:18.325163 Normal boot
542 16:52:18.328549 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 16:52:18.335002 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 16:52:18.345152 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 16:52:18.348484 FMAP: area RW_VPD found @ f29000 (8192 bytes)
546 16:52:18.351817 Google Chrome EC: version:
547 16:52:18.354876 ro: volmar_v2.0.14126-e605144e9c
548 16:52:18.358429 rw: volmar_v0.0.55-22d1557
549 16:52:18.361501 running image: 2
550 16:52:18.365083 ACPI _SWS is PM1 Index 8 GPE Index -1
551 16:52:18.368360 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
552 16:52:18.372202 EC returned error result code 3
553 16:52:18.375547 FW_CONFIG value from CBI is 0x131
554 16:52:18.382013 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
555 16:52:18.385501 PCI: 00:1c.2 disabled by fw_config
556 16:52:18.392129 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 16:52:18.395478 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 16:52:18.402297 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 16:52:18.406243 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
560 16:52:18.413124 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
561 16:52:18.420014 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
562 16:52:18.423177 microcode: sig=0x906a4 pf=0x80 revision=0x423
563 16:52:18.429801 microcode: Update skipped, already up-to-date
564 16:52:18.436090 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
565 16:52:18.467824 Detected 6 core, 8 thread CPU.
566 16:52:18.471896 Setting up SMI for CPU
567 16:52:18.474542 IED base = 0x7bc00000
568 16:52:18.475081 IED size = 0x00400000
569 16:52:18.477900 Will perform SMM setup.
570 16:52:18.481613 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
571 16:52:18.484721 LAPIC 0x0 in XAPIC mode.
572 16:52:18.494586 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
573 16:52:18.498055 Processing 18 relocs. Offset value of 0x00030000
574 16:52:18.502500 Attempting to start 7 APs
575 16:52:18.505916 Waiting for 10ms after sending INIT.
576 16:52:18.519010 Waiting for SIPI to complete...
577 16:52:18.522330 LAPIC 0x1 in XAPIC mode.
578 16:52:18.525481 LAPIC 0x1c in XAPIC mode.
579 16:52:18.529208 LAPIC 0x1a in XAPIC mode.
580 16:52:18.532294 LAPIC 0x1e in XAPIC mode.
581 16:52:18.532730 LAPIC 0x8 in XAPIC mode.
582 16:52:18.535709 LAPIC 0x9 in XAPIC mode.
583 16:52:18.539158 AP: slot 3 apic_id 1a, MCU rev: 0x00000423
584 16:52:18.545572 AP: slot 7 apic_id 8, MCU rev: 0x00000423
585 16:52:18.548727 AP: slot 1 apic_id 1e, MCU rev: 0x00000423
586 16:52:18.551959 AP: slot 4 apic_id 1c, MCU rev: 0x00000423
587 16:52:18.555543 LAPIC 0x18 in XAPIC mode.
588 16:52:18.558846 AP: slot 6 apic_id 9, MCU rev: 0x00000423
589 16:52:18.565352 AP: slot 2 apic_id 18, MCU rev: 0x00000423
590 16:52:18.565965 done.
591 16:52:18.568776 AP: slot 5 apic_id 1, MCU rev: 0x00000423
592 16:52:18.571888 Waiting for SIPI to complete...
593 16:52:18.572274 done.
594 16:52:18.575416 smm_setup_relocation_handler: enter
595 16:52:18.578559 smm_setup_relocation_handler: exit
596 16:52:18.588755 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
597 16:52:18.592225 Processing 11 relocs. Offset value of 0x00038000
598 16:52:18.598811 smm_module_setup_stub: stack_top = 0x7b804000
599 16:52:18.602257 smm_module_setup_stub: per cpu stack_size = 0x800
600 16:52:18.608563 smm_module_setup_stub: runtime.start32_offset = 0x4c
601 16:52:18.612363 smm_module_setup_stub: runtime.smm_size = 0x10000
602 16:52:18.618885 SMM Module: stub loaded at 38000. Will call 0x76a52094
603 16:52:18.622033 Installing permanent SMM handler to 0x7b800000
604 16:52:18.628406 smm_load_module: total_smm_space_needed e468, available -> 200000
605 16:52:18.638364 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
606 16:52:18.641754 Processing 255 relocs. Offset value of 0x7b9f6000
607 16:52:18.648535 smm_load_module: smram_start: 0x7b800000
608 16:52:18.652027 smm_load_module: smram_end: 7ba00000
609 16:52:18.655447 smm_load_module: handler start 0x7b9f6d5f
610 16:52:18.658306 smm_load_module: handler_size 98d0
611 16:52:18.661709 smm_load_module: fxsave_area 0x7b9ff000
612 16:52:18.665237 smm_load_module: fxsave_size 1000
613 16:52:18.668727 smm_load_module: CONFIG_MSEG_SIZE 0x0
614 16:52:18.675595 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
615 16:52:18.681861 smm_load_module: handler_mod_params.smbase = 0x7b800000
616 16:52:18.685314 smm_load_module: per_cpu_save_state_size = 0x400
617 16:52:18.688294 smm_load_module: num_cpus = 0x8
618 16:52:18.695164 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
619 16:52:18.698293 smm_load_module: total_save_state_size = 0x2000
620 16:52:18.701793 smm_load_module: cpu0 entry: 7b9e6000
621 16:52:18.708587 smm_create_map: cpus allowed in one segment 30
622 16:52:18.711912 smm_create_map: min # of segments needed 1
623 16:52:18.712356 CPU 0x0
624 16:52:18.715281 smbase 7b9e6000 entry 7b9ee000
625 16:52:18.722217 ss_start 7b9f5c00 code_end 7b9ee208
626 16:52:18.722671 CPU 0x1
627 16:52:18.725261 smbase 7b9e5c00 entry 7b9edc00
628 16:52:18.731730 ss_start 7b9f5800 code_end 7b9ede08
629 16:52:18.732262 CPU 0x2
630 16:52:18.735273 smbase 7b9e5800 entry 7b9ed800
631 16:52:18.738164 ss_start 7b9f5400 code_end 7b9eda08
632 16:52:18.741631 CPU 0x3
633 16:52:18.745062 smbase 7b9e5400 entry 7b9ed400
634 16:52:18.748258 ss_start 7b9f5000 code_end 7b9ed608
635 16:52:18.748750 CPU 0x4
636 16:52:18.755228 smbase 7b9e5000 entry 7b9ed000
637 16:52:18.758147 ss_start 7b9f4c00 code_end 7b9ed208
638 16:52:18.758585 CPU 0x5
639 16:52:18.761577 smbase 7b9e4c00 entry 7b9ecc00
640 16:52:18.768386 ss_start 7b9f4800 code_end 7b9ece08
641 16:52:18.768835 CPU 0x6
642 16:52:18.771536 smbase 7b9e4800 entry 7b9ec800
643 16:52:18.778349 ss_start 7b9f4400 code_end 7b9eca08
644 16:52:18.778783 CPU 0x7
645 16:52:18.781657 smbase 7b9e4400 entry 7b9ec400
646 16:52:18.784642 ss_start 7b9f4000 code_end 7b9ec608
647 16:52:18.794696 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
648 16:52:18.797933 Processing 11 relocs. Offset value of 0x7b9ee000
649 16:52:18.804947 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
650 16:52:18.811508 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
651 16:52:18.818194 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
652 16:52:18.825319 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
653 16:52:18.831423 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
654 16:52:18.834523 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
655 16:52:18.841572 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
656 16:52:18.848037 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
657 16:52:18.855276 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
658 16:52:18.861527 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
659 16:52:18.867988 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
660 16:52:18.874553 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
661 16:52:18.881524 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
662 16:52:18.884817 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
663 16:52:18.894684 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
664 16:52:18.898098 smm_module_setup_stub: stack_top = 0x7b804000
665 16:52:18.901570 smm_module_setup_stub: per cpu stack_size = 0x800
666 16:52:18.908018 smm_module_setup_stub: runtime.start32_offset = 0x4c
667 16:52:18.911419 smm_module_setup_stub: runtime.smm_size = 0x200000
668 16:52:18.918006 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
669 16:52:18.922631 Clearing SMI status registers
670 16:52:18.926143 SMI_STS: PM1
671 16:52:18.926575 PM1_STS: WAK PWRBTN
672 16:52:18.936391 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
673 16:52:18.939495 In relocation handler: CPU 0
674 16:52:18.942835 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
675 16:52:18.946200 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 16:52:18.949234 Relocation complete.
677 16:52:18.956072 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
678 16:52:18.959516 In relocation handler: CPU 5
679 16:52:18.962871 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
680 16:52:18.966224 Relocation complete.
681 16:52:18.972832 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
682 16:52:18.976308 In relocation handler: CPU 1
683 16:52:18.979189 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
684 16:52:18.986227 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 16:52:18.986683 Relocation complete.
686 16:52:18.992717 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
687 16:52:18.995787 In relocation handler: CPU 3
688 16:52:18.999299 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
689 16:52:19.006249 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 16:52:19.009166 Relocation complete.
691 16:52:19.016147 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
692 16:52:19.019190 In relocation handler: CPU 4
693 16:52:19.022786 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
694 16:52:19.025714 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 16:52:19.029432 Relocation complete.
696 16:52:19.035831 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
697 16:52:19.039451 In relocation handler: CPU 2
698 16:52:19.042890 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
699 16:52:19.049510 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 16:52:19.049977 Relocation complete.
701 16:52:19.055843 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
702 16:52:19.059679 In relocation handler: CPU 6
703 16:52:19.065940 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
704 16:52:19.066471 Relocation complete.
705 16:52:19.072806 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
706 16:52:19.075805 In relocation handler: CPU 7
707 16:52:19.078912 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
708 16:52:19.085744 Writing SMRR. base = 0x7b800006, mask=0xff800c00
709 16:52:19.089322 Relocation complete.
710 16:52:19.089768 Initializing CPU #0
711 16:52:19.092465 CPU: vendor Intel device 906a4
712 16:52:19.095814 CPU: family 06, model 9a, stepping 04
713 16:52:19.099388 Clearing out pending MCEs
714 16:52:19.102484 cpu: energy policy set to 7
715 16:52:19.105947 Turbo is available but hidden
716 16:52:19.109045 Turbo is available and visible
717 16:52:19.112513 microcode: Update skipped, already up-to-date
718 16:52:19.115945 CPU #0 initialized
719 16:52:19.116396 Initializing CPU #5
720 16:52:19.119284 Initializing CPU #4
721 16:52:19.122622 Initializing CPU #3
722 16:52:19.125575 CPU: vendor Intel device 906a4
723 16:52:19.129276 CPU: family 06, model 9a, stepping 04
724 16:52:19.132640 CPU: vendor Intel device 906a4
725 16:52:19.135786 CPU: family 06, model 9a, stepping 04
726 16:52:19.139248 Clearing out pending MCEs
727 16:52:19.142467 CPU: vendor Intel device 906a4
728 16:52:19.146018 CPU: family 06, model 9a, stepping 04
729 16:52:19.146545 Clearing out pending MCEs
730 16:52:19.149102 Initializing CPU #6
731 16:52:19.152535 Clearing out pending MCEs
732 16:52:19.153022 Initializing CPU #7
733 16:52:19.155821 cpu: energy policy set to 7
734 16:52:19.158958 CPU: vendor Intel device 906a4
735 16:52:19.162520 CPU: family 06, model 9a, stepping 04
736 16:52:19.165803 Initializing CPU #2
737 16:52:19.169214 Initializing CPU #1
738 16:52:19.172623 microcode: Update skipped, already up-to-date
739 16:52:19.176023 CPU #4 initialized
740 16:52:19.176590 CPU: vendor Intel device 906a4
741 16:52:19.182664 CPU: family 06, model 9a, stepping 04
742 16:52:19.183098 cpu: energy policy set to 7
743 16:52:19.185744 CPU: vendor Intel device 906a4
744 16:52:19.192356 CPU: family 06, model 9a, stepping 04
745 16:52:19.196040 microcode: Update skipped, already up-to-date
746 16:52:19.199030 CPU #3 initialized
747 16:52:19.199462 Clearing out pending MCEs
748 16:52:19.202493 Clearing out pending MCEs
749 16:52:19.205888 Clearing out pending MCEs
750 16:52:19.209504 CPU: vendor Intel device 906a4
751 16:52:19.212482 CPU: family 06, model 9a, stepping 04
752 16:52:19.216118 cpu: energy policy set to 7
753 16:52:19.219191 Clearing out pending MCEs
754 16:52:19.222585 microcode: Update skipped, already up-to-date
755 16:52:19.225721 CPU #2 initialized
756 16:52:19.226152 cpu: energy policy set to 7
757 16:52:19.228949 cpu: energy policy set to 7
758 16:52:19.236013 microcode: Update skipped, already up-to-date
759 16:52:19.236469 CPU #1 initialized
760 16:52:19.242431 microcode: Update skipped, already up-to-date
761 16:52:19.243010 CPU #6 initialized
762 16:52:19.245902 cpu: energy policy set to 7
763 16:52:19.249037 cpu: energy policy set to 7
764 16:52:19.252379 microcode: Update skipped, already up-to-date
765 16:52:19.255701 CPU #7 initialized
766 16:52:19.259255 microcode: Update skipped, already up-to-date
767 16:52:19.262681 CPU #5 initialized
768 16:52:19.265773 bsp_do_flight_plan done after 688 msecs.
769 16:52:19.269217 CPU: frequency set to 4400 MHz
770 16:52:19.269833 Enabling SMIs.
771 16:52:19.275791 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
772 16:52:19.293088 Probing TPM I2C: done! DID_VID 0x00281ae0
773 16:52:19.296689 Locality already claimed
774 16:52:19.299778 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
775 16:52:19.311215 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
776 16:52:19.314724 Enabling GPIO PM b/c CR50 has long IRQ pulse support
777 16:52:19.321152 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
778 16:52:19.328127 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
779 16:52:19.331176 Found a VBT of 9216 bytes after decompression
780 16:52:19.334715 PCI 1.0, PIN A, using IRQ #16
781 16:52:19.338014 PCI 2.0, PIN A, using IRQ #17
782 16:52:19.341346 PCI 4.0, PIN A, using IRQ #18
783 16:52:19.344874 PCI 5.0, PIN A, using IRQ #16
784 16:52:19.348059 PCI 6.0, PIN A, using IRQ #16
785 16:52:19.351439 PCI 6.2, PIN C, using IRQ #18
786 16:52:19.354679 PCI 7.0, PIN A, using IRQ #19
787 16:52:19.358150 PCI 7.1, PIN B, using IRQ #20
788 16:52:19.361212 PCI 7.2, PIN C, using IRQ #21
789 16:52:19.364579 PCI 7.3, PIN D, using IRQ #22
790 16:52:19.368318 PCI 8.0, PIN A, using IRQ #23
791 16:52:19.371127 PCI D.0, PIN A, using IRQ #17
792 16:52:19.371582 PCI D.1, PIN B, using IRQ #19
793 16:52:19.374725 PCI 10.0, PIN A, using IRQ #24
794 16:52:19.378064 PCI 10.1, PIN B, using IRQ #25
795 16:52:19.381544 PCI 10.6, PIN C, using IRQ #20
796 16:52:19.384548 PCI 10.7, PIN D, using IRQ #21
797 16:52:19.388072 PCI 11.0, PIN A, using IRQ #26
798 16:52:19.391402 PCI 11.1, PIN B, using IRQ #27
799 16:52:19.394626 PCI 11.2, PIN C, using IRQ #28
800 16:52:19.398381 PCI 11.3, PIN D, using IRQ #29
801 16:52:19.401427 PCI 12.0, PIN A, using IRQ #30
802 16:52:19.404654 PCI 12.6, PIN B, using IRQ #31
803 16:52:19.407952 PCI 12.7, PIN C, using IRQ #22
804 16:52:19.411371 PCI 13.0, PIN A, using IRQ #32
805 16:52:19.414584 PCI 13.1, PIN B, using IRQ #33
806 16:52:19.418094 PCI 13.2, PIN C, using IRQ #34
807 16:52:19.421156 PCI 13.3, PIN D, using IRQ #35
808 16:52:19.421607 PCI 14.0, PIN B, using IRQ #23
809 16:52:19.424603 PCI 14.1, PIN A, using IRQ #36
810 16:52:19.427826 PCI 14.3, PIN C, using IRQ #17
811 16:52:19.431041 PCI 15.0, PIN A, using IRQ #37
812 16:52:19.434595 PCI 15.1, PIN B, using IRQ #38
813 16:52:19.438035 PCI 15.2, PIN C, using IRQ #39
814 16:52:19.441063 PCI 15.3, PIN D, using IRQ #40
815 16:52:19.444350 PCI 16.0, PIN A, using IRQ #18
816 16:52:19.448126 PCI 16.1, PIN B, using IRQ #19
817 16:52:19.451044 PCI 16.2, PIN C, using IRQ #20
818 16:52:19.454408 PCI 16.3, PIN D, using IRQ #21
819 16:52:19.458013 PCI 16.4, PIN A, using IRQ #18
820 16:52:19.461544 PCI 16.5, PIN B, using IRQ #19
821 16:52:19.464292 PCI 17.0, PIN A, using IRQ #22
822 16:52:19.467893 PCI 19.0, PIN A, using IRQ #41
823 16:52:19.470927 PCI 19.1, PIN B, using IRQ #42
824 16:52:19.471538 PCI 19.2, PIN C, using IRQ #43
825 16:52:19.474405 PCI 1C.0, PIN A, using IRQ #16
826 16:52:19.477830 PCI 1C.1, PIN B, using IRQ #17
827 16:52:19.481381 PCI 1C.2, PIN C, using IRQ #18
828 16:52:19.484526 PCI 1C.3, PIN D, using IRQ #19
829 16:52:19.487955 PCI 1C.4, PIN A, using IRQ #16
830 16:52:19.491500 PCI 1C.5, PIN B, using IRQ #17
831 16:52:19.494410 PCI 1C.6, PIN C, using IRQ #18
832 16:52:19.498327 PCI 1C.7, PIN D, using IRQ #19
833 16:52:19.501182 PCI 1D.0, PIN A, using IRQ #16
834 16:52:19.504406 PCI 1D.1, PIN B, using IRQ #17
835 16:52:19.508069 PCI 1D.2, PIN C, using IRQ #18
836 16:52:19.511104 PCI 1D.3, PIN D, using IRQ #19
837 16:52:19.514511 PCI 1E.0, PIN A, using IRQ #23
838 16:52:19.517922 PCI 1E.1, PIN B, using IRQ #20
839 16:52:19.521209 PCI 1E.2, PIN C, using IRQ #44
840 16:52:19.521706 PCI 1E.3, PIN D, using IRQ #45
841 16:52:19.524434 PCI 1F.3, PIN B, using IRQ #22
842 16:52:19.527825 PCI 1F.4, PIN C, using IRQ #23
843 16:52:19.531090 PCI 1F.6, PIN D, using IRQ #20
844 16:52:19.534617 PCI 1F.7, PIN A, using IRQ #21
845 16:52:19.541398 IRQ: Using dynamically assigned PCI IO-APIC IRQs
846 16:52:19.548060 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
847 16:52:19.731082 FSPS returned 0
848 16:52:19.733792 Executing Phase 1 of FspMultiPhaseSiInit
849 16:52:19.743944 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
850 16:52:19.747477 port C0 DISC req: usage 1 usb3 1 usb2 1
851 16:52:19.751063 Raw Buffer output 0 00000111
852 16:52:19.754163 Raw Buffer output 1 00000000
853 16:52:19.757597 pmc_send_ipc_cmd succeeded
854 16:52:19.760920 port C1 DISC req: usage 1 usb3 3 usb2 3
855 16:52:19.764421 Raw Buffer output 0 00000331
856 16:52:19.767492 Raw Buffer output 1 00000000
857 16:52:19.771483 pmc_send_ipc_cmd succeeded
858 16:52:19.775480 Detected 6 core, 8 thread CPU.
859 16:52:19.778537 Detected 6 core, 8 thread CPU.
860 16:52:19.784140 Detected 6 core, 8 thread CPU.
861 16:52:19.787504 Detected 6 core, 8 thread CPU.
862 16:52:19.790469 Detected 6 core, 8 thread CPU.
863 16:52:19.793913 Detected 6 core, 8 thread CPU.
864 16:52:19.797447 Detected 6 core, 8 thread CPU.
865 16:52:19.800551 Detected 6 core, 8 thread CPU.
866 16:52:19.804109 Detected 6 core, 8 thread CPU.
867 16:52:19.807639 Detected 6 core, 8 thread CPU.
868 16:52:19.811121 Detected 6 core, 8 thread CPU.
869 16:52:19.814135 Detected 6 core, 8 thread CPU.
870 16:52:19.817615 Detected 6 core, 8 thread CPU.
871 16:52:19.821282 Detected 6 core, 8 thread CPU.
872 16:52:19.824125 Detected 6 core, 8 thread CPU.
873 16:52:19.827620 Detected 6 core, 8 thread CPU.
874 16:52:19.830741 Detected 6 core, 8 thread CPU.
875 16:52:19.834096 Detected 6 core, 8 thread CPU.
876 16:52:19.837502 Detected 6 core, 8 thread CPU.
877 16:52:19.840780 Detected 6 core, 8 thread CPU.
878 16:52:19.841305 Detected 6 core, 8 thread CPU.
879 16:52:19.844202 Detected 6 core, 8 thread CPU.
880 16:52:20.137487 Detected 6 core, 8 thread CPU.
881 16:52:20.140608 Detected 6 core, 8 thread CPU.
882 16:52:20.143966 Detected 6 core, 8 thread CPU.
883 16:52:20.146929 Detected 6 core, 8 thread CPU.
884 16:52:20.150436 Detected 6 core, 8 thread CPU.
885 16:52:20.154173 Detected 6 core, 8 thread CPU.
886 16:52:20.157230 Detected 6 core, 8 thread CPU.
887 16:52:20.161068 Detected 6 core, 8 thread CPU.
888 16:52:20.164109 Detected 6 core, 8 thread CPU.
889 16:52:20.167530 Detected 6 core, 8 thread CPU.
890 16:52:20.170476 Detected 6 core, 8 thread CPU.
891 16:52:20.174049 Detected 6 core, 8 thread CPU.
892 16:52:20.177483 Detected 6 core, 8 thread CPU.
893 16:52:20.180822 Detected 6 core, 8 thread CPU.
894 16:52:20.184003 Detected 6 core, 8 thread CPU.
895 16:52:20.187535 Detected 6 core, 8 thread CPU.
896 16:52:20.190609 Detected 6 core, 8 thread CPU.
897 16:52:20.194224 Detected 6 core, 8 thread CPU.
898 16:52:20.194782 Detected 6 core, 8 thread CPU.
899 16:52:20.197362 Detected 6 core, 8 thread CPU.
900 16:52:20.201113 Display FSP Version Info HOB
901 16:52:20.204481 Reference Code - CPU = c.0.65.70
902 16:52:20.207494 uCode Version = 0.0.4.23
903 16:52:20.211157 TXT ACM version = ff.ff.ff.ffff
904 16:52:20.214575 Reference Code - ME = c.0.65.70
905 16:52:20.217824 MEBx version = 0.0.0.0
906 16:52:20.221020 ME Firmware Version = Lite SKU
907 16:52:20.224478 Reference Code - PCH = c.0.65.70
908 16:52:20.227529 PCH-CRID Status = Disabled
909 16:52:20.230978 PCH-CRID Original Value = ff.ff.ff.ffff
910 16:52:20.234604 PCH-CRID New Value = ff.ff.ff.ffff
911 16:52:20.237539 OPROM - RST - RAID = ff.ff.ff.ffff
912 16:52:20.241036 PCH Hsio Version = 4.0.0.0
913 16:52:20.244034 Reference Code - SA - System Agent = c.0.65.70
914 16:52:20.247494 Reference Code - MRC = 0.0.3.80
915 16:52:20.250903 SA - PCIe Version = c.0.65.70
916 16:52:20.254478 SA-CRID Status = Disabled
917 16:52:20.257464 SA-CRID Original Value = 0.0.0.4
918 16:52:20.260812 SA-CRID New Value = 0.0.0.4
919 16:52:20.264312 OPROM - VBIOS = ff.ff.ff.ffff
920 16:52:20.268361 IO Manageability Engine FW Version = 24.0.4.0
921 16:52:20.270827 PHY Build Version = 0.0.0.2016
922 16:52:20.274507 Thunderbolt(TM) FW Version = 0.0.0.0
923 16:52:20.281061 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
924 16:52:20.287690 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
925 16:52:20.288138 Enumerating buses...
926 16:52:20.294328 Show all devs... Before device enumeration.
927 16:52:20.294783 Root Device: enabled 1
928 16:52:20.297430 CPU_CLUSTER: 0: enabled 1
929 16:52:20.300949 DOMAIN: 0000: enabled 1
930 16:52:20.304104 GPIO: 0: enabled 1
931 16:52:20.304527 PCI: 00:00.0: enabled 1
932 16:52:20.307518 PCI: 00:01.0: enabled 0
933 16:52:20.310763 PCI: 00:01.1: enabled 0
934 16:52:20.311228 PCI: 00:02.0: enabled 1
935 16:52:20.314647 PCI: 00:04.0: enabled 1
936 16:52:20.317397 PCI: 00:05.0: enabled 0
937 16:52:20.320620 PCI: 00:06.0: enabled 1
938 16:52:20.321206 PCI: 00:06.2: enabled 0
939 16:52:20.324109 PCI: 00:07.0: enabled 0
940 16:52:20.327279 PCI: 00:07.1: enabled 0
941 16:52:20.330749 PCI: 00:07.2: enabled 0
942 16:52:20.331248 PCI: 00:07.3: enabled 0
943 16:52:20.333805 PCI: 00:08.0: enabled 0
944 16:52:20.337574 PCI: 00:09.0: enabled 0
945 16:52:20.340630 PCI: 00:0a.0: enabled 1
946 16:52:20.341108 PCI: 00:0d.0: enabled 1
947 16:52:20.344096 PCI: 00:0d.1: enabled 0
948 16:52:20.347357 PCI: 00:0d.2: enabled 0
949 16:52:20.350481 PCI: 00:0d.3: enabled 0
950 16:52:20.350926 PCI: 00:0e.0: enabled 0
951 16:52:20.353984 PCI: 00:10.0: enabled 0
952 16:52:20.357539 PCI: 00:10.1: enabled 0
953 16:52:20.358071 PCI: 00:10.6: enabled 0
954 16:52:20.361361 PCI: 00:10.7: enabled 0
955 16:52:20.364128 PCI: 00:12.0: enabled 0
956 16:52:20.367015 PCI: 00:12.6: enabled 0
957 16:52:20.367459 PCI: 00:12.7: enabled 0
958 16:52:20.370487 PCI: 00:13.0: enabled 0
959 16:52:20.374316 PCI: 00:14.0: enabled 1
960 16:52:20.377119 PCI: 00:14.1: enabled 0
961 16:52:20.377562 PCI: 00:14.2: enabled 1
962 16:52:20.380596 PCI: 00:14.3: enabled 1
963 16:52:20.383901 PCI: 00:15.0: enabled 1
964 16:52:20.387007 PCI: 00:15.1: enabled 1
965 16:52:20.387454 PCI: 00:15.2: enabled 0
966 16:52:20.390489 PCI: 00:15.3: enabled 1
967 16:52:20.394325 PCI: 00:16.0: enabled 1
968 16:52:20.397063 PCI: 00:16.1: enabled 0
969 16:52:20.397510 PCI: 00:16.2: enabled 0
970 16:52:20.400547 PCI: 00:16.3: enabled 0
971 16:52:20.403698 PCI: 00:16.4: enabled 0
972 16:52:20.404128 PCI: 00:16.5: enabled 0
973 16:52:20.407183 PCI: 00:17.0: enabled 1
974 16:52:20.410834 PCI: 00:19.0: enabled 0
975 16:52:20.413481 PCI: 00:19.1: enabled 1
976 16:52:20.413990 PCI: 00:19.2: enabled 0
977 16:52:20.417070 PCI: 00:1a.0: enabled 0
978 16:52:20.420123 PCI: 00:1c.0: enabled 0
979 16:52:20.423628 PCI: 00:1c.1: enabled 0
980 16:52:20.424058 PCI: 00:1c.2: enabled 0
981 16:52:20.427443 PCI: 00:1c.3: enabled 0
982 16:52:20.430131 PCI: 00:1c.4: enabled 0
983 16:52:20.433562 PCI: 00:1c.5: enabled 0
984 16:52:20.433992 PCI: 00:1c.6: enabled 0
985 16:52:20.436778 PCI: 00:1c.7: enabled 0
986 16:52:20.440361 PCI: 00:1d.0: enabled 0
987 16:52:20.443376 PCI: 00:1d.1: enabled 0
988 16:52:20.443828 PCI: 00:1d.2: enabled 0
989 16:52:20.446844 PCI: 00:1d.3: enabled 0
990 16:52:20.450568 PCI: 00:1e.0: enabled 1
991 16:52:20.451115 PCI: 00:1e.1: enabled 0
992 16:52:20.453753 PCI: 00:1e.2: enabled 0
993 16:52:20.456831 PCI: 00:1e.3: enabled 1
994 16:52:20.460319 PCI: 00:1f.0: enabled 1
995 16:52:20.460764 PCI: 00:1f.1: enabled 0
996 16:52:20.463742 PCI: 00:1f.2: enabled 1
997 16:52:20.466787 PCI: 00:1f.3: enabled 1
998 16:52:20.470132 PCI: 00:1f.4: enabled 0
999 16:52:20.470587 PCI: 00:1f.5: enabled 1
1000 16:52:20.473598 PCI: 00:1f.6: enabled 0
1001 16:52:20.477185 PCI: 00:1f.7: enabled 0
1002 16:52:20.480356 GENERIC: 0.0: enabled 1
1003 16:52:20.480859 GENERIC: 0.0: enabled 1
1004 16:52:20.483782 GENERIC: 1.0: enabled 1
1005 16:52:20.486877 GENERIC: 0.0: enabled 1
1006 16:52:20.490311 GENERIC: 1.0: enabled 1
1007 16:52:20.490884 USB0 port 0: enabled 1
1008 16:52:20.493073 USB0 port 0: enabled 1
1009 16:52:20.496568 GENERIC: 0.0: enabled 1
1010 16:52:20.497071 I2C: 00:1a: enabled 1
1011 16:52:20.499936 I2C: 00:31: enabled 1
1012 16:52:20.503327 I2C: 00:32: enabled 1
1013 16:52:20.503941 I2C: 00:50: enabled 1
1014 16:52:20.506313 I2C: 00:10: enabled 1
1015 16:52:20.510042 I2C: 00:15: enabled 1
1016 16:52:20.510593 I2C: 00:2c: enabled 1
1017 16:52:20.513424 GENERIC: 0.0: enabled 1
1018 16:52:20.516856 SPI: 00: enabled 1
1019 16:52:20.517347 PNP: 0c09.0: enabled 1
1020 16:52:20.519843 GENERIC: 0.0: enabled 1
1021 16:52:20.523349 USB3 port 0: enabled 1
1022 16:52:20.526228 USB3 port 1: enabled 0
1023 16:52:20.526739 USB3 port 2: enabled 1
1024 16:52:20.530113 USB3 port 3: enabled 0
1025 16:52:20.533177 USB2 port 0: enabled 1
1026 16:52:20.533653 USB2 port 1: enabled 0
1027 16:52:20.536491 USB2 port 2: enabled 1
1028 16:52:20.539923 USB2 port 3: enabled 0
1029 16:52:20.543254 USB2 port 4: enabled 0
1030 16:52:20.543680 USB2 port 5: enabled 1
1031 16:52:20.546297 USB2 port 6: enabled 0
1032 16:52:20.549850 USB2 port 7: enabled 0
1033 16:52:20.550293 USB2 port 8: enabled 1
1034 16:52:20.553158 USB2 port 9: enabled 1
1035 16:52:20.556395 USB3 port 0: enabled 1
1036 16:52:20.556835 USB3 port 1: enabled 0
1037 16:52:20.559781 USB3 port 2: enabled 0
1038 16:52:20.563219 USB3 port 3: enabled 0
1039 16:52:20.566721 GENERIC: 0.0: enabled 1
1040 16:52:20.567257 GENERIC: 1.0: enabled 1
1041 16:52:20.569721 APIC: 00: enabled 1
1042 16:52:20.573260 APIC: 1e: enabled 1
1043 16:52:20.573727 APIC: 18: enabled 1
1044 16:52:20.576239 APIC: 1a: enabled 1
1045 16:52:20.576665 APIC: 1c: enabled 1
1046 16:52:20.579901 APIC: 01: enabled 1
1047 16:52:20.582839 APIC: 09: enabled 1
1048 16:52:20.583271 APIC: 08: enabled 1
1049 16:52:20.586676 Compare with tree...
1050 16:52:20.589820 Root Device: enabled 1
1051 16:52:20.590255 CPU_CLUSTER: 0: enabled 1
1052 16:52:20.592688 APIC: 00: enabled 1
1053 16:52:20.596404 APIC: 1e: enabled 1
1054 16:52:20.599673 APIC: 18: enabled 1
1055 16:52:20.600101 APIC: 1a: enabled 1
1056 16:52:20.602705 APIC: 1c: enabled 1
1057 16:52:20.606426 APIC: 01: enabled 1
1058 16:52:20.606864 APIC: 09: enabled 1
1059 16:52:20.609763 APIC: 08: enabled 1
1060 16:52:20.613075 DOMAIN: 0000: enabled 1
1061 16:52:20.613513 GPIO: 0: enabled 1
1062 16:52:20.615932 PCI: 00:00.0: enabled 1
1063 16:52:20.619193 PCI: 00:01.0: enabled 0
1064 16:52:20.622867 PCI: 00:01.1: enabled 0
1065 16:52:20.625807 PCI: 00:02.0: enabled 1
1066 16:52:20.626248 PCI: 00:04.0: enabled 1
1067 16:52:20.629404 GENERIC: 0.0: enabled 1
1068 16:52:20.632888 PCI: 00:05.0: enabled 0
1069 16:52:20.635838 PCI: 00:06.0: enabled 1
1070 16:52:20.639464 PCI: 00:06.2: enabled 0
1071 16:52:20.639901 PCI: 00:08.0: enabled 0
1072 16:52:20.643144 PCI: 00:09.0: enabled 0
1073 16:52:20.645983 PCI: 00:0a.0: enabled 1
1074 16:52:20.649427 PCI: 00:0d.0: enabled 1
1075 16:52:20.649875 USB0 port 0: enabled 1
1076 16:52:20.652518 USB3 port 0: enabled 1
1077 16:52:20.656085 USB3 port 1: enabled 0
1078 16:52:20.659489 USB3 port 2: enabled 1
1079 16:52:20.662467 USB3 port 3: enabled 0
1080 16:52:20.665858 PCI: 00:0d.1: enabled 0
1081 16:52:20.666297 PCI: 00:0d.2: enabled 0
1082 16:52:20.669221 PCI: 00:0d.3: enabled 0
1083 16:52:20.672510 PCI: 00:0e.0: enabled 0
1084 16:52:20.675833 PCI: 00:10.0: enabled 0
1085 16:52:20.676387 PCI: 00:10.1: enabled 0
1086 16:52:20.679058 PCI: 00:10.6: enabled 0
1087 16:52:20.682438 PCI: 00:10.7: enabled 0
1088 16:52:20.686036 PCI: 00:12.0: enabled 0
1089 16:52:20.689091 PCI: 00:12.6: enabled 0
1090 16:52:20.692520 PCI: 00:12.7: enabled 0
1091 16:52:20.693048 PCI: 00:13.0: enabled 0
1092 16:52:20.695951 PCI: 00:14.0: enabled 1
1093 16:52:20.699373 USB0 port 0: enabled 1
1094 16:52:20.702092 USB2 port 0: enabled 1
1095 16:52:20.705793 USB2 port 1: enabled 0
1096 16:52:20.706232 USB2 port 2: enabled 1
1097 16:52:20.709086 USB2 port 3: enabled 0
1098 16:52:20.712180 USB2 port 4: enabled 0
1099 16:52:20.715631 USB2 port 5: enabled 1
1100 16:52:20.718852 USB2 port 6: enabled 0
1101 16:52:20.722275 USB2 port 7: enabled 0
1102 16:52:20.722714 USB2 port 8: enabled 1
1103 16:52:20.725704 USB2 port 9: enabled 1
1104 16:52:20.728960 USB3 port 0: enabled 1
1105 16:52:20.732347 USB3 port 1: enabled 0
1106 16:52:20.735840 USB3 port 2: enabled 0
1107 16:52:20.736275 USB3 port 3: enabled 0
1108 16:52:20.738863 PCI: 00:14.1: enabled 0
1109 16:52:20.742348 PCI: 00:14.2: enabled 1
1110 16:52:20.745781 PCI: 00:14.3: enabled 1
1111 16:52:20.748853 GENERIC: 0.0: enabled 1
1112 16:52:20.749353 PCI: 00:15.0: enabled 1
1113 16:52:20.752328 I2C: 00:1a: enabled 1
1114 16:52:20.755267 I2C: 00:31: enabled 1
1115 16:52:20.758931 I2C: 00:32: enabled 1
1116 16:52:20.762492 PCI: 00:15.1: enabled 1
1117 16:52:20.763030 I2C: 00:50: enabled 1
1118 16:52:20.765693 PCI: 00:15.2: enabled 0
1119 16:52:20.768702 PCI: 00:15.3: enabled 1
1120 16:52:20.772065 I2C: 00:10: enabled 1
1121 16:52:20.772491 PCI: 00:16.0: enabled 1
1122 16:52:20.775211 PCI: 00:16.1: enabled 0
1123 16:52:20.778809 PCI: 00:16.2: enabled 0
1124 16:52:20.782239 PCI: 00:16.3: enabled 0
1125 16:52:20.785222 PCI: 00:16.4: enabled 0
1126 16:52:20.785650 PCI: 00:16.5: enabled 0
1127 16:52:20.788444 PCI: 00:17.0: enabled 1
1128 16:52:20.792181 PCI: 00:19.0: enabled 0
1129 16:52:20.795426 PCI: 00:19.1: enabled 1
1130 16:52:20.798557 I2C: 00:15: enabled 1
1131 16:52:20.798983 I2C: 00:2c: enabled 1
1132 16:52:20.801953 PCI: 00:19.2: enabled 0
1133 16:52:20.805066 PCI: 00:1a.0: enabled 0
1134 16:52:20.808563 PCI: 00:1e.0: enabled 1
1135 16:52:20.809063 PCI: 00:1e.1: enabled 0
1136 16:52:20.812071 PCI: 00:1e.2: enabled 0
1137 16:52:20.815114 PCI: 00:1e.3: enabled 1
1138 16:52:20.818493 SPI: 00: enabled 1
1139 16:52:20.822376 PCI: 00:1f.0: enabled 1
1140 16:52:20.822816 PNP: 0c09.0: enabled 1
1141 16:52:20.825438 PCI: 00:1f.1: enabled 0
1142 16:52:20.828860 PCI: 00:1f.2: enabled 1
1143 16:52:20.832125 GENERIC: 0.0: enabled 1
1144 16:52:20.835339 GENERIC: 0.0: enabled 1
1145 16:52:20.835766 GENERIC: 1.0: enabled 1
1146 16:52:20.838715 PCI: 00:1f.3: enabled 1
1147 16:52:20.842124 PCI: 00:1f.4: enabled 0
1148 16:52:20.845127 PCI: 00:1f.5: enabled 1
1149 16:52:20.848518 PCI: 00:1f.6: enabled 0
1150 16:52:20.848956 PCI: 00:1f.7: enabled 0
1151 16:52:20.852041 Root Device scanning...
1152 16:52:20.854990 scan_static_bus for Root Device
1153 16:52:20.858571 CPU_CLUSTER: 0 enabled
1154 16:52:20.859019 DOMAIN: 0000 enabled
1155 16:52:20.861550 DOMAIN: 0000 scanning...
1156 16:52:20.864948 PCI: pci_scan_bus for bus 00
1157 16:52:20.868507 PCI: 00:00.0 [8086/0000] ops
1158 16:52:20.871708 PCI: 00:00.0 [8086/4609] enabled
1159 16:52:20.875191 PCI: 00:02.0 [8086/0000] bus ops
1160 16:52:20.878745 PCI: 00:02.0 [8086/46b3] enabled
1161 16:52:20.881727 PCI: 00:04.0 [8086/0000] bus ops
1162 16:52:20.885343 PCI: 00:04.0 [8086/461d] enabled
1163 16:52:20.887980 PCI: 00:06.0 [8086/0000] bus ops
1164 16:52:20.891664 PCI: 00:06.0 [8086/464d] enabled
1165 16:52:20.894861 PCI: 00:08.0 [8086/464f] disabled
1166 16:52:20.898155 PCI: 00:0a.0 [8086/467d] enabled
1167 16:52:20.901384 PCI: 00:0d.0 [8086/0000] bus ops
1168 16:52:20.904685 PCI: 00:0d.0 [8086/461e] enabled
1169 16:52:20.908242 PCI: 00:14.0 [8086/0000] bus ops
1170 16:52:20.911720 PCI: 00:14.0 [8086/51ed] enabled
1171 16:52:20.914601 PCI: 00:14.2 [8086/51ef] enabled
1172 16:52:20.917911 PCI: 00:14.3 [8086/0000] bus ops
1173 16:52:20.921216 PCI: 00:14.3 [8086/51f0] enabled
1174 16:52:20.925033 PCI: 00:15.0 [8086/0000] bus ops
1175 16:52:20.927902 PCI: 00:15.0 [8086/51e8] enabled
1176 16:52:20.931294 PCI: 00:15.1 [8086/0000] bus ops
1177 16:52:20.934574 PCI: 00:15.1 [8086/51e9] enabled
1178 16:52:20.938012 PCI: 00:15.2 [8086/0000] bus ops
1179 16:52:20.941621 PCI: 00:15.2 [8086/51ea] disabled
1180 16:52:20.945031 PCI: 00:15.3 [8086/0000] bus ops
1181 16:52:20.947874 PCI: 00:15.3 [8086/51eb] enabled
1182 16:52:20.951443 PCI: 00:16.0 [8086/0000] ops
1183 16:52:20.955016 PCI: 00:16.0 [8086/51e0] enabled
1184 16:52:20.961515 PCI: Static device PCI: 00:17.0 not found, disabling it.
1185 16:52:20.965044 PCI: 00:19.0 [8086/0000] bus ops
1186 16:52:20.968283 PCI: 00:19.0 [8086/51c5] disabled
1187 16:52:20.971653 PCI: 00:19.1 [8086/0000] bus ops
1188 16:52:20.974636 PCI: 00:19.1 [8086/51c6] enabled
1189 16:52:20.978054 PCI: 00:1e.0 [8086/0000] ops
1190 16:52:20.981547 PCI: 00:1e.0 [8086/51a8] enabled
1191 16:52:20.984640 PCI: 00:1e.3 [8086/0000] bus ops
1192 16:52:20.988007 PCI: 00:1e.3 [8086/51ab] enabled
1193 16:52:20.991669 PCI: 00:1f.0 [8086/0000] bus ops
1194 16:52:20.994671 PCI: 00:1f.0 [8086/5182] enabled
1195 16:52:20.998151 RTC Init
1196 16:52:21.001477 Set power on after power failure.
1197 16:52:21.001899 Disabling Deep S3
1198 16:52:21.005009 Disabling Deep S3
1199 16:52:21.005435 Disabling Deep S4
1200 16:52:21.008033 Disabling Deep S4
1201 16:52:21.011416 Disabling Deep S5
1202 16:52:21.011839 Disabling Deep S5
1203 16:52:21.015108 PCI: 00:1f.2 [0000/0000] hidden
1204 16:52:21.018240 PCI: 00:1f.3 [8086/0000] bus ops
1205 16:52:21.021473 PCI: 00:1f.3 [8086/51c8] enabled
1206 16:52:21.024658 PCI: 00:1f.5 [8086/0000] bus ops
1207 16:52:21.028630 PCI: 00:1f.5 [8086/51a4] enabled
1208 16:52:21.031692 GPIO: 0 enabled
1209 16:52:21.034723 PCI: Leftover static devices:
1210 16:52:21.035179 PCI: 00:01.0
1211 16:52:21.035639 PCI: 00:01.1
1212 16:52:21.038015 PCI: 00:05.0
1213 16:52:21.038450 PCI: 00:06.2
1214 16:52:21.041413 PCI: 00:09.0
1215 16:52:21.041958 PCI: 00:0d.1
1216 16:52:21.042297 PCI: 00:0d.2
1217 16:52:21.044694 PCI: 00:0d.3
1218 16:52:21.045144 PCI: 00:0e.0
1219 16:52:21.048521 PCI: 00:10.0
1220 16:52:21.048955 PCI: 00:10.1
1221 16:52:21.049342 PCI: 00:10.6
1222 16:52:21.051573 PCI: 00:10.7
1223 16:52:21.052004 PCI: 00:12.0
1224 16:52:21.054975 PCI: 00:12.6
1225 16:52:21.055411 PCI: 00:12.7
1226 16:52:21.058043 PCI: 00:13.0
1227 16:52:21.058472 PCI: 00:14.1
1228 16:52:21.058816 PCI: 00:16.1
1229 16:52:21.061584 PCI: 00:16.2
1230 16:52:21.062019 PCI: 00:16.3
1231 16:52:21.065004 PCI: 00:16.4
1232 16:52:21.065438 PCI: 00:16.5
1233 16:52:21.065792 PCI: 00:17.0
1234 16:52:21.067946 PCI: 00:19.2
1235 16:52:21.068372 PCI: 00:1a.0
1236 16:52:21.071895 PCI: 00:1e.1
1237 16:52:21.072362 PCI: 00:1e.2
1238 16:52:21.072739 PCI: 00:1f.1
1239 16:52:21.074649 PCI: 00:1f.4
1240 16:52:21.075075 PCI: 00:1f.6
1241 16:52:21.078086 PCI: 00:1f.7
1242 16:52:21.081531 PCI: Check your devicetree.cb.
1243 16:52:21.081946 PCI: 00:02.0 scanning...
1244 16:52:21.084947 scan_generic_bus for PCI: 00:02.0
1245 16:52:21.091625 scan_generic_bus for PCI: 00:02.0 done
1246 16:52:21.095073 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1247 16:52:21.097914 PCI: 00:04.0 scanning...
1248 16:52:21.101392 scan_generic_bus for PCI: 00:04.0
1249 16:52:21.101807 GENERIC: 0.0 enabled
1250 16:52:21.107849 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1251 16:52:21.114986 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1252 16:52:21.115403 PCI: 00:06.0 scanning...
1253 16:52:21.121425 do_pci_scan_bridge for PCI: 00:06.0
1254 16:52:21.121842 PCI: pci_scan_bus for bus 01
1255 16:52:21.124759 PCI: 01:00.0 [15b7/5009] enabled
1256 16:52:21.131843 Enabling Common Clock Configuration
1257 16:52:21.135419 L1 Sub-State supported from root port 6
1258 16:52:21.138076 L1 Sub-State Support = 0x5
1259 16:52:21.138489 CommonModeRestoreTime = 0x6e
1260 16:52:21.145144 Power On Value = 0x5, Power On Scale = 0x2
1261 16:52:21.145635 ASPM: Enabled L1
1262 16:52:21.148411 PCIe: Max_Payload_Size adjusted to 256
1263 16:52:21.151640 PCI: 01:00.0: Enabled LTR
1264 16:52:21.158009 PCI: 01:00.0: Programmed LTR max latencies
1265 16:52:21.161717 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1266 16:52:21.165293 PCI: 00:0d.0 scanning...
1267 16:52:21.168098 scan_static_bus for PCI: 00:0d.0
1268 16:52:21.168538 USB0 port 0 enabled
1269 16:52:21.171650 USB0 port 0 scanning...
1270 16:52:21.174827 scan_static_bus for USB0 port 0
1271 16:52:21.178463 USB3 port 0 enabled
1272 16:52:21.178883 USB3 port 1 disabled
1273 16:52:21.181390 USB3 port 2 enabled
1274 16:52:21.184900 USB3 port 3 disabled
1275 16:52:21.185377 USB3 port 0 scanning...
1276 16:52:21.188328 scan_static_bus for USB3 port 0
1277 16:52:21.191306 scan_static_bus for USB3 port 0 done
1278 16:52:21.198325 scan_bus: bus USB3 port 0 finished in 6 msecs
1279 16:52:21.201428 USB3 port 2 scanning...
1280 16:52:21.201867 scan_static_bus for USB3 port 2
1281 16:52:21.208081 scan_static_bus for USB3 port 2 done
1282 16:52:21.211692 scan_bus: bus USB3 port 2 finished in 6 msecs
1283 16:52:21.215610 scan_static_bus for USB0 port 0 done
1284 16:52:21.218678 scan_bus: bus USB0 port 0 finished in 43 msecs
1285 16:52:21.224924 scan_static_bus for PCI: 00:0d.0 done
1286 16:52:21.228084 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1287 16:52:21.231763 PCI: 00:14.0 scanning...
1288 16:52:21.234554 scan_static_bus for PCI: 00:14.0
1289 16:52:21.235005 USB0 port 0 enabled
1290 16:52:21.238102 USB0 port 0 scanning...
1291 16:52:21.241516 scan_static_bus for USB0 port 0
1292 16:52:21.244650 USB2 port 0 enabled
1293 16:52:21.245268 USB2 port 1 disabled
1294 16:52:21.248309 USB2 port 2 enabled
1295 16:52:21.251064 USB2 port 3 disabled
1296 16:52:21.251585 USB2 port 4 disabled
1297 16:52:21.254606 USB2 port 5 enabled
1298 16:52:21.258004 USB2 port 6 disabled
1299 16:52:21.258569 USB2 port 7 disabled
1300 16:52:21.261020 USB2 port 8 enabled
1301 16:52:21.261467 USB2 port 9 enabled
1302 16:52:21.264396 USB3 port 0 enabled
1303 16:52:21.268079 USB3 port 1 disabled
1304 16:52:21.268594 USB3 port 2 disabled
1305 16:52:21.271264 USB3 port 3 disabled
1306 16:52:21.274504 USB2 port 0 scanning...
1307 16:52:21.278017 scan_static_bus for USB2 port 0
1308 16:52:21.281056 scan_static_bus for USB2 port 0 done
1309 16:52:21.284550 scan_bus: bus USB2 port 0 finished in 6 msecs
1310 16:52:21.287941 USB2 port 2 scanning...
1311 16:52:21.291064 scan_static_bus for USB2 port 2
1312 16:52:21.294655 scan_static_bus for USB2 port 2 done
1313 16:52:21.298083 scan_bus: bus USB2 port 2 finished in 6 msecs
1314 16:52:21.301026 USB2 port 5 scanning...
1315 16:52:21.304725 scan_static_bus for USB2 port 5
1316 16:52:21.308129 scan_static_bus for USB2 port 5 done
1317 16:52:21.314541 scan_bus: bus USB2 port 5 finished in 6 msecs
1318 16:52:21.315048 USB2 port 8 scanning...
1319 16:52:21.318083 scan_static_bus for USB2 port 8
1320 16:52:21.321234 scan_static_bus for USB2 port 8 done
1321 16:52:21.328089 scan_bus: bus USB2 port 8 finished in 6 msecs
1322 16:52:21.331102 USB2 port 9 scanning...
1323 16:52:21.334385 scan_static_bus for USB2 port 9
1324 16:52:21.337822 scan_static_bus for USB2 port 9 done
1325 16:52:21.340898 scan_bus: bus USB2 port 9 finished in 6 msecs
1326 16:52:21.344465 USB3 port 0 scanning...
1327 16:52:21.347821 scan_static_bus for USB3 port 0
1328 16:52:21.350885 scan_static_bus for USB3 port 0 done
1329 16:52:21.354432 scan_bus: bus USB3 port 0 finished in 6 msecs
1330 16:52:21.357371 scan_static_bus for USB0 port 0 done
1331 16:52:21.364717 scan_bus: bus USB0 port 0 finished in 120 msecs
1332 16:52:21.367472 scan_static_bus for PCI: 00:14.0 done
1333 16:52:21.370967 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1334 16:52:21.374114 PCI: 00:14.3 scanning...
1335 16:52:21.377528 scan_static_bus for PCI: 00:14.3
1336 16:52:21.380923 GENERIC: 0.0 enabled
1337 16:52:21.384125 scan_static_bus for PCI: 00:14.3 done
1338 16:52:21.387595 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1339 16:52:21.390703 PCI: 00:15.0 scanning...
1340 16:52:21.394130 scan_static_bus for PCI: 00:15.0
1341 16:52:21.397639 I2C: 00:1a enabled
1342 16:52:21.398081 I2C: 00:31 enabled
1343 16:52:21.400630 I2C: 00:32 enabled
1344 16:52:21.404062 scan_static_bus for PCI: 00:15.0 done
1345 16:52:21.407591 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1346 16:52:21.410680 PCI: 00:15.1 scanning...
1347 16:52:21.414115 scan_static_bus for PCI: 00:15.1
1348 16:52:21.417605 I2C: 00:50 enabled
1349 16:52:21.421063 scan_static_bus for PCI: 00:15.1 done
1350 16:52:21.423979 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1351 16:52:21.427372 PCI: 00:15.3 scanning...
1352 16:52:21.430785 scan_static_bus for PCI: 00:15.3
1353 16:52:21.433903 I2C: 00:10 enabled
1354 16:52:21.437298 scan_static_bus for PCI: 00:15.3 done
1355 16:52:21.440634 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1356 16:52:21.444457 PCI: 00:19.1 scanning...
1357 16:52:21.447530 scan_static_bus for PCI: 00:19.1
1358 16:52:21.450454 I2C: 00:15 enabled
1359 16:52:21.450952 I2C: 00:2c enabled
1360 16:52:21.454039 scan_static_bus for PCI: 00:19.1 done
1361 16:52:21.460569 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1362 16:52:21.463943 PCI: 00:1e.3 scanning...
1363 16:52:21.467465 scan_generic_bus for PCI: 00:1e.3
1364 16:52:21.467967 SPI: 00 enabled
1365 16:52:21.474299 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1366 16:52:21.477106 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1367 16:52:21.480762 PCI: 00:1f.0 scanning...
1368 16:52:21.483854 scan_static_bus for PCI: 00:1f.0
1369 16:52:21.487065 PNP: 0c09.0 enabled
1370 16:52:21.487554 PNP: 0c09.0 scanning...
1371 16:52:21.490527 scan_static_bus for PNP: 0c09.0
1372 16:52:21.497221 scan_static_bus for PNP: 0c09.0 done
1373 16:52:21.500579 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1374 16:52:21.503912 scan_static_bus for PCI: 00:1f.0 done
1375 16:52:21.510794 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1376 16:52:21.511276 PCI: 00:1f.2 scanning...
1377 16:52:21.514116 scan_static_bus for PCI: 00:1f.2
1378 16:52:21.517575 GENERIC: 0.0 enabled
1379 16:52:21.520759 GENERIC: 0.0 scanning...
1380 16:52:21.523955 scan_static_bus for GENERIC: 0.0
1381 16:52:21.524414 GENERIC: 0.0 enabled
1382 16:52:21.526993 GENERIC: 1.0 enabled
1383 16:52:21.530395 scan_static_bus for GENERIC: 0.0 done
1384 16:52:21.537010 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1385 16:52:21.540325 scan_static_bus for PCI: 00:1f.2 done
1386 16:52:21.543640 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1387 16:52:21.547182 PCI: 00:1f.3 scanning...
1388 16:52:21.550685 scan_static_bus for PCI: 00:1f.3
1389 16:52:21.553823 scan_static_bus for PCI: 00:1f.3 done
1390 16:52:21.557366 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1391 16:52:21.560874 PCI: 00:1f.5 scanning...
1392 16:52:21.563634 scan_generic_bus for PCI: 00:1f.5
1393 16:52:21.567181 scan_generic_bus for PCI: 00:1f.5 done
1394 16:52:21.573461 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1395 16:52:21.576962 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1396 16:52:21.580585 scan_static_bus for Root Device done
1397 16:52:21.587157 scan_bus: bus Root Device finished in 729 msecs
1398 16:52:21.587594 done
1399 16:52:21.593839 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1400 16:52:21.600548 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1401 16:52:21.603979 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1402 16:52:21.610331 SPI flash protection: WPSW=1 SRP0=0
1403 16:52:21.614116 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1404 16:52:21.620604 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1405 16:52:21.624015 found VGA at PCI: 00:02.0
1406 16:52:21.624534 Setting up VGA for PCI: 00:02.0
1407 16:52:21.630325 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1408 16:52:21.637296 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1409 16:52:21.637809 Allocating resources...
1410 16:52:21.640613 Reading resources...
1411 16:52:21.643564 Root Device read_resources bus 0 link: 0
1412 16:52:21.646910 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1413 16:52:21.653580 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1414 16:52:21.657173 DOMAIN: 0000 read_resources bus 0 link: 0
1415 16:52:21.663557 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1416 16:52:21.670571 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1417 16:52:21.677059 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1418 16:52:21.683675 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1419 16:52:21.690233 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1420 16:52:21.697404 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1421 16:52:21.700263 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1422 16:52:21.706714 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1423 16:52:21.713262 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1424 16:52:21.721034 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1425 16:52:21.726915 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1426 16:52:21.733357 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1427 16:52:21.739732 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1428 16:52:21.746495 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1429 16:52:21.753180 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1430 16:52:21.760159 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1431 16:52:21.766800 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1432 16:52:21.773105 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1433 16:52:21.776661 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1434 16:52:21.783140 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1435 16:52:21.790079 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1436 16:52:21.793092 PCI: 00:04.0 read_resources bus 1 link: 0
1437 16:52:21.799906 PCI: 00:04.0 read_resources bus 1 link: 0 done
1438 16:52:21.803219 PCI: 00:06.0 read_resources bus 1 link: 0
1439 16:52:21.806652 PCI: 00:06.0 read_resources bus 1 link: 0 done
1440 16:52:21.813500 PCI: 00:0d.0 read_resources bus 0 link: 0
1441 16:52:21.816602 USB0 port 0 read_resources bus 0 link: 0
1442 16:52:21.819776 USB0 port 0 read_resources bus 0 link: 0 done
1443 16:52:21.826735 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1444 16:52:21.830033 PCI: 00:14.0 read_resources bus 0 link: 0
1445 16:52:21.833081 USB0 port 0 read_resources bus 0 link: 0
1446 16:52:21.840254 USB0 port 0 read_resources bus 0 link: 0 done
1447 16:52:21.843072 PCI: 00:14.0 read_resources bus 0 link: 0 done
1448 16:52:21.846853 PCI: 00:14.3 read_resources bus 0 link: 0
1449 16:52:21.853715 PCI: 00:14.3 read_resources bus 0 link: 0 done
1450 16:52:21.856439 PCI: 00:15.0 read_resources bus 0 link: 0
1451 16:52:21.859960 PCI: 00:15.0 read_resources bus 0 link: 0 done
1452 16:52:21.867179 PCI: 00:15.1 read_resources bus 0 link: 0
1453 16:52:21.870350 PCI: 00:15.1 read_resources bus 0 link: 0 done
1454 16:52:21.873604 PCI: 00:15.3 read_resources bus 0 link: 0
1455 16:52:21.880056 PCI: 00:15.3 read_resources bus 0 link: 0 done
1456 16:52:21.883442 PCI: 00:19.1 read_resources bus 0 link: 0
1457 16:52:21.889901 PCI: 00:19.1 read_resources bus 0 link: 0 done
1458 16:52:21.893360 PCI: 00:1e.3 read_resources bus 2 link: 0
1459 16:52:21.896825 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1460 16:52:21.903613 PCI: 00:1f.0 read_resources bus 0 link: 0
1461 16:52:21.906805 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1462 16:52:21.910111 PCI: 00:1f.2 read_resources bus 0 link: 0
1463 16:52:21.913427 GENERIC: 0.0 read_resources bus 0 link: 0
1464 16:52:21.920173 GENERIC: 0.0 read_resources bus 0 link: 0 done
1465 16:52:21.923581 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1466 16:52:21.930173 DOMAIN: 0000 read_resources bus 0 link: 0 done
1467 16:52:21.933641 Root Device read_resources bus 0 link: 0 done
1468 16:52:21.936661 Done reading resources.
1469 16:52:21.943229 Show resources in subtree (Root Device)...After reading.
1470 16:52:21.946627 Root Device child on link 0 CPU_CLUSTER: 0
1471 16:52:21.950107 CPU_CLUSTER: 0 child on link 0 APIC: 00
1472 16:52:21.953523 APIC: 00
1473 16:52:21.954038 APIC: 1e
1474 16:52:21.954378 APIC: 18
1475 16:52:21.956662 APIC: 1a
1476 16:52:21.957130 APIC: 1c
1477 16:52:21.960261 APIC: 01
1478 16:52:21.960853 APIC: 09
1479 16:52:21.961332 APIC: 08
1480 16:52:21.963457 DOMAIN: 0000 child on link 0 GPIO: 0
1481 16:52:21.973510 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1482 16:52:21.983524 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1483 16:52:21.987000 GPIO: 0
1484 16:52:21.987508 PCI: 00:00.0
1485 16:52:21.996945 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1486 16:52:22.006725 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1487 16:52:22.013587 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1488 16:52:22.023707 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1489 16:52:22.033409 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1490 16:52:22.043244 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1491 16:52:22.053263 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1492 16:52:22.063363 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1493 16:52:22.073527 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1494 16:52:22.080462 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1495 16:52:22.089892 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1496 16:52:22.100075 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1497 16:52:22.110092 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1498 16:52:22.120129 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1499 16:52:22.130043 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1500 16:52:22.136021 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1501 16:52:22.146003 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1502 16:52:22.156263 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1503 16:52:22.165799 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1504 16:52:22.175950 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1505 16:52:22.185735 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1506 16:52:22.195812 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1507 16:52:22.202117 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1508 16:52:22.212216 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1509 16:52:22.222313 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1510 16:52:22.232475 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1511 16:52:22.242254 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1512 16:52:22.252502 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1513 16:52:22.252926 PCI: 00:02.0
1514 16:52:22.265699 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1515 16:52:22.275967 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1516 16:52:22.282417 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1517 16:52:22.289004 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1518 16:52:22.298752 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1519 16:52:22.299172 GENERIC: 0.0
1520 16:52:22.302559 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1521 16:52:22.312299 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1522 16:52:22.322390 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1523 16:52:22.332967 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1524 16:52:22.333442 PCI: 01:00.0
1525 16:52:22.342230 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1526 16:52:22.352178 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1527 16:52:22.355559 PCI: 00:08.0
1528 16:52:22.355983 PCI: 00:0a.0
1529 16:52:22.365521 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1530 16:52:22.372313 PCI: 00:0d.0 child on link 0 USB0 port 0
1531 16:52:22.382130 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1532 16:52:22.385441 USB0 port 0 child on link 0 USB3 port 0
1533 16:52:22.388355 USB3 port 0
1534 16:52:22.388743 USB3 port 1
1535 16:52:22.391956 USB3 port 2
1536 16:52:22.392430 USB3 port 3
1537 16:52:22.395350 PCI: 00:14.0 child on link 0 USB0 port 0
1538 16:52:22.405440 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1539 16:52:22.411912 USB0 port 0 child on link 0 USB2 port 0
1540 16:52:22.412357 USB2 port 0
1541 16:52:22.415420 USB2 port 1
1542 16:52:22.415869 USB2 port 2
1543 16:52:22.418632 USB2 port 3
1544 16:52:22.419081 USB2 port 4
1545 16:52:22.421845 USB2 port 5
1546 16:52:22.422287 USB2 port 6
1547 16:52:22.425219 USB2 port 7
1548 16:52:22.428697 USB2 port 8
1549 16:52:22.429152 USB2 port 9
1550 16:52:22.431805 USB3 port 0
1551 16:52:22.432350 USB3 port 1
1552 16:52:22.435226 USB3 port 2
1553 16:52:22.435644 USB3 port 3
1554 16:52:22.438812 PCI: 00:14.2
1555 16:52:22.448465 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1556 16:52:22.458592 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1557 16:52:22.461836 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1558 16:52:22.472028 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 16:52:22.474979 GENERIC: 0.0
1560 16:52:22.478327 PCI: 00:15.0 child on link 0 I2C: 00:1a
1561 16:52:22.488651 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 16:52:22.489200 I2C: 00:1a
1563 16:52:22.492031 I2C: 00:31
1564 16:52:22.492556 I2C: 00:32
1565 16:52:22.498589 PCI: 00:15.1 child on link 0 I2C: 00:50
1566 16:52:22.508481 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 16:52:22.508910 I2C: 00:50
1568 16:52:22.512012 PCI: 00:15.2
1569 16:52:22.515052 PCI: 00:15.3 child on link 0 I2C: 00:10
1570 16:52:22.524929 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 16:52:22.525432 I2C: 00:10
1572 16:52:22.528456 PCI: 00:16.0
1573 16:52:22.538591 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 16:52:22.539093 PCI: 00:19.0
1575 16:52:22.545180 PCI: 00:19.1 child on link 0 I2C: 00:15
1576 16:52:22.554880 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 16:52:22.555332 I2C: 00:15
1578 16:52:22.555671 I2C: 00:2c
1579 16:52:22.558336 PCI: 00:1e.0
1580 16:52:22.568236 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1581 16:52:22.574766 PCI: 00:1e.3 child on link 0 SPI: 00
1582 16:52:22.585093 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 16:52:22.585562 SPI: 00
1584 16:52:22.587962 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1585 16:52:22.598330 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1586 16:52:22.598773 PNP: 0c09.0
1587 16:52:22.608236 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1588 16:52:22.611543 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1589 16:52:22.621445 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1590 16:52:22.631387 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1591 16:52:22.634858 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1592 16:52:22.637934 GENERIC: 0.0
1593 16:52:22.638525 GENERIC: 1.0
1594 16:52:22.641323 PCI: 00:1f.3
1595 16:52:22.651592 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1596 16:52:22.661264 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1597 16:52:22.664691 PCI: 00:1f.5
1598 16:52:22.671496 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1599 16:52:22.681087 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1600 16:52:22.684218 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1601 16:52:22.691387 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1602 16:52:22.697969 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1603 16:52:22.701253 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1604 16:52:22.704583 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1605 16:52:22.714332 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1606 16:52:22.720888 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1607 16:52:22.727688 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1608 16:52:22.734526 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1609 16:52:22.741013 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1610 16:52:22.747938 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1611 16:52:22.757934 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1612 16:52:22.764564 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1613 16:52:22.767812 DOMAIN: 0000: Resource ranges:
1614 16:52:22.770840 * Base: 1000, Size: 800, Tag: 100
1615 16:52:22.774454 * Base: 1900, Size: e700, Tag: 100
1616 16:52:22.780812 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1617 16:52:22.787553 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1618 16:52:22.794300 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1619 16:52:22.801262 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1620 16:52:22.807758 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1621 16:52:22.817442 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1622 16:52:22.824467 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1623 16:52:22.830846 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1624 16:52:22.838415 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1625 16:52:22.848592 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1626 16:52:22.855425 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1627 16:52:22.861948 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1628 16:52:22.871806 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1629 16:52:22.878692 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1630 16:52:22.885269 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1631 16:52:22.892018 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1632 16:52:22.902110 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1633 16:52:22.908329 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1634 16:52:22.915064 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1635 16:52:22.924894 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1636 16:52:22.931584 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1637 16:52:22.938487 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1638 16:52:22.948443 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1639 16:52:22.954895 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1640 16:52:22.961761 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1641 16:52:22.971954 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1642 16:52:22.978869 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1643 16:52:22.985162 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1644 16:52:22.995702 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1645 16:52:23.001894 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1646 16:52:23.008551 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1647 16:52:23.018042 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1648 16:52:23.025051 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1649 16:52:23.028118 DOMAIN: 0000: Resource ranges:
1650 16:52:23.031608 * Base: 80400000, Size: 3fc00000, Tag: 200
1651 16:52:23.038393 * Base: d0000000, Size: 28000000, Tag: 200
1652 16:52:23.041322 * Base: fa000000, Size: 1000000, Tag: 200
1653 16:52:23.044720 * Base: fb001000, Size: 17ff000, Tag: 200
1654 16:52:23.048254 * Base: fe800000, Size: 300000, Tag: 200
1655 16:52:23.054786 * Base: feb80000, Size: 80000, Tag: 200
1656 16:52:23.058213 * Base: fed00000, Size: 40000, Tag: 200
1657 16:52:23.061719 * Base: fed70000, Size: 10000, Tag: 200
1658 16:52:23.064709 * Base: fed88000, Size: 8000, Tag: 200
1659 16:52:23.068312 * Base: fed93000, Size: d000, Tag: 200
1660 16:52:23.074682 * Base: feda2000, Size: 1e000, Tag: 200
1661 16:52:23.078246 * Base: fede0000, Size: 1220000, Tag: 200
1662 16:52:23.085059 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1663 16:52:23.091608 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1664 16:52:23.098119 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1665 16:52:23.104618 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1666 16:52:23.111541 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1667 16:52:23.118336 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1668 16:52:23.124664 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1669 16:52:23.131325 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1670 16:52:23.137696 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1671 16:52:23.144627 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1672 16:52:23.151349 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1673 16:52:23.157972 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1674 16:52:23.164545 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1675 16:52:23.171259 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1676 16:52:23.178092 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1677 16:52:23.184235 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1678 16:52:23.191227 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1679 16:52:23.197668 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1680 16:52:23.204608 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1681 16:52:23.211108 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1682 16:52:23.217641 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1683 16:52:23.224155 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1684 16:52:23.227179 PCI: 00:06.0: Resource ranges:
1685 16:52:23.230582 * Base: 80400000, Size: 100000, Tag: 200
1686 16:52:23.237481 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1687 16:52:23.244075 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1688 16:52:23.254195 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1689 16:52:23.260496 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1690 16:52:23.263866 Root Device assign_resources, bus 0 link: 0
1691 16:52:23.270750 DOMAIN: 0000 assign_resources, bus 0 link: 0
1692 16:52:23.277590 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1693 16:52:23.287157 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1694 16:52:23.293865 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1695 16:52:23.300541 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1696 16:52:23.307104 PCI: 00:04.0 assign_resources, bus 1 link: 0
1697 16:52:23.310509 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1698 16:52:23.320600 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1699 16:52:23.330389 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1700 16:52:23.336774 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1701 16:52:23.343478 PCI: 00:06.0 assign_resources, bus 1 link: 0
1702 16:52:23.350218 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1703 16:52:23.359979 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1704 16:52:23.363996 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1705 16:52:23.373577 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1706 16:52:23.380483 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1707 16:52:23.383361 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1708 16:52:23.390039 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1709 16:52:23.397063 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1710 16:52:23.403533 PCI: 00:14.0 assign_resources, bus 0 link: 0
1711 16:52:23.406597 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1712 16:52:23.413225 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1713 16:52:23.423586 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1714 16:52:23.430253 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1715 16:52:23.436672 PCI: 00:14.3 assign_resources, bus 0 link: 0
1716 16:52:23.440034 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1717 16:52:23.449735 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1718 16:52:23.453158 PCI: 00:15.0 assign_resources, bus 0 link: 0
1719 16:52:23.456487 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1720 16:52:23.466420 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1721 16:52:23.470056 PCI: 00:15.1 assign_resources, bus 0 link: 0
1722 16:52:23.476358 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1723 16:52:23.483099 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1724 16:52:23.486599 PCI: 00:15.3 assign_resources, bus 0 link: 0
1725 16:52:23.492889 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1726 16:52:23.499808 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1727 16:52:23.509653 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1728 16:52:23.512904 PCI: 00:19.1 assign_resources, bus 0 link: 0
1729 16:52:23.519972 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1730 16:52:23.526560 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1731 16:52:23.529927 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1732 16:52:23.536181 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1733 16:52:23.539615 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1734 16:52:23.546019 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1735 16:52:23.549454 LPC: Trying to open IO window from 800 size 1ff
1736 16:52:23.559753 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1737 16:52:23.566281 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1738 16:52:23.572568 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1739 16:52:23.579726 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1740 16:52:23.582642 Root Device assign_resources, bus 0 link: 0 done
1741 16:52:23.586029 Done setting resources.
1742 16:52:23.592656 Show resources in subtree (Root Device)...After assigning values.
1743 16:52:23.596094 Root Device child on link 0 CPU_CLUSTER: 0
1744 16:52:23.602881 CPU_CLUSTER: 0 child on link 0 APIC: 00
1745 16:52:23.603299 APIC: 00
1746 16:52:23.603627 APIC: 1e
1747 16:52:23.605836 APIC: 18
1748 16:52:23.606251 APIC: 1a
1749 16:52:23.609250 APIC: 1c
1750 16:52:23.609666 APIC: 01
1751 16:52:23.610039 APIC: 09
1752 16:52:23.612698 APIC: 08
1753 16:52:23.615985 DOMAIN: 0000 child on link 0 GPIO: 0
1754 16:52:23.625938 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1755 16:52:23.636076 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1756 16:52:23.636502 GPIO: 0
1757 16:52:23.636857 PCI: 00:00.0
1758 16:52:23.645846 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1759 16:52:23.655625 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1760 16:52:23.665629 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1761 16:52:23.676027 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1762 16:52:23.686034 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1763 16:52:23.692258 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1764 16:52:23.702453 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1765 16:52:23.712117 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1766 16:52:23.722063 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1767 16:52:23.732055 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1768 16:52:23.742048 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1769 16:52:23.752303 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1770 16:52:23.758818 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1771 16:52:23.768342 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1772 16:52:23.778711 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1773 16:52:23.788686 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1774 16:52:23.798461 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1775 16:52:23.808492 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1776 16:52:23.818244 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1777 16:52:23.828165 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1778 16:52:23.838202 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1779 16:52:23.845057 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1780 16:52:23.854981 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1781 16:52:23.864625 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1782 16:52:23.874559 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1783 16:52:23.884488 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1784 16:52:23.894491 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1785 16:52:23.904427 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1786 16:52:23.904875 PCI: 00:02.0
1787 16:52:23.914312 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1788 16:52:23.927915 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1789 16:52:23.934370 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1790 16:52:23.940801 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1791 16:52:23.951383 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1792 16:52:23.951809 GENERIC: 0.0
1793 16:52:23.957670 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1794 16:52:23.964074 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1795 16:52:23.977465 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1796 16:52:23.987486 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1797 16:52:23.990562 PCI: 01:00.0
1798 16:52:24.001035 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1799 16:52:24.010406 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1800 16:52:24.010857 PCI: 00:08.0
1801 16:52:24.013964 PCI: 00:0a.0
1802 16:52:24.023896 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1803 16:52:24.027182 PCI: 00:0d.0 child on link 0 USB0 port 0
1804 16:52:24.040604 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1805 16:52:24.043731 USB0 port 0 child on link 0 USB3 port 0
1806 16:52:24.044273 USB3 port 0
1807 16:52:24.047128 USB3 port 1
1808 16:52:24.047634 USB3 port 2
1809 16:52:24.050595 USB3 port 3
1810 16:52:24.054051 PCI: 00:14.0 child on link 0 USB0 port 0
1811 16:52:24.063690 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1812 16:52:24.070188 USB0 port 0 child on link 0 USB2 port 0
1813 16:52:24.070636 USB2 port 0
1814 16:52:24.073599 USB2 port 1
1815 16:52:24.074035 USB2 port 2
1816 16:52:24.076917 USB2 port 3
1817 16:52:24.077401 USB2 port 4
1818 16:52:24.080484 USB2 port 5
1819 16:52:24.080931 USB2 port 6
1820 16:52:24.083898 USB2 port 7
1821 16:52:24.086880 USB2 port 8
1822 16:52:24.087326 USB2 port 9
1823 16:52:24.090355 USB3 port 0
1824 16:52:24.090800 USB3 port 1
1825 16:52:24.093904 USB3 port 2
1826 16:52:24.094343 USB3 port 3
1827 16:52:24.097003 PCI: 00:14.2
1828 16:52:24.106950 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1829 16:52:24.116708 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1830 16:52:24.120444 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1831 16:52:24.130058 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1832 16:52:24.133809 GENERIC: 0.0
1833 16:52:24.137003 PCI: 00:15.0 child on link 0 I2C: 00:1a
1834 16:52:24.146726 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1835 16:52:24.150230 I2C: 00:1a
1836 16:52:24.150669 I2C: 00:31
1837 16:52:24.153653 I2C: 00:32
1838 16:52:24.156676 PCI: 00:15.1 child on link 0 I2C: 00:50
1839 16:52:24.166910 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1840 16:52:24.170059 I2C: 00:50
1841 16:52:24.170481 PCI: 00:15.2
1842 16:52:24.173436 PCI: 00:15.3 child on link 0 I2C: 00:10
1843 16:52:24.186435 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1844 16:52:24.186886 I2C: 00:10
1845 16:52:24.187396 PCI: 00:16.0
1846 16:52:24.199990 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1847 16:52:24.200551 PCI: 00:19.0
1848 16:52:24.203535 PCI: 00:19.1 child on link 0 I2C: 00:15
1849 16:52:24.216561 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1850 16:52:24.217063 I2C: 00:15
1851 16:52:24.217601 I2C: 00:2c
1852 16:52:24.220049 PCI: 00:1e.0
1853 16:52:24.229845 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1854 16:52:24.236247 PCI: 00:1e.3 child on link 0 SPI: 00
1855 16:52:24.246489 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1856 16:52:24.246930 SPI: 00
1857 16:52:24.249809 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1858 16:52:24.259749 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1859 16:52:24.260237 PNP: 0c09.0
1860 16:52:24.269680 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1861 16:52:24.273187 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1862 16:52:24.283103 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1863 16:52:24.292685 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1864 16:52:24.296085 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1865 16:52:24.299628 GENERIC: 0.0
1866 16:52:24.302955 GENERIC: 1.0
1867 16:52:24.303378 PCI: 00:1f.3
1868 16:52:24.312710 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1869 16:52:24.323099 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1870 16:52:24.326357 PCI: 00:1f.5
1871 16:52:24.336067 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1872 16:52:24.339474 Done allocating resources.
1873 16:52:24.346118 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1874 16:52:24.349533 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1875 16:52:24.356065 Configure audio over I2S with MAX98373 NAU88L25B.
1876 16:52:24.359504 Enabling BT offload
1877 16:52:24.366921 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1878 16:52:24.370525 Enabling resources...
1879 16:52:24.373489 PCI: 00:00.0 subsystem <- 8086/4609
1880 16:52:24.377026 PCI: 00:00.0 cmd <- 06
1881 16:52:24.380546 PCI: 00:02.0 subsystem <- 8086/46b3
1882 16:52:24.384063 PCI: 00:02.0 cmd <- 03
1883 16:52:24.387097 PCI: 00:04.0 subsystem <- 8086/461d
1884 16:52:24.387677 PCI: 00:04.0 cmd <- 02
1885 16:52:24.390568 PCI: 00:06.0 bridge ctrl <- 0013
1886 16:52:24.393536 PCI: 00:06.0 subsystem <- 8086/464d
1887 16:52:24.396957 PCI: 00:06.0 cmd <- 106
1888 16:52:24.400490 PCI: 00:0a.0 subsystem <- 8086/467d
1889 16:52:24.403471 PCI: 00:0a.0 cmd <- 02
1890 16:52:24.406966 PCI: 00:0d.0 subsystem <- 8086/461e
1891 16:52:24.410672 PCI: 00:0d.0 cmd <- 02
1892 16:52:24.413638 PCI: 00:14.0 subsystem <- 8086/51ed
1893 16:52:24.416851 PCI: 00:14.0 cmd <- 02
1894 16:52:24.420801 PCI: 00:14.2 subsystem <- 8086/51ef
1895 16:52:24.421327 PCI: 00:14.2 cmd <- 02
1896 16:52:24.423613 PCI: 00:14.3 subsystem <- 8086/51f0
1897 16:52:24.427183 PCI: 00:14.3 cmd <- 02
1898 16:52:24.430189 PCI: 00:15.0 subsystem <- 8086/51e8
1899 16:52:24.433677 PCI: 00:15.0 cmd <- 02
1900 16:52:24.436836 PCI: 00:15.1 subsystem <- 8086/51e9
1901 16:52:24.440107 PCI: 00:15.1 cmd <- 06
1902 16:52:24.443602 PCI: 00:15.3 subsystem <- 8086/51eb
1903 16:52:24.446871 PCI: 00:15.3 cmd <- 02
1904 16:52:24.450421 PCI: 00:16.0 subsystem <- 8086/51e0
1905 16:52:24.450922 PCI: 00:16.0 cmd <- 02
1906 16:52:24.453437 PCI: 00:19.1 subsystem <- 8086/51c6
1907 16:52:24.456642 PCI: 00:19.1 cmd <- 02
1908 16:52:24.460421 PCI: 00:1e.0 subsystem <- 8086/51a8
1909 16:52:24.463437 PCI: 00:1e.0 cmd <- 06
1910 16:52:24.466924 PCI: 00:1e.3 subsystem <- 8086/51ab
1911 16:52:24.470023 PCI: 00:1e.3 cmd <- 02
1912 16:52:24.473572 PCI: 00:1f.0 subsystem <- 8086/5182
1913 16:52:24.476496 PCI: 00:1f.0 cmd <- 407
1914 16:52:24.480160 PCI: 00:1f.3 subsystem <- 8086/51c8
1915 16:52:24.480595 PCI: 00:1f.3 cmd <- 02
1916 16:52:24.483655 PCI: 00:1f.5 subsystem <- 8086/51a4
1917 16:52:24.486627 PCI: 00:1f.5 cmd <- 406
1918 16:52:24.490101 PCI: 01:00.0 cmd <- 02
1919 16:52:24.490523 done.
1920 16:52:24.496474 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1921 16:52:24.500081 ME: Version: Unavailable
1922 16:52:24.503448 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1923 16:52:24.506500 Initializing devices...
1924 16:52:24.510108 Root Device init
1925 16:52:24.510541 mainboard: EC init
1926 16:52:24.516584 Chrome EC: Set SMI mask to 0x0000000000000000
1927 16:52:24.517159 Chrome EC: UHEPI supported
1928 16:52:24.524283 Chrome EC: clear events_b mask to 0x0000000000000000
1929 16:52:24.530817 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1930 16:52:24.537181 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1931 16:52:24.544084 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1932 16:52:24.547013 Chrome EC: Set WAKE mask to 0x0000000000000000
1933 16:52:24.554813 Root Device init finished in 41 msecs
1934 16:52:24.555418 PCI: 00:00.0 init
1935 16:52:24.558444 CPU TDP = 15 Watts
1936 16:52:24.561992 CPU PL1 = 15 Watts
1937 16:52:24.562542 CPU PL2 = 55 Watts
1938 16:52:24.564859 CPU PL4 = 123 Watts
1939 16:52:24.568266 PCI: 00:00.0 init finished in 8 msecs
1940 16:52:24.571694 PCI: 00:02.0 init
1941 16:52:24.572111 GMA: Found VBT in CBFS
1942 16:52:24.575120 GMA: Found valid VBT in CBFS
1943 16:52:24.581847 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1944 16:52:24.588357 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1945 16:52:24.591477 PCI: 00:02.0 init finished in 18 msecs
1946 16:52:24.594946 PCI: 00:06.0 init
1947 16:52:24.598378 Initializing PCH PCIe bridge.
1948 16:52:24.601361 PCI: 00:06.0 init finished in 3 msecs
1949 16:52:24.605102 PCI: 00:0a.0 init
1950 16:52:24.607949 PCI: 00:0a.0 init finished in 0 msecs
1951 16:52:24.608364 PCI: 00:14.0 init
1952 16:52:24.611367 PCI: 00:14.0 init finished in 0 msecs
1953 16:52:24.614941 PCI: 00:14.2 init
1954 16:52:24.618468 PCI: 00:14.2 init finished in 0 msecs
1955 16:52:24.621423 PCI: 00:15.0 init
1956 16:52:24.625073 I2C bus 0 version 0x3230302a
1957 16:52:24.627891 DW I2C bus 0 at 0x80655000 (400 KHz)
1958 16:52:24.631325 PCI: 00:15.0 init finished in 6 msecs
1959 16:52:24.631742 PCI: 00:15.1 init
1960 16:52:24.634777 I2C bus 1 version 0x3230302a
1961 16:52:24.638215 DW I2C bus 1 at 0x80656000 (400 KHz)
1962 16:52:24.641138 PCI: 00:15.1 init finished in 6 msecs
1963 16:52:24.644962 PCI: 00:15.3 init
1964 16:52:24.647828 I2C bus 3 version 0x3230302a
1965 16:52:24.651517 DW I2C bus 3 at 0x80657000 (400 KHz)
1966 16:52:24.654582 PCI: 00:15.3 init finished in 6 msecs
1967 16:52:24.657911 PCI: 00:16.0 init
1968 16:52:24.661525 PCI: 00:16.0 init finished in 0 msecs
1969 16:52:24.661975 PCI: 00:19.1 init
1970 16:52:24.665079 I2C bus 5 version 0x3230302a
1971 16:52:24.667977 DW I2C bus 5 at 0x80659000 (400 KHz)
1972 16:52:24.674451 PCI: 00:19.1 init finished in 6 msecs
1973 16:52:24.674873 PCI: 00:1f.0 init
1974 16:52:24.677747 IOAPIC: Initializing IOAPIC at 0xfec00000
1975 16:52:24.681625 IOAPIC: ID = 0x02
1976 16:52:24.684817 IOAPIC: Dumping registers
1977 16:52:24.688006 reg 0x0000: 0x02000000
1978 16:52:24.688427 reg 0x0001: 0x00770020
1979 16:52:24.691431 reg 0x0002: 0x00000000
1980 16:52:24.694530 IOAPIC: 120 interrupts
1981 16:52:24.697629 IOAPIC: Clearing IOAPIC at 0xfec00000
1982 16:52:24.701123 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1983 16:52:24.707971 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1984 16:52:24.711002 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1985 16:52:24.717887 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1986 16:52:24.721338 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1987 16:52:24.727845 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1988 16:52:24.731273 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1989 16:52:24.737720 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1990 16:52:24.741019 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1991 16:52:24.744570 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1992 16:52:24.750978 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1993 16:52:24.754163 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1994 16:52:24.761081 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1995 16:52:24.764787 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1996 16:52:24.771091 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1997 16:52:24.774738 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1998 16:52:24.777919 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1999 16:52:24.784615 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2000 16:52:24.787391 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2001 16:52:24.794268 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2002 16:52:24.797671 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2003 16:52:24.804370 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2004 16:52:24.807566 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2005 16:52:24.814059 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2006 16:52:24.817558 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2007 16:52:24.821024 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2008 16:52:24.827386 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2009 16:52:24.831043 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2010 16:52:24.837905 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2011 16:52:24.841037 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2012 16:52:24.847696 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2013 16:52:24.850872 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2014 16:52:24.857306 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2015 16:52:24.860736 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2016 16:52:24.864171 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2017 16:52:24.870765 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2018 16:52:24.874161 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2019 16:52:24.880921 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2020 16:52:24.883999 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2021 16:52:24.890743 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2022 16:52:24.894138 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2023 16:52:24.900934 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2024 16:52:24.904017 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2025 16:52:24.907447 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2026 16:52:24.913975 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2027 16:52:24.917579 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2028 16:52:24.923766 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2029 16:52:24.927337 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2030 16:52:24.933950 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2031 16:52:24.936946 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2032 16:52:24.940482 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2033 16:52:24.947334 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2034 16:52:24.950480 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2035 16:52:24.956937 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2036 16:52:24.960720 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2037 16:52:24.967333 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2038 16:52:24.970679 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2039 16:52:24.977044 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2040 16:52:24.980875 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2041 16:52:24.983736 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2042 16:52:24.990625 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2043 16:52:24.993744 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2044 16:52:25.000375 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2045 16:52:25.003843 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2046 16:52:25.010595 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2047 16:52:25.013866 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2048 16:52:25.020661 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2049 16:52:25.023446 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2050 16:52:25.026838 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2051 16:52:25.033638 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2052 16:52:25.037045 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2053 16:52:25.043643 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2054 16:52:25.046974 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2055 16:52:25.053844 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2056 16:52:25.056838 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2057 16:52:25.063955 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2058 16:52:25.066988 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2059 16:52:25.070099 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2060 16:52:25.077264 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2061 16:52:25.080583 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2062 16:52:25.087059 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2063 16:52:25.090697 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2064 16:52:25.096901 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2065 16:52:25.100287 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2066 16:52:25.103627 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2067 16:52:25.110036 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2068 16:52:25.113358 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2069 16:52:25.120005 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2070 16:52:25.123430 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2071 16:52:25.130622 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2072 16:52:25.133601 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2073 16:52:25.140712 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2074 16:52:25.143689 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2075 16:52:25.146586 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2076 16:52:25.153479 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2077 16:52:25.156953 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2078 16:52:25.163988 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2079 16:52:25.166969 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2080 16:52:25.173532 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2081 16:52:25.177026 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2082 16:52:25.180350 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2083 16:52:25.187261 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2084 16:52:25.190047 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2085 16:52:25.196812 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2086 16:52:25.200284 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2087 16:52:25.206435 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2088 16:52:25.209708 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2089 16:52:25.216839 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2090 16:52:25.219997 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2091 16:52:25.223160 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2092 16:52:25.229624 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2093 16:52:25.233209 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2094 16:52:25.240082 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2095 16:52:25.243194 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2096 16:52:25.249728 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2097 16:52:25.252961 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2098 16:52:25.259512 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2099 16:52:25.262861 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2100 16:52:25.266418 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2101 16:52:25.273020 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2102 16:52:25.276349 IOAPIC: Bootstrap Processor Local APIC = 0x00
2103 16:52:25.283002 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2104 16:52:25.286077 PCI: 00:1f.0 init finished in 607 msecs
2105 16:52:25.289413 PCI: 00:1f.2 init
2106 16:52:25.293030 apm_control: Disabling ACPI.
2107 16:52:25.296284 APMC done.
2108 16:52:25.299550 PCI: 00:1f.2 init finished in 7 msecs
2109 16:52:25.302673 PCI: 00:1f.3 init
2110 16:52:25.306134 PCI: 00:1f.3 init finished in 0 msecs
2111 16:52:25.306592 PCI: 01:00.0 init
2112 16:52:25.309327 PCI: 01:00.0 init finished in 0 msecs
2113 16:52:25.312815 PNP: 0c09.0 init
2114 16:52:25.319592 Google Chrome EC uptime: 12.039 seconds
2115 16:52:25.322640 Google Chrome AP resets since EC boot: 1
2116 16:52:25.326185 Google Chrome most recent AP reset causes:
2117 16:52:25.329475 0.338: 32775 shutdown: entering G3
2118 16:52:25.335985 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2119 16:52:25.339498 PNP: 0c09.0 init finished in 23 msecs
2120 16:52:25.342499 GENERIC: 0.0 init
2121 16:52:25.346040 GENERIC: 0.0 init finished in 0 msecs
2122 16:52:25.349576 GENERIC: 1.0 init
2123 16:52:25.352557 GENERIC: 1.0 init finished in 0 msecs
2124 16:52:25.353009 Devices initialized
2125 16:52:25.356124 Show all devs... After init.
2126 16:52:25.359551 Root Device: enabled 1
2127 16:52:25.362545 CPU_CLUSTER: 0: enabled 1
2128 16:52:25.365879 DOMAIN: 0000: enabled 1
2129 16:52:25.366295 GPIO: 0: enabled 1
2130 16:52:25.369053 PCI: 00:00.0: enabled 1
2131 16:52:25.372168 PCI: 00:01.0: enabled 0
2132 16:52:25.372584 PCI: 00:01.1: enabled 0
2133 16:52:25.376022 PCI: 00:02.0: enabled 1
2134 16:52:25.378937 PCI: 00:04.0: enabled 1
2135 16:52:25.382324 PCI: 00:05.0: enabled 0
2136 16:52:25.382741 PCI: 00:06.0: enabled 1
2137 16:52:25.385702 PCI: 00:06.2: enabled 0
2138 16:52:25.389076 PCI: 00:07.0: enabled 0
2139 16:52:25.389497 PCI: 00:07.1: enabled 0
2140 16:52:25.392651 PCI: 00:07.2: enabled 0
2141 16:52:25.395718 PCI: 00:07.3: enabled 0
2142 16:52:25.398980 PCI: 00:08.0: enabled 0
2143 16:52:25.399398 PCI: 00:09.0: enabled 0
2144 16:52:25.402012 PCI: 00:0a.0: enabled 1
2145 16:52:25.405309 PCI: 00:0d.0: enabled 1
2146 16:52:25.408806 PCI: 00:0d.1: enabled 0
2147 16:52:25.409322 PCI: 00:0d.2: enabled 0
2148 16:52:25.412311 PCI: 00:0d.3: enabled 0
2149 16:52:25.415533 PCI: 00:0e.0: enabled 0
2150 16:52:25.418813 PCI: 00:10.0: enabled 0
2151 16:52:25.419230 PCI: 00:10.1: enabled 0
2152 16:52:25.422331 PCI: 00:10.6: enabled 0
2153 16:52:25.425516 PCI: 00:10.7: enabled 0
2154 16:52:25.428813 PCI: 00:12.0: enabled 0
2155 16:52:25.429288 PCI: 00:12.6: enabled 0
2156 16:52:25.432078 PCI: 00:12.7: enabled 0
2157 16:52:25.435595 PCI: 00:13.0: enabled 0
2158 16:52:25.436013 PCI: 00:14.0: enabled 1
2159 16:52:25.438918 PCI: 00:14.1: enabled 0
2160 16:52:25.442040 PCI: 00:14.2: enabled 1
2161 16:52:25.445431 PCI: 00:14.3: enabled 1
2162 16:52:25.445846 PCI: 00:15.0: enabled 1
2163 16:52:25.448899 PCI: 00:15.1: enabled 1
2164 16:52:25.451998 PCI: 00:15.2: enabled 0
2165 16:52:25.455458 PCI: 00:15.3: enabled 1
2166 16:52:25.455871 PCI: 00:16.0: enabled 1
2167 16:52:25.458515 PCI: 00:16.1: enabled 0
2168 16:52:25.461913 PCI: 00:16.2: enabled 0
2169 16:52:25.465441 PCI: 00:16.3: enabled 0
2170 16:52:25.465858 PCI: 00:16.4: enabled 0
2171 16:52:25.468406 PCI: 00:16.5: enabled 0
2172 16:52:25.472075 PCI: 00:17.0: enabled 0
2173 16:52:25.475037 PCI: 00:19.0: enabled 0
2174 16:52:25.475452 PCI: 00:19.1: enabled 1
2175 16:52:25.478544 PCI: 00:19.2: enabled 0
2176 16:52:25.481769 PCI: 00:1a.0: enabled 0
2177 16:52:25.482185 PCI: 00:1c.0: enabled 0
2178 16:52:25.485458 PCI: 00:1c.1: enabled 0
2179 16:52:25.488363 PCI: 00:1c.2: enabled 0
2180 16:52:25.492132 PCI: 00:1c.3: enabled 0
2181 16:52:25.492547 PCI: 00:1c.4: enabled 0
2182 16:52:25.495181 PCI: 00:1c.5: enabled 0
2183 16:52:25.498862 PCI: 00:1c.6: enabled 0
2184 16:52:25.501709 PCI: 00:1c.7: enabled 0
2185 16:52:25.502135 PCI: 00:1d.0: enabled 0
2186 16:52:25.505239 PCI: 00:1d.1: enabled 0
2187 16:52:25.508434 PCI: 00:1d.2: enabled 0
2188 16:52:25.511946 PCI: 00:1d.3: enabled 0
2189 16:52:25.512477 PCI: 00:1e.0: enabled 1
2190 16:52:25.515001 PCI: 00:1e.1: enabled 0
2191 16:52:25.518771 PCI: 00:1e.2: enabled 0
2192 16:52:25.519214 PCI: 00:1e.3: enabled 1
2193 16:52:25.521808 PCI: 00:1f.0: enabled 1
2194 16:52:25.525070 PCI: 00:1f.1: enabled 0
2195 16:52:25.528393 PCI: 00:1f.2: enabled 1
2196 16:52:25.528828 PCI: 00:1f.3: enabled 1
2197 16:52:25.531933 PCI: 00:1f.4: enabled 0
2198 16:52:25.534968 PCI: 00:1f.5: enabled 1
2199 16:52:25.538265 PCI: 00:1f.6: enabled 0
2200 16:52:25.538705 PCI: 00:1f.7: enabled 0
2201 16:52:25.541712 GENERIC: 0.0: enabled 1
2202 16:52:25.545453 GENERIC: 0.0: enabled 1
2203 16:52:25.548165 GENERIC: 1.0: enabled 1
2204 16:52:25.548679 GENERIC: 0.0: enabled 1
2205 16:52:25.551751 GENERIC: 1.0: enabled 1
2206 16:52:25.554784 USB0 port 0: enabled 1
2207 16:52:25.555204 USB0 port 0: enabled 1
2208 16:52:25.558372 GENERIC: 0.0: enabled 1
2209 16:52:25.561475 I2C: 00:1a: enabled 1
2210 16:52:25.565011 I2C: 00:31: enabled 1
2211 16:52:25.565516 I2C: 00:32: enabled 1
2212 16:52:25.567978 I2C: 00:50: enabled 1
2213 16:52:25.571408 I2C: 00:10: enabled 1
2214 16:52:25.571838 I2C: 00:15: enabled 1
2215 16:52:25.575004 I2C: 00:2c: enabled 1
2216 16:52:25.578503 GENERIC: 0.0: enabled 1
2217 16:52:25.578933 SPI: 00: enabled 1
2218 16:52:25.581416 PNP: 0c09.0: enabled 1
2219 16:52:25.584807 GENERIC: 0.0: enabled 1
2220 16:52:25.585249 USB3 port 0: enabled 1
2221 16:52:25.588329 USB3 port 1: enabled 0
2222 16:52:25.591281 USB3 port 2: enabled 1
2223 16:52:25.594778 USB3 port 3: enabled 0
2224 16:52:25.595178 USB2 port 0: enabled 1
2225 16:52:25.597930 USB2 port 1: enabled 0
2226 16:52:25.601339 USB2 port 2: enabled 1
2227 16:52:25.601728 USB2 port 3: enabled 0
2228 16:52:25.604734 USB2 port 4: enabled 0
2229 16:52:25.608000 USB2 port 5: enabled 1
2230 16:52:25.611364 USB2 port 6: enabled 0
2231 16:52:25.611935 USB2 port 7: enabled 0
2232 16:52:25.614529 USB2 port 8: enabled 1
2233 16:52:25.617955 USB2 port 9: enabled 1
2234 16:52:25.618367 USB3 port 0: enabled 1
2235 16:52:25.621489 USB3 port 1: enabled 0
2236 16:52:25.624382 USB3 port 2: enabled 0
2237 16:52:25.624945 USB3 port 3: enabled 0
2238 16:52:25.628097 GENERIC: 0.0: enabled 1
2239 16:52:25.631131 GENERIC: 1.0: enabled 1
2240 16:52:25.634498 APIC: 00: enabled 1
2241 16:52:25.634960 APIC: 1e: enabled 1
2242 16:52:25.637952 APIC: 18: enabled 1
2243 16:52:25.638397 APIC: 1a: enabled 1
2244 16:52:25.641251 APIC: 1c: enabled 1
2245 16:52:25.644701 APIC: 01: enabled 1
2246 16:52:25.645237 APIC: 09: enabled 1
2247 16:52:25.647904 APIC: 08: enabled 1
2248 16:52:25.651391 PCI: 01:00.0: enabled 1
2249 16:52:25.654826 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2250 16:52:25.660935 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2251 16:52:25.664521 ELOG: NV offset 0xf20000 size 0x4000
2252 16:52:25.671281 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2253 16:52:25.677562 ELOG: Event(17) added with size 13 at 2024-02-05 16:52:25 UTC
2254 16:52:25.684498 ELOG: Event(9E) added with size 10 at 2024-02-05 16:52:25 UTC
2255 16:52:25.690881 ELOG: Event(9F) added with size 14 at 2024-02-05 16:52:25 UTC
2256 16:52:25.697538 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2257 16:52:25.704617 ELOG: Event(A0) added with size 9 at 2024-02-05 16:52:25 UTC
2258 16:52:25.708054 elog_add_boot_reason: Logged dev mode boot
2259 16:52:25.714421 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2260 16:52:25.714922 Finalize devices...
2261 16:52:25.718058 PCI: 00:16.0 final
2262 16:52:25.721756 PCI: 00:1f.2 final
2263 16:52:25.722170 GENERIC: 0.0 final
2264 16:52:25.727319 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2265 16:52:25.730823 GENERIC: 1.0 final
2266 16:52:25.737334 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2267 16:52:25.737752 Devices finalized
2268 16:52:25.744079 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2269 16:52:25.747266 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2270 16:52:25.754044 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2271 16:52:25.757558 ME: HFSTS1 : 0x90000245
2272 16:52:25.763894 ME: HFSTS2 : 0x82100116
2273 16:52:25.767481 ME: HFSTS3 : 0x00000050
2274 16:52:25.773714 ME: HFSTS4 : 0x00004000
2275 16:52:25.777130 ME: HFSTS5 : 0x00000000
2276 16:52:25.780768 ME: HFSTS6 : 0x40600006
2277 16:52:25.783697 ME: Manufacturing Mode : NO
2278 16:52:25.790670 ME: SPI Protection Mode Enabled : YES
2279 16:52:25.793920 ME: FPFs Committed : YES
2280 16:52:25.797505 ME: Manufacturing Vars Locked : YES
2281 16:52:25.800335 ME: FW Partition Table : OK
2282 16:52:25.803727 ME: Bringup Loader Failure : NO
2283 16:52:25.807297 ME: Firmware Init Complete : YES
2284 16:52:25.810362 ME: Boot Options Present : NO
2285 16:52:25.813704 ME: Update In Progress : NO
2286 16:52:25.820516 ME: D0i3 Support : YES
2287 16:52:25.823613 ME: Low Power State Enabled : NO
2288 16:52:25.827219 ME: CPU Replaced : YES
2289 16:52:25.830415 ME: CPU Replacement Valid : YES
2290 16:52:25.833917 ME: Current Working State : 5
2291 16:52:25.836842 ME: Current Operation State : 1
2292 16:52:25.840270 ME: Current Operation Mode : 0
2293 16:52:25.843942 ME: Error Code : 0
2294 16:52:25.846939 ME: Enhanced Debug Mode : NO
2295 16:52:25.850756 ME: CPU Debug Disabled : YES
2296 16:52:25.859194 ME: TXT Support : NO
2297 16:52:25.860911 ME: WP for RO is enabled : YES
2298 16:52:25.864182 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2299 16:52:25.871019 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2300 16:52:25.874678 Ramoops buffer: 0x100000@0x76899000.
2301 16:52:25.881038 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2302 16:52:25.887610 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2303 16:52:25.890647 CBFS: 'fallback/slic' not found.
2304 16:52:25.897488 ACPI: Writing ACPI tables at 7686d000.
2305 16:52:25.898064 ACPI: * FACS
2306 16:52:25.900847 ACPI: * DSDT
2307 16:52:25.907166 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2308 16:52:25.910677 ACPI: * FADT
2309 16:52:25.911111 SCI is IRQ9
2310 16:52:25.914132 ACPI: added table 1/32, length now 40
2311 16:52:25.917673 ACPI: * SSDT
2312 16:52:25.920660 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2313 16:52:25.927959 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2314 16:52:25.931432 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2315 16:52:25.934464 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2316 16:52:25.941405 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2317 16:52:25.947650 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2318 16:52:25.954710 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2319 16:52:25.958207 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2320 16:52:25.964753 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2321 16:52:25.967923 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2322 16:52:25.974600 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2323 16:52:25.977867 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2324 16:52:25.984588 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2325 16:52:25.987467 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2326 16:52:25.995012 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2327 16:52:25.998116 PS2K: Passing 80 keymaps to kernel
2328 16:52:26.004963 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2329 16:52:26.011428 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2330 16:52:26.017959 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2331 16:52:26.024543 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2332 16:52:26.031280 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2333 16:52:26.037849 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2334 16:52:26.041236 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2335 16:52:26.047708 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2336 16:52:26.054744 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2337 16:52:26.061138 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2338 16:52:26.064494 ACPI: added table 2/32, length now 44
2339 16:52:26.067858 ACPI: * MCFG
2340 16:52:26.071185 ACPI: added table 3/32, length now 48
2341 16:52:26.071724 ACPI: * TPM2
2342 16:52:26.074686 TPM2 log created at 0x7685d000
2343 16:52:26.081420 ACPI: added table 4/32, length now 52
2344 16:52:26.081945 ACPI: * LPIT
2345 16:52:26.084312 ACPI: added table 5/32, length now 56
2346 16:52:26.087701 ACPI: * MADT
2347 16:52:26.088325 SCI is IRQ9
2348 16:52:26.090740 ACPI: added table 6/32, length now 60
2349 16:52:26.094017 cmd_reg from pmc_make_ipc_cmd 1052838
2350 16:52:26.100663 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2351 16:52:26.107475 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2352 16:52:26.114254 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2353 16:52:26.117596 PMC CrashLog size in discovery mode: 0xC00
2354 16:52:26.120672 cpu crashlog bar addr: 0x80640000
2355 16:52:26.124390 cpu discovery table offset: 0x6030
2356 16:52:26.131006 cpu_crashlog_discovery_table buffer count: 0x3
2357 16:52:26.137443 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2358 16:52:26.143839 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2359 16:52:26.150871 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2360 16:52:26.153928 PMC crashLog size in discovery mode : 0xC00
2361 16:52:26.160911 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2362 16:52:26.167050 discover mode PMC crashlog size adjusted to: 0x200
2363 16:52:26.174441 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2364 16:52:26.177155 discover mode PMC crashlog size adjusted to: 0x0
2365 16:52:26.180344 m_cpu_crashLog_size : 0x3480 bytes
2366 16:52:26.184324 CPU crashLog present.
2367 16:52:26.187316 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2368 16:52:26.197116 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2369 16:52:26.197637 current = 76876550
2370 16:52:26.200609 ACPI: * DMAR
2371 16:52:26.203606 ACPI: added table 7/32, length now 64
2372 16:52:26.207119 ACPI: added table 8/32, length now 68
2373 16:52:26.207590 ACPI: * HPET
2374 16:52:26.213705 ACPI: added table 9/32, length now 72
2375 16:52:26.214136 ACPI: done.
2376 16:52:26.217327 ACPI tables: 38528 bytes.
2377 16:52:26.220808 smbios_write_tables: 76857000
2378 16:52:26.223835 EC returned error result code 3
2379 16:52:26.227625 Couldn't obtain OEM name from CBI
2380 16:52:26.230843 Create SMBIOS type 16
2381 16:52:26.231275 Create SMBIOS type 17
2382 16:52:26.234202 Create SMBIOS type 20
2383 16:52:26.237484 GENERIC: 0.0 (WIFI Device)
2384 16:52:26.241028 SMBIOS tables: 2156 bytes.
2385 16:52:26.244072 Writing table forward entry at 0x00000500
2386 16:52:26.250751 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2387 16:52:26.254210 Writing coreboot table at 0x76891000
2388 16:52:26.260541 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2389 16:52:26.264146 1. 0000000000001000-000000000009ffff: RAM
2390 16:52:26.267688 2. 00000000000a0000-00000000000fffff: RESERVED
2391 16:52:26.274449 3. 0000000000100000-0000000076856fff: RAM
2392 16:52:26.280552 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2393 16:52:26.284070 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2394 16:52:26.290904 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2395 16:52:26.293856 7. 0000000077000000-00000000803fffff: RESERVED
2396 16:52:26.300475 8. 00000000c0000000-00000000cfffffff: RESERVED
2397 16:52:26.303587 9. 00000000f8000000-00000000f9ffffff: RESERVED
2398 16:52:26.310637 10. 00000000fb000000-00000000fb000fff: RESERVED
2399 16:52:26.313565 11. 00000000fc800000-00000000fe7fffff: RESERVED
2400 16:52:26.317054 12. 00000000feb00000-00000000feb7ffff: RESERVED
2401 16:52:26.323865 13. 00000000fec00000-00000000fecfffff: RESERVED
2402 16:52:26.327040 14. 00000000fed40000-00000000fed6ffff: RESERVED
2403 16:52:26.333517 15. 00000000fed80000-00000000fed87fff: RESERVED
2404 16:52:26.336736 16. 00000000fed90000-00000000fed92fff: RESERVED
2405 16:52:26.343910 17. 00000000feda0000-00000000feda1fff: RESERVED
2406 16:52:26.346995 18. 00000000fedc0000-00000000feddffff: RESERVED
2407 16:52:26.350636 19. 0000000100000000-000000027fbfffff: RAM
2408 16:52:26.353704 Passing 4 GPIOs to payload:
2409 16:52:26.359925 NAME | PORT | POLARITY | VALUE
2410 16:52:26.363986 lid | undefined | high | high
2411 16:52:26.370376 power | undefined | high | low
2412 16:52:26.377148 oprom | undefined | high | low
2413 16:52:26.380139 EC in RW | 0x00000151 | high | high
2414 16:52:26.383621 Board ID: 3
2415 16:52:26.384038 FW config: 0x131
2416 16:52:26.390023 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 864f
2417 16:52:26.393459 coreboot table: 1788 bytes.
2418 16:52:26.396927 IMD ROOT 0. 0x76fff000 0x00001000
2419 16:52:26.400213 IMD SMALL 1. 0x76ffe000 0x00001000
2420 16:52:26.403858 FSP MEMORY 2. 0x76afe000 0x00500000
2421 16:52:26.407208 CONSOLE 3. 0x76ade000 0x00020000
2422 16:52:26.410238 RW MCACHE 4. 0x76add000 0x0000043c
2423 16:52:26.417203 RO MCACHE 5. 0x76adc000 0x00000fd8
2424 16:52:26.419999 FMAP 6. 0x76adb000 0x0000064a
2425 16:52:26.423374 TIME STAMP 7. 0x76ada000 0x00000910
2426 16:52:26.426835 VBOOT WORK 8. 0x76ac6000 0x00014000
2427 16:52:26.430316 MEM INFO 9. 0x76ac5000 0x000003b8
2428 16:52:26.433776 ROMSTG STCK10. 0x76ac4000 0x00001000
2429 16:52:26.436729 AFTER CAR 11. 0x76ab8000 0x0000c000
2430 16:52:26.440648 RAMSTAGE 12. 0x76a2e000 0x0008a000
2431 16:52:26.443672 ACPI BERT 13. 0x76a1e000 0x00010000
2432 16:52:26.450401 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2433 16:52:26.453443 REFCODE 15. 0x769ae000 0x0006f000
2434 16:52:26.457043 SMM BACKUP 16. 0x7699e000 0x00010000
2435 16:52:26.460612 IGD OPREGION17. 0x76999000 0x00004203
2436 16:52:26.463813 RAMOOPS 18. 0x76899000 0x00100000
2437 16:52:26.466793 COREBOOT 19. 0x76891000 0x00008000
2438 16:52:26.470702 ACPI 20. 0x7686d000 0x00024000
2439 16:52:26.473770 TPM2 TCGLOG21. 0x7685d000 0x00010000
2440 16:52:26.480607 PMC CRASHLOG22. 0x7685c000 0x00000c00
2441 16:52:26.483847 CPU CRASHLOG23. 0x76858000 0x00003480
2442 16:52:26.486766 SMBIOS 24. 0x76857000 0x00001000
2443 16:52:26.487238 IMD small region:
2444 16:52:26.493897 IMD ROOT 0. 0x76ffec00 0x00000400
2445 16:52:26.496882 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2446 16:52:26.500591 VPD 2. 0x76ffeb60 0x0000006c
2447 16:52:26.503849 POWER STATE 3. 0x76ffeb00 0x00000044
2448 16:52:26.506754 ROMSTAGE 4. 0x76ffeae0 0x00000004
2449 16:52:26.513727 ACPI GNVS 5. 0x76ffea80 0x00000048
2450 16:52:26.516834 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2451 16:52:26.520370 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2452 16:52:26.523899 MTRR: Physical address space:
2453 16:52:26.530221 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2454 16:52:26.536900 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2455 16:52:26.543520 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2456 16:52:26.550062 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2457 16:52:26.556555 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2458 16:52:26.563421 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2459 16:52:26.570183 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2460 16:52:26.573608 MTRR: Fixed MSR 0x250 0x0606060606060606
2461 16:52:26.576713 MTRR: Fixed MSR 0x258 0x0606060606060606
2462 16:52:26.580089 MTRR: Fixed MSR 0x259 0x0000000000000000
2463 16:52:26.583626 MTRR: Fixed MSR 0x268 0x0606060606060606
2464 16:52:26.590225 MTRR: Fixed MSR 0x269 0x0606060606060606
2465 16:52:26.593054 MTRR: Fixed MSR 0x26a 0x0606060606060606
2466 16:52:26.596345 MTRR: Fixed MSR 0x26b 0x0606060606060606
2467 16:52:26.599913 MTRR: Fixed MSR 0x26c 0x0606060606060606
2468 16:52:26.606371 MTRR: Fixed MSR 0x26d 0x0606060606060606
2469 16:52:26.609807 MTRR: Fixed MSR 0x26e 0x0606060606060606
2470 16:52:26.613084 MTRR: Fixed MSR 0x26f 0x0606060606060606
2471 16:52:26.616826 call enable_fixed_mtrr()
2472 16:52:26.620114 CPU physical address size: 39 bits
2473 16:52:26.626942 MTRR: default type WB/UC MTRR counts: 6/6.
2474 16:52:26.629998 MTRR: UC selected as default type.
2475 16:52:26.636670 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2476 16:52:26.640033 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2477 16:52:26.647085 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2478 16:52:26.653554 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2479 16:52:26.659886 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2480 16:52:26.666770 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2481 16:52:26.673361 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 16:52:26.676802 MTRR: Fixed MSR 0x258 0x0606060606060606
2483 16:52:26.680312 MTRR: Fixed MSR 0x259 0x0000000000000000
2484 16:52:26.683389 MTRR: Fixed MSR 0x268 0x0606060606060606
2485 16:52:26.689834 MTRR: Fixed MSR 0x269 0x0606060606060606
2486 16:52:26.693499 MTRR: Fixed MSR 0x26a 0x0606060606060606
2487 16:52:26.696381 MTRR: Fixed MSR 0x26b 0x0606060606060606
2488 16:52:26.700004 MTRR: Fixed MSR 0x26c 0x0606060606060606
2489 16:52:26.706423 MTRR: Fixed MSR 0x26d 0x0606060606060606
2490 16:52:26.709710 MTRR: Fixed MSR 0x26e 0x0606060606060606
2491 16:52:26.712830 MTRR: Fixed MSR 0x26f 0x0606060606060606
2492 16:52:26.716477 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 16:52:26.722833 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 16:52:26.726308 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 16:52:26.729629 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 16:52:26.732699 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 16:52:26.736474 MTRR: Fixed MSR 0x259 0x0000000000000000
2498 16:52:26.743119 MTRR: Fixed MSR 0x268 0x0606060606060606
2499 16:52:26.746338 MTRR: Fixed MSR 0x269 0x0606060606060606
2500 16:52:26.749321 MTRR: Fixed MSR 0x26a 0x0606060606060606
2501 16:52:26.752754 MTRR: Fixed MSR 0x26b 0x0606060606060606
2502 16:52:26.759229 MTRR: Fixed MSR 0x26c 0x0606060606060606
2503 16:52:26.762437 MTRR: Fixed MSR 0x26d 0x0606060606060606
2504 16:52:26.766011 MTRR: Fixed MSR 0x26e 0x0606060606060606
2505 16:52:26.769156 MTRR: Fixed MSR 0x26f 0x0606060606060606
2506 16:52:26.775764 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 16:52:26.779195 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 16:52:26.782149 call enable_fixed_mtrr()
2509 16:52:26.785409 MTRR: Fixed MSR 0x250 0x0606060606060606
2510 16:52:26.788883 MTRR: Fixed MSR 0x258 0x0606060606060606
2511 16:52:26.792352 MTRR: Fixed MSR 0x250 0x0606060606060606
2512 16:52:26.798776 MTRR: Fixed MSR 0x259 0x0000000000000000
2513 16:52:26.802102 MTRR: Fixed MSR 0x268 0x0606060606060606
2514 16:52:26.805508 MTRR: Fixed MSR 0x269 0x0606060606060606
2515 16:52:26.808579 MTRR: Fixed MSR 0x26a 0x0606060606060606
2516 16:52:26.815426 MTRR: Fixed MSR 0x26b 0x0606060606060606
2517 16:52:26.818773 MTRR: Fixed MSR 0x26c 0x0606060606060606
2518 16:52:26.822125 MTRR: Fixed MSR 0x26d 0x0606060606060606
2519 16:52:26.825353 MTRR: Fixed MSR 0x26e 0x0606060606060606
2520 16:52:26.828461 MTRR: Fixed MSR 0x26f 0x0606060606060606
2521 16:52:26.835181 MTRR: Fixed MSR 0x258 0x0606060606060606
2522 16:52:26.835265 call enable_fixed_mtrr()
2523 16:52:26.841806 MTRR: Fixed MSR 0x259 0x0000000000000000
2524 16:52:26.845919 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 16:52:26.848316 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 16:52:26.851563 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 16:52:26.858430 MTRR: Fixed MSR 0x269 0x0606060606060606
2528 16:52:26.862000 MTRR: Fixed MSR 0x26a 0x0606060606060606
2529 16:52:26.864936 MTRR: Fixed MSR 0x26b 0x0606060606060606
2530 16:52:26.868494 MTRR: Fixed MSR 0x26c 0x0606060606060606
2531 16:52:26.875141 MTRR: Fixed MSR 0x26d 0x0606060606060606
2532 16:52:26.878468 MTRR: Fixed MSR 0x26e 0x0606060606060606
2533 16:52:26.881574 MTRR: Fixed MSR 0x26f 0x0606060606060606
2534 16:52:26.885226 CPU physical address size: 39 bits
2535 16:52:26.888681 MTRR: Fixed MSR 0x259 0x0000000000000000
2536 16:52:26.891703 call enable_fixed_mtrr()
2537 16:52:26.895085 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 16:52:26.898469 call enable_fixed_mtrr()
2539 16:52:26.901380 MTRR: Fixed MSR 0x268 0x0606060606060606
2540 16:52:26.908412 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 16:52:26.911441 CPU physical address size: 39 bits
2542 16:52:26.914886 MTRR: Fixed MSR 0x259 0x0000000000000000
2543 16:52:26.918337 CPU physical address size: 39 bits
2544 16:52:26.921432 MTRR: Fixed MSR 0x268 0x0606060606060606
2545 16:52:26.925002 CPU physical address size: 39 bits
2546 16:52:26.931688 MTRR: Fixed MSR 0x26a 0x0606060606060606
2547 16:52:26.934701 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 16:52:26.938239 MTRR: Fixed MSR 0x26c 0x0606060606060606
2549 16:52:26.941276 MTRR: Fixed MSR 0x26d 0x0606060606060606
2550 16:52:26.948119 MTRR: Fixed MSR 0x26e 0x0606060606060606
2551 16:52:26.951521 MTRR: Fixed MSR 0x26f 0x0606060606060606
2552 16:52:26.954580 MTRR: Fixed MSR 0x269 0x0606060606060606
2553 16:52:26.958348 call enable_fixed_mtrr()
2554 16:52:26.961571 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 16:52:26.964947 CPU physical address size: 39 bits
2556 16:52:26.968057 MTRR: Fixed MSR 0x26a 0x0606060606060606
2557 16:52:26.974630 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 16:52:26.978061 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 16:52:26.981478 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 16:52:26.984681 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 16:52:26.991218 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 16:52:26.994556 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 16:52:26.998285 MTRR: Fixed MSR 0x26b 0x0606060606060606
2564 16:52:27.001028 call enable_fixed_mtrr()
2565 16:52:27.004652 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 16:52:27.008132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 16:52:27.011224 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 16:52:27.017792 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 16:52:27.021062 CPU physical address size: 39 bits
2570 16:52:27.024686 call enable_fixed_mtrr()
2571 16:52:27.027695 CPU physical address size: 39 bits
2572 16:52:27.027831
2573 16:52:27.027936 MTRR check
2574 16:52:27.031255 Fixed MTRRs : Enabled
2575 16:52:27.034709 Variable MTRRs: Enabled
2576 16:52:27.034860
2577 16:52:27.041012 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2578 16:52:27.044213 Checking cr50 for pending updates
2579 16:52:27.055827 Reading cr50 TPM mode
2580 16:52:27.070640 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2581 16:52:27.080842 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2582 16:52:27.084165 Checking segment from ROM address 0xf96cbe6c
2583 16:52:27.087629 Checking segment from ROM address 0xf96cbe88
2584 16:52:27.094154 Loading segment from ROM address 0xf96cbe6c
2585 16:52:27.094598 code (compression=1)
2586 16:52:27.104247 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2587 16:52:27.110705 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2588 16:52:27.114141 using LZMA
2589 16:52:27.137081 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2590 16:52:27.143552 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2591 16:52:27.151494 Loading segment from ROM address 0xf96cbe88
2592 16:52:27.155205 Entry Point 0x30000000
2593 16:52:27.155627 Loaded segments
2594 16:52:27.162070 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2595 16:52:27.168579 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2596 16:52:27.171543 Finalizing chipset.
2597 16:52:27.172080 apm_control: Finalizing SMM.
2598 16:52:27.175101 APMC done.
2599 16:52:27.178605 HECI: CSE device 16.1 is disabled
2600 16:52:27.181534 HECI: CSE device 16.2 is disabled
2601 16:52:27.184740 HECI: CSE device 16.3 is disabled
2602 16:52:27.188000 HECI: CSE device 16.4 is disabled
2603 16:52:27.191690 HECI: CSE device 16.5 is disabled
2604 16:52:27.195082 HECI: Sending End-of-Post
2605 16:52:27.203515 CSE: EOP requested action: continue boot
2606 16:52:27.206349 CSE EOP successful, continuing boot
2607 16:52:27.212908 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2608 16:52:27.216500 mp_park_aps done after 0 msecs.
2609 16:52:27.219996 Jumping to boot code at 0x30000000(0x76891000)
2610 16:52:27.229568 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2611 16:52:27.234310
2612 16:52:27.234845
2613 16:52:27.235181
2614 16:52:27.237022 Starting depthcharge on Volmar...
2615 16:52:27.237446
2616 16:52:27.238617 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2617 16:52:27.239113 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2618 16:52:27.239510 Setting prompt string to ['brya:']
2619 16:52:27.239889 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2620 16:52:27.243890 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2621 16:52:27.244334
2622 16:52:27.250350 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2623 16:52:27.250779
2624 16:52:27.257266 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2625 16:52:27.257692
2626 16:52:27.260679 configure_storage: Failed to remap 1C:2
2627 16:52:27.261225
2628 16:52:27.261614 Wipe memory regions:
2629 16:52:27.263948
2630 16:52:27.267157 [0x00000000001000, 0x000000000a0000)
2631 16:52:27.267680
2632 16:52:27.270412 [0x00000000100000, 0x00000030000000)
2633 16:52:27.379680
2634 16:52:27.382770 [0x00000032668e60, 0x00000076857000)
2635 16:52:27.534740
2636 16:52:27.537439 [0x00000100000000, 0x0000027fc00000)
2637 16:52:28.393133
2638 16:52:28.396385 ec_init: CrosEC protocol v3 supported (256, 256)
2639 16:52:28.999609
2640 16:52:29.000118 R8152: Initializing
2641 16:52:29.000458
2642 16:52:29.003108 Version 9 (ocp_data = 6010)
2643 16:52:29.003533
2644 16:52:29.006457 R8152: Done initializing
2645 16:52:29.006882
2646 16:52:29.009731 Adding net device
2647 16:52:29.311931
2648 16:52:29.315118 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2649 16:52:29.315550
2650 16:52:29.315880
2651 16:52:29.316190
2652 16:52:29.316932 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2654 16:52:29.418137 brya: tftpboot 192.168.201.1 12704394/tftp-deploy-z7hzfi68/kernel/bzImage 12704394/tftp-deploy-z7hzfi68/kernel/cmdline 12704394/tftp-deploy-z7hzfi68/ramdisk/ramdisk.cpio.gz
2655 16:52:29.418948 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2656 16:52:29.419417 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2657 16:52:29.423933 tftpboot 192.168.201.1 12704394/tftp-deploy-z7hzfi68/kernel/bzImploy-z7hzfi68/kernel/cmdline 12704394/tftp-deploy-z7hzfi68/ramdisk/ramdisk.cpio.gz
2658 16:52:29.424258
2659 16:52:29.424495 Waiting for link
2660 16:52:29.627912
2661 16:52:29.628449 done.
2662 16:52:29.628872
2663 16:52:29.629301 MAC: 00:e0:4c:68:05:c6
2664 16:52:29.629633
2665 16:52:29.631314 Sending DHCP discover... done.
2666 16:52:29.631882
2667 16:52:29.634411 Waiting for reply... done.
2668 16:52:29.634921
2669 16:52:29.639127 Sending DHCP request... done.
2670 16:52:29.639661
2671 16:52:29.644420 Waiting for reply... done.
2672 16:52:29.644850
2673 16:52:29.645294 My ip is 192.168.201.17
2674 16:52:29.645676
2675 16:52:29.647712 The DHCP server ip is 192.168.201.1
2676 16:52:29.651281
2677 16:52:29.654414 TFTP server IP predefined by user: 192.168.201.1
2678 16:52:29.654923
2679 16:52:29.661009 Bootfile predefined by user: 12704394/tftp-deploy-z7hzfi68/kernel/bzImage
2680 16:52:29.661441
2681 16:52:29.664460 Sending tftp read request... done.
2682 16:52:29.664883
2683 16:52:29.672809 Waiting for the transfer...
2684 16:52:29.673332
2685 16:52:30.007219 00000000 ################################################################
2686 16:52:30.007770
2687 16:52:30.264379 00080000 ################################################################
2688 16:52:30.264519
2689 16:52:30.520631 00100000 ################################################################
2690 16:52:30.520761
2691 16:52:30.773588 00180000 ################################################################
2692 16:52:30.773746
2693 16:52:31.026806 00200000 ################################################################
2694 16:52:31.026967
2695 16:52:31.280196 00280000 ################################################################
2696 16:52:31.280340
2697 16:52:31.531595 00300000 ################################################################
2698 16:52:31.531733
2699 16:52:31.783291 00380000 ################################################################
2700 16:52:31.783433
2701 16:52:32.033607 00400000 ################################################################
2702 16:52:32.033744
2703 16:52:32.283274 00480000 ################################################################
2704 16:52:32.283438
2705 16:52:32.535172 00500000 ################################################################
2706 16:52:32.535326
2707 16:52:32.785319 00580000 ################################################################
2708 16:52:32.785459
2709 16:52:33.033254 00600000 ################################################################
2710 16:52:33.033387
2711 16:52:33.294025 00680000 ################################################################
2712 16:52:33.294161
2713 16:52:33.548253 00700000 ################################################################
2714 16:52:33.548379
2715 16:52:33.798661 00780000 ################################################################
2716 16:52:33.798824
2717 16:52:34.048953 00800000 ################################################################
2718 16:52:34.049163
2719 16:52:34.300705 00880000 ################################################################
2720 16:52:34.300877
2721 16:52:34.550288 00900000 ################################################################
2722 16:52:34.550454
2723 16:52:34.807424 00980000 ################################################################
2724 16:52:34.807607
2725 16:52:35.057443 00a00000 ################################################################
2726 16:52:35.057607
2727 16:52:35.308053 00a80000 ################################################################
2728 16:52:35.308225
2729 16:52:35.557999 00b00000 ################################################################
2730 16:52:35.558164
2731 16:52:35.809006 00b80000 ################################################################
2732 16:52:35.809183
2733 16:52:36.058786 00c00000 ################################################################
2734 16:52:36.058951
2735 16:52:36.307685 00c80000 ################################################################
2736 16:52:36.307856
2737 16:52:36.542752 00d00000 ############################################################# done.
2738 16:52:36.542908
2739 16:52:36.546287 The bootfile was 14127296 bytes long.
2740 16:52:36.546373
2741 16:52:36.549635 Sending tftp read request... done.
2742 16:52:36.552697
2743 16:52:36.552804 Waiting for the transfer...
2744 16:52:36.552903
2745 16:52:36.809847 00000000 ################################################################
2746 16:52:36.810007
2747 16:52:37.060086 00080000 ################################################################
2748 16:52:37.060256
2749 16:52:37.310950 00100000 ################################################################
2750 16:52:37.311111
2751 16:52:37.561478 00180000 ################################################################
2752 16:52:37.561638
2753 16:52:37.816493 00200000 ################################################################
2754 16:52:37.816655
2755 16:52:38.067608 00280000 ################################################################
2756 16:52:38.067764
2757 16:52:38.320887 00300000 ################################################################
2758 16:52:38.321051
2759 16:52:38.569512 00380000 ################################################################
2760 16:52:38.569663
2761 16:52:38.819625 00400000 ################################################################
2762 16:52:38.819779
2763 16:52:39.070206 00480000 ################################################################
2764 16:52:39.070363
2765 16:52:39.320770 00500000 ################################################################
2766 16:52:39.320923
2767 16:52:39.588330 00580000 ################################################################
2768 16:52:39.588487
2769 16:52:39.845112 00600000 ################################################################
2770 16:52:39.845249
2771 16:52:40.124033 00680000 ################################################################
2772 16:52:40.124165
2773 16:52:40.408540 00700000 ################################################################
2774 16:52:40.408669
2775 16:52:40.660160 00780000 ################################################################
2776 16:52:40.660296
2777 16:52:40.919337 00800000 ################################################################
2778 16:52:40.919500
2779 16:52:41.094154 00880000 ############################################ done.
2780 16:52:41.094273
2781 16:52:41.097248 Sending tftp read request... done.
2782 16:52:41.097338
2783 16:52:41.100723 Waiting for the transfer...
2784 16:52:41.100814
2785 16:52:41.100883 00000000 # done.
2786 16:52:41.100950
2787 16:52:41.111387 Command line loaded dynamically from TFTP file: 12704394/tftp-deploy-z7hzfi68/kernel/cmdline
2788 16:52:41.111958
2789 16:52:41.127692 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2790 16:52:41.133261
2791 16:52:41.136089 Shutting down all USB controllers.
2792 16:52:41.136555
2793 16:52:41.136920 Removing current net device
2794 16:52:41.137314
2795 16:52:41.139483 Finalizing coreboot
2796 16:52:41.140114
2797 16:52:41.145872 Exiting depthcharge with code 4 at timestamp: 24162693
2798 16:52:41.146339
2799 16:52:41.146703
2800 16:52:41.147041 Starting kernel ...
2801 16:52:41.147363
2802 16:52:41.147678
2803 16:52:41.149110 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2804 16:52:41.149630 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2805 16:52:41.150033 Setting prompt string to ['Linux version [0-9]']
2806 16:52:41.150405 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2807 16:52:41.150782 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2809 16:57:08.150585 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2811 16:57:08.151675 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2813 16:57:08.152520 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2816 16:57:08.153926 end: 2 depthcharge-action (duration 00:05:00) [common]
2818 16:57:08.155102 Cleaning after the job
2819 16:57:08.155558 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/ramdisk
2820 16:57:08.157138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/kernel
2821 16:57:08.159275 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12704394/tftp-deploy-z7hzfi68/modules
2822 16:57:08.159899 start: 5.1 power-off (timeout 00:00:30) [common]
2823 16:57:08.160059 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2824 16:57:08.236957 >> Command sent successfully.
2825 16:57:08.242276 Returned 0 in 0 seconds
2826 16:57:08.343431 end: 5.1 power-off (duration 00:00:00) [common]
2828 16:57:08.345080 start: 5.2 read-feedback (timeout 00:10:00) [common]
2829 16:57:08.346378 Listened to connection for namespace 'common' for up to 1s
2831 16:57:08.347725 Listened to connection for namespace 'common' for up to 1s
2832 16:57:09.347011 Finalising connection for namespace 'common'
2833 16:57:09.347627 Disconnecting from shell: Finalise
2834 16:57:09.347994
2835 16:57:09.449039 end: 5.2 read-feedback (duration 00:00:01) [common]
2836 16:57:09.449666 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12704394
2837 16:57:09.470854 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12704394
2838 16:57:09.471001 JobError: Your job cannot terminate cleanly.