Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 10:56:32.242397 lava-dispatcher, installed at version: 2024.03
2 10:56:32.242568 start: 0 validate
3 10:56:32.242668 Start time: 2024-06-05 10:56:32.242661+00:00 (UTC)
4 10:56:32.242774 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:56:32.242894 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 10:56:32.496725 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:56:32.496892 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.218-cip48%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:56:32.754822 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:56:32.754998 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:56:33.020999 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:56:33.021169 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.218-cip48%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 10:56:33.283507 validate duration: 1.04
14 10:56:33.283763 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:56:33.283887 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:56:33.283968 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:56:33.284105 Not decompressing ramdisk as can be used compressed.
18 10:56:33.284187 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 10:56:33.284250 saving as /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/ramdisk/initrd.cpio.gz
20 10:56:33.284308 total size: 6137763 (5 MB)
21 10:56:33.285273 progress 0 % (0 MB)
22 10:56:33.286635 progress 5 % (0 MB)
23 10:56:33.287758 progress 10 % (0 MB)
24 10:56:33.288933 progress 15 % (0 MB)
25 10:56:33.289981 progress 20 % (1 MB)
26 10:56:33.291047 progress 25 % (1 MB)
27 10:56:33.292233 progress 30 % (1 MB)
28 10:56:33.293294 progress 35 % (2 MB)
29 10:56:33.294367 progress 40 % (2 MB)
30 10:56:33.295589 progress 45 % (2 MB)
31 10:56:33.296688 progress 50 % (2 MB)
32 10:56:33.297886 progress 55 % (3 MB)
33 10:56:33.298973 progress 60 % (3 MB)
34 10:56:33.300023 progress 65 % (3 MB)
35 10:56:33.301190 progress 70 % (4 MB)
36 10:56:33.302214 progress 75 % (4 MB)
37 10:56:33.303258 progress 80 % (4 MB)
38 10:56:33.304393 progress 85 % (5 MB)
39 10:56:33.305421 progress 90 % (5 MB)
40 10:56:33.306489 progress 95 % (5 MB)
41 10:56:33.307645 progress 100 % (5 MB)
42 10:56:33.307756 5 MB downloaded in 0.02 s (249.72 MB/s)
43 10:56:33.307888 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:56:33.308074 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:56:33.308140 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:56:33.308199 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:56:33.308304 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.218-cip48/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 10:56:33.308356 saving as /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/kernel/bzImage
50 10:56:33.308398 total size: 19685728 (18 MB)
51 10:56:33.308441 No compression specified
52 10:56:33.309350 progress 0 % (0 MB)
53 10:56:33.312793 progress 5 % (0 MB)
54 10:56:33.316163 progress 10 % (1 MB)
55 10:56:33.319580 progress 15 % (2 MB)
56 10:56:33.322952 progress 20 % (3 MB)
57 10:56:33.326347 progress 25 % (4 MB)
58 10:56:33.329698 progress 30 % (5 MB)
59 10:56:33.333062 progress 35 % (6 MB)
60 10:56:33.336506 progress 40 % (7 MB)
61 10:56:33.339951 progress 45 % (8 MB)
62 10:56:33.343276 progress 50 % (9 MB)
63 10:56:33.346663 progress 55 % (10 MB)
64 10:56:33.350043 progress 60 % (11 MB)
65 10:56:33.353368 progress 65 % (12 MB)
66 10:56:33.356737 progress 70 % (13 MB)
67 10:56:33.360088 progress 75 % (14 MB)
68 10:56:33.363491 progress 80 % (15 MB)
69 10:56:33.366814 progress 85 % (15 MB)
70 10:56:33.370156 progress 90 % (16 MB)
71 10:56:33.373465 progress 95 % (17 MB)
72 10:56:33.376764 progress 100 % (18 MB)
73 10:56:33.376919 18 MB downloaded in 0.07 s (274.00 MB/s)
74 10:56:33.377045 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:56:33.377219 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:56:33.377284 start: 1.3 download-retry (timeout 00:10:00) [common]
78 10:56:33.377343 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 10:56:33.377452 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 10:56:33.377504 saving as /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/nfsrootfs/full.rootfs.tar
81 10:56:33.377546 total size: 58462052 (55 MB)
82 10:56:33.377588 Using unxz to decompress xz
83 10:56:33.378740 progress 0 % (0 MB)
84 10:56:33.509597 progress 5 % (2 MB)
85 10:56:33.645390 progress 10 % (5 MB)
86 10:56:33.779910 progress 15 % (8 MB)
87 10:56:33.898254 progress 20 % (11 MB)
88 10:56:34.032566 progress 25 % (13 MB)
89 10:56:34.165053 progress 30 % (16 MB)
90 10:56:34.272023 progress 35 % (19 MB)
91 10:56:34.329579 progress 40 % (22 MB)
92 10:56:34.456660 progress 45 % (25 MB)
93 10:56:34.593832 progress 50 % (27 MB)
94 10:56:34.719662 progress 55 % (30 MB)
95 10:56:34.852573 progress 60 % (33 MB)
96 10:56:34.987401 progress 65 % (36 MB)
97 10:56:35.117214 progress 70 % (39 MB)
98 10:56:35.260499 progress 75 % (41 MB)
99 10:56:35.379812 progress 80 % (44 MB)
100 10:56:35.497521 progress 85 % (47 MB)
101 10:56:35.636523 progress 90 % (50 MB)
102 10:56:35.777864 progress 95 % (52 MB)
103 10:56:35.920307 progress 100 % (55 MB)
104 10:56:35.924318 55 MB downloaded in 2.55 s (21.89 MB/s)
105 10:56:35.924511 end: 1.3.1 http-download (duration 00:00:03) [common]
107 10:56:35.924726 end: 1.3 download-retry (duration 00:00:03) [common]
108 10:56:35.924808 start: 1.4 download-retry (timeout 00:09:57) [common]
109 10:56:35.924869 start: 1.4.1 http-download (timeout 00:09:57) [common]
110 10:56:35.924991 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.218-cip48/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 10:56:35.925045 saving as /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/modules/modules.tar
112 10:56:35.925088 total size: 1620624 (1 MB)
113 10:56:35.925133 Using unxz to decompress xz
114 10:56:35.926277 progress 2 % (0 MB)
115 10:56:35.928298 progress 8 % (0 MB)
116 10:56:35.933276 progress 14 % (0 MB)
117 10:56:35.938256 progress 20 % (0 MB)
118 10:56:35.943088 progress 26 % (0 MB)
119 10:56:35.947651 progress 32 % (0 MB)
120 10:56:35.952881 progress 38 % (0 MB)
121 10:56:35.957583 progress 44 % (0 MB)
122 10:56:35.962261 progress 50 % (0 MB)
123 10:56:35.967556 progress 56 % (0 MB)
124 10:56:35.972557 progress 62 % (0 MB)
125 10:56:35.976678 progress 68 % (1 MB)
126 10:56:35.981631 progress 74 % (1 MB)
127 10:56:35.986657 progress 80 % (1 MB)
128 10:56:35.991647 progress 86 % (1 MB)
129 10:56:35.996389 progress 93 % (1 MB)
130 10:56:36.001305 progress 99 % (1 MB)
131 10:56:36.007172 1 MB downloaded in 0.08 s (18.83 MB/s)
132 10:56:36.007316 end: 1.4.1 http-download (duration 00:00:00) [common]
134 10:56:36.007509 end: 1.4 download-retry (duration 00:00:00) [common]
135 10:56:36.007591 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
136 10:56:36.007655 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
137 10:56:36.790087 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14182154/extract-nfsrootfs-v0r6p8ma
138 10:56:36.790243 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
139 10:56:36.790322 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
140 10:56:36.790465 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1
141 10:56:36.790567 makedir: /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin
142 10:56:36.790661 makedir: /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/tests
143 10:56:36.790737 makedir: /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/results
144 10:56:36.790810 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-add-keys
145 10:56:36.790920 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-add-sources
146 10:56:36.791015 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-background-process-start
147 10:56:36.791107 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-background-process-stop
148 10:56:36.791214 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-common-functions
149 10:56:36.791310 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-echo-ipv4
150 10:56:36.791401 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-install-packages
151 10:56:36.791489 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-installed-packages
152 10:56:36.791576 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-os-build
153 10:56:36.791664 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-probe-channel
154 10:56:36.791752 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-probe-ip
155 10:56:36.791842 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-target-ip
156 10:56:36.791933 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-target-mac
157 10:56:36.792030 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-target-storage
158 10:56:36.792119 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-case
159 10:56:36.792205 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-event
160 10:56:36.792290 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-feedback
161 10:56:36.792376 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-raise
162 10:56:36.792461 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-reference
163 10:56:36.792550 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-runner
164 10:56:36.792636 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-set
165 10:56:36.792721 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-test-shell
166 10:56:36.792807 Updating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-install-packages (oe)
167 10:56:36.792920 Updating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/bin/lava-installed-packages (oe)
168 10:56:36.793014 Creating /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/environment
169 10:56:36.793087 LAVA metadata
170 10:56:36.793144 - LAVA_JOB_ID=14182154
171 10:56:36.793190 - LAVA_DISPATCHER_IP=192.168.201.1
172 10:56:36.793268 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
173 10:56:36.793320 skipped lava-vland-overlay
174 10:56:36.793376 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
175 10:56:36.793434 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
176 10:56:36.793477 skipped lava-multinode-overlay
177 10:56:36.793530 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
178 10:56:36.793586 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
179 10:56:36.793637 Loading test definitions
180 10:56:36.793699 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
181 10:56:36.793750 Using /lava-14182154 at stage 0
182 10:56:36.793987 uuid=14182154_1.5.2.3.1 testdef=None
183 10:56:36.794054 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
184 10:56:36.794114 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
185 10:56:36.794460 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
187 10:56:36.794621 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
188 10:56:36.795055 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
190 10:56:36.795238 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
191 10:56:36.795679 runner path: /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/0/tests/0_wifi-basic test_uuid 14182154_1.5.2.3.1
192 10:56:36.795794 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 10:56:36.795943 Creating lava-test-runner.conf files
195 10:56:36.795985 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14182154/lava-overlay-l414t_l1/lava-14182154/0 for stage 0
196 10:56:36.796046 - 0_wifi-basic
197 10:56:36.796116 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
198 10:56:36.796177 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
199 10:56:36.800459 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
200 10:56:36.800543 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
201 10:56:36.800609 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 10:56:36.800671 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
203 10:56:36.800730 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
204 10:56:36.899293 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 10:56:36.899417 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
206 10:56:36.899487 extracting modules file /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14182154/extract-nfsrootfs-v0r6p8ma
207 10:56:36.926938 extracting modules file /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14182154/extract-overlay-ramdisk-dg7uyntq/ramdisk
208 10:56:36.955077 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 10:56:36.955201 start: 1.5.5 apply-overlay-tftp (timeout 00:09:56) [common]
210 10:56:36.955271 [common] Applying overlay to NFS
211 10:56:36.955321 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14182154/compress-overlay-zeg8446k/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14182154/extract-nfsrootfs-v0r6p8ma
212 10:56:36.959610 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
213 10:56:36.959695 start: 1.5.6 configure-preseed-file (timeout 00:09:56) [common]
214 10:56:36.959763 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 10:56:36.959825 start: 1.5.7 compress-ramdisk (timeout 00:09:56) [common]
216 10:56:36.959877 Building ramdisk /var/lib/lava/dispatcher/tmp/14182154/extract-overlay-ramdisk-dg7uyntq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14182154/extract-overlay-ramdisk-dg7uyntq/ramdisk
217 10:56:37.009643 >> 48014 blocks
218 10:56:37.793109 rename /var/lib/lava/dispatcher/tmp/14182154/extract-overlay-ramdisk-dg7uyntq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/ramdisk/ramdisk.cpio.gz
219 10:56:37.793272 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 10:56:37.793361 start: 1.5.8 prepare-kernel (timeout 00:09:55) [common]
221 10:56:37.793435 start: 1.5.8.1 prepare-fit (timeout 00:09:55) [common]
222 10:56:37.793502 No mkimage arch provided, not using FIT.
223 10:56:37.793570 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 10:56:37.793634 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 10:56:37.793714 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
226 10:56:37.793776 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:55) [common]
227 10:56:37.793826 No LXC device requested
228 10:56:37.793880 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 10:56:37.793939 start: 1.7 deploy-device-env (timeout 00:09:55) [common]
230 10:56:37.793994 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 10:56:37.794040 Checking files for TFTP limit of 4294967296 bytes.
232 10:56:37.794276 end: 1 tftp-deploy (duration 00:00:05) [common]
233 10:56:37.794347 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 10:56:37.794408 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 10:56:37.794487 substitutions:
236 10:56:37.794537 - {DTB}: None
237 10:56:37.794581 - {INITRD}: 14182154/tftp-deploy-v_u6r_hr/ramdisk/ramdisk.cpio.gz
238 10:56:37.794623 - {KERNEL}: 14182154/tftp-deploy-v_u6r_hr/kernel/bzImage
239 10:56:37.794664 - {LAVA_MAC}: None
240 10:56:37.794704 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14182154/extract-nfsrootfs-v0r6p8ma
241 10:56:37.794746 - {NFS_SERVER_IP}: 192.168.201.1
242 10:56:37.794787 - {PRESEED_CONFIG}: None
243 10:56:37.794835 - {PRESEED_LOCAL}: None
244 10:56:37.794890 - {RAMDISK}: 14182154/tftp-deploy-v_u6r_hr/ramdisk/ramdisk.cpio.gz
245 10:56:37.794930 - {ROOT_PART}: None
246 10:56:37.794969 - {ROOT}: None
247 10:56:37.795008 - {SERVER_IP}: 192.168.201.1
248 10:56:37.795047 - {TEE}: None
249 10:56:37.795092 Parsed boot commands:
250 10:56:37.795129 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 10:56:37.795251 Parsed boot commands: tftpboot 192.168.201.1 14182154/tftp-deploy-v_u6r_hr/kernel/bzImage 14182154/tftp-deploy-v_u6r_hr/kernel/cmdline 14182154/tftp-deploy-v_u6r_hr/ramdisk/ramdisk.cpio.gz
252 10:56:37.795317 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 10:56:37.795374 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 10:56:37.795432 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 10:56:37.795489 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 10:56:37.795536 Not connected, no need to disconnect.
257 10:56:37.795587 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 10:56:37.795640 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 10:56:37.795683 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
260 10:56:37.798759 Setting prompt string to ['lava-test: # ']
261 10:56:37.799003 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 10:56:37.799087 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 10:56:37.799166 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 10:56:37.799259 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 10:56:37.799391 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-3']
266 10:56:51.260548 Returned 0 in 13 seconds
267 10:56:51.360988 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
269 10:56:51.361360 end: 2.2.2 reset-device (duration 00:00:14) [common]
270 10:56:51.361470 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
271 10:56:51.361556 Setting prompt string to 'Starting depthcharge on Volmar...'
272 10:56:51.361645 Changing prompt to 'Starting depthcharge on Volmar...'
273 10:56:51.361704 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
274 10:56:51.362063 [Enter `^Ec?' for help]
275 10:56:51.362157
276 10:56:51.362213
277 10:56:51.362261 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
278 10:56:51.362315 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
279 10:56:51.362373 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
280 10:56:51.362428 CPU: AES supported, TXT NOT supported, VT supported
281 10:56:51.362516 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
282 10:56:51.362566 Cache size = 10 MiB
283 10:56:51.362684 MCH: device id 4609 (rev 04) is Alderlake-P
284 10:56:51.362738 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
285 10:56:51.362782 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
286 10:56:51.362831 VBOOT: Loading verstage.
287 10:56:51.362886 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 10:56:51.362942 FMAP: base = 0x0 size = 0x2000000 #areas = 37
289 10:56:51.362995 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 10:56:51.363047 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
291 10:56:51.363108 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
292 10:56:51.363166
293 10:56:51.363232
294 10:56:51.363283 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
295 10:56:51.363329 Probing TPM I2C: I2C bus 1 version 0x3230302a
296 10:56:51.363372 DW I2C bus 1 at 0xfe022000 (400 KHz)
297 10:56:51.363415 I2C TX abort detected (00000001)
298 10:56:51.363456 cr50_i2c_read: Address write failed
299 10:56:51.363498 .done! DID_VID 0x00281ae0
300 10:56:51.363552 TPM ready after 0 ms
301 10:56:51.363599 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
302 10:56:51.363641 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
303 10:56:51.363684 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 10:56:51.363727 tlcl_send_startup: Startup return code is 0
305 10:56:51.363769 TPM: setup succeeded
306 10:56:51.363811 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
307 10:56:51.363856 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 10:56:51.363913 Chrome EC: UHEPI supported
309 10:56:51.363969 Reading cr50 boot mode
310 10:56:51.364024 Cr50 says boot_mode is VERIFIED_RW(0x00).
311 10:56:51.364078 Phase 1
312 10:56:51.364121 FMAP: area GBB found @ 1805000 (458752 bytes)
313 10:56:51.364164 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 10:56:51.364206 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 10:56:51.364247 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
316 10:56:51.364288 VB2:vb2_check_recovery() Recovery was requested manually
317 10:56:51.364328 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
318 10:56:51.364372 Recovery requested (1009000e)
319 10:56:51.364425 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
320 10:56:51.364470 tlcl_extend: response is 0
321 10:56:51.364511 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
322 10:56:51.364552 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
323 10:56:51.364594 tlcl_extend: response is 0
324 10:56:51.364635 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
325 10:56:51.364676 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 10:56:51.364727 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
327 10:56:51.364782 BS: verstage times (exec / console): total (unknown) / 156 ms
328 10:56:51.364838
329 10:56:51.364892
330 10:56:51.364940 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
331 10:56:51.364983 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 10:56:51.365025 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 10:56:51.365068 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
334 10:56:51.365109 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 10:56:51.365151 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
336 10:56:51.365192 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
337 10:56:51.365248 TCO_STS: 0000 0000
338 10:56:51.365293 GEN_PMCON: d0015038 00002200
339 10:56:51.365336 GBLRST_CAUSE: 00000000 00000000
340 10:56:51.365378 HPR_CAUSE0: 00000000
341 10:56:51.365420 prev_sleep_state 5
342 10:56:51.365463 Abort disabling TXT, as CPU is not TXT capable.
343 10:56:51.365504 cse_lite: Skip switching to RW in the recovery path
344 10:56:51.365548 Boot Count incremented to 3225
345 10:56:51.365605 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
346 10:56:51.365661 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
347 10:56:51.365718 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
348 10:56:51.365770 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
349 10:56:51.365815 Chrome EC: UHEPI supported
350 10:56:51.365856 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
351 10:56:51.365898 Probing TPM I2C: done! DID_VID 0x00281ae0
352 10:56:51.365939 Locality already claimed
353 10:56:51.365979 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
354 10:56:51.366020 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
355 10:56:51.366069 MRC: Hash idx 0x100b comparison successful.
356 10:56:51.366117 MRC cache found, size f6c8
357 10:56:51.366160 bootmode is set to: 2
358 10:56:51.366201 EC returned error result code 3
359 10:56:51.366242 FW_CONFIG value from CBI is 0x131
360 10:56:51.366283 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
361 10:56:51.366325 SPD index = 0
362 10:56:51.366367 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
363 10:56:51.366421 SPD: module type is LPDDR4X
364 10:56:51.366473 SPD: module part number is K4U6E3S4AB-MGCL
365 10:56:51.366531 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
366 10:56:51.366779 SPD: device width 16 bits, bus width 16 bits
367 10:56:51.366832 SPD: module size is 1024 MB (per channel)
368 10:56:51.366876 CBMEM:
369 10:56:51.366922 IMD: root @ 0x76fff000 254 entries.
370 10:56:51.366977 IMD: root @ 0x76ffec00 62 entries.
371 10:56:51.367022 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
372 10:56:51.367064 RO_VPD is uninitialized or empty.
373 10:56:51.367106 FMAP: area RW_VPD found @ f29000 (8192 bytes)
374 10:56:51.367147 External stage cache:
375 10:56:51.367197 IMD: root @ 0x7bbff000 254 entries.
376 10:56:51.367240 IMD: root @ 0x7bbfec00 62 entries.
377 10:56:51.367296 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
378 10:56:51.367353 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
379 10:56:51.367411 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
380 10:56:51.367466 MRC: 'RECOVERY_MRC_CACHE' does not need update.
381 10:56:51.367511 8 DIMMs found
382 10:56:51.367556 SMM Memory Map
383 10:56:51.367598 SMRAM : 0x7b800000 0x800000
384 10:56:51.367640 Subregion 0: 0x7b800000 0x200000
385 10:56:51.367681 Subregion 1: 0x7ba00000 0x200000
386 10:56:51.367723 Subregion 2: 0x7bc00000 0x400000
387 10:56:51.367773 top_of_ram = 0x77000000
388 10:56:51.367823 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
389 10:56:51.367867 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
390 10:56:51.367910 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
391 10:56:51.367952 MTRR Range: Start=ff000000 End=0 (Size 1000000)
392 10:56:51.367993 Normal boot
393 10:56:51.368035 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
394 10:56:51.368076 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
395 10:56:51.368141 Processing 237 relocs. Offset value of 0x74aba000
396 10:56:51.368210 BS: romstage times (exec / console): total (unknown) / 280 ms
397 10:56:51.368277
398 10:56:51.368345
399 10:56:51.368412 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
400 10:56:51.368480 Normal boot
401 10:56:51.368550 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
402 10:56:51.368615 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 10:56:51.368679 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 10:56:51.368739 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
405 10:56:51.368800 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
406 10:56:51.368855 Processing 5931 relocs. Offset value of 0x72a30000
407 10:56:51.368902 BS: postcar times (exec / console): total (unknown) / 51 ms
408 10:56:51.368945
409 10:56:51.368986
410 10:56:51.369027 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
411 10:56:51.369071 Reserving BERT start 76a1f000, size 10000
412 10:56:51.369133 Normal boot
413 10:56:51.369189 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
414 10:56:51.369251 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
415 10:56:51.369311 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
416 10:56:51.369366 FMAP: area RW_VPD found @ f29000 (8192 bytes)
417 10:56:51.369414 Google Chrome EC: version:
418 10:56:51.369455 ro: volmar_v2.0.14126-e605144e9c
419 10:56:51.369497 rw: volmar_v0.0.55-22d1557
420 10:56:51.369538 running image: 1
421 10:56:51.369580 ACPI _SWS is PM1 Index 8 GPE Index -1
422 10:56:51.369621 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
423 10:56:51.369669 EC returned error result code 3
424 10:56:51.369731 FW_CONFIG value from CBI is 0x131
425 10:56:51.369782 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
426 10:56:51.369828 PCI: 00:1c.2 disabled by fw_config
427 10:56:51.369869 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
428 10:56:51.369910 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
429 10:56:51.369951 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
430 10:56:51.369993 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
431 10:56:51.370055 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
432 10:56:51.370124 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
433 10:56:51.370192 microcode: sig=0x906a4 pf=0x80 revision=0x423
434 10:56:51.370257 microcode: Update skipped, already up-to-date
435 10:56:51.370321 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
436 10:56:51.370377 Detected 6 core, 8 thread CPU.
437 10:56:51.370434 Setting up SMI for CPU
438 10:56:51.370488 IED base = 0x7bc00000
439 10:56:51.370539 IED size = 0x00400000
440 10:56:51.370591 Will perform SMM setup.
441 10:56:51.370632 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
442 10:56:51.370672 LAPIC 0x0 in XAPIC mode.
443 10:56:51.370712 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
444 10:56:51.370751 Processing 18 relocs. Offset value of 0x00030000
445 10:56:51.370801 Attempting to start 7 APs
446 10:56:51.370844 Waiting for 10ms after sending INIT.
447 10:56:51.370884 Waiting for SIPI to complete...
448 10:56:51.370923 LAPIC 0x1 in XAPIC mode.
449 10:56:51.370979 LAPIC 0x12 in XAPIC mode.
450 10:56:51.371033 LAPIC 0x16 in XAPIC mode.
451 10:56:51.371072 LAPIC 0x14 in XAPIC mode.
452 10:56:51.371111 LAPIC 0x10 in XAPIC mode.
453 10:56:51.371150 AP: slot 4 apic_id 14, MCU rev: 0x00000423
454 10:56:51.371199 LAPIC 0x8 in XAPIC mode.
455 10:56:51.371247 AP: slot 3 apic_id 12, MCU rev: 0x00000423
456 10:56:51.371287 AP: slot 1 apic_id 16, MCU rev: 0x00000423
457 10:56:51.371327 AP: slot 2 apic_id 10, MCU rev: 0x00000423
458 10:56:51.371365 AP: slot 7 apic_id 8, MCU rev: 0x00000423
459 10:56:51.371404 LAPIC 0x9 in XAPIC mode.
460 10:56:51.371442 done.
461 10:56:51.371481 AP: slot 6 apic_id 1, MCU rev: 0x00000423
462 10:56:51.371520 Waiting for SIPI to complete...
463 10:56:51.371752 done.
464 10:56:51.371816 AP: slot 5 apic_id 9, MCU rev: 0x00000423
465 10:56:51.371858 smm_setup_relocation_handler: enter
466 10:56:51.371897 smm_setup_relocation_handler: exit
467 10:56:51.371936 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
468 10:56:51.371975 Processing 11 relocs. Offset value of 0x00038000
469 10:56:51.372014 smm_module_setup_stub: stack_top = 0x7b804000
470 10:56:51.372053 smm_module_setup_stub: per cpu stack_size = 0x800
471 10:56:51.372093 smm_module_setup_stub: runtime.start32_offset = 0x4c
472 10:56:51.372131 smm_module_setup_stub: runtime.smm_size = 0x10000
473 10:56:51.372170 SMM Module: stub loaded at 38000. Will call 0x76a53094
474 10:56:51.372209 Installing permanent SMM handler to 0x7b800000
475 10:56:51.372247 smm_load_module: total_smm_space_needed e468, available -> 200000
476 10:56:51.372285 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
477 10:56:51.372324 Processing 255 relocs. Offset value of 0x7b9f6000
478 10:56:51.372362 smm_load_module: smram_start: 0x7b800000
479 10:56:51.372403 smm_load_module: smram_end: 7ba00000
480 10:56:51.372441 smm_load_module: handler start 0x7b9f6d5f
481 10:56:51.372479 smm_load_module: handler_size 98d0
482 10:56:51.372517 smm_load_module: fxsave_area 0x7b9ff000
483 10:56:51.372554 smm_load_module: fxsave_size 1000
484 10:56:51.372593 smm_load_module: CONFIG_MSEG_SIZE 0x0
485 10:56:51.372631 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
486 10:56:51.372668 smm_load_module: handler_mod_params.smbase = 0x7b800000
487 10:56:51.372706 smm_load_module: per_cpu_save_state_size = 0x400
488 10:56:51.372744 smm_load_module: num_cpus = 0x8
489 10:56:51.372783 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
490 10:56:51.372821 smm_load_module: total_save_state_size = 0x2000
491 10:56:51.372859 smm_load_module: cpu0 entry: 7b9e6000
492 10:56:51.372896 smm_create_map: cpus allowed in one segment 30
493 10:56:51.372933 smm_create_map: min # of segments needed 1
494 10:56:51.372972 CPU 0x0
495 10:56:51.373009 smbase 7b9e6000 entry 7b9ee000
496 10:56:51.373048 ss_start 7b9f5c00 code_end 7b9ee208
497 10:56:51.373087 CPU 0x1
498 10:56:51.373125 smbase 7b9e5c00 entry 7b9edc00
499 10:56:51.373164 ss_start 7b9f5800 code_end 7b9ede08
500 10:56:51.373202 CPU 0x2
501 10:56:51.373240 smbase 7b9e5800 entry 7b9ed800
502 10:56:51.373279 ss_start 7b9f5400 code_end 7b9eda08
503 10:56:51.373318 CPU 0x3
504 10:56:51.373356 smbase 7b9e5400 entry 7b9ed400
505 10:56:51.373395 ss_start 7b9f5000 code_end 7b9ed608
506 10:56:51.373432 CPU 0x4
507 10:56:51.373469 smbase 7b9e5000 entry 7b9ed000
508 10:56:51.373507 ss_start 7b9f4c00 code_end 7b9ed208
509 10:56:51.373545 CPU 0x5
510 10:56:51.373583 smbase 7b9e4c00 entry 7b9ecc00
511 10:56:51.373624 ss_start 7b9f4800 code_end 7b9ece08
512 10:56:51.373664 CPU 0x6
513 10:56:51.373702 smbase 7b9e4800 entry 7b9ec800
514 10:56:51.373739 ss_start 7b9f4400 code_end 7b9eca08
515 10:56:51.373778 CPU 0x7
516 10:56:51.373817 smbase 7b9e4400 entry 7b9ec400
517 10:56:51.373855 ss_start 7b9f4000 code_end 7b9ec608
518 10:56:51.373894 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
519 10:56:51.373932 Processing 11 relocs. Offset value of 0x7b9ee000
520 10:56:51.373970 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
521 10:56:51.374008 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
522 10:56:51.374046 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
523 10:56:51.374084 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
524 10:56:51.374123 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
525 10:56:51.374162 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
526 10:56:51.374201 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
527 10:56:51.374240 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
528 10:56:51.374279 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
529 10:56:51.374317 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
530 10:56:51.374355 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
531 10:56:51.374393 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
532 10:56:51.374431 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
533 10:56:51.374470 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
534 10:56:51.374510 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
535 10:56:51.374549 smm_module_setup_stub: stack_top = 0x7b804000
536 10:56:51.374588 smm_module_setup_stub: per cpu stack_size = 0x800
537 10:56:51.374628 smm_module_setup_stub: runtime.start32_offset = 0x4c
538 10:56:51.374667 smm_module_setup_stub: runtime.smm_size = 0x200000
539 10:56:51.374705 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
540 10:56:51.374744 Clearing SMI status registers
541 10:56:51.374783 SMI_STS: PM1
542 10:56:51.374822 PM1_STS: PWRBTN
543 10:56:51.374861 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
544 10:56:51.374900 In relocation handler: CPU 0
545 10:56:51.374939 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
546 10:56:51.374979 Writing SMRR. base = 0x7b800006, mask=0xff800c00
547 10:56:51.375019 Relocation complete.
548 10:56:51.375059 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
549 10:56:51.375098 In relocation handler: CPU 6
550 10:56:51.375137 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
551 10:56:51.375186 Relocation complete.
552 10:56:51.375428 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
553 10:56:51.375480 In relocation handler: CPU 1
554 10:56:51.375537 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
555 10:56:51.375582 Writing SMRR. base = 0x7b800006, mask=0xff800c00
556 10:56:51.375622 Relocation complete.
557 10:56:51.375660 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
558 10:56:51.375702 In relocation handler: CPU 3
559 10:56:51.375753 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
560 10:56:51.375798 Writing SMRR. base = 0x7b800006, mask=0xff800c00
561 10:56:51.375837 Relocation complete.
562 10:56:51.375876 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
563 10:56:51.375914 In relocation handler: CPU 2
564 10:56:51.375954 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
565 10:56:51.375993 Writing SMRR. base = 0x7b800006, mask=0xff800c00
566 10:56:51.376032 Relocation complete.
567 10:56:51.376071 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
568 10:56:51.376110 In relocation handler: CPU 4
569 10:56:51.376148 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
570 10:56:51.376187 Writing SMRR. base = 0x7b800006, mask=0xff800c00
571 10:56:51.376225 Relocation complete.
572 10:56:51.376262 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
573 10:56:51.376300 In relocation handler: CPU 7
574 10:56:51.376339 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
575 10:56:51.376378 Writing SMRR. base = 0x7b800006, mask=0xff800c00
576 10:56:51.376417 Relocation complete.
577 10:56:51.376455 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
578 10:56:51.376493 In relocation handler: CPU 5
579 10:56:51.376531 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
580 10:56:51.376570 Relocation complete.
581 10:56:51.376609 Initializing CPU #0
582 10:56:51.376648 CPU: vendor Intel device 906a4
583 10:56:51.376686 CPU: family 06, model 9a, stepping 04
584 10:56:51.376724 Clearing out pending MCEs
585 10:56:51.376762 cpu: energy policy set to 7
586 10:56:51.376801 Turbo is available but hidden
587 10:56:51.376839 Turbo is available and visible
588 10:56:51.376877 microcode: Update skipped, already up-to-date
589 10:56:51.376917 CPU #0 initialized
590 10:56:51.376956 Initializing CPU #6
591 10:56:51.376995 Initializing CPU #1
592 10:56:51.377035 Initializing CPU #2
593 10:56:51.377074 Initializing CPU #3
594 10:56:51.377115 CPU: vendor Intel device 906a4
595 10:56:51.377155 CPU: family 06, model 9a, stepping 04
596 10:56:51.377193 CPU: vendor Intel device 906a4
597 10:56:51.377232 CPU: family 06, model 9a, stepping 04
598 10:56:51.377271 CPU: vendor Intel device 906a4
599 10:56:51.377310 CPU: family 06, model 9a, stepping 04
600 10:56:51.377349 Clearing out pending MCEs
601 10:56:51.377387 Clearing out pending MCEs
602 10:56:51.377425 Initializing CPU #4
603 10:56:51.377465 cpu: energy policy set to 7
604 10:56:51.377504 CPU: vendor Intel device 906a4
605 10:56:51.377543 CPU: family 06, model 9a, stepping 04
606 10:56:51.377582 cpu: energy policy set to 7
607 10:56:51.377621 Clearing out pending MCEs
608 10:56:51.377660 Clearing out pending MCEs
609 10:56:51.377699 microcode: Update skipped, already up-to-date
610 10:56:51.377738 CPU #3 initialized
611 10:56:51.377778 cpu: energy policy set to 7
612 10:56:51.377817 microcode: Update skipped, already up-to-date
613 10:56:51.377856 CPU #2 initialized
614 10:56:51.377893 Initializing CPU #7
615 10:56:51.377931 cpu: energy policy set to 7
616 10:56:51.377970 microcode: Update skipped, already up-to-date
617 10:56:51.378008 CPU #4 initialized
618 10:56:51.378047 microcode: Update skipped, already up-to-date
619 10:56:51.378084 CPU #1 initialized
620 10:56:51.378122 CPU: vendor Intel device 906a4
621 10:56:51.378160 CPU: family 06, model 9a, stepping 04
622 10:56:51.378199 Initializing CPU #5
623 10:56:51.378237 Clearing out pending MCEs
624 10:56:51.378275 CPU: vendor Intel device 906a4
625 10:56:51.378313 CPU: family 06, model 9a, stepping 04
626 10:56:51.378352 CPU: vendor Intel device 906a4
627 10:56:51.378390 CPU: family 06, model 9a, stepping 04
628 10:56:51.378428 cpu: energy policy set to 7
629 10:56:51.378466 Clearing out pending MCEs
630 10:56:51.378520 microcode: Update skipped, already up-to-date
631 10:56:51.378574 CPU #7 initialized
632 10:56:51.378623 cpu: energy policy set to 7
633 10:56:51.378671 Clearing out pending MCEs
634 10:56:51.378720 microcode: Update skipped, already up-to-date
635 10:56:51.378769 CPU #5 initialized
636 10:56:51.378818 cpu: energy policy set to 7
637 10:56:51.378866 microcode: Update skipped, already up-to-date
638 10:56:51.378915 CPU #6 initialized
639 10:56:51.378964 bsp_do_flight_plan done after 692 msecs.
640 10:56:51.379012 CPU: frequency set to 4400 MHz
641 10:56:51.379054 Enabling SMIs.
642 10:56:51.379093 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
643 10:56:51.379133 Probing TPM I2C: done! DID_VID 0x00281ae0
644 10:56:51.379186 Locality already claimed
645 10:56:51.379231 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
646 10:56:51.379271 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
647 10:56:51.379311 Enabling GPIO PM b/c CR50 has long IRQ pulse support
648 10:56:51.379348 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
649 10:56:51.379388 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
650 10:56:51.379426 Found a VBT of 9216 bytes after decompression
651 10:56:51.379465 PCI 1.0, PIN A, using IRQ #16
652 10:56:51.379504 PCI 2.0, PIN A, using IRQ #17
653 10:56:51.379542 PCI 4.0, PIN A, using IRQ #18
654 10:56:51.379580 PCI 5.0, PIN A, using IRQ #16
655 10:56:51.379618 PCI 6.0, PIN A, using IRQ #16
656 10:56:51.379655 PCI 6.2, PIN C, using IRQ #18
657 10:56:51.379693 PCI 7.0, PIN A, using IRQ #19
658 10:56:51.379731 PCI 7.1, PIN B, using IRQ #20
659 10:56:51.379769 PCI 7.2, PIN C, using IRQ #21
660 10:56:51.379807 PCI 7.3, PIN D, using IRQ #22
661 10:56:51.379845 PCI 8.0, PIN A, using IRQ #23
662 10:56:51.379883 PCI D.0, PIN A, using IRQ #17
663 10:56:51.379922 PCI D.1, PIN B, using IRQ #19
664 10:56:51.379959 PCI 10.0, PIN A, using IRQ #24
665 10:56:51.379997 PCI 10.1, PIN B, using IRQ #25
666 10:56:51.380036 PCI 10.6, PIN C, using IRQ #20
667 10:56:51.380074 PCI 10.7, PIN D, using IRQ #21
668 10:56:51.380302 PCI 11.0, PIN A, using IRQ #26
669 10:56:51.380352 PCI 11.1, PIN B, using IRQ #27
670 10:56:51.380392 PCI 11.2, PIN C, using IRQ #28
671 10:56:51.380432 PCI 11.3, PIN D, using IRQ #29
672 10:56:51.380470 PCI 12.0, PIN A, using IRQ #30
673 10:56:51.380508 PCI 12.6, PIN B, using IRQ #31
674 10:56:51.380548 PCI 12.7, PIN C, using IRQ #22
675 10:56:51.380586 PCI 13.0, PIN A, using IRQ #32
676 10:56:51.380624 PCI 13.1, PIN B, using IRQ #33
677 10:56:51.380662 PCI 13.2, PIN C, using IRQ #34
678 10:56:51.380700 PCI 13.3, PIN D, using IRQ #35
679 10:56:51.380738 PCI 14.0, PIN B, using IRQ #23
680 10:56:51.380776 PCI 14.1, PIN A, using IRQ #36
681 10:56:51.380815 PCI 14.3, PIN C, using IRQ #17
682 10:56:51.380853 PCI 15.0, PIN A, using IRQ #37
683 10:56:51.380891 PCI 15.1, PIN B, using IRQ #38
684 10:56:51.380930 PCI 15.2, PIN C, using IRQ #39
685 10:56:51.380968 PCI 15.3, PIN D, using IRQ #40
686 10:56:51.381008 PCI 16.0, PIN A, using IRQ #18
687 10:56:51.381046 PCI 16.1, PIN B, using IRQ #19
688 10:56:51.381084 PCI 16.2, PIN C, using IRQ #20
689 10:56:51.381122 PCI 16.3, PIN D, using IRQ #21
690 10:56:51.381161 PCI 16.4, PIN A, using IRQ #18
691 10:56:51.381199 PCI 16.5, PIN B, using IRQ #19
692 10:56:51.381237 PCI 17.0, PIN A, using IRQ #22
693 10:56:51.381276 PCI 19.0, PIN A, using IRQ #41
694 10:56:51.381315 PCI 19.1, PIN B, using IRQ #42
695 10:56:51.381354 PCI 19.2, PIN C, using IRQ #43
696 10:56:51.381392 PCI 1C.0, PIN A, using IRQ #16
697 10:56:51.381430 PCI 1C.1, PIN B, using IRQ #17
698 10:56:51.381468 PCI 1C.2, PIN C, using IRQ #18
699 10:56:51.381506 PCI 1C.3, PIN D, using IRQ #19
700 10:56:51.381545 PCI 1C.4, PIN A, using IRQ #16
701 10:56:51.381583 PCI 1C.5, PIN B, using IRQ #17
702 10:56:51.381621 PCI 1C.6, PIN C, using IRQ #18
703 10:56:51.381660 PCI 1C.7, PIN D, using IRQ #19
704 10:56:51.381698 PCI 1D.0, PIN A, using IRQ #16
705 10:56:51.381736 PCI 1D.1, PIN B, using IRQ #17
706 10:56:51.381774 PCI 1D.2, PIN C, using IRQ #18
707 10:56:51.381811 PCI 1D.3, PIN D, using IRQ #19
708 10:56:51.381850 PCI 1E.0, PIN A, using IRQ #23
709 10:56:51.381889 PCI 1E.1, PIN B, using IRQ #20
710 10:56:51.381927 PCI 1E.2, PIN C, using IRQ #44
711 10:56:51.381965 PCI 1E.3, PIN D, using IRQ #45
712 10:56:51.382002 PCI 1F.3, PIN B, using IRQ #22
713 10:56:51.382039 PCI 1F.4, PIN C, using IRQ #23
714 10:56:51.382076 PCI 1F.6, PIN D, using IRQ #20
715 10:56:51.382114 PCI 1F.7, PIN A, using IRQ #21
716 10:56:51.382152 IRQ: Using dynamically assigned PCI IO-APIC IRQs
717 10:56:51.382190 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
718 10:56:51.382228 FSPS returned 0
719 10:56:51.382266 Executing Phase 1 of FspMultiPhaseSiInit
720 10:56:51.382305 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
721 10:56:51.382347 port C0 DISC req: usage 1 usb3 1 usb2 1
722 10:56:51.382386 Raw Buffer output 0 00000111
723 10:56:51.382424 Raw Buffer output 1 00000000
724 10:56:51.382463 pmc_send_ipc_cmd succeeded
725 10:56:51.382500 port C1 DISC req: usage 1 usb3 3 usb2 3
726 10:56:51.382539 Raw Buffer output 0 00000331
727 10:56:51.382578 Raw Buffer output 1 00000000
728 10:56:51.382617 pmc_send_ipc_cmd succeeded
729 10:56:51.382655 Detected 6 core, 8 thread CPU.
730 10:56:51.382693 Detected 6 core, 8 thread CPU.
731 10:56:51.382731 Detected 6 core, 8 thread CPU.
732 10:56:51.382770 Detected 6 core, 8 thread CPU.
733 10:56:51.382808 Detected 6 core, 8 thread CPU.
734 10:56:51.382845 Detected 6 core, 8 thread CPU.
735 10:56:51.382883 Detected 6 core, 8 thread CPU.
736 10:56:51.382922 Detected 6 core, 8 thread CPU.
737 10:56:51.382960 Detected 6 core, 8 thread CPU.
738 10:56:51.382998 Detected 6 core, 8 thread CPU.
739 10:56:51.383036 Detected 6 core, 8 thread CPU.
740 10:56:51.383073 Detected 6 core, 8 thread CPU.
741 10:56:51.383111 Detected 6 core, 8 thread CPU.
742 10:56:51.383148 Detected 6 core, 8 thread CPU.
743 10:56:51.383191 Detected 6 core, 8 thread CPU.
744 10:56:51.383231 Detected 6 core, 8 thread CPU.
745 10:56:51.383269 Detected 6 core, 8 thread CPU.
746 10:56:51.383308 Detected 6 core, 8 thread CPU.
747 10:56:51.383345 Detected 6 core, 8 thread CPU.
748 10:56:51.383383 Detected 6 core, 8 thread CPU.
749 10:56:51.383421 Detected 6 core, 8 thread CPU.
750 10:56:51.383459 Detected 6 core, 8 thread CPU.
751 10:56:51.383499 Detected 6 core, 8 thread CPU.
752 10:56:51.383537 Detected 6 core, 8 thread CPU.
753 10:56:51.383575 Detected 6 core, 8 thread CPU.
754 10:56:51.383612 Detected 6 core, 8 thread CPU.
755 10:56:51.383651 Detected 6 core, 8 thread CPU.
756 10:56:51.383692 Detected 6 core, 8 thread CPU.
757 10:56:51.383732 Detected 6 core, 8 thread CPU.
758 10:56:51.383770 Detected 6 core, 8 thread CPU.
759 10:56:51.383810 Detected 6 core, 8 thread CPU.
760 10:56:51.383848 Detected 6 core, 8 thread CPU.
761 10:56:51.383885 Detected 6 core, 8 thread CPU.
762 10:56:51.383923 Detected 6 core, 8 thread CPU.
763 10:56:51.383961 Detected 6 core, 8 thread CPU.
764 10:56:51.383999 Detected 6 core, 8 thread CPU.
765 10:56:51.384037 Detected 6 core, 8 thread CPU.
766 10:56:51.384076 Detected 6 core, 8 thread CPU.
767 10:56:51.384114 Detected 6 core, 8 thread CPU.
768 10:56:51.384151 Detected 6 core, 8 thread CPU.
769 10:56:51.384189 Detected 6 core, 8 thread CPU.
770 10:56:51.384227 Detected 6 core, 8 thread CPU.
771 10:56:51.384266 Display FSP Version Info HOB
772 10:56:51.384306 Reference Code - CPU = c.0.65.70
773 10:56:51.384345 uCode Version = 0.0.4.23
774 10:56:51.384384 TXT ACM version = ff.ff.ff.ffff
775 10:56:51.384423 Reference Code - ME = c.0.65.70
776 10:56:51.384461 MEBx version = 0.0.0.0
777 10:56:51.384499 ME Firmware Version = Consumer SKU
778 10:56:51.384537 Reference Code - PCH = c.0.65.70
779 10:56:51.384576 PCH-CRID Status = Disabled
780 10:56:51.384614 PCH-CRID Original Value = ff.ff.ff.ffff
781 10:56:51.384652 PCH-CRID New Value = ff.ff.ff.ffff
782 10:56:51.384690 OPROM - RST - RAID = ff.ff.ff.ffff
783 10:56:51.384728 PCH Hsio Version = 4.0.0.0
784 10:56:51.384766 Reference Code - SA - System Agent = c.0.65.70
785 10:56:51.384805 Reference Code - MRC = 0.0.3.80
786 10:56:51.384842 SA - PCIe Version = c.0.65.70
787 10:56:51.384879 SA-CRID Status = Disabled
788 10:56:51.384918 SA-CRID Original Value = 0.0.0.4
789 10:56:51.384955 SA-CRID New Value = 0.0.0.4
790 10:56:51.384994 OPROM - VBIOS = ff.ff.ff.ffff
791 10:56:51.385219 IO Manageability Engine FW Version = 24.0.4.0
792 10:56:51.385268 PHY Build Version = 0.0.0.2016
793 10:56:51.385309 Thunderbolt(TM) FW Version = 0.0.0.0
794 10:56:51.385348 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
795 10:56:51.385387 BS: BS_DEV_INIT_CHIPS run times (exec / console): 473 / 507 ms
796 10:56:51.385426 Enumerating buses...
797 10:56:51.385465 Show all devs... Before device enumeration.
798 10:56:51.385504 Root Device: enabled 1
799 10:56:51.385542 CPU_CLUSTER: 0: enabled 1
800 10:56:51.385581 DOMAIN: 0000: enabled 1
801 10:56:51.385620 GPIO: 0: enabled 1
802 10:56:51.385658 PCI: 00:00.0: enabled 1
803 10:56:51.385696 PCI: 00:01.0: enabled 0
804 10:56:51.385735 PCI: 00:01.1: enabled 0
805 10:56:51.385773 PCI: 00:02.0: enabled 1
806 10:56:51.385812 PCI: 00:04.0: enabled 1
807 10:56:51.385851 PCI: 00:05.0: enabled 0
808 10:56:51.385892 PCI: 00:06.0: enabled 1
809 10:56:51.385930 PCI: 00:06.2: enabled 0
810 10:56:51.385968 PCI: 00:07.0: enabled 0
811 10:56:51.386006 PCI: 00:07.1: enabled 0
812 10:56:51.386044 PCI: 00:07.2: enabled 0
813 10:56:51.386082 PCI: 00:07.3: enabled 0
814 10:56:51.386121 PCI: 00:08.0: enabled 0
815 10:56:51.386159 PCI: 00:09.0: enabled 0
816 10:56:51.386197 PCI: 00:0a.0: enabled 1
817 10:56:51.386235 PCI: 00:0d.0: enabled 1
818 10:56:51.386273 PCI: 00:0d.1: enabled 0
819 10:56:51.386310 PCI: 00:0d.2: enabled 0
820 10:56:51.386348 PCI: 00:0d.3: enabled 0
821 10:56:51.386387 PCI: 00:0e.0: enabled 0
822 10:56:51.386425 PCI: 00:10.0: enabled 0
823 10:56:51.386463 PCI: 00:10.1: enabled 0
824 10:56:51.386501 PCI: 00:10.6: enabled 0
825 10:56:51.386538 PCI: 00:10.7: enabled 0
826 10:56:51.386576 PCI: 00:12.0: enabled 0
827 10:56:51.386616 PCI: 00:12.6: enabled 0
828 10:56:51.386653 PCI: 00:12.7: enabled 0
829 10:56:51.386691 PCI: 00:13.0: enabled 0
830 10:56:51.386729 PCI: 00:14.0: enabled 1
831 10:56:51.386767 PCI: 00:14.1: enabled 0
832 10:56:51.386805 PCI: 00:14.2: enabled 1
833 10:56:51.386843 PCI: 00:14.3: enabled 1
834 10:56:51.386881 PCI: 00:15.0: enabled 1
835 10:56:51.386920 PCI: 00:15.1: enabled 1
836 10:56:51.386957 PCI: 00:15.2: enabled 0
837 10:56:51.386994 PCI: 00:15.3: enabled 1
838 10:56:51.387032 PCI: 00:16.0: enabled 1
839 10:56:51.387071 PCI: 00:16.1: enabled 0
840 10:56:51.387109 PCI: 00:16.2: enabled 0
841 10:56:51.387147 PCI: 00:16.3: enabled 0
842 10:56:51.387191 PCI: 00:16.4: enabled 0
843 10:56:51.387229 PCI: 00:16.5: enabled 0
844 10:56:51.387267 PCI: 00:17.0: enabled 1
845 10:56:51.387306 PCI: 00:19.0: enabled 0
846 10:56:51.387344 PCI: 00:19.1: enabled 1
847 10:56:51.387382 PCI: 00:19.2: enabled 0
848 10:56:51.387420 PCI: 00:1a.0: enabled 0
849 10:56:51.387460 PCI: 00:1c.0: enabled 0
850 10:56:51.387498 PCI: 00:1c.1: enabled 0
851 10:56:51.387535 PCI: 00:1c.2: enabled 0
852 10:56:51.387574 PCI: 00:1c.3: enabled 0
853 10:56:51.387611 PCI: 00:1c.4: enabled 0
854 10:56:51.387649 PCI: 00:1c.5: enabled 0
855 10:56:51.387687 PCI: 00:1c.6: enabled 0
856 10:56:51.387724 PCI: 00:1c.7: enabled 0
857 10:56:51.387763 PCI: 00:1d.0: enabled 0
858 10:56:51.387801 PCI: 00:1d.1: enabled 0
859 10:56:51.387839 PCI: 00:1d.2: enabled 0
860 10:56:51.387878 PCI: 00:1d.3: enabled 0
861 10:56:51.387916 PCI: 00:1e.0: enabled 1
862 10:56:51.387954 PCI: 00:1e.1: enabled 0
863 10:56:51.387993 PCI: 00:1e.2: enabled 0
864 10:56:51.388031 PCI: 00:1e.3: enabled 1
865 10:56:51.388069 PCI: 00:1f.0: enabled 1
866 10:56:51.388107 PCI: 00:1f.1: enabled 0
867 10:56:51.388144 PCI: 00:1f.2: enabled 1
868 10:56:51.388183 PCI: 00:1f.3: enabled 1
869 10:56:51.388221 PCI: 00:1f.4: enabled 0
870 10:56:51.388260 PCI: 00:1f.5: enabled 1
871 10:56:51.388297 PCI: 00:1f.6: enabled 0
872 10:56:51.388335 PCI: 00:1f.7: enabled 0
873 10:56:51.388373 GENERIC: 0.0: enabled 1
874 10:56:51.388411 GENERIC: 0.0: enabled 1
875 10:56:51.388449 GENERIC: 1.0: enabled 1
876 10:56:51.388487 GENERIC: 0.0: enabled 1
877 10:56:51.388524 GENERIC: 1.0: enabled 1
878 10:56:51.388562 USB0 port 0: enabled 1
879 10:56:51.388600 USB0 port 0: enabled 1
880 10:56:51.388639 GENERIC: 0.0: enabled 1
881 10:56:51.388677 I2C: 00:1a: enabled 1
882 10:56:51.388715 I2C: 00:31: enabled 1
883 10:56:51.388755 I2C: 00:32: enabled 1
884 10:56:51.388794 I2C: 00:50: enabled 1
885 10:56:51.388833 I2C: 00:10: enabled 1
886 10:56:51.388871 I2C: 00:15: enabled 1
887 10:56:51.388909 I2C: 00:2c: enabled 1
888 10:56:51.388948 GENERIC: 0.0: enabled 1
889 10:56:51.388985 SPI: 00: enabled 1
890 10:56:51.389024 PNP: 0c09.0: enabled 1
891 10:56:51.389061 GENERIC: 0.0: enabled 1
892 10:56:51.389100 USB3 port 0: enabled 1
893 10:56:51.389137 USB3 port 1: enabled 0
894 10:56:51.389176 USB3 port 2: enabled 1
895 10:56:51.389213 USB3 port 3: enabled 0
896 10:56:51.389253 USB2 port 0: enabled 1
897 10:56:51.389292 USB2 port 1: enabled 0
898 10:56:51.389329 USB2 port 2: enabled 1
899 10:56:51.389367 USB2 port 3: enabled 0
900 10:56:51.389403 USB2 port 4: enabled 0
901 10:56:51.389441 USB2 port 5: enabled 1
902 10:56:51.389478 USB2 port 6: enabled 0
903 10:56:51.389516 USB2 port 7: enabled 0
904 10:56:51.389554 USB2 port 8: enabled 1
905 10:56:51.389592 USB2 port 9: enabled 1
906 10:56:51.389631 USB3 port 0: enabled 1
907 10:56:51.389668 USB3 port 1: enabled 0
908 10:56:51.389707 USB3 port 2: enabled 0
909 10:56:51.389745 USB3 port 3: enabled 0
910 10:56:51.389783 GENERIC: 0.0: enabled 1
911 10:56:51.389821 GENERIC: 1.0: enabled 1
912 10:56:51.389858 APIC: 00: enabled 1
913 10:56:51.389897 APIC: 16: enabled 1
914 10:56:51.389935 APIC: 10: enabled 1
915 10:56:51.389972 APIC: 12: enabled 1
916 10:56:51.390009 APIC: 14: enabled 1
917 10:56:51.390047 APIC: 09: enabled 1
918 10:56:51.390085 APIC: 01: enabled 1
919 10:56:51.390124 APIC: 08: enabled 1
920 10:56:51.390162 Compare with tree...
921 10:56:51.390200 Root Device: enabled 1
922 10:56:51.390238 CPU_CLUSTER: 0: enabled 1
923 10:56:51.390277 APIC: 00: enabled 1
924 10:56:51.390315 APIC: 16: enabled 1
925 10:56:51.390354 APIC: 10: enabled 1
926 10:56:51.390393 APIC: 12: enabled 1
927 10:56:51.390432 APIC: 14: enabled 1
928 10:56:51.390469 APIC: 09: enabled 1
929 10:56:51.390508 APIC: 01: enabled 1
930 10:56:51.390546 APIC: 08: enabled 1
931 10:56:51.390584 DOMAIN: 0000: enabled 1
932 10:56:51.390621 GPIO: 0: enabled 1
933 10:56:51.390659 PCI: 00:00.0: enabled 1
934 10:56:51.390697 PCI: 00:01.0: enabled 0
935 10:56:51.390735 PCI: 00:01.1: enabled 0
936 10:56:51.390773 PCI: 00:02.0: enabled 1
937 10:56:51.390813 PCI: 00:04.0: enabled 1
938 10:56:51.390852 GENERIC: 0.0: enabled 1
939 10:56:51.390891 PCI: 00:05.0: enabled 0
940 10:56:51.390929 PCI: 00:06.0: enabled 1
941 10:56:51.390968 PCI: 00:06.2: enabled 0
942 10:56:51.391007 PCI: 00:08.0: enabled 0
943 10:56:51.391045 PCI: 00:09.0: enabled 0
944 10:56:51.391083 PCI: 00:0a.0: enabled 1
945 10:56:51.391122 PCI: 00:0d.0: enabled 1
946 10:56:51.391160 USB0 port 0: enabled 1
947 10:56:51.391202 USB3 port 0: enabled 1
948 10:56:51.391241 USB3 port 1: enabled 0
949 10:56:51.391279 USB3 port 2: enabled 1
950 10:56:51.391318 USB3 port 3: enabled 0
951 10:56:51.391357 PCI: 00:0d.1: enabled 0
952 10:56:51.391589 PCI: 00:0d.2: enabled 0
953 10:56:51.391638 PCI: 00:0d.3: enabled 0
954 10:56:51.391679 PCI: 00:0e.0: enabled 0
955 10:56:51.391718 PCI: 00:10.0: enabled 0
956 10:56:51.391758 PCI: 00:10.1: enabled 0
957 10:56:51.391797 PCI: 00:10.6: enabled 0
958 10:56:51.391835 PCI: 00:10.7: enabled 0
959 10:56:51.391874 PCI: 00:12.0: enabled 0
960 10:56:51.391912 PCI: 00:12.6: enabled 0
961 10:56:51.391950 PCI: 00:12.7: enabled 0
962 10:56:51.391987 PCI: 00:13.0: enabled 0
963 10:56:51.392025 PCI: 00:14.0: enabled 1
964 10:56:51.392064 USB0 port 0: enabled 1
965 10:56:51.392102 USB2 port 0: enabled 1
966 10:56:51.392141 USB2 port 1: enabled 0
967 10:56:51.392181 USB2 port 2: enabled 1
968 10:56:51.392220 USB2 port 3: enabled 0
969 10:56:51.392259 USB2 port 4: enabled 0
970 10:56:51.392299 USB2 port 5: enabled 1
971 10:56:51.392338 USB2 port 6: enabled 0
972 10:56:51.392376 USB2 port 7: enabled 0
973 10:56:51.392414 USB2 port 8: enabled 1
974 10:56:51.392452 USB2 port 9: enabled 1
975 10:56:51.392488 USB3 port 0: enabled 1
976 10:56:51.392526 USB3 port 1: enabled 0
977 10:56:51.392564 USB3 port 2: enabled 0
978 10:56:51.392602 USB3 port 3: enabled 0
979 10:56:51.392640 PCI: 00:14.1: enabled 0
980 10:56:51.392678 PCI: 00:14.2: enabled 1
981 10:56:51.392716 PCI: 00:14.3: enabled 1
982 10:56:51.392753 GENERIC: 0.0: enabled 1
983 10:56:51.392790 PCI: 00:15.0: enabled 1
984 10:56:51.392828 I2C: 00:1a: enabled 1
985 10:56:51.392867 I2C: 00:31: enabled 1
986 10:56:51.392906 I2C: 00:32: enabled 1
987 10:56:51.392944 PCI: 00:15.1: enabled 1
988 10:56:51.392982 I2C: 00:50: enabled 1
989 10:56:51.393021 PCI: 00:15.2: enabled 0
990 10:56:51.393060 PCI: 00:15.3: enabled 1
991 10:56:51.393099 I2C: 00:10: enabled 1
992 10:56:51.393152 PCI: 00:16.0: enabled 1
993 10:56:51.393194 PCI: 00:16.1: enabled 0
994 10:56:51.393232 PCI: 00:16.2: enabled 0
995 10:56:51.393271 PCI: 00:16.3: enabled 0
996 10:56:51.393308 PCI: 00:16.4: enabled 0
997 10:56:51.393347 PCI: 00:16.5: enabled 0
998 10:56:51.393385 PCI: 00:17.0: enabled 1
999 10:56:51.393424 PCI: 00:19.0: enabled 0
1000 10:56:51.393461 PCI: 00:19.1: enabled 1
1001 10:56:51.393500 I2C: 00:15: enabled 1
1002 10:56:51.393539 I2C: 00:2c: enabled 1
1003 10:56:51.393578 PCI: 00:19.2: enabled 0
1004 10:56:51.393617 PCI: 00:1a.0: enabled 0
1005 10:56:51.393655 PCI: 00:1e.0: enabled 1
1006 10:56:51.393694 PCI: 00:1e.1: enabled 0
1007 10:56:51.393731 PCI: 00:1e.2: enabled 0
1008 10:56:51.393769 PCI: 00:1e.3: enabled 1
1009 10:56:51.393807 SPI: 00: enabled 1
1010 10:56:51.393846 PCI: 00:1f.0: enabled 1
1011 10:56:51.393883 PNP: 0c09.0: enabled 1
1012 10:56:51.393920 PCI: 00:1f.1: enabled 0
1013 10:56:51.393958 PCI: 00:1f.2: enabled 1
1014 10:56:51.393996 GENERIC: 0.0: enabled 1
1015 10:56:51.394034 GENERIC: 0.0: enabled 1
1016 10:56:51.394073 GENERIC: 1.0: enabled 1
1017 10:56:51.394112 PCI: 00:1f.3: enabled 1
1018 10:56:51.394150 PCI: 00:1f.4: enabled 0
1019 10:56:51.394188 PCI: 00:1f.5: enabled 1
1020 10:56:51.394227 PCI: 00:1f.6: enabled 0
1021 10:56:51.394278 PCI: 00:1f.7: enabled 0
1022 10:56:51.394346 Root Device scanning...
1023 10:56:51.394411 scan_static_bus for Root Device
1024 10:56:51.394455 CPU_CLUSTER: 0 enabled
1025 10:56:51.394493 DOMAIN: 0000 enabled
1026 10:56:51.394532 DOMAIN: 0000 scanning...
1027 10:56:51.394570 PCI: pci_scan_bus for bus 00
1028 10:56:51.394610 PCI: 00:00.0 [8086/0000] ops
1029 10:56:51.394649 PCI: 00:00.0 [8086/4609] enabled
1030 10:56:51.394688 PCI: 00:02.0 [8086/0000] bus ops
1031 10:56:51.394728 PCI: 00:02.0 [8086/46b3] enabled
1032 10:56:51.394768 PCI: 00:04.0 [8086/0000] bus ops
1033 10:56:51.394808 PCI: 00:04.0 [8086/461d] enabled
1034 10:56:51.394846 PCI: 00:06.0 [8086/0000] bus ops
1035 10:56:51.394885 PCI: 00:06.0 [8086/464d] enabled
1036 10:56:51.394923 PCI: 00:08.0 [8086/464f] disabled
1037 10:56:51.394962 PCI: 00:0a.0 [8086/467d] enabled
1038 10:56:51.395002 PCI: 00:0d.0 [8086/0000] bus ops
1039 10:56:51.395042 PCI: 00:0d.0 [8086/461e] enabled
1040 10:56:51.395080 PCI: 00:14.0 [8086/0000] bus ops
1041 10:56:51.395118 PCI: 00:14.0 [8086/51ed] enabled
1042 10:56:51.395156 PCI: 00:14.2 [8086/51ef] enabled
1043 10:56:51.395222 PCI: 00:14.3 [8086/0000] bus ops
1044 10:56:51.395263 PCI: 00:14.3 [8086/51f0] enabled
1045 10:56:51.395301 PCI: 00:15.0 [8086/0000] bus ops
1046 10:56:51.395339 PCI: 00:15.0 [8086/51e8] enabled
1047 10:56:51.395377 PCI: 00:15.1 [8086/0000] bus ops
1048 10:56:51.395415 PCI: 00:15.1 [8086/51e9] enabled
1049 10:56:51.395453 PCI: 00:15.2 [8086/0000] bus ops
1050 10:56:51.395492 PCI: 00:15.2 [8086/51ea] disabled
1051 10:56:51.395531 PCI: 00:15.3 [8086/0000] bus ops
1052 10:56:51.395569 PCI: 00:15.3 [8086/51eb] enabled
1053 10:56:51.395608 PCI: 00:16.0 [8086/0000] ops
1054 10:56:51.395646 PCI: 00:16.0 [8086/51e0] enabled
1055 10:56:51.395685 PCI: Static device PCI: 00:17.0 not found, disabling it.
1056 10:56:51.395724 PCI: 00:19.0 [8086/0000] bus ops
1057 10:56:51.395762 PCI: 00:19.0 [8086/51c5] disabled
1058 10:56:51.395800 PCI: 00:19.1 [8086/0000] bus ops
1059 10:56:51.395838 PCI: 00:19.1 [8086/51c6] enabled
1060 10:56:51.395876 PCI: 00:1e.0 [8086/0000] ops
1061 10:56:51.395913 PCI: 00:1e.0 [8086/51a8] enabled
1062 10:56:51.395952 PCI: 00:1e.3 [8086/0000] bus ops
1063 10:56:51.395990 PCI: 00:1e.3 [8086/51ab] enabled
1064 10:56:51.396028 PCI: 00:1f.0 [8086/0000] bus ops
1065 10:56:51.396066 PCI: 00:1f.0 [8086/5182] enabled
1066 10:56:51.396103 RTC Init
1067 10:56:51.396141 Set power on after power failure.
1068 10:56:51.396179 Disabling Deep S3
1069 10:56:51.396217 Disabling Deep S3
1070 10:56:51.396253 Disabling Deep S4
1071 10:56:51.396291 Disabling Deep S4
1072 10:56:51.396328 Disabling Deep S5
1073 10:56:51.396366 Disabling Deep S5
1074 10:56:51.396404 PCI: 00:1f.2 [0000/0000] hidden
1075 10:56:51.396442 PCI: 00:1f.3 [8086/0000] bus ops
1076 10:56:51.396480 PCI: 00:1f.3 [8086/51c8] enabled
1077 10:56:51.396518 PCI: 00:1f.5 [8086/0000] bus ops
1078 10:56:51.396556 PCI: 00:1f.5 [8086/51a4] enabled
1079 10:56:51.396593 GPIO: 0 enabled
1080 10:56:51.396631 PCI: Leftover static devices:
1081 10:56:51.396669 PCI: 00:01.0
1082 10:56:51.396707 PCI: 00:01.1
1083 10:56:51.396744 PCI: 00:05.0
1084 10:56:51.396783 PCI: 00:06.2
1085 10:56:51.396821 PCI: 00:09.0
1086 10:56:51.396860 PCI: 00:0d.1
1087 10:56:51.396898 PCI: 00:0d.2
1088 10:56:51.396936 PCI: 00:0d.3
1089 10:56:51.396975 PCI: 00:0e.0
1090 10:56:51.397013 PCI: 00:10.0
1091 10:56:51.397051 PCI: 00:10.1
1092 10:56:51.397088 PCI: 00:10.6
1093 10:56:51.397127 PCI: 00:10.7
1094 10:56:51.397166 PCI: 00:12.0
1095 10:56:51.397204 PCI: 00:12.6
1096 10:56:51.397243 PCI: 00:12.7
1097 10:56:51.397283 PCI: 00:13.0
1098 10:56:51.397322 PCI: 00:14.1
1099 10:56:51.397360 PCI: 00:16.1
1100 10:56:51.397398 PCI: 00:16.2
1101 10:56:51.397437 PCI: 00:16.3
1102 10:56:51.397475 PCI: 00:16.4
1103 10:56:51.397513 PCI: 00:16.5
1104 10:56:51.397551 PCI: 00:17.0
1105 10:56:51.397589 PCI: 00:19.2
1106 10:56:51.397821 PCI: 00:1a.0
1107 10:56:51.397881 PCI: 00:1e.1
1108 10:56:51.397926 PCI: 00:1e.2
1109 10:56:51.397977 PCI: 00:1f.1
1110 10:56:51.398033 PCI: 00:1f.4
1111 10:56:51.398078 PCI: 00:1f.6
1112 10:56:51.398118 PCI: 00:1f.7
1113 10:56:51.398157 PCI: Check your devicetree.cb.
1114 10:56:51.398196 PCI: 00:02.0 scanning...
1115 10:56:51.398235 scan_generic_bus for PCI: 00:02.0
1116 10:56:51.398273 scan_generic_bus for PCI: 00:02.0 done
1117 10:56:51.398311 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1118 10:56:51.398349 PCI: 00:04.0 scanning...
1119 10:56:51.398388 scan_generic_bus for PCI: 00:04.0
1120 10:56:51.398427 GENERIC: 0.0 enabled
1121 10:56:51.398469 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1122 10:56:51.398513 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1123 10:56:51.398553 PCI: 00:06.0 scanning...
1124 10:56:51.398591 do_pci_scan_bridge for PCI: 00:06.0
1125 10:56:51.398629 PCI: pci_scan_bus for bus 01
1126 10:56:51.398667 PCI: 01:00.0 [15b7/5009] enabled
1127 10:56:51.398705 Enabling Common Clock Configuration
1128 10:56:51.398743 L1 Sub-State supported from root port 6
1129 10:56:51.398782 L1 Sub-State Support = 0x5
1130 10:56:51.398821 CommonModeRestoreTime = 0x6e
1131 10:56:51.398860 Power On Value = 0x5, Power On Scale = 0x2
1132 10:56:51.398898 ASPM: Enabled L1
1133 10:56:51.398937 PCIe: Max_Payload_Size adjusted to 256
1134 10:56:51.398976 PCI: 01:00.0: Enabled LTR
1135 10:56:51.399015 PCI: 01:00.0: Programmed LTR max latencies
1136 10:56:51.399054 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1137 10:56:51.399093 PCI: 00:0d.0 scanning...
1138 10:56:51.399131 scan_static_bus for PCI: 00:0d.0
1139 10:56:51.399168 USB0 port 0 enabled
1140 10:56:51.399218 USB0 port 0 scanning...
1141 10:56:51.399258 scan_static_bus for USB0 port 0
1142 10:56:51.399296 USB3 port 0 enabled
1143 10:56:51.399335 USB3 port 1 disabled
1144 10:56:51.399372 USB3 port 2 enabled
1145 10:56:51.399411 USB3 port 3 disabled
1146 10:56:51.399449 USB3 port 0 scanning...
1147 10:56:51.399487 scan_static_bus for USB3 port 0
1148 10:56:51.399524 scan_static_bus for USB3 port 0 done
1149 10:56:51.399563 scan_bus: bus USB3 port 0 finished in 6 msecs
1150 10:56:51.399602 USB3 port 2 scanning...
1151 10:56:51.399641 scan_static_bus for USB3 port 2
1152 10:56:51.399678 scan_static_bus for USB3 port 2 done
1153 10:56:51.399716 scan_bus: bus USB3 port 2 finished in 6 msecs
1154 10:56:51.399754 scan_static_bus for USB0 port 0 done
1155 10:56:51.399794 scan_bus: bus USB0 port 0 finished in 43 msecs
1156 10:56:51.399832 scan_static_bus for PCI: 00:0d.0 done
1157 10:56:51.399871 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1158 10:56:51.399909 PCI: 00:14.0 scanning...
1159 10:56:51.399947 scan_static_bus for PCI: 00:14.0
1160 10:56:51.399984 USB0 port 0 enabled
1161 10:56:51.400022 USB0 port 0 scanning...
1162 10:56:51.400059 scan_static_bus for USB0 port 0
1163 10:56:51.400098 USB2 port 0 enabled
1164 10:56:51.400135 USB2 port 1 disabled
1165 10:56:51.400172 USB2 port 2 enabled
1166 10:56:51.400210 USB2 port 3 disabled
1167 10:56:51.400248 USB2 port 4 disabled
1168 10:56:51.400286 USB2 port 5 enabled
1169 10:56:51.400324 USB2 port 6 disabled
1170 10:56:51.400363 USB2 port 7 disabled
1171 10:56:51.400402 USB2 port 8 enabled
1172 10:56:51.400440 USB2 port 9 enabled
1173 10:56:51.400477 USB3 port 0 enabled
1174 10:56:51.400515 USB3 port 1 disabled
1175 10:56:51.400552 USB3 port 2 disabled
1176 10:56:51.400590 USB3 port 3 disabled
1177 10:56:51.400629 USB2 port 0 scanning...
1178 10:56:51.400667 scan_static_bus for USB2 port 0
1179 10:56:51.400705 scan_static_bus for USB2 port 0 done
1180 10:56:51.400742 scan_bus: bus USB2 port 0 finished in 6 msecs
1181 10:56:51.400781 USB2 port 2 scanning...
1182 10:56:51.400819 scan_static_bus for USB2 port 2
1183 10:56:51.400857 scan_static_bus for USB2 port 2 done
1184 10:56:51.400895 scan_bus: bus USB2 port 2 finished in 6 msecs
1185 10:56:51.400933 USB2 port 5 scanning...
1186 10:56:51.400970 scan_static_bus for USB2 port 5
1187 10:56:51.401008 scan_static_bus for USB2 port 5 done
1188 10:56:51.401046 scan_bus: bus USB2 port 5 finished in 6 msecs
1189 10:56:51.401084 USB2 port 8 scanning...
1190 10:56:51.401122 scan_static_bus for USB2 port 8
1191 10:56:51.401160 scan_static_bus for USB2 port 8 done
1192 10:56:51.401198 scan_bus: bus USB2 port 8 finished in 6 msecs
1193 10:56:51.401237 USB2 port 9 scanning...
1194 10:56:51.401279 scan_static_bus for USB2 port 9
1195 10:56:51.401318 scan_static_bus for USB2 port 9 done
1196 10:56:51.401357 scan_bus: bus USB2 port 9 finished in 6 msecs
1197 10:56:51.401395 USB3 port 0 scanning...
1198 10:56:51.401432 scan_static_bus for USB3 port 0
1199 10:56:51.401470 scan_static_bus for USB3 port 0 done
1200 10:56:51.401509 scan_bus: bus USB3 port 0 finished in 6 msecs
1201 10:56:51.401547 scan_static_bus for USB0 port 0 done
1202 10:56:51.401585 scan_bus: bus USB0 port 0 finished in 120 msecs
1203 10:56:51.401623 scan_static_bus for PCI: 00:14.0 done
1204 10:56:51.401660 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1205 10:56:51.401699 PCI: 00:14.3 scanning...
1206 10:56:51.401736 scan_static_bus for PCI: 00:14.3
1207 10:56:51.401774 GENERIC: 0.0 enabled
1208 10:56:51.401811 scan_static_bus for PCI: 00:14.3 done
1209 10:56:51.401850 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1210 10:56:51.401888 PCI: 00:15.0 scanning...
1211 10:56:51.401925 scan_static_bus for PCI: 00:15.0
1212 10:56:51.401963 I2C: 00:1a enabled
1213 10:56:51.402000 I2C: 00:31 enabled
1214 10:56:51.402038 I2C: 00:32 enabled
1215 10:56:51.402077 scan_static_bus for PCI: 00:15.0 done
1216 10:56:51.402116 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1217 10:56:51.402154 PCI: 00:15.1 scanning...
1218 10:56:51.402192 scan_static_bus for PCI: 00:15.1
1219 10:56:51.402232 I2C: 00:50 enabled
1220 10:56:51.402270 scan_static_bus for PCI: 00:15.1 done
1221 10:56:51.402309 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1222 10:56:51.402346 PCI: 00:15.3 scanning...
1223 10:56:51.402386 scan_static_bus for PCI: 00:15.3
1224 10:56:51.402424 I2C: 00:10 enabled
1225 10:56:51.402462 scan_static_bus for PCI: 00:15.3 done
1226 10:56:51.402501 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1227 10:56:51.402538 PCI: 00:19.1 scanning...
1228 10:56:51.402575 scan_static_bus for PCI: 00:19.1
1229 10:56:51.402614 I2C: 00:15 enabled
1230 10:56:51.402652 I2C: 00:2c enabled
1231 10:56:51.402692 scan_static_bus for PCI: 00:19.1 done
1232 10:56:51.402731 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1233 10:56:51.402768 PCI: 00:1e.3 scanning...
1234 10:56:51.402806 scan_generic_bus for PCI: 00:1e.3
1235 10:56:51.402844 SPI: 00 enabled
1236 10:56:51.403074 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1237 10:56:51.403124 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1238 10:56:51.403165 PCI: 00:1f.0 scanning...
1239 10:56:51.403213 scan_static_bus for PCI: 00:1f.0
1240 10:56:51.403252 PNP: 0c09.0 enabled
1241 10:56:51.403291 PNP: 0c09.0 scanning...
1242 10:56:51.403330 scan_static_bus for PNP: 0c09.0
1243 10:56:51.403369 scan_static_bus for PNP: 0c09.0 done
1244 10:56:51.403407 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1245 10:56:51.403445 scan_static_bus for PCI: 00:1f.0 done
1246 10:56:51.403483 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1247 10:56:51.403521 PCI: 00:1f.2 scanning...
1248 10:56:51.403559 scan_static_bus for PCI: 00:1f.2
1249 10:56:51.403597 GENERIC: 0.0 enabled
1250 10:56:51.403635 GENERIC: 0.0 scanning...
1251 10:56:51.403673 scan_static_bus for GENERIC: 0.0
1252 10:56:51.403711 GENERIC: 0.0 enabled
1253 10:56:51.403749 GENERIC: 1.0 enabled
1254 10:56:51.403787 scan_static_bus for GENERIC: 0.0 done
1255 10:56:51.403825 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1256 10:56:51.403862 scan_static_bus for PCI: 00:1f.2 done
1257 10:56:51.403901 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1258 10:56:51.403939 PCI: 00:1f.3 scanning...
1259 10:56:51.403977 scan_static_bus for PCI: 00:1f.3
1260 10:56:51.404015 scan_static_bus for PCI: 00:1f.3 done
1261 10:56:51.404054 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1262 10:56:51.404092 PCI: 00:1f.5 scanning...
1263 10:56:51.404130 scan_generic_bus for PCI: 00:1f.5
1264 10:56:51.404168 scan_generic_bus for PCI: 00:1f.5 done
1265 10:56:51.404206 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1266 10:56:51.404244 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1267 10:56:51.404281 scan_static_bus for Root Device done
1268 10:56:51.404320 scan_bus: bus Root Device finished in 729 msecs
1269 10:56:51.404358 done
1270 10:56:51.404396 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1271 10:56:51.404434 Chrome EC: UHEPI supported
1272 10:56:51.404471 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1273 10:56:51.404509 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1274 10:56:51.404547 SPI flash protection: WPSW=0 SRP0=0
1275 10:56:51.404585 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1276 10:56:51.404623 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1277 10:56:51.404661 found VGA at PCI: 00:02.0
1278 10:56:51.404699 Setting up VGA for PCI: 00:02.0
1279 10:56:51.404737 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1280 10:56:51.404775 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1281 10:56:51.404814 Allocating resources...
1282 10:56:51.404851 Reading resources...
1283 10:56:51.404889 Root Device read_resources bus 0 link: 0
1284 10:56:51.404926 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1285 10:56:51.404965 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1286 10:56:51.405003 DOMAIN: 0000 read_resources bus 0 link: 0
1287 10:56:51.405040 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1288 10:56:51.405078 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1289 10:56:51.405116 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1290 10:56:51.405154 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1291 10:56:51.405192 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1292 10:56:51.405229 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1293 10:56:51.405268 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1294 10:56:51.405306 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1295 10:56:51.405344 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1296 10:56:51.405383 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1297 10:56:51.405421 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1298 10:56:51.405459 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1299 10:56:51.405499 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1300 10:56:51.405538 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1301 10:56:51.405577 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1302 10:56:51.405617 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1303 10:56:51.405655 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1304 10:56:51.405693 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1305 10:56:51.405732 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1306 10:56:51.405770 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1307 10:56:51.405809 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1308 10:56:51.405847 PCI: 00:04.0 read_resources bus 1 link: 0
1309 10:56:51.405885 PCI: 00:04.0 read_resources bus 1 link: 0 done
1310 10:56:51.405923 PCI: 00:06.0 read_resources bus 1 link: 0
1311 10:56:51.405960 PCI: 00:06.0 read_resources bus 1 link: 0 done
1312 10:56:51.405997 PCI: 00:0d.0 read_resources bus 0 link: 0
1313 10:56:51.406036 USB0 port 0 read_resources bus 0 link: 0
1314 10:56:51.406074 USB0 port 0 read_resources bus 0 link: 0 done
1315 10:56:51.406112 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1316 10:56:51.406149 PCI: 00:14.0 read_resources bus 0 link: 0
1317 10:56:51.406187 USB0 port 0 read_resources bus 0 link: 0
1318 10:56:51.406225 USB0 port 0 read_resources bus 0 link: 0 done
1319 10:56:51.406263 PCI: 00:14.0 read_resources bus 0 link: 0 done
1320 10:56:51.406300 PCI: 00:14.3 read_resources bus 0 link: 0
1321 10:56:51.406338 PCI: 00:14.3 read_resources bus 0 link: 0 done
1322 10:56:51.406375 PCI: 00:15.0 read_resources bus 0 link: 0
1323 10:56:51.406413 PCI: 00:15.0 read_resources bus 0 link: 0 done
1324 10:56:51.406450 PCI: 00:15.1 read_resources bus 0 link: 0
1325 10:56:51.406672 PCI: 00:15.1 read_resources bus 0 link: 0 done
1326 10:56:51.406718 PCI: 00:15.3 read_resources bus 0 link: 0
1327 10:56:51.406757 PCI: 00:15.3 read_resources bus 0 link: 0 done
1328 10:56:51.406796 PCI: 00:19.1 read_resources bus 0 link: 0
1329 10:56:51.406833 PCI: 00:19.1 read_resources bus 0 link: 0 done
1330 10:56:51.406870 PCI: 00:1e.3 read_resources bus 2 link: 0
1331 10:56:51.406909 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1332 10:56:51.406947 PCI: 00:1f.0 read_resources bus 0 link: 0
1333 10:56:51.406984 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1334 10:56:51.407022 PCI: 00:1f.2 read_resources bus 0 link: 0
1335 10:56:51.407061 GENERIC: 0.0 read_resources bus 0 link: 0
1336 10:56:51.407099 GENERIC: 0.0 read_resources bus 0 link: 0 done
1337 10:56:51.407136 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1338 10:56:51.407180 DOMAIN: 0000 read_resources bus 0 link: 0 done
1339 10:56:51.407222 Root Device read_resources bus 0 link: 0 done
1340 10:56:51.407260 Done reading resources.
1341 10:56:51.407297 Show resources in subtree (Root Device)...After reading.
1342 10:56:51.407335 Root Device child on link 0 CPU_CLUSTER: 0
1343 10:56:51.407373 CPU_CLUSTER: 0 child on link 0 APIC: 00
1344 10:56:51.407410 APIC: 00
1345 10:56:51.407448 APIC: 16
1346 10:56:51.407485 APIC: 10
1347 10:56:51.407523 APIC: 12
1348 10:56:51.407560 APIC: 14
1349 10:56:51.407598 APIC: 09
1350 10:56:51.407636 APIC: 01
1351 10:56:51.407674 APIC: 08
1352 10:56:51.407711 DOMAIN: 0000 child on link 0 GPIO: 0
1353 10:56:51.407749 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1354 10:56:51.407789 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1355 10:56:51.407828 GPIO: 0
1356 10:56:51.407866 PCI: 00:00.0
1357 10:56:51.407904 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1358 10:56:51.407943 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1359 10:56:51.407983 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1360 10:56:51.408022 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1361 10:56:51.408060 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1362 10:56:51.408099 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1363 10:56:51.408138 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1364 10:56:51.408176 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1365 10:56:51.408214 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1366 10:56:51.408253 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1367 10:56:51.408291 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1368 10:56:51.408330 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1369 10:56:51.408369 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1370 10:56:51.408408 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1371 10:56:51.408446 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1372 10:56:51.408484 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1373 10:56:51.408523 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1374 10:56:51.408561 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1375 10:56:51.408600 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1376 10:56:51.408638 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1377 10:56:51.408676 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1378 10:56:51.408715 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1379 10:56:51.408753 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1380 10:56:51.408792 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1381 10:56:51.408831 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1382 10:56:51.408869 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1383 10:56:51.408907 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1384 10:56:51.408945 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1385 10:56:51.408984 PCI: 00:02.0
1386 10:56:51.409021 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1387 10:56:51.409243 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1388 10:56:51.409292 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1389 10:56:51.409333 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1390 10:56:51.409373 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1391 10:56:51.409412 GENERIC: 0.0
1392 10:56:51.409450 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1393 10:56:51.409489 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1394 10:56:51.409529 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1395 10:56:51.409568 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1396 10:56:51.409607 PCI: 01:00.0
1397 10:56:51.409645 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1398 10:56:51.409684 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1399 10:56:51.409722 PCI: 00:08.0
1400 10:56:51.409759 PCI: 00:0a.0
1401 10:56:51.409797 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1402 10:56:51.409834 PCI: 00:0d.0 child on link 0 USB0 port 0
1403 10:56:51.409872 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1404 10:56:51.409911 USB0 port 0 child on link 0 USB3 port 0
1405 10:56:51.409950 USB3 port 0
1406 10:56:51.409987 USB3 port 1
1407 10:56:51.410024 USB3 port 2
1408 10:56:51.410062 USB3 port 3
1409 10:56:51.410099 PCI: 00:14.0 child on link 0 USB0 port 0
1410 10:56:51.410136 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1411 10:56:51.410173 USB0 port 0 child on link 0 USB2 port 0
1412 10:56:51.410210 USB2 port 0
1413 10:56:51.410247 USB2 port 1
1414 10:56:51.410284 USB2 port 2
1415 10:56:51.410323 USB2 port 3
1416 10:56:51.410361 USB2 port 4
1417 10:56:51.410399 USB2 port 5
1418 10:56:51.410437 USB2 port 6
1419 10:56:51.410474 USB2 port 7
1420 10:56:51.410511 USB2 port 8
1421 10:56:51.410548 USB2 port 9
1422 10:56:51.410586 USB3 port 0
1423 10:56:51.410623 USB3 port 1
1424 10:56:51.410660 USB3 port 2
1425 10:56:51.410697 USB3 port 3
1426 10:56:51.410735 PCI: 00:14.2
1427 10:56:51.410773 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1428 10:56:51.410813 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1429 10:56:51.410853 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1430 10:56:51.410892 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1431 10:56:51.410932 GENERIC: 0.0
1432 10:56:51.410971 PCI: 00:15.0 child on link 0 I2C: 00:1a
1433 10:56:51.411010 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1434 10:56:51.411048 I2C: 00:1a
1435 10:56:51.411086 I2C: 00:31
1436 10:56:51.411123 I2C: 00:32
1437 10:56:51.411161 PCI: 00:15.1 child on link 0 I2C: 00:50
1438 10:56:51.411214 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1439 10:56:51.411256 I2C: 00:50
1440 10:56:51.411294 PCI: 00:15.2
1441 10:56:51.411332 PCI: 00:15.3 child on link 0 I2C: 00:10
1442 10:56:51.411370 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1443 10:56:51.411410 I2C: 00:10
1444 10:56:51.411449 PCI: 00:16.0
1445 10:56:51.411487 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1446 10:56:51.411526 PCI: 00:19.0
1447 10:56:51.411564 PCI: 00:19.1 child on link 0 I2C: 00:15
1448 10:56:51.411602 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1449 10:56:51.411639 I2C: 00:15
1450 10:56:51.411676 I2C: 00:2c
1451 10:56:51.411713 PCI: 00:1e.0
1452 10:56:51.411751 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1453 10:56:51.411790 PCI: 00:1e.3 child on link 0 SPI: 00
1454 10:56:51.411830 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1455 10:56:51.411867 SPI: 00
1456 10:56:51.411906 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1457 10:56:51.411945 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1458 10:56:51.411983 PNP: 0c09.0
1459 10:56:51.412020 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1460 10:56:51.412059 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1461 10:56:51.412098 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1462 10:56:51.412137 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1463 10:56:51.412176 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1464 10:56:51.412215 GENERIC: 0.0
1465 10:56:51.412252 GENERIC: 1.0
1466 10:56:51.412289 PCI: 00:1f.3
1467 10:56:51.412327 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1468 10:56:51.412365 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1469 10:56:51.412403 PCI: 00:1f.5
1470 10:56:51.412623 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1471 10:56:51.412671 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1472 10:56:51.412714 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1473 10:56:51.412754 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1474 10:56:51.412792 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1475 10:56:51.412830 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1476 10:56:51.412868 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1477 10:56:51.412906 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1478 10:56:51.412945 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1479 10:56:51.412984 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1480 10:56:51.413022 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1481 10:56:51.413061 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1482 10:56:51.413100 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1483 10:56:51.413138 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1484 10:56:51.413176 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1485 10:56:51.413216 DOMAIN: 0000: Resource ranges:
1486 10:56:51.413254 * Base: 1000, Size: 800, Tag: 100
1487 10:56:51.413292 * Base: 1900, Size: e700, Tag: 100
1488 10:56:51.413329 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1489 10:56:51.413368 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1490 10:56:51.413407 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1491 10:56:51.413445 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1492 10:56:51.413483 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1493 10:56:51.413522 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1494 10:56:51.413560 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1495 10:56:51.413597 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1496 10:56:51.413635 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1497 10:56:51.413673 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1498 10:56:51.413711 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1499 10:56:51.413750 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1500 10:56:51.413789 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1501 10:56:51.413828 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1502 10:56:51.413866 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1503 10:56:51.413904 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1504 10:56:51.413941 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1505 10:56:51.413979 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1506 10:56:51.414017 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1507 10:56:51.414055 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1508 10:56:51.414093 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1509 10:56:51.414131 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1510 10:56:51.414169 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1511 10:56:51.414207 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1512 10:56:51.414245 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1513 10:56:51.414283 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1514 10:56:51.414322 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1515 10:56:51.414360 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1516 10:56:51.414398 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1517 10:56:51.414436 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1518 10:56:51.414473 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1519 10:56:51.414512 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1520 10:56:51.414550 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1521 10:56:51.414588 DOMAIN: 0000: Resource ranges:
1522 10:56:51.414625 * Base: 80400000, Size: 3fc00000, Tag: 200
1523 10:56:51.414664 * Base: d0000000, Size: 28000000, Tag: 200
1524 10:56:51.414702 * Base: fa000000, Size: 1000000, Tag: 200
1525 10:56:51.414739 * Base: fb001000, Size: 17ff000, Tag: 200
1526 10:56:51.414784 * Base: fe800000, Size: 300000, Tag: 200
1527 10:56:51.414824 * Base: feb80000, Size: 80000, Tag: 200
1528 10:56:51.414863 * Base: fed00000, Size: 40000, Tag: 200
1529 10:56:51.414902 * Base: fed70000, Size: 10000, Tag: 200
1530 10:56:51.415121 * Base: fed88000, Size: 8000, Tag: 200
1531 10:56:51.415187 * Base: fed93000, Size: d000, Tag: 200
1532 10:56:51.415231 * Base: feda2000, Size: 1e000, Tag: 200
1533 10:56:51.415287 * Base: fede0000, Size: 1220000, Tag: 200
1534 10:56:51.415338 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1535 10:56:51.415388 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1536 10:56:51.415439 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1537 10:56:51.415488 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1538 10:56:51.415537 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1539 10:56:51.415586 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1540 10:56:51.415634 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1541 10:56:51.415683 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1542 10:56:51.415732 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1543 10:56:51.415780 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1544 10:56:51.415829 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1545 10:56:51.415877 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1546 10:56:51.415925 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1547 10:56:51.415974 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1548 10:56:51.416021 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1549 10:56:51.416070 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1550 10:56:51.416119 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1551 10:56:51.416168 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1552 10:56:51.416217 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1553 10:56:51.416265 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1554 10:56:51.416313 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1555 10:56:51.416363 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1556 10:56:51.416410 PCI: 00:06.0: Resource ranges:
1557 10:56:51.416459 * Base: 80400000, Size: 100000, Tag: 200
1558 10:56:51.416507 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1559 10:56:51.416556 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1560 10:56:51.416605 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1561 10:56:51.416654 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1562 10:56:51.416704 Root Device assign_resources, bus 0 link: 0
1563 10:56:51.416753 DOMAIN: 0000 assign_resources, bus 0 link: 0
1564 10:56:51.416801 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1565 10:56:51.416849 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1566 10:56:51.416899 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1567 10:56:51.416948 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1568 10:56:51.416997 PCI: 00:04.0 assign_resources, bus 1 link: 0
1569 10:56:51.417046 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1570 10:56:51.417089 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1571 10:56:51.417128 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1572 10:56:51.417166 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1573 10:56:51.417204 PCI: 00:06.0 assign_resources, bus 1 link: 0
1574 10:56:51.417241 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1575 10:56:51.417280 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1576 10:56:51.417318 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1577 10:56:51.417356 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1578 10:56:51.417395 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1579 10:56:51.417433 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1580 10:56:51.417471 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1581 10:56:51.417510 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1582 10:56:51.417547 PCI: 00:14.0 assign_resources, bus 0 link: 0
1583 10:56:51.417585 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1584 10:56:51.417623 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1585 10:56:51.417661 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1586 10:56:51.417698 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1587 10:56:51.417736 PCI: 00:14.3 assign_resources, bus 0 link: 0
1588 10:56:51.417773 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1589 10:56:51.417811 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1590 10:56:51.417849 PCI: 00:15.0 assign_resources, bus 0 link: 0
1591 10:56:51.417887 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1592 10:56:51.418103 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1593 10:56:51.418150 PCI: 00:15.1 assign_resources, bus 0 link: 0
1594 10:56:51.418191 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1595 10:56:51.418230 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1596 10:56:51.418268 PCI: 00:15.3 assign_resources, bus 0 link: 0
1597 10:56:51.418310 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1598 10:56:51.418366 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1599 10:56:51.418416 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1600 10:56:51.418465 PCI: 00:19.1 assign_resources, bus 0 link: 0
1601 10:56:51.418513 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1602 10:56:51.418561 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1603 10:56:51.418611 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1604 10:56:51.418659 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1605 10:56:51.418707 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1606 10:56:51.418757 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1607 10:56:51.418806 LPC: Trying to open IO window from 800 size 1ff
1608 10:56:51.418855 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1609 10:56:51.418904 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1610 10:56:51.418955 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1611 10:56:51.419005 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1612 10:56:51.419053 Root Device assign_resources, bus 0 link: 0 done
1613 10:56:51.419102 Done setting resources.
1614 10:56:51.419151 Show resources in subtree (Root Device)...After assigning values.
1615 10:56:51.419208 Root Device child on link 0 CPU_CLUSTER: 0
1616 10:56:51.419258 CPU_CLUSTER: 0 child on link 0 APIC: 00
1617 10:56:51.419307 APIC: 00
1618 10:56:51.419355 APIC: 16
1619 10:56:51.419393 APIC: 10
1620 10:56:51.419432 APIC: 12
1621 10:56:51.419469 APIC: 14
1622 10:56:51.419507 APIC: 09
1623 10:56:51.419544 APIC: 01
1624 10:56:51.419581 APIC: 08
1625 10:56:51.419618 DOMAIN: 0000 child on link 0 GPIO: 0
1626 10:56:51.419657 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1627 10:56:51.419695 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1628 10:56:51.419734 GPIO: 0
1629 10:56:51.419772 PCI: 00:00.0
1630 10:56:51.419811 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1631 10:56:51.419849 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1632 10:56:51.419888 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1633 10:56:51.419927 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1634 10:56:51.419965 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1635 10:56:51.420003 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1636 10:56:51.420041 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1637 10:56:51.420079 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1638 10:56:51.420117 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1639 10:56:51.420157 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1640 10:56:51.420195 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1641 10:56:51.420235 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1642 10:56:51.420274 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1643 10:56:51.420312 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1644 10:56:51.420352 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1645 10:56:51.420390 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1646 10:56:51.420429 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1647 10:56:51.420468 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1648 10:56:51.420506 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1649 10:56:51.420545 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1650 10:56:51.420583 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1651 10:56:51.420620 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1652 10:56:51.420658 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1653 10:56:51.420875 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1654 10:56:51.420922 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1655 10:56:51.420964 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1656 10:56:51.421003 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1657 10:56:51.421041 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1658 10:56:51.421080 PCI: 00:02.0
1659 10:56:51.421118 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1660 10:56:51.421157 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1661 10:56:51.421197 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1662 10:56:51.421236 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1663 10:56:51.421274 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1664 10:56:51.421313 GENERIC: 0.0
1665 10:56:51.421351 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1666 10:56:51.421389 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1667 10:56:51.421429 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1668 10:56:51.421468 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1669 10:56:51.421506 PCI: 01:00.0
1670 10:56:51.421544 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1671 10:56:51.421584 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1672 10:56:51.421622 PCI: 00:08.0
1673 10:56:51.421660 PCI: 00:0a.0
1674 10:56:51.421698 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1675 10:56:51.421736 PCI: 00:0d.0 child on link 0 USB0 port 0
1676 10:56:51.421775 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1677 10:56:51.421813 USB0 port 0 child on link 0 USB3 port 0
1678 10:56:51.421851 USB3 port 0
1679 10:56:51.421890 USB3 port 1
1680 10:56:51.421928 USB3 port 2
1681 10:56:51.421966 USB3 port 3
1682 10:56:51.422005 PCI: 00:14.0 child on link 0 USB0 port 0
1683 10:56:51.422044 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1684 10:56:51.422082 USB0 port 0 child on link 0 USB2 port 0
1685 10:56:51.422120 USB2 port 0
1686 10:56:51.422159 USB2 port 1
1687 10:56:51.422197 USB2 port 2
1688 10:56:51.422235 USB2 port 3
1689 10:56:51.422273 USB2 port 4
1690 10:56:51.422311 USB2 port 5
1691 10:56:51.422348 USB2 port 6
1692 10:56:51.422385 USB2 port 7
1693 10:56:51.422422 USB2 port 8
1694 10:56:51.422459 USB2 port 9
1695 10:56:51.422497 USB3 port 0
1696 10:56:51.422534 USB3 port 1
1697 10:56:51.422571 USB3 port 2
1698 10:56:51.422608 USB3 port 3
1699 10:56:51.422645 PCI: 00:14.2
1700 10:56:51.422683 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1701 10:56:51.422723 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1702 10:56:51.422773 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1703 10:56:51.422815 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1704 10:56:51.422868 GENERIC: 0.0
1705 10:56:51.422939 PCI: 00:15.0 child on link 0 I2C: 00:1a
1706 10:56:51.422984 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1707 10:56:51.423024 I2C: 00:1a
1708 10:56:51.423062 I2C: 00:31
1709 10:56:51.423101 I2C: 00:32
1710 10:56:51.423138 PCI: 00:15.1 child on link 0 I2C: 00:50
1711 10:56:51.423187 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1712 10:56:51.423229 I2C: 00:50
1713 10:56:51.423269 PCI: 00:15.2
1714 10:56:51.423307 PCI: 00:15.3 child on link 0 I2C: 00:10
1715 10:56:51.423345 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1716 10:56:51.423384 I2C: 00:10
1717 10:56:51.423421 PCI: 00:16.0
1718 10:56:51.423460 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1719 10:56:51.423499 PCI: 00:19.0
1720 10:56:51.423537 PCI: 00:19.1 child on link 0 I2C: 00:15
1721 10:56:51.423574 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1722 10:56:51.423613 I2C: 00:15
1723 10:56:51.423651 I2C: 00:2c
1724 10:56:51.423688 PCI: 00:1e.0
1725 10:56:51.423726 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1726 10:56:51.423764 PCI: 00:1e.3 child on link 0 SPI: 00
1727 10:56:51.423802 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1728 10:56:51.423841 SPI: 00
1729 10:56:51.423879 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1730 10:56:51.423917 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1731 10:56:51.423955 PNP: 0c09.0
1732 10:56:51.424176 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1733 10:56:51.424223 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1734 10:56:51.424264 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1735 10:56:51.424305 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1736 10:56:51.424344 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1737 10:56:51.424403 GENERIC: 0.0
1738 10:56:51.424444 GENERIC: 1.0
1739 10:56:51.424485 PCI: 00:1f.3
1740 10:56:51.424524 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1741 10:56:51.424563 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1742 10:56:51.424601 PCI: 00:1f.5
1743 10:56:51.424638 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1744 10:56:51.424676 Done allocating resources.
1745 10:56:51.424713 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1746 10:56:51.424751 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1747 10:56:51.424789 Configure audio over I2S with MAX98373 NAU88L25B.
1748 10:56:51.424828 Enabling BT offload
1749 10:56:51.424868 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1750 10:56:51.424906 Enabling resources...
1751 10:56:51.424945 PCI: 00:00.0 subsystem <- 8086/4609
1752 10:56:51.424982 PCI: 00:00.0 cmd <- 06
1753 10:56:51.425020 PCI: 00:02.0 subsystem <- 8086/46b3
1754 10:56:51.425058 PCI: 00:02.0 cmd <- 03
1755 10:56:51.425095 PCI: 00:04.0 subsystem <- 8086/461d
1756 10:56:51.425132 PCI: 00:04.0 cmd <- 02
1757 10:56:51.425170 PCI: 00:06.0 bridge ctrl <- 0013
1758 10:56:51.425209 PCI: 00:06.0 subsystem <- 8086/464d
1759 10:56:51.425246 PCI: 00:06.0 cmd <- 106
1760 10:56:51.425284 PCI: 00:0a.0 subsystem <- 8086/467d
1761 10:56:51.425321 PCI: 00:0a.0 cmd <- 02
1762 10:56:51.425359 PCI: 00:0d.0 subsystem <- 8086/461e
1763 10:56:51.425397 PCI: 00:0d.0 cmd <- 02
1764 10:56:51.425434 PCI: 00:14.0 subsystem <- 8086/51ed
1765 10:56:51.425471 PCI: 00:14.0 cmd <- 02
1766 10:56:51.425508 PCI: 00:14.2 subsystem <- 8086/51ef
1767 10:56:51.425547 PCI: 00:14.2 cmd <- 02
1768 10:56:51.425584 PCI: 00:14.3 subsystem <- 8086/51f0
1769 10:56:51.425621 PCI: 00:14.3 cmd <- 02
1770 10:56:51.699265 PCI: 00:15.0 subsystem <- 8086/51e8
1771 10:56:51.699371 PCI: 00:15.0 cmd <- 02
1772 10:56:51.699420 PCI: 00:15.1 subsystem <- 8086/51e9
1773 10:56:51.699462 PCI: 00:15.1 cmd <- 06
1774 10:56:51.699502 PCI: 00:15.3 subsystem <- 8086/51eb
1775 10:56:51.699541 PCI: 00:15.3 cmd <- 02
1776 10:56:51.699579 PCI: 00:16.0 subsystem <- 8086/51e0
1777 10:56:51.699633 PCI: 00:16.0 cmd <- 02
1778 10:56:51.699673 PCI: 00:19.1 subsystem <- 8086/51c6
1779 10:56:51.699714 PCI: 00:19.1 cmd <- 02
1780 10:56:51.699755 PCI: 00:1e.0 subsystem <- 8086/51a8
1781 10:56:51.699795 PCI: 00:1e.0 cmd <- 06
1782 10:56:51.699836 PCI: 00:1e.3 subsystem <- 8086/51ab
1783 10:56:51.699876 PCI: 00:1e.3 cmd <- 02
1784 10:56:51.699915 PCI: 00:1f.0 subsystem <- 8086/5182
1785 10:56:51.699954 PCI: 00:1f.0 cmd <- 407
1786 10:56:51.699994 PCI: 00:1f.3 subsystem <- 8086/51c8
1787 10:56:51.700035 PCI: 00:1f.3 cmd <- 02
1788 10:56:51.700075 PCI: 00:1f.5 subsystem <- 8086/51a4
1789 10:56:51.700114 PCI: 00:1f.5 cmd <- 406
1790 10:56:51.700155 PCI: 01:00.0 cmd <- 02
1791 10:56:51.700195 done.
1792 10:56:51.700236 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1793 10:56:51.700278 ME: Version: Unavailable
1794 10:56:51.700318 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1795 10:56:51.700359 Initializing devices...
1796 10:56:51.700399 Root Device init
1797 10:56:51.700438 mainboard: EC init
1798 10:56:51.700478 Chrome EC: Set SMI mask to 0x0000000000000000
1799 10:56:51.700519 Chrome EC: clear events_b mask to 0x0000000000000000
1800 10:56:51.700559 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1801 10:56:51.700598 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1802 10:56:51.700638 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1803 10:56:51.700690 Chrome EC: Set WAKE mask to 0x0000000000000000
1804 10:56:51.700729 Root Device init finished in 38 msecs
1805 10:56:51.700768 PCI: 00:00.0 init
1806 10:56:51.700806 CPU TDP = 15 Watts
1807 10:56:51.700845 CPU PL1 = 15 Watts
1808 10:56:51.700883 CPU PL2 = 55 Watts
1809 10:56:51.700921 CPU PL4 = 123 Watts
1810 10:56:51.700959 PCI: 00:00.0 init finished in 8 msecs
1811 10:56:51.700998 PCI: 00:02.0 init
1812 10:56:51.701035 GMA: Found VBT in CBFS
1813 10:56:51.701073 GMA: Found valid VBT in CBFS
1814 10:56:51.701112 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1815 10:56:51.701151 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1816 10:56:51.701190 PCI: 00:02.0 init finished in 18 msecs
1817 10:56:51.701229 PCI: 00:06.0 init
1818 10:56:51.701268 Initializing PCH PCIe bridge.
1819 10:56:51.701305 PCI: 00:06.0 init finished in 3 msecs
1820 10:56:51.701344 PCI: 00:0a.0 init
1821 10:56:51.701383 PCI: 00:0a.0 init finished in 0 msecs
1822 10:56:51.701421 PCI: 00:14.0 init
1823 10:56:51.701473 PCI: 00:14.0 init finished in 0 msecs
1824 10:56:51.701521 PCI: 00:14.2 init
1825 10:56:51.701561 PCI: 00:14.2 init finished in 0 msecs
1826 10:56:51.701601 PCI: 00:15.0 init
1827 10:56:51.701639 I2C bus 0 version 0x3230302a
1828 10:56:51.701677 DW I2C bus 0 at 0x80655000 (400 KHz)
1829 10:56:51.701715 PCI: 00:15.0 init finished in 6 msecs
1830 10:56:51.701753 PCI: 00:15.1 init
1831 10:56:51.701790 I2C bus 1 version 0x3230302a
1832 10:56:51.701828 DW I2C bus 1 at 0x80656000 (400 KHz)
1833 10:56:51.701865 PCI: 00:15.1 init finished in 6 msecs
1834 10:56:51.701903 PCI: 00:15.3 init
1835 10:56:51.701940 I2C bus 3 version 0x3230302a
1836 10:56:51.701978 DW I2C bus 3 at 0x80657000 (400 KHz)
1837 10:56:51.702016 PCI: 00:15.3 init finished in 6 msecs
1838 10:56:51.702054 PCI: 00:16.0 init
1839 10:56:51.702091 PCI: 00:16.0 init finished in 0 msecs
1840 10:56:51.702129 PCI: 00:19.1 init
1841 10:56:51.702166 I2C bus 5 version 0x3230302a
1842 10:56:51.702205 DW I2C bus 5 at 0x80659000 (400 KHz)
1843 10:56:51.702243 PCI: 00:19.1 init finished in 6 msecs
1844 10:56:51.702281 PCI: 00:1f.0 init
1845 10:56:51.702513 IOAPIC: Initializing IOAPIC at 0xfec00000
1846 10:56:51.702574 IOAPIC: ID = 0x02
1847 10:56:51.702619 IOAPIC: Dumping registers
1848 10:56:51.702659 reg 0x0000: 0x02000000
1849 10:56:51.702698 reg 0x0001: 0x00770020
1850 10:56:51.702737 reg 0x0002: 0x00000000
1851 10:56:51.702776 IOAPIC: 120 interrupts
1852 10:56:51.702816 IOAPIC: Clearing IOAPIC at 0xfec00000
1853 10:56:51.702856 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1854 10:56:51.702895 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1855 10:56:51.702935 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1856 10:56:51.702973 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1857 10:56:51.703012 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1858 10:56:51.703050 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1859 10:56:51.703094 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1860 10:56:51.703135 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1861 10:56:51.703195 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1862 10:56:51.703243 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1863 10:56:51.703284 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1864 10:56:51.703323 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1865 10:56:51.703361 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1866 10:56:51.703400 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1867 10:56:51.703438 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1868 10:56:51.703477 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1869 10:56:51.703516 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1870 10:56:51.703555 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1871 10:56:51.703594 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1872 10:56:51.703633 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1873 10:56:51.703672 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1874 10:56:51.703710 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1875 10:56:51.703748 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1876 10:56:51.703793 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1877 10:56:51.703833 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1878 10:56:51.703872 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1879 10:56:51.703911 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1880 10:56:51.703950 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1881 10:56:51.703987 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1882 10:56:51.704026 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1883 10:56:51.704064 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1884 10:56:51.704102 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1885 10:56:51.704141 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1886 10:56:51.704179 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1887 10:56:51.704218 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1888 10:56:51.704256 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1889 10:56:51.704293 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1890 10:56:51.704333 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1891 10:56:51.704371 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1892 10:56:51.704411 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1893 10:56:51.704449 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1894 10:56:51.704488 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1895 10:56:51.704526 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1896 10:56:51.704565 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1897 10:56:51.704604 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1898 10:56:51.704642 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1899 10:56:51.704681 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1900 10:56:51.704731 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1901 10:56:51.704780 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1902 10:56:51.704821 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1903 10:56:51.704861 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1904 10:56:51.704899 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1905 10:56:51.704938 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1906 10:56:51.704976 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1907 10:56:51.705014 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1908 10:56:51.705052 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1909 10:56:51.705091 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1910 10:56:51.705130 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1911 10:56:51.705168 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1912 10:56:51.705206 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1913 10:56:51.705244 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1914 10:56:51.705283 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1915 10:56:51.705322 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1916 10:56:51.705360 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1917 10:56:51.705398 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1918 10:56:51.705437 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1919 10:56:51.705476 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1920 10:56:51.705514 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1921 10:56:51.705552 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1922 10:56:51.705590 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1923 10:56:51.705629 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1924 10:56:51.705667 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1925 10:56:51.705717 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1926 10:56:51.705763 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1927 10:56:51.705803 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1928 10:56:51.705841 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1929 10:56:51.705879 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1930 10:56:51.705918 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1931 10:56:51.705956 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1932 10:56:51.706182 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1933 10:56:51.706231 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1934 10:56:51.706272 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1935 10:56:51.706311 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1936 10:56:51.706350 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1937 10:56:51.706389 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1938 10:56:51.706427 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1939 10:56:51.706465 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1940 10:56:51.706504 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1941 10:56:51.706542 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1942 10:56:51.706580 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1943 10:56:51.706617 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1944 10:56:51.706655 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1945 10:56:51.706698 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1946 10:56:51.706738 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1947 10:56:51.706778 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1948 10:56:51.706816 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1949 10:56:51.706854 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1950 10:56:51.706892 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1951 10:56:51.706930 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1952 10:56:51.706968 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1953 10:56:51.707006 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1954 10:56:51.707045 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1955 10:56:51.707082 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1956 10:56:51.707120 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1957 10:56:51.707159 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1958 10:56:51.707209 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1959 10:56:51.707249 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1960 10:56:51.707288 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1961 10:56:51.707328 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1962 10:56:51.707367 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1963 10:56:51.707406 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1964 10:56:51.707444 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1965 10:56:51.707482 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1966 10:56:51.707521 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1967 10:56:51.707559 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1968 10:56:51.707599 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1969 10:56:51.707638 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1970 10:56:51.707675 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1971 10:56:51.707714 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1972 10:56:51.707753 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1973 10:56:51.707791 IOAPIC: Bootstrap Processor Local APIC = 0x00
1974 10:56:51.707831 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1975 10:56:51.707870 PCI: 00:1f.0 init finished in 607 msecs
1976 10:56:51.707908 PCI: 00:1f.2 init
1977 10:56:51.707959 apm_control: Disabling ACPI.
1978 10:56:51.708007 APMC done.
1979 10:56:51.708048 PCI: 00:1f.2 init finished in 8 msecs
1980 10:56:51.708087 PCI: 00:1f.3 init
1981 10:56:51.708126 PCI: 00:1f.3 init finished in 0 msecs
1982 10:56:51.708163 PCI: 01:00.0 init
1983 10:56:51.708202 PCI: 01:00.0 init finished in 0 msecs
1984 10:56:51.708240 PNP: 0c09.0 init
1985 10:56:51.708278 Google Chrome EC uptime: 10.919 seconds
1986 10:56:51.708317 Google Chrome AP resets since EC boot: 0
1987 10:56:51.708356 Google Chrome most recent AP reset causes:
1988 10:56:51.708394 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1989 10:56:51.708434 PNP: 0c09.0 init finished in 19 msecs
1990 10:56:51.708472 GENERIC: 0.0 init
1991 10:56:51.708511 GENERIC: 0.0 init finished in 0 msecs
1992 10:56:51.708550 GENERIC: 1.0 init
1993 10:56:51.708588 GENERIC: 1.0 init finished in 0 msecs
1994 10:56:51.708626 Devices initialized
1995 10:56:51.708664 Show all devs... After init.
1996 10:56:51.708704 Root Device: enabled 1
1997 10:56:51.708758 CPU_CLUSTER: 0: enabled 1
1998 10:56:51.708818 DOMAIN: 0000: enabled 1
1999 10:56:51.708872 GPIO: 0: enabled 1
2000 10:56:51.708913 PCI: 00:00.0: enabled 1
2001 10:56:51.708953 PCI: 00:01.0: enabled 0
2002 10:56:51.708991 PCI: 00:01.1: enabled 0
2003 10:56:51.709030 PCI: 00:02.0: enabled 1
2004 10:56:51.709068 PCI: 00:04.0: enabled 1
2005 10:56:51.709120 PCI: 00:05.0: enabled 0
2006 10:56:51.709164 PCI: 00:06.0: enabled 1
2007 10:56:51.709204 PCI: 00:06.2: enabled 0
2008 10:56:51.709243 PCI: 00:07.0: enabled 0
2009 10:56:51.709281 PCI: 00:07.1: enabled 0
2010 10:56:51.709319 PCI: 00:07.2: enabled 0
2011 10:56:51.709356 PCI: 00:07.3: enabled 0
2012 10:56:51.709394 PCI: 00:08.0: enabled 0
2013 10:56:51.709432 PCI: 00:09.0: enabled 0
2014 10:56:51.709470 PCI: 00:0a.0: enabled 1
2015 10:56:51.709508 PCI: 00:0d.0: enabled 1
2016 10:56:51.709546 PCI: 00:0d.1: enabled 0
2017 10:56:51.709585 PCI: 00:0d.2: enabled 0
2018 10:56:51.709624 PCI: 00:0d.3: enabled 0
2019 10:56:51.709661 PCI: 00:0e.0: enabled 0
2020 10:56:51.709699 PCI: 00:10.0: enabled 0
2021 10:56:51.709736 PCI: 00:10.1: enabled 0
2022 10:56:51.709774 PCI: 00:10.6: enabled 0
2023 10:56:51.709812 PCI: 00:10.7: enabled 0
2024 10:56:51.709849 PCI: 00:12.0: enabled 0
2025 10:56:51.709886 PCI: 00:12.6: enabled 0
2026 10:56:51.709925 PCI: 00:12.7: enabled 0
2027 10:56:51.709962 PCI: 00:13.0: enabled 0
2028 10:56:51.710001 PCI: 00:14.0: enabled 1
2029 10:56:51.710039 PCI: 00:14.1: enabled 0
2030 10:56:51.710077 PCI: 00:14.2: enabled 1
2031 10:56:51.710115 PCI: 00:14.3: enabled 1
2032 10:56:51.710154 PCI: 00:15.0: enabled 1
2033 10:56:51.710192 PCI: 00:15.1: enabled 1
2034 10:56:51.710230 PCI: 00:15.2: enabled 0
2035 10:56:51.710268 PCI: 00:15.3: enabled 1
2036 10:56:51.710306 PCI: 00:16.0: enabled 1
2037 10:56:51.710345 PCI: 00:16.1: enabled 0
2038 10:56:51.710384 PCI: 00:16.2: enabled 0
2039 10:56:51.710422 PCI: 00:16.3: enabled 0
2040 10:56:51.710461 PCI: 00:16.4: enabled 0
2041 10:56:51.710498 PCI: 00:16.5: enabled 0
2042 10:56:51.710536 PCI: 00:17.0: enabled 0
2043 10:56:51.710575 PCI: 00:19.0: enabled 0
2044 10:56:51.710612 PCI: 00:19.1: enabled 1
2045 10:56:51.710653 PCI: 00:19.2: enabled 0
2046 10:56:51.710692 PCI: 00:1a.0: enabled 0
2047 10:56:51.710730 PCI: 00:1c.0: enabled 0
2048 10:56:51.710770 PCI: 00:1c.1: enabled 0
2049 10:56:51.710998 PCI: 00:1c.2: enabled 0
2050 10:56:51.711049 PCI: 00:1c.3: enabled 0
2051 10:56:51.711098 PCI: 00:1c.4: enabled 0
2052 10:56:51.711139 PCI: 00:1c.5: enabled 0
2053 10:56:51.711185 PCI: 00:1c.6: enabled 0
2054 10:56:51.711227 PCI: 00:1c.7: enabled 0
2055 10:56:51.711268 PCI: 00:1d.0: enabled 0
2056 10:56:51.711318 PCI: 00:1d.1: enabled 0
2057 10:56:51.711358 PCI: 00:1d.2: enabled 0
2058 10:56:51.711415 PCI: 00:1d.3: enabled 0
2059 10:56:51.711460 PCI: 00:1e.0: enabled 1
2060 10:56:51.711504 PCI: 00:1e.1: enabled 0
2061 10:56:51.711551 PCI: 00:1e.2: enabled 0
2062 10:56:51.711590 PCI: 00:1e.3: enabled 1
2063 10:56:51.711628 PCI: 00:1f.0: enabled 1
2064 10:56:51.711667 PCI: 00:1f.1: enabled 0
2065 10:56:51.711707 PCI: 00:1f.2: enabled 1
2066 10:56:51.711757 PCI: 00:1f.3: enabled 1
2067 10:56:51.711799 PCI: 00:1f.4: enabled 0
2068 10:56:51.711837 PCI: 00:1f.5: enabled 1
2069 10:56:51.711877 PCI: 00:1f.6: enabled 0
2070 10:56:51.711916 PCI: 00:1f.7: enabled 0
2071 10:56:51.711961 GENERIC: 0.0: enabled 1
2072 10:56:51.712004 GENERIC: 0.0: enabled 1
2073 10:56:51.712044 GENERIC: 1.0: enabled 1
2074 10:56:51.712092 GENERIC: 0.0: enabled 1
2075 10:56:51.712141 GENERIC: 1.0: enabled 1
2076 10:56:51.712187 USB0 port 0: enabled 1
2077 10:56:51.712230 USB0 port 0: enabled 1
2078 10:56:51.712269 GENERIC: 0.0: enabled 1
2079 10:56:51.712307 I2C: 00:1a: enabled 1
2080 10:56:51.712345 I2C: 00:31: enabled 1
2081 10:56:51.712382 I2C: 00:32: enabled 1
2082 10:56:51.712429 I2C: 00:50: enabled 1
2083 10:56:51.712469 I2C: 00:10: enabled 1
2084 10:56:51.712507 I2C: 00:15: enabled 1
2085 10:56:51.712544 I2C: 00:2c: enabled 1
2086 10:56:51.712582 GENERIC: 0.0: enabled 1
2087 10:56:51.712625 SPI: 00: enabled 1
2088 10:56:51.712670 PNP: 0c09.0: enabled 1
2089 10:56:51.712708 GENERIC: 0.0: enabled 1
2090 10:56:51.712747 USB3 port 0: enabled 1
2091 10:56:51.712785 USB3 port 1: enabled 0
2092 10:56:51.712823 USB3 port 2: enabled 1
2093 10:56:51.712872 USB3 port 3: enabled 0
2094 10:56:51.712912 USB2 port 0: enabled 1
2095 10:56:51.712951 USB2 port 1: enabled 0
2096 10:56:51.712989 USB2 port 2: enabled 1
2097 10:56:51.713028 USB2 port 3: enabled 0
2098 10:56:51.713071 USB2 port 4: enabled 0
2099 10:56:51.713115 USB2 port 5: enabled 1
2100 10:56:51.713155 USB2 port 6: enabled 0
2101 10:56:51.713194 USB2 port 7: enabled 0
2102 10:56:51.713232 USB2 port 8: enabled 1
2103 10:56:51.713270 USB2 port 9: enabled 1
2104 10:56:51.713317 USB3 port 0: enabled 1
2105 10:56:51.713358 USB3 port 1: enabled 0
2106 10:56:51.713397 USB3 port 2: enabled 0
2107 10:56:51.713436 USB3 port 3: enabled 0
2108 10:56:51.713473 GENERIC: 0.0: enabled 1
2109 10:56:51.713514 GENERIC: 1.0: enabled 1
2110 10:56:51.713561 APIC: 00: enabled 1
2111 10:56:51.713602 APIC: 16: enabled 1
2112 10:56:51.713640 APIC: 10: enabled 1
2113 10:56:51.713678 APIC: 12: enabled 1
2114 10:56:51.713716 APIC: 14: enabled 1
2115 10:56:51.713765 APIC: 09: enabled 1
2116 10:56:51.713806 APIC: 01: enabled 1
2117 10:56:51.713845 APIC: 08: enabled 1
2118 10:56:51.713883 PCI: 01:00.0: enabled 1
2119 10:56:51.713922 BS: BS_DEV_INIT run times (exec / console): 12 / 1126 ms
2120 10:56:51.713965 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2121 10:56:51.714011 ELOG: NV offset 0xf20000 size 0x4000
2122 10:56:51.714051 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2123 10:56:51.714091 ELOG: Event(17) added with size 13 at 2024-06-05 10:56:50 UTC
2124 10:56:51.714131 ELOG: Event(92) added with size 9 at 2024-06-05 10:56:50 UTC
2125 10:56:51.714169 ELOG: Event(93) added with size 9 at 2024-06-05 10:56:50 UTC
2126 10:56:51.714217 ELOG: Event(9E) added with size 10 at 2024-06-05 10:56:50 UTC
2127 10:56:51.714258 ELOG: Event(9F) added with size 14 at 2024-06-05 10:56:50 UTC
2128 10:56:51.714298 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2129 10:56:51.714338 ELOG: Event(A1) added with size 10 at 2024-06-05 10:56:50 UTC
2130 10:56:51.714377 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2131 10:56:51.714424 ELOG: Event(A0) added with size 9 at 2024-06-05 10:56:50 UTC
2132 10:56:51.714466 elog_add_boot_reason: Logged dev mode boot
2133 10:56:51.714505 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2134 10:56:51.714544 Finalize devices...
2135 10:56:51.714581 PCI: 00:16.0 final
2136 10:56:51.714620 PCI: 00:1f.2 final
2137 10:56:51.714668 GENERIC: 0.0 final
2138 10:56:51.714708 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2139 10:56:51.714747 GENERIC: 1.0 final
2140 10:56:51.714802 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2141 10:56:51.714847 Devices finalized
2142 10:56:51.714896 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2143 10:56:51.714937 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2144 10:56:51.714977 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2145 10:56:51.715016 ME: HFSTS1 : 0x80030045
2146 10:56:51.715055 ME: HFSTS2 : 0x30280116
2147 10:56:51.715101 ME: HFSTS3 : 0x00000050
2148 10:56:51.715142 ME: HFSTS4 : 0x00004000
2149 10:56:51.715188 ME: HFSTS5 : 0x00000000
2150 10:56:51.715229 ME: HFSTS6 : 0x40400006
2151 10:56:51.715268 ME: Manufacturing Mode : YES
2152 10:56:51.715316 ME: SPI Protection Mode Enabled : YES
2153 10:56:51.715358 ME: FPFs Committed : YES
2154 10:56:51.715398 ME: Manufacturing Vars Locked : NO
2155 10:56:51.715437 ME: FW Partition Table : OK
2156 10:56:51.715476 ME: Bringup Loader Failure : NO
2157 10:56:51.715516 ME: Firmware Init Complete : NO
2158 10:56:51.715563 ME: Boot Options Present : NO
2159 10:56:51.715602 ME: Update In Progress : NO
2160 10:56:51.715641 ME: D0i3 Support : YES
2161 10:56:51.715680 ME: Low Power State Enabled : NO
2162 10:56:51.715718 ME: CPU Replaced : YES
2163 10:56:51.715764 ME: CPU Replacement Valid : YES
2164 10:56:51.715807 ME: Current Working State : 5
2165 10:56:51.715846 ME: Current Operation State : 1
2166 10:56:51.715885 ME: Current Operation Mode : 3
2167 10:56:51.715923 ME: Error Code : 0
2168 10:56:51.715961 ME: Enhanced Debug Mode : NO
2169 10:56:51.716010 ME: CPU Debug Disabled : YES
2170 10:56:51.716051 ME: TXT Support : NO
2171 10:56:51.716091 ME: WP for RO is enabled : YES
2172 10:56:51.716316 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2173 10:56:51.716365 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2174 10:56:51.716407 ELOG: Event(91) added with size 10 at 2024-06-05 10:56:50 UTC
2175 10:56:51.716457 Chrome EC: clear events_b mask to 0x0000000020004000
2176 10:56:51.716512 Ramoops buffer: 0x100000@0x7689a000.
2177 10:56:51.716557 BS: BS_WRITE_TABLES entry times (exec / console): 3 / 15 ms
2178 10:56:51.716597 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2179 10:56:51.716639 CBFS: 'fallback/slic' not found.
2180 10:56:51.716686 ACPI: Writing ACPI tables at 7686e000.
2181 10:56:51.716727 ACPI: * FACS
2182 10:56:51.716766 ACPI: * DSDT
2183 10:56:51.716805 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2184 10:56:51.716843 ACPI: * FADT
2185 10:56:51.716893 SCI is IRQ9
2186 10:56:51.716935 ACPI: added table 1/32, length now 40
2187 10:56:51.716975 ACPI: * SSDT
2188 10:56:51.717016 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2189 10:56:51.717056 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2190 10:56:51.717105 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2191 10:56:51.717147 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2192 10:56:51.717186 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2193 10:56:51.717225 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2194 10:56:51.717264 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2195 10:56:51.717309 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2196 10:56:51.717352 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2197 10:56:51.717392 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2198 10:56:51.717431 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2199 10:56:51.717470 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2200 10:56:51.717509 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2201 10:56:51.717558 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2202 10:56:51.717598 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2203 10:56:51.717637 PS2K: Passing 80 keymaps to kernel
2204 10:56:51.717677 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2205 10:56:51.717716 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2206 10:56:51.717761 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2207 10:56:51.717804 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2208 10:56:51.717844 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2209 10:56:51.717882 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2210 10:56:51.717922 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2211 10:56:51.717965 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2212 10:56:51.718019 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2213 10:56:51.718062 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2214 10:56:51.718101 ACPI: added table 2/32, length now 44
2215 10:56:51.718140 ACPI: * MCFG
2216 10:56:51.718179 ACPI: added table 3/32, length now 48
2217 10:56:51.718218 ACPI: * TPM2
2218 10:56:51.718257 TPM2 log created at 0x7685e000
2219 10:56:51.718296 ACPI: added table 4/32, length now 52
2220 10:56:51.718336 ACPI: * LPIT
2221 10:56:51.718374 ACPI: added table 5/32, length now 56
2222 10:56:51.718413 ACPI: * MADT
2223 10:56:51.718451 SCI is IRQ9
2224 10:56:51.718490 ACPI: added table 6/32, length now 60
2225 10:56:51.718528 cmd_reg from pmc_make_ipc_cmd 1052838
2226 10:56:51.718568 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2227 10:56:51.718607 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2228 10:56:51.718646 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2229 10:56:51.718685 PMC CrashLog size in discovery mode: 0xC00
2230 10:56:51.718723 cpu crashlog bar addr: 0x80640000
2231 10:56:51.718762 cpu discovery table offset: 0x6030
2232 10:56:51.718800 cpu_crashlog_discovery_table buffer count: 0x3
2233 10:56:51.718839 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2234 10:56:51.718879 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2235 10:56:51.718919 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2236 10:56:51.718958 PMC crashLog size in discovery mode : 0xC00
2237 10:56:51.718998 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2238 10:56:51.719036 discover mode PMC crashlog size adjusted to: 0x200
2239 10:56:51.719075 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2240 10:56:51.719113 discover mode PMC crashlog size adjusted to: 0x0
2241 10:56:51.719152 m_cpu_crashLog_size : 0x3480 bytes
2242 10:56:51.719200 CPU crashLog present.
2243 10:56:51.719250 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2244 10:56:51.719299 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2245 10:56:51.719340 current = 76877550
2246 10:56:51.719379 ACPI: * DMAR
2247 10:56:51.719417 ACPI: added table 7/32, length now 64
2248 10:56:51.719456 ACPI: added table 8/32, length now 68
2249 10:56:51.719495 ACPI: * HPET
2250 10:56:51.719533 ACPI: added table 9/32, length now 72
2251 10:56:51.719572 ACPI: done.
2252 10:56:51.719610 ACPI tables: 38528 bytes.
2253 10:56:51.719649 smbios_write_tables: 76858000
2254 10:56:51.719688 EC returned error result code 3
2255 10:56:51.719728 Couldn't obtain OEM name from CBI
2256 10:56:51.719766 Create SMBIOS type 16
2257 10:56:51.719805 Create SMBIOS type 17
2258 10:56:51.719843 Create SMBIOS type 20
2259 10:56:51.719881 GENERIC: 0.0 (WIFI Device)
2260 10:56:51.719918 SMBIOS tables: 2156 bytes.
2261 10:56:51.719957 Writing table forward entry at 0x00000500
2262 10:56:51.719997 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2263 10:56:51.720036 Writing coreboot table at 0x76892000
2264 10:56:51.720074 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2265 10:56:51.720299 1. 0000000000001000-000000000009ffff: RAM
2266 10:56:51.720347 2. 00000000000a0000-00000000000fffff: RESERVED
2267 10:56:51.720388 3. 0000000000100000-0000000076857fff: RAM
2268 10:56:51.720426 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2269 10:56:51.720466 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2270 10:56:51.720505 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2271 10:56:51.720544 7. 0000000077000000-00000000803fffff: RESERVED
2272 10:56:51.720582 8. 00000000c0000000-00000000cfffffff: RESERVED
2273 10:56:51.720621 9. 00000000f8000000-00000000f9ffffff: RESERVED
2274 10:56:51.720659 10. 00000000fb000000-00000000fb000fff: RESERVED
2275 10:56:51.720699 11. 00000000fc800000-00000000fe7fffff: RESERVED
2276 10:56:51.720738 12. 00000000feb00000-00000000feb7ffff: RESERVED
2277 10:56:51.720777 13. 00000000fec00000-00000000fecfffff: RESERVED
2278 10:56:51.720816 14. 00000000fed40000-00000000fed6ffff: RESERVED
2279 10:56:51.720855 15. 00000000fed80000-00000000fed87fff: RESERVED
2280 10:56:51.720894 16. 00000000fed90000-00000000fed92fff: RESERVED
2281 10:56:51.720933 17. 00000000feda0000-00000000feda1fff: RESERVED
2282 10:56:51.720973 18. 00000000fedc0000-00000000feddffff: RESERVED
2283 10:56:51.721013 19. 0000000100000000-000000027fbfffff: RAM
2284 10:56:51.721052 Passing 4 GPIOs to payload:
2285 10:56:51.721090 NAME | PORT | POLARITY | VALUE
2286 10:56:51.721129 lid | undefined | high | high
2287 10:56:51.721180 power | undefined | high | low
2288 10:56:51.721229 oprom | undefined | high | low
2289 10:56:51.721267 EC in RW | 0x00000151 | high | low
2290 10:56:51.721304 Board ID: 3
2291 10:56:51.721342 FW config: 0x131
2292 10:56:51.721379 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 3291
2293 10:56:51.721417 coreboot table: 1764 bytes.
2294 10:56:51.721454 IMD ROOT 0. 0x76fff000 0x00001000
2295 10:56:51.721492 IMD SMALL 1. 0x76ffe000 0x00001000
2296 10:56:51.721530 FSP MEMORY 2. 0x76afe000 0x00500000
2297 10:56:51.721569 CONSOLE 3. 0x76ade000 0x00020000
2298 10:56:51.721607 RO MCACHE 4. 0x76add000 0x00000fd8
2299 10:56:51.721645 FMAP 5. 0x76adc000 0x0000064a
2300 10:56:51.721682 TIME STAMP 6. 0x76adb000 0x00000910
2301 10:56:51.721720 VBOOT WORK 7. 0x76ac7000 0x00014000
2302 10:56:51.721759 MEM INFO 8. 0x76ac6000 0x000003b8
2303 10:56:51.721797 ROMSTG STCK 9. 0x76ac5000 0x00001000
2304 10:56:51.721836 AFTER CAR 10. 0x76ab9000 0x0000c000
2305 10:56:51.721875 RAMSTAGE 11. 0x76a2f000 0x0008a000
2306 10:56:51.721912 ACPI BERT 12. 0x76a1f000 0x00010000
2307 10:56:51.721950 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2308 10:56:51.721988 REFCODE 14. 0x769af000 0x0006f000
2309 10:56:51.722025 SMM BACKUP 15. 0x7699f000 0x00010000
2310 10:56:51.722063 IGD OPREGION16. 0x7699a000 0x00004203
2311 10:56:51.722101 RAMOOPS 17. 0x7689a000 0x00100000
2312 10:56:51.722140 COREBOOT 18. 0x76892000 0x00008000
2313 10:56:51.722178 ACPI 19. 0x7686e000 0x00024000
2314 10:56:51.722217 TPM2 TCGLOG20. 0x7685e000 0x00010000
2315 10:56:51.722255 PMC CRASHLOG21. 0x7685d000 0x00000c00
2316 10:56:51.722293 CPU CRASHLOG22. 0x76859000 0x00003480
2317 10:56:51.722331 SMBIOS 23. 0x76858000 0x00001000
2318 10:56:51.722369 IMD small region:
2319 10:56:51.722408 IMD ROOT 0. 0x76ffec00 0x00000400
2320 10:56:51.722465 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2321 10:56:51.722508 VPD 2. 0x76ffeb80 0x00000058
2322 10:56:51.722547 POWER STATE 3. 0x76ffeb20 0x00000044
2323 10:56:51.722585 ROMSTAGE 4. 0x76ffeb00 0x00000004
2324 10:56:51.722623 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2325 10:56:51.722662 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2326 10:56:51.722700 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2327 10:56:51.722738 MTRR: Physical address space:
2328 10:56:51.722776 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2329 10:56:51.722816 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2330 10:56:51.722856 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2331 10:56:51.722896 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2332 10:56:51.722935 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2333 10:56:51.722974 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2334 10:56:51.723013 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2335 10:56:51.723052 MTRR: Fixed MSR 0x250 0x0606060606060606
2336 10:56:51.723091 MTRR: Fixed MSR 0x258 0x0606060606060606
2337 10:56:51.723129 MTRR: Fixed MSR 0x259 0x0000000000000000
2338 10:56:51.723167 MTRR: Fixed MSR 0x268 0x0606060606060606
2339 10:56:51.723216 MTRR: Fixed MSR 0x269 0x0606060606060606
2340 10:56:51.723255 MTRR: Fixed MSR 0x26a 0x0606060606060606
2341 10:56:51.723293 MTRR: Fixed MSR 0x26b 0x0606060606060606
2342 10:56:51.723330 MTRR: Fixed MSR 0x26c 0x0606060606060606
2343 10:56:51.723368 MTRR: Fixed MSR 0x26d 0x0606060606060606
2344 10:56:51.723406 MTRR: Fixed MSR 0x26e 0x0606060606060606
2345 10:56:51.723443 MTRR: Fixed MSR 0x26f 0x0606060606060606
2346 10:56:51.723481 call enable_fixed_mtrr()
2347 10:56:51.723519 CPU physical address size: 39 bits
2348 10:56:51.723556 MTRR: default type WB/UC MTRR counts: 6/6.
2349 10:56:51.723594 MTRR: UC selected as default type.
2350 10:56:51.723632 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2351 10:56:51.723670 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2352 10:56:51.723708 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2353 10:56:51.723747 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2354 10:56:51.723785 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2355 10:56:51.724007 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2356 10:56:51.724055 MTRR: Fixed MSR 0x250 0x0606060606060606
2357 10:56:51.724095 MTRR: Fixed MSR 0x258 0x0606060606060606
2358 10:56:51.724133 MTRR: Fixed MSR 0x259 0x0000000000000000
2359 10:56:51.724172 MTRR: Fixed MSR 0x268 0x0606060606060606
2360 10:56:51.724210 MTRR: Fixed MSR 0x269 0x0606060606060606
2361 10:56:51.724249 MTRR: Fixed MSR 0x26a 0x0606060606060606
2362 10:56:51.724287 MTRR: Fixed MSR 0x26b 0x0606060606060606
2363 10:56:51.724325 MTRR: Fixed MSR 0x26c 0x0606060606060606
2364 10:56:51.724362 MTRR: Fixed MSR 0x26d 0x0606060606060606
2365 10:56:51.724400 MTRR: Fixed MSR 0x26e 0x0606060606060606
2366 10:56:51.724438 MTRR: Fixed MSR 0x26f 0x0606060606060606
2367 10:56:51.724476 MTRR: Fixed MSR 0x250 0x0606060606060606
2368 10:56:51.724516 MTRR: Fixed MSR 0x258 0x0606060606060606
2369 10:56:51.724572 MTRR: Fixed MSR 0x259 0x0000000000000000
2370 10:56:51.724614 MTRR: Fixed MSR 0x268 0x0606060606060606
2371 10:56:51.724653 MTRR: Fixed MSR 0x269 0x0606060606060606
2372 10:56:51.724691 MTRR: Fixed MSR 0x250 0x0606060606060606
2373 10:56:51.724730 MTRR: Fixed MSR 0x250 0x0606060606060606
2374 10:56:51.724768 MTRR: Fixed MSR 0x258 0x0606060606060606
2375 10:56:51.724806 MTRR: Fixed MSR 0x259 0x0000000000000000
2376 10:56:51.724844 MTRR: Fixed MSR 0x268 0x0606060606060606
2377 10:56:51.724881 MTRR: Fixed MSR 0x269 0x0606060606060606
2378 10:56:51.724920 MTRR: Fixed MSR 0x250 0x0606060606060606
2379 10:56:51.724959 MTRR: Fixed MSR 0x258 0x0606060606060606
2380 10:56:51.724997 MTRR: Fixed MSR 0x259 0x0000000000000000
2381 10:56:51.725036 MTRR: Fixed MSR 0x268 0x0606060606060606
2382 10:56:51.725074 MTRR: Fixed MSR 0x269 0x0606060606060606
2383 10:56:51.725113 MTRR: Fixed MSR 0x26a 0x0606060606060606
2384 10:56:51.725151 MTRR: Fixed MSR 0x26b 0x0606060606060606
2385 10:56:51.725188 MTRR: Fixed MSR 0x26c 0x0606060606060606
2386 10:56:51.725226 MTRR: Fixed MSR 0x26d 0x0606060606060606
2387 10:56:51.725264 MTRR: Fixed MSR 0x26e 0x0606060606060606
2388 10:56:51.725302 MTRR: Fixed MSR 0x26f 0x0606060606060606
2389 10:56:51.725341 MTRR: Fixed MSR 0x258 0x0606060606060606
2390 10:56:51.725379 MTRR: Fixed MSR 0x26a 0x0606060606060606
2391 10:56:51.725416 MTRR: Fixed MSR 0x250 0x0606060606060606
2392 10:56:51.725454 MTRR: Fixed MSR 0x26b 0x0606060606060606
2393 10:56:51.725492 MTRR: Fixed MSR 0x26c 0x0606060606060606
2394 10:56:51.725530 MTRR: Fixed MSR 0x26d 0x0606060606060606
2395 10:56:51.725569 MTRR: Fixed MSR 0x26e 0x0606060606060606
2396 10:56:51.725606 MTRR: Fixed MSR 0x26f 0x0606060606060606
2397 10:56:51.725644 call enable_fixed_mtrr()
2398 10:56:51.725681 MTRR: Fixed MSR 0x258 0x0606060606060606
2399 10:56:51.725719 MTRR: Fixed MSR 0x259 0x0000000000000000
2400 10:56:51.725757 call enable_fixed_mtrr()
2401 10:56:51.725795 call enable_fixed_mtrr()
2402 10:56:51.725833 MTRR: Fixed MSR 0x268 0x0606060606060606
2403 10:56:51.725871 MTRR: Fixed MSR 0x269 0x0606060606060606
2404 10:56:51.725909 CPU physical address size: 39 bits
2405 10:56:51.725958 CPU physical address size: 39 bits
2406 10:56:51.726008 MTRR: Fixed MSR 0x26a 0x0606060606060606
2407 10:56:51.726047 MTRR: Fixed MSR 0x259 0x0000000000000000
2408 10:56:51.726085 MTRR: Fixed MSR 0x26b 0x0606060606060606
2409 10:56:51.726124 MTRR: Fixed MSR 0x26c 0x0606060606060606
2410 10:56:51.726164 MTRR: Fixed MSR 0x26d 0x0606060606060606
2411 10:56:51.726202 MTRR: Fixed MSR 0x26e 0x0606060606060606
2412 10:56:51.726240 MTRR: Fixed MSR 0x26f 0x0606060606060606
2413 10:56:51.726277 MTRR: Fixed MSR 0x250 0x0606060606060606
2414 10:56:51.726316 CPU physical address size: 39 bits
2415 10:56:51.726354 call enable_fixed_mtrr()
2416 10:56:51.726392 MTRR: Fixed MSR 0x268 0x0606060606060606
2417 10:56:51.726429 CPU physical address size: 39 bits
2418 10:56:51.726467 MTRR: Fixed MSR 0x269 0x0606060606060606
2419 10:56:51.726505 MTRR: Fixed MSR 0x258 0x0606060606060606
2420 10:56:51.726542 MTRR: Fixed MSR 0x26a 0x0606060606060606
2421 10:56:51.726579 MTRR: Fixed MSR 0x26b 0x0606060606060606
2422 10:56:51.726617 MTRR: Fixed MSR 0x26c 0x0606060606060606
2423 10:56:51.726655 MTRR: Fixed MSR 0x26d 0x0606060606060606
2424 10:56:51.726693 MTRR: Fixed MSR 0x26e 0x0606060606060606
2425 10:56:51.726732 MTRR: Fixed MSR 0x26f 0x0606060606060606
2426 10:56:51.726769 MTRR: Fixed MSR 0x26a 0x0606060606060606
2427 10:56:51.726807 call enable_fixed_mtrr()
2428 10:56:51.726845 MTRR: Fixed MSR 0x26b 0x0606060606060606
2429 10:56:51.726883 MTRR: Fixed MSR 0x26c 0x0606060606060606
2430 10:56:51.726919 MTRR: Fixed MSR 0x26d 0x0606060606060606
2431 10:56:51.726957 MTRR: Fixed MSR 0x26e 0x0606060606060606
2432 10:56:51.726995 MTRR: Fixed MSR 0x26f 0x0606060606060606
2433 10:56:51.727033 CPU physical address size: 39 bits
2434 10:56:51.727070 MTRR: Fixed MSR 0x259 0x0000000000000000
2435 10:56:51.727108 MTRR: Fixed MSR 0x268 0x0606060606060606
2436 10:56:51.727146 MTRR: Fixed MSR 0x269 0x0606060606060606
2437 10:56:51.727193 call enable_fixed_mtrr()
2438 10:56:51.727233 MTRR: Fixed MSR 0x26a 0x0606060606060606
2439 10:56:51.727272 MTRR: Fixed MSR 0x26b 0x0606060606060606
2440 10:56:51.727309 MTRR: Fixed MSR 0x26c 0x0606060606060606
2441 10:56:51.727346 MTRR: Fixed MSR 0x26d 0x0606060606060606
2442 10:56:51.727384 MTRR: Fixed MSR 0x26e 0x0606060606060606
2443 10:56:51.727422 MTRR: Fixed MSR 0x26f 0x0606060606060606
2444 10:56:51.727460 CPU physical address size: 39 bits
2445 10:56:51.727498 call enable_fixed_mtrr()
2446 10:56:51.727536 CPU physical address size: 39 bits
2447 10:56:51.727574
2448 10:56:51.727611 MTRR check
2449 10:56:51.727649 Fixed MTRRs : Enabled
2450 10:56:51.727687 Variable MTRRs: Enabled
2451 10:56:51.727725
2452 10:56:51.727763 BS: BS_WRITE_TABLES exit times (exec / console): 248 / 150 ms
2453 10:56:51.727802 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2454 10:56:51.727841 Checking segment from ROM address 0xffc26dac
2455 10:56:51.727898 Checking segment from ROM address 0xffc26dc8
2456 10:56:51.727942 Loading segment from ROM address 0xffc26dac
2457 10:56:51.727981 code (compression=1)
2458 10:56:51.728200 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2459 10:56:51.728249 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2460 10:56:51.728290 using LZMA
2461 10:56:51.728329 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2462 10:56:51.728368 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2463 10:56:51.728406 Loading segment from ROM address 0xffc26dc8
2464 10:56:51.728445 Entry Point 0x30000000
2465 10:56:51.728484 Loaded segments
2466 10:56:51.728521 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2467 10:56:51.728560 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2468 10:56:51.728598 Finalizing chipset.
2469 10:56:51.728636 apm_control: Finalizing SMM.
2470 10:56:51.728673 APMC done.
2471 10:56:51.728712 HECI: CSE device 16.0 is hidden
2472 10:56:51.728751 HECI: CSE device 16.1 is disabled
2473 10:56:51.728789 HECI: CSE device 16.2 is disabled
2474 10:56:51.728827 HECI: CSE device 16.3 is disabled
2475 10:56:51.728865 HECI: CSE device 16.4 is disabled
2476 10:56:51.728904 HECI: CSE device 16.5 is disabled
2477 10:56:51.728941 HECI: CSE device 16.0 is hidden
2478 10:56:51.728979 CSE is disabled, cannot send End-of-Post (EOP) message
2479 10:56:51.729018 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2480 10:56:51.729056 mp_park_aps done after 0 msecs.
2481 10:56:51.729094 Jumping to boot code at 0x30000000(0x76892000)
2482 10:56:51.729131 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2483 10:56:51.729171
2484 10:56:51.729209
2485 10:56:51.729250
2486 10:56:51.729305 Starting depthcharge on Volmar...
2487 10:56:51.729347
2488 10:56:51.729386 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2489 10:56:51.729425
2490 10:56:51.729716 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2491 10:56:51.729791 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2492 10:56:51.729850 Setting prompt string to ['brya:']
2493 10:56:51.729903 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2494 10:56:51.732525 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2495 10:56:51.732586
2496 10:56:51.739249 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2497 10:56:51.739316
2498 10:56:51.742669 configure_storage: Failed to remap 1C:2
2499 10:56:51.742743
2500 10:56:51.745781 Wipe memory regions:
2501 10:56:51.745864
2502 10:56:51.749189 [0x00000000001000, 0x000000000a0000)
2503 10:56:51.749260
2504 10:56:51.752482 [0x00000000100000, 0x00000030000000)
2505 10:56:51.862802
2506 10:56:51.866266 [0x00000032668e60, 0x00000076858000)
2507 10:56:52.020257
2508 10:56:52.023514 [0x00000100000000, 0x0000027fc00000)
2509 10:56:52.889839
2510 10:56:52.892847 ec_init: CrosEC protocol v3 supported (256, 256)
2511 10:56:53.503745
2512 10:56:53.503862 R8152: Initializing
2513 10:56:53.503915
2514 10:56:53.507099 Version 9 (ocp_data = 6010)
2515 10:56:53.507185
2516 10:56:53.510571 R8152: Done initializing
2517 10:56:53.510643
2518 10:56:53.513797 Adding net device
2519 10:56:53.814534
2520 10:56:53.817813 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2521 10:56:53.817892
2522 10:56:53.817939
2523 10:56:53.818204 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2525 10:56:53.918585 brya: tftpboot 192.168.201.1 14182154/tftp-deploy-v_u6r_hr/kernel/bzImage 14182154/tftp-deploy-v_u6r_hr/kernel/cmdline 14182154/tftp-deploy-v_u6r_hr/ramdisk/ramdisk.cpio.gz
2526 10:56:53.918794 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2527 10:56:53.918881 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2528 10:56:53.923910 tftpboot 192.168.201.1 14182154/tftp-deploy-v_u6r_hr/kernel/bzImloy-v_u6r_hr/kernel/cmdline 14182154/tftp-deploy-v_u6r_hr/ramdisk/ramdisk.cpio.gz
2529 10:56:53.923988
2530 10:56:53.924038 Waiting for link
2531 10:56:54.126361
2532 10:56:54.126470 done.
2533 10:56:54.126528
2534 10:56:54.126571 MAC: 00:e0:4c:68:02:ef
2535 10:56:54.126613
2536 10:56:54.129532 Sending DHCP discover... done.
2537 10:56:54.129603
2538 10:56:54.132984 Waiting for reply... done.
2539 10:56:54.133052
2540 10:56:54.136234 Sending DHCP request... done.
2541 10:56:54.136293
2542 10:56:54.142759 Waiting for reply... done.
2543 10:56:54.142835
2544 10:56:54.142882 My ip is 192.168.201.16
2545 10:56:54.142924
2546 10:56:54.146081 The DHCP server ip is 192.168.201.1
2547 10:56:54.146140
2548 10:56:54.152456 TFTP server IP predefined by user: 192.168.201.1
2549 10:56:54.152525
2550 10:56:54.159702 Bootfile predefined by user: 14182154/tftp-deploy-v_u6r_hr/kernel/bzImage
2551 10:56:54.159777
2552 10:56:54.162921 Sending tftp read request... done.
2553 10:56:54.162980
2554 10:56:54.165958 Waiting for the transfer...
2555 10:56:54.166022
2556 10:56:54.395372 00000000 ################################################################
2557 10:56:54.395487
2558 10:56:54.623390 00080000 ################################################################
2559 10:56:54.623526
2560 10:56:54.851121 00100000 ################################################################
2561 10:56:54.851242
2562 10:56:55.077008 00180000 ################################################################
2563 10:56:55.077118
2564 10:56:55.303882 00200000 ################################################################
2565 10:56:55.304001
2566 10:56:55.531756 00280000 ################################################################
2567 10:56:55.531866
2568 10:56:55.758277 00300000 ################################################################
2569 10:56:55.758391
2570 10:56:55.985046 00380000 ################################################################
2571 10:56:55.985173
2572 10:56:56.212216 00400000 ################################################################
2573 10:56:56.212354
2574 10:56:56.439860 00480000 ################################################################
2575 10:56:56.439974
2576 10:56:56.666951 00500000 ################################################################
2577 10:56:56.667065
2578 10:56:56.890536 00580000 ################################################################
2579 10:56:56.890640
2580 10:56:57.115767 00600000 ################################################################
2581 10:56:57.115872
2582 10:56:57.344432 00680000 ################################################################
2583 10:56:57.344536
2584 10:56:57.571940 00700000 ################################################################
2585 10:56:57.572053
2586 10:56:57.798385 00780000 ################################################################
2587 10:56:57.798484
2588 10:56:58.027595 00800000 ################################################################
2589 10:56:58.027704
2590 10:56:58.257714 00880000 ################################################################
2591 10:56:58.257823
2592 10:56:58.485705 00900000 ################################################################
2593 10:56:58.485816
2594 10:56:58.714454 00980000 ################################################################
2595 10:56:58.714566
2596 10:56:58.941652 00a00000 ################################################################
2597 10:56:58.941762
2598 10:56:59.170563 00a80000 ################################################################
2599 10:56:59.170677
2600 10:56:59.398813 00b00000 ################################################################
2601 10:56:59.398926
2602 10:56:59.628517 00b80000 ################################################################
2603 10:56:59.628629
2604 10:56:59.856529 00c00000 ################################################################
2605 10:56:59.856646
2606 10:57:00.083194 00c80000 ################################################################
2607 10:57:00.083305
2608 10:57:00.311901 00d00000 ################################################################
2609 10:57:00.312015
2610 10:57:00.540200 00d80000 ################################################################
2611 10:57:00.540330
2612 10:57:00.767689 00e00000 ################################################################
2613 10:57:00.767803
2614 10:57:00.995349 00e80000 ################################################################
2615 10:57:00.995457
2616 10:57:01.224201 00f00000 ################################################################
2617 10:57:01.224312
2618 10:57:01.453722 00f80000 ################################################################
2619 10:57:01.453832
2620 10:57:01.681892 01000000 ################################################################
2621 10:57:01.682002
2622 10:57:01.909735 01080000 ################################################################
2623 10:57:01.909846
2624 10:57:02.138007 01100000 ################################################################
2625 10:57:02.138116
2626 10:57:02.365264 01180000 ################################################################
2627 10:57:02.365388
2628 10:57:02.592165 01200000 ################################################################
2629 10:57:02.592275
2630 10:57:02.716289 01280000 #################################### done.
2631 10:57:02.716396
2632 10:57:02.719563 The bootfile was 19685728 bytes long.
2633 10:57:02.719622
2634 10:57:02.722801 Sending tftp read request... done.
2635 10:57:02.722869
2636 10:57:02.726154 Waiting for the transfer...
2637 10:57:02.726238
2638 10:57:02.953782 00000000 ################################################################
2639 10:57:02.953891
2640 10:57:03.180419 00080000 ################################################################
2641 10:57:03.180524
2642 10:57:03.406464 00100000 ################################################################
2643 10:57:03.406578
2644 10:57:03.632583 00180000 ################################################################
2645 10:57:03.632707
2646 10:57:03.859757 00200000 ################################################################
2647 10:57:03.859903
2648 10:57:04.085931 00280000 ################################################################
2649 10:57:04.086092
2650 10:57:04.312603 00300000 ################################################################
2651 10:57:04.312732
2652 10:57:04.538753 00380000 ################################################################
2653 10:57:04.538882
2654 10:57:04.764832 00400000 ################################################################
2655 10:57:04.764963
2656 10:57:04.991748 00480000 ################################################################
2657 10:57:04.991866
2658 10:57:05.218180 00500000 ################################################################
2659 10:57:05.218304
2660 10:57:05.446747 00580000 ################################################################
2661 10:57:05.446866
2662 10:57:05.673336 00600000 ################################################################
2663 10:57:05.673469
2664 10:57:05.899076 00680000 ################################################################
2665 10:57:05.899217
2666 10:57:06.123562 00700000 ################################################################
2667 10:57:06.123686
2668 10:57:06.349556 00780000 ################################################################
2669 10:57:06.349689
2670 10:57:06.416870 00800000 ################### done.
2671 10:57:06.416991
2672 10:57:06.420141 Sending tftp read request... done.
2673 10:57:06.420229
2674 10:57:06.423439 Waiting for the transfer...
2675 10:57:06.423506
2676 10:57:06.423555 00000000 # done.
2677 10:57:06.423602
2678 10:57:06.433378 Command line loaded dynamically from TFTP file: 14182154/tftp-deploy-v_u6r_hr/kernel/cmdline
2679 10:57:06.433442
2680 10:57:06.456872 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14182154/extract-nfsrootfs-v0r6p8ma,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2681 10:57:06.464748
2682 10:57:06.468130 Shutting down all USB controllers.
2683 10:57:06.468215
2684 10:57:06.468265 Removing current net device
2685 10:57:06.468319
2686 10:57:06.471259 Finalizing coreboot
2687 10:57:06.471319
2688 10:57:06.478295 Exiting depthcharge with code 4 at timestamp: 24639533
2689 10:57:06.478362
2690 10:57:06.478410
2691 10:57:06.478453 Starting kernel ...
2692 10:57:06.478493
2693 10:57:06.478533
2694 10:57:06.478878 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2695 10:57:06.478954 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2696 10:57:06.479011 Setting prompt string to ['Linux version [0-9]']
2697 10:57:06.479062 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2698 10:57:06.479113 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2700 11:01:37.479868 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2702 11:01:37.480640 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2704 11:01:37.481219 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2707 11:01:37.482175 end: 2 depthcharge-action (duration 00:05:00) [common]
2709 11:01:37.482981 Cleaning after the job
2710 11:01:37.483340 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/ramdisk
2711 11:01:37.487900 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/kernel
2712 11:01:37.494318 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/nfsrootfs
2713 11:01:37.521784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14182154/tftp-deploy-v_u6r_hr/modules
2714 11:01:37.522923 start: 4.1 power-off (timeout 00:00:30) [common]
2715 11:01:37.523065 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-3', '--port=1', '--command=off']
2716 11:01:38.455015 >> Command sent successfully.
2717 11:01:38.461285 Returned 0 in 0 seconds
2718 11:01:38.561854 end: 4.1 power-off (duration 00:00:01) [common]
2720 11:01:38.562913 start: 4.2 read-feedback (timeout 00:09:59) [common]
2721 11:01:38.563761 Listened to connection for namespace 'common' for up to 1s
2723 11:01:38.564720 Listened to connection for namespace 'common' for up to 1s
2724 11:01:39.564716 Finalising connection for namespace 'common'
2725 11:01:39.565257 Disconnecting from shell: Finalise
2726 11:01:39.565592
2727 11:01:39.666437 end: 4.2 read-feedback (duration 00:00:01) [common]
2728 11:01:39.666921 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14182154
2729 11:01:39.772686 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14182154
2730 11:01:39.772872 JobError: Your job cannot terminate cleanly.