Boot log: qemu_arm64-virt-gicv3
- Errors: 0
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
1 22:14:46.142096 lava-dispatcher, installed at version: 2023.01
2 22:14:46.142289 start: 0 validate
3 22:14:46.142400 Start time: 2023-06-04 22:14:46.142394+00:00 (UTC)
4 22:14:46.143432 Validating that http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image exists
5 22:14:46.497929 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz exists
6 22:14:46.675027 cmd: ['docker', 'pull', 'kernelci/qemu']
7 22:14:46.675282 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 22:14:46.841174 >> Using default tag: latest
9 22:14:47.936227 >> latest: Pulling from kernelci/qemu
10 22:14:47.975358 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
11 22:14:47.975584 >> Status: Image is up to date for kernelci/qemu:latest
12 22:14:48.008661 >> docker.io/kernelci/qemu:latest
13 22:14:48.011938 Returned 0 in 1 seconds
14 22:14:48.149656 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 22:14:48.150136 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 22:14:50.145639 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 22:14:50.146097 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 22:14:51.886761 Returned 0 in 3 seconds
19 22:14:51.988063 validate duration: 5.85
21 22:14:51.988654 start: 1 deployimages (timeout 00:03:00) [common]
22 22:14:51.988843 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 22:14:51.989340 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e
24 22:14:51.989610 makedir: /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin
25 22:14:51.989845 makedir: /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/tests
26 22:14:51.990050 makedir: /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/results
27 22:14:51.990262 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-add-keys
28 22:14:51.990547 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-add-sources
29 22:14:51.990801 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-background-process-start
30 22:14:51.991054 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-background-process-stop
31 22:14:51.991303 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-common-functions
32 22:14:51.991544 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-echo-ipv4
33 22:14:51.991788 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-install-packages
34 22:14:51.992058 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-installed-packages
35 22:14:51.992308 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-os-build
36 22:14:51.992553 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-probe-channel
37 22:14:51.992792 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-probe-ip
38 22:14:51.993034 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-target-ip
39 22:14:51.993269 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-target-mac
40 22:14:51.993505 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-target-storage
41 22:14:51.993759 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-case
42 22:14:51.994009 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-event
43 22:14:51.994249 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-feedback
44 22:14:51.994485 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-raise
45 22:14:51.994731 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-reference
46 22:14:51.994972 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-runner
47 22:14:51.995214 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-set
48 22:14:51.995453 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-test-shell
49 22:14:51.995702 Updating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-install-packages (oe)
50 22:14:51.996027 Updating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/bin/lava-installed-packages (oe)
51 22:14:51.996302 Creating /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/environment
52 22:14:51.996506 LAVA metadata
53 22:14:51.996655 - LAVA_JOB_ID=559902
54 22:14:51.996787 - LAVA_DISPATCHER_IP=172.27.0.2
55 22:14:51.997002 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 22:14:51.997138 skipped lava-vland-overlay
57 22:14:51.997292 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 22:14:51.997459 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 22:14:51.997590 skipped lava-multinode-overlay
60 22:14:51.997753 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 22:14:51.997915 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 22:14:51.998072 Loading test definitions
63 22:14:51.998258 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 22:14:51.998413 Using /lava-559902 at stage 0
65 22:14:51.999028 uuid=559902_1.1.3.1 testdef=None
66 22:14:51.999215 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 22:14:51.999380 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 22:14:52.000313 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 22:14:52.000800 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 22:14:52.001949 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 22:14:52.002450 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 22:14:52.003535 runner path: /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/0/tests/0_timesync-off test_uuid 559902_1.1.3.1
75 22:14:52.003830 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 22:14:52.004338 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 22:14:52.004484 Using /lava-559902 at stage 0
79 22:14:52.004683 Fetching tests from https://github.com/kernelci/test-definitions.git
80 22:14:52.004835 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/0/tests/1_kselftest-arm64_qemu'
81 22:14:54.642688 Running '/usr/bin/git checkout kernelci.org
82 22:14:54.809966 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 22:14:54.811048 uuid=559902_1.1.3.5 testdef=None
84 22:14:54.811296 end: 1.1.3.5 git-repo-action (duration 00:00:03) [common]
86 22:14:54.811780 start: 1.1.3.6 test-overlay (timeout 00:02:57) [common]
87 22:14:54.813377 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 22:14:54.813882 start: 1.1.3.7 test-install-overlay (timeout 00:02:57) [common]
90 22:14:54.816106 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 22:14:54.816647 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:57) [common]
93 22:14:54.818738 runner path: /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/0/tests/1_kselftest-arm64_qemu test_uuid 559902_1.1.3.5
94 22:14:54.818913 BOARD='qemu_arm64-virt-gicv3'
95 22:14:54.819038 BRANCH='cip'
96 22:14:54.819156 SKIPFILE='/dev/null'
97 22:14:54.819275 SKIP_INSTALL='True'
98 22:14:54.819391 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
99 22:14:54.819511 TST_CASENAME=''
100 22:14:54.819628 TST_CMDFILES='arm64'
101 22:14:54.819893 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 22:14:54.820383 Creating lava-test-runner.conf files
104 22:14:54.820510 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/559902/lava-overlay-a_nmrq7e/lava-559902/0 for stage 0
105 22:14:54.820691 - 0_timesync-off
106 22:14:54.820827 - 1_kselftest-arm64_qemu
107 22:14:54.821009 end: 1.1.3 test-definition (duration 00:00:03) [common]
108 22:14:54.821174 start: 1.1.4 compress-overlay (timeout 00:02:57) [common]
109 22:15:03.583473 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 22:15:03.583711 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:48) [common]
111 22:15:03.583840 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 22:15:03.584000 end: 1.1 lava-overlay (duration 00:00:12) [common]
113 22:15:03.584136 start: 1.2 apply-overlay-guest (timeout 00:02:48) [common]
114 22:15:03.584253 Overlay: /var/lib/lava/dispatcher/tmp/559902/compress-overlay-r7e3u5ri/overlay-1.1.4.tar.gz
115 22:15:18.436416 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 22:15:18.436864 start: 1.3 deploy-device-env (timeout 00:02:34) [common]
118 22:15:18.436952 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 22:15:18.437038 start: 1.4 download-retry (timeout 00:02:34) [common]
120 22:15:18.437125 start: 1.4.1 http-download (timeout 00:02:34) [common]
121 22:15:18.437295 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
122 22:15:18.437366 saving as /var/lib/lava/dispatcher/tmp/559902/deployimages-tccwjnzw/kernel/Image
123 22:15:18.437428 total size: 45746688 (43MB)
124 22:15:18.437489 No compression specified
125 22:15:18.789744 progress 0% (0MB)
126 22:15:19.845487 progress 5% (2MB)
127 22:15:20.220983 progress 10% (4MB)
128 22:15:20.390558 progress 15% (6MB)
129 22:15:20.569508 progress 20% (8MB)
130 22:15:20.744763 progress 25% (10MB)
131 22:15:20.919137 progress 30% (13MB)
132 22:15:21.093488 progress 35% (15MB)
133 22:15:21.267489 progress 40% (17MB)
134 22:15:21.441017 progress 45% (19MB)
135 22:15:21.460856 progress 50% (21MB)
136 22:15:21.633833 progress 55% (24MB)
137 22:15:21.806863 progress 60% (26MB)
138 22:15:21.980937 progress 65% (28MB)
139 22:15:22.152646 progress 70% (30MB)
140 22:15:22.324277 progress 75% (32MB)
141 22:15:22.495552 progress 80% (34MB)
142 22:15:22.516739 progress 85% (37MB)
143 22:15:22.688241 progress 90% (39MB)
144 22:15:22.859167 progress 95% (41MB)
145 22:15:23.029887 progress 100% (43MB)
146 22:15:23.030198 43MB downloaded in 4.59s (9.50MB/s)
147 22:15:23.030488 end: 1.4.1 http-download (duration 00:00:05) [common]
149 22:15:23.031014 end: 1.4 download-retry (duration 00:00:05) [common]
150 22:15:23.031229 start: 1.5 download-retry (timeout 00:02:29) [common]
151 22:15:23.031415 start: 1.5.1 http-download (timeout 00:02:29) [common]
152 22:15:23.031680 Not decompressing ramdisk as can be used compressed.
153 22:15:23.031873 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz
154 22:15:23.032011 saving as /var/lib/lava/dispatcher/tmp/559902/deployimages-tccwjnzw/ramdisk/rootfs.cpio.gz
155 22:15:23.032161 total size: 88976554 (84MB)
156 22:15:23.032310 No compression specified
157 22:15:23.209519 progress 0% (0MB)
158 22:15:23.582555 progress 5% (4MB)
159 22:15:24.113287 progress 10% (8MB)
160 22:15:24.641233 progress 15% (12MB)
161 22:15:25.167564 progress 20% (17MB)
162 22:15:25.692558 progress 25% (21MB)
163 22:15:26.216422 progress 30% (25MB)
164 22:15:26.579352 progress 35% (29MB)
165 22:15:27.102199 progress 40% (33MB)
166 22:15:27.624159 progress 45% (38MB)
167 22:15:27.985470 progress 50% (42MB)
168 22:15:28.507036 progress 55% (46MB)
169 22:15:29.027610 progress 60% (50MB)
170 22:15:29.388942 progress 65% (55MB)
171 22:15:29.909141 progress 70% (59MB)
172 22:15:30.427824 progress 75% (63MB)
173 22:15:30.791187 progress 80% (67MB)
174 22:15:31.310169 progress 85% (72MB)
175 22:15:31.672067 progress 90% (76MB)
176 22:15:32.191373 progress 95% (80MB)
177 22:15:32.709516 progress 100% (84MB)
178 22:15:32.709872 84MB downloaded in 9.68s (8.77MB/s)
179 22:15:32.710161 end: 1.5.1 http-download (duration 00:00:10) [common]
181 22:15:32.710699 end: 1.5 download-retry (duration 00:00:10) [common]
182 22:15:32.710884 end: 1 deployimages (duration 00:00:41) [common]
183 22:15:32.711074 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 22:15:32.711257 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 22:15:32.711441 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 22:15:32.711826 Extending command line for qcow2 test overlay
187 22:15:32.712453 Pulling docker image
188 22:15:32.712621 cmd: ['docker', 'pull', 'kernelci/qemu']
189 22:15:32.712775 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 22:15:32.872667 >> Using default tag: latest
191 22:15:34.023321 >> latest: Pulling from kernelci/qemu
192 22:15:34.054997 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
193 22:15:34.055263 >> Status: Image is up to date for kernelci/qemu:latest
194 22:15:34.105228 >> docker.io/kernelci/qemu:latest
195 22:15:34.108577 Returned 0 in 1 seconds
196 22:15:34.245917 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-559902-2.1.1-hxuyj9z0co --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/559902/deployimages-tccwjnzw/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/559902/deployimages-tccwjnzw/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/559902/apply-overlay-guest-6ep_h241/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 22:15:34.390097 started a shell command
198 22:15:34.390606 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 22:15:34.390801 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 22:15:34.390977 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 22:15:34.391143 Setting prompt string to ['Linux version [0-9]']
202 22:15:34.391281 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 22:15:37.052639 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 22:15:37.053159 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1606555-arm64-gcc-10-defconfig-arm64-chromebook-vtq55) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 4 21:56:05 UTC 2023
205 22:15:37.053304 [ 0.000000] random: crng init done
206 22:15:37.053460 [ 0.000000] Machine model: linux,dummy-virt
207 22:15:37.053588 [ 0.000000] efi: UEFI not found.
208 22:15:37.053721 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
209 22:15:37.053862 [ 0.000000] printk: bootconsole [pl11] enabled
210 22:15:37.054256 start: 2.2.1 login-action (timeout 00:04:56) [common]
211 22:15:37.054412 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
212 22:15:37.054582 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
213 22:15:37.054740 Using line separator: #'\n'#
214 22:15:37.054862 No login prompt set.
215 22:15:37.054989 Parsing kernel messages
216 22:15:37.055105 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
217 22:15:37.055323 [login-action] Waiting for messages, (timeout 00:04:56)
218 22:15:37.057301 [ 0.000000] NUMA: No NUMA configuration found
219 22:15:37.057468 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 22:15:37.058064 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf3a00-0x7fdf5fff]
221 22:15:37.060113 [ 0.000000] Zone ranges:
222 22:15:37.060686 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 22:15:37.060946 [ 0.000000] DMA32 empty
224 22:15:37.061128 [ 0.000000] Normal empty
225 22:15:37.061268 [ 0.000000] Movable zone start for each node
226 22:15:37.061446 [ 0.000000] Early memory node ranges
227 22:15:37.061583 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 22:15:37.061754 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 22:15:37.075946 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 22:15:37.076794 [ 0.000000] psci: probing for conduit method from DT.
231 22:15:37.077240 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 22:15:37.077448 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 22:15:37.077633 [ 0.000000] psci: Trusted OS migration not required
234 22:15:37.077779 [ 0.000000] psci: SMC Calling Convention v1.0
235 22:15:37.079913 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
236 22:15:37.080299 [ 0.000000] pcpu-alloc: s45224 r8192 d32600 u86016 alloc=21*4096
237 22:15:37.080683 [ 0.000000] pcpu-alloc: [0] 0
238 22:15:37.081850 [ 0.000000] Detected PIPT I-cache on CPU0
239 22:15:37.087214 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 22:15:37.087860 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 22:15:37.088051 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 22:15:37.088238 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 22:15:37.088397 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 22:15:37.088781 [ 0.000000] CPU features: detected: Spectre-v4
245 22:15:37.092803 [ 0.000000] alternatives: applying boot alternatives
246 22:15:37.095347 [ 0.000000] Fallback order for Node 0: 0
247 22:15:37.095518 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 22:15:37.095676 [ 0.000000] Policy zone: DMA
249 22:15:37.096097 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 22:15:37.098474 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 22:15:37.101217 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 22:15:37.101625 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 22:15:37.102026 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 22:15:37.113674 <6>[ 0.000000] Memory: 862480K/1048576K available (17984K kernel code, 4098K rwdata, 14068K rodata, 8384K init, 615K bss, 153328K reserved, 32768K cma-reserved)
255 22:15:37.119380 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 22:15:37.126039 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 22:15:37.126218 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 22:15:37.126452 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 22:15:37.126650 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 22:15:37.126858 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 22:15:37.127023 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 22:15:37.127152 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 22:15:37.127989 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 22:15:37.134761 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 22:15:37.134935 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 22:15:37.136503 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 22:15:37.136669 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 22:15:37.137339 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 22:15:37.141436 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 22:15:37.142427 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @43030000 (indirect, esz 8, psz 64K, shr 1)
271 22:15:37.142629 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @43040000 (flat, esz 8, psz 64K, shr 1)
272 22:15:37.143440 <6>[ 0.000000] GICv3: using LPI property table @0x0000000043050000
273 22:15:37.144135 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000043060000
274 22:15:37.145333 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 22:15:37.153412 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 22:15:37.153793 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 22:15:37.154464 <6>[ 0.000073] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 22:15:37.171316 <6>[ 0.014441] Console: colour dummy device 80x25
279 22:15:37.175192 <6>[ 0.020203] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 22:15:37.175311 <6>[ 0.021030] pid_max: default: 32768 minimum: 301
281 22:15:37.176812 <6>[ 0.022437] LSM: Security Framework initializing
282 22:15:37.180964 <6>[ 0.026520] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 22:15:37.181130 <6>[ 0.026774] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 22:15:37.212494 <4>[ 0.058025] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 22:15:37.218110 <6>[ 0.063701] cblist_init_generic: Setting adjustable number of callback queues.
286 22:15:37.218313 <6>[ 0.064061] cblist_init_generic: Setting shift to 0 and lim to 1.
287 22:15:37.219001 <6>[ 0.064586] cblist_init_generic: Setting shift to 0 and lim to 1.
288 22:15:37.220585 <6>[ 0.066210] rcu: Hierarchical SRCU implementation.
289 22:15:37.220743 <6>[ 0.066390] rcu: Max phase no-delay instances is 1000.
290 22:15:37.225409 <6>[ 0.071029] Platform MSI: its@8080000 domain created
291 22:15:37.226206 <6>[ 0.071660] PCI/MSI: /intc@8000000/its@8080000 domain created
292 22:15:37.226399 <6>[ 0.072253] fsl-mc MSI: its@8080000 domain created
293 22:15:37.229710 <6>[ 0.075586] EFI services will not be available.
294 22:15:37.230782 <6>[ 0.076409] smp: Bringing up secondary CPUs ...
295 22:15:37.231244 <6>[ 0.076995] smp: Brought up 1 node, 1 CPU
296 22:15:37.231453 <6>[ 0.077152] SMP: Total of 1 processors activated.
297 22:15:37.231723 <6>[ 0.077504] CPU features: detected: Branch Target Identification
298 22:15:37.231947 <6>[ 0.077723] CPU features: detected: 32-bit EL0 Support
299 22:15:37.232140 <6>[ 0.077869] CPU features: detected: 32-bit EL1 Support
300 22:15:37.232338 <6>[ 0.078003] CPU features: detected: ARMv8.4 Translation Table Level
301 22:15:37.232526 <6>[ 0.078192] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 22:15:37.232768 <6>[ 0.078463] CPU features: detected: Common not Private translations
303 22:15:37.232941 <6>[ 0.078651] CPU features: detected: CRC32 instructions
304 22:15:37.233095 <6>[ 0.078805] CPU features: detected: E0PD
305 22:15:37.233277 <6>[ 0.078975] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 22:15:37.233475 <6>[ 0.079142] CPU features: detected: RCpc load-acquire (LDAPR)
307 22:15:37.233642 <6>[ 0.079311] CPU features: detected: LSE atomic instructions
308 22:15:37.233889 <6>[ 0.079465] CPU features: detected: Privileged Access Never
309 22:15:37.234045 <6>[ 0.079640] CPU features: detected: RAS Extension Support
310 22:15:37.234199 <6>[ 0.079809] CPU features: detected: Random Number Generator
311 22:15:37.234327 <6>[ 0.079984] CPU features: detected: Speculation barrier (SB)
312 22:15:37.234553 <6>[ 0.080139] CPU features: detected: Stage-2 Force Write-Back
313 22:15:37.234718 <6>[ 0.080290] CPU features: detected: TLB range maintenance instructions
314 22:15:37.234872 <6>[ 0.080459] CPU features: detected: Scalable Matrix Extension
315 22:15:37.235094 <6>[ 0.080800] CPU features: detected: FA64
316 22:15:37.235262 <6>[ 0.080920] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 22:15:37.235420 <6>[ 0.081109] CPU features: detected: Scalable Vector Extension
318 22:15:37.246364 <6>[ 0.089546] SVE: maximum available vector length 256 bytes per vector
319 22:15:37.246934 <6>[ 0.092760] SVE: default vector length 64 bytes per vector
320 22:15:37.248893 <6>[ 0.094542] SME: minimum available vector length 16 bytes per vector
321 22:15:37.249054 <6>[ 0.094721] SME: maximum available vector length 256 bytes per vector
322 22:15:37.249202 <6>[ 0.094888] SME: default vector length 32 bytes per vector
323 22:15:37.249609 <6>[ 0.095282] CPU: All CPU(s) started at EL1
324 22:15:37.249798 <6>[ 0.095627] alternatives: applying system-wide alternatives
325 22:15:37.301843 <6>[ 0.147520] devtmpfs: initialized
326 22:15:37.321327 <6>[ 0.166766] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 22:15:37.321822 <6>[ 0.167519] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 22:15:37.327521 <6>[ 0.173145] pinctrl core: initialized pinctrl subsystem
329 22:15:37.337992 <6>[ 0.183880] DMI not present or invalid.
330 22:15:37.347005 <6>[ 0.192613] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 22:15:37.358375 <6>[ 0.203773] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 22:15:37.358821 <6>[ 0.204493] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 22:15:37.359249 <6>[ 0.204921] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 22:15:37.359510 <6>[ 0.205357] audit: initializing netlink subsys (disabled)
335 22:15:37.365592 <5>[ 0.211237] audit: type=2000 audit(0.176:1): state=initialized audit_enabled=0 res=1
336 22:15:37.367367 <6>[ 0.212933] thermal_sys: Registered thermal governor 'step_wise'
337 22:15:37.367771 <6>[ 0.213002] thermal_sys: Registered thermal governor 'power_allocator'
338 22:15:37.367906 <6>[ 0.213548] cpuidle: using governor menu
339 22:15:37.368975 <6>[ 0.214642] NET: Registered PF_QIPCRTR protocol family
340 22:15:37.371901 <6>[ 0.217525] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
341 22:15:37.372354 <6>[ 0.218116] ASID allocator initialised with 65536 entries
342 22:15:37.378155 <6>[ 0.224019] Serial: AMBA PL011 UART driver
343 22:15:37.427025 <6>[ 0.272609] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
344 22:15:37.428696 <6>[ 0.274176] printk: console [ttyAMA0] enabled
345 22:15:37.428874 <6>[ 0.274176] printk: console [ttyAMA0] enabled
346 22:15:37.429084 <6>[ 0.274601] printk: bootconsole [pl11] disabled
347 22:15:37.429230 <6>[ 0.274601] printk: bootconsole [pl11] disabled
348 22:15:37.439242 <6>[ 0.285105] KASLR enabled
349 22:15:37.474806 <6>[ 0.320169] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
350 22:15:37.475088 <6>[ 0.320481] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
351 22:15:37.475326 <6>[ 0.320661] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
352 22:15:37.475498 <6>[ 0.320823] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
353 22:15:37.475661 <6>[ 0.321039] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
354 22:15:37.475879 <6>[ 0.321239] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
355 22:15:37.476059 <6>[ 0.321428] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
356 22:15:37.476193 <6>[ 0.321578] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
357 22:15:37.485199 <6>[ 0.330823] ACPI: Interpreter disabled.
358 22:15:37.493184 <6>[ 0.339024] iommu: Default domain type: Translated
359 22:15:37.493694 <6>[ 0.339196] iommu: DMA domain TLB invalidation policy: strict mode
360 22:15:37.495153 <5>[ 0.341032] SCSI subsystem initialized
361 22:15:37.496284 <7>[ 0.341886] libata version 3.00 loaded.
362 22:15:37.497716 <6>[ 0.343289] usbcore: registered new interface driver usbfs
363 22:15:37.497920 <6>[ 0.343721] usbcore: registered new interface driver hub
364 22:15:37.498361 <6>[ 0.344049] usbcore: registered new device driver usb
365 22:15:37.502285 <6>[ 0.347843] pps_core: LinuxPPS API ver. 1 registered
366 22:15:37.502451 <6>[ 0.348017] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
367 22:15:37.502605 <6>[ 0.348376] PTP clock support registered
368 22:15:37.503191 <6>[ 0.349075] EDAC MC: Ver: 3.0.0
369 22:15:37.508954 <6>[ 0.354844] FPGA manager framework
370 22:15:37.510056 <6>[ 0.355697] Advanced Linux Sound Architecture Driver Initialized.
371 22:15:37.518700 <6>[ 0.364548] vgaarb: loaded
372 22:15:37.522725 <6>[ 0.368320] clocksource: Switched to clocksource arch_sys_counter
373 22:15:37.523863 <5>[ 0.369503] VFS: Disk quotas dquot_6.6.0
374 22:15:37.524045 <6>[ 0.369761] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
375 22:15:37.527506 <6>[ 0.373119] pnp: PnP ACPI: disabled
376 22:15:37.544993 <6>[ 0.390599] NET: Registered PF_INET protocol family
377 22:15:37.547143 <6>[ 0.392734] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
378 22:15:37.551796 <6>[ 0.397460] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
379 22:15:37.552169 <6>[ 0.397815] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
380 22:15:37.552552 <6>[ 0.398136] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
381 22:15:37.552910 <6>[ 0.398652] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
382 22:15:37.553612 <6>[ 0.399292] TCP: Hash tables configured (established 8192 bind 8192)
383 22:15:37.554918 <6>[ 0.400588] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
384 22:15:37.555260 <6>[ 0.400970] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
385 22:15:37.556522 <6>[ 0.402216] NET: Registered PF_UNIX/PF_LOCAL protocol family
386 22:15:37.558837 <6>[ 0.404508] RPC: Registered named UNIX socket transport module.
387 22:15:37.558943 <6>[ 0.404692] RPC: Registered udp transport module.
388 22:15:37.559049 <6>[ 0.404802] RPC: Registered tcp transport module.
389 22:15:37.559380 <6>[ 0.404968] RPC: Registered tcp NFSv4.1 backchannel transport module.
390 22:15:37.559496 <6>[ 0.405296] PCI: CLS 0 bytes, default 64
391 22:15:37.564110 <6>[ 0.409788] Unpacking initramfs...
392 22:15:37.574847 <6>[ 0.420474] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
393 22:15:37.575420 <6>[ 0.421281] kvm [1]: HYP mode not available
394 22:15:37.583586 <5>[ 0.429230] Initialise system trusted keyrings
395 22:15:37.585039 <6>[ 0.430699] workingset: timestamp_bits=42 max_order=18 bucket_order=0
396 22:15:37.625616 <6>[ 0.471348] squashfs: version 4.0 (2009/01/31) Phillip Lougher
397 22:15:37.632192 <5>[ 0.478032] NFS: Registering the id_resolver key type
398 22:15:37.632655 <5>[ 0.478393] Key type id_resolver registered
399 22:15:37.632811 <5>[ 0.478520] Key type id_legacy registered
400 22:15:37.633211 <6>[ 0.478993] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
401 22:15:37.633414 <6>[ 0.479216] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
402 22:15:37.638416 <6>[ 0.484284] 9p: Installing v9fs 9p2000 file system support
403 22:15:37.699126 <5>[ 0.544958] Key type asymmetric registered
404 22:15:37.699498 <5>[ 0.545148] Asymmetric key parser 'x509' registered
405 22:15:37.699908 <6>[ 0.545649] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
406 22:15:37.700119 <6>[ 0.545981] io scheduler mq-deadline registered
407 22:15:37.700309 <6>[ 0.546197] io scheduler kyber registered
408 22:15:37.770895 <6>[ 0.616543] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
409 22:15:37.781768 <6>[ 0.627329] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
410 22:15:37.786966 <6>[ 0.632465] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
411 22:15:37.787426 <6>[ 0.633180] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
412 22:15:37.787896 <6>[ 0.633460] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
413 22:15:37.788351 <4>[ 0.634097] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
414 22:15:37.789404 <6>[ 0.634777] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
415 22:15:37.794725 <6>[ 0.640325] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
416 22:15:37.794932 <6>[ 0.640717] pci_bus 0000:00: root bus resource [bus 00-ff]
417 22:15:37.795165 <6>[ 0.640921] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
418 22:15:37.795385 <6>[ 0.641131] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
419 22:15:37.795588 <6>[ 0.641331] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
420 22:15:37.797298 <6>[ 0.642921] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
421 22:15:37.804748 <6>[ 0.650385] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
422 22:15:37.805089 <6>[ 0.650805] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
423 22:15:37.805445 <6>[ 0.651021] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
424 22:15:37.805811 <6>[ 0.651338] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
425 22:15:37.805928 <6>[ 0.651714] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
426 22:15:37.810660 <6>[ 0.656512] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
427 22:15:37.811053 <6>[ 0.656674] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
428 22:15:37.811267 <6>[ 0.656912] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
429 22:15:37.811428 <6>[ 0.657109] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
430 22:15:37.814227 <6>[ 0.659857] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
431 22:15:37.822814 <6>[ 0.668444] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
432 22:15:37.823030 <6>[ 0.668785] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
433 22:15:37.823461 <6>[ 0.669067] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
434 22:15:37.823606 <6>[ 0.669290] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
435 22:15:37.823793 <6>[ 0.669466] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
436 22:15:37.823943 <6>[ 0.669637] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
437 22:15:37.839272 <6>[ 0.685134] EINJ: ACPI disabled.
438 22:15:37.925559 <6>[ 0.771236] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
439 22:15:37.932473 <6>[ 0.778255] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
440 22:15:37.963578 <6>[ 0.809370] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
441 22:15:37.979408 <6>[ 0.825244] SuperH (H)SCI(F) driver initialized
442 22:15:37.980812 <6>[ 0.826702] msm_serial: driver initialized
443 22:15:38.014048 <4>[ 0.859850] cacheinfo: Unable to detect cache hierarchy for CPU 0
444 22:15:38.044351 <6>[ 0.890117] loop: module loaded
445 22:15:38.045343 <6>[ 0.890983] virtio_blk virtio1: 1/0/0 default/read/poll queues
446 22:15:38.062161 <5>[ 0.907771] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
447 22:15:38.099211 <6>[ 0.944977] megasas: 07.719.03.00-rc1
448 22:15:38.111887 <5>[ 0.957431] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
449 22:15:38.113344 <6>[ 0.958946] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
450 22:15:38.113768 <6>[ 0.959550] Intel/Sharp Extended Query Table at 0x0031
451 22:15:38.118809 <6>[ 0.964431] Using buffer write method
452 22:15:38.119274 <7>[ 0.964880] erase region 0: offset=0x0,size=0x40000,blocks=256
453 22:15:38.119499 <5>[ 0.965237] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
454 22:15:38.120398 <6>[ 0.965876] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
455 22:15:38.120557 <6>[ 0.966153] Intel/Sharp Extended Query Table at 0x0031
456 22:15:38.121005 <6>[ 0.966730] Using buffer write method
457 22:15:38.121240 <7>[ 0.966866] erase region 0: offset=0x0,size=0x40000,blocks=256
458 22:15:38.121394 <5>[ 0.967135] Concatenating MTD devices:
459 22:15:38.121572 <5>[ 0.967278] (0): \"0.flash\"
460 22:15:38.121752 <5>[ 0.967373] (1): \"0.flash\"
461 22:15:38.121931 <5>[ 0.967475] into device \"0.flash\"
462 22:15:42.745739 <6>[ 5.591195] Freeing initrd memory: 86888K
463 22:15:42.860648 <6>[ 5.706312] tun: Universal TUN/TAP device driver, 1.6
464 22:15:42.870306 <6>[ 5.716095] thunder_xcv, ver 1.0
465 22:15:42.870708 <6>[ 5.716312] thunder_bgx, ver 1.0
466 22:15:42.870816 <6>[ 5.716574] nicpf, ver 1.0
467 22:15:42.874235 <6>[ 5.719881] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
468 22:15:42.874366 <6>[ 5.720173] hns3: Copyright (c) 2017 Huawei Corporation.
469 22:15:42.874819 <6>[ 5.720684] hclge is initializing
470 22:15:42.875169 <6>[ 5.720966] e1000: Intel(R) PRO/1000 Network Driver
471 22:15:42.875530 <6>[ 5.721121] e1000: Copyright (c) 1999-2006 Intel Corporation.
472 22:15:42.875896 <6>[ 5.721499] e1000e: Intel(R) PRO/1000 Network Driver
473 22:15:42.876003 <6>[ 5.721695] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
474 22:15:42.876419 <6>[ 5.722028] igb: Intel(R) Gigabit Ethernet Network Driver
475 22:15:42.876626 <6>[ 5.722228] igb: Copyright (c) 2007-2014 Intel Corporation.
476 22:15:42.876841 <6>[ 5.722532] igbvf: Intel(R) Gigabit Virtual Function Network Driver
477 22:15:42.877022 <6>[ 5.722759] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
478 22:15:42.878105 <6>[ 5.723748] sky2: driver version 1.30
479 22:15:42.881434 <6>[ 5.727055] VFIO - User Level meta-driver version: 0.3
480 22:15:42.890252 <6>[ 5.735789] usbcore: registered new interface driver usb-storage
481 22:15:42.890803 <6>[ 5.736642] usbcore: registered new device driver onboard-usb-hub
482 22:15:42.899963 <6>[ 5.745554] rtc-pl031 9010000.pl031: registered as rtc0
483 22:15:42.900944 <6>[ 5.746301] rtc-pl031 9010000.pl031: setting system clock to 2023-06-04T22:15:42 UTC (1685916942)
484 22:15:42.903098 <6>[ 5.748731] i2c_dev: i2c /dev entries driver
485 22:15:42.920565 <6>[ 5.766082] sdhci: Secure Digital Host Controller Interface driver
486 22:15:42.920791 <6>[ 5.766286] sdhci: Copyright(c) Pierre Ossman
487 22:15:42.922673 <6>[ 5.768297] Synopsys Designware Multimedia Card Interface Driver
488 22:15:42.925086 <6>[ 5.770709] sdhci-pltfm: SDHCI platform and OF driver helper
489 22:15:42.930572 <6>[ 5.776170] ledtrig-cpu: registered to indicate activity on CPUs
490 22:15:42.936350 <6>[ 5.781921] usbcore: registered new interface driver usbhid
491 22:15:42.936558 <6>[ 5.782120] usbhid: USB HID core driver
492 22:15:42.960327 <6>[ 5.805911] NET: Registered PF_PACKET protocol family
493 22:15:42.961272 <6>[ 5.806977] 9pnet: Installing 9P2000 support
494 22:15:42.961581 <5>[ 5.807340] Key type dns_resolver registered
495 22:15:42.962889 <6>[ 5.808772] registered taskstats version 1
496 22:15:42.963350 <5>[ 5.809138] Loading compiled-in X.509 certificates
497 22:15:42.984979 <6>[ 5.830393] input: gpio-keys as /devices/platform/gpio-keys/input/input0
498 22:15:42.992125 <6>[ 5.837887] ALSA device list:
499 22:15:42.992706 <6>[ 5.838110] No soundcards found.
500 22:15:42.995423 <6>[ 5.841002] uart-pl011 9000000.pl011: no DMA platform data
501 22:15:43.052522 <6>[ 5.898177] Freeing unused kernel memory: 8384K
502 22:15:43.053325 <6>[ 5.899169] Run /init as init process
503 22:15:43.053784 <7>[ 5.899310] with arguments:
504 22:15:43.053957 <7>[ 5.899408] /init
505 22:15:43.054152 <7>[ 5.899481] verbose
506 22:15:43.054284 <7>[ 5.899556] with environment:
507 22:15:43.054401 <7>[ 5.899647] HOME=/
508 22:15:43.054543 <7>[ 5.899730] TERM=linux
509 22:15:43.197998 <30>[ 6.043363] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
510 22:15:43.199516 <31>[ 6.045140] systemd[1]: No virtualization found in DMI
511 22:15:43.200791 <31>[ 6.046454] systemd[1]: UML virtualization not found in /proc/cpuinfo.
512 22:15:43.201177 <31>[ 6.046767] systemd[1]: No virtualization found in CPUID
513 22:15:43.201544 <31>[ 6.047178] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
514 22:15:43.203623 <31>[ 6.049131] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
515 22:15:43.203869 <31>[ 6.049677] systemd[1]: Found VM virtualization qemu
516 22:15:43.204315 <30>[ 6.050002] systemd[1]: Detected virtualization qemu.
517 22:15:43.204793 <30>[ 6.050443] systemd[1]: Detected architecture arm64.
518 22:15:43.205521 <31>[ 6.050998] systemd[1]: Detected initialized system, this is not the first boot.
519 22:15:43.210844
520 22:15:43.211320 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
521 22:15:43.211487
522 22:15:43.214153 <30>[ 6.059706] systemd[1]: Set hostname to <debian-bullseye-arm64>.
523 22:15:43.237039 <31>[ 6.082624] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
524 22:15:43.238863 <31>[ 6.084032] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
525 22:15:43.239230 <31>[ 6.085025] systemd[1]: Successfully brought loopback interface up
526 22:15:43.243788 <31>[ 6.089593] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
527 22:15:43.255982 <31>[ 6.101680] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
528 22:15:43.256607 <31>[ 6.101933] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
529 22:15:43.298087 <31>[ 6.143465] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
530 22:15:43.299522 <31>[ 6.145066] systemd[1]: Controller 'cpu' supported: yes
531 22:15:43.299758 <31>[ 6.145270] systemd[1]: Controller 'cpuacct' supported: no
532 22:15:43.300017 <31>[ 6.145430] systemd[1]: Controller 'cpuset' supported: yes
533 22:15:43.300192 <31>[ 6.145624] systemd[1]: Controller 'io' supported: yes
534 22:15:43.300408 <31>[ 6.145819] systemd[1]: Controller 'blkio' supported: no
535 22:15:43.300551 <31>[ 6.146023] systemd[1]: Controller 'memory' supported: yes
536 22:15:43.300706 <31>[ 6.146222] systemd[1]: Controller 'devices' supported: no
537 22:15:43.300875 <31>[ 6.146411] systemd[1]: Controller 'pids' supported: yes
538 22:15:43.301004 <31>[ 6.146594] systemd[1]: Controller 'bpf-firewall' supported: yes
539 22:15:43.301150 <31>[ 6.146816] systemd[1]: Controller 'bpf-devices' supported: yes
540 22:15:43.303055 <31>[ 6.148715] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
541 22:15:43.303566 <31>[ 6.149118] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
542 22:15:43.304085 <31>[ 6.149661] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
543 22:15:43.311475 <31>[ 6.156975] systemd[1]: Enabling (yes) showing of status (commandline).
544 22:15:43.319203 <31>[ 6.164722] systemd[1]: Successfully forked off '(sd-executor)' as PID 98.
545 22:15:43.328754 <31>[ 6.174546] systemd[98]: Successfully forked off '(direxec)' as PID 99.
546 22:15:43.331216 <31>[ 6.176782] systemd[98]: Successfully forked off '(direxec)' as PID 100.
547 22:15:43.333165 <31>[ 6.178775] systemd[98]: Successfully forked off '(direxec)' as PID 101.
548 22:15:43.347590 <31>[ 6.193056] systemd[98]: Successfully forked off '(direxec)' as PID 102.
549 22:15:43.349534 <31>[ 6.195033] systemd[98]: Successfully forked off '(direxec)' as PID 103.
550 22:15:43.526834 <31>[ 6.372501] systemd-getty-generator[101]: Automatically adding serial getty for /dev/ttyAMA0.
551 22:15:43.528491 <31>[ 6.374072] systemd-getty-generator[101]: SELinux enabled state cached to: disabled
552 22:15:43.531992 <31>[ 6.377777] systemd-fstab-generator[100]: Parsing /etc/fstab...
553 22:15:43.534481 <31>[ 6.379747] systemd-fstab-generator[100]: Found entry what=/dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
554 22:15:43.535434 <31>[ 6.381050] systemd-bless-boot-generator[99]: Skipping generator, not an EFI boot.
555 22:15:43.553333 <31>[ 6.398706] systemd-fstab-generator[100]: Checking was requested for /dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76, but fsck.ext4 does not exist.
556 22:15:43.555584 <31>[ 6.401165] systemd[98]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
557 22:15:43.556076 <31>[ 6.401786] systemd[98]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
558 22:15:43.556605 <31>[ 6.402161] systemd[98]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
559 22:15:43.559523 <31>[ 6.405040] systemd-fstab-generator[100]: SELinux enabled state cached to: disabled
560 22:15:43.565131 <31>[ 6.410635] systemd[98]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
561 22:15:43.565386 <31>[ 6.411059] systemd[98]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
562 22:15:43.568317 <31>[ 6.413913] systemd[1]: (sd-executor) succeeded.
563 22:15:43.569972 <31>[ 6.415471] systemd[1]: Looking for unit files in (higher priority first):
564 22:15:43.570197 <31>[ 6.415714] systemd[1]: /etc/systemd/system.control
565 22:15:43.570400 <31>[ 6.415910] systemd[1]: /run/systemd/system.control
566 22:15:43.570616 <31>[ 6.416383] systemd[1]: /run/systemd/transient
567 22:15:43.570813 <31>[ 6.416582] systemd[1]: /run/systemd/generator.early
568 22:15:43.571008 <31>[ 6.416744] systemd[1]: /etc/systemd/system
569 22:15:43.571200 <31>[ 6.416882] systemd[1]: /etc/systemd/system.attached
570 22:15:43.571395 <31>[ 6.417074] systemd[1]: /run/systemd/system
571 22:15:43.571564 <31>[ 6.417209] systemd[1]: /run/systemd/system.attached
572 22:15:43.571758 <31>[ 6.417410] systemd[1]: /run/systemd/generator
573 22:15:43.571964 <31>[ 6.417615] systemd[1]: /usr/local/lib/systemd/system
574 22:15:43.572131 <31>[ 6.417826] systemd[1]: /lib/systemd/system
575 22:15:43.572322 <31>[ 6.417986] systemd[1]: /usr/lib/systemd/system
576 22:15:43.572517 <31>[ 6.418187] systemd[1]: /run/systemd/generator.late
577 22:15:43.607837 <31>[ 6.453323] systemd[1]: Modification times have changed, need to update cache.
578 22:15:43.609400 <31>[ 6.454973] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
579 22:15:43.610944 <31>[ 6.456493] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
580 22:15:43.611915 <31>[ 6.457415] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
581 22:15:43.612591 <31>[ 6.458259] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
582 22:15:43.613361 <31>[ 6.459055] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
583 22:15:43.613731 <31>[ 6.459383] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
584 22:15:43.614250 <31>[ 6.459740] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
585 22:15:43.614762 <31>[ 6.460410] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
586 22:15:43.615232 <31>[ 6.460770] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
587 22:15:43.615331 <31>[ 6.461068] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
588 22:15:43.615729 <31>[ 6.461413] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
589 22:15:43.616577 <31>[ 6.462115] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
590 22:15:43.616786 <31>[ 6.462430] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
591 22:15:43.616988 <31>[ 6.462740] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
592 22:15:43.617717 <31>[ 6.463334] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
593 22:15:43.617894 <31>[ 6.463601] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
594 22:15:43.618348 <31>[ 6.463852] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
595 22:15:43.618821 <31>[ 6.464451] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
596 22:15:43.619032 <31>[ 6.464751] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
597 22:15:43.619785 <31>[ 6.465390] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
598 22:15:43.620099 <31>[ 6.465755] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp.service
599 22:15:43.620717 <31>[ 6.466399] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
600 22:15:43.621110 <31>[ 6.466757] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
601 22:15:43.621458 <31>[ 6.467160] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
602 22:15:43.622141 <31>[ 6.467527] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
603 22:15:43.622370 <31>[ 6.467966] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
604 22:15:43.622917 <31>[ 6.468604] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
605 22:15:43.623756 <31>[ 6.469321] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
606 22:15:43.624685 <31>[ 6.469966] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
607 22:15:43.624934 <31>[ 6.470400] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
608 22:15:43.625134 <31>[ 6.470728] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
609 22:15:43.625724 <31>[ 6.471198] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
610 22:15:43.625979 <31>[ 6.471571] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
611 22:15:43.626567 <31>[ 6.471956] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
612 22:15:43.627119 <31>[ 6.472654] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
613 22:15:43.627693 <31>[ 6.473051] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
614 22:15:43.627911 <31>[ 6.473445] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
615 22:15:43.628123 <31>[ 6.473778] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-parse-etc.service
616 22:15:43.628636 <31>[ 6.474093] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
617 22:15:43.628857 <31>[ 6.474408] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
618 22:15:43.629059 <31>[ 6.474713] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
619 22:15:43.629630 <31>[ 6.475060] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
620 22:15:43.629845 <31>[ 6.475410] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
621 22:15:43.630051 <31>[ 6.475745] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
622 22:15:43.630524 <31>[ 6.476197] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
623 22:15:43.631410 <31>[ 6.476870] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
624 22:15:43.631639 <31>[ 6.477205] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
625 22:15:43.632550 <31>[ 6.477970] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel2.target → multi-user.target
626 22:15:43.632771 <31>[ 6.478310] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
627 22:15:43.633296 <31>[ 6.478760] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
628 22:15:43.633425 <31>[ 6.479101] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
629 22:15:43.634015 <31>[ 6.479510] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
630 22:15:43.634959 <31>[ 6.480577] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
631 22:15:43.635553 <31>[ 6.480933] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
632 22:15:43.635770 <31>[ 6.481304] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
633 22:15:43.635998 <31>[ 6.481678] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
634 22:15:43.636723 <31>[ 6.482376] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
635 22:15:43.637173 <31>[ 6.482709] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
636 22:15:43.637554 <31>[ 6.483108] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
637 22:15:43.638371 <31>[ 6.483830] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
638 22:15:43.638878 <31>[ 6.484439] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
639 22:15:43.639100 <31>[ 6.484838] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
640 22:15:43.639466 <31>[ 6.485172] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
641 22:15:43.640026 <31>[ 6.485506] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
642 22:15:43.640253 <31>[ 6.485922] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
643 22:15:43.640791 <31>[ 6.486308] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
644 22:15:43.641034 <31>[ 6.486669] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
645 22:15:43.641593 <31>[ 6.487001] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
646 22:15:43.641825 <31>[ 6.487370] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
647 22:15:43.642033 <31>[ 6.487677] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
648 22:15:43.642553 <31>[ 6.488015] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
649 22:15:43.643198 <31>[ 6.488748] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
650 22:15:43.643679 <31>[ 6.489107] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
651 22:15:43.643869 <31>[ 6.489461] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
652 22:15:43.644420 <31>[ 6.490085] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
653 22:15:43.644652 <31>[ 6.490401] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
654 22:15:43.645165 <31>[ 6.490712] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
655 22:15:43.645690 <31>[ 6.491340] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
656 22:15:43.646252 <31>[ 6.491734] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
657 22:15:43.646837 <31>[ 6.492284] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
658 22:15:43.647032 <31>[ 6.492674] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
659 22:15:43.647489 <31>[ 6.493178] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
660 22:15:43.648266 <31>[ 6.493789] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.locale1.service → systemd-localed.service
661 22:15:43.648467 <31>[ 6.494174] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
662 22:15:43.648985 <31>[ 6.494509] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
663 22:15:43.649239 <31>[ 6.494875] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
664 22:15:43.649460 <31>[ 6.495199] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
665 22:15:43.650045 <31>[ 6.495529] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
666 22:15:43.650299 <31>[ 6.495884] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
667 22:15:43.650805 <31>[ 6.496501] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
668 22:15:43.651428 <31>[ 6.496868] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
669 22:15:43.651638 <31>[ 6.497206] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
670 22:15:43.651840 <31>[ 6.497562] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
671 22:15:43.652449 <31>[ 6.497885] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
672 22:15:43.652682 <31>[ 6.498241] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
673 22:15:43.652913 <31>[ 6.498573] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
674 22:15:43.653456 <31>[ 6.498949] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
675 22:15:43.653775 <31>[ 6.499462] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-varlink@.socket
676 22:15:43.654356 <31>[ 6.499815] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
677 22:15:43.654916 <31>[ 6.500415] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
678 22:15:43.655786 <31>[ 6.501204] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.hostname1.service → systemd-hostnamed.service
679 22:15:43.656008 <31>[ 6.501637] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
680 22:15:43.656237 <31>[ 6.501945] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
681 22:15:43.656829 <31>[ 6.502274] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
682 22:15:43.657059 <31>[ 6.502608] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
683 22:15:43.657306 <31>[ 6.502923] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
684 22:15:43.657510 <31>[ 6.503276] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
685 22:15:43.658111 <31>[ 6.503554] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
686 22:15:43.658293 <31>[ 6.503897] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-bless-boot.service
687 22:15:43.658753 <31>[ 6.504441] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
688 22:15:43.659319 <31>[ 6.504738] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
689 22:15:43.659516 <31>[ 6.505063] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
690 22:15:43.659763 <31>[ 6.505344] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
691 22:15:43.659979 <31>[ 6.505618] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
692 22:15:43.660222 <31>[ 6.505966] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
693 22:15:43.660702 <31>[ 6.506282] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
694 22:15:43.661097 <31>[ 6.506571] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
695 22:15:43.661229 <31>[ 6.506920] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.service
696 22:15:43.661689 <31>[ 6.507283] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-cleanup.service
697 22:15:43.661908 <31>[ 6.507605] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
698 22:15:43.662133 <31>[ 6.507898] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
699 22:15:43.663008 <31>[ 6.508429] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
700 22:15:43.663243 <31>[ 6.508757] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
701 22:15:43.663471 <31>[ 6.509097] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
702 22:15:43.664052 <31>[ 6.509420] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
703 22:15:43.664286 <31>[ 6.509791] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
704 22:15:43.664475 <31>[ 6.510121] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
705 22:15:43.664689 <31>[ 6.510444] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
706 22:15:43.665228 <31>[ 6.510751] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
707 22:15:43.665442 <31>[ 6.511050] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
708 22:15:43.665909 <31>[ 6.511533] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
709 22:15:43.666342 <31>[ 6.511881] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
710 22:15:43.667190 <31>[ 6.512859] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
711 22:15:43.667516 <31>[ 6.513247] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
712 22:15:43.667915 <31>[ 6.513545] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate.service
713 22:15:43.668403 <31>[ 6.513873] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
714 22:15:43.668650 <31>[ 6.514188] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
715 22:15:43.668861 <31>[ 6.514492] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
716 22:15:43.669057 <31>[ 6.514788] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
717 22:15:43.669677 <31>[ 6.515104] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
718 22:15:43.669824 <31>[ 6.515429] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
719 22:15:43.670213 <31>[ 6.515708] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
720 22:15:43.670597 <31>[ 6.516296] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
721 22:15:43.671170 <31>[ 6.516811] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
722 22:15:43.671496 <31>[ 6.517264] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
723 22:15:43.671911 <31>[ 6.517568] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
724 22:15:43.672254 <31>[ 6.517880] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
725 22:15:43.672780 <31>[ 6.518248] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
726 22:15:43.672931 <31>[ 6.518559] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
727 22:15:43.673362 <31>[ 6.518851] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
728 22:15:43.673479 <31>[ 6.519211] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
729 22:15:44.074811 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
730 22:15:44.079547 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
731 22:15:44.083110 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
732 22:15:44.086548 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
733 22:15:44.089785 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
734 22:15:44.091464 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
735 22:15:44.093539 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
736 22:15:44.094758 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
737 22:15:44.095527 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
738 22:15:44.096003 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
739 22:15:44.096937 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
740 22:15:44.100412 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
741 22:15:44.104426 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
742 22:15:44.107130 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
743 22:15:44.109071 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
744 22:15:44.111732 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
745 22:15:44.114025 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
746 22:15:44.116000 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
747 22:15:44.144194 Mounting [0;1;39mHuge Pages File System[0m...
748 22:15:44.179722 Mounting [0;1;39mPOSIX Message Queue File System[0m...
749 22:15:44.221762 Mounting [0;1;39mKernel Debug File System[0m...
750 22:15:44.264344 Starting [0;1;39mLoad Kernel Module configfs[0m...
751 22:15:44.308095 Starting [0;1;39mLoad Kernel Module drm[0m...
752 22:15:44.363972 Starting [0;1;39mJournal Service[0m...
753 22:15:44.396036 Starting [0;1;39mLoad Kernel Modules[0m...
754 22:15:44.426103 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
755 22:15:44.487805 Starting [0;1;39mColdplug All udev Devices[0m...
756 22:15:44.581352 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
757 22:15:44.592875 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
758 22:15:44.605038 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
759 22:15:44.659735 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
760 22:15:44.711597 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
761 22:15:44.735929 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
762 22:15:44.811863 Mounting [0;1;39mKernel Configuration File System[0m...
763 22:15:44.911926 Starting [0;1;39mApply Kernel Variables[0m...
764 22:15:44.996684 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
765 22:15:45.045334 <47>[ 7.891010] systemd-journald[109]: SELinux enabled state cached to: disabled
766 22:15:45.062803 <47>[ 7.908567] systemd-journald[109]: Auditing in kernel turned off.
767 22:15:45.083333 <47>[ 7.929012] systemd-journald[109]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
768 22:15:45.133350 <47>[ 7.978785] systemd-journald[109]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
769 22:15:45.142142 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
770 22:15:45.143173 See 'systemctl status systemd-remount-fs.service' for details.
771 22:15:45.152243 <47>[ 7.997850] systemd-journald[109]: Fixed min_use=3.8M max_use=19.3M max_size=2.4M min_size=512.0K keep_free=9.6M n_max_files=100
772 22:15:45.153771 <47>[ 7.999367] systemd-journald[109]: Reserving 333 entries in field hash table.
773 22:15:45.163263 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
774 22:15:45.189765 <47>[ 8.035287] systemd-journald[109]: Reserving 4408 entries in data hash table.
775 22:15:45.191892 <47>[ 8.037491] systemd-journald[109]: Vacuuming...
776 22:15:45.192540 <47>[ 8.038123] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
777 22:15:45.193035 <47>[ 8.038700] systemd-journald[109]: Flushing /dev/kmsg...
778 22:15:45.196697 Starting [0;1;39mLoad/Save Random Seed[0m...
779 22:15:45.259851 Starting [0;1;39mCreate System Users[0m...
780 22:15:45.399222 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
781 22:15:45.568560 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
782 22:15:45.612211 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
783 22:15:45.730594 <47>[ 8.576255] systemd-journald[109]: systemd-journald running as PID 109 for the system.
784 22:15:45.736246 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
785 22:15:45.750761 <47>[ 8.596372] systemd-journald[109]: Sent READY=1 notification.
786 22:15:45.751298 <47>[ 8.596927] systemd-journald[109]: Sent WATCHDOG=1 notification.
787 22:15:45.776737 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
788 22:15:45.781747 <47>[ 8.627142] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
789 22:15:45.803548 <47>[ 8.649227] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
790 22:15:45.830874 <47>[ 8.676255] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
791 22:15:45.842771 <47>[ 8.688248] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
792 22:15:45.867006 <47>[ 8.712414] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
793 22:15:45.869519 <47>[ 8.715058] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
794 22:15:45.872218 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
795 22:15:45.885503 <47>[ 8.730978] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
796 22:15:45.888939 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
797 22:15:45.890069 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
798 22:15:45.906042 <47>[ 8.751659] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
799 22:15:45.924468 <47>[ 8.769868] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
800 22:15:45.938937 <47>[ 8.784346] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
801 22:15:45.940891 <47>[ 8.786379] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
802 22:15:45.960121 <47>[ 8.805561] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
803 22:15:45.960414 <47>[ 8.805994] systemd-journald[109]: n/a: New incoming connection.
804 22:15:45.960885 <47>[ 8.806540] systemd-journald[109]: varlink-21: varlink: setting state idle-server
805 22:15:45.971336 <47>[ 8.816982] systemd-journald[109]: varlink-21: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
806 22:15:45.973550 <47>[ 8.818920] systemd-journald[109]: varlink-21: varlink: changing state idle-server → processing-method
807 22:15:45.973852 <46>[ 8.819324] systemd-journald[109]: Received client request to flush runtime journal.
808 22:15:45.974288 <47>[ 8.819986] systemd-journald[109]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
809 22:15:45.980651 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
810 22:15:45.999130 <47>[ 8.844870] systemd-journald[109]: Vacuuming...
811 22:15:45.999892 <47>[ 8.845383] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
812 22:15:46.001119 <47>[ 8.846763] systemd-journald[109]: varlink-21: Sending message: {\"parameters\":{}}
813 22:15:46.001702 <47>[ 8.847048] systemd-journald[109]: varlink-21: varlink: changing state processing-method → processed-method
814 22:15:46.001906 <47>[ 8.847533] systemd-journald[109]: varlink-21: varlink: changing state processed-method → idle-server
815 22:15:46.020409 <47>[ 8.865662] systemd-journald[109]: varlink-21: varlink: changing state idle-server → pending-disconnect
816 22:15:46.020729 <47>[ 8.866074] systemd-journald[109]: varlink-21: varlink: changing state pending-disconnect → processing-disconnect
817 22:15:46.020902 <47>[ 8.866392] systemd-journald[109]: varlink-21: varlink: changing state processing-disconnect → disconnected
818 22:15:46.036435 <47>[ 8.881895] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
819 22:15:46.040959 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
820 22:15:46.057143 <47>[ 8.902551] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
821 22:15:46.070652 <47>[ 8.916397] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
822 22:15:46.104106 Starting [0;1;39mCreate Volatile Files and Directories[0m...
823 22:15:46.122649 <47>[ 8.968314] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
824 22:15:46.571608 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
825 22:15:46.656184 Starting [0;1;39mNetwork Service[0m...
826 22:15:46.685134 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
827 22:15:46.705990 <47>[ 9.551639] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
828 22:15:46.780920 Starting [0;1;39mNetwork Time Synchronization[0m...
829 22:15:46.793285 <47>[ 9.638595] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
830 22:15:46.848667 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
831 22:15:46.856980 <47>[ 9.702408] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
832 22:15:47.340694 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
833 22:15:48.311478 <47>[ 11.156799] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3307 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
834 22:15:48.311836 <47>[ 11.157333] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
835 22:15:48.312067 <47>[ 11.157709] systemd-journald[109]: Rotating...
836 22:15:48.312994 <47>[ 11.158564] systemd-journald[109]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
837 22:15:48.314472 <47>[ 11.160004] systemd-journald[109]: Reserving 333 entries in field hash table.
838 22:15:48.344967 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
839 22:15:48.378866 <47>[ 11.224562] systemd-journald[109]: Reserving 4408 entries in data hash table.
840 22:15:48.381556 <47>[ 11.227399] systemd-journald[109]: Vacuuming...
841 22:15:48.405611 <47>[ 11.250970] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
842 22:15:48.468850 Starting [0;1;39mNetwork Name Resolution[0m...
843 22:15:48.494626 <47>[ 11.340338] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
844 22:15:48.745741 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
845 22:15:48.747968 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
846 22:15:48.751177 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
847 22:15:49.225522 <47>[ 12.071158] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
848 22:15:50.345657 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
849 22:15:50.355849 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
850 22:15:50.383033 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
851 22:15:50.395817 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
852 22:15:50.404772 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
853 22:15:50.413672 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
854 22:15:50.436442 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
855 22:15:50.437370 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
856 22:15:50.437854 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
857 22:15:50.500647 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
858 22:15:50.523458 <47>[ 13.369169] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
859 22:15:50.639885 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
860 22:15:50.649326 <47>[ 13.494803] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
861 22:15:50.811978 Starting [0;1;39mUser Login Management[0m...
862 22:15:50.825008 <47>[ 13.670546] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
863 22:15:50.836619 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
864 22:15:50.863230 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
865 22:15:50.864515 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
866 22:15:50.960326 Starting [0;1;39mPermit User Sessions[0m...
867 22:15:50.986767 <47>[ 13.832240] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
868 22:15:51.238054 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
869 22:15:51.325427 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
870 22:15:51.484950 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
871 22:15:51.910120 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
872 22:15:53.956107 [[0m[0;31m* [0m] A start job is running for /dev/ttyAMA0 (9s / 1min 30s)
873 22:15:54.291434 M[K[[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
874 22:15:54.355349 [K[[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
875 22:15:54.370943 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
876 22:15:54.385875 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
877 22:15:54.403025 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
878 22:15:54.449802 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
879 22:15:54.455277 <47>[ 17.301057] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
880 22:15:54.652843 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
881 22:15:54.716508 <47>[ 17.562029] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
882 22:15:54.726685 <47>[ 17.572381] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
883 22:15:54.777518
884 22:15:54.778167 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
885 22:15:54.778332
886 22:15:54.788997 debian-bullseye-arm64 login: root (automatic login)
887 22:15:54.789457
888 22:15:54.907085 <6>[ 17.752756] virtio_net virtio0 enp0s1: renamed from eth0
889 22:15:55.031196 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Sun Jun 4 21:56:05 UTC 2023 aarch64
890 22:15:55.031834
891 22:15:55.032058 The programs included with the Debian GNU/Linux system are free software;
892 22:15:55.032256 the exact distribution terms for each program are described in the
893 22:15:55.032498 individual files in /usr/share/doc/*/copyright.
894 22:15:55.032674
895 22:15:55.032850 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
896 22:15:55.033034 permitted by applicable law.
897 22:15:55.617958 <47>[ 18.463337] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
898 22:15:55.630667 <47>[ 18.475861] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3307 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
899 22:15:55.649717 <47>[ 18.495091] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
900 22:15:55.649929 <47>[ 18.495550] systemd-journald[109]: Rotating...
901 22:15:55.651738 <47>[ 18.497312] systemd-journald[109]: Reserving 333 entries in field hash table.
902 22:15:55.683873 <47>[ 18.529602] systemd-journald[109]: Reserving 4408 entries in data hash table.
903 22:15:55.693496 <47>[ 18.539145] systemd-journald[109]: Vacuuming...
904 22:15:55.702994 <47>[ 18.548486] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
905 22:15:55.897562 <47>[ 18.743206] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
906 22:15:57.646788 <47>[ 20.492410] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
907 22:15:57.996245 Matched prompt #10: / #
909 22:15:57.996825 Setting prompt string to ['/ #']
910 22:15:57.997006 end: 2.2.1 login-action (duration 00:00:21) [common]
912 22:15:57.997416 end: 2.2 auto-login-action (duration 00:00:24) [common]
913 22:15:57.997582 start: 2.3 expect-shell-connection (timeout 00:04:35) [common]
914 22:15:57.997737 Setting prompt string to ['/ #']
915 22:15:57.997859 Forcing a shell prompt, looking for ['/ #']
917 22:15:58.048418 / #
918 22:15:58.048713 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
919 22:15:58.048923 Waiting using forced prompt support (timeout 00:02:30)
920 22:15:58.050483
921 22:15:58.054744 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
922 22:15:58.054951 start: 2.4 export-device-env (timeout 00:04:35) [common]
923 22:15:58.055131 end: 2.4 export-device-env (duration 00:00:00) [common]
924 22:15:58.055295 end: 2 boot-image-retry (duration 00:00:25) [common]
925 22:15:58.055454 start: 3 lava-test-retry (timeout 00:08:54) [common]
926 22:15:58.055609 start: 3.1 lava-test-shell (timeout 00:08:54) [common]
927 22:15:58.055748 Using namespace: common
929 22:15:58.156805 / # #
930 22:15:58.157134 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
931 22:15:58.157782 #
933 22:15:58.266297 / # mkdir /lava-559902
934 22:15:58.267113 mkdir /lava-559902
936 22:15:58.395202 / # mount /dev/disk/by-uuid/c39785ed-8b1c-441e-b5ea-2d2fd1ef82f3 -t ext2 /lava-559902
937 22:15:58.396131 mount /dev/disk/by-uuid/c39785ed-8b1c-441e-b5ea-2d2fd1ef82f3 -t ext2 /lava-559902
938 22:15:58.435770 <4>[ 21.281149] ext2 filesystem being mounted at /lava-559902 supports timestamps until 2038 (0x7fffffff)
940 22:15:58.577278 / # ls -la /lava-559902/bin/lava-test-runner
941 22:15:58.578114 ls -la /lava-559902/bin/lava-test-runner
942 22:15:58.615277 -rwxr-xr-x 1 root root 1039 Jun 4 22:14 /lava-559902/bin/lava-test-runner
943 22:15:58.626125 Using /lava-559902
945 22:15:58.727199 / # export SHELL=/bin/sh
946 22:15:58.727938 export SHELL=/bin/sh
948 22:15:58.836310 / # . /lava-559902/environment
949 22:15:58.837027 . /lava-559902/environment
951 22:15:58.948299 / # /lava-559902/bin/lava-test-runner /lava-559902/0
952 22:15:58.948506 Test shell timeout: 10s (minimum of the action and connection timeout)
953 22:15:58.949151 /lava-559902/bin/lava-test-runner /lava-559902/0
954 22:15:59.103424 + export TESTRUN_ID=0_timesync-off
955 22:15:59.103739 + cd /lava-559902/0/tests/0_timesync-off
956 22:15:59.105428 + cat uuid
957 22:15:59.113760 + UUID=559902_1.1.3.1
958 22:15:59.114053 + set +x
959 22:15:59.114713 Received signal: <STARTRUN> 0_timesync-off 559902_1.1.3.1
960 22:15:59.114940 Starting test lava.0_timesync-off (559902_1.1.3.1)
961 22:15:59.115155 Skipping test definition patterns.
962 22:15:59.115373 <LAVA_SIGNAL_STARTRUN 0_timesync-off 559902_1.1.3.1>
963 22:15:59.115536 + systemctl stop systemd-timesyncd
964 22:15:59.349842 + set +x
965 22:15:59.350352 <LAVA_SIGNAL_ENDRUN 0_timesync-off 559902_1.1.3.1>
966 22:15:59.350697 Received signal: <ENDRUN> 0_timesync-off 559902_1.1.3.1
967 22:15:59.350860 Ending use of test pattern.
968 22:15:59.350985 Ending test lava.0_timesync-off (559902_1.1.3.1), duration 0.24
970 22:15:59.391567 + export TESTRUN_ID=1_kselftest-arm64_qemu
971 22:15:59.391819 + cd /lava-559902/0/tests/1_kselftest-arm64_qemu
972 22:15:59.393680 + cat uuid
973 22:15:59.401589 + UUID=559902_1.1.3.5
974 22:15:59.401773 + set +x
975 22:15:59.401895 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 559902_1.1.3.5>
976 22:15:59.402181 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 559902_1.1.3.5
977 22:15:59.402268 Starting test lava.1_kselftest-arm64_qemu (559902_1.1.3.5)
978 22:15:59.402358 Skipping test definition patterns.
979 22:15:59.403108 + cd ./automated/linux/kselftest/
980 22:15:59.409002 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip -e -p /opt/kselftests/mainline/ -n 1 -i 1
981 22:15:59.505600 INFO: install_deps skipped
982 22:15:59.538130 --2023-06-04 22:15:59-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
983 22:15:59.629919 Resolving storage.kernelci.org (storage.kernelci.org)... 52.250.1.28
984 22:15:59.827227 Connecting to storage.kernelci.org (storage.kernelci.org)|52.250.1.28|:80... connected.
985 22:16:00.020493 HTTP request sent, awaiting response... 200 OK
986 22:16:00.023592 Length: 2860264 (2.7M) [application/octet-stream]
987 22:16:00.024967 Saving to: 'kselftest.tar.xz'
988 22:16:00.026332
989 22:16:01.320598 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 147KB/s kselftest.tar.xz 7%[> ] 219.84K 313KB/s kselftest.tar.xz 31%[=====> ] 890.59K 987KB/s kselftest.tar.xz 60%[===========> ] 1.65M 1.50MB/s kselftest.tar.xz 100%[===================>] 2.73M 2.11MB/s in 1.3s
990 22:16:01.320887
991 22:16:01.325479 2023-06-04 22:16:01 (2.11 MB/s) - 'kselftest.tar.xz' saved [2860264/2860264]
992 22:16:01.325661
993 22:16:04.434169 skiplist:
994 22:16:04.434688 ========================================
995 22:16:04.435134 ========================================
996 22:16:04.487629 arm64:tags_test
997 22:16:04.487879 arm64:run_tags_test.sh
998 22:16:04.487973 arm64:fake_sigreturn_bad_magic
999 22:16:04.488066 arm64:fake_sigreturn_bad_size
1000 22:16:04.488359 arm64:fake_sigreturn_bad_size_for_magic0
1001 22:16:04.488469 arm64:fake_sigreturn_duplicated_fpsimd
1002 22:16:04.488560 arm64:fake_sigreturn_misaligned_sp
1003 22:16:04.488647 arm64:fake_sigreturn_missing_fpsimd
1004 22:16:04.488732 arm64:fake_sigreturn_sme_change_vl
1005 22:16:04.488818 arm64:fake_sigreturn_sve_change_vl
1006 22:16:04.488906 arm64:mangle_pstate_invalid_compat_toggle
1007 22:16:04.488996 arm64:mangle_pstate_invalid_daif_bits
1008 22:16:04.489084 arm64:mangle_pstate_invalid_mode_el1h
1009 22:16:04.489191 arm64:mangle_pstate_invalid_mode_el1t
1010 22:16:04.489277 arm64:mangle_pstate_invalid_mode_el2h
1011 22:16:04.489361 arm64:mangle_pstate_invalid_mode_el2t
1012 22:16:04.489446 arm64:mangle_pstate_invalid_mode_el3h
1013 22:16:04.489532 arm64:mangle_pstate_invalid_mode_el3t
1014 22:16:04.489622 arm64:sme_trap_no_sm
1015 22:16:04.489720 arm64:sme_trap_non_streaming
1016 22:16:04.489809 arm64:sme_trap_za
1017 22:16:04.489897 arm64:sme_vl
1018 22:16:04.489985 arm64:ssve_regs
1019 22:16:04.490072 arm64:sve_regs
1020 22:16:04.490163 arm64:sve_vl
1021 22:16:04.490253 arm64:za_no_regs
1022 22:16:04.490366 arm64:za_regs
1023 22:16:04.490459 arm64:pac
1024 22:16:04.490550 arm64:fp-stress
1025 22:16:04.490649 arm64:sve-ptrace
1026 22:16:04.490741 arm64:sve-probe-vls
1027 22:16:04.490831 arm64:vec-syscfg
1028 22:16:04.490919 arm64:za-fork
1029 22:16:04.491007 arm64:za-ptrace
1030 22:16:04.491096 arm64:check_buffer_fill
1031 22:16:04.491185 arm64:check_child_memory
1032 22:16:04.491279 arm64:check_gcr_el1_cswitch
1033 22:16:04.491367 arm64:check_ksm_options
1034 22:16:04.491456 arm64:check_mmap_options
1035 22:16:04.491545 arm64:check_prctl
1036 22:16:04.491633 arm64:check_tags_inclusion
1037 22:16:04.491722 arm64:check_user_mem
1038 22:16:04.491810 arm64:btitest
1039 22:16:04.491899 arm64:nobtitest
1040 22:16:04.491987 arm64:hwcap
1041 22:16:04.492074 arm64:ptrace
1042 22:16:04.492163 arm64:syscall-abi
1043 22:16:04.492269 arm64:tpidr2
1044 22:16:04.501924 ============== Tests to run ===============
1045 22:16:04.506920 arm64:tags_test
1046 22:16:04.507373 arm64:run_tags_test.sh
1047 22:16:04.507539 arm64:fake_sigreturn_bad_magic
1048 22:16:04.507710 arm64:fake_sigreturn_bad_size
1049 22:16:04.507857 arm64:fake_sigreturn_bad_size_for_magic0
1050 22:16:04.508018 arm64:fake_sigreturn_duplicated_fpsimd
1051 22:16:04.508163 arm64:fake_sigreturn_misaligned_sp
1052 22:16:04.508579 arm64:fake_sigreturn_missing_fpsimd
1053 22:16:04.508784 arm64:fake_sigreturn_sme_change_vl
1054 22:16:04.508986 arm64:fake_sigreturn_sve_change_vl
1055 22:16:04.509191 arm64:mangle_pstate_invalid_compat_toggle
1056 22:16:04.509361 arm64:mangle_pstate_invalid_daif_bits
1057 22:16:04.509508 arm64:mangle_pstate_invalid_mode_el1h
1058 22:16:04.509662 arm64:mangle_pstate_invalid_mode_el1t
1059 22:16:04.509804 arm64:mangle_pstate_invalid_mode_el2h
1060 22:16:04.509942 arm64:mangle_pstate_invalid_mode_el2t
1061 22:16:04.510081 arm64:mangle_pstate_invalid_mode_el3h
1062 22:16:04.510221 arm64:mangle_pstate_invalid_mode_el3t
1063 22:16:04.510359 arm64:sme_trap_no_sm
1064 22:16:04.510497 arm64:sme_trap_non_streaming
1065 22:16:04.510635 arm64:sme_trap_za
1066 22:16:04.510774 arm64:sme_vl
1067 22:16:04.510911 arm64:ssve_regs
1068 22:16:04.511048 arm64:sve_regs
1069 22:16:04.511187 arm64:sve_vl
1070 22:16:04.511327 arm64:za_no_regs
1071 22:16:04.511466 arm64:za_regs
1072 22:16:04.511606 arm64:pac
1073 22:16:04.511744 arm64:fp-stress
1074 22:16:04.511929 arm64:sve-ptrace
1075 22:16:04.512065 arm64:sve-probe-vls
1076 22:16:04.512204 arm64:vec-syscfg
1077 22:16:04.512344 arm64:za-fork
1078 22:16:04.512481 arm64:za-ptrace
1079 22:16:04.512619 arm64:check_buffer_fill
1080 22:16:04.512756 arm64:check_child_memory
1081 22:16:04.512895 arm64:check_gcr_el1_cswitch
1082 22:16:04.513034 arm64:check_ksm_options
1083 22:16:04.513194 arm64:check_mmap_options
1084 22:16:04.513377 arm64:check_prctl
1085 22:16:04.513537 arm64:check_tags_inclusion
1086 22:16:04.513680 arm64:check_user_mem
1087 22:16:04.513797 arm64:btitest
1088 22:16:04.513909 arm64:nobtitest
1089 22:16:04.514022 arm64:hwcap
1090 22:16:04.514135 arm64:ptrace
1091 22:16:04.514249 arm64:syscall-abi
1092 22:16:04.514362 arm64:tpidr2
1093 22:16:04.514474 ===========End Tests to run ===============
1094 22:16:05.455235 <12>[ 28.300886] kselftest: Running tests in arm64
1095 22:16:05.498699 TAP version 13
1096 22:16:05.517833 1..48
1097 22:16:05.583479 # selftests: arm64: tags_test
1098 22:16:05.643171 ok 1 selftests: arm64: tags_test
1099 22:16:05.693726 # selftests: arm64: run_tags_test.sh
1100 22:16:05.746885 # --------------------
1101 22:16:05.747167 # running tags test
1102 22:16:05.747518 # --------------------
1103 22:16:05.747648 # [PASS]
1104 22:16:05.755180 ok 2 selftests: arm64: run_tags_test.sh
1105 22:16:05.820713 # selftests: arm64: fake_sigreturn_bad_magic
1106 22:16:05.878729 # Registered handlers for all signals.
1107 22:16:05.879024 # Detected MINSTKSIGSZ:10000
1108 22:16:05.879158 # Testcase initialized.
1109 22:16:05.879289 # uc context validated.
1110 22:16:05.879636 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1111 22:16:05.879761 # Handled SIG_COPYCTX
1112 22:16:05.879870 # Available space:3536
1113 22:16:05.879990 # Using badly built context - ERR: BAD MAGIC !
1114 22:16:05.880106 # SIG_OK -- SP:0xFFFFD86F60F0 si_addr@:0xffffd86f60f0 si_code:2 token@:0xffffd86f4e90 offset:-4704
1115 22:16:05.880224 # ==>> completed. PASS(1)
1116 22:16:05.880340 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1117 22:16:05.880458 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD86F4E90
1118 22:16:05.889642 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1119 22:16:05.942683 # selftests: arm64: fake_sigreturn_bad_size
1120 22:16:06.005340 # Registered handlers for all signals.
1121 22:16:06.005818 # Detected MINSTKSIGSZ:10000
1122 22:16:06.005927 # Testcase initialized.
1123 22:16:06.006016 # uc context validated.
1124 22:16:06.006102 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1125 22:16:06.006190 # Handled SIG_COPYCTX
1126 22:16:06.006276 # Available space:3536
1127 22:16:06.006363 # uc context validated.
1128 22:16:06.006467 # Using badly built context - ERR: Bad size for esr_context
1129 22:16:06.008143 # SIG_OK -- SP:0xFFFFD98AB650 si_addr@:0xffffd98ab650 si_code:2 token@:0xffffd98aa3f0 offset:-4704
1130 22:16:06.008259 # ==>> completed. PASS(1)
1131 22:16:06.008546 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1132 22:16:06.008665 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD98AA3F0
1133 22:16:06.015724 ok 4 selftests: arm64: fake_sigreturn_bad_size
1134 22:16:06.062799 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1135 22:16:06.113311 # Registered handlers for all signals.
1136 22:16:06.113597 # Detected MINSTKSIGSZ:10000
1137 22:16:06.113740 # Testcase initialized.
1138 22:16:06.114078 # uc context validated.
1139 22:16:06.114185 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1140 22:16:06.114279 # Handled SIG_COPYCTX
1141 22:16:06.114369 # Available space:3536
1142 22:16:06.114458 # Using badly built context - ERR: Bad size for terminator
1143 22:16:06.114546 # SIG_OK -- SP:0xFFFFD346B830 si_addr@:0xffffd346b830 si_code:2 token@:0xffffd346a5d0 offset:-4704
1144 22:16:06.114637 # ==>> completed. PASS(1)
1145 22:16:06.116096 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1146 22:16:06.116478 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD346A5D0
1147 22:16:06.123355 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1148 22:16:06.169399 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1149 22:16:06.218587 # Registered handlers for all signals.
1150 22:16:06.218835 # Detected MINSTKSIGSZ:10000
1151 22:16:06.219168 # Testcase initialized.
1152 22:16:06.219282 # uc context validated.
1153 22:16:06.219383 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1154 22:16:06.219476 # Handled SIG_COPYCTX
1155 22:16:06.219621 # Available space:3536
1156 22:16:06.219738 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1157 22:16:06.219832 # SIG_OK -- SP:0xFFFFDFDAA630 si_addr@:0xffffdfdaa630 si_code:2 token@:0xffffdfda93d0 offset:-4704
1158 22:16:06.219927 # ==>> completed. PASS(1)
1159 22:16:06.220030 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1160 22:16:06.220102 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDFDA93D0
1161 22:16:06.229159 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1162 22:16:06.277915 # selftests: arm64: fake_sigreturn_misaligned_sp
1163 22:16:06.330619 # Registered handlers for all signals.
1164 22:16:06.330958 # Detected MINSTKSIGSZ:10000
1165 22:16:06.331435 # Testcase initialized.
1166 22:16:06.331630 # uc context validated.
1167 22:16:06.331769 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1168 22:16:06.331898 # Handled SIG_COPYCTX
1169 22:16:06.332021 # SIG_OK -- SP:0xFFFFF8267473 si_addr@:0xfffff8267473 si_code:2 token@:0xfffff8267473 offset:0
1170 22:16:06.332149 # ==>> completed. PASS(1)
1171 22:16:06.332300 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1172 22:16:06.332432 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF8267473
1173 22:16:06.340579 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1174 22:16:06.389837 # selftests: arm64: fake_sigreturn_missing_fpsimd
1175 22:16:06.441600 # Registered handlers for all signals.
1176 22:16:06.442098 # Detected MINSTKSIGSZ:10000
1177 22:16:06.442209 # Testcase initialized.
1178 22:16:06.442303 # uc context validated.
1179 22:16:06.442392 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1180 22:16:06.442480 # Handled SIG_COPYCTX
1181 22:16:06.442565 # Mangling template header. Spare space:4096
1182 22:16:06.443941 # Using badly built context - ERR: Missing FPSIMD
1183 22:16:06.444482 # SIG_OK -- SP:0xFFFFC39BF160 si_addr@:0xffffc39bf160 si_code:2 token@:0xffffc39bdf00 offset:-4704
1184 22:16:06.444661 # ==>> completed. PASS(1)
1185 22:16:06.444844 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1186 22:16:06.445032 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC39BDF00
1187 22:16:06.452311 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1188 22:16:06.501155 # selftests: arm64: fake_sigreturn_sme_change_vl
1189 22:16:06.554649 # Registered handlers for all signals.
1190 22:16:06.555241 # Detected MINSTKSIGSZ:10000
1191 22:16:06.555448 # Required Features: [ SME ] supported
1192 22:16:06.555629 # Incompatible Features: [] absent
1193 22:16:06.555804 # Testcase initialized.
1194 22:16:06.555954 # uc context validated.
1195 22:16:06.556104 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1196 22:16:06.556228 # Handled SIG_COPYCTX
1197 22:16:06.556342 # Attempting to change VL from 16 to 256
1198 22:16:06.556457 # SIG_OK -- SP:0xFFFFC93F98A0 si_addr@:0xffffc93f98a0 si_code:2 token@:0xffffc93f8640 offset:-4704
1199 22:16:06.556572 # ==>> completed. PASS(1)
1200 22:16:06.556683 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1201 22:16:06.556799 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC93F8640
1202 22:16:06.565125 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1203 22:16:06.614088 # selftests: arm64: fake_sigreturn_sve_change_vl
1204 22:16:06.666863 # Registered handlers for all signals.
1205 22:16:06.667193 # Detected MINSTKSIGSZ:10000
1206 22:16:06.667382 # Required Features: [ SVE ] supported
1207 22:16:06.667551 # Incompatible Features: [] absent
1208 22:16:06.667721 # Testcase initialized.
1209 22:16:06.667886 # uc context validated.
1210 22:16:06.668086 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1211 22:16:06.668259 # Handled SIG_COPYCTX
1212 22:16:06.668421 # Attempting to change VL from 16 to 256
1213 22:16:06.668579 # SIG_OK -- SP:0xFFFFC26FD1F0 si_addr@:0xffffc26fd1f0 si_code:2 token@:0xffffc26fbf90 offset:-4704
1214 22:16:06.668740 # ==>> completed. PASS(1)
1215 22:16:06.668895 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1216 22:16:06.669052 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC26FBF90
1217 22:16:06.677095 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1218 22:16:06.726114 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1219 22:16:06.779997 # Registered handlers for all signals.
1220 22:16:06.780268 # Detected MINSTKSIGSZ:10000
1221 22:16:06.780371 # Testcase initialized.
1222 22:16:06.780674 # uc context validated.
1223 22:16:06.780787 # Handled SIG_TRIG
1224 22:16:06.780883 # SIG_OK -- SP:0xFFFFF7C74B00 si_addr@:0xfffff7c74b00 si_code:2 token@:(nil) offset:-281474838776576
1225 22:16:06.780976 # ==>> completed. PASS(1)
1226 22:16:06.781080 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1227 22:16:06.788359 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1228 22:16:06.837517 # selftests: arm64: mangle_pstate_invalid_daif_bits
1229 22:16:06.889457 # Registered handlers for all signals.
1230 22:16:06.890033 # Detected MINSTKSIGSZ:10000
1231 22:16:06.890194 # Testcase initialized.
1232 22:16:06.890344 # uc context validated.
1233 22:16:06.890488 # Handled SIG_TRIG
1234 22:16:06.890633 # SIG_OK -- SP:0xFFFFCA752280 si_addr@:0xffffca752280 si_code:2 token@:(nil) offset:-281474078417536
1235 22:16:06.890777 # ==>> completed. PASS(1)
1236 22:16:06.890935 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1237 22:16:06.898184 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1238 22:16:06.946881 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1239 22:16:06.996390 # Registered handlers for all signals.
1240 22:16:06.996863 # Detected MINSTKSIGSZ:10000
1241 22:16:06.996971 # Testcase initialized.
1242 22:16:06.997062 # uc context validated.
1243 22:16:06.997152 # Handled SIG_TRIG
1244 22:16:06.997240 # SIG_OK -- SP:0xFFFFEFCAE160 si_addr@:0xffffefcae160 si_code:2 token@:(nil) offset:-281474704793952
1245 22:16:06.997330 # ==>> completed. PASS(1)
1246 22:16:06.997436 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1247 22:16:07.005299 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1248 22:16:07.053263 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1249 22:16:07.102890 # Registered handlers for all signals.
1250 22:16:07.103431 # Detected MINSTKSIGSZ:10000
1251 22:16:07.103621 # Testcase initialized.
1252 22:16:07.103760 # uc context validated.
1253 22:16:07.103887 # Handled SIG_TRIG
1254 22:16:07.104010 # SIG_OK -- SP:0xFFFFCD65C960 si_addr@:0xffffcd65c960 si_code:2 token@:(nil) offset:-281474127743328
1255 22:16:07.104137 # ==>> completed. PASS(1)
1256 22:16:07.104288 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1257 22:16:07.111787 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1258 22:16:07.160154 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1259 22:16:07.209695 # Registered handlers for all signals.
1260 22:16:07.209944 # Detected MINSTKSIGSZ:10000
1261 22:16:07.210036 # Testcase initialized.
1262 22:16:07.210606 # uc context validated.
1263 22:16:07.210718 # Handled SIG_TRIG
1264 22:16:07.210810 # SIG_OK -- SP:0xFFFFC97945E0 si_addr@:0xffffc97945e0 si_code:2 token@:(nil) offset:-281474061911520
1265 22:16:07.212692 # ==>> completed. PASS(1)
1266 22:16:07.213133 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1267 22:16:07.220000 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1268 22:16:07.266568 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1269 22:16:07.321425 # Registered handlers for all signals.
1270 22:16:07.321778 # Detected MINSTKSIGSZ:10000
1271 22:16:07.322214 # Testcase initialized.
1272 22:16:07.322407 # uc context validated.
1273 22:16:07.322582 # Handled SIG_TRIG
1274 22:16:07.322750 # SIG_OK -- SP:0xFFFFF20CC870 si_addr@:0xfffff20cc870 si_code:2 token@:(nil) offset:-281474742667376
1275 22:16:07.322925 # ==>> completed. PASS(1)
1276 22:16:07.323089 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1277 22:16:07.330220 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1278 22:16:07.378961 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1279 22:16:07.430940 # Registered handlers for all signals.
1280 22:16:07.431270 # Detected MINSTKSIGSZ:10000
1281 22:16:07.431725 # Testcase initialized.
1282 22:16:07.431905 # uc context validated.
1283 22:16:07.432050 # Handled SIG_TRIG
1284 22:16:07.432177 # SIG_OK -- SP:0xFFFFE1457360 si_addr@:0xffffe1457360 si_code:2 token@:(nil) offset:-281474461168480
1285 22:16:07.432305 # ==>> completed. PASS(1)
1286 22:16:07.432661 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1287 22:16:07.440038 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1288 22:16:07.488760 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1289 22:16:07.541374 # Registered handlers for all signals.
1290 22:16:07.541866 # Detected MINSTKSIGSZ:10000
1291 22:16:07.541974 # Testcase initialized.
1292 22:16:07.542065 # uc context validated.
1293 22:16:07.542153 # Handled SIG_TRIG
1294 22:16:07.542242 # SIG_OK -- SP:0xFFFFFB901590 si_addr@:0xfffffb901590 si_code:2 token@:(nil) offset:-281474902267280
1295 22:16:07.542350 # ==>> completed. PASS(1)
1296 22:16:07.542439 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1297 22:16:07.550109 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1298 22:16:07.601064 # selftests: arm64: sme_trap_no_sm
1299 22:16:07.717059 # Registered handlers for all signals.
1300 22:16:07.717500 # Detected MINSTKSIGSZ:10000
1301 22:16:07.717713 # Required Features: [ SME ] supported
1302 22:16:07.717886 # Incompatible Features: [] absent
1303 22:16:07.718051 # Testcase initialized.
1304 22:16:07.718412 # SIG_OK -- SP:0xFFFFCBA4D5E0 si_addr@:0xaaaacab02514 si_code:1 token@:(nil) offset:-187650521703700
1305 22:16:07.718568 # ==>> completed. PASS(1)
1306 22:16:07.718689 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1307 22:16:07.737192 ok 19 selftests: arm64: sme_trap_no_sm
1308 22:16:07.839066 # selftests: arm64: sme_trap_non_streaming
1309 22:16:07.904218 # Registered handlers for all signals.
1310 22:16:07.904549 # Detected MINSTKSIGSZ:10000
1311 22:16:07.904950 # Required Features: [] NOT supported
1312 22:16:07.905106 # Incompatible Features: [] supported
1313 22:16:07.905234 # ==>> completed. SKIP.
1314 22:16:07.905359 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1315 22:16:07.913952 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1316 22:16:07.966763 # selftests: arm64: sme_trap_za
1317 22:16:08.018574 # Registered handlers for all signals.
1318 22:16:08.019045 # Detected MINSTKSIGSZ:10000
1319 22:16:08.019152 # Testcase initialized.
1320 22:16:08.019245 # SIG_OK -- SP:0xFFFFD746D6F0 si_addr@:0xaaaac6ae2510 si_code:1 token@:(nil) offset:-187650454463760
1321 22:16:08.019333 # ==>> completed. PASS(1)
1322 22:16:08.019437 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1323 22:16:08.029015 ok 21 selftests: arm64: sme_trap_za
1324 22:16:08.080700 # selftests: arm64: sme_vl
1325 22:16:08.135355 # Registered handlers for all signals.
1326 22:16:08.135727 # Detected MINSTKSIGSZ:10000
1327 22:16:08.135962 # Required Features: [ SME ] supported
1328 22:16:08.136360 # Incompatible Features: [] absent
1329 22:16:08.136469 # Testcase initialized.
1330 22:16:08.136562 # uc context validated.
1331 22:16:08.136651 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1332 22:16:08.136738 # Handled SIG_COPYCTX
1333 22:16:08.136822 # got expected VL 32
1334 22:16:08.136903 # ==>> completed. PASS(1)
1335 22:16:08.136983 # # SME VL :: Check that we get the right SME VL reported
1336 22:16:08.144809 ok 22 selftests: arm64: sme_vl
1337 22:16:08.196663 # selftests: arm64: ssve_regs
1338 22:16:08.389344 # Registered handlers for all signals.
1339 22:16:08.389684 # Detected MINSTKSIGSZ:10000
1340 22:16:08.390117 # Required Features: [ SME FA64 ] supported
1341 22:16:08.390325 # Incompatible Features: [] absent
1342 22:16:08.390530 # Testcase initialized.
1343 22:16:08.390692 # Testing VL 256
1344 22:16:08.390821 # Validating EXTRA...
1345 22:16:08.390949 # uc context validated.
1346 22:16:08.391075 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1347 22:16:08.391201 # Handled SIG_COPYCTX
1348 22:16:08.391330 # Got expected size 8752 and VL 256
1349 22:16:08.391459 # Testing VL 128
1350 22:16:08.393378 # Validating EXTRA...
1351 22:16:08.393723 # uc context validated.
1352 22:16:08.393905 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1353 22:16:08.394047 # Handled SIG_COPYCTX
1354 22:16:08.394178 # Got expected size 4384 and VL 128
1355 22:16:08.394328 # Testing VL 64
1356 22:16:08.401231 # uc context validated.
1357 22:16:08.401706 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1358 22:16:08.401818 # Handled SIG_COPYCTX
1359 22:16:08.401913 # Got expected size 2208 and VL 64
1360 22:16:08.402011 # Testing VL 32
1361 22:16:08.402099 # uc context validated.
1362 22:16:08.402187 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1363 22:16:08.402295 # Handled SIG_COPYCTX
1364 22:16:08.402387 # Got expected size 1120 and VL 32
1365 22:16:08.402472 # Testing VL 16
1366 22:16:08.402555 # uc context validated.
1367 22:16:08.402641 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1368 22:16:08.402746 # Handled SIG_COPYCTX
1369 22:16:08.402836 # Got expected size 576 and VL 16
1370 22:16:08.402921 # ==>> completed. PASS(1)
1371 22:16:08.403020 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1372 22:16:08.403120 ok 23 selftests: arm64: ssve_regs
1373 22:16:08.450747 # selftests: arm64: sve_regs
1374 22:16:08.882176 # Registered handlers for all signals.
1375 22:16:08.884424 # Detected MINSTKSIGSZ:10000
1376 22:16:08.884582 # Required Features: [ SVE ] supported
1377 22:16:08.884773 # Incompatible Features: [] absent
1378 22:16:08.884951 # Testcase initialized.
1379 22:16:08.885132 # Testing VL 256
1380 22:16:08.885312 # Validating EXTRA...
1381 22:16:08.885453 # uc context validated.
1382 22:16:08.885597 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1383 22:16:08.885732 # Handled SIG_COPYCTX
1384 22:16:08.885846 # Got expected size 8752 and VL 256
1385 22:16:08.885964 # Testing VL 240
1386 22:16:08.886145 # Validating EXTRA...
1387 22:16:08.886265 # uc context validated.
1388 22:16:08.886388 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1389 22:16:08.893194 # Handled SIG_COPYCTX
1390 22:16:08.893640 # Got expected size 8208 and VL 240
1391 22:16:08.893851 # Testing VL 224
1392 22:16:08.894024 # Validating EXTRA...
1393 22:16:08.894191 # uc context validated.
1394 22:16:08.894389 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1395 22:16:08.894559 # Handled SIG_COPYCTX
1396 22:16:08.894731 # Got expected size 7664 and VL 224
1397 22:16:08.894893 # Testing VL 208
1398 22:16:08.895050 # Validating EXTRA...
1399 22:16:08.895206 # uc context validated.
1400 22:16:08.895399 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1401 22:16:08.895567 # Handled SIG_COPYCTX
1402 22:16:08.895726 # Got expected size 7120 and VL 208
1403 22:16:08.895885 # Testing VL 192
1404 22:16:08.896041 # Validating EXTRA...
1405 22:16:08.896194 # uc context validated.
1406 22:16:08.896347 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1407 22:16:08.896505 # Handled SIG_COPYCTX
1408 22:16:08.896661 # Got expected size 6576 and VL 192
1409 22:16:08.896818 # Testing VL 176
1410 22:16:08.896974 # Validating EXTRA...
1411 22:16:08.897127 # uc context validated.
1412 22:16:08.897337 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1413 22:16:08.897508 # Handled SIG_COPYCTX
1414 22:16:08.898189 # Got expected size 6032 and VL 176
1415 22:16:08.898385 # Testing VL 160
1416 22:16:08.898550 # Validating EXTRA...
1417 22:16:08.898715 # uc context validated.
1418 22:16:08.898875 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1419 22:16:08.899037 # Handled SIG_COPYCTX
1420 22:16:08.899198 # Got expected size 5488 and VL 160
1421 22:16:08.899356 # Testing VL 144
1422 22:16:08.899515 # Validating EXTRA...
1423 22:16:08.899669 # uc context validated.
1424 22:16:08.899820 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1425 22:16:08.899979 # Handled SIG_COPYCTX
1426 22:16:08.900138 # Got expected size 4944 and VL 144
1427 22:16:08.900299 # Testing VL 128
1428 22:16:08.900455 # Validating EXTRA...
1429 22:16:08.900611 # uc context validated.
1430 22:16:08.900768 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1431 22:16:08.900926 # Handled SIG_COPYCTX
1432 22:16:08.901085 # Got expected size 4384 and VL 128
1433 22:16:08.901222 # Testing VL 112
1434 22:16:08.901375 # Validating EXTRA...
1435 22:16:08.901492 # uc context validated.
1436 22:16:08.901636 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1437 22:16:08.901769 # Handled SIG_COPYCTX
1438 22:16:08.901883 # Got expected size 3840 and VL 112
1439 22:16:08.901996 # Testing VL 96
1440 22:16:08.902105 # uc context validated.
1441 22:16:08.902213 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1442 22:16:08.902322 # Handled SIG_COPYCTX
1443 22:16:08.902430 # Got expected size 3296 and VL 96
1444 22:16:08.907603 # Testing VL 80
1445 22:16:08.907815 # uc context validated.
1446 22:16:08.908223 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1447 22:16:08.908427 # Handled SIG_COPYCTX
1448 22:16:08.908608 # Got expected size 2752 and VL 80
1449 22:16:08.908768 # Testing VL 64
1450 22:16:08.908935 # uc context validated.
1451 22:16:08.909066 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1452 22:16:08.909219 # Handled SIG_COPYCTX
1453 22:16:08.909390 # Got expected size 2208 and VL 64
1454 22:16:08.909509 # Testing VL 48
1455 22:16:08.909672 # uc context validated.
1456 22:16:08.909870 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1457 22:16:08.910027 # Handled SIG_COPYCTX
1458 22:16:08.910193 # Got expected size 1664 and VL 48
1459 22:16:08.910334 # Testing VL 32
1460 22:16:08.910471 # uc context validated.
1461 22:16:08.910609 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1462 22:16:08.910746 # Handled SIG_COPYCTX
1463 22:16:08.910882 # Got expected size 1120 and VL 32
1464 22:16:08.911018 # Testing VL 16
1465 22:16:08.911156 # uc context validated.
1466 22:16:08.911292 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1467 22:16:08.911429 # Handled SIG_COPYCTX
1468 22:16:08.911565 # Got expected size 576 and VL 16
1469 22:16:08.911701 # ==>> completed. PASS(1)
1470 22:16:08.911837 # # SVE registers :: Check that we get the right SVE registers reported
1471 22:16:08.912008 ok 24 selftests: arm64: sve_regs
1472 22:16:09.014557 # selftests: arm64: sve_vl
1473 22:16:09.068423 # Registered handlers for all signals.
1474 22:16:09.068904 # Detected MINSTKSIGSZ:10000
1475 22:16:09.069080 # Required Features: [ SVE ] supported
1476 22:16:09.069228 # Incompatible Features: [] absent
1477 22:16:09.069347 # Testcase initialized.
1478 22:16:09.069462 # uc context validated.
1479 22:16:09.069574 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1480 22:16:09.069724 # Handled SIG_COPYCTX
1481 22:16:09.069845 # got expected VL 64
1482 22:16:09.069957 # ==>> completed. PASS(1)
1483 22:16:09.070071 # # SVE VL :: Check that we get the right SVE VL reported
1484 22:16:09.077045 ok 25 selftests: arm64: sve_vl
1485 22:16:09.126679 # selftests: arm64: za_no_regs
1486 22:16:09.189337 # Registered handlers for all signals.
1487 22:16:09.189674 # Detected MINSTKSIGSZ:10000
1488 22:16:09.190098 # Required Features: [ SME ] supported
1489 22:16:09.190263 # Incompatible Features: [] absent
1490 22:16:09.190390 # Testcase initialized.
1491 22:16:09.190507 # Testing VL 256
1492 22:16:09.190622 # uc context validated.
1493 22:16:09.190735 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1494 22:16:09.190849 # Handled SIG_COPYCTX
1495 22:16:09.190963 # Got expected size 16 and VL 256
1496 22:16:09.191076 # Testing VL 128
1497 22:16:09.191188 # uc context validated.
1498 22:16:09.191529 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1499 22:16:09.192154 # Handled SIG_COPYCTX
1500 22:16:09.192376 # Got expected size 16 and VL 128
1501 22:16:09.192572 # Testing VL 64
1502 22:16:09.192779 # uc context validated.
1503 22:16:09.192938 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1504 22:16:09.193061 # Handled SIG_COPYCTX
1505 22:16:09.193174 # Got expected size 16 and VL 64
1506 22:16:09.193287 # Testing VL 32
1507 22:16:09.193399 # uc context validated.
1508 22:16:09.193544 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1509 22:16:09.193695 # Handled SIG_COPYCTX
1510 22:16:09.193903 # Got expected size 16 and VL 32
1511 22:16:09.194091 # Testing VL 16
1512 22:16:09.194236 # uc context validated.
1513 22:16:09.194379 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1514 22:16:09.194521 # Handled SIG_COPYCTX
1515 22:16:09.194663 # Got expected size 16 and VL 16
1516 22:16:09.194805 # ==>> completed. PASS(1)
1517 22:16:09.194946 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1518 22:16:09.199839 ok 26 selftests: arm64: za_no_regs
1519 22:16:09.246743 # selftests: arm64: za_regs
1520 22:16:09.436600 # Registered handlers for all signals.
1521 22:16:09.437200 # Detected MINSTKSIGSZ:10000
1522 22:16:09.437390 # Required Features: [ SME ] supported
1523 22:16:09.437549 # Incompatible Features: [] absent
1524 22:16:09.437719 # Testcase initialized.
1525 22:16:09.437898 # Testing VL 256
1526 22:16:09.438050 # Validating EXTRA...
1527 22:16:09.438181 # uc context validated.
1528 22:16:09.438295 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1529 22:16:09.438651 # Handled SIG_COPYCTX
1530 22:16:09.438813 # Got expected size 65552 and VL 256
1531 22:16:09.438935 # Testing VL 128
1532 22:16:09.439050 # Validating EXTRA...
1533 22:16:09.439163 # uc context validated.
1534 22:16:09.439276 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1535 22:16:09.439390 # Handled SIG_COPYCTX
1536 22:16:09.439502 # Got expected size 16400 and VL 128
1537 22:16:09.439616 # Testing VL 64
1538 22:16:09.439730 # Validating EXTRA...
1539 22:16:09.439841 # uc context validated.
1540 22:16:09.439953 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1541 22:16:09.440066 # Handled SIG_COPYCTX
1542 22:16:09.440233 # Got expected size 4112 and VL 64
1543 22:16:09.440411 # Testing VL 32
1544 22:16:09.440600 # uc context validated.
1545 22:16:09.440814 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1546 22:16:09.440971 # Handled SIG_COPYCTX
1547 22:16:09.441093 # Got expected size 1040 and VL 32
1548 22:16:09.441208 # Testing VL 16
1549 22:16:09.441322 # uc context validated.
1550 22:16:09.441434 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1551 22:16:09.441548 # Handled SIG_COPYCTX
1552 22:16:09.441676 # Got expected size 272 and VL 16
1553 22:16:09.441791 # ==>> completed. PASS(1)
1554 22:16:09.441928 # # ZA register :: Check that we get the right ZA registers reported
1555 22:16:09.448162 ok 27 selftests: arm64: za_regs
1556 22:16:09.519554 # selftests: arm64: pac
1557 22:16:09.687128 # TAP version 13
1558 22:16:09.687377 # 1..7
1559 22:16:09.687688 # # Starting 7 tests from 1 test cases.
1560 22:16:09.687800 # # RUN global.corrupt_pac ...
1561 22:16:09.687891 # # OK global.corrupt_pac
1562 22:16:09.687977 # ok 1 global.corrupt_pac
1563 22:16:09.688065 # # RUN global.pac_instructions_not_nop ...
1564 22:16:09.688152 # # OK global.pac_instructions_not_nop
1565 22:16:09.688238 # ok 2 global.pac_instructions_not_nop
1566 22:16:09.688346 # # RUN global.pac_instructions_not_nop_generic ...
1567 22:16:09.688439 # # OK global.pac_instructions_not_nop_generic
1568 22:16:09.688528 # ok 3 global.pac_instructions_not_nop_generic
1569 22:16:09.688618 # # RUN global.single_thread_different_keys ...
1570 22:16:09.688707 # # OK global.single_thread_different_keys
1571 22:16:09.688814 # ok 4 global.single_thread_different_keys
1572 22:16:09.688906 # # RUN global.exec_changed_keys ...
1573 22:16:09.688995 # # OK global.exec_changed_keys
1574 22:16:09.689107 # ok 5 global.exec_changed_keys
1575 22:16:09.689206 # # RUN global.context_switch_keep_keys ...
1576 22:16:09.689313 # # OK global.context_switch_keep_keys
1577 22:16:09.689406 # ok 6 global.context_switch_keep_keys
1578 22:16:09.689496 # # RUN global.context_switch_keep_keys_generic ...
1579 22:16:09.689603 # # OK global.context_switch_keep_keys_generic
1580 22:16:09.689704 # ok 7 global.context_switch_keep_keys_generic
1581 22:16:09.689795 # # PASSED: 7 / 7 tests passed.
1582 22:16:09.689901 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1583 22:16:09.698734 ok 28 selftests: arm64: pac
1584 22:16:09.746136 # selftests: arm64: fp-stress
1585 22:16:26.064199 # TAP version 13
1586 22:16:26.064487 # 1..27
1587 22:16:26.064685 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1588 22:16:26.064869 # # Will run for 10s
1589 22:16:26.065045 # # Started FPSIMD-0-0
1590 22:16:26.065439 # # Started SVE-VL-256-0
1591 22:16:26.065550 # # Started SVE-VL-240-0
1592 22:16:26.065641 # # Started SVE-VL-224-0
1593 22:16:26.065733 # # Started SVE-VL-208-0
1594 22:16:26.065817 # # Started SVE-VL-192-0
1595 22:16:26.065904 # # Started SVE-VL-176-0
1596 22:16:26.065987 # # Started SVE-VL-160-0
1597 22:16:26.066068 # # Started SVE-VL-144-0
1598 22:16:26.066151 # # Started SVE-VL-128-0
1599 22:16:26.066232 # # Started SVE-VL-112-0
1600 22:16:26.066313 # # Started SVE-VL-96-0
1601 22:16:26.066395 # # Started SVE-VL-80-0
1602 22:16:26.066477 # # Started SVE-VL-64-0
1603 22:16:26.066559 # # Started SVE-VL-48-0
1604 22:16:26.066641 # # Started SVE-VL-32-0
1605 22:16:26.066722 # # Started SVE-VL-16-0
1606 22:16:26.066804 # # Started SSVE-VL-256-0
1607 22:16:26.066885 # # Started ZA-VL-256-0
1608 22:16:26.066966 # # Started SSVE-VL-128-0
1609 22:16:26.067047 # # Started ZA-VL-128-0
1610 22:16:26.067133 # # Started SSVE-VL-64-0
1611 22:16:26.067214 # # Started ZA-VL-64-0
1612 22:16:26.067297 # # Started SSVE-VL-32-0
1613 22:16:26.067378 # # Started ZA-VL-32-0
1614 22:16:26.067459 # # Started SSVE-VL-16-0
1615 22:16:26.067561 # # Started ZA-VL-16-0
1616 22:16:26.067646 # # FPSIMD-0-0: Vector length: 128 bits
1617 22:16:26.067729 # # SVE-VL-256-0: Vector length: 2048 bits
1618 22:16:26.067811 # # SVE-VL-256-0: PID: 912
1619 22:16:26.071901 # # FPSIMD-0-0: PID: 911
1620 22:16:26.072213 # # SVE-VL-128-0: Vector length: 1024 bits
1621 22:16:26.072306 # # SVE-VL-128-0: PID: 920
1622 22:16:26.072390 # # SVE-VL-224-0: Vector length: 1792 bits
1623 22:16:26.072474 # # SVE-VL-224-0: PID: 914
1624 22:16:26.072572 # # SVE-VL-176-0: Vector length: 1408 bits
1625 22:16:26.072658 # # SVE-VL-176-0: PID: 917
1626 22:16:26.072741 # # SVE-VL-208-0: Vector length: 1664 bits
1627 22:16:26.072840 # # SVE-VL-208-0: PID: 915
1628 22:16:26.072924 # # SVE-VL-48-0: Vector length: 384 bits
1629 22:16:26.073007 # # SVE-VL-48-0: PID: 925
1630 22:16:26.073107 # # SVE-VL-144-0: Vector length: 1152 bits
1631 22:16:26.073201 # # SVE-VL-144-0: PID: 919
1632 22:16:26.073302 # # SVE-VL-16-0: Vector length: 128 bits
1633 22:16:26.073391 # # SVE-VL-16-0: PID: 927
1634 22:16:26.073489 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1635 22:16:26.073575 # # ZA-VL-128-0: PID: 931
1636 22:16:26.073680 # # SVE-VL-64-0: Vector length: 512 bits
1637 22:16:26.073768 # # SVE-VL-64-0: PID: 924
1638 22:16:26.073866 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1639 22:16:26.073965 # # SSVE-VL-128-0: PID: 930
1640 22:16:26.077796 # # SVE-VL-160-0: Vector length: 1280 bits
1641 22:16:26.080373 # # SVE-VL-160-0: PID: 918
1642 22:16:26.080484 # # SVE-VL-80-0: Vector length: 640 bits
1643 22:16:26.080570 # # SVE-VL-80-0: PID: 923
1644 22:16:26.080669 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1645 22:16:26.080755 # # ZA-VL-32-0: PID: 935
1646 22:16:26.080837 # # SVE-VL-96-0: Vector length: 768 bits
1647 22:16:26.080934 # # SVE-VL-96-0: PID: 922
1648 22:16:26.081022 # # SVE-VL-32-0: Vector length: 256 bits
1649 22:16:26.081106 # # SVE-VL-32-0: PID: 926
1650 22:16:26.081213 # # SVE-VL-112-0: Vector length: 896 bits
1651 22:16:26.081302 # # SVE-VL-112-0: PID: 921
1652 22:16:26.081582 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1653 22:16:26.081698 # # SSVE-VL-64-0: PID: 932
1654 22:16:26.081808 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1655 22:16:26.081908 # # SSVE-VL-16-0: PID: 936
1656 22:16:26.082006 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1657 22:16:26.083025 # # SSVE-VL-32-0: PID: 934
1658 22:16:26.083376 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1659 22:16:26.083483 # # SSVE-VL-256-0: PID: 928
1660 22:16:26.083586 # # SVE-VL-192-0: Vector length: 1536 bits
1661 22:16:26.083673 # # SVE-VL-192-0: PID: 916
1662 22:16:26.083757 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1663 22:16:26.083840 # # ZA-VL-16-0: PID: 937
1664 22:16:26.083939 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1665 22:16:26.084025 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1666 22:16:26.084110 # # ZA-VL-64-0: PID: 933
1667 22:16:26.084195 # # SVE-VL-240-0: Vector length: 1920 bits
1668 22:16:26.084292 # # SVE-VL-240-0: PID: 913
1669 22:16:26.084378 # # ZA-VL-256-0: PID: 929
1670 22:16:26.084461 # # Finishing up...
1671 22:16:26.084544 # ok 1 FPSIMD-0-0
1672 22:16:26.084626 # ok 2 SVE-VL-256-0
1673 22:16:26.084725 # ok 3 SVE-VL-240-0
1674 22:16:26.084809 # ok 4 SVE-VL-224-0
1675 22:16:26.084891 # ok 5 SVE-VL-208-0
1676 22:16:26.084973 # ok 6 SVE-VL-192-0
1677 22:16:26.085055 # ok 7 SVE-VL-176-0
1678 22:16:26.085137 # ok 8 SVE-VL-160-0
1679 22:16:26.085230 # ok 9 SVE-VL-144-0
1680 22:16:26.085315 # ok 10 SVE-VL-128-0
1681 22:16:26.085399 # ok 11 SVE-VL-112-0
1682 22:16:26.085481 # ok 12 SVE-VL-96-0
1683 22:16:26.085583 # ok 13 SVE-VL-80-0
1684 22:16:26.085678 # ok 14 SVE-VL-64-0
1685 22:16:26.085764 # ok 15 SVE-VL-48-0
1686 22:16:26.085847 # ok 16 SVE-VL-32-0
1687 22:16:26.085931 # ok 17 SVE-VL-16-0
1688 22:16:26.086015 # ok 18 SSVE-VL-256-0
1689 22:16:26.086097 # ok 19 ZA-VL-256-0
1690 22:16:26.086182 # ok 20 SSVE-VL-128-0
1691 22:16:26.086264 # ok 21 ZA-VL-128-0
1692 22:16:26.086346 # ok 22 SSVE-VL-64-0
1693 22:16:26.086427 # ok 23 ZA-VL-64-0
1694 22:16:26.086509 # ok 24 SSVE-VL-32-0
1695 22:16:26.086590 # ok 25 ZA-VL-32-0
1696 22:16:26.086672 # ok 26 SSVE-VL-16-0
1697 22:16:26.086753 # ok 27 ZA-VL-16-0
1698 22:16:26.086852 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=4121, signals=9
1699 22:16:26.086939 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=757, signals=9
1700 22:16:26.087263 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=1801, signals=9
1701 22:16:26.087709 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=2659, signals=9
1702 22:16:26.087923 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=9155, signals=9
1703 22:16:26.088138 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=122, signals=8
1704 22:16:26.088325 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=12008, signals=9
1705 22:16:26.088460 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=4406, signals=9
1706 22:16:26.088581 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=13037, signals=9
1707 22:16:26.188237 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=4343, signals=9
1708 22:16:26.188820 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2474, signals=9
1709 22:16:26.188936 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3287, signals=9
1710 22:16:26.189033 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3667, signals=9
1711 22:16:26.189122 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=6532, signals=9
1712 22:16:26.189226 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1789, signals=9
1713 22:16:26.189316 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=4121, signals=9
1714 22:16:26.189423 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=3476, signals=9
1715 22:16:26.189509 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=2828, signals=9
1716 22:16:26.189810 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=3309, signals=9
1717 22:16:26.189917 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=1209, signals=7
1718 22:16:26.190025 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=6358, signals=9
1719 22:16:26.201874 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=9022, signals=9
1720 22:16:26.202178 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=2728, signals=9
1721 22:16:26.225571 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=5499, signals=9
1722 22:16:26.225868 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=743, signals=7
1723 22:16:26.225992 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2381, signals=9
1724 22:16:26.226095 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=7728, signals=9
1725 22:16:26.264097 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1726 22:16:26.264704 ok 29 selftests: arm64: fp-stress
1727 22:16:26.480935 # selftests: arm64: sve-ptrace
1728 22:16:26.649419 # TAP version 13
1729 22:16:26.649540 # 1..4104
1730 22:16:26.649869 # # Parent is 954, child is 955
1731 22:16:26.650063 # ok 1 SVE FPSIMD set via SVE: 0
1732 22:16:26.650240 # ok 2 SVE get_fpsimd() gave same state
1733 22:16:26.650389 # ok 3 SVE SVE_PT_VL_INHERIT set
1734 22:16:26.650568 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1735 22:16:26.650737 # ok 5 Set SVE VL 16
1736 22:16:26.650929 # ok 6 Set and get SVE data for VL 16
1737 22:16:26.651139 # ok 7 Set and get FPSIMD data for SVE VL 16
1738 22:16:26.651284 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1739 22:16:26.651428 # ok 9 Set SVE VL 32
1740 22:16:26.651570 # ok 10 Set and get SVE data for VL 32
1741 22:16:26.651747 # ok 11 Set and get FPSIMD data for SVE VL 32
1742 22:16:26.651884 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1743 22:16:26.652026 # ok 13 Set SVE VL 48
1744 22:16:26.652166 # ok 14 Set and get SVE data for VL 48
1745 22:16:26.652308 # ok 15 Set and get FPSIMD data for SVE VL 48
1746 22:16:26.652448 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1747 22:16:26.652625 # ok 17 Set SVE VL 64
1748 22:16:26.652760 # ok 18 Set and get SVE data for VL 64
1749 22:16:26.652901 # ok 19 Set and get FPSIMD data for SVE VL 64
1750 22:16:26.653043 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1751 22:16:26.653183 # ok 21 Set SVE VL 80
1752 22:16:26.653325 # ok 22 Set and get SVE data for VL 80
1753 22:16:26.653466 # ok 23 Set and get FPSIMD data for SVE VL 80
1754 22:16:26.653605 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1755 22:16:26.653797 # ok 25 Set SVE VL 96
1756 22:16:26.653933 # ok 26 Set and get SVE data for VL 96
1757 22:16:26.654074 # ok 27 Set and get FPSIMD data for SVE VL 96
1758 22:16:26.654215 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1759 22:16:26.654356 # ok 29 Set SVE VL 112
1760 22:16:26.654496 # ok 30 Set and get SVE data for VL 112
1761 22:16:26.654636 # ok 31 Set and get FPSIMD data for SVE VL 112
1762 22:16:26.654777 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1763 22:16:26.654917 # ok 33 Set SVE VL 128
1764 22:16:26.655056 # ok 34 Set and get SVE data for VL 128
1765 22:16:26.655195 # ok 35 Set and get FPSIMD data for SVE VL 128
1766 22:16:26.655336 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1767 22:16:26.655512 # ok 37 Set SVE VL 144
1768 22:16:26.655646 # ok 38 Set and get SVE data for VL 144
1769 22:16:26.655786 # ok 39 Set and get FPSIMD data for SVE VL 144
1770 22:16:26.659615 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1771 22:16:26.659789 # ok 41 Set SVE VL 160
1772 22:16:26.660120 # ok 42 Set and get SVE data for VL 160
1773 22:16:26.660231 # ok 43 Set and get FPSIMD data for SVE VL 160
1774 22:16:26.660323 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1775 22:16:26.660409 # ok 45 Set SVE VL 176
1776 22:16:26.660511 # ok 46 Set and get SVE data for VL 176
1777 22:16:26.660598 # ok 47 Set and get FPSIMD data for SVE VL 176
1778 22:16:26.660683 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1779 22:16:26.660767 # ok 49 Set SVE VL 192
1780 22:16:26.660867 # ok 50 Set and get SVE data for VL 192
1781 22:16:26.660955 # ok 51 Set and get FPSIMD data for SVE VL 192
1782 22:16:26.661055 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1783 22:16:26.661147 # ok 53 Set SVE VL 208
1784 22:16:26.661237 # ok 54 Set and get SVE data for VL 208
1785 22:16:26.661340 # ok 55 Set and get FPSIMD data for SVE VL 208
1786 22:16:26.661428 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1787 22:16:26.661528 # ok 57 Set SVE VL 224
1788 22:16:26.661615 # ok 58 Set and get SVE data for VL 224
1789 22:16:26.661723 # ok 59 Set and get FPSIMD data for SVE VL 224
1790 22:16:26.661811 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1791 22:16:26.661910 # ok 61 Set SVE VL 240
1792 22:16:26.661998 # ok 62 Set and get SVE data for VL 240
1793 22:16:26.662096 # ok 63 Set and get FPSIMD data for SVE VL 240
1794 22:16:26.662181 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1795 22:16:26.668263 # ok 65 Set SVE VL 256
1796 22:16:26.668369 # ok 66 Set and get SVE data for VL 256
1797 22:16:26.668672 # ok 67 Set and get FPSIMD data for SVE VL 256
1798 22:16:26.668777 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1799 22:16:26.668862 # ok 69 Set SVE VL 272
1800 22:16:26.668944 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1801 22:16:26.669042 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1802 22:16:26.669127 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1803 22:16:26.669209 # ok 73 Set SVE VL 288
1804 22:16:26.669310 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1805 22:16:26.669397 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1806 22:16:26.669479 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1807 22:16:26.669561 # ok 77 Set SVE VL 304
1808 22:16:26.669665 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1809 22:16:26.669751 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1810 22:16:26.669833 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1811 22:16:26.669930 # ok 81 Set SVE VL 320
1812 22:16:26.670015 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1813 22:16:26.670111 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1814 22:16:26.670196 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1815 22:16:26.670780 # ok 85 Set SVE VL 336
1816 22:16:26.671211 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1817 22:16:26.671316 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1818 22:16:26.671405 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1819 22:16:26.671503 # ok 89 Set SVE VL 352
1820 22:16:26.671791 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1821 22:16:26.671895 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1822 22:16:26.671982 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1823 22:16:26.672068 # ok 93 Set SVE VL 368
1824 22:16:26.672166 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1825 22:16:26.672250 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1826 22:16:26.672334 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1827 22:16:26.672431 # ok 97 Set SVE VL 384
1828 22:16:26.672515 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1829 22:16:26.672597 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1830 22:16:26.672694 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1831 22:16:26.672778 # ok 101 Set SVE VL 400
1832 22:16:26.674219 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1833 22:16:26.683939 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1834 22:16:26.684247 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1835 22:16:26.684355 # ok 105 Set SVE VL 416
1836 22:16:26.684440 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1837 22:16:26.684541 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1838 22:16:26.684626 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1839 22:16:26.684709 # ok 109 Set SVE VL 432
1840 22:16:26.684806 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1841 22:16:26.684894 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1842 22:16:26.684992 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1843 22:16:26.685077 # ok 113 Set SVE VL 448
1844 22:16:26.685158 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1845 22:16:26.685238 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1846 22:16:26.685339 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1847 22:16:26.685425 # ok 117 Set SVE VL 464
1848 22:16:26.685523 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1849 22:16:26.685608 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1850 22:16:26.685714 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1851 22:16:26.685800 # ok 121 Set SVE VL 480
1852 22:16:26.685899 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1853 22:16:26.685986 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1854 22:16:26.686657 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1855 22:16:26.686938 # ok 125 Set SVE VL 496
1856 22:16:26.687029 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1857 22:16:26.687129 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1858 22:16:26.687229 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1859 22:16:26.687334 # ok 129 Set SVE VL 512
1860 22:16:26.687595 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1861 22:16:26.687703 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1862 22:16:26.687807 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1863 22:16:26.687894 # ok 133 Set SVE VL 528
1864 22:16:26.687993 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1865 22:16:26.688079 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1866 22:16:26.688177 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1867 22:16:26.688262 # ok 137 Set SVE VL 544
1868 22:16:26.688358 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1869 22:16:26.688457 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1870 22:16:26.688555 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1871 22:16:26.688653 # ok 141 Set SVE VL 560
1872 22:16:26.688751 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1873 22:16:26.688849 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1874 22:16:26.689209 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1875 22:16:26.689315 # ok 145 Set SVE VL 576
1876 22:16:26.689423 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1877 22:16:26.689508 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1878 22:16:26.689591 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1879 22:16:26.689681 # ok 149 Set SVE VL 592
1880 22:16:26.689780 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1881 22:16:26.689866 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1882 22:16:26.689950 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1883 22:16:26.690058 # ok 153 Set SVE VL 608
1884 22:16:26.690143 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1885 22:16:26.690241 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1886 22:16:26.690326 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1887 22:16:26.690408 # ok 157 Set SVE VL 624
1888 22:16:26.690490 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1889 22:16:26.690587 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1890 22:16:26.690672 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1891 22:16:26.690755 # ok 161 Set SVE VL 640
1892 22:16:26.690853 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1893 22:16:26.690938 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1894 22:16:26.691021 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1895 22:16:26.691119 # ok 165 Set SVE VL 656
1896 22:16:26.691203 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1897 22:16:26.691286 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1898 22:16:26.691384 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1899 22:16:26.691469 # ok 169 Set SVE VL 672
1900 22:16:26.691551 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1901 22:16:26.691649 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1902 22:16:26.691749 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1903 22:16:26.691836 # ok 173 Set SVE VL 688
1904 22:16:26.691935 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1905 22:16:26.692022 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1906 22:16:26.692119 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1907 22:16:26.692204 # ok 177 Set SVE VL 704
1908 22:16:26.692301 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1909 22:16:26.692386 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1910 22:16:26.692483 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1911 22:16:26.692569 # ok 181 Set SVE VL 720
1912 22:16:26.692654 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1913 22:16:26.692751 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1914 22:16:26.692837 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1915 22:16:26.692934 # ok 185 Set SVE VL 736
1916 22:16:26.693019 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1917 22:16:26.693115 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1918 22:16:26.693201 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1919 22:16:26.693522 # ok 189 Set SVE VL 752
1920 22:16:26.693693 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1921 22:16:26.708599 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1922 22:16:26.709020 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1923 22:16:26.709126 # ok 193 Set SVE VL 768
1924 22:16:26.709217 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1925 22:16:26.709304 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1926 22:16:26.709405 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1927 22:16:26.709491 # ok 197 Set SVE VL 784
1928 22:16:26.709576 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1929 22:16:26.709683 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1930 22:16:26.709770 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1931 22:16:26.709867 # ok 201 Set SVE VL 800
1932 22:16:26.709966 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1933 22:16:26.710050 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1934 22:16:26.710132 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1935 22:16:26.710214 # ok 205 Set SVE VL 816
1936 22:16:26.710310 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1937 22:16:26.710914 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1938 22:16:26.711077 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1939 22:16:26.711200 # ok 209 Set SVE VL 832
1940 22:16:26.711342 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1941 22:16:26.711464 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1942 22:16:26.711580 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1943 22:16:26.711696 # ok 213 Set SVE VL 848
1944 22:16:26.711809 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1945 22:16:26.711949 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1946 22:16:26.712069 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1947 22:16:26.712185 # ok 217 Set SVE VL 864
1948 22:16:26.712300 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1949 22:16:26.712437 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1950 22:16:26.712556 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1951 22:16:26.712672 # ok 221 Set SVE VL 880
1952 22:16:26.712788 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1953 22:16:26.712928 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1954 22:16:26.713051 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1955 22:16:26.713169 # ok 225 Set SVE VL 896
1956 22:16:26.713285 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1957 22:16:26.713399 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1958 22:16:26.713518 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1959 22:16:26.713693 # ok 229 Set SVE VL 912
1960 22:16:26.713859 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1961 22:16:26.714194 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1962 22:16:26.714340 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1963 22:16:26.714457 # ok 233 Set SVE VL 928
1964 22:16:26.714605 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1965 22:16:26.714731 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1966 22:16:26.714850 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1967 22:16:26.714967 # ok 237 Set SVE VL 944
1968 22:16:26.715083 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1969 22:16:26.715197 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1970 22:16:26.715311 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1971 22:16:26.715427 # ok 241 Set SVE VL 960
1972 22:16:26.715540 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1973 22:16:26.715654 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1974 22:16:26.715768 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1975 22:16:26.715881 # ok 245 Set SVE VL 976
1976 22:16:26.721994 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1977 22:16:26.722266 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1978 22:16:26.722491 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1979 22:16:26.722663 # ok 249 Set SVE VL 992
1980 22:16:26.722889 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1981 22:16:26.723067 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1982 22:16:26.723258 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1983 22:16:26.723410 # ok 253 Set SVE VL 1008
1984 22:16:26.723555 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1985 22:16:26.723693 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1986 22:16:26.723880 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1987 22:16:26.724025 # ok 257 Set SVE VL 1024
1988 22:16:26.724177 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1989 22:16:26.724334 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1990 22:16:26.724477 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1991 22:16:26.724614 # ok 261 Set SVE VL 1040
1992 22:16:26.724765 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1993 22:16:26.724908 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1994 22:16:26.725098 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1995 22:16:26.725262 # ok 265 Set SVE VL 1056
1996 22:16:26.725420 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1997 22:16:26.725574 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1998 22:16:26.725758 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1999 22:16:26.725960 # ok 269 Set SVE VL 1072
2000 22:16:26.726146 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
2001 22:16:26.726331 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
2002 22:16:26.726514 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2003 22:16:26.726660 # ok 273 Set SVE VL 1088
2004 22:16:26.726802 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2005 22:16:26.726945 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2006 22:16:26.727087 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2007 22:16:26.727230 # ok 277 Set SVE VL 1104
2008 22:16:26.727415 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2009 22:16:26.727554 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2010 22:16:26.727698 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2011 22:16:26.727843 # ok 281 Set SVE VL 1120
2012 22:16:26.727987 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2013 22:16:26.728129 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2014 22:16:26.728270 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2015 22:16:26.728413 # ok 285 Set SVE VL 1136
2016 22:16:26.728555 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2017 22:16:26.728697 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2018 22:16:26.738457 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2019 22:16:26.738974 # ok 289 Set SVE VL 1152
2020 22:16:26.739128 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2021 22:16:26.739252 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2022 22:16:26.739371 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2023 22:16:26.741808 # ok 293 Set SVE VL 1168
2024 22:16:26.741976 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2025 22:16:26.742074 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2026 22:16:26.742159 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2027 22:16:26.742252 # ok 297 Set SVE VL 1184
2028 22:16:26.742947 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2029 22:16:26.743254 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2030 22:16:26.743361 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2031 22:16:26.743452 # ok 301 Set SVE VL 1200
2032 22:16:26.743554 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2033 22:16:26.743643 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2034 22:16:26.743743 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2035 22:16:26.743831 # ok 305 Set SVE VL 1216
2036 22:16:26.743936 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2037 22:16:26.744225 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2038 22:16:26.744329 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2039 22:16:26.744432 # ok 309 Set SVE VL 1232
2040 22:16:26.744519 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2041 22:16:26.744618 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2042 22:16:26.744718 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2043 22:16:26.744818 # ok 313 Set SVE VL 1248
2044 22:16:26.745115 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2045 22:16:26.745218 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2046 22:16:26.745321 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2047 22:16:26.745413 # ok 317 Set SVE VL 1264
2048 22:16:26.745528 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2049 22:16:26.745631 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2050 22:16:26.745938 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2051 22:16:26.746042 # ok 321 Set SVE VL 1280
2052 22:16:26.746338 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2053 22:16:26.749132 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2054 22:16:26.749492 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2055 22:16:26.749597 # ok 325 Set SVE VL 1296
2056 22:16:26.749697 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2057 22:16:26.749801 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2058 22:16:26.749889 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2059 22:16:26.749990 # ok 329 Set SVE VL 1312
2060 22:16:26.750071 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2061 22:16:26.750823 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2062 22:16:26.751131 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2063 22:16:26.751224 # ok 333 Set SVE VL 1328
2064 22:16:26.751325 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2065 22:16:26.751414 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2066 22:16:26.751519 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2067 22:16:26.751622 # ok 337 Set SVE VL 1344
2068 22:16:26.751709 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2069 22:16:26.751808 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2070 22:16:26.751982 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2071 22:16:26.752105 # ok 341 Set SVE VL 1360
2072 22:16:26.752409 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2073 22:16:26.752529 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2074 22:16:26.752620 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2075 22:16:26.752720 # ok 345 Set SVE VL 1376
2076 22:16:26.752820 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2077 22:16:26.752920 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2078 22:16:26.753029 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2079 22:16:26.753314 # ok 349 Set SVE VL 1392
2080 22:16:26.753419 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2081 22:16:26.753528 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2082 22:16:26.753636 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2083 22:16:26.753730 # ok 353 Set SVE VL 1408
2084 22:16:26.753832 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2085 22:16:26.754120 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2086 22:16:26.758886 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2087 22:16:26.759269 # ok 357 Set SVE VL 1424
2088 22:16:26.759375 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2089 22:16:26.759466 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2090 22:16:26.759570 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2091 22:16:26.759658 # ok 361 Set SVE VL 1440
2092 22:16:26.759745 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2093 22:16:26.759848 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2094 22:16:26.759941 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2095 22:16:26.760027 # ok 365 Set SVE VL 1456
2096 22:16:26.760130 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2097 22:16:26.760235 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2098 22:16:26.760539 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2099 22:16:26.760642 # ok 369 Set SVE VL 1472
2100 22:16:26.760728 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2101 22:16:26.760828 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2102 22:16:26.760914 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2103 22:16:26.761013 # ok 373 Set SVE VL 1488
2104 22:16:26.761100 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2105 22:16:26.761197 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2106 22:16:26.761298 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2107 22:16:26.761395 # ok 377 Set SVE VL 1504
2108 22:16:26.761498 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2109 22:16:26.761828 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2110 22:16:26.761932 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2111 22:16:26.762033 # ok 381 Set SVE VL 1520
2112 22:16:26.762133 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2113 22:16:26.766888 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2114 22:16:26.767323 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2115 22:16:26.767428 # ok 385 Set SVE VL 1536
2116 22:16:26.767523 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2117 22:16:26.767608 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2118 22:16:26.767713 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2119 22:16:26.767800 # ok 389 Set SVE VL 1552
2120 22:16:26.767899 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2121 22:16:26.768187 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2122 22:16:26.768292 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2123 22:16:26.768394 # ok 393 Set SVE VL 1568
2124 22:16:26.768483 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2125 22:16:26.768568 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2126 22:16:26.768666 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2127 22:16:26.768749 # ok 397 Set SVE VL 1584
2128 22:16:26.768847 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2129 22:16:26.768934 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2130 22:16:26.769033 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2131 22:16:26.769129 # ok 401 Set SVE VL 1600
2132 22:16:26.769228 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2133 22:16:26.769337 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2134 22:16:26.769666 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2135 22:16:26.769772 # ok 405 Set SVE VL 1616
2136 22:16:26.769874 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2137 22:16:26.769974 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2138 22:16:26.774874 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2139 22:16:26.775297 # ok 409 Set SVE VL 1632
2140 22:16:26.775403 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2141 22:16:26.775494 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2142 22:16:26.775598 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2143 22:16:26.775687 # ok 413 Set SVE VL 1648
2144 22:16:26.775773 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2145 22:16:26.775873 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2146 22:16:26.775960 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2147 22:16:26.776046 # ok 417 Set SVE VL 1664
2148 22:16:26.776144 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2149 22:16:26.776230 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2150 22:16:26.776329 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2151 22:16:26.776429 # ok 421 Set SVE VL 1680
2152 22:16:26.776530 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2153 22:16:26.776896 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2154 22:16:26.777001 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2155 22:16:26.777089 # ok 425 Set SVE VL 1696
2156 22:16:26.777190 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2157 22:16:26.777291 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2158 22:16:26.777392 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2159 22:16:26.777494 # ok 429 Set SVE VL 1712
2160 22:16:26.777785 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2161 22:16:26.777887 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2162 22:16:26.777988 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2163 22:16:26.778267 # ok 433 Set SVE VL 1728
2164 22:16:26.786441 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2165 22:16:26.787008 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2166 22:16:26.787214 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2167 22:16:26.787398 # ok 437 Set SVE VL 1744
2168 22:16:26.787625 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2169 22:16:26.787847 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2170 22:16:26.788074 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2171 22:16:26.788249 # ok 441 Set SVE VL 1760
2172 22:16:26.788414 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2173 22:16:26.788576 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2174 22:16:26.788734 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2175 22:16:26.788926 # ok 445 Set SVE VL 1776
2176 22:16:26.789099 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2177 22:16:26.789262 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2178 22:16:26.789464 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2179 22:16:26.789643 # ok 449 Set SVE VL 1792
2180 22:16:26.789830 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2181 22:16:26.790002 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2182 22:16:26.790142 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2183 22:16:26.790259 # ok 453 Set SVE VL 1808
2184 22:16:26.790373 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2185 22:16:26.790487 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2186 22:16:26.790602 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2187 22:16:26.790715 # ok 457 Set SVE VL 1824
2188 22:16:26.790828 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2189 22:16:26.790939 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2190 22:16:26.791053 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2191 22:16:26.791165 # ok 461 Set SVE VL 1840
2192 22:16:26.791307 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2193 22:16:26.791426 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2194 22:16:26.791541 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2195 22:16:26.791659 # ok 465 Set SVE VL 1856
2196 22:16:26.791773 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2197 22:16:26.791887 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2198 22:16:26.795055 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2199 22:16:26.795399 # ok 469 Set SVE VL 1872
2200 22:16:26.795516 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2201 22:16:26.795625 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2202 22:16:26.795734 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2203 22:16:26.795824 # ok 473 Set SVE VL 1888
2204 22:16:26.795910 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2205 22:16:26.796011 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2206 22:16:26.796099 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2207 22:16:26.796184 # ok 477 Set SVE VL 1904
2208 22:16:26.796288 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2209 22:16:26.796380 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2210 22:16:26.802922 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2211 22:16:26.803498 # ok 481 Set SVE VL 1920
2212 22:16:26.803706 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2213 22:16:26.803876 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2214 22:16:26.804068 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2215 22:16:26.804238 # ok 485 Set SVE VL 1936
2216 22:16:26.804394 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2217 22:16:26.804583 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2218 22:16:26.804746 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2219 22:16:26.804915 # ok 489 Set SVE VL 1952
2220 22:16:26.805114 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2221 22:16:26.805305 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2222 22:16:26.805463 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2223 22:16:26.805588 # ok 493 Set SVE VL 1968
2224 22:16:26.805727 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2225 22:16:26.805843 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2226 22:16:26.805969 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2227 22:16:26.806127 # ok 497 Set SVE VL 1984
2228 22:16:26.806253 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2229 22:16:26.806370 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2230 22:16:26.806485 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2231 22:16:26.806599 # ok 501 Set SVE VL 2000
2232 22:16:26.806713 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2233 22:16:26.806828 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2234 22:16:26.806942 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2235 22:16:26.807056 # ok 505 Set SVE VL 2016
2236 22:16:26.807169 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2237 22:16:26.807282 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2238 22:16:26.807396 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2239 22:16:26.807510 # ok 509 Set SVE VL 2032
2240 22:16:26.807625 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2241 22:16:26.810793 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2242 22:16:26.811246 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2243 22:16:26.811363 # ok 513 Set SVE VL 2048
2244 22:16:26.811454 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2245 22:16:26.811540 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2246 22:16:26.811643 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2247 22:16:26.811733 # ok 517 Set SVE VL 2064
2248 22:16:26.811823 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2249 22:16:26.811933 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2250 22:16:26.812026 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2251 22:16:26.812113 # ok 521 Set SVE VL 2080
2252 22:16:26.812217 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2253 22:16:26.812308 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2254 22:16:26.812411 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2255 22:16:26.812504 # ok 525 Set SVE VL 2096
2256 22:16:26.812605 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2257 22:16:26.812698 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2258 22:16:26.812802 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2259 22:16:26.812889 # ok 529 Set SVE VL 2112
2260 22:16:26.812988 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2261 22:16:26.813089 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2262 22:16:26.813189 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2263 22:16:26.813292 # ok 533 Set SVE VL 2128
2264 22:16:26.813395 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2265 22:16:26.813709 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2266 22:16:26.813818 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2267 22:16:26.813922 # ok 537 Set SVE VL 2144
2268 22:16:26.814013 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2269 22:16:26.814115 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2270 22:16:26.816213 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2271 22:16:26.816549 # ok 541 Set SVE VL 2160
2272 22:16:26.816658 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2273 22:16:26.816750 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2274 22:16:26.816856 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2275 22:16:26.816948 # ok 545 Set SVE VL 2176
2276 22:16:26.817053 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2277 22:16:26.817140 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2278 22:16:26.817239 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2279 22:16:26.817325 # ok 549 Set SVE VL 2192
2280 22:16:26.817407 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2281 22:16:26.817510 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2282 22:16:26.817611 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2283 22:16:26.817710 # ok 553 Set SVE VL 2208
2284 22:16:26.817806 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2285 22:16:26.817904 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2286 22:16:26.818000 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2287 22:16:26.818099 # ok 557 Set SVE VL 2224
2288 22:16:26.818822 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2289 22:16:26.819018 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2290 22:16:26.819454 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2291 22:16:26.819659 # ok 561 Set SVE VL 2240
2292 22:16:26.819862 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2293 22:16:26.820028 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2294 22:16:26.820191 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2295 22:16:26.820349 # ok 565 Set SVE VL 2256
2296 22:16:26.820502 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2297 22:16:26.820658 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2298 22:16:26.820842 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2299 22:16:26.821020 # ok 569 Set SVE VL 2272
2300 22:16:26.821184 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2301 22:16:26.821350 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2302 22:16:26.821515 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2303 22:16:26.821703 # ok 573 Set SVE VL 2288
2304 22:16:26.821871 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2305 22:16:26.822045 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2306 22:16:26.822238 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2307 22:16:26.822420 # ok 577 Set SVE VL 2304
2308 22:16:26.822587 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2309 22:16:26.822754 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2310 22:16:26.822952 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2311 22:16:26.823152 # ok 581 Set SVE VL 2320
2312 22:16:26.823443 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2313 22:16:26.823639 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2314 22:16:26.823855 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2315 22:16:26.824033 # ok 585 Set SVE VL 2336
2316 22:16:26.824237 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2317 22:16:26.824468 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2318 22:16:26.824689 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2319 22:16:26.824906 # ok 589 Set SVE VL 2352
2320 22:16:26.825112 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2321 22:16:26.825321 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2322 22:16:26.825515 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2323 22:16:26.825731 # ok 593 Set SVE VL 2368
2324 22:16:26.825956 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2325 22:16:26.826158 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2326 22:16:26.826360 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2327 22:16:26.826558 # ok 597 Set SVE VL 2384
2328 22:16:26.826723 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2329 22:16:26.826844 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2330 22:16:26.826958 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2331 22:16:26.827094 # ok 601 Set SVE VL 2400
2332 22:16:26.827241 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2333 22:16:26.827387 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2334 22:16:26.827754 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2335 22:16:26.827865 # ok 605 Set SVE VL 2416
2336 22:16:26.827961 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2337 22:16:26.828051 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2338 22:16:26.828140 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2339 22:16:26.828231 # ok 609 Set SVE VL 2432
2340 22:16:26.828319 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2341 22:16:26.828407 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2342 22:16:26.828496 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2343 22:16:26.828581 # ok 613 Set SVE VL 2448
2344 22:16:26.828660 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2345 22:16:26.828743 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2346 22:16:26.828826 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2347 22:16:26.828909 # ok 617 Set SVE VL 2464
2348 22:16:26.828994 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2349 22:16:26.829077 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2350 22:16:26.829160 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2351 22:16:26.829245 # ok 621 Set SVE VL 2480
2352 22:16:26.829329 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2353 22:16:26.829411 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2354 22:16:26.829494 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2355 22:16:26.829581 # ok 625 Set SVE VL 2496
2356 22:16:26.829673 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2357 22:16:26.829758 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2358 22:16:26.829839 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2359 22:16:26.829922 # ok 629 Set SVE VL 2512
2360 22:16:26.830004 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2361 22:16:26.830088 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2362 22:16:26.830171 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2363 22:16:26.830254 # ok 633 Set SVE VL 2528
2364 22:16:26.830336 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2365 22:16:26.830418 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2366 22:16:26.830501 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2367 22:16:26.830582 # ok 637 Set SVE VL 2544
2368 22:16:26.830668 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2369 22:16:26.830751 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2370 22:16:26.830835 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2371 22:16:26.830919 # ok 641 Set SVE VL 2560
2372 22:16:26.831004 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2373 22:16:26.831091 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2374 22:16:26.831178 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2375 22:16:26.831262 # ok 645 Set SVE VL 2576
2376 22:16:26.831349 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2377 22:16:26.831439 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2378 22:16:26.831739 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2379 22:16:26.831840 # ok 649 Set SVE VL 2592
2380 22:16:26.831934 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2381 22:16:26.832021 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2382 22:16:26.832109 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2383 22:16:26.832200 # ok 653 Set SVE VL 2608
2384 22:16:26.832292 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2385 22:16:26.832383 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2386 22:16:26.832475 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2387 22:16:26.832567 # ok 657 Set SVE VL 2624
2388 22:16:26.832659 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2389 22:16:26.832749 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2390 22:16:26.832839 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2391 22:16:26.832929 # ok 661 Set SVE VL 2640
2392 22:16:26.833019 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2393 22:16:26.833110 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2394 22:16:26.833200 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2395 22:16:26.833291 # ok 665 Set SVE VL 2656
2396 22:16:26.833381 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2397 22:16:26.841564 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2398 22:16:26.841890 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2399 22:16:26.842107 # ok 669 Set SVE VL 2672
2400 22:16:26.842307 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2401 22:16:26.842443 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2402 22:16:26.842564 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2403 22:16:26.842685 # ok 673 Set SVE VL 2688
2404 22:16:26.842903 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2405 22:16:26.843178 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2406 22:16:26.843358 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2407 22:16:26.843532 # ok 677 Set SVE VL 2704
2408 22:16:26.843727 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2409 22:16:26.843945 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2410 22:16:26.844122 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2411 22:16:26.844314 # ok 681 Set SVE VL 2720
2412 22:16:26.844490 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2413 22:16:26.844626 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2414 22:16:26.844782 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2415 22:16:26.844938 # ok 685 Set SVE VL 2736
2416 22:16:26.845088 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2417 22:16:26.845276 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2418 22:16:26.845464 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2419 22:16:26.845624 # ok 689 Set SVE VL 2752
2420 22:16:26.846313 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2421 22:16:26.846491 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2422 22:16:26.846640 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2423 22:16:26.846780 # ok 693 Set SVE VL 2768
2424 22:16:26.846906 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2425 22:16:26.847092 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2426 22:16:26.847268 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2427 22:16:26.847432 # ok 697 Set SVE VL 2784
2428 22:16:26.847593 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2429 22:16:26.847753 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2430 22:16:26.847915 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2431 22:16:26.848182 # ok 701 Set SVE VL 2800
2432 22:16:26.848408 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2433 22:16:26.848627 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2434 22:16:26.848826 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2435 22:16:26.849016 # ok 705 Set SVE VL 2816
2436 22:16:26.849230 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2437 22:16:26.849447 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2438 22:16:26.850167 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2439 22:16:26.850383 # ok 709 Set SVE VL 2832
2440 22:16:26.850584 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2441 22:16:26.851052 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2442 22:16:26.851243 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2443 22:16:26.851403 # ok 713 Set SVE VL 2848
2444 22:16:26.851595 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2445 22:16:26.851827 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2446 22:16:26.852067 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2447 22:16:26.852281 # ok 717 Set SVE VL 2864
2448 22:16:26.852481 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2449 22:16:26.852657 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2450 22:16:26.852818 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2451 22:16:26.853029 # ok 721 Set SVE VL 2880
2452 22:16:26.853262 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2453 22:16:26.853507 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2454 22:16:26.853758 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2455 22:16:26.853985 # ok 725 Set SVE VL 2896
2456 22:16:26.854169 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2457 22:16:26.854369 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2458 22:16:26.854545 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2459 22:16:26.854748 # ok 729 Set SVE VL 2912
2460 22:16:26.854918 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2461 22:16:26.855054 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2462 22:16:26.855205 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2463 22:16:26.855348 # ok 733 Set SVE VL 2928
2464 22:16:26.855502 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2465 22:16:26.855631 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2466 22:16:26.855761 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2467 22:16:26.855883 # ok 737 Set SVE VL 2944
2468 22:16:26.856042 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2469 22:16:26.856188 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2470 22:16:26.856317 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2471 22:16:26.856445 # ok 741 Set SVE VL 2960
2472 22:16:26.856565 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2473 22:16:26.856692 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2474 22:16:26.856812 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2475 22:16:26.856936 # ok 745 Set SVE VL 2976
2476 22:16:26.857059 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2477 22:16:26.857182 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2478 22:16:26.857305 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2479 22:16:26.857427 # ok 749 Set SVE VL 2992
2480 22:16:26.857547 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2481 22:16:26.858786 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2482 22:16:26.858973 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2483 22:16:26.859135 # ok 753 Set SVE VL 3008
2484 22:16:26.859293 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2485 22:16:26.859644 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2486 22:16:26.859790 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2487 22:16:26.859966 # ok 757 Set SVE VL 3024
2488 22:16:26.860138 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2489 22:16:26.860306 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2490 22:16:26.860468 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2491 22:16:26.860634 # ok 761 Set SVE VL 3040
2492 22:16:26.860759 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2493 22:16:26.860877 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2494 22:16:26.860987 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2495 22:16:26.861098 # ok 765 Set SVE VL 3056
2496 22:16:26.861197 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2497 22:16:26.861293 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2498 22:16:26.861401 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2499 22:16:26.861498 # ok 769 Set SVE VL 3072
2500 22:16:26.861617 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2501 22:16:26.861749 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2502 22:16:26.861874 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2503 22:16:26.861999 # ok 773 Set SVE VL 3088
2504 22:16:26.862125 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2505 22:16:26.862242 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2506 22:16:26.862371 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2507 22:16:26.862499 # ok 777 Set SVE VL 3104
2508 22:16:26.862613 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2509 22:16:26.862697 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2510 22:16:26.862778 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2511 22:16:26.862850 # ok 781 Set SVE VL 3120
2512 22:16:26.862920 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2513 22:16:26.862990 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2514 22:16:26.863056 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2515 22:16:26.863131 # ok 785 Set SVE VL 3136
2516 22:16:26.863209 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2517 22:16:26.863288 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2518 22:16:26.863368 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2519 22:16:26.863441 # ok 789 Set SVE VL 3152
2520 22:16:26.863508 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2521 22:16:26.863569 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2522 22:16:26.863641 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2523 22:16:26.863721 # ok 793 Set SVE VL 3168
2524 22:16:26.863796 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2525 22:16:26.863877 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2526 22:16:26.863941 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2527 22:16:26.864000 # ok 797 Set SVE VL 3184
2528 22:16:26.864059 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2529 22:16:26.864361 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2530 22:16:26.864520 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2531 22:16:26.864645 # ok 801 Set SVE VL 3200
2532 22:16:26.864759 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2533 22:16:26.864873 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2534 22:16:26.864987 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2535 22:16:26.865100 # ok 805 Set SVE VL 3216
2536 22:16:26.865212 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2537 22:16:26.865324 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2538 22:16:26.865437 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2539 22:16:26.865549 # ok 809 Set SVE VL 3232
2540 22:16:26.865679 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2541 22:16:26.865801 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2542 22:16:26.865915 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2543 22:16:26.866029 # ok 813 Set SVE VL 3248
2544 22:16:26.866142 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2545 22:16:26.866255 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2546 22:16:26.866368 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2547 22:16:26.866482 # ok 817 Set SVE VL 3264
2548 22:16:26.866594 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2549 22:16:26.866691 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2550 22:16:26.866777 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2551 22:16:26.866862 # ok 821 Set SVE VL 3280
2552 22:16:26.866948 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2553 22:16:26.867035 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2554 22:16:26.867121 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2555 22:16:26.867207 # ok 825 Set SVE VL 3296
2556 22:16:26.867292 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2557 22:16:26.867378 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2558 22:16:26.867463 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2559 22:16:26.867548 # ok 829 Set SVE VL 3312
2560 22:16:26.867634 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2561 22:16:26.867721 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2562 22:16:26.867806 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2563 22:16:26.867892 # ok 833 Set SVE VL 3328
2564 22:16:26.867981 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2565 22:16:26.868067 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2566 22:16:26.868154 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2567 22:16:26.868240 # ok 837 Set SVE VL 3344
2568 22:16:26.868325 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2569 22:16:26.868409 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2570 22:16:26.868494 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2571 22:16:26.868580 # ok 841 Set SVE VL 3360
2572 22:16:26.868885 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2573 22:16:26.868980 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2574 22:16:26.869067 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2575 22:16:26.869154 # ok 845 Set SVE VL 3376
2576 22:16:26.869240 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2577 22:16:26.869325 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2578 22:16:26.869411 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2579 22:16:26.869497 # ok 849 Set SVE VL 3392
2580 22:16:26.869582 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2581 22:16:26.869673 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2582 22:16:26.869737 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2583 22:16:26.869796 # ok 853 Set SVE VL 3408
2584 22:16:26.869854 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2585 22:16:26.876482 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2586 22:16:26.876730 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2587 22:16:26.876897 # ok 857 Set SVE VL 3424
2588 22:16:26.877029 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2589 22:16:26.877153 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2590 22:16:26.877304 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2591 22:16:26.877433 # ok 861 Set SVE VL 3440
2592 22:16:26.877555 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2593 22:16:26.877691 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2594 22:16:26.877839 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2595 22:16:26.877996 # ok 865 Set SVE VL 3456
2596 22:16:26.878142 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2597 22:16:26.878259 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2598 22:16:26.878350 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2599 22:16:26.878458 # ok 869 Set SVE VL 3472
2600 22:16:26.878553 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2601 22:16:26.878938 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2602 22:16:26.879236 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2603 22:16:26.879330 # ok 873 Set SVE VL 3488
2604 22:16:26.879428 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2605 22:16:26.879514 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2606 22:16:26.879611 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2607 22:16:26.879717 # ok 877 Set SVE VL 3504
2608 22:16:26.879996 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2609 22:16:26.880098 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2610 22:16:26.880375 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2611 22:16:26.880464 # ok 881 Set SVE VL 3520
2612 22:16:26.880563 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2613 22:16:26.880650 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2614 22:16:26.880733 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2615 22:16:26.880830 # ok 885 Set SVE VL 3536
2616 22:16:26.880915 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2617 22:16:26.881012 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2618 22:16:26.881111 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2619 22:16:26.881197 # ok 889 Set SVE VL 3552
2620 22:16:26.881298 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2621 22:16:26.881397 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2622 22:16:26.881685 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2623 22:16:26.881777 # ok 893 Set SVE VL 3568
2624 22:16:26.881873 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2625 22:16:26.881976 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2626 22:16:26.882455 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2627 22:16:26.882547 # ok 897 Set SVE VL 3584
2628 22:16:26.882649 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2629 22:16:26.882735 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2630 22:16:26.882832 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2631 22:16:26.882917 # ok 901 Set SVE VL 3600
2632 22:16:26.883013 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2633 22:16:26.883305 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2634 22:16:26.883395 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2635 22:16:26.883492 # ok 905 Set SVE VL 3616
2636 22:16:26.883590 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2637 22:16:26.883689 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2638 22:16:26.883793 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2639 22:16:26.884078 # ok 909 Set SVE VL 3632
2640 22:16:26.884180 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2641 22:16:26.884278 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2642 22:16:26.884377 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2643 22:16:26.884654 # ok 913 Set SVE VL 3648
2644 22:16:26.884742 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2645 22:16:26.884838 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2646 22:16:26.884935 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2647 22:16:26.885212 # ok 917 Set SVE VL 3664
2648 22:16:26.885303 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2649 22:16:26.885400 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2650 22:16:26.885682 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2651 22:16:26.885969 # ok 921 Set SVE VL 3680
2652 22:16:26.886058 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2653 22:16:26.886142 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2654 22:16:26.886239 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2655 22:16:26.886324 # ok 925 Set SVE VL 3696
2656 22:16:26.886420 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2657 22:16:26.886506 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2658 22:16:26.886605 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2659 22:16:26.886692 # ok 929 Set SVE VL 3712
2660 22:16:26.886788 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2661 22:16:26.887063 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2662 22:16:26.887164 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2663 22:16:26.887249 # ok 933 Set SVE VL 3728
2664 22:16:26.887344 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2665 22:16:26.887442 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2666 22:16:26.887717 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2667 22:16:26.887805 # ok 937 Set SVE VL 3744
2668 22:16:26.887901 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2669 22:16:26.887999 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2670 22:16:26.888283 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2671 22:16:26.888372 # ok 941 Set SVE VL 3760
2672 22:16:26.888468 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2673 22:16:26.888566 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2674 22:16:26.888667 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2675 22:16:26.888751 # ok 945 Set SVE VL 3776
2676 22:16:26.889032 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2677 22:16:26.889121 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2678 22:16:26.889236 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2679 22:16:26.889520 # ok 949 Set SVE VL 3792
2680 22:16:26.889611 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2681 22:16:26.889722 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2682 22:16:26.890015 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2683 22:16:26.890118 # ok 953 Set SVE VL 3808
2684 22:16:26.890202 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2685 22:16:26.890500 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2686 22:16:26.890823 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2687 22:16:26.890928 # ok 957 Set SVE VL 3824
2688 22:16:26.891238 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2689 22:16:26.891343 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2690 22:16:26.891430 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2691 22:16:26.891706 # ok 961 Set SVE VL 3840
2692 22:16:26.891817 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2693 22:16:26.891905 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2694 22:16:26.892196 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2695 22:16:26.892286 # ok 965 Set SVE VL 3856
2696 22:16:26.892578 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2697 22:16:26.892678 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2698 22:16:26.892779 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2699 22:16:26.893062 # ok 969 Set SVE VL 3872
2700 22:16:26.893176 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2701 22:16:26.893269 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2702 22:16:26.893376 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2703 22:16:26.893471 # ok 973 Set SVE VL 3888
2704 22:16:26.893573 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2705 22:16:26.893880 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2706 22:16:26.893993 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2707 22:16:26.894093 # ok 977 Set SVE VL 3904
2708 22:16:26.894332 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2709 22:16:26.894603 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2710 22:16:26.894872 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2711 22:16:26.894940 # ok 981 Set SVE VL 3920
2712 22:16:26.895347 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2713 22:16:26.895419 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2714 22:16:26.895481 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2715 22:16:26.895723 # ok 985 Set SVE VL 3936
2716 22:16:26.895790 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2717 22:16:26.895850 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2718 22:16:26.895924 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2719 22:16:26.895989 # ok 989 Set SVE VL 3952
2720 22:16:26.896063 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2721 22:16:26.896138 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2722 22:16:26.896202 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2723 22:16:26.896466 # ok 993 Set SVE VL 3968
2724 22:16:26.896545 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2725 22:16:26.896647 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2726 22:16:26.896725 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2727 22:16:26.896800 # ok 997 Set SVE VL 3984
2728 22:16:26.896874 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2729 22:16:26.897126 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2730 22:16:26.897208 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2731 22:16:26.897283 # ok 1001 Set SVE VL 4000
2732 22:16:26.897526 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2733 22:16:26.897594 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2734 22:16:26.897692 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2735 22:16:26.897777 # ok 1005 Set SVE VL 4016
2736 22:16:26.897841 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2737 22:16:26.897941 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2738 22:16:26.898049 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2739 22:16:26.898504 # ok 1009 Set SVE VL 4032
2740 22:16:26.898787 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2741 22:16:26.898862 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2742 22:16:26.898936 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2743 22:16:26.899001 # ok 1013 Set SVE VL 4048
2744 22:16:26.899076 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2745 22:16:26.899529 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2746 22:16:26.899601 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2747 22:16:26.899842 # ok 1017 Set SVE VL 4064
2748 22:16:26.899910 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2749 22:16:26.899974 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2750 22:16:26.900035 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2751 22:16:26.900109 # ok 1021 Set SVE VL 4080
2752 22:16:26.900173 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2753 22:16:26.900247 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2754 22:16:26.900325 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2755 22:16:26.900401 # ok 1025 Set SVE VL 4096
2756 22:16:26.900466 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2757 22:16:26.900540 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2758 22:16:26.900792 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2759 22:16:26.900862 # ok 1029 Set SVE VL 4112
2760 22:16:26.901101 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2761 22:16:26.901171 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2762 22:16:26.901245 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2763 22:16:26.901312 # ok 1033 Set SVE VL 4128
2764 22:16:26.901385 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2765 22:16:26.901465 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2766 22:16:26.901676 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2767 22:16:26.901757 # ok 1037 Set SVE VL 4144
2768 22:16:26.902051 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2769 22:16:26.902135 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2770 22:16:26.902213 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2771 22:16:26.908698 # ok 1041 Set SVE VL 4160
2772 22:16:26.908822 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2773 22:16:26.908901 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2774 22:16:26.908978 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2775 22:16:26.909249 # ok 1045 Set SVE VL 4176
2776 22:16:26.909338 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2777 22:16:26.909424 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2778 22:16:26.909490 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2779 22:16:26.909567 # ok 1049 Set SVE VL 4192
2780 22:16:26.909643 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2781 22:16:26.909888 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2782 22:16:26.910170 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2783 22:16:26.910244 # ok 1053 Set SVE VL 4208
2784 22:16:26.910546 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2785 22:16:26.910802 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2786 22:16:26.911066 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2787 22:16:26.911144 # ok 1057 Set SVE VL 4224
2788 22:16:26.911239 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2789 22:16:26.911323 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2790 22:16:26.911415 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2791 22:16:26.911506 # ok 1061 Set SVE VL 4240
2792 22:16:26.911804 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2793 22:16:26.911911 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2794 22:16:26.912008 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2795 22:16:26.912107 # ok 1065 Set SVE VL 4256
2796 22:16:26.912224 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2797 22:16:26.912319 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2798 22:16:26.912627 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2799 22:16:26.912727 # ok 1069 Set SVE VL 4272
2800 22:16:26.912809 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2801 22:16:26.912890 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2802 22:16:26.912969 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2803 22:16:26.913046 # ok 1073 Set SVE VL 4288
2804 22:16:26.913181 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2805 22:16:26.913300 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2806 22:16:26.913387 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2807 22:16:26.913467 # ok 1077 Set SVE VL 4304
2808 22:16:26.913546 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2809 22:16:26.913623 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2810 22:16:26.913703 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2811 22:16:26.913781 # ok 1081 Set SVE VL 4320
2812 22:16:26.913873 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2813 22:16:26.913974 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2814 22:16:26.914068 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2815 22:16:26.914145 # ok 1085 Set SVE VL 4336
2816 22:16:26.914223 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2817 22:16:26.914319 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2818 22:16:26.914409 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2819 22:16:26.914532 # ok 1089 Set SVE VL 4352
2820 22:16:26.914666 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2821 22:16:26.914767 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2822 22:16:26.914871 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2823 22:16:26.914964 # ok 1093 Set SVE VL 4368
2824 22:16:26.915062 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2825 22:16:26.915147 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2826 22:16:26.915221 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2827 22:16:26.915291 # ok 1097 Set SVE VL 4384
2828 22:16:26.915372 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2829 22:16:26.915447 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2830 22:16:26.915518 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2831 22:16:26.915595 # ok 1101 Set SVE VL 4400
2832 22:16:26.915679 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2833 22:16:26.915754 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2834 22:16:26.915855 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2835 22:16:26.915932 # ok 1105 Set SVE VL 4416
2836 22:16:26.916202 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2837 22:16:26.916296 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2838 22:16:26.916394 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2839 22:16:26.916484 # ok 1109 Set SVE VL 4432
2840 22:16:26.916584 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2841 22:16:26.916681 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2842 22:16:26.916810 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2843 22:16:26.916926 # ok 1113 Set SVE VL 4448
2844 22:16:26.917234 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2845 22:16:26.917336 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2846 22:16:26.917435 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2847 22:16:26.917725 # ok 1117 Set SVE VL 4464
2848 22:16:26.917828 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2849 22:16:26.917925 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2850 22:16:26.918018 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2851 22:16:26.918103 # ok 1121 Set SVE VL 4480
2852 22:16:26.918184 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2853 22:16:26.918250 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2854 22:16:26.918325 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2855 22:16:26.918596 # ok 1125 Set SVE VL 4496
2856 22:16:26.918675 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2857 22:16:26.918750 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2858 22:16:26.919013 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2859 22:16:26.919111 # ok 1129 Set SVE VL 4512
2860 22:16:26.919213 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2861 22:16:26.919295 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2862 22:16:26.919375 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2863 22:16:26.919441 # ok 1133 Set SVE VL 4528
2864 22:16:26.919504 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2865 22:16:26.919579 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2866 22:16:26.919655 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2867 22:16:26.919718 # ok 1137 Set SVE VL 4544
2868 22:16:26.919780 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2869 22:16:26.919854 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2870 22:16:26.920104 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2871 22:16:26.920175 # ok 1141 Set SVE VL 4560
2872 22:16:26.920253 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2873 22:16:26.920329 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2874 22:16:26.920407 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2875 22:16:26.920481 # ok 1145 Set SVE VL 4576
2876 22:16:26.920734 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2877 22:16:26.920801 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2878 22:16:26.921050 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2879 22:16:26.921125 # ok 1149 Set SVE VL 4592
2880 22:16:26.921232 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2881 22:16:26.921319 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2882 22:16:26.921393 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2883 22:16:26.921465 # ok 1153 Set SVE VL 4608
2884 22:16:26.921536 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2885 22:16:26.921783 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2886 22:16:26.921894 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2887 22:16:26.922004 # ok 1157 Set SVE VL 4624
2888 22:16:26.922493 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2889 22:16:26.922568 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2890 22:16:26.922634 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2891 22:16:26.922695 # ok 1161 Set SVE VL 4640
2892 22:16:26.922935 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2893 22:16:26.923002 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2894 22:16:26.923064 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2895 22:16:26.923127 # ok 1165 Set SVE VL 4656
2896 22:16:26.923199 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2897 22:16:26.923262 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2898 22:16:26.923334 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2899 22:16:26.923398 # ok 1169 Set SVE VL 4672
2900 22:16:26.923469 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2901 22:16:26.923720 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2902 22:16:26.923798 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2903 22:16:26.923863 # ok 1173 Set SVE VL 4688
2904 22:16:26.924113 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2905 22:16:26.924182 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2906 22:16:26.924254 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2907 22:16:26.924318 # ok 1177 Set SVE VL 4704
2908 22:16:26.924566 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2909 22:16:26.924633 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2910 22:16:26.924708 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2911 22:16:26.924772 # ok 1181 Set SVE VL 4720
2912 22:16:26.925211 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2913 22:16:26.925304 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2914 22:16:26.925400 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2915 22:16:26.925469 # ok 1185 Set SVE VL 4736
2916 22:16:26.925531 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2917 22:16:26.925606 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2918 22:16:26.925693 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2919 22:16:26.925768 # ok 1189 Set SVE VL 4752
2920 22:16:26.925842 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2921 22:16:26.925945 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2922 22:16:26.926241 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2923 22:16:26.926326 # ok 1193 Set SVE VL 4768
2924 22:16:26.926404 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2925 22:16:26.926656 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2926 22:16:26.926737 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2927 22:16:26.926812 # ok 1197 Set SVE VL 4784
2928 22:16:26.927062 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2929 22:16:26.927130 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2930 22:16:26.927375 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2931 22:16:26.927442 # ok 1201 Set SVE VL 4800
2932 22:16:26.927502 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2933 22:16:26.927575 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2934 22:16:26.927638 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2935 22:16:26.927891 # ok 1205 Set SVE VL 4816
2936 22:16:26.927969 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2937 22:16:26.928215 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2938 22:16:26.928281 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2939 22:16:26.929757 # ok 1209 Set SVE VL 4832
2940 22:16:26.929831 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2941 22:16:26.929914 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2942 22:16:26.929986 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2943 22:16:26.930047 # ok 1213 Set SVE VL 4848
2944 22:16:26.930105 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2945 22:16:26.930162 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2946 22:16:26.930221 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2947 22:16:26.930279 # ok 1217 Set SVE VL 4864
2948 22:16:26.930337 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2949 22:16:26.930396 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2950 22:16:26.930454 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2951 22:16:26.930512 # ok 1221 Set SVE VL 4880
2952 22:16:26.930569 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2953 22:16:26.930626 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2954 22:16:26.939660 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2955 22:16:26.939935 # ok 1225 Set SVE VL 4896
2956 22:16:26.940029 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2957 22:16:26.940155 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2958 22:16:26.940265 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2959 22:16:26.940352 # ok 1229 Set SVE VL 4912
2960 22:16:26.940446 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2961 22:16:26.940541 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2962 22:16:26.940658 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2963 22:16:26.940769 # ok 1233 Set SVE VL 4928
2964 22:16:26.940873 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2965 22:16:26.940972 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2966 22:16:26.941070 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2967 22:16:26.941186 # ok 1237 Set SVE VL 4944
2968 22:16:26.941282 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2969 22:16:26.941380 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2970 22:16:26.941490 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2971 22:16:26.941612 # ok 1241 Set SVE VL 4960
2972 22:16:26.941720 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2973 22:16:26.941817 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2974 22:16:26.941919 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2975 22:16:26.942018 # ok 1245 Set SVE VL 4976
2976 22:16:26.942125 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2977 22:16:26.942197 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2978 22:16:26.942258 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2979 22:16:26.942318 # ok 1249 Set SVE VL 4992
2980 22:16:26.942376 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2981 22:16:26.943432 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2982 22:16:26.943561 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2983 22:16:26.943650 # ok 1253 Set SVE VL 5008
2984 22:16:26.943760 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2985 22:16:26.943841 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2986 22:16:26.943918 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2987 22:16:26.943983 # ok 1257 Set SVE VL 5024
2988 22:16:26.944059 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2989 22:16:26.944334 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2990 22:16:26.944459 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2991 22:16:26.944558 # ok 1261 Set SVE VL 5040
2992 22:16:26.944675 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2993 22:16:26.944777 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2994 22:16:26.944894 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2995 22:16:26.944997 # ok 1265 Set SVE VL 5056
2996 22:16:26.945095 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2997 22:16:26.945217 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2998 22:16:26.945317 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2999 22:16:26.945417 # ok 1269 Set SVE VL 5072
3000 22:16:26.945528 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
3001 22:16:26.945621 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
3002 22:16:26.945715 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3003 22:16:26.945807 # ok 1273 Set SVE VL 5088
3004 22:16:26.945905 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3005 22:16:26.946029 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3006 22:16:26.946126 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3007 22:16:26.946237 # ok 1277 Set SVE VL 5104
3008 22:16:26.947153 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3009 22:16:26.947266 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3010 22:16:26.947541 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3011 22:16:26.947617 # ok 1281 Set SVE VL 5120
3012 22:16:26.947683 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3013 22:16:26.947757 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3014 22:16:26.947822 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3015 22:16:26.947896 # ok 1285 Set SVE VL 5136
3016 22:16:26.947972 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3017 22:16:26.948234 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3018 22:16:26.948477 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3019 22:16:26.948559 # ok 1289 Set SVE VL 5152
3020 22:16:26.948652 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3021 22:16:26.948769 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3022 22:16:26.948878 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3023 22:16:26.948981 # ok 1293 Set SVE VL 5168
3024 22:16:26.949085 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3025 22:16:26.949193 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3026 22:16:26.949294 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3027 22:16:26.949417 # ok 1297 Set SVE VL 5184
3028 22:16:26.949525 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3029 22:16:26.949618 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3030 22:16:26.949729 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3031 22:16:26.949879 # ok 1301 Set SVE VL 5200
3032 22:16:26.949994 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3033 22:16:26.950115 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3034 22:16:26.950199 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3035 22:16:26.950302 # ok 1305 Set SVE VL 5216
3036 22:16:26.950413 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3037 22:16:26.950534 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3038 22:16:26.950639 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3039 22:16:26.950752 # ok 1309 Set SVE VL 5232
3040 22:16:26.950874 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3041 22:16:26.951178 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3042 22:16:26.951269 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3043 22:16:26.951346 # ok 1313 Set SVE VL 5248
3044 22:16:26.951422 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3045 22:16:26.951512 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3046 22:16:26.951605 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3047 22:16:26.951684 # ok 1317 Set SVE VL 5264
3048 22:16:26.951762 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3049 22:16:26.951841 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3050 22:16:26.952120 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3051 22:16:26.952203 # ok 1321 Set SVE VL 5280
3052 22:16:26.952306 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3053 22:16:26.952434 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3054 22:16:26.952546 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3055 22:16:26.952647 # ok 1325 Set SVE VL 5296
3056 22:16:26.952737 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3057 22:16:26.952835 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3058 22:16:26.952903 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3059 22:16:26.952964 # ok 1329 Set SVE VL 5312
3060 22:16:26.953025 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3061 22:16:26.953101 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3062 22:16:26.953193 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3063 22:16:26.953280 # ok 1333 Set SVE VL 5328
3064 22:16:26.953391 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3065 22:16:26.953473 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3066 22:16:26.953568 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3067 22:16:26.953670 # ok 1337 Set SVE VL 5344
3068 22:16:26.953777 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3069 22:16:26.953891 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3070 22:16:26.954008 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3071 22:16:26.954115 # ok 1341 Set SVE VL 5360
3072 22:16:26.954388 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3073 22:16:26.954846 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3074 22:16:26.955098 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3075 22:16:26.955165 # ok 1345 Set SVE VL 5376
3076 22:16:26.955415 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3077 22:16:26.955484 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3078 22:16:26.955733 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3079 22:16:26.955804 # ok 1349 Set SVE VL 5392
3080 22:16:26.955877 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3081 22:16:26.956120 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3082 22:16:26.956379 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3083 22:16:26.956628 # ok 1353 Set SVE VL 5408
3084 22:16:26.956695 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3085 22:16:26.956769 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3086 22:16:26.957021 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3087 22:16:26.957088 # ok 1357 Set SVE VL 5424
3088 22:16:26.957379 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3089 22:16:26.957474 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3090 22:16:26.957548 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3091 22:16:26.957807 # ok 1361 Set SVE VL 5440
3092 22:16:26.957926 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3093 22:16:26.958248 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3094 22:16:26.958585 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3095 22:16:26.958725 # ok 1365 Set SVE VL 5456
3096 22:16:26.958896 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3097 22:16:26.958983 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3098 22:16:26.959080 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3099 22:16:26.959169 # ok 1369 Set SVE VL 5472
3100 22:16:26.959266 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3101 22:16:26.959340 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3102 22:16:26.959634 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3103 22:16:26.959743 # ok 1373 Set SVE VL 5488
3104 22:16:26.959847 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3105 22:16:26.959977 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3106 22:16:26.960068 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3107 22:16:26.960151 # ok 1377 Set SVE VL 5504
3108 22:16:26.960251 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3109 22:16:26.960384 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3110 22:16:26.960472 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3111 22:16:26.960548 # ok 1381 Set SVE VL 5520
3112 22:16:26.960637 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3113 22:16:26.960760 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3114 22:16:26.960875 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3115 22:16:26.960979 # ok 1385 Set SVE VL 5536
3116 22:16:26.961087 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3117 22:16:26.961213 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3118 22:16:26.961315 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3119 22:16:26.961426 # ok 1389 Set SVE VL 5552
3120 22:16:26.961548 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3121 22:16:26.961689 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3122 22:16:26.961776 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3123 22:16:26.961873 # ok 1393 Set SVE VL 5568
3124 22:16:26.961955 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3125 22:16:26.962085 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3126 22:16:26.962170 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3127 22:16:26.962268 # ok 1397 Set SVE VL 5584
3128 22:16:26.962371 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3129 22:16:26.962472 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3130 22:16:26.962583 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3131 22:16:26.962679 # ok 1401 Set SVE VL 5600
3132 22:16:26.962744 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3133 22:16:26.962809 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3134 22:16:26.962868 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3135 22:16:26.962926 # ok 1405 Set SVE VL 5616
3136 22:16:26.962984 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3137 22:16:27.002197 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3138 22:16:27.002435 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3139 22:16:27.004277 # ok 1409 Set SVE VL 5632
3140 22:16:27.004622 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3141 22:16:27.004727 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3142 22:16:27.004815 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3143 22:16:27.004919 # ok 1413 Set SVE VL 5648
3144 22:16:27.005010 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3145 22:16:27.005111 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3146 22:16:27.005374 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3147 22:16:27.005485 # ok 1417 Set SVE VL 5664
3148 22:16:27.005574 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3149 22:16:27.005684 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3150 22:16:27.005792 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3151 22:16:27.005877 # ok 1421 Set SVE VL 5680
3152 22:16:27.005976 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3153 22:16:27.006060 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3154 22:16:27.006158 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3155 22:16:27.006242 # ok 1425 Set SVE VL 5696
3156 22:16:27.009820 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3157 22:16:27.010004 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3158 22:16:27.010097 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3159 22:16:27.010177 # ok 1429 Set SVE VL 5712
3160 22:16:27.010252 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3161 22:16:27.010327 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3162 22:16:27.010401 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3163 22:16:27.010476 # ok 1433 Set SVE VL 5728
3164 22:16:27.010550 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3165 22:16:27.010625 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3166 22:16:27.010698 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3167 22:16:27.010772 # ok 1437 Set SVE VL 5744
3168 22:16:27.010844 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3169 22:16:27.010917 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3170 22:16:27.010996 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3171 22:16:27.011070 # ok 1441 Set SVE VL 5760
3172 22:16:27.011142 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3173 22:16:27.011214 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3174 22:16:27.011287 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3175 22:16:27.011364 # ok 1445 Set SVE VL 5776
3176 22:16:27.011649 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3177 22:16:27.011748 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3178 22:16:27.012272 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3179 22:16:27.012589 # ok 1449 Set SVE VL 5792
3180 22:16:27.012688 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3181 22:16:27.012779 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3182 22:16:27.012881 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3183 22:16:27.012982 # ok 1453 Set SVE VL 5808
3184 22:16:27.013080 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3185 22:16:27.013179 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3186 22:16:27.013476 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3187 22:16:27.013580 # ok 1457 Set SVE VL 5824
3188 22:16:27.013689 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3189 22:16:27.013792 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3190 22:16:27.014087 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3191 22:16:27.014184 # ok 1461 Set SVE VL 5840
3192 22:16:27.015603 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3193 22:16:27.015995 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3194 22:16:27.016104 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3195 22:16:27.016197 # ok 1465 Set SVE VL 5856
3196 22:16:27.017857 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3197 22:16:27.017965 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3198 22:16:27.018054 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3199 22:16:27.018139 # ok 1469 Set SVE VL 5872
3200 22:16:27.018217 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3201 22:16:27.018293 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3202 22:16:27.018367 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3203 22:16:27.018440 # ok 1473 Set SVE VL 5888
3204 22:16:27.018514 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3205 22:16:27.018591 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3206 22:16:27.018664 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3207 22:16:27.018739 # ok 1477 Set SVE VL 5904
3208 22:16:27.018812 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3209 22:16:27.018885 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3210 22:16:27.018958 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3211 22:16:27.019030 # ok 1481 Set SVE VL 5920
3212 22:16:27.019102 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3213 22:16:27.019175 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3214 22:16:27.019250 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3215 22:16:27.019325 # ok 1485 Set SVE VL 5936
3216 22:16:27.019398 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3217 22:16:27.019472 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3218 22:16:27.019551 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3219 22:16:27.019629 # ok 1489 Set SVE VL 5952
3220 22:16:27.019913 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3221 22:16:27.020019 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3222 22:16:27.020123 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3223 22:16:27.020210 # ok 1493 Set SVE VL 5968
3224 22:16:27.020312 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3225 22:16:27.020400 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3226 22:16:27.020699 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3227 22:16:27.020802 # ok 1497 Set SVE VL 5984
3228 22:16:27.020892 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3229 22:16:27.020998 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3230 22:16:27.021102 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3231 22:16:27.021201 # ok 1501 Set SVE VL 6000
3232 22:16:27.021302 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3233 22:16:27.021414 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3234 22:16:27.021701 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3235 22:16:27.021805 # ok 1505 Set SVE VL 6016
3236 22:16:27.021908 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3237 22:16:27.022185 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3238 22:16:27.023086 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3239 22:16:27.023196 # ok 1509 Set SVE VL 6032
3240 22:16:27.023472 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3241 22:16:27.023564 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3242 22:16:27.023653 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3243 22:16:27.023753 # ok 1513 Set SVE VL 6048
3244 22:16:27.023855 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3245 22:16:27.023943 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3246 22:16:27.024044 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3247 22:16:27.024145 # ok 1517 Set SVE VL 6064
3248 22:16:27.024248 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3249 22:16:27.024352 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3250 22:16:27.024533 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3251 22:16:27.024654 # ok 1521 Set SVE VL 6080
3252 22:16:27.024756 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3253 22:16:27.024957 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3254 22:16:27.025323 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3255 22:16:27.025432 # ok 1525 Set SVE VL 6096
3256 22:16:27.025520 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3257 22:16:27.025621 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3258 22:16:27.025717 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3259 22:16:27.025817 # ok 1529 Set SVE VL 6112
3260 22:16:27.025902 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3261 22:16:27.026003 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3262 22:16:27.026102 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3263 22:16:27.026597 # ok 1533 Set SVE VL 6128
3264 22:16:27.026718 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3265 22:16:27.027073 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3266 22:16:27.027193 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3267 22:16:27.027294 # ok 1537 Set SVE VL 6144
3268 22:16:27.027595 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3269 22:16:27.027732 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3270 22:16:27.027838 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3271 22:16:27.027946 # ok 1541 Set SVE VL 6160
3272 22:16:27.028248 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3273 22:16:27.028369 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3274 22:16:27.028678 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3275 22:16:27.028784 # ok 1545 Set SVE VL 6176
3276 22:16:27.028886 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3277 22:16:27.029187 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3278 22:16:27.029296 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3279 22:16:27.029401 # ok 1549 Set SVE VL 6192
3280 22:16:27.029492 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3281 22:16:27.029595 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3282 22:16:27.029710 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3283 22:16:27.029813 # ok 1553 Set SVE VL 6208
3284 22:16:27.030122 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3285 22:16:27.030245 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3286 22:16:27.030554 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3287 22:16:27.030663 # ok 1557 Set SVE VL 6224
3288 22:16:27.030756 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3289 22:16:27.030866 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3290 22:16:27.030961 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3291 22:16:27.031052 # ok 1561 Set SVE VL 6240
3292 22:16:27.031158 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3293 22:16:27.031264 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3294 22:16:27.031356 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3295 22:16:27.031461 # ok 1565 Set SVE VL 6256
3296 22:16:27.031552 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3297 22:16:27.031853 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3298 22:16:27.031981 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3299 22:16:27.032089 # ok 1569 Set SVE VL 6272
3300 22:16:27.032188 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3301 22:16:27.032289 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3302 22:16:27.032399 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3303 22:16:27.032474 # ok 1573 Set SVE VL 6288
3304 22:16:27.032550 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3305 22:16:27.032643 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3306 22:16:27.032717 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3307 22:16:27.032809 # ok 1577 Set SVE VL 6304
3308 22:16:27.032881 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3309 22:16:27.033163 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3310 22:16:27.033251 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3311 22:16:27.033345 # ok 1581 Set SVE VL 6320
3312 22:16:27.033452 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3313 22:16:27.033536 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3314 22:16:27.033620 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3315 22:16:27.033709 # ok 1585 Set SVE VL 6336
3316 22:16:27.033806 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3317 22:16:27.033905 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3318 22:16:27.034200 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3319 22:16:27.034287 # ok 1589 Set SVE VL 6352
3320 22:16:27.037628 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3321 22:16:27.037842 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3322 22:16:27.037953 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3323 22:16:27.038029 # ok 1593 Set SVE VL 6368
3324 22:16:27.038096 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3325 22:16:27.038189 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3326 22:16:27.038812 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3327 22:16:27.039134 # ok 1597 Set SVE VL 6384
3328 22:16:27.039222 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3329 22:16:27.039314 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3330 22:16:27.039408 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3331 22:16:27.039484 # ok 1601 Set SVE VL 6400
3332 22:16:27.039576 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3333 22:16:27.039665 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3334 22:16:27.039945 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3335 22:16:27.040030 # ok 1605 Set SVE VL 6416
3336 22:16:27.040109 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3337 22:16:27.040201 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3338 22:16:27.040288 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3339 22:16:27.040361 # ok 1609 Set SVE VL 6432
3340 22:16:27.040451 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3341 22:16:27.040732 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3342 22:16:27.040831 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3343 22:16:27.040927 # ok 1613 Set SVE VL 6448
3344 22:16:27.040995 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3345 22:16:27.041067 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3346 22:16:27.041141 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3347 22:16:27.041221 # ok 1617 Set SVE VL 6464
3348 22:16:27.041294 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3349 22:16:27.041563 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3350 22:16:27.041669 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3351 22:16:27.041765 # ok 1621 Set SVE VL 6480
3352 22:16:27.041833 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3353 22:16:27.041904 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3354 22:16:27.042162 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3355 22:16:27.042281 # ok 1625 Set SVE VL 6496
3356 22:16:27.042398 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3357 22:16:27.042676 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3358 22:16:27.042761 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3359 22:16:27.042855 # ok 1629 Set SVE VL 6512
3360 22:16:27.042928 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3361 22:16:27.043018 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3362 22:16:27.043106 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3363 22:16:27.043193 # ok 1633 Set SVE VL 6528
3364 22:16:27.043280 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3365 22:16:27.043564 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3366 22:16:27.043661 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3367 22:16:27.043748 # ok 1637 Set SVE VL 6544
3368 22:16:27.043857 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3369 22:16:27.044002 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3370 22:16:27.044314 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3371 22:16:27.044408 # ok 1641 Set SVE VL 6560
3372 22:16:27.044502 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3373 22:16:27.044581 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3374 22:16:27.044695 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3375 22:16:27.044802 # ok 1645 Set SVE VL 6576
3376 22:16:27.044897 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3377 22:16:27.044979 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3378 22:16:27.045112 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3379 22:16:27.045219 # ok 1649 Set SVE VL 6592
3380 22:16:27.045328 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3381 22:16:27.045429 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3382 22:16:27.045508 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3383 22:16:27.045604 # ok 1653 Set SVE VL 6608
3384 22:16:27.045725 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3385 22:16:27.045824 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3386 22:16:27.045931 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3387 22:16:27.046055 # ok 1657 Set SVE VL 6624
3388 22:16:27.046158 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3389 22:16:27.046299 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3390 22:16:27.046386 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3391 22:16:27.046483 # ok 1661 Set SVE VL 6640
3392 22:16:27.046576 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3393 22:16:27.046679 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3394 22:16:27.046757 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3395 22:16:27.046853 # ok 1665 Set SVE VL 6656
3396 22:16:27.046960 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3397 22:16:27.047043 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3398 22:16:27.047113 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3399 22:16:27.047188 # ok 1669 Set SVE VL 6672
3400 22:16:27.047308 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3401 22:16:27.047413 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3402 22:16:27.047505 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3403 22:16:27.047589 # ok 1673 Set SVE VL 6688
3404 22:16:27.047667 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3405 22:16:27.047749 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3406 22:16:27.047847 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3407 22:16:27.047924 # ok 1677 Set SVE VL 6704
3408 22:16:27.048001 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3409 22:16:27.048077 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3410 22:16:27.048157 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3411 22:16:27.048253 # ok 1681 Set SVE VL 6720
3412 22:16:27.048337 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3413 22:16:27.048609 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3414 22:16:27.048718 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3415 22:16:27.048813 # ok 1685 Set SVE VL 6736
3416 22:16:27.048905 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3417 22:16:27.048992 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3418 22:16:27.049091 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3419 22:16:27.049184 # ok 1689 Set SVE VL 6752
3420 22:16:27.049268 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3421 22:16:27.049356 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3422 22:16:27.049458 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3423 22:16:27.049543 # ok 1693 Set SVE VL 6768
3424 22:16:27.049629 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3425 22:16:27.049722 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3426 22:16:27.049824 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3427 22:16:27.049912 # ok 1697 Set SVE VL 6784
3428 22:16:27.049995 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3429 22:16:27.050077 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3430 22:16:27.050178 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3431 22:16:27.050262 # ok 1701 Set SVE VL 6800
3432 22:16:27.050347 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3433 22:16:27.050445 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3434 22:16:27.050531 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3435 22:16:27.050627 # ok 1705 Set SVE VL 6816
3436 22:16:27.051150 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3437 22:16:27.051258 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3438 22:16:27.051345 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3439 22:16:27.051426 # ok 1709 Set SVE VL 6832
3440 22:16:27.051508 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3441 22:16:27.051789 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3442 22:16:27.051896 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3443 22:16:27.052312 # ok 1713 Set SVE VL 6848
3444 22:16:27.052419 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3445 22:16:27.052506 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3446 22:16:27.052591 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3447 22:16:27.052676 # ok 1717 Set SVE VL 6864
3448 22:16:27.052761 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3449 22:16:27.052846 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3450 22:16:27.052931 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3451 22:16:27.053016 # ok 1721 Set SVE VL 6880
3452 22:16:27.053101 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3453 22:16:27.053203 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3454 22:16:27.053290 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3455 22:16:27.053375 # ok 1725 Set SVE VL 6896
3456 22:16:27.053460 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3457 22:16:27.053545 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3458 22:16:27.053631 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3459 22:16:27.053724 # ok 1729 Set SVE VL 6912
3460 22:16:27.053825 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3461 22:16:27.053911 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3462 22:16:27.053997 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3463 22:16:27.054082 # ok 1733 Set SVE VL 6928
3464 22:16:27.054166 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3465 22:16:27.054266 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3466 22:16:27.054354 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3467 22:16:27.054438 # ok 1737 Set SVE VL 6944
3468 22:16:27.054955 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3469 22:16:27.055063 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3470 22:16:27.055159 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3471 22:16:27.055244 # ok 1741 Set SVE VL 6960
3472 22:16:27.055332 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3473 22:16:27.055417 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3474 22:16:27.055519 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3475 22:16:27.055606 # ok 1745 Set SVE VL 6976
3476 22:16:27.055691 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3477 22:16:27.055775 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3478 22:16:27.055878 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3479 22:16:27.056180 # ok 1749 Set SVE VL 6992
3480 22:16:27.056277 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3481 22:16:27.056362 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3482 22:16:27.056445 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3483 22:16:27.056549 # ok 1753 Set SVE VL 7008
3484 22:16:27.056638 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3485 22:16:27.056726 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3486 22:16:27.056811 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3487 22:16:27.056896 # ok 1757 Set SVE VL 7024
3488 22:16:27.056978 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3489 22:16:27.057079 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3490 22:16:27.057166 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3491 22:16:27.057249 # ok 1761 Set SVE VL 7040
3492 22:16:27.057333 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3493 22:16:27.057433 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3494 22:16:27.057520 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3495 22:16:27.057605 # ok 1765 Set SVE VL 7056
3496 22:16:27.058015 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3497 22:16:27.058119 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3498 22:16:27.058206 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3499 22:16:27.058292 # ok 1769 Set SVE VL 7072
3500 22:16:27.058376 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3501 22:16:27.058460 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3502 22:16:27.058544 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3503 22:16:27.060872 # ok 1773 Set SVE VL 7088
3504 22:16:27.061023 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3505 22:16:27.061111 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3506 22:16:27.061214 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3507 22:16:27.061305 # ok 1777 Set SVE VL 7104
3508 22:16:27.061608 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3509 22:16:27.061726 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3510 22:16:27.061819 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3511 22:16:27.061925 # ok 1781 Set SVE VL 7120
3512 22:16:27.062033 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3513 22:16:27.062125 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3514 22:16:27.062215 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3515 22:16:27.062320 # ok 1785 Set SVE VL 7136
3516 22:16:27.062675 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3517 22:16:27.062996 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3518 22:16:27.063104 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3519 22:16:27.063196 # ok 1789 Set SVE VL 7152
3520 22:16:27.063500 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3521 22:16:27.063610 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3522 22:16:27.063702 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3523 22:16:27.063792 # ok 1793 Set SVE VL 7168
3524 22:16:27.063898 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3525 22:16:27.064010 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3526 22:16:27.064103 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3527 22:16:27.064189 # ok 1797 Set SVE VL 7184
3528 22:16:27.064491 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3529 22:16:27.064906 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3530 22:16:27.065017 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3531 22:16:27.065110 # ok 1801 Set SVE VL 7200
3532 22:16:27.065399 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3533 22:16:27.065590 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3534 22:16:27.065695 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3535 22:16:27.065787 # ok 1805 Set SVE VL 7216
3536 22:16:27.065878 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3537 22:16:27.065967 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3538 22:16:27.066053 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3539 22:16:27.066134 # ok 1809 Set SVE VL 7232
3540 22:16:27.066213 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3541 22:16:27.066313 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3542 22:16:27.066397 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3543 22:16:27.066479 # ok 1813 Set SVE VL 7248
3544 22:16:27.066558 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3545 22:16:27.066640 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3546 22:16:27.066724 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3547 22:16:27.066811 # ok 1817 Set SVE VL 7264
3548 22:16:27.066917 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3549 22:16:27.067010 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3550 22:16:27.067103 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3551 22:16:27.067197 # ok 1821 Set SVE VL 7280
3552 22:16:27.067287 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3553 22:16:27.067394 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3554 22:16:27.067487 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3555 22:16:27.067578 # ok 1825 Set SVE VL 7296
3556 22:16:27.067684 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3557 22:16:27.067777 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3558 22:16:27.067866 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3559 22:16:27.067956 # ok 1829 Set SVE VL 7312
3560 22:16:27.068067 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3561 22:16:27.068157 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3562 22:16:27.068248 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3563 22:16:27.068355 # ok 1833 Set SVE VL 7328
3564 22:16:27.068445 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3565 22:16:27.068529 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3566 22:16:27.068625 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3567 22:16:27.068728 # ok 1837 Set SVE VL 7344
3568 22:16:27.068814 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3569 22:16:27.068911 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3570 22:16:27.069012 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3571 22:16:27.069096 # ok 1841 Set SVE VL 7360
3572 22:16:27.069797 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3573 22:16:27.069901 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3574 22:16:27.069984 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3575 22:16:27.070068 # ok 1845 Set SVE VL 7376
3576 22:16:27.070175 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3577 22:16:27.070261 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3578 22:16:27.070343 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3579 22:16:27.070423 # ok 1849 Set SVE VL 7392
3580 22:16:27.070504 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3581 22:16:27.070587 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3582 22:16:27.070687 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3583 22:16:27.070771 # ok 1853 Set SVE VL 7408
3584 22:16:27.070854 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3585 22:16:27.070937 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3586 22:16:27.071018 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3587 22:16:27.071116 # ok 1857 Set SVE VL 7424
3588 22:16:27.071202 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3589 22:16:27.071282 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3590 22:16:27.071381 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3591 22:16:27.071467 # ok 1861 Set SVE VL 7440
3592 22:16:27.071550 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3593 22:16:27.071649 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3594 22:16:27.071733 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3595 22:16:27.071818 # ok 1865 Set SVE VL 7456
3596 22:16:27.071921 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3597 22:16:27.072027 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3598 22:16:27.072118 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3599 22:16:27.072222 # ok 1869 Set SVE VL 7472
3600 22:16:27.072314 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3601 22:16:27.072402 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3602 22:16:27.072507 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3603 22:16:27.072596 # ok 1873 Set SVE VL 7488
3604 22:16:27.072692 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3605 22:16:27.072775 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3606 22:16:27.072872 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3607 22:16:27.072958 # ok 1877 Set SVE VL 7504
3608 22:16:27.073257 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3609 22:16:27.073380 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3610 22:16:27.073470 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3611 22:16:27.073554 # ok 1881 Set SVE VL 7520
3612 22:16:27.073637 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3613 22:16:27.073747 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3614 22:16:27.074039 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3615 22:16:27.074136 # ok 1885 Set SVE VL 7536
3616 22:16:27.074221 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3617 22:16:27.074318 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3618 22:16:27.074609 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3619 22:16:27.074709 # ok 1889 Set SVE VL 7552
3620 22:16:27.074809 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3621 22:16:27.074897 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3622 22:16:27.074994 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3623 22:16:27.075280 # ok 1893 Set SVE VL 7568
3624 22:16:27.075383 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3625 22:16:27.075468 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3626 22:16:27.075568 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3627 22:16:27.075653 # ok 1897 Set SVE VL 7584
3628 22:16:27.075752 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3629 22:16:27.075852 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3630 22:16:27.076174 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3631 22:16:27.076274 # ok 1901 Set SVE VL 7600
3632 22:16:27.076359 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3633 22:16:27.076647 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3634 22:16:27.076746 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3635 22:16:27.076830 # ok 1905 Set SVE VL 7616
3636 22:16:27.076913 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3637 22:16:27.077235 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3638 22:16:27.077336 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3639 22:16:27.077421 # ok 1909 Set SVE VL 7632
3640 22:16:27.077506 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3641 22:16:27.077801 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3642 22:16:27.077901 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3643 22:16:27.077985 # ok 1913 Set SVE VL 7648
3644 22:16:27.078066 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3645 22:16:27.078340 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3646 22:16:27.078698 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3647 22:16:27.079018 # ok 1917 Set SVE VL 7664
3648 22:16:27.079120 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3649 22:16:27.079219 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3650 22:16:27.079304 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3651 22:16:27.079400 # ok 1921 Set SVE VL 7680
3652 22:16:27.079485 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3653 22:16:27.079811 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3654 22:16:27.080041 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3655 22:16:27.080143 # ok 1925 Set SVE VL 7696
3656 22:16:27.080247 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3657 22:16:27.080348 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3658 22:16:27.080434 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3659 22:16:27.080533 # ok 1929 Set SVE VL 7712
3660 22:16:27.080617 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3661 22:16:27.080715 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3662 22:16:27.080814 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3663 22:16:27.080913 # ok 1933 Set SVE VL 7728
3664 22:16:27.081028 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3665 22:16:27.081287 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3666 22:16:27.081400 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3667 22:16:27.081489 # ok 1937 Set SVE VL 7744
3668 22:16:27.081793 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3669 22:16:27.081893 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3670 22:16:27.081993 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3671 22:16:27.082075 # ok 1941 Set SVE VL 7760
3672 22:16:27.082165 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3673 22:16:27.084214 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3674 22:16:27.084366 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3675 22:16:27.084456 # ok 1945 Set SVE VL 7776
3676 22:16:27.084543 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3677 22:16:27.084644 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3678 22:16:27.084844 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3679 22:16:27.084954 # ok 1949 Set SVE VL 7792
3680 22:16:27.085044 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3681 22:16:27.085344 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3682 22:16:27.085448 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3683 22:16:27.085698 # ok 1953 Set SVE VL 7808
3684 22:16:27.085792 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3685 22:16:27.085869 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3686 22:16:27.089091 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3687 22:16:27.089266 # ok 1957 Set SVE VL 7824
3688 22:16:27.089356 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3689 22:16:27.089458 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3690 22:16:27.089546 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3691 22:16:27.089632 # ok 1961 Set SVE VL 7840
3692 22:16:27.089747 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3693 22:16:27.089838 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3694 22:16:27.089940 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3695 22:16:27.090025 # ok 1965 Set SVE VL 7856
3696 22:16:27.090119 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3697 22:16:27.091086 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3698 22:16:27.091194 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3699 22:16:27.091299 # ok 1969 Set SVE VL 7872
3700 22:16:27.091403 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3701 22:16:27.091505 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3702 22:16:27.091607 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3703 22:16:27.091949 # ok 1973 Set SVE VL 7888
3704 22:16:27.092172 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3705 22:16:27.092398 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3706 22:16:27.092580 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3707 22:16:27.092770 # ok 1977 Set SVE VL 7904
3708 22:16:27.093014 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3709 22:16:27.093206 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3710 22:16:27.093408 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3711 22:16:27.093598 # ok 1981 Set SVE VL 7920
3712 22:16:27.093780 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3713 22:16:27.093930 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3714 22:16:27.094110 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3715 22:16:27.094252 # ok 1985 Set SVE VL 7936
3716 22:16:27.094370 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3717 22:16:27.094494 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3718 22:16:27.094620 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3719 22:16:27.094740 # ok 1989 Set SVE VL 7952
3720 22:16:27.094864 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3721 22:16:27.094985 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3722 22:16:27.095129 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3723 22:16:27.095272 # ok 1993 Set SVE VL 7968
3724 22:16:27.095426 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3725 22:16:27.095566 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3726 22:16:27.095697 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3727 22:16:27.095821 # ok 1997 Set SVE VL 7984
3728 22:16:27.095952 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3729 22:16:27.096107 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3730 22:16:27.096255 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3731 22:16:27.096383 # ok 2001 Set SVE VL 8000
3732 22:16:27.096510 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3733 22:16:27.096632 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3734 22:16:27.096782 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3735 22:16:27.096915 # ok 2005 Set SVE VL 8016
3736 22:16:27.097039 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3737 22:16:27.097165 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3738 22:16:27.097295 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3739 22:16:27.097419 # ok 2009 Set SVE VL 8032
3740 22:16:27.097545 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3741 22:16:27.097698 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3742 22:16:27.097860 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3743 22:16:27.098013 # ok 2013 Set SVE VL 8048
3744 22:16:27.098155 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3745 22:16:27.098261 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3746 22:16:27.098607 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3747 22:16:27.098708 # ok 2017 Set SVE VL 8064
3748 22:16:27.098794 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3749 22:16:27.098878 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3750 22:16:27.098963 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3751 22:16:27.099049 # ok 2021 Set SVE VL 8080
3752 22:16:27.099134 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3753 22:16:27.099219 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3754 22:16:27.099299 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3755 22:16:27.099381 # ok 2025 Set SVE VL 8096
3756 22:16:27.099467 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3757 22:16:27.099552 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3758 22:16:27.099636 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3759 22:16:27.099720 # ok 2029 Set SVE VL 8112
3760 22:16:27.099817 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3761 22:16:27.099955 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3762 22:16:27.100054 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3763 22:16:27.100145 # ok 2033 Set SVE VL 8128
3764 22:16:27.100232 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3765 22:16:27.100319 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3766 22:16:27.100401 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3767 22:16:27.100481 # ok 2037 Set SVE VL 8144
3768 22:16:27.100550 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3769 22:16:27.100629 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3770 22:16:27.100707 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3771 22:16:27.100780 # ok 2041 Set SVE VL 8160
3772 22:16:27.100905 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3773 22:16:27.101011 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3774 22:16:27.101120 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3775 22:16:27.101213 # ok 2045 Set SVE VL 8176
3776 22:16:27.101287 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3777 22:16:27.101382 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3778 22:16:27.101461 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3779 22:16:27.101537 # ok 2049 Set SVE VL 8192
3780 22:16:27.101618 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3781 22:16:27.101728 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3782 22:16:27.101828 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3783 22:16:27.101942 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3784 22:16:27.102036 # ok 2054 Streaming SVE get_fpsimd() gave same state
3785 22:16:27.102141 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3786 22:16:27.102217 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3787 22:16:27.102289 # ok 2057 Set Streaming SVE VL 16
3788 22:16:27.102584 # ok 2058 Set and get Streaming SVE data for VL 16
3789 22:16:27.102689 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3790 22:16:27.102778 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3791 22:16:27.102867 # ok 2061 Set Streaming SVE VL 32
3792 22:16:27.102951 # ok 2062 Set and get Streaming SVE data for VL 32
3793 22:16:27.103058 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3794 22:16:27.103168 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3795 22:16:27.103272 # ok 2065 Set Streaming SVE VL 48
3796 22:16:27.103365 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3797 22:16:27.103470 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3798 22:16:27.103561 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3799 22:16:27.103645 # ok 2069 Set Streaming SVE VL 64
3800 22:16:27.103742 # ok 2070 Set and get Streaming SVE data for VL 64
3801 22:16:27.103824 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3802 22:16:27.103926 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3803 22:16:27.104016 # ok 2073 Set Streaming SVE VL 80
3804 22:16:27.104119 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3805 22:16:27.104434 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3806 22:16:27.104539 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3807 22:16:27.104646 # ok 2077 Set Streaming SVE VL 96
3808 22:16:27.104734 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3809 22:16:27.104836 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3810 22:16:27.105132 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3811 22:16:27.105243 # ok 2081 Set Streaming SVE VL 112
3812 22:16:27.105344 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3813 22:16:27.105445 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3814 22:16:27.105533 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3815 22:16:27.105629 # ok 2085 Set Streaming SVE VL 128
3816 22:16:27.105932 # ok 2086 Set and get Streaming SVE data for VL 128
3817 22:16:27.106024 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3818 22:16:27.106371 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3819 22:16:27.106675 # ok 2089 Set Streaming SVE VL 144
3820 22:16:27.106971 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3821 22:16:27.107056 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3822 22:16:27.107137 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3823 22:16:27.107217 # ok 2093 Set Streaming SVE VL 160
3824 22:16:27.107311 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3825 22:16:27.107396 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3826 22:16:27.107502 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3827 22:16:27.107622 # ok 2097 Set Streaming SVE VL 176
3828 22:16:27.107753 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3829 22:16:27.107874 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3830 22:16:27.107981 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3831 22:16:27.108122 # ok 2101 Set Streaming SVE VL 192
3832 22:16:27.108474 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3833 22:16:27.108591 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3834 22:16:27.108694 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3835 22:16:27.108794 # ok 2105 Set Streaming SVE VL 208
3836 22:16:27.108898 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3837 22:16:27.109185 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3838 22:16:27.109305 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3839 22:16:27.109433 # ok 2109 Set Streaming SVE VL 224
3840 22:16:27.109565 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3841 22:16:27.109694 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3842 22:16:27.110018 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3843 22:16:27.110115 # ok 2113 Set Streaming SVE VL 240
3844 22:16:27.110391 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3845 22:16:27.110712 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3846 22:16:27.110808 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3847 22:16:27.110890 # ok 2117 Set Streaming SVE VL 256
3848 22:16:27.110989 # ok 2118 Set and get Streaming SVE data for VL 256
3849 22:16:27.111087 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3850 22:16:27.111186 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3851 22:16:27.111272 # ok 2121 Set Streaming SVE VL 272
3852 22:16:27.111555 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3853 22:16:27.111650 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3854 22:16:27.111775 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3855 22:16:27.111848 # ok 2125 Set Streaming SVE VL 288
3856 22:16:27.116483 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3857 22:16:27.116722 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3858 22:16:27.116887 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3859 22:16:27.116993 # ok 2129 Set Streaming SVE VL 304
3860 22:16:27.117076 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3861 22:16:27.117201 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3862 22:16:27.117342 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3863 22:16:27.117445 # ok 2133 Set Streaming SVE VL 320
3864 22:16:27.117555 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3865 22:16:27.117644 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3866 22:16:27.117753 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3867 22:16:27.118039 # ok 2137 Set Streaming SVE VL 336
3868 22:16:27.118135 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3869 22:16:27.118773 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3870 22:16:27.119086 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3871 22:16:27.119198 # ok 2141 Set Streaming SVE VL 352
3872 22:16:27.119492 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3873 22:16:27.119597 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3874 22:16:27.119688 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3875 22:16:27.120005 # ok 2145 Set Streaming SVE VL 368
3876 22:16:27.120141 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3877 22:16:27.120235 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3878 22:16:27.120341 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3879 22:16:27.120433 # ok 2149 Set Streaming SVE VL 384
3880 22:16:27.120538 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3881 22:16:27.120821 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3882 22:16:27.120918 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3883 22:16:27.121023 # ok 2153 Set Streaming SVE VL 400
3884 22:16:27.121112 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3885 22:16:27.121214 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3886 22:16:27.121515 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3887 22:16:27.121618 # ok 2157 Set Streaming SVE VL 416
3888 22:16:27.121729 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3889 22:16:27.121833 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3890 22:16:27.122137 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3891 22:16:27.122443 # ok 2161 Set Streaming SVE VL 432
3892 22:16:27.122548 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3893 22:16:27.122650 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3894 22:16:27.122738 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3895 22:16:27.123112 # ok 2165 Set Streaming SVE VL 448
3896 22:16:27.123215 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3897 22:16:27.123301 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3898 22:16:27.123384 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3899 22:16:27.123690 # ok 2169 Set Streaming SVE VL 464
3900 22:16:27.123794 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3901 22:16:27.123883 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3902 22:16:27.123969 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3903 22:16:27.124055 # ok 2173 Set Streaming SVE VL 480
3904 22:16:27.124358 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3905 22:16:27.124462 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3906 22:16:27.124546 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3907 22:16:27.124630 # ok 2177 Set Streaming SVE VL 496
3908 22:16:27.124716 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3909 22:16:27.124798 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3910 22:16:27.125118 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3911 22:16:27.125230 # ok 2181 Set Streaming SVE VL 512
3912 22:16:27.125319 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3913 22:16:27.125406 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3914 22:16:27.125493 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3915 22:16:27.125580 # ok 2185 Set Streaming SVE VL 528
3916 22:16:27.125691 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3917 22:16:27.125782 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3918 22:16:27.125868 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3919 22:16:27.125955 # ok 2189 Set Streaming SVE VL 544
3920 22:16:27.126055 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3921 22:16:27.126141 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3922 22:16:27.126454 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3923 22:16:27.126553 # ok 2193 Set Streaming SVE VL 560
3924 22:16:27.126859 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3925 22:16:27.126960 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3926 22:16:27.127057 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3927 22:16:27.127155 # ok 2197 Set Streaming SVE VL 576
3928 22:16:27.127504 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3929 22:16:27.127608 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3930 22:16:27.127713 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3931 22:16:27.127829 # ok 2201 Set Streaming SVE VL 592
3932 22:16:27.127954 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3933 22:16:27.128281 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3934 22:16:27.128387 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3935 22:16:27.128499 # ok 2205 Set Streaming SVE VL 608
3936 22:16:27.128810 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3937 22:16:27.128927 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3938 22:16:27.129077 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3939 22:16:27.129172 # ok 2209 Set Streaming SVE VL 624
3940 22:16:27.129275 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3941 22:16:27.129602 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3942 22:16:27.129712 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3943 22:16:27.129815 # ok 2213 Set Streaming SVE VL 640
3944 22:16:27.130116 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3945 22:16:27.130218 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3946 22:16:27.133250 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3947 22:16:27.133349 # ok 2217 Set Streaming SVE VL 656
3948 22:16:27.133434 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3949 22:16:27.133514 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3950 22:16:27.133577 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3951 22:16:27.133643 # ok 2221 Set Streaming SVE VL 672
3952 22:16:27.133721 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3953 22:16:27.133783 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3954 22:16:27.133863 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3955 22:16:27.133938 # ok 2225 Set Streaming SVE VL 688
3956 22:16:27.134006 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3957 22:16:27.134086 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3958 22:16:27.134149 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3959 22:16:27.134207 # ok 2229 Set Streaming SVE VL 704
3960 22:16:27.134280 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3961 22:16:27.134357 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3962 22:16:27.134434 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3963 22:16:27.134510 # ok 2233 Set Streaming SVE VL 720
3964 22:16:27.134592 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3965 22:16:27.134671 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3966 22:16:27.134750 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3967 22:16:27.134834 # ok 2237 Set Streaming SVE VL 736
3968 22:16:27.135118 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3969 22:16:27.135218 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3970 22:16:27.135303 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3971 22:16:27.135386 # ok 2241 Set Streaming SVE VL 752
3972 22:16:27.135468 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3973 22:16:27.135551 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3974 22:16:27.135632 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3975 22:16:27.135712 # ok 2245 Set Streaming SVE VL 768
3976 22:16:27.135793 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3977 22:16:27.135874 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3978 22:16:27.135956 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3979 22:16:27.136057 # ok 2249 Set Streaming SVE VL 784
3980 22:16:27.136144 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3981 22:16:27.136223 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3982 22:16:27.136301 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3983 22:16:27.136381 # ok 2253 Set Streaming SVE VL 800
3984 22:16:27.136459 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3985 22:16:27.136556 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3986 22:16:27.136651 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3987 22:16:27.136751 # ok 2257 Set Streaming SVE VL 816
3988 22:16:27.136837 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3989 22:16:27.136940 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3990 22:16:27.137048 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3991 22:16:27.137171 # ok 2261 Set Streaming SVE VL 832
3992 22:16:27.137298 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3993 22:16:27.137428 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3994 22:16:27.137762 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3995 22:16:27.137848 # ok 2265 Set Streaming SVE VL 848
3996 22:16:27.137934 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3997 22:16:27.138023 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3998 22:16:27.138318 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3999 22:16:27.138409 # ok 2269 Set Streaming SVE VL 864
4000 22:16:27.138692 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
4001 22:16:27.138789 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
4002 22:16:27.138866 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4003 22:16:27.138962 # ok 2273 Set Streaming SVE VL 880
4004 22:16:27.139055 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4005 22:16:27.139344 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4006 22:16:27.139591 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4007 22:16:27.139763 # ok 2277 Set Streaming SVE VL 896
4008 22:16:27.139914 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4009 22:16:27.145052 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4010 22:16:27.145270 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4011 22:16:27.145354 # ok 2281 Set Streaming SVE VL 912
4012 22:16:27.145431 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4013 22:16:27.145678 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4014 22:16:27.145745 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4015 22:16:27.145817 # ok 2285 Set Streaming SVE VL 928
4016 22:16:27.146067 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4017 22:16:27.146969 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4018 22:16:27.147213 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4019 22:16:27.147278 # ok 2289 Set Streaming SVE VL 944
4020 22:16:27.147349 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4021 22:16:27.147595 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4022 22:16:27.147851 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4023 22:16:27.147947 # ok 2293 Set Streaming SVE VL 960
4024 22:16:27.148078 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4025 22:16:27.148194 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4026 22:16:27.148303 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4027 22:16:27.148399 # ok 2297 Set Streaming SVE VL 976
4028 22:16:27.148686 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4029 22:16:27.148819 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4030 22:16:27.148934 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4031 22:16:27.149037 # ok 2301 Set Streaming SVE VL 992
4032 22:16:27.149317 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4033 22:16:27.149434 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4034 22:16:27.149686 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4035 22:16:27.149776 # ok 2305 Set Streaming SVE VL 1008
4036 22:16:27.149874 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4037 22:16:27.149974 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4038 22:16:27.150265 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4039 22:16:27.150373 # ok 2309 Set Streaming SVE VL 1024
4040 22:16:27.150655 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4041 22:16:27.150745 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4042 22:16:27.150872 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4043 22:16:27.150971 # ok 2313 Set Streaming SVE VL 1040
4044 22:16:27.151257 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4045 22:16:27.151338 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4046 22:16:27.151454 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4047 22:16:27.151732 # ok 2317 Set Streaming SVE VL 1056
4048 22:16:27.151843 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4049 22:16:27.151934 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4050 22:16:27.152192 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4051 22:16:27.152261 # ok 2321 Set Streaming SVE VL 1072
4052 22:16:27.152337 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4053 22:16:27.152630 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4054 22:16:27.152746 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4055 22:16:27.152847 # ok 2325 Set Streaming SVE VL 1088
4056 22:16:27.152947 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4057 22:16:27.153240 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4058 22:16:27.153353 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4059 22:16:27.153478 # ok 2329 Set Streaming SVE VL 1104
4060 22:16:27.153595 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4061 22:16:27.153695 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4062 22:16:27.153992 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4063 22:16:27.154084 # ok 2333 Set Streaming SVE VL 1120
4064 22:16:27.154743 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4065 22:16:27.154847 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4066 22:16:27.154977 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4067 22:16:27.155104 # ok 2337 Set Streaming SVE VL 1136
4068 22:16:27.155407 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4069 22:16:27.155495 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4070 22:16:27.155597 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4071 22:16:27.155707 # ok 2341 Set Streaming SVE VL 1152
4072 22:16:27.155830 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4073 22:16:27.156005 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4074 22:16:27.156197 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4075 22:16:27.156304 # ok 2345 Set Streaming SVE VL 1168
4076 22:16:27.156402 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4077 22:16:27.156503 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4078 22:16:27.156592 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4079 22:16:27.156678 # ok 2349 Set Streaming SVE VL 1184
4080 22:16:27.156778 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4081 22:16:27.156860 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4082 22:16:27.156952 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4083 22:16:27.157282 # ok 2353 Set Streaming SVE VL 1200
4084 22:16:27.157382 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4085 22:16:27.157478 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4086 22:16:27.157568 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4087 22:16:27.157672 # ok 2357 Set Streaming SVE VL 1216
4088 22:16:27.157963 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4089 22:16:27.158070 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4090 22:16:27.158342 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4091 22:16:27.158679 # ok 2361 Set Streaming SVE VL 1232
4092 22:16:27.158875 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4093 22:16:27.159069 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4094 22:16:27.159244 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4095 22:16:27.159412 # ok 2365 Set Streaming SVE VL 1248
4096 22:16:27.159576 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4097 22:16:27.159738 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4098 22:16:27.159903 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4099 22:16:27.160095 # ok 2369 Set Streaming SVE VL 1264
4100 22:16:27.160246 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4101 22:16:27.160399 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4102 22:16:27.160544 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4103 22:16:27.160690 # ok 2373 Set Streaming SVE VL 1280
4104 22:16:27.160811 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4105 22:16:27.160926 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4106 22:16:27.161058 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4107 22:16:27.161162 # ok 2377 Set Streaming SVE VL 1296
4108 22:16:27.161280 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4109 22:16:27.161443 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4110 22:16:27.161569 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4111 22:16:27.162092 # ok 2381 Set Streaming SVE VL 1312
4112 22:16:27.162227 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4113 22:16:27.162313 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4114 22:16:27.162393 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4115 22:16:27.162477 # ok 2385 Set Streaming SVE VL 1328
4116 22:16:27.162573 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4117 22:16:27.162651 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4118 22:16:27.162737 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4119 22:16:27.162831 # ok 2389 Set Streaming SVE VL 1344
4120 22:16:27.162929 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4121 22:16:27.163222 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4122 22:16:27.163338 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4123 22:16:27.163438 # ok 2393 Set Streaming SVE VL 1360
4124 22:16:27.163708 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4125 22:16:27.163831 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4126 22:16:27.163948 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4127 22:16:27.164039 # ok 2397 Set Streaming SVE VL 1376
4128 22:16:27.164311 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4129 22:16:27.164428 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4130 22:16:27.164561 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4131 22:16:27.164671 # ok 2401 Set Streaming SVE VL 1392
4132 22:16:27.164799 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4133 22:16:27.165092 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4134 22:16:27.165206 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4135 22:16:27.165297 # ok 2405 Set Streaming SVE VL 1408
4136 22:16:27.165587 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4137 22:16:27.165694 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4138 22:16:27.165819 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4139 22:16:27.165936 # ok 2409 Set Streaming SVE VL 1424
4140 22:16:27.166049 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4141 22:16:27.166338 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4142 22:16:27.166466 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4143 22:16:27.166586 # ok 2413 Set Streaming SVE VL 1440
4144 22:16:27.166692 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4145 22:16:27.166980 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4146 22:16:27.167101 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4147 22:16:27.167223 # ok 2417 Set Streaming SVE VL 1456
4148 22:16:27.167393 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4149 22:16:27.167507 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4150 22:16:27.167799 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4151 22:16:27.167902 # ok 2421 Set Streaming SVE VL 1472
4152 22:16:27.168003 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4153 22:16:27.168304 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4154 22:16:27.168398 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4155 22:16:27.168507 # ok 2425 Set Streaming SVE VL 1488
4156 22:16:27.168582 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4157 22:16:27.168878 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4158 22:16:27.168960 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4159 22:16:27.173165 # ok 2429 Set Streaming SVE VL 1504
4160 22:16:27.173373 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4161 22:16:27.173459 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4162 22:16:27.173746 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4163 22:16:27.173834 # ok 2433 Set Streaming SVE VL 1520
4164 22:16:27.173944 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4165 22:16:27.174048 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4166 22:16:27.176159 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4167 22:16:27.176466 # ok 2437 Set Streaming SVE VL 1536
4168 22:16:27.176810 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4169 22:16:27.176945 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4170 22:16:27.177056 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4171 22:16:27.177179 # ok 2441 Set Streaming SVE VL 1552
4172 22:16:27.177264 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4173 22:16:27.177354 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4174 22:16:27.177429 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4175 22:16:27.177693 # ok 2445 Set Streaming SVE VL 1568
4176 22:16:27.177803 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4177 22:16:27.177897 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4178 22:16:27.178178 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4179 22:16:27.178918 # ok 2449 Set Streaming SVE VL 1584
4180 22:16:27.179026 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4181 22:16:27.179153 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4182 22:16:27.179485 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4183 22:16:27.179569 # ok 2453 Set Streaming SVE VL 1600
4184 22:16:27.179663 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4185 22:16:27.179763 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4186 22:16:27.179886 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4187 22:16:27.180000 # ok 2457 Set Streaming SVE VL 1616
4188 22:16:27.180291 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4189 22:16:27.180390 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4190 22:16:27.180486 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4191 22:16:27.180776 # ok 2461 Set Streaming SVE VL 1632
4192 22:16:27.180872 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4193 22:16:27.180959 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4194 22:16:27.181043 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4195 22:16:27.181137 # ok 2465 Set Streaming SVE VL 1648
4196 22:16:27.181495 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4197 22:16:27.181750 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4198 22:16:27.181830 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4199 22:16:27.181912 # ok 2469 Set Streaming SVE VL 1664
4200 22:16:27.182164 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4201 22:16:27.182420 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4202 22:16:27.182506 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4203 22:16:27.182774 # ok 2473 Set Streaming SVE VL 1680
4204 22:16:27.182858 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4205 22:16:27.182934 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4206 22:16:27.183193 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4207 22:16:27.183277 # ok 2477 Set Streaming SVE VL 1696
4208 22:16:27.183371 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4209 22:16:27.183667 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4210 22:16:27.183751 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4211 22:16:27.183847 # ok 2481 Set Streaming SVE VL 1712
4212 22:16:27.183963 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4213 22:16:27.184273 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4214 22:16:27.184384 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4215 22:16:27.184496 # ok 2485 Set Streaming SVE VL 1728
4216 22:16:27.184598 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4217 22:16:27.184701 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4218 22:16:27.184813 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4219 22:16:27.185164 # ok 2489 Set Streaming SVE VL 1744
4220 22:16:27.185260 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4221 22:16:27.185367 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4222 22:16:27.185483 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4223 22:16:27.185608 # ok 2493 Set Streaming SVE VL 1760
4224 22:16:27.185959 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4225 22:16:27.186160 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4226 22:16:27.186530 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4227 22:16:27.186724 # ok 2497 Set Streaming SVE VL 1776
4228 22:16:27.186897 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4229 22:16:27.187094 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4230 22:16:27.187264 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4231 22:16:27.187394 # ok 2501 Set Streaming SVE VL 1792
4232 22:16:27.187516 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4233 22:16:27.187663 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4234 22:16:27.187785 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4235 22:16:27.187900 # ok 2505 Set Streaming SVE VL 1808
4236 22:16:27.188029 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4237 22:16:27.188191 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4238 22:16:27.188324 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4239 22:16:27.188449 # ok 2509 Set Streaming SVE VL 1824
4240 22:16:27.188569 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4241 22:16:27.188702 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4242 22:16:27.188817 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4243 22:16:27.188926 # ok 2513 Set Streaming SVE VL 1840
4244 22:16:27.189088 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4245 22:16:27.189221 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4246 22:16:27.189367 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4247 22:16:27.189491 # ok 2517 Set Streaming SVE VL 1856
4248 22:16:27.189607 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4249 22:16:27.190177 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4250 22:16:27.190290 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4251 22:16:27.190370 # ok 2521 Set Streaming SVE VL 1872
4252 22:16:27.190454 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4253 22:16:27.190558 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4254 22:16:27.190680 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4255 22:16:27.190803 # ok 2525 Set Streaming SVE VL 1888
4256 22:16:27.190893 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4257 22:16:27.190991 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4258 22:16:27.191273 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4259 22:16:27.191380 # ok 2529 Set Streaming SVE VL 1904
4260 22:16:27.191499 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4261 22:16:27.191626 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4262 22:16:27.191735 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4263 22:16:27.191836 # ok 2533 Set Streaming SVE VL 1920
4264 22:16:27.192135 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4265 22:16:27.192263 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4266 22:16:27.192381 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4267 22:16:27.192488 # ok 2537 Set Streaming SVE VL 1936
4268 22:16:27.192788 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4269 22:16:27.192886 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4270 22:16:27.192983 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4271 22:16:27.193109 # ok 2541 Set Streaming SVE VL 1952
4272 22:16:27.193423 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4273 22:16:27.193550 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4274 22:16:27.193665 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4275 22:16:27.193795 # ok 2545 Set Streaming SVE VL 1968
4276 22:16:27.193911 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4277 22:16:27.194234 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4278 22:16:27.194359 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4279 22:16:27.194482 # ok 2549 Set Streaming SVE VL 1984
4280 22:16:27.194834 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4281 22:16:27.194938 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4282 22:16:27.195055 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4283 22:16:27.195140 # ok 2553 Set Streaming SVE VL 2000
4284 22:16:27.195238 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4285 22:16:27.195531 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4286 22:16:27.195625 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4287 22:16:27.195720 # ok 2557 Set Streaming SVE VL 2016
4288 22:16:27.195814 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4289 22:16:27.196095 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4290 22:16:27.196186 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4291 22:16:27.196283 # ok 2561 Set Streaming SVE VL 2032
4292 22:16:27.196382 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4293 22:16:27.196672 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4294 22:16:27.196771 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4295 22:16:27.196885 # ok 2565 Set Streaming SVE VL 2048
4296 22:16:27.196979 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4297 22:16:27.197088 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4298 22:16:27.197366 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4299 22:16:27.197453 # ok 2569 Set Streaming SVE VL 2064
4300 22:16:27.197534 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4301 22:16:27.197816 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4302 22:16:27.197928 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4303 22:16:27.198024 # ok 2573 Set Streaming SVE VL 2080
4304 22:16:27.198297 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4305 22:16:27.198590 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4306 22:16:27.198689 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4307 22:16:27.198775 # ok 2577 Set Streaming SVE VL 2096
4308 22:16:27.198859 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4309 22:16:27.203972 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4310 22:16:27.204213 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4311 22:16:27.204311 # ok 2581 Set Streaming SVE VL 2112
4312 22:16:27.204387 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4313 22:16:27.204475 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4314 22:16:27.204749 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4315 22:16:27.204845 # ok 2585 Set Streaming SVE VL 2128
4316 22:16:27.204949 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4317 22:16:27.205067 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4318 22:16:27.205367 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4319 22:16:27.205467 # ok 2589 Set Streaming SVE VL 2144
4320 22:16:27.205568 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4321 22:16:27.205676 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4322 22:16:27.205985 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4323 22:16:27.206079 # ok 2593 Set Streaming SVE VL 2160
4324 22:16:27.206865 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4325 22:16:27.207164 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4326 22:16:27.207278 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4327 22:16:27.207382 # ok 2597 Set Streaming SVE VL 2176
4328 22:16:27.207483 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4329 22:16:27.207771 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4330 22:16:27.207906 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4331 22:16:27.208032 # ok 2601 Set Streaming SVE VL 2192
4332 22:16:27.208176 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4333 22:16:27.208299 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4334 22:16:27.208422 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4335 22:16:27.208729 # ok 2605 Set Streaming SVE VL 2208
4336 22:16:27.208826 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4337 22:16:27.208945 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4338 22:16:27.209069 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4339 22:16:27.209172 # ok 2609 Set Streaming SVE VL 2224
4340 22:16:27.209309 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4341 22:16:27.209418 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4342 22:16:27.209519 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4343 22:16:27.209811 # ok 2613 Set Streaming SVE VL 2240
4344 22:16:27.209929 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4345 22:16:27.210033 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4346 22:16:27.210748 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4347 22:16:27.210870 # ok 2617 Set Streaming SVE VL 2256
4348 22:16:27.210979 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4349 22:16:27.211075 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4350 22:16:27.211352 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4351 22:16:27.211456 # ok 2621 Set Streaming SVE VL 2272
4352 22:16:27.211541 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4353 22:16:27.211634 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4354 22:16:27.211954 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4355 22:16:27.212051 # ok 2625 Set Streaming SVE VL 2288
4356 22:16:27.212158 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4357 22:16:27.212260 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4358 22:16:27.212363 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4359 22:16:27.212635 # ok 2629 Set Streaming SVE VL 2304
4360 22:16:27.212901 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4361 22:16:27.212982 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4362 22:16:27.213080 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4363 22:16:27.213161 # ok 2633 Set Streaming SVE VL 2320
4364 22:16:27.213247 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4365 22:16:27.213351 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4366 22:16:27.213628 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4367 22:16:27.213711 # ok 2637 Set Streaming SVE VL 2336
4368 22:16:27.213785 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4369 22:16:27.214035 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4370 22:16:27.214287 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4371 22:16:27.214365 # ok 2641 Set Streaming SVE VL 2352
4372 22:16:27.214629 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4373 22:16:27.214904 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4374 22:16:27.214984 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4375 22:16:27.215078 # ok 2645 Set Streaming SVE VL 2368
4376 22:16:27.215173 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4377 22:16:27.215301 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4378 22:16:27.215409 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4379 22:16:27.215514 # ok 2649 Set Streaming SVE VL 2384
4380 22:16:27.215794 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4381 22:16:27.215895 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4382 22:16:27.216178 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4383 22:16:27.216277 # ok 2653 Set Streaming SVE VL 2400
4384 22:16:27.216383 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4385 22:16:27.216496 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4386 22:16:27.216591 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4387 22:16:27.216683 # ok 2657 Set Streaming SVE VL 2416
4388 22:16:27.216970 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4389 22:16:27.217082 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4390 22:16:27.217178 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4391 22:16:27.217271 # ok 2661 Set Streaming SVE VL 2432
4392 22:16:27.217551 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4393 22:16:27.217650 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4394 22:16:27.217930 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4395 22:16:27.218042 # ok 2665 Set Streaming SVE VL 2448
4396 22:16:27.218153 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4397 22:16:27.218462 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4398 22:16:27.218556 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4399 22:16:27.218672 # ok 2669 Set Streaming SVE VL 2464
4400 22:16:27.218972 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4401 22:16:27.219070 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4402 22:16:27.219181 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4403 22:16:27.219266 # ok 2673 Set Streaming SVE VL 2480
4404 22:16:27.219362 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4405 22:16:27.219642 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4406 22:16:27.219755 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4407 22:16:27.219902 # ok 2677 Set Streaming SVE VL 2496
4408 22:16:27.220021 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4409 22:16:27.220122 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4410 22:16:27.220401 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4411 22:16:27.220512 # ok 2681 Set Streaming SVE VL 2512
4412 22:16:27.220636 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4413 22:16:27.220934 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4414 22:16:27.221013 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4415 22:16:27.221124 # ok 2685 Set Streaming SVE VL 2528
4416 22:16:27.221213 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4417 22:16:27.221478 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4418 22:16:27.221565 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4419 22:16:27.221683 # ok 2689 Set Streaming SVE VL 2544
4420 22:16:27.221782 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4421 22:16:27.222064 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4422 22:16:27.222377 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4423 22:16:27.222474 # ok 2693 Set Streaming SVE VL 2560
4424 22:16:27.222572 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4425 22:16:27.222657 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4426 22:16:27.222760 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4427 22:16:27.223032 # ok 2697 Set Streaming SVE VL 2576
4428 22:16:27.223118 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4429 22:16:27.223232 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4430 22:16:27.223344 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4431 22:16:27.223459 # ok 2701 Set Streaming SVE VL 2592
4432 22:16:27.223729 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4433 22:16:27.223817 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4434 22:16:27.223912 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4435 22:16:27.224223 # ok 2705 Set Streaming SVE VL 2608
4436 22:16:27.224376 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4437 22:16:27.224537 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4438 22:16:27.224653 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4439 22:16:27.224765 # ok 2709 Set Streaming SVE VL 2624
4440 22:16:27.224857 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4441 22:16:27.224961 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4442 22:16:27.225074 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4443 22:16:27.225201 # ok 2713 Set Streaming SVE VL 2640
4444 22:16:27.225339 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4445 22:16:27.225621 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4446 22:16:27.225722 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4447 22:16:27.225799 # ok 2717 Set Streaming SVE VL 2656
4448 22:16:27.225886 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4449 22:16:27.226178 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4450 22:16:27.226509 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4451 22:16:27.226711 # ok 2721 Set Streaming SVE VL 2672
4452 22:16:27.226921 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4453 22:16:27.227098 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4454 22:16:27.227266 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4455 22:16:27.227419 # ok 2725 Set Streaming SVE VL 2688
4456 22:16:27.227514 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4457 22:16:27.227602 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4458 22:16:27.232436 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4459 22:16:27.232647 # ok 2729 Set Streaming SVE VL 2704
4460 22:16:27.232725 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4461 22:16:27.232825 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4462 22:16:27.232948 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4463 22:16:27.233050 # ok 2733 Set Streaming SVE VL 2720
4464 22:16:27.233148 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4465 22:16:27.233485 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4466 22:16:27.233604 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4467 22:16:27.233717 # ok 2737 Set Streaming SVE VL 2736
4468 22:16:27.233823 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4469 22:16:27.234112 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4470 22:16:27.237841 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4471 22:16:27.237954 # ok 2741 Set Streaming SVE VL 2752
4472 22:16:27.238038 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4473 22:16:27.238107 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4474 22:16:27.238170 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4475 22:16:27.238232 # ok 2745 Set Streaming SVE VL 2768
4476 22:16:27.238298 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4477 22:16:27.238358 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4478 22:16:27.238422 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4479 22:16:27.238483 # ok 2749 Set Streaming SVE VL 2784
4480 22:16:27.238545 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4481 22:16:27.238606 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4482 22:16:27.238667 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4483 22:16:27.238732 # ok 2753 Set Streaming SVE VL 2800
4484 22:16:27.238793 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4485 22:16:27.238855 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4486 22:16:27.238915 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4487 22:16:27.238977 # ok 2757 Set Streaming SVE VL 2816
4488 22:16:27.239040 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4489 22:16:27.239107 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4490 22:16:27.239170 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4491 22:16:27.239234 # ok 2761 Set Streaming SVE VL 2832
4492 22:16:27.239296 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4493 22:16:27.239626 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4494 22:16:27.239820 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4495 22:16:27.239994 # ok 2765 Set Streaming SVE VL 2848
4496 22:16:27.240166 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4497 22:16:27.240336 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4498 22:16:27.240507 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4499 22:16:27.240666 # ok 2769 Set Streaming SVE VL 2864
4500 22:16:27.240804 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4501 22:16:27.240955 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4502 22:16:27.241149 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4503 22:16:27.241403 # ok 2773 Set Streaming SVE VL 2880
4504 22:16:27.241551 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4505 22:16:27.241742 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4506 22:16:27.241905 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4507 22:16:27.242041 # ok 2777 Set Streaming SVE VL 2896
4508 22:16:27.242153 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4509 22:16:27.242257 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4510 22:16:27.242398 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4511 22:16:27.242560 # ok 2781 Set Streaming SVE VL 2912
4512 22:16:27.242720 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4513 22:16:27.242871 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4514 22:16:27.243038 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4515 22:16:27.243188 # ok 2785 Set Streaming SVE VL 2928
4516 22:16:27.243324 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4517 22:16:27.243424 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4518 22:16:27.243538 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4519 22:16:27.243690 # ok 2789 Set Streaming SVE VL 2944
4520 22:16:27.243816 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4521 22:16:27.243935 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4522 22:16:27.244059 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4523 22:16:27.244177 # ok 2793 Set Streaming SVE VL 2960
4524 22:16:27.244269 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4525 22:16:27.244368 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4526 22:16:27.244491 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4527 22:16:27.244646 # ok 2797 Set Streaming SVE VL 2976
4528 22:16:27.245022 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4529 22:16:27.245118 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4530 22:16:27.245198 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4531 22:16:27.245277 # ok 2801 Set Streaming SVE VL 2992
4532 22:16:27.245352 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4533 22:16:27.245430 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4534 22:16:27.245515 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4535 22:16:27.245593 # ok 2805 Set Streaming SVE VL 3008
4536 22:16:27.245681 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4537 22:16:27.245760 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4538 22:16:27.245836 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4539 22:16:27.245930 # ok 2809 Set Streaming SVE VL 3024
4540 22:16:27.246013 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4541 22:16:27.246078 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4542 22:16:27.246148 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4543 22:16:27.246221 # ok 2813 Set Streaming SVE VL 3040
4544 22:16:27.246301 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4545 22:16:27.246385 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4546 22:16:27.246481 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4547 22:16:27.246565 # ok 2817 Set Streaming SVE VL 3056
4548 22:16:27.246655 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4549 22:16:27.246752 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4550 22:16:27.246834 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4551 22:16:27.246950 # ok 2821 Set Streaming SVE VL 3072
4552 22:16:27.247042 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4553 22:16:27.247157 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4554 22:16:27.247267 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4555 22:16:27.247361 # ok 2825 Set Streaming SVE VL 3088
4556 22:16:27.247669 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4557 22:16:27.247763 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4558 22:16:27.248029 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4559 22:16:27.248124 # ok 2829 Set Streaming SVE VL 3104
4560 22:16:27.248237 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4561 22:16:27.248313 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4562 22:16:27.248581 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4563 22:16:27.248654 # ok 2833 Set Streaming SVE VL 3120
4564 22:16:27.248747 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4565 22:16:27.248855 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4566 22:16:27.249152 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4567 22:16:27.249250 # ok 2837 Set Streaming SVE VL 3136
4568 22:16:27.249375 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4569 22:16:27.249462 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4570 22:16:27.249964 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4571 22:16:27.250157 # ok 2841 Set Streaming SVE VL 3152
4572 22:16:27.250307 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4573 22:16:27.250454 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4574 22:16:27.250567 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4575 22:16:27.250673 # ok 2845 Set Streaming SVE VL 3168
4576 22:16:27.250788 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4577 22:16:27.250898 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4578 22:16:27.251031 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4579 22:16:27.251147 # ok 2849 Set Streaming SVE VL 3184
4580 22:16:27.251292 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4581 22:16:27.251398 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4582 22:16:27.251495 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4583 22:16:27.251843 # ok 2853 Set Streaming SVE VL 3200
4584 22:16:27.251939 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4585 22:16:27.252058 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4586 22:16:27.252153 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4587 22:16:27.252244 # ok 2857 Set Streaming SVE VL 3216
4588 22:16:27.252351 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4589 22:16:27.252638 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4590 22:16:27.252731 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4591 22:16:27.252807 # ok 2861 Set Streaming SVE VL 3232
4592 22:16:27.253087 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4593 22:16:27.253185 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4594 22:16:27.253276 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4595 22:16:27.253359 # ok 2865 Set Streaming SVE VL 3248
4596 22:16:27.253448 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4597 22:16:27.253686 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4598 22:16:27.253959 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4599 22:16:27.254027 # ok 2869 Set Streaming SVE VL 3264
4600 22:16:27.257763 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4601 22:16:27.257918 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4602 22:16:27.258006 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4603 22:16:27.258093 # ok 2873 Set Streaming SVE VL 3280
4604 22:16:27.258177 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4605 22:16:27.258263 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4606 22:16:27.258348 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4607 22:16:27.258432 # ok 2877 Set Streaming SVE VL 3296
4608 22:16:27.265047 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4609 22:16:27.265304 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4610 22:16:27.265416 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4611 22:16:27.265578 # ok 2881 Set Streaming SVE VL 3312
4612 22:16:27.265720 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4613 22:16:27.265847 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4614 22:16:27.266156 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4615 22:16:27.266279 # ok 2885 Set Streaming SVE VL 3328
4616 22:16:27.276400 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4617 22:16:27.276738 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4618 22:16:27.276863 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4619 22:16:27.276954 # ok 2889 Set Streaming SVE VL 3344
4620 22:16:27.277252 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4621 22:16:27.277355 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4622 22:16:27.277461 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4623 22:16:27.277551 # ok 2893 Set Streaming SVE VL 3360
4624 22:16:27.277657 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4625 22:16:27.277759 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4626 22:16:27.277891 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4627 22:16:27.278011 # ok 2897 Set Streaming SVE VL 3376
4628 22:16:27.284364 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4629 22:16:27.284681 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4630 22:16:27.284803 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4631 22:16:27.284928 # ok 2901 Set Streaming SVE VL 3392
4632 22:16:27.285704 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4633 22:16:27.285815 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4634 22:16:27.285906 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4635 22:16:27.285990 # ok 2905 Set Streaming SVE VL 3408
4636 22:16:27.286073 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4637 22:16:27.286172 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4638 22:16:27.286258 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4639 22:16:27.287150 # ok 2909 Set Streaming SVE VL 3424
4640 22:16:27.287500 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4641 22:16:27.287709 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4642 22:16:27.287936 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4643 22:16:27.288115 # ok 2913 Set Streaming SVE VL 3440
4644 22:16:27.288307 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4645 22:16:27.288552 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4646 22:16:27.288749 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4647 22:16:27.288960 # ok 2917 Set Streaming SVE VL 3456
4648 22:16:27.289207 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4649 22:16:27.289416 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4650 22:16:27.289639 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4651 22:16:27.289841 # ok 2921 Set Streaming SVE VL 3472
4652 22:16:27.290035 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4653 22:16:27.290233 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4654 22:16:27.290368 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4655 22:16:27.290487 # ok 2925 Set Streaming SVE VL 3488
4656 22:16:27.290604 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4657 22:16:27.290723 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4658 22:16:27.290839 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4659 22:16:27.290957 # ok 2929 Set Streaming SVE VL 3504
4660 22:16:27.292827 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4661 22:16:27.293318 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4662 22:16:27.293489 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4663 22:16:27.293842 # ok 2933 Set Streaming SVE VL 3520
4664 22:16:27.293994 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4665 22:16:27.294132 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4666 22:16:27.294235 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4667 22:16:27.294347 # ok 2937 Set Streaming SVE VL 3536
4668 22:16:27.294443 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4669 22:16:27.304840 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4670 22:16:27.305090 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4671 22:16:27.305366 # ok 2941 Set Streaming SVE VL 3552
4672 22:16:27.305584 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4673 22:16:27.305805 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4674 22:16:27.306006 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4675 22:16:27.306200 # ok 2945 Set Streaming SVE VL 3568
4676 22:16:27.306367 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4677 22:16:27.306496 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4678 22:16:27.306613 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4679 22:16:27.306730 # ok 2949 Set Streaming SVE VL 3584
4680 22:16:27.309559 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4681 22:16:27.309966 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4682 22:16:27.310145 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4683 22:16:27.310276 # ok 2953 Set Streaming SVE VL 3600
4684 22:16:27.319944 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4685 22:16:27.320363 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4686 22:16:27.320476 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4687 22:16:27.320567 # ok 2957 Set Streaming SVE VL 3616
4688 22:16:27.320666 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4689 22:16:27.320753 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4690 22:16:27.320855 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4691 22:16:27.320940 # ok 2961 Set Streaming SVE VL 3632
4692 22:16:27.321037 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4693 22:16:27.321375 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4694 22:16:27.321580 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4695 22:16:27.321787 # ok 2965 Set Streaming SVE VL 3648
4696 22:16:27.321958 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4697 22:16:27.322158 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4698 22:16:27.322323 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4699 22:16:27.322488 # ok 2969 Set Streaming SVE VL 3664
4700 22:16:27.322656 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4701 22:16:27.322858 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4702 22:16:27.323067 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4703 22:16:27.323281 # ok 2973 Set Streaming SVE VL 3680
4704 22:16:27.323486 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4705 22:16:27.323743 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4706 22:16:27.323957 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4707 22:16:27.324161 # ok 2977 Set Streaming SVE VL 3696
4708 22:16:27.324332 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4709 22:16:27.324505 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4710 22:16:27.324747 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4711 22:16:27.324916 # ok 2981 Set Streaming SVE VL 3712
4712 22:16:27.325085 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4713 22:16:27.325277 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4714 22:16:27.325470 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4715 22:16:27.325621 # ok 2985 Set Streaming SVE VL 3728
4716 22:16:27.326328 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4717 22:16:27.326489 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4718 22:16:27.326630 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4719 22:16:27.326824 # ok 2989 Set Streaming SVE VL 3744
4720 22:16:27.326990 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4721 22:16:27.327182 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4722 22:16:27.327381 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4723 22:16:27.327559 # ok 2993 Set Streaming SVE VL 3760
4724 22:16:27.327719 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4725 22:16:27.327874 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4726 22:16:27.328037 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4727 22:16:27.328200 # ok 2997 Set Streaming SVE VL 3776
4728 22:16:27.328368 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4729 22:16:27.328943 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4730 22:16:27.329178 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4731 22:16:27.329348 # ok 3001 Set Streaming SVE VL 3792
4732 22:16:27.329475 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4733 22:16:27.329595 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4734 22:16:27.329777 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4735 22:16:27.329952 # ok 3005 Set Streaming SVE VL 3808
4736 22:16:27.330096 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4737 22:16:27.330240 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4738 22:16:27.330384 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4739 22:16:27.330529 # ok 3009 Set Streaming SVE VL 3824
4740 22:16:27.330674 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4741 22:16:27.330818 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4742 22:16:27.330962 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4743 22:16:27.331105 # ok 3013 Set Streaming SVE VL 3840
4744 22:16:27.331248 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4745 22:16:27.331390 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4746 22:16:27.331571 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4747 22:16:27.331713 # ok 3017 Set Streaming SVE VL 3856
4748 22:16:27.331857 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4749 22:16:27.333789 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4750 22:16:27.334212 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4751 22:16:27.344510 # ok 3021 Set Streaming SVE VL 3872
4752 22:16:27.344964 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4753 22:16:27.345158 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4754 22:16:27.345362 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4755 22:16:27.345513 # ok 3025 Set Streaming SVE VL 3888
4756 22:16:27.345636 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4757 22:16:27.349668 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4758 22:16:27.350033 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4759 22:16:27.350142 # ok 3029 Set Streaming SVE VL 3904
4760 22:16:27.350246 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4761 22:16:27.352802 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4762 22:16:27.353103 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4763 22:16:27.353226 # ok 3033 Set Streaming SVE VL 3920
4764 22:16:27.353313 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4765 22:16:27.353415 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4766 22:16:27.353590 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4767 22:16:27.353718 # ok 3037 Set Streaming SVE VL 3936
4768 22:16:27.353819 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4769 22:16:27.354145 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4770 22:16:27.355077 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4771 22:16:27.355538 # ok 3041 Set Streaming SVE VL 3952
4772 22:16:27.355770 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4773 22:16:27.355976 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4774 22:16:27.356182 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4775 22:16:27.356335 # ok 3045 Set Streaming SVE VL 3968
4776 22:16:27.356489 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4777 22:16:27.356618 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4778 22:16:27.356780 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4779 22:16:27.356904 # ok 3049 Set Streaming SVE VL 3984
4780 22:16:27.357032 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4781 22:16:27.357161 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4782 22:16:27.357279 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4783 22:16:27.357420 # ok 3053 Set Streaming SVE VL 4000
4784 22:16:27.357541 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4785 22:16:27.357680 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4786 22:16:27.357888 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4787 22:16:27.358112 # ok 3057 Set Streaming SVE VL 4016
4788 22:16:27.358305 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4789 22:16:27.358479 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4790 22:16:27.358626 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4791 22:16:27.358769 # ok 3061 Set Streaming SVE VL 4032
4792 22:16:27.364205 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4793 22:16:27.364524 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4794 22:16:27.364725 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4795 22:16:27.364917 # ok 3065 Set Streaming SVE VL 4048
4796 22:16:27.365348 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4797 22:16:27.365553 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4798 22:16:27.365738 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4799 22:16:27.365954 # ok 3069 Set Streaming SVE VL 4064
4800 22:16:27.366205 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4801 22:16:27.366355 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4802 22:16:27.366477 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4803 22:16:27.366596 # ok 3073 Set Streaming SVE VL 4080
4804 22:16:27.366711 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4805 22:16:27.371560 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4806 22:16:27.372011 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4807 22:16:27.372218 # ok 3077 Set Streaming SVE VL 4096
4808 22:16:27.372437 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4809 22:16:27.372693 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4810 22:16:27.372961 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4811 22:16:27.373230 # ok 3081 Set Streaming SVE VL 4112
4812 22:16:27.373507 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4813 22:16:27.373785 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4814 22:16:27.374041 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4815 22:16:27.374203 # ok 3085 Set Streaming SVE VL 4128
4816 22:16:27.374325 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4817 22:16:27.374441 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4818 22:16:27.374555 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4819 22:16:27.374700 # ok 3089 Set Streaming SVE VL 4144
4820 22:16:27.374822 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4821 22:16:27.374938 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4822 22:16:27.375053 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4823 22:16:27.379554 # ok 3093 Set Streaming SVE VL 4160
4824 22:16:27.379868 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4825 22:16:27.379990 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4826 22:16:27.380095 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4827 22:16:27.380196 # ok 3097 Set Streaming SVE VL 4176
4828 22:16:27.380500 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4829 22:16:27.380606 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4830 22:16:27.380705 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4831 22:16:27.381031 # ok 3101 Set Streaming SVE VL 4192
4832 22:16:27.381138 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4833 22:16:27.381238 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4834 22:16:27.381337 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4835 22:16:27.381436 # ok 3105 Set Streaming SVE VL 4208
4836 22:16:27.381710 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4837 22:16:27.381831 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4838 22:16:27.381936 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4839 22:16:27.382117 # ok 3109 Set Streaming SVE VL 4224
4840 22:16:27.389405 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4841 22:16:27.389697 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4842 22:16:27.390051 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4843 22:16:27.390155 # ok 3113 Set Streaming SVE VL 4240
4844 22:16:27.390256 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4845 22:16:27.395935 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4846 22:16:27.396377 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4847 22:16:27.396567 # ok 3117 Set Streaming SVE VL 4256
4848 22:16:27.396786 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4849 22:16:27.396972 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4850 22:16:27.397124 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4851 22:16:27.397259 # ok 3121 Set Streaming SVE VL 4272
4852 22:16:27.397424 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4853 22:16:27.397570 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4854 22:16:27.397763 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4855 22:16:27.398285 # ok 3125 Set Streaming SVE VL 4288
4856 22:16:27.398427 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4857 22:16:27.398549 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4858 22:16:27.398696 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4859 22:16:27.398828 # ok 3129 Set Streaming SVE VL 4304
4860 22:16:27.398952 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4861 22:16:27.404581 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4862 22:16:27.405012 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4863 22:16:27.405209 # ok 3133 Set Streaming SVE VL 4320
4864 22:16:27.405360 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4865 22:16:27.405554 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4866 22:16:27.405733 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4867 22:16:27.405914 # ok 3137 Set Streaming SVE VL 4336
4868 22:16:27.406109 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4869 22:16:27.406270 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4870 22:16:27.406396 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4871 22:16:27.406513 # ok 3141 Set Streaming SVE VL 4352
4872 22:16:27.407697 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4873 22:16:27.408117 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4874 22:16:27.408224 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4875 22:16:27.408327 # ok 3145 Set Streaming SVE VL 4368
4876 22:16:27.408416 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4877 22:16:27.408514 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4878 22:16:27.408615 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4879 22:16:27.408713 # ok 3149 Set Streaming SVE VL 4384
4880 22:16:27.408811 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4881 22:16:27.409105 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4882 22:16:27.409209 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4883 22:16:27.409309 # ok 3153 Set Streaming SVE VL 4400
4884 22:16:27.409410 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4885 22:16:27.409695 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4886 22:16:27.409813 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4887 22:16:27.410120 # ok 3157 Set Streaming SVE VL 4416
4888 22:16:27.410237 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4889 22:16:27.416172 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4890 22:16:27.416477 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4891 22:16:27.416581 # ok 3161 Set Streaming SVE VL 4432
4892 22:16:27.416686 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4893 22:16:27.416787 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4894 22:16:27.417072 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4895 22:16:27.417164 # ok 3165 Set Streaming SVE VL 4448
4896 22:16:27.417264 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4897 22:16:27.417364 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4898 22:16:27.417464 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4899 22:16:27.417565 # ok 3169 Set Streaming SVE VL 4464
4900 22:16:27.417881 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4901 22:16:27.418072 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4902 22:16:27.424194 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4903 22:16:27.424414 # ok 3173 Set Streaming SVE VL 4480
4904 22:16:27.424826 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4905 22:16:27.424986 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4906 22:16:27.425108 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4907 22:16:27.432416 # ok 3177 Set Streaming SVE VL 4496
4908 22:16:27.432654 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4909 22:16:27.432896 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4910 22:16:27.433109 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4911 22:16:27.433342 # ok 3181 Set Streaming SVE VL 4512
4912 22:16:27.433559 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4913 22:16:27.433765 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4914 22:16:27.433996 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4915 22:16:27.434175 # ok 3185 Set Streaming SVE VL 4528
4916 22:16:27.434330 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4917 22:16:27.434507 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4918 22:16:27.434636 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4919 22:16:27.434758 # ok 3189 Set Streaming SVE VL 4544
4920 22:16:27.434874 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4921 22:16:27.440391 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4922 22:16:27.440632 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4923 22:16:27.440842 # ok 3193 Set Streaming SVE VL 4560
4924 22:16:27.441044 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4925 22:16:27.441216 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4926 22:16:27.441382 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4927 22:16:27.441580 # ok 3197 Set Streaming SVE VL 4576
4928 22:16:27.441765 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4929 22:16:27.441933 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4930 22:16:27.442334 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4931 22:16:27.442490 # ok 3201 Set Streaming SVE VL 4592
4932 22:16:27.442613 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4933 22:16:27.442730 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4934 22:16:27.448175 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4935 22:16:27.448757 # ok 3205 Set Streaming SVE VL 4608
4936 22:16:27.448927 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4937 22:16:27.449083 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4938 22:16:27.449246 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4939 22:16:27.449438 # ok 3209 Set Streaming SVE VL 4624
4940 22:16:27.449579 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4941 22:16:27.449768 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4942 22:16:27.449973 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4943 22:16:27.450148 # ok 3213 Set Streaming SVE VL 4640
4944 22:16:27.450311 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4945 22:16:27.450440 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4946 22:16:27.450560 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4947 22:16:27.450677 # ok 3217 Set Streaming SVE VL 4656
4948 22:16:27.451125 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4949 22:16:27.451548 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4950 22:16:27.451751 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4951 22:16:27.451957 # ok 3221 Set Streaming SVE VL 4672
4952 22:16:27.452148 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4953 22:16:27.452313 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4954 22:16:27.452490 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4955 22:16:27.452682 # ok 3225 Set Streaming SVE VL 4688
4956 22:16:27.452847 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4957 22:16:27.453007 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4958 22:16:27.453196 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4959 22:16:27.453359 # ok 3229 Set Streaming SVE VL 4704
4960 22:16:27.453519 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4961 22:16:27.453691 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4962 22:16:27.453884 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4963 22:16:27.454048 # ok 3233 Set Streaming SVE VL 4720
4964 22:16:27.454172 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4965 22:16:27.454287 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4966 22:16:27.454401 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4967 22:16:27.454514 # ok 3237 Set Streaming SVE VL 4736
4968 22:16:27.454650 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4969 22:16:27.468423 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4970 22:16:27.468945 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4971 22:16:27.469156 # ok 3241 Set Streaming SVE VL 4752
4972 22:16:27.469323 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4973 22:16:27.469521 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4974 22:16:27.469678 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4975 22:16:27.469812 # ok 3245 Set Streaming SVE VL 4768
4976 22:16:27.469990 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4977 22:16:27.470151 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4978 22:16:27.470301 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4979 22:16:27.470429 # ok 3249 Set Streaming SVE VL 4784
4980 22:16:27.470550 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4981 22:16:27.471751 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4982 22:16:27.472188 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4983 22:16:27.472385 # ok 3253 Set Streaming SVE VL 4800
4984 22:16:27.472638 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4985 22:16:27.472854 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4986 22:16:27.473084 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4987 22:16:27.473337 # ok 3257 Set Streaming SVE VL 4816
4988 22:16:27.473550 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4989 22:16:27.473745 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4990 22:16:27.473915 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4991 22:16:27.474091 # ok 3261 Set Streaming SVE VL 4832
4992 22:16:27.474312 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4993 22:16:27.474450 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4994 22:16:27.474566 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4995 22:16:27.474681 # ok 3265 Set Streaming SVE VL 4848
4996 22:16:27.474798 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4997 22:16:27.475447 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4998 22:16:27.475759 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4999 22:16:27.475879 # ok 3269 Set Streaming SVE VL 4864
5000 22:16:27.475969 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
5001 22:16:27.476068 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
5002 22:16:27.476360 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5003 22:16:27.476468 # ok 3273 Set Streaming SVE VL 4880
5004 22:16:27.476555 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5005 22:16:27.476653 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5006 22:16:27.476754 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5007 22:16:27.476839 # ok 3277 Set Streaming SVE VL 4896
5008 22:16:27.477134 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5009 22:16:27.477239 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5010 22:16:27.477341 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5011 22:16:27.477441 # ok 3281 Set Streaming SVE VL 4912
5012 22:16:27.477539 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5013 22:16:27.477834 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5014 22:16:27.477956 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5015 22:16:27.478044 # ok 3285 Set Streaming SVE VL 4928
5016 22:16:27.478140 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5017 22:16:27.478345 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5018 22:16:27.478467 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5019 22:16:27.478567 # ok 3289 Set Streaming SVE VL 4944
5020 22:16:27.478867 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5021 22:16:27.478986 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5022 22:16:27.488386 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5023 22:16:27.488490 # ok 3293 Set Streaming SVE VL 4960
5024 22:16:27.488775 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5025 22:16:27.488883 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5026 22:16:27.488982 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5027 22:16:27.489085 # ok 3297 Set Streaming SVE VL 4976
5028 22:16:27.489183 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5029 22:16:27.489284 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5030 22:16:27.489616 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5031 22:16:27.490139 # ok 3301 Set Streaming SVE VL 4992
5032 22:16:27.490304 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5033 22:16:27.490480 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5034 22:16:27.490627 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5035 22:16:27.491312 # ok 3305 Set Streaming SVE VL 5008
5036 22:16:27.491749 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5037 22:16:27.491961 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5038 22:16:27.492183 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5039 22:16:27.492380 # ok 3309 Set Streaming SVE VL 5024
5040 22:16:27.492609 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5041 22:16:27.492821 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5042 22:16:27.493058 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5043 22:16:27.493235 # ok 3313 Set Streaming SVE VL 5040
5044 22:16:27.493399 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5045 22:16:27.493561 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5046 22:16:27.493736 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5047 22:16:27.493897 # ok 3317 Set Streaming SVE VL 5056
5048 22:16:27.494147 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5049 22:16:27.494379 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5050 22:16:27.494562 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5051 22:16:27.494695 # ok 3321 Set Streaming SVE VL 5072
5052 22:16:27.494816 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5053 22:16:27.494933 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5054 22:16:27.495077 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5055 22:16:27.495204 # ok 3325 Set Streaming SVE VL 5088
5056 22:16:27.495323 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5057 22:16:27.501305 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5058 22:16:27.501559 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5059 22:16:27.501757 # ok 3329 Set Streaming SVE VL 5104
5060 22:16:27.501976 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5061 22:16:27.502167 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5062 22:16:27.502299 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5063 22:16:27.502444 # ok 3333 Set Streaming SVE VL 5120
5064 22:16:27.508140 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5065 22:16:27.508549 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5066 22:16:27.508656 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5067 22:16:27.508742 # ok 3337 Set Streaming SVE VL 5136
5068 22:16:27.508840 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5069 22:16:27.508938 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5070 22:16:27.509160 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5071 22:16:27.509266 # ok 3341 Set Streaming SVE VL 5152
5072 22:16:27.509366 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5073 22:16:27.509468 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5074 22:16:27.509765 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5075 22:16:27.509871 # ok 3345 Set Streaming SVE VL 5168
5076 22:16:27.509974 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5077 22:16:27.510284 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5078 22:16:27.515522 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5079 22:16:27.515930 # ok 3349 Set Streaming SVE VL 5184
5080 22:16:27.516034 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5081 22:16:27.516121 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5082 22:16:27.516229 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5083 22:16:27.516316 # ok 3353 Set Streaming SVE VL 5200
5084 22:16:27.516411 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5085 22:16:27.516508 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5086 22:16:27.516802 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5087 22:16:27.516914 # ok 3357 Set Streaming SVE VL 5216
5088 22:16:27.517012 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5089 22:16:27.517111 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5090 22:16:27.517208 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5091 22:16:27.517306 # ok 3361 Set Streaming SVE VL 5232
5092 22:16:27.517600 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5093 22:16:27.517726 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5094 22:16:27.518025 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5095 22:16:27.518128 # ok 3365 Set Streaming SVE VL 5248
5096 22:16:27.524279 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5097 22:16:27.524567 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5098 22:16:27.524684 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5099 22:16:27.524784 # ok 3369 Set Streaming SVE VL 5264
5100 22:16:27.525141 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5101 22:16:27.525385 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5102 22:16:27.525639 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5103 22:16:27.525826 # ok 3373 Set Streaming SVE VL 5280
5104 22:16:27.526178 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5105 22:16:27.526389 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5106 22:16:27.526536 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5107 22:16:27.526685 # ok 3377 Set Streaming SVE VL 5296
5108 22:16:27.532590 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5109 22:16:27.533057 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5110 22:16:27.533316 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5111 22:16:27.533550 # ok 3381 Set Streaming SVE VL 5312
5112 22:16:27.533727 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5113 22:16:27.533891 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5114 22:16:27.534091 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5115 22:16:27.534302 # ok 3385 Set Streaming SVE VL 5328
5116 22:16:27.534447 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5117 22:16:27.534593 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5118 22:16:27.540089 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5119 22:16:27.540503 # ok 3389 Set Streaming SVE VL 5344
5120 22:16:27.540710 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5121 22:16:27.540917 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5122 22:16:27.541109 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5123 22:16:27.541273 # ok 3393 Set Streaming SVE VL 5360
5124 22:16:27.541428 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5125 22:16:27.541614 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5126 22:16:27.541784 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5127 22:16:27.541949 # ok 3397 Set Streaming SVE VL 5376
5128 22:16:27.542100 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5129 22:16:27.542260 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5130 22:16:27.542422 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5131 22:16:27.542551 # ok 3401 Set Streaming SVE VL 5392
5132 22:16:27.542669 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5133 22:16:27.543038 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5134 22:16:27.543340 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5135 22:16:27.543444 # ok 3405 Set Streaming SVE VL 5408
5136 22:16:27.543544 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5137 22:16:27.543645 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5138 22:16:27.543744 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5139 22:16:27.543845 # ok 3409 Set Streaming SVE VL 5424
5140 22:16:27.544134 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5141 22:16:27.544237 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5142 22:16:27.544538 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5143 22:16:27.544628 # ok 3413 Set Streaming SVE VL 5440
5144 22:16:27.544726 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5145 22:16:27.544844 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5146 22:16:27.545149 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5147 22:16:27.545238 # ok 3417 Set Streaming SVE VL 5456
5148 22:16:27.545335 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5149 22:16:27.545433 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5150 22:16:27.545694 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5151 22:16:27.546027 # ok 3421 Set Streaming SVE VL 5472
5152 22:16:27.546130 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5153 22:16:27.546215 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5154 22:16:27.556260 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5155 22:16:27.556562 # ok 3425 Set Streaming SVE VL 5488
5156 22:16:27.556708 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5157 22:16:27.556822 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5158 22:16:27.557140 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5159 22:16:27.557281 # ok 3429 Set Streaming SVE VL 5504
5160 22:16:27.557373 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5161 22:16:27.557473 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5162 22:16:27.557561 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5163 22:16:27.557666 # ok 3433 Set Streaming SVE VL 5520
5164 22:16:27.557752 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5165 22:16:27.557849 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5166 22:16:27.557966 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5167 22:16:27.558066 # ok 3437 Set Streaming SVE VL 5536
5168 22:16:27.559282 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5169 22:16:27.559555 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5170 22:16:27.559673 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5171 22:16:27.559766 # ok 3441 Set Streaming SVE VL 5552
5172 22:16:27.560042 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5173 22:16:27.560148 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5174 22:16:27.560270 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5175 22:16:27.560546 # ok 3445 Set Streaming SVE VL 5568
5176 22:16:27.560633 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5177 22:16:27.560751 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5178 22:16:27.561020 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5179 22:16:27.561127 # ok 3449 Set Streaming SVE VL 5584
5180 22:16:27.561239 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5181 22:16:27.561331 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5182 22:16:27.561595 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5183 22:16:27.561678 # ok 3453 Set Streaming SVE VL 5600
5184 22:16:27.561800 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5185 22:16:27.561928 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5186 22:16:27.562057 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5187 22:16:27.567803 # ok 3457 Set Streaming SVE VL 5616
5188 22:16:27.568083 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5189 22:16:27.568206 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5190 22:16:27.568308 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5191 22:16:27.568409 # ok 3461 Set Streaming SVE VL 5632
5192 22:16:27.568809 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5193 22:16:27.568921 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5194 22:16:27.569022 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5195 22:16:27.569126 # ok 3465 Set Streaming SVE VL 5648
5196 22:16:27.569225 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5197 22:16:27.569537 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5198 22:16:27.569642 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5199 22:16:27.569755 # ok 3469 Set Streaming SVE VL 5664
5200 22:16:27.569841 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5201 22:16:27.570089 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5202 22:16:27.575774 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5203 22:16:27.576047 # ok 3473 Set Streaming SVE VL 5680
5204 22:16:27.576170 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5205 22:16:27.576299 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5206 22:16:27.577936 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5207 22:16:27.578036 # ok 3477 Set Streaming SVE VL 5696
5208 22:16:27.587900 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5209 22:16:27.588202 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5210 22:16:27.588307 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5211 22:16:27.588408 # ok 3481 Set Streaming SVE VL 5712
5212 22:16:27.588510 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5213 22:16:27.588810 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5214 22:16:27.588919 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5215 22:16:27.589038 # ok 3485 Set Streaming SVE VL 5728
5216 22:16:27.589149 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5217 22:16:27.589432 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5218 22:16:27.589694 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5219 22:16:27.589801 # ok 3489 Set Streaming SVE VL 5744
5220 22:16:27.589915 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5221 22:16:27.590050 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5222 22:16:27.590178 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5223 22:16:27.590275 # ok 3493 Set Streaming SVE VL 5760
5224 22:16:27.593441 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5225 22:16:27.593797 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5226 22:16:27.593917 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5227 22:16:27.594020 # ok 3497 Set Streaming SVE VL 5776
5228 22:16:27.594120 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5229 22:16:27.604369 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5230 22:16:27.604684 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5231 22:16:27.604780 # ok 3501 Set Streaming SVE VL 5792
5232 22:16:27.604870 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5233 22:16:27.604963 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5234 22:16:27.605132 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5235 22:16:27.605318 # ok 3505 Set Streaming SVE VL 5808
5236 22:16:27.605492 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5237 22:16:27.605665 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5238 22:16:27.606147 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5239 22:16:27.606312 # ok 3509 Set Streaming SVE VL 5824
5240 22:16:27.606486 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5241 22:16:27.606631 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5242 22:16:27.612915 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5243 22:16:27.613233 # ok 3513 Set Streaming SVE VL 5840
5244 22:16:27.613353 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5245 22:16:27.613659 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5246 22:16:27.613755 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5247 22:16:27.613855 # ok 3517 Set Streaming SVE VL 5856
5248 22:16:27.613956 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5249 22:16:27.615260 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5250 22:16:27.615569 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5251 22:16:27.615675 # ok 3521 Set Streaming SVE VL 5872
5252 22:16:27.615774 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5253 22:16:27.615876 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5254 22:16:27.615979 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5255 22:16:27.616078 # ok 3525 Set Streaming SVE VL 5888
5256 22:16:27.616176 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5257 22:16:27.616476 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5258 22:16:27.616580 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5259 22:16:27.616680 # ok 3529 Set Streaming SVE VL 5904
5260 22:16:27.616970 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5261 22:16:27.617078 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5262 22:16:27.617178 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5263 22:16:27.617271 # ok 3533 Set Streaming SVE VL 5920
5264 22:16:27.617370 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5265 22:16:27.617560 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5266 22:16:27.617687 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5267 22:16:27.617788 # ok 3537 Set Streaming SVE VL 5936
5268 22:16:27.617886 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5269 22:16:27.624212 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5270 22:16:27.624569 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5271 22:16:27.624676 # ok 3541 Set Streaming SVE VL 5952
5272 22:16:27.624779 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5273 22:16:27.624879 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5274 22:16:27.624977 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5275 22:16:27.625080 # ok 3545 Set Streaming SVE VL 5968
5276 22:16:27.625378 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5277 22:16:27.625497 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5278 22:16:27.625584 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5279 22:16:27.625705 # ok 3549 Set Streaming SVE VL 5984
5280 22:16:27.625804 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5281 22:16:27.626112 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5282 22:16:27.635156 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5283 22:16:27.635619 # ok 3553 Set Streaming SVE VL 6000
5284 22:16:27.635820 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5285 22:16:27.635990 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5286 22:16:27.636182 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5287 22:16:27.636342 # ok 3557 Set Streaming SVE VL 6016
5288 22:16:27.636496 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5289 22:16:27.636662 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5290 22:16:27.636867 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5291 22:16:27.637039 # ok 3561 Set Streaming SVE VL 6032
5292 22:16:27.637243 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5293 22:16:27.637439 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5294 22:16:27.637605 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5295 22:16:27.637811 # ok 3565 Set Streaming SVE VL 6048
5296 22:16:27.637990 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5297 22:16:27.638163 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5298 22:16:27.638287 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5299 22:16:27.638403 # ok 3569 Set Streaming SVE VL 6064
5300 22:16:27.638518 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5301 22:16:27.638631 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5302 22:16:27.638770 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5303 22:16:27.648314 # ok 3573 Set Streaming SVE VL 6080
5304 22:16:27.648914 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5305 22:16:27.649110 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5306 22:16:27.649297 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5307 22:16:27.649482 # ok 3577 Set Streaming SVE VL 6096
5308 22:16:27.649715 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5309 22:16:27.649920 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5310 22:16:27.650068 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5311 22:16:27.650203 # ok 3581 Set Streaming SVE VL 6112
5312 22:16:27.650327 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5313 22:16:27.650445 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5314 22:16:27.650590 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5315 22:16:27.650717 # ok 3585 Set Streaming SVE VL 6128
5316 22:16:27.661997 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5317 22:16:27.662963 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5318 22:16:27.663462 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5319 22:16:27.663627 # ok 3589 Set Streaming SVE VL 6144
5320 22:16:27.663756 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5321 22:16:27.664141 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5322 22:16:27.664340 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5323 22:16:27.664510 # ok 3593 Set Streaming SVE VL 6160
5324 22:16:27.664644 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5325 22:16:27.664772 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5326 22:16:27.664936 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5327 22:16:27.665078 # ok 3597 Set Streaming SVE VL 6176
5328 22:16:27.665220 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5329 22:16:27.665359 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5330 22:16:27.665487 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5331 22:16:27.665617 # ok 3601 Set Streaming SVE VL 6192
5332 22:16:27.665863 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5333 22:16:27.666063 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5334 22:16:27.666248 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5335 22:16:27.666423 # ok 3605 Set Streaming SVE VL 6208
5336 22:16:27.666571 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5337 22:16:27.666716 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5338 22:16:27.666896 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5339 22:16:27.667039 # ok 3609 Set Streaming SVE VL 6224
5340 22:16:27.684414 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5341 22:16:27.684964 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5342 22:16:27.685160 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5343 22:16:27.685322 # ok 3613 Set Streaming SVE VL 6240
5344 22:16:27.685486 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5345 22:16:27.685684 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5346 22:16:27.685840 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5347 22:16:27.685979 # ok 3617 Set Streaming SVE VL 6256
5348 22:16:27.686131 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5349 22:16:27.686346 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5350 22:16:27.686488 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5351 22:16:27.686632 # ok 3621 Set Streaming SVE VL 6272
5352 22:16:27.686775 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5353 22:16:27.700198 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5354 22:16:27.700727 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5355 22:16:27.700885 # ok 3625 Set Streaming SVE VL 6288
5356 22:16:27.702014 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5357 22:16:27.702182 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5358 22:16:27.702331 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5359 22:16:27.716561 # ok 3629 Set Streaming SVE VL 6304
5360 22:16:27.716862 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5361 22:16:27.717028 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5362 22:16:27.717170 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5363 22:16:27.717563 # ok 3633 Set Streaming SVE VL 6320
5364 22:16:27.717743 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5365 22:16:27.717887 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5366 22:16:27.718025 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5367 22:16:27.718149 # ok 3637 Set Streaming SVE VL 6336
5368 22:16:27.718495 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5369 22:16:27.718649 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5370 22:16:27.718770 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5371 22:16:27.718888 # ok 3641 Set Streaming SVE VL 6352
5372 22:16:27.732061 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5373 22:16:27.732587 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5374 22:16:27.732700 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5375 22:16:27.732999 # ok 3645 Set Streaming SVE VL 6368
5376 22:16:27.733114 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5377 22:16:27.733426 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5378 22:16:27.733551 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5379 22:16:27.733669 # ok 3649 Set Streaming SVE VL 6384
5380 22:16:27.734009 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5381 22:16:27.747698 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5382 22:16:27.748297 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5383 22:16:27.748496 # ok 3653 Set Streaming SVE VL 6400
5384 22:16:27.748665 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5385 22:16:27.748835 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5386 22:16:27.749033 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5387 22:16:27.749183 # ok 3657 Set Streaming SVE VL 6416
5388 22:16:27.749348 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5389 22:16:27.749496 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5390 22:16:27.749660 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5391 22:16:27.749821 # ok 3661 Set Streaming SVE VL 6432
5392 22:16:27.749987 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5393 22:16:27.750165 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5394 22:16:27.750291 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5395 22:16:27.750409 # ok 3665 Set Streaming SVE VL 6448
5396 22:16:27.750526 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5397 22:16:27.750641 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5398 22:16:27.750756 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5399 22:16:27.750873 # ok 3669 Set Streaming SVE VL 6464
5400 22:16:27.764738 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5401 22:16:27.765325 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5402 22:16:27.765431 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5403 22:16:27.765518 # ok 3673 Set Streaming SVE VL 6480
5404 22:16:27.765600 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5405 22:16:27.765684 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5406 22:16:27.765777 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5407 22:16:27.765857 # ok 3677 Set Streaming SVE VL 6496
5408 22:16:27.765970 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5409 22:16:27.766062 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5410 22:16:27.766174 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5411 22:16:27.780314 # ok 3681 Set Streaming SVE VL 6512
5412 22:16:27.780791 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5413 22:16:27.780900 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5414 22:16:27.780983 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5415 22:16:27.781265 # ok 3685 Set Streaming SVE VL 6528
5416 22:16:27.781380 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5417 22:16:27.781486 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5418 22:16:27.781593 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5419 22:16:27.781688 # ok 3689 Set Streaming SVE VL 6544
5420 22:16:27.781786 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5421 22:16:27.781868 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5422 22:16:27.781984 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5423 22:16:27.782091 # ok 3693 Set Streaming SVE VL 6560
5424 22:16:27.795975 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5425 22:16:27.796350 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5426 22:16:27.796457 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5427 22:16:27.796561 # ok 3697 Set Streaming SVE VL 6576
5428 22:16:27.796649 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5429 22:16:27.796749 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5430 22:16:27.797036 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5431 22:16:27.797151 # ok 3701 Set Streaming SVE VL 6592
5432 22:16:27.797276 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5433 22:16:27.797384 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5434 22:16:27.797685 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5435 22:16:27.797778 # ok 3705 Set Streaming SVE VL 6608
5436 22:16:27.797883 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5437 22:16:27.798169 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5438 22:16:27.809516 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5439 22:16:27.809786 # ok 3709 Set Streaming SVE VL 6624
5440 22:16:27.809909 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5441 22:16:27.810007 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5442 22:16:27.810109 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5443 22:16:27.810409 # ok 3713 Set Streaming SVE VL 6640
5444 22:16:27.816242 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5445 22:16:27.816538 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5446 22:16:27.816647 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5447 22:16:27.816748 # ok 3717 Set Streaming SVE VL 6656
5448 22:16:27.816872 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5449 22:16:27.817180 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5450 22:16:27.817400 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5451 22:16:27.817583 # ok 3721 Set Streaming SVE VL 6672
5452 22:16:27.817780 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5453 22:16:27.817919 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5454 22:16:27.818069 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5455 22:16:27.818198 # ok 3725 Set Streaming SVE VL 6688
5456 22:16:27.826010 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5457 22:16:27.832186 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5458 22:16:27.832846 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5459 22:16:27.833050 # ok 3729 Set Streaming SVE VL 6704
5460 22:16:27.833220 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5461 22:16:27.833389 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5462 22:16:27.833585 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5463 22:16:27.833753 # ok 3733 Set Streaming SVE VL 6720
5464 22:16:27.833912 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5465 22:16:27.834069 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5466 22:16:27.834247 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5467 22:16:27.834371 # ok 3737 Set Streaming SVE VL 6736
5468 22:16:27.834487 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5469 22:16:27.834598 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5470 22:16:27.835811 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5471 22:16:27.836255 # ok 3741 Set Streaming SVE VL 6752
5472 22:16:27.836449 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5473 22:16:27.836615 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5474 22:16:27.836811 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5475 22:16:27.837001 # ok 3745 Set Streaming SVE VL 6768
5476 22:16:27.837161 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5477 22:16:27.837326 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5478 22:16:27.837524 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5479 22:16:27.837689 # ok 3749 Set Streaming SVE VL 6784
5480 22:16:27.837850 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5481 22:16:27.838017 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5482 22:16:27.838194 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5483 22:16:27.838315 # ok 3753 Set Streaming SVE VL 6800
5484 22:16:27.838429 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5485 22:16:27.838543 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5486 22:16:27.848787 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5487 22:16:27.849341 # ok 3757 Set Streaming SVE VL 6816
5488 22:16:27.849533 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5489 22:16:27.849720 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5490 22:16:27.849887 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5491 22:16:27.850080 # ok 3761 Set Streaming SVE VL 6832
5492 22:16:27.850223 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5493 22:16:27.850343 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5494 22:16:27.850463 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5495 22:16:27.850582 # ok 3765 Set Streaming SVE VL 6848
5496 22:16:27.856194 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5497 22:16:27.856718 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5498 22:16:27.856919 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5499 22:16:27.857088 # ok 3769 Set Streaming SVE VL 6864
5500 22:16:27.857251 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5501 22:16:27.857423 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5502 22:16:27.857548 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5503 22:16:27.857698 # ok 3773 Set Streaming SVE VL 6880
5504 22:16:27.857911 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5505 22:16:27.862151 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5506 22:16:27.872239 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5507 22:16:27.872848 # ok 3777 Set Streaming SVE VL 6896
5508 22:16:27.873050 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5509 22:16:27.873198 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5510 22:16:27.873356 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5511 22:16:27.873567 # ok 3781 Set Streaming SVE VL 6912
5512 22:16:27.873751 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5513 22:16:27.873912 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5514 22:16:27.874094 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5515 22:16:27.874246 # ok 3785 Set Streaming SVE VL 6928
5516 22:16:27.874364 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5517 22:16:27.874505 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5518 22:16:27.874630 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5519 22:16:27.874745 # ok 3789 Set Streaming SVE VL 6944
5520 22:16:27.878114 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5521 22:16:27.888285 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5522 22:16:27.888653 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5523 22:16:27.888807 # ok 3793 Set Streaming SVE VL 6960
5524 22:16:27.888974 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5525 22:16:27.889145 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5526 22:16:27.889294 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5527 22:16:27.889465 # ok 3797 Set Streaming SVE VL 6976
5528 22:16:27.889618 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5529 22:16:27.889801 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5530 22:16:27.889943 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5531 22:16:27.890102 # ok 3801 Set Streaming SVE VL 6992
5532 22:16:27.890225 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5533 22:16:27.890366 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5534 22:16:27.890486 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5535 22:16:27.891469 # ok 3805 Set Streaming SVE VL 7008
5536 22:16:27.891981 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5537 22:16:27.892387 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5538 22:16:27.892618 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5539 22:16:27.892789 # ok 3809 Set Streaming SVE VL 7024
5540 22:16:27.892955 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5541 22:16:27.893119 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5542 22:16:27.893278 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5543 22:16:27.893474 # ok 3813 Set Streaming SVE VL 7040
5544 22:16:27.893634 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5545 22:16:27.893812 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5546 22:16:27.893971 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5547 22:16:27.894117 # ok 3817 Set Streaming SVE VL 7056
5548 22:16:27.894241 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5549 22:16:27.894382 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5550 22:16:27.894503 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5551 22:16:27.894620 # ok 3821 Set Streaming SVE VL 7072
5552 22:16:27.894734 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5553 22:16:27.900577 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5554 22:16:27.901151 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5555 22:16:27.901368 # ok 3825 Set Streaming SVE VL 7088
5556 22:16:27.901572 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5557 22:16:27.901785 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5558 22:16:27.902006 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5559 22:16:27.902144 # ok 3829 Set Streaming SVE VL 7104
5560 22:16:27.902264 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5561 22:16:27.902380 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5562 22:16:27.902495 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5563 22:16:27.902610 # ok 3833 Set Streaming SVE VL 7120
5564 22:16:27.903339 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5565 22:16:27.903814 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5566 22:16:27.904008 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5567 22:16:27.904169 # ok 3837 Set Streaming SVE VL 7136
5568 22:16:27.904329 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5569 22:16:27.904740 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5570 22:16:27.904940 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5571 22:16:27.905155 # ok 3841 Set Streaming SVE VL 7152
5572 22:16:27.905365 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5573 22:16:27.905537 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5574 22:16:27.905719 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5575 22:16:27.905920 # ok 3845 Set Streaming SVE VL 7168
5576 22:16:27.906097 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5577 22:16:27.906238 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5578 22:16:27.906355 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5579 22:16:27.906470 # ok 3849 Set Streaming SVE VL 7184
5580 22:16:27.906584 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5581 22:16:27.906698 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5582 22:16:27.906838 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5583 22:16:27.906956 # ok 3853 Set Streaming SVE VL 7200
5584 22:16:27.915918 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5585 22:16:27.916517 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5586 22:16:27.916712 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5587 22:16:27.916941 # ok 3857 Set Streaming SVE VL 7216
5588 22:16:27.917135 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5589 22:16:27.917317 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5590 22:16:27.917527 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5591 22:16:27.917729 # ok 3861 Set Streaming SVE VL 7232
5592 22:16:27.917894 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5593 22:16:27.918050 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5594 22:16:27.918207 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5595 22:16:27.918362 # ok 3865 Set Streaming SVE VL 7248
5596 22:16:27.918517 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5597 22:16:27.918705 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5598 22:16:27.918865 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5599 22:16:27.919021 # ok 3869 Set Streaming SVE VL 7264
5600 22:16:27.919174 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5601 22:16:27.924290 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5602 22:16:27.924833 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5603 22:16:27.925006 # ok 3873 Set Streaming SVE VL 7280
5604 22:16:27.925166 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5605 22:16:27.925324 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5606 22:16:27.925511 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5607 22:16:27.925683 # ok 3877 Set Streaming SVE VL 7296
5608 22:16:27.925841 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5609 22:16:27.925997 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5610 22:16:27.926154 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5611 22:16:27.926311 # ok 3881 Set Streaming SVE VL 7312
5612 22:16:27.926495 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5613 22:16:27.926656 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5614 22:16:27.926815 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5615 22:16:27.932351 # ok 3885 Set Streaming SVE VL 7328
5616 22:16:27.932953 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5617 22:16:27.933184 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5618 22:16:27.933335 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5619 22:16:27.933527 # ok 3889 Set Streaming SVE VL 7344
5620 22:16:27.933725 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5621 22:16:27.933887 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5622 22:16:27.934080 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5623 22:16:27.934220 # ok 3893 Set Streaming SVE VL 7360
5624 22:16:27.934337 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5625 22:16:27.934475 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5626 22:16:27.934593 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5627 22:16:27.944244 # ok 3897 Set Streaming SVE VL 7376
5628 22:16:27.944474 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5629 22:16:27.944582 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5630 22:16:27.944682 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5631 22:16:27.944777 # ok 3901 Set Streaming SVE VL 7392
5632 22:16:27.944846 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5633 22:16:27.944922 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5634 22:16:27.945182 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5635 22:16:27.945253 # ok 3905 Set Streaming SVE VL 7408
5636 22:16:27.945330 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5637 22:16:27.945597 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5638 22:16:27.945696 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5639 22:16:27.945781 # ok 3909 Set Streaming SVE VL 7424
5640 22:16:27.946038 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5641 22:16:27.948207 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5642 22:16:27.948504 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5643 22:16:27.948606 # ok 3913 Set Streaming SVE VL 7440
5644 22:16:27.948701 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5645 22:16:27.948968 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5646 22:16:27.949050 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5647 22:16:27.949144 # ok 3917 Set Streaming SVE VL 7456
5648 22:16:27.949411 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5649 22:16:27.949493 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5650 22:16:27.949750 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5651 22:16:27.949822 # ok 3921 Set Streaming SVE VL 7472
5652 22:16:27.950075 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5653 22:16:27.951280 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5654 22:16:27.951537 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5655 22:16:27.953017 # ok 3925 Set Streaming SVE VL 7488
5656 22:16:27.953274 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5657 22:16:27.953345 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5658 22:16:27.953611 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5659 22:16:27.953692 # ok 3929 Set Streaming SVE VL 7504
5660 22:16:27.953759 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5661 22:16:27.954005 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5662 22:16:27.954075 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5663 22:16:27.954153 # ok 3933 Set Streaming SVE VL 7520
5664 22:16:27.954232 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5665 22:16:27.964291 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5666 22:16:27.964520 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5667 22:16:27.964631 # ok 3937 Set Streaming SVE VL 7536
5668 22:16:27.964724 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5669 22:16:27.964984 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5670 22:16:27.965059 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5671 22:16:27.965138 # ok 3941 Set Streaming SVE VL 7552
5672 22:16:27.965402 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5673 22:16:27.965492 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5674 22:16:27.965571 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5675 22:16:27.965849 # ok 3945 Set Streaming SVE VL 7568
5676 22:16:27.965922 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5677 22:16:27.966167 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5678 22:16:27.972302 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5679 22:16:27.972721 # ok 3949 Set Streaming SVE VL 7584
5680 22:16:27.972820 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5681 22:16:27.972889 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5682 22:16:27.972971 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5683 22:16:27.973050 # ok 3953 Set Streaming SVE VL 7600
5684 22:16:27.973146 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5685 22:16:27.973241 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5686 22:16:27.973525 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5687 22:16:27.973609 # ok 3957 Set Streaming SVE VL 7616
5688 22:16:27.973696 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5689 22:16:27.973774 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5690 22:16:27.974039 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5691 22:16:27.974109 # ok 3961 Set Streaming SVE VL 7632
5692 22:16:27.975145 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5693 22:16:27.975420 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5694 22:16:27.975670 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5695 22:16:27.975861 # ok 3965 Set Streaming SVE VL 7648
5696 22:16:27.976069 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5697 22:16:27.976248 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5698 22:16:27.976453 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5699 22:16:27.976636 # ok 3969 Set Streaming SVE VL 7664
5700 22:16:27.976811 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5701 22:16:27.977016 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5702 22:16:27.977194 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5703 22:16:27.977369 # ok 3973 Set Streaming SVE VL 7680
5704 22:16:27.977543 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5705 22:16:27.977768 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5706 22:16:27.977938 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5707 22:16:27.978092 # ok 3977 Set Streaming SVE VL 7696
5708 22:16:27.978246 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5709 22:16:27.978401 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5710 22:16:27.978581 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5711 22:16:27.978732 # ok 3981 Set Streaming SVE VL 7712
5712 22:16:27.992828 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5713 22:16:27.993400 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5714 22:16:27.993597 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5715 22:16:27.993793 # ok 3985 Set Streaming SVE VL 7728
5716 22:16:27.993933 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5717 22:16:27.994028 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5718 22:16:27.994113 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5719 22:16:27.994186 # ok 3989 Set Streaming SVE VL 7744
5720 22:16:27.994262 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5721 22:16:27.994324 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5722 22:16:27.997117 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5723 22:16:27.997409 # ok 3993 Set Streaming SVE VL 7760
5724 22:16:27.997543 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5725 22:16:27.997718 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5726 22:16:27.997822 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5727 22:16:27.997971 # ok 3997 Set Streaming SVE VL 7776
5728 22:16:27.998062 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5729 22:16:27.999599 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5730 22:16:27.999967 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5731 22:16:28.000102 # ok 4001 Set Streaming SVE VL 7792
5732 22:16:28.000262 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5733 22:16:28.000382 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5734 22:16:28.000494 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5735 22:16:28.000616 # ok 4005 Set Streaming SVE VL 7808
5736 22:16:28.000936 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5737 22:16:28.001039 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5738 22:16:28.001331 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5739 22:16:28.001419 # ok 4009 Set Streaming SVE VL 7824
5740 22:16:28.001543 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5741 22:16:28.001625 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5742 22:16:28.001717 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5743 22:16:28.001792 # ok 4013 Set Streaming SVE VL 7840
5744 22:16:28.001869 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5745 22:16:28.005117 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5746 22:16:28.005526 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5747 22:16:28.005661 # ok 4017 Set Streaming SVE VL 7856
5748 22:16:28.005751 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5749 22:16:28.005846 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5750 22:16:28.005938 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5751 22:16:28.006018 # ok 4021 Set Streaming SVE VL 7872
5752 22:16:28.017279 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5753 22:16:28.017888 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5754 22:16:28.018070 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5755 22:16:28.018206 # ok 4025 Set Streaming SVE VL 7888
5756 22:16:28.018356 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5757 22:16:28.018480 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5758 22:16:28.024958 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5759 22:16:28.025428 # ok 4029 Set Streaming SVE VL 7904
5760 22:16:28.025539 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5761 22:16:28.025625 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5762 22:16:28.025733 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5763 22:16:28.025820 # ok 4033 Set Streaming SVE VL 7920
5764 22:16:28.025931 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5765 22:16:28.026204 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5766 22:16:28.033852 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5767 22:16:28.034218 # ok 4037 Set Streaming SVE VL 7936
5768 22:16:28.035213 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5769 22:16:28.035508 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5770 22:16:28.035602 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5771 22:16:28.035701 # ok 4041 Set Streaming SVE VL 7952
5772 22:16:28.035836 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5773 22:16:28.036204 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5774 22:16:28.036297 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5775 22:16:28.036574 # ok 4045 Set Streaming SVE VL 7968
5776 22:16:28.036676 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5777 22:16:28.036762 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5778 22:16:28.036860 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5779 22:16:28.036960 # ok 4049 Set Streaming SVE VL 7984
5780 22:16:28.037059 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5781 22:16:28.037166 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5782 22:16:28.037465 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5783 22:16:28.037581 # ok 4053 Set Streaming SVE VL 8000
5784 22:16:28.037689 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5785 22:16:28.037988 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5786 22:16:28.038104 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5787 22:16:28.043754 # ok 4057 Set Streaming SVE VL 8016
5788 22:16:28.044077 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5789 22:16:28.044193 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5790 22:16:28.044294 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5791 22:16:28.044579 # ok 4061 Set Streaming SVE VL 8032
5792 22:16:28.044669 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5793 22:16:28.044766 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5794 22:16:28.045056 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5795 22:16:28.045157 # ok 4065 Set Streaming SVE VL 8048
5796 22:16:28.045258 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5797 22:16:28.045554 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5798 22:16:28.045655 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5799 22:16:28.045756 # ok 4069 Set Streaming SVE VL 8064
5800 22:16:28.045840 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5801 22:16:28.045942 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5802 22:16:28.046916 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5803 22:16:28.047216 # ok 4073 Set Streaming SVE VL 8080
5804 22:16:28.047317 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5805 22:16:28.048840 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5806 22:16:28.048958 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5807 22:16:28.049253 # ok 4077 Set Streaming SVE VL 8096
5808 22:16:28.049354 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5809 22:16:28.049454 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5810 22:16:28.049553 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5811 22:16:28.049638 # ok 4081 Set Streaming SVE VL 8112
5812 22:16:28.049742 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5813 22:16:28.050038 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5814 22:16:28.050153 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5815 22:16:28.059284 # ok 4085 Set Streaming SVE VL 8128
5816 22:16:28.059505 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5817 22:16:28.059682 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5818 22:16:28.059883 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5819 22:16:28.060093 # ok 4089 Set Streaming SVE VL 8144
5820 22:16:28.060313 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5821 22:16:28.060493 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5822 22:16:28.060665 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5823 22:16:28.060836 # ok 4093 Set Streaming SVE VL 8160
5824 22:16:28.061033 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5825 22:16:28.061358 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5826 22:16:28.061572 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5827 22:16:28.061775 # ok 4097 Set Streaming SVE VL 8176
5828 22:16:28.062078 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5829 22:16:28.062281 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5830 22:16:28.062411 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5831 22:16:28.062529 # ok 4101 Set Streaming SVE VL 8192
5832 22:16:28.062647 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5833 22:16:28.062766 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5834 22:16:28.062885 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5835 22:16:28.063044 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5836 22:16:28.067156 ok 30 selftests: arm64: sve-ptrace
5837 22:16:28.067567 # selftests: arm64: sve-probe-vls
5838 22:16:28.229539 # TAP version 13
5839 22:16:28.229760 # 1..2
5840 22:16:28.230147 # ok 1 Enumerated 16 vector lengths
5841 22:16:28.230311 # ok 2 All vector lengths valid
5842 22:16:28.230441 # # 16
5843 22:16:28.230565 # # 32
5844 22:16:28.230686 # # 48
5845 22:16:28.230811 # # 64
5846 22:16:28.230932 # # 80
5847 22:16:28.231055 # # 96
5848 22:16:28.231178 # # 112
5849 22:16:28.231304 # # 128
5850 22:16:28.231427 # # 144
5851 22:16:28.231550 # # 160
5852 22:16:28.231671 # # 176
5853 22:16:28.231795 # # 192
5854 22:16:28.231923 # # 208
5855 22:16:28.232046 # # 224
5856 22:16:28.234573 # # 240
5857 22:16:28.234718 # # 256
5858 22:16:28.235039 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5859 22:16:28.254798 ok 31 selftests: arm64: sve-probe-vls
5860 22:16:28.376105 # selftests: arm64: vec-syscfg
5861 22:16:29.281101 # TAP version 13
5862 22:16:29.281535 # 1..20
5863 22:16:29.281651 # ok 1 SVE default vector length 64
5864 22:16:29.281742 # ok 2 SVE minimum vector length 16
5865 22:16:29.281827 # ok 3 SVE maximum vector length 256
5866 22:16:29.281911 # ok 4 SVE current VL is 64
5867 22:16:29.281994 # ok 5 SVE set VL 64 and have VL 64
5868 22:16:29.282095 # ok 6 SVE prctl() set min/max
5869 22:16:29.282181 # ok 7 SVE vector length used default
5870 22:16:29.282274 # ok 8 SVE vector length was inherited
5871 22:16:29.282358 # ok 9 SVE vector length set on exec
5872 22:16:29.282442 # ok 10 SVE prctl() set all VLs, 0 errors
5873 22:16:29.288574 # ok 11 SME default vector length 32
5874 22:16:29.288917 # ok 12 SME minimum vector length 16
5875 22:16:29.289023 # ok 13 SME maximum vector length 256
5876 22:16:29.289108 # ok 14 SME current VL is 32
5877 22:16:29.289190 # ok 15 SME set VL 32 and have VL 32
5878 22:16:29.289291 # ok 16 SME prctl() set min/max
5879 22:16:29.289375 # ok 17 SME vector length used default
5880 22:16:29.289458 # ok 18 SME vector length was inherited
5881 22:16:29.289540 # ok 19 SME vector length set on exec
5882 22:16:29.289637 # ok 20 SME prctl() set all VLs, 0 errors
5883 22:16:29.289731 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5884 22:16:29.309667 ok 32 selftests: arm64: vec-syscfg
5885 22:16:29.477033 # selftests: arm64: za-fork
5886 22:16:29.693230 # TAP version 13
5887 22:16:29.693596 # 1..1
5888 22:16:29.693697 # # PID: 1018
5889 22:16:29.693783 # ok 1 fork_test
5890 22:16:29.693868 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5891 22:16:29.715357 ok 33 selftests: arm64: za-fork
5892 22:16:29.835684 # selftests: arm64: za-ptrace
5893 22:16:29.961584 # TAP version 13
5894 22:16:29.961814 # 1..1536
5895 22:16:29.962274 # # Parent is 1036, child is 1037
5896 22:16:29.962446 # ok 1 Set VL 16
5897 22:16:29.962585 # ok 2 Disabled ZA for VL 16
5898 22:16:29.962711 # ok 3 Data match for VL 16
5899 22:16:29.962839 # ok 4 Set VL 32
5900 22:16:29.962979 # ok 5 Disabled ZA for VL 32
5901 22:16:29.963133 # ok 6 Data match for VL 32
5902 22:16:29.963300 # ok 7 Set VL 48
5903 22:16:29.963448 # ok 8 # SKIP Disabled ZA for VL 48
5904 22:16:29.963612 # ok 9 # SKIP Get and set data for VL 48
5905 22:16:29.963750 # ok 10 Set VL 64
5906 22:16:29.963907 # ok 11 Disabled ZA for VL 64
5907 22:16:29.964120 # ok 12 Data match for VL 64
5908 22:16:29.964290 # ok 13 Set VL 80
5909 22:16:29.964475 # ok 14 # SKIP Disabled ZA for VL 80
5910 22:16:29.964629 # ok 15 # SKIP Get and set data for VL 80
5911 22:16:29.964827 # ok 16 Set VL 96
5912 22:16:29.964974 # ok 17 # SKIP Disabled ZA for VL 96
5913 22:16:29.965121 # ok 18 # SKIP Get and set data for VL 96
5914 22:16:29.965289 # ok 19 Set VL 112
5915 22:16:29.965454 # ok 20 # SKIP Disabled ZA for VL 112
5916 22:16:29.965612 # ok 21 # SKIP Get and set data for VL 112
5917 22:16:29.965799 # ok 22 Set VL 128
5918 22:16:29.965954 # ok 23 Disabled ZA for VL 128
5919 22:16:29.966088 # ok 24 Data match for VL 128
5920 22:16:29.966208 # ok 25 Set VL 144
5921 22:16:29.966324 # ok 26 # SKIP Disabled ZA for VL 144
5922 22:16:29.966438 # ok 27 # SKIP Get and set data for VL 144
5923 22:16:29.966557 # ok 28 Set VL 160
5924 22:16:29.966672 # ok 29 # SKIP Disabled ZA for VL 160
5925 22:16:29.966786 # ok 30 # SKIP Get and set data for VL 160
5926 22:16:29.966902 # ok 31 Set VL 176
5927 22:16:29.967016 # ok 32 # SKIP Disabled ZA for VL 176
5928 22:16:29.967168 # ok 33 # SKIP Get and set data for VL 176
5929 22:16:29.967295 # ok 34 Set VL 192
5930 22:16:29.967415 # ok 35 # SKIP Disabled ZA for VL 192
5931 22:16:29.967533 # ok 36 # SKIP Get and set data for VL 192
5932 22:16:29.967649 # ok 37 Set VL 208
5933 22:16:29.967764 # ok 38 # SKIP Disabled ZA for VL 208
5934 22:16:29.967879 # ok 39 # SKIP Get and set data for VL 208
5935 22:16:29.967995 # ok 40 Set VL 224
5936 22:16:29.968110 # ok 41 # SKIP Disabled ZA for VL 224
5937 22:16:29.968225 # ok 42 # SKIP Get and set data for VL 224
5938 22:16:29.968340 # ok 43 Set VL 240
5939 22:16:29.968454 # ok 44 # SKIP Disabled ZA for VL 240
5940 22:16:29.968570 # ok 45 # SKIP Get and set data for VL 240
5941 22:16:29.968684 # ok 46 Set VL 256
5942 22:16:29.968798 # ok 47 Disabled ZA for VL 256
5943 22:16:29.968912 # ok 48 Data match for VL 256
5944 22:16:29.969028 # ok 49 Set VL 272
5945 22:16:29.969143 # ok 50 # SKIP Disabled ZA for VL 272
5946 22:16:29.969258 # ok 51 # SKIP Get and set data for VL 272
5947 22:16:29.969376 # ok 52 Set VL 288
5948 22:16:29.969564 # ok 53 # SKIP Disabled ZA for VL 288
5949 22:16:29.970800 # ok 54 # SKIP Get and set data for VL 288
5950 22:16:29.971021 # ok 55 Set VL 304
5951 22:16:29.971241 # ok 56 # SKIP Disabled ZA for VL 304
5952 22:16:29.971475 # ok 57 # SKIP Get and set data for VL 304
5953 22:16:29.971632 # ok 58 Set VL 320
5954 22:16:29.971757 # ok 59 # SKIP Disabled ZA for VL 320
5955 22:16:29.972215 # ok 60 # SKIP Get and set data for VL 320
5956 22:16:29.972411 # ok 61 Set VL 336
5957 22:16:29.972562 # ok 62 # SKIP Disabled ZA for VL 336
5958 22:16:29.972763 # ok 63 # SKIP Get and set data for VL 336
5959 22:16:29.972936 # ok 64 Set VL 352
5960 22:16:29.973127 # ok 65 # SKIP Disabled ZA for VL 352
5961 22:16:29.973303 # ok 66 # SKIP Get and set data for VL 352
5962 22:16:29.973496 # ok 67 Set VL 368
5963 22:16:29.973716 # ok 68 # SKIP Disabled ZA for VL 368
5964 22:16:29.973920 # ok 69 # SKIP Get and set data for VL 368
5965 22:16:29.974115 # ok 70 Set VL 384
5966 22:16:29.974287 # ok 71 # SKIP Disabled ZA for VL 384
5967 22:16:29.974433 # ok 72 # SKIP Get and set data for VL 384
5968 22:16:29.974575 # ok 73 Set VL 400
5969 22:16:29.974715 # ok 74 # SKIP Disabled ZA for VL 400
5970 22:16:29.974856 # ok 75 # SKIP Get and set data for VL 400
5971 22:16:29.974997 # ok 76 Set VL 416
5972 22:16:29.975139 # ok 77 # SKIP Disabled ZA for VL 416
5973 22:16:29.975281 # ok 78 # SKIP Get and set data for VL 416
5974 22:16:29.975422 # ok 79 Set VL 432
5975 22:16:29.975566 # ok 80 # SKIP Disabled ZA for VL 432
5976 22:16:29.975711 # ok 81 # SKIP Get and set data for VL 432
5977 22:16:29.975856 # ok 82 Set VL 448
5978 22:16:29.975997 # ok 83 # SKIP Disabled ZA for VL 448
5979 22:16:29.976142 # ok 84 # SKIP Get and set data for VL 448
5980 22:16:29.976286 # ok 85 Set VL 464
5981 22:16:29.976428 # ok 86 # SKIP Disabled ZA for VL 464
5982 22:16:29.976573 # ok 87 # SKIP Get and set data for VL 464
5983 22:16:29.976715 # ok 88 Set VL 480
5984 22:16:29.976857 # ok 89 # SKIP Disabled ZA for VL 480
5985 22:16:29.976998 # ok 90 # SKIP Get and set data for VL 480
5986 22:16:29.977189 # ok 91 Set VL 496
5987 22:16:29.977331 # ok 92 # SKIP Disabled ZA for VL 496
5988 22:16:29.977476 # ok 93 # SKIP Get and set data for VL 496
5989 22:16:29.977621 # ok 94 Set VL 512
5990 22:16:29.977775 # ok 95 # SKIP Disabled ZA for VL 512
5991 22:16:29.977920 # ok 96 # SKIP Get and set data for VL 512
5992 22:16:29.978065 # ok 97 Set VL 528
5993 22:16:29.978207 # ok 98 # SKIP Disabled ZA for VL 528
5994 22:16:29.978351 # ok 99 # SKIP Get and set data for VL 528
5995 22:16:29.978493 # ok 100 Set VL 544
5996 22:16:29.978635 # ok 101 # SKIP Disabled ZA for VL 544
5997 22:16:29.978778 # ok 102 # SKIP Get and set data for VL 544
5998 22:16:29.978921 # ok 103 Set VL 560
5999 22:16:29.979063 # ok 104 # SKIP Disabled ZA for VL 560
6000 22:16:29.979205 # ok 105 # SKIP Get and set data for VL 560
6001 22:16:29.979348 # ok 106 Set VL 576
6002 22:16:29.979489 # ok 107 # SKIP Disabled ZA for VL 576
6003 22:16:29.979632 # ok 108 # SKIP Get and set data for VL 576
6004 22:16:29.979773 # ok 109 Set VL 592
6005 22:16:29.979916 # ok 110 # SKIP Disabled ZA for VL 592
6006 22:16:29.980059 # ok 111 # SKIP Get and set data for VL 592
6007 22:16:29.980240 # ok 112 Set VL 608
6008 22:16:29.980440 # ok 113 # SKIP Disabled ZA for VL 608
6009 22:16:29.980622 # ok 114 # SKIP Get and set data for VL 608
6010 22:16:29.980795 # ok 115 Set VL 624
6011 22:16:29.980974 # ok 116 # SKIP Disabled ZA for VL 624
6012 22:16:29.981360 # ok 117 # SKIP Get and set data for VL 624
6013 22:16:29.981529 # ok 118 Set VL 640
6014 22:16:29.981713 # ok 119 # SKIP Disabled ZA for VL 640
6015 22:16:29.981861 # ok 120 # SKIP Get and set data for VL 640
6016 22:16:29.982004 # ok 121 Set VL 656
6017 22:16:29.982147 # ok 122 # SKIP Disabled ZA for VL 656
6018 22:16:29.982289 # ok 123 # SKIP Get and set data for VL 656
6019 22:16:29.982432 # ok 124 Set VL 672
6020 22:16:29.986060 # ok 125 # SKIP Disabled ZA for VL 672
6021 22:16:29.986171 # ok 126 # SKIP Get and set data for VL 672
6022 22:16:29.986261 # ok 127 Set VL 688
6023 22:16:29.995340 # ok 128 # SKIP Disabled ZA for VL 688
6024 22:16:29.995645 # ok 129 # SKIP Get and set data for VL 688
6025 22:16:29.995750 # ok 130 Set VL 704
6026 22:16:29.995838 # ok 131 # SKIP Disabled ZA for VL 704
6027 22:16:29.995923 # ok 132 # SKIP Get and set data for VL 704
6028 22:16:29.996021 # ok 133 Set VL 720
6029 22:16:29.996106 # ok 134 # SKIP Disabled ZA for VL 720
6030 22:16:29.996188 # ok 135 # SKIP Get and set data for VL 720
6031 22:16:29.996271 # ok 136 Set VL 736
6032 22:16:29.996369 # ok 137 # SKIP Disabled ZA for VL 736
6033 22:16:29.996456 # ok 138 # SKIP Get and set data for VL 736
6034 22:16:29.996540 # ok 139 Set VL 752
6035 22:16:29.996620 # ok 140 # SKIP Disabled ZA for VL 752
6036 22:16:29.996718 # ok 141 # SKIP Get and set data for VL 752
6037 22:16:29.996804 # ok 142 Set VL 768
6038 22:16:29.996885 # ok 143 # SKIP Disabled ZA for VL 768
6039 22:16:29.996966 # ok 144 # SKIP Get and set data for VL 768
6040 22:16:29.997065 # ok 145 Set VL 784
6041 22:16:29.997158 # ok 146 # SKIP Disabled ZA for VL 784
6042 22:16:29.997241 # ok 147 # SKIP Get and set data for VL 784
6043 22:16:29.997323 # ok 148 Set VL 800
6044 22:16:29.997419 # ok 149 # SKIP Disabled ZA for VL 800
6045 22:16:29.997503 # ok 150 # SKIP Get and set data for VL 800
6046 22:16:29.997587 # ok 151 Set VL 816
6047 22:16:29.997696 # ok 152 # SKIP Disabled ZA for VL 816
6048 22:16:29.997796 # ok 153 # SKIP Get and set data for VL 816
6049 22:16:29.997886 # ok 154 Set VL 832
6050 22:16:29.997971 # ok 155 # SKIP Disabled ZA for VL 832
6051 22:16:29.998055 # ok 156 # SKIP Get and set data for VL 832
6052 22:16:29.998138 # ok 157 Set VL 848
6053 22:16:29.998219 # ok 158 # SKIP Disabled ZA for VL 848
6054 22:16:29.998319 # ok 159 # SKIP Get and set data for VL 848
6055 22:16:29.998404 # ok 160 Set VL 864
6056 22:16:29.998485 # ok 161 # SKIP Disabled ZA for VL 864
6057 22:16:29.998568 # ok 162 # SKIP Get and set data for VL 864
6058 22:16:29.998650 # ok 163 Set VL 880
6059 22:16:29.998731 # ok 164 # SKIP Disabled ZA for VL 880
6060 22:16:29.998812 # ok 165 # SKIP Get and set data for VL 880
6061 22:16:29.998893 # ok 166 Set VL 896
6062 22:16:29.998991 # ok 167 # SKIP Disabled ZA for VL 896
6063 22:16:29.999075 # ok 168 # SKIP Get and set data for VL 896
6064 22:16:29.999157 # ok 169 Set VL 912
6065 22:16:29.999238 # ok 170 # SKIP Disabled ZA for VL 912
6066 22:16:30.005165 # ok 171 # SKIP Get and set data for VL 912
6067 22:16:30.005394 # ok 172 Set VL 928
6068 22:16:30.005821 # ok 173 # SKIP Disabled ZA for VL 928
6069 22:16:30.006030 # ok 174 # SKIP Get and set data for VL 928
6070 22:16:30.006209 # ok 175 Set VL 944
6071 22:16:30.006340 # ok 176 # SKIP Disabled ZA for VL 944
6072 22:16:30.006484 # ok 177 # SKIP Get and set data for VL 944
6073 22:16:30.006668 # ok 178 Set VL 960
6074 22:16:30.006836 # ok 179 # SKIP Disabled ZA for VL 960
6075 22:16:30.007074 # ok 180 # SKIP Get and set data for VL 960
6076 22:16:30.007276 # ok 181 Set VL 976
6077 22:16:30.007496 # ok 182 # SKIP Disabled ZA for VL 976
6078 22:16:30.007670 # ok 183 # SKIP Get and set data for VL 976
6079 22:16:30.007860 # ok 184 Set VL 992
6080 22:16:30.008066 # ok 185 # SKIP Disabled ZA for VL 992
6081 22:16:30.008299 # ok 186 # SKIP Get and set data for VL 992
6082 22:16:30.008500 # ok 187 Set VL 1008
6083 22:16:30.008672 # ok 188 # SKIP Disabled ZA for VL 1008
6084 22:16:30.008831 # ok 189 # SKIP Get and set data for VL 1008
6085 22:16:30.008999 # ok 190 Set VL 1024
6086 22:16:30.009178 # ok 191 # SKIP Disabled ZA for VL 1024
6087 22:16:30.009440 # ok 192 # SKIP Get and set data for VL 1024
6088 22:16:30.009619 # ok 193 Set VL 1040
6089 22:16:30.010264 # ok 194 # SKIP Disabled ZA for VL 1040
6090 22:16:30.010395 # ok 195 # SKIP Get and set data for VL 1040
6091 22:16:30.010513 # ok 196 Set VL 1056
6092 22:16:30.010632 # ok 197 # SKIP Disabled ZA for VL 1056
6093 22:16:30.010750 # ok 198 # SKIP Get and set data for VL 1056
6094 22:16:30.010911 # ok 199 Set VL 1072
6095 22:16:30.011040 # ok 200 # SKIP Disabled ZA for VL 1072
6096 22:16:30.011157 # ok 201 # SKIP Get and set data for VL 1072
6097 22:16:30.011273 # ok 202 Set VL 1088
6098 22:16:30.011388 # ok 203 # SKIP Disabled ZA for VL 1088
6099 22:16:30.011504 # ok 204 # SKIP Get and set data for VL 1088
6100 22:16:30.011619 # ok 205 Set VL 1104
6101 22:16:30.011735 # ok 206 # SKIP Disabled ZA for VL 1104
6102 22:16:30.011850 # ok 207 # SKIP Get and set data for VL 1104
6103 22:16:30.011967 # ok 208 Set VL 1120
6104 22:16:30.012126 # ok 209 # SKIP Disabled ZA for VL 1120
6105 22:16:30.012254 # ok 210 # SKIP Get and set data for VL 1120
6106 22:16:30.012371 # ok 211 Set VL 1136
6107 22:16:30.012488 # ok 212 # SKIP Disabled ZA for VL 1136
6108 22:16:30.012604 # ok 213 # SKIP Get and set data for VL 1136
6109 22:16:30.012719 # ok 214 Set VL 1152
6110 22:16:30.012838 # ok 215 # SKIP Disabled ZA for VL 1152
6111 22:16:30.012954 # ok 216 # SKIP Get and set data for VL 1152
6112 22:16:30.013070 # ok 217 Set VL 1168
6113 22:16:30.013233 # ok 218 # SKIP Disabled ZA for VL 1168
6114 22:16:30.013370 # ok 219 # SKIP Get and set data for VL 1168
6115 22:16:30.013487 # ok 220 Set VL 1184
6116 22:16:30.013607 # ok 221 # SKIP Disabled ZA for VL 1184
6117 22:16:30.013769 # ok 222 # SKIP Get and set data for VL 1184
6118 22:16:30.013920 # ok 223 Set VL 1200
6119 22:16:30.014077 # ok 224 # SKIP Disabled ZA for VL 1200
6120 22:16:30.014198 # ok 225 # SKIP Get and set data for VL 1200
6121 22:16:30.014526 # ok 226 Set VL 1216
6122 22:16:30.014657 # ok 227 # SKIP Disabled ZA for VL 1216
6123 22:16:30.014777 # ok 228 # SKIP Get and set data for VL 1216
6124 22:16:30.016075 # ok 229 Set VL 1232
6125 22:16:30.016266 # ok 230 # SKIP Disabled ZA for VL 1232
6126 22:16:30.016658 # ok 231 # SKIP Get and set data for VL 1232
6127 22:16:30.016878 # ok 232 Set VL 1248
6128 22:16:30.017064 # ok 233 # SKIP Disabled ZA for VL 1248
6129 22:16:30.017256 # ok 234 # SKIP Get and set data for VL 1248
6130 22:16:30.017452 # ok 235 Set VL 1264
6131 22:16:30.017615 # ok 236 # SKIP Disabled ZA for VL 1264
6132 22:16:30.017825 # ok 237 # SKIP Get and set data for VL 1264
6133 22:16:30.018012 # ok 238 Set VL 1280
6134 22:16:30.018180 # ok 239 # SKIP Disabled ZA for VL 1280
6135 22:16:30.018311 # ok 240 # SKIP Get and set data for VL 1280
6136 22:16:30.018477 # ok 241 Set VL 1296
6137 22:16:30.018643 # ok 242 # SKIP Disabled ZA for VL 1296
6138 22:16:30.018819 # ok 243 # SKIP Get and set data for VL 1296
6139 22:16:30.019031 # ok 244 Set VL 1312
6140 22:16:30.019267 # ok 245 # SKIP Disabled ZA for VL 1312
6141 22:16:30.019427 # ok 246 # SKIP Get and set data for VL 1312
6142 22:16:30.019574 # ok 247 Set VL 1328
6143 22:16:30.019722 # ok 248 # SKIP Disabled ZA for VL 1328
6144 22:16:30.019901 # ok 249 # SKIP Get and set data for VL 1328
6145 22:16:30.020104 # ok 250 Set VL 1344
6146 22:16:30.020272 # ok 251 # SKIP Disabled ZA for VL 1344
6147 22:16:30.020485 # ok 252 # SKIP Get and set data for VL 1344
6148 22:16:30.020680 # ok 253 Set VL 1360
6149 22:16:30.020862 # ok 254 # SKIP Disabled ZA for VL 1360
6150 22:16:30.021063 # ok 255 # SKIP Get and set data for VL 1360
6151 22:16:30.021277 # ok 256 Set VL 1376
6152 22:16:30.021458 # ok 257 # SKIP Disabled ZA for VL 1376
6153 22:16:30.021620 # ok 258 # SKIP Get and set data for VL 1376
6154 22:16:30.022447 # ok 259 Set VL 1392
6155 22:16:30.022578 # ok 260 # SKIP Disabled ZA for VL 1392
6156 22:16:30.022697 # ok 261 # SKIP Get and set data for VL 1392
6157 22:16:30.022813 # ok 262 Set VL 1408
6158 22:16:30.022928 # ok 263 # SKIP Disabled ZA for VL 1408
6159 22:16:30.023042 # ok 264 # SKIP Get and set data for VL 1408
6160 22:16:30.023159 # ok 265 Set VL 1424
6161 22:16:30.023273 # ok 266 # SKIP Disabled ZA for VL 1424
6162 22:16:30.023389 # ok 267 # SKIP Get and set data for VL 1424
6163 22:16:30.023504 # ok 268 Set VL 1440
6164 22:16:30.023619 # ok 269 # SKIP Disabled ZA for VL 1440
6165 22:16:30.023734 # ok 270 # SKIP Get and set data for VL 1440
6166 22:16:30.023850 # ok 271 Set VL 1456
6167 22:16:30.023964 # ok 272 # SKIP Disabled ZA for VL 1456
6168 22:16:30.024079 # ok 273 # SKIP Get and set data for VL 1456
6169 22:16:30.024194 # ok 274 Set VL 1472
6170 22:16:30.024309 # ok 275 # SKIP Disabled ZA for VL 1472
6171 22:16:30.024425 # ok 276 # SKIP Get and set data for VL 1472
6172 22:16:30.024542 # ok 277 Set VL 1488
6173 22:16:30.024656 # ok 278 # SKIP Disabled ZA for VL 1488
6174 22:16:30.024771 # ok 279 # SKIP Get and set data for VL 1488
6175 22:16:30.024887 # ok 280 Set VL 1504
6176 22:16:30.025031 # ok 281 # SKIP Disabled ZA for VL 1504
6177 22:16:30.025180 # ok 282 # SKIP Get and set data for VL 1504
6178 22:16:30.025337 # ok 283 Set VL 1520
6179 22:16:30.025684 # ok 284 # SKIP Disabled ZA for VL 1520
6180 22:16:30.025822 # ok 285 # SKIP Get and set data for VL 1520
6181 22:16:30.025944 # ok 286 Set VL 1536
6182 22:16:30.026108 # ok 287 # SKIP Disabled ZA for VL 1536
6183 22:16:30.026237 # ok 288 # SKIP Get and set data for VL 1536
6184 22:16:30.026368 # ok 289 Set VL 1552
6185 22:16:30.026489 # ok 290 # SKIP Disabled ZA for VL 1552
6186 22:16:30.026605 # ok 291 # SKIP Get and set data for VL 1552
6187 22:16:30.026720 # ok 292 Set VL 1568
6188 22:16:30.026835 # ok 293 # SKIP Disabled ZA for VL 1568
6189 22:16:30.026951 # ok 294 # SKIP Get and set data for VL 1568
6190 22:16:30.027067 # ok 295 Set VL 1584
6191 22:16:30.027182 # ok 296 # SKIP Disabled ZA for VL 1584
6192 22:16:30.027299 # ok 297 # SKIP Get and set data for VL 1584
6193 22:16:30.027413 # ok 298 Set VL 1600
6194 22:16:30.027527 # ok 299 # SKIP Disabled ZA for VL 1600
6195 22:16:30.027644 # ok 300 # SKIP Get and set data for VL 1600
6196 22:16:30.032113 # ok 301 Set VL 1616
6197 22:16:30.032361 # ok 302 # SKIP Disabled ZA for VL 1616
6198 22:16:30.032839 # ok 303 # SKIP Get and set data for VL 1616
6199 22:16:30.033029 # ok 304 Set VL 1632
6200 22:16:30.033219 # ok 305 # SKIP Disabled ZA for VL 1632
6201 22:16:30.033443 # ok 306 # SKIP Get and set data for VL 1632
6202 22:16:30.033675 # ok 307 Set VL 1648
6203 22:16:30.033870 # ok 308 # SKIP Disabled ZA for VL 1648
6204 22:16:30.034066 # ok 309 # SKIP Get and set data for VL 1648
6205 22:16:30.034278 # ok 310 Set VL 1664
6206 22:16:30.034429 # ok 311 # SKIP Disabled ZA for VL 1664
6207 22:16:30.034582 # ok 312 # SKIP Get and set data for VL 1664
6208 22:16:30.034706 # ok 313 Set VL 1680
6209 22:16:30.034823 # ok 314 # SKIP Disabled ZA for VL 1680
6210 22:16:30.034936 # ok 315 # SKIP Get and set data for VL 1680
6211 22:16:30.035050 # ok 316 Set VL 1696
6212 22:16:30.035163 # ok 317 # SKIP Disabled ZA for VL 1696
6213 22:16:30.035277 # ok 318 # SKIP Get and set data for VL 1696
6214 22:16:30.035389 # ok 319 Set VL 1712
6215 22:16:30.035502 # ok 320 # SKIP Disabled ZA for VL 1712
6216 22:16:30.035617 # ok 321 # SKIP Get and set data for VL 1712
6217 22:16:30.035731 # ok 322 Set VL 1728
6218 22:16:30.035844 # ok 323 # SKIP Disabled ZA for VL 1728
6219 22:16:30.035982 # ok 324 # SKIP Get and set data for VL 1728
6220 22:16:30.036133 # ok 325 Set VL 1744
6221 22:16:30.036252 # ok 326 # SKIP Disabled ZA for VL 1744
6222 22:16:30.036369 # ok 327 # SKIP Get and set data for VL 1744
6223 22:16:30.036482 # ok 328 Set VL 1760
6224 22:16:30.036595 # ok 329 # SKIP Disabled ZA for VL 1760
6225 22:16:30.077149 # ok 330 # SKIP Get and set data for VL 1760
6226 22:16:30.077613 # ok 331 Set VL 1776
6227 22:16:30.077857 # ok 332 # SKIP Disabled ZA for VL 1776
6228 22:16:30.078076 # ok 333 # SKIP Get and set data for VL 1776
6229 22:16:30.078234 # ok 334 Set VL 1792
6230 22:16:30.078355 # ok 335 # SKIP Disabled ZA for VL 1792
6231 22:16:30.078471 # ok 336 # SKIP Get and set data for VL 1792
6232 22:16:30.078612 # ok 337 Set VL 1808
6233 22:16:30.078740 # ok 338 # SKIP Disabled ZA for VL 1808
6234 22:16:30.078857 # ok 339 # SKIP Get and set data for VL 1808
6235 22:16:30.078974 # ok 340 Set VL 1824
6236 22:16:30.079090 # ok 341 # SKIP Disabled ZA for VL 1824
6237 22:16:30.089272 # ok 342 # SKIP Get and set data for VL 1824
6238 22:16:30.089591 # ok 343 Set VL 1840
6239 22:16:30.090008 # ok 344 # SKIP Disabled ZA for VL 1840
6240 22:16:30.090172 # ok 345 # SKIP Get and set data for VL 1840
6241 22:16:30.090300 # ok 346 Set VL 1856
6242 22:16:30.090418 # ok 347 # SKIP Disabled ZA for VL 1856
6243 22:16:30.090532 # ok 348 # SKIP Get and set data for VL 1856
6244 22:16:30.090646 # ok 349 Set VL 1872
6245 22:16:30.090760 # ok 350 # SKIP Disabled ZA for VL 1872
6246 22:16:30.090897 # ok 351 # SKIP Get and set data for VL 1872
6247 22:16:30.091017 # ok 352 Set VL 1888
6248 22:16:30.101249 # ok 353 # SKIP Disabled ZA for VL 1888
6249 22:16:30.101685 # ok 354 # SKIP Get and set data for VL 1888
6250 22:16:30.101854 # ok 355 Set VL 1904
6251 22:16:30.102032 # ok 356 # SKIP Disabled ZA for VL 1904
6252 22:16:30.102179 # ok 357 # SKIP Get and set data for VL 1904
6253 22:16:30.102321 # ok 358 Set VL 1920
6254 22:16:30.108260 # ok 359 # SKIP Disabled ZA for VL 1920
6255 22:16:30.108537 # ok 360 # SKIP Get and set data for VL 1920
6256 22:16:30.108791 # ok 361 Set VL 1936
6257 22:16:30.108958 # ok 362 # SKIP Disabled ZA for VL 1936
6258 22:16:30.109106 # ok 363 # SKIP Get and set data for VL 1936
6259 22:16:30.109251 # ok 364 Set VL 1952
6260 22:16:30.109394 # ok 365 # SKIP Disabled ZA for VL 1952
6261 22:16:30.109538 # ok 366 # SKIP Get and set data for VL 1952
6262 22:16:30.109693 # ok 367 Set VL 1968
6263 22:16:30.109838 # ok 368 # SKIP Disabled ZA for VL 1968
6264 22:16:30.110022 # ok 369 # SKIP Get and set data for VL 1968
6265 22:16:30.110158 # ok 370 Set VL 1984
6266 22:16:30.110300 # ok 371 # SKIP Disabled ZA for VL 1984
6267 22:16:30.110443 # ok 372 # SKIP Get and set data for VL 1984
6268 22:16:30.110584 # ok 373 Set VL 2000
6269 22:16:30.110724 # ok 374 # SKIP Disabled ZA for VL 2000
6270 22:16:30.110866 # ok 375 # SKIP Get and set data for VL 2000
6271 22:16:30.111007 # ok 376 Set VL 2016
6272 22:16:30.111148 # ok 377 # SKIP Disabled ZA for VL 2016
6273 22:16:30.111288 # ok 378 # SKIP Get and set data for VL 2016
6274 22:16:30.111429 # ok 379 Set VL 2032
6275 22:16:30.111569 # ok 380 # SKIP Disabled ZA for VL 2032
6276 22:16:30.111709 # ok 381 # SKIP Get and set data for VL 2032
6277 22:16:30.111850 # ok 382 Set VL 2048
6278 22:16:30.112035 # ok 383 # SKIP Disabled ZA for VL 2048
6279 22:16:30.112168 # ok 384 # SKIP Get and set data for VL 2048
6280 22:16:30.115392 # ok 385 Set VL 2064
6281 22:16:30.115903 # ok 386 # SKIP Disabled ZA for VL 2064
6282 22:16:30.116083 # ok 387 # SKIP Get and set data for VL 2064
6283 22:16:30.116259 # ok 388 Set VL 2080
6284 22:16:30.116405 # ok 389 # SKIP Disabled ZA for VL 2080
6285 22:16:30.116547 # ok 390 # SKIP Get and set data for VL 2080
6286 22:16:30.116690 # ok 391 Set VL 2096
6287 22:16:30.116832 # ok 392 # SKIP Disabled ZA for VL 2096
6288 22:16:30.117014 # ok 393 # SKIP Get and set data for VL 2096
6289 22:16:30.117155 # ok 394 Set VL 2112
6290 22:16:30.117299 # ok 395 # SKIP Disabled ZA for VL 2112
6291 22:16:30.117445 # ok 396 # SKIP Get and set data for VL 2112
6292 22:16:30.117591 # ok 397 Set VL 2128
6293 22:16:30.117746 # ok 398 # SKIP Disabled ZA for VL 2128
6294 22:16:30.117890 # ok 399 # SKIP Get and set data for VL 2128
6295 22:16:30.118032 # ok 400 Set VL 2144
6296 22:16:30.118173 # ok 401 # SKIP Disabled ZA for VL 2144
6297 22:16:30.118315 # ok 402 # SKIP Get and set data for VL 2144
6298 22:16:30.118458 # ok 403 Set VL 2160
6299 22:16:30.118600 # ok 404 # SKIP Disabled ZA for VL 2160
6300 22:16:30.118740 # ok 405 # SKIP Get and set data for VL 2160
6301 22:16:30.118882 # ok 406 Set VL 2176
6302 22:16:30.119023 # ok 407 # SKIP Disabled ZA for VL 2176
6303 22:16:30.119164 # ok 408 # SKIP Get and set data for VL 2176
6304 22:16:30.119349 # ok 409 Set VL 2192
6305 22:16:30.119483 # ok 410 # SKIP Disabled ZA for VL 2192
6306 22:16:30.119627 # ok 411 # SKIP Get and set data for VL 2192
6307 22:16:30.119770 # ok 412 Set VL 2208
6308 22:16:30.119911 # ok 413 # SKIP Disabled ZA for VL 2208
6309 22:16:30.120053 # ok 414 # SKIP Get and set data for VL 2208
6310 22:16:30.120194 # ok 415 Set VL 2224
6311 22:16:30.120349 # ok 416 # SKIP Disabled ZA for VL 2224
6312 22:16:30.120522 # ok 417 # SKIP Get and set data for VL 2224
6313 22:16:30.120664 # ok 418 Set VL 2240
6314 22:16:30.120783 # ok 419 # SKIP Disabled ZA for VL 2240
6315 22:16:30.120900 # ok 420 # SKIP Get and set data for VL 2240
6316 22:16:30.121013 # ok 421 Set VL 2256
6317 22:16:30.121126 # ok 422 # SKIP Disabled ZA for VL 2256
6318 22:16:30.123142 # ok 423 # SKIP Get and set data for VL 2256
6319 22:16:30.123357 # ok 424 Set VL 2272
6320 22:16:30.123735 # ok 425 # SKIP Disabled ZA for VL 2272
6321 22:16:30.123889 # ok 426 # SKIP Get and set data for VL 2272
6322 22:16:30.124028 # ok 427 Set VL 2288
6323 22:16:30.124156 # ok 428 # SKIP Disabled ZA for VL 2288
6324 22:16:30.124283 # ok 429 # SKIP Get and set data for VL 2288
6325 22:16:30.124410 # ok 430 Set VL 2304
6326 22:16:30.124562 # ok 431 # SKIP Disabled ZA for VL 2304
6327 22:16:30.124697 # ok 432 # SKIP Get and set data for VL 2304
6328 22:16:30.124822 # ok 433 Set VL 2320
6329 22:16:30.124950 # ok 434 # SKIP Disabled ZA for VL 2320
6330 22:16:30.125076 # ok 435 # SKIP Get and set data for VL 2320
6331 22:16:30.125203 # ok 436 Set VL 2336
6332 22:16:30.125332 # ok 437 # SKIP Disabled ZA for VL 2336
6333 22:16:30.125459 # ok 438 # SKIP Get and set data for VL 2336
6334 22:16:30.125589 # ok 439 Set VL 2352
6335 22:16:30.125729 # ok 440 # SKIP Disabled ZA for VL 2352
6336 22:16:30.125859 # ok 441 # SKIP Get and set data for VL 2352
6337 22:16:30.125987 # ok 442 Set VL 2368
6338 22:16:30.126146 # ok 443 # SKIP Disabled ZA for VL 2368
6339 22:16:30.126269 # ok 444 # SKIP Get and set data for VL 2368
6340 22:16:30.126387 # ok 445 Set VL 2384
6341 22:16:30.126503 # ok 446 # SKIP Disabled ZA for VL 2384
6342 22:16:30.126620 # ok 447 # SKIP Get and set data for VL 2384
6343 22:16:30.126738 # ok 448 Set VL 2400
6344 22:16:30.126858 # ok 449 # SKIP Disabled ZA for VL 2400
6345 22:16:30.126974 # ok 450 # SKIP Get and set data for VL 2400
6346 22:16:30.127091 # ok 451 Set VL 2416
6347 22:16:30.127208 # ok 452 # SKIP Disabled ZA for VL 2416
6348 22:16:30.127324 # ok 453 # SKIP Get and set data for VL 2416
6349 22:16:30.127441 # ok 454 Set VL 2432
6350 22:16:30.127556 # ok 455 # SKIP Disabled ZA for VL 2432
6351 22:16:30.127674 # ok 456 # SKIP Get and set data for VL 2432
6352 22:16:30.127790 # ok 457 Set VL 2448
6353 22:16:30.127905 # ok 458 # SKIP Disabled ZA for VL 2448
6354 22:16:30.128022 # ok 459 # SKIP Get and set data for VL 2448
6355 22:16:30.128138 # ok 460 Set VL 2464
6356 22:16:30.128256 # ok 461 # SKIP Disabled ZA for VL 2464
6357 22:16:30.128373 # ok 462 # SKIP Get and set data for VL 2464
6358 22:16:30.128488 # ok 463 Set VL 2480
6359 22:16:30.128604 # ok 464 # SKIP Disabled ZA for VL 2480
6360 22:16:30.131568 # ok 465 # SKIP Get and set data for VL 2480
6361 22:16:30.131765 # ok 466 Set VL 2496
6362 22:16:30.131923 # ok 467 # SKIP Disabled ZA for VL 2496
6363 22:16:30.132055 # ok 468 # SKIP Get and set data for VL 2496
6364 22:16:30.132181 # ok 469 Set VL 2512
6365 22:16:30.132308 # ok 470 # SKIP Disabled ZA for VL 2512
6366 22:16:30.132435 # ok 471 # SKIP Get and set data for VL 2512
6367 22:16:30.132559 # ok 472 Set VL 2528
6368 22:16:30.132714 # ok 473 # SKIP Disabled ZA for VL 2528
6369 22:16:30.132848 # ok 474 # SKIP Get and set data for VL 2528
6370 22:16:30.132975 # ok 475 Set VL 2544
6371 22:16:30.133103 # ok 476 # SKIP Disabled ZA for VL 2544
6372 22:16:30.133236 # ok 477 # SKIP Get and set data for VL 2544
6373 22:16:30.133430 # ok 478 Set VL 2560
6374 22:16:30.133657 # ok 479 # SKIP Disabled ZA for VL 2560
6375 22:16:30.133875 # ok 480 # SKIP Get and set data for VL 2560
6376 22:16:30.134061 # ok 481 Set VL 2576
6377 22:16:30.134223 # ok 482 # SKIP Disabled ZA for VL 2576
6378 22:16:30.134350 # ok 483 # SKIP Get and set data for VL 2576
6379 22:16:30.134465 # ok 484 Set VL 2592
6380 22:16:30.134576 # ok 485 # SKIP Disabled ZA for VL 2592
6381 22:16:30.134688 # ok 486 # SKIP Get and set data for VL 2592
6382 22:16:30.134799 # ok 487 Set VL 2608
6383 22:16:30.134913 # ok 488 # SKIP Disabled ZA for VL 2608
6384 22:16:30.135023 # ok 489 # SKIP Get and set data for VL 2608
6385 22:16:30.135133 # ok 490 Set VL 2624
6386 22:16:30.135243 # ok 491 # SKIP Disabled ZA for VL 2624
6387 22:16:30.135353 # ok 492 # SKIP Get and set data for VL 2624
6388 22:16:30.135463 # ok 493 Set VL 2640
6389 22:16:30.135572 # ok 494 # SKIP Disabled ZA for VL 2640
6390 22:16:30.135684 # ok 495 # SKIP Get and set data for VL 2640
6391 22:16:30.135794 # ok 496 Set VL 2656
6392 22:16:30.135906 # ok 497 # SKIP Disabled ZA for VL 2656
6393 22:16:30.136017 # ok 498 # SKIP Get and set data for VL 2656
6394 22:16:30.136126 # ok 499 Set VL 2672
6395 22:16:30.136236 # ok 500 # SKIP Disabled ZA for VL 2672
6396 22:16:30.137086 # ok 501 # SKIP Get and set data for VL 2672
6397 22:16:30.137299 # ok 502 Set VL 2688
6398 22:16:30.137726 # ok 503 # SKIP Disabled ZA for VL 2688
6399 22:16:30.137929 # ok 504 # SKIP Get and set data for VL 2688
6400 22:16:30.138104 # ok 505 Set VL 2704
6401 22:16:30.138253 # ok 506 # SKIP Disabled ZA for VL 2704
6402 22:16:30.138375 # ok 507 # SKIP Get and set data for VL 2704
6403 22:16:30.138493 # ok 508 Set VL 2720
6404 22:16:30.138608 # ok 509 # SKIP Disabled ZA for VL 2720
6405 22:16:30.138726 # ok 510 # SKIP Get and set data for VL 2720
6406 22:16:30.138868 # ok 511 Set VL 2736
6407 22:16:30.138993 # ok 512 # SKIP Disabled ZA for VL 2736
6408 22:16:30.139112 # ok 513 # SKIP Get and set data for VL 2736
6409 22:16:30.139230 # ok 514 Set VL 2752
6410 22:16:30.141368 # ok 515 # SKIP Disabled ZA for VL 2752
6411 22:16:30.141852 # ok 516 # SKIP Get and set data for VL 2752
6412 22:16:30.142050 # ok 517 Set VL 2768
6413 22:16:30.142189 # ok 518 # SKIP Disabled ZA for VL 2768
6414 22:16:30.142309 # ok 519 # SKIP Get and set data for VL 2768
6415 22:16:30.142427 # ok 520 Set VL 2784
6416 22:16:30.142568 # ok 521 # SKIP Disabled ZA for VL 2784
6417 22:16:30.142692 # ok 522 # SKIP Get and set data for VL 2784
6418 22:16:30.142844 # ok 523 Set VL 2800
6419 22:16:30.143034 # ok 524 # SKIP Disabled ZA for VL 2800
6420 22:16:30.143233 # ok 525 # SKIP Get and set data for VL 2800
6421 22:16:30.143401 # ok 526 Set VL 2816
6422 22:16:30.143565 # ok 527 # SKIP Disabled ZA for VL 2816
6423 22:16:30.143723 # ok 528 # SKIP Get and set data for VL 2816
6424 22:16:30.143943 # ok 529 Set VL 2832
6425 22:16:30.144147 # ok 530 # SKIP Disabled ZA for VL 2832
6426 22:16:30.144309 # ok 531 # SKIP Get and set data for VL 2832
6427 22:16:30.144438 # ok 532 Set VL 2848
6428 22:16:30.144554 # ok 533 # SKIP Disabled ZA for VL 2848
6429 22:16:30.144670 # ok 534 # SKIP Get and set data for VL 2848
6430 22:16:30.144786 # ok 535 Set VL 2864
6431 22:16:30.144902 # ok 536 # SKIP Disabled ZA for VL 2864
6432 22:16:30.145021 # ok 537 # SKIP Get and set data for VL 2864
6433 22:16:30.145163 # ok 538 Set VL 2880
6434 22:16:30.145290 # ok 539 # SKIP Disabled ZA for VL 2880
6435 22:16:30.145873 # ok 540 # SKIP Get and set data for VL 2880
6436 22:16:30.146109 # ok 541 Set VL 2896
6437 22:16:30.146281 # ok 542 # SKIP Disabled ZA for VL 2896
6438 22:16:30.146411 # ok 543 # SKIP Get and set data for VL 2896
6439 22:16:30.146531 # ok 544 Set VL 2912
6440 22:16:30.146647 # ok 545 # SKIP Disabled ZA for VL 2912
6441 22:16:30.146762 # ok 546 # SKIP Get and set data for VL 2912
6442 22:16:30.146881 # ok 547 Set VL 2928
6443 22:16:30.146997 # ok 548 # SKIP Disabled ZA for VL 2928
6444 22:16:30.147111 # ok 549 # SKIP Get and set data for VL 2928
6445 22:16:30.147227 # ok 550 Set VL 2944
6446 22:16:30.147342 # ok 551 # SKIP Disabled ZA for VL 2944
6447 22:16:30.147458 # ok 552 # SKIP Get and set data for VL 2944
6448 22:16:30.147573 # ok 553 Set VL 2960
6449 22:16:30.147688 # ok 554 # SKIP Disabled ZA for VL 2960
6450 22:16:30.147803 # ok 555 # SKIP Get and set data for VL 2960
6451 22:16:30.147918 # ok 556 Set VL 2976
6452 22:16:30.148034 # ok 557 # SKIP Disabled ZA for VL 2976
6453 22:16:30.148373 # ok 558 # SKIP Get and set data for VL 2976
6454 22:16:30.148506 # ok 559 Set VL 2992
6455 22:16:30.148625 # ok 560 # SKIP Disabled ZA for VL 2992
6456 22:16:30.152041 # ok 561 # SKIP Get and set data for VL 2992
6457 22:16:30.152500 # ok 562 Set VL 3008
6458 22:16:30.152691 # ok 563 # SKIP Disabled ZA for VL 3008
6459 22:16:30.152852 # ok 564 # SKIP Get and set data for VL 3008
6460 22:16:30.153040 # ok 565 Set VL 3024
6461 22:16:30.153257 # ok 566 # SKIP Disabled ZA for VL 3024
6462 22:16:30.153516 # ok 567 # SKIP Get and set data for VL 3024
6463 22:16:30.153752 # ok 568 Set VL 3040
6464 22:16:30.153963 # ok 569 # SKIP Disabled ZA for VL 3040
6465 22:16:30.154174 # ok 570 # SKIP Get and set data for VL 3040
6466 22:16:30.154307 # ok 571 Set VL 3056
6467 22:16:30.154424 # ok 572 # SKIP Disabled ZA for VL 3056
6468 22:16:30.154538 # ok 573 # SKIP Get and set data for VL 3056
6469 22:16:30.154651 # ok 574 Set VL 3072
6470 22:16:30.154764 # ok 575 # SKIP Disabled ZA for VL 3072
6471 22:16:30.154909 # ok 576 # SKIP Get and set data for VL 3072
6472 22:16:30.155033 # ok 577 Set VL 3088
6473 22:16:30.155151 # ok 578 # SKIP Disabled ZA for VL 3088
6474 22:16:30.155266 # ok 579 # SKIP Get and set data for VL 3088
6475 22:16:30.155380 # ok 580 Set VL 3104
6476 22:16:30.155491 # ok 581 # SKIP Disabled ZA for VL 3104
6477 22:16:30.157782 # ok 582 # SKIP Get and set data for VL 3104
6478 22:16:30.158257 # ok 583 Set VL 3120
6479 22:16:30.158420 # ok 584 # SKIP Disabled ZA for VL 3120
6480 22:16:30.159396 # ok 585 # SKIP Get and set data for VL 3120
6481 22:16:30.159864 # ok 586 Set VL 3136
6482 22:16:30.160027 # ok 587 # SKIP Disabled ZA for VL 3136
6483 22:16:30.160151 # ok 588 # SKIP Get and set data for VL 3136
6484 22:16:30.160267 # ok 589 Set VL 3152
6485 22:16:30.161336 # ok 590 # SKIP Disabled ZA for VL 3152
6486 22:16:30.161752 # ok 591 # SKIP Get and set data for VL 3152
6487 22:16:30.161955 # ok 592 Set VL 3168
6488 22:16:30.162129 # ok 593 # SKIP Disabled ZA for VL 3168
6489 22:16:30.162312 # ok 594 # SKIP Get and set data for VL 3168
6490 22:16:30.162455 # ok 595 Set VL 3184
6491 22:16:30.162599 # ok 596 # SKIP Disabled ZA for VL 3184
6492 22:16:30.162744 # ok 597 # SKIP Get and set data for VL 3184
6493 22:16:30.167392 # ok 598 Set VL 3200
6494 22:16:30.167907 # ok 599 # SKIP Disabled ZA for VL 3200
6495 22:16:30.168097 # ok 600 # SKIP Get and set data for VL 3200
6496 22:16:30.168268 # ok 601 Set VL 3216
6497 22:16:30.168439 # ok 602 # SKIP Disabled ZA for VL 3216
6498 22:16:30.168601 # ok 603 # SKIP Get and set data for VL 3216
6499 22:16:30.168831 # ok 604 Set VL 3232
6500 22:16:30.169051 # ok 605 # SKIP Disabled ZA for VL 3232
6501 22:16:30.169262 # ok 606 # SKIP Get and set data for VL 3232
6502 22:16:30.169471 # ok 607 Set VL 3248
6503 22:16:30.169644 # ok 608 # SKIP Disabled ZA for VL 3248
6504 22:16:30.169816 # ok 609 # SKIP Get and set data for VL 3248
6505 22:16:30.169971 # ok 610 Set VL 3264
6506 22:16:30.170101 # ok 611 # SKIP Disabled ZA for VL 3264
6507 22:16:30.170222 # ok 612 # SKIP Get and set data for VL 3264
6508 22:16:30.170367 # ok 613 Set VL 3280
6509 22:16:30.170488 # ok 614 # SKIP Disabled ZA for VL 3280
6510 22:16:30.170605 # ok 615 # SKIP Get and set data for VL 3280
6511 22:16:30.170720 # ok 616 Set VL 3296
6512 22:16:30.170835 # ok 617 # SKIP Disabled ZA for VL 3296
6513 22:16:30.170949 # ok 618 # SKIP Get and set data for VL 3296
6514 22:16:30.171064 # ok 619 Set VL 3312
6515 22:16:30.171176 # ok 620 # SKIP Disabled ZA for VL 3312
6516 22:16:30.171291 # ok 621 # SKIP Get and set data for VL 3312
6517 22:16:30.171405 # ok 622 Set VL 3328
6518 22:16:30.171517 # ok 623 # SKIP Disabled ZA for VL 3328
6519 22:16:30.171629 # ok 624 # SKIP Get and set data for VL 3328
6520 22:16:30.171744 # ok 625 Set VL 3344
6521 22:16:30.175567 # ok 626 # SKIP Disabled ZA for VL 3344
6522 22:16:30.175853 # ok 627 # SKIP Get and set data for VL 3344
6523 22:16:30.176090 # ok 628 Set VL 3360
6524 22:16:30.176274 # ok 629 # SKIP Disabled ZA for VL 3360
6525 22:16:30.176484 # ok 630 # SKIP Get and set data for VL 3360
6526 22:16:30.176697 # ok 631 Set VL 3376
6527 22:16:30.176881 # ok 632 # SKIP Disabled ZA for VL 3376
6528 22:16:30.177123 # ok 633 # SKIP Get and set data for VL 3376
6529 22:16:30.177333 # ok 634 Set VL 3392
6530 22:16:30.177536 # ok 635 # SKIP Disabled ZA for VL 3392
6531 22:16:30.177746 # ok 636 # SKIP Get and set data for VL 3392
6532 22:16:30.177932 # ok 637 Set VL 3408
6533 22:16:30.178060 # ok 638 # SKIP Disabled ZA for VL 3408
6534 22:16:30.178186 # ok 639 # SKIP Get and set data for VL 3408
6535 22:16:30.178301 # ok 640 Set VL 3424
6536 22:16:30.178413 # ok 641 # SKIP Disabled ZA for VL 3424
6537 22:16:30.178555 # ok 642 # SKIP Get and set data for VL 3424
6538 22:16:30.178678 # ok 643 Set VL 3440
6539 22:16:30.178793 # ok 644 # SKIP Disabled ZA for VL 3440
6540 22:16:30.178908 # ok 645 # SKIP Get and set data for VL 3440
6541 22:16:30.179027 # ok 646 Set VL 3456
6542 22:16:30.179142 # ok 647 # SKIP Disabled ZA for VL 3456
6543 22:16:30.179256 # ok 648 # SKIP Get and set data for VL 3456
6544 22:16:30.179368 # ok 649 Set VL 3472
6545 22:16:30.179480 # ok 650 # SKIP Disabled ZA for VL 3472
6546 22:16:30.179593 # ok 651 # SKIP Get and set data for VL 3472
6547 22:16:30.183618 # ok 652 Set VL 3488
6548 22:16:30.184132 # ok 653 # SKIP Disabled ZA for VL 3488
6549 22:16:30.184354 # ok 654 # SKIP Get and set data for VL 3488
6550 22:16:30.184562 # ok 655 Set VL 3504
6551 22:16:30.184736 # ok 656 # SKIP Disabled ZA for VL 3504
6552 22:16:30.184940 # ok 657 # SKIP Get and set data for VL 3504
6553 22:16:30.185117 # ok 658 Set VL 3520
6554 22:16:30.185266 # ok 659 # SKIP Disabled ZA for VL 3520
6555 22:16:30.185425 # ok 660 # SKIP Get and set data for VL 3520
6556 22:16:30.185585 # ok 661 Set VL 3536
6557 22:16:30.185758 # ok 662 # SKIP Disabled ZA for VL 3536
6558 22:16:30.185918 # ok 663 # SKIP Get and set data for VL 3536
6559 22:16:30.186081 # ok 664 Set VL 3552
6560 22:16:30.186204 # ok 665 # SKIP Disabled ZA for VL 3552
6561 22:16:30.186348 # ok 666 # SKIP Get and set data for VL 3552
6562 22:16:30.186468 # ok 667 Set VL 3568
6563 22:16:30.186584 # ok 668 # SKIP Disabled ZA for VL 3568
6564 22:16:30.186699 # ok 669 # SKIP Get and set data for VL 3568
6565 22:16:30.186814 # ok 670 Set VL 3584
6566 22:16:30.186930 # ok 671 # SKIP Disabled ZA for VL 3584
6567 22:16:30.187044 # ok 672 # SKIP Get and set data for VL 3584
6568 22:16:30.187157 # ok 673 Set VL 3600
6569 22:16:30.187269 # ok 674 # SKIP Disabled ZA for VL 3600
6570 22:16:30.187383 # ok 675 # SKIP Get and set data for VL 3600
6571 22:16:30.191112 # ok 676 Set VL 3616
6572 22:16:30.191633 # ok 677 # SKIP Disabled ZA for VL 3616
6573 22:16:30.191859 # ok 678 # SKIP Get and set data for VL 3616
6574 22:16:30.192093 # ok 679 Set VL 3632
6575 22:16:30.192285 # ok 680 # SKIP Disabled ZA for VL 3632
6576 22:16:30.192540 # ok 681 # SKIP Get and set data for VL 3632
6577 22:16:30.192769 # ok 682 Set VL 3648
6578 22:16:30.193035 # ok 683 # SKIP Disabled ZA for VL 3648
6579 22:16:30.193263 # ok 684 # SKIP Get and set data for VL 3648
6580 22:16:30.193475 # ok 685 Set VL 3664
6581 22:16:30.193697 # ok 686 # SKIP Disabled ZA for VL 3664
6582 22:16:30.193889 # ok 687 # SKIP Get and set data for VL 3664
6583 22:16:30.194100 # ok 688 Set VL 3680
6584 22:16:30.194235 # ok 689 # SKIP Disabled ZA for VL 3680
6585 22:16:30.194352 # ok 690 # SKIP Get and set data for VL 3680
6586 22:16:30.194467 # ok 691 Set VL 3696
6587 22:16:30.194580 # ok 692 # SKIP Disabled ZA for VL 3696
6588 22:16:30.194694 # ok 693 # SKIP Get and set data for VL 3696
6589 22:16:30.194807 # ok 694 Set VL 3712
6590 22:16:30.194922 # ok 695 # SKIP Disabled ZA for VL 3712
6591 22:16:30.195037 # ok 696 # SKIP Get and set data for VL 3712
6592 22:16:30.195152 # ok 697 Set VL 3728
6593 22:16:30.195299 # ok 698 # SKIP Disabled ZA for VL 3728
6594 22:16:30.195423 # ok 699 # SKIP Get and set data for VL 3728
6595 22:16:30.195539 # ok 700 Set VL 3744
6596 22:16:30.195654 # ok 701 # SKIP Disabled ZA for VL 3744
6597 22:16:30.195768 # ok 702 # SKIP Get and set data for VL 3744
6598 22:16:30.195882 # ok 703 Set VL 3760
6599 22:16:30.195998 # ok 704 # SKIP Disabled ZA for VL 3760
6600 22:16:30.196112 # ok 705 # SKIP Get and set data for VL 3760
6601 22:16:30.196226 # ok 706 Set VL 3776
6602 22:16:30.196338 # ok 707 # SKIP Disabled ZA for VL 3776
6603 22:16:30.196451 # ok 708 # SKIP Get and set data for VL 3776
6604 22:16:30.196564 # ok 709 Set VL 3792
6605 22:16:30.196678 # ok 710 # SKIP Disabled ZA for VL 3792
6606 22:16:30.196791 # ok 711 # SKIP Get and set data for VL 3792
6607 22:16:30.196904 # ok 712 Set VL 3808
6608 22:16:30.197016 # ok 713 # SKIP Disabled ZA for VL 3808
6609 22:16:30.199459 # ok 714 # SKIP Get and set data for VL 3808
6610 22:16:30.199859 # ok 715 Set VL 3824
6611 22:16:30.200016 # ok 716 # SKIP Disabled ZA for VL 3824
6612 22:16:30.200122 # ok 717 # SKIP Get and set data for VL 3824
6613 22:16:30.200238 # ok 718 Set VL 3840
6614 22:16:30.200335 # ok 719 # SKIP Disabled ZA for VL 3840
6615 22:16:30.200431 # ok 720 # SKIP Get and set data for VL 3840
6616 22:16:30.200524 # ok 721 Set VL 3856
6617 22:16:30.200634 # ok 722 # SKIP Disabled ZA for VL 3856
6618 22:16:30.200727 # ok 723 # SKIP Get and set data for VL 3856
6619 22:16:30.200815 # ok 724 Set VL 3872
6620 22:16:30.200901 # ok 725 # SKIP Disabled ZA for VL 3872
6621 22:16:30.201010 # ok 726 # SKIP Get and set data for VL 3872
6622 22:16:30.201107 # ok 727 Set VL 3888
6623 22:16:30.201198 # ok 728 # SKIP Disabled ZA for VL 3888
6624 22:16:30.201306 # ok 729 # SKIP Get and set data for VL 3888
6625 22:16:30.201402 # ok 730 Set VL 3904
6626 22:16:30.201491 # ok 731 # SKIP Disabled ZA for VL 3904
6627 22:16:30.201602 # ok 732 # SKIP Get and set data for VL 3904
6628 22:16:30.201709 # ok 733 Set VL 3920
6629 22:16:30.201800 # ok 734 # SKIP Disabled ZA for VL 3920
6630 22:16:30.201909 # ok 735 # SKIP Get and set data for VL 3920
6631 22:16:30.202008 # ok 736 Set VL 3936
6632 22:16:30.202118 # ok 737 # SKIP Disabled ZA for VL 3936
6633 22:16:30.202209 # ok 738 # SKIP Get and set data for VL 3936
6634 22:16:30.202296 # ok 739 Set VL 3952
6635 22:16:30.208014 # ok 740 # SKIP Disabled ZA for VL 3952
6636 22:16:30.208247 # ok 741 # SKIP Get and set data for VL 3952
6637 22:16:30.208364 # ok 742 Set VL 3968
6638 22:16:30.208461 # ok 743 # SKIP Disabled ZA for VL 3968
6639 22:16:30.208574 # ok 744 # SKIP Get and set data for VL 3968
6640 22:16:30.208670 # ok 745 Set VL 3984
6641 22:16:30.209322 # ok 746 # SKIP Disabled ZA for VL 3984
6642 22:16:30.209480 # ok 747 # SKIP Get and set data for VL 3984
6643 22:16:30.209642 # ok 748 Set VL 4000
6644 22:16:30.209788 # ok 749 # SKIP Disabled ZA for VL 4000
6645 22:16:30.209937 # ok 750 # SKIP Get and set data for VL 4000
6646 22:16:30.210076 # ok 751 Set VL 4016
6647 22:16:30.210196 # ok 752 # SKIP Disabled ZA for VL 4016
6648 22:16:30.210290 # ok 753 # SKIP Get and set data for VL 4016
6649 22:16:30.210398 # ok 754 Set VL 4032
6650 22:16:30.210492 # ok 755 # SKIP Disabled ZA for VL 4032
6651 22:16:30.210582 # ok 756 # SKIP Get and set data for VL 4032
6652 22:16:30.210670 # ok 757 Set VL 4048
6653 22:16:30.210758 # ok 758 # SKIP Disabled ZA for VL 4048
6654 22:16:30.210844 # ok 759 # SKIP Get and set data for VL 4048
6655 22:16:30.210930 # ok 760 Set VL 4064
6656 22:16:30.215620 # ok 761 # SKIP Disabled ZA for VL 4064
6657 22:16:30.216160 # ok 762 # SKIP Get and set data for VL 4064
6658 22:16:30.216302 # ok 763 Set VL 4080
6659 22:16:30.216415 # ok 764 # SKIP Disabled ZA for VL 4080
6660 22:16:30.216524 # ok 765 # SKIP Get and set data for VL 4080
6661 22:16:30.216632 # ok 766 Set VL 4096
6662 22:16:30.216764 # ok 767 # SKIP Disabled ZA for VL 4096
6663 22:16:30.216880 # ok 768 # SKIP Get and set data for VL 4096
6664 22:16:30.216995 # ok 769 Set VL 4112
6665 22:16:30.217109 # ok 770 # SKIP Disabled ZA for VL 4112
6666 22:16:30.217221 # ok 771 # SKIP Get and set data for VL 4112
6667 22:16:30.217355 # ok 772 Set VL 4128
6668 22:16:30.217469 # ok 773 # SKIP Disabled ZA for VL 4128
6669 22:16:30.217582 # ok 774 # SKIP Get and set data for VL 4128
6670 22:16:30.217708 # ok 775 Set VL 4144
6671 22:16:30.217821 # ok 776 # SKIP Disabled ZA for VL 4144
6672 22:16:30.217932 # ok 777 # SKIP Get and set data for VL 4144
6673 22:16:30.218069 # ok 778 Set VL 4160
6674 22:16:30.218187 # ok 779 # SKIP Disabled ZA for VL 4160
6675 22:16:30.218298 # ok 780 # SKIP Get and set data for VL 4160
6676 22:16:30.218387 # ok 781 Set VL 4176
6677 22:16:30.218473 # ok 782 # SKIP Disabled ZA for VL 4176
6678 22:16:30.218559 # ok 783 # SKIP Get and set data for VL 4176
6679 22:16:30.218645 # ok 784 Set VL 4192
6680 22:16:30.220779 # ok 785 # SKIP Disabled ZA for VL 4192
6681 22:16:30.221223 # ok 786 # SKIP Get and set data for VL 4192
6682 22:16:30.221373 # ok 787 Set VL 4208
6683 22:16:30.221510 # ok 788 # SKIP Disabled ZA for VL 4208
6684 22:16:30.221678 # ok 789 # SKIP Get and set data for VL 4208
6685 22:16:30.221816 # ok 790 Set VL 4224
6686 22:16:30.221948 # ok 791 # SKIP Disabled ZA for VL 4224
6687 22:16:30.222081 # ok 792 # SKIP Get and set data for VL 4224
6688 22:16:30.222207 # ok 793 Set VL 4240
6689 22:16:30.222361 # ok 794 # SKIP Disabled ZA for VL 4240
6690 22:16:30.222493 # ok 795 # SKIP Get and set data for VL 4240
6691 22:16:30.222589 # ok 796 Set VL 4256
6692 22:16:30.222675 # ok 797 # SKIP Disabled ZA for VL 4256
6693 22:16:30.231586 # ok 798 # SKIP Get and set data for VL 4256
6694 22:16:30.232098 # ok 799 Set VL 4272
6695 22:16:30.232227 # ok 800 # SKIP Disabled ZA for VL 4272
6696 22:16:30.232325 # ok 801 # SKIP Get and set data for VL 4272
6697 22:16:30.232422 # ok 802 Set VL 4288
6698 22:16:30.232513 # ok 803 # SKIP Disabled ZA for VL 4288
6699 22:16:30.232625 # ok 804 # SKIP Get and set data for VL 4288
6700 22:16:30.232722 # ok 805 Set VL 4304
6701 22:16:30.232816 # ok 806 # SKIP Disabled ZA for VL 4304
6702 22:16:30.232908 # ok 807 # SKIP Get and set data for VL 4304
6703 22:16:30.233001 # ok 808 Set VL 4320
6704 22:16:30.233093 # ok 809 # SKIP Disabled ZA for VL 4320
6705 22:16:30.233205 # ok 810 # SKIP Get and set data for VL 4320
6706 22:16:30.233300 # ok 811 Set VL 4336
6707 22:16:30.233393 # ok 812 # SKIP Disabled ZA for VL 4336
6708 22:16:30.233483 # ok 813 # SKIP Get and set data for VL 4336
6709 22:16:30.233578 # ok 814 Set VL 4352
6710 22:16:30.233681 # ok 815 # SKIP Disabled ZA for VL 4352
6711 22:16:30.233796 # ok 816 # SKIP Get and set data for VL 4352
6712 22:16:30.233893 # ok 817 Set VL 4368
6713 22:16:30.233982 # ok 818 # SKIP Disabled ZA for VL 4368
6714 22:16:30.234071 # ok 819 # SKIP Get and set data for VL 4368
6715 22:16:30.234158 # ok 820 Set VL 4384
6716 22:16:30.234244 # ok 821 # SKIP Disabled ZA for VL 4384
6717 22:16:30.240990 # ok 822 # SKIP Get and set data for VL 4384
6718 22:16:30.241205 # ok 823 Set VL 4400
6719 22:16:30.241320 # ok 824 # SKIP Disabled ZA for VL 4400
6720 22:16:30.241419 # ok 825 # SKIP Get and set data for VL 4400
6721 22:16:30.241512 # ok 826 Set VL 4416
6722 22:16:30.241624 # ok 827 # SKIP Disabled ZA for VL 4416
6723 22:16:30.241733 # ok 828 # SKIP Get and set data for VL 4416
6724 22:16:30.241846 # ok 829 Set VL 4432
6725 22:16:30.241942 # ok 830 # SKIP Disabled ZA for VL 4432
6726 22:16:30.242034 # ok 831 # SKIP Get and set data for VL 4432
6727 22:16:30.242141 # ok 832 Set VL 4448
6728 22:16:30.242231 # ok 833 # SKIP Disabled ZA for VL 4448
6729 22:16:30.247257 # ok 834 # SKIP Get and set data for VL 4448
6730 22:16:30.247689 # ok 835 Set VL 4464
6731 22:16:30.247797 # ok 836 # SKIP Disabled ZA for VL 4464
6732 22:16:30.247891 # ok 837 # SKIP Get and set data for VL 4464
6733 22:16:30.247986 # ok 838 Set VL 4480
6734 22:16:30.248099 # ok 839 # SKIP Disabled ZA for VL 4480
6735 22:16:30.248197 # ok 840 # SKIP Get and set data for VL 4480
6736 22:16:30.248290 # ok 841 Set VL 4496
6737 22:16:30.248379 # ok 842 # SKIP Disabled ZA for VL 4496
6738 22:16:30.248490 # ok 843 # SKIP Get and set data for VL 4496
6739 22:16:30.248586 # ok 844 Set VL 4512
6740 22:16:30.248678 # ok 845 # SKIP Disabled ZA for VL 4512
6741 22:16:30.248769 # ok 846 # SKIP Get and set data for VL 4512
6742 22:16:30.248861 # ok 847 Set VL 4528
6743 22:16:30.248972 # ok 848 # SKIP Disabled ZA for VL 4528
6744 22:16:30.249066 # ok 849 # SKIP Get and set data for VL 4528
6745 22:16:30.249157 # ok 850 Set VL 4544
6746 22:16:30.249249 # ok 851 # SKIP Disabled ZA for VL 4544
6747 22:16:30.249356 # ok 852 # SKIP Get and set data for VL 4544
6748 22:16:30.249450 # ok 853 Set VL 4560
6749 22:16:30.249543 # ok 854 # SKIP Disabled ZA for VL 4560
6750 22:16:30.249637 # ok 855 # SKIP Get and set data for VL 4560
6751 22:16:30.249759 # ok 856 Set VL 4576
6752 22:16:30.249854 # ok 857 # SKIP Disabled ZA for VL 4576
6753 22:16:30.249945 # ok 858 # SKIP Get and set data for VL 4576
6754 22:16:30.250037 # ok 859 Set VL 4592
6755 22:16:30.250142 # ok 860 # SKIP Disabled ZA for VL 4592
6756 22:16:30.250233 # ok 861 # SKIP Get and set data for VL 4592
6757 22:16:30.250321 # ok 862 Set VL 4608
6758 22:16:30.250406 # ok 863 # SKIP Disabled ZA for VL 4608
6759 22:16:30.259622 # ok 864 # SKIP Get and set data for VL 4608
6760 22:16:30.259837 # ok 865 Set VL 4624
6761 22:16:30.259955 # ok 866 # SKIP Disabled ZA for VL 4624
6762 22:16:30.260052 # ok 867 # SKIP Get and set data for VL 4624
6763 22:16:30.260145 # ok 868 Set VL 4640
6764 22:16:30.260255 # ok 869 # SKIP Disabled ZA for VL 4640
6765 22:16:30.260350 # ok 870 # SKIP Get and set data for VL 4640
6766 22:16:30.260461 # ok 871 Set VL 4656
6767 22:16:30.260557 # ok 872 # SKIP Disabled ZA for VL 4656
6768 22:16:30.260655 # ok 873 # SKIP Get and set data for VL 4656
6769 22:16:30.260747 # ok 874 Set VL 4672
6770 22:16:30.260856 # ok 875 # SKIP Disabled ZA for VL 4672
6771 22:16:30.260951 # ok 876 # SKIP Get and set data for VL 4672
6772 22:16:30.261047 # ok 877 Set VL 4688
6773 22:16:30.261157 # ok 878 # SKIP Disabled ZA for VL 4688
6774 22:16:30.261254 # ok 879 # SKIP Get and set data for VL 4688
6775 22:16:30.261361 # ok 880 Set VL 4704
6776 22:16:30.261471 # ok 881 # SKIP Disabled ZA for VL 4704
6777 22:16:30.261584 # ok 882 # SKIP Get and set data for VL 4704
6778 22:16:30.261692 # ok 883 Set VL 4720
6779 22:16:30.261804 # ok 884 # SKIP Disabled ZA for VL 4720
6780 22:16:30.261918 # ok 885 # SKIP Get and set data for VL 4720
6781 22:16:30.262012 # ok 886 Set VL 4736
6782 22:16:30.262120 # ok 887 # SKIP Disabled ZA for VL 4736
6783 22:16:30.275377 # ok 888 # SKIP Get and set data for VL 4736
6784 22:16:30.275889 # ok 889 Set VL 4752
6785 22:16:30.276047 # ok 890 # SKIP Disabled ZA for VL 4752
6786 22:16:30.276201 # ok 891 # SKIP Get and set data for VL 4752
6787 22:16:30.276365 # ok 892 Set VL 4768
6788 22:16:30.276559 # ok 893 # SKIP Disabled ZA for VL 4768
6789 22:16:30.276726 # ok 894 # SKIP Get and set data for VL 4768
6790 22:16:30.276879 # ok 895 Set VL 4784
6791 22:16:30.277033 # ok 896 # SKIP Disabled ZA for VL 4784
6792 22:16:30.277188 # ok 897 # SKIP Get and set data for VL 4784
6793 22:16:30.277342 # ok 898 Set VL 4800
6794 22:16:30.277495 # ok 899 # SKIP Disabled ZA for VL 4800
6795 22:16:30.277687 # ok 900 # SKIP Get and set data for VL 4800
6796 22:16:30.277836 # ok 901 Set VL 4816
6797 22:16:30.277980 # ok 902 # SKIP Disabled ZA for VL 4816
6798 22:16:30.278113 # ok 903 # SKIP Get and set data for VL 4816
6799 22:16:30.278236 # ok 904 Set VL 4832
6800 22:16:30.278357 # ok 905 # SKIP Disabled ZA for VL 4832
6801 22:16:30.278478 # ok 906 # SKIP Get and set data for VL 4832
6802 22:16:30.278600 # ok 907 Set VL 4848
6803 22:16:30.278721 # ok 908 # SKIP Disabled ZA for VL 4848
6804 22:16:30.278840 # ok 909 # SKIP Get and set data for VL 4848
6805 22:16:30.278959 # ok 910 Set VL 4864
6806 22:16:30.279104 # ok 911 # SKIP Disabled ZA for VL 4864
6807 22:16:30.279236 # ok 912 # SKIP Get and set data for VL 4864
6808 22:16:30.279358 # ok 913 Set VL 4880
6809 22:16:30.287006 # ok 914 # SKIP Disabled ZA for VL 4880
6810 22:16:30.287608 # ok 915 # SKIP Get and set data for VL 4880
6811 22:16:30.287811 # ok 916 Set VL 4896
6812 22:16:30.287994 # ok 917 # SKIP Disabled ZA for VL 4896
6813 22:16:30.288172 # ok 918 # SKIP Get and set data for VL 4896
6814 22:16:30.288352 # ok 919 Set VL 4912
6815 22:16:30.288563 # ok 920 # SKIP Disabled ZA for VL 4912
6816 22:16:30.288746 # ok 921 # SKIP Get and set data for VL 4912
6817 22:16:30.288922 # ok 922 Set VL 4928
6818 22:16:30.289098 # ok 923 # SKIP Disabled ZA for VL 4928
6819 22:16:30.289274 # ok 924 # SKIP Get and set data for VL 4928
6820 22:16:30.289451 # ok 925 Set VL 4944
6821 22:16:30.289627 # ok 926 # SKIP Disabled ZA for VL 4944
6822 22:16:30.289815 # ok 927 # SKIP Get and set data for VL 4944
6823 22:16:30.289991 # ok 928 Set VL 4960
6824 22:16:30.290167 # ok 929 # SKIP Disabled ZA for VL 4960
6825 22:16:30.290384 # ok 930 # SKIP Get and set data for VL 4960
6826 22:16:30.290565 # ok 931 Set VL 4976
6827 22:16:30.290740 # ok 932 # SKIP Disabled ZA for VL 4976
6828 22:16:30.290914 # ok 933 # SKIP Get and set data for VL 4976
6829 22:16:30.291089 # ok 934 Set VL 4992
6830 22:16:30.291264 # ok 935 # SKIP Disabled ZA for VL 4992
6831 22:16:30.291439 # ok 936 # SKIP Get and set data for VL 4992
6832 22:16:30.291614 # ok 937 Set VL 5008
6833 22:16:30.291788 # ok 938 # SKIP Disabled ZA for VL 5008
6834 22:16:30.291962 # ok 939 # SKIP Get and set data for VL 5008
6835 22:16:30.292137 # ok 940 Set VL 5024
6836 22:16:30.292310 # ok 941 # SKIP Disabled ZA for VL 5024
6837 22:16:30.292482 # ok 942 # SKIP Get and set data for VL 5024
6838 22:16:30.292656 # ok 943 Set VL 5040
6839 22:16:30.304722 # ok 944 # SKIP Disabled ZA for VL 5040
6840 22:16:30.305223 # ok 945 # SKIP Get and set data for VL 5040
6841 22:16:30.305411 # ok 946 Set VL 5056
6842 22:16:30.305587 # ok 947 # SKIP Disabled ZA for VL 5056
6843 22:16:30.305789 # ok 948 # SKIP Get and set data for VL 5056
6844 22:16:30.306013 # ok 949 Set VL 5072
6845 22:16:30.306194 # ok 950 # SKIP Disabled ZA for VL 5072
6846 22:16:30.306367 # ok 951 # SKIP Get and set data for VL 5072
6847 22:16:30.306513 # ok 952 Set VL 5088
6848 22:16:30.306655 # ok 953 # SKIP Disabled ZA for VL 5088
6849 22:16:30.306797 # ok 954 # SKIP Get and set data for VL 5088
6850 22:16:30.306939 # ok 955 Set VL 5104
6851 22:16:30.307079 # ok 956 # SKIP Disabled ZA for VL 5104
6852 22:16:30.319069 # ok 957 # SKIP Get and set data for VL 5104
6853 22:16:30.319542 # ok 958 Set VL 5120
6854 22:16:30.319647 # ok 959 # SKIP Disabled ZA for VL 5120
6855 22:16:30.319750 # ok 960 # SKIP Get and set data for VL 5120
6856 22:16:30.319857 # ok 961 Set VL 5136
6857 22:16:30.319972 # ok 962 # SKIP Disabled ZA for VL 5136
6858 22:16:30.320073 # ok 963 # SKIP Get and set data for VL 5136
6859 22:16:30.320192 # ok 964 Set VL 5152
6860 22:16:30.320300 # ok 965 # SKIP Disabled ZA for VL 5152
6861 22:16:30.320404 # ok 966 # SKIP Get and set data for VL 5152
6862 22:16:30.320516 # ok 967 Set VL 5168
6863 22:16:30.320619 # ok 968 # SKIP Disabled ZA for VL 5168
6864 22:16:30.320740 # ok 969 # SKIP Get and set data for VL 5168
6865 22:16:30.320838 # ok 970 Set VL 5184
6866 22:16:30.320943 # ok 971 # SKIP Disabled ZA for VL 5184
6867 22:16:30.321047 # ok 972 # SKIP Get and set data for VL 5184
6868 22:16:30.321160 # ok 973 Set VL 5200
6869 22:16:30.321260 # ok 974 # SKIP Disabled ZA for VL 5200
6870 22:16:30.321359 # ok 975 # SKIP Get and set data for VL 5200
6871 22:16:30.321455 # ok 976 Set VL 5216
6872 22:16:30.321558 # ok 977 # SKIP Disabled ZA for VL 5216
6873 22:16:30.321676 # ok 978 # SKIP Get and set data for VL 5216
6874 22:16:30.321764 # ok 979 Set VL 5232
6875 22:16:30.322070 # ok 980 # SKIP Disabled ZA for VL 5232
6876 22:16:30.322173 # ok 981 # SKIP Get and set data for VL 5232
6877 22:16:30.322261 # ok 982 Set VL 5248
6878 22:16:30.322338 # ok 983 # SKIP Disabled ZA for VL 5248
6879 22:16:30.322415 # ok 984 # SKIP Get and set data for VL 5248
6880 22:16:30.322488 # ok 985 Set VL 5264
6881 22:16:30.322563 # ok 986 # SKIP Disabled ZA for VL 5264
6882 22:16:30.322639 # ok 987 # SKIP Get and set data for VL 5264
6883 22:16:30.322714 # ok 988 Set VL 5280
6884 22:16:30.322789 # ok 989 # SKIP Disabled ZA for VL 5280
6885 22:16:30.322862 # ok 990 # SKIP Get and set data for VL 5280
6886 22:16:30.335297 # ok 991 Set VL 5296
6887 22:16:30.335522 # ok 992 # SKIP Disabled ZA for VL 5296
6888 22:16:30.335835 # ok 993 # SKIP Get and set data for VL 5296
6889 22:16:30.335929 # ok 994 Set VL 5312
6890 22:16:30.336031 # ok 995 # SKIP Disabled ZA for VL 5312
6891 22:16:30.336111 # ok 996 # SKIP Get and set data for VL 5312
6892 22:16:30.336177 # ok 997 Set VL 5328
6893 22:16:30.336279 # ok 998 # SKIP Disabled ZA for VL 5328
6894 22:16:30.336430 # ok 999 # SKIP Get and set data for VL 5328
6895 22:16:30.336563 # ok 1000 Set VL 5344
6896 22:16:30.336688 # ok 1001 # SKIP Disabled ZA for VL 5344
6897 22:16:30.336813 # ok 1002 # SKIP Get and set data for VL 5344
6898 22:16:30.336934 # ok 1003 Set VL 5360
6899 22:16:30.337056 # ok 1004 # SKIP Disabled ZA for VL 5360
6900 22:16:30.337176 # ok 1005 # SKIP Get and set data for VL 5360
6901 22:16:30.337324 # ok 1006 Set VL 5376
6902 22:16:30.337452 # ok 1007 # SKIP Disabled ZA for VL 5376
6903 22:16:30.337578 # ok 1008 # SKIP Get and set data for VL 5376
6904 22:16:30.337751 # ok 1009 Set VL 5392
6905 22:16:30.337954 # ok 1010 # SKIP Disabled ZA for VL 5392
6906 22:16:30.338139 # ok 1011 # SKIP Get and set data for VL 5392
6907 22:16:30.338322 # ok 1012 Set VL 5408
6908 22:16:30.338464 # ok 1013 # SKIP Disabled ZA for VL 5408
6909 22:16:30.338606 # ok 1014 # SKIP Get and set data for VL 5408
6910 22:16:30.338749 # ok 1015 Set VL 5424
6911 22:16:30.338891 # ok 1016 # SKIP Disabled ZA for VL 5424
6912 22:16:30.339076 # ok 1017 # SKIP Get and set data for VL 5424
6913 22:16:30.339215 # ok 1018 Set VL 5440
6914 22:16:30.339360 # ok 1019 # SKIP Disabled ZA for VL 5440
6915 22:16:30.339504 # ok 1020 # SKIP Get and set data for VL 5440
6916 22:16:30.339648 # ok 1021 Set VL 5456
6917 22:16:30.339790 # ok 1022 # SKIP Disabled ZA for VL 5456
6918 22:16:30.339931 # ok 1023 # SKIP Get and set data for VL 5456
6919 22:16:30.340074 # ok 1024 Set VL 5472
6920 22:16:30.347409 # ok 1025 # SKIP Disabled ZA for VL 5472
6921 22:16:30.347988 # ok 1026 # SKIP Get and set data for VL 5472
6922 22:16:30.348186 # ok 1027 Set VL 5488
6923 22:16:30.348364 # ok 1028 # SKIP Disabled ZA for VL 5488
6924 22:16:30.348512 # ok 1029 # SKIP Get and set data for VL 5488
6925 22:16:30.348655 # ok 1030 Set VL 5504
6926 22:16:30.348797 # ok 1031 # SKIP Disabled ZA for VL 5504
6927 22:16:30.348938 # ok 1032 # SKIP Get and set data for VL 5504
6928 22:16:30.349081 # ok 1033 Set VL 5520
6929 22:16:30.349265 # ok 1034 # SKIP Disabled ZA for VL 5520
6930 22:16:30.349405 # ok 1035 # SKIP Get and set data for VL 5520
6931 22:16:30.349551 # ok 1036 Set VL 5536
6932 22:16:30.349707 # ok 1037 # SKIP Disabled ZA for VL 5536
6933 22:16:30.349854 # ok 1038 # SKIP Get and set data for VL 5536
6934 22:16:30.349996 # ok 1039 Set VL 5552
6935 22:16:30.350136 # ok 1040 # SKIP Disabled ZA for VL 5552
6936 22:16:30.350281 # ok 1041 # SKIP Get and set data for VL 5552
6937 22:16:30.350424 # ok 1042 Set VL 5568
6938 22:16:30.350566 # ok 1043 # SKIP Disabled ZA for VL 5568
6939 22:16:30.350709 # ok 1044 # SKIP Get and set data for VL 5568
6940 22:16:30.350851 # ok 1045 Set VL 5584
6941 22:16:30.350991 # ok 1046 # SKIP Disabled ZA for VL 5584
6942 22:16:30.351171 # ok 1047 # SKIP Get and set data for VL 5584
6943 22:16:30.351310 # ok 1048 Set VL 5600
6944 22:16:30.351451 # ok 1049 # SKIP Disabled ZA for VL 5600
6945 22:16:30.351595 # ok 1050 # SKIP Get and set data for VL 5600
6946 22:16:30.351736 # ok 1051 Set VL 5616
6947 22:16:30.351878 # ok 1052 # SKIP Disabled ZA for VL 5616
6948 22:16:30.356589 # ok 1053 # SKIP Get and set data for VL 5616
6949 22:16:30.356817 # ok 1054 Set VL 5632
6950 22:16:30.356910 # ok 1055 # SKIP Disabled ZA for VL 5632
6951 22:16:30.357015 # ok 1056 # SKIP Get and set data for VL 5632
6952 22:16:30.357103 # ok 1057 Set VL 5648
6953 22:16:30.357189 # ok 1058 # SKIP Disabled ZA for VL 5648
6954 22:16:30.357276 # ok 1059 # SKIP Get and set data for VL 5648
6955 22:16:30.357362 # ok 1060 Set VL 5664
6956 22:16:30.357465 # ok 1061 # SKIP Disabled ZA for VL 5664
6957 22:16:30.357555 # ok 1062 # SKIP Get and set data for VL 5664
6958 22:16:30.357637 # ok 1063 Set VL 5680
6959 22:16:30.357730 # ok 1064 # SKIP Disabled ZA for VL 5680
6960 22:16:30.357835 # ok 1065 # SKIP Get and set data for VL 5680
6961 22:16:30.357922 # ok 1066 Set VL 5696
6962 22:16:30.358008 # ok 1067 # SKIP Disabled ZA for VL 5696
6963 22:16:30.358095 # ok 1068 # SKIP Get and set data for VL 5696
6964 22:16:30.358178 # ok 1069 Set VL 5712
6965 22:16:30.358261 # ok 1070 # SKIP Disabled ZA for VL 5712
6966 22:16:30.358370 # ok 1071 # SKIP Get and set data for VL 5712
6967 22:16:30.358461 # ok 1072 Set VL 5728
6968 22:16:30.361637 # ok 1073 # SKIP Disabled ZA for VL 5728
6969 22:16:30.362084 # ok 1074 # SKIP Get and set data for VL 5728
6970 22:16:30.362257 # ok 1075 Set VL 5744
6971 22:16:30.362432 # ok 1076 # SKIP Disabled ZA for VL 5744
6972 22:16:30.362577 # ok 1077 # SKIP Get and set data for VL 5744
6973 22:16:30.362753 # ok 1078 Set VL 5760
6974 22:16:30.366133 # ok 1079 # SKIP Disabled ZA for VL 5760
6975 22:16:30.371269 # ok 1080 # SKIP Get and set data for VL 5760
6976 22:16:30.371585 # ok 1081 Set VL 5776
6977 22:16:30.371930 # ok 1082 # SKIP Disabled ZA for VL 5776
6978 22:16:30.372034 # ok 1083 # SKIP Get and set data for VL 5776
6979 22:16:30.372119 # ok 1084 Set VL 5792
6980 22:16:30.372201 # ok 1085 # SKIP Disabled ZA for VL 5792
6981 22:16:30.372288 # ok 1086 # SKIP Get and set data for VL 5792
6982 22:16:30.372375 # ok 1087 Set VL 5808
6983 22:16:30.372482 # ok 1088 # SKIP Disabled ZA for VL 5808
6984 22:16:30.372575 # ok 1089 # SKIP Get and set data for VL 5808
6985 22:16:30.372665 # ok 1090 Set VL 5824
6986 22:16:30.372747 # ok 1091 # SKIP Disabled ZA for VL 5824
6987 22:16:30.372826 # ok 1092 # SKIP Get and set data for VL 5824
6988 22:16:30.372907 # ok 1093 Set VL 5840
6989 22:16:30.372987 # ok 1094 # SKIP Disabled ZA for VL 5840
6990 22:16:30.373069 # ok 1095 # SKIP Get and set data for VL 5840
6991 22:16:30.373150 # ok 1096 Set VL 5856
6992 22:16:30.373251 # ok 1097 # SKIP Disabled ZA for VL 5856
6993 22:16:30.373338 # ok 1098 # SKIP Get and set data for VL 5856
6994 22:16:30.373419 # ok 1099 Set VL 5872
6995 22:16:30.373497 # ok 1100 # SKIP Disabled ZA for VL 5872
6996 22:16:30.373576 # ok 1101 # SKIP Get and set data for VL 5872
6997 22:16:30.373665 # ok 1102 Set VL 5888
6998 22:16:30.373747 # ok 1103 # SKIP Disabled ZA for VL 5888
6999 22:16:30.373845 # ok 1104 # SKIP Get and set data for VL 5888
7000 22:16:30.373929 # ok 1105 Set VL 5904
7001 22:16:30.374011 # ok 1106 # SKIP Disabled ZA for VL 5904
7002 22:16:30.374091 # ok 1107 # SKIP Get and set data for VL 5904
7003 22:16:30.374172 # ok 1108 Set VL 5920
7004 22:16:30.374254 # ok 1109 # SKIP Disabled ZA for VL 5920
7005 22:16:30.374353 # ok 1110 # SKIP Get and set data for VL 5920
7006 22:16:30.374441 # ok 1111 Set VL 5936
7007 22:16:30.374524 # ok 1112 # SKIP Disabled ZA for VL 5936
7008 22:16:30.379365 # ok 1113 # SKIP Get and set data for VL 5936
7009 22:16:30.379595 # ok 1114 Set VL 5952
7010 22:16:30.379918 # ok 1115 # SKIP Disabled ZA for VL 5952
7011 22:16:30.380054 # ok 1116 # SKIP Get and set data for VL 5952
7012 22:16:30.380183 # ok 1117 Set VL 5968
7013 22:16:30.380307 # ok 1118 # SKIP Disabled ZA for VL 5968
7014 22:16:30.380471 # ok 1119 # SKIP Get and set data for VL 5968
7015 22:16:30.380632 # ok 1120 Set VL 5984
7016 22:16:30.380789 # ok 1121 # SKIP Disabled ZA for VL 5984
7017 22:16:30.380964 # ok 1122 # SKIP Get and set data for VL 5984
7018 22:16:30.381099 # ok 1123 Set VL 6000
7019 22:16:30.381254 # ok 1124 # SKIP Disabled ZA for VL 6000
7020 22:16:30.381397 # ok 1125 # SKIP Get and set data for VL 6000
7021 22:16:30.381554 # ok 1126 Set VL 6016
7022 22:16:30.381706 # ok 1127 # SKIP Disabled ZA for VL 6016
7023 22:16:30.381864 # ok 1128 # SKIP Get and set data for VL 6016
7024 22:16:30.382008 # ok 1129 Set VL 6032
7025 22:16:30.382131 # ok 1130 # SKIP Disabled ZA for VL 6032
7026 22:16:30.382249 # ok 1131 # SKIP Get and set data for VL 6032
7027 22:16:30.382368 # ok 1132 Set VL 6048
7028 22:16:30.382484 # ok 1133 # SKIP Disabled ZA for VL 6048
7029 22:16:30.382635 # ok 1134 # SKIP Get and set data for VL 6048
7030 22:16:30.382760 # ok 1135 Set VL 6064
7031 22:16:30.382880 # ok 1136 # SKIP Disabled ZA for VL 6064
7032 22:16:30.382998 # ok 1137 # SKIP Get and set data for VL 6064
7033 22:16:30.383116 # ok 1138 Set VL 6080
7034 22:16:30.383233 # ok 1139 # SKIP Disabled ZA for VL 6080
7035 22:16:30.383349 # ok 1140 # SKIP Get and set data for VL 6080
7036 22:16:30.383464 # ok 1141 Set VL 6096
7037 22:16:30.383581 # ok 1142 # SKIP Disabled ZA for VL 6096
7038 22:16:30.383696 # ok 1143 # SKIP Get and set data for VL 6096
7039 22:16:30.383812 # ok 1144 Set VL 6112
7040 22:16:30.383927 # ok 1145 # SKIP Disabled ZA for VL 6112
7041 22:16:30.384044 # ok 1146 # SKIP Get and set data for VL 6112
7042 22:16:30.384159 # ok 1147 Set VL 6128
7043 22:16:30.384275 # ok 1148 # SKIP Disabled ZA for VL 6128
7044 22:16:30.387038 # ok 1149 # SKIP Get and set data for VL 6128
7045 22:16:30.387459 # ok 1150 Set VL 6144
7046 22:16:30.387562 # ok 1151 # SKIP Disabled ZA for VL 6144
7047 22:16:30.387646 # ok 1152 # SKIP Get and set data for VL 6144
7048 22:16:30.387729 # ok 1153 Set VL 6160
7049 22:16:30.387812 # ok 1154 # SKIP Disabled ZA for VL 6160
7050 22:16:30.390719 # ok 1155 # SKIP Get and set data for VL 6160
7051 22:16:30.391069 # ok 1156 Set VL 6176
7052 22:16:30.391166 # ok 1157 # SKIP Disabled ZA for VL 6176
7053 22:16:30.391260 # ok 1158 # SKIP Get and set data for VL 6176
7054 22:16:30.391363 # ok 1159 Set VL 6192
7055 22:16:30.391452 # ok 1160 # SKIP Disabled ZA for VL 6192
7056 22:16:30.391535 # ok 1161 # SKIP Get and set data for VL 6192
7057 22:16:30.391622 # ok 1162 Set VL 6208
7058 22:16:30.391724 # ok 1163 # SKIP Disabled ZA for VL 6208
7059 22:16:30.391812 # ok 1164 # SKIP Get and set data for VL 6208
7060 22:16:30.391896 # ok 1165 Set VL 6224
7061 22:16:30.391995 # ok 1166 # SKIP Disabled ZA for VL 6224
7062 22:16:30.392081 # ok 1167 # SKIP Get and set data for VL 6224
7063 22:16:30.392165 # ok 1168 Set VL 6240
7064 22:16:30.392265 # ok 1169 # SKIP Disabled ZA for VL 6240
7065 22:16:30.392357 # ok 1170 # SKIP Get and set data for VL 6240
7066 22:16:30.392443 # ok 1171 Set VL 6256
7067 22:16:30.392545 # ok 1172 # SKIP Disabled ZA for VL 6256
7068 22:16:30.392631 # ok 1173 # SKIP Get and set data for VL 6256
7069 22:16:30.392731 # ok 1174 Set VL 6272
7070 22:16:30.392818 # ok 1175 # SKIP Disabled ZA for VL 6272
7071 22:16:30.392919 # ok 1176 # SKIP Get and set data for VL 6272
7072 22:16:30.393007 # ok 1177 Set VL 6288
7073 22:16:30.393108 # ok 1178 # SKIP Disabled ZA for VL 6288
7074 22:16:30.393209 # ok 1179 # SKIP Get and set data for VL 6288
7075 22:16:30.393309 # ok 1180 Set VL 6304
7076 22:16:30.393409 # ok 1181 # SKIP Disabled ZA for VL 6304
7077 22:16:30.393936 # ok 1182 # SKIP Get and set data for VL 6304
7078 22:16:30.394040 # ok 1183 Set VL 6320
7079 22:16:30.394129 # ok 1184 # SKIP Disabled ZA for VL 6320
7080 22:16:30.394208 # ok 1185 # SKIP Get and set data for VL 6320
7081 22:16:30.394283 # ok 1186 Set VL 6336
7082 22:16:30.394373 # ok 1187 # SKIP Disabled ZA for VL 6336
7083 22:16:30.402181 # ok 1188 # SKIP Get and set data for VL 6336
7084 22:16:30.403238 # ok 1189 Set VL 6352
7085 22:16:30.403364 # ok 1190 # SKIP Disabled ZA for VL 6352
7086 22:16:30.403455 # ok 1191 # SKIP Get and set data for VL 6352
7087 22:16:30.403557 # ok 1192 Set VL 6368
7088 22:16:30.403645 # ok 1193 # SKIP Disabled ZA for VL 6368
7089 22:16:30.403730 # ok 1194 # SKIP Get and set data for VL 6368
7090 22:16:30.403832 # ok 1195 Set VL 6384
7091 22:16:30.403919 # ok 1196 # SKIP Disabled ZA for VL 6384
7092 22:16:30.404019 # ok 1197 # SKIP Get and set data for VL 6384
7093 22:16:30.404106 # ok 1198 Set VL 6400
7094 22:16:30.404207 # ok 1199 # SKIP Disabled ZA for VL 6400
7095 22:16:30.404311 # ok 1200 # SKIP Get and set data for VL 6400
7096 22:16:30.404399 # ok 1201 Set VL 6416
7097 22:16:30.404498 # ok 1202 # SKIP Disabled ZA for VL 6416
7098 22:16:30.404598 # ok 1203 # SKIP Get and set data for VL 6416
7099 22:16:30.404684 # ok 1204 Set VL 6432
7100 22:16:30.404782 # ok 1205 # SKIP Disabled ZA for VL 6432
7101 22:16:30.404881 # ok 1206 # SKIP Get and set data for VL 6432
7102 22:16:30.404980 # ok 1207 Set VL 6448
7103 22:16:30.405079 # ok 1208 # SKIP Disabled ZA for VL 6448
7104 22:16:30.405535 # ok 1209 # SKIP Get and set data for VL 6448
7105 22:16:30.405639 # ok 1210 Set VL 6464
7106 22:16:30.405734 # ok 1211 # SKIP Disabled ZA for VL 6464
7107 22:16:30.405833 # ok 1212 # SKIP Get and set data for VL 6464
7108 22:16:30.405922 # ok 1213 Set VL 6480
7109 22:16:30.406024 # ok 1214 # SKIP Disabled ZA for VL 6480
7110 22:16:30.406125 # ok 1215 # SKIP Get and set data for VL 6480
7111 22:16:30.406205 # ok 1216 Set VL 6496
7112 22:16:30.409628 # ok 1217 # SKIP Disabled ZA for VL 6496
7113 22:16:30.410048 # ok 1218 # SKIP Get and set data for VL 6496
7114 22:16:30.410153 # ok 1219 Set VL 6512
7115 22:16:30.410238 # ok 1220 # SKIP Disabled ZA for VL 6512
7116 22:16:30.410325 # ok 1221 # SKIP Get and set data for VL 6512
7117 22:16:30.410410 # ok 1222 Set VL 6528
7118 22:16:30.410510 # ok 1223 # SKIP Disabled ZA for VL 6528
7119 22:16:30.415038 # ok 1224 # SKIP Get and set data for VL 6528
7120 22:16:30.415271 # ok 1225 Set VL 6544
7121 22:16:30.415570 # ok 1226 # SKIP Disabled ZA for VL 6544
7122 22:16:30.415676 # ok 1227 # SKIP Get and set data for VL 6544
7123 22:16:30.415765 # ok 1228 Set VL 6560
7124 22:16:30.415853 # ok 1229 # SKIP Disabled ZA for VL 6560
7125 22:16:30.415940 # ok 1230 # SKIP Get and set data for VL 6560
7126 22:16:30.416042 # ok 1231 Set VL 6576
7127 22:16:30.416129 # ok 1232 # SKIP Disabled ZA for VL 6576
7128 22:16:30.416214 # ok 1233 # SKIP Get and set data for VL 6576
7129 22:16:30.416298 # ok 1234 Set VL 6592
7130 22:16:30.416398 # ok 1235 # SKIP Disabled ZA for VL 6592
7131 22:16:30.416486 # ok 1236 # SKIP Get and set data for VL 6592
7132 22:16:30.416571 # ok 1237 Set VL 6608
7133 22:16:30.416672 # ok 1238 # SKIP Disabled ZA for VL 6608
7134 22:16:30.417029 # ok 1239 # SKIP Get and set data for VL 6608
7135 22:16:30.417192 # ok 1240 Set VL 6624
7136 22:16:30.417319 # ok 1241 # SKIP Disabled ZA for VL 6624
7137 22:16:30.417474 # ok 1242 # SKIP Get and set data for VL 6624
7138 22:16:30.417904 # ok 1243 Set VL 6640
7139 22:16:30.418099 # ok 1244 # SKIP Disabled ZA for VL 6640
7140 22:16:30.418231 # ok 1245 # SKIP Get and set data for VL 6640
7141 22:16:30.418348 # ok 1246 Set VL 6656
7142 22:16:30.418461 # ok 1247 # SKIP Disabled ZA for VL 6656
7143 22:16:30.418574 # ok 1248 # SKIP Get and set data for VL 6656
7144 22:16:30.418687 # ok 1249 Set VL 6672
7145 22:16:30.418801 # ok 1250 # SKIP Disabled ZA for VL 6672
7146 22:16:30.418915 # ok 1251 # SKIP Get and set data for VL 6672
7147 22:16:30.419028 # ok 1252 Set VL 6688
7148 22:16:30.419168 # ok 1253 # SKIP Disabled ZA for VL 6688
7149 22:16:30.419286 # ok 1254 # SKIP Get and set data for VL 6688
7150 22:16:30.419401 # ok 1255 Set VL 6704
7151 22:16:30.423018 # ok 1256 # SKIP Disabled ZA for VL 6704
7152 22:16:30.423515 # ok 1257 # SKIP Get and set data for VL 6704
7153 22:16:30.423703 # ok 1258 Set VL 6720
7154 22:16:30.423861 # ok 1259 # SKIP Disabled ZA for VL 6720
7155 22:16:30.424042 # ok 1260 # SKIP Get and set data for VL 6720
7156 22:16:30.424239 # ok 1261 Set VL 6736
7157 22:16:30.424409 # ok 1262 # SKIP Disabled ZA for VL 6736
7158 22:16:30.424619 # ok 1263 # SKIP Get and set data for VL 6736
7159 22:16:30.424769 # ok 1264 Set VL 6752
7160 22:16:30.424893 # ok 1265 # SKIP Disabled ZA for VL 6752
7161 22:16:30.425013 # ok 1266 # SKIP Get and set data for VL 6752
7162 22:16:30.425133 # ok 1267 Set VL 6768
7163 22:16:30.425253 # ok 1268 # SKIP Disabled ZA for VL 6768
7164 22:16:30.425372 # ok 1269 # SKIP Get and set data for VL 6768
7165 22:16:30.425491 # ok 1270 Set VL 6784
7166 22:16:30.425623 # ok 1271 # SKIP Disabled ZA for VL 6784
7167 22:16:30.425817 # ok 1272 # SKIP Get and set data for VL 6784
7168 22:16:30.425978 # ok 1273 Set VL 6800
7169 22:16:30.426125 # ok 1274 # SKIP Disabled ZA for VL 6800
7170 22:16:30.426247 # ok 1275 # SKIP Get and set data for VL 6800
7171 22:16:30.426370 # ok 1276 Set VL 6816
7172 22:16:30.426521 # ok 1277 # SKIP Disabled ZA for VL 6816
7173 22:16:30.426645 # ok 1278 # SKIP Get and set data for VL 6816
7174 22:16:30.426763 # ok 1279 Set VL 6832
7175 22:16:30.426883 # ok 1280 # SKIP Disabled ZA for VL 6832
7176 22:16:30.427001 # ok 1281 # SKIP Get and set data for VL 6832
7177 22:16:30.427119 # ok 1282 Set VL 6848
7178 22:16:30.427236 # ok 1283 # SKIP Disabled ZA for VL 6848
7179 22:16:30.427352 # ok 1284 # SKIP Get and set data for VL 6848
7180 22:16:30.430872 # ok 1285 Set VL 6864
7181 22:16:30.431264 # ok 1286 # SKIP Disabled ZA for VL 6864
7182 22:16:30.431360 # ok 1287 # SKIP Get and set data for VL 6864
7183 22:16:30.431449 # ok 1288 Set VL 6880
7184 22:16:30.431535 # ok 1289 # SKIP Disabled ZA for VL 6880
7185 22:16:30.431623 # ok 1290 # SKIP Get and set data for VL 6880
7186 22:16:30.431709 # ok 1291 Set VL 6896
7187 22:16:30.431812 # ok 1292 # SKIP Disabled ZA for VL 6896
7188 22:16:30.431899 # ok 1293 # SKIP Get and set data for VL 6896
7189 22:16:30.431986 # ok 1294 Set VL 6912
7190 22:16:30.432072 # ok 1295 # SKIP Disabled ZA for VL 6912
7191 22:16:30.432175 # ok 1296 # SKIP Get and set data for VL 6912
7192 22:16:30.432264 # ok 1297 Set VL 6928
7193 22:16:30.432349 # ok 1298 # SKIP Disabled ZA for VL 6928
7194 22:16:30.432434 # ok 1299 # SKIP Get and set data for VL 6928
7195 22:16:30.432535 # ok 1300 Set VL 6944
7196 22:16:30.432621 # ok 1301 # SKIP Disabled ZA for VL 6944
7197 22:16:30.432708 # ok 1302 # SKIP Get and set data for VL 6944
7198 22:16:30.432794 # ok 1303 Set VL 6960
7199 22:16:30.432897 # ok 1304 # SKIP Disabled ZA for VL 6960
7200 22:16:30.432986 # ok 1305 # SKIP Get and set data for VL 6960
7201 22:16:30.433072 # ok 1306 Set VL 6976
7202 22:16:30.433172 # ok 1307 # SKIP Disabled ZA for VL 6976
7203 22:16:30.433260 # ok 1308 # SKIP Get and set data for VL 6976
7204 22:16:30.433345 # ok 1309 Set VL 6992
7205 22:16:30.433447 # ok 1310 # SKIP Disabled ZA for VL 6992
7206 22:16:30.433533 # ok 1311 # SKIP Get and set data for VL 6992
7207 22:16:30.433615 # ok 1312 Set VL 7008
7208 22:16:30.433723 # ok 1313 # SKIP Disabled ZA for VL 7008
7209 22:16:30.433808 # ok 1314 # SKIP Get and set data for VL 7008
7210 22:16:30.433906 # ok 1315 Set VL 7024
7211 22:16:30.433991 # ok 1316 # SKIP Disabled ZA for VL 7024
7212 22:16:30.434084 # ok 1317 # SKIP Get and set data for VL 7024
7213 22:16:30.443303 # ok 1318 Set VL 7040
7214 22:16:30.443909 # ok 1319 # SKIP Disabled ZA for VL 7040
7215 22:16:30.444116 # ok 1320 # SKIP Get and set data for VL 7040
7216 22:16:30.444254 # ok 1321 Set VL 7056
7217 22:16:30.444411 # ok 1322 # SKIP Disabled ZA for VL 7056
7218 22:16:30.444561 # ok 1323 # SKIP Get and set data for VL 7056
7219 22:16:30.444719 # ok 1324 Set VL 7072
7220 22:16:30.444911 # ok 1325 # SKIP Disabled ZA for VL 7072
7221 22:16:30.445076 # ok 1326 # SKIP Get and set data for VL 7072
7222 22:16:30.445220 # ok 1327 Set VL 7088
7223 22:16:30.445349 # ok 1328 # SKIP Disabled ZA for VL 7088
7224 22:16:30.445477 # ok 1329 # SKIP Get and set data for VL 7088
7225 22:16:30.445618 # ok 1330 Set VL 7104
7226 22:16:30.445784 # ok 1331 # SKIP Disabled ZA for VL 7104
7227 22:16:30.445948 # ok 1332 # SKIP Get and set data for VL 7104
7228 22:16:30.446104 # ok 1333 Set VL 7120
7229 22:16:30.446225 # ok 1334 # SKIP Disabled ZA for VL 7120
7230 22:16:30.446343 # ok 1335 # SKIP Get and set data for VL 7120
7231 22:16:30.446460 # ok 1336 Set VL 7136
7232 22:16:30.446575 # ok 1337 # SKIP Disabled ZA for VL 7136
7233 22:16:30.446725 # ok 1338 # SKIP Get and set data for VL 7136
7234 22:16:30.446846 # ok 1339 Set VL 7152
7235 22:16:30.446965 # ok 1340 # SKIP Disabled ZA for VL 7152
7236 22:16:30.447082 # ok 1341 # SKIP Get and set data for VL 7152
7237 22:16:30.447196 # ok 1342 Set VL 7168
7238 22:16:30.447310 # ok 1343 # SKIP Disabled ZA for VL 7168
7239 22:16:30.447427 # ok 1344 # SKIP Get and set data for VL 7168
7240 22:16:30.447542 # ok 1345 Set VL 7184
7241 22:16:30.447657 # ok 1346 # SKIP Disabled ZA for VL 7184
7242 22:16:30.447772 # ok 1347 # SKIP Get and set data for VL 7184
7243 22:16:30.447887 # ok 1348 Set VL 7200
7244 22:16:30.448003 # ok 1349 # SKIP Disabled ZA for VL 7200
7245 22:16:30.448120 # ok 1350 # SKIP Get and set data for VL 7200
7246 22:16:30.452018 # ok 1351 Set VL 7216
7247 22:16:30.452564 # ok 1352 # SKIP Disabled ZA for VL 7216
7248 22:16:30.452727 # ok 1353 # SKIP Get and set data for VL 7216
7249 22:16:30.452888 # ok 1354 Set VL 7232
7250 22:16:30.453019 # ok 1355 # SKIP Disabled ZA for VL 7232
7251 22:16:30.453161 # ok 1356 # SKIP Get and set data for VL 7232
7252 22:16:30.453305 # ok 1357 Set VL 7248
7253 22:16:30.453499 # ok 1358 # SKIP Disabled ZA for VL 7248
7254 22:16:30.453667 # ok 1359 # SKIP Get and set data for VL 7248
7255 22:16:30.453830 # ok 1360 Set VL 7264
7256 22:16:30.453996 # ok 1361 # SKIP Disabled ZA for VL 7264
7257 22:16:30.454145 # ok 1362 # SKIP Get and set data for VL 7264
7258 22:16:30.454264 # ok 1363 Set VL 7280
7259 22:16:30.454380 # ok 1364 # SKIP Disabled ZA for VL 7280
7260 22:16:30.454495 # ok 1365 # SKIP Get and set data for VL 7280
7261 22:16:30.454607 # ok 1366 Set VL 7296
7262 22:16:30.454720 # ok 1367 # SKIP Disabled ZA for VL 7296
7263 22:16:30.454832 # ok 1368 # SKIP Get and set data for VL 7296
7264 22:16:30.454944 # ok 1369 Set VL 7312
7265 22:16:30.455085 # ok 1370 # SKIP Disabled ZA for VL 7312
7266 22:16:30.455206 # ok 1371 # SKIP Get and set data for VL 7312
7267 22:16:30.455320 # ok 1372 Set VL 7328
7268 22:16:30.455435 # ok 1373 # SKIP Disabled ZA for VL 7328
7269 22:16:30.455549 # ok 1374 # SKIP Get and set data for VL 7328
7270 22:16:30.455661 # ok 1375 Set VL 7344
7271 22:16:30.467084 # ok 1376 # SKIP Disabled ZA for VL 7344
7272 22:16:30.467543 # ok 1377 # SKIP Get and set data for VL 7344
7273 22:16:30.467653 # ok 1378 Set VL 7360
7274 22:16:30.467748 # ok 1379 # SKIP Disabled ZA for VL 7360
7275 22:16:30.467841 # ok 1380 # SKIP Get and set data for VL 7360
7276 22:16:30.467935 # ok 1381 Set VL 7376
7277 22:16:30.468021 # ok 1382 # SKIP Disabled ZA for VL 7376
7278 22:16:30.468120 # ok 1383 # SKIP Get and set data for VL 7376
7279 22:16:30.468207 # ok 1384 Set VL 7392
7280 22:16:30.468298 # ok 1385 # SKIP Disabled ZA for VL 7392
7281 22:16:30.468388 # ok 1386 # SKIP Get and set data for VL 7392
7282 22:16:30.468497 # ok 1387 Set VL 7408
7283 22:16:30.468590 # ok 1388 # SKIP Disabled ZA for VL 7408
7284 22:16:30.468682 # ok 1389 # SKIP Get and set data for VL 7408
7285 22:16:30.468772 # ok 1390 Set VL 7424
7286 22:16:30.468861 # ok 1391 # SKIP Disabled ZA for VL 7424
7287 22:16:30.468967 # ok 1392 # SKIP Get and set data for VL 7424
7288 22:16:30.469058 # ok 1393 Set VL 7440
7289 22:16:30.469146 # ok 1394 # SKIP Disabled ZA for VL 7440
7290 22:16:30.469234 # ok 1395 # SKIP Get and set data for VL 7440
7291 22:16:30.469323 # ok 1396 Set VL 7456
7292 22:16:30.469431 # ok 1397 # SKIP Disabled ZA for VL 7456
7293 22:16:30.469521 # ok 1398 # SKIP Get and set data for VL 7456
7294 22:16:30.469610 # ok 1399 Set VL 7472
7295 22:16:30.469705 # ok 1400 # SKIP Disabled ZA for VL 7472
7296 22:16:30.469794 # ok 1401 # SKIP Get and set data for VL 7472
7297 22:16:30.469883 # ok 1402 Set VL 7488
7298 22:16:30.469990 # ok 1403 # SKIP Disabled ZA for VL 7488
7299 22:16:30.470081 # ok 1404 # SKIP Get and set data for VL 7488
7300 22:16:30.470168 # ok 1405 Set VL 7504
7301 22:16:30.470256 # ok 1406 # SKIP Disabled ZA for VL 7504
7302 22:16:30.470344 # ok 1407 # SKIP Get and set data for VL 7504
7303 22:16:30.470434 # ok 1408 Set VL 7520
7304 22:16:30.470542 # ok 1409 # SKIP Disabled ZA for VL 7520
7305 22:16:30.479068 # ok 1410 # SKIP Get and set data for VL 7520
7306 22:16:30.479309 # ok 1411 Set VL 7536
7307 22:16:30.479621 # ok 1412 # SKIP Disabled ZA for VL 7536
7308 22:16:30.479726 # ok 1413 # SKIP Get and set data for VL 7536
7309 22:16:30.479815 # ok 1414 Set VL 7552
7310 22:16:30.479900 # ok 1415 # SKIP Disabled ZA for VL 7552
7311 22:16:30.479984 # ok 1416 # SKIP Get and set data for VL 7552
7312 22:16:30.480066 # ok 1417 Set VL 7568
7313 22:16:30.480169 # ok 1418 # SKIP Disabled ZA for VL 7568
7314 22:16:30.480254 # ok 1419 # SKIP Get and set data for VL 7568
7315 22:16:30.480339 # ok 1420 Set VL 7584
7316 22:16:30.480423 # ok 1421 # SKIP Disabled ZA for VL 7584
7317 22:16:30.480512 # ok 1422 # SKIP Get and set data for VL 7584
7318 22:16:30.480595 # ok 1423 Set VL 7600
7319 22:16:30.480694 # ok 1424 # SKIP Disabled ZA for VL 7600
7320 22:16:30.480780 # ok 1425 # SKIP Get and set data for VL 7600
7321 22:16:30.480868 # ok 1426 Set VL 7616
7322 22:16:30.480953 # ok 1427 # SKIP Disabled ZA for VL 7616
7323 22:16:30.481038 # ok 1428 # SKIP Get and set data for VL 7616
7324 22:16:30.481140 # ok 1429 Set VL 7632
7325 22:16:30.481228 # ok 1430 # SKIP Disabled ZA for VL 7632
7326 22:16:30.481313 # ok 1431 # SKIP Get and set data for VL 7632
7327 22:16:30.481397 # ok 1432 Set VL 7648
7328 22:16:30.481484 # ok 1433 # SKIP Disabled ZA for VL 7648
7329 22:16:30.481591 # ok 1434 # SKIP Get and set data for VL 7648
7330 22:16:30.481690 # ok 1435 Set VL 7664
7331 22:16:30.481781 # ok 1436 # SKIP Disabled ZA for VL 7664
7332 22:16:30.481886 # ok 1437 # SKIP Get and set data for VL 7664
7333 22:16:30.481978 # ok 1438 Set VL 7680
7334 22:16:30.482067 # ok 1439 # SKIP Disabled ZA for VL 7680
7335 22:16:30.482156 # ok 1440 # SKIP Get and set data for VL 7680
7336 22:16:30.482244 # ok 1441 Set VL 7696
7337 22:16:30.482349 # ok 1442 # SKIP Disabled ZA for VL 7696
7338 22:16:30.491025 # ok 1443 # SKIP Get and set data for VL 7696
7339 22:16:30.491474 # ok 1444 Set VL 7712
7340 22:16:30.491580 # ok 1445 # SKIP Disabled ZA for VL 7712
7341 22:16:30.491670 # ok 1446 # SKIP Get and set data for VL 7712
7342 22:16:30.491756 # ok 1447 Set VL 7728
7343 22:16:30.491859 # ok 1448 # SKIP Disabled ZA for VL 7728
7344 22:16:30.491948 # ok 1449 # SKIP Get and set data for VL 7728
7345 22:16:30.492033 # ok 1450 Set VL 7744
7346 22:16:30.492115 # ok 1451 # SKIP Disabled ZA for VL 7744
7347 22:16:30.492211 # ok 1452 # SKIP Get and set data for VL 7744
7348 22:16:30.492298 # ok 1453 Set VL 7760
7349 22:16:30.492381 # ok 1454 # SKIP Disabled ZA for VL 7760
7350 22:16:30.492480 # ok 1455 # SKIP Get and set data for VL 7760
7351 22:16:30.492566 # ok 1456 Set VL 7776
7352 22:16:30.492665 # ok 1457 # SKIP Disabled ZA for VL 7776
7353 22:16:30.492750 # ok 1458 # SKIP Get and set data for VL 7776
7354 22:16:30.492851 # ok 1459 Set VL 7792
7355 22:16:30.492950 # ok 1460 # SKIP Disabled ZA for VL 7792
7356 22:16:30.493050 # ok 1461 # SKIP Get and set data for VL 7792
7357 22:16:30.493149 # ok 1462 Set VL 7808
7358 22:16:30.493246 # ok 1463 # SKIP Disabled ZA for VL 7808
7359 22:16:30.493572 # ok 1464 # SKIP Get and set data for VL 7808
7360 22:16:30.493746 # ok 1465 Set VL 7824
7361 22:16:30.493943 # ok 1466 # SKIP Disabled ZA for VL 7824
7362 22:16:30.494079 # ok 1467 # SKIP Get and set data for VL 7824
7363 22:16:30.494191 # ok 1468 Set VL 7840
7364 22:16:30.494299 # ok 1469 # SKIP Disabled ZA for VL 7840
7365 22:16:30.494430 # ok 1470 # SKIP Get and set data for VL 7840
7366 22:16:30.502953 # ok 1471 Set VL 7856
7367 22:16:30.503462 # ok 1472 # SKIP Disabled ZA for VL 7856
7368 22:16:30.503621 # ok 1473 # SKIP Get and set data for VL 7856
7369 22:16:30.503792 # ok 1474 Set VL 7872
7370 22:16:30.503943 # ok 1475 # SKIP Disabled ZA for VL 7872
7371 22:16:30.504085 # ok 1476 # SKIP Get and set data for VL 7872
7372 22:16:30.504239 # ok 1477 Set VL 7888
7373 22:16:30.504394 # ok 1478 # SKIP Disabled ZA for VL 7888
7374 22:16:30.504581 # ok 1479 # SKIP Get and set data for VL 7888
7375 22:16:30.504740 # ok 1480 Set VL 7904
7376 22:16:30.504890 # ok 1481 # SKIP Disabled ZA for VL 7904
7377 22:16:30.505043 # ok 1482 # SKIP Get and set data for VL 7904
7378 22:16:30.505190 # ok 1483 Set VL 7920
7379 22:16:30.505336 # ok 1484 # SKIP Disabled ZA for VL 7920
7380 22:16:30.505509 # ok 1485 # SKIP Get and set data for VL 7920
7381 22:16:30.505668 # ok 1486 Set VL 7936
7382 22:16:30.505779 # ok 1487 # SKIP Disabled ZA for VL 7936
7383 22:16:30.505870 # ok 1488 # SKIP Get and set data for VL 7936
7384 22:16:30.505958 # ok 1489 Set VL 7952
7385 22:16:30.506069 # ok 1490 # SKIP Disabled ZA for VL 7952
7386 22:16:30.506163 # ok 1491 # SKIP Get and set data for VL 7952
7387 22:16:30.506253 # ok 1492 Set VL 7968
7388 22:16:30.506340 # ok 1493 # SKIP Disabled ZA for VL 7968
7389 22:16:30.506428 # ok 1494 # SKIP Get and set data for VL 7968
7390 22:16:30.506516 # ok 1495 Set VL 7984
7391 22:16:30.506603 # ok 1496 # SKIP Disabled ZA for VL 7984
7392 22:16:30.506696 # ok 1497 # SKIP Get and set data for VL 7984
7393 22:16:30.506783 # ok 1498 Set VL 8000
7394 22:16:30.506870 # ok 1499 # SKIP Disabled ZA for VL 8000
7395 22:16:30.506959 # ok 1500 # SKIP Get and set data for VL 8000
7396 22:16:30.507046 # ok 1501 Set VL 8016
7397 22:16:30.507134 # ok 1502 # SKIP Disabled ZA for VL 8016
7398 22:16:30.512633 # ok 1503 # SKIP Get and set data for VL 8016
7399 22:16:30.512854 # ok 1504 Set VL 8032
7400 22:16:30.512944 # ok 1505 # SKIP Disabled ZA for VL 8032
7401 22:16:30.513046 # ok 1506 # SKIP Get and set data for VL 8032
7402 22:16:30.513130 # ok 1507 Set VL 8048
7403 22:16:30.513211 # ok 1508 # SKIP Disabled ZA for VL 8048
7404 22:16:30.513293 # ok 1509 # SKIP Get and set data for VL 8048
7405 22:16:30.513395 # ok 1510 Set VL 8064
7406 22:16:30.513485 # ok 1511 # SKIP Disabled ZA for VL 8064
7407 22:16:30.513576 # ok 1512 # SKIP Get and set data for VL 8064
7408 22:16:30.513677 # ok 1513 Set VL 8080
7409 22:16:30.513785 # ok 1514 # SKIP Disabled ZA for VL 8080
7410 22:16:30.513877 # ok 1515 # SKIP Get and set data for VL 8080
7411 22:16:30.513967 # ok 1516 Set VL 8096
7412 22:16:30.514057 # ok 1517 # SKIP Disabled ZA for VL 8096
7413 22:16:30.514164 # ok 1518 # SKIP Get and set data for VL 8096
7414 22:16:30.514255 # ok 1519 Set VL 8112
7415 22:16:30.514335 # ok 1520 # SKIP Disabled ZA for VL 8112
7416 22:16:30.519205 # ok 1521 # SKIP Get and set data for VL 8112
7417 22:16:30.519650 # ok 1522 Set VL 8128
7418 22:16:30.519756 # ok 1523 # SKIP Disabled ZA for VL 8128
7419 22:16:30.519847 # ok 1524 # SKIP Get and set data for VL 8128
7420 22:16:30.519931 # ok 1525 Set VL 8144
7421 22:16:30.520010 # ok 1526 # SKIP Disabled ZA for VL 8144
7422 22:16:30.520108 # ok 1527 # SKIP Get and set data for VL 8144
7423 22:16:30.520194 # ok 1528 Set VL 8160
7424 22:16:30.520280 # ok 1529 # SKIP Disabled ZA for VL 8160
7425 22:16:30.520369 # ok 1530 # SKIP Get and set data for VL 8160
7426 22:16:30.520455 # ok 1531 Set VL 8176
7427 22:16:30.520559 # ok 1532 # SKIP Disabled ZA for VL 8176
7428 22:16:30.520648 # ok 1533 # SKIP Get and set data for VL 8176
7429 22:16:30.520738 # ok 1534 Set VL 8192
7430 22:16:30.520835 # ok 1535 # SKIP Disabled ZA for VL 8192
7431 22:16:30.520944 # ok 1536 # SKIP Get and set data for VL 8192
7432 22:16:30.521037 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7433 22:16:30.521129 ok 34 selftests: arm64: za-ptrace
7434 22:16:30.521237 # selftests: arm64: check_buffer_fill
7435 22:16:31.007777 # 1..20
7436 22:16:31.008239 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7437 22:16:31.008348 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7438 22:16:31.008457 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7439 22:16:31.008561 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7440 22:16:31.008833 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7441 22:16:31.008954 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7442 22:16:31.009495 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7443 22:16:31.009706 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7444 22:16:31.009936 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7445 22:16:31.010095 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7446 22:16:31.010234 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7447 22:16:31.010389 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7448 22:16:31.016639 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7449 22:16:31.017170 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7450 22:16:31.017283 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7451 22:16:31.017391 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7452 22:16:31.017693 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7453 22:16:31.017812 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7454 22:16:31.018126 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7455 22:16:31.032284 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7456 22:16:31.032788 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7457 22:16:31.036390 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7458 22:16:31.148393 # selftests: arm64: check_child_memory
7459 22:16:31.619297 # 1..12
7460 22:16:31.619794 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7461 22:16:31.619906 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7462 22:16:31.620016 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7463 22:16:31.620122 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7464 22:16:31.620421 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7465 22:16:31.620790 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7466 22:16:31.621064 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7467 22:16:31.621332 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7468 22:16:31.621549 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7469 22:16:31.621789 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7470 22:16:31.621969 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7471 22:16:31.622137 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7472 22:16:31.624759 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7473 22:16:31.640095 not ok 36 selftests: arm64: check_child_memory # exit=1
7474 22:16:31.748608 # selftests: arm64: check_gcr_el1_cswitch
7475 22:17:16.879205 <47>[ 99.723109] systemd-journald[109]: Sent WATCHDOG=1 notification.
7476 22:17:17.214276 <47>[ 100.059551] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3308 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
7477 22:17:17.215172 <47>[ 100.060643] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
7478 22:17:17.215373 <47>[ 100.061108] systemd-journald[109]: Rotating...
7479 22:17:17.252448 <47>[ 100.098128] systemd-journald[109]: Reserving 333 entries in field hash table.
7480 22:17:17.284820 <47>[ 100.130296] systemd-journald[109]: Reserving 4408 entries in data hash table.
7481 22:17:17.285782 <47>[ 100.131650] systemd-journald[109]: Vacuuming...
7482 22:17:17.301682 <47>[ 100.147200] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
7483 22:17:18.109294 # 1..1
7484 22:17:18.109660 # 1..1
7485 22:17:18.109855 # 1..1
7486 22:17:18.109987 # 1..1
7487 22:17:18.110129 # 1..1
7488 22:17:18.110449 # 1..1
7489 22:17:18.110552 # 1..1
7490 22:17:18.110644 # 1..1
7491 22:17:18.110733 # 1..1
7492 22:17:18.110826 # 1..1
7493 22:17:18.110913 # 1..1
7494 22:17:18.111002 # 1..1
7495 22:17:18.111089 # 1..1
7496 22:17:18.111177 # 1..1
7497 22:17:18.111264 # 1..1
7498 22:17:18.111352 # 1..1
7499 22:17:18.111442 # 1..1
7500 22:17:18.111528 # 1..1
7501 22:17:18.111615 # 1..1
7502 22:17:18.111703 # 1..1
7503 22:17:18.111796 # 1..1
7504 22:17:18.111885 # 1..1
7505 22:17:18.111974 # 1..1
7506 22:17:18.112062 # 1..1
7507 22:17:18.112149 # 1..1
7508 22:17:18.112237 # 1..1
7509 22:17:18.112326 # 1..1
7510 22:17:18.112415 # 1..1
7511 22:17:18.112503 # 1..1
7512 22:17:18.112592 # 1..1
7513 22:17:18.112680 # 1..1
7514 22:17:18.112767 # 1..1
7515 22:17:18.112855 # 1..1
7516 22:17:18.112943 # 1..1
7517 22:17:18.113088 # 1..1
7518 22:17:18.113223 # 1..1
7519 22:17:18.113347 # 1..1
7520 22:17:18.113470 # 1..1
7521 22:17:18.113590 # 1..1
7522 22:17:18.113722 # 1..1
7523 22:17:18.113849 # 1..1
7524 22:17:18.113968 # 1..1
7525 22:17:18.114085 # 1..1
7526 22:17:18.128979 # 1..1
7527 22:17:18.129241 # 1..1
7528 22:17:18.129384 # 1..1
7529 22:17:18.129512 # 1..1
7530 22:17:18.129636 # 1..1
7531 22:17:18.129768 # 1..1
7532 22:17:18.130101 # 1..1
7533 22:17:18.130276 # 1..1
7534 22:17:18.130452 # 1..1
7535 22:17:18.130603 # 1..1
7536 22:17:18.130745 # 1..1
7537 22:17:18.130889 # 1..1
7538 22:17:18.131031 # 1..1
7539 22:17:18.131171 # 1..1
7540 22:17:18.131313 # 1..1
7541 22:17:18.131455 # 1..1
7542 22:17:18.131598 # 1..1
7543 22:17:18.131740 # 1..1
7544 22:17:18.131881 # 1..1
7545 22:17:18.132022 # 1..1
7546 22:17:18.132164 # 1..1
7547 22:17:18.132305 # 1..1
7548 22:17:18.132445 # 1..1
7549 22:17:18.132588 # 1..1
7550 22:17:18.132729 # 1..1
7551 22:17:18.132870 # 1..1
7552 22:17:18.133011 # 1..1
7553 22:17:18.133181 # 1..1
7554 22:17:18.133351 # 1..1
7555 22:17:18.133546 # 1..1
7556 22:17:18.133731 # 1..1
7557 22:17:18.133877 # 1..1
7558 22:17:18.134019 # 1..1
7559 22:17:18.134159 # 1..1
7560 22:17:18.134300 # 1..1
7561 22:17:18.134442 # 1..1
7562 22:17:18.134583 # 1..1
7563 22:17:18.134726 # 1..1
7564 22:17:18.134866 # 1..1
7565 22:17:18.135006 # 1..1
7566 22:17:18.135148 # 1..1
7567 22:17:18.135287 # 1..1
7568 22:17:18.135428 # 1..1
7569 22:17:18.135569 # 1..1
7570 22:17:18.135710 # 1..1
7571 22:17:18.135855 # 1..1
7572 22:17:18.135997 # 1..1
7573 22:17:18.136136 # 1..1
7574 22:17:18.136277 # 1..1
7575 22:17:18.161593 # 1..1
7576 22:17:18.161919 # 1..1
7577 22:17:18.162101 # 1..1
7578 22:17:18.162248 # 1..1
7579 22:17:18.162389 # 1..1
7580 22:17:18.162530 # 1..1
7581 22:17:18.162670 # 1..1
7582 22:17:18.162808 # 1..1
7583 22:17:18.162985 # 1..1
7584 22:17:18.163145 # 1..1
7585 22:17:18.163279 # 1..1
7586 22:17:18.163429 # 1..1
7587 22:17:18.163576 # 1..1
7588 22:17:18.163992 # 1..1
7589 22:17:18.164159 # 1..1
7590 22:17:18.164292 # 1..1
7591 22:17:18.164418 # 1..1
7592 22:17:18.164540 # 1..1
7593 22:17:18.164663 # 1..1
7594 22:17:18.164786 # 1..1
7595 22:17:18.164908 # 1..1
7596 22:17:18.165030 # 1..1
7597 22:17:18.165190 # 1..1
7598 22:17:18.165389 # 1..1
7599 22:17:18.165560 # 1..1
7600 22:17:18.165742 # 1..1
7601 22:17:18.165912 # 1..1
7602 22:17:18.166075 # 1..1
7603 22:17:18.166197 # 1..1
7604 22:17:18.166310 # 1..1
7605 22:17:18.166423 # 1..1
7606 22:17:18.166534 # 1..1
7607 22:17:18.166645 # 1..1
7608 22:17:18.166757 # 1..1
7609 22:17:18.166869 # 1..1
7610 22:17:18.166982 # 1..1
7611 22:17:18.167095 # 1..1
7612 22:17:18.167208 # 1..1
7613 22:17:18.167321 # 1..1
7614 22:17:18.167433 # 1..1
7615 22:17:18.167545 # 1..1
7616 22:17:18.167657 # 1..1
7617 22:17:18.167769 # 1..1
7618 22:17:18.167883 # 1..1
7619 22:17:18.167995 # 1..1
7620 22:17:18.168108 # 1..1
7621 22:17:18.168220 # 1..1
7622 22:17:18.168330 # 1..1
7623 22:17:18.168443 # 1..1
7624 22:17:18.168557 # 1..1
7625 22:17:18.168670 # 1..1
7626 22:17:18.168782 # 1..1
7627 22:17:18.168932 # 1..1
7628 22:17:18.169055 # 1..1
7629 22:17:18.169193 # 1..1
7630 22:17:18.169350 # 1..1
7631 22:17:18.169471 # 1..1
7632 22:17:18.169585 # 1..1
7633 22:17:18.169713 # 1..1
7634 22:17:18.169830 # 1..1
7635 22:17:18.169949 # 1..1
7636 22:17:18.170061 # 1..1
7637 22:17:18.170174 # 1..1
7638 22:17:18.170287 # 1..1
7639 22:17:18.170401 # 1..1
7640 22:17:18.170514 # 1..1
7641 22:17:18.170630 # 1..1
7642 22:17:18.170744 # 1..1
7643 22:17:18.170858 # 1..1
7644 22:17:18.170975 # 1..1
7645 22:17:18.171090 # 1..1
7646 22:17:18.171203 # 1..1
7647 22:17:18.171316 # 1..1
7648 22:17:18.171431 # 1..1
7649 22:17:18.171544 # 1..1
7650 22:17:18.171658 # 1..1
7651 22:17:18.171772 # 1..1
7652 22:17:18.171888 # 1..1
7653 22:17:18.172003 # 1..1
7654 22:17:18.172117 # 1..1
7655 22:17:18.172230 # 1..1
7656 22:17:18.172343 # 1..1
7657 22:17:18.172458 # 1..1
7658 22:17:18.172572 # 1..1
7659 22:17:18.172686 # 1..1
7660 22:17:18.172801 # 1..1
7661 22:17:18.172914 # 1..1
7662 22:17:18.173027 # 1..1
7663 22:17:18.173151 # 1..1
7664 22:17:18.173285 # 1..1
7665 22:17:18.173402 # 1..1
7666 22:17:18.173518 # 1..1
7667 22:17:18.173632 # 1..1
7668 22:17:18.173756 # 1..1
7669 22:17:18.173872 # 1..1
7670 22:17:18.195109 # 1..1
7671 22:17:18.195374 # 1..1
7672 22:17:18.195528 # 1..1
7673 22:17:18.195686 # 1..1
7674 22:17:18.195860 # 1..1
7675 22:17:18.196028 # 1..1
7676 22:17:18.196193 # 1..1
7677 22:17:18.196610 # 1..1
7678 22:17:18.196803 # 1..1
7679 22:17:18.196956 # 1..1
7680 22:17:18.197101 # 1..1
7681 22:17:18.197297 # 1..1
7682 22:17:18.197522 # 1..1
7683 22:17:18.197739 # 1..1
7684 22:17:18.197922 # 1..1
7685 22:17:18.198089 # 1..1
7686 22:17:18.198211 # 1..1
7687 22:17:18.198324 # 1..1
7688 22:17:18.198437 # 1..1
7689 22:17:18.198549 # 1..1
7690 22:17:18.198661 # 1..1
7691 22:17:18.198774 # 1..1
7692 22:17:18.198887 # 1..1
7693 22:17:18.198999 # 1..1
7694 22:17:18.199111 # 1..1
7695 22:17:18.199222 # 1..1
7696 22:17:18.199334 # 1..1
7697 22:17:18.199447 # 1..1
7698 22:17:18.199559 # 1..1
7699 22:17:18.199670 # 1..1
7700 22:17:18.199780 # 1..1
7701 22:17:18.199892 # 1..1
7702 22:17:18.200004 # 1..1
7703 22:17:18.200116 # 1..1
7704 22:17:18.200227 # 1..1
7705 22:17:18.200339 # 1..1
7706 22:17:18.200451 # 1..1
7707 22:17:18.200562 # 1..1
7708 22:17:18.200675 # 1..1
7709 22:17:18.200786 # 1..1
7710 22:17:18.200899 # 1..1
7711 22:17:18.201012 # 1..1
7712 22:17:18.201130 # 1..1
7713 22:17:18.201287 # 1..1
7714 22:17:18.201418 # 1..1
7715 22:17:18.201539 # 1..1
7716 22:17:18.201703 # 1..1
7717 22:17:18.201911 # 1..1
7718 22:17:18.202095 # 1..1
7719 22:17:18.202274 # 1..1
7720 22:17:18.202454 # 1..1
7721 22:17:18.202635 # 1..1
7722 22:17:18.202816 # 1..1
7723 22:17:18.202997 # 1..1
7724 22:17:18.203178 # 1..1
7725 22:17:18.203392 # 1..1
7726 22:17:18.203529 # 1..1
7727 22:17:18.203671 # 1..1
7728 22:17:18.203813 # 1..1
7729 22:17:18.203954 # 1..1
7730 22:17:18.204095 # 1..1
7731 22:17:18.204235 # 1..1
7732 22:17:18.204403 # 1..1
7733 22:17:18.204576 # 1..1
7734 22:17:18.204720 # 1..1
7735 22:17:18.204861 # 1..1
7736 22:17:18.205001 # 1..1
7737 22:17:18.205143 # 1..1
7738 22:17:18.205282 # 1..1
7739 22:17:18.205421 # 1..1
7740 22:17:18.205560 # 1..1
7741 22:17:18.205712 # 1..1
7742 22:17:18.205854 # 1..1
7743 22:17:18.205993 # 1..1
7744 22:17:18.206133 # 1..1
7745 22:17:18.206273 # 1..1
7746 22:17:18.206411 # 1..1
7747 22:17:18.206549 # 1..1
7748 22:17:18.206687 # 1..1
7749 22:17:18.206827 # 1..1
7750 22:17:18.206966 # 1..1
7751 22:17:18.207104 # 1..1
7752 22:17:18.207243 # 1..1
7753 22:17:18.207382 # 1..1
7754 22:17:18.207521 # 1..1
7755 22:17:18.207660 # 1..1
7756 22:17:18.207798 # 1..1
7757 22:17:18.207937 # 1..1
7758 22:17:18.208076 # 1..1
7759 22:17:18.208216 # 1..1
7760 22:17:18.208355 # 1..1
7761 22:17:18.208495 # 1..1
7762 22:17:18.208639 # 1..1
7763 22:17:18.208779 # 1..1
7764 22:17:18.208917 # 1..1
7765 22:17:18.209060 # 1..1
7766 22:17:18.209199 # 1..1
7767 22:17:18.209338 # 1..1
7768 22:17:18.209477 # 1..1
7769 22:17:18.209620 # 1..1
7770 22:17:18.209771 # 1..1
7771 22:17:18.209912 # 1..1
7772 22:17:18.210057 # 1..1
7773 22:17:18.210198 # 1..1
7774 22:17:18.210337 # 1..1
7775 22:17:18.210477 # 1..1
7776 22:17:18.219672 # 1..1
7777 22:17:18.219854 # 1..1
7778 22:17:18.219951 # 1..1
7779 22:17:18.220022 # 1..1
7780 22:17:18.220086 # 1..1
7781 22:17:18.220150 # 1..1
7782 22:17:18.220408 # 1..1
7783 22:17:18.220487 # 1..1
7784 22:17:18.220559 # 1..1
7785 22:17:18.220629 # 1..1
7786 22:17:18.220699 # 1..1
7787 22:17:18.220767 # 1..1
7788 22:17:18.220830 # 1..1
7789 22:17:18.220892 # 1..1
7790 22:17:18.220954 # 1..1
7791 22:17:18.221018 # 1..1
7792 22:17:18.221082 # 1..1
7793 22:17:18.221155 # 1..1
7794 22:17:18.221262 # 1..1
7795 22:17:18.221361 # 1..1
7796 22:17:18.221437 # 1..1
7797 22:17:18.221500 # 1..1
7798 22:17:18.221562 # 1..1
7799 22:17:18.221623 # 1..1
7800 22:17:18.221721 # 1..1
7801 22:17:18.221799 # 1..1
7802 22:17:18.221867 # 1..1
7803 22:17:18.221929 # 1..1
7804 22:17:18.221996 # 1..1
7805 22:17:18.222058 # 1..1
7806 22:17:18.222121 # 1..1
7807 22:17:18.222181 # 1..1
7808 22:17:18.222242 # 1..1
7809 22:17:18.222301 # 1..1
7810 22:17:18.222362 # 1..1
7811 22:17:18.222442 # 1..1
7812 22:17:18.222511 # 1..1
7813 22:17:18.222574 # 1..1
7814 22:17:18.222637 # 1..1
7815 22:17:18.222700 # 1..1
7816 22:17:18.222761 # 1..1
7817 22:17:18.222821 # 1..1
7818 22:17:18.222882 # 1..1
7819 22:17:18.222945 # 1..1
7820 22:17:18.223008 # 1..1
7821 22:17:18.223069 # 1..1
7822 22:17:18.223129 # 1..1
7823 22:17:18.223189 # 1..1
7824 22:17:18.223251 # 1..1
7825 22:17:18.223313 # 1..1
7826 22:17:18.223373 # 1..1
7827 22:17:18.223434 # 1..1
7828 22:17:18.223494 # 1..1
7829 22:17:18.223557 # 1..1
7830 22:17:18.223616 # 1..1
7831 22:17:18.223676 # 1..1
7832 22:17:18.223737 # 1..1
7833 22:17:18.223798 # 1..1
7834 22:17:18.223857 # 1..1
7835 22:17:18.223916 # 1..1
7836 22:17:18.223974 # 1..1
7837 22:17:18.224033 # 1..1
7838 22:17:18.224093 # 1..1
7839 22:17:18.224154 # 1..1
7840 22:17:18.224213 # 1..1
7841 22:17:18.224273 # 1..1
7842 22:17:18.224331 # 1..1
7843 22:17:18.224389 # 1..1
7844 22:17:18.224448 # 1..1
7845 22:17:18.224507 # 1..1
7846 22:17:18.224566 # 1..1
7847 22:17:18.224624 # 1..1
7848 22:17:18.224683 # 1..1
7849 22:17:18.224742 # 1..1
7850 22:17:18.224804 # 1..1
7851 22:17:18.224863 # 1..1
7852 22:17:18.224922 # 1..1
7853 22:17:18.224981 # 1..1
7854 22:17:18.225040 # 1..1
7855 22:17:18.225099 # 1..1
7856 22:17:18.225188 # 1..1
7857 22:17:18.225259 # 1..1
7858 22:17:18.225326 # 1..1
7859 22:17:18.225411 # 1..1
7860 22:17:18.225479 # 1..1
7861 22:17:18.236087 # 1..1
7862 22:17:18.236241 # 1..1
7863 22:17:18.236335 # 1..1
7864 22:17:18.236692 # 1..1
7865 22:17:18.236815 # 1..1
7866 22:17:18.236924 # 1..1
7867 22:17:18.237006 # 1..1
7868 22:17:18.237088 # 1..1
7869 22:17:18.237189 # 1..1
7870 22:17:18.237286 # 1..1
7871 22:17:18.237363 # 1..1
7872 22:17:18.237426 # 1..1
7873 22:17:18.237485 # 1..1
7874 22:17:18.237544 # 1..1
7875 22:17:18.237603 # 1..1
7876 22:17:18.237671 # 1..1
7877 22:17:18.237731 # 1..1
7878 22:17:18.237790 # 1..1
7879 22:17:18.237850 # 1..1
7880 22:17:18.237908 # 1..1
7881 22:17:18.237966 # 1..1
7882 22:17:18.238032 # 1..1
7883 22:17:18.238092 # 1..1
7884 22:17:18.238151 # 1..1
7885 22:17:18.238211 # 1..1
7886 22:17:18.238289 # 1..1
7887 22:17:18.238355 # 1..1
7888 22:17:18.238416 # 1..1
7889 22:17:18.238476 # 1..1
7890 22:17:18.238537 # 1..1
7891 22:17:18.238596 # 1..1
7892 22:17:18.238656 # 1..1
7893 22:17:18.238715 # 1..1
7894 22:17:18.238773 # 1..1
7895 22:17:18.238833 # 1..1
7896 22:17:18.238893 # 1..1
7897 22:17:18.238953 # 1..1
7898 22:17:18.239015 # 1..1
7899 22:17:18.239075 # 1..1
7900 22:17:18.239134 # 1..1
7901 22:17:18.239194 # 1..1
7902 22:17:18.239253 # 1..1
7903 22:17:18.239312 # 1..1
7904 22:17:18.239371 # 1..1
7905 22:17:18.239430 # 1..1
7906 22:17:18.239489 # 1..1
7907 22:17:18.239549 # 1..1
7908 22:17:18.239608 # 1..1
7909 22:17:18.239667 # 1..1
7910 22:17:18.239726 # 1..1
7911 22:17:18.239786 # 1..1
7912 22:17:18.239845 # 1..1
7913 22:17:18.239905 # 1..1
7914 22:17:18.239963 # 1..1
7915 22:17:18.240023 # 1..1
7916 22:17:18.240081 # 1..1
7917 22:17:18.240140 # 1..1
7918 22:17:18.240200 # 1..1
7919 22:17:18.240259 # 1..1
7920 22:17:18.240318 # 1..1
7921 22:17:18.240378 # 1..1
7922 22:17:18.240436 # 1..1
7923 22:17:18.240496 # 1..1
7924 22:17:18.240556 # 1..1
7925 22:17:18.240614 # 1..1
7926 22:17:18.240673 # 1..1
7927 22:17:18.240733 # 1..1
7928 22:17:18.240792 # 1..1
7929 22:17:18.240851 # 1..1
7930 22:17:18.240911 # 1..1
7931 22:17:18.240970 # 1..1
7932 22:17:18.241029 # 1..1
7933 22:17:18.241088 # 1..1
7934 22:17:18.255232 # 1..1
7935 22:17:18.255406 # 1..1
7936 22:17:18.255500 # 1..1
7937 22:17:18.255588 # 1..1
7938 22:17:18.255724 # 1..1
7939 22:17:18.256042 # 1..1
7940 22:17:18.256153 # 1..1
7941 22:17:18.256248 # 1..1
7942 22:17:18.256339 # 1..1
7943 22:17:18.256450 # 1..1
7944 22:17:18.256561 # 1..1
7945 22:17:18.256670 # 1..1
7946 22:17:18.256770 # 1..1
7947 22:17:18.256873 # 1..1
7948 22:17:18.256986 # 1..1
7949 22:17:18.257094 # 1..1
7950 22:17:18.257234 # 1..1
7951 22:17:18.257347 # 1..1
7952 22:17:18.257436 # 1..1
7953 22:17:18.257522 # 1..1
7954 22:17:18.257606 # 1..1
7955 22:17:18.257741 # 1..1
7956 22:17:18.257888 # 1..1
7957 22:17:18.258023 # 1..1
7958 22:17:18.258132 # 1..1
7959 22:17:18.258237 # 1..1
7960 22:17:18.258344 # 1..1
7961 22:17:18.258449 # 1..1
7962 22:17:18.258554 # 1..1
7963 22:17:18.258661 # 1..1
7964 22:17:18.258767 # 1..1
7965 22:17:18.258906 # 1..1
7966 22:17:18.259010 # 1..1
7967 22:17:18.259117 # 1..1
7968 22:17:18.259224 # 1..1
7969 22:17:18.259330 # 1..1
7970 22:17:18.259437 # 1..1
7971 22:17:18.259543 # 1..1
7972 22:17:18.259649 # 1..1
7973 22:17:18.259755 # 1..1
7974 22:17:18.259860 # 1..1
7975 22:17:18.259965 # 1..1
7976 22:17:18.260072 # 1..1
7977 22:17:18.260178 # 1..1
7978 22:17:18.260283 # 1..1
7979 22:17:18.260389 # 1..1
7980 22:17:18.260494 # 1..1
7981 22:17:18.260600 # 1..1
7982 22:17:18.260706 # 1..1
7983 22:17:18.260811 # 1..1
7984 22:17:18.260916 # 1..1
7985 22:17:18.261023 # 1..1
7986 22:17:18.261141 # 1..1
7987 22:17:18.261267 # 1..1
7988 22:17:18.261371 # 1..1
7989 22:17:18.261459 # 1..1
7990 22:17:18.261546 # 1..1
7991 22:17:18.261633 # 1..1
7992 22:17:18.261730 # 1..1
7993 22:17:18.261816 # 1..1
7994 22:17:18.261903 # 1..1
7995 22:17:18.261989 # 1..1
7996 22:17:18.262078 # 1..1
7997 22:17:18.262164 # 1..1
7998 22:17:18.262249 # 1..1
7999 22:17:18.262335 # 1..1
8000 22:17:18.262420 # 1..1
8001 22:17:18.262506 # 1..1
8002 22:17:18.262592 # 1..1
8003 22:17:18.262678 # 1..1
8004 22:17:18.262762 # 1..1
8005 22:17:18.262848 # 1..1
8006 22:17:18.262933 # 1..1
8007 22:17:18.263020 # 1..1
8008 22:17:18.263105 # 1..1
8009 22:17:18.263191 # 1..1
8010 22:17:18.263278 # 1..1
8011 22:17:18.263364 # 1..1
8012 22:17:18.263451 # 1..1
8013 22:17:18.263537 # 1..1
8014 22:17:18.263623 # 1..1
8015 22:17:18.263709 # 1..1
8016 22:17:18.269193 #
8017 22:17:18.269589 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
8018 22:17:18.495784 # selftests: arm64: check_ksm_options
8019 22:17:18.799772 # 1..4
8020 22:17:18.800054 # # Invalid MTE synchronous exception caught!
8021 22:17:18.842910 not ok 38 selftests: arm64: check_ksm_options # exit=1
8022 22:17:19.132530 # selftests: arm64: check_mmap_options
8023 22:17:19.920049 # 1..22
8024 22:17:19.920611 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
8025 22:17:19.920787 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
8026 22:17:19.920978 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
8027 22:17:19.921171 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
8028 22:17:19.921412 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
8029 22:17:19.921616 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
8030 22:17:19.921797 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
8031 22:17:19.921974 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
8032 22:17:19.935615 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
8033 22:17:19.935878 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
8034 22:17:19.936297 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
8035 22:17:19.936532 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
8036 22:17:19.936792 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
8037 22:17:19.937017 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
8038 22:17:19.937254 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
8039 22:17:19.937442 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
8040 22:17:19.937708 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
8041 22:17:19.937928 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
8042 22:17:19.938146 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
8043 22:17:19.938330 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
8044 22:17:19.947265 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
8045 22:17:19.947628 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
8046 22:17:19.947738 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
8047 22:17:19.981459 not ok 39 selftests: arm64: check_mmap_options # exit=1
8048 22:17:20.267549 # selftests: arm64: check_prctl
8049 22:17:20.570189 # TAP version 13
8050 22:17:20.570788 # 1..5
8051 22:17:20.570993 # ok 1 check_basic_read
8052 22:17:20.571169 # ok 2 NONE
8053 22:17:20.571329 # ok 3 SYNC
8054 22:17:20.571497 # ok 4 ASYNC
8055 22:17:20.571681 # ok 5 SYNC+ASYNC
8056 22:17:20.571852 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8057 22:17:20.613528 ok 40 selftests: arm64: check_prctl
8058 22:17:20.892683 # selftests: arm64: check_tags_inclusion
8059 22:17:21.187830 # 1..4
8060 22:17:21.188361 # # Unexpected fault recorded for 0xa00ffffb0855000-0xa00ffffb0855050 in mode 1
8061 22:17:21.188521 # not ok 1 Check an included tag value with sync mode
8062 22:17:21.188652 # # Unexpected fault recorded for 0xa00ffffb0855000-0xa00ffffb0855050 in mode 1
8063 22:17:21.188779 # not ok 2 Check different included tags value with sync mode
8064 22:17:21.188929 # ok 3 Check none included tags value with sync mode
8065 22:17:21.189056 # # Unexpected fault recorded for 0x700ffffb0855000-0x700ffffb0855050 in mode 1
8066 22:17:21.189178 # not ok 4 Check all included tags value with sync mode
8067 22:17:21.189305 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
8068 22:17:21.241282 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
8069 22:17:21.528315 # selftests: arm64: check_user_mem
8070 22:17:29.885393 # 1..64
8071 22:17:29.886096 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8072 22:17:29.886311 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8073 22:17:29.886487 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8074 22:17:29.886650 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8075 22:17:29.889985 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8076 22:17:29.890158 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8077 22:17:29.890286 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8078 22:17:29.890406 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8079 22:17:29.890525 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8080 22:17:29.890641 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8081 22:17:29.890758 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8082 22:17:29.890875 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8083 22:17:29.890992 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8084 22:17:29.891110 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8085 22:17:29.891226 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8086 22:17:29.891342 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8087 22:17:29.891458 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8088 22:17:29.891574 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8089 22:17:29.891689 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8090 22:17:29.891804 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8091 22:17:29.891920 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8092 22:17:29.892035 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8093 22:17:29.892150 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8094 22:17:29.892268 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8095 22:17:29.892384 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8096 22:17:29.892502 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8097 22:17:29.892618 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8098 22:17:29.892734 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8099 22:17:29.892849 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8100 22:17:29.893178 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8101 22:17:29.893307 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8102 22:17:29.896175 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8103 22:17:29.896471 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8104 22:17:29.896633 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8105 22:17:29.896868 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8106 22:17:29.897093 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8107 22:17:29.897307 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8108 22:17:29.897488 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8109 22:17:29.897682 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8110 22:17:29.897889 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8111 22:17:29.898045 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8112 22:17:29.898224 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8113 22:17:29.898408 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8114 22:17:29.898550 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8115 22:17:29.899055 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8116 22:17:29.899406 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8117 22:17:29.899572 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8118 22:17:29.899743 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8119 22:17:29.899911 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8120 22:17:29.900081 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8121 22:17:29.900248 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8122 22:17:31.479544 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8123 22:17:31.479907 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8124 22:17:31.480097 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8125 22:17:31.480541 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8126 22:17:31.480725 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8127 22:17:31.480886 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8128 22:17:31.481094 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8129 22:17:31.481264 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8130 22:17:31.481460 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8131 22:17:31.481675 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8132 22:17:31.481820 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8133 22:17:31.481964 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8134 22:17:31.482110 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8135 22:17:31.482251 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
8136 22:17:31.497373 ok 42 selftests: arm64: check_user_mem
8137 22:17:31.582278 # selftests: arm64: btitest
8138 22:17:31.705461 # TAP version 13
8139 22:17:31.705818 # 1..18
8140 22:17:31.705994 # # HWCAP_PACA present
8141 22:17:31.706167 # # HWCAP2_BTI present
8142 22:17:31.706295 # # Test binary built for BTI
8143 22:17:31.706625 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8144 22:17:31.706711 # ok 1 nohint_func/call_using_br_x0
8145 22:17:31.706778 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8146 22:17:31.706838 # ok 2 nohint_func/call_using_br_x16
8147 22:17:31.706897 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8148 22:17:31.709321 # ok 3 nohint_func/call_using_blr
8149 22:17:31.709734 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8150 22:17:31.709963 # ok 4 bti_none_func/call_using_br_x0
8151 22:17:31.714903 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8152 22:17:31.715285 # ok 5 bti_none_func/call_using_br_x16
8153 22:17:31.715436 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8154 22:17:31.715563 # ok 6 bti_none_func/call_using_blr
8155 22:17:31.715743 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8156 22:17:31.715917 # ok 7 bti_c_func/call_using_br_x0
8157 22:17:31.716104 # ok 8 bti_c_func/call_using_br_x16
8158 22:17:31.716310 # ok 9 bti_c_func/call_using_blr
8159 22:17:31.716446 # ok 10 bti_j_func/call_using_br_x0
8160 22:17:31.716584 # ok 11 bti_j_func/call_using_br_x16
8161 22:17:31.716721 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8162 22:17:31.716858 # ok 12 bti_j_func/call_using_blr
8163 22:17:31.716993 # ok 13 bti_jc_func/call_using_br_x0
8164 22:17:31.717129 # ok 14 bti_jc_func/call_using_br_x16
8165 22:17:31.717264 # ok 15 bti_jc_func/call_using_blr
8166 22:17:31.717433 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8167 22:17:31.717563 # ok 16 paciasp_func/call_using_br_x0
8168 22:17:31.717715 # ok 17 paciasp_func/call_using_br_x16
8169 22:17:31.717854 # ok 18 paciasp_func/call_using_blr
8170 22:17:31.717990 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8171 22:17:31.731939 ok 43 selftests: arm64: btitest
8172 22:17:31.832676 # selftests: arm64: nobtitest
8173 22:17:31.912168 # TAP version 13
8174 22:17:31.912410 # 1..18
8175 22:17:31.912501 # # HWCAP_PACA present
8176 22:17:31.912589 # # HWCAP2_BTI present
8177 22:17:31.912673 # # Test binary not built for BTI
8178 22:17:31.913016 # ok 1 nohint_func/call_using_br_x0
8179 22:17:31.913218 # ok 2 nohint_func/call_using_br_x16
8180 22:17:31.913384 # ok 3 nohint_func/call_using_blr
8181 22:17:31.913547 # ok 4 bti_none_func/call_using_br_x0
8182 22:17:31.913705 # ok 5 bti_none_func/call_using_br_x16
8183 22:17:31.913826 # ok 6 bti_none_func/call_using_blr
8184 22:17:31.913943 # ok 7 bti_c_func/call_using_br_x0
8185 22:17:31.914056 # ok 8 bti_c_func/call_using_br_x16
8186 22:17:31.914170 # ok 9 bti_c_func/call_using_blr
8187 22:17:31.914281 # ok 10 bti_j_func/call_using_br_x0
8188 22:17:31.914420 # ok 11 bti_j_func/call_using_br_x16
8189 22:17:31.914536 # ok 12 bti_j_func/call_using_blr
8190 22:17:31.914647 # ok 13 bti_jc_func/call_using_br_x0
8191 22:17:31.914760 # ok 14 bti_jc_func/call_using_br_x16
8192 22:17:31.914870 # ok 15 bti_jc_func/call_using_blr
8193 22:17:31.914982 # ok 16 paciasp_func/call_using_br_x0
8194 22:17:31.915096 # ok 17 paciasp_func/call_using_br_x16
8195 22:17:31.915212 # ok 18 paciasp_func/call_using_blr
8196 22:17:31.915322 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8197 22:17:31.931706 ok 44 selftests: arm64: nobtitest
8198 22:17:32.013931 # selftests: arm64: hwcap
8199 22:17:32.148008 # TAP version 13
8200 22:17:32.148301 # 1..28
8201 22:17:32.148530 # # RNG present
8202 22:17:32.148924 # ok 1 cpuinfo_match_RNG
8203 22:17:32.149035 # ok 2 sigill_RNG
8204 22:17:32.149126 # # SME present
8205 22:17:32.149210 # ok 3 cpuinfo_match_SME
8206 22:17:32.149293 # ok 4 sigill_SME
8207 22:17:32.149374 # # SVE present
8208 22:17:32.149453 # ok 5 cpuinfo_match_SVE
8209 22:17:32.149534 # ok 6 sigill_SVE
8210 22:17:32.149614 # # SVE 2 present
8211 22:17:32.149705 # ok 7 cpuinfo_match_SVE 2
8212 22:17:32.149785 # ok 8 sigill_SVE 2
8213 22:17:32.149865 # # SVE AES present
8214 22:17:32.149945 # ok 9 cpuinfo_match_SVE AES
8215 22:17:32.150026 # ok 10 sigill_SVE AES
8216 22:17:32.150106 # # SVE2 PMULL present
8217 22:17:32.150182 # ok 11 cpuinfo_match_SVE2 PMULL
8218 22:17:32.150276 # ok 12 sigill_SVE2 PMULL
8219 22:17:32.150360 # # SVE2 BITPERM present
8220 22:17:32.150438 # ok 13 cpuinfo_match_SVE2 BITPERM
8221 22:17:32.150514 # ok 14 sigill_SVE2 BITPERM
8222 22:17:32.150588 # # SVE2 SHA3 present
8223 22:17:32.150666 # ok 15 cpuinfo_match_SVE2 SHA3
8224 22:17:32.150747 # ok 16 sigill_SVE2 SHA3
8225 22:17:32.150824 # # SVE2 SM4 present
8226 22:17:32.150905 # ok 17 cpuinfo_match_SVE2 SM4
8227 22:17:32.150987 # ok 18 sigill_SVE2 SM4
8228 22:17:32.151067 # # SVE2 I8MM present
8229 22:17:32.151145 # ok 19 cpuinfo_match_SVE2 I8MM
8230 22:17:32.151221 # ok 20 sigill_SVE2 I8MM
8231 22:17:32.159606 # # SVE2 F32MM present
8232 22:17:32.160181 # ok 21 cpuinfo_match_SVE2 F32MM
8233 22:17:32.160382 # ok 22 sigill_SVE2 F32MM
8234 22:17:32.160534 # # SVE2 F64MM present
8235 22:17:32.160651 # ok 23 cpuinfo_match_SVE2 F64MM
8236 22:17:32.160765 # ok 24 sigill_SVE2 F64MM
8237 22:17:32.160879 # # SVE2 BF16 present
8238 22:17:32.160990 # ok 25 cpuinfo_match_SVE2 BF16
8239 22:17:32.161100 # ok 26 sigill_SVE2 BF16
8240 22:17:32.161235 # ok 27 cpuinfo_match_SVE2 EBF16
8241 22:17:32.161352 # ok 28 # SKIP sigill_SVE2 EBF16
8242 22:17:32.161466 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8243 22:17:32.174195 ok 45 selftests: arm64: hwcap
8244 22:17:32.316912 # selftests: arm64: ptrace
8245 22:17:32.451860 # TAP version 13
8246 22:17:32.452188 # 1..7
8247 22:17:32.452345 # # Parent is 4471, child is 4472
8248 22:17:32.452475 # ok 1 read_tpidr_one
8249 22:17:32.452596 # ok 2 write_tpidr_one
8250 22:17:32.452942 # ok 3 verify_tpidr_one
8251 22:17:32.453078 # ok 4 count_tpidrs
8252 22:17:32.453200 # ok 5 tpidr2_write
8253 22:17:32.453323 # ok 6 tpidr2_read
8254 22:17:32.453439 # ok 7 write_tpidr_only
8255 22:17:32.453556 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8256 22:17:32.470245 ok 46 selftests: arm64: ptrace
8257 22:17:32.557162 # selftests: arm64: syscall-abi
8258 22:17:35.125569 # TAP version 13
8259 22:17:35.126229 # 1..514
8260 22:17:35.126399 # # SME with FA64
8261 22:17:35.126529 # ok 1 getpid() FPSIMD
8262 22:17:35.126659 # ok 2 getpid() SVE VL 256
8263 22:17:35.126805 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8264 22:17:35.126982 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8265 22:17:35.127358 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8266 22:17:35.127501 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8267 22:17:35.127646 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8268 22:17:35.127788 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8269 22:17:35.127934 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8270 22:17:35.128104 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8271 22:17:35.128275 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8272 22:17:35.131605 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8273 22:17:35.132120 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8274 22:17:35.132329 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8275 22:17:35.132544 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8276 22:17:35.132697 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8277 22:17:35.132835 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8278 22:17:35.133039 # ok 18 getpid() SVE VL 240
8279 22:17:35.133209 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8280 22:17:35.133357 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8281 22:17:35.133538 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8282 22:17:35.133769 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8283 22:17:35.133969 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8284 22:17:35.134169 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8285 22:17:35.134341 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8286 22:17:35.134494 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8287 22:17:35.134650 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8288 22:17:35.134845 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8289 22:17:35.135008 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8290 22:17:35.135126 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8291 22:17:35.135237 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8292 22:17:35.135348 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8293 22:17:35.135459 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8294 22:17:35.135569 # ok 34 getpid() SVE VL 224
8295 22:17:35.135680 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8296 22:17:35.135792 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8297 22:17:35.135901 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8298 22:17:35.138380 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8299 22:17:35.138699 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8300 22:17:35.138850 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8301 22:17:35.138992 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8302 22:17:35.139111 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8303 22:17:35.139204 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8304 22:17:35.139291 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8305 22:17:35.139394 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8306 22:17:35.139494 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8307 22:17:35.139582 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8308 22:17:35.139680 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8309 22:17:35.140136 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8310 22:17:35.140321 # ok 50 getpid() SVE VL 208
8311 22:17:35.140709 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8312 22:17:35.140905 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8313 22:17:35.141078 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8314 22:17:35.141242 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8315 22:17:35.141404 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8316 22:17:35.141567 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8317 22:17:35.141822 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8318 22:17:35.142019 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8319 22:17:35.142166 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8320 22:17:35.142289 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8321 22:17:35.142405 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8322 22:17:35.142522 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8323 22:17:35.142640 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8324 22:17:35.142757 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8325 22:17:35.142874 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8326 22:17:35.143017 # ok 66 getpid() SVE VL 192
8327 22:17:35.143143 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8328 22:17:35.146367 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8329 22:17:35.146779 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8330 22:17:35.146891 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8331 22:17:35.146984 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8332 22:17:35.147070 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8333 22:17:35.147180 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8334 22:17:35.147286 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8335 22:17:35.147373 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8336 22:17:35.147456 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8337 22:17:35.147551 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8338 22:17:35.147634 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8339 22:17:35.147717 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8340 22:17:35.147815 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8341 22:17:35.147901 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8342 22:17:35.147984 # ok 82 getpid() SVE VL 176
8343 22:17:35.148179 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8344 22:17:35.148416 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8345 22:17:35.148620 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8346 22:17:35.149087 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8347 22:17:35.149398 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8348 22:17:35.149584 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8349 22:17:35.149755 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8350 22:17:35.149905 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8351 22:17:35.150076 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8352 22:17:35.150491 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8353 22:17:35.150660 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8354 22:17:35.150790 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8355 22:17:35.150909 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8356 22:17:35.151028 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8357 22:17:35.151147 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8358 22:17:35.151262 # ok 98 getpid() SVE VL 160
8359 22:17:37.607147 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8360 22:17:37.607401 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8361 22:17:37.607494 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8362 22:17:37.607580 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8363 22:17:37.607664 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8364 22:17:37.608003 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8365 22:17:37.608225 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8366 22:17:37.608384 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8367 22:17:37.608518 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8368 22:17:37.608640 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8369 22:17:37.608765 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8370 22:17:37.608897 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8371 22:17:37.609081 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8372 22:17:37.609238 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8373 22:17:37.609388 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8374 22:17:37.609535 # ok 114 getpid() SVE VL 144
8375 22:17:37.609691 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8376 22:17:37.609826 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8377 22:17:37.609950 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8378 22:17:37.610074 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8379 22:17:37.610192 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8380 22:17:37.610308 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8381 22:17:37.610452 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8382 22:17:37.610572 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8383 22:17:37.610687 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8384 22:17:37.610805 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8385 22:17:37.610919 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8386 22:17:37.611034 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8387 22:17:37.611148 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8388 22:17:37.611260 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8389 22:17:37.611415 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8390 22:17:37.614495 # ok 130 getpid() SVE VL 128
8391 22:17:37.614603 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8392 22:17:37.614885 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8393 22:17:37.614979 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8394 22:17:37.615071 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8395 22:17:37.615156 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8396 22:17:37.615257 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8397 22:17:37.615344 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8398 22:17:37.615428 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8399 22:17:37.615526 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8400 22:17:37.615611 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8401 22:17:37.615715 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8402 22:17:37.615815 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8403 22:17:37.615914 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8404 22:17:37.616015 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8405 22:17:37.616115 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8406 22:17:37.616424 # ok 146 getpid() SVE VL 112
8407 22:17:37.616537 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8408 22:17:37.616646 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8409 22:17:37.616751 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8410 22:17:37.616850 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8411 22:17:37.617151 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8412 22:17:37.617250 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8413 22:17:37.617350 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8414 22:17:37.617449 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8415 22:17:37.617547 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8416 22:17:37.617872 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8417 22:17:37.617971 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8418 22:17:37.618067 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8419 22:17:37.618166 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8420 22:17:37.622328 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8421 22:17:37.622631 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8422 22:17:37.622733 # ok 162 getpid() SVE VL 96
8423 22:17:37.622820 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8424 22:17:37.622920 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8425 22:17:37.623007 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8426 22:17:37.623107 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8427 22:17:37.623193 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8428 22:17:37.623291 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8429 22:17:37.623622 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8430 22:17:37.623810 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8431 22:17:37.623966 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8432 22:17:37.624147 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8433 22:17:37.624304 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8434 22:17:37.624463 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8435 22:17:37.624611 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8436 22:17:37.624751 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8437 22:17:37.624882 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8438 22:17:37.625015 # ok 178 getpid() SVE VL 80
8439 22:17:37.625200 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8440 22:17:37.625369 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8441 22:17:37.625527 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8442 22:17:37.625700 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8443 22:17:37.625830 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8444 22:17:37.625947 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8445 22:17:37.626109 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8446 22:17:37.626242 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8447 22:17:37.626360 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8448 22:17:37.626476 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8449 22:17:37.626592 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8450 22:17:37.626735 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8451 22:17:37.626862 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8452 22:17:37.626979 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8453 22:17:37.627096 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8454 22:17:37.627214 # ok 194 getpid() SVE VL 64
8455 22:17:37.627329 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8456 22:17:39.811644 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8457 22:17:39.811882 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8458 22:17:39.812165 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8459 22:17:39.812259 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8460 22:17:39.812346 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8461 22:17:39.812429 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8462 22:17:39.812533 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8463 22:17:39.812621 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8464 22:17:39.812705 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8465 22:17:39.812790 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8466 22:17:39.812895 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8467 22:17:39.812984 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8468 22:17:39.813085 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8469 22:17:39.813173 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8470 22:17:39.813273 # ok 210 getpid() SVE VL 48
8471 22:17:39.813374 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8472 22:17:39.813463 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8473 22:17:39.813563 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8474 22:17:39.813673 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8475 22:17:39.813777 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8476 22:17:39.814078 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8477 22:17:39.814179 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8478 22:17:39.822251 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8479 22:17:39.822556 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8480 22:17:39.822653 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8481 22:17:39.822741 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8482 22:17:39.822842 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8483 22:17:39.822930 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8484 22:17:39.823016 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8485 22:17:39.823117 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8486 22:17:39.823204 # ok 226 getpid() SVE VL 32
8487 22:17:39.823306 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8488 22:17:39.823405 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8489 22:17:39.823504 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8490 22:17:39.823601 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8491 22:17:39.823702 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8492 22:17:39.823803 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8493 22:17:39.823912 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8494 22:17:39.824223 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8495 22:17:39.824327 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8496 22:17:39.824427 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8497 22:17:39.824529 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8498 22:17:39.824627 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8499 22:17:39.824779 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8500 22:17:39.825031 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8501 22:17:39.825213 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8502 22:17:39.825365 # ok 242 getpid() SVE VL 16
8503 22:17:39.825489 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8504 22:17:39.825608 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8505 22:17:39.825753 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8506 22:17:39.825998 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8507 22:17:39.826177 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8508 22:17:39.826354 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8509 22:17:39.826563 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8510 22:17:39.826704 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8511 22:17:39.826858 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8512 22:17:39.827002 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8513 22:17:39.827166 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8514 22:17:39.827325 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8515 22:17:39.827493 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8516 22:17:39.827650 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8517 22:17:39.827808 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8518 22:17:39.827957 # ok 258 sched_yield() FPSIMD
8519 22:17:39.828119 # ok 259 sched_yield() SVE VL 256
8520 22:17:39.828321 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8521 22:17:39.828497 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8522 22:17:39.828705 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8523 22:17:39.828904 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8524 22:17:39.829052 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8525 22:17:39.829202 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8526 22:17:39.829360 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8527 22:17:39.829518 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8528 22:17:39.830154 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8529 22:17:39.830309 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8530 22:17:39.830460 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8531 22:17:39.830587 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8532 22:17:39.830706 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8533 22:17:39.830823 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8534 22:17:39.830943 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8535 22:17:39.831061 # ok 275 sched_yield() SVE VL 240
8536 22:17:39.831178 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8537 22:17:39.831295 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8538 22:17:39.831623 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8539 22:17:39.831755 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8540 22:17:39.831874 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8541 22:17:39.831995 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8542 22:17:39.832112 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8543 22:17:39.832227 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8544 22:17:39.832343 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8545 22:17:39.834343 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8546 22:17:39.834779 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8547 22:17:39.834938 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8548 22:17:39.835062 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8549 22:17:39.835179 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8550 22:17:41.849049 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8551 22:17:41.849384 # ok 291 sched_yield() SVE VL 224
8552 22:17:41.849776 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8553 22:17:41.849926 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8554 22:17:41.850056 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8555 22:17:41.850172 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8556 22:17:41.850288 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8557 22:17:41.850410 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8558 22:17:41.850554 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8559 22:17:41.850675 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8560 22:17:41.850812 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8561 22:17:41.850949 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8562 22:17:41.851098 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8563 22:17:41.851224 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8564 22:17:41.851343 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8565 22:17:41.851522 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8566 22:17:41.851692 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8567 22:17:41.851879 # ok 307 sched_yield() SVE VL 208
8568 22:17:41.852036 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8569 22:17:41.852192 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8570 22:17:41.852350 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8571 22:17:41.852499 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8572 22:17:41.852650 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8573 22:17:41.852802 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8574 22:17:41.852991 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8575 22:17:41.853161 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8576 22:17:41.853354 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8577 22:17:41.853519 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8578 22:17:41.853730 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8579 22:17:41.853901 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8580 22:17:41.854048 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8581 22:17:41.854166 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8582 22:17:41.854278 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8583 22:17:41.854391 # ok 323 sched_yield() SVE VL 192
8584 22:17:41.854531 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8585 22:17:41.854653 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8586 22:17:41.854768 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8587 22:17:41.854882 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8588 22:17:41.854994 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8589 22:17:41.855106 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8590 22:17:41.855217 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8591 22:17:41.855330 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8592 22:17:41.855650 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8593 22:17:41.858543 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8594 22:17:41.858958 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8595 22:17:41.859152 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8596 22:17:41.859318 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8597 22:17:41.859476 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8598 22:17:41.859657 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8599 22:17:41.859806 # ok 339 sched_yield() SVE VL 176
8600 22:17:41.859995 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8601 22:17:41.860175 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8602 22:17:41.860348 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8603 22:17:41.860513 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8604 22:17:41.860693 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8605 22:17:41.860904 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8606 22:17:41.861063 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8607 22:17:41.861202 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8608 22:17:41.861351 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8609 22:17:41.861500 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8610 22:17:41.861667 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8611 22:17:41.861854 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8612 22:17:41.862038 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8613 22:17:41.862185 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8614 22:17:41.862302 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8615 22:17:41.862416 # ok 355 sched_yield() SVE VL 160
8616 22:17:41.862528 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8617 22:17:41.862674 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8618 22:17:41.862796 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8619 22:17:41.862912 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8620 22:17:41.863027 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8621 22:17:41.863141 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8622 22:17:41.863252 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8623 22:17:41.863363 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8624 22:17:41.863476 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8625 22:17:41.863588 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8626 22:17:41.863701 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8627 22:17:41.863814 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8628 22:17:41.863926 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8629 22:17:41.864038 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8630 22:17:41.866268 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8631 22:17:41.866692 # ok 371 sched_yield() SVE VL 144
8632 22:17:41.866879 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8633 22:17:41.867010 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8634 22:17:41.867128 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8635 22:17:41.867269 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8636 22:17:41.867390 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8637 22:17:43.872187 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8638 22:17:43.872543 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8639 22:17:43.872702 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8640 22:17:43.872839 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8641 22:17:43.872985 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8642 22:17:43.873172 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8643 22:17:43.873332 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8644 22:17:43.873488 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8645 22:17:43.873641 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8646 22:17:43.873808 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8647 22:17:43.873958 # ok 387 sched_yield() SVE VL 128
8648 22:17:43.874167 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8649 22:17:43.874332 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8650 22:17:43.874470 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8651 22:17:43.874592 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8652 22:17:43.874706 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8653 22:17:43.874818 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8654 22:17:43.874930 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8655 22:17:43.875041 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8656 22:17:43.875152 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8657 22:17:43.875290 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8658 22:17:43.875410 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8659 22:17:43.875522 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8660 22:17:43.882365 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8661 22:17:43.882843 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8662 22:17:43.883012 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8663 22:17:43.883140 # ok 403 sched_yield() SVE VL 112
8664 22:17:43.883260 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8665 22:17:43.883420 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8666 22:17:43.883542 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8667 22:17:43.883670 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8668 22:17:43.883810 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8669 22:17:43.883976 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8670 22:17:43.884192 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8671 22:17:43.884347 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8672 22:17:43.884484 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8673 22:17:43.884633 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8674 22:17:43.884811 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8675 22:17:43.884967 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8676 22:17:43.885158 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8677 22:17:43.885337 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8678 22:17:43.885511 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8679 22:17:43.885634 # ok 419 sched_yield() SVE VL 96
8680 22:17:43.885779 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8681 22:17:43.885987 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8682 22:17:43.886148 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8683 22:17:43.886299 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8684 22:17:43.886422 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8685 22:17:43.886536 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8686 22:17:43.886670 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8687 22:17:43.886799 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8688 22:17:43.886976 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8689 22:17:43.887126 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8690 22:17:43.887261 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8691 22:17:43.887397 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8692 22:17:43.887574 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8693 22:17:43.887715 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8694 22:17:43.887849 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8695 22:17:43.887964 # ok 435 sched_yield() SVE VL 80
8696 22:17:43.888079 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8697 22:17:43.888192 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8698 22:17:43.888324 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8699 22:17:43.888441 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8700 22:17:43.888571 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8701 22:17:43.888959 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8702 22:17:43.889144 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8703 22:17:43.889288 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8704 22:17:43.889434 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8705 22:17:43.889577 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8706 22:17:43.889736 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8707 22:17:43.889872 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8708 22:17:43.890022 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8709 22:17:43.890149 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8710 22:17:43.890292 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8711 22:17:43.890409 # ok 451 sched_yield() SVE VL 64
8712 22:17:43.890523 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8713 22:17:43.890639 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8714 22:17:43.890751 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8715 22:17:43.890862 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8716 22:17:43.890974 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8717 22:17:43.891084 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8718 22:17:43.891194 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8719 22:17:43.891305 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8720 22:17:43.894455 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8721 22:17:43.894873 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8722 22:17:43.895027 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8723 22:17:43.895148 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8724 22:17:44.549711 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8725 22:17:44.550044 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8726 22:17:44.550229 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8727 22:17:44.550379 # ok 467 sched_yield() SVE VL 48
8728 22:17:44.550521 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8729 22:17:44.550889 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8730 22:17:44.551029 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8731 22:17:44.551172 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8732 22:17:44.551316 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8733 22:17:44.551684 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8734 22:17:44.551852 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8735 22:17:44.551990 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8736 22:17:44.552133 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8737 22:17:44.552305 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8738 22:17:44.552439 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8739 22:17:44.552577 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8740 22:17:44.552749 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8741 22:17:44.552886 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8742 22:17:44.553025 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8743 22:17:44.553207 # ok 483 sched_yield() SVE VL 32
8744 22:17:44.553379 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8745 22:17:44.553570 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8746 22:17:44.553750 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8747 22:17:44.553911 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8748 22:17:44.554109 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8749 22:17:44.554278 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8750 22:17:44.554419 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8751 22:17:44.554559 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8752 22:17:44.554698 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8753 22:17:44.554874 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8754 22:17:44.555011 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8755 22:17:44.555152 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8756 22:17:44.555292 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8757 22:17:44.560552 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8758 22:17:44.560862 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8759 22:17:44.561276 # ok 499 sched_yield() SVE VL 16
8760 22:17:44.561443 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8761 22:17:44.561574 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8762 22:17:44.561717 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8763 22:17:44.561877 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8764 22:17:44.562021 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8765 22:17:44.562158 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8766 22:17:44.562303 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8767 22:17:44.562426 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8768 22:17:44.562540 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8769 22:17:44.562657 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8770 22:17:44.562776 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8771 22:17:44.562886 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8772 22:17:44.562994 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8773 22:17:44.563101 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8774 22:17:44.563208 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8775 22:17:44.563339 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8776 22:17:44.563452 ok 47 selftests: arm64: syscall-abi
8777 22:17:44.608568 # selftests: arm64: tpidr2
8778 22:17:44.763751 # TAP version 13
8779 22:17:44.764059 # 1..5
8780 22:17:44.764259 # # PID: 4506
8781 22:17:44.764394 # ok 1 default_value
8782 22:17:44.764510 # ok 2 write_read
8783 22:17:44.764842 # ok 3 write_sleep_read
8784 22:17:44.764967 # ok 4 write_fork_read
8785 22:17:44.765083 # ok 5 write_clone_read
8786 22:17:44.765192 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8787 22:17:44.775561 ok 48 selftests: arm64: tpidr2
8788 22:17:45.247067 arm64_tags_test pass
8789 22:17:45.247278 arm64_run_tags_test_sh pass
8790 22:17:45.247456 arm64_fake_sigreturn_bad_magic pass
8791 22:17:45.247646 arm64_fake_sigreturn_bad_size pass
8792 22:17:45.247839 arm64_fake_sigreturn_bad_size_for_magic0 pass
8793 22:17:45.248288 arm64_fake_sigreturn_duplicated_fpsimd pass
8794 22:17:45.248492 arm64_fake_sigreturn_misaligned_sp pass
8795 22:17:45.248665 arm64_fake_sigreturn_missing_fpsimd pass
8796 22:17:45.248824 arm64_fake_sigreturn_sme_change_vl pass
8797 22:17:45.248974 arm64_fake_sigreturn_sve_change_vl pass
8798 22:17:45.249126 arm64_mangle_pstate_invalid_compat_toggle pass
8799 22:17:45.249267 arm64_mangle_pstate_invalid_daif_bits pass
8800 22:17:45.249406 arm64_mangle_pstate_invalid_mode_el1h pass
8801 22:17:45.249554 arm64_mangle_pstate_invalid_mode_el1t pass
8802 22:17:45.249712 arm64_mangle_pstate_invalid_mode_el2h pass
8803 22:17:45.249857 arm64_mangle_pstate_invalid_mode_el2t pass
8804 22:17:45.250005 arm64_mangle_pstate_invalid_mode_el3h pass
8805 22:17:45.250128 arm64_mangle_pstate_invalid_mode_el3t pass
8806 22:17:45.250280 arm64_sme_trap_no_sm pass
8807 22:17:45.250403 arm64_sme_trap_non_streaming skip
8808 22:17:45.250520 arm64_sme_trap_za pass
8809 22:17:45.250637 arm64_sme_vl pass
8810 22:17:45.250754 arm64_ssve_regs pass
8811 22:17:45.250872 arm64_sve_regs pass
8812 22:17:45.250987 arm64_sve_vl pass
8813 22:17:45.251101 arm64_za_no_regs pass
8814 22:17:45.251215 arm64_za_regs pass
8815 22:17:45.251330 arm64_pac_global_corrupt_pac pass
8816 22:17:45.251439 arm64_pac_global_pac_instructions_not_nop pass
8817 22:17:45.251553 arm64_pac_global_pac_instructions_not_nop_generic pass
8818 22:17:45.251663 arm64_pac_global_single_thread_different_keys pass
8819 22:17:45.251772 arm64_pac_global_exec_changed_keys pass
8820 22:17:45.251888 arm64_pac_global_context_switch_keep_keys pass
8821 22:17:45.251999 arm64_pac_global_context_switch_keep_keys_generic pass
8822 22:17:45.252109 arm64_pac pass
8823 22:17:45.252218 arm64_fp-stress_FPSIMD-0-0 pass
8824 22:17:45.252328 arm64_fp-stress_SVE-VL-256-0 pass
8825 22:17:45.252437 arm64_fp-stress_SVE-VL-240-0 pass
8826 22:17:45.252550 arm64_fp-stress_SVE-VL-224-0 pass
8827 22:17:45.252659 arm64_fp-stress_SVE-VL-208-0 pass
8828 22:17:45.254258 arm64_fp-stress_SVE-VL-192-0 pass
8829 22:17:45.254662 arm64_fp-stress_SVE-VL-176-0 pass
8830 22:17:45.254826 arm64_fp-stress_SVE-VL-160-0 pass
8831 22:17:45.255015 arm64_fp-stress_SVE-VL-144-0 pass
8832 22:17:45.255204 arm64_fp-stress_SVE-VL-128-0 pass
8833 22:17:45.255362 arm64_fp-stress_SVE-VL-112-0 pass
8834 22:17:45.255496 arm64_fp-stress_SVE-VL-96-0 pass
8835 22:17:45.255629 arm64_fp-stress_SVE-VL-80-0 pass
8836 22:17:45.255777 arm64_fp-stress_SVE-VL-64-0 pass
8837 22:17:45.255928 arm64_fp-stress_SVE-VL-48-0 pass
8838 22:17:45.256085 arm64_fp-stress_SVE-VL-32-0 pass
8839 22:17:45.256239 arm64_fp-stress_SVE-VL-16-0 pass
8840 22:17:45.256394 arm64_fp-stress_SSVE-VL-256-0 pass
8841 22:17:45.256565 arm64_fp-stress_ZA-VL-256-0 pass
8842 22:17:45.256692 arm64_fp-stress_SSVE-VL-128-0 pass
8843 22:17:45.256807 arm64_fp-stress_ZA-VL-128-0 pass
8844 22:17:45.256924 arm64_fp-stress_SSVE-VL-64-0 pass
8845 22:17:45.257056 arm64_fp-stress_ZA-VL-64-0 pass
8846 22:17:45.257212 arm64_fp-stress_SSVE-VL-32-0 pass
8847 22:17:45.257366 arm64_fp-stress_ZA-VL-32-0 pass
8848 22:17:45.257496 arm64_fp-stress_SSVE-VL-16-0 pass
8849 22:17:45.257640 arm64_fp-stress_ZA-VL-16-0 pass
8850 22:17:45.257778 arm64_fp-stress pass
8851 22:17:45.257962 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8852 22:17:45.258113 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8853 22:17:45.258249 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8854 22:17:45.258366 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8855 22:17:45.258480 arm64_sve-ptrace_Set_SVE_VL_16 pass
8856 22:17:45.258624 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8857 22:17:45.258747 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8858 22:17:45.258863 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8859 22:17:45.258977 arm64_sve-ptrace_Set_SVE_VL_32 pass
8860 22:17:45.259089 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8861 22:17:45.259202 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8862 22:17:45.259314 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8863 22:17:45.259427 arm64_sve-ptrace_Set_SVE_VL_48 pass
8864 22:17:45.259539 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8865 22:17:45.259652 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8866 22:17:45.259765 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8867 22:17:45.259876 arm64_sve-ptrace_Set_SVE_VL_64 pass
8868 22:17:45.259986 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8869 22:17:45.262261 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8870 22:17:45.262687 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8871 22:17:45.262854 arm64_sve-ptrace_Set_SVE_VL_80 pass
8872 22:17:45.263027 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8873 22:17:45.263217 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8874 22:17:45.263377 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8875 22:17:45.263567 arm64_sve-ptrace_Set_SVE_VL_96 pass
8876 22:17:45.263714 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8877 22:17:45.263855 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8878 22:17:45.264028 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8879 22:17:45.264172 arm64_sve-ptrace_Set_SVE_VL_112 pass
8880 22:17:45.264315 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8881 22:17:45.264446 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8882 22:17:45.264594 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8883 22:17:45.264743 arm64_sve-ptrace_Set_SVE_VL_128 pass
8884 22:17:45.264900 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8885 22:17:45.265107 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8886 22:17:45.265257 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8887 22:17:45.265411 arm64_sve-ptrace_Set_SVE_VL_144 pass
8888 22:17:45.265555 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8889 22:17:45.265697 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8890 22:17:45.265893 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8891 22:17:45.266065 arm64_sve-ptrace_Set_SVE_VL_160 pass
8892 22:17:45.266204 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8893 22:17:45.266340 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8894 22:17:45.266516 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8895 22:17:45.266650 arm64_sve-ptrace_Set_SVE_VL_176 pass
8896 22:17:45.266789 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8897 22:17:45.266927 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8898 22:17:45.267063 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8899 22:17:45.267199 arm64_sve-ptrace_Set_SVE_VL_192 pass
8900 22:17:45.267334 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8901 22:17:45.267470 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8902 22:17:45.270218 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8903 22:17:45.270631 arm64_sve-ptrace_Set_SVE_VL_208 pass
8904 22:17:45.270815 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8905 22:17:45.270955 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8906 22:17:45.271142 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8907 22:17:45.271287 arm64_sve-ptrace_Set_SVE_VL_224 pass
8908 22:17:45.271411 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8909 22:17:45.271553 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8910 22:17:45.271733 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8911 22:17:45.271930 arm64_sve-ptrace_Set_SVE_VL_240 pass
8912 22:17:45.272093 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8913 22:17:45.272293 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8914 22:17:45.272467 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8915 22:17:45.272672 arm64_sve-ptrace_Set_SVE_VL_256 pass
8916 22:17:45.272881 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8917 22:17:45.273019 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8918 22:17:45.273137 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8919 22:17:45.273269 arm64_sve-ptrace_Set_SVE_VL_272 pass
8920 22:17:45.273399 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8921 22:17:45.273540 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8922 22:17:45.273706 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8923 22:17:45.273898 arm64_sve-ptrace_Set_SVE_VL_288 pass
8924 22:17:45.274080 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8925 22:17:45.274213 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8926 22:17:45.274361 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8927 22:17:45.274484 arm64_sve-ptrace_Set_SVE_VL_304 pass
8928 22:17:45.274599 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8929 22:17:45.274713 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8930 22:17:45.274824 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8931 22:17:45.274935 arm64_sve-ptrace_Set_SVE_VL_320 pass
8932 22:17:45.275046 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8933 22:17:45.275159 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8934 22:17:45.275271 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8935 22:17:45.275382 arm64_sve-ptrace_Set_SVE_VL_336 pass
8936 22:17:45.275494 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8937 22:17:45.278215 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8938 22:17:45.278619 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8939 22:17:45.278839 arm64_sve-ptrace_Set_SVE_VL_352 pass
8940 22:17:45.279053 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8941 22:17:45.279265 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8942 22:17:45.279511 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8943 22:17:45.279695 arm64_sve-ptrace_Set_SVE_VL_368 pass
8944 22:17:45.279877 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8945 22:17:45.280042 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8946 22:17:45.280198 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8947 22:17:45.280355 arm64_sve-ptrace_Set_SVE_VL_384 pass
8948 22:17:45.280501 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8949 22:17:45.280659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8950 22:17:45.280848 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8951 22:17:45.281012 arm64_sve-ptrace_Set_SVE_VL_400 pass
8952 22:17:45.281161 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8953 22:17:45.281345 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8954 22:17:45.281488 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8955 22:17:45.281606 arm64_sve-ptrace_Set_SVE_VL_416 pass
8956 22:17:45.281739 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8957 22:17:45.281855 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8958 22:17:45.281982 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8959 22:17:45.282098 arm64_sve-ptrace_Set_SVE_VL_432 pass
8960 22:17:45.282213 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8961 22:17:45.282357 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8962 22:17:45.282484 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8963 22:17:45.282601 arm64_sve-ptrace_Set_SVE_VL_448 pass
8964 22:17:45.282717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8965 22:17:45.282833 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8966 22:17:45.294323 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8967 22:17:45.294766 arm64_sve-ptrace_Set_SVE_VL_464 pass
8968 22:17:45.294957 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8969 22:17:45.295134 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8970 22:17:45.295284 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8971 22:17:45.295470 arm64_sve-ptrace_Set_SVE_VL_480 pass
8972 22:17:45.295645 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8973 22:17:45.295797 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8974 22:17:45.295941 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8975 22:17:45.296137 arm64_sve-ptrace_Set_SVE_VL_496 pass
8976 22:17:45.296298 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8977 22:17:45.296468 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8978 22:17:45.296622 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8979 22:17:45.296756 arm64_sve-ptrace_Set_SVE_VL_512 pass
8980 22:17:45.296879 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8981 22:17:45.297034 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8982 22:17:45.297175 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8983 22:17:45.297330 arm64_sve-ptrace_Set_SVE_VL_528 pass
8984 22:17:45.297464 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8985 22:17:45.297641 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8986 22:17:45.297862 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8987 22:17:45.298004 arm64_sve-ptrace_Set_SVE_VL_544 pass
8988 22:17:45.298132 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8989 22:17:45.298248 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8990 22:17:45.298363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8991 22:17:45.298475 arm64_sve-ptrace_Set_SVE_VL_560 pass
8992 22:17:45.298588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8993 22:17:45.298699 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8994 22:17:45.298808 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8995 22:17:45.298918 arm64_sve-ptrace_Set_SVE_VL_576 pass
8996 22:17:45.299033 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8997 22:17:45.299143 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8998 22:17:45.299252 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8999 22:17:45.299386 arm64_sve-ptrace_Set_SVE_VL_592 pass
9000 22:17:45.302227 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
9001 22:17:45.302643 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
9002 22:17:45.302816 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
9003 22:17:45.302985 arm64_sve-ptrace_Set_SVE_VL_608 pass
9004 22:17:45.303151 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
9005 22:17:45.303317 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
9006 22:17:45.303451 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
9007 22:17:45.303576 arm64_sve-ptrace_Set_SVE_VL_624 pass
9008 22:17:45.303707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
9009 22:17:45.303869 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
9010 22:17:45.304039 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
9011 22:17:45.304227 arm64_sve-ptrace_Set_SVE_VL_640 pass
9012 22:17:45.304403 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
9013 22:17:45.304584 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
9014 22:17:45.304780 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
9015 22:17:45.304961 arm64_sve-ptrace_Set_SVE_VL_656 pass
9016 22:17:45.305149 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
9017 22:17:45.305329 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
9018 22:17:45.305542 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
9019 22:17:45.305750 arm64_sve-ptrace_Set_SVE_VL_672 pass
9020 22:17:45.305943 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
9021 22:17:45.306087 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
9022 22:17:45.306199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
9023 22:17:45.306308 arm64_sve-ptrace_Set_SVE_VL_688 pass
9024 22:17:45.306415 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
9025 22:17:45.306520 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
9026 22:17:45.306627 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
9027 22:17:45.306732 arm64_sve-ptrace_Set_SVE_VL_704 pass
9028 22:17:45.306838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
9029 22:17:45.306971 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
9030 22:17:45.307087 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
9031 22:17:45.307196 arm64_sve-ptrace_Set_SVE_VL_720 pass
9032 22:17:45.307304 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
9033 22:17:45.307412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
9034 22:17:45.310438 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
9035 22:17:45.310607 arm64_sve-ptrace_Set_SVE_VL_736 pass
9036 22:17:45.310756 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
9037 22:17:45.310904 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
9038 22:17:45.311113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
9039 22:17:45.311308 arm64_sve-ptrace_Set_SVE_VL_752 pass
9040 22:17:45.311455 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
9041 22:17:45.311608 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
9042 22:17:45.311819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
9043 22:17:45.312002 arm64_sve-ptrace_Set_SVE_VL_768 pass
9044 22:17:45.312198 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
9045 22:17:45.312375 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
9046 22:17:45.312538 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
9047 22:17:45.312701 arm64_sve-ptrace_Set_SVE_VL_784 pass
9048 22:17:45.312906 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
9049 22:17:45.313038 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
9050 22:17:45.313183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
9051 22:17:45.313343 arm64_sve-ptrace_Set_SVE_VL_800 pass
9052 22:17:45.313470 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
9053 22:17:45.313643 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
9054 22:17:45.313805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
9055 22:17:45.313968 arm64_sve-ptrace_Set_SVE_VL_816 pass
9056 22:17:45.314106 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
9057 22:17:45.314252 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
9058 22:17:45.314376 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
9059 22:17:45.314491 arm64_sve-ptrace_Set_SVE_VL_832 pass
9060 22:17:45.314605 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
9061 22:17:45.314717 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
9062 22:17:45.314827 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
9063 22:17:45.314936 arm64_sve-ptrace_Set_SVE_VL_848 pass
9064 22:17:45.315045 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
9065 22:17:45.315154 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
9066 22:17:45.315266 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
9067 22:17:45.315376 arm64_sve-ptrace_Set_SVE_VL_864 pass
9068 22:17:45.318231 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
9069 22:17:45.318666 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
9070 22:17:45.318864 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
9071 22:17:45.319039 arm64_sve-ptrace_Set_SVE_VL_880 pass
9072 22:17:45.319229 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
9073 22:17:45.319426 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
9074 22:17:45.319606 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
9075 22:17:45.319768 arm64_sve-ptrace_Set_SVE_VL_896 pass
9076 22:17:45.319903 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
9077 22:17:45.320025 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
9078 22:17:45.320154 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
9079 22:17:45.320285 arm64_sve-ptrace_Set_SVE_VL_912 pass
9080 22:17:45.320496 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
9081 22:17:45.320663 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
9082 22:17:45.320814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
9083 22:17:45.320964 arm64_sve-ptrace_Set_SVE_VL_928 pass
9084 22:17:45.321119 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
9085 22:17:45.321265 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
9086 22:17:45.321414 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
9087 22:17:45.321562 arm64_sve-ptrace_Set_SVE_VL_944 pass
9088 22:17:45.322217 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
9089 22:17:45.322351 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
9090 22:17:45.322501 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
9091 22:17:45.322623 arm64_sve-ptrace_Set_SVE_VL_960 pass
9092 22:17:45.322738 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
9093 22:17:45.322851 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
9094 22:17:45.322963 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
9095 22:17:45.323076 arm64_sve-ptrace_Set_SVE_VL_976 pass
9096 22:17:45.323187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
9097 22:17:45.323298 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
9098 22:17:45.323411 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
9099 22:17:45.323522 arm64_sve-ptrace_Set_SVE_VL_992 pass
9100 22:17:45.323634 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
9101 22:17:45.323745 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
9102 22:17:45.323857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
9103 22:17:45.323968 arm64_sve-ptrace_Set_SVE_VL_1008 pass
9104 22:17:45.326240 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
9105 22:17:45.326656 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
9106 22:17:45.326819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
9107 22:17:45.326995 arm64_sve-ptrace_Set_SVE_VL_1024 pass
9108 22:17:45.327205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
9109 22:17:45.327395 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
9110 22:17:45.327595 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
9111 22:17:45.327791 arm64_sve-ptrace_Set_SVE_VL_1040 pass
9112 22:17:45.327989 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
9113 22:17:45.328183 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
9114 22:17:45.328322 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
9115 22:17:45.328477 arm64_sve-ptrace_Set_SVE_VL_1056 pass
9116 22:17:45.328624 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
9117 22:17:45.328746 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
9118 22:17:45.328858 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
9119 22:17:45.328969 arm64_sve-ptrace_Set_SVE_VL_1072 pass
9120 22:17:45.329077 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
9121 22:17:45.329187 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
9122 22:17:45.329322 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
9123 22:17:45.329435 arm64_sve-ptrace_Set_SVE_VL_1088 pass
9124 22:17:45.329545 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
9125 22:17:45.329677 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
9126 22:17:45.329878 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
9127 22:17:45.330057 arm64_sve-ptrace_Set_SVE_VL_1104 pass
9128 22:17:45.340601 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
9129 22:17:45.340785 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
9130 22:17:45.341219 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
9131 22:17:45.341405 arm64_sve-ptrace_Set_SVE_VL_1120 pass
9132 22:17:45.341592 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
9133 22:17:45.341778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
9134 22:17:45.341920 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
9135 22:17:45.342054 arm64_sve-ptrace_Set_SVE_VL_1136 pass
9136 22:17:45.342226 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
9137 22:17:45.342389 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
9138 22:17:45.342542 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
9139 22:17:45.342690 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9140 22:17:45.342848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9141 22:17:45.342986 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9142 22:17:45.343108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9143 22:17:45.343227 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9144 22:17:45.343374 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9145 22:17:45.343547 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9146 22:17:45.343716 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9147 22:17:45.343895 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9148 22:17:45.344077 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9149 22:17:45.344283 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9150 22:17:45.344478 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9151 22:17:45.344660 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9152 22:17:45.344835 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9153 22:17:45.345019 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9154 22:17:45.345265 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9155 22:17:45.345449 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9156 22:17:45.345603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9157 22:17:45.345806 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9158 22:17:45.345993 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9159 22:17:45.346168 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9160 22:17:45.346346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9161 22:17:45.346483 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9162 22:17:45.346619 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9163 22:17:45.346754 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9164 22:17:45.346888 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9165 22:17:45.347023 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9166 22:17:45.347160 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9167 22:17:45.347297 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9168 22:17:45.347655 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9169 22:17:45.347792 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9170 22:17:45.347933 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9171 22:17:45.348070 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9172 22:17:45.348208 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9173 22:17:45.348345 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9174 22:17:45.348482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9175 22:17:45.348619 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9176 22:17:45.348755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9177 22:17:45.350260 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9178 22:17:45.350677 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9179 22:17:45.350833 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9180 22:17:45.350978 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9181 22:17:45.351150 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9182 22:17:45.351285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9183 22:17:45.351423 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9184 22:17:45.351560 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9185 22:17:45.351750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9186 22:17:45.351923 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9187 22:17:45.352082 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9188 22:17:45.352262 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9189 22:17:45.352457 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9190 22:17:45.352633 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9191 22:17:45.352767 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9192 22:17:45.352920 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9193 22:17:45.353039 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9194 22:17:45.353179 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9195 22:17:45.353300 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9196 22:17:45.353414 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9197 22:17:45.353526 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9198 22:17:45.353636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9199 22:17:45.353849 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9200 22:17:45.354077 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9201 22:17:45.354256 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9202 22:17:45.354397 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9203 22:17:45.354535 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9204 22:17:45.354672 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9205 22:17:45.354808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9206 22:17:45.354944 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9207 22:17:45.355080 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9208 22:17:45.355215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9209 22:17:45.358304 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9210 22:17:45.358744 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9211 22:17:45.358898 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9212 22:17:45.359016 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9213 22:17:45.359129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9214 22:17:45.359490 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9215 22:17:45.359712 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9216 22:17:45.359896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9217 22:17:45.360089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9218 22:17:45.360276 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9219 22:17:45.360465 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9220 22:17:45.360655 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9221 22:17:45.360864 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9222 22:17:45.361037 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9223 22:17:45.361216 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9224 22:17:45.361380 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9225 22:17:45.361505 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9226 22:17:45.361614 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9227 22:17:45.361807 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9228 22:17:45.361991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9229 22:17:45.362168 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9230 22:17:45.362306 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9231 22:17:45.362442 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9232 22:17:45.362579 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9233 22:17:45.362754 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9234 22:17:45.362887 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9235 22:17:45.363026 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9236 22:17:45.363164 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9237 22:17:45.363302 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9238 22:17:45.363443 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9239 22:17:45.363579 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9240 22:17:45.363716 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9241 22:17:45.363852 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9242 22:17:45.363990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9243 22:17:45.364126 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9244 22:17:45.364263 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9245 22:17:45.366269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9246 22:17:45.366675 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9247 22:17:45.366843 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9248 22:17:45.366986 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9249 22:17:45.367190 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9250 22:17:45.367365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9251 22:17:45.367559 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9252 22:17:45.367741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9253 22:17:45.367987 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9254 22:17:45.368185 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9255 22:17:45.368360 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9256 22:17:45.368525 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9257 22:17:45.368673 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9258 22:17:45.368816 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9259 22:17:45.368964 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9260 22:17:45.369205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9261 22:17:45.369378 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9262 22:17:45.369487 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9263 22:17:45.369577 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9264 22:17:45.369689 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9265 22:17:45.369843 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9266 22:17:45.369994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9267 22:17:45.370131 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9268 22:17:45.370240 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9269 22:17:45.370336 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9270 22:17:45.370424 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9271 22:17:45.370487 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9272 22:17:45.370566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9273 22:17:45.370635 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9274 22:17:45.370700 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9275 22:17:45.370762 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9276 22:17:45.370823 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9277 22:17:45.370883 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9278 22:17:45.370943 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9279 22:17:45.371003 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9280 22:17:45.374521 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9281 22:17:45.374713 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9282 22:17:45.374960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9283 22:17:45.375148 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9284 22:17:45.375288 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9285 22:17:45.375418 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9286 22:17:45.375558 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9287 22:17:45.375739 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9288 22:17:45.388070 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9289 22:17:45.388496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9290 22:17:45.388687 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9291 22:17:45.388852 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9292 22:17:45.389048 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9293 22:17:45.389315 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9294 22:17:45.389501 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9295 22:17:45.389707 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9296 22:17:45.389904 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9297 22:17:45.390081 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9298 22:17:45.390250 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9299 22:17:45.390454 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9300 22:17:45.390646 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9301 22:17:45.390815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9302 22:17:45.390972 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9303 22:17:45.391124 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9304 22:17:45.391259 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9305 22:17:45.391403 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9306 22:17:45.391586 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9307 22:17:45.391737 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9308 22:17:45.391890 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9309 22:17:45.392100 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9310 22:17:45.392294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9311 22:17:45.392497 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9312 22:17:45.392660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9313 22:17:45.392811 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9314 22:17:45.392994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9315 22:17:45.393178 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9316 22:17:45.393362 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9317 22:17:45.393529 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9318 22:17:45.393685 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9319 22:17:45.393825 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9320 22:17:45.393961 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9321 22:17:45.394097 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9322 22:17:45.394232 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9323 22:17:45.394366 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9324 22:17:45.394535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9325 22:17:45.394669 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9326 22:17:45.394806 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9327 22:17:45.395157 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9328 22:17:45.395292 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9329 22:17:45.395432 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9330 22:17:45.395568 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9331 22:17:45.395706 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9332 22:17:45.395842 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9333 22:17:45.395977 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9334 22:17:45.396114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9335 22:17:45.396248 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9336 22:17:45.396383 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9337 22:17:45.396518 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9338 22:17:45.396652 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9339 22:17:45.396787 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9340 22:17:45.396921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9341 22:17:45.398208 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9342 22:17:45.398608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9343 22:17:45.398763 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9344 22:17:45.398899 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9345 22:17:45.399084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9346 22:17:45.399238 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9347 22:17:45.399377 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9348 22:17:45.399565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9349 22:17:45.399785 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9350 22:17:45.399941 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9351 22:17:45.400111 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9352 22:17:45.400280 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9353 22:17:45.400421 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9354 22:17:45.400558 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9355 22:17:45.400762 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9356 22:17:45.400940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9357 22:17:45.401105 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9358 22:17:45.401264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9359 22:17:45.401422 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9360 22:17:45.401578 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9361 22:17:45.401742 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9362 22:17:45.401931 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9363 22:17:45.402066 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9364 22:17:45.402178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9365 22:17:45.402288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9366 22:17:45.402397 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9367 22:17:45.402505 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9368 22:17:45.402611 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9369 22:17:45.402719 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9370 22:17:45.402827 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9371 22:17:45.402934 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9372 22:17:45.403064 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9373 22:17:45.403177 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9374 22:17:45.406511 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9375 22:17:45.406736 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9376 22:17:45.406917 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9377 22:17:45.407162 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9378 22:17:45.407346 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9379 22:17:45.407547 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9380 22:17:45.407726 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9381 22:17:45.407876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9382 22:17:45.408095 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9383 22:17:45.408291 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9384 22:17:45.408517 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9385 22:17:45.408751 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9386 22:17:45.408967 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9387 22:17:45.409161 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9388 22:17:45.409311 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9389 22:17:45.409458 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9390 22:17:45.409599 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9391 22:17:45.409763 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9392 22:17:45.410041 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9393 22:17:45.410222 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9394 22:17:45.410386 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9395 22:17:45.410548 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9396 22:17:45.410708 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9397 22:17:45.410865 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9398 22:17:45.411025 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9399 22:17:45.411183 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9400 22:17:45.411341 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9401 22:17:45.411499 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9402 22:17:45.411656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9403 22:17:45.411813 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9404 22:17:45.411969 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9405 22:17:45.412126 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9406 22:17:45.412282 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9407 22:17:45.412438 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9408 22:17:45.412594 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9409 22:17:45.414282 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9410 22:17:45.414673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9411 22:17:45.414859 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9412 22:17:45.415050 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9413 22:17:45.415211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9414 22:17:45.415652 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9415 22:17:45.415867 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9416 22:17:45.416092 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9417 22:17:45.416288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9418 22:17:45.416466 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9419 22:17:45.416584 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9420 22:17:45.416704 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9421 22:17:45.416824 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9422 22:17:45.416999 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9423 22:17:45.417146 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9424 22:17:45.417296 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9425 22:17:45.417449 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9426 22:17:45.417568 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9427 22:17:45.417702 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9428 22:17:45.417822 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9429 22:17:45.417941 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9430 22:17:45.418090 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9431 22:17:45.418189 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9432 22:17:45.418277 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9433 22:17:45.418364 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9434 22:17:45.418452 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9435 22:17:45.418527 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9436 22:17:45.418601 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9437 22:17:45.418664 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9438 22:17:45.418723 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9439 22:17:45.418783 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9440 22:17:45.418841 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9441 22:17:45.418899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9442 22:17:45.418958 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9443 22:17:45.419016 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9444 22:17:45.422259 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9445 22:17:45.422682 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9446 22:17:45.422836 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9447 22:17:45.422989 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9448 22:17:45.436381 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9449 22:17:45.436759 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9450 22:17:45.436970 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9451 22:17:45.437193 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9452 22:17:45.437383 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9453 22:17:45.437644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9454 22:17:45.437840 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9455 22:17:45.438043 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9456 22:17:45.438227 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9457 22:17:45.438466 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9458 22:17:45.438690 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9459 22:17:45.438875 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9460 22:17:45.439091 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9461 22:17:45.439272 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9462 22:17:45.439410 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9463 22:17:45.439584 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9464 22:17:45.439749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9465 22:17:45.439920 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9466 22:17:45.440061 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9467 22:17:45.440229 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9468 22:17:45.440396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9469 22:17:45.440547 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9470 22:17:45.440719 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9471 22:17:45.440874 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9472 22:17:45.441014 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9473 22:17:45.441188 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9474 22:17:45.441340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9475 22:17:45.441503 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9476 22:17:45.441720 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9477 22:17:45.441921 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9478 22:17:45.442099 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9479 22:17:45.442276 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9480 22:17:45.442440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9481 22:17:45.442581 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9482 22:17:45.442717 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9483 22:17:45.442854 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9484 22:17:45.442990 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9485 22:17:45.443125 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9486 22:17:45.443260 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9487 22:17:45.443613 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9488 22:17:45.443750 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9489 22:17:45.443890 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9490 22:17:45.444028 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9491 22:17:45.444165 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9492 22:17:45.444300 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9493 22:17:45.444436 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9494 22:17:45.444572 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9495 22:17:45.444708 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9496 22:17:45.444844 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9497 22:17:45.444979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9498 22:17:45.445114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9499 22:17:45.446231 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9500 22:17:45.446645 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9501 22:17:45.446832 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9502 22:17:45.447026 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9503 22:17:45.447179 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9504 22:17:45.447376 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9505 22:17:45.447539 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9506 22:17:45.447679 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9507 22:17:45.447861 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9508 22:17:45.448053 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9509 22:17:45.448217 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9510 22:17:45.448418 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9511 22:17:45.448623 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9512 22:17:45.448842 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9513 22:17:45.449021 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9514 22:17:45.449192 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9515 22:17:45.449354 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9516 22:17:45.449474 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9517 22:17:45.449611 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9518 22:17:45.449788 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9519 22:17:45.449899 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9520 22:17:45.449994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9521 22:17:45.450111 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9522 22:17:45.450203 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9523 22:17:45.450289 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9524 22:17:45.450375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9525 22:17:45.450461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9526 22:17:45.450548 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9527 22:17:45.450633 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9528 22:17:45.450720 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9529 22:17:45.450805 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9530 22:17:45.450911 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9531 22:17:45.451002 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9532 22:17:45.451089 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9533 22:17:45.454252 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9534 22:17:45.454712 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9535 22:17:45.454900 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9536 22:17:45.455086 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9537 22:17:45.455287 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9538 22:17:45.455478 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9539 22:17:45.455656 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9540 22:17:45.455869 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9541 22:17:45.456011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9542 22:17:45.456152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9543 22:17:45.456303 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9544 22:17:45.456468 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9545 22:17:45.456658 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9546 22:17:45.456834 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9547 22:17:45.456984 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9548 22:17:45.457144 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9549 22:17:45.457311 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9550 22:17:45.457486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9551 22:17:45.457660 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9552 22:17:45.457788 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9553 22:17:45.457922 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9554 22:17:45.458098 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9555 22:17:45.458256 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9556 22:17:45.458412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9557 22:17:45.458536 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9558 22:17:45.458651 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9559 22:17:45.458766 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9560 22:17:45.458879 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9561 22:17:45.458991 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9562 22:17:45.459103 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9563 22:17:45.459214 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9564 22:17:45.459326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9565 22:17:45.459440 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9566 22:17:45.459554 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9567 22:17:45.459665 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9568 22:17:45.462218 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9569 22:17:45.462650 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9570 22:17:45.462793 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9571 22:17:45.462939 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9572 22:17:45.463052 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9573 22:17:45.463189 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9574 22:17:45.463290 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9575 22:17:45.463405 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9576 22:17:45.463524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9577 22:17:45.463685 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9578 22:17:45.463830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9579 22:17:45.463966 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9580 22:17:45.464122 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9581 22:17:45.464269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9582 22:17:45.464399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9583 22:17:45.464541 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9584 22:17:45.464694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9585 22:17:45.464826 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9586 22:17:45.464936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9587 22:17:45.465083 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9588 22:17:45.465223 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9589 22:17:45.465409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9590 22:17:45.465551 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9591 22:17:45.465705 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9592 22:17:45.465847 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9593 22:17:45.465990 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9594 22:17:45.466098 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9595 22:17:45.466189 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9596 22:17:45.466276 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9597 22:17:45.466384 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9598 22:17:45.466478 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9599 22:17:45.466566 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9600 22:17:45.466639 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9601 22:17:45.466697 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9602 22:17:45.470221 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9603 22:17:45.470612 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9604 22:17:45.470701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9605 22:17:45.470797 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9606 22:17:45.470886 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9607 22:17:45.470976 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9608 22:17:45.483984 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9609 22:17:45.484091 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9610 22:17:45.484440 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9611 22:17:45.484638 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9612 22:17:45.484841 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9613 22:17:45.485064 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9614 22:17:45.485252 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9615 22:17:45.485422 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9616 22:17:45.485616 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9617 22:17:45.485789 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9618 22:17:45.485975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9619 22:17:45.486195 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9620 22:17:45.486351 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9621 22:17:45.486480 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9622 22:17:45.486606 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9623 22:17:45.486731 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9624 22:17:45.486850 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9625 22:17:45.486972 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9626 22:17:45.487092 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9627 22:17:45.487209 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9628 22:17:45.487356 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9629 22:17:45.487490 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9630 22:17:45.487661 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9631 22:17:45.487800 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9632 22:17:45.487938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9633 22:17:45.488076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9634 22:17:45.488212 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9635 22:17:45.488348 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9636 22:17:45.488484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9637 22:17:45.488677 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9638 22:17:45.488845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9639 22:17:45.489015 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9640 22:17:45.489170 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9641 22:17:45.489324 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9642 22:17:45.489476 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9643 22:17:45.489616 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9644 22:17:45.489765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9645 22:17:45.489914 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9646 22:17:45.490052 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9647 22:17:45.490377 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9648 22:17:45.490502 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9649 22:17:45.490618 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9650 22:17:45.490728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9651 22:17:45.490835 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9652 22:17:45.490943 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9653 22:17:45.491052 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9654 22:17:45.491160 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9655 22:17:45.491267 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9656 22:17:45.491376 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9657 22:17:45.491486 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9658 22:17:45.491594 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9659 22:17:45.491701 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9660 22:17:45.494442 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9661 22:17:45.494633 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9662 22:17:45.494788 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9663 22:17:45.495017 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9664 22:17:45.495187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9665 22:17:45.495337 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9666 22:17:45.495523 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9667 22:17:45.495678 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9668 22:17:45.495825 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9669 22:17:45.495981 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9670 22:17:45.496158 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9671 22:17:45.496289 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9672 22:17:45.496419 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9673 22:17:45.496581 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9674 22:17:45.496709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9675 22:17:45.496821 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9676 22:17:45.497026 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9677 22:17:45.497198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9678 22:17:45.497383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9679 22:17:45.497565 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9680 22:17:45.497736 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9681 22:17:45.497866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9682 22:17:45.498012 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9683 22:17:45.498125 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9684 22:17:45.498263 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9685 22:17:45.498382 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9686 22:17:45.498493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9687 22:17:45.498605 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9688 22:17:45.498717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9689 22:17:45.498825 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9690 22:17:45.498934 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9691 22:17:45.499042 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9692 22:17:45.499150 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9693 22:17:45.502235 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9694 22:17:45.502658 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9695 22:17:45.502854 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9696 22:17:45.503007 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9697 22:17:45.503206 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9698 22:17:45.503662 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9699 22:17:45.503805 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9700 22:17:45.503920 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9701 22:17:45.504030 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9702 22:17:45.504139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9703 22:17:45.504276 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9704 22:17:45.504394 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9705 22:17:45.504504 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9706 22:17:45.504615 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9707 22:17:45.505565 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9708 22:17:45.505754 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9709 22:17:45.505893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9710 22:17:45.506016 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9711 22:17:45.506136 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9712 22:17:45.506253 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9713 22:17:45.506363 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9714 22:17:45.506470 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9715 22:17:45.506577 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9716 22:17:45.506682 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9717 22:17:45.506787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9718 22:17:45.506893 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9719 22:17:45.506999 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9720 22:17:45.507105 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9721 22:17:45.507210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9722 22:17:45.507316 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9723 22:17:45.507629 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9724 22:17:45.507750 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9725 22:17:45.507861 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9726 22:17:45.507970 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9727 22:17:45.510340 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9728 22:17:45.510781 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9729 22:17:45.510959 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9730 22:17:45.511118 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9731 22:17:45.511252 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9732 22:17:45.511423 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9733 22:17:45.511557 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9734 22:17:45.511716 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9735 22:17:45.511880 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9736 22:17:45.512042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9737 22:17:45.512237 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9738 22:17:45.512409 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9739 22:17:45.512578 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9740 22:17:45.512749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9741 22:17:45.512929 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9742 22:17:45.513095 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9743 22:17:45.513262 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9744 22:17:45.513428 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9745 22:17:45.513630 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9746 22:17:45.513815 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9747 22:17:45.513985 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9748 22:17:45.514141 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9749 22:17:45.514259 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9750 22:17:45.514369 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9751 22:17:45.514479 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9752 22:17:45.514587 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9753 22:17:45.514697 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9754 22:17:45.514806 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9755 22:17:45.514915 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9756 22:17:45.515024 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9757 22:17:45.515160 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9758 22:17:45.515279 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9759 22:17:45.515392 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9760 22:17:45.515503 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9761 22:17:45.518266 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9762 22:17:45.518728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9763 22:17:45.518895 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9764 22:17:45.519021 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9765 22:17:45.519166 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9766 22:17:45.519287 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9767 22:17:45.519397 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9768 22:17:45.541810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9769 22:17:45.542200 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9770 22:17:45.542354 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9771 22:17:45.542551 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9772 22:17:45.542731 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9773 22:17:45.542899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9774 22:17:45.543040 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9775 22:17:45.543183 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9776 22:17:45.543300 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9777 22:17:45.543431 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9778 22:17:45.543547 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9779 22:17:45.543676 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9780 22:17:45.543834 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9781 22:17:45.544007 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9782 22:17:45.544133 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9783 22:17:45.544296 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9784 22:17:45.544438 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9785 22:17:45.544608 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9786 22:17:45.544749 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9787 22:17:45.544899 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9788 22:17:45.545016 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9789 22:17:45.545190 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9790 22:17:45.545366 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9791 22:17:45.545538 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9792 22:17:45.545761 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9793 22:17:45.545915 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9794 22:17:45.546088 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9795 22:17:45.546235 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9796 22:17:45.546355 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9797 22:17:45.550322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9798 22:17:45.550741 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9799 22:17:45.550915 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9800 22:17:45.551068 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9801 22:17:45.551248 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9802 22:17:45.551407 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9803 22:17:45.551561 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9804 22:17:45.551712 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9805 22:17:45.551884 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9806 22:17:45.552046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9807 22:17:45.552191 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9808 22:17:45.552342 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9809 22:17:45.552547 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9810 22:17:45.552705 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9811 22:17:45.552869 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9812 22:17:45.553038 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9813 22:17:45.553192 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9814 22:17:45.553380 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9815 22:17:45.553549 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9816 22:17:45.553726 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9817 22:17:45.553874 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9818 22:17:45.554030 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9819 22:17:45.554187 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9820 22:17:45.554305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9821 22:17:45.554441 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9822 22:17:45.554560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9823 22:17:45.554672 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9824 22:17:45.554784 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9825 22:17:45.554893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9826 22:17:45.558382 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9827 22:17:45.558727 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9828 22:17:45.558917 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9829 22:17:45.559124 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9830 22:17:45.559267 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9831 22:17:45.559397 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9832 22:17:45.559536 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9833 22:17:45.559693 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9834 22:17:45.559811 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9835 22:17:45.559922 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9836 22:17:45.560032 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9837 22:17:45.560163 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9838 22:17:45.560275 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9839 22:17:45.560400 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9840 22:17:45.560568 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9841 22:17:45.560731 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9842 22:17:45.560868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9843 22:17:45.561022 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9844 22:17:45.561196 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9845 22:17:45.561354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9846 22:17:45.561505 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9847 22:17:45.561669 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9848 22:17:45.561855 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9849 22:17:45.562021 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9850 22:17:45.562148 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9851 22:17:45.562258 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9852 22:17:45.562366 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9853 22:17:45.562498 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9854 22:17:45.562613 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9855 22:17:45.566417 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9856 22:17:45.566853 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9857 22:17:45.567002 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9858 22:17:45.567168 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9859 22:17:45.567370 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9860 22:17:45.567555 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9861 22:17:45.567709 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9862 22:17:45.567879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9863 22:17:45.568049 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9864 22:17:45.568182 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9865 22:17:45.568347 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9866 22:17:45.568510 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9867 22:17:45.568643 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9868 22:17:45.568844 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9869 22:17:45.569011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9870 22:17:45.569169 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9871 22:17:45.569340 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9872 22:17:45.569520 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9873 22:17:45.569696 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9874 22:17:45.569872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9875 22:17:45.570062 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9876 22:17:45.570209 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9877 22:17:45.570331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9878 22:17:45.570443 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9879 22:17:45.570551 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9880 22:17:45.570660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9881 22:17:45.570766 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9882 22:17:45.570872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9883 22:17:45.570978 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9884 22:17:45.571107 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9885 22:17:45.574513 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9886 22:17:45.574944 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9887 22:17:45.575128 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9888 22:17:45.575311 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9889 22:17:45.575471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9890 22:17:45.575650 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9891 22:17:45.575822 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9892 22:17:45.575972 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9893 22:17:45.576153 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9894 22:17:45.576312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9895 22:17:45.576533 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9896 22:17:45.576696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9897 22:17:45.576868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9898 22:17:45.577059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9899 22:17:45.577259 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9900 22:17:45.577459 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9901 22:17:45.577639 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9902 22:17:45.577807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9903 22:17:45.578007 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9904 22:17:45.578159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9905 22:17:45.578313 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9906 22:17:45.582388 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9907 22:17:45.582601 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9908 22:17:45.582997 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9909 22:17:45.583181 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9910 22:17:45.583338 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9911 22:17:45.583494 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9912 22:17:45.583726 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9913 22:17:45.583913 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9914 22:17:45.584077 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9915 22:17:45.584232 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9916 22:17:45.584391 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9917 22:17:45.584549 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9918 22:17:45.584675 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9919 22:17:45.584819 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9920 22:17:45.584936 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9921 22:17:45.585049 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9922 22:17:45.585182 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9923 22:17:45.585294 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9924 22:17:45.585405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9925 22:17:45.585514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9926 22:17:45.585625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9927 22:17:45.585750 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9928 22:17:45.600490 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9929 22:17:45.600686 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9930 22:17:45.601099 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9931 22:17:45.601294 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9932 22:17:45.601448 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9933 22:17:45.601584 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9934 22:17:45.601754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9935 22:17:45.601968 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9936 22:17:45.602141 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9937 22:17:45.602330 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9938 22:17:45.602499 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9939 22:17:45.602657 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9940 22:17:45.602809 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9941 22:17:45.602963 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9942 22:17:45.603152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9943 22:17:45.603302 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9944 22:17:45.603455 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9945 22:17:45.603613 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9946 22:17:45.603766 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9947 22:17:45.603920 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9948 22:17:45.604075 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9949 22:17:45.604228 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9950 22:17:45.604417 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9951 22:17:45.604576 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9952 22:17:45.604730 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9953 22:17:45.604884 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9954 22:17:45.605036 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9955 22:17:45.605170 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9956 22:17:45.605292 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9957 22:17:45.605466 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9958 22:17:45.605618 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9959 22:17:45.605807 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9960 22:17:45.606008 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9961 22:17:45.606189 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9962 22:17:45.606326 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9963 22:17:45.606438 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9964 22:17:45.606549 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9965 22:17:45.606660 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9966 22:17:45.606770 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9967 22:17:45.606880 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9968 22:17:45.607201 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9969 22:17:45.607329 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9970 22:17:45.607444 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9971 22:17:45.607556 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9972 22:17:45.607668 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9973 22:17:45.610325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9974 22:17:45.610709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9975 22:17:45.610890 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9976 22:17:45.611058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9977 22:17:45.611254 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9978 22:17:45.611419 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9979 22:17:45.611575 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9980 22:17:45.611728 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9981 22:17:45.611919 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9982 22:17:45.612076 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9983 22:17:45.612228 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9984 22:17:45.612378 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9985 22:17:45.612528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9986 22:17:45.612678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9987 22:17:45.612858 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9988 22:17:45.613018 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9989 22:17:45.613174 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9990 22:17:45.613330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9991 22:17:45.613498 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9992 22:17:45.613665 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9993 22:17:45.613830 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9994 22:17:45.613985 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9995 22:17:45.614154 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9996 22:17:45.614275 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9997 22:17:45.614387 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9998 22:17:45.614496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9999 22:17:45.614605 arm64_sve-ptrace_Set_SVE_VL_4592 pass
10000 22:17:45.614713 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
10001 22:17:45.614821 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
10002 22:17:45.614928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
10003 22:17:45.615036 arm64_sve-ptrace_Set_SVE_VL_4608 pass
10004 22:17:45.615144 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
10005 22:17:45.615253 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
10006 22:17:45.618340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
10007 22:17:45.618812 arm64_sve-ptrace_Set_SVE_VL_4624 pass
10008 22:17:45.619004 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
10009 22:17:45.619160 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
10010 22:17:45.619315 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
10011 22:17:45.619469 arm64_sve-ptrace_Set_SVE_VL_4640 pass
10012 22:17:45.619654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
10013 22:17:45.619802 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
10014 22:17:45.619956 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
10015 22:17:45.620114 arm64_sve-ptrace_Set_SVE_VL_4656 pass
10016 22:17:45.620270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
10017 22:17:45.620431 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
10018 22:17:45.620596 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
10019 22:17:45.620756 arm64_sve-ptrace_Set_SVE_VL_4672 pass
10020 22:17:45.620941 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
10021 22:17:45.621130 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
10022 22:17:45.621341 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
10023 22:17:45.621542 arm64_sve-ptrace_Set_SVE_VL_4688 pass
10024 22:17:45.621751 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
10025 22:17:45.621929 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
10026 22:17:45.622245 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
10027 22:17:45.622370 arm64_sve-ptrace_Set_SVE_VL_4704 pass
10028 22:17:45.622481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
10029 22:17:45.622591 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
10030 22:17:45.622700 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
10031 22:17:45.622810 arm64_sve-ptrace_Set_SVE_VL_4720 pass
10032 22:17:45.622950 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
10033 22:17:45.623071 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
10034 22:17:45.623183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
10035 22:17:45.623294 arm64_sve-ptrace_Set_SVE_VL_4736 pass
10036 22:17:45.623404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
10037 22:17:45.623514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
10038 22:17:45.623625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
10039 22:17:45.623734 arm64_sve-ptrace_Set_SVE_VL_4752 pass
10040 22:17:45.623843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
10041 22:17:45.623953 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
10042 22:17:45.624064 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
10043 22:17:45.624174 arm64_sve-ptrace_Set_SVE_VL_4768 pass
10044 22:17:45.626265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
10045 22:17:45.626732 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
10046 22:17:45.626939 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
10047 22:17:45.627087 arm64_sve-ptrace_Set_SVE_VL_4784 pass
10048 22:17:45.627218 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
10049 22:17:45.627340 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
10050 22:17:45.627517 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
10051 22:17:45.627672 arm64_sve-ptrace_Set_SVE_VL_4800 pass
10052 22:17:45.627824 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
10053 22:17:45.627984 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
10054 22:17:45.628119 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
10055 22:17:45.628270 arm64_sve-ptrace_Set_SVE_VL_4816 pass
10056 22:17:45.628402 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
10057 22:17:45.628556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
10058 22:17:45.628687 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
10059 22:17:45.628813 arm64_sve-ptrace_Set_SVE_VL_4832 pass
10060 22:17:45.628970 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
10061 22:17:45.629103 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
10062 22:17:45.629227 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
10063 22:17:45.629346 arm64_sve-ptrace_Set_SVE_VL_4848 pass
10064 22:17:45.629466 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
10065 22:17:45.629590 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
10066 22:17:45.629759 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
10067 22:17:45.629887 arm64_sve-ptrace_Set_SVE_VL_4864 pass
10068 22:17:45.630003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
10069 22:17:45.630131 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
10070 22:17:45.630280 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
10071 22:17:45.630381 arm64_sve-ptrace_Set_SVE_VL_4880 pass
10072 22:17:45.630473 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
10073 22:17:45.630564 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
10074 22:17:45.630653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
10075 22:17:45.630742 arm64_sve-ptrace_Set_SVE_VL_4896 pass
10076 22:17:45.630830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
10077 22:17:45.630920 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
10078 22:17:45.631008 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
10079 22:17:45.631097 arm64_sve-ptrace_Set_SVE_VL_4912 pass
10080 22:17:45.631185 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
10081 22:17:45.634246 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
10082 22:17:45.634582 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
10083 22:17:45.634727 arm64_sve-ptrace_Set_SVE_VL_4928 pass
10084 22:17:45.634861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
10085 22:17:45.634979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
10086 22:17:45.635075 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
10087 22:17:45.635166 arm64_sve-ptrace_Set_SVE_VL_4944 pass
10088 22:17:45.649645 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
10089 22:17:45.650163 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
10090 22:17:45.650377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
10091 22:17:45.650565 arm64_sve-ptrace_Set_SVE_VL_4960 pass
10092 22:17:45.650750 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
10093 22:17:45.650968 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
10094 22:17:45.651148 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
10095 22:17:45.651312 arm64_sve-ptrace_Set_SVE_VL_4976 pass
10096 22:17:45.651532 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
10097 22:17:45.651716 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
10098 22:17:45.651885 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
10099 22:17:45.652059 arm64_sve-ptrace_Set_SVE_VL_4992 pass
10100 22:17:45.652232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
10101 22:17:45.652452 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
10102 22:17:45.652665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
10103 22:17:45.652842 arm64_sve-ptrace_Set_SVE_VL_5008 pass
10104 22:17:45.653037 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
10105 22:17:45.653255 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
10106 22:17:45.653468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
10107 22:17:45.653668 arm64_sve-ptrace_Set_SVE_VL_5024 pass
10108 22:17:45.653845 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
10109 22:17:45.654035 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
10110 22:17:45.654248 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
10111 22:17:45.654398 arm64_sve-ptrace_Set_SVE_VL_5040 pass
10112 22:17:45.654531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
10113 22:17:45.654700 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
10114 22:17:45.654840 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
10115 22:17:45.654973 arm64_sve-ptrace_Set_SVE_VL_5056 pass
10116 22:17:45.655103 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
10117 22:17:45.655235 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
10118 22:17:45.655363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
10119 22:17:45.655493 arm64_sve-ptrace_Set_SVE_VL_5072 pass
10120 22:17:45.655622 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
10121 22:17:45.655750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
10122 22:17:45.655878 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
10123 22:17:45.656008 arm64_sve-ptrace_Set_SVE_VL_5088 pass
10124 22:17:45.656136 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
10125 22:17:45.656265 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
10126 22:17:45.656631 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
10127 22:17:45.656801 arm64_sve-ptrace_Set_SVE_VL_5104 pass
10128 22:17:45.656936 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
10129 22:17:45.658247 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
10130 22:17:45.658586 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
10131 22:17:45.658713 arm64_sve-ptrace_Set_SVE_VL_5120 pass
10132 22:17:45.658819 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
10133 22:17:45.658954 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
10134 22:17:45.659062 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
10135 22:17:45.659167 arm64_sve-ptrace_Set_SVE_VL_5136 pass
10136 22:17:45.659305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
10137 22:17:45.659427 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
10138 22:17:45.659565 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
10139 22:17:45.659705 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10140 22:17:45.659831 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10141 22:17:45.659984 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10142 22:17:45.660127 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10143 22:17:45.660254 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10144 22:17:45.660391 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10145 22:17:45.660511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10146 22:17:45.660658 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10147 22:17:45.660792 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10148 22:17:45.660921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10149 22:17:45.660999 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10150 22:17:45.661090 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10151 22:17:45.661192 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10152 22:17:45.661292 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10153 22:17:45.661367 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10154 22:17:45.661459 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10155 22:17:45.661542 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10156 22:17:45.661638 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10157 22:17:45.661749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10158 22:17:45.661849 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10159 22:17:45.661963 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10160 22:17:45.662056 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10161 22:17:45.662121 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10162 22:17:45.662193 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10163 22:17:45.666276 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10164 22:17:45.666662 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10165 22:17:45.666756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10166 22:17:45.666848 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10167 22:17:45.666937 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10168 22:17:45.667073 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10169 22:17:45.667162 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10170 22:17:45.667246 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10171 22:17:45.667321 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10172 22:17:45.667412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10173 22:17:45.667512 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10174 22:17:45.667598 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10175 22:17:45.667703 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10176 22:17:45.667794 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10177 22:17:45.667884 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10178 22:17:45.667984 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10179 22:17:45.668077 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10180 22:17:45.668157 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10181 22:17:45.668251 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10182 22:17:45.668348 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10183 22:17:45.668470 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10184 22:17:45.668568 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10185 22:17:45.668690 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10186 22:17:45.668791 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10187 22:17:45.668896 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10188 22:17:45.668988 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10189 22:17:45.669107 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10190 22:17:45.669218 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10191 22:17:45.669304 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10192 22:17:45.669405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10193 22:17:45.669507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10194 22:17:45.669614 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10195 22:17:45.669735 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10196 22:17:45.669828 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10197 22:17:45.669925 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10198 22:17:45.670234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10199 22:17:45.674429 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10200 22:17:45.674530 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10201 22:17:45.674654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10202 22:17:45.674765 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10203 22:17:45.674872 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10204 22:17:45.675002 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10205 22:17:45.675094 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10206 22:17:45.675183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10207 22:17:45.675271 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10208 22:17:45.675397 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10209 22:17:45.675495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10210 22:17:45.675608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10211 22:17:45.675684 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10212 22:17:45.675767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10213 22:17:45.675852 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10214 22:17:45.675930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10215 22:17:45.676011 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10216 22:17:45.676346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10217 22:17:45.676583 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10218 22:17:45.676769 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10219 22:17:45.676988 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10220 22:17:45.677167 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10221 22:17:45.677319 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10222 22:17:45.677422 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10223 22:17:45.677528 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10224 22:17:45.677636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10225 22:17:45.677984 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10226 22:17:45.678083 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10227 22:17:45.678151 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10228 22:17:45.678214 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10229 22:17:45.678274 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10230 22:17:45.678335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10231 22:17:45.678395 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10232 22:17:45.682242 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10233 22:17:45.682546 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10234 22:17:45.682644 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10235 22:17:45.682737 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10236 22:17:45.682837 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10237 22:17:45.682951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10238 22:17:45.683048 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10239 22:17:45.683139 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10240 22:17:45.683216 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10241 22:17:45.683289 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10242 22:17:45.683373 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10243 22:17:45.683466 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10244 22:17:45.683741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10245 22:17:45.683836 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10246 22:17:45.683932 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10247 22:17:45.684000 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10248 22:17:45.697821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10249 22:17:45.698262 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10250 22:17:45.698463 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10251 22:17:45.698626 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10252 22:17:45.698802 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10253 22:17:45.698951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10254 22:17:45.699111 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10255 22:17:45.699306 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10256 22:17:45.699550 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10257 22:17:45.699740 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10258 22:17:45.699896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10259 22:17:45.700086 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10260 22:17:45.700263 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10261 22:17:45.700424 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10262 22:17:45.700607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10263 22:17:45.700759 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10264 22:17:45.700916 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10265 22:17:45.701114 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10266 22:17:45.701282 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10267 22:17:45.701440 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10268 22:17:45.701603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10269 22:17:45.701775 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10270 22:17:45.701932 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10271 22:17:45.702095 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10272 22:17:45.702213 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10273 22:17:45.702324 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10274 22:17:45.702433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10275 22:17:45.702542 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10276 22:17:45.702651 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10277 22:17:45.702787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10278 22:17:45.702903 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10279 22:17:45.703014 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10280 22:17:45.703123 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10281 22:17:45.703232 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10282 22:17:45.703340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10283 22:17:45.703448 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10284 22:17:45.703557 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10285 22:17:45.706241 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10286 22:17:45.706662 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10287 22:17:45.706843 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10288 22:17:45.707015 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10289 22:17:45.707207 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10290 22:17:45.707370 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10291 22:17:45.707531 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10292 22:17:45.707690 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10293 22:17:45.707882 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10294 22:17:45.708059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10295 22:17:45.708224 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10296 22:17:45.708377 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10297 22:17:45.708530 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10298 22:17:45.708681 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10299 22:17:45.708854 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10300 22:17:45.709003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10301 22:17:45.709158 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10302 22:17:45.709362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10303 22:17:45.709537 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10304 22:17:45.709706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10305 22:17:45.709863 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10306 22:17:45.710054 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10307 22:17:45.710213 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10308 22:17:45.710368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10309 22:17:45.710495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10310 22:17:45.710613 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10311 22:17:45.710731 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10312 22:17:45.710848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10313 22:17:45.710964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10314 22:17:45.711080 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10315 22:17:45.711196 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10316 22:17:45.711310 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10317 22:17:45.711424 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10318 22:17:45.714316 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10319 22:17:45.714507 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10320 22:17:45.714885 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10321 22:17:45.715069 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10322 22:17:45.715220 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10323 22:17:45.715373 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10324 22:17:45.715523 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10325 22:17:45.715709 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10326 22:17:45.715866 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10327 22:17:45.716017 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10328 22:17:45.716145 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10329 22:17:45.716311 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10330 22:17:45.716471 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10331 22:17:45.716611 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10332 22:17:45.716750 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10333 22:17:45.716937 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10334 22:17:45.717095 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10335 22:17:45.717249 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10336 22:17:45.717406 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10337 22:17:45.717551 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10338 22:17:45.717716 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10339 22:17:45.717874 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10340 22:17:45.718051 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10341 22:17:45.718201 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10342 22:17:45.718320 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10343 22:17:45.718466 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10344 22:17:45.718587 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10345 22:17:45.718705 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10346 22:17:45.718819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10347 22:17:45.718933 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10348 22:17:45.719044 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10349 22:17:45.719156 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10350 22:17:45.719267 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10351 22:17:45.719379 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10352 22:17:45.719490 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10353 22:17:45.722470 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10354 22:17:45.722652 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10355 22:17:45.722842 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10356 22:17:45.723042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10357 22:17:45.723249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10358 22:17:45.723457 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10359 22:17:45.723619 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10360 22:17:45.723756 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10361 22:17:45.723900 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10362 22:17:45.724046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10363 22:17:45.724218 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10364 22:17:45.724415 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10365 22:17:45.724573 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10366 22:17:45.724727 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10367 22:17:45.724869 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10368 22:17:45.725026 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10369 22:17:45.725179 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10370 22:17:45.725335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10371 22:17:45.725525 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10372 22:17:45.725699 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10373 22:17:45.725853 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10374 22:17:45.725995 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10375 22:17:45.726127 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10376 22:17:45.726241 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10377 22:17:45.726351 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10378 22:17:45.726461 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10379 22:17:45.726571 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10380 22:17:45.726680 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10381 22:17:45.726816 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10382 22:17:45.726931 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10383 22:17:45.727041 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10384 22:17:45.727151 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10385 22:17:45.727261 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10386 22:17:45.727370 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10387 22:17:45.730468 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10388 22:17:45.730670 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10389 22:17:45.730882 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10390 22:17:45.731065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10391 22:17:45.731223 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10392 22:17:45.731378 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10393 22:17:45.731570 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10394 22:17:45.731736 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10395 22:17:45.731895 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10396 22:17:45.732053 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10397 22:17:45.732214 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10398 22:17:45.732402 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10399 22:17:45.732560 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10400 22:17:45.732686 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10401 22:17:45.732799 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10402 22:17:45.732929 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10403 22:17:45.733105 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10404 22:17:45.733248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10405 22:17:45.733420 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10406 22:17:45.733556 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10407 22:17:45.733707 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10408 22:17:45.746601 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10409 22:17:45.746996 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10410 22:17:45.747187 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10411 22:17:45.747323 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10412 22:17:45.747477 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10413 22:17:45.747613 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10414 22:17:45.747760 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10415 22:17:45.747898 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10416 22:17:45.748136 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10417 22:17:45.748287 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10418 22:17:45.748404 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10419 22:17:45.748523 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10420 22:17:45.748636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10421 22:17:45.748749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10422 22:17:45.748893 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10423 22:17:45.749022 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10424 22:17:45.749174 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10425 22:17:45.749322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10426 22:17:45.749475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10427 22:17:45.749625 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10428 22:17:45.749819 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10429 22:17:45.750035 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10430 22:17:45.750207 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10431 22:17:45.750328 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10432 22:17:45.750441 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10433 22:17:45.750549 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10434 22:17:45.750658 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10435 22:17:45.750766 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10436 22:17:45.750898 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10437 22:17:45.751017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10438 22:17:45.754269 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10439 22:17:45.754694 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10440 22:17:45.754882 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10441 22:17:45.755048 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10442 22:17:45.755191 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10443 22:17:45.755347 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10444 22:17:45.755507 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10445 22:17:45.755652 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10446 22:17:45.755805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10447 22:17:45.755933 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10448 22:17:45.756152 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10449 22:17:45.756331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10450 22:17:45.756518 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10451 22:17:45.756669 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10452 22:17:45.756816 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10453 22:17:45.756961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10454 22:17:45.757147 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10455 22:17:45.757369 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10456 22:17:45.757547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10457 22:17:45.758178 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10458 22:17:45.758347 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10459 22:17:45.758487 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10460 22:17:45.758624 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10461 22:17:45.758761 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10462 22:17:45.758898 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10463 22:17:45.759034 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10464 22:17:45.759170 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10465 22:17:45.759344 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10466 22:17:45.759479 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10467 22:17:45.759617 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10468 22:17:45.759756 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10469 22:17:45.759894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10470 22:17:45.762265 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10471 22:17:45.762458 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10472 22:17:45.763108 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10473 22:17:45.763321 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10474 22:17:45.763484 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10475 22:17:45.763615 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10476 22:17:45.763755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10477 22:17:45.763897 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10478 22:17:45.764087 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10479 22:17:45.764264 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10480 22:17:45.764505 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10481 22:17:45.764689 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10482 22:17:45.764833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10483 22:17:45.764977 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10484 22:17:45.765122 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10485 22:17:45.765253 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10486 22:17:45.765393 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10487 22:17:45.765544 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10488 22:17:45.765701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10489 22:17:45.765893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10490 22:17:45.766075 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10491 22:17:45.766282 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10492 22:17:45.766415 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10493 22:17:45.766553 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10494 22:17:45.766691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10495 22:17:45.766828 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10496 22:17:45.766964 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10497 22:17:45.767101 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10498 22:17:45.767237 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10499 22:17:45.767375 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10500 22:17:45.767510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10501 22:17:45.767647 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10502 22:17:45.767783 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10503 22:17:45.767921 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10504 22:17:45.768058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10505 22:17:45.770239 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10506 22:17:45.770659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10507 22:17:45.770831 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10508 22:17:45.770976 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10509 22:17:45.771111 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10510 22:17:45.771303 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10511 22:17:45.771456 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10512 22:17:45.771607 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10513 22:17:45.771724 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10514 22:17:45.771883 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10515 22:17:45.772076 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10516 22:17:45.772268 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10517 22:17:45.772439 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10518 22:17:45.772605 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10519 22:17:45.772737 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10520 22:17:45.772874 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10521 22:17:45.773017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10522 22:17:45.773167 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10523 22:17:45.773319 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10524 22:17:45.773504 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10525 22:17:45.774134 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10526 22:17:45.774299 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10527 22:17:45.774464 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10528 22:17:45.774603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10529 22:17:45.774739 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10530 22:17:45.774876 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10531 22:17:45.775014 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10532 22:17:45.775151 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10533 22:17:45.775288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10534 22:17:45.775423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10535 22:17:45.775561 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10536 22:17:45.775734 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10537 22:17:45.775869 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10538 22:17:45.776007 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10539 22:17:45.776143 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10540 22:17:45.776280 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10541 22:17:45.778198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10542 22:17:45.778599 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10543 22:17:45.778767 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10544 22:17:45.778927 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10545 22:17:45.779104 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10546 22:17:45.779272 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10547 22:17:45.779435 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10548 22:17:45.779626 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10549 22:17:45.779836 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10550 22:17:45.779989 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10551 22:17:45.780142 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10552 22:17:45.780298 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10553 22:17:45.780453 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10554 22:17:45.780605 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10555 22:17:45.780756 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10556 22:17:45.780938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10557 22:17:45.781096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10558 22:17:45.781251 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10559 22:17:45.781383 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10560 22:17:45.781491 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10561 22:17:45.781625 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10562 22:17:45.781832 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10563 22:17:45.782018 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10564 22:17:45.782229 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10565 22:17:45.782364 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10566 22:17:45.782503 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10567 22:17:45.782642 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10568 22:17:45.795135 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10569 22:17:45.795555 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10570 22:17:45.795737 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10571 22:17:45.795883 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10572 22:17:45.796057 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10573 22:17:45.796213 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10574 22:17:45.796362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10575 22:17:45.796500 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10576 22:17:45.796649 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10577 22:17:45.796827 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10578 22:17:45.796983 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10579 22:17:45.797134 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10580 22:17:45.797287 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10581 22:17:45.797435 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10582 22:17:45.797571 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10583 22:17:45.797762 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10584 22:17:45.797912 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10585 22:17:45.798056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10586 22:17:45.798192 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10587 22:17:45.798306 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10588 22:17:45.798416 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10589 22:17:45.798525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10590 22:17:45.798635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10591 22:17:45.798770 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10592 22:17:45.798886 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10593 22:17:45.798999 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10594 22:17:45.802241 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10595 22:17:45.802666 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10596 22:17:45.802856 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10597 22:17:45.803002 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10598 22:17:45.803129 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10599 22:17:45.803311 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10600 22:17:45.803451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10601 22:17:45.803603 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10602 22:17:45.803757 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10603 22:17:45.803915 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10604 22:17:45.804097 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10605 22:17:45.804242 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10606 22:17:45.804395 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10607 22:17:45.804547 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10608 22:17:45.804691 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10609 22:17:45.804843 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10610 22:17:45.805027 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10611 22:17:45.805182 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10612 22:17:45.805339 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10613 22:17:45.805476 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10614 22:17:45.805625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10615 22:17:45.805945 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10616 22:17:45.806133 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10617 22:17:45.806311 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10618 22:17:45.806445 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10619 22:17:45.806583 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10620 22:17:45.806721 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10621 22:17:45.806859 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10622 22:17:45.806997 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10623 22:17:45.807134 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10624 22:17:45.807269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10625 22:17:45.807404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10626 22:17:45.810230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10627 22:17:45.810628 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10628 22:17:45.810779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10629 22:17:45.810973 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10630 22:17:45.811113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10631 22:17:45.811329 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10632 22:17:45.811488 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10633 22:17:45.811644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10634 22:17:45.811795 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10635 22:17:45.811935 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10636 22:17:45.812145 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10637 22:17:45.812319 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10638 22:17:45.812459 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10639 22:17:45.812601 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10640 22:17:45.812744 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10641 22:17:45.812886 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10642 22:17:45.813065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10643 22:17:45.813250 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10644 22:17:45.813439 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10645 22:17:45.813575 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10646 22:17:45.817783 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10647 22:17:45.817953 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10648 22:17:45.818103 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10649 22:17:45.818257 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10650 22:17:45.818403 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10651 22:17:45.818550 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10652 22:17:45.818697 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10653 22:17:45.818844 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10654 22:17:45.819029 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10655 22:17:45.819187 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10656 22:17:45.819338 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10657 22:17:45.819487 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10658 22:17:45.819635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10659 22:17:45.819784 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10660 22:17:45.819931 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10661 22:17:45.820078 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10662 22:17:45.820226 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10663 22:17:45.820379 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10664 22:17:45.820527 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10665 22:17:45.820912 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10666 22:17:45.821073 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10667 22:17:45.821225 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10668 22:17:45.821373 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10669 22:17:45.821521 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10670 22:17:45.821681 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10671 22:17:45.821832 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10672 22:17:45.821980 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10673 22:17:45.822128 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10674 22:17:45.822276 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10675 22:17:45.822424 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10676 22:17:45.822571 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10677 22:17:45.822717 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10678 22:17:45.822865 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10679 22:17:45.823013 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10680 22:17:45.823159 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10681 22:17:45.823306 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10682 22:17:45.823454 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10683 22:17:45.823601 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10684 22:17:45.823780 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10685 22:17:45.823934 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10686 22:17:45.824082 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10687 22:17:45.824230 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10688 22:17:45.824381 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10689 22:17:45.824529 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10690 22:17:45.824677 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10691 22:17:45.824825 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10692 22:17:45.824973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10693 22:17:45.825121 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10694 22:17:45.826211 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10695 22:17:45.826622 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10696 22:17:45.826801 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10697 22:17:45.826958 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10698 22:17:45.827141 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10699 22:17:45.827290 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10700 22:17:45.827441 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10701 22:17:45.827592 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10702 22:17:45.827742 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10703 22:17:45.827893 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10704 22:17:45.828072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10705 22:17:45.828220 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10706 22:17:45.828364 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10707 22:17:45.828517 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10708 22:17:45.828655 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10709 22:17:45.828796 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10710 22:17:45.828927 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10711 22:17:45.829060 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10712 22:17:45.829206 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10713 22:17:45.829378 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10714 22:17:45.829519 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10715 22:17:45.829641 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10716 22:17:45.829779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10717 22:17:45.829892 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10718 22:17:45.830017 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10719 22:17:45.830162 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10720 22:17:45.830300 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10721 22:17:45.830396 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10722 22:17:45.830483 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10723 22:17:45.830574 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10724 22:17:45.830688 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10725 22:17:45.830778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10726 22:17:45.830864 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10727 22:17:45.830950 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10728 22:17:45.844356 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10729 22:17:45.844680 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10730 22:17:45.844804 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10731 22:17:45.844919 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10732 22:17:45.845042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10733 22:17:45.845160 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10734 22:17:45.845287 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10735 22:17:45.845469 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10736 22:17:45.845695 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10737 22:17:45.845877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10738 22:17:45.846044 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10739 22:17:45.846195 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10740 22:17:45.846359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10741 22:17:45.846542 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10742 22:17:45.846722 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10743 22:17:45.846939 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10744 22:17:45.847090 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10745 22:17:45.847263 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10746 22:17:45.847472 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10747 22:17:45.847657 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10748 22:17:45.847812 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10749 22:17:45.848017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10750 22:17:45.848203 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10751 22:17:45.848387 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10752 22:17:45.848602 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10753 22:17:45.848792 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10754 22:17:45.849008 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10755 22:17:45.849255 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10756 22:17:45.849454 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10757 22:17:45.849634 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10758 22:17:45.849860 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10759 22:17:45.850090 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10760 22:17:45.850260 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10761 22:17:45.850418 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10762 22:17:45.854356 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10763 22:17:45.854814 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10764 22:17:45.855027 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10765 22:17:45.855217 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10766 22:17:45.855423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10767 22:17:45.855593 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10768 22:17:45.855758 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10769 22:17:45.855923 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10770 22:17:45.856119 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10771 22:17:45.856284 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10772 22:17:45.856440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10773 22:17:45.856586 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10774 22:17:45.856733 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10775 22:17:45.856923 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10776 22:17:45.857091 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10777 22:17:45.857278 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10778 22:17:45.857444 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10779 22:17:45.857601 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10780 22:17:45.857776 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10781 22:17:45.857968 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10782 22:17:45.858107 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10783 22:17:45.858226 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10784 22:17:45.858340 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10785 22:17:45.858456 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10786 22:17:45.858570 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10787 22:17:45.858683 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10788 22:17:45.862261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10789 22:17:45.862682 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10790 22:17:45.862898 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10791 22:17:45.863063 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10792 22:17:45.863244 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10793 22:17:45.863414 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10794 22:17:45.863575 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10795 22:17:45.863745 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10796 22:17:45.863940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10797 22:17:45.864097 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10798 22:17:45.864261 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10799 22:17:45.864420 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10800 22:17:45.864610 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10801 22:17:45.864779 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10802 22:17:45.864935 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10803 22:17:45.865091 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10804 22:17:45.865246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10805 22:17:45.865443 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10806 22:17:45.865639 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10807 22:17:45.865838 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10808 22:17:45.866004 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10809 22:17:45.866166 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10810 22:17:45.866295 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10811 22:17:45.866413 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10812 22:17:45.866531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10813 22:17:45.866645 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10814 22:17:45.870258 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10815 22:17:45.870627 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10816 22:17:45.870724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10817 22:17:45.870803 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10818 22:17:45.870890 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10819 22:17:45.870980 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10820 22:17:45.871065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10821 22:17:45.871368 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10822 22:17:45.871577 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10823 22:17:45.871732 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10824 22:17:45.871924 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10825 22:17:45.872068 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10826 22:17:45.872245 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10827 22:17:45.872395 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10828 22:17:45.872574 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10829 22:17:45.872727 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10830 22:17:45.872878 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10831 22:17:45.873035 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10832 22:17:45.873225 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10833 22:17:45.873392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10834 22:17:45.873552 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10835 22:17:45.873757 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10836 22:17:45.873922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10837 22:17:45.874086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10838 22:17:45.874237 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10839 22:17:45.874363 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10840 22:17:45.878258 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10841 22:17:45.878625 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10842 22:17:45.878722 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10843 22:17:45.878811 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10844 22:17:45.878900 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10845 22:17:45.879187 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10846 22:17:45.879291 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10847 22:17:45.879570 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10848 22:17:45.879660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10849 22:17:45.879756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10850 22:17:45.879853 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10851 22:17:45.880135 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10852 22:17:45.880225 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10853 22:17:45.880316 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10854 22:17:45.880642 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10855 22:17:45.880820 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10856 22:17:45.881008 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10857 22:17:45.881165 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10858 22:17:45.881356 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10859 22:17:45.881507 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10860 22:17:45.881674 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10861 22:17:45.881865 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10862 22:17:45.882029 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10863 22:17:45.882167 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10864 22:17:45.882323 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10865 22:17:45.886362 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10866 22:17:45.886655 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10867 22:17:45.886939 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10868 22:17:45.887037 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10869 22:17:45.887497 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10870 22:17:45.887797 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10871 22:17:45.887898 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10872 22:17:45.888179 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10873 22:17:45.888450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10874 22:17:45.888738 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10875 22:17:45.888842 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10876 22:17:45.889121 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10877 22:17:45.889437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10878 22:17:45.889691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10879 22:17:45.889970 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10880 22:17:45.890052 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10881 22:17:45.894514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10882 22:17:45.894734 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10883 22:17:45.894906 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10884 22:17:45.895072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10885 22:17:45.895229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10886 22:17:45.895348 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10887 22:17:45.895489 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10888 22:17:45.907190 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10889 22:17:45.907612 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10890 22:17:45.907805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10891 22:17:45.907970 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10892 22:17:45.908130 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10893 22:17:45.908314 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10894 22:17:45.908455 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10895 22:17:45.908603 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10896 22:17:45.908748 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10897 22:17:45.908894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10898 22:17:45.909033 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10899 22:17:45.909173 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10900 22:17:45.909349 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10901 22:17:45.909506 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10902 22:17:45.909962 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10903 22:17:45.910134 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10904 22:17:45.910251 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10905 22:17:45.910362 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10906 22:17:45.910469 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10907 22:17:45.910575 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10908 22:17:45.910711 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10909 22:17:45.910828 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10910 22:17:45.910938 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10911 22:17:45.911047 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10912 22:17:45.911156 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10913 22:17:45.911263 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10914 22:17:45.911370 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10915 22:17:45.914290 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10916 22:17:45.914748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10917 22:17:45.914856 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10918 22:17:45.914948 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10919 22:17:45.915050 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10920 22:17:45.915138 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10921 22:17:45.915239 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10922 22:17:45.915522 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10923 22:17:45.915628 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10924 22:17:45.915729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10925 22:17:45.915920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10926 22:17:45.916226 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10927 22:17:45.916318 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10928 22:17:45.916416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10929 22:17:45.916517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10930 22:17:45.916807 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10931 22:17:45.916898 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10932 22:17:45.916995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10933 22:17:45.917286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10934 22:17:45.917396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10935 22:17:45.917478 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10936 22:17:45.917559 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10937 22:17:45.917859 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10938 22:17:45.917948 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10939 22:17:45.918055 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10940 22:17:45.922260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10941 22:17:45.922503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10942 22:17:45.922604 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10943 22:17:45.922706 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10944 22:17:45.922801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10945 22:17:45.922889 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10946 22:17:45.922981 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10947 22:17:45.923054 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10948 22:17:45.923322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10949 22:17:45.923439 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10950 22:17:45.923552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10951 22:17:45.923663 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10952 22:17:45.923818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10953 22:17:45.924111 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10954 22:17:45.924227 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10955 22:17:45.924331 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10956 22:17:45.924510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10957 22:17:45.924820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10958 22:17:45.924935 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10959 22:17:45.925037 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10960 22:17:45.925337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10961 22:17:45.925450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10962 22:17:45.925743 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10963 22:17:45.925857 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10964 22:17:45.925955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10965 22:17:45.930189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10966 22:17:45.930496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10967 22:17:45.930592 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10968 22:17:45.930710 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10969 22:17:45.930812 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10970 22:17:45.930933 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10971 22:17:45.931037 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10972 22:17:45.931325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10973 22:17:45.931560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10974 22:17:45.931735 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10975 22:17:45.931931 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10976 22:17:45.932116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10977 22:17:45.932365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10978 22:17:45.932562 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10979 22:17:45.932733 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10980 22:17:45.932887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10981 22:17:45.933079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10982 22:17:45.933266 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10983 22:17:45.933459 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10984 22:17:45.933626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10985 22:17:45.933793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10986 22:17:45.933991 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10987 22:17:45.934164 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10988 22:17:45.934324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10989 22:17:45.934455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10990 22:17:45.934579 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10991 22:17:45.934697 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10992 22:17:45.934814 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10993 22:17:45.934998 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10994 22:17:45.938358 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10995 22:17:45.938722 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10996 22:17:45.938811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10997 22:17:45.938886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10998 22:17:45.939192 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10999 22:17:45.939274 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
11000 22:17:45.939338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
11001 22:17:45.941798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
11002 22:17:45.941882 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
11003 22:17:45.941946 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
11004 22:17:45.942006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
11005 22:17:45.942104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
11006 22:17:45.942190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
11007 22:17:45.942274 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
11008 22:17:45.942358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
11009 22:17:45.942449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
11010 22:17:45.942531 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
11011 22:17:45.942624 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
11012 22:17:45.942691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
11013 22:17:45.942752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
11014 22:17:45.942812 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
11015 22:17:45.942871 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
11016 22:17:45.942930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
11017 22:17:45.942989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
11018 22:17:45.943049 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
11019 22:17:45.943108 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
11020 22:17:45.943166 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
11021 22:17:45.943226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
11022 22:17:45.943286 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
11023 22:17:45.943345 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
11024 22:17:45.943408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
11025 22:17:45.954789 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
11026 22:17:45.955225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
11027 22:17:45.955418 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
11028 22:17:45.955649 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
11029 22:17:45.955868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
11030 22:17:45.956070 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
11031 22:17:45.956260 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
11032 22:17:45.956467 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
11033 22:17:45.956707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
11034 22:17:45.956920 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
11035 22:17:45.957134 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
11036 22:17:45.957327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
11037 22:17:45.957538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
11038 22:17:45.957721 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
11039 22:17:45.957941 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
11040 22:17:45.958100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
11041 22:17:45.958222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
11042 22:17:45.958337 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
11043 22:17:45.958450 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
11044 22:17:45.958565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
11045 22:17:45.958677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
11046 22:17:45.958788 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
11047 22:17:45.958925 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
11048 22:17:45.962273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
11049 22:17:45.962590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
11050 22:17:45.962702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
11051 22:17:45.962796 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
11052 22:17:45.962865 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
11053 22:17:45.962936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
11054 22:17:45.963029 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
11055 22:17:45.963338 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
11056 22:17:45.963441 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
11057 22:17:45.963546 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
11058 22:17:45.963656 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
11059 22:17:45.963756 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
11060 22:17:45.963882 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
11061 22:17:45.964222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
11062 22:17:45.964427 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
11063 22:17:45.964636 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
11064 22:17:45.964844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
11065 22:17:45.965020 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
11066 22:17:45.965247 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
11067 22:17:45.965434 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
11068 22:17:45.965592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
11069 22:17:45.965756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
11070 22:17:45.965965 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
11071 22:17:45.966143 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
11072 22:17:45.966265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
11073 22:17:45.966382 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
11074 22:17:45.966496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
11075 22:17:45.966615 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
11076 22:17:45.970212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
11077 22:17:45.970616 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
11078 22:17:45.970727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
11079 22:17:45.970820 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
11080 22:17:45.970917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
11081 22:17:45.971003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
11082 22:17:45.971098 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
11083 22:17:45.971198 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
11084 22:17:45.971515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
11085 22:17:45.971635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
11086 22:17:45.971754 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
11087 22:17:45.971850 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
11088 22:17:45.971963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
11089 22:17:45.972179 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
11090 22:17:45.972305 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
11091 22:17:45.972616 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
11092 22:17:45.972706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
11093 22:17:45.972803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
11094 22:17:45.973095 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
11095 22:17:45.973192 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
11096 22:17:45.973321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
11097 22:17:45.973431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
11098 22:17:45.973742 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
11099 22:17:45.973838 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
11100 22:17:45.974127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
11101 22:17:45.974211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
11102 22:17:45.978187 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
11103 22:17:45.978525 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
11104 22:17:45.978632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
11105 22:17:45.978724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
11106 22:17:45.978816 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
11107 22:17:45.978902 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
11108 22:17:45.979001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
11109 22:17:45.979092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
11110 22:17:45.979212 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
11111 22:17:45.979315 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
11112 22:17:45.979685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
11113 22:17:45.979861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
11114 22:17:45.980103 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
11115 22:17:45.980287 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
11116 22:17:45.980428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
11117 22:17:45.980625 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
11118 22:17:45.980848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
11119 22:17:45.981047 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
11120 22:17:45.981240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
11121 22:17:45.981436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
11122 22:17:45.981627 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
11123 22:17:45.981866 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
11124 22:17:45.982054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
11125 22:17:45.982197 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
11126 22:17:45.982376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
11127 22:17:45.982513 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
11128 22:17:45.982655 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
11129 22:17:45.982794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
11130 22:17:45.986200 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
11131 22:17:45.986621 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
11132 22:17:45.986822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
11133 22:17:45.986992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
11134 22:17:45.987188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
11135 22:17:45.987355 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
11136 22:17:45.987518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
11137 22:17:45.987679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
11138 22:17:45.987850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
11139 22:17:45.988009 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11140 22:17:45.988165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11141 22:17:45.988311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11142 22:17:45.988435 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11143 22:17:45.988585 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11144 22:17:45.988714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11145 22:17:45.988838 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11146 22:17:45.988960 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11147 22:17:45.989080 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11148 22:17:45.989202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11149 22:17:45.989348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11150 22:17:45.989480 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11151 22:17:45.989605 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11152 22:17:45.989756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11153 22:17:45.989881 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11154 22:17:45.990001 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11155 22:17:45.990153 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11156 22:17:45.990277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11157 22:17:45.990394 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11158 22:17:45.990509 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11159 22:17:45.990626 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11160 22:17:45.990740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11161 22:17:46.001868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11162 22:17:46.002284 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11163 22:17:46.002482 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11164 22:17:46.002656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11165 22:17:46.002841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11166 22:17:46.003007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11167 22:17:46.003189 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11168 22:17:46.003341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11169 22:17:46.003517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11170 22:17:46.003681 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11171 22:17:46.003820 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11172 22:17:46.003960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11173 22:17:46.004148 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11174 22:17:46.004309 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11175 22:17:46.004467 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11176 22:17:46.004589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11177 22:17:46.004764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11178 22:17:46.004893 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11179 22:17:46.005019 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11180 22:17:46.005158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11181 22:17:46.005295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11182 22:17:46.005454 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11183 22:17:46.005579 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11184 22:17:46.005763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11185 22:17:46.005962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11186 22:17:46.006145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11187 22:17:46.006364 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11188 22:17:46.006515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11189 22:17:46.006661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11190 22:17:46.006803 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11191 22:17:46.010246 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11192 22:17:46.010651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11193 22:17:46.010838 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11194 22:17:46.011011 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11195 22:17:46.011220 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11196 22:17:46.011360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11197 22:17:46.011502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11198 22:17:46.011687 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11199 22:17:46.011861 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11200 22:17:46.012078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11201 22:17:46.012261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11202 22:17:46.012417 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11203 22:17:46.012568 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11204 22:17:46.012729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11205 22:17:46.012965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11206 22:17:46.013152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11207 22:17:46.013321 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11208 22:17:46.013525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11209 22:17:46.014077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11210 22:17:46.014276 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11211 22:17:46.014425 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11212 22:17:46.014608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11213 22:17:46.014746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11214 22:17:46.014889 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11215 22:17:46.015030 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11216 22:17:46.015170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11217 22:17:46.015310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11218 22:17:46.015449 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11219 22:17:46.015588 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11220 22:17:46.018214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11221 22:17:46.018647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11222 22:17:46.018850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11223 22:17:46.019032 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11224 22:17:46.019202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11225 22:17:46.019366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11226 22:17:46.019530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11227 22:17:46.019676 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11228 22:17:46.019808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11229 22:17:46.019972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11230 22:17:46.020100 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11231 22:17:46.020255 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11232 22:17:46.020411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11233 22:17:46.020564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11234 22:17:46.020758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11235 22:17:46.020926 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11236 22:17:46.021085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11237 22:17:46.021237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11238 22:17:46.021389 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11239 22:17:46.021542 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11240 22:17:46.022147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11241 22:17:46.022372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11242 22:17:46.022510 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11243 22:17:46.022654 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11244 22:17:46.022795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11245 22:17:46.022934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11246 22:17:46.023074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11247 22:17:46.023214 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11248 22:17:46.023354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11249 22:17:46.023494 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11250 22:17:46.026244 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11251 22:17:46.026682 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11252 22:17:46.026871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11253 22:17:46.027037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11254 22:17:46.027225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11255 22:17:46.027380 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11256 22:17:46.027530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11257 22:17:46.027691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11258 22:17:46.027852 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11259 22:17:46.028044 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11260 22:17:46.028202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11261 22:17:46.028363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11262 22:17:46.028514 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11263 22:17:46.028675 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11264 22:17:46.028833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11265 22:17:46.029021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11266 22:17:46.029179 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11267 22:17:46.029337 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11268 22:17:46.029500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11269 22:17:46.029941 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11270 22:17:46.030130 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11271 22:17:46.030252 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11272 22:17:46.030397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11273 22:17:46.030519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11274 22:17:46.030634 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11275 22:17:46.030749 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11276 22:17:46.030861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11277 22:17:46.030972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11278 22:17:46.031082 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11279 22:17:46.031194 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11280 22:17:46.034226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11281 22:17:46.034669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11282 22:17:46.034875 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11283 22:17:46.035033 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11284 22:17:46.035182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11285 22:17:46.035367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11286 22:17:46.035532 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11287 22:17:46.035692 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11288 22:17:46.035851 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11289 22:17:46.036009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11290 22:17:46.036162 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11291 22:17:46.036282 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11292 22:17:46.036424 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11293 22:17:46.036541 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11294 22:17:46.036653 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11295 22:17:46.047779 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11296 22:17:46.048092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11297 22:17:46.048194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11298 22:17:46.048339 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11299 22:17:46.048467 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11300 22:17:46.048590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11301 22:17:46.048783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11302 22:17:46.048930 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11303 22:17:46.049118 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11304 22:17:46.049315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11305 22:17:46.049450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11306 22:17:46.049589 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11307 22:17:46.049736 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11308 22:17:46.049925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11309 22:17:46.050074 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11310 22:17:46.050213 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11311 22:17:46.050370 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11312 22:17:46.050520 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11313 22:17:46.050717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11314 22:17:46.050888 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11315 22:17:46.051046 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11316 22:17:46.051197 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11317 22:17:46.051330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11318 22:17:46.051483 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11319 22:17:46.051629 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11320 22:17:46.051790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11321 22:17:46.051945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11322 22:17:46.052097 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11323 22:17:46.052250 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11324 22:17:46.052432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11325 22:17:46.052596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11326 22:17:46.052759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11327 22:17:46.052906 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11328 22:17:46.053287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11329 22:17:46.053462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11330 22:17:46.053615 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11331 22:17:46.053767 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11332 22:17:46.053899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11333 22:17:46.054024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11334 22:17:46.054150 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11335 22:17:46.054276 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11336 22:17:46.054392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11337 22:17:46.054506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11338 22:17:46.054647 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11339 22:17:46.054794 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11340 22:17:46.054982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11341 22:17:46.055160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11342 22:17:46.055338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11343 22:17:46.055521 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11344 22:17:46.055705 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11345 22:17:46.058327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11346 22:17:46.058709 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11347 22:17:46.058850 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11348 22:17:46.058975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11349 22:17:46.059126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11350 22:17:46.059256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11351 22:17:46.059381 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11352 22:17:46.059506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11353 22:17:46.059628 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11354 22:17:46.059805 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11355 22:17:46.059952 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11356 22:17:46.060101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11357 22:17:46.060248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11358 22:17:46.060402 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11359 22:17:46.060590 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11360 22:17:46.060755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11361 22:17:46.060912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11362 22:17:46.061070 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11363 22:17:46.061226 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11364 22:17:46.061388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11365 22:17:46.061596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11366 22:17:46.061803 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11367 22:17:46.061968 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11368 22:17:46.062102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11369 22:17:46.062218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11370 22:17:46.062331 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11371 22:17:46.062443 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11372 22:17:46.062556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11373 22:17:46.062693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11374 22:17:46.062815 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11375 22:17:46.062928 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11376 22:17:46.066275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11377 22:17:46.066713 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11378 22:17:46.066904 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11379 22:17:46.067068 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11380 22:17:46.067228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11381 22:17:46.067415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11382 22:17:46.067579 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11383 22:17:46.067983 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11384 22:17:46.068139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11385 22:17:46.068271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11386 22:17:46.068415 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11387 22:17:46.068543 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11388 22:17:46.068670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11389 22:17:46.068800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11390 22:17:46.068954 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11391 22:17:46.069082 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11392 22:17:46.069265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11393 22:17:46.069431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11394 22:17:46.069588 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11395 22:17:46.069741 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11396 22:17:46.069873 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11397 22:17:46.069995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11398 22:17:46.070132 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11399 22:17:46.070300 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11400 22:17:46.070509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11401 22:17:46.070697 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11402 22:17:46.070871 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11403 22:17:46.071057 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11404 22:17:46.071196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11405 22:17:46.071339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11406 22:17:46.071481 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11407 22:17:46.071621 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11408 22:17:46.071762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11409 22:17:46.071902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11410 22:17:46.072043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11411 22:17:46.072182 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11412 22:17:46.072322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11413 22:17:46.078325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11414 22:17:46.078509 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11415 22:17:46.078868 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11416 22:17:46.079015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11417 22:17:46.079142 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11418 22:17:46.079275 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11419 22:17:46.079457 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11420 22:17:46.079598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11421 22:17:46.079733 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11422 22:17:46.079879 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11423 22:17:46.080017 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11424 22:17:46.080160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11425 22:17:46.080283 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11426 22:17:46.080430 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11427 22:17:46.080550 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11428 22:17:46.080663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11429 22:17:46.097491 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11430 22:17:46.098152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11431 22:17:46.098361 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11432 22:17:46.098529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11433 22:17:46.098688 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11434 22:17:46.098878 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11435 22:17:46.099044 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11436 22:17:46.099231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11437 22:17:46.099398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11438 22:17:46.099590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11439 22:17:46.099752 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11440 22:17:46.099948 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11441 22:17:46.100136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11442 22:17:46.100304 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11443 22:17:46.100493 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11444 22:17:46.100694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11445 22:17:46.101105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11446 22:17:46.101259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11447 22:17:46.101412 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11448 22:17:46.101539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11449 22:17:46.101706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11450 22:17:46.101836 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11451 22:17:46.101980 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11452 22:17:46.102123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11453 22:17:46.106438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11454 22:17:46.106813 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11455 22:17:46.106931 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11456 22:17:46.107042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11457 22:17:46.107174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11458 22:17:46.107279 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11459 22:17:46.107388 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11460 22:17:46.107527 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11461 22:17:46.107631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11462 22:17:46.107740 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11463 22:17:46.107876 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11464 22:17:46.107979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11465 22:17:46.108087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11466 22:17:46.108194 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11467 22:17:46.108301 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11468 22:17:46.108435 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11469 22:17:46.108538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11470 22:17:46.108684 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11471 22:17:46.108813 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11472 22:17:46.108905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11473 22:17:46.108993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11474 22:17:46.109104 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11475 22:17:46.109200 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11476 22:17:46.109290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11477 22:17:46.109378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11478 22:17:46.109467 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11479 22:17:46.109554 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11480 22:17:46.109676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11481 22:17:46.109835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11482 22:17:46.109973 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11483 22:17:46.110086 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11484 22:17:46.110219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11485 22:17:46.110322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11486 22:17:46.110629 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11487 22:17:46.110735 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11488 22:17:46.110848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11489 22:17:46.110954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11490 22:17:46.114321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11491 22:17:46.114446 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11492 22:17:46.114774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11493 22:17:46.114878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11494 22:17:46.114987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11495 22:17:46.115118 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11496 22:17:46.115219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11497 22:17:46.115327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11498 22:17:46.115434 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11499 22:17:46.115568 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11500 22:17:46.115672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11501 22:17:46.115779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11502 22:17:46.115886 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11503 22:17:46.116018 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11504 22:17:46.116122 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11505 22:17:46.116230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11506 22:17:46.116338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11507 22:17:46.116472 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11508 22:17:46.116589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11509 22:17:46.116721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11510 22:17:46.116842 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11511 22:17:46.116955 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11512 22:17:46.117054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11513 22:17:46.117145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11514 22:17:46.117235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11515 22:17:46.117344 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11516 22:17:46.117436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11517 22:17:46.117543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11518 22:17:46.117637 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11519 22:17:46.117739 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11520 22:17:46.117848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11521 22:17:46.117940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11522 22:17:46.118044 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11523 22:17:46.118328 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11524 22:17:46.122264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11525 22:17:46.122574 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11526 22:17:46.122685 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11527 22:17:46.122776 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11528 22:17:46.122883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11529 22:17:46.122972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11530 22:17:46.123075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11531 22:17:46.123164 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11532 22:17:46.123264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11533 22:17:46.123353 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11534 22:17:46.123454 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11535 22:17:46.123557 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11536 22:17:46.123660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11537 22:17:46.123939 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11538 22:17:46.124032 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11539 22:17:46.124308 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11540 22:17:46.124401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11541 22:17:46.124488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11542 22:17:46.124611 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11543 22:17:46.124743 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11544 22:17:46.124851 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11545 22:17:46.124954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11546 22:17:46.125041 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11547 22:17:46.125140 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11548 22:17:46.125226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11549 22:17:46.125324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11550 22:17:46.125425 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11551 22:17:46.125511 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11552 22:17:46.125609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11553 22:17:46.125773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11554 22:17:46.125949 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11555 22:17:46.126067 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11556 22:17:46.126197 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11557 22:17:46.130333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11558 22:17:46.130457 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11559 22:17:46.130788 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11560 22:17:46.130917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11561 22:17:46.131062 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11562 22:17:46.131203 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11563 22:17:46.143712 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11564 22:17:46.144101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11565 22:17:46.144212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11566 22:17:46.144298 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11567 22:17:46.144382 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11568 22:17:46.144481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11569 22:17:46.144568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11570 22:17:46.144665 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11571 22:17:46.144765 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11572 22:17:46.145060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11573 22:17:46.145176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11574 22:17:46.145466 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11575 22:17:46.145558 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11576 22:17:46.145665 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11577 22:17:46.145769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11578 22:17:46.146103 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11579 22:17:46.146235 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11580 22:17:46.146555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11581 22:17:46.146657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11582 22:17:46.146766 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11583 22:17:46.146869 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11584 22:17:46.147160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11585 22:17:46.147278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11586 22:17:46.147601 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11587 22:17:46.147706 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11588 22:17:46.147806 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11589 22:17:46.147913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11590 22:17:46.148236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11591 22:17:46.148346 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11592 22:17:46.148449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11593 22:17:46.148549 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11594 22:17:46.148686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11595 22:17:46.149012 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11596 22:17:46.149107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11597 22:17:46.149466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11598 22:17:46.149554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11599 22:17:46.149676 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11600 22:17:46.149776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11601 22:17:46.150085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11602 22:17:46.150208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11603 22:17:46.154432 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11604 22:17:46.154530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11605 22:17:46.154650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11606 22:17:46.154774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11607 22:17:46.155079 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11608 22:17:46.155181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11609 22:17:46.155278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11610 22:17:46.155373 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11611 22:17:46.155662 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11612 22:17:46.155777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11613 22:17:46.155864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11614 22:17:46.155959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11615 22:17:46.156269 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11616 22:17:46.156373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11617 22:17:46.156482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11618 22:17:46.156586 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11619 22:17:46.156679 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11620 22:17:46.156971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11621 22:17:46.157084 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11622 22:17:46.157179 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11623 22:17:46.157466 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11624 22:17:46.157567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11625 22:17:46.157668 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11626 22:17:46.157761 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11627 22:17:46.157838 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11628 22:17:46.158123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11629 22:17:46.158227 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11630 22:17:46.162460 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11631 22:17:46.162564 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11632 22:17:46.162656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11633 22:17:46.162754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11634 22:17:46.163047 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11635 22:17:46.163147 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11636 22:17:46.163241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11637 22:17:46.163335 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11638 22:17:46.163425 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11639 22:17:46.163515 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11640 22:17:46.163604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11641 22:17:46.163693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11642 22:17:46.169736 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11643 22:17:46.169885 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11644 22:17:46.169976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11645 22:17:46.170064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11646 22:17:46.170152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11647 22:17:46.170243 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11648 22:17:46.170331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11649 22:17:46.170421 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11650 22:17:46.170509 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11651 22:17:46.170597 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11652 22:17:46.170686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11653 22:17:46.170773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11654 22:17:46.170862 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11655 22:17:46.170957 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11656 22:17:46.171046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11657 22:17:46.171135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11658 22:17:46.171223 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11659 22:17:46.171312 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11660 22:17:46.171400 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11661 22:17:46.174256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11662 22:17:46.174603 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11663 22:17:46.174701 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11664 22:17:46.174795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11665 22:17:46.174892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11666 22:17:46.175001 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11667 22:17:46.175101 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11668 22:17:46.175412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11669 22:17:46.175502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11670 22:17:46.175818 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11671 22:17:46.175922 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11672 22:17:46.176036 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11673 22:17:46.176132 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11674 22:17:46.176253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11675 22:17:46.176359 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11676 22:17:46.176477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11677 22:17:46.176779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11678 22:17:46.176908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11679 22:17:46.177025 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11680 22:17:46.177147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11681 22:17:46.177870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11682 22:17:46.177990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11683 22:17:46.178078 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11684 22:17:46.178178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11685 22:17:46.178261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11686 22:17:46.185471 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11687 22:17:46.185917 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11688 22:17:46.186024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11689 22:17:46.186112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11690 22:17:46.186211 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11691 22:17:46.186298 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11692 22:17:46.186396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11693 22:17:46.186502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11694 22:17:46.186819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11695 22:17:46.186949 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11696 22:17:46.187054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11697 22:17:46.197701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11698 22:17:46.199549 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11699 22:17:46.199750 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11700 22:17:46.199843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11701 22:17:46.199929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11702 22:17:46.200014 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11703 22:17:46.200099 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11704 22:17:46.200183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11705 22:17:46.200268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11706 22:17:46.200353 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11707 22:17:46.200437 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11708 22:17:46.200521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11709 22:17:46.200607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11710 22:17:46.200694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11711 22:17:46.200766 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11712 22:17:46.200840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11713 22:17:46.200912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11714 22:17:46.200989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11715 22:17:46.201054 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11716 22:17:46.201376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11717 22:17:46.201597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11718 22:17:46.201783 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11719 22:17:46.201944 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11720 22:17:46.202067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11721 22:17:46.202159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11722 22:17:46.202245 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11723 22:17:46.202330 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11724 22:17:46.202414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11725 22:17:46.202500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11726 22:17:46.202584 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11727 22:17:46.202670 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11728 22:17:46.202971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11729 22:17:46.203052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11730 22:17:46.203116 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11731 22:17:46.203175 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11732 22:17:46.203234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11733 22:17:46.203293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11734 22:17:46.203351 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11735 22:17:46.203409 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11736 22:17:46.206374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11737 22:17:46.206681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11738 22:17:46.206788 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11739 22:17:46.206887 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11740 22:17:46.207173 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11741 22:17:46.207278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11742 22:17:46.207554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11743 22:17:46.207642 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11744 22:17:46.207739 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11745 22:17:46.207835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11746 22:17:46.208118 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11747 22:17:46.208221 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11748 22:17:46.208516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11749 22:17:46.208621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11750 22:17:46.209251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11751 22:17:46.209339 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11752 22:17:46.209404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11753 22:17:46.209464 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11754 22:17:46.209525 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11755 22:17:46.209585 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11756 22:17:46.209852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11757 22:17:46.209956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11758 22:17:46.210040 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11759 22:17:46.210103 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11760 22:17:46.210161 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11761 22:17:46.210237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11762 22:17:46.214267 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11763 22:17:46.214548 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11764 22:17:46.214629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11765 22:17:46.214701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11766 22:17:46.215125 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11767 22:17:46.215192 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11768 22:17:46.215440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11769 22:17:46.215517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11770 22:17:46.215608 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11771 22:17:46.215696 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11772 22:17:46.215980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11773 22:17:46.216099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11774 22:17:46.216374 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11775 22:17:46.216454 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11776 22:17:46.216539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11777 22:17:46.216654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11778 22:17:46.216755 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11779 22:17:46.217008 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11780 22:17:46.217085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11781 22:17:46.217331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11782 22:17:46.217580 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11783 22:17:46.217667 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11784 22:17:46.217742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11785 22:17:46.217993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11786 22:17:46.222314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11787 22:17:46.222569 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11788 22:17:46.222815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11789 22:17:46.222890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11790 22:17:46.223143 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11791 22:17:46.223243 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11792 22:17:46.223328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11793 22:17:46.223579 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11794 22:17:46.223831 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11795 22:17:46.223908 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11796 22:17:46.224156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11797 22:17:46.224232 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11798 22:17:46.224665 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11799 22:17:46.224741 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11800 22:17:46.224821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11801 22:17:46.225070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11802 22:17:46.225145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11803 22:17:46.225393 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11804 22:17:46.225642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11805 22:17:46.225737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11806 22:17:46.225987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11807 22:17:46.226063 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11808 22:17:46.230204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11809 22:17:46.230511 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11810 22:17:46.230652 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11811 22:17:46.230734 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11812 22:17:46.230820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11813 22:17:46.231107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11814 22:17:46.231191 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11815 22:17:46.231279 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11816 22:17:46.231566 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11817 22:17:46.231667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11818 22:17:46.231742 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11819 22:17:46.232008 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11820 22:17:46.232120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11821 22:17:46.232219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11822 22:17:46.232327 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11823 22:17:46.232425 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11824 22:17:46.232744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11825 22:17:46.232829 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11826 22:17:46.232908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11827 22:17:46.232987 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11828 22:17:46.233240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11829 22:17:46.233316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11830 22:17:46.233432 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11831 22:17:46.246044 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11832 22:17:46.246461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11833 22:17:46.246663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11834 22:17:46.246839 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11835 22:17:46.247004 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11836 22:17:46.247152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11837 22:17:46.247312 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11838 22:17:46.247487 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11839 22:17:46.247681 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11840 22:17:46.247828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11841 22:17:46.247986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11842 22:17:46.248131 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11843 22:17:46.248268 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11844 22:17:46.248453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11845 22:17:46.248656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11846 22:17:46.248887 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11847 22:17:46.249021 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11848 22:17:46.249111 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11849 22:17:46.249215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11850 22:17:46.249306 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11851 22:17:46.249409 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11852 22:17:46.249512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11853 22:17:46.249823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11854 22:17:46.249929 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11855 22:17:46.250028 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11856 22:17:46.254372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11857 22:17:46.254498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11858 22:17:46.254802 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11859 22:17:46.254895 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11860 22:17:46.255017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11861 22:17:46.255112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11862 22:17:46.255223 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11863 22:17:46.255322 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11864 22:17:46.255406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11865 22:17:46.255679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11866 22:17:46.255796 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11867 22:17:46.255879 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11868 22:17:46.256151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11869 22:17:46.256255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11870 22:17:46.256373 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11871 22:17:46.256464 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11872 22:17:46.256556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11873 22:17:46.256859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11874 22:17:46.256975 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11875 22:17:46.257084 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11876 22:17:46.257195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11877 22:17:46.257275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11878 22:17:46.257368 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11879 22:17:46.257662 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11880 22:17:46.257775 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11881 22:17:46.257888 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11882 22:17:46.257985 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11883 22:17:46.262183 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11884 22:17:46.262474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11885 22:17:46.262582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11886 22:17:46.262679 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11887 22:17:46.262973 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11888 22:17:46.263080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11889 22:17:46.263191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11890 22:17:46.263479 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11891 22:17:46.263566 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11892 22:17:46.263677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11893 22:17:46.263777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11894 22:17:46.263875 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11895 22:17:46.264163 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11896 22:17:46.264270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11897 22:17:46.264395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11898 22:17:46.264525 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11899 22:17:46.264628 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11900 22:17:46.264747 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11901 22:17:46.264855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11902 22:17:46.264958 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11903 22:17:46.265060 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11904 22:17:46.265366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11905 22:17:46.265470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11906 22:17:46.265571 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11907 22:17:46.265679 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11908 22:17:46.265979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11909 22:17:46.266085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11910 22:17:46.270225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11911 22:17:46.270531 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11912 22:17:46.270634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11913 22:17:46.270739 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11914 22:17:46.270842 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11915 22:17:46.270946 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11916 22:17:46.271050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11917 22:17:46.271348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11918 22:17:46.271457 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11919 22:17:46.271560 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11920 22:17:46.271854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11921 22:17:46.271951 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11922 22:17:46.272058 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11923 22:17:46.272166 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11924 22:17:46.272271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11925 22:17:46.272568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11926 22:17:46.272678 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11927 22:17:46.272790 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11928 22:17:46.272896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11929 22:17:46.273003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11930 22:17:46.273293 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11931 22:17:46.273402 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11932 22:17:46.273689 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11933 22:17:46.273800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11934 22:17:46.273904 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11935 22:17:46.274007 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11936 22:17:46.278234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11937 22:17:46.278519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11938 22:17:46.278621 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11939 22:17:46.278735 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11940 22:17:46.278830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11941 22:17:46.279138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11942 22:17:46.279242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11943 22:17:46.279343 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11944 22:17:46.279411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11945 22:17:46.279507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11946 22:17:46.279591 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11947 22:17:46.279680 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11948 22:17:46.279772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11949 22:17:46.280059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11950 22:17:46.280169 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11951 22:17:46.280281 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11952 22:17:46.280369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11953 22:17:46.280474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11954 22:17:46.280789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11955 22:17:46.280876 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11956 22:17:46.280984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11957 22:17:46.281073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11958 22:17:46.281345 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11959 22:17:46.281456 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11960 22:17:46.281556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11961 22:17:46.281843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11962 22:17:46.281940 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11963 22:17:46.282030 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11964 22:17:46.286215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11965 22:17:46.294020 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11966 22:17:46.294396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11967 22:17:46.294536 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11968 22:17:46.294684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11969 22:17:46.294831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11970 22:17:46.294945 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11971 22:17:46.295053 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11972 22:17:46.295162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11973 22:17:46.295473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11974 22:17:46.295606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11975 22:17:46.295715 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11976 22:17:46.295822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11977 22:17:46.295927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11978 22:17:46.296251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11979 22:17:46.296448 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11980 22:17:46.296642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11981 22:17:46.296807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11982 22:17:46.296995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11983 22:17:46.297156 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11984 22:17:46.297310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11985 22:17:46.297454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11986 22:17:46.297617 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11987 22:17:46.297787 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11988 22:17:46.297937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11989 22:17:46.298071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11990 22:17:46.298217 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11991 22:17:46.298337 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11992 22:17:46.298454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11993 22:17:46.302253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11994 22:17:46.302630 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11995 22:17:46.302795 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11996 22:17:46.302944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11997 22:17:46.303124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11998 22:17:46.303290 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11999 22:17:46.303448 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
12000 22:17:46.303569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
12001 22:17:46.303719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
12002 22:17:46.303853 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
12003 22:17:46.304036 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
12004 22:17:46.304198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
12005 22:17:46.304392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
12006 22:17:46.304556 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
12007 22:17:46.304754 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
12008 22:17:46.304960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
12009 22:17:46.305139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
12010 22:17:46.305625 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
12011 22:17:46.305836 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
12012 22:17:46.306004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
12013 22:17:46.306394 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
12014 22:17:46.306575 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
12015 22:17:46.306748 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
12016 22:17:46.306919 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
12017 22:17:46.307089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
12018 22:17:46.310544 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
12019 22:17:46.310762 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
12020 22:17:46.310936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
12021 22:17:46.311349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
12022 22:17:46.311553 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
12023 22:17:46.311721 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
12024 22:17:46.311886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
12025 22:17:46.312045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
12026 22:17:46.312206 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
12027 22:17:46.312400 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
12028 22:17:46.312566 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
12029 22:17:46.312729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
12030 22:17:46.312891 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
12031 22:17:46.313051 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
12032 22:17:46.313218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
12033 22:17:46.313422 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
12034 22:17:46.313590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
12035 22:17:46.313764 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
12036 22:17:46.313926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
12037 22:17:46.314089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
12038 22:17:46.314250 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
12039 22:17:46.314410 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
12040 22:17:46.314611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
12041 22:17:46.314782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
12042 22:17:46.314948 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
12043 22:17:46.315108 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
12044 22:17:46.318259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
12045 22:17:46.318571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
12046 22:17:46.318681 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
12047 22:17:46.318775 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
12048 22:17:46.318853 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
12049 22:17:46.318986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
12050 22:17:46.319347 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
12051 22:17:46.319513 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
12052 22:17:46.319664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
12053 22:17:46.319804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
12054 22:17:46.319941 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
12055 22:17:46.320059 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
12056 22:17:46.320206 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
12057 22:17:46.320370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
12058 22:17:46.320564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
12059 22:17:46.320722 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
12060 22:17:46.320865 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
12061 22:17:46.320984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
12062 22:17:46.321119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
12063 22:17:46.321236 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
12064 22:17:46.321368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
12065 22:17:46.321503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
12066 22:17:46.321830 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
12067 22:17:46.321910 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
12068 22:17:46.322160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
12069 22:17:46.326246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
12070 22:17:46.326507 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
12071 22:17:46.326574 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
12072 22:17:46.326823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
12073 22:17:46.327066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
12074 22:17:46.327131 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
12075 22:17:46.327207 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
12076 22:17:46.327453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
12077 22:17:46.327696 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
12078 22:17:46.327761 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
12079 22:17:46.327833 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
12080 22:17:46.327904 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
12081 22:17:46.328183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
12082 22:17:46.328508 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
12083 22:17:46.328707 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
12084 22:17:46.328908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
12085 22:17:46.329073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
12086 22:17:46.329215 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
12087 22:17:46.329392 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
12088 22:17:46.329540 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
12089 22:17:46.329691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
12090 22:17:46.329864 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
12091 22:17:46.330029 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
12092 22:17:46.330152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
12093 22:17:46.330288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
12094 22:17:46.330404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
12095 22:17:46.334424 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
12096 22:17:46.334540 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
12097 22:17:46.334633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
12098 22:17:46.334883 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
12099 22:17:46.342626 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
12100 22:17:46.342918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
12101 22:17:46.343012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
12102 22:17:46.343105 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
12103 22:17:46.343189 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
12104 22:17:46.343288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
12105 22:17:46.343572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
12106 22:17:46.343669 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
12107 22:17:46.343762 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
12108 22:17:46.343853 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
12109 22:17:46.343932 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
12110 22:17:46.344207 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
12111 22:17:46.344295 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
12112 22:17:46.344409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
12113 22:17:46.344525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
12114 22:17:46.344633 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
12115 22:17:46.344918 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
12116 22:17:46.345077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
12117 22:17:46.345220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
12118 22:17:46.345342 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
12119 22:17:46.345506 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
12120 22:17:46.345677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
12121 22:17:46.345855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
12122 22:17:46.345993 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
12123 22:17:46.346164 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
12124 22:17:46.350239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
12125 22:17:46.350612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
12126 22:17:46.350789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
12127 22:17:46.350996 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
12128 22:17:46.351178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
12129 22:17:46.351416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
12130 22:17:46.351583 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
12131 22:17:46.351784 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
12132 22:17:46.351983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
12133 22:17:46.352169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
12134 22:17:46.352341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
12135 22:17:46.352525 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
12136 22:17:46.352762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
12137 22:17:46.352928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
12138 22:17:46.353076 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
12139 22:17:46.353215 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12140 22:17:46.353358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12141 22:17:46.353508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12142 22:17:46.353692 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12143 22:17:46.353853 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12144 22:17:46.354031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12145 22:17:46.354165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12146 22:17:46.354282 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12147 22:17:46.354393 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12148 22:17:46.354529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12149 22:17:46.354649 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12150 22:17:46.358367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12151 22:17:46.358788 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12152 22:17:46.358966 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12153 22:17:46.359143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12154 22:17:46.359336 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12155 22:17:46.359534 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12156 22:17:46.359724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12157 22:17:46.359909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12158 22:17:46.360038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12159 22:17:46.360155 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12160 22:17:46.360289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12161 22:17:46.360458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12162 22:17:46.360620 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12163 22:17:46.360755 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12164 22:17:46.360868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12165 22:17:46.361013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12166 22:17:46.361165 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12167 22:17:46.361315 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12168 22:17:46.361491 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12169 22:17:46.361664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12170 22:17:46.361823 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12171 22:17:46.361975 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12172 22:17:46.362129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12173 22:17:46.362255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12174 22:17:46.362382 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12175 22:17:46.362509 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12176 22:17:46.366466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12177 22:17:46.366635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12178 22:17:46.366790 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12179 22:17:46.366926 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12180 22:17:46.367081 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12181 22:17:46.367215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12182 22:17:46.367408 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12183 22:17:46.367568 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12184 22:17:46.367743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12185 22:17:46.367880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12186 22:17:46.368052 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12187 22:17:46.368228 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12188 22:17:46.368400 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12189 22:17:46.368563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12190 22:17:46.368786 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12191 22:17:46.368960 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12192 22:17:46.369104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12193 22:17:46.369260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12194 22:17:46.369406 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12195 22:17:46.369570 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12196 22:17:46.370091 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12197 22:17:46.370238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12198 22:17:46.370359 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12199 22:17:46.370476 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12200 22:17:46.370593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12201 22:17:46.370708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12202 22:17:46.374224 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12203 22:17:46.374519 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12204 22:17:46.374613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12205 22:17:46.374707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12206 22:17:46.374796 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12207 22:17:46.374878 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12208 22:17:46.375136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12209 22:17:46.375232 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12210 22:17:46.375324 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12211 22:17:46.375608 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12212 22:17:46.375707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12213 22:17:46.375793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12214 22:17:46.375887 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12215 22:17:46.375982 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12216 22:17:46.376336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12217 22:17:46.376548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12218 22:17:46.376754 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12219 22:17:46.376935 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12220 22:17:46.377100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12221 22:17:46.377296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12222 22:17:46.377469 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12223 22:17:46.377640 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12224 22:17:46.377842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12225 22:17:46.377997 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12226 22:17:46.378136 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12227 22:17:46.378255 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12228 22:17:46.378397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12229 22:17:46.378519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12230 22:17:46.378635 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12231 22:17:46.382489 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12232 22:17:46.382646 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12233 22:17:46.391994 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12234 22:17:46.392428 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12235 22:17:46.392612 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12236 22:17:46.392806 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12237 22:17:46.393017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12238 22:17:46.393185 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12239 22:17:46.393336 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12240 22:17:46.393482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12241 22:17:46.393634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12242 22:17:46.393840 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12243 22:17:46.394052 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12244 22:17:46.394220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12245 22:17:46.394380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12246 22:17:46.394539 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12247 22:17:46.394719 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12248 22:17:46.394875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12249 22:17:46.395032 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12250 22:17:46.395189 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12251 22:17:46.395340 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12252 22:17:46.395518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12253 22:17:46.395671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12254 22:17:46.395827 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12255 22:17:46.395985 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12256 22:17:46.396145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12257 22:17:46.396306 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12258 22:17:46.396466 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12259 22:17:46.396597 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12260 22:17:46.396722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12261 22:17:46.396844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12262 22:17:46.396968 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12263 22:17:46.397089 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12264 22:17:46.397241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12265 22:17:46.397635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12266 22:17:46.397842 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12267 22:17:46.397986 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12268 22:17:46.398112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12269 22:17:46.398231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12270 22:17:46.398348 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12271 22:17:46.398463 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12272 22:17:46.398578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12273 22:17:46.398720 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12274 22:17:46.398841 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12275 22:17:46.398958 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12276 22:17:46.402447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12277 22:17:46.402640 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12278 22:17:46.402840 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12279 22:17:46.403011 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12280 22:17:46.403202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12281 22:17:46.403367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12282 22:17:46.403556 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12283 22:17:46.403728 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12284 22:17:46.403890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12285 22:17:46.404077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12286 22:17:46.404241 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12287 22:17:46.404393 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12288 22:17:46.404548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12289 22:17:46.404720 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12290 22:17:46.404847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12291 22:17:46.404973 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12292 22:17:46.405117 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12293 22:17:46.405252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12294 22:17:46.405424 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12295 22:17:46.405569 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12296 22:17:46.406077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12297 22:17:46.406218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12298 22:17:46.406368 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12299 22:17:46.406497 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12300 22:17:46.406617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12301 22:17:46.406731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12302 22:17:46.406848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12303 22:17:46.410319 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12304 22:17:46.410774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12305 22:17:46.410974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12306 22:17:46.411150 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12307 22:17:46.411341 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12308 22:17:46.411549 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12309 22:17:46.411691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12310 22:17:46.411835 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12311 22:17:46.411977 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12312 22:17:46.412149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12313 22:17:46.412406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12314 22:17:46.412605 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12315 22:17:46.412797 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12316 22:17:46.412960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12317 22:17:46.413080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12318 22:17:46.413196 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12319 22:17:46.413311 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12320 22:17:46.413457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12321 22:17:46.413584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12322 22:17:46.413721 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12323 22:17:46.413840 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12324 22:17:46.413957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12325 22:17:46.414072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12326 22:17:46.414186 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12327 22:17:46.414301 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12328 22:17:46.414442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12329 22:17:46.414560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12330 22:17:46.414676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12331 22:17:46.418295 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12332 22:17:46.418593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12333 22:17:46.418666 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12334 22:17:46.418923 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12335 22:17:46.418991 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12336 22:17:46.419069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12337 22:17:46.419331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12338 22:17:46.419597 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12339 22:17:46.419664 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12340 22:17:46.419736 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12341 22:17:46.419989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12342 22:17:46.420070 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12343 22:17:46.420147 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12344 22:17:46.420414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12345 22:17:46.420510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12346 22:17:46.420814 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12347 22:17:46.420888 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12348 22:17:46.420962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12349 22:17:46.421210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12350 22:17:46.421460 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12351 22:17:46.421526 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12352 22:17:46.421598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12353 22:17:46.421854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12354 22:17:46.421921 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12355 22:17:46.422002 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12356 22:17:46.426246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12357 22:17:46.426518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12358 22:17:46.426613 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12359 22:17:46.426857 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12360 22:17:46.426945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12361 22:17:46.427043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12362 22:17:46.427314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12363 22:17:46.427405 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12364 22:17:46.427487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12365 22:17:46.427768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12366 22:17:46.427875 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12367 22:17:46.438794 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12368 22:17:46.439109 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12369 22:17:46.439214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12370 22:17:46.439303 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12371 22:17:46.439432 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12372 22:17:46.439563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12373 22:17:46.439711 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12374 22:17:46.439861 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12375 22:17:46.440009 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12376 22:17:46.440156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12377 22:17:46.440300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12378 22:17:46.440426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12379 22:17:46.440568 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12380 22:17:46.440715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12381 22:17:46.440879 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12382 22:17:46.441000 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12383 22:17:46.441158 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12384 22:17:46.441281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12385 22:17:46.441448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12386 22:17:46.441576 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12387 22:17:46.441713 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12388 22:17:46.441826 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12389 22:17:46.442139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12390 22:17:46.446276 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12391 22:17:46.446586 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12392 22:17:46.446817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12393 22:17:46.447022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12394 22:17:46.447194 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12395 22:17:46.447388 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12396 22:17:46.447559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12397 22:17:46.447751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12398 22:17:46.447915 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12399 22:17:46.448079 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12400 22:17:46.448271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12401 22:17:46.448436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12402 22:17:46.448605 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12403 22:17:46.448806 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12404 22:17:46.448973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12405 22:17:46.449133 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12406 22:17:46.449291 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12407 22:17:46.449480 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12408 22:17:46.449644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12409 22:17:46.449818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12410 22:17:46.449981 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12411 22:17:46.450169 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12412 22:17:46.450334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12413 22:17:46.450495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12414 22:17:46.454361 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12415 22:17:46.454633 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12416 22:17:46.454896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12417 22:17:46.455151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12418 22:17:46.455407 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12419 22:17:46.455659 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12420 22:17:46.455728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12421 22:17:46.455978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12422 22:17:46.456236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12423 22:17:46.456547 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12424 22:17:46.456756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12425 22:17:46.457148 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12426 22:17:46.457332 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12427 22:17:46.457483 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12428 22:17:46.457807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12429 22:17:46.458191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12430 22:17:46.462308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12431 22:17:46.462399 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12432 22:17:46.462658 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12433 22:17:46.462742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12434 22:17:46.462837 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12435 22:17:46.462938 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12436 22:17:46.463019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12437 22:17:46.463116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12438 22:17:46.463402 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12439 22:17:46.463488 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12440 22:17:46.463570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12441 22:17:46.463825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12442 22:17:46.463925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12443 22:17:46.464024 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12444 22:17:46.464293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12445 22:17:46.464387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12446 22:17:46.464616 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12447 22:17:46.464725 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12448 22:17:46.464854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12449 22:17:46.464942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12450 22:17:46.465224 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12451 22:17:46.465312 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12452 22:17:46.465407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12453 22:17:46.465569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12454 22:17:46.465694 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12455 22:17:46.465792 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12456 22:17:46.465899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12457 22:17:46.466190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12458 22:17:46.470213 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12459 22:17:46.470592 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12460 22:17:46.470780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12461 22:17:46.470976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12462 22:17:46.471137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12463 22:17:46.471292 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12464 22:17:46.471444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12465 22:17:46.471634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12466 22:17:46.471774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12467 22:17:46.471898 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12468 22:17:46.472019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12469 22:17:46.472142 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12470 22:17:46.472297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12471 22:17:46.472433 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12472 22:17:46.472573 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12473 22:17:46.472749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12474 22:17:46.472972 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12475 22:17:46.473143 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12476 22:17:46.473298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12477 22:17:46.473454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12478 22:17:46.473641 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12479 22:17:46.474271 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12480 22:17:46.474397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12481 22:17:46.474515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12482 22:17:46.474630 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12483 22:17:46.474745 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12484 22:17:46.474888 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12485 22:17:46.475012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12486 22:17:46.475132 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12487 22:17:46.478412 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12488 22:17:46.478608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12489 22:17:46.478795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12490 22:17:46.478983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12491 22:17:46.479139 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12492 22:17:46.479317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12493 22:17:46.479481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12494 22:17:46.479647 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12495 22:17:46.479811 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12496 22:17:46.479993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12497 22:17:46.480147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12498 22:17:46.480283 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12499 22:17:46.480424 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12500 22:17:46.480574 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12501 22:17:46.491744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12502 22:17:46.492202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12503 22:17:46.492396 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12504 22:17:46.492565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12505 22:17:46.492767 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12506 22:17:46.492957 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12507 22:17:46.493125 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12508 22:17:46.493261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12509 22:17:46.493408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12510 22:17:46.493535 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12511 22:17:46.493675 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12512 22:17:46.493883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12513 22:17:46.494096 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12514 22:17:46.494235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12515 22:17:46.494379 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12516 22:17:46.494523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12517 22:17:46.494700 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12518 22:17:46.494835 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12519 22:17:46.494977 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12520 22:17:46.495119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12521 22:17:46.495293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12522 22:17:46.495428 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12523 22:17:46.495571 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12524 22:17:46.495745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12525 22:17:46.495882 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12526 22:17:46.496025 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12527 22:17:46.496231 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12528 22:17:46.496391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12529 22:17:46.496535 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12530 22:17:46.496678 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12531 22:17:46.496851 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12532 22:17:46.496990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12533 22:17:46.497374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12534 22:17:46.497588 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12535 22:17:46.497815 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12536 22:17:46.498000 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12537 22:17:46.498218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12538 22:17:46.498357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12539 22:17:46.498476 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12540 22:17:46.498589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12541 22:17:46.498702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12542 22:17:46.502246 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12543 22:17:46.502697 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12544 22:17:46.502915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12545 22:17:46.503162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12546 22:17:46.503360 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12547 22:17:46.503525 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12548 22:17:46.503708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12549 22:17:46.503881 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12550 22:17:46.504075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12551 22:17:46.504228 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12552 22:17:46.504384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12553 22:17:46.504595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12554 22:17:46.504790 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12555 22:17:46.504950 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12556 22:17:46.505100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12557 22:17:46.505286 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12558 22:17:46.505441 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12559 22:17:46.505604 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12560 22:17:46.506240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12561 22:17:46.506412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12562 22:17:46.506558 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12563 22:17:46.506703 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12564 22:17:46.506844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12565 22:17:46.507023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12566 22:17:46.507162 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12567 22:17:46.507305 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12568 22:17:46.507447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12569 22:17:46.510230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12570 22:17:46.510547 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12571 22:17:46.510658 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12572 22:17:46.510762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12573 22:17:46.510861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12574 22:17:46.510962 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12575 22:17:46.511080 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12576 22:17:46.511191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12577 22:17:46.511496 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12578 22:17:46.511587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12579 22:17:46.511698 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12580 22:17:46.511791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12581 22:17:46.512080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12582 22:17:46.512178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12583 22:17:46.512271 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12584 22:17:46.512373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12585 22:17:46.512498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12586 22:17:46.512645 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12587 22:17:46.512796 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12588 22:17:46.512929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12589 22:17:46.513250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12590 22:17:46.513396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12591 22:17:46.513502 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12592 22:17:46.513612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12593 22:17:46.513740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12594 22:17:46.513861 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12595 22:17:46.513991 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12596 22:17:46.518244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12597 22:17:46.518624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12598 22:17:46.518789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12599 22:17:46.518927 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12600 22:17:46.519073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12601 22:17:46.519176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12602 22:17:46.519278 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12603 22:17:46.519404 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12604 22:17:46.519509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12605 22:17:46.519622 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12606 22:17:46.519750 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12607 22:17:46.519865 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12608 22:17:46.519979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12609 22:17:46.520114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12610 22:17:46.520244 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12611 22:17:46.520403 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12612 22:17:46.520527 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12613 22:17:46.520719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12614 22:17:46.520908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12615 22:17:46.521051 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12616 22:17:46.521212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12617 22:17:46.521317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12618 22:17:46.521447 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12619 22:17:46.521572 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12620 22:17:46.521710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12621 22:17:46.521837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12622 22:17:46.522158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12623 22:17:46.522285 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12624 22:17:46.530373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12625 22:17:46.530674 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12626 22:17:46.530808 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12627 22:17:46.530937 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12628 22:17:46.531063 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12629 22:17:46.531187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12630 22:17:46.531325 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12631 22:17:46.531639 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12632 22:17:46.531743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12633 22:17:46.531875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12634 22:17:46.531998 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12635 22:17:46.539981 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12636 22:17:46.540357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12637 22:17:46.540513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12638 22:17:46.540733 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12639 22:17:46.540941 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12640 22:17:46.541107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12641 22:17:46.541312 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12642 22:17:46.541486 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12643 22:17:46.541669 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12644 22:17:46.541827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12645 22:17:46.542008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12646 22:17:46.542161 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12647 22:17:46.542310 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12648 22:17:46.542458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12649 22:17:46.542633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12650 22:17:46.542785 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12651 22:17:46.542958 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12652 22:17:46.543134 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12653 22:17:46.543309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12654 22:17:46.543484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12655 22:17:46.543663 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12656 22:17:46.543838 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12657 22:17:46.544013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12658 22:17:46.544190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12659 22:17:46.544365 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12660 22:17:46.544769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12661 22:17:46.544962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12662 22:17:46.545144 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12663 22:17:46.545299 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12664 22:17:46.545474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12665 22:17:46.545627 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12666 22:17:46.545818 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12667 22:17:46.545972 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12668 22:17:46.546143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12669 22:17:46.550472 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12670 22:17:46.550663 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12671 22:17:46.550806 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12672 22:17:46.550927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12673 22:17:46.551064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12674 22:17:46.551184 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12675 22:17:46.551320 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12676 22:17:46.551457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12677 22:17:46.551595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12678 22:17:46.551733 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12679 22:17:46.551872 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12680 22:17:46.552010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12681 22:17:46.552149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12682 22:17:46.552287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12683 22:17:46.552426 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12684 22:17:46.552563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12685 22:17:46.552932 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12686 22:17:46.553061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12687 22:17:46.553179 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12688 22:17:46.553498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12689 22:17:46.553621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12690 22:17:46.553718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12691 22:17:46.553809 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12692 22:17:46.553902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12693 22:17:46.553995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12694 22:17:46.558355 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12695 22:17:46.558703 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12696 22:17:46.558884 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12697 22:17:46.559040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12698 22:17:46.559184 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12699 22:17:46.559309 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12700 22:17:46.559450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12701 22:17:46.559575 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12702 22:17:46.559715 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12703 22:17:46.559837 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12704 22:17:46.559978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12705 22:17:46.560118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12706 22:17:46.560262 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12707 22:17:46.560404 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12708 22:17:46.560571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12709 22:17:46.560774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12710 22:17:46.560919 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12711 22:17:46.561064 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12712 22:17:46.561187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12713 22:17:46.561328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12714 22:17:46.561473 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12715 22:17:46.561594 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12716 22:17:46.561749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12717 22:17:46.561893 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12718 22:17:46.562034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12719 22:17:46.562156 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12720 22:17:46.566294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12721 22:17:46.566682 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12722 22:17:46.566813 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12723 22:17:46.566953 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12724 22:17:46.567075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12725 22:17:46.567213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12726 22:17:46.567357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12727 22:17:46.567496 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12728 22:17:46.567636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12729 22:17:46.567777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12730 22:17:46.567918 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12731 22:17:46.568059 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12732 22:17:46.568204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12733 22:17:46.568348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12734 22:17:46.568490 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12735 22:17:46.568630 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12736 22:17:46.568850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12737 22:17:46.569027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12738 22:17:46.569363 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12739 22:17:46.569485 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12740 22:17:46.569615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12741 22:17:46.569763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12742 22:17:46.569896 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12743 22:17:46.570025 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12744 22:17:46.578203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12745 22:17:46.578618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12746 22:17:46.578799 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12747 22:17:46.578976 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12748 22:17:46.579136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12749 22:17:46.579289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12750 22:17:46.579475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12751 22:17:46.579630 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12752 22:17:46.579773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12753 22:17:46.579953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12754 22:17:46.580110 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12755 22:17:46.580267 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12756 22:17:46.580415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12757 22:17:46.580578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12758 22:17:46.580711 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12759 22:17:46.580842 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12760 22:17:46.580969 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12761 22:17:46.581110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12762 22:17:46.581224 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12763 22:17:46.581340 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12764 22:17:46.581478 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12765 22:17:46.581597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12766 22:17:46.581757 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12767 22:17:46.581875 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12768 22:17:46.582004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12769 22:17:46.590573 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12770 22:17:46.590857 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12771 22:17:46.590965 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12772 22:17:46.591057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12773 22:17:46.591328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12774 22:17:46.591423 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12775 22:17:46.591512 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12776 22:17:46.591764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12777 22:17:46.591841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12778 22:17:46.591929 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12779 22:17:46.592197 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12780 22:17:46.592452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12781 22:17:46.592525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12782 22:17:46.592829 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12783 22:17:46.593010 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12784 22:17:46.593150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12785 22:17:46.593287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12786 22:17:46.593444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12787 22:17:46.593619 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12788 22:17:46.593812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12789 22:17:46.593977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12790 22:17:46.594173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12791 22:17:46.598210 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12792 22:17:46.598610 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12793 22:17:46.598764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12794 22:17:46.598953 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12795 22:17:46.599104 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12796 22:17:46.599285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12797 22:17:46.599454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12798 22:17:46.599614 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12799 22:17:46.599812 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12800 22:17:46.599972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12801 22:17:46.600116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12802 22:17:46.600297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12803 22:17:46.600423 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12804 22:17:46.600558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12805 22:17:46.600709 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12806 22:17:46.601745 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12807 22:17:46.601890 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12808 22:17:46.602018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12809 22:17:46.602141 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12810 22:17:46.602260 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12811 22:17:46.602377 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12812 22:17:46.602491 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12813 22:17:46.602605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12814 22:17:46.602927 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12815 22:17:46.603052 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12816 22:17:46.606243 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12817 22:17:46.606669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12818 22:17:46.606851 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12819 22:17:46.606992 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12820 22:17:46.607183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12821 22:17:46.607318 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12822 22:17:46.607442 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12823 22:17:46.607576 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12824 22:17:46.607739 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12825 22:17:46.607870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12826 22:17:46.607994 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12827 22:17:46.608135 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12828 22:17:46.608316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12829 22:17:46.608484 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12830 22:17:46.608666 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12831 22:17:46.608882 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12832 22:17:46.609021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12833 22:17:46.609156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12834 22:17:46.609276 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12835 22:17:46.609414 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12836 22:17:46.609533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12837 22:17:46.609690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12838 22:17:46.609865 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12839 22:17:46.610012 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12840 22:17:46.610137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12841 22:17:46.610284 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12842 22:17:46.614279 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12843 22:17:46.614631 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12844 22:17:46.614832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12845 22:17:46.615021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12846 22:17:46.615180 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12847 22:17:46.615346 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12848 22:17:46.615502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12849 22:17:46.615650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12850 22:17:46.616727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12851 22:17:46.616929 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12852 22:17:46.617112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12853 22:17:46.617272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12854 22:17:46.617400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12855 22:17:46.617569 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12856 22:17:46.617795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12857 22:17:46.617959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12858 22:17:46.618100 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12859 22:17:46.618219 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12860 22:17:46.618334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12861 22:17:46.618658 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12862 22:17:46.618791 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12863 22:17:46.618910 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12864 22:17:46.619026 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12865 22:17:46.619142 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12866 22:17:46.619256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12867 22:17:46.619371 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12868 22:17:46.619482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12869 22:17:46.622384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12870 22:17:46.622756 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12871 22:17:46.622925 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12872 22:17:46.623117 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12873 22:17:46.623283 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12874 22:17:46.623452 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12875 22:17:46.623609 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12876 22:17:46.623792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12877 22:17:46.623942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12878 22:17:46.624113 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12879 22:17:46.624256 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12880 22:17:46.624430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12881 22:17:46.624575 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12882 22:17:46.624757 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12883 22:17:46.624916 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12884 22:17:46.625066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12885 22:17:46.625241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12886 22:17:46.625394 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12887 22:17:46.625573 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12888 22:17:46.625731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12889 22:17:46.625896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12890 22:17:46.626032 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12891 22:17:46.626175 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12892 22:17:46.630488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12893 22:17:46.630808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12894 22:17:46.630912 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12895 22:17:46.631011 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12896 22:17:46.631095 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12897 22:17:46.631191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12898 22:17:46.631287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12899 22:17:46.631382 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12900 22:17:46.631696 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12901 22:17:46.631801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12902 22:17:46.631901 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12903 22:17:46.646120 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12904 22:17:46.646631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12905 22:17:46.646813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12906 22:17:46.646979 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12907 22:17:46.647169 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12908 22:17:46.647311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12909 22:17:46.647450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12910 22:17:46.647586 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12911 22:17:46.647749 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12912 22:17:46.647959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12913 22:17:46.648146 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12914 22:17:46.648372 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12915 22:17:46.648578 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12916 22:17:46.648814 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12917 22:17:46.648990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12918 22:17:46.649152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12919 22:17:46.649333 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12920 22:17:46.649486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12921 22:17:46.649611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12922 22:17:46.649746 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12923 22:17:46.649879 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12924 22:17:46.650035 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12925 22:17:46.650202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12926 22:17:46.650325 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12927 22:17:46.650439 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12928 22:17:46.654398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12929 22:17:46.654703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12930 22:17:46.654789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12931 22:17:46.654880 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12932 22:17:46.654973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12933 22:17:46.655065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12934 22:17:46.655167 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12935 22:17:46.655462 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12936 22:17:46.655561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12937 22:17:46.655902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12938 22:17:46.656096 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12939 22:17:46.656286 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12940 22:17:46.656446 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12941 22:17:46.656599 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12942 22:17:46.656780 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12943 22:17:46.656941 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12944 22:17:46.657101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12945 22:17:46.657288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12946 22:17:46.657450 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12947 22:17:46.657612 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12948 22:17:46.657824 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12949 22:17:46.657956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12950 22:17:46.658079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12951 22:17:46.658219 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12952 22:17:46.658340 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12953 22:17:46.662311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12954 22:17:46.662682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12955 22:17:46.662816 arm64_sve-ptrace pass
12956 22:17:46.663016 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12957 22:17:46.663199 arm64_sve-probe-vls_All_vector_lengths_valid pass
12958 22:17:46.663373 arm64_sve-probe-vls pass
12959 22:17:46.663546 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12960 22:17:46.663721 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12961 22:17:46.663936 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12962 22:17:46.664120 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12963 22:17:46.664297 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12964 22:17:46.664478 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12965 22:17:46.664657 arm64_vec-syscfg_SVE_vector_length_used_default pass
12966 22:17:46.664833 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12967 22:17:46.665012 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12968 22:17:46.665190 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12969 22:17:46.665406 arm64_vec-syscfg_SME_default_vector_length_32 pass
12970 22:17:46.665593 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12971 22:17:46.665787 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12972 22:17:46.665967 arm64_vec-syscfg_SME_current_VL_is_32 pass
12973 22:17:46.666150 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12974 22:17:46.666333 arm64_vec-syscfg_SME_prctl_set_min_max pass
12975 22:17:46.666509 arm64_vec-syscfg_SME_vector_length_used_default pass
12976 22:17:46.666679 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12977 22:17:46.666855 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12978 22:17:46.667069 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12979 22:17:46.667257 arm64_vec-syscfg pass
12980 22:17:46.667433 arm64_za-fork_fork_test pass
12981 22:17:46.667609 arm64_za-fork pass
12982 22:17:46.667787 arm64_za-ptrace_Set_VL_16 pass
12983 22:17:46.667965 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12984 22:17:46.668147 arm64_za-ptrace_Data_match_for_VL_16 pass
12985 22:17:46.670318 arm64_za-ptrace_Set_VL_32 pass
12986 22:17:46.670768 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12987 22:17:46.670969 arm64_za-ptrace_Data_match_for_VL_32 pass
12988 22:17:46.671154 arm64_za-ptrace_Set_VL_48 pass
12989 22:17:46.671333 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12990 22:17:46.671552 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12991 22:17:46.671737 arm64_za-ptrace_Set_VL_64 pass
12992 22:17:46.671912 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12993 22:17:46.672081 arm64_za-ptrace_Data_match_for_VL_64 pass
12994 22:17:46.672250 arm64_za-ptrace_Set_VL_80 pass
12995 22:17:46.672427 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12996 22:17:46.672647 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12997 22:17:46.672834 arm64_za-ptrace_Set_VL_96 pass
12998 22:17:46.673018 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12999 22:17:46.673199 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
13000 22:17:46.673377 arm64_za-ptrace_Set_VL_112 pass
13001 22:17:46.673555 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
13002 22:17:46.673743 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
13003 22:17:46.673923 arm64_za-ptrace_Set_VL_128 pass
13004 22:17:46.674145 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
13005 22:17:46.674334 arm64_za-ptrace_Data_match_for_VL_128 pass
13006 22:17:46.674513 arm64_za-ptrace_Set_VL_144 pass
13007 22:17:46.674689 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
13008 22:17:46.674863 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
13009 22:17:46.675042 arm64_za-ptrace_Set_VL_160 pass
13010 22:17:46.675218 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
13011 22:17:46.675395 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
13012 22:17:46.675573 arm64_za-ptrace_Set_VL_176 pass
13013 22:17:46.675748 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
13014 22:17:46.675925 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
13015 22:17:46.678317 arm64_za-ptrace_Set_VL_192 pass
13016 22:17:46.678752 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
13017 22:17:46.678878 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
13018 22:17:46.678987 arm64_za-ptrace_Set_VL_208 pass
13019 22:17:46.679127 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
13020 22:17:46.679226 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
13021 22:17:46.679321 arm64_za-ptrace_Set_VL_224 pass
13022 22:17:46.679432 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
13023 22:17:46.679534 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
13024 22:17:46.679670 arm64_za-ptrace_Set_VL_240 pass
13025 22:17:46.679788 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
13026 22:17:46.679914 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
13027 22:17:46.680010 arm64_za-ptrace_Set_VL_256 pass
13028 22:17:46.680119 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
13029 22:17:46.680233 arm64_za-ptrace_Data_match_for_VL_256 pass
13030 22:17:46.680351 arm64_za-ptrace_Set_VL_272 pass
13031 22:17:46.680487 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
13032 22:17:46.680645 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
13033 22:17:46.680782 arm64_za-ptrace_Set_VL_288 pass
13034 22:17:46.680934 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
13035 22:17:46.681064 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
13036 22:17:46.681190 arm64_za-ptrace_Set_VL_304 pass
13037 22:17:46.681352 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
13038 22:17:46.681481 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
13039 22:17:46.681580 arm64_za-ptrace_Set_VL_320 pass
13040 22:17:46.681698 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
13041 22:17:46.681794 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
13042 22:17:46.681904 arm64_za-ptrace_Set_VL_336 pass
13043 22:17:46.682015 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
13044 22:17:46.682136 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
13045 22:17:46.682236 arm64_za-ptrace_Set_VL_352 pass
13046 22:17:46.686327 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
13047 22:17:46.686689 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
13048 22:17:46.686823 arm64_za-ptrace_Set_VL_368 pass
13049 22:17:46.686949 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
13050 22:17:46.687065 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
13051 22:17:46.687204 arm64_za-ptrace_Set_VL_384 pass
13052 22:17:46.687341 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
13053 22:17:46.687473 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
13054 22:17:46.687587 arm64_za-ptrace_Set_VL_400 pass
13055 22:17:46.687708 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
13056 22:17:46.688014 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
13057 22:17:46.688104 arm64_za-ptrace_Set_VL_416 pass
13058 22:17:46.688225 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
13059 22:17:46.689196 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
13060 22:17:46.689295 arm64_za-ptrace_Set_VL_432 pass
13061 22:17:46.689371 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
13062 22:17:46.689446 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
13063 22:17:46.689517 arm64_za-ptrace_Set_VL_448 pass
13064 22:17:46.689587 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
13065 22:17:46.689684 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
13066 22:17:46.689760 arm64_za-ptrace_Set_VL_464 pass
13067 22:17:46.689836 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
13068 22:17:46.689925 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
13069 22:17:46.689998 arm64_za-ptrace_Set_VL_480 pass
13070 22:17:46.690082 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
13071 22:17:46.694225 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
13072 22:17:46.694502 arm64_za-ptrace_Set_VL_496 pass
13073 22:17:46.694571 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
13074 22:17:46.710836 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
13075 22:17:46.711014 arm64_za-ptrace_Set_VL_512 pass
13076 22:17:46.711277 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
13077 22:17:46.711384 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
13078 22:17:46.711493 arm64_za-ptrace_Set_VL_528 pass
13079 22:17:46.711589 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
13080 22:17:46.711694 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
13081 22:17:46.711793 arm64_za-ptrace_Set_VL_544 pass
13082 22:17:46.711896 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
13083 22:17:46.711994 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
13084 22:17:46.712107 arm64_za-ptrace_Set_VL_560 pass
13085 22:17:46.712207 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
13086 22:17:46.712311 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
13087 22:17:46.712420 arm64_za-ptrace_Set_VL_576 pass
13088 22:17:46.712522 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
13089 22:17:46.712601 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
13090 22:17:46.712675 arm64_za-ptrace_Set_VL_592 pass
13091 22:17:46.712741 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
13092 22:17:46.712811 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
13093 22:17:46.712874 arm64_za-ptrace_Set_VL_608 pass
13094 22:17:46.712960 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
13095 22:17:46.713034 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
13096 22:17:46.713107 arm64_za-ptrace_Set_VL_624 pass
13097 22:17:46.713183 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
13098 22:17:46.713266 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
13099 22:17:46.713339 arm64_za-ptrace_Set_VL_640 pass
13100 22:17:46.713421 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
13101 22:17:46.713513 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
13102 22:17:46.713590 arm64_za-ptrace_Set_VL_656 pass
13103 22:17:46.713964 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
13104 22:17:46.714071 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
13105 22:17:46.714151 arm64_za-ptrace_Set_VL_672 pass
13106 22:17:46.714215 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
13107 22:17:46.714288 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
13108 22:17:46.714354 arm64_za-ptrace_Set_VL_688 pass
13109 22:17:46.718271 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
13110 22:17:46.718613 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
13111 22:17:46.718730 arm64_za-ptrace_Set_VL_704 pass
13112 22:17:46.718817 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
13113 22:17:46.718891 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
13114 22:17:46.718982 arm64_za-ptrace_Set_VL_720 pass
13115 22:17:46.719055 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
13116 22:17:46.719132 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
13117 22:17:46.719223 arm64_za-ptrace_Set_VL_736 pass
13118 22:17:46.719308 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
13119 22:17:46.719387 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
13120 22:17:46.719479 arm64_za-ptrace_Set_VL_752 pass
13121 22:17:46.719574 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
13122 22:17:46.719654 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
13123 22:17:46.719732 arm64_za-ptrace_Set_VL_768 pass
13124 22:17:46.719823 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
13125 22:17:46.719903 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
13126 22:17:46.719998 arm64_za-ptrace_Set_VL_784 pass
13127 22:17:46.720079 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
13128 22:17:46.720182 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
13129 22:17:46.720278 arm64_za-ptrace_Set_VL_800 pass
13130 22:17:46.720372 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
13131 22:17:46.720488 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
13132 22:17:46.720589 arm64_za-ptrace_Set_VL_816 pass
13133 22:17:46.720711 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
13134 22:17:46.720815 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
13135 22:17:46.720937 arm64_za-ptrace_Set_VL_832 pass
13136 22:17:46.721033 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
13137 22:17:46.721117 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
13138 22:17:46.721213 arm64_za-ptrace_Set_VL_848 pass
13139 22:17:46.721296 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13140 22:17:46.721390 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13141 22:17:46.721473 arm64_za-ptrace_Set_VL_864 pass
13142 22:17:46.721568 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13143 22:17:46.722202 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13144 22:17:46.722308 arm64_za-ptrace_Set_VL_880 pass
13145 22:17:46.722397 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13146 22:17:46.722483 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13147 22:17:46.722569 arm64_za-ptrace_Set_VL_896 pass
13148 22:17:46.726293 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13149 22:17:46.726660 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13150 22:17:46.726762 arm64_za-ptrace_Set_VL_912 pass
13151 22:17:46.726836 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13152 22:17:46.726922 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13153 22:17:46.727008 arm64_za-ptrace_Set_VL_928 pass
13154 22:17:46.727105 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13155 22:17:46.727191 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13156 22:17:46.727262 arm64_za-ptrace_Set_VL_944 pass
13157 22:17:46.727351 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13158 22:17:46.727425 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13159 22:17:46.727520 arm64_za-ptrace_Set_VL_960 pass
13160 22:17:46.727601 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13161 22:17:46.727693 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13162 22:17:46.727980 arm64_za-ptrace_Set_VL_976 pass
13163 22:17:46.728081 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13164 22:17:46.728156 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13165 22:17:46.728248 arm64_za-ptrace_Set_VL_992 pass
13166 22:17:46.728328 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13167 22:17:46.728422 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13168 22:17:46.728522 arm64_za-ptrace_Set_VL_1008 pass
13169 22:17:46.728624 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13170 22:17:46.728727 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13171 22:17:46.728804 arm64_za-ptrace_Set_VL_1024 pass
13172 22:17:46.728872 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13173 22:17:46.728949 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13174 22:17:46.729240 arm64_za-ptrace_Set_VL_1040 pass
13175 22:17:46.729401 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13176 22:17:46.729533 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13177 22:17:46.729695 arm64_za-ptrace_Set_VL_1056 pass
13178 22:17:46.729837 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13179 22:17:46.729985 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13180 22:17:46.730076 arm64_za-ptrace_Set_VL_1072 pass
13181 22:17:46.730161 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13182 22:17:46.730262 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13183 22:17:46.730350 arm64_za-ptrace_Set_VL_1088 pass
13184 22:17:46.734577 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13185 22:17:46.735905 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13186 22:17:46.736008 arm64_za-ptrace_Set_VL_1104 pass
13187 22:17:46.736095 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13188 22:17:46.736178 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13189 22:17:46.736244 arm64_za-ptrace_Set_VL_1120 pass
13190 22:17:46.736302 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13191 22:17:46.736360 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13192 22:17:46.736419 arm64_za-ptrace_Set_VL_1136 pass
13193 22:17:46.736514 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13194 22:17:46.736608 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13195 22:17:46.736688 arm64_za-ptrace_Set_VL_1152 pass
13196 22:17:46.736764 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13197 22:17:46.736843 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13198 22:17:46.736924 arm64_za-ptrace_Set_VL_1168 pass
13199 22:17:46.737019 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13200 22:17:46.737132 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13201 22:17:46.737419 arm64_za-ptrace_Set_VL_1184 pass
13202 22:17:46.737523 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13203 22:17:46.737599 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13204 22:17:46.737681 arm64_za-ptrace_Set_VL_1200 pass
13205 22:17:46.737779 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13206 22:17:46.737872 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13207 22:17:46.737963 arm64_za-ptrace_Set_VL_1216 pass
13208 22:17:46.738049 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13209 22:17:46.738111 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13210 22:17:46.738171 arm64_za-ptrace_Set_VL_1232 pass
13211 22:17:46.738229 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13212 22:17:46.738288 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13213 22:17:46.738347 arm64_za-ptrace_Set_VL_1248 pass
13214 22:17:46.738405 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13215 22:17:46.738479 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13216 22:17:46.738543 arm64_za-ptrace_Set_VL_1264 pass
13217 22:17:46.738604 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13218 22:17:46.738664 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13219 22:17:46.738723 arm64_za-ptrace_Set_VL_1280 pass
13220 22:17:46.738782 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13221 22:17:46.742249 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13222 22:17:46.742569 arm64_za-ptrace_Set_VL_1296 pass
13223 22:17:46.742665 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13224 22:17:46.742768 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13225 22:17:46.742889 arm64_za-ptrace_Set_VL_1312 pass
13226 22:17:46.742979 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13227 22:17:46.743066 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13228 22:17:46.743161 arm64_za-ptrace_Set_VL_1328 pass
13229 22:17:46.743242 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13230 22:17:46.743320 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13231 22:17:46.743415 arm64_za-ptrace_Set_VL_1344 pass
13232 22:17:46.743497 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13233 22:17:46.743575 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13234 22:17:46.743675 arm64_za-ptrace_Set_VL_1360 pass
13235 22:17:46.743753 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13236 22:17:46.743826 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13237 22:17:46.743905 arm64_za-ptrace_Set_VL_1376 pass
13238 22:17:46.743969 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13239 22:17:46.744051 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13240 22:17:46.744132 arm64_za-ptrace_Set_VL_1392 pass
13241 22:17:46.744217 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13242 22:17:46.744509 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13243 22:17:46.744605 arm64_za-ptrace_Set_VL_1408 pass
13244 22:17:46.744709 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13245 22:17:46.744800 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13246 22:17:46.744902 arm64_za-ptrace_Set_VL_1424 pass
13247 22:17:46.745004 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13248 22:17:46.745092 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13249 22:17:46.745192 arm64_za-ptrace_Set_VL_1440 pass
13250 22:17:46.745294 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13251 22:17:46.745397 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13252 22:17:46.745498 arm64_za-ptrace_Set_VL_1456 pass
13253 22:17:46.745617 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13254 22:17:46.745733 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13255 22:17:46.745836 arm64_za-ptrace_Set_VL_1472 pass
13256 22:17:46.745939 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13257 22:17:46.750238 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13258 22:17:46.750524 arm64_za-ptrace_Set_VL_1488 pass
13259 22:17:46.750592 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13260 22:17:46.750666 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13261 22:17:46.750730 arm64_za-ptrace_Set_VL_1504 pass
13262 22:17:46.750803 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13263 22:17:46.751053 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13264 22:17:46.751120 arm64_za-ptrace_Set_VL_1520 pass
13265 22:17:46.751192 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13266 22:17:46.751265 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13267 22:17:46.751378 arm64_za-ptrace_Set_VL_1536 pass
13268 22:17:46.751492 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13269 22:17:46.767058 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13270 22:17:46.767478 arm64_za-ptrace_Set_VL_1552 pass
13271 22:17:46.767681 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13272 22:17:46.767855 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13273 22:17:46.768022 arm64_za-ptrace_Set_VL_1568 pass
13274 22:17:46.768228 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13275 22:17:46.768400 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13276 22:17:46.768571 arm64_za-ptrace_Set_VL_1584 pass
13277 22:17:46.768736 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13278 22:17:46.768898 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13279 22:17:46.769059 arm64_za-ptrace_Set_VL_1600 pass
13280 22:17:46.769224 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13281 22:17:46.769422 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13282 22:17:46.769587 arm64_za-ptrace_Set_VL_1616 pass
13283 22:17:46.769765 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13284 22:17:46.769924 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13285 22:17:46.770087 arm64_za-ptrace_Set_VL_1632 pass
13286 22:17:46.770247 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13287 22:17:46.770405 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13288 22:17:46.770566 arm64_za-ptrace_Set_VL_1648 pass
13289 22:17:46.770725 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13290 22:17:46.770887 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13291 22:17:46.771049 arm64_za-ptrace_Set_VL_1664 pass
13292 22:17:46.771212 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13293 22:17:46.771409 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13294 22:17:46.771576 arm64_za-ptrace_Set_VL_1680 pass
13295 22:17:46.771737 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13296 22:17:46.771901 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13297 22:17:46.772063 arm64_za-ptrace_Set_VL_1696 pass
13298 22:17:46.772221 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13299 22:17:46.774299 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13300 22:17:46.774604 arm64_za-ptrace_Set_VL_1712 pass
13301 22:17:46.774715 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13302 22:17:46.774795 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13303 22:17:46.774872 arm64_za-ptrace_Set_VL_1728 pass
13304 22:17:46.775127 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13305 22:17:46.775209 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13306 22:17:46.775465 arm64_za-ptrace_Set_VL_1744 pass
13307 22:17:46.775543 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13308 22:17:46.775796 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13309 22:17:46.775882 arm64_za-ptrace_Set_VL_1760 pass
13310 22:17:46.776155 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13311 22:17:46.776383 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13312 22:17:46.776563 arm64_za-ptrace_Set_VL_1776 pass
13313 22:17:46.776761 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13314 22:17:46.776952 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13315 22:17:46.777115 arm64_za-ptrace_Set_VL_1792 pass
13316 22:17:46.777305 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13317 22:17:46.777475 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13318 22:17:46.777683 arm64_za-ptrace_Set_VL_1808 pass
13319 22:17:46.777854 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13320 22:17:46.778050 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13321 22:17:46.778217 arm64_za-ptrace_Set_VL_1824 pass
13322 22:17:46.782273 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13323 22:17:46.782679 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13324 22:17:46.782765 arm64_za-ptrace_Set_VL_1840 pass
13325 22:17:46.782855 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13326 22:17:46.782950 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13327 22:17:46.783042 arm64_za-ptrace_Set_VL_1856 pass
13328 22:17:46.783123 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13329 22:17:46.783198 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13330 22:17:46.783309 arm64_za-ptrace_Set_VL_1872 pass
13331 22:17:46.783385 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13332 22:17:46.783475 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13333 22:17:46.783547 arm64_za-ptrace_Set_VL_1888 pass
13334 22:17:46.783637 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13335 22:17:46.783722 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13336 22:17:46.783808 arm64_za-ptrace_Set_VL_1904 pass
13337 22:17:46.784074 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13338 22:17:46.784152 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13339 22:17:46.784242 arm64_za-ptrace_Set_VL_1920 pass
13340 22:17:46.784313 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13341 22:17:46.784403 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13342 22:17:46.784517 arm64_za-ptrace_Set_VL_1936 pass
13343 22:17:46.784628 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13344 22:17:46.784718 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13345 22:17:46.784804 arm64_za-ptrace_Set_VL_1952 pass
13346 22:17:46.784890 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13347 22:17:46.785157 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13348 22:17:46.785230 arm64_za-ptrace_Set_VL_1968 pass
13349 22:17:46.785320 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13350 22:17:46.785408 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13351 22:17:46.785494 arm64_za-ptrace_Set_VL_1984 pass
13352 22:17:46.785754 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13353 22:17:46.785840 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13354 22:17:46.785915 arm64_za-ptrace_Set_VL_2000 pass
13355 22:17:46.785987 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13356 22:17:46.790201 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13357 22:17:46.790550 arm64_za-ptrace_Set_VL_2016 pass
13358 22:17:46.790656 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13359 22:17:46.790751 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13360 22:17:46.790860 arm64_za-ptrace_Set_VL_2032 pass
13361 22:17:46.790956 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13362 22:17:46.791049 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13363 22:17:46.791159 arm64_za-ptrace_Set_VL_2048 pass
13364 22:17:46.791256 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13365 22:17:46.791369 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13366 22:17:46.791463 arm64_za-ptrace_Set_VL_2064 pass
13367 22:17:46.791573 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13368 22:17:46.791685 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13369 22:17:46.791781 arm64_za-ptrace_Set_VL_2080 pass
13370 22:17:46.791892 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13371 22:17:46.791988 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13372 22:17:46.792096 arm64_za-ptrace_Set_VL_2096 pass
13373 22:17:46.792207 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13374 22:17:46.792318 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13375 22:17:46.792422 arm64_za-ptrace_Set_VL_2112 pass
13376 22:17:46.792535 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13377 22:17:46.792630 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13378 22:17:46.792739 arm64_za-ptrace_Set_VL_2128 pass
13379 22:17:46.792851 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13380 22:17:46.792963 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13381 22:17:46.793074 arm64_za-ptrace_Set_VL_2144 pass
13382 22:17:46.793184 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13383 22:17:46.793298 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13384 22:17:46.793411 arm64_za-ptrace_Set_VL_2160 pass
13385 22:17:46.793523 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13386 22:17:46.793635 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13387 22:17:46.793785 arm64_za-ptrace_Set_VL_2176 pass
13388 22:17:46.793946 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13389 22:17:46.794057 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13390 22:17:46.794174 arm64_za-ptrace_Set_VL_2192 pass
13391 22:17:46.794286 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13392 22:17:46.798240 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13393 22:17:46.798563 arm64_za-ptrace_Set_VL_2208 pass
13394 22:17:46.798669 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13395 22:17:46.798782 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13396 22:17:46.798879 arm64_za-ptrace_Set_VL_2224 pass
13397 22:17:46.798977 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13398 22:17:46.799090 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13399 22:17:46.799204 arm64_za-ptrace_Set_VL_2240 pass
13400 22:17:46.799302 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13401 22:17:46.799413 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13402 22:17:46.799511 arm64_za-ptrace_Set_VL_2256 pass
13403 22:17:46.799623 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13404 22:17:46.799719 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13405 22:17:46.799830 arm64_za-ptrace_Set_VL_2272 pass
13406 22:17:46.799943 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13407 22:17:46.800041 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13408 22:17:46.800151 arm64_za-ptrace_Set_VL_2288 pass
13409 22:17:46.800268 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13410 22:17:46.800380 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13411 22:17:46.800480 arm64_za-ptrace_Set_VL_2304 pass
13412 22:17:46.800595 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13413 22:17:46.800763 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13414 22:17:46.800953 arm64_za-ptrace_Set_VL_2320 pass
13415 22:17:46.801142 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13416 22:17:46.801295 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13417 22:17:46.801432 arm64_za-ptrace_Set_VL_2336 pass
13418 22:17:46.801604 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13419 22:17:46.801774 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13420 22:17:46.801969 arm64_za-ptrace_Set_VL_2352 pass
13421 22:17:46.802101 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13422 22:17:46.802243 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13423 22:17:46.802363 arm64_za-ptrace_Set_VL_2368 pass
13424 22:17:46.802477 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13425 22:17:46.802616 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13426 22:17:46.802736 arm64_za-ptrace_Set_VL_2384 pass
13427 22:17:46.806285 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13428 22:17:46.806694 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13429 22:17:46.806844 arm64_za-ptrace_Set_VL_2400 pass
13430 22:17:46.806975 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13431 22:17:46.807101 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13432 22:17:46.807228 arm64_za-ptrace_Set_VL_2416 pass
13433 22:17:46.807377 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13434 22:17:46.807505 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13435 22:17:46.807629 arm64_za-ptrace_Set_VL_2432 pass
13436 22:17:46.807751 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13437 22:17:46.807876 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13438 22:17:46.807996 arm64_za-ptrace_Set_VL_2448 pass
13439 22:17:46.808145 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13440 22:17:46.808274 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13441 22:17:46.808398 arm64_za-ptrace_Set_VL_2464 pass
13442 22:17:46.808522 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13443 22:17:46.808647 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13444 22:17:46.808769 arm64_za-ptrace_Set_VL_2480 pass
13445 22:17:46.808887 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13446 22:17:46.809031 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13447 22:17:46.809152 arm64_za-ptrace_Set_VL_2496 pass
13448 22:17:46.809269 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13449 22:17:46.809385 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13450 22:17:46.809503 arm64_za-ptrace_Set_VL_2512 pass
13451 22:17:46.809626 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13452 22:17:46.809761 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13453 22:17:46.809889 arm64_za-ptrace_Set_VL_2528 pass
13454 22:17:46.810012 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13455 22:17:46.810149 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13456 22:17:46.810235 arm64_za-ptrace_Set_VL_2544 pass
13457 22:17:46.810318 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13458 22:17:46.810403 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13459 22:17:46.810487 arm64_za-ptrace_Set_VL_2560 pass
13460 22:17:46.810570 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13461 22:17:46.810654 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13462 22:17:46.825145 arm64_za-ptrace_Set_VL_2576 pass
13463 22:17:46.825559 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13464 22:17:46.825672 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13465 22:17:46.825761 arm64_za-ptrace_Set_VL_2592 pass
13466 22:17:46.825845 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13467 22:17:46.825945 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13468 22:17:46.826031 arm64_za-ptrace_Set_VL_2608 pass
13469 22:17:46.826116 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13470 22:17:46.826200 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13471 22:17:46.826284 arm64_za-ptrace_Set_VL_2624 pass
13472 22:17:46.826385 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13473 22:17:46.826473 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13474 22:17:46.826572 arm64_za-ptrace_Set_VL_2640 pass
13475 22:17:46.826657 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13476 22:17:46.826757 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13477 22:17:46.826841 arm64_za-ptrace_Set_VL_2656 pass
13478 22:17:46.826924 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13479 22:17:46.827025 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13480 22:17:46.827111 arm64_za-ptrace_Set_VL_2672 pass
13481 22:17:46.827211 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13482 22:17:46.827298 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13483 22:17:46.827383 arm64_za-ptrace_Set_VL_2688 pass
13484 22:17:46.827483 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13485 22:17:46.827571 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13486 22:17:46.827655 arm64_za-ptrace_Set_VL_2704 pass
13487 22:17:46.827755 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13488 22:17:46.827839 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13489 22:17:46.827923 arm64_za-ptrace_Set_VL_2720 pass
13490 22:17:46.828006 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13491 22:17:46.828105 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13492 22:17:46.828189 arm64_za-ptrace_Set_VL_2736 pass
13493 22:17:46.828268 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13494 22:17:46.828365 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13495 22:17:46.828452 arm64_za-ptrace_Set_VL_2752 pass
13496 22:17:46.828537 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13497 22:17:46.828635 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13498 22:17:46.828720 arm64_za-ptrace_Set_VL_2768 pass
13499 22:17:46.828800 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13500 22:17:46.828879 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13501 22:17:46.828980 arm64_za-ptrace_Set_VL_2784 pass
13502 22:17:46.829066 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13503 22:17:46.829149 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13504 22:17:46.829239 arm64_za-ptrace_Set_VL_2800 pass
13505 22:17:46.829322 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13506 22:17:46.829421 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13507 22:17:46.829507 arm64_za-ptrace_Set_VL_2816 pass
13508 22:17:46.829812 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13509 22:17:46.829933 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13510 22:17:46.830018 arm64_za-ptrace_Set_VL_2832 pass
13511 22:17:46.830101 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13512 22:17:46.830183 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13513 22:17:46.830282 arm64_za-ptrace_Set_VL_2848 pass
13514 22:17:46.830368 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13515 22:17:46.830450 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13516 22:17:46.834260 arm64_za-ptrace_Set_VL_2864 pass
13517 22:17:46.834597 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13518 22:17:46.834703 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13519 22:17:46.834790 arm64_za-ptrace_Set_VL_2880 pass
13520 22:17:46.834875 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13521 22:17:46.834973 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13522 22:17:46.835059 arm64_za-ptrace_Set_VL_2896 pass
13523 22:17:46.835142 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13524 22:17:46.835230 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13525 22:17:46.835329 arm64_za-ptrace_Set_VL_2912 pass
13526 22:17:46.835413 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13527 22:17:46.835511 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13528 22:17:46.835595 arm64_za-ptrace_Set_VL_2928 pass
13529 22:17:46.835677 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13530 22:17:46.835775 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13531 22:17:46.835861 arm64_za-ptrace_Set_VL_2944 pass
13532 22:17:46.835944 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13533 22:17:46.836041 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13534 22:17:46.836126 arm64_za-ptrace_Set_VL_2960 pass
13535 22:17:46.836228 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13536 22:17:46.836314 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13537 22:17:46.836397 arm64_za-ptrace_Set_VL_2976 pass
13538 22:17:46.836501 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13539 22:17:46.836600 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13540 22:17:46.836686 arm64_za-ptrace_Set_VL_2992 pass
13541 22:17:46.836783 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13542 22:17:46.836868 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13543 22:17:46.836965 arm64_za-ptrace_Set_VL_3008 pass
13544 22:17:46.837063 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13545 22:17:46.837161 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13546 22:17:46.837260 arm64_za-ptrace_Set_VL_3024 pass
13547 22:17:46.837346 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13548 22:17:46.837443 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13549 22:17:46.837542 arm64_za-ptrace_Set_VL_3040 pass
13550 22:17:46.838159 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13551 22:17:46.838266 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13552 22:17:46.838352 arm64_za-ptrace_Set_VL_3056 pass
13553 22:17:46.838434 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13554 22:17:46.838516 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13555 22:17:46.842290 arm64_za-ptrace_Set_VL_3072 pass
13556 22:17:46.842409 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13557 22:17:46.842695 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13558 22:17:46.842798 arm64_za-ptrace_Set_VL_3088 pass
13559 22:17:46.842900 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13560 22:17:46.842984 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13561 22:17:46.843065 arm64_za-ptrace_Set_VL_3104 pass
13562 22:17:46.843159 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13563 22:17:46.843255 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13564 22:17:46.843337 arm64_za-ptrace_Set_VL_3120 pass
13565 22:17:46.843431 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13566 22:17:46.843529 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13567 22:17:46.843629 arm64_za-ptrace_Set_VL_3136 pass
13568 22:17:46.843728 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13569 22:17:46.843829 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13570 22:17:46.844120 arm64_za-ptrace_Set_VL_3152 pass
13571 22:17:46.844224 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13572 22:17:46.844326 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13573 22:17:46.844499 arm64_za-ptrace_Set_VL_3168 pass
13574 22:17:46.844601 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13575 22:17:46.844704 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13576 22:17:46.844789 arm64_za-ptrace_Set_VL_3184 pass
13577 22:17:46.844873 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13578 22:17:46.844972 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13579 22:17:46.845053 arm64_za-ptrace_Set_VL_3200 pass
13580 22:17:46.845135 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13581 22:17:46.845230 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13582 22:17:46.845315 arm64_za-ptrace_Set_VL_3216 pass
13583 22:17:46.845397 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13584 22:17:46.845494 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13585 22:17:46.845576 arm64_za-ptrace_Set_VL_3232 pass
13586 22:17:46.845663 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13587 22:17:46.845762 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13588 22:17:46.845847 arm64_za-ptrace_Set_VL_3248 pass
13589 22:17:46.845944 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13590 22:17:46.846026 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13591 22:17:46.846120 arm64_za-ptrace_Set_VL_3264 pass
13592 22:17:46.850248 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13593 22:17:46.850573 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13594 22:17:46.850670 arm64_za-ptrace_Set_VL_3280 pass
13595 22:17:46.850739 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13596 22:17:46.850832 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13597 22:17:46.850906 arm64_za-ptrace_Set_VL_3296 pass
13598 22:17:46.850982 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13599 22:17:46.851062 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13600 22:17:46.851137 arm64_za-ptrace_Set_VL_3312 pass
13601 22:17:46.851225 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13602 22:17:46.851297 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13603 22:17:46.851373 arm64_za-ptrace_Set_VL_3328 pass
13604 22:17:46.851462 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13605 22:17:46.851742 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13606 22:17:46.851839 arm64_za-ptrace_Set_VL_3344 pass
13607 22:17:46.851923 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13608 22:17:46.852016 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13609 22:17:46.852080 arm64_za-ptrace_Set_VL_3360 pass
13610 22:17:46.852139 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13611 22:17:46.852210 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13612 22:17:46.852274 arm64_za-ptrace_Set_VL_3376 pass
13613 22:17:46.852351 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13614 22:17:46.852444 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13615 22:17:46.852529 arm64_za-ptrace_Set_VL_3392 pass
13616 22:17:46.852602 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13617 22:17:46.852683 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13618 22:17:46.852773 arm64_za-ptrace_Set_VL_3408 pass
13619 22:17:46.852851 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13620 22:17:46.853201 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13621 22:17:46.853288 arm64_za-ptrace_Set_VL_3424 pass
13622 22:17:46.853394 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13623 22:17:46.853466 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13624 22:17:46.853554 arm64_za-ptrace_Set_VL_3440 pass
13625 22:17:46.853623 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13626 22:17:46.853747 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13627 22:17:46.853843 arm64_za-ptrace_Set_VL_3456 pass
13628 22:17:46.853928 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13629 22:17:46.854004 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13630 22:17:46.854076 arm64_za-ptrace_Set_VL_3472 pass
13631 22:17:46.858226 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13632 22:17:46.858506 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13633 22:17:46.858593 arm64_za-ptrace_Set_VL_3488 pass
13634 22:17:46.858673 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13635 22:17:46.858754 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13636 22:17:46.858847 arm64_za-ptrace_Set_VL_3504 pass
13637 22:17:46.858932 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13638 22:17:46.859030 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13639 22:17:46.859129 arm64_za-ptrace_Set_VL_3520 pass
13640 22:17:46.859294 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13641 22:17:46.859484 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13642 22:17:46.859690 arm64_za-ptrace_Set_VL_3536 pass
13643 22:17:46.859948 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13644 22:17:46.860167 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13645 22:17:46.860382 arm64_za-ptrace_Set_VL_3552 pass
13646 22:17:46.860581 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13647 22:17:46.860734 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13648 22:17:46.860852 arm64_za-ptrace_Set_VL_3568 pass
13649 22:17:46.860977 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13650 22:17:46.861094 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13651 22:17:46.861210 arm64_za-ptrace_Set_VL_3584 pass
13652 22:17:46.861349 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13653 22:17:46.861472 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13654 22:17:46.878216 arm64_za-ptrace_Set_VL_3600 pass
13655 22:17:46.878582 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13656 22:17:46.878674 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13657 22:17:46.878758 arm64_za-ptrace_Set_VL_3616 pass
13658 22:17:46.878841 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13659 22:17:46.878905 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13660 22:17:46.878976 arm64_za-ptrace_Set_VL_3632 pass
13661 22:17:46.879250 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13662 22:17:46.879350 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13663 22:17:46.879469 arm64_za-ptrace_Set_VL_3648 pass
13664 22:17:46.879617 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13665 22:17:46.879729 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13666 22:17:46.879811 arm64_za-ptrace_Set_VL_3664 pass
13667 22:17:46.879881 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13668 22:17:46.879965 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13669 22:17:46.880046 arm64_za-ptrace_Set_VL_3680 pass
13670 22:17:46.880121 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13671 22:17:46.880199 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13672 22:17:46.880300 arm64_za-ptrace_Set_VL_3696 pass
13673 22:17:46.880376 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13674 22:17:46.880468 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13675 22:17:46.880603 arm64_za-ptrace_Set_VL_3712 pass
13676 22:17:46.880718 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13677 22:17:46.880820 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13678 22:17:46.880907 arm64_za-ptrace_Set_VL_3728 pass
13679 22:17:46.881007 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13680 22:17:46.881298 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13681 22:17:46.881391 arm64_za-ptrace_Set_VL_3744 pass
13682 22:17:46.881491 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13683 22:17:46.881919 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13684 22:17:46.882006 arm64_za-ptrace_Set_VL_3760 pass
13685 22:17:46.882085 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13686 22:17:46.882160 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13687 22:17:46.882407 arm64_za-ptrace_Set_VL_3776 pass
13688 22:17:46.882473 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13689 22:17:46.886342 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13690 22:17:46.886447 arm64_za-ptrace_Set_VL_3792 pass
13691 22:17:46.886697 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13692 22:17:46.886780 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13693 22:17:46.886876 arm64_za-ptrace_Set_VL_3808 pass
13694 22:17:46.886951 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13695 22:17:46.887046 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13696 22:17:46.887124 arm64_za-ptrace_Set_VL_3824 pass
13697 22:17:46.887395 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13698 22:17:46.887492 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13699 22:17:46.887576 arm64_za-ptrace_Set_VL_3840 pass
13700 22:17:46.887841 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13701 22:17:46.887931 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13702 22:17:46.888186 arm64_za-ptrace_Set_VL_3856 pass
13703 22:17:46.888266 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13704 22:17:46.888537 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13705 22:17:46.888630 arm64_za-ptrace_Set_VL_3872 pass
13706 22:17:46.888706 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13707 22:17:46.888780 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13708 22:17:46.888853 arm64_za-ptrace_Set_VL_3888 pass
13709 22:17:46.889120 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13710 22:17:46.889204 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13711 22:17:46.889292 arm64_za-ptrace_Set_VL_3904 pass
13712 22:17:46.889371 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13713 22:17:46.889622 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13714 22:17:46.889697 arm64_za-ptrace_Set_VL_3920 pass
13715 22:17:46.889775 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13716 22:17:46.889838 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13717 22:17:46.889923 arm64_za-ptrace_Set_VL_3936 pass
13718 22:17:46.889993 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13719 22:17:46.890090 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13720 22:17:46.894248 arm64_za-ptrace_Set_VL_3952 pass
13721 22:17:46.894554 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13722 22:17:46.894626 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13723 22:17:46.894690 arm64_za-ptrace_Set_VL_3968 pass
13724 22:17:46.894777 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13725 22:17:46.894858 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13726 22:17:46.894954 arm64_za-ptrace_Set_VL_3984 pass
13727 22:17:46.895036 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13728 22:17:46.895305 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13729 22:17:46.895395 arm64_za-ptrace_Set_VL_4000 pass
13730 22:17:46.895488 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13731 22:17:46.895577 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13732 22:17:46.895651 arm64_za-ptrace_Set_VL_4016 pass
13733 22:17:46.895906 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13734 22:17:46.895985 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13735 22:17:46.896047 arm64_za-ptrace_Set_VL_4032 pass
13736 22:17:46.896299 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13737 22:17:46.896366 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13738 22:17:46.896439 arm64_za-ptrace_Set_VL_4048 pass
13739 22:17:46.896544 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13740 22:17:46.896642 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13741 22:17:46.896722 arm64_za-ptrace_Set_VL_4064 pass
13742 22:17:46.896974 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13743 22:17:46.897068 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13744 22:17:46.897333 arm64_za-ptrace_Set_VL_4080 pass
13745 22:17:46.897417 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13746 22:17:46.897506 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13747 22:17:46.897579 arm64_za-ptrace_Set_VL_4096 pass
13748 22:17:46.897664 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13749 22:17:46.897751 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13750 22:17:46.897996 arm64_za-ptrace_Set_VL_4112 pass
13751 22:17:46.898077 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13752 22:17:46.902254 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13753 22:17:46.902528 arm64_za-ptrace_Set_VL_4128 pass
13754 22:17:46.902596 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13755 22:17:46.902668 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13756 22:17:46.902731 arm64_za-ptrace_Set_VL_4144 pass
13757 22:17:46.902803 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13758 22:17:46.903053 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13759 22:17:46.903128 arm64_za-ptrace_Set_VL_4160 pass
13760 22:17:46.903370 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13761 22:17:46.903436 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13762 22:17:46.903496 arm64_za-ptrace_Set_VL_4176 pass
13763 22:17:46.903566 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13764 22:17:46.903638 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13765 22:17:46.903902 arm64_za-ptrace_Set_VL_4192 pass
13766 22:17:46.903990 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13767 22:17:46.904078 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13768 22:17:46.904337 arm64_za-ptrace_Set_VL_4208 pass
13769 22:17:46.904406 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13770 22:17:46.904527 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13771 22:17:46.904790 arm64_za-ptrace_Set_VL_4224 pass
13772 22:17:46.904867 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13773 22:17:46.904963 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13774 22:17:46.905032 arm64_za-ptrace_Set_VL_4240 pass
13775 22:17:46.905103 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13776 22:17:46.905177 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13777 22:17:46.905430 arm64_za-ptrace_Set_VL_4256 pass
13778 22:17:46.905510 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13779 22:17:46.905587 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13780 22:17:46.905848 arm64_za-ptrace_Set_VL_4272 pass
13781 22:17:46.906098 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13782 22:17:46.906166 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13783 22:17:46.906236 arm64_za-ptrace_Set_VL_4288 pass
13784 22:17:46.906310 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13785 22:17:46.910468 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13786 22:17:46.910565 arm64_za-ptrace_Set_VL_4304 pass
13787 22:17:46.910645 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13788 22:17:46.910735 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13789 22:17:46.910813 arm64_za-ptrace_Set_VL_4320 pass
13790 22:17:46.910902 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13791 22:17:46.911004 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13792 22:17:46.911102 arm64_za-ptrace_Set_VL_4336 pass
13793 22:17:46.911200 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13794 22:17:46.911310 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13795 22:17:46.911405 arm64_za-ptrace_Set_VL_4352 pass
13796 22:17:46.911471 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13797 22:17:46.911555 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13798 22:17:46.911825 arm64_za-ptrace_Set_VL_4368 pass
13799 22:17:46.911911 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13800 22:17:46.911985 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13801 22:17:46.912105 arm64_za-ptrace_Set_VL_4384 pass
13802 22:17:46.912374 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13803 22:17:46.912484 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13804 22:17:46.912578 arm64_za-ptrace_Set_VL_4400 pass
13805 22:17:46.912675 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13806 22:17:46.912756 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13807 22:17:46.912997 arm64_za-ptrace_Set_VL_4416 pass
13808 22:17:46.913072 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13809 22:17:46.913151 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13810 22:17:46.913232 arm64_za-ptrace_Set_VL_4432 pass
13811 22:17:46.913302 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13812 22:17:46.913382 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13813 22:17:46.913635 arm64_za-ptrace_Set_VL_4448 pass
13814 22:17:46.913731 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13815 22:17:46.913994 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13816 22:17:46.914063 arm64_za-ptrace_Set_VL_4464 pass
13817 22:17:46.914124 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13818 22:17:46.914193 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13819 22:17:46.918235 arm64_za-ptrace_Set_VL_4480 pass
13820 22:17:46.918506 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13821 22:17:46.918572 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13822 22:17:46.918643 arm64_za-ptrace_Set_VL_4496 pass
13823 22:17:46.918704 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13824 22:17:46.918776 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13825 22:17:46.918863 arm64_za-ptrace_Set_VL_4512 pass
13826 22:17:46.918941 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13827 22:17:46.919192 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13828 22:17:46.919257 arm64_za-ptrace_Set_VL_4528 pass
13829 22:17:46.919332 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13830 22:17:46.919577 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13831 22:17:46.919641 arm64_za-ptrace_Set_VL_4544 pass
13832 22:17:46.919710 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13833 22:17:46.919954 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13834 22:17:46.920017 arm64_za-ptrace_Set_VL_4560 pass
13835 22:17:46.920086 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13836 22:17:46.920339 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13837 22:17:46.920423 arm64_za-ptrace_Set_VL_4576 pass
13838 22:17:46.920519 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13839 22:17:46.920619 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13840 22:17:46.920689 arm64_za-ptrace_Set_VL_4592 pass
13841 22:17:46.920779 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13842 22:17:46.920862 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13843 22:17:46.921312 arm64_za-ptrace_Set_VL_4608 pass
13844 22:17:46.921381 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13845 22:17:46.921441 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13846 22:17:46.921844 arm64_za-ptrace_Set_VL_4624 pass
13847 22:17:46.936207 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13848 22:17:46.936328 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13849 22:17:46.936394 arm64_za-ptrace_Set_VL_4640 pass
13850 22:17:46.936500 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13851 22:17:46.936605 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13852 22:17:46.936794 arm64_za-ptrace_Set_VL_4656 pass
13853 22:17:46.936904 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13854 22:17:46.936983 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13855 22:17:46.937143 arm64_za-ptrace_Set_VL_4672 pass
13856 22:17:46.937265 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13857 22:17:46.937359 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13858 22:17:46.937437 arm64_za-ptrace_Set_VL_4688 pass
13859 22:17:46.937498 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13860 22:17:46.937571 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13861 22:17:46.937689 arm64_za-ptrace_Set_VL_4704 pass
13862 22:17:46.937766 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13863 22:17:46.937843 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13864 22:17:46.937914 arm64_za-ptrace_Set_VL_4720 pass
13865 22:17:46.938010 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13866 22:17:46.938324 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13867 22:17:46.938453 arm64_za-ptrace_Set_VL_4736 pass
13868 22:17:46.938576 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13869 22:17:46.938661 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13870 22:17:46.938778 arm64_za-ptrace_Set_VL_4752 pass
13871 22:17:46.938875 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13872 22:17:46.938988 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13873 22:17:46.939098 arm64_za-ptrace_Set_VL_4768 pass
13874 22:17:46.939202 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13875 22:17:46.939312 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13876 22:17:46.939396 arm64_za-ptrace_Set_VL_4784 pass
13877 22:17:46.939487 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13878 22:17:46.939569 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13879 22:17:46.939664 arm64_za-ptrace_Set_VL_4800 pass
13880 22:17:46.939748 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13881 22:17:46.939845 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13882 22:17:46.939929 arm64_za-ptrace_Set_VL_4816 pass
13883 22:17:46.940024 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13884 22:17:46.940131 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13885 22:17:46.940242 arm64_za-ptrace_Set_VL_4832 pass
13886 22:17:46.940377 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13887 22:17:46.940484 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13888 22:17:46.940597 arm64_za-ptrace_Set_VL_4848 pass
13889 22:17:46.940712 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13890 22:17:46.940807 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13891 22:17:46.940896 arm64_za-ptrace_Set_VL_4864 pass
13892 22:17:46.941010 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13893 22:17:46.941150 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13894 22:17:46.941253 arm64_za-ptrace_Set_VL_4880 pass
13895 22:17:46.941344 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13896 22:17:46.941428 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13897 22:17:46.941515 arm64_za-ptrace_Set_VL_4896 pass
13898 22:17:46.941638 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13899 22:17:46.941733 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13900 22:17:46.941815 arm64_za-ptrace_Set_VL_4912 pass
13901 22:17:46.941897 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13902 22:17:46.941987 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13903 22:17:46.942059 arm64_za-ptrace_Set_VL_4928 pass
13904 22:17:46.942120 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13905 22:17:46.946243 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13906 22:17:46.946531 arm64_za-ptrace_Set_VL_4944 pass
13907 22:17:46.946607 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13908 22:17:46.946681 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13909 22:17:46.946776 arm64_za-ptrace_Set_VL_4960 pass
13910 22:17:46.946864 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13911 22:17:46.946970 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13912 22:17:46.947070 arm64_za-ptrace_Set_VL_4976 pass
13913 22:17:46.947182 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13914 22:17:46.947289 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13915 22:17:46.947378 arm64_za-ptrace_Set_VL_4992 pass
13916 22:17:46.947474 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13917 22:17:46.947567 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13918 22:17:46.947678 arm64_za-ptrace_Set_VL_5008 pass
13919 22:17:46.947938 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13920 22:17:46.948023 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13921 22:17:46.948109 arm64_za-ptrace_Set_VL_5024 pass
13922 22:17:46.948207 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13923 22:17:46.948293 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13924 22:17:46.948378 arm64_za-ptrace_Set_VL_5040 pass
13925 22:17:46.948612 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13926 22:17:46.948711 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13927 22:17:46.948799 arm64_za-ptrace_Set_VL_5056 pass
13928 22:17:46.948895 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13929 22:17:46.948978 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13930 22:17:46.949075 arm64_za-ptrace_Set_VL_5072 pass
13931 22:17:46.949158 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13932 22:17:46.949253 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13933 22:17:46.949333 arm64_za-ptrace_Set_VL_5088 pass
13934 22:17:46.949434 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13935 22:17:46.949525 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13936 22:17:46.949830 arm64_za-ptrace_Set_VL_5104 pass
13937 22:17:46.949930 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13938 22:17:46.950023 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13939 22:17:46.950092 arm64_za-ptrace_Set_VL_5120 pass
13940 22:17:46.954211 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13941 22:17:46.954542 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13942 22:17:46.954635 arm64_za-ptrace_Set_VL_5136 pass
13943 22:17:46.954748 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13944 22:17:46.954846 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13945 22:17:46.954947 arm64_za-ptrace_Set_VL_5152 pass
13946 22:17:46.955027 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13947 22:17:46.955130 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13948 22:17:46.955223 arm64_za-ptrace_Set_VL_5168 pass
13949 22:17:46.955316 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13950 22:17:46.955416 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13951 22:17:46.955516 arm64_za-ptrace_Set_VL_5184 pass
13952 22:17:46.955608 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13953 22:17:46.955920 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13954 22:17:46.956019 arm64_za-ptrace_Set_VL_5200 pass
13955 22:17:46.956122 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13956 22:17:46.956242 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13957 22:17:46.956331 arm64_za-ptrace_Set_VL_5216 pass
13958 22:17:46.956416 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13959 22:17:46.956514 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13960 22:17:46.956605 arm64_za-ptrace_Set_VL_5232 pass
13961 22:17:46.956726 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13962 22:17:46.956818 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13963 22:17:46.956905 arm64_za-ptrace_Set_VL_5248 pass
13964 22:17:46.957004 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13965 22:17:46.957090 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13966 22:17:46.957170 arm64_za-ptrace_Set_VL_5264 pass
13967 22:17:46.957251 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13968 22:17:46.957348 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13969 22:17:46.957472 arm64_za-ptrace_Set_VL_5280 pass
13970 22:17:46.957571 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13971 22:17:46.957665 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13972 22:17:46.957745 arm64_za-ptrace_Set_VL_5296 pass
13973 22:17:46.957855 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13974 22:17:46.957946 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13975 22:17:46.958029 arm64_za-ptrace_Set_VL_5312 pass
13976 22:17:46.958096 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13977 22:17:46.958155 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13978 22:17:46.958213 arm64_za-ptrace_Set_VL_5328 pass
13979 22:17:46.958285 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13980 22:17:46.958346 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13981 22:17:46.962239 arm64_za-ptrace_Set_VL_5344 pass
13982 22:17:46.962654 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13983 22:17:46.962749 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13984 22:17:46.962830 arm64_za-ptrace_Set_VL_5360 pass
13985 22:17:46.962905 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13986 22:17:46.962991 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13987 22:17:46.963074 arm64_za-ptrace_Set_VL_5376 pass
13988 22:17:46.963157 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13989 22:17:46.963259 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13990 22:17:46.963346 arm64_za-ptrace_Set_VL_5392 pass
13991 22:17:46.963427 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13992 22:17:46.963521 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13993 22:17:46.963601 arm64_za-ptrace_Set_VL_5408 pass
13994 22:17:46.963679 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13995 22:17:46.963763 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13996 22:17:46.963841 arm64_za-ptrace_Set_VL_5424 pass
13997 22:17:46.963924 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13998 22:17:46.963998 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13999 22:17:46.964085 arm64_za-ptrace_Set_VL_5440 pass
14000 22:17:46.964175 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
14001 22:17:46.964268 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
14002 22:17:46.964348 arm64_za-ptrace_Set_VL_5456 pass
14003 22:17:46.964444 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
14004 22:17:46.964532 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
14005 22:17:46.964621 arm64_za-ptrace_Set_VL_5472 pass
14006 22:17:46.964719 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
14007 22:17:46.965038 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
14008 22:17:46.965255 arm64_za-ptrace_Set_VL_5488 pass
14009 22:17:46.965425 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
14010 22:17:46.965619 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
14011 22:17:46.965803 arm64_za-ptrace_Set_VL_5504 pass
14012 22:17:46.965969 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
14013 22:17:46.966129 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
14014 22:17:46.966293 arm64_za-ptrace_Set_VL_5520 pass
14015 22:17:46.966489 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
14016 22:17:46.966657 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
14017 22:17:46.966817 arm64_za-ptrace_Set_VL_5536 pass
14018 22:17:46.966978 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
14019 22:17:46.967112 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
14020 22:17:46.970192 arm64_za-ptrace_Set_VL_5552 pass
14021 22:17:46.970491 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
14022 22:17:46.970573 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
14023 22:17:46.970652 arm64_za-ptrace_Set_VL_5568 pass
14024 22:17:46.970731 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
14025 22:17:46.970802 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
14026 22:17:46.970867 arm64_za-ptrace_Set_VL_5584 pass
14027 22:17:46.970943 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
14028 22:17:46.971010 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
14029 22:17:46.971088 arm64_za-ptrace_Set_VL_5600 pass
14030 22:17:46.971154 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
14031 22:17:46.971230 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
14032 22:17:46.971298 arm64_za-ptrace_Set_VL_5616 pass
14033 22:17:46.971364 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
14034 22:17:46.971442 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
14035 22:17:46.971523 arm64_za-ptrace_Set_VL_5632 pass
14036 22:17:46.971601 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
14037 22:17:46.971676 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
14038 22:17:46.971741 arm64_za-ptrace_Set_VL_5648 pass
14039 22:17:46.988873 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
14040 22:17:46.989181 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
14041 22:17:46.989280 arm64_za-ptrace_Set_VL_5664 pass
14042 22:17:46.989365 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
14043 22:17:46.989455 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
14044 22:17:46.989521 arm64_za-ptrace_Set_VL_5680 pass
14045 22:17:46.989586 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
14046 22:17:46.989660 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
14047 22:17:46.989770 arm64_za-ptrace_Set_VL_5696 pass
14048 22:17:46.989850 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
14049 22:17:46.989915 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
14050 22:17:46.990020 arm64_za-ptrace_Set_VL_5712 pass
14051 22:17:46.990095 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
14052 22:17:46.990165 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
14053 22:17:46.990447 arm64_za-ptrace_Set_VL_5728 pass
14054 22:17:46.990553 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
14055 22:17:46.990644 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
14056 22:17:46.990729 arm64_za-ptrace_Set_VL_5744 pass
14057 22:17:46.990829 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
14058 22:17:46.990915 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
14059 22:17:46.991014 arm64_za-ptrace_Set_VL_5760 pass
14060 22:17:46.991100 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
14061 22:17:46.991199 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
14062 22:17:46.991298 arm64_za-ptrace_Set_VL_5776 pass
14063 22:17:46.991396 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
14064 22:17:46.991495 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
14065 22:17:46.991595 arm64_za-ptrace_Set_VL_5792 pass
14066 22:17:46.991879 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
14067 22:17:46.991969 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
14068 22:17:46.992068 arm64_za-ptrace_Set_VL_5808 pass
14069 22:17:46.992153 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
14070 22:17:46.992251 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
14071 22:17:46.992350 arm64_za-ptrace_Set_VL_5824 pass
14072 22:17:46.992630 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
14073 22:17:46.992733 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
14074 22:17:46.992819 arm64_za-ptrace_Set_VL_5840 pass
14075 22:17:46.992903 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
14076 22:17:46.993002 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
14077 22:17:46.993086 arm64_za-ptrace_Set_VL_5856 pass
14078 22:17:46.993185 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
14079 22:17:46.993272 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
14080 22:17:46.993369 arm64_za-ptrace_Set_VL_5872 pass
14081 22:17:46.993651 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
14082 22:17:46.993742 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
14083 22:17:46.993841 arm64_za-ptrace_Set_VL_5888 pass
14084 22:17:46.993927 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
14085 22:17:46.994012 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
14086 22:17:46.994118 arm64_za-ptrace_Set_VL_5904 pass
14087 22:17:46.998243 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
14088 22:17:46.998532 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
14089 22:17:46.998625 arm64_za-ptrace_Set_VL_5920 pass
14090 22:17:46.998710 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
14091 22:17:46.998808 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
14092 22:17:46.998894 arm64_za-ptrace_Set_VL_5936 pass
14093 22:17:46.998979 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
14094 22:17:46.999078 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
14095 22:17:46.999163 arm64_za-ptrace_Set_VL_5952 pass
14096 22:17:46.999262 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
14097 22:17:46.999362 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
14098 22:17:46.999462 arm64_za-ptrace_Set_VL_5968 pass
14099 22:17:46.999737 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
14100 22:17:46.999828 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
14101 22:17:46.999927 arm64_za-ptrace_Set_VL_5984 pass
14102 22:17:47.000012 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
14103 22:17:47.000095 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
14104 22:17:47.000194 arm64_za-ptrace_Set_VL_6000 pass
14105 22:17:47.000279 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
14106 22:17:47.000377 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
14107 22:17:47.000493 arm64_za-ptrace_Set_VL_6016 pass
14108 22:17:47.000592 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
14109 22:17:47.000869 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
14110 22:17:47.001069 arm64_za-ptrace_Set_VL_6032 pass
14111 22:17:47.001291 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
14112 22:17:47.001474 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
14113 22:17:47.001705 arm64_za-ptrace_Set_VL_6048 pass
14114 22:17:47.001898 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
14115 22:17:47.002077 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
14116 22:17:47.002288 arm64_za-ptrace_Set_VL_6064 pass
14117 22:17:47.002428 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
14118 22:17:47.002573 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
14119 22:17:47.002715 arm64_za-ptrace_Set_VL_6080 pass
14120 22:17:47.002856 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
14121 22:17:47.002997 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
14122 22:17:47.003138 arm64_za-ptrace_Set_VL_6096 pass
14123 22:17:47.003279 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
14124 22:17:47.006217 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
14125 22:17:47.006637 arm64_za-ptrace_Set_VL_6112 pass
14126 22:17:47.006810 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
14127 22:17:47.006952 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
14128 22:17:47.007099 arm64_za-ptrace_Set_VL_6128 pass
14129 22:17:47.007496 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
14130 22:17:47.007695 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
14131 22:17:47.007923 arm64_za-ptrace_Set_VL_6144 pass
14132 22:17:47.008146 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
14133 22:17:47.008321 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
14134 22:17:47.008466 arm64_za-ptrace_Set_VL_6160 pass
14135 22:17:47.008582 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
14136 22:17:47.008672 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
14137 22:17:47.008791 arm64_za-ptrace_Set_VL_6176 pass
14138 22:17:47.008896 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
14139 22:17:47.008985 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14140 22:17:47.009137 arm64_za-ptrace_Set_VL_6192 pass
14141 22:17:47.009261 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14142 22:17:47.009401 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14143 22:17:47.009522 arm64_za-ptrace_Set_VL_6208 pass
14144 22:17:47.009617 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14145 22:17:47.009749 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14146 22:17:47.009897 arm64_za-ptrace_Set_VL_6224 pass
14147 22:17:47.010022 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14148 22:17:47.010148 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14149 22:17:47.010244 arm64_za-ptrace_Set_VL_6240 pass
14150 22:17:47.010331 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14151 22:17:47.010418 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14152 22:17:47.010489 arm64_za-ptrace_Set_VL_6256 pass
14153 22:17:47.010548 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14154 22:17:47.010606 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14155 22:17:47.010664 arm64_za-ptrace_Set_VL_6272 pass
14156 22:17:47.010722 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14157 22:17:47.010781 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14158 22:17:47.010839 arm64_za-ptrace_Set_VL_6288 pass
14159 22:17:47.014339 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14160 22:17:47.014637 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14161 22:17:47.014714 arm64_za-ptrace_Set_VL_6304 pass
14162 22:17:47.014779 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14163 22:17:47.014876 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14164 22:17:47.014969 arm64_za-ptrace_Set_VL_6320 pass
14165 22:17:47.015064 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14166 22:17:47.015141 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14167 22:17:47.015217 arm64_za-ptrace_Set_VL_6336 pass
14168 22:17:47.015308 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14169 22:17:47.015383 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14170 22:17:47.015457 arm64_za-ptrace_Set_VL_6352 pass
14171 22:17:47.015544 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14172 22:17:47.015631 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14173 22:17:47.015711 arm64_za-ptrace_Set_VL_6368 pass
14174 22:17:47.015795 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14175 22:17:47.016085 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14176 22:17:47.016194 arm64_za-ptrace_Set_VL_6384 pass
14177 22:17:47.016299 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14178 22:17:47.016390 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14179 22:17:47.016479 arm64_za-ptrace_Set_VL_6400 pass
14180 22:17:47.016581 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14181 22:17:47.016670 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14182 22:17:47.016771 arm64_za-ptrace_Set_VL_6416 pass
14183 22:17:47.016871 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14184 22:17:47.016971 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14185 22:17:47.017070 arm64_za-ptrace_Set_VL_6432 pass
14186 22:17:47.017365 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14187 22:17:47.017484 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14188 22:17:47.017576 arm64_za-ptrace_Set_VL_6448 pass
14189 22:17:47.017685 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14190 22:17:47.017787 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14191 22:17:47.018098 arm64_za-ptrace_Set_VL_6464 pass
14192 22:17:47.018253 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14193 22:17:47.022253 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14194 22:17:47.022446 arm64_za-ptrace_Set_VL_6480 pass
14195 22:17:47.022847 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14196 22:17:47.023043 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14197 22:17:47.023203 arm64_za-ptrace_Set_VL_6496 pass
14198 22:17:47.023354 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14199 22:17:47.023525 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14200 22:17:47.023726 arm64_za-ptrace_Set_VL_6512 pass
14201 22:17:47.023875 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14202 22:17:47.024009 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14203 22:17:47.024147 arm64_za-ptrace_Set_VL_6528 pass
14204 22:17:47.024265 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14205 22:17:47.024393 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14206 22:17:47.024518 arm64_za-ptrace_Set_VL_6544 pass
14207 22:17:47.024638 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14208 22:17:47.024780 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14209 22:17:47.024939 arm64_za-ptrace_Set_VL_6560 pass
14210 22:17:47.025096 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14211 22:17:47.025250 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14212 22:17:47.025407 arm64_za-ptrace_Set_VL_6576 pass
14213 22:17:47.025564 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14214 22:17:47.025763 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14215 22:17:47.025961 arm64_za-ptrace_Set_VL_6592 pass
14216 22:17:47.026143 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14217 22:17:47.026324 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14218 22:17:47.026468 arm64_za-ptrace_Set_VL_6608 pass
14219 22:17:47.026612 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14220 22:17:47.026753 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14221 22:17:47.026933 arm64_za-ptrace_Set_VL_6624 pass
14222 22:17:47.027072 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14223 22:17:47.027215 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14224 22:17:47.027359 arm64_za-ptrace_Set_VL_6640 pass
14225 22:17:47.027504 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14226 22:17:47.027646 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14227 22:17:47.027786 arm64_za-ptrace_Set_VL_6656 pass
14228 22:17:47.027926 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14229 22:17:47.028068 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14230 22:17:47.028207 arm64_za-ptrace_Set_VL_6672 pass
14231 22:17:47.028348 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14232 22:17:47.043051 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14233 22:17:47.043238 arm64_za-ptrace_Set_VL_6688 pass
14234 22:17:47.043464 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14235 22:17:47.043637 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14236 22:17:47.043780 arm64_za-ptrace_Set_VL_6704 pass
14237 22:17:47.043938 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14238 22:17:47.044114 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14239 22:17:47.044281 arm64_za-ptrace_Set_VL_6720 pass
14240 22:17:47.044525 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14241 22:17:47.044705 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14242 22:17:47.044897 arm64_za-ptrace_Set_VL_6736 pass
14243 22:17:47.045079 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14244 22:17:47.045269 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14245 22:17:47.045470 arm64_za-ptrace_Set_VL_6752 pass
14246 22:17:47.045664 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14247 22:17:47.045818 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14248 22:17:47.045985 arm64_za-ptrace_Set_VL_6768 pass
14249 22:17:47.046182 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14250 22:17:47.046359 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14251 22:17:47.046489 arm64_za-ptrace_Set_VL_6784 pass
14252 22:17:47.046609 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14253 22:17:47.046726 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14254 22:17:47.046844 arm64_za-ptrace_Set_VL_6800 pass
14255 22:17:47.046959 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14256 22:17:47.047077 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14257 22:17:47.047194 arm64_za-ptrace_Set_VL_6816 pass
14258 22:17:47.047309 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14259 22:17:47.047425 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14260 22:17:47.047544 arm64_za-ptrace_Set_VL_6832 pass
14261 22:17:47.047666 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14262 22:17:47.047785 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14263 22:17:47.047902 arm64_za-ptrace_Set_VL_6848 pass
14264 22:17:47.048020 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14265 22:17:47.048138 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14266 22:17:47.048257 arm64_za-ptrace_Set_VL_6864 pass
14267 22:17:47.050251 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14268 22:17:47.050696 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14269 22:17:47.050890 arm64_za-ptrace_Set_VL_6880 pass
14270 22:17:47.051085 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14271 22:17:47.051262 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14272 22:17:47.051450 arm64_za-ptrace_Set_VL_6896 pass
14273 22:17:47.051616 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14274 22:17:47.051782 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14275 22:17:47.051958 arm64_za-ptrace_Set_VL_6912 pass
14276 22:17:47.052153 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14277 22:17:47.052345 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14278 22:17:47.052512 arm64_za-ptrace_Set_VL_6928 pass
14279 22:17:47.052660 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14280 22:17:47.052814 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14281 22:17:47.052969 arm64_za-ptrace_Set_VL_6944 pass
14282 22:17:47.053167 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14283 22:17:47.053363 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14284 22:17:47.053547 arm64_za-ptrace_Set_VL_6960 pass
14285 22:17:47.054188 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14286 22:17:47.054359 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14287 22:17:47.054503 arm64_za-ptrace_Set_VL_6976 pass
14288 22:17:47.054646 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14289 22:17:47.054787 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14290 22:17:47.054927 arm64_za-ptrace_Set_VL_6992 pass
14291 22:17:47.055066 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14292 22:17:47.055204 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14293 22:17:47.055387 arm64_za-ptrace_Set_VL_7008 pass
14294 22:17:47.055524 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14295 22:17:47.055667 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14296 22:17:47.055809 arm64_za-ptrace_Set_VL_7024 pass
14297 22:17:47.055950 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14298 22:17:47.056090 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14299 22:17:47.056229 arm64_za-ptrace_Set_VL_7040 pass
14300 22:17:47.056367 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14301 22:17:47.056506 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14302 22:17:47.056644 arm64_za-ptrace_Set_VL_7056 pass
14303 22:17:47.056786 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14304 22:17:47.056924 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14305 22:17:47.058236 arm64_za-ptrace_Set_VL_7072 pass
14306 22:17:47.058698 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14307 22:17:47.058886 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14308 22:17:47.059077 arm64_za-ptrace_Set_VL_7088 pass
14309 22:17:47.059234 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14310 22:17:47.059418 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14311 22:17:47.059584 arm64_za-ptrace_Set_VL_7104 pass
14312 22:17:47.059749 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14313 22:17:47.059911 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14314 22:17:47.060071 arm64_za-ptrace_Set_VL_7120 pass
14315 22:17:47.060225 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14316 22:17:47.060386 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14317 22:17:47.060541 arm64_za-ptrace_Set_VL_7136 pass
14318 22:17:47.060692 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14319 22:17:47.060809 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14320 22:17:47.060928 arm64_za-ptrace_Set_VL_7152 pass
14321 22:17:47.061051 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14322 22:17:47.061161 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14323 22:17:47.061280 arm64_za-ptrace_Set_VL_7168 pass
14324 22:17:47.061398 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14325 22:17:47.061523 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14326 22:17:47.061993 arm64_za-ptrace_Set_VL_7184 pass
14327 22:17:47.062146 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14328 22:17:47.062275 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14329 22:17:47.062374 arm64_za-ptrace_Set_VL_7200 pass
14330 22:17:47.062486 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14331 22:17:47.062580 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14332 22:17:47.062641 arm64_za-ptrace_Set_VL_7216 pass
14333 22:17:47.062700 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14334 22:17:47.062758 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14335 22:17:47.062816 arm64_za-ptrace_Set_VL_7232 pass
14336 22:17:47.062874 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14337 22:17:47.062932 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14338 22:17:47.062990 arm64_za-ptrace_Set_VL_7248 pass
14339 22:17:47.063047 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14340 22:17:47.063104 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14341 22:17:47.063162 arm64_za-ptrace_Set_VL_7264 pass
14342 22:17:47.066293 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14343 22:17:47.066493 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14344 22:17:47.066916 arm64_za-ptrace_Set_VL_7280 pass
14345 22:17:47.067109 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14346 22:17:47.067277 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14347 22:17:47.067468 arm64_za-ptrace_Set_VL_7296 pass
14348 22:17:47.067694 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14349 22:17:47.067949 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14350 22:17:47.068152 arm64_za-ptrace_Set_VL_7312 pass
14351 22:17:47.068343 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14352 22:17:47.068564 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14353 22:17:47.068739 arm64_za-ptrace_Set_VL_7328 pass
14354 22:17:47.068899 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14355 22:17:47.069040 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14356 22:17:47.069188 arm64_za-ptrace_Set_VL_7344 pass
14357 22:17:47.069343 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14358 22:17:47.069497 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14359 22:17:47.069719 arm64_za-ptrace_Set_VL_7360 pass
14360 22:17:47.069904 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14361 22:17:47.070065 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14362 22:17:47.070185 arm64_za-ptrace_Set_VL_7376 pass
14363 22:17:47.070299 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14364 22:17:47.070412 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14365 22:17:47.070524 arm64_za-ptrace_Set_VL_7392 pass
14366 22:17:47.070637 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14367 22:17:47.070749 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14368 22:17:47.070864 arm64_za-ptrace_Set_VL_7408 pass
14369 22:17:47.070976 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14370 22:17:47.071088 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14371 22:17:47.071201 arm64_za-ptrace_Set_VL_7424 pass
14372 22:17:47.071314 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14373 22:17:47.071427 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14374 22:17:47.071539 arm64_za-ptrace_Set_VL_7440 pass
14375 22:17:47.071650 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14376 22:17:47.071791 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14377 22:17:47.071912 arm64_za-ptrace_Set_VL_7456 pass
14378 22:17:47.072028 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14379 22:17:47.072143 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14380 22:17:47.072258 arm64_za-ptrace_Set_VL_7472 pass
14381 22:17:47.074475 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14382 22:17:47.074676 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14383 22:17:47.074885 arm64_za-ptrace_Set_VL_7488 pass
14384 22:17:47.075038 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14385 22:17:47.075245 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14386 22:17:47.075449 arm64_za-ptrace_Set_VL_7504 pass
14387 22:17:47.075645 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14388 22:17:47.075852 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14389 22:17:47.076057 arm64_za-ptrace_Set_VL_7520 pass
14390 22:17:47.076237 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14391 22:17:47.076399 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14392 22:17:47.076558 arm64_za-ptrace_Set_VL_7536 pass
14393 22:17:47.076744 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14394 22:17:47.076973 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14395 22:17:47.077162 arm64_za-ptrace_Set_VL_7552 pass
14396 22:17:47.077315 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14397 22:17:47.077472 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14398 22:17:47.077625 arm64_za-ptrace_Set_VL_7568 pass
14399 22:17:47.077880 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14400 22:17:47.078071 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14401 22:17:47.078254 arm64_za-ptrace_Set_VL_7584 pass
14402 22:17:47.078408 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14403 22:17:47.078549 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14404 22:17:47.078675 arm64_za-ptrace_Set_VL_7600 pass
14405 22:17:47.078780 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14406 22:17:47.078886 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14407 22:17:47.078990 arm64_za-ptrace_Set_VL_7616 pass
14408 22:17:47.079127 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14409 22:17:47.079268 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14410 22:17:47.079367 arm64_za-ptrace_Set_VL_7632 pass
14411 22:17:47.079456 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14412 22:17:47.079544 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14413 22:17:47.079634 arm64_za-ptrace_Set_VL_7648 pass
14414 22:17:47.079719 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14415 22:17:47.079803 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14416 22:17:47.079887 arm64_za-ptrace_Set_VL_7664 pass
14417 22:17:47.079970 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14418 22:17:47.082275 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14419 22:17:47.082384 arm64_za-ptrace_Set_VL_7680 pass
14420 22:17:47.082658 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14421 22:17:47.082739 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14422 22:17:47.082802 arm64_za-ptrace_Set_VL_7696 pass
14423 22:17:47.082862 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14424 22:17:47.103300 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14425 22:17:47.103511 arm64_za-ptrace_Set_VL_7712 pass
14426 22:17:47.103961 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14427 22:17:47.104153 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14428 22:17:47.104350 arm64_za-ptrace_Set_VL_7728 pass
14429 22:17:47.104517 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14430 22:17:47.104676 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14431 22:17:47.104837 arm64_za-ptrace_Set_VL_7744 pass
14432 22:17:47.105030 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14433 22:17:47.105199 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14434 22:17:47.105356 arm64_za-ptrace_Set_VL_7760 pass
14435 22:17:47.105515 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14436 22:17:47.105686 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14437 22:17:47.105865 arm64_za-ptrace_Set_VL_7776 pass
14438 22:17:47.106063 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14439 22:17:47.106212 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14440 22:17:47.106330 arm64_za-ptrace_Set_VL_7792 pass
14441 22:17:47.106445 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14442 22:17:47.106589 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14443 22:17:47.106714 arm64_za-ptrace_Set_VL_7808 pass
14444 22:17:47.106828 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14445 22:17:47.106943 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14446 22:17:47.107058 arm64_za-ptrace_Set_VL_7824 pass
14447 22:17:47.107171 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14448 22:17:47.107283 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14449 22:17:47.107395 arm64_za-ptrace_Set_VL_7840 pass
14450 22:17:47.107508 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14451 22:17:47.107622 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14452 22:17:47.110267 arm64_za-ptrace_Set_VL_7856 pass
14453 22:17:47.110700 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14454 22:17:47.110894 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14455 22:17:47.111060 arm64_za-ptrace_Set_VL_7872 pass
14456 22:17:47.111237 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14457 22:17:47.111414 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14458 22:17:47.111559 arm64_za-ptrace_Set_VL_7888 pass
14459 22:17:47.111714 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14460 22:17:47.111890 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14461 22:17:47.112069 arm64_za-ptrace_Set_VL_7904 pass
14462 22:17:47.112227 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14463 22:17:47.112386 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14464 22:17:47.112578 arm64_za-ptrace_Set_VL_7920 pass
14465 22:17:47.112745 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14466 22:17:47.112898 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14467 22:17:47.113043 arm64_za-ptrace_Set_VL_7936 pass
14468 22:17:47.113192 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14469 22:17:47.113348 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14470 22:17:47.113506 arm64_za-ptrace_Set_VL_7952 pass
14471 22:17:47.114111 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14472 22:17:47.114317 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14473 22:17:47.114491 arm64_za-ptrace_Set_VL_7968 pass
14474 22:17:47.114655 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14475 22:17:47.114787 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14476 22:17:47.114953 arm64_za-ptrace_Set_VL_7984 pass
14477 22:17:47.115094 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14478 22:17:47.115229 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14479 22:17:47.115366 arm64_za-ptrace_Set_VL_8000 pass
14480 22:17:47.115501 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14481 22:17:47.115637 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14482 22:17:47.115773 arm64_za-ptrace_Set_VL_8016 pass
14483 22:17:47.115913 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14484 22:17:47.116048 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14485 22:17:47.116183 arm64_za-ptrace_Set_VL_8032 pass
14486 22:17:47.116317 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14487 22:17:47.116445 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14488 22:17:47.116575 arm64_za-ptrace_Set_VL_8048 pass
14489 22:17:47.116709 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14490 22:17:47.116843 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14491 22:17:47.118357 arm64_za-ptrace_Set_VL_8064 pass
14492 22:17:47.118697 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14493 22:17:47.118787 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14494 22:17:47.118873 arm64_za-ptrace_Set_VL_8080 pass
14495 22:17:47.118972 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14496 22:17:47.119056 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14497 22:17:47.119154 arm64_za-ptrace_Set_VL_8096 pass
14498 22:17:47.119238 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14499 22:17:47.119335 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14500 22:17:47.119431 arm64_za-ptrace_Set_VL_8112 pass
14501 22:17:47.119528 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14502 22:17:47.119826 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14503 22:17:47.119927 arm64_za-ptrace_Set_VL_8128 pass
14504 22:17:47.120027 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14505 22:17:47.120113 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14506 22:17:47.120394 arm64_za-ptrace_Set_VL_8144 pass
14507 22:17:47.120483 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14508 22:17:47.120568 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14509 22:17:47.120664 arm64_za-ptrace_Set_VL_8160 pass
14510 22:17:47.120748 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14511 22:17:47.120844 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14512 22:17:47.120943 arm64_za-ptrace_Set_VL_8176 pass
14513 22:17:47.121041 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14514 22:17:47.121140 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14515 22:17:47.121238 arm64_za-ptrace_Set_VL_8192 pass
14516 22:17:47.121358 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14517 22:17:47.121459 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14518 22:17:47.121746 arm64_za-ptrace pass
14519 22:17:47.121850 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14520 22:17:47.126229 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14521 22:17:47.126530 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14522 22:17:47.126768 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14523 22:17:47.126987 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14524 22:17:47.127223 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14525 22:17:47.127440 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14526 22:17:47.127644 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14527 22:17:47.127831 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14528 22:17:47.128016 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14529 22:17:47.128273 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14530 22:17:47.128500 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14531 22:17:47.128722 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14532 22:17:47.128947 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14533 22:17:47.129164 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14534 22:17:47.129406 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14535 22:17:47.129622 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14536 22:17:47.130302 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14537 22:17:47.130441 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14538 22:17:47.134223 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14539 22:17:47.134620 arm64_check_buffer_fill fail
14540 22:17:47.134791 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14541 22:17:47.135018 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14542 22:17:47.135182 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14543 22:17:47.135361 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14544 22:17:47.135498 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14545 22:17:47.135701 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14546 22:17:47.135922 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14547 22:17:47.136123 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14548 22:17:47.136345 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14549 22:17:47.136526 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14550 22:17:47.136717 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14551 22:17:47.137159 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14552 22:17:47.137394 arm64_check_child_memory fail
14553 22:17:47.137626 arm64_check_gcr_el1_cswitch fail
14554 22:17:47.137786 arm64_check_ksm_options fail
14555 22:17:47.137918 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14556 22:17:47.138073 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14557 22:17:47.142233 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14558 22:17:47.142663 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14559 22:17:47.142876 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14560 22:17:47.147157 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14561 22:17:47.147527 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14562 22:17:47.147668 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14563 22:17:47.147834 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14564 22:17:47.148071 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14565 22:17:47.148444 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14566 22:17:47.148641 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14567 22:17:47.148849 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14568 22:17:47.149072 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14569 22:17:47.149278 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14570 22:17:47.149470 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14571 22:17:47.149670 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14572 22:17:47.150045 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14573 22:17:47.154242 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14574 22:17:47.154678 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14575 22:17:47.154887 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14576 22:17:47.155075 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14577 22:17:47.155235 arm64_check_mmap_options fail
14578 22:17:47.155431 arm64_check_prctl_check_basic_read pass
14579 22:17:47.155621 arm64_check_prctl_NONE pass
14580 22:17:47.155815 arm64_check_prctl_SYNC pass
14581 22:17:47.156020 arm64_check_prctl_ASYNC pass
14582 22:17:47.156316 arm64_check_prctl_SYNC_ASYNC pass
14583 22:17:47.156514 arm64_check_prctl pass
14584 22:17:47.156686 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14585 22:17:47.156847 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14586 22:17:47.156977 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14587 22:17:47.157097 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14588 22:17:47.157254 arm64_check_tags_inclusion fail
14589 22:17:47.157403 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14590 22:17:47.157556 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14591 22:17:47.157726 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14592 22:17:47.157863 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14593 22:17:47.158037 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14594 22:17:47.158164 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14595 22:17:47.158279 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14596 22:17:47.158392 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14597 22:17:47.162243 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14598 22:17:47.162697 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14599 22:17:47.162888 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14600 22:17:47.163117 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14601 22:17:47.163322 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14602 22:17:47.163543 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14603 22:17:47.163760 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14604 22:17:47.163937 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14605 22:17:47.164135 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14606 22:17:47.164301 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14607 22:17:47.164509 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14608 22:17:47.164708 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14609 22:17:47.164907 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14610 22:17:47.165113 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14611 22:17:47.165359 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14612 22:17:47.165547 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14613 22:17:47.166321 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14614 22:17:47.166461 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14615 22:17:47.166576 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14616 22:17:47.170302 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14617 22:17:47.170766 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14618 22:17:47.170960 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14619 22:17:47.171161 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14620 22:17:47.171366 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14621 22:17:47.171587 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14622 22:17:47.171775 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14623 22:17:47.171956 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14624 22:17:47.172092 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14625 22:17:47.172245 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14626 22:17:47.172431 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14627 22:17:47.172595 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14628 22:17:47.172771 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14629 22:17:47.172992 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14630 22:17:47.173202 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14631 22:17:47.173419 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14632 22:17:47.173815 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14633 22:17:47.174006 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14634 22:17:47.174144 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14635 22:17:47.174293 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14636 22:17:47.178254 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14637 22:17:47.178636 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14638 22:17:47.178826 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14639 22:17:47.178995 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14640 22:17:47.179181 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14641 22:17:47.179332 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14642 22:17:47.179485 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14643 22:17:47.179666 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14644 22:17:47.179877 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14645 22:17:47.180071 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14646 22:17:47.180307 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14647 22:17:47.180524 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14648 22:17:47.180786 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14649 22:17:47.180981 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14650 22:17:47.181152 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14651 22:17:47.195653 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14652 22:17:47.196171 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14653 22:17:47.196358 arm64_check_user_mem pass
14654 22:17:47.196549 arm64_btitest_nohint_func_call_using_br_x0 pass
14655 22:17:47.196697 arm64_btitest_nohint_func_call_using_br_x16 pass
14656 22:17:47.196816 arm64_btitest_nohint_func_call_using_blr pass
14657 22:17:47.196958 arm64_btitest_bti_none_func_call_using_br_x0 pass
14658 22:17:47.197109 arm64_btitest_bti_none_func_call_using_br_x16 pass
14659 22:17:47.197265 arm64_btitest_bti_none_func_call_using_blr pass
14660 22:17:47.197418 arm64_btitest_bti_c_func_call_using_br_x0 pass
14661 22:17:47.197614 arm64_btitest_bti_c_func_call_using_br_x16 pass
14662 22:17:47.197802 arm64_btitest_bti_c_func_call_using_blr pass
14663 22:17:47.197975 arm64_btitest_bti_j_func_call_using_br_x0 pass
14664 22:17:47.198113 arm64_btitest_bti_j_func_call_using_br_x16 pass
14665 22:17:47.198310 arm64_btitest_bti_j_func_call_using_blr pass
14666 22:17:47.198529 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14667 22:17:47.198751 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14668 22:17:47.198943 arm64_btitest_bti_jc_func_call_using_blr pass
14669 22:17:47.199140 arm64_btitest_paciasp_func_call_using_br_x0 pass
14670 22:17:47.199300 arm64_btitest_paciasp_func_call_using_br_x16 pass
14671 22:17:47.199516 arm64_btitest_paciasp_func_call_using_blr pass
14672 22:17:47.199742 arm64_btitest pass
14673 22:17:47.199942 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14674 22:17:47.200151 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14675 22:17:47.200328 arm64_nobtitest_nohint_func_call_using_blr pass
14676 22:17:47.200510 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14677 22:17:47.200683 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14678 22:17:47.200846 arm64_nobtitest_bti_none_func_call_using_blr pass
14679 22:17:47.201023 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14680 22:17:47.201183 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14681 22:17:47.201346 arm64_nobtitest_bti_c_func_call_using_blr pass
14682 22:17:47.201525 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14683 22:17:47.201692 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14684 22:17:47.201847 arm64_nobtitest_bti_j_func_call_using_blr pass
14685 22:17:47.202019 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14686 22:17:47.202170 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14687 22:17:47.202286 arm64_nobtitest_bti_jc_func_call_using_blr pass
14688 22:17:47.202400 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14689 22:17:47.202543 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14690 22:17:47.202666 arm64_nobtitest_paciasp_func_call_using_blr pass
14691 22:17:47.202780 arm64_nobtitest pass
14692 22:17:47.202894 arm64_hwcap_cpuinfo_match_RNG pass
14693 22:17:47.203229 arm64_hwcap_sigill_RNG pass
14694 22:17:47.203356 arm64_hwcap_cpuinfo_match_SME pass
14695 22:17:47.203472 arm64_hwcap_sigill_SME pass
14696 22:17:47.203584 arm64_hwcap_cpuinfo_match_SVE pass
14697 22:17:47.203698 arm64_hwcap_sigill_SVE pass
14698 22:17:47.203812 arm64_hwcap_cpuinfo_match_SVE_2 pass
14699 22:17:47.203928 arm64_hwcap_sigill_SVE_2 pass
14700 22:17:47.204041 arm64_hwcap_cpuinfo_match_SVE_AES pass
14701 22:17:47.204155 arm64_hwcap_sigill_SVE_AES pass
14702 22:17:47.204268 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14703 22:17:47.204381 arm64_hwcap_sigill_SVE2_PMULL pass
14704 22:17:47.204493 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14705 22:17:47.204606 arm64_hwcap_sigill_SVE2_BITPERM pass
14706 22:17:47.204720 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14707 22:17:47.204833 arm64_hwcap_sigill_SVE2_SHA3 pass
14708 22:17:47.204945 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14709 22:17:47.205058 arm64_hwcap_sigill_SVE2_SM4 pass
14710 22:17:47.205171 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14711 22:17:47.205283 arm64_hwcap_sigill_SVE2_I8MM pass
14712 22:17:47.205397 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14713 22:17:47.205510 arm64_hwcap_sigill_SVE2_F32MM pass
14714 22:17:47.205624 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14715 22:17:47.205752 arm64_hwcap_sigill_SVE2_F64MM pass
14716 22:17:47.205864 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14717 22:17:47.206327 arm64_hwcap_sigill_SVE2_BF16 pass
14718 22:17:47.206620 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14719 22:17:47.206797 arm64_hwcap_sigill_SVE2_EBF16 skip
14720 22:17:47.206950 arm64_hwcap pass
14721 22:17:47.207101 arm64_ptrace_read_tpidr_one pass
14722 22:17:47.207284 arm64_ptrace_write_tpidr_one pass
14723 22:17:47.207442 arm64_ptrace_verify_tpidr_one pass
14724 22:17:47.207595 arm64_ptrace_count_tpidrs pass
14725 22:17:47.207747 arm64_ptrace_tpidr2_write pass
14726 22:17:47.207898 arm64_ptrace_tpidr2_read pass
14727 22:17:47.208048 arm64_ptrace_write_tpidr_only pass
14728 22:17:47.208199 arm64_ptrace pass
14729 22:17:47.208345 arm64_syscall-abi_getpid_FPSIMD pass
14730 22:17:47.208482 arm64_syscall-abi_getpid_SVE_VL_256 pass
14731 22:17:47.208666 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14732 22:17:47.208820 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14733 22:17:47.208953 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14734 22:17:47.209090 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14735 22:17:47.209236 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14736 22:17:47.209374 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14737 22:17:47.209524 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14738 22:17:47.209687 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14739 22:17:47.209834 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14740 22:17:47.209985 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14741 22:17:47.210184 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14742 22:17:47.210385 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14743 22:17:47.210515 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14744 22:17:47.210632 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14745 22:17:47.210745 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14746 22:17:47.210860 arm64_syscall-abi_getpid_SVE_VL_240 pass
14747 22:17:47.210973 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14748 22:17:47.211085 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14749 22:17:47.211198 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14750 22:17:47.211312 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14751 22:17:47.211425 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14752 22:17:47.211538 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14753 22:17:47.211651 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14754 22:17:47.211763 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14755 22:17:47.211876 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14756 22:17:47.211988 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14757 22:17:47.214340 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14758 22:17:47.214495 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14759 22:17:47.214824 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14760 22:17:47.214960 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14761 22:17:47.215084 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14762 22:17:47.215205 arm64_syscall-abi_getpid_SVE_VL_224 pass
14763 22:17:47.215323 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14764 22:17:47.215469 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14765 22:17:47.215593 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14766 22:17:47.215708 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14767 22:17:47.215832 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14768 22:17:47.215947 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14769 22:17:47.216067 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14770 22:17:47.216207 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14771 22:17:47.216327 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14772 22:17:47.216457 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14773 22:17:47.216609 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14774 22:17:47.216750 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14775 22:17:47.216883 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14776 22:17:47.217022 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14777 22:17:47.217147 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14778 22:17:47.217311 arm64_syscall-abi_getpid_SVE_VL_208 pass
14779 22:17:47.217450 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14780 22:17:47.217591 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14781 22:17:47.217756 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14782 22:17:47.217914 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14783 22:17:47.218066 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14784 22:17:47.218186 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14785 22:17:47.218299 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14786 22:17:47.218413 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14787 22:17:47.218526 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14788 22:17:47.218667 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14789 22:17:47.218786 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14790 22:17:47.218900 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14791 22:17:47.219014 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14792 22:17:47.219127 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14793 22:17:47.219241 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14794 22:17:47.219561 arm64_syscall-abi_getpid_SVE_VL_192 pass
14795 22:17:47.219683 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14796 22:17:47.226184 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14797 22:17:47.226578 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14798 22:17:47.226728 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14799 22:17:47.226868 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14800 22:17:47.227034 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14801 22:17:47.227201 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14802 22:17:47.227363 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14803 22:17:47.227528 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14804 22:17:47.227700 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14805 22:17:47.227899 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14806 22:17:47.228113 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14807 22:17:47.228371 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14808 22:17:47.228577 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14809 22:17:47.228712 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14810 22:17:47.228830 arm64_syscall-abi_getpid_SVE_VL_176 pass
14811 22:17:47.228953 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14812 22:17:47.229110 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14813 22:17:47.229229 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14814 22:17:47.229344 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14815 22:17:47.229458 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14816 22:17:47.229570 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14817 22:17:47.229725 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14818 22:17:47.229856 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14819 22:17:47.229975 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14820 22:17:47.230088 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14821 22:17:47.241237 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14822 22:17:47.241427 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14823 22:17:47.241530 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14824 22:17:47.241616 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14825 22:17:47.241708 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14826 22:17:47.241809 arm64_syscall-abi_getpid_SVE_VL_160 pass
14827 22:17:47.241892 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14828 22:17:47.242190 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14829 22:17:47.242478 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14830 22:17:47.242569 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14831 22:17:47.242669 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14832 22:17:47.242754 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14833 22:17:47.243037 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14834 22:17:47.243127 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14835 22:17:47.243223 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14836 22:17:47.243324 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14837 22:17:47.243422 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14838 22:17:47.243703 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14839 22:17:47.243790 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14840 22:17:47.244070 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14841 22:17:47.244158 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14842 22:17:47.244255 arm64_syscall-abi_getpid_SVE_VL_144 pass
14843 22:17:47.244354 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14844 22:17:47.244458 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14845 22:17:47.244741 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14846 22:17:47.244830 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14847 22:17:47.244927 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14848 22:17:47.245032 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14849 22:17:47.245315 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14850 22:17:47.245405 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14851 22:17:47.245503 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14852 22:17:47.245600 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14853 22:17:47.245891 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14854 22:17:47.245983 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14855 22:17:47.246084 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14856 22:17:47.250180 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14857 22:17:47.250470 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14858 22:17:47.250561 arm64_syscall-abi_getpid_SVE_VL_128 pass
14859 22:17:47.250660 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14860 22:17:47.250943 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14861 22:17:47.251033 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14862 22:17:47.251131 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14863 22:17:47.251218 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14864 22:17:47.251315 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14865 22:17:47.251598 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14866 22:17:47.251701 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14867 22:17:47.251788 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14868 22:17:47.251885 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14869 22:17:47.251989 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14870 22:17:47.252272 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14871 22:17:47.252360 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14872 22:17:47.252458 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14873 22:17:47.252740 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14874 22:17:47.252830 arm64_syscall-abi_getpid_SVE_VL_112 pass
14875 22:17:47.252913 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14876 22:17:47.253017 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14877 22:17:47.253113 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14878 22:17:47.253395 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14879 22:17:47.253485 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14880 22:17:47.253583 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14881 22:17:47.253692 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14882 22:17:47.253801 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14883 22:17:47.254090 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14884 22:17:47.258211 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14885 22:17:47.258498 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14886 22:17:47.258590 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14887 22:17:47.258688 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14888 22:17:47.258774 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14889 22:17:47.258872 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14890 22:17:47.258974 arm64_syscall-abi_getpid_SVE_VL_96 pass
14891 22:17:47.259272 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14892 22:17:47.259375 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14893 22:17:47.259479 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14894 22:17:47.259581 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14895 22:17:47.259870 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14896 22:17:47.259985 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14897 22:17:47.260087 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14898 22:17:47.260392 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14899 22:17:47.260494 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14900 22:17:47.260594 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14901 22:17:47.260678 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14902 22:17:47.260775 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14903 22:17:47.261077 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14904 22:17:47.261194 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14905 22:17:47.261296 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14906 22:17:47.261401 arm64_syscall-abi_getpid_SVE_VL_80 pass
14907 22:17:47.261752 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14908 22:17:47.261918 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14909 22:17:47.262073 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14910 22:17:47.262196 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14911 22:17:47.266228 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14912 22:17:47.266611 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14913 22:17:47.266741 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14914 22:17:47.266845 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14915 22:17:47.266946 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14916 22:17:47.267052 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14917 22:17:47.267135 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14918 22:17:47.267216 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14919 22:17:47.267312 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14920 22:17:47.267431 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14921 22:17:47.267526 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14922 22:17:47.267619 arm64_syscall-abi_getpid_SVE_VL_64 pass
14923 22:17:47.267723 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14924 22:17:47.267843 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14925 22:17:47.267951 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14926 22:17:47.268086 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14927 22:17:47.268201 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14928 22:17:47.268517 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14929 22:17:47.268693 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14930 22:17:47.268863 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14931 22:17:47.269051 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14932 22:17:47.269217 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14933 22:17:47.269427 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14934 22:17:47.269633 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14935 22:17:47.269867 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14936 22:17:47.270028 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14937 22:17:47.270195 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14938 22:17:47.270323 arm64_syscall-abi_getpid_SVE_VL_48 pass
14939 22:17:47.270438 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14940 22:17:47.270552 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14941 22:17:47.270665 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14942 22:17:47.270804 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14943 22:17:47.274252 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14944 22:17:47.274661 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14945 22:17:47.274787 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14946 22:17:47.274897 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14947 22:17:47.275027 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14948 22:17:47.275157 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14949 22:17:47.275281 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14950 22:17:47.275428 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14951 22:17:47.275550 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14952 22:17:47.275673 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14953 22:17:47.275787 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14954 22:17:47.275959 arm64_syscall-abi_getpid_SVE_VL_32 pass
14955 22:17:47.276092 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14956 22:17:47.276238 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14957 22:17:47.276359 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14958 22:17:47.276548 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14959 22:17:47.276708 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14960 22:17:47.276859 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14961 22:17:47.277005 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14962 22:17:47.277150 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14963 22:17:47.277343 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14964 22:17:47.277501 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14965 22:17:47.277644 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14966 22:17:47.277840 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14967 22:17:47.277974 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14968 22:17:47.278064 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14969 22:17:47.278157 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14970 22:17:47.278229 arm64_syscall-abi_getpid_SVE_VL_16 pass
14971 22:17:47.278303 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14972 22:17:47.278377 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14973 22:17:47.288256 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14974 22:17:47.288564 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14975 22:17:47.288670 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14976 22:17:47.288772 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14977 22:17:47.288872 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14978 22:17:47.288970 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14979 22:17:47.289266 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14980 22:17:47.289383 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14981 22:17:47.289484 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14982 22:17:47.289677 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14983 22:17:47.289952 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14984 22:17:47.290057 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14985 22:17:47.290143 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14986 22:17:47.290268 arm64_syscall-abi_sched_yield_FPSIMD pass
14987 22:17:47.290368 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14988 22:17:47.290788 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14989 22:17:47.290991 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14990 22:17:47.291232 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14991 22:17:47.291425 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14992 22:17:47.291605 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14993 22:17:47.291792 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14994 22:17:47.291951 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14995 22:17:47.292135 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14996 22:17:47.292304 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14997 22:17:47.292489 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14998 22:17:47.292655 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14999 22:17:47.292827 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
15000 22:17:47.293000 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
15001 22:17:47.293163 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
15002 22:17:47.293296 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
15003 22:17:47.293419 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
15004 22:17:47.293541 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
15005 22:17:47.293674 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
15006 22:17:47.293855 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
15007 22:17:47.294016 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
15008 22:17:47.294167 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
15009 22:17:47.294284 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
15010 22:17:47.294397 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
15011 22:17:47.294532 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
15012 22:17:47.294649 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
15013 22:17:47.298218 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
15014 22:17:47.298559 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
15015 22:17:47.298682 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
15016 22:17:47.298817 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
15017 22:17:47.298934 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
15018 22:17:47.299060 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
15019 22:17:47.299159 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
15020 22:17:47.299269 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
15021 22:17:47.299605 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
15022 22:17:47.299805 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
15023 22:17:47.300004 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
15024 22:17:47.300179 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
15025 22:17:47.300370 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
15026 22:17:47.300546 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
15027 22:17:47.300743 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
15028 22:17:47.300912 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
15029 22:17:47.301075 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
15030 22:17:47.301234 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
15031 22:17:47.301387 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
15032 22:17:47.301586 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
15033 22:17:47.301811 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
15034 22:17:47.301987 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
15035 22:17:47.302155 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
15036 22:17:47.302277 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
15037 22:17:47.302392 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
15038 22:17:47.302505 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
15039 22:17:47.302646 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
15040 22:17:47.302768 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
15041 22:17:47.302884 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
15042 22:17:47.306229 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
15043 22:17:47.306640 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
15044 22:17:47.306744 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
15045 22:17:47.306832 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
15046 22:17:47.306930 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
15047 22:17:47.307016 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
15048 22:17:47.307111 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
15049 22:17:47.307209 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
15050 22:17:47.307501 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
15051 22:17:47.307617 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
15052 22:17:47.307717 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
15053 22:17:47.308000 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
15054 22:17:47.308094 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
15055 22:17:47.308191 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
15056 22:17:47.308486 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
15057 22:17:47.308588 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
15058 22:17:47.308685 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
15059 22:17:47.308978 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
15060 22:17:47.309082 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
15061 22:17:47.309179 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
15062 22:17:47.309278 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
15063 22:17:47.309570 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
15064 22:17:47.309686 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
15065 22:17:47.310003 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
15066 22:17:47.310115 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
15067 22:17:47.314233 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
15068 22:17:47.314540 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
15069 22:17:47.314643 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
15070 22:17:47.314743 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
15071 22:17:47.314843 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
15072 22:17:47.315142 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
15073 22:17:47.315245 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
15074 22:17:47.315543 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
15075 22:17:47.315643 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
15076 22:17:47.315744 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
15077 22:17:47.315843 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
15078 22:17:47.316176 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
15079 22:17:47.316371 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
15080 22:17:47.316560 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
15081 22:17:47.316722 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
15082 22:17:47.316965 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
15083 22:17:47.317153 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
15084 22:17:47.317318 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
15085 22:17:47.317501 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
15086 22:17:47.317668 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
15087 22:17:47.317836 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
15088 22:17:47.318027 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
15089 22:17:47.318214 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
15090 22:17:47.318351 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
15091 22:17:47.318467 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
15092 22:17:47.322209 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
15093 22:17:47.322585 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
15094 22:17:47.322759 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
15095 22:17:47.322942 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
15096 22:17:47.323150 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
15097 22:17:47.323318 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
15098 22:17:47.323477 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
15099 22:17:47.323631 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
15100 22:17:47.323814 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
15101 22:17:47.323969 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
15102 22:17:47.324125 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
15103 22:17:47.324279 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
15104 22:17:47.324436 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
15105 22:17:47.324623 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
15106 22:17:47.324780 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
15107 22:17:47.324903 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
15108 22:17:47.325016 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
15109 22:17:47.325154 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
15110 22:17:47.325277 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
15111 22:17:47.325416 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
15112 22:17:47.325536 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
15113 22:17:47.335426 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
15114 22:17:47.335802 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
15115 22:17:47.335906 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
15116 22:17:47.335990 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
15117 22:17:47.336087 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
15118 22:17:47.336186 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
15119 22:17:47.336284 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
15120 22:17:47.336574 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
15121 22:17:47.336676 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
15122 22:17:47.337007 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
15123 22:17:47.337192 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
15124 22:17:47.337382 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
15125 22:17:47.337596 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
15126 22:17:47.337836 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
15127 22:17:47.338158 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
15128 22:17:47.338327 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
15129 22:17:47.338469 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
15130 22:17:47.338641 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
15131 22:17:47.338770 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
15132 22:17:47.342321 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
15133 22:17:47.342633 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
15134 22:17:47.342753 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
15135 22:17:47.343127 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
15136 22:17:47.343390 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
15137 22:17:47.343607 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
15138 22:17:47.343797 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
15139 22:17:47.344040 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15140 22:17:47.344287 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15141 22:17:47.344530 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15142 22:17:47.344736 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15143 22:17:47.344949 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15144 22:17:47.345197 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15145 22:17:47.345479 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15146 22:17:47.345691 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15147 22:17:47.345939 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15148 22:17:47.346214 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15149 22:17:47.346407 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15150 22:17:47.350244 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15151 22:17:47.350684 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15152 22:17:47.350908 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15153 22:17:47.351082 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15154 22:17:47.351234 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15155 22:17:47.351394 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15156 22:17:47.351548 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15157 22:17:47.351689 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15158 22:17:47.351825 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15159 22:17:47.351980 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15160 22:17:47.352102 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15161 22:17:47.352216 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15162 22:17:47.352332 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15163 22:17:47.352464 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15164 22:17:47.352619 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15165 22:17:47.352807 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15166 22:17:47.352968 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15167 22:17:47.353123 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15168 22:17:47.353277 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15169 22:17:47.353408 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15170 22:17:47.353555 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15171 22:17:47.354263 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15172 22:17:47.354421 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15173 22:17:47.354565 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15174 22:17:47.354707 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15175 22:17:47.354849 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15176 22:17:47.354987 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15177 22:17:47.355127 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15178 22:17:47.355267 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15179 22:17:47.355406 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15180 22:17:47.355546 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15181 22:17:47.358209 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15182 22:17:47.358512 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15183 22:17:47.358613 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15184 22:17:47.358714 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15185 22:17:47.358815 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15186 22:17:47.359106 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15187 22:17:47.359228 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15188 22:17:47.359327 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15189 22:17:47.359664 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15190 22:17:47.359854 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15191 22:17:47.360089 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15192 22:17:47.360237 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15193 22:17:47.360380 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15194 22:17:47.360554 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15195 22:17:47.360687 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15196 22:17:47.360828 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15197 22:17:47.360968 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15198 22:17:47.361108 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15199 22:17:47.361284 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15200 22:17:47.361418 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15201 22:17:47.361559 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15202 22:17:47.361744 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15203 22:17:47.361904 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15204 22:17:47.362071 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15205 22:17:47.362240 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15206 22:17:47.362419 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15207 22:17:47.362556 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15208 22:17:47.362697 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15209 22:17:47.362837 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15210 22:17:47.362975 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15211 22:17:47.363114 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15212 22:17:47.366494 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15213 22:17:47.366716 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15214 22:17:47.366886 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15215 22:17:47.367093 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15216 22:17:47.367301 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15217 22:17:47.367466 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15218 22:17:47.367618 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15219 22:17:47.367780 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15220 22:17:47.367901 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15221 22:17:47.368016 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15222 22:17:47.368132 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15223 22:17:47.368293 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15224 22:17:47.368452 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15225 22:17:47.368600 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15226 22:17:47.368844 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15227 22:17:47.369029 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15228 22:17:47.369200 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15229 22:17:47.369342 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15230 22:17:47.369494 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15231 22:17:47.369697 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15232 22:17:47.369846 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15233 22:17:47.369982 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15234 22:17:47.370109 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15235 22:17:47.370223 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15236 22:17:47.370334 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15237 22:17:47.370472 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15238 22:17:47.370589 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15239 22:17:47.370702 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15240 22:17:47.374231 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15241 22:17:47.374652 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15242 22:17:47.374839 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15243 22:17:47.374968 arm64_syscall-abi pass
15244 22:17:47.375084 arm64_tpidr2_default_value pass
15245 22:17:47.375222 arm64_tpidr2_write_read pass
15246 22:17:47.375339 arm64_tpidr2_write_sleep_read pass
15247 22:17:47.375454 arm64_tpidr2_write_fork_read pass
15248 22:17:47.375569 arm64_tpidr2_write_clone_read pass
15249 22:17:47.375683 arm64_tpidr2 pass
15250 22:17:47.386527 + ../../utils/send-to-lava.sh ./output/result.txt
15251 22:17:47.429803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15253 22:17:47.430459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15254 22:17:47.460011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15256 22:17:47.460626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15257 22:17:47.491233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15259 22:17:47.491831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15260 22:17:47.521720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15262 22:17:47.522303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15263 22:17:47.552224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15265 22:17:47.552831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15266 22:17:47.583233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15267 22:17:47.583671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15269 22:17:47.613785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15271 22:17:47.614385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15272 22:17:47.644354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15273 22:17:47.644792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15275 22:17:47.675042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15276 22:17:47.675478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15278 22:17:47.705550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15280 22:17:47.706167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15281 22:17:47.736926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15283 22:17:47.737520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15284 22:17:47.767527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15285 22:17:47.767976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15287 22:17:47.797685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15288 22:17:47.798132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15290 22:17:47.828464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15291 22:17:47.828925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15293 22:17:47.859333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15294 22:17:47.859787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15296 22:17:47.889762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15297 22:17:47.890213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15299 22:17:47.920117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15300 22:17:47.920576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15302 22:17:47.950543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15304 22:17:47.951153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15305 22:17:47.980913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15306 22:17:47.981381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15308 22:17:48.010891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15309 22:17:48.011347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15311 22:17:48.040457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15312 22:17:48.040925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15314 22:17:48.070157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15315 22:17:48.070629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15317 22:17:48.099974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15318 22:17:48.100427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15320 22:17:48.129448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15321 22:17:48.129912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15323 22:17:48.159123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15324 22:17:48.159574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15326 22:17:48.188553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15327 22:17:48.188980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15329 22:17:48.218795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15330 22:17:48.219235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15332 22:17:48.248645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15333 22:17:48.249100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15335 22:17:48.278785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15336 22:17:48.279223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15338 22:17:48.308896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15339 22:17:48.309334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15341 22:17:48.340190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15342 22:17:48.340659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15344 22:17:48.369753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15345 22:17:48.370197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15347 22:17:48.400679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15348 22:17:48.401097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15350 22:17:48.431015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15352 22:17:48.431600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15353 22:17:48.461512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15354 22:17:48.461971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15356 22:17:48.491281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15357 22:17:48.491720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15359 22:17:48.521337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15360 22:17:48.521794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15362 22:17:48.552425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15363 22:17:48.552882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15365 22:17:48.582114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15366 22:17:48.582574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15368 22:17:48.612451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15369 22:17:48.612895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15371 22:17:48.643463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15373 22:17:48.643923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15374 22:17:48.674764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15375 22:17:48.675196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15377 22:17:48.705630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15378 22:17:48.706053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15380 22:17:48.736243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15381 22:17:48.736655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15383 22:17:48.767539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15384 22:17:48.767970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15386 22:17:48.797629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15387 22:17:48.798052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15389 22:17:48.827776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15390 22:17:48.828211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15392 22:17:48.857641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15393 22:17:48.858115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15395 22:17:48.887277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15396 22:17:48.887721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15398 22:17:48.916910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15400 22:17:48.917433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15401 22:17:48.947402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15403 22:17:48.947911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15404 22:17:48.977124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15405 22:17:48.977578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15407 22:17:49.008247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15408 22:17:49.008714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15410 22:17:49.039097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15411 22:17:49.039585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15413 22:17:49.069406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15414 22:17:49.069878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15416 22:17:49.099673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15418 22:17:49.100211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15419 22:17:49.129986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15421 22:17:49.130428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15422 22:17:49.160316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15424 22:17:49.160751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15425 22:17:49.191143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15426 22:17:49.191606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15428 22:17:49.221080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15430 22:17:49.221637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15431 22:17:49.250716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15432 22:17:49.251063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15434 22:17:49.281044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15436 22:17:49.281448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15437 22:17:49.311142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15439 22:17:49.311545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15440 22:17:49.341464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15442 22:17:49.342007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15443 22:17:49.371650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15445 22:17:49.372196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15446 22:17:49.401307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15447 22:17:49.401669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15449 22:17:49.431736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15450 22:17:49.432072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15452 22:17:49.461756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15453 22:17:49.462092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15455 22:17:49.491429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15456 22:17:49.491765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15458 22:17:49.520900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15459 22:17:49.521230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15461 22:17:49.551252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15462 22:17:49.551583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15464 22:17:49.581504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15466 22:17:49.581907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15467 22:17:49.611944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15468 22:17:49.612284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15470 22:17:49.641943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15471 22:17:49.642282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15473 22:17:49.672392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15474 22:17:49.672763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15476 22:17:49.702978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15477 22:17:49.703316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15479 22:17:49.732900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15480 22:17:49.733268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15482 22:17:49.762985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15483 22:17:49.763341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15485 22:17:49.792754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15486 22:17:49.793105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15488 22:17:49.822713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15489 22:17:49.823065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15491 22:17:49.852079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15492 22:17:49.852437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15494 22:17:49.881724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15495 22:17:49.882080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15497 22:17:49.911909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15498 22:17:49.912264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15500 22:17:49.941639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15501 22:17:49.942003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15503 22:17:49.971343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15504 22:17:49.971697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15506 22:17:50.001065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15507 22:17:50.001428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15509 22:17:50.031154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15510 22:17:50.031507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15512 22:17:50.060792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15513 22:17:50.061254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15515 22:17:50.091013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15517 22:17:50.091528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15518 22:17:50.120946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15519 22:17:50.121274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15521 22:17:50.151574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15522 22:17:50.151910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15524 22:17:50.181448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15526 22:17:50.181965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15527 22:17:50.211160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15528 22:17:50.211530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15530 22:17:50.241189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15531 22:17:50.241559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15533 22:17:50.271308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15535 22:17:50.271815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15536 22:17:50.300678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15537 22:17:50.301041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15539 22:17:50.330809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15540 22:17:50.331186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15542 22:17:50.360255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15543 22:17:50.360615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15545 22:17:50.390727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15546 22:17:50.391092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15548 22:17:50.420326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15549 22:17:50.420690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15551 22:17:50.449680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15552 22:17:50.450046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15554 22:17:50.479327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15555 22:17:50.479689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15557 22:17:50.509294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15558 22:17:50.509667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15560 22:17:50.539423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15561 22:17:50.539789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15563 22:17:50.568762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15564 22:17:50.569125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15566 22:17:50.598621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15567 22:17:50.598987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15569 22:17:50.629113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15570 22:17:50.629479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15572 22:17:50.658805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15573 22:17:50.659169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15575 22:17:50.688086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15576 22:17:50.688453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15578 22:17:50.717523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15579 22:17:50.717896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15581 22:17:50.747995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15582 22:17:50.748357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15584 22:17:50.778079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15586 22:17:50.778598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15587 22:17:50.808466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15588 22:17:50.808987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15590 22:17:50.839321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15592 22:17:50.839953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15593 22:17:50.870459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15595 22:17:50.870948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15596 22:17:50.900879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15597 22:17:50.901244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15599 22:17:50.931445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15600 22:17:50.931791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15602 22:17:50.961568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15603 22:17:50.962044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15605 22:17:50.991776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15606 22:17:50.992143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15608 22:17:51.021574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15609 22:17:51.021943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15611 22:17:51.051488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15613 22:17:51.051998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15614 22:17:51.081367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15615 22:17:51.081694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15617 22:17:51.111699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15619 22:17:51.112176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15620 22:17:51.141690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15622 22:17:51.142172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15623 22:17:51.171461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15624 22:17:51.171819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15626 22:17:51.201357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15627 22:17:51.201694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15629 22:17:51.231713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15630 22:17:51.232059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15632 22:17:51.263290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15634 22:17:51.263733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15635 22:17:51.293069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15636 22:17:51.293415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15638 22:17:51.323704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15640 22:17:51.324247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15641 22:17:51.354954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15642 22:17:51.355347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15644 22:17:51.384333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15645 22:17:51.384655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15647 22:17:51.414063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15648 22:17:51.414436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15650 22:17:51.444512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15652 22:17:51.444932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15653 22:17:51.474776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15654 22:17:51.475123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15656 22:17:51.504953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15658 22:17:51.505431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15659 22:17:51.536796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15661 22:17:51.537136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15662 22:17:51.568318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15663 22:17:51.568605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15665 22:17:51.599876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15666 22:17:51.600228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15668 22:17:51.629836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15669 22:17:51.630213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15671 22:17:51.659545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15673 22:17:51.659958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15674 22:17:51.689105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15675 22:17:51.689471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15677 22:17:51.719566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15679 22:17:51.720159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15680 22:17:51.749291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15681 22:17:51.749689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15683 22:17:51.779543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15685 22:17:51.780169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15686 22:17:51.809702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15687 22:17:51.810132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15689 22:17:51.840402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15690 22:17:51.840839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15692 22:17:51.870446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15694 22:17:51.870962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15695 22:17:51.900448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15697 22:17:51.900964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15698 22:17:51.930902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15699 22:17:51.931350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15701 22:17:51.961015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15702 22:17:51.961444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15704 22:17:51.994971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15705 22:17:51.995454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15707 22:17:52.036058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15709 22:17:52.036799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15710 22:17:52.080527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15712 22:17:52.081116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15713 22:17:52.113570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15715 22:17:52.114240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15716 22:17:52.146447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15718 22:17:52.147119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15719 22:17:52.177723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15721 22:17:52.178339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15722 22:17:52.209015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15724 22:17:52.209640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15725 22:17:52.239692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15727 22:17:52.240312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15728 22:17:52.273704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15729 22:17:52.274167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15731 22:17:52.304706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15733 22:17:52.305257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15734 22:17:52.335540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15736 22:17:52.336078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15737 22:17:52.367278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15738 22:17:52.367705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15740 22:17:52.397292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15741 22:17:52.397776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15743 22:17:52.427601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15744 22:17:52.427959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15746 22:17:52.458028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15747 22:17:52.458389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15749 22:17:52.489208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15750 22:17:52.489567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15752 22:17:52.519401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15753 22:17:52.519738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15755 22:17:52.550036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15757 22:17:52.550557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15758 22:17:52.580543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15759 22:17:52.580892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15761 22:17:52.611729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15762 22:17:52.612156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15764 22:17:52.641878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15765 22:17:52.642324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15767 22:17:52.672522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15768 22:17:52.672939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15770 22:17:52.702879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15771 22:17:52.703217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15773 22:17:52.733064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15774 22:17:52.733378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15776 22:17:52.763129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15778 22:17:52.763507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15779 22:17:52.793183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15780 22:17:52.793516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15782 22:17:52.823337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15783 22:17:52.823678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15785 22:17:52.854036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15786 22:17:52.854404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15788 22:17:52.884317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15789 22:17:52.884657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15791 22:17:52.914130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15792 22:17:52.914604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15794 22:17:52.944865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15795 22:17:52.945333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15797 22:17:52.975566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15799 22:17:52.976171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15800 22:17:53.005516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15802 22:17:53.006124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15803 22:17:53.035885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15804 22:17:53.036276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15806 22:17:53.065830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15807 22:17:53.066187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15809 22:17:53.096452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15811 22:17:53.096887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15812 22:17:53.126461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15814 22:17:53.126898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15815 22:17:53.156084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15816 22:17:53.156437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15818 22:17:53.185875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15820 22:17:53.186313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15821 22:17:53.215902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15822 22:17:53.216378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15824 22:17:53.246260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15825 22:17:53.246726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15827 22:17:53.276283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15828 22:17:53.276742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15830 22:17:53.305839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15831 22:17:53.306279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15833 22:17:53.336536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15834 22:17:53.336992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15836 22:17:53.366531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15838 22:17:53.367125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15839 22:17:53.396398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15840 22:17:53.396835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15842 22:17:53.426151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15843 22:17:53.426590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15845 22:17:53.456462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15846 22:17:53.457016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15848 22:17:53.489809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15849 22:17:53.490298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15851 22:17:53.527455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15852 22:17:53.527861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15854 22:17:53.565792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15855 22:17:53.566348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15857 22:17:53.604039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15859 22:17:53.604502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15860 22:17:53.637241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15862 22:17:53.637896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15863 22:17:53.675646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15864 22:17:53.676131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15866 22:17:53.708362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15868 22:17:53.708846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15869 22:17:53.740025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15871 22:17:53.740698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15872 22:17:53.772887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15874 22:17:53.773343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15875 22:17:53.806852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15876 22:17:53.807270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15878 22:17:53.844715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15879 22:17:53.845128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15881 22:17:53.880081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15883 22:17:53.880540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15884 22:17:53.914439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15886 22:17:53.914891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15887 22:17:53.948520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15888 22:17:53.948957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15890 22:17:53.981462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15891 22:17:53.981884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15893 22:17:54.014456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15895 22:17:54.014924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15896 22:17:54.048180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15898 22:17:54.048629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15899 22:17:54.087419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15900 22:17:54.087901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15902 22:17:54.123243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15904 22:17:54.123790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15905 22:17:54.154937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15906 22:17:54.155419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15908 22:17:54.185014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15909 22:17:54.185513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15911 22:17:54.216041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15913 22:17:54.216590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15914 22:17:54.247931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15915 22:17:54.248378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15917 22:17:54.279743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15919 22:17:54.280282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15920 22:17:54.312352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15922 22:17:54.313000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15923 22:17:54.344886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15924 22:17:54.345366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15926 22:17:54.376009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15927 22:17:54.376469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15929 22:17:54.407646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15930 22:17:54.408099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15932 22:17:54.437991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15933 22:17:54.438431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15935 22:17:54.468885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15936 22:17:54.469348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15938 22:17:54.506666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15940 22:17:54.507215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15941 22:17:54.539087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15942 22:17:54.539572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15944 22:17:54.570126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15946 22:17:54.570691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15947 22:17:54.600443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15949 22:17:54.600950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15950 22:17:54.630457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15952 22:17:54.630972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15953 22:17:54.663105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15955 22:17:54.663569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15956 22:17:54.693017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15957 22:17:54.693493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15959 22:17:54.723667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15961 22:17:54.724209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15962 22:17:54.754872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15963 22:17:54.755236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15965 22:17:54.785070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15966 22:17:54.785457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15968 22:17:54.816173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15970 22:17:54.816618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15971 22:17:54.846943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15972 22:17:54.847293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15974 22:17:54.877239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15975 22:17:54.877590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15977 22:17:54.907791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15978 22:17:54.908138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15980 22:17:54.937790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15981 22:17:54.938133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15983 22:17:54.968268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15984 22:17:54.968607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15986 22:17:54.998974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15987 22:17:54.999313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15989 22:17:55.029318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15990 22:17:55.029673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15992 22:17:55.059417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15993 22:17:55.059749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15995 22:17:55.089528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15996 22:17:55.089899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15998 22:17:55.119821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
16000 22:17:55.120299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
16001 22:17:55.151221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
16003 22:17:55.151697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
16004 22:17:55.181694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
16005 22:17:55.182052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
16007 22:17:55.212049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
16008 22:17:55.212406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
16010 22:17:55.244391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
16011 22:17:55.244753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
16013 22:17:55.274823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
16014 22:17:55.275174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
16016 22:17:55.304912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
16017 22:17:55.305378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
16019 22:17:55.335422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
16020 22:17:55.335820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
16022 22:17:55.365673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
16024 22:17:55.366157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
16025 22:17:55.396590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
16026 22:17:55.396949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
16028 22:17:55.426348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
16029 22:17:55.426704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
16031 22:17:55.456278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
16032 22:17:55.456633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
16034 22:17:55.485879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
16035 22:17:55.486247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
16037 22:17:55.515953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
16038 22:17:55.516307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
16040 22:17:55.545469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
16041 22:17:55.545832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
16043 22:17:55.575873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
16044 22:17:55.576354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
16046 22:17:55.606904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
16048 22:17:55.607475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
16049 22:17:55.638243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
16050 22:17:55.638715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
16052 22:17:55.668726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
16053 22:17:55.669166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
16055 22:17:55.699511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
16056 22:17:55.699952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
16058 22:17:55.730567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
16060 22:17:55.731093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
16061 22:17:55.761913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
16062 22:17:55.762383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
16064 22:17:55.792953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
16066 22:17:55.793512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
16067 22:17:55.823914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
16068 22:17:55.824367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
16070 22:17:55.855120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
16072 22:17:55.855642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
16073 22:17:55.886499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
16075 22:17:55.887185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
16076 22:17:55.916967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
16077 22:17:55.917372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
16079 22:17:55.947414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
16080 22:17:55.947850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
16082 22:17:55.978166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
16083 22:17:55.978552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
16085 22:17:56.009048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
16086 22:17:56.009485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
16088 22:17:56.039970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
16089 22:17:56.040408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
16091 22:17:56.077416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
16092 22:17:56.077923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
16094 22:17:56.111074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
16095 22:17:56.111537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
16097 22:17:56.143550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
16099 22:17:56.144117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
16100 22:17:56.173825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
16101 22:17:56.174301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
16103 22:17:56.204422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
16104 22:17:56.204775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
16106 22:17:56.235542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
16107 22:17:56.235903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
16109 22:17:56.266075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
16110 22:17:56.266418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
16112 22:17:56.296199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
16114 22:17:56.296647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
16115 22:17:56.329503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
16116 22:17:56.330019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
16118 22:17:56.365296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
16119 22:17:56.365756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
16121 22:17:56.401381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
16122 22:17:56.401854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
16124 22:17:56.435354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
16126 22:17:56.435804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
16127 22:17:56.468972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
16128 22:17:56.469406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
16130 22:17:56.500325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
16132 22:17:56.500750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
16133 22:17:56.531631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
16135 22:17:56.532073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
16136 22:17:56.562010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
16138 22:17:56.562442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
16139 22:17:56.592777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16140 22:17:56.593235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16142 22:17:56.623128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16143 22:17:56.623504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16145 22:17:56.653974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16147 22:17:56.654407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16148 22:17:56.684431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16149 22:17:56.684778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16151 22:17:56.715430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16152 22:17:56.715781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16154 22:17:56.745607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16155 22:17:56.745963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16157 22:17:56.775963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16159 22:17:56.776384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16160 22:17:56.809174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16161 22:17:56.809543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16163 22:17:56.839395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16164 22:17:56.839760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16166 22:17:56.869365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16167 22:17:56.869836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16169 22:17:56.899328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16170 22:17:56.899772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16172 22:17:56.930136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16173 22:17:56.930561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16175 22:17:56.960603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16177 22:17:56.961118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16178 22:17:56.990964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16179 22:17:56.991373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16181 22:17:57.021012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16182 22:17:57.021451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16184 22:17:57.051339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16186 22:17:57.051851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16187 22:17:57.081346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16188 22:17:57.081757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16190 22:17:57.111264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16191 22:17:57.111634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16193 22:17:57.141224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16194 22:17:57.141587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16196 22:17:57.171635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16198 22:17:57.172112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16199 22:17:57.201747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16200 22:17:57.202103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16202 22:17:57.231366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16203 22:17:57.231714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16205 22:17:57.261135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16206 22:17:57.261484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16208 22:17:57.290842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16209 22:17:57.291188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16211 22:17:57.320431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16212 22:17:57.320778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16214 22:17:57.351080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16215 22:17:57.351425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16217 22:17:57.380813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16218 22:17:57.381162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16220 22:17:57.410693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16221 22:17:57.411038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16223 22:17:57.440043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16224 22:17:57.440401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16226 22:17:57.469826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16227 22:17:57.470187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16229 22:17:57.499462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16230 22:17:57.499816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16232 22:17:57.528933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16233 22:17:57.529289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16235 22:17:57.558872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16236 22:17:57.559233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16238 22:17:57.588574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16240 22:17:57.589017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16241 22:17:57.618951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16242 22:17:57.619306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16244 22:17:57.649022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16245 22:17:57.649374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16247 22:17:57.679329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16248 22:17:57.679701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16250 22:17:57.708869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16251 22:17:57.709221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16253 22:17:57.739111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16254 22:17:57.739465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16256 22:17:57.768529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16257 22:17:57.768886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16259 22:17:57.798272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16260 22:17:57.798626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16262 22:17:57.828203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16263 22:17:57.828570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16265 22:17:57.857845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16266 22:17:57.858205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16268 22:17:57.888601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16269 22:17:57.889078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16271 22:17:57.920963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16272 22:17:57.921410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16274 22:17:57.951028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16275 22:17:57.951475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16277 22:17:57.980627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16278 22:17:57.981042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16280 22:17:58.010776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16281 22:17:58.011132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16283 22:17:58.040545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16284 22:17:58.040896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16286 22:17:58.070129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16287 22:17:58.070484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16289 22:17:58.100017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16290 22:17:58.100369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16292 22:17:58.130176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16293 22:17:58.130529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16295 22:17:58.159775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16296 22:17:58.160132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16298 22:17:58.189904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16299 22:17:58.190257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16301 22:17:58.219611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16302 22:17:58.219971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16304 22:17:58.249281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16305 22:17:58.249637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16307 22:17:58.278835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16308 22:17:58.279192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16310 22:17:58.308936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16311 22:17:58.309293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16313 22:17:58.338777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16314 22:17:58.339135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16316 22:17:58.368015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16317 22:17:58.368386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16319 22:17:58.397587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16320 22:17:58.397957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16322 22:17:58.427310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16323 22:17:58.427681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16325 22:17:58.456771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16326 22:17:58.457123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16328 22:17:58.486579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16329 22:17:58.486936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16331 22:17:58.516435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16332 22:17:58.516804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16334 22:17:58.546115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16335 22:17:58.546477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16337 22:17:58.575641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16338 22:17:58.576006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16340 22:17:58.605810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16341 22:17:58.606168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16343 22:17:58.637242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16344 22:17:58.637703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16346 22:17:58.667547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16347 22:17:58.667892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16349 22:17:58.697918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16350 22:17:58.698266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16352 22:17:58.727773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16354 22:17:58.728186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16355 22:17:58.758161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16356 22:17:58.758507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16358 22:17:58.788102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16359 22:17:58.788444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16361 22:17:58.817904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16363 22:17:58.818357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16364 22:17:58.848522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16365 22:17:58.848867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16367 22:17:58.879195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16368 22:17:58.879543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16370 22:17:58.909168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16372 22:17:58.909588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16373 22:17:58.939004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16374 22:17:58.939348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16376 22:17:58.969143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16377 22:17:58.969491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16379 22:17:58.999518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16381 22:17:58.999923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16382 22:17:59.029479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16383 22:17:59.029823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16385 22:17:59.059675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16387 22:17:59.060140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16388 22:17:59.093488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16389 22:17:59.093886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16391 22:17:59.127715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16392 22:17:59.128196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16394 22:17:59.164838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16395 22:17:59.165306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16397 22:17:59.197401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16398 22:17:59.197891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16400 22:17:59.229824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16402 22:17:59.230380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16403 22:17:59.262382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16405 22:17:59.262981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16406 22:17:59.295368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16407 22:17:59.295781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16409 22:17:59.327608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16411 22:17:59.328180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16412 22:17:59.359408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16413 22:17:59.359890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16415 22:17:59.390393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16417 22:17:59.390849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16418 22:17:59.423401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16420 22:17:59.423957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16421 22:17:59.455467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16422 22:17:59.455883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16424 22:17:59.489431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16425 22:17:59.489937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16427 22:17:59.520876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16429 22:17:59.521456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16430 22:17:59.552493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16432 22:17:59.553107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16433 22:17:59.587327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16434 22:17:59.587727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16436 22:17:59.619773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16438 22:17:59.620400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16439 22:17:59.650814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16441 22:17:59.651367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16442 22:17:59.682517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16444 22:17:59.683081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16445 22:17:59.714823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16446 22:17:59.715284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16448 22:17:59.746050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16449 22:17:59.746594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16451 22:17:59.779319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16453 22:17:59.779905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16454 22:17:59.810860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16455 22:17:59.811239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16457 22:17:59.844196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16459 22:17:59.844775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16460 22:17:59.877753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16461 22:17:59.878133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16463 22:17:59.911909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16464 22:17:59.912366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16466 22:17:59.942565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16468 22:17:59.943110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16469 22:17:59.973144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16471 22:17:59.973571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16472 22:18:00.003759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16474 22:18:00.004303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16475 22:18:00.033940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16476 22:18:00.034345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16478 22:18:00.064712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16479 22:18:00.065163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16481 22:18:00.095344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16482 22:18:00.095857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16484 22:18:00.125815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16485 22:18:00.126284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16487 22:18:00.159950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16489 22:18:00.160529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16490 22:18:00.193427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16491 22:18:00.193859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16493 22:18:00.225438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16494 22:18:00.225835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16496 22:18:00.257820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16497 22:18:00.258206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16499 22:18:00.290575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16501 22:18:00.291148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16502 22:18:00.327259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16503 22:18:00.327685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16505 22:18:00.360019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16506 22:18:00.360403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16508 22:18:00.392874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16509 22:18:00.393343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16511 22:18:00.423633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16512 22:18:00.423995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16514 22:18:00.454183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16515 22:18:00.454542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16517 22:18:00.495516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16518 22:18:00.495884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16520 22:18:00.527836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16522 22:18:00.528458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16523 22:18:00.559549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16525 22:18:00.560094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16526 22:18:00.591680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16527 22:18:00.592090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16529 22:18:00.623094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16530 22:18:00.623515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16532 22:18:00.656824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16533 22:18:00.657205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16535 22:18:00.693352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16536 22:18:00.693806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16538 22:18:00.724755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16539 22:18:00.725207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16541 22:18:00.755190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16542 22:18:00.755531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16544 22:18:00.784929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16545 22:18:00.785270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16547 22:18:00.815101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16548 22:18:00.815448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16550 22:18:00.845475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16551 22:18:00.845821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16553 22:18:00.875917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16554 22:18:00.876380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16556 22:18:00.907185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16557 22:18:00.907587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16559 22:18:00.937623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16560 22:18:00.938038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16562 22:18:00.967719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16563 22:18:00.968064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16565 22:18:00.997796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16566 22:18:00.998143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16568 22:18:01.027982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16569 22:18:01.028333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16571 22:18:01.058328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16573 22:18:01.058777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16574 22:18:01.091816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16575 22:18:01.092235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16577 22:18:01.122913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16579 22:18:01.123354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16580 22:18:01.153624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16582 22:18:01.154175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16583 22:18:01.184520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16584 22:18:01.184903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16586 22:18:01.215481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16587 22:18:01.215917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16589 22:18:01.246087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16590 22:18:01.246543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16592 22:18:01.276626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16594 22:18:01.277165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16595 22:18:01.307390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16596 22:18:01.307834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16598 22:18:01.339689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16600 22:18:01.340235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16601 22:18:01.370744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16602 22:18:01.371199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16604 22:18:01.401777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16605 22:18:01.402245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16607 22:18:01.432959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16608 22:18:01.433421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16610 22:18:01.464176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16611 22:18:01.464609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16613 22:18:01.495047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16615 22:18:01.495549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16616 22:18:01.525584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16617 22:18:01.526054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16619 22:18:01.556974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16620 22:18:01.557339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16622 22:18:01.587415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16623 22:18:01.587680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16625 22:18:01.618045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16626 22:18:01.618472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16628 22:18:01.648879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16630 22:18:01.649347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16631 22:18:01.679434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16632 22:18:01.679787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16634 22:18:01.709546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16635 22:18:01.709915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16637 22:18:01.740281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16638 22:18:01.740637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16640 22:18:01.771259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16642 22:18:01.771699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16643 22:18:01.801559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16644 22:18:01.801929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16646 22:18:01.831815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16647 22:18:01.832165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16649 22:18:01.862700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16650 22:18:01.863046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16652 22:18:01.893567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16653 22:18:01.893919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16655 22:18:01.924400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16657 22:18:01.924812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16658 22:18:01.955495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16660 22:18:01.955924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16661 22:18:01.985945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16662 22:18:01.986296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16664 22:18:02.016280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16666 22:18:02.016708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16667 22:18:02.047079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16668 22:18:02.047419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16670 22:18:02.077697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16671 22:18:02.078048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16673 22:18:02.108483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16674 22:18:02.108822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16676 22:18:02.139171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16677 22:18:02.139657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16679 22:18:02.169709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16681 22:18:02.170152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16682 22:18:02.200252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16684 22:18:02.200681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16685 22:18:02.230803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16687 22:18:02.231219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16688 22:18:02.261078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16689 22:18:02.261491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16691 22:18:02.291141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16692 22:18:02.291557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16694 22:18:02.321881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16695 22:18:02.322297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16697 22:18:02.352008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16698 22:18:02.352408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16700 22:18:02.382512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16701 22:18:02.382936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16703 22:18:02.412996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16704 22:18:02.413412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16706 22:18:02.443808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16708 22:18:02.444243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16709 22:18:02.474200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16710 22:18:02.474603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16712 22:18:02.504750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16713 22:18:02.505158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16715 22:18:02.535397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16716 22:18:02.535818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16718 22:18:02.565465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16719 22:18:02.565876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16721 22:18:02.595697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16722 22:18:02.596111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16724 22:18:02.626933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16725 22:18:02.627342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16727 22:18:02.656813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16728 22:18:02.657218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16730 22:18:02.687808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16731 22:18:02.688226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16733 22:18:02.717873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16734 22:18:02.718292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16736 22:18:02.748918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16737 22:18:02.749344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16739 22:18:02.779397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16740 22:18:02.779814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16742 22:18:02.810469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16744 22:18:02.811035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16745 22:18:02.840648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16746 22:18:02.841105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16748 22:18:02.871986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16749 22:18:02.872468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16751 22:18:02.902703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16752 22:18:02.903067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16754 22:18:02.933101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16755 22:18:02.933456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16757 22:18:02.963534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16758 22:18:02.964007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16760 22:18:02.993731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16761 22:18:02.994222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16763 22:18:03.024168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16764 22:18:03.024639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16766 22:18:03.054599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16768 22:18:03.055158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16769 22:18:03.085601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16770 22:18:03.086079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16772 22:18:03.116689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16773 22:18:03.117112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16775 22:18:03.147391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16777 22:18:03.147817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16778 22:18:03.177728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16779 22:18:03.178195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16781 22:18:03.207710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16782 22:18:03.208120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16784 22:18:03.238370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16786 22:18:03.238804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16787 22:18:03.270058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16788 22:18:03.270518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16790 22:18:03.302394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16792 22:18:03.302978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16793 22:18:03.333803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16795 22:18:03.334432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16796 22:18:03.363879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16797 22:18:03.364330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16799 22:18:03.394068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16801 22:18:03.394596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16802 22:18:03.425063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16803 22:18:03.425511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16805 22:18:03.456204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16806 22:18:03.456676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16808 22:18:03.486448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16810 22:18:03.487006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16811 22:18:03.517160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16813 22:18:03.517797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16814 22:18:03.547236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16815 22:18:03.547614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16817 22:18:03.577299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16818 22:18:03.577636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16820 22:18:03.607781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16822 22:18:03.608185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16823 22:18:03.638739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16824 22:18:03.639090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16826 22:18:03.668548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16827 22:18:03.668912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16829 22:18:03.698904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16830 22:18:03.699268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16832 22:18:03.728638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16833 22:18:03.728993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16835 22:18:03.758788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16836 22:18:03.759142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16838 22:18:03.788816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16839 22:18:03.789172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16841 22:18:03.818875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16842 22:18:03.819243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16844 22:18:03.849189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16845 22:18:03.849546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16847 22:18:03.878818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16848 22:18:03.879175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16850 22:18:03.908249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16852 22:18:03.908684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16853 22:18:03.938368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16855 22:18:03.938821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16856 22:18:03.969007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16857 22:18:03.969361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16859 22:18:03.999034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16860 22:18:03.999395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16862 22:18:04.028686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16863 22:18:04.029039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16865 22:18:04.058842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16866 22:18:04.059197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16868 22:18:04.089150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16869 22:18:04.089503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16871 22:18:04.119882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16872 22:18:04.120243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16874 22:18:04.149899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16875 22:18:04.150257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16877 22:18:04.180032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16878 22:18:04.180390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16880 22:18:04.209701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16881 22:18:04.210054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16883 22:18:04.239710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16884 22:18:04.240068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16886 22:18:04.270584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16888 22:18:04.271028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16889 22:18:04.300472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16890 22:18:04.300832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16892 22:18:04.329759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16893 22:18:04.330118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16895 22:18:04.359536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16896 22:18:04.359889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16898 22:18:04.388935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16899 22:18:04.389290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16901 22:18:04.418866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16902 22:18:04.419222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16904 22:18:04.448912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16905 22:18:04.449264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16907 22:18:04.478996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16908 22:18:04.479346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16910 22:18:04.509074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16911 22:18:04.509430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16913 22:18:04.539464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16914 22:18:04.539857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16916 22:18:04.570757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16917 22:18:04.571112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16919 22:18:04.601177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16921 22:18:04.601836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16922 22:18:04.632045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16923 22:18:04.632485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16925 22:18:04.663187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16926 22:18:04.663589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16928 22:18:04.694034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16930 22:18:04.694603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16931 22:18:04.725439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16933 22:18:04.725916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16934 22:18:04.757944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16935 22:18:04.758411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16937 22:18:04.793165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16938 22:18:04.793660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16940 22:18:04.824369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16941 22:18:04.824804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16943 22:18:04.855108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16944 22:18:04.855568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16946 22:18:04.885535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16947 22:18:04.885913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16949 22:18:04.915564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16950 22:18:04.915913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16952 22:18:04.945329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16953 22:18:04.945814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16955 22:18:04.975985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16956 22:18:04.976389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16958 22:18:05.006433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16960 22:18:05.006867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16961 22:18:05.036815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16962 22:18:05.037209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16964 22:18:05.067930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16965 22:18:05.068329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16967 22:18:05.098124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16969 22:18:05.098667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16970 22:18:05.128821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16971 22:18:05.129227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16973 22:18:05.159064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16974 22:18:05.159420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16976 22:18:05.188894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16977 22:18:05.189237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16979 22:18:05.219307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16980 22:18:05.219847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16982 22:18:05.250065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16983 22:18:05.250413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16985 22:18:05.280873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16986 22:18:05.281220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16988 22:18:05.311183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16989 22:18:05.311523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16991 22:18:05.340699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16992 22:18:05.341053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16994 22:18:05.370882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16995 22:18:05.371221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16997 22:18:05.400582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16998 22:18:05.400919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
17000 22:18:05.430659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
17002 22:18:05.431079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
17003 22:18:05.460544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
17005 22:18:05.460955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
17006 22:18:05.491175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
17008 22:18:05.491581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
17009 22:18:05.520558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
17010 22:18:05.520902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
17012 22:18:05.551090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
17014 22:18:05.551513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
17015 22:18:05.581000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
17016 22:18:05.581360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
17018 22:18:05.611024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
17019 22:18:05.611374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
17021 22:18:05.641813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
17022 22:18:05.642151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
17024 22:18:05.672415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
17025 22:18:05.672875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
17027 22:18:05.703099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
17028 22:18:05.703547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
17030 22:18:05.733511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
17031 22:18:05.733900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
17033 22:18:05.763230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
17034 22:18:05.763573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
17036 22:18:05.793686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
17037 22:18:05.794009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
17039 22:18:05.824358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
17040 22:18:05.824700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
17042 22:18:05.854346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
17044 22:18:05.854755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
17045 22:18:05.884494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
17046 22:18:05.884847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
17048 22:18:05.914204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
17050 22:18:05.914756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
17051 22:18:05.944951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
17052 22:18:05.945395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
17054 22:18:05.976588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
17055 22:18:05.977078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
17057 22:18:06.007849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
17058 22:18:06.008291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
17060 22:18:06.039298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
17061 22:18:06.039746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
17063 22:18:06.069707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
17065 22:18:06.070182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
17066 22:18:06.100684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
17067 22:18:06.101143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
17069 22:18:06.131417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
17070 22:18:06.131847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
17072 22:18:06.161940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
17073 22:18:06.162378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
17075 22:18:06.192974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
17076 22:18:06.193446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
17078 22:18:06.224554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
17080 22:18:06.225028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
17081 22:18:06.255187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
17082 22:18:06.255528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
17084 22:18:06.285003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
17085 22:18:06.285348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
17087 22:18:06.315369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
17089 22:18:06.315774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
17090 22:18:06.345809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
17091 22:18:06.346364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
17093 22:18:06.376319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
17094 22:18:06.376744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
17096 22:18:06.406604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
17098 22:18:06.407065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
17099 22:18:06.436927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
17101 22:18:06.437362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
17102 22:18:06.467338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
17103 22:18:06.467701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
17105 22:18:06.497593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
17106 22:18:06.498009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
17108 22:18:06.528810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
17110 22:18:06.529257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
17111 22:18:06.559376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
17112 22:18:06.559791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
17114 22:18:06.589817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
17116 22:18:06.590362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
17117 22:18:06.620759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
17118 22:18:06.621225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
17120 22:18:06.651375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
17122 22:18:06.651898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
17123 22:18:06.715856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
17124 22:18:06.716335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
17126 22:18:06.779263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
17127 22:18:06.779620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
17129 22:18:06.809043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
17131 22:18:06.809610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
17132 22:18:06.839505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
17133 22:18:06.839904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
17135 22:18:06.869403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
17136 22:18:06.869762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
17138 22:18:06.899359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17139 22:18:06.899718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17141 22:18:06.928985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17142 22:18:06.929329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17144 22:18:06.958921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17146 22:18:06.959333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17147 22:18:06.988315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17148 22:18:06.988653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17150 22:18:07.018552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17152 22:18:07.018981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17153 22:18:07.048697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17154 22:18:07.049042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17156 22:18:07.079144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17158 22:18:07.079562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17159 22:18:07.108779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17161 22:18:07.109268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17162 22:18:07.138672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17163 22:18:07.139026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17165 22:18:07.168798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17166 22:18:07.169147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17168 22:18:07.198144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17169 22:18:07.198492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17171 22:18:07.228022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17172 22:18:07.228372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17174 22:18:07.258767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17175 22:18:07.259111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17177 22:18:07.288386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17178 22:18:07.288738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17180 22:18:07.317820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17181 22:18:07.318164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17183 22:18:07.347544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17184 22:18:07.347902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17186 22:18:07.377146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17187 22:18:07.377500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17189 22:18:07.407066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17190 22:18:07.407425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17192 22:18:07.436195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17193 22:18:07.436552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17195 22:18:07.466104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17196 22:18:07.466461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17198 22:18:07.496015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17199 22:18:07.496373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17201 22:18:07.525949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17202 22:18:07.526382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17204 22:18:07.557494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17205 22:18:07.557997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17207 22:18:07.588117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17208 22:18:07.588480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17210 22:18:07.618166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17212 22:18:07.618628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17213 22:18:07.648502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17215 22:18:07.648971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17216 22:18:07.678906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17217 22:18:07.679262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17219 22:18:07.708806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17220 22:18:07.709172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17222 22:18:07.738831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17224 22:18:07.739311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17225 22:18:07.768361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17226 22:18:07.768695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17228 22:18:07.798760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17229 22:18:07.799111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17231 22:18:07.828831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17232 22:18:07.829160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17234 22:18:07.858944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17235 22:18:07.859293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17237 22:18:07.888753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17238 22:18:07.889108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17240 22:18:07.918581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17242 22:18:07.919013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17243 22:18:07.948102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17244 22:18:07.948426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17246 22:18:07.977920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17247 22:18:07.978249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17249 22:18:08.007863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17250 22:18:08.008222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17252 22:18:08.038481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17254 22:18:08.038956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17255 22:18:08.068379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17256 22:18:08.068733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17258 22:18:08.098531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17260 22:18:08.099004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17261 22:18:08.128289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17262 22:18:08.128618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17264 22:18:08.157912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17265 22:18:08.158237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17267 22:18:08.187740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17268 22:18:08.188068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17270 22:18:08.218183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17271 22:18:08.218533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17273 22:18:08.248566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17274 22:18:08.248899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17276 22:18:08.279134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17277 22:18:08.279461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17279 22:18:08.309458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17280 22:18:08.309808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17282 22:18:08.339599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17283 22:18:08.339925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17285 22:18:08.369984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17286 22:18:08.370334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17288 22:18:08.400503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17289 22:18:08.400858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17291 22:18:08.431481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17292 22:18:08.431807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17294 22:18:08.461494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17295 22:18:08.461847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17297 22:18:08.491366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17298 22:18:08.491711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17300 22:18:08.521297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17301 22:18:08.521661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17303 22:18:08.551536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17304 22:18:08.551900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17306 22:18:08.581108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17308 22:18:08.581549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17309 22:18:08.611213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17310 22:18:08.611568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17312 22:18:08.641370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17314 22:18:08.641811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17315 22:18:08.671158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17316 22:18:08.671518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17318 22:18:08.700981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17319 22:18:08.701342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17321 22:18:08.731144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17322 22:18:08.731492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17324 22:18:08.761113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17325 22:18:08.761475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17327 22:18:08.791141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17328 22:18:08.791499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17330 22:18:08.821256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17332 22:18:08.821704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17333 22:18:08.851095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17334 22:18:08.851450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17336 22:18:08.880836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17337 22:18:08.881193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17339 22:18:08.911155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17340 22:18:08.911508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17342 22:18:08.941063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17343 22:18:08.941418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17345 22:18:08.970966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17347 22:18:08.971448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17348 22:18:09.000936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17349 22:18:09.001300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17351 22:18:09.031250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17352 22:18:09.031614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17354 22:18:09.060786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17355 22:18:09.061152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17357 22:18:09.090894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17358 22:18:09.091265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17360 22:18:09.120642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17362 22:18:09.121077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17363 22:18:09.150923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17364 22:18:09.151284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17366 22:18:09.181028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17367 22:18:09.181385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17369 22:18:09.211113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17370 22:18:09.211439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17372 22:18:09.241042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17373 22:18:09.241400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17375 22:18:09.271084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17376 22:18:09.271442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17378 22:18:09.300392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17379 22:18:09.300751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17381 22:18:09.330483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17383 22:18:09.331133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17384 22:18:09.360475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17385 22:18:09.360875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17387 22:18:09.390843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17388 22:18:09.391201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17390 22:18:09.421319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17391 22:18:09.421678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17393 22:18:09.451220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17394 22:18:09.451563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17396 22:18:09.481699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17397 22:18:09.482046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17399 22:18:09.511455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17400 22:18:09.511779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17402 22:18:09.540957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17403 22:18:09.541294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17405 22:18:09.570896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17406 22:18:09.571228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17408 22:18:09.600376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17409 22:18:09.600711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17411 22:18:09.629980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17412 22:18:09.630329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17414 22:18:09.659917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17415 22:18:09.660258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17417 22:18:09.689630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17418 22:18:09.689988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17420 22:18:09.719653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17421 22:18:09.719993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17423 22:18:09.749672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17424 22:18:09.750018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17426 22:18:09.779456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17427 22:18:09.779821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17429 22:18:09.808989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17430 22:18:09.809334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17432 22:18:09.839284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17434 22:18:09.839687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17435 22:18:09.868833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17437 22:18:09.869244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17438 22:18:09.898827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17440 22:18:09.899247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17441 22:18:09.928332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17443 22:18:09.928747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17444 22:18:09.959118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17445 22:18:09.959457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17447 22:18:09.989798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17448 22:18:09.990262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17450 22:18:10.020117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17451 22:18:10.020455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17453 22:18:10.050037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17454 22:18:10.050384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17456 22:18:10.079617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17457 22:18:10.079934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17459 22:18:10.109455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17460 22:18:10.109795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17462 22:18:10.139796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17464 22:18:10.140186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17465 22:18:10.169528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17467 22:18:10.169954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17468 22:18:10.199296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17470 22:18:10.199723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17471 22:18:10.228923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17472 22:18:10.229294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17474 22:18:10.259082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17476 22:18:10.259580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17477 22:18:10.288775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17478 22:18:10.289133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17480 22:18:10.318508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17482 22:18:10.318918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17483 22:18:10.348095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17484 22:18:10.348435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17486 22:18:10.377953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17487 22:18:10.378286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17489 22:18:10.407863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17490 22:18:10.408202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17492 22:18:10.438862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17493 22:18:10.439202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17495 22:18:10.468544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17496 22:18:10.468861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17498 22:18:10.498502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17500 22:18:10.498913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17501 22:18:10.528066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17502 22:18:10.528409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17504 22:18:10.557814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17505 22:18:10.558163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17507 22:18:10.587924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17508 22:18:10.588270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17510 22:18:10.617976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17511 22:18:10.618318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17513 22:18:10.648127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17514 22:18:10.648468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17516 22:18:10.678885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17517 22:18:10.679223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17519 22:18:10.708620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17520 22:18:10.708958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17522 22:18:10.738520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17524 22:18:10.738935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17525 22:18:10.768052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17526 22:18:10.768393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17528 22:18:10.798154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17529 22:18:10.798684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17531 22:18:10.828615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17532 22:18:10.829051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17534 22:18:10.858952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17535 22:18:10.859299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17537 22:18:10.888968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17538 22:18:10.889285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17540 22:18:10.919293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17541 22:18:10.919615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17543 22:18:10.949380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17544 22:18:10.949679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17546 22:18:10.979427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17547 22:18:10.979798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17549 22:18:11.009402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17550 22:18:11.009760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17552 22:18:11.039465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17554 22:18:11.039880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17555 22:18:11.069492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17556 22:18:11.069968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17558 22:18:11.100616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17559 22:18:11.101016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17561 22:18:11.131370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17562 22:18:11.131868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17564 22:18:11.161752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17565 22:18:11.162233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17567 22:18:11.191786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17568 22:18:11.192260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17570 22:18:11.222071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17571 22:18:11.222545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17573 22:18:11.252364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17574 22:18:11.252835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17576 22:18:11.282886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17577 22:18:11.283253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17579 22:18:11.312539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17580 22:18:11.312998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17582 22:18:11.342910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17583 22:18:11.343307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17585 22:18:11.373768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17587 22:18:11.374217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17588 22:18:11.405132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17590 22:18:11.405706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17591 22:18:11.435628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17593 22:18:11.436180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17594 22:18:11.465457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17595 22:18:11.465822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17597 22:18:11.495330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17599 22:18:11.495680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17600 22:18:11.524954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17602 22:18:11.525264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17603 22:18:11.555849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17605 22:18:11.556122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17606 22:18:11.586002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17608 22:18:11.586436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17609 22:18:11.615971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17610 22:18:11.616328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17612 22:18:11.646792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17613 22:18:11.647255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17615 22:18:11.676855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17616 22:18:11.677307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17618 22:18:11.707728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17620 22:18:11.708257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17621 22:18:11.738659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17623 22:18:11.739238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17624 22:18:11.768648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17625 22:18:11.769069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17627 22:18:11.819281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17629 22:18:11.819725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17630 22:18:11.849637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17631 22:18:11.850044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17633 22:18:11.879683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17634 22:18:11.880067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17636 22:18:11.910667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17638 22:18:11.911085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17639 22:18:11.941026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17641 22:18:11.941456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17642 22:18:11.971307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17643 22:18:11.971762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17645 22:18:12.001242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17646 22:18:12.001684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17648 22:18:12.031407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17649 22:18:12.031837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17651 22:18:12.061578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17652 22:18:12.062048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17654 22:18:12.092338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17655 22:18:12.092779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17657 22:18:12.122418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17659 22:18:12.122980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17660 22:18:12.152454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17661 22:18:12.152890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17663 22:18:12.182471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17665 22:18:12.183078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17666 22:18:12.212999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17667 22:18:12.213473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17669 22:18:12.243329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17671 22:18:12.243956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17672 22:18:12.273059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17673 22:18:12.273507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17675 22:18:12.303249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17676 22:18:12.303726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17678 22:18:12.332987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17679 22:18:12.333343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17681 22:18:12.363371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17682 22:18:12.363723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17684 22:18:12.393208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17685 22:18:12.393560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17687 22:18:12.423024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17688 22:18:12.423374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17690 22:18:12.452407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17691 22:18:12.452758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17693 22:18:12.481945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17694 22:18:12.482299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17696 22:18:12.511321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17697 22:18:12.511671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17699 22:18:12.541010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17700 22:18:12.541362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17702 22:18:12.571117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17703 22:18:12.571470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17705 22:18:12.600362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17706 22:18:12.600715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17708 22:18:12.630204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17709 22:18:12.630556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17711 22:18:12.660091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17712 22:18:12.660443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17714 22:18:12.689672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17715 22:18:12.690024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17717 22:18:12.719105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17718 22:18:12.719457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17720 22:18:12.748325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17721 22:18:12.748675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17723 22:18:12.777887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17724 22:18:12.778239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17726 22:18:12.807753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17727 22:18:12.808105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17729 22:18:12.837591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17730 22:18:12.837954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17732 22:18:12.867815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17733 22:18:12.868166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17735 22:18:12.897351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17736 22:18:12.897685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17738 22:18:12.927167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17739 22:18:12.927521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17741 22:18:12.956945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17742 22:18:12.957296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17744 22:18:12.986534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17746 22:18:12.986976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17747 22:18:13.016160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17748 22:18:13.016514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17750 22:18:13.047191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17751 22:18:13.047542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17753 22:18:13.077225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17754 22:18:13.077705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17756 22:18:13.107319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17757 22:18:13.107670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17759 22:18:13.137199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17760 22:18:13.137559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17762 22:18:13.166992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17763 22:18:13.167353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17765 22:18:13.196456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17766 22:18:13.196810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17768 22:18:13.225897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17769 22:18:13.226276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17771 22:18:13.256088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17772 22:18:13.256445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17774 22:18:13.285681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17775 22:18:13.286052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17777 22:18:13.315260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17778 22:18:13.315729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17780 22:18:13.345841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17781 22:18:13.346215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17783 22:18:13.375811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17784 22:18:13.376165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17786 22:18:13.405592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17787 22:18:13.405969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17789 22:18:13.435203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17790 22:18:13.435557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17792 22:18:13.464938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17793 22:18:13.465290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17795 22:18:13.495422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17796 22:18:13.495778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17798 22:18:13.525149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17799 22:18:13.525508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17801 22:18:13.555172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17802 22:18:13.555523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17804 22:18:13.585009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17805 22:18:13.585362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17807 22:18:13.614952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17808 22:18:13.615304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17810 22:18:13.644286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17811 22:18:13.644637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17813 22:18:13.674142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17814 22:18:13.674497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17816 22:18:13.703985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17817 22:18:13.704335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17819 22:18:13.734058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17820 22:18:13.734413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17822 22:18:13.763765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17823 22:18:13.764117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17825 22:18:13.793480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17826 22:18:13.793848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17828 22:18:13.823569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17829 22:18:13.823921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17831 22:18:13.853301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17832 22:18:13.853667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17834 22:18:13.883247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17835 22:18:13.883599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17837 22:18:13.912762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17838 22:18:13.913116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17840 22:18:13.942514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17841 22:18:13.942875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17843 22:18:13.972189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17844 22:18:13.972541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17846 22:18:14.002842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17847 22:18:14.003195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17849 22:18:14.032604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17850 22:18:14.032956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17852 22:18:14.062139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17853 22:18:14.062499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17855 22:18:14.092014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17856 22:18:14.092373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17858 22:18:14.122068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17859 22:18:14.122420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17861 22:18:14.152044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17862 22:18:14.152396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17864 22:18:14.181750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17865 22:18:14.182102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17867 22:18:14.211596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17869 22:18:14.212169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17870 22:18:14.241710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17871 22:18:14.242185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17873 22:18:14.271447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17874 22:18:14.271897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17876 22:18:14.301556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17877 22:18:14.302035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17879 22:18:14.331537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17880 22:18:14.332017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17882 22:18:14.361552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17883 22:18:14.362046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17885 22:18:14.391853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17886 22:18:14.392329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17888 22:18:14.421942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17889 22:18:14.422422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17891 22:18:14.451945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17892 22:18:14.452407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17894 22:18:14.481948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17895 22:18:14.482425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17897 22:18:14.511809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17898 22:18:14.512269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17900 22:18:14.542622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17902 22:18:14.543186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17903 22:18:14.572885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17904 22:18:14.573366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17906 22:18:14.603169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17907 22:18:14.603587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17909 22:18:14.633054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17910 22:18:14.633538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17912 22:18:14.663388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17913 22:18:14.663839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17915 22:18:14.693142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17916 22:18:14.693616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17918 22:18:14.723451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17919 22:18:14.723928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17921 22:18:14.753501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17922 22:18:14.753998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17924 22:18:14.783807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17925 22:18:14.784274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17927 22:18:14.813634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17928 22:18:14.814105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17930 22:18:14.844024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17931 22:18:14.844508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17933 22:18:14.873797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17934 22:18:14.874262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17936 22:18:14.903841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17937 22:18:14.904312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17939 22:18:14.933913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17940 22:18:14.934375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17942 22:18:14.964546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17943 22:18:14.965030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17945 22:18:14.995172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17946 22:18:14.995639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17948 22:18:15.025281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17949 22:18:15.025749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17951 22:18:15.055274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17952 22:18:15.055755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17954 22:18:15.085485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17955 22:18:15.085980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17957 22:18:15.115554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17958 22:18:15.116030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17960 22:18:15.145429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17961 22:18:15.145925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17963 22:18:15.175454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17964 22:18:15.175929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17966 22:18:15.205269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17968 22:18:15.205916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17969 22:18:15.235268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17970 22:18:15.235746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17972 22:18:15.265830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17973 22:18:15.266316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17975 22:18:15.295579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17976 22:18:15.296042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17978 22:18:15.325501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17979 22:18:15.325990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17981 22:18:15.355388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17982 22:18:15.355862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17984 22:18:15.385146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17986 22:18:15.385786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17987 22:18:15.415116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17988 22:18:15.415579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17990 22:18:15.444999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17991 22:18:15.445466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17993 22:18:15.475406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17994 22:18:15.475882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17996 22:18:15.505577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17997 22:18:15.506054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17999 22:18:15.535636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
18000 22:18:15.536109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
18002 22:18:15.565978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
18003 22:18:15.566456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
18005 22:18:15.597233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
18006 22:18:15.597705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
18008 22:18:15.627402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
18009 22:18:15.627868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
18011 22:18:15.658554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
18013 22:18:15.659019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
18014 22:18:15.691881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
18015 22:18:15.692295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
18017 22:18:15.724200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
18019 22:18:15.724649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
18020 22:18:15.761108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
18022 22:18:15.761434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
18023 22:18:15.792263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
18025 22:18:15.792691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
18026 22:18:15.823353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
18027 22:18:15.823693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
18029 22:18:15.853486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
18030 22:18:15.853837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
18032 22:18:15.883637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
18034 22:18:15.884134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
18035 22:18:15.914438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
18037 22:18:15.914912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
18038 22:18:15.945124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
18039 22:18:15.945601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
18041 22:18:15.975339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
18042 22:18:15.975793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
18044 22:18:16.005770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
18046 22:18:16.006313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
18047 22:18:16.035856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
18049 22:18:16.036386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
18050 22:18:16.066192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
18051 22:18:16.066647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
18053 22:18:16.096921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
18055 22:18:16.097466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
18056 22:18:16.127718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
18058 22:18:16.128252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
18059 22:18:16.157808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
18060 22:18:16.158279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
18062 22:18:16.187964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
18063 22:18:16.188391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
18065 22:18:16.222533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
18067 22:18:16.223104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
18068 22:18:16.252953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
18069 22:18:16.253414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
18071 22:18:16.283431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
18072 22:18:16.283875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
18074 22:18:16.313600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
18075 22:18:16.314052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
18077 22:18:16.344226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
18079 22:18:16.344747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
18080 22:18:16.384559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
18081 22:18:16.384994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
18083 22:18:16.421261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
18085 22:18:16.421841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
18086 22:18:16.451514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
18088 22:18:16.451950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
18089 22:18:16.481188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
18090 22:18:16.481541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
18092 22:18:16.512110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
18093 22:18:16.512592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
18095 22:18:16.542883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
18097 22:18:16.543414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
18098 22:18:16.572640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
18099 22:18:16.572919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
18101 22:18:16.603405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
18103 22:18:16.603845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
18104 22:18:16.633964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
18106 22:18:16.634420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
18107 22:18:16.664308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
18108 22:18:16.664748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
18110 22:18:16.694909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
18112 22:18:16.695331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
18113 22:18:16.725500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
18114 22:18:16.725956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
18116 22:18:16.756157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
18118 22:18:16.756790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
18119 22:18:16.786087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
18121 22:18:16.786728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
18122 22:18:16.816351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
18124 22:18:16.816879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
18125 22:18:16.846209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
18127 22:18:16.846726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
18128 22:18:16.876159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
18129 22:18:16.876601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
18131 22:18:16.906946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
18132 22:18:16.907347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
18134 22:18:16.937809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
18136 22:18:16.938285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
18137 22:18:16.968335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18139 22:18:16.968764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
18140 22:18:16.998829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18142 22:18:16.999255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18143 22:18:17.029006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18145 22:18:17.029436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18146 22:18:17.059426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18147 22:18:17.059819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18149 22:18:17.089590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18151 22:18:17.090032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18152 22:18:17.120140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18153 22:18:17.120558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18155 22:18:17.151381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18156 22:18:17.151787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18158 22:18:17.181887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18160 22:18:17.182327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18161 22:18:17.212597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18162 22:18:17.212988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18164 22:18:17.244065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18165 22:18:17.244469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18167 22:18:17.274937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18169 22:18:17.275356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18170 22:18:17.304848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18171 22:18:17.305236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18173 22:18:17.335344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18174 22:18:17.335752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18176 22:18:17.365435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18177 22:18:17.365858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18179 22:18:17.395480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18180 22:18:17.395884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18182 22:18:17.425486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18183 22:18:17.425896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18185 22:18:17.455828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18186 22:18:17.456240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18188 22:18:17.486832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18189 22:18:17.487241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18191 22:18:17.516932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18192 22:18:17.517336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18194 22:18:17.547317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18195 22:18:17.547736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18197 22:18:17.577431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18198 22:18:17.577856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18200 22:18:17.607889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18201 22:18:17.608311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18203 22:18:17.637995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18204 22:18:17.638467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18206 22:18:17.668584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18208 22:18:17.669148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18209 22:18:17.698595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18211 22:18:17.699150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18212 22:18:17.728807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18213 22:18:17.729277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18215 22:18:17.759135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18217 22:18:17.759691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18218 22:18:17.789115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18219 22:18:17.789577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18221 22:18:17.819290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18222 22:18:17.819758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18224 22:18:17.849213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18226 22:18:17.849794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18227 22:18:17.879564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18228 22:18:17.880042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18230 22:18:17.909940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18231 22:18:17.910412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18233 22:18:17.940937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18234 22:18:17.941417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18236 22:18:17.971442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18238 22:18:17.972002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18239 22:18:18.001682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18241 22:18:18.002240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18242 22:18:18.031942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18243 22:18:18.032409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18245 22:18:18.061947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18246 22:18:18.062417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18248 22:18:18.091852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18249 22:18:18.092263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18251 22:18:18.122450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18253 22:18:18.122888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18254 22:18:18.153094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18255 22:18:18.153511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18257 22:18:18.183443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18258 22:18:18.183857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18260 22:18:18.214616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18262 22:18:18.215225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18263 22:18:18.244374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18264 22:18:18.244844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18266 22:18:18.275122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18267 22:18:18.275603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18269 22:18:18.305047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18270 22:18:18.305517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18272 22:18:18.335126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18274 22:18:18.335678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18275 22:18:18.365008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18276 22:18:18.365474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18278 22:18:18.395360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18279 22:18:18.395831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18281 22:18:18.425387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18282 22:18:18.425858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18284 22:18:18.455847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18285 22:18:18.456313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18287 22:18:18.485992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18288 22:18:18.486457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18290 22:18:18.516077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18291 22:18:18.516539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18293 22:18:18.545968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18294 22:18:18.546425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18296 22:18:18.575961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18297 22:18:18.576429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18299 22:18:18.605903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18300 22:18:18.606363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18302 22:18:18.636088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18303 22:18:18.636555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18305 22:18:18.666653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18307 22:18:18.667213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18308 22:18:18.696935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18309 22:18:18.697404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18311 22:18:18.727323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18312 22:18:18.727792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18314 22:18:18.757383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18315 22:18:18.757859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18317 22:18:18.787480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18319 22:18:18.788038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18320 22:18:18.817458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18321 22:18:18.817952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18323 22:18:18.847521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18324 22:18:18.847979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18326 22:18:18.878025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18328 22:18:18.878581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18329 22:18:18.908302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18331 22:18:18.908857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18332 22:18:18.938092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18333 22:18:18.938554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18335 22:18:18.968685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18336 22:18:18.969148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18338 22:18:18.998481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18340 22:18:18.999046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18341 22:18:19.028784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18342 22:18:19.029258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18344 22:18:19.057931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18345 22:18:19.058288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18347 22:18:19.087564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18348 22:18:19.087920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18350 22:18:19.117778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18351 22:18:19.118142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18353 22:18:19.148007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18354 22:18:19.148373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18356 22:18:19.178801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18357 22:18:19.179164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18359 22:18:19.208698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18360 22:18:19.209059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18362 22:18:19.238919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18363 22:18:19.239281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18365 22:18:19.268863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18366 22:18:19.269215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18368 22:18:19.298201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18369 22:18:19.298549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18371 22:18:19.328225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18372 22:18:19.328575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18374 22:18:19.357910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18375 22:18:19.358282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18377 22:18:19.387566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18378 22:18:19.387913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18380 22:18:19.418214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18381 22:18:19.418561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18383 22:18:19.447834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18384 22:18:19.448180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18386 22:18:19.477717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18387 22:18:19.478077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18389 22:18:19.507596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18390 22:18:19.507951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18392 22:18:19.537074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18393 22:18:19.537434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18395 22:18:19.566751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18396 22:18:19.567104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18398 22:18:19.596211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18399 22:18:19.596563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18401 22:18:19.626003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18402 22:18:19.626364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18404 22:18:19.657032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18405 22:18:19.657393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18407 22:18:19.687209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18409 22:18:19.687658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18410 22:18:19.717011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18411 22:18:19.717371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18413 22:18:19.747346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18414 22:18:19.747709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18416 22:18:19.776875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18417 22:18:19.777233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18419 22:18:19.806572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18421 22:18:19.807004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18422 22:18:19.837272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18423 22:18:19.837624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18425 22:18:19.867308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18426 22:18:19.867659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18428 22:18:19.896977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18429 22:18:19.897327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18431 22:18:19.927062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18432 22:18:19.927411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18434 22:18:19.956739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18435 22:18:19.957090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18437 22:18:19.986890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18439 22:18:19.987322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18440 22:18:20.016331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18441 22:18:20.016680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18443 22:18:20.046669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18445 22:18:20.047120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18446 22:18:20.076281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18447 22:18:20.076631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18449 22:18:20.105855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18450 22:18:20.106236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18452 22:18:20.135977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18453 22:18:20.136329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18455 22:18:20.165837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18456 22:18:20.166211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18458 22:18:20.195646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18459 22:18:20.196000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18461 22:18:20.225839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18462 22:18:20.226213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18464 22:18:20.255394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18465 22:18:20.255748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18467 22:18:20.285061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18468 22:18:20.285414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18470 22:18:20.315001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18471 22:18:20.315351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18473 22:18:20.344868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18474 22:18:20.345221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18476 22:18:20.375231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18477 22:18:20.375586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18479 22:18:20.405150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18480 22:18:20.405504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18482 22:18:20.435578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18483 22:18:20.435929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18485 22:18:20.465615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18487 22:18:20.466121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18488 22:18:20.495463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18490 22:18:20.495895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18491 22:18:20.525129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18492 22:18:20.525496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18494 22:18:20.555505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18496 22:18:20.555941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18497 22:18:20.585763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18498 22:18:20.586132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18500 22:18:20.616242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18501 22:18:20.616610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18503 22:18:20.646494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18505 22:18:20.646942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18506 22:18:20.676804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18508 22:18:20.677415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18509 22:18:20.707533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18510 22:18:20.708027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18512 22:18:20.740091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18513 22:18:20.740571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18515 22:18:20.771028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18517 22:18:20.771601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18518 22:18:20.801323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18519 22:18:20.801790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18521 22:18:20.831462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18522 22:18:20.831936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18524 22:18:20.861482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18525 22:18:20.861852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18527 22:18:20.891523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18529 22:18:20.892029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18530 22:18:20.921531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18531 22:18:20.921884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18533 22:18:20.951226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18534 22:18:20.951564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18536 22:18:20.981215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18538 22:18:20.981771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18539 22:18:21.011410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18541 22:18:21.011833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18542 22:18:21.041741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18543 22:18:21.042157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18545 22:18:21.072232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18547 22:18:21.072668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18548 22:18:21.103802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18550 22:18:21.104334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18551 22:18:21.134618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18553 22:18:21.135243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18554 22:18:21.165248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18555 22:18:21.165699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18557 22:18:21.196965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18559 22:18:21.197499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18560 22:18:21.228090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18561 22:18:21.228530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18563 22:18:21.258393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18565 22:18:21.258923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18566 22:18:21.288837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18568 22:18:21.289416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18569 22:18:21.319586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18570 22:18:21.320050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18572 22:18:21.350024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18573 22:18:21.350477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18575 22:18:21.383042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18577 22:18:21.383588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18578 22:18:21.413824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18580 22:18:21.414345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18581 22:18:21.444254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18582 22:18:21.444665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18584 22:18:21.475240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18585 22:18:21.475655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18587 22:18:21.507075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18588 22:18:21.507500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18590 22:18:21.538975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18591 22:18:21.539366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18593 22:18:21.569709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18595 22:18:21.570142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18596 22:18:21.601183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18597 22:18:21.601580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18599 22:18:21.632295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18601 22:18:21.632850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18602 22:18:21.662350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18604 22:18:21.662892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18605 22:18:21.693129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18607 22:18:21.693658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18608 22:18:21.723308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18609 22:18:21.723775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18611 22:18:21.753799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18612 22:18:21.754263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18614 22:18:21.784973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18615 22:18:21.785422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18617 22:18:21.815956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18618 22:18:21.816407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18620 22:18:21.846269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18622 22:18:21.846779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18623 22:18:21.876163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18624 22:18:21.876639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18626 22:18:21.906167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18627 22:18:21.906549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18629 22:18:21.936766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18631 22:18:21.937178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18632 22:18:21.967298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18634 22:18:21.967790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18635 22:18:21.997599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18636 22:18:21.997941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18638 22:18:22.028160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18640 22:18:22.028715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18641 22:18:22.058946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18642 22:18:22.059398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18644 22:18:22.089409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18645 22:18:22.089803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18647 22:18:22.121164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18649 22:18:22.121723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18650 22:18:22.151210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18651 22:18:22.151640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18653 22:18:22.181104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18655 22:18:22.181613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18656 22:18:22.211384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18658 22:18:22.211899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18659 22:18:22.242126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18661 22:18:22.242654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18662 22:18:22.272203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18664 22:18:22.272786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18665 22:18:22.302227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18666 22:18:22.302712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18668 22:18:22.333370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18670 22:18:22.333921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18671 22:18:22.363296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18672 22:18:22.363701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18674 22:18:22.395529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18675 22:18:22.396003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18677 22:18:22.426762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18678 22:18:22.427199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18680 22:18:22.456692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18682 22:18:22.457208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18683 22:18:22.487102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18685 22:18:22.487725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18686 22:18:22.516914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18687 22:18:22.517312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18689 22:18:22.547551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18690 22:18:22.547956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18692 22:18:22.577847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18694 22:18:22.578373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18695 22:18:22.607698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18696 22:18:22.608149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18698 22:18:22.638527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18700 22:18:22.639101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18701 22:18:22.668971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18703 22:18:22.669449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18704 22:18:22.698958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18706 22:18:22.699437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18707 22:18:22.729236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18708 22:18:22.729618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18710 22:18:22.760286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18712 22:18:22.760769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18713 22:18:22.791244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18714 22:18:22.791643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18716 22:18:22.821019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18718 22:18:22.821579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18719 22:18:22.851956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18721 22:18:22.852507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18722 22:18:22.883778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18724 22:18:22.884336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18725 22:18:22.915685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18726 22:18:22.916095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18728 22:18:22.946496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18730 22:18:22.946911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18731 22:18:22.978446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18733 22:18:22.978901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18734 22:18:23.013781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18736 22:18:23.014253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18737 22:18:23.044919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18739 22:18:23.045353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18740 22:18:23.075881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18741 22:18:23.076325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18743 22:18:23.108179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18745 22:18:23.108560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18746 22:18:23.141313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18748 22:18:23.141810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18749 22:18:23.175445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18751 22:18:23.175844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18752 22:18:23.207815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18753 22:18:23.208164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18755 22:18:23.240422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18756 22:18:23.240909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18758 22:18:23.274098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18760 22:18:23.274560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18761 22:18:23.307305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18763 22:18:23.307824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18764 22:18:23.341822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18765 22:18:23.342261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18767 22:18:23.380288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18769 22:18:23.380876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18770 22:18:23.415040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18771 22:18:23.415518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18773 22:18:23.449019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18774 22:18:23.449483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18776 22:18:23.482865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18777 22:18:23.483331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18779 22:18:23.516106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18780 22:18:23.516542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18782 22:18:23.547179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18783 22:18:23.547642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18785 22:18:23.577304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18787 22:18:23.577780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18788 22:18:23.607755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18789 22:18:23.608121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18791 22:18:23.638804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18793 22:18:23.639475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18794 22:18:23.669346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18796 22:18:23.669891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18797 22:18:23.699603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18799 22:18:23.700093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18800 22:18:23.730002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18801 22:18:23.730413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18803 22:18:23.760586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18804 22:18:23.760979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18806 22:18:23.791855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18808 22:18:23.792350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18809 22:18:23.823411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18810 22:18:23.823781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18812 22:18:23.854102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18813 22:18:23.854460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18815 22:18:23.884657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18816 22:18:23.885039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18818 22:18:23.915693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18820 22:18:23.916209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18821 22:18:23.946024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18822 22:18:23.946422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18824 22:18:23.976379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18825 22:18:23.976761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18827 22:18:24.007372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18829 22:18:24.007964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18830 22:18:24.037641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18832 22:18:24.038135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18833 22:18:24.068459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18834 22:18:24.068840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18836 22:18:24.100008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18838 22:18:24.100355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18839 22:18:24.131196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18840 22:18:24.131650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18842 22:18:24.163187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18844 22:18:24.163730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18845 22:18:24.193957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18846 22:18:24.194339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18848 22:18:24.224417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18850 22:18:24.224897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18851 22:18:24.255411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18852 22:18:24.255809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18854 22:18:24.285716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18855 22:18:24.286126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18857 22:18:24.316186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18859 22:18:24.316725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18860 22:18:24.347115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18862 22:18:24.347647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18863 22:18:24.377784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18864 22:18:24.378205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18866 22:18:24.409380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18867 22:18:24.409799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18869 22:18:24.439583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18870 22:18:24.439984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18872 22:18:24.470025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18873 22:18:24.470379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18875 22:18:24.500102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18876 22:18:24.500469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18878 22:18:24.530819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18879 22:18:24.531195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18881 22:18:24.561149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18883 22:18:24.561515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18884 22:18:24.592088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18886 22:18:24.592477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18887 22:18:24.622408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18889 22:18:24.622924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18890 22:18:24.658908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18892 22:18:24.659394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18893 22:18:24.691638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18894 22:18:24.692052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18896 22:18:24.724346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18898 22:18:24.724811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18899 22:18:24.758437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18901 22:18:24.759014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18902 22:18:24.792434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18903 22:18:24.792898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18905 22:18:24.825289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18907 22:18:24.825857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18908 22:18:24.857688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18909 22:18:24.858034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18911 22:18:24.888913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18913 22:18:24.889234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18914 22:18:24.919496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18916 22:18:24.919944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18917 22:18:24.949925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18919 22:18:24.950350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18920 22:18:24.981220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18921 22:18:24.981644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18923 22:18:25.011828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18925 22:18:25.012386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18926 22:18:25.042501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18928 22:18:25.043057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18929 22:18:25.073359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18930 22:18:25.073754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18932 22:18:25.104434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18934 22:18:25.104913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18935 22:18:25.135340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18936 22:18:25.135737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18938 22:18:25.165795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18940 22:18:25.166395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18941 22:18:25.196558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18942 22:18:25.197017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18944 22:18:25.227259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18946 22:18:25.227788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18947 22:18:25.258228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18948 22:18:25.258686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18950 22:18:25.290047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18951 22:18:25.290481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18953 22:18:25.321586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18955 22:18:25.322105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18956 22:18:25.353540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18957 22:18:25.354014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18959 22:18:25.385465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18961 22:18:25.385996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18962 22:18:25.416880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18963 22:18:25.417308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18965 22:18:25.449009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18966 22:18:25.449463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18968 22:18:25.480730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18970 22:18:25.481374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18971 22:18:25.511638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18972 22:18:25.512022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18974 22:18:25.543630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18976 22:18:25.544192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18977 22:18:25.575169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18978 22:18:25.575622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18980 22:18:25.607145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18982 22:18:25.607581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18983 22:18:25.638717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18984 22:18:25.639125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18986 22:18:25.679445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18987 22:18:25.680691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18989 22:18:25.718830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18990 22:18:25.719346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18992 22:18:25.751771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18993 22:18:25.752202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18995 22:18:25.786025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18996 22:18:25.786518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18998 22:18:25.820717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
19000 22:18:25.821376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
19001 22:18:25.853695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
19003 22:18:25.854060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
19004 22:18:25.887362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
19005 22:18:25.887897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
19007 22:18:25.919443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
19009 22:18:25.919908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
19010 22:18:25.952633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
19012 22:18:25.953271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
19013 22:18:25.986194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
19014 22:18:25.986671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
19016 22:18:26.019412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
19017 22:18:26.019899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
19019 22:18:26.051786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
19020 22:18:26.052269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
19022 22:18:26.083818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
19024 22:18:26.084368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
19025 22:18:26.116524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
19027 22:18:26.117068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
19028 22:18:26.150076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
19029 22:18:26.150506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
19031 22:18:26.183676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
19032 22:18:26.184105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
19034 22:18:26.216188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
19035 22:18:26.216665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
19037 22:18:26.248470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
19039 22:18:26.249026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
19040 22:18:26.279820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
19042 22:18:26.280385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
19043 22:18:26.310797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
19045 22:18:26.311337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
19046 22:18:26.341480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
19048 22:18:26.342062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
19049 22:18:26.372250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
19051 22:18:26.372682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
19052 22:18:26.405718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
19054 22:18:26.406288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
19055 22:18:26.437807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
19057 22:18:26.438355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
19058 22:18:26.469747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
19059 22:18:26.470184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
19061 22:18:26.501688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
19062 22:18:26.502166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
19064 22:18:26.533689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
19065 22:18:26.534145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
19067 22:18:26.566301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
19069 22:18:26.566866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
19070 22:18:26.599417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
19072 22:18:26.599981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
19073 22:18:26.632164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
19075 22:18:26.632615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
19076 22:18:26.665964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
19077 22:18:26.666464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
19079 22:18:26.699236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
19080 22:18:26.699724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
19082 22:18:26.731646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
19083 22:18:26.732128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
19085 22:18:26.764760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
19087 22:18:26.765316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
19088 22:18:26.798108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
19089 22:18:26.798580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
19091 22:18:26.831813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
19092 22:18:26.832285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
19094 22:18:26.865682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
19096 22:18:26.866224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
19097 22:18:26.898466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
19099 22:18:26.899094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
19100 22:18:26.931017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
19101 22:18:26.931564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
19103 22:18:26.962747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
19104 22:18:26.963276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
19106 22:18:26.995948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
19107 22:18:26.996413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
19109 22:18:27.028494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
19111 22:18:27.028912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
19112 22:18:27.060616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
19113 22:18:27.061060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
19115 22:18:27.093084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
19116 22:18:27.093501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
19118 22:18:27.124452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
19119 22:18:27.124931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
19121 22:18:27.156587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
19122 22:18:27.157024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
19124 22:18:27.189130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
19126 22:18:27.189632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
19127 22:18:27.221324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
19129 22:18:27.221827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
19130 22:18:27.253481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
19132 22:18:27.254043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
19133 22:18:27.285704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
19135 22:18:27.286310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
19136 22:18:27.318672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
19137 22:18:27.319189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19139 22:18:27.351584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19140 22:18:27.352070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19142 22:18:27.388480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19143 22:18:27.388990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19145 22:18:27.423210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19146 22:18:27.423673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19148 22:18:27.457452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19150 22:18:27.457974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19151 22:18:27.490917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19153 22:18:27.491360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19154 22:18:27.523669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19155 22:18:27.524062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19157 22:18:27.555783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19158 22:18:27.556204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19160 22:18:27.589168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19161 22:18:27.589680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19163 22:18:27.621306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19164 22:18:27.621835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19166 22:18:27.652416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19168 22:18:27.653125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19169 22:18:27.684353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19170 22:18:27.684712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19172 22:18:27.717279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19174 22:18:27.717724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19175 22:18:27.749951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19176 22:18:27.750295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19178 22:18:27.783422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19179 22:18:27.783780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19181 22:18:27.814551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19183 22:18:27.815014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19184 22:18:27.847267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19185 22:18:27.847754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19187 22:18:27.878453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19189 22:18:27.878889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19190 22:18:27.912475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19192 22:18:27.912923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19193 22:18:27.945323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19194 22:18:27.945769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19196 22:18:27.977450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19197 22:18:27.977900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19199 22:18:28.008884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19200 22:18:28.009280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19202 22:18:28.040123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19204 22:18:28.040676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19205 22:18:28.072880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19207 22:18:28.073615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19208 22:18:28.104616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19209 22:18:28.105056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19211 22:18:28.136813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19212 22:18:28.137163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19214 22:18:28.175638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19215 22:18:28.175989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19217 22:18:28.219692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19218 22:18:28.220153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19220 22:18:28.260392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19222 22:18:28.260836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19223 22:18:28.293876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19224 22:18:28.294320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19226 22:18:28.328195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19227 22:18:28.328573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19229 22:18:28.361118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19231 22:18:28.361688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19232 22:18:28.392021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19233 22:18:28.392398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19235 22:18:28.428376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19236 22:18:28.428832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19238 22:18:28.471030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19239 22:18:28.471390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19241 22:18:28.503493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19242 22:18:28.503843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19244 22:18:28.538190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19245 22:18:28.538597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19247 22:18:28.571132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19249 22:18:28.571686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19250 22:18:28.603470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19252 22:18:28.604041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19253 22:18:28.635857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19254 22:18:28.636409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19256 22:18:28.667855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19257 22:18:28.668409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19259 22:18:28.713233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19260 22:18:28.713687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19262 22:18:28.744005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19263 22:18:28.744465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19265 22:18:28.774195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19266 22:18:28.774605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19268 22:18:28.808322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19269 22:18:28.808765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19271 22:18:28.839719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19273 22:18:28.840105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19274 22:18:28.871657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19275 22:18:28.872070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19277 22:18:28.903258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19278 22:18:28.903674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19280 22:18:28.935360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19282 22:18:28.935935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19283 22:18:28.967076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19284 22:18:28.967356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19286 22:18:29.003946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19287 22:18:29.004280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19289 22:18:29.036888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19290 22:18:29.037334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19292 22:18:29.069333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19293 22:18:29.069782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19295 22:18:29.110919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19297 22:18:29.111367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19298 22:18:29.141378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19299 22:18:29.141791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19301 22:18:29.172957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19302 22:18:29.173369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19304 22:18:29.204110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19306 22:18:29.204550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19307 22:18:29.235216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19308 22:18:29.235620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19310 22:18:29.265778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19311 22:18:29.266170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19313 22:18:29.296358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19314 22:18:29.296756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19316 22:18:29.327381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19317 22:18:29.327789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19319 22:18:29.358940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19321 22:18:29.359382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19322 22:18:29.391922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19323 22:18:29.392351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19325 22:18:29.423486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19326 22:18:29.423950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19328 22:18:29.454759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19330 22:18:29.455313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19331 22:18:29.486208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19333 22:18:29.486769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19334 22:18:29.520168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19335 22:18:29.520579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19337 22:18:29.551485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19338 22:18:29.551928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19340 22:18:29.583985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19341 22:18:29.584430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19343 22:18:29.615704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19344 22:18:29.616160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19346 22:18:29.649347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19347 22:18:29.649844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19349 22:18:29.682105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19350 22:18:29.682583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19352 22:18:29.715540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19354 22:18:29.716117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19355 22:18:29.758266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19357 22:18:29.758831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19358 22:18:29.797115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19360 22:18:29.797695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19361 22:18:29.834472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19363 22:18:29.835034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19364 22:18:29.868464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19365 22:18:29.868916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19367 22:18:29.901858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19369 22:18:29.902415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19370 22:18:29.935822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19371 22:18:29.936297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19373 22:18:29.969407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19375 22:18:29.969781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19376 22:18:30.002253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19378 22:18:30.002573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19379 22:18:30.035808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19380 22:18:30.036176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19382 22:18:30.069499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19383 22:18:30.069871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19385 22:18:30.102280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19387 22:18:30.102763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19388 22:18:30.136671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19389 22:18:30.137046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19391 22:18:30.168711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19392 22:18:30.169126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19394 22:18:30.199681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19396 22:18:30.200116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19397 22:18:30.230540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19399 22:18:30.230977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19400 22:18:30.262507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19402 22:18:30.262945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19403 22:18:30.293898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19404 22:18:30.294309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19406 22:18:30.325025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19408 22:18:30.325460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19409 22:18:30.356534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19410 22:18:30.356937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19412 22:18:30.388090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19413 22:18:30.388508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19415 22:18:30.421020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19416 22:18:30.421484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19418 22:18:30.453400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19419 22:18:30.453777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19421 22:18:30.486360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19423 22:18:30.486807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19424 22:18:30.520245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19426 22:18:30.520768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19427 22:18:30.555357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19428 22:18:30.555699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19430 22:18:30.591308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19432 22:18:30.591841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19433 22:18:30.637376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19434 22:18:30.637879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19436 22:18:30.671365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19437 22:18:30.671852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19439 22:18:30.703632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19440 22:18:30.703988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19442 22:18:30.739173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19443 22:18:30.739508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19445 22:18:30.771495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19446 22:18:30.771883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19448 22:18:30.802364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19450 22:18:30.802898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19451 22:18:30.837348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19452 22:18:30.837826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19454 22:18:30.870619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19456 22:18:30.871089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19457 22:18:30.903508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19458 22:18:30.903874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19460 22:18:30.936438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19461 22:18:30.936786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19463 22:18:30.969712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19464 22:18:30.970072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19466 22:18:31.003673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19467 22:18:31.004019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19469 22:18:31.036737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19470 22:18:31.037085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19472 22:18:31.070474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19474 22:18:31.070925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19475 22:18:31.113608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19476 22:18:31.114107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19478 22:18:31.149310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19479 22:18:31.149756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19481 22:18:31.182191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19482 22:18:31.182538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19484 22:18:31.214588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19485 22:18:31.214964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19487 22:18:31.245832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19489 22:18:31.246333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19490 22:18:31.278439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19492 22:18:31.278922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19493 22:18:31.310553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19494 22:18:31.310897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19496 22:18:31.342511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19498 22:18:31.342957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19499 22:18:31.374692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19500 22:18:31.375040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19502 22:18:31.407484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19503 22:18:31.407966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19505 22:18:31.440195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19507 22:18:31.440858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19508 22:18:31.473752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19510 22:18:31.474299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19511 22:18:31.509163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19512 22:18:31.509450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19514 22:18:31.548330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19515 22:18:31.548660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19517 22:18:31.592388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19519 22:18:31.592753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19520 22:18:31.625859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19521 22:18:31.626214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19523 22:18:31.658506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19525 22:18:31.658938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19526 22:18:31.693026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19527 22:18:31.693475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19529 22:18:31.723606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19530 22:18:31.724035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19532 22:18:31.754926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19534 22:18:31.755467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19535 22:18:31.785589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19536 22:18:31.786050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19538 22:18:31.820319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19539 22:18:31.820768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19541 22:18:31.851775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19542 22:18:31.852212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19544 22:18:31.882817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19546 22:18:31.883242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19547 22:18:31.913421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19549 22:18:31.913861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19550 22:18:31.943995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19551 22:18:31.944456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19553 22:18:31.974972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19554 22:18:31.975442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19556 22:18:32.005656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19557 22:18:32.006129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19559 22:18:32.036422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19560 22:18:32.036892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19562 22:18:32.067610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19563 22:18:32.068055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19565 22:18:32.099010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19567 22:18:32.099582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19568 22:18:32.133068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19569 22:18:32.133524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19571 22:18:32.163731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19573 22:18:32.164268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19574 22:18:32.197440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19576 22:18:32.198025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19577 22:18:32.231944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19578 22:18:32.232432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19580 22:18:32.274732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19581 22:18:32.275220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19583 22:18:32.305791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19585 22:18:32.306242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19586 22:18:32.336531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19587 22:18:32.337005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19589 22:18:32.367856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19591 22:18:32.368398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19592 22:18:32.398157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19593 22:18:32.398599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19595 22:18:32.428564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19597 22:18:32.429099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19598 22:18:32.459607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19599 22:18:32.460072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19601 22:18:32.490100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19602 22:18:32.490570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19604 22:18:32.521030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19605 22:18:32.521492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19607 22:18:32.551655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19608 22:18:32.552122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19610 22:18:32.582480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19612 22:18:32.583028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19613 22:18:32.614019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19614 22:18:32.614482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19616 22:18:32.645125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19617 22:18:32.645590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19619 22:18:32.675727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19620 22:18:32.676182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19622 22:18:32.706144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19623 22:18:32.706556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19625 22:18:32.737293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19626 22:18:32.737767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19628 22:18:32.768055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19630 22:18:32.768595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19631 22:18:32.799278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19633 22:18:32.799803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19634 22:18:32.829629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19635 22:18:32.830102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19637 22:18:32.860068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19639 22:18:32.860680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19640 22:18:32.890070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19642 22:18:32.890623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19643 22:18:32.920421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19644 22:18:32.920859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19646 22:18:32.951432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19648 22:18:32.951869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19649 22:18:32.982226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19651 22:18:32.982677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19652 22:18:33.014377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19654 22:18:33.014836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19655 22:18:33.047109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19657 22:18:33.047555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19658 22:18:33.083362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19659 22:18:33.083742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19661 22:18:33.115721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19662 22:18:33.116112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19664 22:18:33.146152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19665 22:18:33.146511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19667 22:18:33.178754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19668 22:18:33.179099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19670 22:18:33.213201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19671 22:18:33.213546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19673 22:18:33.258521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19675 22:18:33.258936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19676 22:18:33.291027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19677 22:18:33.291391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19679 22:18:33.323620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19680 22:18:33.323989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19682 22:18:33.356330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19683 22:18:33.356680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19685 22:18:33.389295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19686 22:18:33.389643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19688 22:18:33.422104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19690 22:18:33.422516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19691 22:18:33.455198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19692 22:18:33.455549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19694 22:18:33.487777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19696 22:18:33.488274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19697 22:18:33.519445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19699 22:18:33.519942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19700 22:18:33.553071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19701 22:18:33.553439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19703 22:18:33.586037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19704 22:18:33.586383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19706 22:18:33.618464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19708 22:18:33.618948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19709 22:18:33.651875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19710 22:18:33.652230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19712 22:18:33.684604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19713 22:18:33.684965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19715 22:18:33.720011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19716 22:18:33.720362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19718 22:18:33.757594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19720 22:18:33.758068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19721 22:18:33.791861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19722 22:18:33.792466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19724 22:18:33.825076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19725 22:18:33.825574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19727 22:18:33.857616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19729 22:18:33.858228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19730 22:18:33.889687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19731 22:18:33.890097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19733 22:18:33.923985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19735 22:18:33.924511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19736 22:18:33.967878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19737 22:18:33.968363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19739 22:18:34.001373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19741 22:18:34.001830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19742 22:18:34.034063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19743 22:18:34.034560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19745 22:18:34.067563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19747 22:18:34.068020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19748 22:18:34.100971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19750 22:18:34.101422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19751 22:18:34.134278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19752 22:18:34.134744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19754 22:18:34.167512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19755 22:18:34.167978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19757 22:18:34.200899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19758 22:18:34.201314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19760 22:18:34.233618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19762 22:18:34.234251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19763 22:18:34.266388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19765 22:18:34.266848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19766 22:18:34.300408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19767 22:18:34.300900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19769 22:18:34.335302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19770 22:18:34.335881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19772 22:18:34.368087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19773 22:18:34.368561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19775 22:18:34.400402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19777 22:18:34.400864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19778 22:18:34.431497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19780 22:18:34.432049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19781 22:18:34.461880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19782 22:18:34.462356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19784 22:18:34.492450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19785 22:18:34.492889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19787 22:18:34.523624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19788 22:18:34.524086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19790 22:18:34.553606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19791 22:18:34.554093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19793 22:18:34.584938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19794 22:18:34.585386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19796 22:18:34.616505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19797 22:18:34.616913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19799 22:18:34.647711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19800 22:18:34.648162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19802 22:18:34.678388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19804 22:18:34.678840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19805 22:18:34.709276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19807 22:18:34.709702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19808 22:18:34.740253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19809 22:18:34.740744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19811 22:18:34.771381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19812 22:18:34.771821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19814 22:18:34.801735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19815 22:18:34.802186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19817 22:18:34.832864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19818 22:18:34.833335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19820 22:18:34.864182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19821 22:18:34.864632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19823 22:18:34.895667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19825 22:18:34.896199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19826 22:18:34.926557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19828 22:18:34.927128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19829 22:18:34.958893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19831 22:18:34.959624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19832 22:18:34.988424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19834 22:18:34.988988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19835 22:18:35.018956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19836 22:18:35.019417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19838 22:18:35.049946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19839 22:18:35.050424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19841 22:18:35.080446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19842 22:18:35.080847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19844 22:18:35.111715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19846 22:18:35.112286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19847 22:18:35.142646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19849 22:18:35.143193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19850 22:18:35.173932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19851 22:18:35.174378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19853 22:18:35.205232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19854 22:18:35.205699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19856 22:18:35.236240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19858 22:18:35.236798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19859 22:18:35.267408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19861 22:18:35.267949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19862 22:18:35.299868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19863 22:18:35.300321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19865 22:18:35.331598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19866 22:18:35.332040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19868 22:18:35.363224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19870 22:18:35.363754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19871 22:18:35.393846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19873 22:18:35.394433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19874 22:18:35.424354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19876 22:18:35.424904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19877 22:18:35.455337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19879 22:18:35.455869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19880 22:18:35.487201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19882 22:18:35.487830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19883 22:18:35.519477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19884 22:18:35.519927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19886 22:18:35.551067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19887 22:18:35.551525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19889 22:18:35.581932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19890 22:18:35.582369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19892 22:18:35.613264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19894 22:18:35.613809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19895 22:18:35.643510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19896 22:18:35.643965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19898 22:18:35.674133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19900 22:18:35.674672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19901 22:18:35.705003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19902 22:18:35.705467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19904 22:18:35.735702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19906 22:18:35.736323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19907 22:18:35.766177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19909 22:18:35.766710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19910 22:18:35.798283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19912 22:18:35.798916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19913 22:18:35.829158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19914 22:18:35.829629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19916 22:18:35.861128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19917 22:18:35.861698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19919 22:18:35.893054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19921 22:18:35.893626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19922 22:18:35.925486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19923 22:18:35.925970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19925 22:18:35.956443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19927 22:18:35.956972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19928 22:18:35.987249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19929 22:18:35.987708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19931 22:18:36.018086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19932 22:18:36.018546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19934 22:18:36.048808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19935 22:18:36.049189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19937 22:18:36.079629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19938 22:18:36.080045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19940 22:18:36.110945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19941 22:18:36.111410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19943 22:18:36.141800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19944 22:18:36.142253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19946 22:18:36.173057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19948 22:18:36.173690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19949 22:18:36.204176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19950 22:18:36.204646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19952 22:18:36.235490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19954 22:18:36.236081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19955 22:18:36.267366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19957 22:18:36.267932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19958 22:18:36.299431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19959 22:18:36.299844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19961 22:18:36.330307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19963 22:18:36.330865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19964 22:18:36.360969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19965 22:18:36.361391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19967 22:18:36.396756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19968 22:18:36.397293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19970 22:18:36.431746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19971 22:18:36.432156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19973 22:18:36.465918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19974 22:18:36.466344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19976 22:18:36.503159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19977 22:18:36.503601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19979 22:18:36.541550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19981 22:18:36.542135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19982 22:18:36.574976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19984 22:18:36.575488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19985 22:18:36.608130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19987 22:18:36.608609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19988 22:18:36.641271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19989 22:18:36.641652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19991 22:18:36.673599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19992 22:18:36.673953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19994 22:18:36.706032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19995 22:18:36.706385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19997 22:18:36.741867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19998 22:18:36.742333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
20000 22:18:36.772145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
20002 22:18:36.772572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
20003 22:18:36.802925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
20004 22:18:36.803345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
20006 22:18:36.833938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
20008 22:18:36.834512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
20009 22:18:36.864470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
20010 22:18:36.864920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
20012 22:18:36.895166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
20013 22:18:36.895626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
20015 22:18:36.925905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
20016 22:18:36.926352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
20018 22:18:36.956896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
20019 22:18:36.957350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
20021 22:18:36.987788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
20022 22:18:36.988222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
20024 22:18:37.019185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
20025 22:18:37.019626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
20027 22:18:37.049989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
20028 22:18:37.050464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
20030 22:18:37.081195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
20031 22:18:37.081673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
20033 22:18:37.112328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
20034 22:18:37.112771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
20036 22:18:37.143957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
20037 22:18:37.144388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
20039 22:18:37.175274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
20040 22:18:37.175703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
20042 22:18:37.206535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
20044 22:18:37.207086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
20045 22:18:37.237367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
20046 22:18:37.237799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
20048 22:18:37.267371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
20049 22:18:37.267796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
20051 22:18:37.297776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
20052 22:18:37.298231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
20054 22:18:37.328810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
20055 22:18:37.329257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
20057 22:18:37.359173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
20058 22:18:37.359613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
20060 22:18:37.397126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
20061 22:18:37.397597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
20063 22:18:37.427266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
20065 22:18:37.427746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
20066 22:18:37.458064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
20067 22:18:37.458447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
20069 22:18:37.488406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
20071 22:18:37.488864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
20072 22:18:37.518386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
20074 22:18:37.518957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
20075 22:18:37.551251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
20077 22:18:37.551875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
20078 22:18:37.581923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
20079 22:18:37.582332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
20081 22:18:37.612664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
20082 22:18:37.613066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
20084 22:18:37.644110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
20085 22:18:37.644482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
20087 22:18:37.675293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
20089 22:18:37.675739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
20090 22:18:37.705941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
20092 22:18:37.706297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
20093 22:18:37.737135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
20094 22:18:37.737482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
20096 22:18:37.767730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
20097 22:18:37.768046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
20099 22:18:37.798834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
20100 22:18:37.799213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
20102 22:18:37.829827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
20103 22:18:37.830292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
20105 22:18:37.860647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
20107 22:18:37.861184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
20108 22:18:37.891704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
20110 22:18:37.892165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
20111 22:18:37.922046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
20112 22:18:37.922456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
20114 22:18:37.952531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
20115 22:18:37.952937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
20117 22:18:37.982905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
20119 22:18:37.983355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
20120 22:18:38.012723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
20122 22:18:38.013264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
20123 22:18:38.043300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
20125 22:18:38.043878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
20126 22:18:38.073704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
20127 22:18:38.074087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
20129 22:18:38.103779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
20130 22:18:38.104150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
20132 22:18:38.134648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
20133 22:18:38.135069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
20135 22:18:38.164649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
20136 22:18:38.165030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
20138 22:18:38.195115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20140 22:18:38.195657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20141 22:18:38.225069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20143 22:18:38.225560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20144 22:18:38.255541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20146 22:18:38.256072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20147 22:18:38.285278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20149 22:18:38.285787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20150 22:18:38.316221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20152 22:18:38.316704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20153 22:18:38.347259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20155 22:18:38.347735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20156 22:18:38.377458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20158 22:18:38.377925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20159 22:18:38.407440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20160 22:18:38.407758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20162 22:18:38.437748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20164 22:18:38.438211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20165 22:18:38.468025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20166 22:18:38.468404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20168 22:18:38.498135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20170 22:18:38.498578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20171 22:18:38.528397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20173 22:18:38.528869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20174 22:18:38.558797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20176 22:18:38.559353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20177 22:18:38.588995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20178 22:18:38.589417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20180 22:18:38.620387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20181 22:18:38.620880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20183 22:18:38.651226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20185 22:18:38.651684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20186 22:18:38.681561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20187 22:18:38.682051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20189 22:18:38.715246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20190 22:18:38.715734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20192 22:18:38.747048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20193 22:18:38.747481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20195 22:18:38.779989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20197 22:18:38.780345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20198 22:18:38.811273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20199 22:18:38.811700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20201 22:18:38.843299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20203 22:18:38.843905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20204 22:18:38.877370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20205 22:18:38.877891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20207 22:18:38.908943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20209 22:18:38.909580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20210 22:18:38.942193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20211 22:18:38.942639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20213 22:18:38.974490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20215 22:18:38.975111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20216 22:18:39.005074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20217 22:18:39.005517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20219 22:18:39.036195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20221 22:18:39.036627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20222 22:18:39.067279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20224 22:18:39.067833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20225 22:18:39.098525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20227 22:18:39.099134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20228 22:18:39.129451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20229 22:18:39.129919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20231 22:18:39.160011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20233 22:18:39.160549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20234 22:18:39.190782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20235 22:18:39.191170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20237 22:18:39.220628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20238 22:18:39.220898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20240 22:18:39.251134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20241 22:18:39.251384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20243 22:18:39.281714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20244 22:18:39.282072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20246 22:18:39.312941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20248 22:18:39.313394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20249 22:18:39.343594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20250 22:18:39.343993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20252 22:18:39.374005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20254 22:18:39.374444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20255 22:18:39.404415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20256 22:18:39.404814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20258 22:18:39.435356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20259 22:18:39.435747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20261 22:18:39.467027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20262 22:18:39.467433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20264 22:18:39.497727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20265 22:18:39.498155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20267 22:18:39.528577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20268 22:18:39.528981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20270 22:18:39.561178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20272 22:18:39.561765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20273 22:18:39.596765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20274 22:18:39.597208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20276 22:18:39.630004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20278 22:18:39.630615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20279 22:18:39.664232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20280 22:18:39.664704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20282 22:18:39.697294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20283 22:18:39.697760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20285 22:18:39.733595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20287 22:18:39.734050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20288 22:18:39.764233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20290 22:18:39.764779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20291 22:18:39.795235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20293 22:18:39.795770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20294 22:18:39.826183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20295 22:18:39.826647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20297 22:18:39.857895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20298 22:18:39.858389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20300 22:18:39.889463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20302 22:18:39.890092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20303 22:18:39.919894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20304 22:18:39.920357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20306 22:18:39.950537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20308 22:18:39.951069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20309 22:18:39.981408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20310 22:18:39.981857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20312 22:18:40.012828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20314 22:18:40.013246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20315 22:18:40.044198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20317 22:18:40.044640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20318 22:18:40.075509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20319 22:18:40.075984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20321 22:18:40.106554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20323 22:18:40.106989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20324 22:18:40.137926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20325 22:18:40.138339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20327 22:18:40.168131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20328 22:18:40.168520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20330 22:18:40.198487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20332 22:18:40.198913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20333 22:18:40.229098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20335 22:18:40.229527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20336 22:18:40.259351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20337 22:18:40.259755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20339 22:18:40.290099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20340 22:18:40.290520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20342 22:18:40.321227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20343 22:18:40.321631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20345 22:18:40.351562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20346 22:18:40.351967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20348 22:18:40.383241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20349 22:18:40.383723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20351 22:18:40.413435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20352 22:18:40.413801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20354 22:18:40.443534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20355 22:18:40.443989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20357 22:18:40.475369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20359 22:18:40.475894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20360 22:18:40.506059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20361 22:18:40.506511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20363 22:18:40.536132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20364 22:18:40.536565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20366 22:18:40.567009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20367 22:18:40.567456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20369 22:18:40.597824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20370 22:18:40.598272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20372 22:18:40.628552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20373 22:18:40.628956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20375 22:18:40.659149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20376 22:18:40.659603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20378 22:18:40.689844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20379 22:18:40.690304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20381 22:18:40.720352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20383 22:18:40.720897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20384 22:18:40.751045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20386 22:18:40.751610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20387 22:18:40.781283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20389 22:18:40.781720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20390 22:18:40.811770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20391 22:18:40.812169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20393 22:18:40.842453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20395 22:18:40.843028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20396 22:18:40.875063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20398 22:18:40.875544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20399 22:18:40.905183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20400 22:18:40.905551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20402 22:18:40.935102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20403 22:18:40.935457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20405 22:18:40.965665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20406 22:18:40.966019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20408 22:18:40.995256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20409 22:18:40.995612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20411 22:18:41.025536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20412 22:18:41.025903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20414 22:18:41.055671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20415 22:18:41.056028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20417 22:18:41.087499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20418 22:18:41.087957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20420 22:18:41.118533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20422 22:18:41.118978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20423 22:18:41.148584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20425 22:18:41.149063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20426 22:18:41.179149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20427 22:18:41.179514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20429 22:18:41.209093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20431 22:18:41.209607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20432 22:18:41.241163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20434 22:18:41.241731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20435 22:18:41.274868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20436 22:18:41.275365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20438 22:18:41.306533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20439 22:18:41.306926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20441 22:18:41.336710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20442 22:18:41.337094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20444 22:18:41.366925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20446 22:18:41.367422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20447 22:18:41.396998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20448 22:18:41.397515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20450 22:18:41.430122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20451 22:18:41.430579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20453 22:18:41.461590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20455 22:18:41.462176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20456 22:18:41.492571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20457 22:18:41.493022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20459 22:18:41.523523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20460 22:18:41.523988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20462 22:18:41.554358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20464 22:18:41.554704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20465 22:18:41.585920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20466 22:18:41.586204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20468 22:18:41.617303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20469 22:18:41.617584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20471 22:18:41.647984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20472 22:18:41.648328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20474 22:18:41.679475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20475 22:18:41.679816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20477 22:18:41.710684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20478 22:18:41.711050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20480 22:18:41.741043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20481 22:18:41.741388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20483 22:18:41.771746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20484 22:18:41.772100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20486 22:18:41.803012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20487 22:18:41.803359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20489 22:18:41.833848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20490 22:18:41.834192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20492 22:18:41.865554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20494 22:18:41.865969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20495 22:18:41.896346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20496 22:18:41.896696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20498 22:18:41.927314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20499 22:18:41.927653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20501 22:18:41.957892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20502 22:18:41.958235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20504 22:18:41.988188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20505 22:18:41.988603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20507 22:18:42.019921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20509 22:18:42.020366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20510 22:18:42.050847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20511 22:18:42.051244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20513 22:18:42.081524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20515 22:18:42.081967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20516 22:18:42.113345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20517 22:18:42.113769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20519 22:18:42.143822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20520 22:18:42.144233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20522 22:18:42.174218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20523 22:18:42.174624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20525 22:18:42.204657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20526 22:18:42.205065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20528 22:18:42.235059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20529 22:18:42.235462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20531 22:18:42.265349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20532 22:18:42.265751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20534 22:18:42.296710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20535 22:18:42.297128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20537 22:18:42.327458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20538 22:18:42.327869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20540 22:18:42.357919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20541 22:18:42.358331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20543 22:18:42.388298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20544 22:18:42.388700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20546 22:18:42.419087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20547 22:18:42.419499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20549 22:18:42.450134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20550 22:18:42.450565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20552 22:18:42.480747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20553 22:18:42.481143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20555 22:18:42.531646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20556 22:18:42.532080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20558 22:18:42.566745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20559 22:18:42.567124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20561 22:18:42.596667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20562 22:18:42.597034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20564 22:18:42.627419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20565 22:18:42.627836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20567 22:18:42.657907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20568 22:18:42.658307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20570 22:18:42.688456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20571 22:18:42.688860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20573 22:18:42.718879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20574 22:18:42.719288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20576 22:18:42.749633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20577 22:18:42.750064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20579 22:18:42.779562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20580 22:18:42.779923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20582 22:18:42.809159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20584 22:18:42.809604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20585 22:18:42.839393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20586 22:18:42.839759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20588 22:18:42.870273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20590 22:18:42.870863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20591 22:18:42.900285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20592 22:18:42.900750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20594 22:18:42.930437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20596 22:18:42.930855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20597 22:18:42.960566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20598 22:18:42.960969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20600 22:18:42.990785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20601 22:18:42.991209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20603 22:18:43.020842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20604 22:18:43.021332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20606 22:18:43.057185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20608 22:18:43.057639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20609 22:18:43.089239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20611 22:18:43.089693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20612 22:18:43.121184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20614 22:18:43.121546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20615 22:18:43.152147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20616 22:18:43.152560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20618 22:18:43.183030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20619 22:18:43.183505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20621 22:18:43.216966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20622 22:18:43.217434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20624 22:18:43.250076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20626 22:18:43.250800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20627 22:18:43.280627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20628 22:18:43.281090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20630 22:18:43.315750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20632 22:18:43.316383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20633 22:18:43.346847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20635 22:18:43.347488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20636 22:18:43.379060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20638 22:18:43.379667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20639 22:18:43.412169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20640 22:18:43.412632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20642 22:18:43.449352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20643 22:18:43.449891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20645 22:18:43.481992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20646 22:18:43.482480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20648 22:18:43.516011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20649 22:18:43.516556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20651 22:18:43.550067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20652 22:18:43.550527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20654 22:18:43.581301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20655 22:18:43.581660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20657 22:18:43.612776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20659 22:18:43.613210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20660 22:18:43.644768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20662 22:18:43.645176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20663 22:18:43.676483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20665 22:18:43.676931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20666 22:18:43.707316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20667 22:18:43.707667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20669 22:18:43.740168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20671 22:18:43.740891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20672 22:18:43.770953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20673 22:18:43.771315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20675 22:18:43.801435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20676 22:18:43.801896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20678 22:18:43.832324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20679 22:18:43.832698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20681 22:18:43.863033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20683 22:18:43.863531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20684 22:18:43.895592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20686 22:18:43.896153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20687 22:18:43.927689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20689 22:18:43.928161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20690 22:18:43.964106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20691 22:18:43.964581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20693 22:18:43.995655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20694 22:18:43.996126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20696 22:18:44.027801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20698 22:18:44.028526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20699 22:18:44.060098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20700 22:18:44.060636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20702 22:18:44.091279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20703 22:18:44.091755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20705 22:18:44.120939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20706 22:18:44.121306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20708 22:18:44.151351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20709 22:18:44.151710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20711 22:18:44.181316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20712 22:18:44.181680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20714 22:18:44.211310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20715 22:18:44.211659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20717 22:18:44.241920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20718 22:18:44.242275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20720 22:18:44.271778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20721 22:18:44.272139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20723 22:18:44.301684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20724 22:18:44.302051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20726 22:18:44.332453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20727 22:18:44.332812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20729 22:18:44.362496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20731 22:18:44.362973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20732 22:18:44.392391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20733 22:18:44.392841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20735 22:18:44.423195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20736 22:18:44.423568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20738 22:18:44.454026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20739 22:18:44.454453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20741 22:18:44.485696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20743 22:18:44.486145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20744 22:18:44.516219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20745 22:18:44.516616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20747 22:18:44.547125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20748 22:18:44.547584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20750 22:18:44.577450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20751 22:18:44.577924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20753 22:18:44.608147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20754 22:18:44.608543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20756 22:18:44.638814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20757 22:18:44.639206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20759 22:18:44.669163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20760 22:18:44.669616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20762 22:18:44.699576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20764 22:18:44.700184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20765 22:18:44.730076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20766 22:18:44.730533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20768 22:18:44.760561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20769 22:18:44.760953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20771 22:18:44.791500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20772 22:18:44.791947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20774 22:18:44.821929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20775 22:18:44.822361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20777 22:18:44.852088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20778 22:18:44.852523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20780 22:18:44.883252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20782 22:18:44.883763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20783 22:18:44.913782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20784 22:18:44.914221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20786 22:18:44.944549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20787 22:18:44.944982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20789 22:18:44.975260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20790 22:18:44.975689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20792 22:18:45.005896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20794 22:18:45.006343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20795 22:18:45.036557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20796 22:18:45.036948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20798 22:18:45.067500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20799 22:18:45.067894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20801 22:18:45.098021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20802 22:18:45.098477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20804 22:18:45.128980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20806 22:18:45.129500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20807 22:18:45.138606 <47>[ 187.984217] systemd-journald[109]: Sent WATCHDOG=1 notification.
20808 22:18:45.164248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20809 22:18:45.164673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20811 22:18:45.194689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20813 22:18:45.195218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20814 22:18:45.224906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20815 22:18:45.225344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20817 22:18:45.255187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20818 22:18:45.255645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20820 22:18:45.285609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20822 22:18:45.286150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20823 22:18:45.316696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20824 22:18:45.317134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20826 22:18:45.347157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20827 22:18:45.347549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20829 22:18:45.377158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20831 22:18:45.377681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20832 22:18:45.407407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20833 22:18:45.407859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20835 22:18:45.438191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20837 22:18:45.438765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20838 22:18:45.468833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20839 22:18:45.469183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20841 22:18:45.499260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20843 22:18:45.499672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20844 22:18:45.529897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20846 22:18:45.530305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20847 22:18:45.560652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20848 22:18:45.560991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20850 22:18:45.590924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20851 22:18:45.591278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20853 22:18:45.621092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20854 22:18:45.621422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20856 22:18:45.651529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20857 22:18:45.651883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20859 22:18:45.681567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20860 22:18:45.681914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20862 22:18:45.711512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20864 22:18:45.711938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20865 22:18:45.741427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20866 22:18:45.741773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20868 22:18:45.771382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20869 22:18:45.771719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20871 22:18:45.801262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20872 22:18:45.801581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20874 22:18:45.831388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20875 22:18:45.831727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20877 22:18:45.862036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20878 22:18:45.862375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20880 22:18:45.891723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20881 22:18:45.892062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20883 22:18:45.921895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20884 22:18:45.922242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20886 22:18:45.952343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20887 22:18:45.952682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20889 22:18:45.982829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20890 22:18:45.983261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20892 22:18:46.013670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20893 22:18:46.014169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20895 22:18:46.044727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20896 22:18:46.045110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20898 22:18:46.075757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20899 22:18:46.076098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20901 22:18:46.109932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20903 22:18:46.110369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20904 22:18:46.143413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20905 22:18:46.143958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20907 22:18:46.174870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20909 22:18:46.175353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20910 22:18:46.207629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20911 22:18:46.207996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20913 22:18:46.239048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20914 22:18:46.239410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20916 22:18:46.273140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20917 22:18:46.273447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20919 22:18:46.307629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20920 22:18:46.307981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20922 22:18:46.341929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20923 22:18:46.342286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20925 22:18:46.375147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20926 22:18:46.375487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20928 22:18:46.408708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20929 22:18:46.409063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20931 22:18:46.443370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20932 22:18:46.443829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20934 22:18:46.480196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20935 22:18:46.480633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20937 22:18:46.514308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20938 22:18:46.514759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20940 22:18:46.547670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20942 22:18:46.548274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20943 22:18:46.592483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20944 22:18:46.592897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20946 22:18:46.626481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20948 22:18:46.626837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20949 22:18:46.658196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20951 22:18:46.658590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20952 22:18:46.689116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20953 22:18:46.689498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20955 22:18:46.719739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20956 22:18:46.720181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20958 22:18:46.750603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20959 22:18:46.751083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20961 22:18:46.780967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20962 22:18:46.781402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20964 22:18:46.811825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20965 22:18:46.812231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20967 22:18:46.842879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20968 22:18:46.843276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20970 22:18:46.873399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20971 22:18:46.873799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20973 22:18:46.905077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20974 22:18:46.905483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20976 22:18:46.935956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20977 22:18:46.936430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20979 22:18:46.966825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20980 22:18:46.967267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20982 22:18:46.997182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20983 22:18:46.997635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20985 22:18:47.028101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20987 22:18:47.028624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20988 22:18:47.058949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20989 22:18:47.059388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20991 22:18:47.089334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20992 22:18:47.089742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20994 22:18:47.120530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20995 22:18:47.120929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20997 22:18:47.151940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20999 22:18:47.152376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
21000 22:18:47.183712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
21001 22:18:47.184124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
21003 22:18:47.215566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
21005 22:18:47.216005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
21006 22:18:47.246646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
21008 22:18:47.247202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
21009 22:18:47.276940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
21010 22:18:47.277376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
21012 22:18:47.307677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
21013 22:18:47.308128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
21015 22:18:47.339127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
21016 22:18:47.339566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
21018 22:18:47.369737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
21019 22:18:47.370217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
21021 22:18:47.400180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
21023 22:18:47.400621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
21024 22:18:47.432100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
21025 22:18:47.432516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
21027 22:18:47.463523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
21028 22:18:47.463928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
21030 22:18:47.495311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
21032 22:18:47.495752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
21033 22:18:47.525903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
21034 22:18:47.526332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
21036 22:18:47.556598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
21037 22:18:47.556997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
21039 22:18:47.587624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
21040 22:18:47.588099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
21042 22:18:47.619297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
21043 22:18:47.619698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
21045 22:18:47.673860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
21046 22:18:47.674371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
21048 22:18:47.704528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
21049 22:18:47.704975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
21051 22:18:47.735616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
21052 22:18:47.736069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
21054 22:18:47.766190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
21056 22:18:47.766760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
21057 22:18:47.796957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
21059 22:18:47.797401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
21060 22:18:47.828061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
21062 22:18:47.828512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
21063 22:18:47.859864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
21064 22:18:47.860334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
21066 22:18:47.893929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
21068 22:18:47.894492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
21069 22:18:47.925399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
21071 22:18:47.925953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
21072 22:18:47.959101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
21073 22:18:47.959559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
21075 22:18:47.990876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
21076 22:18:47.991324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
21078 22:18:48.022024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
21079 22:18:48.022465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
21081 22:18:48.053815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
21082 22:18:48.054291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
21084 22:18:48.085274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
21086 22:18:48.085826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
21087 22:18:48.118384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
21089 22:18:48.118960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
21090 22:18:48.150518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
21092 22:18:48.151120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
21093 22:18:48.181790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
21094 22:18:48.182173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
21096 22:18:48.213017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
21097 22:18:48.213498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
21099 22:18:48.244230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
21100 22:18:48.244592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
21102 22:18:48.275356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
21103 22:18:48.275816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
21105 22:18:48.305723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
21106 22:18:48.306109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
21108 22:18:48.336254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
21110 22:18:48.336715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
21111 22:18:48.367828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
21113 22:18:48.368265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
21114 22:18:48.398192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
21115 22:18:48.398601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
21117 22:18:48.429020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
21118 22:18:48.429495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
21120 22:18:48.460418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
21122 22:18:48.460971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
21123 22:18:48.491281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
21124 22:18:48.491749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
21126 22:18:48.522815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
21127 22:18:48.523255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
21129 22:18:48.553183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
21131 22:18:48.553739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
21132 22:18:48.583694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
21133 22:18:48.584138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
21135 22:18:48.614569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
21137 22:18:48.615115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
21138 22:18:48.644889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
21139 22:18:48.645378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21141 22:18:48.675732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21143 22:18:48.676264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21144 22:18:48.706123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21146 22:18:48.706656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21147 22:18:48.736843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21149 22:18:48.737397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21150 22:18:48.767653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21151 22:18:48.768104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21153 22:18:48.797859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21155 22:18:48.798413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21156 22:18:48.828158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21157 22:18:48.828589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21159 22:18:48.859008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21160 22:18:48.859472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21162 22:18:48.889083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21163 22:18:48.889483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21165 22:18:48.920000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21167 22:18:48.920511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21168 22:18:48.950565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21170 22:18:48.951107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21171 22:18:48.981031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21172 22:18:48.981394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21174 22:18:49.012596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21176 22:18:49.013155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21177 22:18:49.044841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21179 22:18:49.045382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21180 22:18:49.076615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21182 22:18:49.077065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21183 22:18:49.107624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21185 22:18:49.108172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21186 22:18:49.138580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21187 22:18:49.139031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21189 22:18:49.169366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21190 22:18:49.169813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21192 22:18:49.200186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21194 22:18:49.200743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21195 22:18:49.230470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21197 22:18:49.231133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21198 22:18:49.261295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21199 22:18:49.261774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21201 22:18:49.291583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21203 22:18:49.292121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21204 22:18:49.322095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21206 22:18:49.322546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21207 22:18:49.353597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21208 22:18:49.354089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21210 22:18:49.386948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21211 22:18:49.387361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21213 22:18:49.419259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21215 22:18:49.419704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21216 22:18:49.449926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21217 22:18:49.450353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21219 22:18:49.481398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21221 22:18:49.481969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21222 22:18:49.513100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21224 22:18:49.513667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21225 22:18:49.543488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21226 22:18:49.543943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21228 22:18:49.574692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21230 22:18:49.575314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21231 22:18:49.605969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21233 22:18:49.606538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21234 22:18:49.636880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21235 22:18:49.637349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21237 22:18:49.667995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21239 22:18:49.668625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21240 22:18:49.698864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21241 22:18:49.699322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21243 22:18:49.729738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21244 22:18:49.730259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21246 22:18:49.762534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21248 22:18:49.763106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21249 22:18:49.792999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21250 22:18:49.793469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21252 22:18:49.823452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21253 22:18:49.823910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21255 22:18:49.854243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21256 22:18:49.854686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21258 22:18:49.884663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21259 22:18:49.885110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21261 22:18:49.915966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21263 22:18:49.916518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21264 22:18:49.946245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21266 22:18:49.946773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21267 22:18:49.977331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21269 22:18:49.977760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21270 22:18:50.009826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21272 22:18:50.010449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21273 22:18:50.040883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21274 22:18:50.041323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21276 22:18:50.072232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21277 22:18:50.072709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21279 22:18:50.103411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21280 22:18:50.103843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21282 22:18:50.134918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21283 22:18:50.135286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21285 22:18:50.166455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21287 22:18:50.166989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21288 22:18:50.197404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21290 22:18:50.197943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21291 22:18:50.228599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21292 22:18:50.229131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21294 22:18:50.260300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21296 22:18:50.260831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21297 22:18:50.292059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21299 22:18:50.292603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21300 22:18:50.323042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21301 22:18:50.323432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21303 22:18:50.355185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21304 22:18:50.355543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21306 22:18:50.386133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21307 22:18:50.386589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21309 22:18:50.416902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21310 22:18:50.417361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21312 22:18:50.448618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21314 22:18:50.449193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21315 22:18:50.479657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21317 22:18:50.480261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21318 22:18:50.511439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21319 22:18:50.511908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21321 22:18:50.543108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21323 22:18:50.543649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21324 22:18:50.574116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21325 22:18:50.574583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21327 22:18:50.605277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21328 22:18:50.605680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21330 22:18:50.636809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21332 22:18:50.637446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21333 22:18:50.667654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21334 22:18:50.668052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21336 22:18:50.698323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21338 22:18:50.698950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21339 22:18:50.729027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21340 22:18:50.729500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21342 22:18:50.760117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21343 22:18:50.760569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21345 22:18:50.791316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21347 22:18:50.791917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21348 22:18:50.822122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21349 22:18:50.822560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21351 22:18:50.853368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21352 22:18:50.853841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21354 22:18:50.884487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21356 22:18:50.885017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21357 22:18:50.918196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21358 22:18:50.918656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21360 22:18:50.949326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21362 22:18:50.949889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21363 22:18:50.980019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21364 22:18:50.980492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21366 22:18:51.010056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21367 22:18:51.010510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21369 22:18:51.040376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21370 22:18:51.040845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21372 22:18:51.071007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21373 22:18:51.071362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21375 22:18:51.101529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21376 22:18:51.101898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21378 22:18:51.131551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21379 22:18:51.131894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21381 22:18:51.162204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21383 22:18:51.162623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21384 22:18:51.192258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21385 22:18:51.192626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21387 22:18:51.221994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21388 22:18:51.222335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21390 22:18:51.251832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21391 22:18:51.252180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21393 22:18:51.281845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21394 22:18:51.282190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21396 22:18:51.311975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21397 22:18:51.312324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21399 22:18:51.343054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21400 22:18:51.343518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21402 22:18:51.373587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21403 22:18:51.373999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21405 22:18:51.403903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21406 22:18:51.404313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21408 22:18:51.434890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21409 22:18:51.435323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21411 22:18:51.465680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21412 22:18:51.466156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21414 22:18:51.496865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21415 22:18:51.497315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21417 22:18:51.527361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21418 22:18:51.527802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21420 22:18:51.557719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21422 22:18:51.558263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21423 22:18:51.588012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21425 22:18:51.588565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21426 22:18:51.618532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21428 22:18:51.619064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21429 22:18:51.648862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21431 22:18:51.649465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21432 22:18:51.679353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21433 22:18:51.679814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21435 22:18:51.709831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21436 22:18:51.710224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21438 22:18:51.740467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21439 22:18:51.740913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21441 22:18:51.770579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21443 22:18:51.771125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21444 22:18:51.800598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21445 22:18:51.801040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21447 22:18:51.831679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21449 22:18:51.832224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21450 22:18:51.861906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21451 22:18:51.862340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21453 22:18:51.892665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21455 22:18:51.893272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21456 22:18:51.922940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21457 22:18:51.923374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21459 22:18:51.953064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21460 22:18:51.953454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21462 22:18:51.984020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21464 22:18:51.984448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21465 22:18:52.014350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21467 22:18:52.014791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21468 22:18:52.045132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21470 22:18:52.045700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21471 22:18:52.075623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21473 22:18:52.076188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21474 22:18:52.106055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21476 22:18:52.106637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21477 22:18:52.136807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21479 22:18:52.137361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21480 22:18:52.167148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21481 22:18:52.167599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21483 22:18:52.197599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21485 22:18:52.198180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21486 22:18:52.227826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21487 22:18:52.228241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21489 22:18:52.258657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21491 22:18:52.259220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21492 22:18:52.288552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21493 22:18:52.289018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21495 22:18:52.319692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21496 22:18:52.320160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21498 22:18:52.349748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21499 22:18:52.350214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21501 22:18:52.379376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21502 22:18:52.379849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21504 22:18:52.409568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21505 22:18:52.410065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21507 22:18:52.439845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21508 22:18:52.440325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21510 22:18:52.470760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21511 22:18:52.471241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21513 22:18:52.500332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21514 22:18:52.500816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21516 22:18:52.530250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21517 22:18:52.530731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21519 22:18:52.560459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21520 22:18:52.560942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21522 22:18:52.591047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21524 22:18:52.591679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21525 22:18:52.621211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21526 22:18:52.621705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21528 22:18:52.651316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21529 22:18:52.651797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21531 22:18:52.681335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21532 22:18:52.681807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21534 22:18:52.711593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21535 22:18:52.712079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21537 22:18:52.741564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21538 22:18:52.742000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21540 22:18:52.798287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21542 22:18:52.798756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21543 22:18:52.829132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21544 22:18:52.829533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21546 22:18:52.859790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21548 22:18:52.860415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21549 22:18:52.890950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21551 22:18:52.891407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21552 22:18:52.921322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21554 22:18:52.921870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21555 22:18:52.951611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21556 22:18:52.951987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21558 22:18:52.982807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21559 22:18:52.983196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21561 22:18:53.013347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21562 22:18:53.013690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21564 22:18:53.043796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21565 22:18:53.044250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21567 22:18:53.074504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21569 22:18:53.075093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21570 22:18:53.108165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21571 22:18:53.108610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21573 22:18:53.146768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21574 22:18:53.147234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21576 22:18:53.177680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21578 22:18:53.178152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21579 22:18:53.207929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21580 22:18:53.208283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21582 22:18:53.238909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21584 22:18:53.239365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21585 22:18:53.269531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21587 22:18:53.269969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21588 22:18:53.300281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21589 22:18:53.300737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21591 22:18:53.332568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21592 22:18:53.332969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21594 22:18:53.364451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21595 22:18:53.364853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21597 22:18:53.396076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21598 22:18:53.396524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21600 22:18:53.427250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21602 22:18:53.427864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21603 22:18:53.458141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21604 22:18:53.458623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21606 22:18:53.489087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21607 22:18:53.489549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21609 22:18:53.519480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21611 22:18:53.520021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21612 22:18:53.550012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21613 22:18:53.550459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21615 22:18:53.580465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21616 22:18:53.580854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21618 22:18:53.611415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21619 22:18:53.611830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21621 22:18:53.642182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21622 22:18:53.642588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21624 22:18:53.672724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21626 22:18:53.673251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21627 22:18:53.703499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21628 22:18:53.703956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21630 22:18:53.734981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21631 22:18:53.735425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21633 22:18:53.765453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21634 22:18:53.765861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21636 22:18:53.796198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21637 22:18:53.796589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21639 22:18:53.826744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21640 22:18:53.827196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21642 22:18:53.857109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21643 22:18:53.857511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21645 22:18:53.891224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21647 22:18:53.891645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21648 22:18:53.921954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21649 22:18:53.922422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21651 22:18:53.953801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21652 22:18:53.954275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21654 22:18:53.984774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21655 22:18:53.985243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21657 22:18:54.015733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21658 22:18:54.016206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21660 22:18:54.047122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21661 22:18:54.047606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21663 22:18:54.077966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21665 22:18:54.078429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21666 22:18:54.108788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21667 22:18:54.109204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21669 22:18:54.139819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21671 22:18:54.140249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21672 22:18:54.170827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21673 22:18:54.171228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21675 22:18:54.201304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21676 22:18:54.201787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21678 22:18:54.231589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21680 22:18:54.232142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21681 22:18:54.263447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21683 22:18:54.264023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21684 22:18:54.295035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21685 22:18:54.295512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21687 22:18:54.326877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21688 22:18:54.327324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21690 22:18:54.358029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21691 22:18:54.358484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21693 22:18:54.388347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21694 22:18:54.388797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21696 22:18:54.419434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21697 22:18:54.419897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21699 22:18:54.450506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21701 22:18:54.451114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21702 22:18:54.482564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21704 22:18:54.483110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21705 22:18:54.513290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21706 22:18:54.513634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21708 22:18:54.543667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21709 22:18:54.544030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21711 22:18:54.573698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21712 22:18:54.574041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21714 22:18:54.604039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21715 22:18:54.604381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21717 22:18:54.634000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21718 22:18:54.634359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21720 22:18:54.663929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21721 22:18:54.664291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21723 22:18:54.694077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21724 22:18:54.694433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21726 22:18:54.724640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21727 22:18:54.724986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21729 22:18:54.754953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21730 22:18:54.755305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21732 22:18:54.785341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21734 22:18:54.785818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21735 22:18:54.815330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21736 22:18:54.815694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21738 22:18:54.845535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21739 22:18:54.845910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21741 22:18:54.875879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21742 22:18:54.876239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21744 22:18:54.906132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21745 22:18:54.906490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21747 22:18:54.936169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21748 22:18:54.936530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21750 22:18:54.965979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21751 22:18:54.966337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21753 22:18:54.996348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21754 22:18:54.996712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21756 22:18:55.027531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21758 22:18:55.028051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21759 22:18:55.059227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21760 22:18:55.059606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21762 22:18:55.089906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21763 22:18:55.090259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21765 22:18:55.120047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21766 22:18:55.120401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21768 22:18:55.150898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21769 22:18:55.151262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21771 22:18:55.180372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21772 22:18:55.180735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21774 22:18:55.210636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21775 22:18:55.210994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21777 22:18:55.240953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21778 22:18:55.241319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21780 22:18:55.271011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21781 22:18:55.271379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21783 22:18:55.302772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21784 22:18:55.303138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21786 22:18:55.332522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21787 22:18:55.332878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21789 22:18:55.362539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21791 22:18:55.362983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21792 22:18:55.392836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21793 22:18:55.393194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21795 22:18:55.423347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21796 22:18:55.423703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21798 22:18:55.454417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21800 22:18:55.454860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21801 22:18:55.486616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21803 22:18:55.487100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21804 22:18:55.517088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21805 22:18:55.517472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21807 22:18:55.548253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21808 22:18:55.548718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21810 22:18:55.578931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21811 22:18:55.579284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21813 22:18:55.608357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21814 22:18:55.608718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21816 22:18:55.638468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21818 22:18:55.638925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21819 22:18:55.668771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21820 22:18:55.669127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21822 22:18:55.699002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21823 22:18:55.699353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21825 22:18:55.729109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21826 22:18:55.729523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21828 22:18:55.759427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21829 22:18:55.759775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21831 22:18:55.789320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21832 22:18:55.789671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21834 22:18:55.820479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21835 22:18:55.820824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21837 22:18:55.851062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21838 22:18:55.851430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21840 22:18:55.881385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21841 22:18:55.881748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21843 22:18:55.911331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21844 22:18:55.911692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21846 22:18:55.941909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21847 22:18:55.942260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21849 22:18:55.971979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21850 22:18:55.972337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21852 22:18:56.002560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21854 22:18:56.003030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21855 22:18:56.033451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21856 22:18:56.033803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21858 22:18:56.063883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21859 22:18:56.064249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21861 22:18:56.094535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21862 22:18:56.094877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21864 22:18:56.124665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21865 22:18:56.124983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21867 22:18:56.155440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21868 22:18:56.155775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21870 22:18:56.185717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21871 22:18:56.186051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21873 22:18:56.215594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21874 22:18:56.215949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21876 22:18:56.246144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21877 22:18:56.246496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21879 22:18:56.276826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21880 22:18:56.277178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21882 22:18:56.307347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21883 22:18:56.307693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21885 22:18:56.337535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21886 22:18:56.337857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21888 22:18:56.367692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21890 22:18:56.368263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21891 22:18:56.398223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21892 22:18:56.398691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21894 22:18:56.429046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21895 22:18:56.429516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21897 22:18:56.459550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21898 22:18:56.460019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21900 22:18:56.490970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21902 22:18:56.491559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21903 22:18:56.521960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21904 22:18:56.522416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21906 22:18:56.553033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21908 22:18:56.553604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21909 22:18:56.584806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21911 22:18:56.585549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21912 22:18:56.615696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21914 22:18:56.616257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21915 22:18:56.646955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21916 22:18:56.647409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21918 22:18:56.677904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21920 22:18:56.678438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21921 22:18:56.708767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21922 22:18:56.709207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21924 22:18:56.739843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21925 22:18:56.740280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21927 22:18:56.770134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21928 22:18:56.770578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21930 22:18:56.801448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21931 22:18:56.801793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21933 22:18:56.832185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21935 22:18:56.832640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21936 22:18:56.863160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21937 22:18:56.863634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21939 22:18:56.894039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21940 22:18:56.894445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21942 22:18:56.924911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21943 22:18:56.925309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21945 22:18:56.955594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21947 22:18:56.956141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21948 22:18:56.986021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21949 22:18:56.986436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21951 22:18:57.016710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21952 22:18:57.017150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21954 22:18:57.047518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21955 22:18:57.047909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21957 22:18:57.078745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21959 22:18:57.079172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21960 22:18:57.108789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21961 22:18:57.109148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21963 22:18:57.139364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21965 22:18:57.139940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21966 22:18:57.169927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21968 22:18:57.170492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21969 22:18:57.200422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21971 22:18:57.200936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21972 22:18:57.231516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21973 22:18:57.231890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21975 22:18:57.262265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21976 22:18:57.262611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21978 22:18:57.293434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21979 22:18:57.293776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21981 22:18:57.323867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21982 22:18:57.324203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21984 22:18:57.356094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21985 22:18:57.356496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21987 22:18:57.387058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21988 22:18:57.387418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21990 22:18:57.419172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21991 22:18:57.419531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21993 22:18:57.449773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21994 22:18:57.450126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21996 22:18:57.480546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21998 22:18:57.480986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21999 22:18:57.510907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
22000 22:18:57.511266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
22002 22:18:57.541517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
22004 22:18:57.542014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
22005 22:18:57.571737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
22006 22:18:57.572092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
22008 22:18:57.602508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
22010 22:18:57.602952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
22011 22:18:57.632865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
22012 22:18:57.633218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
22014 22:18:57.663394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
22015 22:18:57.663749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
22017 22:18:57.693690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
22018 22:18:57.694033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
22020 22:18:57.724567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
22021 22:18:57.724901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
22023 22:18:57.755141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
22024 22:18:57.755496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
22026 22:18:57.785495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
22027 22:18:57.785955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
22029 22:18:57.816560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
22030 22:18:57.816974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
22032 22:18:57.847728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
22033 22:18:57.848121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
22035 22:18:57.902011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
22036 22:18:57.902365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
22038 22:18:57.935379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
22039 22:18:57.935750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
22041 22:18:57.969118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
22043 22:18:57.969662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
22044 22:18:57.999848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
22046 22:18:58.000414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
22047 22:18:58.031198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
22048 22:18:58.031667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
22050 22:18:58.061605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
22051 22:18:58.062087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
22053 22:18:58.092672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
22054 22:18:58.093119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
22056 22:18:58.124772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
22057 22:18:58.125335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
22059 22:18:58.157938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
22060 22:18:58.158405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
22062 22:18:58.189229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
22064 22:18:58.189812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
22065 22:18:58.220775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
22067 22:18:58.221307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
22068 22:18:58.252036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
22069 22:18:58.252472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
22071 22:18:58.285233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
22072 22:18:58.285765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
22074 22:18:58.321106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
22075 22:18:58.321580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
22077 22:18:58.351579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
22078 22:18:58.351962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
22080 22:18:58.381753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
22081 22:18:58.382025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
22083 22:18:58.411966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
22084 22:18:58.412320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
22086 22:18:58.443275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
22087 22:18:58.443616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
22089 22:18:58.476187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
22090 22:18:58.476558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
22092 22:18:58.513734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
22093 22:18:58.514205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
22095 22:18:58.544964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
22097 22:18:58.545507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
22098 22:18:58.575648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
22099 22:18:58.576086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
22101 22:18:58.606800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
22103 22:18:58.607347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
22104 22:18:58.637622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
22105 22:18:58.638108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
22107 22:18:58.668584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
22108 22:18:58.669042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
22110 22:18:58.700072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
22112 22:18:58.700611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
22113 22:18:58.731514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
22114 22:18:58.731983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
22116 22:18:58.762704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
22118 22:18:58.763250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
22119 22:18:58.794579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
22121 22:18:58.795152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
22122 22:18:58.827600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
22124 22:18:58.828158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
22125 22:18:58.861004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
22126 22:18:58.861462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
22128 22:18:58.892122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
22129 22:18:58.892590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
22131 22:18:58.922938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
22132 22:18:58.923336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
22134 22:18:58.953873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
22135 22:18:58.954367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
22137 22:18:58.984993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22138 22:18:58.985456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
22140 22:18:59.016819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22141 22:18:59.017235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22143 22:18:59.047839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22144 22:18:59.048289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22146 22:18:59.079103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22147 22:18:59.079540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22149 22:18:59.109956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22150 22:18:59.110416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22152 22:18:59.140864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22153 22:18:59.141276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22155 22:18:59.172563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22156 22:18:59.172965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22158 22:18:59.203470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22159 22:18:59.203869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22161 22:18:59.235259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22163 22:18:59.235873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22164 22:18:59.266312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22166 22:18:59.266931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22167 22:18:59.297683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22168 22:18:59.298099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22170 22:18:59.328433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22171 22:18:59.328834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22173 22:18:59.359451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22175 22:18:59.360019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22176 22:18:59.389840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22177 22:18:59.390242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22179 22:18:59.421141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22180 22:18:59.421587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22182 22:18:59.452672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22184 22:18:59.453240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22185 22:18:59.483592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22187 22:18:59.484203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22188 22:18:59.513893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22189 22:18:59.514351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22191 22:18:59.544656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22192 22:18:59.545131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22194 22:18:59.575485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22195 22:18:59.575948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22197 22:18:59.605598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22198 22:18:59.606000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22200 22:18:59.636108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22201 22:18:59.636501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22203 22:18:59.667440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22205 22:18:59.667978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22206 22:18:59.699268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22207 22:18:59.699732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22209 22:18:59.729833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22211 22:18:59.730437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22212 22:18:59.760700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22213 22:18:59.761157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22215 22:18:59.791733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22216 22:18:59.792181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22218 22:18:59.823056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22219 22:18:59.823515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22221 22:18:59.854211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22223 22:18:59.854837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22224 22:18:59.885394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22225 22:18:59.885867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22227 22:18:59.916281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22228 22:18:59.916730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22230 22:18:59.946837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22231 22:18:59.947269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22233 22:18:59.977075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22234 22:18:59.977531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22236 22:19:00.008266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22238 22:19:00.008698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22239 22:19:00.039722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22241 22:19:00.040159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22242 22:19:00.071226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22243 22:19:00.071636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22245 22:19:00.103554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22246 22:19:00.103963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22248 22:19:00.135010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22250 22:19:00.135436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22251 22:19:00.166031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22252 22:19:00.166487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22254 22:19:00.197660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22255 22:19:00.198067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22257 22:19:00.228342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22258 22:19:00.228746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22260 22:19:00.259659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22262 22:19:00.260217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22263 22:19:00.290766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22264 22:19:00.291178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22266 22:19:00.321591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22267 22:19:00.321991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22269 22:19:00.351737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22270 22:19:00.352085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22272 22:19:00.382231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22273 22:19:00.382674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22275 22:19:00.413467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22276 22:19:00.413934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22278 22:19:00.445156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22280 22:19:00.445560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22281 22:19:00.475950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22282 22:19:00.476293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22284 22:19:00.506800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22285 22:19:00.507151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22287 22:19:00.538115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22288 22:19:00.538550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22290 22:19:00.568756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22291 22:19:00.569203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22293 22:19:00.599443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22294 22:19:00.599822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22296 22:19:00.630451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22298 22:19:00.630874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22299 22:19:00.660928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22300 22:19:00.661296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22302 22:19:00.693567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22303 22:19:00.693975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22305 22:19:00.728014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22307 22:19:00.728473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22308 22:19:00.760580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22309 22:19:00.760950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22311 22:19:00.792142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22312 22:19:00.792626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22314 22:19:00.823436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22315 22:19:00.823899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22317 22:19:00.855322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22319 22:19:00.855748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22320 22:19:00.888303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22321 22:19:00.888762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22323 22:19:00.921553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22324 22:19:00.922015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22326 22:19:00.953136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22328 22:19:00.953699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22329 22:19:00.984004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22330 22:19:00.984452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22332 22:19:01.017900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22334 22:19:01.018457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22335 22:19:01.049707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22337 22:19:01.050252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22338 22:19:01.080826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22340 22:19:01.081382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22341 22:19:01.112403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22343 22:19:01.113025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22344 22:19:01.144061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22345 22:19:01.144520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22347 22:19:01.175584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22348 22:19:01.176031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22350 22:19:01.207111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22351 22:19:01.207574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22353 22:19:01.238002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22354 22:19:01.238464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22356 22:19:01.269409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22357 22:19:01.269885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22359 22:19:01.301236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22360 22:19:01.301705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22362 22:19:01.332821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22363 22:19:01.333281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22365 22:19:01.364065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22366 22:19:01.364471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22368 22:19:01.395763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22370 22:19:01.396204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22371 22:19:01.427955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22373 22:19:01.428395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22374 22:19:01.460036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22375 22:19:01.460437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22377 22:19:01.492308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22378 22:19:01.492734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22380 22:19:01.523509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22381 22:19:01.523995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22383 22:19:01.560423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22384 22:19:01.560880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22386 22:19:01.596581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22388 22:19:01.597054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22389 22:19:01.627515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22391 22:19:01.627899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22392 22:19:01.658122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22394 22:19:01.658504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22395 22:19:01.689100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22396 22:19:01.689444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22398 22:19:01.720420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22399 22:19:01.720966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22401 22:19:01.751746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22403 22:19:01.752323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22404 22:19:01.783251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22406 22:19:01.783482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22407 22:19:01.814528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22409 22:19:01.814954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22410 22:19:01.845484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22411 22:19:01.845844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22413 22:19:01.877474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22415 22:19:01.878062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22416 22:19:01.908550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22417 22:19:01.908982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22419 22:19:01.939853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22420 22:19:01.940299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22422 22:19:01.971265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22423 22:19:01.971739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22425 22:19:02.002016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22426 22:19:02.002384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22428 22:19:02.033180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22429 22:19:02.033598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22431 22:19:02.064283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22432 22:19:02.064749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22434 22:19:02.095899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22436 22:19:02.096466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22437 22:19:02.127375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22438 22:19:02.127833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22440 22:19:02.158115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22441 22:19:02.158546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22443 22:19:02.188579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22444 22:19:02.189034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22446 22:19:02.219647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22448 22:19:02.220095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22449 22:19:02.250562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22451 22:19:02.251157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22452 22:19:02.281886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22453 22:19:02.282297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22455 22:19:02.313638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22456 22:19:02.314105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22458 22:19:02.344620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22459 22:19:02.345086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22461 22:19:02.375264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22462 22:19:02.375709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22464 22:19:02.406018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22466 22:19:02.406537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22467 22:19:02.436436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22469 22:19:02.436875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22470 22:19:02.467520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22471 22:19:02.467970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22473 22:19:02.498562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22475 22:19:02.499097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22476 22:19:02.528981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22478 22:19:02.529527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22479 22:19:02.559884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22480 22:19:02.560318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22482 22:19:02.591187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22484 22:19:02.591729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22485 22:19:02.621804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22486 22:19:02.622204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22488 22:19:02.652689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22489 22:19:02.653090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22491 22:19:02.685050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22492 22:19:02.685457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22494 22:19:02.716781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22495 22:19:02.717193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22497 22:19:02.748036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22499 22:19:02.748606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22500 22:19:02.778635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22502 22:19:02.779237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22503 22:19:02.809096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22504 22:19:02.809459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22506 22:19:02.839588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22507 22:19:02.839934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22509 22:19:02.871725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22511 22:19:02.872217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22512 22:19:02.904207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22514 22:19:02.904736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22515 22:19:02.937819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22516 22:19:02.938273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22518 22:19:02.968985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22519 22:19:02.969323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22521 22:19:03.020898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22522 22:19:03.021331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22524 22:19:03.052046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22525 22:19:03.052497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22527 22:19:03.082119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22528 22:19:03.082468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22530 22:19:03.113122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22532 22:19:03.113881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22533 22:19:03.144020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22534 22:19:03.144480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22536 22:19:03.174421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22538 22:19:03.174988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22539 22:19:03.205183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22540 22:19:03.205643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22542 22:19:03.235730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22543 22:19:03.236200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22545 22:19:03.269005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22547 22:19:03.269820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22548 22:19:03.303235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22550 22:19:03.303767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22551 22:19:03.335660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22552 22:19:03.336179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22554 22:19:03.366225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22556 22:19:03.366801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22557 22:19:03.396904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22559 22:19:03.397479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22560 22:19:03.428628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22561 22:19:03.429136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22563 22:19:03.461258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22564 22:19:03.461679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22566 22:19:03.493879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22568 22:19:03.494342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22569 22:19:03.524776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22570 22:19:03.525260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22572 22:19:03.555021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22573 22:19:03.555469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22575 22:19:03.585140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22576 22:19:03.585598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22578 22:19:03.617734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22579 22:19:03.618221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22581 22:19:03.650720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22582 22:19:03.651185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22584 22:19:03.681913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22585 22:19:03.682352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22587 22:19:03.712985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22588 22:19:03.713338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22590 22:19:03.745026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22591 22:19:03.745394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22593 22:19:03.777302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22594 22:19:03.777668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22596 22:19:03.809722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22597 22:19:03.810162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22599 22:19:03.841053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22600 22:19:03.841523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22602 22:19:03.872215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22604 22:19:03.872751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22605 22:19:03.903452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22607 22:19:03.903986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22608 22:19:03.934262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22610 22:19:03.934719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22611 22:19:03.965097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22612 22:19:03.965543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22614 22:19:03.996067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22616 22:19:03.996619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22617 22:19:04.025930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22619 22:19:04.026457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22620 22:19:04.056641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22621 22:19:04.057073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22623 22:19:04.087362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22624 22:19:04.087802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22626 22:19:04.119035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22627 22:19:04.119504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22629 22:19:04.151653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22630 22:19:04.152084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22632 22:19:04.183164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22634 22:19:04.183721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22635 22:19:04.212871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22636 22:19:04.213214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22638 22:19:04.243207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22639 22:19:04.243690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22641 22:19:04.273906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22642 22:19:04.274278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22644 22:19:04.304024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22645 22:19:04.304351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22647 22:19:04.335071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22648 22:19:04.335424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22650 22:19:04.365693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22651 22:19:04.366031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22653 22:19:04.395884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22654 22:19:04.396222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22656 22:19:04.425925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22657 22:19:04.426284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22659 22:19:04.456618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22661 22:19:04.457182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22662 22:19:04.488010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22663 22:19:04.488462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22665 22:19:04.518931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22666 22:19:04.519368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22668 22:19:04.549057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22669 22:19:04.549508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22671 22:19:04.579894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22672 22:19:04.580350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22674 22:19:04.610587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22676 22:19:04.611080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22677 22:19:04.640675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22679 22:19:04.641221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22680 22:19:04.671522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22681 22:19:04.671969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22683 22:19:04.702324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22685 22:19:04.702876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22686 22:19:04.732601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22687 22:19:04.733045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22689 22:19:04.762760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22690 22:19:04.763194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22692 22:19:04.792871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22693 22:19:04.793327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22695 22:19:04.823324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22696 22:19:04.823773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22698 22:19:04.853722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22700 22:19:04.854280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22701 22:19:04.884955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22702 22:19:04.885429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22704 22:19:04.915568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22705 22:19:04.916002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22707 22:19:04.946609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22709 22:19:04.947075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22710 22:19:04.976951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22712 22:19:04.977567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22713 22:19:05.007468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22714 22:19:05.007922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22716 22:19:05.037821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22717 22:19:05.038263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22719 22:19:05.068358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22720 22:19:05.068796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22722 22:19:05.099329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22723 22:19:05.099775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22725 22:19:05.130050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22726 22:19:05.130494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22728 22:19:05.160402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22729 22:19:05.160843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22731 22:19:05.191034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22732 22:19:05.191481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22734 22:19:05.221413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22735 22:19:05.221853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22737 22:19:05.252039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22739 22:19:05.252641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22740 22:19:05.282377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22742 22:19:05.282909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22743 22:19:05.313719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22744 22:19:05.314174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22746 22:19:05.344323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22747 22:19:05.344735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22749 22:19:05.375191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22750 22:19:05.375659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22752 22:19:05.405972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22753 22:19:05.406409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22755 22:19:05.436852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22756 22:19:05.437243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22758 22:19:05.467924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22759 22:19:05.468337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22761 22:19:05.499097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22762 22:19:05.499509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22764 22:19:05.529878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22765 22:19:05.530346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22767 22:19:05.560691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22769 22:19:05.561303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22770 22:19:05.591460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22771 22:19:05.591904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22773 22:19:05.622124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22774 22:19:05.622569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22776 22:19:05.653014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22777 22:19:05.653439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22779 22:19:05.683524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22781 22:19:05.684028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22782 22:19:05.713995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22783 22:19:05.714444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22785 22:19:05.744458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22786 22:19:05.744885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22788 22:19:05.774988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22789 22:19:05.775400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22791 22:19:05.805865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22792 22:19:05.806310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22794 22:19:05.836531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22795 22:19:05.837011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22797 22:19:05.867327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22798 22:19:05.867680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22800 22:19:05.897700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22801 22:19:05.898057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22803 22:19:05.928191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22805 22:19:05.928640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22806 22:19:05.958839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22807 22:19:05.959199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22809 22:19:05.989031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22810 22:19:05.989383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22812 22:19:06.020534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22813 22:19:06.020987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22815 22:19:06.051254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22816 22:19:06.051675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22818 22:19:06.082594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22820 22:19:06.083029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22821 22:19:06.114164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22823 22:19:06.114729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22824 22:19:06.144616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22825 22:19:06.145006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22827 22:19:06.175423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22829 22:19:06.175969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22830 22:19:06.206956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22831 22:19:06.207404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22833 22:19:06.240064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22835 22:19:06.240668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22836 22:19:06.275967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22838 22:19:06.276532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22839 22:19:06.310165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22841 22:19:06.310602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22842 22:19:06.344149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22843 22:19:06.344532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22845 22:19:06.376118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22846 22:19:06.376521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22848 22:19:06.408863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22850 22:19:06.409240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22851 22:19:06.440325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22852 22:19:06.440738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22854 22:19:06.471673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22855 22:19:06.472026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22857 22:19:06.503824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22859 22:19:06.504358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22860 22:19:06.535793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22861 22:19:06.536204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22863 22:19:06.567204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22864 22:19:06.567612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22866 22:19:06.598789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22867 22:19:06.599230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22869 22:19:06.631144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22870 22:19:06.631459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22872 22:19:06.661860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22873 22:19:06.662130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22875 22:19:06.691961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22876 22:19:06.692311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22878 22:19:06.722005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22879 22:19:06.722349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22881 22:19:06.752439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22882 22:19:06.752780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22884 22:19:06.782530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22886 22:19:06.782938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22887 22:19:06.812896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22888 22:19:06.813382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22890 22:19:06.843469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22891 22:19:06.843858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22893 22:19:06.874526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22895 22:19:06.874988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22896 22:19:06.904791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22897 22:19:06.905069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22899 22:19:06.936009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22900 22:19:06.936356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22902 22:19:06.966853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22903 22:19:06.967197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22905 22:19:06.996645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22907 22:19:06.997214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22908 22:19:07.029655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22909 22:19:07.030014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22911 22:19:07.061017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22912 22:19:07.061291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22914 22:19:07.091463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22915 22:19:07.091740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22917 22:19:07.122283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22919 22:19:07.122709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22920 22:19:07.152596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22921 22:19:07.152938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22923 22:19:07.183685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22924 22:19:07.184098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22926 22:19:07.214845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22928 22:19:07.215275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22929 22:19:07.245768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22931 22:19:07.246212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22932 22:19:07.276656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22933 22:19:07.277121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22935 22:19:07.308054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22936 22:19:07.308508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22938 22:19:07.338861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22939 22:19:07.339316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22941 22:19:07.371054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22942 22:19:07.371527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22944 22:19:07.402088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22945 22:19:07.402477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22947 22:19:07.432732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22948 22:19:07.433052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22950 22:19:07.463764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22951 22:19:07.464023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22953 22:19:07.494001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22954 22:19:07.494262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22956 22:19:07.523971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22957 22:19:07.524229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22959 22:19:07.553806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22960 22:19:07.554083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22962 22:19:07.584301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22963 22:19:07.584647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22965 22:19:07.614668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22966 22:19:07.615018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22968 22:19:07.644607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22969 22:19:07.644953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22971 22:19:07.674887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22972 22:19:07.675228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22974 22:19:07.705013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22975 22:19:07.705357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22977 22:19:07.736269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22978 22:19:07.736609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22980 22:19:07.766351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22982 22:19:07.766787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22983 22:19:07.796439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22985 22:19:07.796883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22986 22:19:07.826856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22987 22:19:07.827217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22989 22:19:07.857375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22990 22:19:07.857848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22992 22:19:07.887675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22993 22:19:07.888123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22995 22:19:07.918104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22996 22:19:07.918522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22998 22:19:07.949364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22999 22:19:07.949814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
23001 22:19:07.979786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
23002 22:19:07.980218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
23004 22:19:08.010548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
23006 22:19:08.011089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
23007 22:19:08.040962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
23008 22:19:08.041395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
23010 22:19:08.072055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
23011 22:19:08.072444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
23013 22:19:08.108214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
23014 22:19:08.108556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
23016 22:19:08.161555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
23018 22:19:08.162023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
23019 22:19:08.193161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
23021 22:19:08.193710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
23022 22:19:08.224004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
23023 22:19:08.224450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
23025 22:19:08.254575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
23027 22:19:08.255015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
23028 22:19:08.286084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
23029 22:19:08.286524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
23031 22:19:08.319591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
23032 22:19:08.319957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
23034 22:19:08.350725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
23035 22:19:08.351071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
23037 22:19:08.381216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
23038 22:19:08.381703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
23040 22:19:08.412343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
23041 22:19:08.412822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
23043 22:19:08.445070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
23045 22:19:08.445742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
23046 22:19:08.477639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
23047 22:19:08.478059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
23049 22:19:08.509949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
23050 22:19:08.510353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
23052 22:19:08.543555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
23053 22:19:08.543935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
23055 22:19:08.575786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
23056 22:19:08.576145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
23058 22:19:08.609634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
23060 22:19:08.610098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
23061 22:19:08.643935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
23063 22:19:08.644523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
23064 22:19:08.679588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
23065 22:19:08.679971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
23067 22:19:08.713514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
23068 22:19:08.713791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
23070 22:19:08.747443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
23071 22:19:08.747721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
23073 22:19:08.780931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
23075 22:19:08.781562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
23076 22:19:08.816135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
23077 22:19:08.816518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
23079 22:19:08.849414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
23080 22:19:08.849796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
23082 22:19:08.882005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
23083 22:19:08.882386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
23085 22:19:08.913852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
23087 22:19:08.914398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
23088 22:19:08.945142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
23089 22:19:08.945599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
23091 22:19:08.975809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
23093 22:19:08.976250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
23094 22:19:09.007575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
23095 22:19:09.007972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
23097 22:19:09.039441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
23099 22:19:09.039884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
23100 22:19:09.070860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
23101 22:19:09.071270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
23103 22:19:09.102060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
23104 22:19:09.102472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
23106 22:19:09.133699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
23108 22:19:09.134132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
23109 22:19:09.166048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
23111 22:19:09.166511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
23112 22:19:09.197715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
23114 22:19:09.198165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
23115 22:19:09.230941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
23117 22:19:09.231395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
23118 22:19:09.262970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
23120 22:19:09.263413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
23121 22:19:09.294094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
23122 22:19:09.294573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
23124 22:19:09.324750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
23126 22:19:09.325240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
23127 22:19:09.356530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
23129 22:19:09.357078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
23130 22:19:09.387172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
23131 22:19:09.387665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
23133 22:19:09.418093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
23134 22:19:09.418421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
23136 22:19:09.450047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
23138 22:19:09.450398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
23139 22:19:09.481702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23140 22:19:09.482065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23142 22:19:09.515041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23144 22:19:09.515608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23145 22:19:09.547471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23147 22:19:09.548072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23148 22:19:09.580752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23149 22:19:09.581199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23151 22:19:09.611312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23152 22:19:09.611741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23154 22:19:09.642822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23155 22:19:09.643292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23157 22:19:09.673909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23158 22:19:09.674336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23160 22:19:09.705683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23161 22:19:09.706144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23163 22:19:09.736206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23164 22:19:09.736592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23166 22:19:09.767650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23167 22:19:09.768010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23169 22:19:09.797684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23170 22:19:09.797972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23172 22:19:09.828218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23173 22:19:09.828560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23175 22:19:09.858682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23176 22:19:09.859021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23178 22:19:09.889346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23179 22:19:09.889685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23181 22:19:09.921955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23182 22:19:09.922336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23184 22:19:09.954285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23185 22:19:09.954647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23187 22:19:09.987297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23188 22:19:09.987677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23190 22:19:10.017855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23192 22:19:10.018305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23193 22:19:10.048880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23194 22:19:10.049221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23196 22:19:10.080032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23198 22:19:10.080460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23199 22:19:10.110839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23200 22:19:10.111170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23202 22:19:10.142933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23203 22:19:10.143326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23205 22:19:10.175032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23207 22:19:10.175458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23208 22:19:10.206013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23209 22:19:10.206359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23211 22:19:10.237102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23212 22:19:10.237565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23214 22:19:10.267657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23215 22:19:10.268096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23217 22:19:10.298417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23219 22:19:10.298926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23220 22:19:10.328661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23221 22:19:10.329046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23223 22:19:10.360027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23224 22:19:10.360373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23226 22:19:10.391355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23227 22:19:10.391710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23229 22:19:10.422062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23230 22:19:10.422423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23232 22:19:10.453798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23233 22:19:10.454161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23235 22:19:10.485024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23236 22:19:10.485367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23238 22:19:10.517249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23239 22:19:10.517692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23241 22:19:10.547488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23242 22:19:10.547840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23244 22:19:10.578532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23246 22:19:10.579067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23247 22:19:10.610094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23248 22:19:10.610450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23250 22:19:10.640821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23251 22:19:10.641169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23253 22:19:10.671849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23254 22:19:10.672198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23256 22:19:10.703501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23258 22:19:10.703948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23259 22:19:10.733661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23261 22:19:10.734159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23262 22:19:10.764946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23264 22:19:10.765422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23265 22:19:10.797359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23266 22:19:10.797686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23268 22:19:10.828776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23269 22:19:10.829174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23271 22:19:10.861369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23272 22:19:10.861756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23274 22:19:10.894836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23276 22:19:10.895255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23277 22:19:10.931466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23278 22:19:10.931869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23280 22:19:10.963523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23281 22:19:10.963861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23283 22:19:10.995623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23284 22:19:10.996012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23286 22:19:11.031739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23287 22:19:11.032175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23289 22:19:11.067257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23290 22:19:11.067635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23292 22:19:11.099191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23293 22:19:11.099574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23295 22:19:11.131774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23296 22:19:11.132159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23298 22:19:11.163216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23299 22:19:11.163622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23301 22:19:11.195073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23302 22:19:11.195447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23304 22:19:11.230383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23306 22:19:11.230741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23307 22:19:11.262570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23309 22:19:11.262984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23310 22:19:11.294062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23311 22:19:11.294335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23313 22:19:11.327419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23314 22:19:11.327783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23316 22:19:11.358458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23318 22:19:11.358974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23319 22:19:11.392999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23320 22:19:11.393426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23322 22:19:11.424978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23323 22:19:11.425402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23325 22:19:11.456197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23326 22:19:11.456694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23328 22:19:11.487974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23329 22:19:11.488406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23331 22:19:11.523637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23332 22:19:11.524063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23334 22:19:11.556918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23335 22:19:11.557348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23337 22:19:11.592397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23338 22:19:11.592825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23340 22:19:11.633914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23341 22:19:11.634388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23343 22:19:11.666008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23344 22:19:11.666384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23346 22:19:11.697834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23348 22:19:11.698264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23349 22:19:11.728311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23350 22:19:11.728589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23352 22:19:11.759519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23354 22:19:11.759926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23355 22:19:11.790402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23357 22:19:11.790722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23358 22:19:11.821837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23359 22:19:11.822121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23361 22:19:11.853314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23362 22:19:11.853581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23364 22:19:11.883930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23365 22:19:11.884201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23367 22:19:11.915158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23368 22:19:11.915445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23370 22:19:11.946032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23371 22:19:11.946405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23373 22:19:11.976759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23374 22:19:11.977102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23376 22:19:12.007124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23377 22:19:12.007485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23379 22:19:12.037692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23380 22:19:12.038172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23382 22:19:12.068920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23384 22:19:12.069477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23385 22:19:12.099438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23386 22:19:12.099900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23388 22:19:12.130516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23390 22:19:12.130970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23391 22:19:12.161574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23392 22:19:12.161998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23394 22:19:12.192747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23395 22:19:12.193199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23397 22:19:12.224227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23399 22:19:12.224755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23400 22:19:12.255181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23401 22:19:12.255630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23403 22:19:12.286141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23404 22:19:12.286557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23406 22:19:12.317134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23407 22:19:12.317585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23409 22:19:12.347838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23410 22:19:12.348282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23412 22:19:12.379262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23413 22:19:12.379704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23415 22:19:12.411461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23417 22:19:12.412004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23418 22:19:12.442232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23419 22:19:12.442685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23421 22:19:12.473455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23423 22:19:12.474014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23424 22:19:12.504104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23425 22:19:12.504545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23427 22:19:12.535450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23429 22:19:12.536041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23430 22:19:12.567616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23432 22:19:12.568169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23433 22:19:12.598266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23434 22:19:12.598741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23436 22:19:12.628419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23437 22:19:12.628785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23439 22:19:12.659202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23440 22:19:12.659651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23442 22:19:12.690034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23443 22:19:12.690476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23445 22:19:12.721866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23446 22:19:12.722330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23448 22:19:12.753183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23450 22:19:12.753752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23451 22:19:12.784093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23452 22:19:12.784440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23454 22:19:12.815101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23455 22:19:12.815556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23457 22:19:12.848366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23458 22:19:12.848818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23460 22:19:12.879748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23461 22:19:12.880154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23463 22:19:12.911081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23464 22:19:12.911486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23466 22:19:12.943079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23467 22:19:12.943489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23469 22:19:12.974463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23471 22:19:12.974828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23472 22:19:13.013350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23473 22:19:13.013728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23475 22:19:13.045958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23477 22:19:13.046356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23478 22:19:13.079246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23480 22:19:13.079907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23481 22:19:13.111495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23482 22:19:13.111901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23484 22:19:13.143147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23485 22:19:13.143591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23487 22:19:13.175697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23488 22:19:13.176105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23490 22:19:13.207631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23492 22:19:13.208019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23493 22:19:13.261776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23494 22:19:13.262247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23496 22:19:13.292685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23497 22:19:13.293216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23499 22:19:13.324657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23500 22:19:13.325192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23502 22:19:13.356771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23503 22:19:13.357136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23505 22:19:13.387945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23506 22:19:13.388339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23508 22:19:13.419677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23509 22:19:13.420119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23511 22:19:13.451706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23512 22:19:13.452182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23514 22:19:13.483064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23515 22:19:13.483500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23517 22:19:13.514504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23519 22:19:13.515137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23520 22:19:13.545244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23521 22:19:13.545536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23523 22:19:13.576673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23524 22:19:13.577108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23526 22:19:13.608877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23527 22:19:13.609277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23529 22:19:13.640155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23530 22:19:13.640573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23532 22:19:13.671738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23533 22:19:13.672141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23535 22:19:13.703292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23536 22:19:13.703758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23538 22:19:13.734522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23540 22:19:13.734975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23541 22:19:13.766742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23542 22:19:13.767191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23544 22:19:13.798878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23545 22:19:13.799320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23547 22:19:13.830927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23548 22:19:13.831335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23550 22:19:13.862387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23552 22:19:13.862817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23553 22:19:13.893673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23554 22:19:13.894045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23556 22:19:13.925159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23557 22:19:13.925538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23559 22:19:13.956923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23560 22:19:13.957298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23562 22:19:13.988593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23563 22:19:13.988880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23565 22:19:14.020795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23566 22:19:14.021083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23568 22:19:14.052932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23569 22:19:14.053378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23571 22:19:14.085139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23572 22:19:14.085532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23574 22:19:14.116386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23575 22:19:14.116683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23577 22:19:14.148112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23578 22:19:14.148398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23580 22:19:14.179754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23582 22:19:14.180307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23583 22:19:14.211642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23584 22:19:14.211967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23586 22:19:14.243598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23587 22:19:14.244020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23589 22:19:14.280074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23590 22:19:14.280549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23592 22:19:14.312587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23593 22:19:14.313067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23595 22:19:14.344672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23596 22:19:14.345138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23598 22:19:14.376581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23600 22:19:14.377186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23601 22:19:14.408060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23603 22:19:14.408664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23604 22:19:14.439567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23605 22:19:14.440019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23607 22:19:14.472583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23608 22:19:14.473038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23610 22:19:14.504438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23611 22:19:14.504886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23613 22:19:14.536209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23615 22:19:14.536823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23616 22:19:14.567891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23617 22:19:14.568355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23619 22:19:14.600083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23621 22:19:14.600697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23622 22:19:14.632425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23623 22:19:14.632889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23625 22:19:14.665166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23626 22:19:14.665618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23628 22:19:14.697003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23629 22:19:14.697416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23631 22:19:14.728901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23632 22:19:14.729187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23634 22:19:14.764624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23635 22:19:14.765069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23637 22:19:14.800373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23638 22:19:14.800696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23640 22:19:14.835374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23642 22:19:14.835883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23643 22:19:14.866979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23644 22:19:14.867392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23646 22:19:14.898038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23647 22:19:14.898325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23649 22:19:14.930908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23651 22:19:14.931492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23652 22:19:14.966220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23653 22:19:14.966683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23655 22:19:14.998912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23656 22:19:14.999362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23658 22:19:15.030863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23660 22:19:15.031380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23661 22:19:15.063388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23662 22:19:15.063834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23664 22:19:15.095448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23665 22:19:15.095890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23667 22:19:15.127419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23669 22:19:15.127941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23670 22:19:15.158968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23671 22:19:15.159408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23673 22:19:15.190585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23675 22:19:15.191121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23676 22:19:15.222413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23678 22:19:15.222935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23679 22:19:15.254363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23681 22:19:15.254988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23682 22:19:15.287023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23683 22:19:15.287466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23685 22:19:15.319521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23686 22:19:15.319953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23688 22:19:15.351352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23690 22:19:15.351959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23691 22:19:15.383579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23692 22:19:15.384031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23694 22:19:15.415356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23695 22:19:15.415756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23697 22:19:15.446630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23698 22:19:15.447056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23700 22:19:15.478139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23701 22:19:15.478590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23703 22:19:15.511359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23704 22:19:15.511769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23706 22:19:15.542810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23707 22:19:15.543098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23709 22:19:15.574503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23711 22:19:15.574803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23712 22:19:15.607242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23713 22:19:15.607539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23715 22:19:15.639358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23717 22:19:15.639680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23718 22:19:15.671365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23719 22:19:15.671649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23721 22:19:15.703338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23723 22:19:15.703856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23724 22:19:15.734520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23726 22:19:15.734815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23727 22:19:15.766274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23728 22:19:15.766669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23730 22:19:15.797562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23731 22:19:15.797849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23733 22:19:15.828150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23734 22:19:15.828426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23736 22:19:15.859019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23737 22:19:15.859305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23739 22:19:15.890450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23741 22:19:15.890883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23742 22:19:15.921842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23743 22:19:15.922341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23745 22:19:15.952674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23746 22:19:15.953122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23748 22:19:15.983740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23749 22:19:15.984207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23751 22:19:16.015689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23752 22:19:16.016157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23754 22:19:16.047001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23755 22:19:16.047461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23757 22:19:16.078719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23758 22:19:16.079178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23760 22:19:16.109448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23761 22:19:16.109806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23763 22:19:16.140693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23764 22:19:16.141057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23766 22:19:16.171571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23767 22:19:16.171920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23769 22:19:16.202320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23771 22:19:16.202668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23772 22:19:16.237380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23773 22:19:16.237651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23775 22:19:16.268153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23776 22:19:16.268437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23778 22:19:16.299317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23779 22:19:16.299590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23781 22:19:16.331576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23782 22:19:16.331848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23784 22:19:16.362963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23785 22:19:16.363236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23787 22:19:16.394100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23789 22:19:16.394378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23790 22:19:16.425718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23792 22:19:16.426336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23793 22:19:16.456371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23795 22:19:16.456998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23796 22:19:16.488415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23797 22:19:16.488832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23799 22:19:16.525112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23800 22:19:16.525519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23802 22:19:16.558104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23803 22:19:16.558590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23805 22:19:16.592672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23807 22:19:16.593123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23808 22:19:16.627721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23810 22:19:16.628169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23811 22:19:16.662950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23812 22:19:16.663255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23814 22:19:16.697110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23816 22:19:16.697465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23817 22:19:16.729254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23818 22:19:16.729615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23820 22:19:16.762171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23822 22:19:16.762633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23823 22:19:16.793640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23824 22:19:16.794115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23826 22:19:16.825470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23827 22:19:16.825952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23829 22:19:16.857405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23831 22:19:16.857959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23832 22:19:16.889535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23834 22:19:16.890165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23835 22:19:16.921321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23836 22:19:16.921785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23838 22:19:16.953583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23840 22:19:16.954156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23841 22:19:16.985304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23842 22:19:16.985698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23844 22:19:17.017240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23845 22:19:17.017682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23847 22:19:17.051603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23848 22:19:17.052089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23850 22:19:17.083638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23851 22:19:17.084044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23853 22:19:17.116361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23854 22:19:17.116784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23856 22:19:17.148882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23857 22:19:17.149355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23859 22:19:17.180395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23860 22:19:17.180696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23862 22:19:17.214071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23863 22:19:17.214445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23865 22:19:17.247551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23866 22:19:17.247838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23868 22:19:17.279446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23869 22:19:17.279827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23871 22:19:17.311060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23872 22:19:17.311342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23874 22:19:17.342818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23875 22:19:17.343143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23877 22:19:17.375768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23879 22:19:17.376229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23880 22:19:17.407161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23881 22:19:17.407644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23883 22:19:17.438652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23884 22:19:17.439116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23886 22:19:17.471144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23887 22:19:17.471610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23889 22:19:17.503137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23891 22:19:17.503717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23892 22:19:17.535036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23893 22:19:17.535486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23895 22:19:17.567724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23896 22:19:17.568193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23898 22:19:17.599810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23900 22:19:17.600391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23901 22:19:17.631936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23903 22:19:17.632496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23904 22:19:17.663476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23906 22:19:17.664032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23907 22:19:17.695404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23908 22:19:17.695865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23910 22:19:17.727972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23912 22:19:17.728555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23913 22:19:17.759755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23914 22:19:17.760240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23916 22:19:17.792008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23917 22:19:17.792476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23919 22:19:17.824539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23921 22:19:17.825095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23922 22:19:17.857354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23923 22:19:17.857757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23925 22:19:17.892369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23926 22:19:17.892817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23928 22:19:17.925220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23929 22:19:17.925594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23931 22:19:17.957397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23932 22:19:17.957671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23934 22:19:17.990499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23936 22:19:17.990794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23937 22:19:18.025686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23938 22:19:18.025968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23940 22:19:18.059158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23941 22:19:18.059529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23943 22:19:18.091512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23944 22:19:18.091926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23946 22:19:18.126074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23948 22:19:18.126631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23949 22:19:18.160936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23950 22:19:18.161421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23952 22:19:18.193312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23953 22:19:18.193711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23955 22:19:18.225579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23957 22:19:18.226146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23958 22:19:18.259546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23960 22:19:18.260095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23961 22:19:18.291552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23963 22:19:18.292045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23964 22:19:18.322941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23965 22:19:18.323196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23967 22:19:18.379717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23968 22:19:18.380093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23970 22:19:18.411015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23971 22:19:18.411390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23973 22:19:18.442038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23975 22:19:18.442512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23976 22:19:18.472763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23978 22:19:18.473300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23979 22:19:18.503796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23981 22:19:18.504385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23982 22:19:18.535009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23983 22:19:18.535479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23985 22:19:18.565699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23987 22:19:18.566118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23988 22:19:18.596481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23989 22:19:18.596821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23991 22:19:18.628180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23992 22:19:18.628471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23994 22:19:18.659209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23995 22:19:18.659666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23997 22:19:18.690844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23999 22:19:18.691473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
24000 22:19:18.721918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
24001 22:19:18.722382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
24003 22:19:18.752999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
24004 22:19:18.753451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
24006 22:19:18.784520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
24007 22:19:18.784960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
24009 22:19:18.815808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
24010 22:19:18.816274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
24012 22:19:18.847097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
24013 22:19:18.847548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
24015 22:19:18.878564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
24017 22:19:18.879098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
24018 22:19:18.910567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
24020 22:19:18.911116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
24021 22:19:18.941937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
24022 22:19:18.942428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
24024 22:19:18.973541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
24026 22:19:18.974135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
24027 22:19:19.005085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
24028 22:19:19.005512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
24030 22:19:19.036454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
24032 22:19:19.037015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
24033 22:19:19.067598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
24035 22:19:19.068190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
24036 22:19:19.098780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
24037 22:19:19.099179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
24039 22:19:19.129977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
24040 22:19:19.130420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
24042 22:19:19.161351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
24044 22:19:19.161916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
24045 22:19:19.192934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
24047 22:19:19.193480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
24048 22:19:19.224320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
24050 22:19:19.224855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
24051 22:19:19.255646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
24053 22:19:19.256181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
24054 22:19:19.287413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
24055 22:19:19.287859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
24057 22:19:19.319164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
24058 22:19:19.319613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
24060 22:19:19.350972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
24061 22:19:19.351440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
24063 22:19:19.381872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
24064 22:19:19.382316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
24066 22:19:19.413618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
24068 22:19:19.414192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
24069 22:19:19.445661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
24070 22:19:19.446151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
24072 22:19:19.477917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
24074 22:19:19.478501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
24075 22:19:19.509731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
24076 22:19:19.510213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
24078 22:19:19.541882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
24079 22:19:19.542374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
24081 22:19:19.573705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
24082 22:19:19.574176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
24084 22:19:19.608046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
24085 22:19:19.608532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
24087 22:19:19.645631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
24088 22:19:19.646117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
24090 22:19:19.680403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
24091 22:19:19.680869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
24093 22:19:19.716190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
24094 22:19:19.716638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
24096 22:19:19.752389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
24098 22:19:19.752979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
24099 22:19:19.797164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
24100 22:19:19.797660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
24102 22:19:19.833183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
24104 22:19:19.833859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
24105 22:19:19.871384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
24106 22:19:19.871873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
24108 22:19:19.907975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
24110 22:19:19.908453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
24111 22:19:19.943323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
24113 22:19:19.943797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
24114 22:19:19.990005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
24116 22:19:19.990583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
24117 22:19:20.028159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
24118 22:19:20.028592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
24120 22:19:20.063835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
24121 22:19:20.064244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
24123 22:19:20.099839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
24125 22:19:20.100288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
24126 22:19:20.135257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
24127 22:19:20.135607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
24129 22:19:20.170724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
24131 22:19:20.171120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
24132 22:19:20.203827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
24134 22:19:20.204240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
24135 22:19:20.237891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
24137 22:19:20.238368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
24138 22:19:20.271797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24140 22:19:20.272261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
24141 22:19:20.305447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24142 22:19:20.305946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24144 22:19:20.339851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24145 22:19:20.340404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24147 22:19:20.375671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24149 22:19:20.376410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24150 22:19:20.410875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24151 22:19:20.411358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24153 22:19:20.446142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24154 22:19:20.446599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24156 22:19:20.481454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24158 22:19:20.482063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24159 22:19:20.516451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24161 22:19:20.517020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24162 22:19:20.552361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24163 22:19:20.552790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24165 22:19:20.588833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24166 22:19:20.589324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24168 22:19:20.624845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24169 22:19:20.625315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24171 22:19:20.660273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24172 22:19:20.660757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24174 22:19:20.697683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24175 22:19:20.698169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24177 22:19:20.735153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24178 22:19:20.735606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24180 22:19:20.771012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24182 22:19:20.771478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24183 22:19:20.808138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24185 22:19:20.808782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24186 22:19:20.844152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24187 22:19:20.844670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24189 22:19:20.880756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24190 22:19:20.881186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24192 22:19:20.919478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24194 22:19:20.919948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24195 22:19:20.956116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24196 22:19:20.956548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24198 22:19:20.992661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24199 22:19:20.993137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24201 22:19:21.028434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24202 22:19:21.028913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24204 22:19:21.064094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24205 22:19:21.064532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24207 22:19:21.099953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24209 22:19:21.100595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24210 22:19:21.135914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24212 22:19:21.136638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24213 22:19:21.174277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24215 22:19:21.174753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24216 22:19:21.210039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24217 22:19:21.210462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24219 22:19:21.242592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24221 22:19:21.243308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24222 22:19:21.275368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24223 22:19:21.275782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24225 22:19:21.309961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24226 22:19:21.310531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24228 22:19:21.344281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24229 22:19:21.344779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24231 22:19:21.383070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24232 22:19:21.383547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24234 22:19:21.418574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24236 22:19:21.419208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24237 22:19:21.456519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24238 22:19:21.456937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24240 22:19:21.491791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24242 22:19:21.492375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24243 22:19:21.529792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24245 22:19:21.530198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24246 22:19:21.584215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24248 22:19:21.584974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24249 22:19:21.623532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24251 22:19:21.624113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24252 22:19:21.661581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24253 22:19:21.662020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24255 22:19:21.699346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24256 22:19:21.699727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24258 22:19:21.736646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24259 22:19:21.737066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24261 22:19:21.773820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24263 22:19:21.774287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24264 22:19:21.808934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24265 22:19:21.809373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24267 22:19:21.845687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24269 22:19:21.846369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24270 22:19:21.887074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24272 22:19:21.887532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24273 22:19:21.923747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24274 22:19:21.924189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24276 22:19:21.966866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24277 22:19:21.967296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24279 22:19:22.003773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24280 22:19:22.004259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24282 22:19:22.039454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24283 22:19:22.039847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24285 22:19:22.075103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24287 22:19:22.075555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24288 22:19:22.109616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24289 22:19:22.110059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24291 22:19:22.144866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24292 22:19:22.145248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24294 22:19:22.180269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24296 22:19:22.180731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24297 22:19:22.215573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24298 22:19:22.215994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24300 22:19:22.251425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24301 22:19:22.251913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24303 22:19:22.287343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24305 22:19:22.287814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24306 22:19:22.323142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24308 22:19:22.323742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24309 22:19:22.355352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24310 22:19:22.355748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24312 22:19:22.387445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24314 22:19:22.387890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24315 22:19:22.419766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24316 22:19:22.420323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24318 22:19:22.454992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24319 22:19:22.455473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24321 22:19:22.487643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24322 22:19:22.488113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24324 22:19:22.520595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24326 22:19:22.521338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24327 22:19:22.555555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24329 22:19:22.556302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24330 22:19:22.590486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24332 22:19:22.590958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24333 22:19:22.627176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24334 22:19:22.627591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24336 22:19:22.660997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24337 22:19:22.661425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24339 22:19:22.705308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24341 22:19:22.706067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24342 22:19:22.740474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24344 22:19:22.741130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24345 22:19:22.775539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24346 22:19:22.776021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24348 22:19:22.811127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24349 22:19:22.811615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24351 22:19:22.843620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24352 22:19:22.844093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24354 22:19:22.876524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24356 22:19:22.877266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24357 22:19:22.912501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24358 22:19:22.912985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24360 22:19:22.946098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24361 22:19:22.946580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24363 22:19:22.979637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24365 22:19:22.980102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24366 22:19:23.015495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24367 22:19:23.015866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24369 22:19:23.049192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24371 22:19:23.049601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24372 22:19:23.080849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24373 22:19:23.081252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24375 22:19:23.113101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24376 22:19:23.113496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24378 22:19:23.144127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24379 22:19:23.144479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24381 22:19:23.177640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24382 22:19:23.178000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24384 22:19:23.211342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24385 22:19:23.211690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24387 22:19:23.245434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24389 22:19:23.245989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24390 22:19:23.279146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24391 22:19:23.279494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24393 22:19:23.314623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24395 22:19:23.315219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24396 22:19:23.347711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24397 22:19:23.348167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24399 22:19:23.379285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24400 22:19:23.379847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24402 22:19:23.412185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24404 22:19:23.412845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24405 22:19:23.443464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24406 22:19:23.443816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24408 22:19:23.502593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24410 22:19:23.503159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24411 22:19:23.535461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24412 22:19:23.535819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24414 22:19:23.565892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24416 22:19:23.566346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24417 22:19:23.596633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24419 22:19:23.597185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24420 22:19:23.627384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24421 22:19:23.627827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24423 22:19:23.657822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24424 22:19:23.658203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24426 22:19:23.689015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24427 22:19:23.689473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24429 22:19:23.721252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24431 22:19:23.721734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24432 22:19:23.753703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24433 22:19:23.754069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24435 22:19:23.784989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24436 22:19:23.785347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24438 22:19:23.816114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24439 22:19:23.816465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24441 22:19:23.847226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24442 22:19:23.847678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24444 22:19:23.878263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24446 22:19:23.878783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24447 22:19:23.909423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24448 22:19:23.909811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24450 22:19:23.940723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24451 22:19:23.941067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24453 22:19:23.972460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24454 22:19:23.972801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24456 22:19:24.003653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24457 22:19:24.004020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24459 22:19:24.035423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24460 22:19:24.035788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24462 22:19:24.067614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24463 22:19:24.067968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24465 22:19:24.099356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24466 22:19:24.099750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24468 22:19:24.129945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24469 22:19:24.130287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24471 22:19:24.163954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24473 22:19:24.164445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24474 22:19:24.195368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24475 22:19:24.195716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24477 22:19:24.227744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24478 22:19:24.228098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24480 22:19:24.260239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24481 22:19:24.260638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24483 22:19:24.291536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24484 22:19:24.291897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24486 22:19:24.323385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24487 22:19:24.323725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24489 22:19:24.353600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24490 22:19:24.353951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24492 22:19:24.384600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24493 22:19:24.385020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24495 22:19:24.415422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24496 22:19:24.415802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24498 22:19:24.448488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24499 22:19:24.448892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24501 22:19:24.479343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24502 22:19:24.479694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24504 22:19:24.511818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24505 22:19:24.512193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24507 22:19:24.544221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24508 22:19:24.544573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24510 22:19:24.575454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24512 22:19:24.575863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24513 22:19:24.607147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24514 22:19:24.607604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24516 22:19:24.640268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24517 22:19:24.640731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24519 22:19:24.671924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24520 22:19:24.672370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24522 22:19:24.704804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24523 22:19:24.705257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24525 22:19:24.737436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24526 22:19:24.737786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24528 22:19:24.770479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24530 22:19:24.770912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24531 22:19:24.800911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24532 22:19:24.801388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24534 22:19:24.833605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24536 22:19:24.834184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24537 22:19:24.864673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24539 22:19:24.865269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24540 22:19:24.895355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24541 22:19:24.895795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24543 22:19:24.925709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24544 22:19:24.926116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24546 22:19:24.956988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24547 22:19:24.957395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24549 22:19:24.988154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24550 22:19:24.988639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24552 22:19:25.019394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24553 22:19:25.019851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24555 22:19:25.051171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24556 22:19:25.051621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24558 22:19:25.091989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24559 22:19:25.092459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24561 22:19:25.124319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24562 22:19:25.124746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24564 22:19:25.155837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24565 22:19:25.156240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24567 22:19:25.188184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24568 22:19:25.188584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24570 22:19:25.220109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24571 22:19:25.220507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24573 22:19:25.252000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24574 22:19:25.252402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24576 22:19:25.283788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24577 22:19:25.284188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24579 22:19:25.315437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24580 22:19:25.315833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24582 22:19:25.348080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24584 22:19:25.348526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24585 22:19:25.379802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24587 22:19:25.380238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24588 22:19:25.411331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24589 22:19:25.411728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24591 22:19:25.442914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24593 22:19:25.443466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24594 22:19:25.474419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24596 22:19:25.474978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24597 22:19:25.508192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24598 22:19:25.508670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24600 22:19:25.539902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24601 22:19:25.540346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24603 22:19:25.571291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24604 22:19:25.571734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24606 22:19:25.601851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24607 22:19:25.602292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24609 22:19:25.632501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24611 22:19:25.633033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24612 22:19:25.663125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24613 22:19:25.663468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24615 22:19:25.693331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24616 22:19:25.693687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24618 22:19:25.723868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24620 22:19:25.724322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24621 22:19:25.755378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24622 22:19:25.755823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24624 22:19:25.786140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24625 22:19:25.786583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24627 22:19:25.816773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24628 22:19:25.817165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24630 22:19:25.847856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24631 22:19:25.848199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24633 22:19:25.878833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24634 22:19:25.879174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24636 22:19:25.909114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24637 22:19:25.909465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24639 22:19:25.939554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24640 22:19:25.939907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24642 22:19:25.970025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24643 22:19:25.970361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24645 22:19:26.002222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24646 22:19:26.002577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24648 22:19:26.034685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24649 22:19:26.035167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24651 22:19:26.067948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24652 22:19:26.068416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24654 22:19:26.100169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24655 22:19:26.100627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24657 22:19:26.131185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24658 22:19:26.131647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24660 22:19:26.163570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24661 22:19:26.164028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24663 22:19:26.197210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24664 22:19:26.197573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24666 22:19:26.227735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24667 22:19:26.228103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24669 22:19:26.258264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24671 22:19:26.258853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24672 22:19:26.289490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24674 22:19:26.289929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24675 22:19:26.320197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24676 22:19:26.320589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24678 22:19:26.351464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24679 22:19:26.351934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24681 22:19:26.382604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24683 22:19:26.383186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24684 22:19:26.413434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24685 22:19:26.413801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24687 22:19:26.443617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24688 22:19:26.443969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24690 22:19:26.475941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24691 22:19:26.476314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24693 22:19:26.506908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24695 22:19:26.507314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24696 22:19:26.548304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24697 22:19:26.548777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24699 22:19:26.599498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24701 22:19:26.600076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24702 22:19:26.633952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24703 22:19:26.634358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24705 22:19:26.665583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24706 22:19:26.665956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24708 22:19:26.696897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24709 22:19:26.697273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24711 22:19:26.728768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24712 22:19:26.729055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24714 22:19:26.762065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24715 22:19:26.762423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24717 22:19:26.794219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24718 22:19:26.794560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24720 22:19:26.824818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24721 22:19:26.825167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24723 22:19:26.855334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24724 22:19:26.855689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24726 22:19:26.885505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24727 22:19:26.886001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24729 22:19:26.917465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24730 22:19:26.917951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24732 22:19:26.949033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24733 22:19:26.949425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24735 22:19:26.980638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24736 22:19:26.981003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24738 22:19:27.011000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24739 22:19:27.011476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24741 22:19:27.042218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24742 22:19:27.042653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24744 22:19:27.072956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24745 22:19:27.073391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24747 22:19:27.105354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24748 22:19:27.105811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24750 22:19:27.136557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24752 22:19:27.137110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24753 22:19:27.167390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24755 22:19:27.167949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24756 22:19:27.197697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24757 22:19:27.198143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24759 22:19:27.229103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24760 22:19:27.229493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24762 22:19:27.259661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24763 22:19:27.260018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24765 22:19:27.291476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24766 22:19:27.291817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24768 22:19:27.322908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24769 22:19:27.323263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24771 22:19:27.353366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24772 22:19:27.353683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24774 22:19:27.384102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24775 22:19:27.384447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24777 22:19:27.414408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24779 22:19:27.414826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24780 22:19:27.445950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24781 22:19:27.446480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24783 22:19:27.477075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24785 22:19:27.477644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24786 22:19:27.512373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24788 22:19:27.512920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24789 22:19:27.543349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24790 22:19:27.543818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24792 22:19:27.573206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24793 22:19:27.573552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24795 22:19:27.603520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24796 22:19:27.603880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24798 22:19:27.635621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24799 22:19:27.636031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24801 22:19:27.671481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24802 22:19:27.671935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24804 22:19:27.702754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24805 22:19:27.703193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24807 22:19:27.733559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24809 22:19:27.734105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24810 22:19:27.764085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24811 22:19:27.764529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24813 22:19:27.796415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24815 22:19:27.796977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24816 22:19:27.827496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24817 22:19:27.827894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24819 22:19:27.859316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24820 22:19:27.859723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24822 22:19:27.891426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24823 22:19:27.891816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24825 22:19:27.922895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24826 22:19:27.923272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24828 22:19:27.953477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24829 22:19:27.953855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24831 22:19:27.988674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24832 22:19:27.989025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24834 22:19:28.019731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24836 22:19:28.020215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24837 22:19:28.051215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24838 22:19:28.051570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24840 22:19:28.081466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24841 22:19:28.081812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24843 22:19:28.111282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24844 22:19:28.111622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24846 22:19:28.144437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24847 22:19:28.144799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24849 22:19:28.176177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24850 22:19:28.176535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24852 22:19:28.207415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24853 22:19:28.207762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24855 22:19:28.238897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24856 22:19:28.239240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24858 22:19:28.269105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24860 22:19:28.269520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24861 22:19:28.299309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24862 22:19:28.299647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24864 22:19:28.334749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24865 22:19:28.335094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24867 22:19:28.365369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24868 22:19:28.365684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24870 22:19:28.397585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24871 22:19:28.398076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24873 22:19:28.427848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24874 22:19:28.428237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24876 22:19:28.458004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24877 22:19:28.458368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24879 22:19:28.490020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24881 22:19:28.490485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24882 22:19:28.525143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24883 22:19:28.525565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24885 22:19:28.555609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24887 22:19:28.556025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24888 22:19:28.596309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24890 22:19:28.596874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24891 22:19:28.638839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24892 22:19:28.639212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24894 22:19:28.673007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24895 22:19:28.673377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24897 22:19:28.703628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24899 22:19:28.704055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24900 22:19:28.734535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24902 22:19:28.734976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24903 22:19:28.765903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24904 22:19:28.766249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24906 22:19:28.796118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24907 22:19:28.796464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24909 22:19:28.826861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24910 22:19:28.827221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24912 22:19:28.862447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24914 22:19:28.862865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24915 22:19:28.892888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24916 22:19:28.893231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24918 22:19:28.924440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24920 22:19:28.924948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24921 22:19:28.955173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24923 22:19:28.955673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24924 22:19:28.985038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24925 22:19:28.985407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24927 22:19:29.017372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24929 22:19:29.017942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24930 22:19:29.053225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24931 22:19:29.053589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24933 22:19:29.088647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24935 22:19:29.089008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24936 22:19:29.119464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24937 22:19:29.119723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24939 22:19:29.149903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24940 22:19:29.150273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24942 22:19:29.180256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24943 22:19:29.180629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24945 22:19:29.215430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24946 22:19:29.215782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24948 22:19:29.245683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24949 22:19:29.246056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24951 22:19:29.277200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24952 22:19:29.277559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24954 22:19:29.307526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24955 22:19:29.307874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24957 22:19:29.337769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24959 22:19:29.338238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24960 22:19:29.367942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24961 22:19:29.368282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24963 22:19:29.400964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24964 22:19:29.401430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24966 22:19:29.432147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24968 22:19:29.432712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24969 22:19:29.463203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24971 22:19:29.463628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24972 22:19:29.493701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24973 22:19:29.494161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24975 22:19:29.524267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24976 22:19:29.524646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24978 22:19:29.555772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24979 22:19:29.556182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24981 22:19:29.587602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24983 22:19:29.588034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24984 22:19:29.618102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24985 22:19:29.618496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24987 22:19:29.649527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24988 22:19:29.649923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24990 22:19:29.680364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24991 22:19:29.680757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24993 22:19:29.711055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24995 22:19:29.711484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24996 22:19:29.743466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24997 22:19:29.743879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24999 22:19:29.774894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
25000 22:19:29.775306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
25002 22:19:29.806083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
25003 22:19:29.806544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
25005 22:19:29.836811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
25007 22:19:29.837230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
25008 22:19:29.867372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
25009 22:19:29.867729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
25011 22:19:29.897903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
25012 22:19:29.898376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
25014 22:19:29.933466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
25015 22:19:29.933953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
25017 22:19:29.965003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
25018 22:19:29.965460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
25020 22:19:29.995613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
25021 22:19:29.996000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
25023 22:19:30.026926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
25024 22:19:30.027336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
25026 22:19:30.058318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
25027 22:19:30.058728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
25029 22:19:30.092627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
25030 22:19:30.093035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
25032 22:19:30.123556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
25033 22:19:30.123947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
25035 22:19:30.154901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
25036 22:19:30.155343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
25038 22:19:30.187606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
25039 22:19:30.188061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
25041 22:19:30.219372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
25042 22:19:30.219781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
25044 22:19:30.251395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
25046 22:19:30.251948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
25047 22:19:30.283219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
25048 22:19:30.283579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
25050 22:19:30.314577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
25052 22:19:30.315138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
25053 22:19:30.345239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
25055 22:19:30.345907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
25056 22:19:30.377628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
25057 22:19:30.378082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
25059 22:19:30.409446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
25060 22:19:30.409917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
25062 22:19:30.441168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
25063 22:19:30.441541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
25065 22:19:30.472102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
25066 22:19:30.472454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
25068 22:19:30.503151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
25069 22:19:30.503499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
25071 22:19:30.536091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
25072 22:19:30.536482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
25074 22:19:30.567564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
25075 22:19:30.568016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
25077 22:19:30.599539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
25078 22:19:30.599828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
25080 22:19:30.630524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
25082 22:19:30.630982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
25083 22:19:30.660781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
25084 22:19:30.661138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
25086 22:19:30.691427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
25087 22:19:30.691781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
25089 22:19:30.721669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
25090 22:19:30.722037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
25092 22:19:30.752069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
25093 22:19:30.752397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
25095 22:19:30.782958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
25096 22:19:30.783380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
25098 22:19:30.815151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
25100 22:19:30.815689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
25101 22:19:30.846023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
25102 22:19:30.846409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
25104 22:19:30.877488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
25106 22:19:30.878009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
25107 22:19:30.908008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
25108 22:19:30.908471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
25110 22:19:30.939284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
25111 22:19:30.939744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
25113 22:19:30.970808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
25115 22:19:30.971366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
25116 22:19:31.001864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
25117 22:19:31.002303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
25119 22:19:31.032632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
25120 22:19:31.033076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
25122 22:19:31.063551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
25123 22:19:31.063987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
25125 22:19:31.095297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
25127 22:19:31.095827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
25128 22:19:31.125704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
25129 22:19:31.126184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
25131 22:19:31.156515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
25132 22:19:31.156864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
25134 22:19:31.187258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
25135 22:19:31.187598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
25137 22:19:31.217497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25138 22:19:31.217973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
25140 22:19:31.248730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25142 22:19:31.249284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25143 22:19:31.280901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25144 22:19:31.281282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25146 22:19:31.311473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25147 22:19:31.311815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25149 22:19:31.342638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25150 22:19:31.343005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25152 22:19:31.373881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25153 22:19:31.374225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25155 22:19:31.404630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25156 22:19:31.404980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25158 22:19:31.435669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25159 22:19:31.436131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25161 22:19:31.465701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25162 22:19:31.466161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25164 22:19:31.496375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25166 22:19:31.496911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25167 22:19:31.527742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25169 22:19:31.528309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25170 22:19:31.559402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25172 22:19:31.559934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25173 22:19:31.590252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25174 22:19:31.590700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25176 22:19:31.623262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25177 22:19:31.623638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25179 22:19:31.655272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25180 22:19:31.655674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25182 22:19:31.688089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25183 22:19:31.688543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25185 22:19:31.719431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25187 22:19:31.719963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25188 22:19:31.753445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25189 22:19:31.753924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25191 22:19:31.787331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25192 22:19:31.787727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25194 22:19:31.818506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25196 22:19:31.818820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25197 22:19:31.850438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25199 22:19:31.850682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25200 22:19:31.881414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25201 22:19:31.881781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25203 22:19:31.912010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25205 22:19:31.912586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25206 22:19:31.945701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25208 22:19:31.946267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25209 22:19:31.976708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25210 22:19:31.977153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25212 22:19:32.009813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25214 22:19:32.010367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25215 22:19:32.041014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25216 22:19:32.041459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25218 22:19:32.072232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25219 22:19:32.072686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25221 22:19:32.104077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25222 22:19:32.104537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25224 22:19:32.135224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25225 22:19:32.135661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25227 22:19:32.165695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25228 22:19:32.166119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25230 22:19:32.196785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25232 22:19:32.197321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25233 22:19:32.227252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25234 22:19:32.227645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25236 22:19:32.258435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25238 22:19:32.258901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25239 22:19:32.290579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25241 22:19:32.291016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25242 22:19:32.321437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25243 22:19:32.321838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25245 22:19:32.352708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25246 22:19:32.353134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25248 22:19:32.383583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25249 22:19:32.383985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25251 22:19:32.415463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25252 22:19:32.415927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25254 22:19:32.446500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25256 22:19:32.446936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25257 22:19:32.476682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25258 22:19:32.477045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25260 22:19:32.506950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25261 22:19:32.507310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25263 22:19:32.537602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25264 22:19:32.537966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25266 22:19:32.567582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25267 22:19:32.567926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25269 22:19:32.598470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25271 22:19:32.598888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25272 22:19:32.628878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25273 22:19:32.629220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25275 22:19:32.659158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25277 22:19:32.659566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25278 22:19:32.689044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25280 22:19:32.689463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25281 22:19:32.719275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25282 22:19:32.719624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25284 22:19:32.749032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25285 22:19:32.749399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25287 22:19:32.780368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25288 22:19:32.780717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25290 22:19:32.810847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25291 22:19:32.811207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25293 22:19:32.841571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25294 22:19:32.842022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25296 22:19:32.871942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25298 22:19:32.872410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25299 22:19:32.902784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25300 22:19:32.903131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25302 22:19:32.933596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25303 22:19:32.934015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25305 22:19:32.963999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25307 22:19:32.964485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25308 22:19:32.994107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25309 22:19:32.994467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25311 22:19:33.024385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25312 22:19:33.024754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25314 22:19:33.056250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25315 22:19:33.056669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25317 22:19:33.088958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25318 22:19:33.089285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25320 22:19:33.120012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25321 22:19:33.120302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25323 22:19:33.153655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25324 22:19:33.154053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25326 22:19:33.185503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25327 22:19:33.186023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25329 22:19:33.217550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25331 22:19:33.218019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25332 22:19:33.248988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25334 22:19:33.249611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25335 22:19:33.281475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25336 22:19:33.281964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25338 22:19:33.315873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25339 22:19:33.316283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25341 22:19:33.353936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25342 22:19:33.354354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25344 22:19:33.389756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25345 22:19:33.390132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25347 22:19:33.430818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25348 22:19:33.431172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25350 22:19:33.464595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25351 22:19:33.464956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25353 22:19:33.498105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25354 22:19:33.498431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25356 22:19:33.532436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25357 22:19:33.532816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25359 22:19:33.564808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25360 22:19:33.565078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25362 22:19:33.597283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25363 22:19:33.597619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25365 22:19:33.630925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25366 22:19:33.631353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25368 22:19:33.664101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25369 22:19:33.664490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25371 22:19:33.698697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25372 22:19:33.699021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25374 22:19:33.756484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25375 22:19:33.756940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25377 22:19:33.793725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25379 22:19:33.794308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25380 22:19:33.830597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25382 22:19:33.831230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25383 22:19:33.866117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25384 22:19:33.866580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25386 22:19:33.903286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25387 22:19:33.903738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25389 22:19:33.939968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25390 22:19:33.940388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25392 22:19:33.975956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25393 22:19:33.976418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25395 22:19:34.011426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25396 22:19:34.011891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25398 22:19:34.048963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25399 22:19:34.049449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25401 22:19:34.096907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25403 22:19:34.097341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25404 22:19:34.130866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25406 22:19:34.131391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25407 22:19:34.165771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25408 22:19:34.166244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25410 22:19:34.199800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25412 22:19:34.200439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25413 22:19:34.236492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25415 22:19:34.237079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25416 22:19:34.271470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25417 22:19:34.271942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25419 22:19:34.306159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25420 22:19:34.306613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25422 22:19:34.344310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25423 22:19:34.344765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25425 22:19:34.377106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25427 22:19:34.377422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25428 22:19:34.413342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25430 22:19:34.413801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25431 22:19:34.445916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25432 22:19:34.446335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25434 22:19:34.482077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25435 22:19:34.482453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25437 22:19:34.518098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25439 22:19:34.518649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25440 22:19:34.553629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25441 22:19:34.554121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25443 22:19:34.587707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25445 22:19:34.588303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25446 22:19:34.621884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25447 22:19:34.622303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25449 22:19:34.657909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25451 22:19:34.658571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25452 22:19:34.693125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25453 22:19:34.693547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25455 22:19:34.727252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25457 22:19:34.727685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25458 22:19:34.761660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25460 22:19:34.762299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25461 22:19:34.796635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25462 22:19:34.797050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25464 22:19:34.830781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25465 22:19:34.831212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25467 22:19:34.865077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25468 22:19:34.865557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25470 22:19:34.899150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25471 22:19:34.899599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25473 22:19:34.931932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25474 22:19:34.932376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25476 22:19:34.964922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25477 22:19:34.965350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25479 22:19:35.001329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25480 22:19:35.001795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25482 22:19:35.037895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25484 22:19:35.038493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25485 22:19:35.073713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25487 22:19:35.074320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25488 22:19:35.108950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25489 22:19:35.109408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25491 22:19:35.144077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25492 22:19:35.144549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25494 22:19:35.178782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25495 22:19:35.179219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25497 22:19:35.211979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25499 22:19:35.212552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25500 22:19:35.245767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25502 22:19:35.246131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25503 22:19:35.280021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25504 22:19:35.280477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25506 22:19:35.314587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25508 22:19:35.315106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25509 22:19:35.349130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25510 22:19:35.349612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25512 22:19:35.383384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25513 22:19:35.383831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25515 22:19:35.417638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25516 22:19:35.418048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25518 22:19:35.452534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25519 22:19:35.452988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25521 22:19:35.487047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25523 22:19:35.487431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25524 22:19:35.521679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25526 22:19:35.522337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25527 22:19:35.555885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25528 22:19:35.556360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25530 22:19:35.591608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25531 22:19:35.592085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25533 22:19:35.626189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25535 22:19:35.626831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25536 22:19:35.660670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25537 22:19:35.661130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25539 22:19:35.695613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25540 22:19:35.696030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25542 22:19:35.732245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25544 22:19:35.732699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25545 22:19:35.765323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25546 22:19:35.765810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25548 22:19:35.799013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25549 22:19:35.799429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25551 22:19:35.832551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25552 22:19:35.832963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25554 22:19:35.865877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25555 22:19:35.866357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25557 22:19:35.899801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25558 22:19:35.900267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25560 22:19:35.932099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25561 22:19:35.932571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25563 22:19:35.965532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25565 22:19:35.966200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25566 22:19:35.999199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25567 22:19:35.999570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25569 22:19:36.032169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25570 22:19:36.032566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25572 22:19:36.066215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25573 22:19:36.066673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25575 22:19:36.100517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25576 22:19:36.100943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25578 22:19:36.135716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25579 22:19:36.136143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25581 22:19:36.171466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25582 22:19:36.171889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25584 22:19:36.206879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25585 22:19:36.207298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25587 22:19:36.243233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25588 22:19:36.243645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25590 22:19:36.277367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25592 22:19:36.277830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25593 22:19:36.311648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25595 22:19:36.312100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25596 22:19:36.345891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25597 22:19:36.346311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25599 22:19:36.381435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25600 22:19:36.381855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25602 22:19:36.416348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25603 22:19:36.416762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25605 22:19:36.451258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25606 22:19:36.451683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25608 22:19:36.484013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25609 22:19:36.484424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25611 22:19:36.516576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25612 22:19:36.517052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25614 22:19:36.549366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25615 22:19:36.549790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25617 22:19:36.583052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25618 22:19:36.583499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25620 22:19:36.616687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25621 22:19:36.617113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25623 22:19:36.651366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25624 22:19:36.651789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25626 22:19:36.685277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25628 22:19:36.685758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25629 22:19:36.718929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25631 22:19:36.719495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25632 22:19:36.752932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25633 22:19:36.753387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25635 22:19:36.787473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25636 22:19:36.787960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25638 22:19:36.821643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25639 22:19:36.822123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25641 22:19:36.856100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25642 22:19:36.856530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25644 22:19:36.890523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25646 22:19:36.891154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25647 22:19:36.925177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25648 22:19:36.925588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25650 22:19:36.959811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25651 22:19:36.960228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25653 22:19:36.993390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25654 22:19:36.993800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25656 22:19:37.027515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25658 22:19:37.027996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25659 22:19:37.060961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25660 22:19:37.061387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25662 22:19:37.095084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25663 22:19:37.095497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25665 22:19:37.129150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25667 22:19:37.129598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25668 22:19:37.163321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25669 22:19:37.163747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25671 22:19:37.196162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25672 22:19:37.196511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25674 22:19:37.229886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25675 22:19:37.230304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25677 22:19:37.263672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25678 22:19:37.264063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25680 22:19:37.297427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25681 22:19:37.297838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25683 22:19:37.330997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25684 22:19:37.331428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25686 22:19:37.364273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25688 22:19:37.364744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25689 22:19:37.397352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25691 22:19:37.397805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25692 22:19:37.431044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25693 22:19:37.431377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25695 22:19:37.463949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25696 22:19:37.464270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25698 22:19:37.497492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25699 22:19:37.497961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25701 22:19:37.531717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25702 22:19:37.532180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25704 22:19:37.565792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25706 22:19:37.566385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25707 22:19:37.599335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25708 22:19:37.599792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25710 22:19:37.633246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25711 22:19:37.633665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25713 22:19:37.668160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25714 22:19:37.668577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25716 22:19:37.701821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25717 22:19:37.702243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25719 22:19:37.736396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25720 22:19:37.736805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25722 22:19:37.770058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25723 22:19:37.770502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25725 22:19:37.803532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25726 22:19:37.803881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25728 22:19:37.841415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25730 22:19:37.842008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25731 22:19:37.873164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25732 22:19:37.873527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25734 22:19:37.905228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25735 22:19:37.905535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25737 22:19:37.937833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25738 22:19:37.938157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25740 22:19:37.969561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25742 22:19:37.970093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25743 22:19:38.001846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25745 22:19:38.002304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25746 22:19:38.034737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25748 22:19:38.035186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25749 22:19:38.068081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25750 22:19:38.068554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25752 22:19:38.100790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25753 22:19:38.101110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25755 22:19:38.132521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25756 22:19:38.132822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25758 22:19:38.165624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25759 22:19:38.166071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25761 22:19:38.197394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25763 22:19:38.198004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25764 22:19:38.227863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25765 22:19:38.228310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25767 22:19:38.261675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25768 22:19:38.262151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25770 22:19:38.293449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25771 22:19:38.293922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25773 22:19:38.325561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25775 22:19:38.326152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25776 22:19:38.356331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25778 22:19:38.356882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25779 22:19:38.388508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25781 22:19:38.389070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25782 22:19:38.420512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25783 22:19:38.420974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25785 22:19:38.453909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25786 22:19:38.454339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25788 22:19:38.487493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25789 22:19:38.487967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25791 22:19:38.519262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25792 22:19:38.519706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25794 22:19:38.551392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25795 22:19:38.551865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25797 22:19:38.584320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25799 22:19:38.584873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25800 22:19:38.616286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25801 22:19:38.616730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25803 22:19:38.648606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25804 22:19:38.649078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25806 22:19:38.681150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25808 22:19:38.681707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25809 22:19:38.712499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25810 22:19:38.712971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25812 22:19:38.744031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25813 22:19:38.744527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25815 22:19:38.776964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25817 22:19:38.777523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25818 22:19:38.809090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25819 22:19:38.809570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25821 22:19:38.879837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25822 22:19:38.880316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25824 22:19:38.911886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25825 22:19:38.912349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25827 22:19:38.944131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25828 22:19:38.944598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25830 22:19:38.976855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25831 22:19:38.977281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25833 22:19:39.009144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25834 22:19:39.009540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25836 22:19:39.041290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25837 22:19:39.041680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25839 22:19:39.073430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25840 22:19:39.073842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25842 22:19:39.105493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25844 22:19:39.106063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25845 22:19:39.136142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25847 22:19:39.136644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25848 22:19:39.168153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25849 22:19:39.168631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25851 22:19:39.200629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25852 22:19:39.201045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25854 22:19:39.232812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25855 22:19:39.233249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25857 22:19:39.264959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25858 22:19:39.265366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25860 22:19:39.296853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25861 22:19:39.297270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25863 22:19:39.328941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25864 22:19:39.329386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25866 22:19:39.361425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25867 22:19:39.361800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25869 22:19:39.393433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25871 22:19:39.394018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25872 22:19:39.425096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25873 22:19:39.425553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25875 22:19:39.460727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25876 22:19:39.461201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25878 22:19:39.494834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25879 22:19:39.495205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25881 22:19:39.527330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25882 22:19:39.527729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25884 22:19:39.559487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25885 22:19:39.559941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25887 22:19:39.591249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25888 22:19:39.591692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25890 22:19:39.623756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25891 22:19:39.624126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25893 22:19:39.656732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25894 22:19:39.657184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25896 22:19:39.688032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25898 22:19:39.688451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25899 22:19:39.719989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25901 22:19:39.720452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25902 22:19:39.752187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25903 22:19:39.752592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25905 22:19:39.795655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25907 22:19:39.796267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25908 22:19:39.828706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25910 22:19:39.829448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25911 22:19:39.863775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25912 22:19:39.864195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25914 22:19:39.898991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25916 22:19:39.899571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25917 22:19:39.936152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25918 22:19:39.936621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25920 22:19:39.983052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25921 22:19:39.983531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25923 22:19:40.017818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25924 22:19:40.018299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25926 22:19:40.053679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25927 22:19:40.054090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25929 22:19:40.087554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25930 22:19:40.087995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25932 22:19:40.121167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25934 22:19:40.121618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25935 22:19:40.152653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25936 22:19:40.153051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25938 22:19:40.185520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25939 22:19:40.186005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25941 22:19:40.216953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25942 22:19:40.217427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25944 22:19:40.248358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25945 22:19:40.248805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25947 22:19:40.279579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25949 22:19:40.280112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25950 22:19:40.310091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25951 22:19:40.310539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25953 22:19:40.341376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25954 22:19:40.341822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25956 22:19:40.372032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25957 22:19:40.372449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25959 22:19:40.403729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25960 22:19:40.404161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25962 22:19:40.434716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25963 22:19:40.435060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25965 22:19:40.466094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25966 22:19:40.466441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25968 22:19:40.496876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25969 22:19:40.497327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25971 22:19:40.528598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25972 22:19:40.529046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25974 22:19:40.560253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25975 22:19:40.560604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25977 22:19:40.591077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25978 22:19:40.591423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25980 22:19:40.623102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25981 22:19:40.623513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25983 22:19:40.656169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25985 22:19:40.656627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25986 22:19:40.688702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25988 22:19:40.689262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25989 22:19:40.723468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25990 22:19:40.723994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25992 22:19:40.763186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25993 22:19:40.763639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25995 22:19:40.793769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25996 22:19:40.794166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25998 22:19:40.834145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
26000 22:19:40.834719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
26001 22:19:40.867591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
26003 22:19:40.869480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
26004 22:19:40.898661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
26005 22:19:40.899101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
26007 22:19:40.932186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
26008 22:19:40.932661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
26010 22:19:40.964889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
26011 22:19:40.965343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
26013 22:19:40.995632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
26015 22:19:40.996153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
26016 22:19:41.027264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
26017 22:19:41.027625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
26019 22:19:41.058157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
26020 22:19:41.058542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
26022 22:19:41.091529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
26023 22:19:41.092016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
26025 22:19:41.135287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
26026 22:19:41.135751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
26028 22:19:41.169366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
26030 22:19:41.169955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
26031 22:19:41.202313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
26032 22:19:41.202805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
26034 22:19:41.235978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
26035 22:19:41.236444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
26037 22:19:41.268852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
26038 22:19:41.269325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
26040 22:19:41.302873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
26042 22:19:41.303628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
26043 22:19:41.338056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
26044 22:19:41.338491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
26046 22:19:41.371929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
26047 22:19:41.372314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
26049 22:19:41.404861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
26050 22:19:41.405252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
26052 22:19:41.436488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
26053 22:19:41.436843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
26055 22:19:41.469591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
26056 22:19:41.469979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
26058 22:19:41.501884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
26059 22:19:41.502286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
26061 22:19:41.533768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
26062 22:19:41.534119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
26064 22:19:41.567292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
26065 22:19:41.567754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
26067 22:19:41.601141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
26068 22:19:41.601607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
26070 22:19:41.632191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
26071 22:19:41.632564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
26073 22:19:41.666710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
26074 22:19:41.667059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
26076 22:19:41.701199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
26077 22:19:41.701542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
26079 22:19:41.735967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
26081 22:19:41.736400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
26082 22:19:41.767253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
26084 22:19:41.767656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
26085 22:19:41.798818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
26086 22:19:41.799155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
26088 22:19:41.829489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
26089 22:19:41.829845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
26091 22:19:41.860345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
26092 22:19:41.860684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
26094 22:19:41.891686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
26095 22:19:41.892081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
26097 22:19:41.923419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
26098 22:19:41.923931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
26100 22:19:41.953956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
26101 22:19:41.954397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
26103 22:19:41.985335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
26104 22:19:41.985686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
26106 22:19:42.016138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
26107 22:19:42.016463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
26109 22:19:42.046884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
26111 22:19:42.047290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
26112 22:19:42.077120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
26113 22:19:42.077588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
26115 22:19:42.108075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
26116 22:19:42.108484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
26118 22:19:42.140212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
26120 22:19:42.140658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
26121 22:19:42.171366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
26122 22:19:42.171817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
26124 22:19:42.202108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
26125 22:19:42.202524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
26127 22:19:42.233943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
26129 22:19:42.234499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
26130 22:19:42.264869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
26131 22:19:42.265257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
26133 22:19:42.297969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
26135 22:19:42.298415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
26136 22:19:42.331144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26137 22:19:42.331502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
26139 22:19:42.367193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26140 22:19:42.367533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26142 22:19:42.398358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26144 22:19:42.398803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26145 22:19:42.428842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26146 22:19:42.429314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26148 22:19:42.459489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26149 22:19:42.459927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26151 22:19:42.490018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26152 22:19:42.490452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26154 22:19:42.521069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26156 22:19:42.521615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26157 22:19:42.552401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26159 22:19:42.552971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26160 22:19:42.583520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26161 22:19:42.583981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26163 22:19:42.615378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26164 22:19:42.615834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26166 22:19:42.646135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26167 22:19:42.646605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26169 22:19:42.678931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26170 22:19:42.679391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26172 22:19:42.711697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26174 22:19:42.712291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26175 22:19:42.745039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26176 22:19:42.745482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26178 22:19:42.778441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26180 22:19:42.779031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26181 22:19:42.811929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26182 22:19:42.812401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26184 22:19:42.843559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26185 22:19:42.843950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26187 22:19:42.875076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26188 22:19:42.875438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26190 22:19:42.907412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26191 22:19:42.907868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26193 22:19:42.939452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26194 22:19:42.939906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26196 22:19:42.972192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26197 22:19:42.972707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26199 22:19:43.004967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26200 22:19:43.005326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26202 22:19:43.036352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26203 22:19:43.036709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26205 22:19:43.067422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26206 22:19:43.067882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26208 22:19:43.098027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26209 22:19:43.098462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26211 22:19:43.129330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26212 22:19:43.129782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26214 22:19:43.161641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26215 22:19:43.162099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26217 22:19:43.192370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26218 22:19:43.192840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26220 22:19:43.223423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26221 22:19:43.223918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26223 22:19:43.254122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26224 22:19:43.254677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26226 22:19:43.285400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26228 22:19:43.285986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26229 22:19:43.316343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26230 22:19:43.316803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26232 22:19:43.350147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26233 22:19:43.350625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26235 22:19:43.382866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26237 22:19:43.383465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26238 22:19:43.415487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26240 22:19:43.415943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26241 22:19:43.447597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26242 22:19:43.448070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26244 22:19:43.478929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26246 22:19:43.479554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26247 22:19:43.510586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26249 22:19:43.511128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26250 22:19:43.542123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26252 22:19:43.542678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26253 22:19:43.574690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26254 22:19:43.575177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26256 22:19:43.606142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26257 22:19:43.606610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26259 22:19:43.636882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26260 22:19:43.637345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26262 22:19:43.668353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26264 22:19:43.668920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26265 22:19:43.701835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26266 22:19:43.702270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26268 22:19:43.737500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26269 22:19:43.737933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26271 22:19:43.775083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26272 22:19:43.775494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26274 22:19:43.809473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26276 22:19:43.810057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26277 22:19:43.841472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26279 22:19:43.841919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26280 22:19:43.872557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26281 22:19:43.873028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26283 22:19:43.904162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26284 22:19:43.904632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26286 22:19:43.935303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26288 22:19:43.935874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26289 22:19:43.992376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26290 22:19:43.992787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26292 22:19:44.023593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26293 22:19:44.023991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26295 22:19:44.055349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26296 22:19:44.055751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26298 22:19:44.086567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26300 22:19:44.087005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26301 22:19:44.118095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26303 22:19:44.118654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26304 22:19:44.149325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26305 22:19:44.149762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26307 22:19:44.180947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26308 22:19:44.181424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26310 22:19:44.213113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26311 22:19:44.213594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26313 22:19:44.244366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26314 22:19:44.244820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26316 22:19:44.275961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26318 22:19:44.276556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26319 22:19:44.307622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26320 22:19:44.308076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26322 22:19:44.338883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26323 22:19:44.339317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26325 22:19:44.369871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26327 22:19:44.370433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26328 22:19:44.401445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26330 22:19:44.402083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26331 22:19:44.432380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26332 22:19:44.432841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26334 22:19:44.463569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26335 22:19:44.464029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26337 22:19:44.494946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26338 22:19:44.495430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26340 22:19:44.526159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26341 22:19:44.526638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26343 22:19:44.557213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26344 22:19:44.557568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26346 22:19:44.588286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26347 22:19:44.588641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26349 22:19:44.619804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26350 22:19:44.620158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26352 22:19:44.650734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26353 22:19:44.651086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26355 22:19:44.681552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26356 22:19:44.681919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26358 22:19:44.712510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26359 22:19:44.712877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26361 22:19:44.743436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26362 22:19:44.743799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26364 22:19:44.773962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26365 22:19:44.774328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26367 22:19:44.804973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26368 22:19:44.805441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26370 22:19:44.836305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26371 22:19:44.836738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26373 22:19:44.868066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26374 22:19:44.868512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26376 22:19:44.899322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26377 22:19:44.899776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26379 22:19:44.930735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26380 22:19:44.931193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26382 22:19:44.961769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26383 22:19:44.962195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26385 22:19:44.992663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26386 22:19:44.993088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26388 22:19:45.024028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26389 22:19:45.024495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26391 22:19:45.056136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26392 22:19:45.056550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26394 22:19:45.087352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26395 22:19:45.087767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26397 22:19:45.118520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26399 22:19:45.119057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26400 22:19:45.158049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26401 22:19:45.158466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26403 22:19:45.188943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26404 22:19:45.189399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26406 22:19:45.220231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26407 22:19:45.220666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26409 22:19:45.251078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26410 22:19:45.251539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26412 22:19:45.281989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26413 22:19:45.282403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26415 22:19:45.312774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26416 22:19:45.313265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26418 22:19:45.345362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26419 22:19:45.345841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26421 22:19:45.376259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26422 22:19:45.376682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26424 22:19:45.407314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26425 22:19:45.407763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26427 22:19:45.438100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26428 22:19:45.438558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26430 22:19:45.469317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26431 22:19:45.469693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26433 22:19:45.499553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26434 22:19:45.499925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26436 22:19:45.530591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26438 22:19:45.531042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26439 22:19:45.561633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26440 22:19:45.562012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26442 22:19:45.592512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26443 22:19:45.592862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26445 22:19:45.623587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26446 22:19:45.623939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26448 22:19:45.657510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26449 22:19:45.657869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26451 22:19:45.689729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26452 22:19:45.690089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26454 22:19:45.720802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26455 22:19:45.721159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26457 22:19:45.751939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26458 22:19:45.752297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26460 22:19:45.783038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26461 22:19:45.783395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26463 22:19:45.813808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26464 22:19:45.814161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26466 22:19:45.844232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26467 22:19:45.844586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26469 22:19:45.875345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26470 22:19:45.875720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26472 22:19:45.906961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26473 22:19:45.907351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26475 22:19:45.938570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26477 22:19:45.939019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26478 22:19:45.969501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26479 22:19:45.969866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26481 22:19:46.000074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26482 22:19:46.000436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26484 22:19:46.032062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26485 22:19:46.032643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26487 22:19:46.065144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26488 22:19:46.065620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26490 22:19:46.096523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26491 22:19:46.096990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26493 22:19:46.127672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26494 22:19:46.128028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26496 22:19:46.159103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26497 22:19:46.159449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26499 22:19:46.189194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26500 22:19:46.189549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26502 22:19:46.223340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26504 22:19:46.223860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26505 22:19:46.255660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26507 22:19:46.256227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26508 22:19:46.287130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26509 22:19:46.287571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26511 22:19:46.318206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26512 22:19:46.318584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26514 22:19:46.349485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26515 22:19:46.349943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26517 22:19:46.380483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26519 22:19:46.381013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26520 22:19:46.410691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26522 22:19:46.411235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26523 22:19:46.444023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26524 22:19:46.444476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26526 22:19:46.475606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26528 22:19:46.476060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26529 22:19:46.506066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26531 22:19:46.506499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26532 22:19:46.536847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26533 22:19:46.537243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26535 22:19:46.567666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26536 22:19:46.568067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26538 22:19:46.601159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26540 22:19:46.601604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26541 22:19:46.633739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26542 22:19:46.634179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26544 22:19:46.665367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26545 22:19:46.665781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26547 22:19:46.697712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26549 22:19:46.698160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26550 22:19:46.729453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26552 22:19:46.729899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26553 22:19:46.761214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26555 22:19:46.761793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26556 22:19:46.792784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26558 22:19:46.793341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26559 22:19:46.824366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26560 22:19:46.824778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26562 22:19:46.856154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26563 22:19:46.856522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26565 22:19:46.887583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26567 22:19:46.887998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26568 22:19:46.918545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26570 22:19:46.918977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26571 22:19:46.948977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26572 22:19:46.949319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26574 22:19:46.980285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26575 22:19:46.980616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26577 22:19:47.011289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26578 22:19:47.011644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26580 22:19:47.041433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26581 22:19:47.041776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26583 22:19:47.072687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26584 22:19:47.073041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26586 22:19:47.103675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26587 22:19:47.104037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26589 22:19:47.134513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26591 22:19:47.134958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26592 22:19:47.164781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26593 22:19:47.165141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26595 22:19:47.195257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26596 22:19:47.195611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26598 22:19:47.226184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26599 22:19:47.226542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26601 22:19:47.257134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26603 22:19:47.257577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26604 22:19:47.288196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26605 22:19:47.288647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26607 22:19:47.319380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26608 22:19:47.319726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26610 22:19:47.350681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26611 22:19:47.351039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26613 22:19:47.380980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26615 22:19:47.381418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26616 22:19:47.411609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26617 22:19:47.411964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26619 22:19:47.442232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26621 22:19:47.442677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26622 22:19:47.472282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26623 22:19:47.472633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26625 22:19:47.502302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26627 22:19:47.502759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26628 22:19:47.536251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26629 22:19:47.536622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26631 22:19:47.567924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26632 22:19:47.568282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26634 22:19:47.600909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26635 22:19:47.601374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26637 22:19:47.648453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26638 22:19:47.648859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26640 22:19:47.679528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26642 22:19:47.679949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26643 22:19:47.709822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26644 22:19:47.710167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26646 22:19:47.740789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26647 22:19:47.741153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26649 22:19:47.771607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26651 22:19:47.772058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26652 22:19:47.802556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26654 22:19:47.803002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26655 22:19:47.834794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26657 22:19:47.835210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26658 22:19:47.865964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26659 22:19:47.866449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26661 22:19:47.897399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26662 22:19:47.897865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26664 22:19:47.928307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26665 22:19:47.928764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26667 22:19:47.959342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26668 22:19:47.959792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26670 22:19:47.990245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26672 22:19:47.990777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26673 22:19:48.021068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26674 22:19:48.021544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26676 22:19:48.051748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26678 22:19:48.052190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26679 22:19:48.083412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26681 22:19:48.083849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26682 22:19:48.114229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26683 22:19:48.114686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26685 22:19:48.145286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26687 22:19:48.145845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26688 22:19:48.176374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26689 22:19:48.176814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26691 22:19:48.207431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26692 22:19:48.207871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26694 22:19:48.239104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26695 22:19:48.239569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26697 22:19:48.269845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26698 22:19:48.270308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26700 22:19:48.300365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26701 22:19:48.300758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26703 22:19:48.331447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26704 22:19:48.331799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26706 22:19:48.362438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26708 22:19:48.362996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26709 22:19:48.392902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26710 22:19:48.393257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26712 22:19:48.423955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26713 22:19:48.424323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26715 22:19:48.455128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26717 22:19:48.455795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26718 22:19:48.485922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26720 22:19:48.486455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26721 22:19:48.516830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26722 22:19:48.517170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26724 22:19:48.547595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26726 22:19:48.548034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26727 22:19:48.578539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26729 22:19:48.578939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26730 22:19:48.609525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26731 22:19:48.609874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26733 22:19:48.640314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26735 22:19:48.640806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26736 22:19:48.671403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26737 22:19:48.671765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26739 22:19:48.701644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26740 22:19:48.702017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26742 22:19:48.732071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26743 22:19:48.732440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26745 22:19:48.763339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26746 22:19:48.763760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26748 22:19:48.794273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26749 22:19:48.794744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26751 22:19:48.824707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26752 22:19:48.825074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26754 22:19:48.855848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26755 22:19:48.856298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26757 22:19:48.887948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26758 22:19:48.888354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26760 22:19:48.919589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26762 22:19:48.920143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26763 22:19:48.951020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26765 22:19:48.951564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26766 22:19:48.983449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26767 22:19:48.983921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26769 22:19:49.015253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26770 22:19:49.015691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26772 22:19:49.046978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26774 22:19:49.047525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26775 22:19:49.108899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26776 22:19:49.109315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26778 22:19:49.140462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26779 22:19:49.140896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26781 22:19:49.171712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26782 22:19:49.172039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26784 22:19:49.203035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26786 22:19:49.203601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26787 22:19:49.234000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26788 22:19:49.234412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26790 22:19:49.266166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26791 22:19:49.266511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26793 22:19:49.298420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26795 22:19:49.298935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26796 22:19:49.330136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26798 22:19:49.330619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26799 22:19:49.361987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26800 22:19:49.362370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26802 22:19:49.393892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26803 22:19:49.394260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26805 22:19:49.425612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26806 22:19:49.426044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26808 22:19:49.457071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26809 22:19:49.457495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26811 22:19:49.489101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26813 22:19:49.489634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26814 22:19:49.520126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26815 22:19:49.520464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26817 22:19:49.551630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26819 22:19:49.552059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26820 22:19:49.583182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26821 22:19:49.583516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26823 22:19:49.614153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26824 22:19:49.614501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26826 22:19:49.645340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26827 22:19:49.645795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26829 22:19:49.677137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26831 22:19:49.677712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26832 22:19:49.708627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26833 22:19:49.709010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26835 22:19:49.739767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26836 22:19:49.740108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26838 22:19:49.771076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26839 22:19:49.771416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26841 22:19:49.802566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26843 22:19:49.803022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26844 22:19:49.833275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26845 22:19:49.833622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26847 22:19:49.863518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26848 22:19:49.863884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26850 22:19:49.893817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26851 22:19:49.894172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26853 22:19:49.925452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26855 22:19:49.926004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26856 22:19:49.956114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26857 22:19:49.956588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26859 22:19:49.987672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26860 22:19:49.988131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26862 22:19:50.018950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26863 22:19:50.019405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26865 22:19:50.049896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26866 22:19:50.050366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26868 22:19:50.080911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26870 22:19:50.081462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26871 22:19:50.112349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26872 22:19:50.112811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26874 22:19:50.143315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26875 22:19:50.143764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26877 22:19:50.173395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26878 22:19:50.173864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26880 22:19:50.203900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26881 22:19:50.204365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26883 22:19:50.235105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26885 22:19:50.235651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26886 22:19:50.266120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26887 22:19:50.266551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26889 22:19:50.296687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26890 22:19:50.297136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26892 22:19:50.327570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26893 22:19:50.328047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26895 22:19:50.358819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26896 22:19:50.359289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26898 22:19:50.389268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26899 22:19:50.389704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26901 22:19:50.419754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26902 22:19:50.420238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26904 22:19:50.451111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26906 22:19:50.451749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26907 22:19:50.481725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26909 22:19:50.482350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26910 22:19:50.512320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26911 22:19:50.512803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26913 22:19:50.543065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26914 22:19:50.543431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26916 22:19:50.573053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26917 22:19:50.573412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26919 22:19:50.603332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26920 22:19:50.603689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26922 22:19:50.634016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26923 22:19:50.634377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26925 22:19:50.664775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26926 22:19:50.665145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26928 22:19:50.695208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26929 22:19:50.695564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26931 22:19:50.725268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26932 22:19:50.725627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26934 22:19:50.755991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26935 22:19:50.756347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26937 22:19:50.786509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26939 22:19:50.786963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26940 22:19:50.816901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26941 22:19:50.817255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26943 22:19:50.847496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26944 22:19:50.847860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26946 22:19:50.878810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26947 22:19:50.879256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26949 22:19:50.909566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26950 22:19:50.910062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26952 22:19:50.941014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26953 22:19:50.941502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26955 22:19:50.972428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26956 22:19:50.972904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26958 22:19:51.004004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26959 22:19:51.004485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26961 22:19:51.035340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26962 22:19:51.035822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26964 22:19:51.067034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26965 22:19:51.067519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26967 22:19:51.098502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26969 22:19:51.099129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26970 22:19:51.129435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26971 22:19:51.129927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26973 22:19:51.160455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26974 22:19:51.160940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26976 22:19:51.191042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26977 22:19:51.191508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26979 22:19:51.221617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26980 22:19:51.222102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26982 22:19:51.253427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26983 22:19:51.253944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26985 22:19:51.283891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26986 22:19:51.284358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26988 22:19:51.315499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26989 22:19:51.315967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26991 22:19:51.347241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26993 22:19:51.347829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26994 22:19:51.379038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26996 22:19:51.379632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26997 22:19:51.409962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26998 22:19:51.410430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
27000 22:19:51.441284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
27001 22:19:51.441765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
27003 22:19:51.473478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
27004 22:19:51.473920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
27006 22:19:51.505247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
27007 22:19:51.505669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
27009 22:19:51.535967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
27010 22:19:51.536445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
27012 22:19:51.567270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
27013 22:19:51.567740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
27015 22:19:51.600210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
27016 22:19:51.600675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
27018 22:19:51.631519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
27020 22:19:51.632069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
27021 22:19:51.663281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
27023 22:19:51.663823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
27024 22:19:51.694795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
27026 22:19:51.695343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
27027 22:19:51.726514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
27029 22:19:51.727031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
27030 22:19:51.758609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
27032 22:19:51.759133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
27033 22:19:51.791901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
27035 22:19:51.792451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
27036 22:19:51.823778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
27037 22:19:51.824164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
27039 22:19:51.855430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
27041 22:19:51.855897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
27042 22:19:51.887393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
27043 22:19:51.887781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
27045 22:19:51.919342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
27047 22:19:51.919793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
27048 22:19:51.950864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
27050 22:19:51.951317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
27051 22:19:51.982668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
27052 22:19:51.983040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
27054 22:19:52.013900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
27055 22:19:52.014401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
27057 22:19:52.045327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
27058 22:19:52.045686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
27060 22:19:52.081198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
27061 22:19:52.081558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
27063 22:19:52.112957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
27065 22:19:52.113385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
27066 22:19:52.143541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
27067 22:19:52.143884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
27069 22:19:52.173816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
27070 22:19:52.174158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
27072 22:19:52.204431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
27073 22:19:52.204897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
27075 22:19:52.235403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
27077 22:19:52.236025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
27078 22:19:52.266929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
27079 22:19:52.267374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
27081 22:19:52.297790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
27082 22:19:52.298232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
27084 22:19:52.328470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
27085 22:19:52.328858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
27087 22:19:52.359850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
27088 22:19:52.360255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
27090 22:19:52.391430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
27091 22:19:52.391876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
27093 22:19:52.421845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
27094 22:19:52.422247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
27096 22:19:52.452760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
27097 22:19:52.453161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
27099 22:19:52.484096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
27100 22:19:52.484505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
27102 22:19:52.515659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
27103 22:19:52.516112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
27105 22:19:52.547175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
27106 22:19:52.547571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
27108 22:19:52.578979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
27109 22:19:52.579363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
27111 22:19:52.609991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
27112 22:19:52.610452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
27114 22:19:52.641275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
27115 22:19:52.641699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
27117 22:19:52.672989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
27118 22:19:52.673448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
27120 22:19:52.704842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
27121 22:19:52.705392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
27123 22:19:52.736262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
27124 22:19:52.736723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
27126 22:19:52.767773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
27127 22:19:52.768234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
27129 22:19:52.799425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
27131 22:19:52.799965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
27132 22:19:52.831150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
27133 22:19:52.831594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
27135 22:19:52.862069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
27136 22:19:52.862474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
27138 22:19:52.893007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27140 22:19:52.893435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27141 22:19:52.924457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27142 22:19:52.924859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27144 22:19:52.955563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27146 22:19:52.956108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27147 22:19:52.986532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27149 22:19:52.986943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27150 22:19:53.018251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27151 22:19:53.018719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27153 22:19:53.048937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27154 22:19:53.049377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27156 22:19:53.079861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27157 22:19:53.080289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27159 22:19:53.111920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27160 22:19:53.112333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27162 22:19:53.143515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27163 22:19:53.143959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27165 22:19:53.174859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27167 22:19:53.175383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27168 22:19:53.205234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27169 22:19:53.205701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27171 22:19:53.235898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27172 22:19:53.236345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27174 22:19:53.267411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27175 22:19:53.267847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27177 22:19:53.298101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27178 22:19:53.298504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27180 22:19:53.329230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27181 22:19:53.329703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27183 22:19:53.359706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27184 22:19:53.360072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27186 22:19:53.390518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27188 22:19:53.391135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27189 22:19:53.422204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27190 22:19:53.422591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27192 22:19:53.453553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27193 22:19:53.453914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27195 22:19:53.484123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27196 22:19:53.484483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27198 22:19:53.514891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27199 22:19:53.515237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27201 22:19:53.544993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27202 22:19:53.545334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27204 22:19:53.575215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27205 22:19:53.575557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27207 22:19:53.605223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27208 22:19:53.605563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27210 22:19:53.635539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27212 22:19:53.635949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27213 22:19:53.666344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27215 22:19:53.666762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27216 22:19:53.696437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27218 22:19:53.696877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27219 22:19:53.727060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27221 22:19:53.727505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27222 22:19:53.757961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27223 22:19:53.758306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27225 22:19:53.788524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27226 22:19:53.788867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27228 22:19:53.818911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27229 22:19:53.819259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27231 22:19:53.850664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27233 22:19:53.851213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27234 22:19:53.881267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27235 22:19:53.881615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27237 22:19:53.912257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27238 22:19:53.912599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27240 22:19:53.943179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27241 22:19:53.943528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27243 22:19:53.973804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27244 22:19:53.974165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27246 22:19:54.004220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27247 22:19:54.004560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27249 22:19:54.035302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27251 22:19:54.035705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27252 22:19:54.066478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27254 22:19:54.067037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27255 22:19:54.098437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27257 22:19:54.098998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27258 22:19:54.128852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27259 22:19:54.129305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27261 22:19:54.159752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27262 22:19:54.160223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27264 22:19:54.208306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27265 22:19:54.208720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27267 22:19:54.243469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27268 22:19:54.243893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27270 22:19:54.275451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27272 22:19:54.275892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27273 22:19:54.306124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27275 22:19:54.306556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27276 22:19:54.336964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27277 22:19:54.337374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27279 22:19:54.368027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27280 22:19:54.368445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27282 22:19:54.399522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27283 22:19:54.399925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27285 22:19:54.430025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27287 22:19:54.430589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27288 22:19:54.460873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27289 22:19:54.461296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27291 22:19:54.492463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27292 22:19:54.492877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27294 22:19:54.523710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27295 22:19:54.524136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27297 22:19:54.555250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27299 22:19:54.555812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27300 22:19:54.585861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27301 22:19:54.586303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27303 22:19:54.617204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27304 22:19:54.617706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27306 22:19:54.647926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27307 22:19:54.648384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27309 22:19:54.679357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27310 22:19:54.679699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27312 22:19:54.709925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27313 22:19:54.710269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27315 22:19:54.740333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27316 22:19:54.740675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27318 22:19:54.770926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27319 22:19:54.771265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27321 22:19:54.801269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27323 22:19:54.801848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27324 22:19:54.831493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27325 22:19:54.831921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27327 22:19:54.862089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27328 22:19:54.862497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27330 22:19:54.892813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27331 22:19:54.893269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27333 22:19:54.924618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27334 22:19:54.925041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27336 22:19:54.955439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27337 22:19:54.955904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27339 22:19:54.986166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27340 22:19:54.986614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27342 22:19:55.017419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27343 22:19:55.017816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27345 22:19:55.047921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27346 22:19:55.048267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27348 22:19:55.078395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27350 22:19:55.078869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27351 22:19:55.110448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27353 22:19:55.110963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27354 22:19:55.141375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27355 22:19:55.141752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27357 22:19:55.171539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27358 22:19:55.171877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27360 22:19:55.201796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27361 22:19:55.202107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27363 22:19:55.232516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27364 22:19:55.232982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27366 22:19:55.263927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27367 22:19:55.264384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27369 22:19:55.294665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27371 22:19:55.295198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27372 22:19:55.326068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27373 22:19:55.326567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27375 22:19:55.357139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27376 22:19:55.357627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27378 22:19:55.387810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27380 22:19:55.388350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27381 22:19:55.418857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27382 22:19:55.419317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27384 22:19:55.449621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27385 22:19:55.450093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27387 22:19:55.480521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27388 22:19:55.480932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27390 22:19:55.511406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27391 22:19:55.511814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27393 22:19:55.542211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27394 22:19:55.542638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27396 22:19:55.573605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27397 22:19:55.574035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27399 22:19:55.604015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27400 22:19:55.604429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27402 22:19:55.635095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27403 22:19:55.635571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27405 22:19:55.665627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27406 22:19:55.665995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27408 22:19:55.695717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27409 22:19:55.696062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27411 22:19:55.726054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27412 22:19:55.726403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27414 22:19:55.756829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27415 22:19:55.757178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27417 22:19:55.787429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27418 22:19:55.787783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27420 22:19:55.817896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27421 22:19:55.818302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27423 22:19:55.849529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27424 22:19:55.849991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27426 22:19:55.880119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27427 22:19:55.880475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27429 22:19:55.911129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27430 22:19:55.911529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27432 22:19:55.941930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27433 22:19:55.942322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27435 22:19:55.972686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27436 22:19:55.973040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27438 22:19:56.004273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27440 22:19:56.004834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27441 22:19:56.035431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27443 22:19:56.035995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27444 22:19:56.066227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27446 22:19:56.066855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27447 22:19:56.097695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27448 22:19:56.098098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27450 22:19:56.128488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27452 22:19:56.129083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27453 22:19:56.159484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27454 22:19:56.159958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27456 22:19:56.190625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27458 22:19:56.191348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27459 22:19:56.221319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27460 22:19:56.221696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27462 22:19:56.253263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27463 22:19:56.253642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27465 22:19:56.283717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27466 22:19:56.284137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27468 22:19:56.314603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27470 22:19:56.315189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27471 22:19:56.345814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27472 22:19:56.346313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27474 22:19:56.376822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27475 22:19:56.377311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27477 22:19:56.407580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27478 22:19:56.408031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27480 22:19:56.438782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27481 22:19:56.439175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27483 22:19:56.476665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27484 22:19:56.477079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27486 22:19:56.513280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27488 22:19:56.513695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27489 22:19:56.544285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27490 22:19:56.544723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27492 22:19:56.574902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27493 22:19:56.575259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27495 22:19:56.605818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27497 22:19:56.606388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27498 22:19:56.636931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27499 22:19:56.637386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27501 22:19:56.669614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27503 22:19:56.670180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27504 22:19:56.700089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27505 22:19:56.700451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27507 22:19:56.731177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27508 22:19:56.731613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27510 22:19:56.762126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27511 22:19:56.762584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27513 22:19:56.793061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27514 22:19:56.793500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27516 22:19:56.823744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27517 22:19:56.824170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27519 22:19:56.854615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27521 22:19:56.855149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27522 22:19:56.885892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27523 22:19:56.886332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27525 22:19:56.917194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27527 22:19:56.917731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27528 22:19:56.947605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27530 22:19:56.948038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27531 22:19:56.978853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27532 22:19:56.979205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27534 22:19:57.009387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27536 22:19:57.009824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27537 22:19:57.039675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27538 22:19:57.040018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27540 22:19:57.071313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27541 22:19:57.071656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27543 22:19:57.103294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27544 22:19:57.103692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27546 22:19:57.133766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27548 22:19:57.134297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27549 22:19:57.164011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27551 22:19:57.164553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27552 22:19:57.195340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27553 22:19:57.195784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27555 22:19:57.226149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27556 22:19:57.226543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27558 22:19:57.257984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27559 22:19:57.258331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27561 22:19:57.289204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27562 22:19:57.289551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27564 22:19:57.319848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27565 22:19:57.320192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27567 22:19:57.351091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27568 22:19:57.351435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27570 22:19:57.382792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27571 22:19:57.383132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27573 22:19:57.413816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27574 22:19:57.414162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27576 22:19:57.444738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27577 22:19:57.445312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27579 22:19:57.477552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27580 22:19:57.478034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27582 22:19:57.511198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27583 22:19:57.511550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27585 22:19:57.543365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27586 22:19:57.543721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27588 22:19:57.574115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27589 22:19:57.574582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27591 22:19:57.605333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27592 22:19:57.605798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27594 22:19:57.636345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27595 22:19:57.636778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27597 22:19:57.668471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27598 22:19:57.668915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27600 22:19:57.699545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27601 22:19:57.699924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27603 22:19:57.729913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27604 22:19:57.730260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27606 22:19:57.760185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27607 22:19:57.760548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27609 22:19:57.790808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27610 22:19:57.791147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27612 22:19:57.821183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27613 22:19:57.821661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27615 22:19:57.851791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27616 22:19:57.852223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27618 22:19:57.882713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27619 22:19:57.883149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27621 22:19:57.913784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27623 22:19:57.914311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27624 22:19:57.944513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27625 22:19:57.944950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27627 22:19:57.975418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27628 22:19:57.975827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27630 22:19:58.006505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27632 22:19:58.006956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27633 22:19:58.037602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27634 22:19:58.038019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27636 22:19:58.068450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27637 22:19:58.068843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27639 22:19:58.100253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27641 22:19:58.100687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27642 22:19:58.131815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27643 22:19:58.132223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27645 22:19:58.162574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27647 22:19:58.162993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27648 22:19:58.193361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27649 22:19:58.193813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27651 22:19:58.224320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27652 22:19:58.224777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27654 22:19:58.256073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27656 22:19:58.256541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27657 22:19:58.286203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27658 22:19:58.286545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27660 22:19:58.316638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27661 22:19:58.316983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27663 22:19:58.347171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27664 22:19:58.347512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27666 22:19:58.377218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27667 22:19:58.377558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27669 22:19:58.407317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27670 22:19:58.407669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27672 22:19:58.437595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27673 22:19:58.437956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27675 22:19:58.467952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27676 22:19:58.468304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27678 22:19:58.498064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27679 22:19:58.498421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27681 22:19:58.530476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27683 22:19:58.530939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27684 22:19:58.561958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27685 22:19:58.562388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27687 22:19:58.592809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27688 22:19:58.593216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27690 22:19:58.624018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27691 22:19:58.624481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27693 22:19:58.655837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27694 22:19:58.656311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27696 22:19:58.686840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27697 22:19:58.687291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27699 22:19:58.717261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27700 22:19:58.717704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27702 22:19:58.748064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27703 22:19:58.748528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27705 22:19:58.779000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27706 22:19:58.779462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27708 22:19:58.809353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27709 22:19:58.809796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27711 22:19:58.839695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27712 22:19:58.840040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27714 22:19:58.870487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27716 22:19:58.870921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27717 22:19:58.901002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27719 22:19:58.901443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27720 22:19:58.931403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27721 22:19:58.931756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27723 22:19:58.962017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27724 22:19:58.962372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27726 22:19:58.992608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27727 22:19:58.992961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27729 22:19:59.023024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27730 22:19:59.023435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27732 22:19:59.053285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27733 22:19:59.053653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27735 22:19:59.084372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27736 22:19:59.084729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27738 22:19:59.114693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27739 22:19:59.115057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27741 22:19:59.145032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27742 22:19:59.145396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27744 22:19:59.175410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27745 22:19:59.175775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27747 22:19:59.205598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27748 22:19:59.205952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27750 22:19:59.236151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27751 22:19:59.236500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27753 22:19:59.266273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27754 22:19:59.266626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27756 22:19:59.296575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27757 22:19:59.296930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27759 22:19:59.352816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27760 22:19:59.353288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27762 22:19:59.387262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27763 22:19:59.387755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27765 22:19:59.419999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27767 22:19:59.420625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27768 22:19:59.452596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27769 22:19:59.453079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27771 22:19:59.485725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27773 22:19:59.486380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27774 22:19:59.519911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27775 22:19:59.520384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27777 22:19:59.552786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27778 22:19:59.553256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27780 22:19:59.586552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27782 22:19:59.587100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27783 22:19:59.624479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27784 22:19:59.624941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27786 22:19:59.664086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27787 22:19:59.664556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27789 22:19:59.697171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27790 22:19:59.697534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27792 22:19:59.730461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27794 22:19:59.730880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27795 22:19:59.763442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27797 22:19:59.763936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27798 22:19:59.794371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27800 22:19:59.794922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27801 22:19:59.835695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27802 22:19:59.836158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27804 22:19:59.867407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27805 22:19:59.867789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27807 22:19:59.899290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27808 22:19:59.899629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27810 22:19:59.930152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27812 22:19:59.930681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27813 22:19:59.961460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27814 22:19:59.961948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27816 22:19:59.992467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27817 22:19:59.992832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27819 22:20:00.023041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27820 22:20:00.023384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27822 22:20:00.053043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27823 22:20:00.053394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27825 22:20:00.083310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27826 22:20:00.083668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27828 22:20:00.112965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27830 22:20:00.113378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27831 22:20:00.143601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27833 22:20:00.144009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27834 22:20:00.173788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27836 22:20:00.174219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27837 22:20:00.204283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27839 22:20:00.204701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27840 22:20:00.234501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27842 22:20:00.234924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27843 22:20:00.264166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27844 22:20:00.264508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27846 22:20:00.295282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27847 22:20:00.295622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27849 22:20:00.325428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27851 22:20:00.325857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27852 22:20:00.355533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27853 22:20:00.355877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27855 22:20:00.386022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27856 22:20:00.386414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27858 22:20:00.417214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27859 22:20:00.417697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27861 22:20:00.447849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27862 22:20:00.448205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27864 22:20:00.477941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27866 22:20:00.478382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27867 22:20:00.508369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27868 22:20:00.508713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27870 22:20:00.538179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27871 22:20:00.538499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27873 22:20:00.568297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27874 22:20:00.568664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27876 22:20:00.598472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27878 22:20:00.598888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27879 22:20:00.628228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27880 22:20:00.628569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27882 22:20:00.658194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27883 22:20:00.658537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27885 22:20:00.689006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27886 22:20:00.689347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27888 22:20:00.719645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27889 22:20:00.720097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27891 22:20:00.751549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27892 22:20:00.752034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27894 22:20:00.782651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27895 22:20:00.783142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27897 22:20:00.813245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27898 22:20:00.813709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27900 22:20:00.843881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27901 22:20:00.844220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27903 22:20:00.874001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27904 22:20:00.874371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27906 22:20:00.904073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27908 22:20:00.904490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27909 22:20:00.935201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27911 22:20:00.935612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27912 22:20:00.965260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27913 22:20:00.965599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27915 22:20:00.995469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27917 22:20:00.995878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27918 22:20:01.026135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27919 22:20:01.026500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27921 22:20:01.056416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27922 22:20:01.056757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27924 22:20:01.087246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27925 22:20:01.087592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27927 22:20:01.117711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27928 22:20:01.118076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27930 22:20:01.148066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27931 22:20:01.148416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27933 22:20:01.177675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27934 22:20:01.178019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27936 22:20:01.207714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27937 22:20:01.208063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27939 22:20:01.237764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27940 22:20:01.238121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27942 22:20:01.268063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27943 22:20:01.268432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27945 22:20:01.298048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27947 22:20:01.298479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27948 22:20:01.328380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27949 22:20:01.328691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27951 22:20:01.358155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27952 22:20:01.358513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27954 22:20:01.388737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27955 22:20:01.389108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27957 22:20:01.419559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27958 22:20:01.419921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27960 22:20:01.449874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27962 22:20:01.450333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27963 22:20:01.480160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27964 22:20:01.480514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27966 22:20:01.510220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27967 22:20:01.510579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27969 22:20:01.540380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27970 22:20:01.540745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27972 22:20:01.570543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27974 22:20:01.571006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27975 22:20:01.600281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27976 22:20:01.600657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27978 22:20:01.631312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27979 22:20:01.631782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27981 22:20:01.662218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27982 22:20:01.662684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27984 22:20:01.692280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27985 22:20:01.692777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27987 22:20:01.722164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27988 22:20:01.722538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27990 22:20:01.752079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27991 22:20:01.752404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27993 22:20:01.782127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27995 22:20:01.782833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27996 22:20:01.812864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27997 22:20:01.813264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27999 22:20:01.845583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
28001 22:20:01.846211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
28002 22:20:01.877749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
28003 22:20:01.878142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
28005 22:20:01.909134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
28006 22:20:01.909510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
28008 22:20:01.941945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
28010 22:20:01.942388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
28011 22:20:01.974733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
28012 22:20:01.975229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
28014 22:20:02.008610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
28016 22:20:02.009072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
28017 22:20:02.041537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
28018 22:20:02.041947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
28020 22:20:02.073883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
28021 22:20:02.074332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
28023 22:20:02.115171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
28025 22:20:02.115729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
28026 22:20:02.150233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
28028 22:20:02.150758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
28029 22:20:02.184705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
28031 22:20:02.185355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
28032 22:20:02.227731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
28034 22:20:02.228241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
28035 22:20:02.259379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
28036 22:20:02.259728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
28038 22:20:02.291288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
28039 22:20:02.291679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
28041 22:20:02.321870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
28042 22:20:02.322342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
28044 22:20:02.355194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
28045 22:20:02.355692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
28047 22:20:02.388352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
28048 22:20:02.388814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
28050 22:20:02.423361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
28052 22:20:02.424091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
28053 22:20:02.460391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
28054 22:20:02.460797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
28056 22:20:02.499655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
28058 22:20:02.500335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
28059 22:20:02.535588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
28061 22:20:02.535982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
28062 22:20:02.567866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
28063 22:20:02.568162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
28065 22:20:02.601424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
28066 22:20:02.601778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
28068 22:20:02.632949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
28069 22:20:02.633326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
28071 22:20:02.667299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
28072 22:20:02.667848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
28074 22:20:02.703206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
28075 22:20:02.703763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
28077 22:20:02.739488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
28079 22:20:02.740062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
28080 22:20:02.775327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
28082 22:20:02.775840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
28083 22:20:02.816771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
28085 22:20:02.817341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
28086 22:20:02.848350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
28088 22:20:02.848779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
28089 22:20:02.879451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
28090 22:20:02.879869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
28092 22:20:02.911406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
28094 22:20:02.911949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
28095 22:20:02.944687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
28096 22:20:02.945226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
28098 22:20:02.978933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
28099 22:20:02.979406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
28101 22:20:03.011413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
28103 22:20:03.011947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
28104 22:20:03.042285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
28106 22:20:03.042809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
28107 22:20:03.073309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
28108 22:20:03.073763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
28110 22:20:03.104111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
28112 22:20:03.104648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
28113 22:20:03.134816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
28115 22:20:03.135345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
28116 22:20:03.165293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
28117 22:20:03.165749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
28119 22:20:03.200274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
28120 22:20:03.200617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
28122 22:20:03.235907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
28124 22:20:03.236325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
28125 22:20:03.274493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
28127 22:20:03.274909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
28128 22:20:03.306420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
28130 22:20:03.307088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
28131 22:20:03.339685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
28132 22:20:03.340227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
28134 22:20:03.372236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
28136 22:20:03.372635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
28137 22:20:03.402996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28139 22:20:03.403563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
28140 22:20:03.434068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28142 22:20:03.434686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28143 22:20:03.464933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28144 22:20:03.465398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28146 22:20:03.495527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28147 22:20:03.495941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28149 22:20:03.526855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28150 22:20:03.527282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28152 22:20:03.557244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28153 22:20:03.557563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28155 22:20:03.587587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28157 22:20:03.587991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28158 22:20:03.618280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28160 22:20:03.618811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28161 22:20:03.649701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28163 22:20:03.650314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28164 22:20:03.681062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28166 22:20:03.681666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28167 22:20:03.712056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28168 22:20:03.712512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28170 22:20:03.743127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28171 22:20:03.743595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28173 22:20:03.775089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28174 22:20:03.775560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28176 22:20:03.806023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28178 22:20:03.806634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28179 22:20:03.836672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28180 22:20:03.837084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28182 22:20:03.867694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28183 22:20:03.868107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28185 22:20:03.899036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28186 22:20:03.899459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28188 22:20:03.930008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28189 22:20:03.930456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28191 22:20:03.960734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28192 22:20:03.961164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28194 22:20:03.991682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28196 22:20:03.992216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28197 22:20:04.023442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28199 22:20:04.023979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28200 22:20:04.053703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28201 22:20:04.054168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28203 22:20:04.084768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28204 22:20:04.085168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28206 22:20:04.115389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28207 22:20:04.115650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28209 22:20:04.145952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28210 22:20:04.146390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28212 22:20:04.176649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28213 22:20:04.177028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28215 22:20:04.207962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28216 22:20:04.208337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28218 22:20:04.238161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28219 22:20:04.238522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28221 22:20:04.268452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28222 22:20:04.268795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28224 22:20:04.298958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28226 22:20:04.299372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28227 22:20:04.329362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28228 22:20:04.329692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28230 22:20:04.360292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28231 22:20:04.360659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28233 22:20:04.391064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28234 22:20:04.391412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28236 22:20:04.421401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28237 22:20:04.421762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28239 22:20:04.478028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28241 22:20:04.478491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28242 22:20:04.508206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28243 22:20:04.508558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28245 22:20:04.538923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28246 22:20:04.539273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28248 22:20:04.568770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28249 22:20:04.569120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28251 22:20:04.599448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28253 22:20:04.599880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28254 22:20:04.629710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28255 22:20:04.630057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28257 22:20:04.660049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28258 22:20:04.660395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28260 22:20:04.690952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28261 22:20:04.691415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28263 22:20:04.723008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28265 22:20:04.723457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28266 22:20:04.753642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28268 22:20:04.754116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28269 22:20:04.785014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28271 22:20:04.785470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28272 22:20:04.815359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28273 22:20:04.815684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28275 22:20:04.845595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28276 22:20:04.845929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28278 22:20:04.875755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28280 22:20:04.876131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28281 22:20:04.906174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28283 22:20:04.906588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28284 22:20:04.937403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28286 22:20:04.937993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28287 22:20:04.968331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28289 22:20:04.968872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28290 22:20:05.000060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28292 22:20:05.000510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28293 22:20:05.033450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28294 22:20:05.033944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28296 22:20:05.064868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28298 22:20:05.065489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28299 22:20:05.100152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28300 22:20:05.100541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28302 22:20:05.131831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28303 22:20:05.132227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28305 22:20:05.164436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28306 22:20:05.164911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28308 22:20:05.195661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28309 22:20:05.196096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28311 22:20:05.227580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28313 22:20:05.228102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28314 22:20:05.259049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28315 22:20:05.259511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28317 22:20:05.290219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28319 22:20:05.290662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28320 22:20:05.324734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28322 22:20:05.325189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28323 22:20:05.357355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28324 22:20:05.357787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28326 22:20:05.388949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28327 22:20:05.389379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28329 22:20:05.421137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28330 22:20:05.421575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28332 22:20:05.452272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28334 22:20:05.452709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28335 22:20:05.483251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28337 22:20:05.483683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28338 22:20:05.513578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28339 22:20:05.513996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28341 22:20:05.547942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28343 22:20:05.548395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28344 22:20:05.579452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28346 22:20:05.580020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28347 22:20:05.610253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28349 22:20:05.610974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28350 22:20:05.644567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28351 22:20:05.644966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28353 22:20:05.675662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28355 22:20:05.676284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28356 22:20:05.706977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28357 22:20:05.707443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28359 22:20:05.739155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28361 22:20:05.739790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28362 22:20:05.770232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28364 22:20:05.770848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28365 22:20:05.801773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28367 22:20:05.802402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28368 22:20:05.832989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28369 22:20:05.833436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28371 22:20:05.864100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28373 22:20:05.864647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28374 22:20:05.894870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28376 22:20:05.895442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28377 22:20:05.925606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28378 22:20:05.926062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28380 22:20:05.956940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28381 22:20:05.957331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28383 22:20:05.988141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28385 22:20:05.988712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28386 22:20:06.018957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28387 22:20:06.019416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28389 22:20:06.051593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28391 22:20:06.052228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28392 22:20:06.082530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28394 22:20:06.083108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28395 22:20:06.113892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28397 22:20:06.114347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28398 22:20:06.145235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28399 22:20:06.145703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28401 22:20:06.176331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28402 22:20:06.176787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28404 22:20:06.209167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28406 22:20:06.209736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28407 22:20:06.241434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28409 22:20:06.242004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28410 22:20:06.272686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28411 22:20:06.273095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28413 22:20:06.307647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28415 22:20:06.308209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28416 22:20:06.340205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28417 22:20:06.340659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28419 22:20:06.373115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28421 22:20:06.373672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28422 22:20:06.406716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28423 22:20:06.407186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28425 22:20:06.445504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28426 22:20:06.445934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28428 22:20:06.478266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28429 22:20:06.478722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28431 22:20:06.510619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28433 22:20:06.511157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28434 22:20:06.544230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28435 22:20:06.544689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28437 22:20:06.576171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28438 22:20:06.576647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28440 22:20:06.607716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28441 22:20:06.608169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28443 22:20:06.640762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28444 22:20:06.641131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28446 22:20:06.671824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28447 22:20:06.672201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28449 22:20:06.703462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28450 22:20:06.703825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28452 22:20:06.734879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28453 22:20:06.735299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28455 22:20:06.766907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28457 22:20:06.767490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28458 22:20:06.798654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28460 22:20:06.799186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28461 22:20:06.831642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28462 22:20:06.832108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28464 22:20:06.863760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28465 22:20:06.864200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28467 22:20:06.895643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28469 22:20:06.896172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28470 22:20:06.927523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28472 22:20:06.927954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28473 22:20:06.959103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28474 22:20:06.959529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28476 22:20:06.991032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28477 22:20:06.991493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28479 22:20:07.023446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28480 22:20:07.023914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28482 22:20:07.053937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28483 22:20:07.054410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28485 22:20:07.085308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28486 22:20:07.085687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28488 22:20:07.116546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28489 22:20:07.116956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28491 22:20:07.147935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28493 22:20:07.148377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28494 22:20:07.181308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28495 22:20:07.181681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28497 22:20:07.213293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28499 22:20:07.213878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28500 22:20:07.244946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28502 22:20:07.245548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28503 22:20:07.277203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28505 22:20:07.277635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28506 22:20:07.309023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28508 22:20:07.309593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28509 22:20:07.340487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28510 22:20:07.340960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28512 22:20:07.372132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28514 22:20:07.372692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28515 22:20:07.403777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28517 22:20:07.404314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28518 22:20:07.435899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28520 22:20:07.436436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28521 22:20:07.467423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28522 22:20:07.467874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28524 22:20:07.502561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28526 22:20:07.503109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28527 22:20:07.534637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28529 22:20:07.535012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28530 22:20:07.565387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28531 22:20:07.565669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28533 22:20:07.596014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28534 22:20:07.596357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28536 22:20:07.626067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28538 22:20:07.626506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28539 22:20:07.656684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28541 22:20:07.657095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28542 22:20:07.687163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28543 22:20:07.687510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28545 22:20:07.717107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28546 22:20:07.717450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28548 22:20:07.748114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28549 22:20:07.748486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28551 22:20:07.778989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28552 22:20:07.779332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28554 22:20:07.808757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28555 22:20:07.809098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28557 22:20:07.840042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28558 22:20:07.840380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28560 22:20:07.870925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28562 22:20:07.871493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28563 22:20:07.901330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28565 22:20:07.901874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28566 22:20:07.931851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28567 22:20:07.932301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28569 22:20:07.962802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28571 22:20:07.963375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28572 22:20:07.993024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28573 22:20:07.993480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28575 22:20:08.024101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28576 22:20:08.024573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28578 22:20:08.054526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28580 22:20:08.055014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28581 22:20:08.085432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28582 22:20:08.085805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28584 22:20:08.115374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28585 22:20:08.115733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28587 22:20:08.145153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28588 22:20:08.145505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28590 22:20:08.175107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28591 22:20:08.175468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28593 22:20:08.205685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28594 22:20:08.206046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28596 22:20:08.235617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28597 22:20:08.235976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28599 22:20:08.267082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28600 22:20:08.267448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28602 22:20:08.297840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28604 22:20:08.298327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28605 22:20:08.329580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28606 22:20:08.329955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28608 22:20:08.360508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28610 22:20:08.361078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28611 22:20:08.391438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28612 22:20:08.391782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28614 22:20:08.422892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28616 22:20:08.423279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28617 22:20:08.453171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28619 22:20:08.453575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28620 22:20:08.483509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28621 22:20:08.483994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28623 22:20:08.515787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28625 22:20:08.516361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28626 22:20:08.547279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28627 22:20:08.547735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28629 22:20:08.577860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28630 22:20:08.578229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28632 22:20:08.609219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28634 22:20:08.609667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28635 22:20:08.642896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28637 22:20:08.643677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28638 22:20:08.675188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28639 22:20:08.675621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28641 22:20:08.705955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28642 22:20:08.706298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28644 22:20:08.737016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28646 22:20:08.737436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28647 22:20:08.768491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28648 22:20:08.768979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28650 22:20:08.800879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28651 22:20:08.801345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28653 22:20:08.832845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28655 22:20:08.833369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28656 22:20:08.863466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28658 22:20:08.863969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28659 22:20:08.893663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28660 22:20:08.894118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28662 22:20:08.924501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28664 22:20:08.925032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28665 22:20:08.957845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28667 22:20:08.958452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28668 22:20:08.989320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28670 22:20:08.989938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28671 22:20:09.020115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28672 22:20:09.020580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28674 22:20:09.052171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28676 22:20:09.052529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28677 22:20:09.084049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28679 22:20:09.084386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28680 22:20:09.114964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28682 22:20:09.115303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28683 22:20:09.145160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28684 22:20:09.145644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28686 22:20:09.175499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28688 22:20:09.175963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28689 22:20:09.205676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28691 22:20:09.206112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28692 22:20:09.236323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28693 22:20:09.236667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28695 22:20:09.267408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28696 22:20:09.267779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28698 22:20:09.298238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28700 22:20:09.298733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28701 22:20:09.329056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28702 22:20:09.329400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28704 22:20:09.359803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28705 22:20:09.360161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28707 22:20:09.390474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28709 22:20:09.390893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28710 22:20:09.421688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28712 22:20:09.422414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28713 22:20:09.452319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28714 22:20:09.452676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28716 22:20:09.482461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28718 22:20:09.482950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28719 22:20:09.512934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28721 22:20:09.513356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28722 22:20:09.547973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28723 22:20:09.548318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28725 22:20:09.605026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28727 22:20:09.605467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28728 22:20:09.636220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28730 22:20:09.636717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28731 22:20:09.667224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28732 22:20:09.667592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28734 22:20:09.698049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28735 22:20:09.698328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28737 22:20:09.728808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28738 22:20:09.729147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28740 22:20:09.759379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28741 22:20:09.759724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28743 22:20:09.791014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28745 22:20:09.791432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28746 22:20:09.824140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28747 22:20:09.824617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28749 22:20:09.855982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28750 22:20:09.856297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28752 22:20:09.886880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28753 22:20:09.887254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28755 22:20:09.917088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28756 22:20:09.917431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28758 22:20:09.947527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28760 22:20:09.947936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28761 22:20:09.977880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28762 22:20:09.978219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28764 22:20:10.010411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28766 22:20:10.010926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28767 22:20:10.041780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28769 22:20:10.042193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28770 22:20:10.072587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28771 22:20:10.072967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28773 22:20:10.104553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28774 22:20:10.105006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28776 22:20:10.135554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28777 22:20:10.135989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28779 22:20:10.166363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28781 22:20:10.166943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28782 22:20:10.197509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28783 22:20:10.197969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28785 22:20:10.228285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28786 22:20:10.228739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28788 22:20:10.259195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28789 22:20:10.259645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28791 22:20:10.291001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28793 22:20:10.291542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28794 22:20:10.322061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28795 22:20:10.322510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28797 22:20:10.353629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28798 22:20:10.354116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28800 22:20:10.385393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28802 22:20:10.386000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28803 22:20:10.416684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28805 22:20:10.417225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28806 22:20:10.448066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28808 22:20:10.448593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28809 22:20:10.478949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28810 22:20:10.479404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28812 22:20:10.509614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28813 22:20:10.510084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28815 22:20:10.539970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28816 22:20:10.540319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28818 22:20:10.571005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28819 22:20:10.571479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28821 22:20:10.603051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28823 22:20:10.603624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28824 22:20:10.635344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28825 22:20:10.635726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28827 22:20:10.667835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28829 22:20:10.668390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28830 22:20:10.699275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28831 22:20:10.699623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28833 22:20:10.730116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28835 22:20:10.730664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28836 22:20:10.763681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28838 22:20:10.764229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28839 22:20:10.799160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28840 22:20:10.799572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28842 22:20:10.833886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28844 22:20:10.834276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28845 22:20:10.875611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28846 22:20:10.875997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28848 22:20:10.907891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28849 22:20:10.908257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28851 22:20:10.939962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28853 22:20:10.940317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28854 22:20:10.971532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28855 22:20:10.971934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28857 22:20:11.003068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28858 22:20:11.003466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28860 22:20:11.034272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28862 22:20:11.034728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28863 22:20:11.066312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28865 22:20:11.066767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28866 22:20:11.100519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28867 22:20:11.100944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28869 22:20:11.136574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28871 22:20:11.137011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28872 22:20:11.168410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28873 22:20:11.168806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28875 22:20:11.200435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28877 22:20:11.200879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28878 22:20:11.235590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28880 22:20:11.236043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28881 22:20:11.267772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28882 22:20:11.268197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28884 22:20:11.299919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28885 22:20:11.300325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28887 22:20:11.334866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28888 22:20:11.335311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28890 22:20:11.366860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28891 22:20:11.367257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28893 22:20:11.398037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28894 22:20:11.398452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28896 22:20:11.430789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28898 22:20:11.431353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28899 22:20:11.462474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28901 22:20:11.462915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28902 22:20:11.495391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28903 22:20:11.495750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28905 22:20:11.526549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28907 22:20:11.526977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28908 22:20:11.558099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28909 22:20:11.558443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28911 22:20:11.591045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28913 22:20:11.591482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28914 22:20:11.621566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28915 22:20:11.621916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28917 22:20:11.652351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28918 22:20:11.652917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28920 22:20:11.683188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28921 22:20:11.683612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28923 22:20:11.714912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28925 22:20:11.715542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28926 22:20:11.747662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28927 22:20:11.748080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28929 22:20:11.781408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28930 22:20:11.781792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28932 22:20:11.814815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28933 22:20:11.815207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28935 22:20:11.847939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28936 22:20:11.848430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28938 22:20:11.879603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28940 22:20:11.880181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28941 22:20:11.911150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28942 22:20:11.911503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28944 22:20:11.943167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28945 22:20:11.943496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28947 22:20:11.974837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28948 22:20:11.975140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28950 22:20:12.005962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28952 22:20:12.006410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28953 22:20:12.037188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28954 22:20:12.037540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28956 22:20:12.068689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28958 22:20:12.069261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28959 22:20:12.100037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28960 22:20:12.100409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28962 22:20:12.131038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28963 22:20:12.131381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28965 22:20:12.163174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28967 22:20:12.163647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28968 22:20:12.194552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28970 22:20:12.195146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28971 22:20:12.225300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28972 22:20:12.225672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28974 22:20:12.256255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28975 22:20:12.256608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28977 22:20:12.286973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28978 22:20:12.287317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28980 22:20:12.317760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28982 22:20:12.318267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28983 22:20:12.349106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28984 22:20:12.349460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28986 22:20:12.380313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28987 22:20:12.380661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28989 22:20:12.411362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28990 22:20:12.411716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28992 22:20:12.442033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28994 22:20:12.442580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28995 22:20:12.473633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28996 22:20:12.474127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28998 22:20:12.505874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
29000 22:20:12.506301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
29001 22:20:12.537234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
29003 22:20:12.537728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
29004 22:20:12.568155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
29005 22:20:12.568572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
29007 22:20:12.599523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
29008 22:20:12.599976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
29010 22:20:12.630707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
29011 22:20:12.631178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
29013 22:20:12.661606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
29014 22:20:12.662088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
29016 22:20:12.693552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
29018 22:20:12.694145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
29019 22:20:12.724537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
29020 22:20:12.724973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
29022 22:20:12.755536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
29023 22:20:12.755958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
29025 22:20:12.787763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
29026 22:20:12.788164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
29028 22:20:12.818557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
29030 22:20:12.818969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
29031 22:20:12.849550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
29033 22:20:12.849962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
29034 22:20:12.880064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
29035 22:20:12.880421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
29037 22:20:12.911897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
29038 22:20:12.912238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
29040 22:20:12.943291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
29041 22:20:12.943630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
29043 22:20:12.976420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
29044 22:20:12.976896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
29046 22:20:13.008342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
29047 22:20:13.008739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
29049 22:20:13.040144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
29050 22:20:13.040571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
29052 22:20:13.077613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
29053 22:20:13.078097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
29055 22:20:13.117801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
29056 22:20:13.118130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
29058 22:20:13.150114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
29060 22:20:13.150650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
29061 22:20:13.183556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
29063 22:20:13.184102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
29064 22:20:13.214924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
29066 22:20:13.215414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
29067 22:20:13.246066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
29069 22:20:13.246552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
29070 22:20:13.277719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
29072 22:20:13.278332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
29073 22:20:13.309776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
29074 22:20:13.310265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
29076 22:20:13.342394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
29078 22:20:13.342848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
29079 22:20:13.374670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
29080 22:20:13.375148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
29082 22:20:13.405711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
29084 22:20:13.406222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
29085 22:20:13.436720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
29087 22:20:13.437255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
29088 22:20:13.467550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
29090 22:20:13.468036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
29091 22:20:13.498867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
29092 22:20:13.499408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
29094 22:20:13.531282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
29095 22:20:13.531760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
29097 22:20:13.563246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
29098 22:20:13.563623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
29100 22:20:13.596615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
29101 22:20:13.597122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
29103 22:20:13.629004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
29104 22:20:13.629295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
29106 22:20:13.660042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
29108 22:20:13.660487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
29109 22:20:13.691954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
29110 22:20:13.692352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
29112 22:20:13.723502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
29114 22:20:13.724127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
29115 22:20:13.754695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
29116 22:20:13.755097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
29118 22:20:13.787453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
29119 22:20:13.787855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
29121 22:20:13.820049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
29122 22:20:13.820400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
29124 22:20:13.851400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
29126 22:20:13.852035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
29127 22:20:13.882943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
29128 22:20:13.883395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
29130 22:20:13.913779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
29131 22:20:13.914229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
29133 22:20:13.945677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
29135 22:20:13.946218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
29136 22:20:13.977269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
29138 22:20:13.977866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29139 22:20:14.008037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29140 22:20:14.008366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29142 22:20:14.039529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29144 22:20:14.039970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29145 22:20:14.070948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29147 22:20:14.071385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29148 22:20:14.102102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29150 22:20:14.102544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29151 22:20:14.133687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29152 22:20:14.133976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29154 22:20:14.165029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29155 22:20:14.165381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29157 22:20:14.196904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29158 22:20:14.197252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29160 22:20:14.228351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29161 22:20:14.228719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29163 22:20:14.259610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29164 22:20:14.259990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29166 22:20:14.290870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29167 22:20:14.291283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29169 22:20:14.323064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29170 22:20:14.323550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29172 22:20:14.354909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29174 22:20:14.355432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29175 22:20:14.386841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29177 22:20:14.387279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29178 22:20:14.417897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29179 22:20:14.418261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29181 22:20:14.448922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29182 22:20:14.449210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29184 22:20:14.480000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29185 22:20:14.480354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29187 22:20:14.511441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29188 22:20:14.511798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29190 22:20:14.543200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29191 22:20:14.543599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29193 22:20:14.575170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29195 22:20:14.575621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29196 22:20:14.606538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29198 22:20:14.606977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29199 22:20:14.638059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29201 22:20:14.638541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29202 22:20:14.688000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29203 22:20:14.688391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29205 22:20:14.721400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29206 22:20:14.721748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29208 22:20:14.752662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29209 22:20:14.753007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29211 22:20:14.783851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29213 22:20:14.784281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29214 22:20:14.815364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29216 22:20:14.815802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29217 22:20:14.847165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29219 22:20:14.847792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29220 22:20:14.880023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29222 22:20:14.880564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29223 22:20:14.911609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29224 22:20:14.911897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29226 22:20:14.943442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29228 22:20:14.943735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29229 22:20:14.975320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29230 22:20:14.975668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29232 22:20:15.006892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29233 22:20:15.007263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29235 22:20:15.037843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29236 22:20:15.038211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29238 22:20:15.068911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29239 22:20:15.069196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29241 22:20:15.100062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29242 22:20:15.100423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29244 22:20:15.131476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29245 22:20:15.131833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29247 22:20:15.162485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29249 22:20:15.162943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29250 22:20:15.194642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29251 22:20:15.195112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29253 22:20:15.226712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29254 22:20:15.227004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29256 22:20:15.257610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29258 22:20:15.258055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29259 22:20:15.288779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29260 22:20:15.289148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29262 22:20:15.320235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29264 22:20:15.320738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29265 22:20:15.351103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29266 22:20:15.351481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29268 22:20:15.382018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29269 22:20:15.382378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29271 22:20:15.414651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29272 22:20:15.415008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29274 22:20:15.445979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29276 22:20:15.446409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29277 22:20:15.477309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29279 22:20:15.477728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29280 22:20:15.508548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29281 22:20:15.508922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29283 22:20:15.539545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29284 22:20:15.539866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29286 22:20:15.571202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29287 22:20:15.571473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29289 22:20:15.602408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29291 22:20:15.602700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29292 22:20:15.634096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29293 22:20:15.634454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29295 22:20:15.665982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29296 22:20:15.666333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29298 22:20:15.697685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29299 22:20:15.697974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29301 22:20:15.729013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29303 22:20:15.729446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29304 22:20:15.760575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29305 22:20:15.760925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29307 22:20:15.791811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29308 22:20:15.792174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29310 22:20:15.823325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29312 22:20:15.823819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29313 22:20:15.854565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29314 22:20:15.854914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29316 22:20:15.885767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29318 22:20:15.886249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29319 22:20:15.917509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29321 22:20:15.917948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29322 22:20:15.948965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29323 22:20:15.949309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29325 22:20:15.981175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29327 22:20:15.981594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29328 22:20:16.012311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29329 22:20:16.012674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29331 22:20:16.043768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29333 22:20:16.044222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29334 22:20:16.075116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29335 22:20:16.075528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29337 22:20:16.107154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29339 22:20:16.107604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29340 22:20:16.139044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29342 22:20:16.139496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29343 22:20:16.170844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29344 22:20:16.171293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29346 22:20:16.201775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29348 22:20:16.202202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29349 22:20:16.235909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29351 22:20:16.236341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29352 22:20:16.267434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29353 22:20:16.267783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29355 22:20:16.299345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29356 22:20:16.299641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29358 22:20:16.332972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29360 22:20:16.333268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29361 22:20:16.364694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29363 22:20:16.365127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29364 22:20:16.396034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29366 22:20:16.396314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29367 22:20:16.428415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29369 22:20:16.428691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29370 22:20:16.459749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29371 22:20:16.460027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29373 22:20:16.491236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29375 22:20:16.491585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29376 22:20:16.522495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29378 22:20:16.522841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29379 22:20:16.553825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29380 22:20:16.554178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29382 22:20:16.585565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29383 22:20:16.585993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29385 22:20:16.617357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29387 22:20:16.617781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29388 22:20:16.648766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29389 22:20:16.649173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29391 22:20:16.682031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29393 22:20:16.682464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29394 22:20:16.714615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29395 22:20:16.715105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29397 22:20:16.747569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29398 22:20:16.748042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29400 22:20:16.779648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29401 22:20:16.780129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29403 22:20:16.812069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29405 22:20:16.812622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29406 22:20:16.845026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29408 22:20:16.845481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29409 22:20:16.876939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29410 22:20:16.877371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29412 22:20:16.908981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29414 22:20:16.909407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29415 22:20:16.940628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29416 22:20:16.941116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29418 22:20:16.972428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29419 22:20:16.972823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29421 22:20:17.005653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29422 22:20:17.006020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29424 22:20:17.037712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29425 22:20:17.038071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29427 22:20:17.069983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29428 22:20:17.070340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29430 22:20:17.101616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29431 22:20:17.102072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29433 22:20:17.133761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29435 22:20:17.134219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29436 22:20:17.166069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29438 22:20:17.166526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29439 22:20:17.198439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29441 22:20:17.198915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29442 22:20:17.231726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29444 22:20:17.232190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29445 22:20:17.264145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29447 22:20:17.264746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29448 22:20:17.295510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29450 22:20:17.295959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29451 22:20:17.327300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29453 22:20:17.327738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29454 22:20:17.358830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29455 22:20:17.359177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29457 22:20:17.390144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29458 22:20:17.390487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29460 22:20:17.422009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29461 22:20:17.422466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29463 22:20:17.454857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29464 22:20:17.455336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29466 22:20:17.487174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29467 22:20:17.487658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29469 22:20:17.519306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29470 22:20:17.519591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29472 22:20:17.551007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29474 22:20:17.551287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29475 22:20:17.581759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29477 22:20:17.582132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29478 22:20:17.613173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29479 22:20:17.613586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29481 22:20:17.644773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29483 22:20:17.645155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29484 22:20:17.678136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29485 22:20:17.678504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29487 22:20:17.711464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29489 22:20:17.711958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29490 22:20:17.744305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29492 22:20:17.744851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29493 22:20:17.778257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29495 22:20:17.778809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29496 22:20:17.811391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29497 22:20:17.811884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29499 22:20:17.845709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29500 22:20:17.846178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29502 22:20:17.879261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29503 22:20:17.879734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29505 22:20:17.911632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29506 22:20:17.912103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29508 22:20:17.944120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29509 22:20:17.944568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29511 22:20:17.976842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29512 22:20:17.977276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29514 22:20:18.011282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29516 22:20:18.011729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29517 22:20:18.045506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29518 22:20:18.045929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29520 22:20:18.079519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29522 22:20:18.080140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29523 22:20:18.113669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29524 22:20:18.114158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29526 22:20:18.147587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29527 22:20:18.148069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29529 22:20:18.180288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29531 22:20:18.180914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29532 22:20:18.213441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29533 22:20:18.213862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29535 22:20:18.245131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29537 22:20:18.245547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29538 22:20:18.276497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29540 22:20:18.276808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29541 22:20:18.308754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29543 22:20:18.309123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29544 22:20:18.340393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29545 22:20:18.340762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29547 22:20:18.372095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29549 22:20:18.372649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29550 22:20:18.405533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29552 22:20:18.406000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29553 22:20:18.439735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29555 22:20:18.440181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29556 22:20:18.473187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29558 22:20:18.473631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29559 22:20:18.506184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29560 22:20:18.506606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29562 22:20:18.539119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29564 22:20:18.539760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29565 22:20:18.572299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29566 22:20:18.572777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29568 22:20:18.603861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29569 22:20:18.604267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29571 22:20:18.635428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29573 22:20:18.635977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29574 22:20:18.666936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29575 22:20:18.667296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29577 22:20:18.698025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29578 22:20:18.698409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29580 22:20:18.729814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29582 22:20:18.730277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29583 22:20:18.763839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29584 22:20:18.764239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29586 22:20:18.797492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29587 22:20:18.797898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29589 22:20:18.831408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29590 22:20:18.831765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29592 22:20:18.864397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29593 22:20:18.864746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29595 22:20:18.896746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29596 22:20:18.897106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29598 22:20:18.928449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29599 22:20:18.928802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29601 22:20:18.960245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29603 22:20:18.960846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29604 22:20:18.992065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29605 22:20:18.992416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29607 22:20:19.025116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29608 22:20:19.025486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29610 22:20:19.057178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29611 22:20:19.057620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29613 22:20:19.089846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29614 22:20:19.090238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29616 22:20:19.122009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29617 22:20:19.122425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29619 22:20:19.153908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29621 22:20:19.154399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29622 22:20:19.187051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29624 22:20:19.187603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29625 22:20:19.220629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29627 22:20:19.221210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29628 22:20:19.253887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29630 22:20:19.254370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29631 22:20:19.287270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29632 22:20:19.287684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29634 22:20:19.320791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29635 22:20:19.321231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29637 22:20:19.356242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29639 22:20:19.356706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29640 22:20:19.389880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29642 22:20:19.390348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29643 22:20:19.421345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29644 22:20:19.421751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29646 22:20:19.453633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29648 22:20:19.454256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29649 22:20:19.486314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29651 22:20:19.486892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29652 22:20:19.519727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29654 22:20:19.520156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29655 22:20:19.552333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29657 22:20:19.552775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29658 22:20:19.584590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29660 22:20:19.585208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29661 22:20:19.616763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29662 22:20:19.617249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29664 22:20:19.648988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29666 22:20:19.649596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29667 22:20:19.681575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29668 22:20:19.682078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29670 22:20:19.716696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29671 22:20:19.717142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29673 22:20:19.750436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29675 22:20:19.751014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29676 22:20:19.791971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29677 22:20:19.792460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29679 22:20:19.840667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29681 22:20:19.841115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29682 22:20:19.872645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29683 22:20:19.873063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29685 22:20:19.904363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29687 22:20:19.904804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29688 22:20:19.936013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29690 22:20:19.936455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29691 22:20:19.967431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29692 22:20:19.967905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29694 22:20:19.999505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29696 22:20:20.000081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29697 22:20:20.030363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29699 22:20:20.030954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29700 22:20:20.061832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29701 22:20:20.062325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29703 22:20:20.093526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29705 22:20:20.094215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29706 22:20:20.124860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29707 22:20:20.125341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29709 22:20:20.157141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29710 22:20:20.157607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29712 22:20:20.189309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29714 22:20:20.189865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29715 22:20:20.220766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29716 22:20:20.221228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29718 22:20:20.252656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29720 22:20:20.253220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29721 22:20:20.284429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29723 22:20:20.284974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29724 22:20:20.315994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29726 22:20:20.316536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29727 22:20:20.347708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29728 22:20:20.348136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29730 22:20:20.379489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29731 22:20:20.379913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29733 22:20:20.411479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29734 22:20:20.411946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29736 22:20:20.443438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29738 22:20:20.443869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29739 22:20:20.475065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29741 22:20:20.475510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29742 22:20:20.506635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29744 22:20:20.507164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29745 22:20:20.538437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29747 22:20:20.539132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29748 22:20:20.571265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29750 22:20:20.571895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29751 22:20:20.603233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29753 22:20:20.603679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29754 22:20:20.634614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29756 22:20:20.635163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29757 22:20:20.666658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29758 22:20:20.667118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29760 22:20:20.698263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29762 22:20:20.698835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29763 22:20:20.730194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29765 22:20:20.730673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29766 22:20:20.763060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29767 22:20:20.763534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29769 22:20:20.794125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29770 22:20:20.794575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29772 22:20:20.827177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29773 22:20:20.827703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29775 22:20:20.859728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29777 22:20:20.860321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29778 22:20:20.891296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29780 22:20:20.891865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29781 22:20:20.922651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29782 22:20:20.923146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29784 22:20:20.953687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29785 22:20:20.954177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29787 22:20:20.984776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29789 22:20:20.985412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29790 22:20:21.015656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29791 22:20:21.016156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29793 22:20:21.047262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29794 22:20:21.047714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29796 22:20:21.078636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29797 22:20:21.079129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29799 22:20:21.110134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29801 22:20:21.110606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29802 22:20:21.141814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29803 22:20:21.142261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29805 22:20:21.173730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29806 22:20:21.174242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29808 22:20:21.204821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29809 22:20:21.205324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29811 22:20:21.236374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29812 22:20:21.236864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29814 22:20:21.267553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29815 22:20:21.268050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29817 22:20:21.299761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29819 22:20:21.300336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29820 22:20:21.332307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29821 22:20:21.332754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29823 22:20:21.364188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29824 22:20:21.364634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29826 22:20:21.395448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29827 22:20:21.395892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29829 22:20:21.427401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29830 22:20:21.427754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29832 22:20:21.458446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29834 22:20:21.458969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29835 22:20:21.489568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29837 22:20:21.490279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29838 22:20:21.520764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29839 22:20:21.521339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29841 22:20:21.552068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29842 22:20:21.552615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29844 22:20:21.587257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29845 22:20:21.587710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29847 22:20:21.620210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29849 22:20:21.620670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29850 22:20:21.651923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29852 22:20:21.652386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29853 22:20:21.684406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29855 22:20:21.684995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29856 22:20:21.717576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29857 22:20:21.718092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29859 22:20:21.755162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29861 22:20:21.755718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29862 22:20:21.796588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29863 22:20:21.797046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29865 22:20:21.837774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29867 22:20:21.838219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29868 22:20:21.872594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29869 22:20:21.873095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29871 22:20:21.907308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29873 22:20:21.907789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29874 22:20:21.942477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29876 22:20:21.942853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29877 22:20:21.976700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29878 22:20:21.977161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29880 22:20:22.012809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29881 22:20:22.013289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29883 22:20:22.048883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29884 22:20:22.049361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29886 22:20:22.084044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29887 22:20:22.084520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29889 22:20:22.118411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29891 22:20:22.118960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29892 22:20:22.153339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29893 22:20:22.153821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29895 22:20:22.187638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29896 22:20:22.188098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29898 22:20:22.222375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29900 22:20:22.222899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29901 22:20:22.258045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29902 22:20:22.258506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29904 22:20:22.292999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29906 22:20:22.293516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29907 22:20:22.327611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29908 22:20:22.328079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29910 22:20:22.363448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29911 22:20:22.363889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29913 22:20:22.398057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29914 22:20:22.398520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29916 22:20:22.433905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29917 22:20:22.434359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29919 22:20:22.468798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29920 22:20:22.469222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29922 22:20:22.501384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29923 22:20:22.501814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29925 22:20:22.533346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29926 22:20:22.533785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29928 22:20:22.566718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29929 22:20:22.567164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29931 22:20:22.600315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29932 22:20:22.600791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29934 22:20:22.633335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29935 22:20:22.633811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29937 22:20:22.668407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29938 22:20:22.668867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29940 22:20:22.704018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29941 22:20:22.704473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29943 22:20:22.738931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29944 22:20:22.739386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29946 22:20:22.773430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29947 22:20:22.773893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29949 22:20:22.808270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29950 22:20:22.808723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29952 22:20:22.843663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29953 22:20:22.844136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29955 22:20:22.878264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29956 22:20:22.878707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29958 22:20:22.910362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29960 22:20:22.910890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29961 22:20:22.944935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29962 22:20:22.945408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29964 22:20:22.982911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29965 22:20:22.983381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29967 22:20:23.017562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29969 22:20:23.018057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29970 22:20:23.052467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29971 22:20:23.052904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29973 22:20:23.087646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29974 22:20:23.088079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29976 22:20:23.120826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29978 22:20:23.121276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29979 22:20:23.152965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29980 22:20:23.153406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29982 22:20:23.184433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29984 22:20:23.184869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29985 22:20:23.216799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29986 22:20:23.217285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29988 22:20:23.247912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29989 22:20:23.248292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29991 22:20:23.279065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29992 22:20:23.279549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29994 22:20:23.309654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29995 22:20:23.310093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29997 22:20:23.341050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29998 22:20:23.341482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
30000 22:20:23.373567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
30002 22:20:23.374168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
30003 22:20:23.405008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
30004 22:20:23.405471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
30006 22:20:23.435611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
30008 22:20:23.436109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
30009 22:20:23.469975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
30010 22:20:23.470434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
30012 22:20:23.502260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
30014 22:20:23.502693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
30015 22:20:23.533094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
30016 22:20:23.533442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
30018 22:20:23.563759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
30019 22:20:23.564097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
30021 22:20:23.595311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
30023 22:20:23.595713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
30024 22:20:23.625942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
30025 22:20:23.626276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
30027 22:20:23.656844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
30028 22:20:23.657183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
30030 22:20:23.687842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
30032 22:20:23.688226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
30033 22:20:23.718526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
30035 22:20:23.718995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
30036 22:20:23.748992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
30037 22:20:23.749329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
30039 22:20:23.780292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
30040 22:20:23.780631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
30042 22:20:23.811502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
30044 22:20:23.812071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
30045 22:20:23.843027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
30046 22:20:23.843476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
30048 22:20:23.873887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
30049 22:20:23.874345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
30051 22:20:23.904941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
30052 22:20:23.905399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
30054 22:20:23.936352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
30055 22:20:23.936828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
30057 22:20:23.967434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
30058 22:20:23.967908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
30060 22:20:23.998878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
30061 22:20:23.999348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
30063 22:20:24.029933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
30064 22:20:24.030399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
30066 22:20:24.060611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
30067 22:20:24.061007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
30069 22:20:24.091370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
30070 22:20:24.091830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
30072 22:20:24.121998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
30073 22:20:24.122469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
30075 22:20:24.153020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
30076 22:20:24.153499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
30078 22:20:24.184662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
30080 22:20:24.185123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
30081 22:20:24.215429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
30082 22:20:24.215776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
30084 22:20:24.245677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
30085 22:20:24.246014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
30087 22:20:24.276612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
30088 22:20:24.276950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
30090 22:20:24.307507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
30091 22:20:24.307846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
30093 22:20:24.339277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
30095 22:20:24.339714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
30096 22:20:24.370109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
30097 22:20:24.370449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
30099 22:20:24.401257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
30100 22:20:24.401631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
30102 22:20:24.431578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
30103 22:20:24.431940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
30105 22:20:24.464344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
30107 22:20:24.464883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
30108 22:20:24.498205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
30110 22:20:24.498768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
30111 22:20:24.529975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
30113 22:20:24.530474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
30114 22:20:24.561018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
30116 22:20:24.561596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
30117 22:20:24.593008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
30118 22:20:24.593449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
30120 22:20:24.624113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
30121 22:20:24.624501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
30123 22:20:24.654708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
30124 22:20:24.655168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
30126 22:20:24.685419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
30127 22:20:24.685860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
30129 22:20:24.716845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
30130 22:20:24.717282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
30132 22:20:24.748371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
30134 22:20:24.748922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
30135 22:20:24.779972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
30136 22:20:24.780407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
30138 22:20:24.811589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30140 22:20:24.812216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30141 22:20:24.844364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30142 22:20:24.844820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30144 22:20:24.876113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30146 22:20:24.877042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30147 22:20:24.923771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30149 22:20:24.924399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30150 22:20:24.974739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30151 22:20:24.975219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30153 22:20:25.005707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30155 22:20:25.006136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30156 22:20:25.036549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30158 22:20:25.036968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30159 22:20:25.070070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30160 22:20:25.070512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30162 22:20:25.101571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30164 22:20:25.102009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30165 22:20:25.134400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30167 22:20:25.134982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30168 22:20:25.166158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30170 22:20:25.166699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30171 22:20:25.197285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30173 22:20:25.197733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30174 22:20:25.227952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30175 22:20:25.228477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30177 22:20:25.261177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30178 22:20:25.261633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30180 22:20:25.292619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30181 22:20:25.292997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30183 22:20:25.323805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30184 22:20:25.324155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30186 22:20:25.355313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30188 22:20:25.355730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30189 22:20:25.387620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30190 22:20:25.388077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30192 22:20:25.420768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30193 22:20:25.421202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30195 22:20:25.452434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30197 22:20:25.452950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30198 22:20:25.484481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30199 22:20:25.484919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30201 22:20:25.515913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30202 22:20:25.516334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30204 22:20:25.547387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30205 22:20:25.547770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30207 22:20:25.579746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30209 22:20:25.580166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30210 22:20:25.613306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30212 22:20:25.613759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30213 22:20:25.645724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30214 22:20:25.646155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30216 22:20:25.677068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30217 22:20:25.677426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30219 22:20:25.708431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30221 22:20:25.708992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30222 22:20:25.740004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30223 22:20:25.740389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30225 22:20:25.772768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30226 22:20:25.773222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30228 22:20:25.804334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30229 22:20:25.804794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30231 22:20:25.836758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30233 22:20:25.837316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30234 22:20:25.868311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30236 22:20:25.868852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30237 22:20:25.899934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30238 22:20:25.900389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30240 22:20:25.931545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30242 22:20:25.932170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30243 22:20:25.964348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30245 22:20:25.964938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30246 22:20:25.996306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30248 22:20:25.996775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30249 22:20:26.027876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30251 22:20:26.028330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30252 22:20:26.059701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30254 22:20:26.060182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30255 22:20:26.091354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30257 22:20:26.091883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30258 22:20:26.123571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30259 22:20:26.123914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30261 22:20:26.155748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30263 22:20:26.156172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30264 22:20:26.187013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30265 22:20:26.187366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30267 22:20:26.218484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30269 22:20:26.218904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30270 22:20:26.249359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30272 22:20:26.249822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30273 22:20:26.281008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30274 22:20:26.281406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30276 22:20:26.314063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30278 22:20:26.314517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30279 22:20:26.345063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30280 22:20:26.345449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30282 22:20:26.375813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30284 22:20:26.376229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30285 22:20:26.408073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30287 22:20:26.408513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30288 22:20:26.439483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30290 22:20:26.439902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30291 22:20:26.470747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30292 22:20:26.471171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30294 22:20:26.503255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30296 22:20:26.503711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30297 22:20:26.534587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30299 22:20:26.535004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30300 22:20:26.565099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30301 22:20:26.565447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30303 22:20:26.595505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30304 22:20:26.595843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30306 22:20:26.627272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30308 22:20:26.627664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30309 22:20:26.659720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30310 22:20:26.660057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30312 22:20:26.691744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30314 22:20:26.692272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30315 22:20:26.723054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30317 22:20:26.723497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30318 22:20:26.754107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30319 22:20:26.754449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30321 22:20:26.785469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30322 22:20:26.785808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30324 22:20:26.817244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30325 22:20:26.817702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30327 22:20:26.851884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30329 22:20:26.852443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30330 22:20:26.883145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30332 22:20:26.883663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30333 22:20:26.914137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30335 22:20:26.914699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30336 22:20:26.945582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30338 22:20:26.946154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30339 22:20:26.976474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30340 22:20:26.976924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30342 22:20:27.008677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30343 22:20:27.009102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30345 22:20:27.041035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30347 22:20:27.041483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30348 22:20:27.072425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30349 22:20:27.072873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30351 22:20:27.103589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30352 22:20:27.104003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30354 22:20:27.134977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30355 22:20:27.135421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30357 22:20:27.165578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30358 22:20:27.166033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30360 22:20:27.198038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30361 22:20:27.198487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30363 22:20:27.228727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30365 22:20:27.229260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30366 22:20:27.259702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30367 22:20:27.260134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30369 22:20:27.290900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30370 22:20:27.291339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30372 22:20:27.321716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30373 22:20:27.322169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30375 22:20:27.352556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30377 22:20:27.353090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30378 22:20:27.385066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30379 22:20:27.385509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30381 22:20:27.416436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30383 22:20:27.416963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30384 22:20:27.447509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30386 22:20:27.448037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30387 22:20:27.478238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30388 22:20:27.478680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30390 22:20:27.509156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30392 22:20:27.509679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30393 22:20:27.540262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30394 22:20:27.540714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30396 22:20:27.572342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30397 22:20:27.572789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30399 22:20:27.603487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30400 22:20:27.603884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30402 22:20:27.634130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30403 22:20:27.634564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30405 22:20:27.665779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30406 22:20:27.666223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30408 22:20:27.697242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30409 22:20:27.697684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30411 22:20:27.729630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30412 22:20:27.730062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30414 22:20:27.760862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30415 22:20:27.761307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30417 22:20:27.792048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30418 22:20:27.792459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30420 22:20:27.823361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30422 22:20:27.823893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30423 22:20:27.855299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30424 22:20:27.855736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30426 22:20:27.886836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30427 22:20:27.887318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30429 22:20:27.919651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30431 22:20:27.920187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30432 22:20:27.950939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30433 22:20:27.951372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30435 22:20:27.981755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30436 22:20:27.982186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30438 22:20:28.014069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30440 22:20:28.014510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30441 22:20:28.045417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30442 22:20:28.045880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30444 22:20:28.077445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30445 22:20:28.077786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30447 22:20:28.109077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30449 22:20:28.109499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30450 22:20:28.140160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30452 22:20:28.140602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30453 22:20:28.171306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30455 22:20:28.171728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30456 22:20:28.201979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30458 22:20:28.202389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30459 22:20:28.233224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30461 22:20:28.233629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30462 22:20:28.265642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30463 22:20:28.265990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30465 22:20:28.296394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30467 22:20:28.296809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30468 22:20:28.328030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30469 22:20:28.328495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30471 22:20:28.359192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30472 22:20:28.359656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30474 22:20:28.390009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30475 22:20:28.390471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30477 22:20:28.421997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30478 22:20:28.422458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30480 22:20:28.454365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30482 22:20:28.454972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30483 22:20:28.485590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30484 22:20:28.486088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30486 22:20:28.516691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30487 22:20:28.517139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30489 22:20:28.547156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30491 22:20:28.547655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30492 22:20:28.577632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30493 22:20:28.578000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30495 22:20:28.611350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30496 22:20:28.611695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30498 22:20:28.642025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30500 22:20:28.642505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30501 22:20:28.674700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30502 22:20:28.675172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30504 22:20:28.705764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30505 22:20:28.706179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30507 22:20:28.737066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30509 22:20:28.737497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30510 22:20:28.768308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30512 22:20:28.768748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30513 22:20:28.802354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30515 22:20:28.803002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30516 22:20:28.833405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30517 22:20:28.833757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30519 22:20:28.865415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30520 22:20:28.865764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30522 22:20:28.896585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30523 22:20:28.896926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30525 22:20:28.927450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30526 22:20:28.927790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30528 22:20:28.958042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30529 22:20:28.958501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30531 22:20:28.992062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30532 22:20:28.992443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30534 22:20:29.023939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30535 22:20:29.024325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30537 22:20:29.055393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30538 22:20:29.055662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30540 22:20:29.087559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30541 22:20:29.087864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30543 22:20:29.118979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30545 22:20:29.119237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30546 22:20:29.153608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30547 22:20:29.154039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30549 22:20:29.185882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30550 22:20:29.186208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30552 22:20:29.217033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30553 22:20:29.217423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30555 22:20:29.248605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30557 22:20:29.249138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30558 22:20:29.280033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30559 22:20:29.280476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30561 22:20:29.311492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30562 22:20:29.311939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30564 22:20:29.345542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30565 22:20:29.346004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30567 22:20:29.376901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30568 22:20:29.377360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30570 22:20:29.408089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30572 22:20:29.408629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30573 22:20:29.440628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30575 22:20:29.441183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30576 22:20:29.472129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30578 22:20:29.472661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30579 22:20:29.505233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30580 22:20:29.505691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30582 22:20:29.538902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30584 22:20:29.539446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30585 22:20:29.570880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30586 22:20:29.571332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30588 22:20:29.601833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30590 22:20:29.602354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30591 22:20:29.633513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30593 22:20:29.634077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30594 22:20:29.664998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30595 22:20:29.665454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30597 22:20:29.699526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30599 22:20:29.699950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30600 22:20:29.730968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30601 22:20:29.731346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30603 22:20:29.762019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30604 22:20:29.762362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30606 22:20:29.792816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30607 22:20:29.793166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30609 22:20:29.823990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30610 22:20:29.824328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30612 22:20:29.858701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30613 22:20:29.859108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30615 22:20:29.891193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30617 22:20:29.891629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30618 22:20:29.922431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30620 22:20:29.922902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30621 22:20:29.954166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30623 22:20:29.954591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30624 22:20:29.984985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30625 22:20:29.985346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30627 22:20:30.016086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30628 22:20:30.016439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30630 22:20:30.068039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30631 22:20:30.068401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30633 22:20:30.098341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30635 22:20:30.098780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30636 22:20:30.128691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30637 22:20:30.129054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30639 22:20:30.159388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30640 22:20:30.159734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30642 22:20:30.189999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30643 22:20:30.190467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30645 22:20:30.221456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30647 22:20:30.221935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30648 22:20:30.253300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30650 22:20:30.253745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30651 22:20:30.284570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30653 22:20:30.284995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30654 22:20:30.316887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30656 22:20:30.317311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30657 22:20:30.348199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30659 22:20:30.348759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30660 22:20:30.379660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30662 22:20:30.380197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30663 22:20:30.411815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30664 22:20:30.412261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30666 22:20:30.445715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30667 22:20:30.446124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30669 22:20:30.477937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30670 22:20:30.478370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30672 22:20:30.509170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30673 22:20:30.509666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30675 22:20:30.539877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30676 22:20:30.540152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30678 22:20:30.571924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30680 22:20:30.572499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30681 22:20:30.604852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30683 22:20:30.605329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30684 22:20:30.635549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30685 22:20:30.635906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30687 22:20:30.666594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30688 22:20:30.666938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30690 22:20:30.697041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30691 22:20:30.697411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30693 22:20:30.728475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30694 22:20:30.728826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30696 22:20:30.759348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30697 22:20:30.759702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30699 22:20:30.790098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30701 22:20:30.790531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30702 22:20:30.820884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30704 22:20:30.821316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30705 22:20:30.852088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30707 22:20:30.852527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30708 22:20:30.883403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30710 22:20:30.883815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30711 22:20:30.915501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30713 22:20:30.916015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30714 22:20:30.946487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30716 22:20:30.946972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30717 22:20:30.977661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30719 22:20:30.978182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30720 22:20:31.008452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30722 22:20:31.008865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30723 22:20:31.039067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30724 22:20:31.039433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30726 22:20:31.071971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30728 22:20:31.072416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30729 22:20:31.103761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30730 22:20:31.104125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30732 22:20:31.134476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30734 22:20:31.134905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30735 22:20:31.164771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30736 22:20:31.165116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30738 22:20:31.195572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30740 22:20:31.196005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30741 22:20:31.225883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30742 22:20:31.226235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30744 22:20:31.256764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30745 22:20:31.257106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30747 22:20:31.287709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30748 22:20:31.288181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30750 22:20:31.318196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30752 22:20:31.318655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30753 22:20:31.349512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30754 22:20:31.349875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30756 22:20:31.380446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30757 22:20:31.380784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30759 22:20:31.411513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30761 22:20:31.412108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30762 22:20:31.442091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30763 22:20:31.442568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30765 22:20:31.475169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30766 22:20:31.475658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30768 22:20:31.506266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30770 22:20:31.506885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30771 22:20:31.537162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30772 22:20:31.537596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30774 22:20:31.567686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30776 22:20:31.568105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30777 22:20:31.599666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30779 22:20:31.600162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30780 22:20:31.632696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30781 22:20:31.633197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30783 22:20:31.664841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30785 22:20:31.665492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30786 22:20:31.697380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30787 22:20:31.697869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30789 22:20:31.729062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30790 22:20:31.729435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30792 22:20:31.760703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30793 22:20:31.761067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30795 22:20:31.791910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30797 22:20:31.792346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30798 22:20:31.823316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30799 22:20:31.823683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30801 22:20:31.853789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30803 22:20:31.854086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30804 22:20:31.884655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30805 22:20:31.884999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30807 22:20:31.917015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30808 22:20:31.917367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30810 22:20:31.947592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30812 22:20:31.948010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30813 22:20:31.977791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30815 22:20:31.978203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30816 22:20:32.008472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30818 22:20:32.008895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30819 22:20:32.039588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30820 22:20:32.039938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30822 22:20:32.071186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30823 22:20:32.071525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30825 22:20:32.101466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30826 22:20:32.101809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30828 22:20:32.132192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30829 22:20:32.132557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30831 22:20:32.163128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30833 22:20:32.163607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30834 22:20:32.193405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30836 22:20:32.193840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30837 22:20:32.223932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30838 22:20:32.224276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30840 22:20:32.254924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30842 22:20:32.255329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30843 22:20:32.285150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30844 22:20:32.285489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30846 22:20:32.315713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30847 22:20:32.316050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30849 22:20:32.346229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30851 22:20:32.346629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30852 22:20:32.377272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30854 22:20:32.377727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30855 22:20:32.408304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30857 22:20:32.408859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30858 22:20:32.440012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30859 22:20:32.440461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30861 22:20:32.471715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30863 22:20:32.472156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30864 22:20:32.503095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30865 22:20:32.503480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30867 22:20:32.533867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30868 22:20:32.534225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30870 22:20:32.565562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30871 22:20:32.565969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30873 22:20:32.596515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30874 22:20:32.596975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30876 22:20:32.628105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30877 22:20:32.628511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30879 22:20:32.659897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30880 22:20:32.660181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30882 22:20:32.692379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30884 22:20:32.692852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30885 22:20:32.725512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30887 22:20:32.725881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30888 22:20:32.757668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30889 22:20:32.758042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30891 22:20:32.789594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30892 22:20:32.790042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30894 22:20:32.821112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30896 22:20:32.821572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30897 22:20:32.855168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30898 22:20:32.855639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30900 22:20:32.888409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30901 22:20:32.888883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30903 22:20:32.923933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30905 22:20:32.924450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30906 22:20:32.957319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30907 22:20:32.957751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30909 22:20:32.989510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30910 22:20:32.990032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30912 22:20:33.023381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30913 22:20:33.023768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30915 22:20:33.057172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30916 22:20:33.057673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30918 22:20:33.094621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30920 22:20:33.095149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30921 22:20:33.132933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30922 22:20:33.133305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30924 22:20:33.165227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30926 22:20:33.165809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30927 22:20:33.196592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30928 22:20:33.197011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30930 22:20:33.230104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30932 22:20:33.230644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30933 22:20:33.264847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30934 22:20:33.265299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30936 22:20:33.298007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30938 22:20:33.298619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30939 22:20:33.331351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30940 22:20:33.331744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30942 22:20:33.364798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30943 22:20:33.365260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30945 22:20:33.397025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30946 22:20:33.397529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30948 22:20:33.429308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30950 22:20:33.429886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30951 22:20:33.460604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30952 22:20:33.461068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30954 22:20:33.493540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30955 22:20:33.493978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30957 22:20:33.526471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30959 22:20:33.526872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30960 22:20:33.559273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30962 22:20:33.559738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30963 22:20:33.592002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30964 22:20:33.592498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30966 22:20:33.624324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30967 22:20:33.624815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30969 22:20:33.655721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30970 22:20:33.656197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30972 22:20:33.687435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30974 22:20:33.688010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30975 22:20:33.717904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30976 22:20:33.718385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30978 22:20:33.749364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30980 22:20:33.749940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30981 22:20:33.781416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30982 22:20:33.781896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30984 22:20:33.813009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30985 22:20:33.813481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30987 22:20:33.844776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30988 22:20:33.845230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30990 22:20:33.876137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30991 22:20:33.876548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30993 22:20:33.908312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30994 22:20:33.908758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30996 22:20:33.939649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30997 22:20:33.940104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30999 22:20:33.972473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
31001 22:20:33.972945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
31002 22:20:34.003825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
31003 22:20:34.004282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
31005 22:20:34.036642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
31007 22:20:34.037097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
31008 22:20:34.071545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
31010 22:20:34.071982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
31011 22:20:34.104008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
31012 22:20:34.104494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
31014 22:20:34.137345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
31015 22:20:34.137886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
31017 22:20:34.171220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
31018 22:20:34.171652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
31020 22:20:34.204994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
31022 22:20:34.205478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
31023 22:20:34.241807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
31024 22:20:34.242199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
31026 22:20:34.275394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
31027 22:20:34.275784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
31029 22:20:34.307595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
31031 22:20:34.308171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
31032 22:20:34.342126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
31033 22:20:34.342516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
31035 22:20:34.374134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
31036 22:20:34.374606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
31038 22:20:34.408134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
31039 22:20:34.408598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
31041 22:20:34.440308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
31042 22:20:34.440784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
31044 22:20:34.473244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
31045 22:20:34.473640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
31047 22:20:34.505274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
31048 22:20:34.505692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
31050 22:20:34.537845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
31052 22:20:34.538481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
31053 22:20:34.570508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
31055 22:20:34.571135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
31056 22:20:34.601399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
31057 22:20:34.601891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
31059 22:20:34.632851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
31061 22:20:34.633389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
31062 22:20:34.666155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
31063 22:20:34.666595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
31065 22:20:34.699585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
31067 22:20:34.700002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
31068 22:20:34.731694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
31069 22:20:34.732110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
31071 22:20:34.764110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
31072 22:20:34.764507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
31074 22:20:34.795801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
31075 22:20:34.796248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
31077 22:20:34.828725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
31078 22:20:34.829123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
31080 22:20:34.860622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
31082 22:20:34.860984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
31083 22:20:34.891746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
31084 22:20:34.892156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
31086 22:20:34.923004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
31087 22:20:34.923474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
31089 22:20:34.954889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
31090 22:20:34.955346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
31092 22:20:34.985872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
31093 22:20:34.986398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
31095 22:20:35.017660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
31096 22:20:35.018099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
31098 22:20:35.048727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
31100 22:20:35.049152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
31101 22:20:35.079879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
31103 22:20:35.080340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
31104 22:20:35.111409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
31105 22:20:35.111797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
31107 22:20:35.151413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
31109 22:20:35.151871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
31110 22:20:35.203292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
31111 22:20:35.203744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
31113 22:20:35.235526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
31114 22:20:35.235920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
31116 22:20:35.268114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
31117 22:20:35.268510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
31119 22:20:35.300884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
31120 22:20:35.301340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
31122 22:20:35.333840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
31124 22:20:35.334377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
31125 22:20:35.366069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
31126 22:20:35.366526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
31128 22:20:35.397833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
31129 22:20:35.398303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
31131 22:20:35.429329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
31132 22:20:35.429771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
31134 22:20:35.460822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
31135 22:20:35.461248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
31137 22:20:35.491929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31138 22:20:35.492346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31140 22:20:35.523462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31141 22:20:35.523845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31143 22:20:35.555134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31144 22:20:35.555533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31146 22:20:35.586225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31148 22:20:35.586780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31149 22:20:35.618795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31151 22:20:35.619409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31152 22:20:35.649989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31154 22:20:35.650414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31155 22:20:35.680932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31156 22:20:35.681361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31158 22:20:35.711980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31160 22:20:35.712446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31161 22:20:35.743189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31162 22:20:35.743622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31164 22:20:35.775378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31165 22:20:35.775869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31167 22:20:35.807117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31168 22:20:35.807560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31170 22:20:35.838946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31171 22:20:35.839412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31173 22:20:35.872313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31174 22:20:35.872806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31176 22:20:35.904448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31177 22:20:35.904921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31179 22:20:35.936189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31181 22:20:35.936817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31182 22:20:35.967563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31183 22:20:35.968043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31185 22:20:35.999677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31186 22:20:36.000124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31188 22:20:36.031479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31189 22:20:36.031920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31191 22:20:36.064150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31193 22:20:36.064617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31194 22:20:36.096661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31196 22:20:36.097299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31197 22:20:36.128239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31198 22:20:36.128703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31200 22:20:36.159816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31202 22:20:36.160349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31203 22:20:36.191822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31205 22:20:36.192217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31206 22:20:36.224097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31208 22:20:36.224566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31209 22:20:36.255481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31210 22:20:36.255912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31212 22:20:36.287473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31214 22:20:36.288066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31215 22:20:36.319040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31216 22:20:36.319508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31218 22:20:36.350531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31220 22:20:36.350972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31221 22:20:36.382161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31223 22:20:36.382583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31224 22:20:36.413695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31226 22:20:36.414106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31227 22:20:36.444970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31228 22:20:36.445353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31230 22:20:36.476640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31231 22:20:36.477085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31233 22:20:36.508498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31234 22:20:36.508924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31236 22:20:36.539894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31237 22:20:36.540365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31239 22:20:36.571380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31240 22:20:36.571801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31242 22:20:36.603178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31244 22:20:36.603775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31245 22:20:36.635325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31247 22:20:36.635907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31248 22:20:36.669480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31249 22:20:36.669988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31251 22:20:36.704134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31253 22:20:36.704610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31254 22:20:36.741332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31255 22:20:36.741777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31257 22:20:36.777132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31259 22:20:36.777597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31260 22:20:36.812426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31261 22:20:36.812845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31263 22:20:36.848451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31264 22:20:36.848933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31266 22:20:36.883585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31268 22:20:36.884126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31269 22:20:36.916282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31270 22:20:36.916749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31272 22:20:36.947741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31273 22:20:36.948174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31275 22:20:36.979400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31277 22:20:36.979870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31278 22:20:37.011170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31279 22:20:37.011569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31281 22:20:37.043208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31283 22:20:37.043633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31284 22:20:37.075010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31286 22:20:37.075437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31287 22:20:37.107411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31288 22:20:37.107794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31290 22:20:37.144493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31291 22:20:37.144886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31293 22:20:37.176492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31295 22:20:37.176964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31296 22:20:37.207305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31297 22:20:37.207746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31299 22:20:37.237985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31300 22:20:37.238426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31302 22:20:37.269612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31303 22:20:37.270112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31305 22:20:37.301078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31306 22:20:37.301534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31308 22:20:37.332997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31309 22:20:37.333487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31311 22:20:37.365156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31312 22:20:37.365620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31314 22:20:37.396766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31315 22:20:37.397229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31317 22:20:37.428564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31318 22:20:37.429045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31320 22:20:37.460868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31321 22:20:37.461325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31323 22:20:37.492528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31324 22:20:37.492972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31326 22:20:37.524298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31328 22:20:37.524758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31329 22:20:37.556491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31331 22:20:37.557039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31332 22:20:37.588024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31334 22:20:37.588556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31335 22:20:37.619739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31336 22:20:37.620190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31338 22:20:37.651632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31339 22:20:37.652085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31341 22:20:37.684168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31342 22:20:37.684613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31344 22:20:37.715573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31346 22:20:37.716159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31347 22:20:37.746854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31348 22:20:37.747289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31350 22:20:37.779327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31351 22:20:37.779729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31353 22:20:37.810956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31354 22:20:37.811330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31356 22:20:37.843813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31357 22:20:37.844367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31359 22:20:37.877641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31361 22:20:37.878208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31362 22:20:37.909065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31364 22:20:37.909544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31365 22:20:37.941619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31366 22:20:37.942087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31368 22:20:37.972966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31369 22:20:37.973434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31371 22:20:38.005012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31373 22:20:38.005601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31374 22:20:38.036759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31375 22:20:38.037243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31377 22:20:38.069542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31378 22:20:38.070007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31380 22:20:38.101710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31382 22:20:38.102165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31383 22:20:38.133705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31384 22:20:38.134105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31386 22:20:38.166075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31387 22:20:38.166463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31389 22:20:38.197613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31390 22:20:38.198078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31392 22:20:38.229306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31393 22:20:38.229665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31395 22:20:38.262081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31396 22:20:38.262429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31398 22:20:38.293954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31399 22:20:38.294340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31401 22:20:38.325885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31402 22:20:38.326369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31404 22:20:38.357605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31405 22:20:38.358041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31407 22:20:38.389135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31408 22:20:38.389585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31410 22:20:38.421111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31412 22:20:38.421697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31413 22:20:38.453663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31414 22:20:38.454119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31416 22:20:38.487193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31417 22:20:38.487662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31419 22:20:38.519329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31420 22:20:38.519805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31422 22:20:38.553551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31424 22:20:38.554190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31425 22:20:38.587706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31426 22:20:38.588179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31428 22:20:38.620060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31429 22:20:38.620522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31431 22:20:38.651332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31432 22:20:38.651801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31434 22:20:38.683891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31436 22:20:38.684445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31437 22:20:38.716131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31439 22:20:38.716661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31440 22:20:38.747932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31441 22:20:38.748394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31443 22:20:38.779694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31444 22:20:38.780118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31446 22:20:38.811116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31447 22:20:38.811487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31449 22:20:38.842797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31451 22:20:38.843280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31452 22:20:38.873589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31453 22:20:38.873961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31455 22:20:38.905926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31456 22:20:38.906394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31458 22:20:38.939448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31459 22:20:38.939812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31461 22:20:38.971703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31462 22:20:38.972044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31464 22:20:39.003994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31466 22:20:39.004495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31467 22:20:39.035933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31468 22:20:39.036355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31470 22:20:39.067452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31472 22:20:39.067834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31473 22:20:39.100186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31474 22:20:39.100657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31476 22:20:39.131558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31477 22:20:39.131911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31479 22:20:39.167016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31481 22:20:39.167578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31482 22:20:39.199628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31484 22:20:39.200121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31485 22:20:39.231633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31486 22:20:39.232102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31488 22:20:39.262980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31490 22:20:39.263417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31491 22:20:39.294879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31493 22:20:39.295432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31494 22:20:39.326280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31495 22:20:39.326628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31497 22:20:39.358809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31498 22:20:39.359158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31500 22:20:39.390508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31502 22:20:39.390956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31503 22:20:39.423005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31505 22:20:39.423618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31506 22:20:39.454183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31507 22:20:39.454622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31509 22:20:39.485901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31511 22:20:39.486505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31512 22:20:39.518076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31513 22:20:39.518489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31515 22:20:39.550630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31516 22:20:39.551048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31518 22:20:39.582838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31520 22:20:39.583270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31521 22:20:39.615657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31522 22:20:39.616045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31524 22:20:39.649758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31525 22:20:39.650175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31527 22:20:39.684388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31528 22:20:39.684841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31530 22:20:39.720586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31531 22:20:39.721046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31533 22:20:39.756283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31534 22:20:39.756644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31536 22:20:39.791512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31538 22:20:39.791926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31539 22:20:39.823813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31540 22:20:39.824197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31542 22:20:39.855423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31543 22:20:39.855820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31545 22:20:39.887161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31547 22:20:39.887679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31548 22:20:39.918608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31550 22:20:39.919211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31551 22:20:39.952391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31552 22:20:39.952870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31554 22:20:39.986144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31556 22:20:39.986754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31557 22:20:40.017886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31558 22:20:40.018240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31560 22:20:40.049308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31562 22:20:40.049749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31563 22:20:40.079792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31564 22:20:40.080154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31566 22:20:40.111204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31567 22:20:40.111553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31569 22:20:40.142480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31571 22:20:40.142901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31572 22:20:40.173209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31574 22:20:40.173665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31575 22:20:40.204987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31577 22:20:40.205523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31578 22:20:40.237159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31579 22:20:40.237547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31581 22:20:40.284278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31583 22:20:40.284771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31584 22:20:40.330228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31585 22:20:40.330691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31587 22:20:40.362162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31588 22:20:40.362508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31590 22:20:40.394601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31592 22:20:40.395021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31593 22:20:40.427245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31594 22:20:40.427591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31596 22:20:40.459031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31597 22:20:40.459372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31599 22:20:40.490840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31600 22:20:40.491182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31602 22:20:40.521455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31603 22:20:40.521800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31605 22:20:40.553342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31607 22:20:40.553767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31608 22:20:40.584616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31609 22:20:40.584981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31611 22:20:40.616340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31612 22:20:40.616828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31614 22:20:40.648385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31616 22:20:40.648932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31617 22:20:40.679603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31619 22:20:40.680138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31620 22:20:40.712452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31621 22:20:40.712907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31623 22:20:40.747609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31624 22:20:40.748103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31626 22:20:40.784529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31628 22:20:40.785127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31629 22:20:40.820269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31630 22:20:40.820738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31632 22:20:40.856689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31634 22:20:40.857318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31635 22:20:40.891786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31636 22:20:40.892054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31638 22:20:40.928494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31640 22:20:40.928985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31641 22:20:40.967062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31643 22:20:40.967588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31644 22:20:41.003664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31645 22:20:41.004094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31647 22:20:41.039016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31648 22:20:41.039368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31650 22:20:41.073524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31651 22:20:41.073842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31653 22:20:41.106828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31655 22:20:41.107289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31656 22:20:41.137742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31658 22:20:41.138175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31659 22:20:41.167973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31660 22:20:41.168330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31662 22:20:41.199551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31664 22:20:41.200005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31665 22:20:41.230541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31667 22:20:41.231232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31668 22:20:41.264048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31669 22:20:41.264396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31671 22:20:41.296119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31673 22:20:41.296665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31674 22:20:41.327341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31675 22:20:41.327791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31677 22:20:41.357716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31678 22:20:41.358125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31680 22:20:41.389952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31681 22:20:41.390369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31683 22:20:41.421204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31684 22:20:41.421587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31686 22:20:41.452453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31687 22:20:41.452794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31689 22:20:41.484719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31690 22:20:41.485060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31692 22:20:41.517543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31693 22:20:41.517914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31695 22:20:41.548235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31696 22:20:41.548593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31698 22:20:41.578872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31699 22:20:41.579214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31701 22:20:41.609143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31702 22:20:41.609487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31704 22:20:41.640067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31706 22:20:41.640421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31707 22:20:41.670790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31708 22:20:41.671132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31710 22:20:41.703538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31711 22:20:41.703919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31713 22:20:41.735449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31714 22:20:41.735797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31716 22:20:41.768870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31717 22:20:41.769229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31719 22:20:41.802579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31721 22:20:41.803005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31722 22:20:41.845358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31723 22:20:41.845687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31725 22:20:41.880713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31726 22:20:41.881062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31728 22:20:41.913532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31730 22:20:41.913957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31731 22:20:41.956566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31732 22:20:41.957104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31734 22:20:41.995438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31735 22:20:41.995915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31737 22:20:42.027107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31738 22:20:42.027562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31740 22:20:42.057765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31742 22:20:42.058118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31743 22:20:42.088057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31745 22:20:42.088501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31746 22:20:42.118948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31747 22:20:42.119297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31749 22:20:42.150473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31751 22:20:42.150893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31752 22:20:42.181120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31754 22:20:42.181537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31755 22:20:42.213695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31756 22:20:42.214062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31758 22:20:42.246068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31760 22:20:42.246675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31761 22:20:42.280179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31762 22:20:42.280653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31764 22:20:42.312258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31765 22:20:42.312729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31767 22:20:42.343826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31768 22:20:42.344298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31770 22:20:42.376641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31771 22:20:42.377125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31773 22:20:42.408877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31774 22:20:42.409356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31776 22:20:42.440231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31778 22:20:42.440695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31779 22:20:42.471233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31781 22:20:42.471747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31782 22:20:42.503196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31783 22:20:42.503669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31785 22:20:42.534474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31787 22:20:42.535021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31788 22:20:42.565327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31789 22:20:42.565749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31791 22:20:42.595543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31793 22:20:42.596033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31794 22:20:42.626410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31796 22:20:42.626984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31797 22:20:42.658771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31799 22:20:42.659208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31800 22:20:42.689432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31801 22:20:42.689780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31803 22:20:42.719743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31805 22:20:42.720165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31806 22:20:42.751041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31807 22:20:42.751444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31809 22:20:42.781967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31810 22:20:42.782372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31812 22:20:42.812441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31813 22:20:42.812852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31815 22:20:42.843702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31816 22:20:42.844107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31818 22:20:42.874807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31820 22:20:42.875233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31821 22:20:42.906539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31823 22:20:42.907083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31824 22:20:42.937390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31825 22:20:42.937872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31827 22:20:42.969315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31829 22:20:42.969877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31830 22:20:42.999687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31832 22:20:43.000186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31833 22:20:43.030761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31834 22:20:43.031129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31836 22:20:43.061253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31837 22:20:43.061609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31839 22:20:43.092213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31840 22:20:43.092669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31842 22:20:43.122856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31843 22:20:43.123252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31845 22:20:43.154830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31847 22:20:43.155391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31848 22:20:43.185610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31849 22:20:43.185975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31851 22:20:43.216662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31852 22:20:43.217008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31854 22:20:43.249185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31855 22:20:43.249536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31857 22:20:43.281520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31858 22:20:43.282000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31860 22:20:43.315163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31861 22:20:43.315624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31863 22:20:43.350816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31864 22:20:43.351317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31866 22:20:43.383882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31867 22:20:43.384362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31869 22:20:43.417500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31871 22:20:43.418221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31872 22:20:43.453426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31873 22:20:43.453958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31875 22:20:43.493009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31876 22:20:43.493475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31878 22:20:43.528690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31880 22:20:43.529040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31881 22:20:43.559357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31883 22:20:43.559651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31884 22:20:43.589581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31885 22:20:43.589949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31887 22:20:43.623718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31888 22:20:43.624195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31890 22:20:43.655417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31892 22:20:43.655977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31893 22:20:43.685852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31894 22:20:43.686311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31896 22:20:43.716672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31897 22:20:43.717067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31899 22:20:43.747867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31901 22:20:43.748417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31902 22:20:43.778141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31903 22:20:43.778520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31905 22:20:43.809645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31906 22:20:43.810019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31908 22:20:43.841289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31909 22:20:43.841684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31911 22:20:43.872252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31912 22:20:43.872667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31914 22:20:43.903853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31916 22:20:43.904290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31917 22:20:43.935504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31918 22:20:43.935958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31920 22:20:43.966041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31921 22:20:43.966469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31923 22:20:43.997590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31925 22:20:43.998129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31926 22:20:44.028975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31927 22:20:44.029408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31929 22:20:44.059713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31930 22:20:44.060141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31932 22:20:44.090496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31934 22:20:44.091025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31935 22:20:44.121411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31936 22:20:44.121850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31938 22:20:44.152229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31939 22:20:44.152653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31941 22:20:44.183883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31942 22:20:44.184335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31944 22:20:44.214760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31945 22:20:44.215219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31947 22:20:44.245039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31948 22:20:44.245388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31950 22:20:44.275517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31951 22:20:44.275859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31953 22:20:44.305749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31955 22:20:44.306168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31956 22:20:44.337112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31958 22:20:44.337500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31959 22:20:44.368145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31961 22:20:44.368577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31962 22:20:44.399194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31963 22:20:44.399563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31965 22:20:44.429023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31966 22:20:44.429388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31968 22:20:44.459782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31969 22:20:44.460152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31971 22:20:44.490012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31972 22:20:44.490361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31974 22:20:44.520535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31976 22:20:44.520943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31977 22:20:44.550907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31978 22:20:44.551362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31980 22:20:44.581387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31982 22:20:44.581814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31983 22:20:44.612038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31984 22:20:44.612429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31986 22:20:44.643013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31987 22:20:44.643393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31989 22:20:44.673409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31990 22:20:44.673769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31992 22:20:44.703533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31994 22:20:44.704010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31995 22:20:44.733634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31996 22:20:44.734001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31998 22:20:44.764151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31999 22:20:44.764504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
32001 22:20:44.794428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
32003 22:20:44.794912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
32004 22:20:44.824388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
32006 22:20:44.824866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
32007 22:20:44.854749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
32009 22:20:44.855230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
32010 22:20:44.887484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
32012 22:20:44.887929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
32013 22:20:44.919523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
32014 22:20:44.919873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
32016 22:20:44.950359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
32018 22:20:44.950778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
32019 22:20:44.981108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
32020 22:20:44.981449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
32022 22:20:45.011425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
32023 22:20:45.011771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
32025 22:20:45.055181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
32026 22:20:45.055594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
32028 22:20:45.099834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
32030 22:20:45.100250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
32031 22:20:45.130668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
32032 22:20:45.130991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
32034 22:20:45.138609 <47>[ 307.984240] systemd-journald[109]: Sent WATCHDOG=1 notification.
32035 22:20:45.166116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
32037 22:20:45.166526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
32038 22:20:45.197217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
32039 22:20:45.197552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
32041 22:20:45.227625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
32042 22:20:45.228080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
32044 22:20:45.258251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
32046 22:20:45.258785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
32047 22:20:45.289235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
32049 22:20:45.289821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
32050 22:20:45.319630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
32051 22:20:45.320071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
32053 22:20:45.351547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
32054 22:20:45.351966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
32056 22:20:45.399810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
32057 22:20:45.400268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
32059 22:20:45.438900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
32061 22:20:45.439344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
32062 22:20:45.469668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
32063 22:20:45.470073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
32065 22:20:45.500173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
32066 22:20:45.500577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
32068 22:20:45.531124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
32069 22:20:45.531592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
32071 22:20:45.561777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
32072 22:20:45.562187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
32074 22:20:45.592349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
32076 22:20:45.592765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
32077 22:20:45.623333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
32079 22:20:45.623865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
32080 22:20:45.654760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
32081 22:20:45.655163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
32083 22:20:45.685442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
32084 22:20:45.685898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
32086 22:20:45.715689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
32087 22:20:45.716098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
32089 22:20:45.746205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
32090 22:20:45.746632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
32092 22:20:45.776521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
32093 22:20:45.776926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
32095 22:20:45.807028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
32096 22:20:45.807489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
32098 22:20:45.837771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
32099 22:20:45.838226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
32101 22:20:45.867845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
32102 22:20:45.868284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
32104 22:20:45.898023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
32105 22:20:45.898461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
32107 22:20:45.928194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
32108 22:20:45.928598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
32110 22:20:45.959047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
32112 22:20:45.959491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
32113 22:20:45.989162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
32114 22:20:45.989515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
32116 22:20:46.019450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
32117 22:20:46.019807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
32119 22:20:46.049920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
32121 22:20:46.050393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
32122 22:20:46.082520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
32124 22:20:46.082961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
32125 22:20:46.114102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
32126 22:20:46.114458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
32128 22:20:46.147630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
32129 22:20:46.147970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
32131 22:20:46.178333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
32133 22:20:46.178848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
32134 22:20:46.210004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
32136 22:20:46.210443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
32137 22:20:46.240879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32138 22:20:46.241235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32140 22:20:46.271626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32141 22:20:46.271977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32143 22:20:46.307165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32145 22:20:46.307576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32146 22:20:46.339818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32148 22:20:46.340229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32149 22:20:46.370192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32150 22:20:46.370540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32152 22:20:46.400929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32153 22:20:46.401271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32155 22:20:46.431262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32157 22:20:46.431760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32158 22:20:46.461226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32159 22:20:46.461567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32161 22:20:46.491235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32162 22:20:46.491580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32164 22:20:46.521102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32165 22:20:46.521486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32167 22:20:46.552136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32169 22:20:46.552684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32170 22:20:46.582136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32171 22:20:46.582482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32173 22:20:46.611861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32174 22:20:46.612208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32176 22:20:46.641936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32177 22:20:46.642340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32179 22:20:46.672188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32180 22:20:46.672536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32182 22:20:46.701965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32183 22:20:46.702433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32185 22:20:46.732104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32186 22:20:46.732452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32188 22:20:46.762397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32190 22:20:46.762920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32191 22:20:46.792136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32193 22:20:46.792619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32194 22:20:46.821956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32195 22:20:46.822315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32197 22:20:46.852249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32198 22:20:46.852680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32200 22:20:46.882475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32202 22:20:46.882896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32203 22:20:46.912626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32204 22:20:46.912975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32206 22:20:46.943291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32208 22:20:46.943702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32209 22:20:46.972991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32210 22:20:46.973331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32212 22:20:47.003045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32214 22:20:47.003472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32215 22:20:47.033003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32217 22:20:47.033410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32218 22:20:47.062987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32220 22:20:47.063474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32221 22:20:47.092635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32222 22:20:47.092995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32224 22:20:47.123148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32226 22:20:47.123624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32227 22:20:47.152806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32229 22:20:47.153216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32230 22:20:47.183447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32231 22:20:47.183790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32233 22:20:47.213619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32234 22:20:47.213973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32236 22:20:47.243537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32237 22:20:47.243888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32239 22:20:47.273640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32240 22:20:47.273996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32242 22:20:47.303703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32243 22:20:47.304042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32245 22:20:47.333676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32246 22:20:47.333995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32248 22:20:47.364390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32250 22:20:47.364880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32251 22:20:47.394506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32253 22:20:47.394986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32254 22:20:47.424502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32255 22:20:47.424870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32257 22:20:47.455411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32258 22:20:47.455874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32260 22:20:47.485677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32261 22:20:47.486031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32263 22:20:47.516423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32264 22:20:47.516769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32266 22:20:47.546928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32267 22:20:47.547278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32269 22:20:47.576529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32270 22:20:47.576868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32272 22:20:47.606805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32273 22:20:47.607141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32275 22:20:47.636570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32276 22:20:47.636910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32278 22:20:47.667798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32279 22:20:47.668137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32281 22:20:47.699214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32282 22:20:47.699588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32284 22:20:47.731861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32285 22:20:47.732219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32287 22:20:47.762542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32289 22:20:47.763104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32290 22:20:47.794289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32291 22:20:47.794851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32293 22:20:47.827582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32295 22:20:47.828290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32296 22:20:47.859433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32297 22:20:47.859861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32299 22:20:47.889719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32301 22:20:47.890340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32302 22:20:47.920674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32303 22:20:47.921151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32305 22:20:47.951577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32307 22:20:47.952186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32308 22:20:47.981834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32309 22:20:47.982298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32311 22:20:48.012207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32312 22:20:48.012644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32314 22:20:48.043224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32315 22:20:48.043656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32317 22:20:48.075182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32319 22:20:48.075749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32320 22:20:48.105451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32321 22:20:48.105948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32323 22:20:48.136345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32324 22:20:48.136808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32326 22:20:48.167256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32328 22:20:48.167876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32329 22:20:48.197938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32330 22:20:48.198404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32332 22:20:48.228665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32333 22:20:48.229127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32335 22:20:48.259247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32336 22:20:48.259708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32338 22:20:48.289875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32340 22:20:48.290369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32341 22:20:48.320103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32342 22:20:48.320465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32344 22:20:48.351432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32346 22:20:48.351872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32347 22:20:48.381759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32349 22:20:48.382193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32350 22:20:48.411752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32351 22:20:48.412110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32353 22:20:48.442037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32355 22:20:48.442468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32356 22:20:48.472450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32357 22:20:48.472806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32359 22:20:48.503497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32361 22:20:48.503928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32362 22:20:48.533897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32364 22:20:48.534330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32365 22:20:48.564042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32367 22:20:48.564481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32368 22:20:48.594356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32370 22:20:48.594789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32371 22:20:48.624654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32372 22:20:48.625005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32374 22:20:48.655202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32375 22:20:48.655555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32377 22:20:48.685402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32378 22:20:48.685753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32380 22:20:48.715822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32381 22:20:48.716172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32383 22:20:48.746569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32384 22:20:48.747052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32386 22:20:48.777940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32387 22:20:48.778417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32389 22:20:48.808757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32390 22:20:48.809207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32392 22:20:48.840082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32393 22:20:48.840538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32395 22:20:48.871031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32396 22:20:48.871492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32398 22:20:48.901980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32399 22:20:48.902437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32401 22:20:48.932510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32402 22:20:48.932959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32404 22:20:48.963493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32406 22:20:48.964097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32407 22:20:48.994155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32409 22:20:48.994772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32410 22:20:49.025287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32411 22:20:49.025696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32413 22:20:49.056448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32414 22:20:49.056887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32416 22:20:49.087003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32418 22:20:49.087538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32419 22:20:49.118656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32421 22:20:49.119272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32422 22:20:49.149676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32423 22:20:49.150146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32425 22:20:49.180594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32426 22:20:49.181059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32428 22:20:49.211843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32429 22:20:49.212310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32431 22:20:49.242984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32432 22:20:49.243431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32434 22:20:49.273815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32435 22:20:49.274274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32437 22:20:49.305036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32439 22:20:49.305596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32440 22:20:49.337018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32442 22:20:49.337565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32443 22:20:49.367876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32444 22:20:49.368346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32446 22:20:49.399582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32447 22:20:49.400057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32449 22:20:49.431309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32450 22:20:49.431747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32452 22:20:49.463322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32453 22:20:49.463781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32455 22:20:49.496111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32456 22:20:49.496519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32458 22:20:49.528273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32459 22:20:49.528673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32461 22:20:49.559940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32462 22:20:49.560343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32464 22:20:49.591787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32465 22:20:49.592241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32467 22:20:49.623038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32468 22:20:49.623496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32470 22:20:49.653867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32471 22:20:49.654329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32473 22:20:49.685002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32474 22:20:49.685471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32476 22:20:49.716643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32477 22:20:49.717109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32479 22:20:49.748021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32480 22:20:49.748474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32482 22:20:49.779860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32484 22:20:49.780428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32485 22:20:49.811611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32486 22:20:49.812064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32488 22:20:49.843531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32489 22:20:49.843991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32491 22:20:49.874910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32492 22:20:49.875347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32494 22:20:49.905859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32495 22:20:49.906265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32497 22:20:49.938499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32499 22:20:49.939156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32500 22:20:49.970038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32501 22:20:49.970478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32503 22:20:50.002115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32504 22:20:50.002560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32506 22:20:50.033259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32508 22:20:50.033795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32509 22:20:50.064981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32510 22:20:50.065419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32512 22:20:50.096684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32513 22:20:50.097094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32515 22:20:50.128815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32517 22:20:50.129241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32518 22:20:50.160603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32519 22:20:50.161043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32521 22:20:50.192497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32522 22:20:50.192902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32524 22:20:50.225155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32526 22:20:50.225589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32527 22:20:50.256749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32528 22:20:50.257193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32530 22:20:50.288771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32532 22:20:50.289296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32533 22:20:50.320297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32534 22:20:50.320746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32536 22:20:50.351973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32537 22:20:50.352423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32539 22:20:50.383804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32541 22:20:50.384395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32542 22:20:50.415954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32543 22:20:50.416398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32545 22:20:50.447412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32547 22:20:50.447932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32548 22:20:50.478243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32550 22:20:50.478795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32551 22:20:50.532175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32552 22:20:50.532657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32554 22:20:50.568753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32555 22:20:50.569227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32557 22:20:50.600433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32558 22:20:50.600903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32560 22:20:50.631933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32561 22:20:50.632391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32563 22:20:50.663809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32564 22:20:50.664207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32566 22:20:50.695822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32567 22:20:50.696288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32569 22:20:50.727546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32571 22:20:50.727978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32572 22:20:50.759054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32573 22:20:50.759452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32575 22:20:50.790916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32576 22:20:50.791399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32578 22:20:50.821656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32579 22:20:50.822152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32581 22:20:50.853060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32582 22:20:50.853520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32584 22:20:50.884050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32585 22:20:50.884492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32587 22:20:50.915582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32588 22:20:50.916029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32590 22:20:50.947041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32591 22:20:50.947485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32593 22:20:50.978938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32594 22:20:50.979387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32596 22:20:51.009829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32597 22:20:51.010311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32599 22:20:51.040879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32601 22:20:51.041365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32602 22:20:51.071514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32603 22:20:51.071875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32605 22:20:51.102415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32607 22:20:51.102904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32608 22:20:51.132863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32609 22:20:51.133318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32611 22:20:51.163718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32612 22:20:51.164112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32614 22:20:51.194849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32615 22:20:51.195194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32617 22:20:51.225694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32619 22:20:51.226140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32620 22:20:51.256159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32621 22:20:51.256516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32623 22:20:51.286006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32624 22:20:51.286348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32626 22:20:51.315686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32627 22:20:51.316024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32629 22:20:51.345315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32630 22:20:51.345673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32632 22:20:51.375263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32633 22:20:51.375605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32635 22:20:51.405353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32636 22:20:51.405838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32638 22:20:51.435429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32639 22:20:51.435852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32641 22:20:51.467189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32642 22:20:51.467593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32644 22:20:51.498109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32645 22:20:51.498579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32647 22:20:51.528884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32648 22:20:51.529356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32650 22:20:51.559831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32651 22:20:51.560310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32653 22:20:51.590467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32655 22:20:51.591049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32656 22:20:51.621819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32657 22:20:51.622139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32659 22:20:51.652664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32660 22:20:51.652986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32662 22:20:51.683540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32663 22:20:51.683877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32665 22:20:51.715689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32667 22:20:51.716192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32668 22:20:51.747683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32669 22:20:51.748036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32671 22:20:51.780189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32672 22:20:51.780539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32674 22:20:51.812828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32675 22:20:51.813177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32677 22:20:51.845517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32678 22:20:51.846021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32680 22:20:51.877382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32681 22:20:51.877775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32683 22:20:51.908334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32684 22:20:51.908712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32686 22:20:51.939064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32687 22:20:51.939458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32689 22:20:51.971353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32690 22:20:51.971813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32692 22:20:52.002466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32694 22:20:52.003036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32695 22:20:52.033061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32697 22:20:52.033492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32698 22:20:52.064345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32699 22:20:52.064801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32701 22:20:52.095532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32702 22:20:52.095996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32704 22:20:52.127044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32705 22:20:52.127498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32707 22:20:52.157899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32708 22:20:52.158357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32710 22:20:52.189234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32711 22:20:52.189696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32713 22:20:52.220234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32714 22:20:52.220697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32716 22:20:52.251427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32717 22:20:52.251771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32719 22:20:52.281596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32720 22:20:52.281962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32722 22:20:52.312835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32723 22:20:52.313179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32725 22:20:52.343497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32726 22:20:52.343954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32728 22:20:52.374773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32730 22:20:52.375307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32731 22:20:52.405838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32732 22:20:52.406286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32734 22:20:52.436662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32735 22:20:52.437104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32737 22:20:52.468643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32738 22:20:52.469088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32740 22:20:52.499701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32741 22:20:52.500134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32743 22:20:52.531437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32744 22:20:52.531877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32746 22:20:52.562452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32748 22:20:52.562997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32749 22:20:52.593466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32750 22:20:52.593944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32752 22:20:52.624675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32753 22:20:52.625126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32755 22:20:52.655569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32756 22:20:52.656021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32758 22:20:52.686179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32759 22:20:52.686621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32761 22:20:52.716840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32762 22:20:52.717285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32764 22:20:52.748207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32765 22:20:52.748613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32767 22:20:52.778890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32768 22:20:52.779249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32770 22:20:52.809104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32771 22:20:52.809468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32773 22:20:52.840197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32774 22:20:52.840551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32776 22:20:52.871579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32777 22:20:52.871938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32779 22:20:52.902329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32781 22:20:52.902830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32782 22:20:52.933467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32783 22:20:52.933825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32785 22:20:52.964673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32786 22:20:52.965029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32788 22:20:52.995337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32789 22:20:52.995691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32791 22:20:53.025834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32792 22:20:53.026185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32794 22:20:53.056573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32795 22:20:53.056927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32797 22:20:53.087404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32798 22:20:53.087757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32800 22:20:53.123487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32801 22:20:53.123871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32803 22:20:53.155090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32804 22:20:53.155555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32806 22:20:53.185962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32807 22:20:53.186415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32809 22:20:53.216898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32810 22:20:53.217353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32812 22:20:53.248683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32813 22:20:53.249150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32815 22:20:53.279601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32816 22:20:53.280068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32818 22:20:53.311238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32819 22:20:53.311683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32821 22:20:53.342976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32822 22:20:53.343401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32824 22:20:53.373909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32825 22:20:53.374321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32827 22:20:53.405117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32828 22:20:53.405597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32830 22:20:53.435462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32831 22:20:53.435838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32833 22:20:53.466895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32834 22:20:53.467303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32836 22:20:53.497631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32837 22:20:53.498043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32839 22:20:53.528282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32840 22:20:53.528694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32842 22:20:53.559860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32843 22:20:53.560310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32845 22:20:53.591694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32846 22:20:53.592139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32848 22:20:53.623119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32849 22:20:53.623557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32851 22:20:53.654043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32852 22:20:53.654476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32854 22:20:53.685070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32855 22:20:53.685496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32857 22:20:53.715615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32858 22:20:53.716030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32860 22:20:53.746401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32861 22:20:53.746832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32863 22:20:53.776992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32865 22:20:53.777490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32866 22:20:53.807749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32867 22:20:53.808179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32869 22:20:53.838492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32871 22:20:53.839027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32872 22:20:53.869305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32874 22:20:53.869832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32875 22:20:53.899882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32876 22:20:53.900330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32878 22:20:53.930811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32879 22:20:53.931252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32881 22:20:53.961987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32883 22:20:53.962504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32884 22:20:53.992692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32886 22:20:53.993209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32887 22:20:54.023275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32889 22:20:54.023686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32890 22:20:54.054197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32892 22:20:54.054641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32893 22:20:54.084960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32894 22:20:54.085380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32896 22:20:54.115380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32897 22:20:54.115785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32899 22:20:54.146216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32900 22:20:54.146636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32902 22:20:54.176968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32903 22:20:54.177436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32905 22:20:54.207510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32906 22:20:54.207984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32908 22:20:54.238953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32909 22:20:54.239436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32911 22:20:54.269274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32912 22:20:54.269707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32914 22:20:54.299902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32915 22:20:54.300381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32917 22:20:54.330549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32919 22:20:54.331171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32920 22:20:54.361002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32922 22:20:54.361629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32923 22:20:54.391703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32924 22:20:54.392181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32926 22:20:54.421920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32927 22:20:54.422391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32929 22:20:54.453050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32930 22:20:54.453533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32932 22:20:54.483533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32933 22:20:54.484010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32935 22:20:54.513948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32936 22:20:54.514429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32938 22:20:54.544356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32939 22:20:54.544828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32941 22:20:54.574421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32943 22:20:54.575076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32944 22:20:54.606027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32945 22:20:54.606511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32947 22:20:54.636498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32948 22:20:54.636973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32950 22:20:54.667175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32951 22:20:54.667666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32953 22:20:54.697407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32954 22:20:54.697760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32956 22:20:54.727577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32957 22:20:54.727910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32959 22:20:54.757444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32960 22:20:54.757756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32962 22:20:54.787441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32963 22:20:54.787781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32965 22:20:54.817908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32966 22:20:54.818249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32968 22:20:54.847889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32969 22:20:54.848201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32971 22:20:54.878021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32972 22:20:54.878360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32974 22:20:54.907625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32975 22:20:54.907963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32977 22:20:54.938843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32978 22:20:54.939180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32980 22:20:54.968697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32981 22:20:54.969028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32983 22:20:54.998995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32984 22:20:54.999336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32986 22:20:55.028451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32987 22:20:55.028790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32989 22:20:55.058378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32990 22:20:55.058696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32992 22:20:55.087945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32993 22:20:55.088262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32995 22:20:55.118205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32996 22:20:55.118544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32998 22:20:55.148437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32999 22:20:55.148755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
33001 22:20:55.178524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
33002 22:20:55.178842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
33004 22:20:55.209023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
33005 22:20:55.209362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
33007 22:20:55.239198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
33008 22:20:55.239537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
33010 22:20:55.269072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
33011 22:20:55.269389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
33013 22:20:55.299504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
33014 22:20:55.299835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
33016 22:20:55.329456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
33017 22:20:55.329794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
33019 22:20:55.359429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
33020 22:20:55.359735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
33022 22:20:55.390088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
33023 22:20:55.390425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
33025 22:20:55.420760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
33026 22:20:55.421105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
33028 22:20:55.451261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
33029 22:20:55.451589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
33031 22:20:55.481323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
33032 22:20:55.481672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
33034 22:20:55.511503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
33035 22:20:55.511841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
33037 22:20:55.541845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
33038 22:20:55.542206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
33040 22:20:55.572158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
33041 22:20:55.572500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
33043 22:20:55.602356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
33044 22:20:55.602694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
33046 22:20:55.652735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
33047 22:20:55.653088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
33049 22:20:55.682902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
33050 22:20:55.683348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
33052 22:20:55.713670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
33053 22:20:55.714010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
33055 22:20:55.743904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
33057 22:20:55.744304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
33058 22:20:55.774922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
33059 22:20:55.775412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
33061 22:20:55.806759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
33062 22:20:55.807236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
33064 22:20:55.837882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
33065 22:20:55.838385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
33067 22:20:55.868341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
33068 22:20:55.868810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
33070 22:20:55.898632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
33071 22:20:55.899105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
33073 22:20:55.929420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
33074 22:20:55.929913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
33076 22:20:55.959634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
33077 22:20:55.960096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
33079 22:20:55.990052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
33080 22:20:55.990522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
33082 22:20:56.020633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33083 22:20:56.021099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33085 22:20:56.051526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
33087 22:20:56.052090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33088 22:20:56.082203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33089 22:20:56.082672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33091 22:20:56.112540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33092 22:20:56.113008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33094 22:20:56.143540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
33096 22:20:56.144098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33097 22:20:56.174184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33098 22:20:56.174657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33100 22:20:56.205920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33101 22:20:56.206389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33103 22:20:56.237053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33104 22:20:56.237527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
33106 22:20:56.267981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33107 22:20:56.268447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33109 22:20:56.299368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33110 22:20:56.299834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33112 22:20:56.330195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33113 22:20:56.330658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
33115 22:20:56.361078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33116 22:20:56.361545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33118 22:20:56.392140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33119 22:20:56.392607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33121 22:20:56.423837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33122 22:20:56.424309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
33124 22:20:56.455290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33125 22:20:56.455744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33127 22:20:56.486388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
33129 22:20:56.486968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
33130 22:20:56.517193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33131 22:20:56.517667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33133 22:20:56.548330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33134 22:20:56.548803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
33136 22:20:56.580030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33137 22:20:56.580508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33139 22:20:56.611098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33140 22:20:56.611564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33142 22:20:56.641760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33143 22:20:56.642238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33145 22:20:56.672257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33146 22:20:56.672729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33148 22:20:56.703043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33149 22:20:56.703531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33151 22:20:56.735331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33152 22:20:56.735704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33154 22:20:56.767523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33155 22:20:56.767877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33157 22:20:56.800323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33158 22:20:56.800677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33160 22:20:56.833397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33161 22:20:56.833745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33163 22:20:56.866407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33165 22:20:56.866840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33166 22:20:56.898781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33167 22:20:56.899147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33169 22:20:56.931347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33171 22:20:56.931853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33172 22:20:56.962033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33173 22:20:56.962508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33175 22:20:56.992552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33177 22:20:56.993080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33178 22:20:57.023529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33179 22:20:57.023994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33181 22:20:57.054799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33183 22:20:57.055326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33184 22:20:57.084973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33185 22:20:57.085423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33187 22:20:57.118885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33188 22:20:57.119361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33190 22:20:57.150768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33192 22:20:57.151321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33193 22:20:57.181880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33194 22:20:57.182297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33196 22:20:57.212872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33197 22:20:57.213297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33199 22:20:57.243293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33200 22:20:57.243659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33202 22:20:57.273603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33203 22:20:57.273980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33205 22:20:57.303713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33206 22:20:57.304085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33208 22:20:57.333751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33209 22:20:57.334121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33211 22:20:57.363806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33212 22:20:57.364176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33214 22:20:57.394053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33215 22:20:57.394412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33217 22:20:57.424814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33218 22:20:57.425177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33220 22:20:57.455277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33221 22:20:57.455644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33223 22:20:57.485341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33224 22:20:57.485686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33226 22:20:57.515855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33227 22:20:57.516213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33229 22:20:57.545914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33230 22:20:57.546267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33232 22:20:57.576564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33233 22:20:57.576920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33235 22:20:57.607296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33236 22:20:57.607657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33238 22:20:57.637612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33239 22:20:57.637975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33241 22:20:57.667557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33242 22:20:57.667914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33244 22:20:57.698330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33245 22:20:57.698697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33247 22:20:57.728821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33248 22:20:57.729166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33250 22:20:57.759314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33251 22:20:57.759671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33253 22:20:57.789834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33254 22:20:57.790192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33256 22:20:57.819859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33257 22:20:57.820213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33259 22:20:57.850709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33260 22:20:57.851062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33262 22:20:57.881065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33263 22:20:57.881418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33265 22:20:57.912134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33266 22:20:57.912489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33268 22:20:57.942546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33270 22:20:57.942993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33271 22:20:57.972571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33272 22:20:57.972925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33274 22:20:58.003166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33276 22:20:58.003613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33277 22:20:58.033970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33278 22:20:58.034329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33280 22:20:58.064449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33282 22:20:58.064887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33283 22:20:58.095028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33284 22:20:58.095385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33286 22:20:58.125690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33287 22:20:58.126045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33289 22:20:58.156157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33290 22:20:58.156525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33292 22:20:58.187458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33293 22:20:58.187815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33295 22:20:58.217839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33296 22:20:58.218198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33298 22:20:58.248499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33299 22:20:58.248855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33301 22:20:58.279131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33302 22:20:58.279488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33304 22:20:58.309351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33305 22:20:58.309686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33307 22:20:58.339763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33308 22:20:58.340116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33310 22:20:58.370850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33311 22:20:58.371208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33313 22:20:58.402299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33314 22:20:58.402658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33316 22:20:58.433075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33317 22:20:58.433436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33319 22:20:58.463523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33320 22:20:58.463879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33322 22:20:58.494512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33324 22:20:58.494969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33325 22:20:58.524719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33326 22:20:58.525078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33328 22:20:58.555647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33329 22:20:58.556011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33331 22:20:58.586106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33332 22:20:58.586460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33334 22:20:58.616377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33335 22:20:58.616734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33337 22:20:58.646762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33338 22:20:58.647115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33340 22:20:58.677045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33342 22:20:58.677485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33343 22:20:58.707314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33344 22:20:58.707664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33346 22:20:58.737600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33347 22:20:58.737963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33349 22:20:58.767937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33350 22:20:58.768301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33352 22:20:58.798442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33354 22:20:58.798881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33355 22:20:58.828807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33356 22:20:58.829165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33358 22:20:58.859422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33359 22:20:58.859793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33361 22:20:58.890104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33362 22:20:58.890462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33364 22:20:58.920471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33365 22:20:58.920838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33367 22:20:58.951046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33368 22:20:58.951402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33370 22:20:58.981297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33371 22:20:58.981665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33373 22:20:59.011885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33374 22:20:59.012239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33376 22:20:59.042453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33378 22:20:59.042942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33379 22:20:59.073164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33380 22:20:59.073656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33382 22:20:59.103989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33383 22:20:59.104342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33385 22:20:59.135173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33386 22:20:59.135528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33388 22:20:59.166858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33390 22:20:59.167322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33391 22:20:59.198027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33392 22:20:59.198376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33394 22:20:59.228339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33395 22:20:59.228690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33397 22:20:59.258977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33398 22:20:59.259342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33400 22:20:59.289303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33401 22:20:59.289784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33403 22:20:59.320291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33404 22:20:59.320739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33406 22:20:59.351032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33408 22:20:59.351558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33409 22:20:59.382344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33411 22:20:59.382877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33412 22:20:59.412849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33413 22:20:59.413270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33415 22:20:59.443531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33417 22:20:59.443956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33418 22:20:59.474528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33420 22:20:59.474999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33421 22:20:59.505454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33422 22:20:59.505809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33424 22:20:59.536998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33425 22:20:59.537361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33427 22:20:59.568269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33428 22:20:59.568629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33430 22:20:59.599556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33431 22:20:59.599915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33433 22:20:59.630508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33435 22:20:59.631002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33436 22:20:59.661287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33437 22:20:59.661644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33439 22:20:59.692280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33440 22:20:59.692638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33442 22:20:59.723430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33444 22:20:59.723906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33445 22:20:59.754629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33446 22:20:59.755002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33448 22:20:59.785509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33450 22:20:59.785934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33451 22:20:59.816273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33452 22:20:59.816616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33454 22:20:59.847318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33455 22:20:59.847666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33457 22:20:59.879627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33458 22:20:59.880112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33460 22:20:59.911289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33461 22:20:59.911705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33463 22:20:59.943304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33465 22:20:59.943908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33466 22:20:59.974930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33467 22:20:59.975392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33469 22:21:00.006569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33471 22:21:00.007128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33472 22:21:00.037975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33473 22:21:00.038436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33475 22:21:00.069124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33476 22:21:00.069581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33478 22:21:00.100647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33479 22:21:00.101115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33481 22:21:00.132050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33482 22:21:00.132514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33484 22:21:00.164296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33485 22:21:00.164767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33487 22:21:00.196029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33488 22:21:00.196489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33490 22:21:00.227416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33491 22:21:00.227871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33493 22:21:00.259311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33495 22:21:00.259849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33496 22:21:00.290507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33498 22:21:00.291027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33499 22:21:00.321977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33500 22:21:00.322422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33502 22:21:00.353409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33503 22:21:00.353893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33505 22:21:00.385115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33506 22:21:00.385584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33508 22:21:00.416447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33509 22:21:00.416912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33511 22:21:00.447886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33513 22:21:00.448445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33514 22:21:00.479180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33515 22:21:00.479618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33517 22:21:00.510447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33519 22:21:00.510959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33520 22:21:00.542147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33521 22:21:00.542555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33523 22:21:00.573431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33524 22:21:00.573831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33526 22:21:00.604579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33527 22:21:00.604977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33529 22:21:00.635836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33530 22:21:00.636277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33532 22:21:00.666860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33533 22:21:00.667296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33535 22:21:00.698001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33536 22:21:00.698436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33538 22:21:00.728968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33539 22:21:00.729377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33541 22:21:00.784480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33543 22:21:00.785044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33544 22:21:00.816558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33546 22:21:00.817186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33547 22:21:00.849056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33548 22:21:00.849510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33550 22:21:00.880379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33551 22:21:00.880817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33553 22:21:00.914400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33555 22:21:00.914967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33556 22:21:00.946324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33557 22:21:00.946784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33559 22:21:00.978575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33561 22:21:00.979143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33562 22:21:01.014419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33564 22:21:01.014859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33565 22:21:01.045069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33566 22:21:01.045422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33568 22:21:01.075781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33569 22:21:01.076129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33571 22:21:01.106522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33573 22:21:01.106953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33574 22:21:01.137015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33575 22:21:01.137355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33577 22:21:01.169532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33578 22:21:01.169941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33580 22:21:01.201059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33581 22:21:01.201403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33583 22:21:01.232083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33584 22:21:01.232423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33586 22:21:01.263031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33587 22:21:01.263367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33589 22:21:01.293834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33590 22:21:01.294171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33592 22:21:01.324351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33593 22:21:01.324711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33595 22:21:01.355385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33596 22:21:01.355729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33598 22:21:01.385682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33600 22:21:01.386072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33601 22:21:01.417093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33602 22:21:01.417447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33604 22:21:01.447493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33605 22:21:01.447830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33607 22:21:01.478868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33608 22:21:01.479332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33610 22:21:01.509832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33611 22:21:01.510256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33613 22:21:01.540511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33614 22:21:01.540925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33616 22:21:01.571920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33618 22:21:01.572435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33619 22:21:01.602737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33620 22:21:01.603145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33622 22:21:01.633343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33623 22:21:01.633762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33625 22:21:01.663860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33627 22:21:01.664362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33628 22:21:01.694594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33630 22:21:01.695109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33631 22:21:01.725133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33632 22:21:01.725571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33634 22:21:01.756124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33635 22:21:01.756596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33637 22:21:01.787334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33639 22:21:01.787909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33640 22:21:01.817970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33641 22:21:01.818345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33643 22:21:01.849043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33645 22:21:01.849578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33646 22:21:01.880133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33648 22:21:01.880665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33649 22:21:01.911444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33650 22:21:01.911891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33652 22:21:01.942219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33653 22:21:01.942598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33655 22:21:01.973087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33656 22:21:01.973431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33658 22:21:02.004241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33659 22:21:02.004586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33661 22:21:02.035578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33662 22:21:02.035946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33664 22:21:02.066880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33665 22:21:02.067241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33667 22:21:02.097669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33668 22:21:02.098008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33670 22:21:02.128874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33672 22:21:02.129285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33673 22:21:02.159816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33675 22:21:02.160223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33676 22:21:02.191541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33677 22:21:02.191883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33679 22:21:02.222992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33681 22:21:02.223405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33682 22:21:02.255574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33684 22:21:02.256031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33685 22:21:02.286797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33686 22:21:02.287143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33688 22:21:02.317708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33689 22:21:02.318051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33691 22:21:02.348762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33693 22:21:02.349202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33694 22:21:02.379713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33695 22:21:02.380064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33697 22:21:02.411516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33698 22:21:02.411863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33700 22:21:02.442513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33702 22:21:02.442929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33703 22:21:02.473341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33704 22:21:02.473685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33706 22:21:02.504431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33707 22:21:02.504846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33709 22:21:02.536099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33710 22:21:02.536476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33712 22:21:02.567697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33713 22:21:02.568017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33715 22:21:02.599089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33717 22:21:02.599492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33718 22:21:02.629791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33719 22:21:02.630169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33721 22:21:02.660544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33722 22:21:02.660868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33724 22:21:02.691364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33725 22:21:02.691729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33727 22:21:02.722166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33728 22:21:02.722524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33730 22:21:02.752542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33731 22:21:02.752905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33733 22:21:02.783599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33734 22:21:02.783963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33736 22:21:02.814915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33738 22:21:02.815356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33739 22:21:02.845695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33741 22:21:02.846198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33742 22:21:02.876830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33743 22:21:02.877197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33745 22:21:02.908258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33746 22:21:02.908624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33748 22:21:02.939379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33750 22:21:02.939861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33751 22:21:02.971153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33753 22:21:02.971770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33754 22:21:03.002570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33756 22:21:03.003154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33757 22:21:03.033946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33758 22:21:03.034312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33760 22:21:03.065230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33762 22:21:03.065656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33763 22:21:03.096146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33764 22:21:03.096487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33766 22:21:03.127066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33767 22:21:03.127423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33769 22:21:03.158305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33771 22:21:03.158721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33772 22:21:03.189982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33774 22:21:03.190507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33775 22:21:03.220856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33776 22:21:03.221210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33778 22:21:03.252600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33779 22:21:03.252980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33781 22:21:03.283869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33782 22:21:03.284239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33784 22:21:03.318577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33786 22:21:03.319112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33787 22:21:03.351580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33788 22:21:03.352026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33790 22:21:03.387945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33791 22:21:03.388433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33793 22:21:03.420192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33795 22:21:03.420712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33796 22:21:03.451684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33798 22:21:03.452251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33799 22:21:03.482397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33801 22:21:03.482915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33802 22:21:03.514182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33804 22:21:03.514734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33805 22:21:03.548697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33806 22:21:03.549216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33808 22:21:03.581417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33809 22:21:03.581927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33811 22:21:03.613126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33812 22:21:03.613421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33814 22:21:03.644204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33815 22:21:03.644519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33817 22:21:03.675459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33819 22:21:03.676044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33820 22:21:03.706088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33821 22:21:03.706439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33823 22:21:03.736889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33825 22:21:03.737307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33826 22:21:03.767433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33827 22:21:03.767780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33829 22:21:03.797795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33830 22:21:03.798140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33832 22:21:03.829112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33834 22:21:03.829704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33835 22:21:03.860540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33837 22:21:03.860970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33838 22:21:03.891308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33839 22:21:03.891648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33841 22:21:03.922023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33842 22:21:03.922364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33844 22:21:03.952584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33846 22:21:03.953034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33847 22:21:03.983407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33848 22:21:03.983818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33850 22:21:04.014548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33852 22:21:04.014970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33853 22:21:04.045621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33854 22:21:04.046032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33856 22:21:04.076895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33857 22:21:04.077351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33859 22:21:04.107847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33860 22:21:04.108282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33862 22:21:04.138834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33863 22:21:04.139268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33865 22:21:04.169534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33866 22:21:04.169999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33868 22:21:04.200884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33869 22:21:04.201317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33871 22:21:04.231647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33872 22:21:04.232080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33874 22:21:04.263179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33876 22:21:04.263615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33877 22:21:04.294405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33879 22:21:04.294888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33880 22:21:04.324660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33881 22:21:04.325030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33883 22:21:04.355880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33884 22:21:04.356300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33886 22:21:04.387160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33887 22:21:04.387557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33889 22:21:04.418927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33890 22:21:04.419320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33892 22:21:04.450033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33893 22:21:04.450491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33895 22:21:04.481081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33896 22:21:04.481477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33898 22:21:04.511938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33899 22:21:04.512285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33901 22:21:04.543015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33903 22:21:04.543422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33904 22:21:04.574079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33905 22:21:04.574423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33907 22:21:04.605014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33908 22:21:04.605473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33910 22:21:04.635906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33911 22:21:04.636341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33913 22:21:04.666944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33914 22:21:04.667400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33916 22:21:04.697517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33917 22:21:04.697910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33919 22:21:04.729467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33920 22:21:04.729818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33922 22:21:04.760591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33923 22:21:04.761060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33925 22:21:04.791601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33927 22:21:04.792120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33928 22:21:04.822825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33929 22:21:04.823260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33931 22:21:04.854017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33933 22:21:04.854545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33934 22:21:04.885539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33935 22:21:04.886016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33937 22:21:04.917287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33938 22:21:04.917737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33940 22:21:04.948228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33941 22:21:04.948672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33943 22:21:04.979502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33944 22:21:04.979922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33946 22:21:05.010391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33948 22:21:05.011007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33949 22:21:05.042249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33950 22:21:05.042675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33952 22:21:05.074424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33954 22:21:05.074989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33955 22:21:05.105900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33956 22:21:05.106309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33958 22:21:05.137523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33959 22:21:05.137926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33961 22:21:05.168348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33962 22:21:05.168760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33964 22:21:05.200349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33965 22:21:05.200757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33967 22:21:05.231743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33968 22:21:05.232136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33970 22:21:05.263201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33971 22:21:05.263639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33973 22:21:05.294512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33975 22:21:05.295033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33976 22:21:05.324858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33978 22:21:05.325423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33979 22:21:05.355852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33980 22:21:05.356219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33982 22:21:05.386847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33984 22:21:05.387284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33985 22:21:05.417500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33986 22:21:05.417871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33988 22:21:05.448103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33989 22:21:05.448459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33991 22:21:05.478970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33992 22:21:05.479338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33994 22:21:05.508821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33995 22:21:05.509175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33997 22:21:05.539324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33998 22:21:05.539682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
34000 22:21:05.570765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
34001 22:21:05.571129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
34003 22:21:05.600824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
34004 22:21:05.601176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
34006 22:21:05.631370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
34007 22:21:05.631722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
34009 22:21:05.661696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
34011 22:21:05.662138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
34012 22:21:05.692055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
34013 22:21:05.692412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
34015 22:21:05.722486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
34017 22:21:05.722934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
34018 22:21:05.753278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
34019 22:21:05.753682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
34021 22:21:05.784913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
34022 22:21:05.785341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
34024 22:21:05.815629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
34025 22:21:05.816036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
34027 22:21:05.850071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
34028 22:21:05.850517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
34030 22:21:05.905441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
34031 22:21:05.905891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
34033 22:21:05.938861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
34035 22:21:05.939415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
34036 22:21:05.970149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
34038 22:21:05.970676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
34039 22:21:06.001038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
34040 22:21:06.001442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
34042 22:21:06.031764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
34044 22:21:06.032276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
34045 22:21:06.064464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
34046 22:21:06.064941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
34048 22:21:06.098400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
34050 22:21:06.098964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
34051 22:21:06.130082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
34052 22:21:06.130546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
34054 22:21:06.161089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
34056 22:21:06.161710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
34057 22:21:06.191842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
34059 22:21:06.192397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
34060 22:21:06.224132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
34062 22:21:06.224745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
34063 22:21:06.255453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
34064 22:21:06.255928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
34066 22:21:06.288137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
34068 22:21:06.288768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
34069 22:21:06.319736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
34071 22:21:06.320302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
34072 22:21:06.351044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
34074 22:21:06.351398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
34075 22:21:06.381793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
34076 22:21:06.382201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
34078 22:21:06.412979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
34079 22:21:06.413391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
34081 22:21:06.444935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
34082 22:21:06.445385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
34084 22:21:06.475994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
34085 22:21:06.476461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
34087 22:21:06.507488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
34089 22:21:06.508075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
34090 22:21:06.537932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
34091 22:21:06.538419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
34093 22:21:06.569398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
34094 22:21:06.569797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
34096 22:21:06.601093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
34097 22:21:06.601469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
34099 22:21:06.631717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
34100 22:21:06.632061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
34102 22:21:06.662469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
34104 22:21:06.662978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
34105 22:21:06.692960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
34106 22:21:06.693419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
34108 22:21:06.723520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
34109 22:21:06.723932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
34111 22:21:06.756154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
34112 22:21:06.756590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
34114 22:21:06.787488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
34115 22:21:06.787949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
34117 22:21:06.818566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
34119 22:21:06.819085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
34120 22:21:06.848983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
34121 22:21:06.849431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
34123 22:21:06.879834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
34124 22:21:06.880259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
34126 22:21:06.911636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
34127 22:21:06.912071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
34129 22:21:06.944042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
34131 22:21:06.944584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
34132 22:21:06.975474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
34133 22:21:06.975840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
34135 22:21:07.006072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
34136 22:21:07.006367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
34138 22:21:07.036754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34139 22:21:07.037050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34141 22:21:07.068776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34142 22:21:07.069227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34144 22:21:07.101379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34145 22:21:07.101790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34147 22:21:07.132979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34148 22:21:07.133382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34150 22:21:07.164048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34151 22:21:07.164441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34153 22:21:07.195422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34154 22:21:07.195878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34156 22:21:07.228058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34158 22:21:07.228616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34159 22:21:07.259332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34160 22:21:07.259787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34162 22:21:07.290145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34163 22:21:07.290609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34165 22:21:07.321109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34166 22:21:07.321567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34168 22:21:07.351890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34169 22:21:07.352346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34171 22:21:07.383348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34172 22:21:07.383801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34174 22:21:07.414723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34175 22:21:07.415170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34177 22:21:07.446427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34179 22:21:07.446948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34180 22:21:07.477803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34181 22:21:07.478250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34183 22:21:07.509434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34184 22:21:07.509879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34186 22:21:07.540926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34187 22:21:07.541337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34189 22:21:07.572878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34190 22:21:07.573364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34192 22:21:07.604133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34193 22:21:07.604482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34195 22:21:07.635147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34196 22:21:07.635506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34198 22:21:07.665409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34199 22:21:07.665772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34201 22:21:07.695529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34202 22:21:07.695884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34204 22:21:07.725997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34205 22:21:07.726352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34207 22:21:07.756274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34208 22:21:07.756630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34210 22:21:07.787194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34211 22:21:07.787549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34213 22:21:07.818027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34214 22:21:07.818380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34216 22:21:07.848490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34218 22:21:07.848929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34219 22:21:07.878918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34220 22:21:07.879282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34222 22:21:07.909410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34224 22:21:07.909860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34225 22:21:07.940404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34226 22:21:07.940767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34228 22:21:07.970979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34229 22:21:07.971333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34231 22:21:08.001510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34232 22:21:08.001875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34234 22:21:08.031766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34235 22:21:08.032121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34237 22:21:08.062107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34238 22:21:08.062468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34240 22:21:08.092331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34241 22:21:08.092688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34243 22:21:08.123201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34244 22:21:08.123554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34246 22:21:08.153844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34247 22:21:08.154199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34249 22:21:08.185066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34250 22:21:08.185418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34252 22:21:08.218086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34253 22:21:08.218448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34255 22:21:08.250342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34256 22:21:08.250699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34258 22:21:08.281219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34259 22:21:08.281621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34261 22:21:08.311565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34262 22:21:08.311924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34264 22:21:08.341731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34265 22:21:08.342094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34267 22:21:08.372395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34268 22:21:08.372972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34270 22:21:08.405403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34271 22:21:08.405918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34273 22:21:08.437169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34274 22:21:08.437552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34276 22:21:08.468083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34277 22:21:08.468426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34279 22:21:08.499499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34280 22:21:08.499839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34282 22:21:08.530556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34284 22:21:08.530971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34285 22:21:08.563552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34286 22:21:08.564032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34288 22:21:08.595947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34290 22:21:08.596380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34291 22:21:08.628177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34292 22:21:08.628586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34294 22:21:08.659633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34295 22:21:08.660029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34297 22:21:08.691483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34299 22:21:08.691853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34300 22:21:08.722632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34301 22:21:08.723114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34303 22:21:08.754583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34305 22:21:08.755131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34306 22:21:08.786508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34308 22:21:08.787135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34309 22:21:08.818351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34311 22:21:08.818798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34312 22:21:08.850298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34314 22:21:08.850852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34315 22:21:08.883467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34317 22:21:08.884046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34318 22:21:08.913948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34319 22:21:08.914427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34321 22:21:08.946408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34323 22:21:08.947010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34324 22:21:08.978024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34325 22:21:08.978466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34327 22:21:09.010756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34328 22:21:09.011163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34330 22:21:09.041170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34331 22:21:09.041518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34333 22:21:09.072103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34334 22:21:09.072604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34336 22:21:09.104543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34337 22:21:09.104954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34339 22:21:09.137196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34340 22:21:09.137663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34342 22:21:09.168454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34343 22:21:09.168864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34345 22:21:09.199612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34346 22:21:09.200062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34348 22:21:09.230717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34349 22:21:09.231082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34351 22:21:09.262895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34352 22:21:09.263292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34354 22:21:09.294546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34356 22:21:09.295038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34357 22:21:09.325477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34358 22:21:09.325814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34360 22:21:09.356142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34361 22:21:09.356622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34363 22:21:09.387542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34364 22:21:09.387992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34366 22:21:09.419853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34367 22:21:09.420264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34369 22:21:09.453938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34370 22:21:09.454420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34372 22:21:09.489554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34373 22:21:09.490011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34375 22:21:09.520831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34376 22:21:09.521139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34378 22:21:09.551407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34379 22:21:09.551837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34381 22:21:09.583327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34382 22:21:09.583778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34384 22:21:09.615351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34386 22:21:09.615989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34387 22:21:09.648985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34388 22:21:09.649417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34390 22:21:09.681566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34391 22:21:09.682035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34393 22:21:09.712876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34394 22:21:09.713311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34396 22:21:09.744389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34397 22:21:09.744844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34399 22:21:09.775983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34400 22:21:09.776464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34402 22:21:09.807755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34404 22:21:09.808294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34405 22:21:09.838762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34406 22:21:09.839113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34408 22:21:09.872261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34409 22:21:09.872641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34411 22:21:09.904514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34412 22:21:09.904963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34414 22:21:09.939269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34415 22:21:09.939663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34417 22:21:09.975027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34418 22:21:09.975320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34420 22:21:10.006709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34421 22:21:10.007091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34423 22:21:10.037486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34424 22:21:10.037893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34426 22:21:10.068630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34427 22:21:10.069037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34429 22:21:10.100828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34430 22:21:10.101310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34432 22:21:10.135983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34433 22:21:10.136404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34435 22:21:10.167544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34436 22:21:10.167950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34438 22:21:10.200468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34439 22:21:10.200930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34441 22:21:10.232494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34443 22:21:10.233042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34444 22:21:10.264713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34445 22:21:10.265184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34447 22:21:10.296230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34448 22:21:10.296715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34450 22:21:10.328590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34451 22:21:10.329055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34453 22:21:10.360122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34454 22:21:10.360468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34456 22:21:10.391572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34457 22:21:10.392046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34459 22:21:10.423435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34460 22:21:10.423889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34462 22:21:10.454997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34463 22:21:10.455393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34465 22:21:10.486805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34466 22:21:10.487169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34468 22:21:10.517367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34469 22:21:10.517685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34471 22:21:10.547377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34472 22:21:10.547733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34474 22:21:10.579236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34475 22:21:10.579579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34477 22:21:10.610707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34478 22:21:10.610964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34480 22:21:10.641767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34481 22:21:10.642121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34483 22:21:10.672504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34484 22:21:10.672851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34486 22:21:10.703159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34487 22:21:10.703498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34489 22:21:10.733361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34490 22:21:10.733681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34492 22:21:10.763751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34493 22:21:10.764101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34495 22:21:10.794491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34497 22:21:10.794983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34498 22:21:10.825247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34499 22:21:10.825614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34501 22:21:10.855551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34502 22:21:10.855913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34504 22:21:10.885994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34505 22:21:10.886351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34507 22:21:10.917721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34509 22:21:10.918316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34510 22:21:10.948953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34511 22:21:10.949368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34513 22:21:10.980412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34514 22:21:10.980758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34516 22:21:11.043351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34518 22:21:11.043910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34519 22:21:11.074725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34520 22:21:11.075074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34522 22:21:11.104540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34523 22:21:11.104888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34525 22:21:11.135674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34527 22:21:11.136030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34528 22:21:11.167066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34530 22:21:11.167396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34531 22:21:11.197576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34532 22:21:11.197962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34534 22:21:11.229039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34535 22:21:11.229388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34537 22:21:11.267251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34538 22:21:11.267647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34540 22:21:11.298827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34541 22:21:11.299176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34543 22:21:11.329601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34544 22:21:11.329967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34546 22:21:11.360536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34547 22:21:11.360880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34549 22:21:11.391614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34550 22:21:11.391954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34552 22:21:11.422789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34553 22:21:11.423133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34555 22:21:11.453523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34556 22:21:11.454012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34558 22:21:11.485530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34559 22:21:11.486009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34561 22:21:11.517177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34562 22:21:11.517625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34564 22:21:11.548242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34566 22:21:11.548650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34567 22:21:11.579355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34568 22:21:11.579699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34570 22:21:11.609576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34571 22:21:11.609925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34573 22:21:11.639896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34574 22:21:11.640232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34576 22:21:11.671971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34578 22:21:11.672533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34579 22:21:11.703199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34581 22:21:11.703681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34582 22:21:11.733688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34583 22:21:11.734051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34585 22:21:11.764356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34587 22:21:11.764914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34588 22:21:11.794962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34589 22:21:11.795454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34591 22:21:11.825823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34592 22:21:11.826275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34594 22:21:11.857428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34595 22:21:11.857901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34597 22:21:11.888438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34599 22:21:11.888967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34600 22:21:11.919105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34601 22:21:11.919492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34603 22:21:11.950183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34604 22:21:11.950599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34606 22:21:11.980993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34607 22:21:11.981293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34609 22:21:12.012246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34610 22:21:12.012684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34612 22:21:12.044486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34613 22:21:12.044943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34615 22:21:12.076505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34617 22:21:12.077138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34618 22:21:12.107788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34619 22:21:12.108239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34621 22:21:12.138689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34623 22:21:12.139252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34624 22:21:12.169062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34626 22:21:12.169696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34627 22:21:12.199747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34629 22:21:12.200303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34630 22:21:12.230134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34632 22:21:12.230720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34633 22:21:12.261076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34634 22:21:12.261531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34636 22:21:12.292619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34637 22:21:12.293083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34639 22:21:12.295511 + set +x
34640 22:21:12.295704 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 559902_1.1.3.5>
34641 22:21:12.296028 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 559902_1.1.3.5
34642 22:21:12.296171 Ending use of test pattern.
34643 22:21:12.296298 Ending test lava.1_kselftest-arm64_qemu (559902_1.1.3.5), duration 312.89
34645 22:21:12.298987 ok: lava_test_shell seems to have completed
34646 22:21:12.385249 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34647 22:21:12.388393 end: 3.1 lava-test-shell (duration 00:05:14) [common]
34648 22:21:12.388511 end: 3 lava-test-retry (duration 00:05:14) [common]
34649 22:21:12.388615 start: 4 finalize (timeout 00:03:40) [common]
34650 22:21:12.388726 start: 4.1 power-off (timeout 00:00:30) [common]
34651 22:21:12.388824 end: 4.1 power-off (duration 00:00:00) [common]
34652 22:21:12.388918 start: 4.2 read-feedback (timeout 00:03:40) [common]
34654 22:21:12.389380 Listened to connection for namespace 'common' for up to 1s
34655 22:21:13.394162 Finalising connection for namespace 'common'
34657 22:21:13.495251 / # poweroff
34658 22:21:13.495760 Already disconnected
34659 22:21:13.495882 poweroff
34660 22:21:13.596711 end: 4.2 read-feedback (duration 00:00:01) [common]
34661 22:21:13.596999 Already disconnected
34662 22:21:13.597228 end: 4 finalize (duration 00:00:01) [common]
34663 22:21:13.597435 Cleaning after the job
34664 22:21:13.597644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/559902/deployimages-tccwjnzw/kernel
34665 22:21:13.606481 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/559902/deployimages-tccwjnzw/ramdisk
34666 22:21:13.623216 Stopping the qemu container lava-docker-qemu-559902-2.1.1-hxuyj9z0co
34667 22:21:15.242745 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/559902
34668 22:21:15.332779 Job finished correctly