Boot log: mt8192-asurada-spherion-r0
- Errors: 0
- Kernel Errors: 34
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 26
1 22:15:28.114330 lava-dispatcher, installed at version: 2023.03
2 22:15:28.114539 start: 0 validate
3 22:15:28.114669 Start time: 2023-06-04 22:15:28.114662+00:00 (UTC)
4 22:15:28.114789 Using caching service: 'http://localhost/cache/?uri=%s'
5 22:15:28.114914 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230527.0%2Farm64%2Frootfs.cpio.gz exists
6 22:15:28.408102 Using caching service: 'http://localhost/cache/?uri=%s'
7 22:15:28.408347 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.26-1281-g84d5372e0f314%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 22:15:28.700434 Using caching service: 'http://localhost/cache/?uri=%s'
9 22:15:28.701250 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.26-1281-g84d5372e0f314%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
10 22:15:28.991786 Using caching service: 'http://localhost/cache/?uri=%s'
11 22:15:28.992029 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.26-1281-g84d5372e0f314%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 22:15:29.293866 validate duration: 1.18
14 22:15:29.295409 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 22:15:29.295918 start: 1.1 download-retry (timeout 00:10:00) [common]
16 22:15:29.296390 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 22:15:29.296949 Not decompressing ramdisk as can be used compressed.
18 22:15:29.297373 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230527.0/arm64/rootfs.cpio.gz
19 22:15:29.297826 saving as /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/ramdisk/rootfs.cpio.gz
20 22:15:29.298366 total size: 43394293 (41MB)
21 22:15:29.303769 progress 0% (0MB)
22 22:15:29.335257 progress 5% (2MB)
23 22:15:29.350108 progress 10% (4MB)
24 22:15:29.361474 progress 15% (6MB)
25 22:15:29.372502 progress 20% (8MB)
26 22:15:29.383496 progress 25% (10MB)
27 22:15:29.394271 progress 30% (12MB)
28 22:15:29.405313 progress 35% (14MB)
29 22:15:29.416229 progress 40% (16MB)
30 22:15:29.426969 progress 45% (18MB)
31 22:15:29.437904 progress 50% (20MB)
32 22:15:29.448675 progress 55% (22MB)
33 22:15:29.460329 progress 60% (24MB)
34 22:15:29.471563 progress 65% (26MB)
35 22:15:29.482539 progress 70% (29MB)
36 22:15:29.493328 progress 75% (31MB)
37 22:15:29.504335 progress 80% (33MB)
38 22:15:29.515164 progress 85% (35MB)
39 22:15:29.526017 progress 90% (37MB)
40 22:15:29.536795 progress 95% (39MB)
41 22:15:29.547389 progress 100% (41MB)
42 22:15:29.547533 41MB downloaded in 0.25s (166.09MB/s)
43 22:15:29.547691 end: 1.1.1 http-download (duration 00:00:00) [common]
45 22:15:29.547928 end: 1.1 download-retry (duration 00:00:00) [common]
46 22:15:29.548017 start: 1.2 download-retry (timeout 00:10:00) [common]
47 22:15:29.548101 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 22:15:29.548236 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 22:15:29.548311 saving as /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/kernel/Image
50 22:15:29.548373 total size: 45746688 (43MB)
51 22:15:29.548435 No compression specified
52 22:15:29.549523 progress 0% (0MB)
53 22:15:29.562339 progress 5% (2MB)
54 22:15:29.574191 progress 10% (4MB)
55 22:15:29.585698 progress 15% (6MB)
56 22:15:29.597159 progress 20% (8MB)
57 22:15:29.608778 progress 25% (10MB)
58 22:15:29.620088 progress 30% (13MB)
59 22:15:29.631423 progress 35% (15MB)
60 22:15:29.642735 progress 40% (17MB)
61 22:15:29.654028 progress 45% (19MB)
62 22:15:29.665439 progress 50% (21MB)
63 22:15:29.676752 progress 55% (24MB)
64 22:15:29.688174 progress 60% (26MB)
65 22:15:29.699678 progress 65% (28MB)
66 22:15:29.711176 progress 70% (30MB)
67 22:15:29.722559 progress 75% (32MB)
68 22:15:29.733678 progress 80% (34MB)
69 22:15:29.744910 progress 85% (37MB)
70 22:15:29.756019 progress 90% (39MB)
71 22:15:29.767078 progress 95% (41MB)
72 22:15:29.778311 progress 100% (43MB)
73 22:15:29.778430 43MB downloaded in 0.23s (189.64MB/s)
74 22:15:29.778574 end: 1.2.1 http-download (duration 00:00:00) [common]
76 22:15:29.778798 end: 1.2 download-retry (duration 00:00:00) [common]
77 22:15:29.778882 start: 1.3 download-retry (timeout 00:10:00) [common]
78 22:15:29.778964 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 22:15:29.779101 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
80 22:15:29.779182 saving as /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/dtb/mt8192-asurada-spherion-r0.dtb
81 22:15:29.779245 total size: 46924 (0MB)
82 22:15:29.779308 No compression specified
83 22:15:29.780498 progress 69% (0MB)
84 22:15:29.780759 progress 100% (0MB)
85 22:15:29.780908 0MB downloaded in 0.00s (26.96MB/s)
86 22:15:29.781025 end: 1.3.1 http-download (duration 00:00:00) [common]
88 22:15:29.781241 end: 1.3 download-retry (duration 00:00:00) [common]
89 22:15:29.781338 start: 1.4 download-retry (timeout 00:10:00) [common]
90 22:15:29.781424 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 22:15:29.781528 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 22:15:29.781595 saving as /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/modules/modules.tar
93 22:15:29.781655 total size: 8541948 (8MB)
94 22:15:29.781714 Using unxz to decompress xz
95 22:15:29.785411 progress 0% (0MB)
96 22:15:29.806812 progress 5% (0MB)
97 22:15:29.831815 progress 10% (0MB)
98 22:15:29.856537 progress 15% (1MB)
99 22:15:29.880853 progress 20% (1MB)
100 22:15:29.903749 progress 25% (2MB)
101 22:15:29.930021 progress 30% (2MB)
102 22:15:29.954199 progress 35% (2MB)
103 22:15:29.977804 progress 40% (3MB)
104 22:15:30.001129 progress 45% (3MB)
105 22:15:30.025493 progress 50% (4MB)
106 22:15:30.048412 progress 55% (4MB)
107 22:15:30.072293 progress 60% (4MB)
108 22:15:30.096851 progress 65% (5MB)
109 22:15:30.121164 progress 70% (5MB)
110 22:15:30.143927 progress 75% (6MB)
111 22:15:30.167464 progress 80% (6MB)
112 22:15:30.191536 progress 85% (6MB)
113 22:15:30.220270 progress 90% (7MB)
114 22:15:30.244941 progress 95% (7MB)
115 22:15:30.268467 progress 100% (8MB)
116 22:15:30.274111 8MB downloaded in 0.49s (16.54MB/s)
117 22:15:30.274377 end: 1.4.1 http-download (duration 00:00:00) [common]
119 22:15:30.274632 end: 1.4 download-retry (duration 00:00:00) [common]
120 22:15:30.274728 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 22:15:30.274820 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 22:15:30.274901 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 22:15:30.274984 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 22:15:30.275228 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_
125 22:15:30.275367 makedir: /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin
126 22:15:30.275471 makedir: /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/tests
127 22:15:30.275564 makedir: /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/results
128 22:15:30.275676 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-add-keys
129 22:15:30.275811 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-add-sources
130 22:15:30.275935 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-background-process-start
131 22:15:30.276057 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-background-process-stop
132 22:15:30.276174 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-common-functions
133 22:15:30.276290 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-echo-ipv4
134 22:15:30.276407 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-install-packages
135 22:15:30.276524 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-installed-packages
136 22:15:30.276640 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-os-build
137 22:15:30.276756 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-probe-channel
138 22:15:30.276872 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-probe-ip
139 22:15:30.276988 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-target-ip
140 22:15:30.277104 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-target-mac
141 22:15:30.277219 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-target-storage
142 22:15:30.277337 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-case
143 22:15:30.277453 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-event
144 22:15:30.277566 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-feedback
145 22:15:30.277681 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-raise
146 22:15:30.277799 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-reference
147 22:15:30.277915 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-runner
148 22:15:30.278031 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-set
149 22:15:30.278147 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-test-shell
150 22:15:30.278267 Updating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-install-packages (oe)
151 22:15:30.278412 Updating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/bin/lava-installed-packages (oe)
152 22:15:30.278542 Creating /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/environment
153 22:15:30.278637 LAVA metadata
154 22:15:30.278712 - LAVA_JOB_ID=10583909
155 22:15:30.278775 - LAVA_DISPATCHER_IP=192.168.201.1
156 22:15:30.278873 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 22:15:30.278943 skipped lava-vland-overlay
158 22:15:30.279017 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 22:15:30.279098 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 22:15:30.279162 skipped lava-multinode-overlay
161 22:15:30.279242 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 22:15:30.279327 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 22:15:30.279403 Loading test definitions
164 22:15:30.279492 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 22:15:30.279567 Using /lava-10583909 at stage 0
166 22:15:30.279859 uuid=10583909_1.5.2.3.1 testdef=None
167 22:15:30.279949 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 22:15:30.280034 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 22:15:30.280541 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 22:15:30.280760 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 22:15:30.281348 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 22:15:30.281579 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 22:15:30.282158 runner path: /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/0/tests/0_igt-kms-mediatek test_uuid 10583909_1.5.2.3.1
176 22:15:30.282310 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 22:15:30.282512 Creating lava-test-runner.conf files
179 22:15:30.282576 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10583909/lava-overlay-fpah4ms_/lava-10583909/0 for stage 0
180 22:15:30.282662 - 0_igt-kms-mediatek
181 22:15:30.282757 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 22:15:30.282842 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 22:15:30.289202 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 22:15:30.289303 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 22:15:30.289389 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 22:15:30.289473 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 22:15:30.289561 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 22:15:31.593858 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 22:15:31.594224 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 22:15:31.594335 extracting modules file /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10583909/extract-overlay-ramdisk-fd7j6iol/ramdisk
191 22:15:31.800287 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 22:15:31.800464 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 22:15:31.800561 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10583909/compress-overlay-dfkue36s/overlay-1.5.2.4.tar.gz to ramdisk
194 22:15:31.800636 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10583909/compress-overlay-dfkue36s/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10583909/extract-overlay-ramdisk-fd7j6iol/ramdisk
195 22:15:31.806826 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 22:15:31.806939 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 22:15:31.807032 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 22:15:31.807119 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 22:15:31.807262 Building ramdisk /var/lib/lava/dispatcher/tmp/10583909/extract-overlay-ramdisk-fd7j6iol/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10583909/extract-overlay-ramdisk-fd7j6iol/ramdisk
200 22:15:32.676742 >> 369037 blocks
201 22:15:38.345271 rename /var/lib/lava/dispatcher/tmp/10583909/extract-overlay-ramdisk-fd7j6iol/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/ramdisk/ramdisk.cpio.gz
202 22:15:38.345694 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 22:15:38.345819 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 22:15:38.345923 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 22:15:38.346033 Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/kernel/Image'
206 22:15:49.559452 Returned 0 in 11 seconds
207 22:15:49.660373 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/kernel/image.itb
208 22:15:50.488745 output: FIT description: Kernel Image image with one or more FDT blobs
209 22:15:50.489107 output: Created: Sun Jun 4 23:15:50 2023
210 22:15:50.489184 output: Image 0 (kernel-1)
211 22:15:50.489249 output: Description:
212 22:15:50.489310 output: Created: Sun Jun 4 23:15:50 2023
213 22:15:50.489370 output: Type: Kernel Image
214 22:15:50.489430 output: Compression: lzma compressed
215 22:15:50.489487 output: Data Size: 10081729 Bytes = 9845.44 KiB = 9.61 MiB
216 22:15:50.489546 output: Architecture: AArch64
217 22:15:50.489603 output: OS: Linux
218 22:15:50.489658 output: Load Address: 0x00000000
219 22:15:50.489715 output: Entry Point: 0x00000000
220 22:15:50.489771 output: Hash algo: crc32
221 22:15:50.489824 output: Hash value: 3b3111d8
222 22:15:50.489877 output: Image 1 (fdt-1)
223 22:15:50.489929 output: Description: mt8192-asurada-spherion-r0
224 22:15:50.489981 output: Created: Sun Jun 4 23:15:50 2023
225 22:15:50.490034 output: Type: Flat Device Tree
226 22:15:50.490086 output: Compression: uncompressed
227 22:15:50.490138 output: Data Size: 46924 Bytes = 45.82 KiB = 0.04 MiB
228 22:15:50.490190 output: Architecture: AArch64
229 22:15:50.490243 output: Hash algo: crc32
230 22:15:50.490295 output: Hash value: 1df858fa
231 22:15:50.490347 output: Image 2 (ramdisk-1)
232 22:15:50.490398 output: Description: unavailable
233 22:15:50.490450 output: Created: Sun Jun 4 23:15:50 2023
234 22:15:50.490502 output: Type: RAMDisk Image
235 22:15:50.490554 output: Compression: Unknown Compression
236 22:15:50.490606 output: Data Size: 56373041 Bytes = 55051.80 KiB = 53.76 MiB
237 22:15:50.490658 output: Architecture: AArch64
238 22:15:50.490710 output: OS: Linux
239 22:15:50.490762 output: Load Address: unavailable
240 22:15:50.490814 output: Entry Point: unavailable
241 22:15:50.490865 output: Hash algo: crc32
242 22:15:50.490916 output: Hash value: 6f29b0d3
243 22:15:50.490968 output: Default Configuration: 'conf-1'
244 22:15:50.491020 output: Configuration 0 (conf-1)
245 22:15:50.491071 output: Description: mt8192-asurada-spherion-r0
246 22:15:50.491123 output: Kernel: kernel-1
247 22:15:50.491197 output: Init Ramdisk: ramdisk-1
248 22:15:50.491263 output: FDT: fdt-1
249 22:15:50.491315 output: Loadables: kernel-1
250 22:15:50.491366 output:
251 22:15:50.491556 end: 1.5.8.1 prepare-fit (duration 00:00:12) [common]
252 22:15:50.491653 end: 1.5.8 prepare-kernel (duration 00:00:12) [common]
253 22:15:50.491760 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 22:15:50.491847 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
255 22:15:50.491924 No LXC device requested
256 22:15:50.492018 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 22:15:50.492108 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
258 22:15:50.492185 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 22:15:50.492254 Checking files for TFTP limit of 4294967296 bytes.
260 22:15:50.492729 end: 1 tftp-deploy (duration 00:00:21) [common]
261 22:15:50.492870 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 22:15:50.492960 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 22:15:50.493080 substitutions:
264 22:15:50.493146 - {DTB}: 10583909/tftp-deploy-im2kix39/dtb/mt8192-asurada-spherion-r0.dtb
265 22:15:50.493211 - {INITRD}: 10583909/tftp-deploy-im2kix39/ramdisk/ramdisk.cpio.gz
266 22:15:50.493270 - {KERNEL}: 10583909/tftp-deploy-im2kix39/kernel/Image
267 22:15:50.493327 - {LAVA_MAC}: None
268 22:15:50.493383 - {PRESEED_CONFIG}: None
269 22:15:50.493439 - {PRESEED_LOCAL}: None
270 22:15:50.493493 - {RAMDISK}: 10583909/tftp-deploy-im2kix39/ramdisk/ramdisk.cpio.gz
271 22:15:50.493547 - {ROOT_PART}: None
272 22:15:50.493601 - {ROOT}: None
273 22:15:50.493654 - {SERVER_IP}: 192.168.201.1
274 22:15:50.493708 - {TEE}: None
275 22:15:50.493760 Parsed boot commands:
276 22:15:50.493813 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 22:15:50.493983 Parsed boot commands: tftpboot 192.168.201.1 10583909/tftp-deploy-im2kix39/kernel/image.itb 10583909/tftp-deploy-im2kix39/kernel/cmdline
278 22:15:50.494069 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 22:15:50.494155 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 22:15:50.494244 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 22:15:50.494335 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 22:15:50.494405 Not connected, no need to disconnect.
283 22:15:50.494477 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 22:15:50.494555 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 22:15:50.494621 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost mt8192-asurada-spherion-r0-cbg-2'
286 22:15:50.497968 Setting prompt string to ['lava-test: # ']
287 22:15:50.498291 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 22:15:50.498392 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 22:15:50.498484 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 22:15:50.498575 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 22:15:50.498769 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-2' '--port=1' '--command=reboot'
292 22:15:55.649871 >> Command sent successfully.
293 22:15:55.659940 Returned 0 in 5 seconds
294 22:15:55.761079 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
296 22:15:55.763898 end: 2.2.2 reset-device (duration 00:00:05) [common]
297 22:15:55.764411 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
298 22:15:55.765031 Setting prompt string to 'Starting depthcharge on Spherion...'
299 22:15:55.765622 Changing prompt to 'Starting depthcharge on Spherion...'
300 22:15:55.766115 depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
301 22:15:55.767558 [Enter `^Ec?' for help]
302 22:15:55.930772
303 22:15:55.931368
304 22:15:55.931724 F0: 102B 0000
305 22:15:55.932045
306 22:15:55.932351 F3: 1001 0000 [0200]
307 22:15:55.933424
308 22:15:55.933847 F3: 1001 0000
309 22:15:55.934189
310 22:15:55.934501 F7: 102D 0000
311 22:15:55.934807
312 22:15:55.936849 F1: 0000 0000
313 22:15:55.937380
314 22:15:55.937725 V0: 0000 0000 [0001]
315 22:15:55.938045
316 22:15:55.940331 00: 0007 8000
317 22:15:55.940866
318 22:15:55.941212 01: 0000 0000
319 22:15:55.941539
320 22:15:55.943360 BP: 0C00 0209 [0000]
321 22:15:55.943793
322 22:15:55.944153 G0: 1182 0000
323 22:15:55.944472
324 22:15:55.947600 EC: 0000 0021 [4000]
325 22:15:55.948129
326 22:15:55.948474 S7: 0000 0000 [0000]
327 22:15:55.948791
328 22:15:55.950683 CC: 0000 0000 [0001]
329 22:15:55.951111
330 22:15:55.951505 T0: 0000 0040 [010F]
331 22:15:55.951876
332 22:15:55.952190 Jump to BL
333 22:15:55.952492
334 22:15:55.977570
335 22:15:55.978147
336 22:15:55.978525
337 22:15:55.984597 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...
338 22:15:55.988093 ARM64: Exception handlers installed.
339 22:15:55.992155 ARM64: Testing exception
340 22:15:55.995310 ARM64: Done test exception
341 22:15:56.002050 Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000
342 22:15:56.011932 Mapping address range [0x00000000:0x200000000) as cacheable | read-write | secure | device
343 22:15:56.019158 Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000
344 22:15:56.028532 Mapping address range [0x00100000:0x00120000) as cacheable | read-write | secure | normal
345 22:15:56.035375 Backing address range [0x00000000:0x40000000) with new page table @0x0010f000
346 22:15:56.042668 Backing address range [0x00000000:0x00200000) with new page table @0x00110000
347 22:15:56.054942 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | normal
348 22:15:56.061398 Backing address range [0x00200000:0x00400000) with new page table @0x00111000
349 22:15:56.080364 Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write | secure | normal
350 22:15:56.083941 WDT: Last reset was cold boot
351 22:15:56.087125 SPI1(PAD0) initialized at 2873684 Hz
352 22:15:56.090588 SPI5(PAD0) initialized at 992727 Hz
353 22:15:56.094746 VBOOT: Loading verstage.
354 22:15:56.100379 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
355 22:15:56.103927 FMAP: Found "FLASH" version 1.1 at 0x20000.
356 22:15:56.106947 FMAP: base = 0x0 size = 0x800000 #areas = 25
357 22:15:56.111265 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
358 22:15:56.117703 CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes
359 22:15:56.124390 CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150
360 22:15:56.135426 read SPI 0x96554 0xa1eb: 4591 us, 9028 KB/s, 72.224 Mbps
361 22:15:56.136009
362 22:15:56.136386
363 22:15:56.145185 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...
364 22:15:56.148937 ARM64: Exception handlers installed.
365 22:15:56.152131 ARM64: Testing exception
366 22:15:56.152614 ARM64: Done test exception
367 22:15:56.160408 FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)
368 22:15:56.162743 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
369 22:15:56.176744 Probing TPM: . done!
370 22:15:56.177338 TPM ready after 0 ms
371 22:15:56.183624 Connected to device vid:did:rid of 1ae0:0028:00
372 22:15:56.190026 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
373 22:15:56.249025 Initialized TPM device CR50 revision 0
374 22:15:56.259332 tlcl_send_startup: Startup return code is 0
375 22:15:56.259884 TPM: setup succeeded
376 22:15:56.271120 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 22:15:56.279739 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 22:15:56.293263 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
379 22:15:56.300832 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
380 22:15:56.303740 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
381 22:15:56.309869 in-header: 03 07 00 00 08 00 00 00
382 22:15:56.313028 in-data: aa e4 47 04 13 02 00 00
383 22:15:56.316879 Chrome EC: UHEPI supported
384 22:15:56.324079 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
385 22:15:56.327486 in-header: 03 95 00 00 08 00 00 00
386 22:15:56.331049 in-data: 18 20 20 08 00 00 00 00
387 22:15:56.331596 Phase 1
388 22:15:56.334953 FMAP: area GBB found @ 3f5000 (12032 bytes)
389 22:15:56.342792 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
390 22:15:56.346458 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
391 22:15:56.350113 Recovery requested (1009000e)
392 22:15:56.359096 TPM: Extending digest for VBOOT: boot mode into PCR 0
393 22:15:56.363714 tlcl_extend: response is 0
394 22:15:56.373692 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
395 22:15:56.378385 tlcl_extend: response is 0
396 22:15:56.385197 CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c
397 22:15:56.405321 read SPI 0x210d4 0x2173b: 15137 us, 9051 KB/s, 72.408 Mbps
398 22:15:56.412306 BS: bootblock times (exec / console): total (unknown) / 148 ms
399 22:15:56.412883
400 22:15:56.413256
401 22:15:56.422571 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...
402 22:15:56.426093 ARM64: Exception handlers installed.
403 22:15:56.429331 ARM64: Testing exception
404 22:15:56.429804 ARM64: Done test exception
405 22:15:56.450819 pmic_efuse_setting: Set efuses in 11 msecs
406 22:15:56.454477 pmwrap_interface_init: Select PMIF_VLD_RDY
407 22:15:56.460778 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a
408 22:15:56.464371 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a
409 22:15:56.471265 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a
410 22:15:56.474867 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a
411 22:15:56.478575 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a
412 22:15:56.485660 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a
413 22:15:56.489891 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a
414 22:15:56.493048 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a
415 22:15:56.497130 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c
416 22:15:56.504210 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a
417 22:15:56.508020 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a
418 22:15:56.512579 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c
419 22:15:56.515415 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c
420 22:15:56.523609 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a
421 22:15:56.530902 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a
422 22:15:56.533959 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a
423 22:15:56.541729 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a
424 22:15:56.544913 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a
425 22:15:56.552805 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a
426 22:15:56.556140 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a
427 22:15:56.562937 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c
428 22:15:56.566876 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a
429 22:15:56.574058 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a
430 22:15:56.578605 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c
431 22:15:56.585421 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c
432 22:15:56.589075 [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa
433 22:15:56.596557 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92
434 22:15:56.599622 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2
435 22:15:56.603260 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82
436 22:15:56.610793 [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10
437 22:15:56.614189 [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425
438 22:15:56.621255 [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010
439 22:15:56.624767 [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f
440 22:15:56.628571 [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000
441 22:15:56.635851 [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8
442 22:15:56.639328 [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb
443 22:15:56.646725 [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698
444 22:15:56.650452 [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3
445 22:15:56.654553 [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92
446 22:15:56.657753 [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a
447 22:15:56.661258 [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2
448 22:15:56.668982 [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a
449 22:15:56.672659 [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a
450 22:15:56.676342 [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a
451 22:15:56.679796 [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a
452 22:15:56.687506 [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82
453 22:15:56.690454 [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c
454 22:15:56.694662 [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a
455 22:15:56.697932 [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a
456 22:15:56.701630 [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c
457 22:15:56.705093 [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c
458 22:15:56.713800 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248
459 22:15:56.723962 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1
460 22:15:56.727226 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
461 22:15:56.734825 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248
462 22:15:56.741744 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0
463 22:15:56.749387 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
464 22:15:56.754197 [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
465 22:15:56.756375 [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
466 22:15:56.764191 [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde6b, sec=0x0
467 22:15:56.770805 [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2
468 22:15:56.774858 [RTC]rtc_osc_init,62: osc32con val = 0xde6b
469 22:15:56.778859 [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a
470 22:15:56.788569 [RTC]rtc_get_frequency_meter,154: input=15, output=853
471 22:15:56.798425 [RTC]rtc_get_frequency_meter,154: input=7, output=725
472 22:15:56.807420 [RTC]rtc_get_frequency_meter,154: input=11, output=789
473 22:15:56.817164 [RTC]rtc_get_frequency_meter,154: input=13, output=821
474 22:15:56.827438 [RTC]rtc_get_frequency_meter,154: input=12, output=804
475 22:15:56.835738 [RTC]rtc_get_frequency_meter,154: input=11, output=790
476 22:15:56.845835 [RTC]rtc_get_frequency_meter,154: input=12, output=805
477 22:15:56.848418 [RTC]rtc_eosc_cali,47: left: 11, middle: 11, right: 12
478 22:15:56.856218 [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde6b
479 22:15:56.859757 [RTC]rtc_boot_common,202: RTC_STATE_REBOOT
480 22:15:56.863468 [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486
481 22:15:56.866986 [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1
482 22:15:56.870641 [RTC]rtc_bbpu_power_on,300: done BBPU=0x81
483 22:15:56.874127 ADC[4]: Raw value=904802 ID=7
484 22:15:56.877945 ADC[3]: Raw value=213916 ID=1
485 22:15:56.878375 RAM Code: 0x71
486 22:15:56.881886 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
487 22:15:56.889239 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
488 22:15:56.896567 CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE' @0x75280 size 0x8 in mcache @0x00108014
489 22:15:56.903981 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
490 22:15:56.907356 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
491 22:15:56.911359 in-header: 03 07 00 00 08 00 00 00
492 22:15:56.915792 in-data: aa e4 47 04 13 02 00 00
493 22:15:56.916217 Chrome EC: UHEPI supported
494 22:15:56.923105 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
495 22:15:56.926681 in-header: 03 95 00 00 08 00 00 00
496 22:15:56.930157 in-data: 18 20 20 08 00 00 00 00
497 22:15:56.934194 MRC: failed to locate region type 0.
498 22:15:56.937390 DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)
499 22:15:56.941929 DRAM-K: Running full calibration
500 22:15:56.949040 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
501 22:15:56.949480 header.status = 0x0
502 22:15:56.952946 header.version = 0x6 (expected: 0x6)
503 22:15:56.956241 header.size = 0xd00 (expected: 0xd00)
504 22:15:56.960056 header.flags = 0x0
505 22:15:56.963351 CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40
506 22:15:56.982750 read SPI 0x72590 0x1c583: 12500 us, 9287 KB/s, 74.296 Mbps
507 22:15:56.990230 dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6
508 22:15:56.993020 dram_init: ddr_geometry: 2
509 22:15:56.993530 [EMI] MDL number = 2
510 22:15:56.996717 [EMI] Get MDL freq = 0
511 22:15:56.997250 dram_init: ddr_type: 0
512 22:15:57.000831 is_discrete_lpddr4: 1
513 22:15:57.004027 [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0
514 22:15:57.004463
515 22:15:57.004807
516 22:15:57.008363 [Bian_co] ETT version 0.0.0.1
517 22:15:57.011546 dram_type 6, R0 cbt_mode 1, R1 cbt_mode 1 VENDOR=6
518 22:15:57.012071
519 22:15:57.015329 dramc_set_vcore_voltage set vcore to 650000
520 22:15:57.018521 Read voltage for 800, 4
521 22:15:57.018966 Vio18 = 0
522 22:15:57.019361 Vcore = 650000
523 22:15:57.019695 Vdram = 0
524 22:15:57.022668 Vddq = 0
525 22:15:57.023234 Vmddr = 0
526 22:15:57.026335 dram_init: config_dvfs: 1
527 22:15:57.030151 [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0
528 22:15:57.036354 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
529 22:15:57.039377 [SwImpedanceCal] DRVP=7, DRVN=16, ODTN=9
530 22:15:57.043093 freq_region=0, Reg: DRVP=7, DRVN=16, ODTN=9
531 22:15:57.046370 [SwImpedanceCal] DRVP=12, DRVN=24, ODTN=9
532 22:15:57.050397 freq_region=1, Reg: DRVP=12, DRVN=24, ODTN=9
533 22:15:57.054474 MEM_TYPE=3, freq_sel=18
534 22:15:57.055052 sv_algorithm_assistance_LP4_1600
535 22:15:57.061076 ============ PULL DRAM RESETB DOWN ============
536 22:15:57.065827 ========== PULL DRAM RESETB DOWN end =========
537 22:15:57.068449 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
538 22:15:57.071708 ===================================
539 22:15:57.075044 LPDDR4 DRAM CONFIGURATION
540 22:15:57.078289 ===================================
541 22:15:57.078868 EX_ROW_EN[0] = 0x0
542 22:15:57.081624 EX_ROW_EN[1] = 0x0
543 22:15:57.082195 LP4Y_EN = 0x0
544 22:15:57.085222 WORK_FSP = 0x0
545 22:15:57.085827 WL = 0x2
546 22:15:57.088156 RL = 0x2
547 22:15:57.088692 BL = 0x2
548 22:15:57.091118 RPST = 0x0
549 22:15:57.094646 RD_PRE = 0x0
550 22:15:57.095119 WR_PRE = 0x1
551 22:15:57.098155 WR_PST = 0x0
552 22:15:57.098726 DBI_WR = 0x0
553 22:15:57.100981 DBI_RD = 0x0
554 22:15:57.101362 OTF = 0x1
555 22:15:57.104620 ===================================
556 22:15:57.107732 ===================================
557 22:15:57.111119 ANA top config
558 22:15:57.111576 ===================================
559 22:15:57.114548 DLL_ASYNC_EN = 0
560 22:15:57.118519 ALL_SLAVE_EN = 1
561 22:15:57.121413 NEW_RANK_MODE = 1
562 22:15:57.124995 DLL_IDLE_MODE = 1
563 22:15:57.125428 LP45_APHY_COMB_EN = 1
564 22:15:57.128363 TX_ODT_DIS = 1
565 22:15:57.131148 NEW_8X_MODE = 1
566 22:15:57.135047 ===================================
567 22:15:57.139208 ===================================
568 22:15:57.141608 data_rate = 1600
569 22:15:57.144301 CKR = 1
570 22:15:57.144782 DQ_P2S_RATIO = 8
571 22:15:57.148342 ===================================
572 22:15:57.151844 CA_P2S_RATIO = 8
573 22:15:57.154577 DQ_CA_OPEN = 0
574 22:15:57.158737 DQ_SEMI_OPEN = 0
575 22:15:57.162115 CA_SEMI_OPEN = 0
576 22:15:57.162702 CA_FULL_RATE = 0
577 22:15:57.165417 DQ_CKDIV4_EN = 1
578 22:15:57.168515 CA_CKDIV4_EN = 1
579 22:15:57.171893 CA_PREDIV_EN = 0
580 22:15:57.174941 PH8_DLY = 0
581 22:15:57.178459 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
582 22:15:57.179044 DQ_AAMCK_DIV = 4
583 22:15:57.181677 CA_AAMCK_DIV = 4
584 22:15:57.185253 CA_ADMCK_DIV = 4
585 22:15:57.188564 DQ_TRACK_CA_EN = 0
586 22:15:57.191844 CA_PICK = 800
587 22:15:57.194690 CA_MCKIO = 800
588 22:15:57.198890 MCKIO_SEMI = 0
589 22:15:57.199518 PLL_FREQ = 3068
590 22:15:57.201956 DQ_UI_PI_RATIO = 32
591 22:15:57.206116 CA_UI_PI_RATIO = 0
592 22:15:57.209455 ===================================
593 22:15:57.213059 ===================================
594 22:15:57.213537 memory_type:LPDDR4
595 22:15:57.215995 GP_NUM : 10
596 22:15:57.219902 SRAM_EN : 1
597 22:15:57.220487 MD32_EN : 0
598 22:15:57.223534 ===================================
599 22:15:57.227041 [ANA_INIT] >>>>>>>>>>>>>>
600 22:15:57.227453 <<<<<< [CONFIGURE PHASE]: ANA_TX
601 22:15:57.231129 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
602 22:15:57.234149 ===================================
603 22:15:57.238111 data_rate = 1600,PCW = 0X7600
604 22:15:57.241227 ===================================
605 22:15:57.244642 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
606 22:15:57.251217 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
607 22:15:57.254863 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
608 22:15:57.261304 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
609 22:15:57.265719 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
610 22:15:57.267892 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
611 22:15:57.271207 [ANA_INIT] flow start
612 22:15:57.271787 [ANA_INIT] PLL >>>>>>>>
613 22:15:57.274507 [ANA_INIT] PLL <<<<<<<<
614 22:15:57.278480 [ANA_INIT] MIDPI >>>>>>>>
615 22:15:57.278962 [ANA_INIT] MIDPI <<<<<<<<
616 22:15:57.281136 [ANA_INIT] DLL >>>>>>>>
617 22:15:57.284665 [ANA_INIT] flow end
618 22:15:57.288051 ============ LP4 DIFF to SE enter ============
619 22:15:57.290953 ============ LP4 DIFF to SE exit ============
620 22:15:57.294769 [ANA_INIT] <<<<<<<<<<<<<
621 22:15:57.297517 [Flow] Enable top DCM control >>>>>
622 22:15:57.300927 [Flow] Enable top DCM control <<<<<
623 22:15:57.304306 Enable DLL master slave shuffle
624 22:15:57.307392 ==============================================================
625 22:15:57.310626 Gating Mode config
626 22:15:57.317616 ==============================================================
627 22:15:57.318195 Config description:
628 22:15:57.327658 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
629 22:15:57.333853 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
630 22:15:57.337489 SELPH_MODE 0: By rank 1: By Phase
631 22:15:57.344243 ==============================================================
632 22:15:57.347331 GAT_TRACK_EN = 1
633 22:15:57.350263 RX_GATING_MODE = 2
634 22:15:57.353804 RX_GATING_TRACK_MODE = 2
635 22:15:57.356636 SELPH_MODE = 1
636 22:15:57.360222 PICG_EARLY_EN = 1
637 22:15:57.363691 VALID_LAT_VALUE = 1
638 22:15:57.366758 ==============================================================
639 22:15:57.370341 Enter into Gating configuration >>>>
640 22:15:57.373134 Exit from Gating configuration <<<<
641 22:15:57.377146 Enter into DVFS_PRE_config >>>>>
642 22:15:57.389873 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
643 22:15:57.393272 Exit from DVFS_PRE_config <<<<<
644 22:15:57.397158 Enter into PICG configuration >>>>
645 22:15:57.397698 Exit from PICG configuration <<<<
646 22:15:57.399806 [RX_INPUT] configuration >>>>>
647 22:15:57.403345 [RX_INPUT] configuration <<<<<
648 22:15:57.410296 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
649 22:15:57.413279 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
650 22:15:57.420127 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
651 22:15:57.426712 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
652 22:15:57.433003 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
653 22:15:57.440102 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
654 22:15:57.443255 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
655 22:15:57.446583 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
656 22:15:57.450008 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
657 22:15:57.456330 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
658 22:15:57.459949 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
659 22:15:57.463392 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
660 22:15:57.466416 ===================================
661 22:15:57.469827 LPDDR4 DRAM CONFIGURATION
662 22:15:57.473555 ===================================
663 22:15:57.476285 EX_ROW_EN[0] = 0x0
664 22:15:57.476768 EX_ROW_EN[1] = 0x0
665 22:15:57.479656 LP4Y_EN = 0x0
666 22:15:57.480137 WORK_FSP = 0x0
667 22:15:57.482924 WL = 0x2
668 22:15:57.483552 RL = 0x2
669 22:15:57.486459 BL = 0x2
670 22:15:57.487040 RPST = 0x0
671 22:15:57.489834 RD_PRE = 0x0
672 22:15:57.490425 WR_PRE = 0x1
673 22:15:57.493319 WR_PST = 0x0
674 22:15:57.493905 DBI_WR = 0x0
675 22:15:57.496562 DBI_RD = 0x0
676 22:15:57.497145 OTF = 0x1
677 22:15:57.500059 ===================================
678 22:15:57.503013 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
679 22:15:57.509766 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
680 22:15:57.512960 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
681 22:15:57.516420 ===================================
682 22:15:57.519584 LPDDR4 DRAM CONFIGURATION
683 22:15:57.522957 ===================================
684 22:15:57.523591 EX_ROW_EN[0] = 0x10
685 22:15:57.526328 EX_ROW_EN[1] = 0x0
686 22:15:57.529645 LP4Y_EN = 0x0
687 22:15:57.530234 WORK_FSP = 0x0
688 22:15:57.532623 WL = 0x2
689 22:15:57.533101 RL = 0x2
690 22:15:57.536021 BL = 0x2
691 22:15:57.536605 RPST = 0x0
692 22:15:57.539242 RD_PRE = 0x0
693 22:15:57.539723 WR_PRE = 0x1
694 22:15:57.542969 WR_PST = 0x0
695 22:15:57.543482 DBI_WR = 0x0
696 22:15:57.546202 DBI_RD = 0x0
697 22:15:57.546704 OTF = 0x1
698 22:15:57.549569 ===================================
699 22:15:57.555723 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
700 22:15:57.560091 nWR fixed to 40
701 22:15:57.563812 [ModeRegInit_LP4] CH0 RK0
702 22:15:57.564361 [ModeRegInit_LP4] CH0 RK1
703 22:15:57.567146 [ModeRegInit_LP4] CH1 RK0
704 22:15:57.570551 [ModeRegInit_LP4] CH1 RK1
705 22:15:57.570992 match AC timing 13
706 22:15:57.577068 dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 1
707 22:15:57.580347 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
708 22:15:57.583886 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
709 22:15:57.590295 [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17
710 22:15:57.593733 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
711 22:15:57.594327 [EMI DOE] emi_dcm 0
712 22:15:57.600468 [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600
713 22:15:57.601059 ==
714 22:15:57.603985 Dram Type= 6, Freq= 0, CH_0, rank 0
715 22:15:57.607061 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
716 22:15:57.607761 ==
717 22:15:57.614241 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
718 22:15:57.620096 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
719 22:15:57.628045 [CA 0] Center 37 (7~68) winsize 62
720 22:15:57.631140 [CA 1] Center 37 (7~68) winsize 62
721 22:15:57.634919 [CA 2] Center 34 (4~65) winsize 62
722 22:15:57.638405 [CA 3] Center 35 (4~66) winsize 63
723 22:15:57.641442 [CA 4] Center 33 (3~64) winsize 62
724 22:15:57.644432 [CA 5] Center 33 (3~64) winsize 62
725 22:15:57.644916
726 22:15:57.647564 [CmdBusTrainingLP45] Vref(ca) range 1: 34
727 22:15:57.648037
728 22:15:57.651001 [CATrainingPosCal] consider 1 rank data
729 22:15:57.655007 u2DelayCellTimex100 = 270/100 ps
730 22:15:57.657796 CA0 delay=37 (7~68),Diff = 4 PI (28 cell)
731 22:15:57.664302 CA1 delay=37 (7~68),Diff = 4 PI (28 cell)
732 22:15:57.668048 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
733 22:15:57.670915 CA3 delay=35 (4~66),Diff = 2 PI (14 cell)
734 22:15:57.674525 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
735 22:15:57.678019 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
736 22:15:57.678599
737 22:15:57.680791 CA PerBit enable=1, Macro0, CA PI delay=33
738 22:15:57.681268
739 22:15:57.684922 [CBTSetCACLKResult] CA Dly = 33
740 22:15:57.685505 CS Dly: 5 (0~36)
741 22:15:57.687702 ==
742 22:15:57.690655 Dram Type= 6, Freq= 0, CH_0, rank 1
743 22:15:57.694938 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
744 22:15:57.695559 ==
745 22:15:57.697931 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
746 22:15:57.704224 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
747 22:15:57.714871 [CA 0] Center 38 (7~69) winsize 63
748 22:15:57.717241 [CA 1] Center 37 (7~68) winsize 62
749 22:15:57.720934 [CA 2] Center 35 (4~66) winsize 63
750 22:15:57.724189 [CA 3] Center 35 (4~66) winsize 63
751 22:15:57.727938 [CA 4] Center 34 (3~65) winsize 63
752 22:15:57.730567 [CA 5] Center 33 (3~64) winsize 62
753 22:15:57.731145
754 22:15:57.734224 [CmdBusTrainingLP45] Vref(ca) range 1: 34
755 22:15:57.734830
756 22:15:57.737052 [CATrainingPosCal] consider 2 rank data
757 22:15:57.740730 u2DelayCellTimex100 = 270/100 ps
758 22:15:57.744031 CA0 delay=37 (7~68),Diff = 4 PI (28 cell)
759 22:15:57.747568 CA1 delay=37 (7~68),Diff = 4 PI (28 cell)
760 22:15:57.754052 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
761 22:15:57.758833 CA3 delay=35 (4~66),Diff = 2 PI (14 cell)
762 22:15:57.760673 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
763 22:15:57.764571 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
764 22:15:57.765161
765 22:15:57.767456 CA PerBit enable=1, Macro0, CA PI delay=33
766 22:15:57.767935
767 22:15:57.771279 [CBTSetCACLKResult] CA Dly = 33
768 22:15:57.771758 CS Dly: 6 (0~38)
769 22:15:57.772138
770 22:15:57.774337 ----->DramcWriteLeveling(PI) begin...
771 22:15:57.777490 ==
772 22:15:57.777969 Dram Type= 6, Freq= 0, CH_0, rank 0
773 22:15:57.784836 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
774 22:15:57.785438 ==
775 22:15:57.788345 Write leveling (Byte 0): 30 => 30
776 22:15:57.788826 Write leveling (Byte 1): 28 => 28
777 22:15:57.792250 DramcWriteLeveling(PI) end<-----
778 22:15:57.792728
779 22:15:57.793101 ==
780 22:15:57.796582 Dram Type= 6, Freq= 0, CH_0, rank 0
781 22:15:57.799346 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
782 22:15:57.799781 ==
783 22:15:57.802966 [Gating] SW mode calibration
784 22:15:57.810137 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
785 22:15:57.816947 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
786 22:15:57.819696 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
787 22:15:57.823105 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
788 22:15:57.829850 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)
789 22:15:57.833876 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
790 22:15:57.836793 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
791 22:15:57.843358 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
792 22:15:57.846460 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
793 22:15:57.850019 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
794 22:15:57.856399 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
795 22:15:57.859548 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
796 22:15:57.862970 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
797 22:15:57.869716 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
798 22:15:57.873335 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
799 22:15:57.876022 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
800 22:15:57.882652 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
801 22:15:57.886159 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
802 22:15:57.889778 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
803 22:15:57.895962 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
804 22:15:57.899136 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)
805 22:15:57.902671 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
806 22:15:57.909017 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
807 22:15:57.912193 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
808 22:15:57.917544 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
809 22:15:57.922450 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
810 22:15:57.926074 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
811 22:15:57.929040 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
812 22:15:57.935719 0 9 8 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
813 22:15:57.938856 0 9 12 | B1->B0 | 3232 3434 | 0 1 | (0 0) (1 1)
814 22:15:57.942013 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
815 22:15:57.948621 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
816 22:15:57.952730 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
817 22:15:57.956092 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
818 22:15:57.962301 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
819 22:15:57.965388 0 10 4 | B1->B0 | 3434 2f2f | 1 1 | (1 1) (1 1)
820 22:15:57.968718 0 10 8 | B1->B0 | 3131 2626 | 0 0 | (0 1) (0 0)
821 22:15:57.975346 0 10 12 | B1->B0 | 2929 2323 | 0 0 | (0 0) (0 0)
822 22:15:57.978112 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
823 22:15:57.981769 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
824 22:15:57.989219 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
825 22:15:57.991377 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
826 22:15:57.995338 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
827 22:15:58.002243 0 11 4 | B1->B0 | 2323 2d2d | 0 0 | (0 0) (0 0)
828 22:15:58.005937 0 11 8 | B1->B0 | 2c2c 4141 | 0 0 | (0 0) (0 0)
829 22:15:58.008432 0 11 12 | B1->B0 | 3b3b 4646 | 0 0 | (0 0) (0 0)
830 22:15:58.015529 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
831 22:15:58.018520 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
832 22:15:58.021895 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
833 22:15:58.025387 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
834 22:15:58.031694 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
835 22:15:58.035099 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
836 22:15:58.038350 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
837 22:15:58.045016 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
838 22:15:58.048235 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
839 22:15:58.051307 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
840 22:15:58.058436 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
841 22:15:58.061351 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
842 22:15:58.065170 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
843 22:15:58.071336 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
844 22:15:58.075645 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
845 22:15:58.077967 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
846 22:15:58.084393 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
847 22:15:58.088689 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
848 22:15:58.091155 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
849 22:15:58.097742 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
850 22:15:58.100978 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
851 22:15:58.104932 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
852 22:15:58.111264 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
853 22:15:58.115041 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
854 22:15:58.117852 Total UI for P1: 0, mck2ui 16
855 22:15:58.121857 best dqsien dly found for B0: ( 0, 14, 8)
856 22:15:58.124498 Total UI for P1: 0, mck2ui 16
857 22:15:58.127810 best dqsien dly found for B1: ( 0, 14, 8)
858 22:15:58.131329 best DQS0 dly(MCK, UI, PI) = (0, 14, 8)
859 22:15:58.134378 best DQS1 dly(MCK, UI, PI) = (0, 14, 8)
860 22:15:58.134965
861 22:15:58.137682 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)
862 22:15:58.141253 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 8)
863 22:15:58.144667 [Gating] SW calibration Done
864 22:15:58.145250 ==
865 22:15:58.147390 Dram Type= 6, Freq= 0, CH_0, rank 0
866 22:15:58.151800 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
867 22:15:58.154889 ==
868 22:15:58.155511 RX Vref Scan: 0
869 22:15:58.155895
870 22:15:58.156246 RX Vref 0 -> 0, step: 1
871 22:15:58.158315
872 22:15:58.158910 RX Delay -130 -> 252, step: 16
873 22:15:58.165725 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
874 22:15:58.168424 iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240
875 22:15:58.171634 iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240
876 22:15:58.175030 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
877 22:15:58.178017 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
878 22:15:58.184535 iDelay=222, Bit 5, Center 77 (-34 ~ 189) 224
879 22:15:58.187906 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
880 22:15:58.191199 iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224
881 22:15:58.194704 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
882 22:15:58.198116 iDelay=222, Bit 9, Center 61 (-50 ~ 173) 224
883 22:15:58.204324 iDelay=222, Bit 10, Center 77 (-34 ~ 189) 224
884 22:15:58.207690 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
885 22:15:58.212171 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
886 22:15:58.215129 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
887 22:15:58.218098 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
888 22:15:58.224996 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
889 22:15:58.225580 ==
890 22:15:58.228049 Dram Type= 6, Freq= 0, CH_0, rank 0
891 22:15:58.231299 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
892 22:15:58.231839 ==
893 22:15:58.232190 DQS Delay:
894 22:15:58.234799 DQS0 = 0, DQS1 = 0
895 22:15:58.235379 DQM Delay:
896 22:15:58.238195 DQM0 = 88, DQM1 = 77
897 22:15:58.238741 DQ Delay:
898 22:15:58.241404 DQ0 =85, DQ1 =85, DQ2 =85, DQ3 =85
899 22:15:58.244506 DQ4 =93, DQ5 =77, DQ6 =101, DQ7 =93
900 22:15:58.247523 DQ8 =69, DQ9 =61, DQ10 =77, DQ11 =69
901 22:15:58.251128 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
902 22:15:58.251700
903 22:15:58.252049
904 22:15:58.252365 ==
905 22:15:58.254522 Dram Type= 6, Freq= 0, CH_0, rank 0
906 22:15:58.257461 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
907 22:15:58.260651 ==
908 22:15:58.261083
909 22:15:58.261421
910 22:15:58.261738 TX Vref Scan disable
911 22:15:58.264583 == TX Byte 0 ==
912 22:15:58.267599 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
913 22:15:58.271769 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
914 22:15:58.274933 == TX Byte 1 ==
915 22:15:58.277693 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
916 22:15:58.281147 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
917 22:15:58.283912 ==
918 22:15:58.287992 Dram Type= 6, Freq= 0, CH_0, rank 0
919 22:15:58.291379 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
920 22:15:58.291957 ==
921 22:15:58.303059 TX Vref=22, minBit 1, minWin=26, winSum=436
922 22:15:58.306212 TX Vref=24, minBit 0, minWin=27, winSum=439
923 22:15:58.309948 TX Vref=26, minBit 1, minWin=27, winSum=443
924 22:15:58.312778 TX Vref=28, minBit 0, minWin=27, winSum=448
925 22:15:58.316141 TX Vref=30, minBit 2, minWin=27, winSum=452
926 22:15:58.322708 TX Vref=32, minBit 2, minWin=27, winSum=448
927 22:15:58.326676 [TxChooseVref] Worse bit 2, Min win 27, Win sum 452, Final Vref 30
928 22:15:58.327237
929 22:15:58.329829 Final TX Range 1 Vref 30
930 22:15:58.330369
931 22:15:58.330716 ==
932 22:15:58.332982 Dram Type= 6, Freq= 0, CH_0, rank 0
933 22:15:58.337640 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
934 22:15:58.338192 ==
935 22:15:58.339480
936 22:15:58.339908
937 22:15:58.340247 TX Vref Scan disable
938 22:15:58.343746 == TX Byte 0 ==
939 22:15:58.346656 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
940 22:15:58.349503 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
941 22:15:58.353302 == TX Byte 1 ==
942 22:15:58.356277 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
943 22:15:58.359923 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
944 22:15:58.363562
945 22:15:58.364116 [DATLAT]
946 22:15:58.364461 Freq=800, CH0 RK0
947 22:15:58.364782
948 22:15:58.366703 DATLAT Default: 0xa
949 22:15:58.367268 0, 0xFFFF, sum = 0
950 22:15:58.369975 1, 0xFFFF, sum = 0
951 22:15:58.370541 2, 0xFFFF, sum = 0
952 22:15:58.373154 3, 0xFFFF, sum = 0
953 22:15:58.373705 4, 0xFFFF, sum = 0
954 22:15:58.376558 5, 0xFFFF, sum = 0
955 22:15:58.380007 6, 0xFFFF, sum = 0
956 22:15:58.380556 7, 0xFFFF, sum = 0
957 22:15:58.382717 8, 0xFFFF, sum = 0
958 22:15:58.383223 9, 0x0, sum = 1
959 22:15:58.383584 10, 0x0, sum = 2
960 22:15:58.386082 11, 0x0, sum = 3
961 22:15:58.386513 12, 0x0, sum = 4
962 22:15:58.389654 best_step = 10
963 22:15:58.390210
964 22:15:58.390552 ==
965 22:15:58.392652 Dram Type= 6, Freq= 0, CH_0, rank 0
966 22:15:58.395938 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
967 22:15:58.396368 ==
968 22:15:58.399566 RX Vref Scan: 1
969 22:15:58.400098
970 22:15:58.400439 Set Vref Range= 32 -> 127
971 22:15:58.402983
972 22:15:58.403481 RX Vref 32 -> 127, step: 1
973 22:15:58.403829
974 22:15:58.405873 RX Delay -95 -> 252, step: 8
975 22:15:58.406300
976 22:15:58.409020 Set Vref, RX VrefLevel [Byte0]: 32
977 22:15:58.413117 [Byte1]: 32
978 22:15:58.413541
979 22:15:58.416502 Set Vref, RX VrefLevel [Byte0]: 33
980 22:15:58.419240 [Byte1]: 33
981 22:15:58.422971
982 22:15:58.423446 Set Vref, RX VrefLevel [Byte0]: 34
983 22:15:58.426652 [Byte1]: 34
984 22:15:58.431546
985 22:15:58.432084 Set Vref, RX VrefLevel [Byte0]: 35
986 22:15:58.434240 [Byte1]: 35
987 22:15:58.438676
988 22:15:58.439253 Set Vref, RX VrefLevel [Byte0]: 36
989 22:15:58.442140 [Byte1]: 36
990 22:15:58.446599
991 22:15:58.447246 Set Vref, RX VrefLevel [Byte0]: 37
992 22:15:58.449928 [Byte1]: 37
993 22:15:58.454149
994 22:15:58.454676 Set Vref, RX VrefLevel [Byte0]: 38
995 22:15:58.457425 [Byte1]: 38
996 22:15:58.461636
997 22:15:58.462062 Set Vref, RX VrefLevel [Byte0]: 39
998 22:15:58.464493 [Byte1]: 39
999 22:15:58.469111
1000 22:15:58.469544 Set Vref, RX VrefLevel [Byte0]: 40
1001 22:15:58.472470 [Byte1]: 40
1002 22:15:58.476945
1003 22:15:58.477479 Set Vref, RX VrefLevel [Byte0]: 41
1004 22:15:58.480381 [Byte1]: 41
1005 22:15:58.484330
1006 22:15:58.484760 Set Vref, RX VrefLevel [Byte0]: 42
1007 22:15:58.487424 [Byte1]: 42
1008 22:15:58.491267
1009 22:15:58.494775 Set Vref, RX VrefLevel [Byte0]: 43
1010 22:15:58.495242 [Byte1]: 43
1011 22:15:58.499353
1012 22:15:58.499887 Set Vref, RX VrefLevel [Byte0]: 44
1013 22:15:58.502710 [Byte1]: 44
1014 22:15:58.507020
1015 22:15:58.507612 Set Vref, RX VrefLevel [Byte0]: 45
1016 22:15:58.509762 [Byte1]: 45
1017 22:15:58.514253
1018 22:15:58.514680 Set Vref, RX VrefLevel [Byte0]: 46
1019 22:15:58.517468 [Byte1]: 46
1020 22:15:58.522171
1021 22:15:58.522596 Set Vref, RX VrefLevel [Byte0]: 47
1022 22:15:58.525654 [Byte1]: 47
1023 22:15:58.529760
1024 22:15:58.530305 Set Vref, RX VrefLevel [Byte0]: 48
1025 22:15:58.532824 [Byte1]: 48
1026 22:15:58.537427
1027 22:15:58.537961 Set Vref, RX VrefLevel [Byte0]: 49
1028 22:15:58.540279 [Byte1]: 49
1029 22:15:58.544969
1030 22:15:58.545504 Set Vref, RX VrefLevel [Byte0]: 50
1031 22:15:58.548027 [Byte1]: 50
1032 22:15:58.552451
1033 22:15:58.553007 Set Vref, RX VrefLevel [Byte0]: 51
1034 22:15:58.556064 [Byte1]: 51
1035 22:15:58.559984
1036 22:15:58.560517 Set Vref, RX VrefLevel [Byte0]: 52
1037 22:15:58.563094 [Byte1]: 52
1038 22:15:58.568082
1039 22:15:58.568675 Set Vref, RX VrefLevel [Byte0]: 53
1040 22:15:58.570988 [Byte1]: 53
1041 22:15:58.575109
1042 22:15:58.575665 Set Vref, RX VrefLevel [Byte0]: 54
1043 22:15:58.578309 [Byte1]: 54
1044 22:15:58.584016
1045 22:15:58.584531 Set Vref, RX VrefLevel [Byte0]: 55
1046 22:15:58.586193 [Byte1]: 55
1047 22:15:58.590567
1048 22:15:58.593445 Set Vref, RX VrefLevel [Byte0]: 56
1049 22:15:58.596857 [Byte1]: 56
1050 22:15:58.597440
1051 22:15:58.600355 Set Vref, RX VrefLevel [Byte0]: 57
1052 22:15:58.603831 [Byte1]: 57
1053 22:15:58.604263
1054 22:15:58.606897 Set Vref, RX VrefLevel [Byte0]: 58
1055 22:15:58.610257 [Byte1]: 58
1056 22:15:58.610786
1057 22:15:58.613134 Set Vref, RX VrefLevel [Byte0]: 59
1058 22:15:58.616779 [Byte1]: 59
1059 22:15:58.621044
1060 22:15:58.621483 Set Vref, RX VrefLevel [Byte0]: 60
1061 22:15:58.624283 [Byte1]: 60
1062 22:15:58.627959
1063 22:15:58.628385 Set Vref, RX VrefLevel [Byte0]: 61
1064 22:15:58.631709 [Byte1]: 61
1065 22:15:58.635918
1066 22:15:58.636581 Set Vref, RX VrefLevel [Byte0]: 62
1067 22:15:58.639272 [Byte1]: 62
1068 22:15:58.643634
1069 22:15:58.644174 Set Vref, RX VrefLevel [Byte0]: 63
1070 22:15:58.647079 [Byte1]: 63
1071 22:15:58.651303
1072 22:15:58.651820 Set Vref, RX VrefLevel [Byte0]: 64
1073 22:15:58.654575 [Byte1]: 64
1074 22:15:58.658955
1075 22:15:58.659526 Set Vref, RX VrefLevel [Byte0]: 65
1076 22:15:58.661762 [Byte1]: 65
1077 22:15:58.666165
1078 22:15:58.666689 Set Vref, RX VrefLevel [Byte0]: 66
1079 22:15:58.669147 [Byte1]: 66
1080 22:15:58.674037
1081 22:15:58.674555 Set Vref, RX VrefLevel [Byte0]: 67
1082 22:15:58.677277 [Byte1]: 67
1083 22:15:58.681286
1084 22:15:58.681811 Set Vref, RX VrefLevel [Byte0]: 68
1085 22:15:58.684642 [Byte1]: 68
1086 22:15:58.689171
1087 22:15:58.689690 Set Vref, RX VrefLevel [Byte0]: 69
1088 22:15:58.692305 [Byte1]: 69
1089 22:15:58.697293
1090 22:15:58.697820 Set Vref, RX VrefLevel [Byte0]: 70
1091 22:15:58.699833 [Byte1]: 70
1092 22:15:58.704269
1093 22:15:58.704792 Set Vref, RX VrefLevel [Byte0]: 71
1094 22:15:58.707443 [Byte1]: 71
1095 22:15:58.711929
1096 22:15:58.712525 Set Vref, RX VrefLevel [Byte0]: 72
1097 22:15:58.715810 [Byte1]: 72
1098 22:15:58.719298
1099 22:15:58.719838 Final RX Vref Byte 0 = 52 to rank0
1100 22:15:58.722969 Final RX Vref Byte 1 = 60 to rank0
1101 22:15:58.725741 Final RX Vref Byte 0 = 52 to rank1
1102 22:15:58.730047 Final RX Vref Byte 1 = 60 to rank1==
1103 22:15:58.733478 Dram Type= 6, Freq= 0, CH_0, rank 0
1104 22:15:58.739257 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1105 22:15:58.739765 ==
1106 22:15:58.740097 DQS Delay:
1107 22:15:58.740462 DQS0 = 0, DQS1 = 0
1108 22:15:58.742529 DQM Delay:
1109 22:15:58.742948 DQM0 = 88, DQM1 = 76
1110 22:15:58.746241 DQ Delay:
1111 22:15:58.749278 DQ0 =88, DQ1 =88, DQ2 =84, DQ3 =88
1112 22:15:58.749750 DQ4 =88, DQ5 =80, DQ6 =96, DQ7 =96
1113 22:15:58.752425 DQ8 =64, DQ9 =60, DQ10 =76, DQ11 =72
1114 22:15:58.759393 DQ12 =84, DQ13 =84, DQ14 =84, DQ15 =84
1115 22:15:58.759941
1116 22:15:58.760280
1117 22:15:58.766716 [DQSOSCAuto] RK0, (LSB)MR18= 0x2d26, (MSB)MR19= 0x606, tDQSOscB0 = 400 ps tDQSOscB1 = 398 ps
1118 22:15:58.769502 CH0 RK0: MR19=606, MR18=2D26
1119 22:15:58.775875 CH0_RK0: MR19=0x606, MR18=0x2D26, DQSOSC=398, MR23=63, INC=93, DEC=62
1120 22:15:58.776400
1121 22:15:58.779836 ----->DramcWriteLeveling(PI) begin...
1122 22:15:58.780261 ==
1123 22:15:58.782573 Dram Type= 6, Freq= 0, CH_0, rank 1
1124 22:15:58.786070 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1125 22:15:58.786503 ==
1126 22:15:58.789543 Write leveling (Byte 0): 31 => 31
1127 22:15:58.792326 Write leveling (Byte 1): 25 => 25
1128 22:15:58.795928 DramcWriteLeveling(PI) end<-----
1129 22:15:58.796353
1130 22:15:58.796684 ==
1131 22:15:58.799016 Dram Type= 6, Freq= 0, CH_0, rank 1
1132 22:15:58.802555 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1133 22:15:58.803089 ==
1134 22:15:58.806248 [Gating] SW mode calibration
1135 22:15:58.812797 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1136 22:15:58.819322 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1137 22:15:58.822746 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1138 22:15:58.825863 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1139 22:15:58.832456 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
1140 22:15:58.836265 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1141 22:15:58.839354 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1142 22:15:58.886492 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1143 22:15:58.887071 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1144 22:15:58.887532 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1145 22:15:58.888227 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1146 22:15:58.888598 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1147 22:15:58.888940 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1148 22:15:58.889270 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1149 22:15:58.889592 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1150 22:15:58.889980 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1151 22:15:58.890317 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1152 22:15:58.930892 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1153 22:15:58.931523 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1154 22:15:58.931909 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 1) (1 0)
1155 22:15:58.932597 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
1156 22:15:58.932966 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1157 22:15:58.933305 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1158 22:15:58.933637 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1159 22:15:58.933954 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1160 22:15:58.934274 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1161 22:15:58.934656 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1162 22:15:58.951274 0 9 4 | B1->B0 | 2323 2323 | 0 1 | (0 0) (1 1)
1163 22:15:58.952045 0 9 8 | B1->B0 | 2323 3434 | 0 0 | (0 0) (0 0)
1164 22:15:58.952443 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1165 22:15:58.953128 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1166 22:15:58.954450 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1167 22:15:58.957907 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1168 22:15:58.958340 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1169 22:15:58.964756 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1170 22:15:58.968016 0 10 4 | B1->B0 | 3434 3030 | 1 1 | (1 1) (1 0)
1171 22:15:58.971536 0 10 8 | B1->B0 | 2f2f 2323 | 0 0 | (0 0) (0 0)
1172 22:15:58.978793 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1173 22:15:58.981566 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1174 22:15:58.984530 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1175 22:15:58.991480 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1176 22:15:58.994835 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1177 22:15:58.998264 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1178 22:15:59.001419 0 11 4 | B1->B0 | 2323 3333 | 0 0 | (0 0) (0 0)
1179 22:15:59.008101 0 11 8 | B1->B0 | 3232 4545 | 1 0 | (0 0) (0 0)
1180 22:15:59.011321 0 11 12 | B1->B0 | 4343 4646 | 1 0 | (0 0) (0 0)
1181 22:15:59.014442 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1182 22:15:59.021294 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1183 22:15:59.024616 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1184 22:15:59.028058 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1185 22:15:59.035428 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1186 22:15:59.038743 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1187 22:15:59.042333 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1188 22:15:59.045557 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1189 22:15:59.052797 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1190 22:15:59.056850 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1191 22:15:59.059419 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1192 22:15:59.062851 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1193 22:15:59.069599 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1194 22:15:59.072743 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1195 22:15:59.076390 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1196 22:15:59.083525 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1197 22:15:59.085739 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1198 22:15:59.089933 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1199 22:15:59.095713 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1200 22:15:59.099357 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1201 22:15:59.102559 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1202 22:15:59.109744 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
1203 22:15:59.112989 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
1204 22:15:59.116047 Total UI for P1: 0, mck2ui 16
1205 22:15:59.119426 best dqsien dly found for B0: ( 0, 14, 4)
1206 22:15:59.122444 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1207 22:15:59.126213 Total UI for P1: 0, mck2ui 16
1208 22:15:59.129066 best dqsien dly found for B1: ( 0, 14, 8)
1209 22:15:59.132589 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
1210 22:15:59.135778 best DQS1 dly(MCK, UI, PI) = (0, 14, 8)
1211 22:15:59.136297
1212 22:15:59.142565 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
1213 22:15:59.145421 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 8)
1214 22:15:59.145944 [Gating] SW calibration Done
1215 22:15:59.148680 ==
1216 22:15:59.152292 Dram Type= 6, Freq= 0, CH_0, rank 1
1217 22:15:59.155370 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1218 22:15:59.155794 ==
1219 22:15:59.156127 RX Vref Scan: 0
1220 22:15:59.156441
1221 22:15:59.159406 RX Vref 0 -> 0, step: 1
1222 22:15:59.159929
1223 22:15:59.162779 RX Delay -130 -> 252, step: 16
1224 22:15:59.165859 iDelay=206, Bit 0, Center 85 (-34 ~ 205) 240
1225 22:15:59.168678 iDelay=206, Bit 1, Center 85 (-34 ~ 205) 240
1226 22:15:59.175599 iDelay=206, Bit 2, Center 85 (-34 ~ 205) 240
1227 22:15:59.179227 iDelay=206, Bit 3, Center 85 (-34 ~ 205) 240
1228 22:15:59.182712 iDelay=206, Bit 4, Center 93 (-18 ~ 205) 224
1229 22:15:59.186225 iDelay=206, Bit 5, Center 77 (-34 ~ 189) 224
1230 22:15:59.188850 iDelay=206, Bit 6, Center 93 (-18 ~ 205) 224
1231 22:15:59.192324 iDelay=206, Bit 7, Center 93 (-18 ~ 205) 224
1232 22:15:59.199121 iDelay=206, Bit 8, Center 69 (-50 ~ 189) 240
1233 22:15:59.202183 iDelay=206, Bit 9, Center 61 (-50 ~ 173) 224
1234 22:15:59.205756 iDelay=206, Bit 10, Center 77 (-34 ~ 189) 224
1235 22:15:59.208906 iDelay=206, Bit 11, Center 69 (-50 ~ 189) 240
1236 22:15:59.215310 iDelay=206, Bit 12, Center 85 (-34 ~ 205) 240
1237 22:15:59.218912 iDelay=206, Bit 13, Center 85 (-34 ~ 205) 240
1238 22:15:59.222320 iDelay=206, Bit 14, Center 85 (-34 ~ 205) 240
1239 22:15:59.225200 iDelay=206, Bit 15, Center 85 (-34 ~ 205) 240
1240 22:15:59.225680 ==
1241 22:15:59.228991 Dram Type= 6, Freq= 0, CH_0, rank 1
1242 22:15:59.235635 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1243 22:15:59.236213 ==
1244 22:15:59.236587 DQS Delay:
1245 22:15:59.236933 DQS0 = 0, DQS1 = 0
1246 22:15:59.238467 DQM Delay:
1247 22:15:59.239003 DQM0 = 87, DQM1 = 77
1248 22:15:59.242505 DQ Delay:
1249 22:15:59.245188 DQ0 =85, DQ1 =85, DQ2 =85, DQ3 =85
1250 22:15:59.245763 DQ4 =93, DQ5 =77, DQ6 =93, DQ7 =93
1251 22:15:59.248617 DQ8 =69, DQ9 =61, DQ10 =77, DQ11 =69
1252 22:15:59.255147 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1253 22:15:59.255644
1254 22:15:59.255978
1255 22:15:59.256294 ==
1256 22:15:59.258053 Dram Type= 6, Freq= 0, CH_0, rank 1
1257 22:15:59.261729 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1258 22:15:59.262155 ==
1259 22:15:59.262495
1260 22:15:59.262809
1261 22:15:59.264771 TX Vref Scan disable
1262 22:15:59.265194 == TX Byte 0 ==
1263 22:15:59.271671 Update DQ dly =582 (2 ,1, 38) DQ OEN =(1 ,6)
1264 22:15:59.275047 Update DQM dly =582 (2 ,1, 38) DQM OEN =(1 ,6)
1265 22:15:59.275644 == TX Byte 1 ==
1266 22:15:59.281788 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
1267 22:15:59.285063 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
1268 22:15:59.285627 ==
1269 22:15:59.287940 Dram Type= 6, Freq= 0, CH_0, rank 1
1270 22:15:59.291618 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1271 22:15:59.292161 ==
1272 22:15:59.306210 TX Vref=22, minBit 1, minWin=27, winSum=442
1273 22:15:59.309160 TX Vref=24, minBit 1, minWin=27, winSum=442
1274 22:15:59.312838 TX Vref=26, minBit 1, minWin=27, winSum=448
1275 22:15:59.316175 TX Vref=28, minBit 0, minWin=28, winSum=452
1276 22:15:59.319615 TX Vref=30, minBit 1, minWin=27, winSum=449
1277 22:15:59.326138 TX Vref=32, minBit 6, minWin=27, winSum=452
1278 22:15:59.329356 [TxChooseVref] Worse bit 0, Min win 28, Win sum 452, Final Vref 28
1279 22:15:59.329936
1280 22:15:59.333021 Final TX Range 1 Vref 28
1281 22:15:59.333597
1282 22:15:59.333975 ==
1283 22:15:59.335806 Dram Type= 6, Freq= 0, CH_0, rank 1
1284 22:15:59.339616 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1285 22:15:59.340193 ==
1286 22:15:59.342550
1287 22:15:59.343123
1288 22:15:59.343550 TX Vref Scan disable
1289 22:15:59.346398 == TX Byte 0 ==
1290 22:15:59.349877 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1291 22:15:59.356074 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1292 22:15:59.356655 == TX Byte 1 ==
1293 22:15:59.359642 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
1294 22:15:59.365748 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
1295 22:15:59.366287
1296 22:15:59.366665 [DATLAT]
1297 22:15:59.366976 Freq=800, CH0 RK1
1298 22:15:59.367322
1299 22:15:59.369854 DATLAT Default: 0xa
1300 22:15:59.370444 0, 0xFFFF, sum = 0
1301 22:15:59.372782 1, 0xFFFF, sum = 0
1302 22:15:59.373208 2, 0xFFFF, sum = 0
1303 22:15:59.376039 3, 0xFFFF, sum = 0
1304 22:15:59.379023 4, 0xFFFF, sum = 0
1305 22:15:59.379477 5, 0xFFFF, sum = 0
1306 22:15:59.382331 6, 0xFFFF, sum = 0
1307 22:15:59.382754 7, 0xFFFF, sum = 0
1308 22:15:59.385711 8, 0xFFFF, sum = 0
1309 22:15:59.386134 9, 0x0, sum = 1
1310 22:15:59.389525 10, 0x0, sum = 2
1311 22:15:59.390120 11, 0x0, sum = 3
1312 22:15:59.390480 12, 0x0, sum = 4
1313 22:15:59.392745 best_step = 10
1314 22:15:59.393254
1315 22:15:59.393599 ==
1316 22:15:59.395750 Dram Type= 6, Freq= 0, CH_0, rank 1
1317 22:15:59.399356 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1318 22:15:59.399782 ==
1319 22:15:59.402473 RX Vref Scan: 0
1320 22:15:59.403083
1321 22:15:59.403529 RX Vref 0 -> 0, step: 1
1322 22:15:59.405427
1323 22:15:59.405917 RX Delay -95 -> 252, step: 8
1324 22:15:59.412754 iDelay=209, Bit 0, Center 84 (-23 ~ 192) 216
1325 22:15:59.416248 iDelay=209, Bit 1, Center 88 (-23 ~ 200) 224
1326 22:15:59.419774 iDelay=209, Bit 2, Center 80 (-31 ~ 192) 224
1327 22:15:59.422300 iDelay=209, Bit 3, Center 84 (-23 ~ 192) 216
1328 22:15:59.426014 iDelay=209, Bit 4, Center 88 (-23 ~ 200) 224
1329 22:15:59.432394 iDelay=209, Bit 5, Center 80 (-31 ~ 192) 224
1330 22:15:59.435682 iDelay=209, Bit 6, Center 96 (-15 ~ 208) 224
1331 22:15:59.439275 iDelay=209, Bit 7, Center 92 (-15 ~ 200) 216
1332 22:15:59.442473 iDelay=209, Bit 8, Center 64 (-47 ~ 176) 224
1333 22:15:59.449443 iDelay=209, Bit 9, Center 64 (-47 ~ 176) 224
1334 22:15:59.452675 iDelay=209, Bit 10, Center 80 (-31 ~ 192) 224
1335 22:15:59.455652 iDelay=209, Bit 11, Center 72 (-39 ~ 184) 224
1336 22:15:59.459074 iDelay=209, Bit 12, Center 84 (-23 ~ 192) 216
1337 22:15:59.462219 iDelay=209, Bit 13, Center 80 (-31 ~ 192) 224
1338 22:15:59.469017 iDelay=209, Bit 14, Center 88 (-23 ~ 200) 224
1339 22:15:59.472197 iDelay=209, Bit 15, Center 84 (-31 ~ 200) 232
1340 22:15:59.472615 ==
1341 22:15:59.475226 Dram Type= 6, Freq= 0, CH_0, rank 1
1342 22:15:59.478911 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1343 22:15:59.479467 ==
1344 22:15:59.482066 DQS Delay:
1345 22:15:59.482572 DQS0 = 0, DQS1 = 0
1346 22:15:59.482901 DQM Delay:
1347 22:15:59.485398 DQM0 = 86, DQM1 = 77
1348 22:15:59.485912 DQ Delay:
1349 22:15:59.488325 DQ0 =84, DQ1 =88, DQ2 =80, DQ3 =84
1350 22:15:59.491847 DQ4 =88, DQ5 =80, DQ6 =96, DQ7 =92
1351 22:15:59.495134 DQ8 =64, DQ9 =64, DQ10 =80, DQ11 =72
1352 22:15:59.498815 DQ12 =84, DQ13 =80, DQ14 =88, DQ15 =84
1353 22:15:59.499387
1354 22:15:59.499724
1355 22:15:59.508826 [DQSOSCAuto] RK1, (LSB)MR18= 0x2a26, (MSB)MR19= 0x606, tDQSOscB0 = 400 ps tDQSOscB1 = 399 ps
1356 22:15:59.511662 CH0 RK1: MR19=606, MR18=2A26
1357 22:15:59.515912 CH0_RK1: MR19=0x606, MR18=0x2A26, DQSOSC=399, MR23=63, INC=92, DEC=61
1358 22:15:59.518386 [RxdqsGatingPostProcess] freq 800
1359 22:15:59.525046 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1360 22:15:59.528200 Pre-setting of DQS Precalculation
1361 22:15:59.531621 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
1362 22:15:59.534989 ==
1363 22:15:59.535596 Dram Type= 6, Freq= 0, CH_1, rank 0
1364 22:15:59.541748 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1365 22:15:59.542306 ==
1366 22:15:59.544802 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1367 22:15:59.551399 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1368 22:15:59.561163 [CA 0] Center 36 (6~67) winsize 62
1369 22:15:59.564827 [CA 1] Center 37 (6~68) winsize 63
1370 22:15:59.567820 [CA 2] Center 35 (5~65) winsize 61
1371 22:15:59.572246 [CA 3] Center 34 (4~65) winsize 62
1372 22:15:59.574602 [CA 4] Center 34 (4~65) winsize 62
1373 22:15:59.577923 [CA 5] Center 34 (3~65) winsize 63
1374 22:15:59.578474
1375 22:15:59.581522 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1376 22:15:59.582072
1377 22:15:59.584523 [CATrainingPosCal] consider 1 rank data
1378 22:15:59.588107 u2DelayCellTimex100 = 270/100 ps
1379 22:15:59.590742 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1380 22:15:59.597842 CA1 delay=37 (6~68),Diff = 3 PI (21 cell)
1381 22:15:59.600980 CA2 delay=35 (5~65),Diff = 1 PI (7 cell)
1382 22:15:59.604205 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
1383 22:15:59.607857 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1384 22:15:59.611037 CA5 delay=34 (3~65),Diff = 0 PI (0 cell)
1385 22:15:59.611727
1386 22:15:59.614192 CA PerBit enable=1, Macro0, CA PI delay=34
1387 22:15:59.614742
1388 22:15:59.617555 [CBTSetCACLKResult] CA Dly = 34
1389 22:15:59.618107 CS Dly: 4 (0~35)
1390 22:15:59.620646 ==
1391 22:15:59.624246 Dram Type= 6, Freq= 0, CH_1, rank 1
1392 22:15:59.627693 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1393 22:15:59.628105 ==
1394 22:15:59.630998 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1395 22:15:59.637677 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1396 22:15:59.647346 [CA 0] Center 36 (6~67) winsize 62
1397 22:15:59.650627 [CA 1] Center 36 (6~67) winsize 62
1398 22:15:59.653934 [CA 2] Center 34 (4~65) winsize 62
1399 22:15:59.657594 [CA 3] Center 34 (3~65) winsize 63
1400 22:15:59.660581 [CA 4] Center 34 (4~65) winsize 62
1401 22:15:59.663815 [CA 5] Center 34 (3~65) winsize 63
1402 22:15:59.664349
1403 22:15:59.667553 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1404 22:15:59.668118
1405 22:15:59.670671 [CATrainingPosCal] consider 2 rank data
1406 22:15:59.673832 u2DelayCellTimex100 = 270/100 ps
1407 22:15:59.677360 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1408 22:15:59.684007 CA1 delay=36 (6~67),Diff = 2 PI (14 cell)
1409 22:15:59.687856 CA2 delay=35 (5~65),Diff = 1 PI (7 cell)
1410 22:15:59.690162 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
1411 22:15:59.694511 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1412 22:15:59.697688 CA5 delay=34 (3~65),Diff = 0 PI (0 cell)
1413 22:15:59.698165
1414 22:15:59.701620 CA PerBit enable=1, Macro0, CA PI delay=34
1415 22:15:59.702212
1416 22:15:59.705613 [CBTSetCACLKResult] CA Dly = 34
1417 22:15:59.706079 CS Dly: 5 (0~38)
1418 22:15:59.706447
1419 22:15:59.709318 ----->DramcWriteLeveling(PI) begin...
1420 22:15:59.709939 ==
1421 22:15:59.712225 Dram Type= 6, Freq= 0, CH_1, rank 0
1422 22:15:59.716740 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1423 22:15:59.717163 ==
1424 22:15:59.719720 Write leveling (Byte 0): 28 => 28
1425 22:15:59.723688 Write leveling (Byte 1): 28 => 28
1426 22:15:59.727619 DramcWriteLeveling(PI) end<-----
1427 22:15:59.728040
1428 22:15:59.728371 ==
1429 22:15:59.730638 Dram Type= 6, Freq= 0, CH_1, rank 0
1430 22:15:59.733896 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1431 22:15:59.734436 ==
1432 22:15:59.737387 [Gating] SW mode calibration
1433 22:15:59.744180 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1434 22:15:59.750274 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1435 22:15:59.753967 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1436 22:15:59.757100 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1437 22:15:59.761092 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1438 22:15:59.766879 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1439 22:15:59.770152 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1440 22:15:59.773960 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1441 22:15:59.780597 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1442 22:15:59.783856 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1443 22:15:59.787084 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1444 22:15:59.793787 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1445 22:15:59.797508 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1446 22:15:59.800255 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1447 22:15:59.806948 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1448 22:15:59.810197 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1449 22:15:59.813552 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1450 22:15:59.820208 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1451 22:15:59.823558 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1452 22:15:59.827252 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 1)
1453 22:15:59.834120 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)
1454 22:15:59.837331 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1455 22:15:59.839900 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1456 22:15:59.846764 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1457 22:15:59.850079 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1458 22:15:59.853161 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1459 22:15:59.860120 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1460 22:15:59.862804 0 9 4 | B1->B0 | 2323 2323 | 0 1 | (0 0) (1 1)
1461 22:15:59.866574 0 9 8 | B1->B0 | 3131 3434 | 1 1 | (1 1) (1 1)
1462 22:15:59.872997 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1463 22:15:59.877528 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1464 22:15:59.879551 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1465 22:15:59.886573 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1466 22:15:59.889423 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1467 22:15:59.893377 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1468 22:15:59.900495 0 10 4 | B1->B0 | 3232 3232 | 0 0 | (0 1) (0 1)
1469 22:15:59.903460 0 10 8 | B1->B0 | 2c2c 2424 | 1 1 | (1 0) (1 0)
1470 22:15:59.906424 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1471 22:15:59.913045 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1472 22:15:59.916266 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1473 22:15:59.919749 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1474 22:15:59.926289 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1475 22:15:59.929962 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1476 22:15:59.933722 0 11 4 | B1->B0 | 2525 2c2c | 0 0 | (0 0) (0 0)
1477 22:15:59.935700 0 11 8 | B1->B0 | 3d3d 4646 | 0 0 | (0 0) (0 0)
1478 22:15:59.943072 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1479 22:15:59.945994 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1480 22:15:59.949502 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1481 22:15:59.955714 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1482 22:15:59.959286 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1483 22:15:59.962671 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1484 22:15:59.969406 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1485 22:15:59.972831 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1486 22:15:59.976138 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1487 22:15:59.982530 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1488 22:15:59.986072 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1489 22:15:59.989022 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1490 22:15:59.995504 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1491 22:15:59.999213 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1492 22:16:00.002708 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1493 22:16:00.009308 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1494 22:16:00.012475 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1495 22:16:00.015490 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1496 22:16:00.022298 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1497 22:16:00.025960 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1498 22:16:00.029086 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1499 22:16:00.035599 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1500 22:16:00.039423 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1501 22:16:00.042514 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1502 22:16:00.045837 Total UI for P1: 0, mck2ui 16
1503 22:16:00.048717 best dqsien dly found for B0: ( 0, 14, 4)
1504 22:16:00.052122 Total UI for P1: 0, mck2ui 16
1505 22:16:00.055429 best dqsien dly found for B1: ( 0, 14, 4)
1506 22:16:00.058989 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
1507 22:16:00.062222 best DQS1 dly(MCK, UI, PI) = (0, 14, 4)
1508 22:16:00.062768
1509 22:16:00.065171 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
1510 22:16:00.072315 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 4)
1511 22:16:00.072866 [Gating] SW calibration Done
1512 22:16:00.073317 ==
1513 22:16:00.075167 Dram Type= 6, Freq= 0, CH_1, rank 0
1514 22:16:00.082265 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1515 22:16:00.082838 ==
1516 22:16:00.083386 RX Vref Scan: 0
1517 22:16:00.083851
1518 22:16:00.085739 RX Vref 0 -> 0, step: 1
1519 22:16:00.086285
1520 22:16:00.088662 RX Delay -130 -> 252, step: 16
1521 22:16:00.091709 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1522 22:16:00.094979 iDelay=222, Bit 1, Center 77 (-50 ~ 205) 256
1523 22:16:00.098605 iDelay=222, Bit 2, Center 69 (-50 ~ 189) 240
1524 22:16:00.105011 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
1525 22:16:00.107975 iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240
1526 22:16:00.111568 iDelay=222, Bit 5, Center 101 (-18 ~ 221) 240
1527 22:16:00.114633 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1528 22:16:00.121933 iDelay=222, Bit 7, Center 77 (-50 ~ 205) 256
1529 22:16:00.124961 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
1530 22:16:00.127865 iDelay=222, Bit 9, Center 69 (-50 ~ 189) 240
1531 22:16:00.132120 iDelay=222, Bit 10, Center 85 (-34 ~ 205) 240
1532 22:16:00.134806 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
1533 22:16:00.141669 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1534 22:16:00.145408 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1535 22:16:00.148249 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
1536 22:16:00.151322 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1537 22:16:00.151762 ==
1538 22:16:00.154515 Dram Type= 6, Freq= 0, CH_1, rank 0
1539 22:16:00.161248 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1540 22:16:00.161780 ==
1541 22:16:00.162130 DQS Delay:
1542 22:16:00.162453 DQS0 = 0, DQS1 = 0
1543 22:16:00.164327 DQM Delay:
1544 22:16:00.164754 DQM0 = 86, DQM1 = 79
1545 22:16:00.168088 DQ Delay:
1546 22:16:00.171532 DQ0 =93, DQ1 =77, DQ2 =69, DQ3 =85
1547 22:16:00.174932 DQ4 =85, DQ5 =101, DQ6 =101, DQ7 =77
1548 22:16:00.178272 DQ8 =69, DQ9 =69, DQ10 =85, DQ11 =69
1549 22:16:00.181260 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1550 22:16:00.181693
1551 22:16:00.182036
1552 22:16:00.182352 ==
1553 22:16:00.185970 Dram Type= 6, Freq= 0, CH_1, rank 0
1554 22:16:00.188091 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1555 22:16:00.188525 ==
1556 22:16:00.188872
1557 22:16:00.189187
1558 22:16:00.191418 TX Vref Scan disable
1559 22:16:00.192006 == TX Byte 0 ==
1560 22:16:00.198346 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
1561 22:16:00.201580 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
1562 22:16:00.202120 == TX Byte 1 ==
1563 22:16:00.207854 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1564 22:16:00.211542 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1565 22:16:00.212078 ==
1566 22:16:00.214623 Dram Type= 6, Freq= 0, CH_1, rank 0
1567 22:16:00.217817 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1568 22:16:00.218248 ==
1569 22:16:00.231834 TX Vref=22, minBit 1, minWin=27, winSum=443
1570 22:16:00.235333 TX Vref=24, minBit 2, minWin=27, winSum=447
1571 22:16:00.238259 TX Vref=26, minBit 5, minWin=27, winSum=450
1572 22:16:00.242672 TX Vref=28, minBit 1, minWin=27, winSum=455
1573 22:16:00.245297 TX Vref=30, minBit 1, minWin=27, winSum=455
1574 22:16:00.251806 TX Vref=32, minBit 1, minWin=27, winSum=451
1575 22:16:00.255386 [TxChooseVref] Worse bit 1, Min win 27, Win sum 455, Final Vref 28
1576 22:16:00.255973
1577 22:16:00.258095 Final TX Range 1 Vref 28
1578 22:16:00.258563
1579 22:16:00.258962 ==
1580 22:16:00.261852 Dram Type= 6, Freq= 0, CH_1, rank 0
1581 22:16:00.265265 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1582 22:16:00.265909 ==
1583 22:16:00.268301
1584 22:16:00.268877
1585 22:16:00.269252 TX Vref Scan disable
1586 22:16:00.271623 == TX Byte 0 ==
1587 22:16:00.275623 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1588 22:16:00.278794 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1589 22:16:00.282103 == TX Byte 1 ==
1590 22:16:00.285641 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1591 22:16:00.289366 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1592 22:16:00.289933
1593 22:16:00.291665 [DATLAT]
1594 22:16:00.292155 Freq=800, CH1 RK0
1595 22:16:00.292698
1596 22:16:00.295368 DATLAT Default: 0xa
1597 22:16:00.295834 0, 0xFFFF, sum = 0
1598 22:16:00.298697 1, 0xFFFF, sum = 0
1599 22:16:00.299204 2, 0xFFFF, sum = 0
1600 22:16:00.301888 3, 0xFFFF, sum = 0
1601 22:16:00.302364 4, 0xFFFF, sum = 0
1602 22:16:00.305214 5, 0xFFFF, sum = 0
1603 22:16:00.305747 6, 0xFFFF, sum = 0
1604 22:16:00.308345 7, 0xFFFF, sum = 0
1605 22:16:00.308863 8, 0xFFFF, sum = 0
1606 22:16:00.311678 9, 0x0, sum = 1
1607 22:16:00.312206 10, 0x0, sum = 2
1608 22:16:00.314837 11, 0x0, sum = 3
1609 22:16:00.315308 12, 0x0, sum = 4
1610 22:16:00.318559 best_step = 10
1611 22:16:00.319079
1612 22:16:00.319487 ==
1613 22:16:00.321877 Dram Type= 6, Freq= 0, CH_1, rank 0
1614 22:16:00.325644 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1615 22:16:00.326172 ==
1616 22:16:00.328570 RX Vref Scan: 1
1617 22:16:00.329088
1618 22:16:00.329428 Set Vref Range= 32 -> 127
1619 22:16:00.329743
1620 22:16:00.332147 RX Vref 32 -> 127, step: 1
1621 22:16:00.332671
1622 22:16:00.334595 RX Delay -95 -> 252, step: 8
1623 22:16:00.335019
1624 22:16:00.338464 Set Vref, RX VrefLevel [Byte0]: 32
1625 22:16:00.341323 [Byte1]: 32
1626 22:16:00.341753
1627 22:16:00.344796 Set Vref, RX VrefLevel [Byte0]: 33
1628 22:16:00.348103 [Byte1]: 33
1629 22:16:00.351865
1630 22:16:00.352386 Set Vref, RX VrefLevel [Byte0]: 34
1631 22:16:00.355314 [Byte1]: 34
1632 22:16:00.359596
1633 22:16:00.360143 Set Vref, RX VrefLevel [Byte0]: 35
1634 22:16:00.363133 [Byte1]: 35
1635 22:16:00.367111
1636 22:16:00.367716 Set Vref, RX VrefLevel [Byte0]: 36
1637 22:16:00.371034 [Byte1]: 36
1638 22:16:00.374693
1639 22:16:00.375290 Set Vref, RX VrefLevel [Byte0]: 37
1640 22:16:00.378017 [Byte1]: 37
1641 22:16:00.384244
1642 22:16:00.384805 Set Vref, RX VrefLevel [Byte0]: 38
1643 22:16:00.385573 [Byte1]: 38
1644 22:16:00.389690
1645 22:16:00.390159 Set Vref, RX VrefLevel [Byte0]: 39
1646 22:16:00.393029 [Byte1]: 39
1647 22:16:00.397793
1648 22:16:00.398335 Set Vref, RX VrefLevel [Byte0]: 40
1649 22:16:00.400513 [Byte1]: 40
1650 22:16:00.405497
1651 22:16:00.406026 Set Vref, RX VrefLevel [Byte0]: 41
1652 22:16:00.407913 [Byte1]: 41
1653 22:16:00.412349
1654 22:16:00.412973 Set Vref, RX VrefLevel [Byte0]: 42
1655 22:16:00.415820 [Byte1]: 42
1656 22:16:00.420060
1657 22:16:00.420583 Set Vref, RX VrefLevel [Byte0]: 43
1658 22:16:00.423942 [Byte1]: 43
1659 22:16:00.428046
1660 22:16:00.428615 Set Vref, RX VrefLevel [Byte0]: 44
1661 22:16:00.431648 [Byte1]: 44
1662 22:16:00.435739
1663 22:16:00.436308 Set Vref, RX VrefLevel [Byte0]: 45
1664 22:16:00.438788 [Byte1]: 45
1665 22:16:00.442994
1666 22:16:00.443611 Set Vref, RX VrefLevel [Byte0]: 46
1667 22:16:00.446842 [Byte1]: 46
1668 22:16:00.451084
1669 22:16:00.451709 Set Vref, RX VrefLevel [Byte0]: 47
1670 22:16:00.453774 [Byte1]: 47
1671 22:16:00.458279
1672 22:16:00.458861 Set Vref, RX VrefLevel [Byte0]: 48
1673 22:16:00.461480 [Byte1]: 48
1674 22:16:00.465843
1675 22:16:00.466428 Set Vref, RX VrefLevel [Byte0]: 49
1676 22:16:00.469513 [Byte1]: 49
1677 22:16:00.473755
1678 22:16:00.474313 Set Vref, RX VrefLevel [Byte0]: 50
1679 22:16:00.477079 [Byte1]: 50
1680 22:16:00.481149
1681 22:16:00.481714 Set Vref, RX VrefLevel [Byte0]: 51
1682 22:16:00.484329 [Byte1]: 51
1683 22:16:00.488780
1684 22:16:00.489343 Set Vref, RX VrefLevel [Byte0]: 52
1685 22:16:00.492409 [Byte1]: 52
1686 22:16:00.497119
1687 22:16:00.497581 Set Vref, RX VrefLevel [Byte0]: 53
1688 22:16:00.499341 [Byte1]: 53
1689 22:16:00.504145
1690 22:16:00.504709 Set Vref, RX VrefLevel [Byte0]: 54
1691 22:16:00.507065 [Byte1]: 54
1692 22:16:00.511880
1693 22:16:00.512605 Set Vref, RX VrefLevel [Byte0]: 55
1694 22:16:00.514572 [Byte1]: 55
1695 22:16:00.518718
1696 22:16:00.519147 Set Vref, RX VrefLevel [Byte0]: 56
1697 22:16:00.522329 [Byte1]: 56
1698 22:16:00.527029
1699 22:16:00.527652 Set Vref, RX VrefLevel [Byte0]: 57
1700 22:16:00.529872 [Byte1]: 57
1701 22:16:00.534452
1702 22:16:00.535020 Set Vref, RX VrefLevel [Byte0]: 58
1703 22:16:00.537416 [Byte1]: 58
1704 22:16:00.542088
1705 22:16:00.542650 Set Vref, RX VrefLevel [Byte0]: 59
1706 22:16:00.545197 [Byte1]: 59
1707 22:16:00.549169
1708 22:16:00.549642 Set Vref, RX VrefLevel [Byte0]: 60
1709 22:16:00.552731 [Byte1]: 60
1710 22:16:00.557223
1711 22:16:00.557696 Set Vref, RX VrefLevel [Byte0]: 61
1712 22:16:00.560357 [Byte1]: 61
1713 22:16:00.564640
1714 22:16:00.565116 Set Vref, RX VrefLevel [Byte0]: 62
1715 22:16:00.567604 [Byte1]: 62
1716 22:16:00.571896
1717 22:16:00.572325 Set Vref, RX VrefLevel [Byte0]: 63
1718 22:16:00.575601 [Byte1]: 63
1719 22:16:00.579822
1720 22:16:00.580345 Set Vref, RX VrefLevel [Byte0]: 64
1721 22:16:00.583011 [Byte1]: 64
1722 22:16:00.587656
1723 22:16:00.588077 Set Vref, RX VrefLevel [Byte0]: 65
1724 22:16:00.590609 [Byte1]: 65
1725 22:16:00.594855
1726 22:16:00.595416 Set Vref, RX VrefLevel [Byte0]: 66
1727 22:16:00.598282 [Byte1]: 66
1728 22:16:00.602435
1729 22:16:00.602956 Set Vref, RX VrefLevel [Byte0]: 67
1730 22:16:00.606583 [Byte1]: 67
1731 22:16:00.610164
1732 22:16:00.610686 Set Vref, RX VrefLevel [Byte0]: 68
1733 22:16:00.613181 [Byte1]: 68
1734 22:16:00.617619
1735 22:16:00.618144 Set Vref, RX VrefLevel [Byte0]: 69
1736 22:16:00.621195 [Byte1]: 69
1737 22:16:00.625608
1738 22:16:00.626133 Set Vref, RX VrefLevel [Byte0]: 70
1739 22:16:00.628566 [Byte1]: 70
1740 22:16:00.633104
1741 22:16:00.633626 Set Vref, RX VrefLevel [Byte0]: 71
1742 22:16:00.636278 [Byte1]: 71
1743 22:16:00.640393
1744 22:16:00.640915 Set Vref, RX VrefLevel [Byte0]: 72
1745 22:16:00.644038 [Byte1]: 72
1746 22:16:00.648176
1747 22:16:00.648695 Set Vref, RX VrefLevel [Byte0]: 73
1748 22:16:00.651661 [Byte1]: 73
1749 22:16:00.655860
1750 22:16:00.656448 Set Vref, RX VrefLevel [Byte0]: 74
1751 22:16:00.659286 [Byte1]: 74
1752 22:16:00.663285
1753 22:16:00.663810 Set Vref, RX VrefLevel [Byte0]: 75
1754 22:16:00.666765 [Byte1]: 75
1755 22:16:00.670730
1756 22:16:00.671349 Final RX Vref Byte 0 = 55 to rank0
1757 22:16:00.674929 Final RX Vref Byte 1 = 59 to rank0
1758 22:16:00.677228 Final RX Vref Byte 0 = 55 to rank1
1759 22:16:00.681369 Final RX Vref Byte 1 = 59 to rank1==
1760 22:16:00.683946 Dram Type= 6, Freq= 0, CH_1, rank 0
1761 22:16:00.691230 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1762 22:16:00.691775 ==
1763 22:16:00.692137 DQS Delay:
1764 22:16:00.692453 DQS0 = 0, DQS1 = 0
1765 22:16:00.694603 DQM Delay:
1766 22:16:00.695245 DQM0 = 86, DQM1 = 80
1767 22:16:00.697230 DQ Delay:
1768 22:16:00.701589 DQ0 =92, DQ1 =84, DQ2 =76, DQ3 =84
1769 22:16:00.704534 DQ4 =80, DQ5 =96, DQ6 =96, DQ7 =80
1770 22:16:00.705054 DQ8 =68, DQ9 =72, DQ10 =80, DQ11 =72
1771 22:16:00.711805 DQ12 =88, DQ13 =92, DQ14 =84, DQ15 =88
1772 22:16:00.712323
1773 22:16:00.712665
1774 22:16:00.717242 [DQSOSCAuto] RK0, (LSB)MR18= 0x1b2e, (MSB)MR19= 0x606, tDQSOscB0 = 398 ps tDQSOscB1 = 403 ps
1775 22:16:00.720814 CH1 RK0: MR19=606, MR18=1B2E
1776 22:16:00.727522 CH1_RK0: MR19=0x606, MR18=0x1B2E, DQSOSC=398, MR23=63, INC=93, DEC=62
1777 22:16:00.728054
1778 22:16:00.730577 ----->DramcWriteLeveling(PI) begin...
1779 22:16:00.731100 ==
1780 22:16:00.734578 Dram Type= 6, Freq= 0, CH_1, rank 1
1781 22:16:00.737666 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1782 22:16:00.738185 ==
1783 22:16:00.740308 Write leveling (Byte 0): 27 => 27
1784 22:16:00.743941 Write leveling (Byte 1): 31 => 31
1785 22:16:00.747499 DramcWriteLeveling(PI) end<-----
1786 22:16:00.748019
1787 22:16:00.748356 ==
1788 22:16:00.750489 Dram Type= 6, Freq= 0, CH_1, rank 1
1789 22:16:00.753575 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1790 22:16:00.753999 ==
1791 22:16:00.757802 [Gating] SW mode calibration
1792 22:16:00.763725 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1793 22:16:00.770156 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1794 22:16:00.773992 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1795 22:16:00.780120 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
1796 22:16:00.783409 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1797 22:16:00.786866 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1798 22:16:00.793098 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1799 22:16:00.796541 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1800 22:16:00.800116 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1801 22:16:00.803639 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1802 22:16:00.810405 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1803 22:16:00.813509 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1804 22:16:00.817083 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1805 22:16:00.823582 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1806 22:16:00.827010 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1807 22:16:00.830315 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1808 22:16:00.836934 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1809 22:16:00.840117 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1810 22:16:00.843505 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1811 22:16:00.850464 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)
1812 22:16:00.853211 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1813 22:16:00.856945 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1814 22:16:00.863217 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1815 22:16:00.866860 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1816 22:16:00.870224 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1817 22:16:00.876369 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1818 22:16:00.879738 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1819 22:16:00.883072 0 9 4 | B1->B0 | 2323 2e2e | 0 1 | (0 0) (1 1)
1820 22:16:00.889539 0 9 8 | B1->B0 | 3030 3434 | 1 1 | (1 1) (1 1)
1821 22:16:00.892981 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1822 22:16:00.896096 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1823 22:16:00.903288 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1824 22:16:00.906690 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1825 22:16:00.909586 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1826 22:16:00.916447 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1827 22:16:00.919476 0 10 4 | B1->B0 | 3333 2f2f | 0 0 | (1 1) (1 1)
1828 22:16:00.922839 0 10 8 | B1->B0 | 2f2f 2323 | 1 0 | (1 0) (1 0)
1829 22:16:00.929233 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1830 22:16:00.932743 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1831 22:16:00.936014 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1832 22:16:00.942485 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1833 22:16:00.946254 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1834 22:16:00.950123 0 11 0 | B1->B0 | 2323 2626 | 0 1 | (0 0) (0 0)
1835 22:16:00.955486 0 11 4 | B1->B0 | 2424 3c3c | 0 0 | (0 0) (1 1)
1836 22:16:00.959606 0 11 8 | B1->B0 | 3636 4646 | 1 0 | (0 0) (0 0)
1837 22:16:00.962973 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1838 22:16:00.969500 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1839 22:16:00.972307 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1840 22:16:00.975815 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1841 22:16:00.982695 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1842 22:16:00.985735 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
1843 22:16:00.989066 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1844 22:16:00.996661 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1845 22:16:00.999021 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1846 22:16:01.002210 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1847 22:16:01.006413 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1848 22:16:01.012027 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1849 22:16:01.015544 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1850 22:16:01.019356 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1851 22:16:01.025349 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1852 22:16:01.028709 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1853 22:16:01.032190 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1854 22:16:01.039015 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1855 22:16:01.041938 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1856 22:16:01.045158 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1857 22:16:01.052144 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1858 22:16:01.055706 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1859 22:16:01.058581 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
1860 22:16:01.062328 Total UI for P1: 0, mck2ui 16
1861 22:16:01.066058 best dqsien dly found for B0: ( 0, 14, 2)
1862 22:16:01.072872 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1863 22:16:01.073446 Total UI for P1: 0, mck2ui 16
1864 22:16:01.079044 best dqsien dly found for B1: ( 0, 14, 6)
1865 22:16:01.082264 best DQS0 dly(MCK, UI, PI) = (0, 14, 2)
1866 22:16:01.085850 best DQS1 dly(MCK, UI, PI) = (0, 14, 6)
1867 22:16:01.086459
1868 22:16:01.088571 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 2)
1869 22:16:01.092478 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 6)
1870 22:16:01.095699 [Gating] SW calibration Done
1871 22:16:01.096319 ==
1872 22:16:01.098401 Dram Type= 6, Freq= 0, CH_1, rank 1
1873 22:16:01.101961 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1874 22:16:01.102696 ==
1875 22:16:01.105928 RX Vref Scan: 0
1876 22:16:01.106498
1877 22:16:01.106873 RX Vref 0 -> 0, step: 1
1878 22:16:01.107276
1879 22:16:01.108683 RX Delay -130 -> 252, step: 16
1880 22:16:01.111474 iDelay=206, Bit 0, Center 85 (-34 ~ 205) 240
1881 22:16:01.118691 iDelay=206, Bit 1, Center 77 (-50 ~ 205) 256
1882 22:16:01.121710 iDelay=206, Bit 2, Center 69 (-50 ~ 189) 240
1883 22:16:01.125118 iDelay=206, Bit 3, Center 77 (-50 ~ 205) 256
1884 22:16:01.128260 iDelay=206, Bit 4, Center 77 (-50 ~ 205) 256
1885 22:16:01.132349 iDelay=206, Bit 5, Center 93 (-18 ~ 205) 224
1886 22:16:01.138354 iDelay=206, Bit 6, Center 85 (-34 ~ 205) 240
1887 22:16:01.141102 iDelay=206, Bit 7, Center 77 (-50 ~ 205) 256
1888 22:16:01.144837 iDelay=206, Bit 8, Center 69 (-50 ~ 189) 240
1889 22:16:01.148363 iDelay=206, Bit 9, Center 69 (-50 ~ 189) 240
1890 22:16:01.151872 iDelay=206, Bit 10, Center 77 (-50 ~ 205) 256
1891 22:16:01.158382 iDelay=206, Bit 11, Center 69 (-50 ~ 189) 240
1892 22:16:01.161456 iDelay=206, Bit 12, Center 85 (-34 ~ 205) 240
1893 22:16:01.165225 iDelay=206, Bit 13, Center 85 (-34 ~ 205) 240
1894 22:16:01.168302 iDelay=206, Bit 14, Center 85 (-34 ~ 205) 240
1895 22:16:01.175144 iDelay=206, Bit 15, Center 85 (-34 ~ 205) 240
1896 22:16:01.175747 ==
1897 22:16:01.178628 Dram Type= 6, Freq= 0, CH_1, rank 1
1898 22:16:01.181638 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1899 22:16:01.182217 ==
1900 22:16:01.182633 DQS Delay:
1901 22:16:01.184982 DQS0 = 0, DQS1 = 0
1902 22:16:01.185547 DQM Delay:
1903 22:16:01.187723 DQM0 = 80, DQM1 = 78
1904 22:16:01.188194 DQ Delay:
1905 22:16:01.191164 DQ0 =85, DQ1 =77, DQ2 =69, DQ3 =77
1906 22:16:01.195036 DQ4 =77, DQ5 =93, DQ6 =85, DQ7 =77
1907 22:16:01.197947 DQ8 =69, DQ9 =69, DQ10 =77, DQ11 =69
1908 22:16:01.201836 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1909 22:16:01.202368
1910 22:16:01.202711
1911 22:16:01.203029 ==
1912 22:16:01.204203 Dram Type= 6, Freq= 0, CH_1, rank 1
1913 22:16:01.207863 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1914 22:16:01.208386 ==
1915 22:16:01.208731
1916 22:16:01.209047
1917 22:16:01.211533 TX Vref Scan disable
1918 22:16:01.214784 == TX Byte 0 ==
1919 22:16:01.217383 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1920 22:16:01.220899 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1921 22:16:01.224192 == TX Byte 1 ==
1922 22:16:01.227889 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1923 22:16:01.230500 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1924 22:16:01.230996 ==
1925 22:16:01.234957 Dram Type= 6, Freq= 0, CH_1, rank 1
1926 22:16:01.241097 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1927 22:16:01.241703 ==
1928 22:16:01.253023 TX Vref=22, minBit 1, minWin=27, winSum=448
1929 22:16:01.256417 TX Vref=24, minBit 0, minWin=27, winSum=445
1930 22:16:01.259592 TX Vref=26, minBit 0, minWin=27, winSum=451
1931 22:16:01.263163 TX Vref=28, minBit 6, minWin=27, winSum=453
1932 22:16:01.266734 TX Vref=30, minBit 5, minWin=27, winSum=452
1933 22:16:01.273507 TX Vref=32, minBit 0, minWin=27, winSum=451
1934 22:16:01.276257 [TxChooseVref] Worse bit 6, Min win 27, Win sum 453, Final Vref 28
1935 22:16:01.276831
1936 22:16:01.279911 Final TX Range 1 Vref 28
1937 22:16:01.280486
1938 22:16:01.280861 ==
1939 22:16:01.283488 Dram Type= 6, Freq= 0, CH_1, rank 1
1940 22:16:01.286924 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1941 22:16:01.287530 ==
1942 22:16:01.287911
1943 22:16:01.289269
1944 22:16:01.289734 TX Vref Scan disable
1945 22:16:01.292826 == TX Byte 0 ==
1946 22:16:01.296422 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1947 22:16:01.300996 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1948 22:16:01.303143 == TX Byte 1 ==
1949 22:16:01.306988 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1950 22:16:01.309714 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1951 22:16:01.313389
1952 22:16:01.313930 [DATLAT]
1953 22:16:01.314280 Freq=800, CH1 RK1
1954 22:16:01.314699
1955 22:16:01.316310 DATLAT Default: 0xa
1956 22:16:01.316757 0, 0xFFFF, sum = 0
1957 22:16:01.320116 1, 0xFFFF, sum = 0
1958 22:16:01.320549 2, 0xFFFF, sum = 0
1959 22:16:01.322798 3, 0xFFFF, sum = 0
1960 22:16:01.326222 4, 0xFFFF, sum = 0
1961 22:16:01.326767 5, 0xFFFF, sum = 0
1962 22:16:01.329386 6, 0xFFFF, sum = 0
1963 22:16:01.329853 7, 0xFFFF, sum = 0
1964 22:16:01.332882 8, 0xFFFF, sum = 0
1965 22:16:01.333426 9, 0x0, sum = 1
1966 22:16:01.333779 10, 0x0, sum = 2
1967 22:16:01.336092 11, 0x0, sum = 3
1968 22:16:01.336528 12, 0x0, sum = 4
1969 22:16:01.339395 best_step = 10
1970 22:16:01.339831
1971 22:16:01.340174 ==
1972 22:16:01.342881 Dram Type= 6, Freq= 0, CH_1, rank 1
1973 22:16:01.346440 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1974 22:16:01.346977 ==
1975 22:16:01.349937 RX Vref Scan: 0
1976 22:16:01.350474
1977 22:16:01.350822 RX Vref 0 -> 0, step: 1
1978 22:16:01.352711
1979 22:16:01.353138 RX Delay -95 -> 252, step: 8
1980 22:16:01.360329 iDelay=209, Bit 0, Center 92 (-23 ~ 208) 232
1981 22:16:01.363028 iDelay=209, Bit 1, Center 84 (-31 ~ 200) 232
1982 22:16:01.366846 iDelay=209, Bit 2, Center 76 (-39 ~ 192) 232
1983 22:16:01.370577 iDelay=209, Bit 3, Center 84 (-31 ~ 200) 232
1984 22:16:01.373077 iDelay=209, Bit 4, Center 84 (-31 ~ 200) 232
1985 22:16:01.380315 iDelay=209, Bit 5, Center 96 (-15 ~ 208) 224
1986 22:16:01.382910 iDelay=209, Bit 6, Center 92 (-23 ~ 208) 232
1987 22:16:01.386495 iDelay=209, Bit 7, Center 84 (-31 ~ 200) 232
1988 22:16:01.389673 iDelay=209, Bit 8, Center 72 (-39 ~ 184) 224
1989 22:16:01.392891 iDelay=209, Bit 9, Center 72 (-39 ~ 184) 224
1990 22:16:01.399766 iDelay=209, Bit 10, Center 84 (-31 ~ 200) 232
1991 22:16:01.402758 iDelay=209, Bit 11, Center 72 (-39 ~ 184) 224
1992 22:16:01.406576 iDelay=209, Bit 12, Center 88 (-23 ~ 200) 224
1993 22:16:01.409689 iDelay=209, Bit 13, Center 88 (-23 ~ 200) 224
1994 22:16:01.412952 iDelay=209, Bit 14, Center 88 (-23 ~ 200) 224
1995 22:16:01.419490 iDelay=209, Bit 15, Center 88 (-23 ~ 200) 224
1996 22:16:01.419933 ==
1997 22:16:01.423296 Dram Type= 6, Freq= 0, CH_1, rank 1
1998 22:16:01.426016 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1999 22:16:01.426441 ==
2000 22:16:01.426775 DQS Delay:
2001 22:16:01.429669 DQS0 = 0, DQS1 = 0
2002 22:16:01.430297 DQM Delay:
2003 22:16:01.432764 DQM0 = 86, DQM1 = 81
2004 22:16:01.433132 DQ Delay:
2005 22:16:01.436776 DQ0 =92, DQ1 =84, DQ2 =76, DQ3 =84
2006 22:16:01.439268 DQ4 =84, DQ5 =96, DQ6 =92, DQ7 =84
2007 22:16:01.443122 DQ8 =72, DQ9 =72, DQ10 =84, DQ11 =72
2008 22:16:01.446332 DQ12 =88, DQ13 =88, DQ14 =88, DQ15 =88
2009 22:16:01.446844
2010 22:16:01.447207
2011 22:16:01.455708 [DQSOSCAuto] RK1, (LSB)MR18= 0x233f, (MSB)MR19= 0x606, tDQSOscB0 = 393 ps tDQSOscB1 = 401 ps
2012 22:16:01.456219 CH1 RK1: MR19=606, MR18=233F
2013 22:16:01.462438 CH1_RK1: MR19=0x606, MR18=0x233F, DQSOSC=393, MR23=63, INC=95, DEC=63
2014 22:16:01.465723 [RxdqsGatingPostProcess] freq 800
2015 22:16:01.472604 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
2016 22:16:01.476132 Pre-setting of DQS Precalculation
2017 22:16:01.479856 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
2018 22:16:01.486184 sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4
2019 22:16:01.495861 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
2020 22:16:01.496430
2021 22:16:01.496801
2022 22:16:01.498801 [Calibration Summary] 1600 Mbps
2023 22:16:01.499358 CH 0, Rank 0
2024 22:16:01.502275 SW Impedance : PASS
2025 22:16:01.502745 DUTY Scan : NO K
2026 22:16:01.505899 ZQ Calibration : PASS
2027 22:16:01.506539 Jitter Meter : NO K
2028 22:16:01.508877 CBT Training : PASS
2029 22:16:01.512298 Write leveling : PASS
2030 22:16:01.512870 RX DQS gating : PASS
2031 22:16:01.515450 RX DQ/DQS(RDDQC) : PASS
2032 22:16:01.519160 TX DQ/DQS : PASS
2033 22:16:01.519767 RX DATLAT : PASS
2034 22:16:01.522610 RX DQ/DQS(Engine): PASS
2035 22:16:01.525535 TX OE : NO K
2036 22:16:01.525929 All Pass.
2037 22:16:01.526262
2038 22:16:01.526573 CH 0, Rank 1
2039 22:16:01.528816 SW Impedance : PASS
2040 22:16:01.531787 DUTY Scan : NO K
2041 22:16:01.532215 ZQ Calibration : PASS
2042 22:16:01.535325 Jitter Meter : NO K
2043 22:16:01.538702 CBT Training : PASS
2044 22:16:01.539257 Write leveling : PASS
2045 22:16:01.541934 RX DQS gating : PASS
2046 22:16:01.545409 RX DQ/DQS(RDDQC) : PASS
2047 22:16:01.545980 TX DQ/DQS : PASS
2048 22:16:01.548481 RX DATLAT : PASS
2049 22:16:01.551876 RX DQ/DQS(Engine): PASS
2050 22:16:01.552548 TX OE : NO K
2051 22:16:01.554996 All Pass.
2052 22:16:01.555463
2053 22:16:01.555807 CH 1, Rank 0
2054 22:16:01.558161 SW Impedance : PASS
2055 22:16:01.558588 DUTY Scan : NO K
2056 22:16:01.562148 ZQ Calibration : PASS
2057 22:16:01.564982 Jitter Meter : NO K
2058 22:16:01.565415 CBT Training : PASS
2059 22:16:01.568262 Write leveling : PASS
2060 22:16:01.572366 RX DQS gating : PASS
2061 22:16:01.572890 RX DQ/DQS(RDDQC) : PASS
2062 22:16:01.575123 TX DQ/DQS : PASS
2063 22:16:01.575687 RX DATLAT : PASS
2064 22:16:01.579158 RX DQ/DQS(Engine): PASS
2065 22:16:01.581647 TX OE : NO K
2066 22:16:01.582169 All Pass.
2067 22:16:01.582512
2068 22:16:01.582828 CH 1, Rank 1
2069 22:16:01.584922 SW Impedance : PASS
2070 22:16:01.588560 DUTY Scan : NO K
2071 22:16:01.589088 ZQ Calibration : PASS
2072 22:16:01.591868 Jitter Meter : NO K
2073 22:16:01.595060 CBT Training : PASS
2074 22:16:01.595622 Write leveling : PASS
2075 22:16:01.598090 RX DQS gating : PASS
2076 22:16:01.601392 RX DQ/DQS(RDDQC) : PASS
2077 22:16:01.601820 TX DQ/DQS : PASS
2078 22:16:01.604474 RX DATLAT : PASS
2079 22:16:01.607832 RX DQ/DQS(Engine): PASS
2080 22:16:01.608347 TX OE : NO K
2081 22:16:01.611294 All Pass.
2082 22:16:01.611737
2083 22:16:01.612073 DramC Write-DBI off
2084 22:16:01.614744 PER_BANK_REFRESH: Hybrid Mode
2085 22:16:01.615279 TX_TRACKING: ON
2086 22:16:01.618342 [GetDramInforAfterCalByMRR] Vendor 6.
2087 22:16:01.624934 [GetDramInforAfterCalByMRR] Revision 606.
2088 22:16:01.627883 [GetDramInforAfterCalByMRR] Revision 2 0.
2089 22:16:01.628304 MR0 0x3b3b
2090 22:16:01.628636 MR8 0x5151
2091 22:16:01.631984 RK0, DieNum 2, Density 16Gb, RKsize 32Gb.
2092 22:16:01.634260
2093 22:16:01.634677 MR0 0x3b3b
2094 22:16:01.635135 MR8 0x5151
2095 22:16:01.638232 RK1, DieNum 2, Density 16Gb, RKsize 32Gb.
2096 22:16:01.638650
2097 22:16:01.647918 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
2098 22:16:01.651257 [FAST_K] Save calibration result to emmc
2099 22:16:01.654426 [FAST_K] Save calibration result to emmc
2100 22:16:01.658482 dram_init: config_dvfs: 1
2101 22:16:01.661193 dramc_set_vcore_voltage set vcore to 662500
2102 22:16:01.664973 Read voltage for 1200, 2
2103 22:16:01.665403 Vio18 = 0
2104 22:16:01.665747 Vcore = 662500
2105 22:16:01.667816 Vdram = 0
2106 22:16:01.668244 Vddq = 0
2107 22:16:01.668589 Vmddr = 0
2108 22:16:01.674345 [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0
2109 22:16:01.677711 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
2110 22:16:01.680907 MEM_TYPE=3, freq_sel=15
2111 22:16:01.685468 sv_algorithm_assistance_LP4_1600
2112 22:16:01.687594 ============ PULL DRAM RESETB DOWN ============
2113 22:16:01.691334 ========== PULL DRAM RESETB DOWN end =========
2114 22:16:01.697595 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2115 22:16:01.701333 ===================================
2116 22:16:01.704224 LPDDR4 DRAM CONFIGURATION
2117 22:16:01.707948 ===================================
2118 22:16:01.708516 EX_ROW_EN[0] = 0x0
2119 22:16:01.710953 EX_ROW_EN[1] = 0x0
2120 22:16:01.711583 LP4Y_EN = 0x0
2121 22:16:01.714469 WORK_FSP = 0x0
2122 22:16:01.715105 WL = 0x4
2123 22:16:01.717506 RL = 0x4
2124 22:16:01.718078 BL = 0x2
2125 22:16:01.720728 RPST = 0x0
2126 22:16:01.721222 RD_PRE = 0x0
2127 22:16:01.724616 WR_PRE = 0x1
2128 22:16:01.725182 WR_PST = 0x0
2129 22:16:01.727320 DBI_WR = 0x0
2130 22:16:01.727878 DBI_RD = 0x0
2131 22:16:01.730955 OTF = 0x1
2132 22:16:01.734030 ===================================
2133 22:16:01.737633 ===================================
2134 22:16:01.738202 ANA top config
2135 22:16:01.740648 ===================================
2136 22:16:01.743822 DLL_ASYNC_EN = 0
2137 22:16:01.747242 ALL_SLAVE_EN = 0
2138 22:16:01.750854 NEW_RANK_MODE = 1
2139 22:16:01.753658 DLL_IDLE_MODE = 1
2140 22:16:01.754224 LP45_APHY_COMB_EN = 1
2141 22:16:01.757084 TX_ODT_DIS = 1
2142 22:16:01.760552 NEW_8X_MODE = 1
2143 22:16:01.763422 ===================================
2144 22:16:01.766673 ===================================
2145 22:16:01.769938 data_rate = 2400
2146 22:16:01.773711 CKR = 1
2147 22:16:01.774287 DQ_P2S_RATIO = 8
2148 22:16:01.776822 ===================================
2149 22:16:01.779877 CA_P2S_RATIO = 8
2150 22:16:01.784151 DQ_CA_OPEN = 0
2151 22:16:01.786907 DQ_SEMI_OPEN = 0
2152 22:16:01.790270 CA_SEMI_OPEN = 0
2153 22:16:01.793478 CA_FULL_RATE = 0
2154 22:16:01.794046 DQ_CKDIV4_EN = 0
2155 22:16:01.797004 CA_CKDIV4_EN = 0
2156 22:16:01.799884 CA_PREDIV_EN = 0
2157 22:16:01.803162 PH8_DLY = 17
2158 22:16:01.807350 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
2159 22:16:01.810269 DQ_AAMCK_DIV = 4
2160 22:16:01.810834 CA_AAMCK_DIV = 4
2161 22:16:01.813486 CA_ADMCK_DIV = 4
2162 22:16:01.816469 DQ_TRACK_CA_EN = 0
2163 22:16:01.820071 CA_PICK = 1200
2164 22:16:01.823265 CA_MCKIO = 1200
2165 22:16:01.826384 MCKIO_SEMI = 0
2166 22:16:01.830065 PLL_FREQ = 2366
2167 22:16:01.833136 DQ_UI_PI_RATIO = 32
2168 22:16:01.833602 CA_UI_PI_RATIO = 0
2169 22:16:01.836567 ===================================
2170 22:16:01.839739 ===================================
2171 22:16:01.843684 memory_type:LPDDR4
2172 22:16:01.846095 GP_NUM : 10
2173 22:16:01.846563 SRAM_EN : 1
2174 22:16:01.850419 MD32_EN : 0
2175 22:16:01.853115 ===================================
2176 22:16:01.855864 [ANA_INIT] >>>>>>>>>>>>>>
2177 22:16:01.859405 <<<<<< [CONFIGURE PHASE]: ANA_TX
2178 22:16:01.862900 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
2179 22:16:01.866292 ===================================
2180 22:16:01.866898 data_rate = 2400,PCW = 0X5b00
2181 22:16:01.869137 ===================================
2182 22:16:01.872845 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
2183 22:16:01.879397 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2184 22:16:01.886033 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2185 22:16:01.889132 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
2186 22:16:01.892516 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
2187 22:16:01.896083 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
2188 22:16:01.899094 [ANA_INIT] flow start
2189 22:16:01.899677 [ANA_INIT] PLL >>>>>>>>
2190 22:16:01.902774 [ANA_INIT] PLL <<<<<<<<
2191 22:16:01.906279 [ANA_INIT] MIDPI >>>>>>>>
2192 22:16:01.909229 [ANA_INIT] MIDPI <<<<<<<<
2193 22:16:01.909791 [ANA_INIT] DLL >>>>>>>>
2194 22:16:01.913093 [ANA_INIT] DLL <<<<<<<<
2195 22:16:01.916206 [ANA_INIT] flow end
2196 22:16:01.919120 ============ LP4 DIFF to SE enter ============
2197 22:16:01.922604 ============ LP4 DIFF to SE exit ============
2198 22:16:01.926163 [ANA_INIT] <<<<<<<<<<<<<
2199 22:16:01.929113 [Flow] Enable top DCM control >>>>>
2200 22:16:01.932527 [Flow] Enable top DCM control <<<<<
2201 22:16:01.935704 Enable DLL master slave shuffle
2202 22:16:01.939294 ==============================================================
2203 22:16:01.942754 Gating Mode config
2204 22:16:01.949496 ==============================================================
2205 22:16:01.950062 Config description:
2206 22:16:01.959103 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
2207 22:16:01.965307 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
2208 22:16:01.969638 SELPH_MODE 0: By rank 1: By Phase
2209 22:16:01.975626 ==============================================================
2210 22:16:01.979434 GAT_TRACK_EN = 1
2211 22:16:01.982121 RX_GATING_MODE = 2
2212 22:16:01.985553 RX_GATING_TRACK_MODE = 2
2213 22:16:01.988875 SELPH_MODE = 1
2214 22:16:01.991877 PICG_EARLY_EN = 1
2215 22:16:01.992353 VALID_LAT_VALUE = 1
2216 22:16:01.998954 ==============================================================
2217 22:16:02.002355 Enter into Gating configuration >>>>
2218 22:16:02.006035 Exit from Gating configuration <<<<
2219 22:16:02.008964 Enter into DVFS_PRE_config >>>>>
2220 22:16:02.018813 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
2221 22:16:02.022502 Exit from DVFS_PRE_config <<<<<
2222 22:16:02.025119 Enter into PICG configuration >>>>
2223 22:16:02.028147 Exit from PICG configuration <<<<
2224 22:16:02.032027 [RX_INPUT] configuration >>>>>
2225 22:16:02.035023 [RX_INPUT] configuration <<<<<
2226 22:16:02.041909 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
2227 22:16:02.044753 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
2228 22:16:02.051744 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
2229 22:16:02.058085 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
2230 22:16:02.064917 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
2231 22:16:02.071761 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
2232 22:16:02.074946 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
2233 22:16:02.078263 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
2234 22:16:02.081172 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
2235 22:16:02.088024 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
2236 22:16:02.091377 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
2237 22:16:02.095142 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2238 22:16:02.098014 ===================================
2239 22:16:02.101153 LPDDR4 DRAM CONFIGURATION
2240 22:16:02.104992 ===================================
2241 22:16:02.105467 EX_ROW_EN[0] = 0x0
2242 22:16:02.109069 EX_ROW_EN[1] = 0x0
2243 22:16:02.111106 LP4Y_EN = 0x0
2244 22:16:02.111614 WORK_FSP = 0x0
2245 22:16:02.115551 WL = 0x4
2246 22:16:02.116105 RL = 0x4
2247 22:16:02.117928 BL = 0x2
2248 22:16:02.118455 RPST = 0x0
2249 22:16:02.121730 RD_PRE = 0x0
2250 22:16:02.122396 WR_PRE = 0x1
2251 22:16:02.124760 WR_PST = 0x0
2252 22:16:02.125334 DBI_WR = 0x0
2253 22:16:02.127875 DBI_RD = 0x0
2254 22:16:02.128348 OTF = 0x1
2255 22:16:02.130896 ===================================
2256 22:16:02.134980 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
2257 22:16:02.141501 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
2258 22:16:02.144331 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2259 22:16:02.148596 ===================================
2260 22:16:02.151553 LPDDR4 DRAM CONFIGURATION
2261 22:16:02.155279 ===================================
2262 22:16:02.155878 EX_ROW_EN[0] = 0x10
2263 22:16:02.158704 EX_ROW_EN[1] = 0x0
2264 22:16:02.161331 LP4Y_EN = 0x0
2265 22:16:02.161891 WORK_FSP = 0x0
2266 22:16:02.164170 WL = 0x4
2267 22:16:02.164642 RL = 0x4
2268 22:16:02.167842 BL = 0x2
2269 22:16:02.168436 RPST = 0x0
2270 22:16:02.171150 RD_PRE = 0x0
2271 22:16:02.171738 WR_PRE = 0x1
2272 22:16:02.174708 WR_PST = 0x0
2273 22:16:02.175309 DBI_WR = 0x0
2274 22:16:02.177825 DBI_RD = 0x0
2275 22:16:02.178292 OTF = 0x1
2276 22:16:02.180855 ===================================
2277 22:16:02.187794 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
2278 22:16:02.188341 ==
2279 22:16:02.191140 Dram Type= 6, Freq= 0, CH_0, rank 0
2280 22:16:02.194328 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2281 22:16:02.194893 ==
2282 22:16:02.197350 [Duty_Offset_Calibration]
2283 22:16:02.200766 B0:2 B1:0 CA:4
2284 22:16:02.201185
2285 22:16:02.203698 [DutyScan_Calibration_Flow] k_type=0
2286 22:16:02.211787
2287 22:16:02.212304 ==CLK 0==
2288 22:16:02.214910 Final CLK duty delay cell = -4
2289 22:16:02.218402 [-4] MAX Duty = 5062%(X100), DQS PI = 32
2290 22:16:02.221754 [-4] MIN Duty = 4844%(X100), DQS PI = 8
2291 22:16:02.224772 [-4] AVG Duty = 4953%(X100)
2292 22:16:02.225337
2293 22:16:02.228308 CH0 CLK Duty spec in!! Max-Min= 218%
2294 22:16:02.231279 [DutyScan_Calibration_Flow] ====Done====
2295 22:16:02.231688
2296 22:16:02.234766 [DutyScan_Calibration_Flow] k_type=1
2297 22:16:02.250217
2298 22:16:02.250626 ==DQS 0 ==
2299 22:16:02.254029 Final DQS duty delay cell = -4
2300 22:16:02.256839 [-4] MAX Duty = 4969%(X100), DQS PI = 14
2301 22:16:02.260391 [-4] MIN Duty = 4876%(X100), DQS PI = 2
2302 22:16:02.263835 [-4] AVG Duty = 4922%(X100)
2303 22:16:02.264348
2304 22:16:02.264676 ==DQS 1 ==
2305 22:16:02.267381 Final DQS duty delay cell = 0
2306 22:16:02.270168 [0] MAX Duty = 5125%(X100), DQS PI = 4
2307 22:16:02.274624 [0] MIN Duty = 5000%(X100), DQS PI = 0
2308 22:16:02.277258 [0] AVG Duty = 5062%(X100)
2309 22:16:02.277774
2310 22:16:02.281061 CH0 DQS 0 Duty spec in!! Max-Min= 93%
2311 22:16:02.281620
2312 22:16:02.283594 CH0 DQS 1 Duty spec in!! Max-Min= 125%
2313 22:16:02.286647 [DutyScan_Calibration_Flow] ====Done====
2314 22:16:02.287242
2315 22:16:02.290598 [DutyScan_Calibration_Flow] k_type=3
2316 22:16:02.306776
2317 22:16:02.307367 ==DQM 0 ==
2318 22:16:02.310222 Final DQM duty delay cell = 0
2319 22:16:02.313641 [0] MAX Duty = 5125%(X100), DQS PI = 20
2320 22:16:02.316699 [0] MIN Duty = 4844%(X100), DQS PI = 52
2321 22:16:02.320358 [0] AVG Duty = 4984%(X100)
2322 22:16:02.320911
2323 22:16:02.321273 ==DQM 1 ==
2324 22:16:02.323255 Final DQM duty delay cell = 0
2325 22:16:02.326812 [0] MAX Duty = 4969%(X100), DQS PI = 2
2326 22:16:02.330517 [0] MIN Duty = 4875%(X100), DQS PI = 20
2327 22:16:02.333458 [0] AVG Duty = 4922%(X100)
2328 22:16:02.333911
2329 22:16:02.337160 CH0 DQM 0 Duty spec in!! Max-Min= 281%
2330 22:16:02.337713
2331 22:16:02.339988 CH0 DQM 1 Duty spec in!! Max-Min= 94%
2332 22:16:02.343350 [DutyScan_Calibration_Flow] ====Done====
2333 22:16:02.343946
2334 22:16:02.346736 [DutyScan_Calibration_Flow] k_type=2
2335 22:16:02.363772
2336 22:16:02.364330 ==DQ 0 ==
2337 22:16:02.366790 Final DQ duty delay cell = 0
2338 22:16:02.370649 [0] MAX Duty = 5125%(X100), DQS PI = 18
2339 22:16:02.373311 [0] MIN Duty = 5000%(X100), DQS PI = 8
2340 22:16:02.373865 [0] AVG Duty = 5062%(X100)
2341 22:16:02.376827
2342 22:16:02.377381 ==DQ 1 ==
2343 22:16:02.379909 Final DQ duty delay cell = 0
2344 22:16:02.383696 [0] MAX Duty = 5156%(X100), DQS PI = 4
2345 22:16:02.386357 [0] MIN Duty = 4938%(X100), DQS PI = 14
2346 22:16:02.386908 [0] AVG Duty = 5047%(X100)
2347 22:16:02.387353
2348 22:16:02.389616 CH0 DQ 0 Duty spec in!! Max-Min= 125%
2349 22:16:02.392925
2350 22:16:02.396562 CH0 DQ 1 Duty spec in!! Max-Min= 218%
2351 22:16:02.399621 [DutyScan_Calibration_Flow] ====Done====
2352 22:16:02.400263 ==
2353 22:16:02.402677 Dram Type= 6, Freq= 0, CH_1, rank 0
2354 22:16:02.406071 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2355 22:16:02.406639 ==
2356 22:16:02.410074 [Duty_Offset_Calibration]
2357 22:16:02.410645 B0:0 B1:-1 CA:3
2358 22:16:02.411019
2359 22:16:02.413029 [DutyScan_Calibration_Flow] k_type=0
2360 22:16:02.423134
2361 22:16:02.423874 ==CLK 0==
2362 22:16:02.425760 Final CLK duty delay cell = -4
2363 22:16:02.429359 [-4] MAX Duty = 5000%(X100), DQS PI = 0
2364 22:16:02.432608 [-4] MIN Duty = 4876%(X100), DQS PI = 36
2365 22:16:02.435808 [-4] AVG Duty = 4938%(X100)
2366 22:16:02.436382
2367 22:16:02.439281 CH1 CLK Duty spec in!! Max-Min= 124%
2368 22:16:02.442696 [DutyScan_Calibration_Flow] ====Done====
2369 22:16:02.443168
2370 22:16:02.445712 [DutyScan_Calibration_Flow] k_type=1
2371 22:16:02.461858
2372 22:16:02.462424 ==DQS 0 ==
2373 22:16:02.465526 Final DQS duty delay cell = 0
2374 22:16:02.468712 [0] MAX Duty = 5187%(X100), DQS PI = 18
2375 22:16:02.472051 [0] MIN Duty = 4907%(X100), DQS PI = 38
2376 22:16:02.475824 [0] AVG Duty = 5047%(X100)
2377 22:16:02.476401
2378 22:16:02.476772 ==DQS 1 ==
2379 22:16:02.478615 Final DQS duty delay cell = 0
2380 22:16:02.482121 [0] MAX Duty = 5156%(X100), DQS PI = 8
2381 22:16:02.485674 [0] MIN Duty = 5031%(X100), DQS PI = 24
2382 22:16:02.488364 [0] AVG Duty = 5093%(X100)
2383 22:16:02.488935
2384 22:16:02.492357 CH1 DQS 0 Duty spec in!! Max-Min= 280%
2385 22:16:02.492947
2386 22:16:02.495148 CH1 DQS 1 Duty spec in!! Max-Min= 125%
2387 22:16:02.498283 [DutyScan_Calibration_Flow] ====Done====
2388 22:16:02.498853
2389 22:16:02.501306 [DutyScan_Calibration_Flow] k_type=3
2390 22:16:02.518490
2391 22:16:02.519066 ==DQM 0 ==
2392 22:16:02.521865 Final DQM duty delay cell = 0
2393 22:16:02.525323 [0] MAX Duty = 5031%(X100), DQS PI = 28
2394 22:16:02.528726 [0] MIN Duty = 4782%(X100), DQS PI = 38
2395 22:16:02.529305 [0] AVG Duty = 4906%(X100)
2396 22:16:02.531715
2397 22:16:02.532332 ==DQM 1 ==
2398 22:16:02.535136 Final DQM duty delay cell = 0
2399 22:16:02.539776 [0] MAX Duty = 4969%(X100), DQS PI = 32
2400 22:16:02.541640 [0] MIN Duty = 4844%(X100), DQS PI = 0
2401 22:16:02.545324 [0] AVG Duty = 4906%(X100)
2402 22:16:02.545896
2403 22:16:02.549067 CH1 DQM 0 Duty spec in!! Max-Min= 249%
2404 22:16:02.549661
2405 22:16:02.551796 CH1 DQM 1 Duty spec in!! Max-Min= 125%
2406 22:16:02.554875 [DutyScan_Calibration_Flow] ====Done====
2407 22:16:02.555513
2408 22:16:02.558524 [DutyScan_Calibration_Flow] k_type=2
2409 22:16:02.574368
2410 22:16:02.574938 ==DQ 0 ==
2411 22:16:02.577398 Final DQ duty delay cell = -4
2412 22:16:02.581375 [-4] MAX Duty = 5031%(X100), DQS PI = 30
2413 22:16:02.584776 [-4] MIN Duty = 4844%(X100), DQS PI = 36
2414 22:16:02.587346 [-4] AVG Duty = 4937%(X100)
2415 22:16:02.587922
2416 22:16:02.588306 ==DQ 1 ==
2417 22:16:02.590935 Final DQ duty delay cell = 0
2418 22:16:02.595670 [0] MAX Duty = 5031%(X100), DQS PI = 34
2419 22:16:02.597400 [0] MIN Duty = 4844%(X100), DQS PI = 0
2420 22:16:02.600894 [0] AVG Duty = 4937%(X100)
2421 22:16:02.601371
2422 22:16:02.603919 CH1 DQ 0 Duty spec in!! Max-Min= 187%
2423 22:16:02.604503
2424 22:16:02.606905 CH1 DQ 1 Duty spec in!! Max-Min= 187%
2425 22:16:02.610720 [DutyScan_Calibration_Flow] ====Done====
2426 22:16:02.613758 nWR fixed to 30
2427 22:16:02.616735 [ModeRegInit_LP4] CH0 RK0
2428 22:16:02.617259 [ModeRegInit_LP4] CH0 RK1
2429 22:16:02.620360 [ModeRegInit_LP4] CH1 RK0
2430 22:16:02.623393 [ModeRegInit_LP4] CH1 RK1
2431 22:16:02.623868 match AC timing 7
2432 22:16:02.630735 dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 1
2433 22:16:02.633678 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
2434 22:16:02.637009 [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12
2435 22:16:02.643898 [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25
2436 22:16:02.647259 [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)
2437 22:16:02.647837 ==
2438 22:16:02.650534 Dram Type= 6, Freq= 0, CH_0, rank 0
2439 22:16:02.653464 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2440 22:16:02.654071 ==
2441 22:16:02.660366 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2442 22:16:02.667156 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2443 22:16:02.674515 [CA 0] Center 39 (9~70) winsize 62
2444 22:16:02.677774 [CA 1] Center 39 (8~70) winsize 63
2445 22:16:02.681122 [CA 2] Center 35 (5~66) winsize 62
2446 22:16:02.684521 [CA 3] Center 35 (5~66) winsize 62
2447 22:16:02.688378 [CA 4] Center 33 (3~64) winsize 62
2448 22:16:02.691011 [CA 5] Center 33 (3~64) winsize 62
2449 22:16:02.691619
2450 22:16:02.695254 [CmdBusTrainingLP45] Vref(ca) range 1: 35
2451 22:16:02.695821
2452 22:16:02.697864 [CATrainingPosCal] consider 1 rank data
2453 22:16:02.701233 u2DelayCellTimex100 = 270/100 ps
2454 22:16:02.704168 CA0 delay=39 (9~70),Diff = 6 PI (28 cell)
2455 22:16:02.707999 CA1 delay=39 (8~70),Diff = 6 PI (28 cell)
2456 22:16:02.714593 CA2 delay=35 (5~66),Diff = 2 PI (9 cell)
2457 22:16:02.717777 CA3 delay=35 (5~66),Diff = 2 PI (9 cell)
2458 22:16:02.720964 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
2459 22:16:02.724308 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
2460 22:16:02.724773
2461 22:16:02.727343 CA PerBit enable=1, Macro0, CA PI delay=33
2462 22:16:02.727809
2463 22:16:02.731096 [CBTSetCACLKResult] CA Dly = 33
2464 22:16:02.731696 CS Dly: 7 (0~38)
2465 22:16:02.733940 ==
2466 22:16:02.737273 Dram Type= 6, Freq= 0, CH_0, rank 1
2467 22:16:02.740780 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2468 22:16:02.741309 ==
2469 22:16:02.743838 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2470 22:16:02.750595 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2471 22:16:02.759991 [CA 0] Center 39 (9~70) winsize 62
2472 22:16:02.763668 [CA 1] Center 39 (9~70) winsize 62
2473 22:16:02.766989 [CA 2] Center 35 (5~66) winsize 62
2474 22:16:02.770096 [CA 3] Center 35 (5~66) winsize 62
2475 22:16:02.773885 [CA 4] Center 34 (4~65) winsize 62
2476 22:16:02.776743 [CA 5] Center 33 (3~64) winsize 62
2477 22:16:02.777217
2478 22:16:02.780101 [CmdBusTrainingLP45] Vref(ca) range 1: 37
2479 22:16:02.780695
2480 22:16:02.783810 [CATrainingPosCal] consider 2 rank data
2481 22:16:02.786827 u2DelayCellTimex100 = 270/100 ps
2482 22:16:02.790447 CA0 delay=39 (9~70),Diff = 6 PI (28 cell)
2483 22:16:02.793991 CA1 delay=39 (9~70),Diff = 6 PI (28 cell)
2484 22:16:02.800457 CA2 delay=35 (5~66),Diff = 2 PI (9 cell)
2485 22:16:02.803198 CA3 delay=35 (5~66),Diff = 2 PI (9 cell)
2486 22:16:02.807116 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
2487 22:16:02.810162 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
2488 22:16:02.810756
2489 22:16:02.813378 CA PerBit enable=1, Macro0, CA PI delay=33
2490 22:16:02.813951
2491 22:16:02.816700 [CBTSetCACLKResult] CA Dly = 33
2492 22:16:02.817282 CS Dly: 8 (0~41)
2493 22:16:02.820270
2494 22:16:02.823458 ----->DramcWriteLeveling(PI) begin...
2495 22:16:02.824039 ==
2496 22:16:02.827011 Dram Type= 6, Freq= 0, CH_0, rank 0
2497 22:16:02.830179 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2498 22:16:02.830755 ==
2499 22:16:02.833016 Write leveling (Byte 0): 33 => 33
2500 22:16:02.836254 Write leveling (Byte 1): 26 => 26
2501 22:16:02.839742 DramcWriteLeveling(PI) end<-----
2502 22:16:02.840322
2503 22:16:02.840705 ==
2504 22:16:02.843320 Dram Type= 6, Freq= 0, CH_0, rank 0
2505 22:16:02.846461 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2506 22:16:02.847027 ==
2507 22:16:02.849718 [Gating] SW mode calibration
2508 22:16:02.856920 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2509 22:16:02.863023 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2510 22:16:02.866381 0 15 0 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
2511 22:16:02.869584 0 15 4 | B1->B0 | 2f2f 3434 | 1 1 | (1 1) (1 1)
2512 22:16:02.876444 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2513 22:16:02.879821 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2514 22:16:02.883538 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2515 22:16:02.889914 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2516 22:16:02.892852 0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
2517 22:16:02.896412 0 15 28 | B1->B0 | 3434 2b2b | 1 1 | (1 1) (1 0)
2518 22:16:02.902637 1 0 0 | B1->B0 | 3232 2323 | 0 0 | (0 1) (0 0)
2519 22:16:02.905825 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
2520 22:16:02.909273 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2521 22:16:02.915904 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2522 22:16:02.919120 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2523 22:16:02.922983 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2524 22:16:02.929327 1 0 24 | B1->B0 | 2323 2a2a | 0 0 | (0 0) (0 0)
2525 22:16:02.932542 1 0 28 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
2526 22:16:02.935674 1 1 0 | B1->B0 | 2727 4646 | 0 0 | (0 0) (0 0)
2527 22:16:02.939108 1 1 4 | B1->B0 | 4343 4646 | 0 0 | (0 0) (0 0)
2528 22:16:02.945653 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2529 22:16:02.949446 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2530 22:16:02.952420 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2531 22:16:02.959437 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2532 22:16:02.962167 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2533 22:16:02.965850 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2534 22:16:02.972880 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2535 22:16:02.975778 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2536 22:16:02.979267 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2537 22:16:02.985850 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2538 22:16:02.989623 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2539 22:16:02.992821 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2540 22:16:02.999142 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2541 22:16:03.003002 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2542 22:16:03.005710 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2543 22:16:03.012501 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2544 22:16:03.015763 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2545 22:16:03.018586 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2546 22:16:03.025253 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2547 22:16:03.029289 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2548 22:16:03.031920 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2549 22:16:03.039106 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2550 22:16:03.042220 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2551 22:16:03.045022 Total UI for P1: 0, mck2ui 16
2552 22:16:03.048557 best dqsien dly found for B0: ( 1, 3, 28)
2553 22:16:03.051958 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2554 22:16:03.055404 Total UI for P1: 0, mck2ui 16
2555 22:16:03.058484 best dqsien dly found for B1: ( 1, 4, 0)
2556 22:16:03.062106 best DQS0 dly(MCK, UI, PI) = (1, 3, 28)
2557 22:16:03.064870 best DQS1 dly(MCK, UI, PI) = (1, 4, 0)
2558 22:16:03.065294
2559 22:16:03.071386 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)
2560 22:16:03.074990 best DQS1 P1 dly(MCK, UI, PI) = (1, 8, 0)
2561 22:16:03.075455 [Gating] SW calibration Done
2562 22:16:03.078320 ==
2563 22:16:03.081845 Dram Type= 6, Freq= 0, CH_0, rank 0
2564 22:16:03.084871 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2565 22:16:03.085406 ==
2566 22:16:03.085749 RX Vref Scan: 0
2567 22:16:03.086060
2568 22:16:03.088392 RX Vref 0 -> 0, step: 1
2569 22:16:03.088813
2570 22:16:03.091832 RX Delay -40 -> 252, step: 8
2571 22:16:03.094980 iDelay=200, Bit 0, Center 115 (40 ~ 191) 152
2572 22:16:03.098991 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2573 22:16:03.101788 iDelay=200, Bit 2, Center 115 (40 ~ 191) 152
2574 22:16:03.108166 iDelay=200, Bit 3, Center 111 (40 ~ 183) 144
2575 22:16:03.111636 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
2576 22:16:03.115256 iDelay=200, Bit 5, Center 111 (40 ~ 183) 144
2577 22:16:03.118956 iDelay=200, Bit 6, Center 123 (48 ~ 199) 152
2578 22:16:03.121770 iDelay=200, Bit 7, Center 123 (48 ~ 199) 152
2579 22:16:03.128659 iDelay=200, Bit 8, Center 95 (24 ~ 167) 144
2580 22:16:03.131863 iDelay=200, Bit 9, Center 95 (24 ~ 167) 144
2581 22:16:03.135251 iDelay=200, Bit 10, Center 107 (40 ~ 175) 136
2582 22:16:03.138904 iDelay=200, Bit 11, Center 103 (32 ~ 175) 144
2583 22:16:03.141935 iDelay=200, Bit 12, Center 119 (48 ~ 191) 144
2584 22:16:03.148531 iDelay=200, Bit 13, Center 111 (40 ~ 183) 144
2585 22:16:03.151501 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
2586 22:16:03.154950 iDelay=200, Bit 15, Center 111 (40 ~ 183) 144
2587 22:16:03.155523 ==
2588 22:16:03.157995 Dram Type= 6, Freq= 0, CH_0, rank 0
2589 22:16:03.161632 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2590 22:16:03.162057 ==
2591 22:16:03.164766 DQS Delay:
2592 22:16:03.165183 DQS0 = 0, DQS1 = 0
2593 22:16:03.168367 DQM Delay:
2594 22:16:03.168785 DQM0 = 117, DQM1 = 107
2595 22:16:03.169118 DQ Delay:
2596 22:16:03.174420 DQ0 =115, DQ1 =119, DQ2 =115, DQ3 =111
2597 22:16:03.178056 DQ4 =119, DQ5 =111, DQ6 =123, DQ7 =123
2598 22:16:03.181280 DQ8 =95, DQ9 =95, DQ10 =107, DQ11 =103
2599 22:16:03.184507 DQ12 =119, DQ13 =111, DQ14 =119, DQ15 =111
2600 22:16:03.184928
2601 22:16:03.185262
2602 22:16:03.185573 ==
2603 22:16:03.188287 Dram Type= 6, Freq= 0, CH_0, rank 0
2604 22:16:03.191861 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2605 22:16:03.192388 ==
2606 22:16:03.192726
2607 22:16:03.193036
2608 22:16:03.194418 TX Vref Scan disable
2609 22:16:03.198181 == TX Byte 0 ==
2610 22:16:03.201288 Update DQ dly =852 (3 ,2, 20) DQ OEN =(2 ,7)
2611 22:16:03.204665 Update DQM dly =852 (3 ,2, 20) DQM OEN =(2 ,7)
2612 22:16:03.208286 == TX Byte 1 ==
2613 22:16:03.210920 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
2614 22:16:03.215266 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
2615 22:16:03.215793 ==
2616 22:16:03.218411 Dram Type= 6, Freq= 0, CH_0, rank 0
2617 22:16:03.221604 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2618 22:16:03.224700 ==
2619 22:16:03.235463 TX Vref=22, minBit 3, minWin=25, winSum=412
2620 22:16:03.238805 TX Vref=24, minBit 4, minWin=25, winSum=414
2621 22:16:03.241817 TX Vref=26, minBit 7, minWin=25, winSum=420
2622 22:16:03.245517 TX Vref=28, minBit 4, minWin=26, winSum=429
2623 22:16:03.249007 TX Vref=30, minBit 4, minWin=26, winSum=430
2624 22:16:03.251947 TX Vref=32, minBit 1, minWin=26, winSum=428
2625 22:16:03.258377 [TxChooseVref] Worse bit 4, Min win 26, Win sum 430, Final Vref 30
2626 22:16:03.258956
2627 22:16:03.261730 Final TX Range 1 Vref 30
2628 22:16:03.262198
2629 22:16:03.262570 ==
2630 22:16:03.265117 Dram Type= 6, Freq= 0, CH_0, rank 0
2631 22:16:03.268387 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2632 22:16:03.268855 ==
2633 22:16:03.271768
2634 22:16:03.272233
2635 22:16:03.272605 TX Vref Scan disable
2636 22:16:03.274785 == TX Byte 0 ==
2637 22:16:03.277982 Update DQ dly =852 (3 ,2, 20) DQ OEN =(2 ,7)
2638 22:16:03.285243 Update DQM dly =852 (3 ,2, 20) DQM OEN =(2 ,7)
2639 22:16:03.285769 == TX Byte 1 ==
2640 22:16:03.288097 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
2641 22:16:03.294665 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
2642 22:16:03.295222
2643 22:16:03.295593 [DATLAT]
2644 22:16:03.295948 Freq=1200, CH0 RK0
2645 22:16:03.296285
2646 22:16:03.298702 DATLAT Default: 0xd
2647 22:16:03.299317 0, 0xFFFF, sum = 0
2648 22:16:03.301095 1, 0xFFFF, sum = 0
2649 22:16:03.304523 2, 0xFFFF, sum = 0
2650 22:16:03.304952 3, 0xFFFF, sum = 0
2651 22:16:03.308044 4, 0xFFFF, sum = 0
2652 22:16:03.308591 5, 0xFFFF, sum = 0
2653 22:16:03.311066 6, 0xFFFF, sum = 0
2654 22:16:03.311550 7, 0xFFFF, sum = 0
2655 22:16:03.314863 8, 0xFFFF, sum = 0
2656 22:16:03.315445 9, 0xFFFF, sum = 0
2657 22:16:03.317865 10, 0xFFFF, sum = 0
2658 22:16:03.318302 11, 0xFFFF, sum = 0
2659 22:16:03.321366 12, 0x0, sum = 1
2660 22:16:03.321903 13, 0x0, sum = 2
2661 22:16:03.325301 14, 0x0, sum = 3
2662 22:16:03.325898 15, 0x0, sum = 4
2663 22:16:03.327827 best_step = 13
2664 22:16:03.328297
2665 22:16:03.328668 ==
2666 22:16:03.331388 Dram Type= 6, Freq= 0, CH_0, rank 0
2667 22:16:03.334684 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2668 22:16:03.335311 ==
2669 22:16:03.335706 RX Vref Scan: 1
2670 22:16:03.338316
2671 22:16:03.338877 Set Vref Range= 32 -> 127
2672 22:16:03.339285
2673 22:16:03.341562 RX Vref 32 -> 127, step: 1
2674 22:16:03.342131
2675 22:16:03.345169 RX Delay -21 -> 252, step: 4
2676 22:16:03.345751
2677 22:16:03.347952 Set Vref, RX VrefLevel [Byte0]: 32
2678 22:16:03.351541 [Byte1]: 32
2679 22:16:03.352106
2680 22:16:03.355262 Set Vref, RX VrefLevel [Byte0]: 33
2681 22:16:03.357501 [Byte1]: 33
2682 22:16:03.361469
2683 22:16:03.361917 Set Vref, RX VrefLevel [Byte0]: 34
2684 22:16:03.364844 [Byte1]: 34
2685 22:16:03.369418
2686 22:16:03.369841 Set Vref, RX VrefLevel [Byte0]: 35
2687 22:16:03.372427 [Byte1]: 35
2688 22:16:03.377467
2689 22:16:03.378020 Set Vref, RX VrefLevel [Byte0]: 36
2690 22:16:03.380360 [Byte1]: 36
2691 22:16:03.385075
2692 22:16:03.385591 Set Vref, RX VrefLevel [Byte0]: 37
2693 22:16:03.388327 [Byte1]: 37
2694 22:16:03.393100
2695 22:16:03.396372 Set Vref, RX VrefLevel [Byte0]: 38
2696 22:16:03.396845 [Byte1]: 38
2697 22:16:03.400984
2698 22:16:03.401546 Set Vref, RX VrefLevel [Byte0]: 39
2699 22:16:03.404339 [Byte1]: 39
2700 22:16:03.408775
2701 22:16:03.409369 Set Vref, RX VrefLevel [Byte0]: 40
2702 22:16:03.411872 [Byte1]: 40
2703 22:16:03.416882
2704 22:16:03.417405 Set Vref, RX VrefLevel [Byte0]: 41
2705 22:16:03.420276 [Byte1]: 41
2706 22:16:03.425280
2707 22:16:03.425718 Set Vref, RX VrefLevel [Byte0]: 42
2708 22:16:03.428578 [Byte1]: 42
2709 22:16:03.433118
2710 22:16:03.433645 Set Vref, RX VrefLevel [Byte0]: 43
2711 22:16:03.435703 [Byte1]: 43
2712 22:16:03.441251
2713 22:16:03.441773 Set Vref, RX VrefLevel [Byte0]: 44
2714 22:16:03.443722 [Byte1]: 44
2715 22:16:03.449283
2716 22:16:03.449815 Set Vref, RX VrefLevel [Byte0]: 45
2717 22:16:03.452188 [Byte1]: 45
2718 22:16:03.456802
2719 22:16:03.457328 Set Vref, RX VrefLevel [Byte0]: 46
2720 22:16:03.459841 [Byte1]: 46
2721 22:16:03.464443
2722 22:16:03.464968 Set Vref, RX VrefLevel [Byte0]: 47
2723 22:16:03.467745 [Byte1]: 47
2724 22:16:03.472418
2725 22:16:03.472932 Set Vref, RX VrefLevel [Byte0]: 48
2726 22:16:03.475366 [Byte1]: 48
2727 22:16:03.480325
2728 22:16:03.480787 Set Vref, RX VrefLevel [Byte0]: 49
2729 22:16:03.483546 [Byte1]: 49
2730 22:16:03.487956
2731 22:16:03.488434 Set Vref, RX VrefLevel [Byte0]: 50
2732 22:16:03.491526 [Byte1]: 50
2733 22:16:03.496424
2734 22:16:03.496873 Set Vref, RX VrefLevel [Byte0]: 51
2735 22:16:03.499527 [Byte1]: 51
2736 22:16:03.504731
2737 22:16:03.505151 Set Vref, RX VrefLevel [Byte0]: 52
2738 22:16:03.507132 [Byte1]: 52
2739 22:16:03.511744
2740 22:16:03.512170 Set Vref, RX VrefLevel [Byte0]: 53
2741 22:16:03.515289 [Byte1]: 53
2742 22:16:03.520632
2743 22:16:03.521151 Set Vref, RX VrefLevel [Byte0]: 54
2744 22:16:03.523231 [Byte1]: 54
2745 22:16:03.527819
2746 22:16:03.528357 Set Vref, RX VrefLevel [Byte0]: 55
2747 22:16:03.531825 [Byte1]: 55
2748 22:16:03.536333
2749 22:16:03.536853 Set Vref, RX VrefLevel [Byte0]: 56
2750 22:16:03.538820 [Byte1]: 56
2751 22:16:03.544075
2752 22:16:03.544595 Set Vref, RX VrefLevel [Byte0]: 57
2753 22:16:03.546971 [Byte1]: 57
2754 22:16:03.551927
2755 22:16:03.552400 Set Vref, RX VrefLevel [Byte0]: 58
2756 22:16:03.554665 [Byte1]: 58
2757 22:16:03.559629
2758 22:16:03.560045 Set Vref, RX VrefLevel [Byte0]: 59
2759 22:16:03.563005 [Byte1]: 59
2760 22:16:03.567522
2761 22:16:03.568053 Set Vref, RX VrefLevel [Byte0]: 60
2762 22:16:03.570599 [Byte1]: 60
2763 22:16:03.575424
2764 22:16:03.575844 Set Vref, RX VrefLevel [Byte0]: 61
2765 22:16:03.578652 [Byte1]: 61
2766 22:16:03.582933
2767 22:16:03.583375 Set Vref, RX VrefLevel [Byte0]: 62
2768 22:16:03.586787 [Byte1]: 62
2769 22:16:03.590921
2770 22:16:03.591374 Set Vref, RX VrefLevel [Byte0]: 63
2771 22:16:03.594141 [Byte1]: 63
2772 22:16:03.598753
2773 22:16:03.599204 Set Vref, RX VrefLevel [Byte0]: 64
2774 22:16:03.602326 [Byte1]: 64
2775 22:16:03.606854
2776 22:16:03.607306 Set Vref, RX VrefLevel [Byte0]: 65
2777 22:16:03.610519 [Byte1]: 65
2778 22:16:03.615300
2779 22:16:03.615724 Set Vref, RX VrefLevel [Byte0]: 66
2780 22:16:03.618450 [Byte1]: 66
2781 22:16:03.622882
2782 22:16:03.623468 Set Vref, RX VrefLevel [Byte0]: 67
2783 22:16:03.626373 [Byte1]: 67
2784 22:16:03.630854
2785 22:16:03.631441 Final RX Vref Byte 0 = 53 to rank0
2786 22:16:03.634554 Final RX Vref Byte 1 = 49 to rank0
2787 22:16:03.637615 Final RX Vref Byte 0 = 53 to rank1
2788 22:16:03.641696 Final RX Vref Byte 1 = 49 to rank1==
2789 22:16:03.643880 Dram Type= 6, Freq= 0, CH_0, rank 0
2790 22:16:03.651217 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2791 22:16:03.651800 ==
2792 22:16:03.652179 DQS Delay:
2793 22:16:03.652527 DQS0 = 0, DQS1 = 0
2794 22:16:03.654302 DQM Delay:
2795 22:16:03.654873 DQM0 = 117, DQM1 = 104
2796 22:16:03.657329 DQ Delay:
2797 22:16:03.661105 DQ0 =118, DQ1 =116, DQ2 =114, DQ3 =114
2798 22:16:03.664325 DQ4 =118, DQ5 =110, DQ6 =124, DQ7 =122
2799 22:16:03.667727 DQ8 =92, DQ9 =90, DQ10 =104, DQ11 =98
2800 22:16:03.670393 DQ12 =112, DQ13 =108, DQ14 =116, DQ15 =112
2801 22:16:03.670961
2802 22:16:03.671374
2803 22:16:03.680393 [DQSOSCAuto] RK0, (LSB)MR18= 0xfb, (MSB)MR19= 0x403, tDQSOscB0 = 412 ps tDQSOscB1 = 410 ps
2804 22:16:03.680968 CH0 RK0: MR19=403, MR18=FB
2805 22:16:03.686607 CH0_RK0: MR19=0x403, MR18=0xFB, DQSOSC=410, MR23=63, INC=39, DEC=26
2806 22:16:03.687168
2807 22:16:03.690085 ----->DramcWriteLeveling(PI) begin...
2808 22:16:03.690559 ==
2809 22:16:03.695140 Dram Type= 6, Freq= 0, CH_0, rank 1
2810 22:16:03.697535 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2811 22:16:03.700156 ==
2812 22:16:03.700599 Write leveling (Byte 0): 34 => 34
2813 22:16:03.703490 Write leveling (Byte 1): 26 => 26
2814 22:16:03.707102 DramcWriteLeveling(PI) end<-----
2815 22:16:03.707565
2816 22:16:03.707906 ==
2817 22:16:03.710234 Dram Type= 6, Freq= 0, CH_0, rank 1
2818 22:16:03.717041 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2819 22:16:03.717576 ==
2820 22:16:03.717922 [Gating] SW mode calibration
2821 22:16:03.726683 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2822 22:16:03.730302 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2823 22:16:03.733710 0 15 0 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
2824 22:16:03.740181 0 15 4 | B1->B0 | 3232 3434 | 1 1 | (1 1) (1 1)
2825 22:16:03.744094 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2826 22:16:03.747433 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2827 22:16:03.753582 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2828 22:16:03.756630 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2829 22:16:03.760015 0 15 24 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 1)
2830 22:16:03.767072 0 15 28 | B1->B0 | 3333 2424 | 1 0 | (1 1) (0 0)
2831 22:16:03.770663 1 0 0 | B1->B0 | 2525 2323 | 0 0 | (1 0) (0 0)
2832 22:16:03.773778 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2833 22:16:03.780141 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2834 22:16:03.783967 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2835 22:16:03.786810 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2836 22:16:03.793314 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2837 22:16:03.796471 1 0 24 | B1->B0 | 2323 3a3a | 0 0 | (0 0) (0 0)
2838 22:16:03.799424 1 0 28 | B1->B0 | 2929 4545 | 0 0 | (0 0) (0 0)
2839 22:16:03.806678 1 1 0 | B1->B0 | 4343 4646 | 0 0 | (0 0) (0 0)
2840 22:16:03.809525 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2841 22:16:03.812782 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2842 22:16:03.820101 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2843 22:16:03.823405 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2844 22:16:03.826420 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2845 22:16:03.833697 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2846 22:16:03.836205 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2847 22:16:03.840752 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2848 22:16:03.846332 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2849 22:16:03.849860 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2850 22:16:03.852926 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2851 22:16:03.859693 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2852 22:16:03.863071 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2853 22:16:03.866485 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2854 22:16:03.869861 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2855 22:16:03.876602 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2856 22:16:03.880376 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2857 22:16:03.883340 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2858 22:16:03.889755 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2859 22:16:03.892875 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2860 22:16:03.896066 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2861 22:16:03.902639 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2862 22:16:03.906065 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2863 22:16:03.909127 Total UI for P1: 0, mck2ui 16
2864 22:16:03.912330 best dqsien dly found for B0: ( 1, 3, 24)
2865 22:16:03.916227 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2866 22:16:03.922445 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2867 22:16:03.925612 Total UI for P1: 0, mck2ui 16
2868 22:16:03.928824 best dqsien dly found for B1: ( 1, 3, 30)
2869 22:16:03.932736 best DQS0 dly(MCK, UI, PI) = (1, 3, 24)
2870 22:16:03.936210 best DQS1 dly(MCK, UI, PI) = (1, 3, 30)
2871 22:16:03.936680
2872 22:16:03.939070 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 24)
2873 22:16:03.942244 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 30)
2874 22:16:03.945821 [Gating] SW calibration Done
2875 22:16:03.946395 ==
2876 22:16:03.949290 Dram Type= 6, Freq= 0, CH_0, rank 1
2877 22:16:03.952079 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2878 22:16:03.952617 ==
2879 22:16:03.955707 RX Vref Scan: 0
2880 22:16:03.956279
2881 22:16:03.958702 RX Vref 0 -> 0, step: 1
2882 22:16:03.959190
2883 22:16:03.959576 RX Delay -40 -> 252, step: 8
2884 22:16:03.965677 iDelay=200, Bit 0, Center 111 (40 ~ 183) 144
2885 22:16:03.968725 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2886 22:16:03.972109 iDelay=200, Bit 2, Center 111 (40 ~ 183) 144
2887 22:16:03.975914 iDelay=200, Bit 3, Center 111 (40 ~ 183) 144
2888 22:16:03.979134 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
2889 22:16:03.986680 iDelay=200, Bit 5, Center 107 (32 ~ 183) 152
2890 22:16:03.988920 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2891 22:16:03.992077 iDelay=200, Bit 7, Center 119 (48 ~ 191) 144
2892 22:16:03.995462 iDelay=200, Bit 8, Center 95 (24 ~ 167) 144
2893 22:16:03.998598 iDelay=200, Bit 9, Center 95 (24 ~ 167) 144
2894 22:16:04.005156 iDelay=200, Bit 10, Center 107 (40 ~ 175) 136
2895 22:16:04.008798 iDelay=200, Bit 11, Center 103 (32 ~ 175) 144
2896 22:16:04.011934 iDelay=200, Bit 12, Center 115 (48 ~ 183) 136
2897 22:16:04.014917 iDelay=200, Bit 13, Center 111 (40 ~ 183) 144
2898 22:16:04.018610 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
2899 22:16:04.025544 iDelay=200, Bit 15, Center 115 (48 ~ 183) 136
2900 22:16:04.026117 ==
2901 22:16:04.028173 Dram Type= 6, Freq= 0, CH_0, rank 1
2902 22:16:04.031524 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2903 22:16:04.031997 ==
2904 22:16:04.032369 DQS Delay:
2905 22:16:04.034825 DQS0 = 0, DQS1 = 0
2906 22:16:04.035603 DQM Delay:
2907 22:16:04.038689 DQM0 = 115, DQM1 = 107
2908 22:16:04.039153 DQ Delay:
2909 22:16:04.042007 DQ0 =111, DQ1 =119, DQ2 =111, DQ3 =111
2910 22:16:04.045421 DQ4 =119, DQ5 =107, DQ6 =127, DQ7 =119
2911 22:16:04.048361 DQ8 =95, DQ9 =95, DQ10 =107, DQ11 =103
2912 22:16:04.051564 DQ12 =115, DQ13 =111, DQ14 =119, DQ15 =115
2913 22:16:04.052143
2914 22:16:04.054956
2915 22:16:04.055585 ==
2916 22:16:04.058554 Dram Type= 6, Freq= 0, CH_0, rank 1
2917 22:16:04.061817 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2918 22:16:04.062387 ==
2919 22:16:04.062761
2920 22:16:04.063110
2921 22:16:04.065084 TX Vref Scan disable
2922 22:16:04.065653 == TX Byte 0 ==
2923 22:16:04.071114 Update DQ dly =853 (3 ,2, 21) DQ OEN =(2 ,7)
2924 22:16:04.075002 Update DQM dly =853 (3 ,2, 21) DQM OEN =(2 ,7)
2925 22:16:04.075623 == TX Byte 1 ==
2926 22:16:04.081675 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
2927 22:16:04.084558 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
2928 22:16:04.085038 ==
2929 22:16:04.088595 Dram Type= 6, Freq= 0, CH_0, rank 1
2930 22:16:04.091513 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2931 22:16:04.092081 ==
2932 22:16:04.104561 TX Vref=22, minBit 13, minWin=25, winSum=418
2933 22:16:04.108086 TX Vref=24, minBit 12, minWin=25, winSum=420
2934 22:16:04.110857 TX Vref=26, minBit 10, minWin=25, winSum=423
2935 22:16:04.114220 TX Vref=28, minBit 2, minWin=26, winSum=426
2936 22:16:04.118111 TX Vref=30, minBit 2, minWin=26, winSum=427
2937 22:16:04.124101 TX Vref=32, minBit 4, minWin=26, winSum=428
2938 22:16:04.127554 [TxChooseVref] Worse bit 4, Min win 26, Win sum 428, Final Vref 32
2939 22:16:04.128316
2940 22:16:04.131280 Final TX Range 1 Vref 32
2941 22:16:04.131882
2942 22:16:04.132262 ==
2943 22:16:04.134401 Dram Type= 6, Freq= 0, CH_0, rank 1
2944 22:16:04.137388 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2945 22:16:04.141419 ==
2946 22:16:04.142124
2947 22:16:04.142640
2948 22:16:04.143002 TX Vref Scan disable
2949 22:16:04.144360 == TX Byte 0 ==
2950 22:16:04.148312 Update DQ dly =853 (3 ,2, 21) DQ OEN =(2 ,7)
2951 22:16:04.154164 Update DQM dly =853 (3 ,2, 21) DQM OEN =(2 ,7)
2952 22:16:04.154728 == TX Byte 1 ==
2953 22:16:04.158161 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
2954 22:16:04.164615 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
2955 22:16:04.165191
2956 22:16:04.165565 [DATLAT]
2957 22:16:04.165911 Freq=1200, CH0 RK1
2958 22:16:04.166246
2959 22:16:04.167665 DATLAT Default: 0xd
2960 22:16:04.170725 0, 0xFFFF, sum = 0
2961 22:16:04.171341 1, 0xFFFF, sum = 0
2962 22:16:04.174220 2, 0xFFFF, sum = 0
2963 22:16:04.174650 3, 0xFFFF, sum = 0
2964 22:16:04.178039 4, 0xFFFF, sum = 0
2965 22:16:04.178577 5, 0xFFFF, sum = 0
2966 22:16:04.181483 6, 0xFFFF, sum = 0
2967 22:16:04.182021 7, 0xFFFF, sum = 0
2968 22:16:04.183836 8, 0xFFFF, sum = 0
2969 22:16:04.184266 9, 0xFFFF, sum = 0
2970 22:16:04.187505 10, 0xFFFF, sum = 0
2971 22:16:04.188043 11, 0xFFFF, sum = 0
2972 22:16:04.190391 12, 0x0, sum = 1
2973 22:16:04.190821 13, 0x0, sum = 2
2974 22:16:04.194116 14, 0x0, sum = 3
2975 22:16:04.194663 15, 0x0, sum = 4
2976 22:16:04.197373 best_step = 13
2977 22:16:04.197908
2978 22:16:04.198247 ==
2979 22:16:04.201026 Dram Type= 6, Freq= 0, CH_0, rank 1
2980 22:16:04.204068 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2981 22:16:04.204502 ==
2982 22:16:04.207227 RX Vref Scan: 0
2983 22:16:04.207769
2984 22:16:04.208108 RX Vref 0 -> 0, step: 1
2985 22:16:04.208427
2986 22:16:04.210429 RX Delay -21 -> 252, step: 4
2987 22:16:04.217580 iDelay=195, Bit 0, Center 114 (51 ~ 178) 128
2988 22:16:04.220402 iDelay=195, Bit 1, Center 116 (47 ~ 186) 140
2989 22:16:04.224175 iDelay=195, Bit 2, Center 112 (47 ~ 178) 132
2990 22:16:04.227542 iDelay=195, Bit 3, Center 112 (47 ~ 178) 132
2991 22:16:04.230261 iDelay=195, Bit 4, Center 118 (51 ~ 186) 136
2992 22:16:04.236708 iDelay=195, Bit 5, Center 110 (43 ~ 178) 136
2993 22:16:04.240654 iDelay=195, Bit 6, Center 126 (59 ~ 194) 136
2994 22:16:04.243853 iDelay=195, Bit 7, Center 122 (55 ~ 190) 136
2995 22:16:04.247220 iDelay=195, Bit 8, Center 96 (27 ~ 166) 140
2996 22:16:04.250279 iDelay=195, Bit 9, Center 92 (23 ~ 162) 140
2997 22:16:04.253953 iDelay=195, Bit 10, Center 106 (39 ~ 174) 136
2998 22:16:04.260983 iDelay=195, Bit 11, Center 98 (31 ~ 166) 136
2999 22:16:04.263546 iDelay=195, Bit 12, Center 112 (47 ~ 178) 132
3000 22:16:04.267236 iDelay=195, Bit 13, Center 110 (43 ~ 178) 136
3001 22:16:04.270669 iDelay=195, Bit 14, Center 118 (51 ~ 186) 136
3002 22:16:04.276934 iDelay=195, Bit 15, Center 112 (47 ~ 178) 132
3003 22:16:04.277515 ==
3004 22:16:04.280652 Dram Type= 6, Freq= 0, CH_0, rank 1
3005 22:16:04.283678 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3006 22:16:04.284258 ==
3007 22:16:04.284638 DQS Delay:
3008 22:16:04.287000 DQS0 = 0, DQS1 = 0
3009 22:16:04.287620 DQM Delay:
3010 22:16:04.290096 DQM0 = 116, DQM1 = 105
3011 22:16:04.290571 DQ Delay:
3012 22:16:04.293516 DQ0 =114, DQ1 =116, DQ2 =112, DQ3 =112
3013 22:16:04.297303 DQ4 =118, DQ5 =110, DQ6 =126, DQ7 =122
3014 22:16:04.299997 DQ8 =96, DQ9 =92, DQ10 =106, DQ11 =98
3015 22:16:04.303656 DQ12 =112, DQ13 =110, DQ14 =118, DQ15 =112
3016 22:16:04.304240
3017 22:16:04.304618
3018 22:16:04.313737 [DQSOSCAuto] RK1, (LSB)MR18= 0x1ff, (MSB)MR19= 0x403, tDQSOscB0 = 410 ps tDQSOscB1 = 409 ps
3019 22:16:04.316764 CH0 RK1: MR19=403, MR18=1FF
3020 22:16:04.319858 CH0_RK1: MR19=0x403, MR18=0x1FF, DQSOSC=409, MR23=63, INC=39, DEC=26
3021 22:16:04.323353 [RxdqsGatingPostProcess] freq 1200
3022 22:16:04.330082 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3023 22:16:04.333221 best DQS0 dly(2T, 0.5T) = (0, 11)
3024 22:16:04.336852 best DQS1 dly(2T, 0.5T) = (0, 12)
3025 22:16:04.339951 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3026 22:16:04.343354 best DQS1 P1 dly(2T, 0.5T) = (1, 0)
3027 22:16:04.346919 best DQS0 dly(2T, 0.5T) = (0, 11)
3028 22:16:04.350040 best DQS1 dly(2T, 0.5T) = (0, 11)
3029 22:16:04.353112 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3030 22:16:04.356440 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3031 22:16:04.356916 Pre-setting of DQS Precalculation
3032 22:16:04.363669 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3033 22:16:04.364145 ==
3034 22:16:04.366089 Dram Type= 6, Freq= 0, CH_1, rank 0
3035 22:16:04.369808 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3036 22:16:04.370403 ==
3037 22:16:04.376087 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3038 22:16:04.383014 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
3039 22:16:04.391393 [CA 0] Center 38 (8~68) winsize 61
3040 22:16:04.394222 [CA 1] Center 37 (7~68) winsize 62
3041 22:16:04.397234 [CA 2] Center 35 (5~65) winsize 61
3042 22:16:04.400938 [CA 3] Center 34 (5~64) winsize 60
3043 22:16:04.404271 [CA 4] Center 35 (5~65) winsize 61
3044 22:16:04.406983 [CA 5] Center 34 (4~64) winsize 61
3045 22:16:04.407472
3046 22:16:04.410625 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3047 22:16:04.411231
3048 22:16:04.413709 [CATrainingPosCal] consider 1 rank data
3049 22:16:04.416745 u2DelayCellTimex100 = 270/100 ps
3050 22:16:04.420212 CA0 delay=38 (8~68),Diff = 4 PI (19 cell)
3051 22:16:04.424020 CA1 delay=37 (7~68),Diff = 3 PI (14 cell)
3052 22:16:04.430364 CA2 delay=35 (5~65),Diff = 1 PI (4 cell)
3053 22:16:04.433631 CA3 delay=34 (5~64),Diff = 0 PI (0 cell)
3054 22:16:04.436648 CA4 delay=35 (5~65),Diff = 1 PI (4 cell)
3055 22:16:04.440750 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
3056 22:16:04.441233
3057 22:16:04.443561 CA PerBit enable=1, Macro0, CA PI delay=34
3058 22:16:04.443987
3059 22:16:04.446985 [CBTSetCACLKResult] CA Dly = 34
3060 22:16:04.447542 CS Dly: 4 (0~35)
3061 22:16:04.450248 ==
3062 22:16:04.453694 Dram Type= 6, Freq= 0, CH_1, rank 1
3063 22:16:04.456629 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3064 22:16:04.457063 ==
3065 22:16:04.459955 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3066 22:16:04.466749 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
3067 22:16:04.476541 [CA 0] Center 37 (7~68) winsize 62
3068 22:16:04.480106 [CA 1] Center 38 (8~68) winsize 61
3069 22:16:04.482854 [CA 2] Center 35 (5~65) winsize 61
3070 22:16:04.486387 [CA 3] Center 33 (3~63) winsize 61
3071 22:16:04.489839 [CA 4] Center 33 (3~64) winsize 62
3072 22:16:04.493649 [CA 5] Center 33 (3~64) winsize 62
3073 22:16:04.494214
3074 22:16:04.496336 [CmdBusTrainingLP45] Vref(ca) range 1: 33
3075 22:16:04.496899
3076 22:16:04.499541 [CATrainingPosCal] consider 2 rank data
3077 22:16:04.503127 u2DelayCellTimex100 = 270/100 ps
3078 22:16:04.506028 CA0 delay=38 (8~68),Diff = 4 PI (19 cell)
3079 22:16:04.512306 CA1 delay=38 (8~68),Diff = 4 PI (19 cell)
3080 22:16:04.515826 CA2 delay=35 (5~65),Diff = 1 PI (4 cell)
3081 22:16:04.519804 CA3 delay=34 (5~63),Diff = 0 PI (0 cell)
3082 22:16:04.522519 CA4 delay=34 (5~64),Diff = 0 PI (0 cell)
3083 22:16:04.525781 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
3084 22:16:04.526248
3085 22:16:04.528988 CA PerBit enable=1, Macro0, CA PI delay=34
3086 22:16:04.529456
3087 22:16:04.532532 [CBTSetCACLKResult] CA Dly = 34
3088 22:16:04.533099 CS Dly: 5 (0~38)
3089 22:16:04.535627
3090 22:16:04.539309 ----->DramcWriteLeveling(PI) begin...
3091 22:16:04.539947 ==
3092 22:16:04.542299 Dram Type= 6, Freq= 0, CH_1, rank 0
3093 22:16:04.545623 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3094 22:16:04.546200 ==
3095 22:16:04.548786 Write leveling (Byte 0): 25 => 25
3096 22:16:04.552084 Write leveling (Byte 1): 26 => 26
3097 22:16:04.555477 DramcWriteLeveling(PI) end<-----
3098 22:16:04.555946
3099 22:16:04.556311 ==
3100 22:16:04.559102 Dram Type= 6, Freq= 0, CH_1, rank 0
3101 22:16:04.561771 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3102 22:16:04.562242 ==
3103 22:16:04.565207 [Gating] SW mode calibration
3104 22:16:04.571748 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3105 22:16:04.578263 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3106 22:16:04.581991 0 15 0 | B1->B0 | 3333 3434 | 0 1 | (0 0) (1 1)
3107 22:16:04.585054 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3108 22:16:04.591865 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3109 22:16:04.595454 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3110 22:16:04.598494 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3111 22:16:04.604962 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3112 22:16:04.608057 0 15 24 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
3113 22:16:04.611571 0 15 28 | B1->B0 | 2929 2323 | 0 0 | (0 0) (0 0)
3114 22:16:04.617860 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3115 22:16:04.621321 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3116 22:16:04.624628 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3117 22:16:04.631615 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3118 22:16:04.634336 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3119 22:16:04.637902 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3120 22:16:04.644464 1 0 24 | B1->B0 | 2424 2626 | 0 0 | (0 0) (0 0)
3121 22:16:04.647787 1 0 28 | B1->B0 | 3a3a 4646 | 0 0 | (0 0) (0 0)
3122 22:16:04.651272 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3123 22:16:04.657860 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3124 22:16:04.660713 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3125 22:16:04.664887 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3126 22:16:04.671355 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3127 22:16:04.673994 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3128 22:16:04.677354 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3129 22:16:04.684247 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3130 22:16:04.687420 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3131 22:16:04.690976 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3132 22:16:04.697575 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3133 22:16:04.700576 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3134 22:16:04.704287 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3135 22:16:04.711053 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3136 22:16:04.713948 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3137 22:16:04.717359 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3138 22:16:04.723843 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3139 22:16:04.727887 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3140 22:16:04.730591 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3141 22:16:04.737261 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3142 22:16:04.740517 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3143 22:16:04.743877 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3144 22:16:04.750204 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3145 22:16:04.753837 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3146 22:16:04.757488 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3147 22:16:04.760182 Total UI for P1: 0, mck2ui 16
3148 22:16:04.763863 best dqsien dly found for B0: ( 1, 3, 26)
3149 22:16:04.767257 Total UI for P1: 0, mck2ui 16
3150 22:16:04.770623 best dqsien dly found for B1: ( 1, 3, 26)
3151 22:16:04.773905 best DQS0 dly(MCK, UI, PI) = (1, 3, 26)
3152 22:16:04.776917 best DQS1 dly(MCK, UI, PI) = (1, 3, 26)
3153 22:16:04.777388
3154 22:16:04.779866 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 26)
3155 22:16:04.786784 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 26)
3156 22:16:04.787340 [Gating] SW calibration Done
3157 22:16:04.787729 ==
3158 22:16:04.790369 Dram Type= 6, Freq= 0, CH_1, rank 0
3159 22:16:04.796727 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3160 22:16:04.797291 ==
3161 22:16:04.797672 RX Vref Scan: 0
3162 22:16:04.798025
3163 22:16:04.800391 RX Vref 0 -> 0, step: 1
3164 22:16:04.800958
3165 22:16:04.803531 RX Delay -40 -> 252, step: 8
3166 22:16:04.806892 iDelay=200, Bit 0, Center 123 (48 ~ 199) 152
3167 22:16:04.810689 iDelay=200, Bit 1, Center 111 (40 ~ 183) 144
3168 22:16:04.813565 iDelay=200, Bit 2, Center 103 (32 ~ 175) 144
3169 22:16:04.819879 iDelay=200, Bit 3, Center 115 (40 ~ 191) 152
3170 22:16:04.823943 iDelay=200, Bit 4, Center 111 (40 ~ 183) 144
3171 22:16:04.826577 iDelay=200, Bit 5, Center 123 (48 ~ 199) 152
3172 22:16:04.830216 iDelay=200, Bit 6, Center 123 (48 ~ 199) 152
3173 22:16:04.833372 iDelay=200, Bit 7, Center 111 (40 ~ 183) 144
3174 22:16:04.839752 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
3175 22:16:04.843403 iDelay=200, Bit 9, Center 103 (32 ~ 175) 144
3176 22:16:04.846616 iDelay=200, Bit 10, Center 111 (40 ~ 183) 144
3177 22:16:04.849937 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
3178 22:16:04.853275 iDelay=200, Bit 12, Center 123 (56 ~ 191) 136
3179 22:16:04.859720 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
3180 22:16:04.863613 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
3181 22:16:04.866534 iDelay=200, Bit 15, Center 119 (48 ~ 191) 144
3182 22:16:04.867104 ==
3183 22:16:04.869802 Dram Type= 6, Freq= 0, CH_1, rank 0
3184 22:16:04.873130 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3185 22:16:04.873745 ==
3186 22:16:04.876073 DQS Delay:
3187 22:16:04.876538 DQS0 = 0, DQS1 = 0
3188 22:16:04.880063 DQM Delay:
3189 22:16:04.880627 DQM0 = 115, DQM1 = 112
3190 22:16:04.883154 DQ Delay:
3191 22:16:04.886501 DQ0 =123, DQ1 =111, DQ2 =103, DQ3 =115
3192 22:16:04.890036 DQ4 =111, DQ5 =123, DQ6 =123, DQ7 =111
3193 22:16:04.893055 DQ8 =99, DQ9 =103, DQ10 =111, DQ11 =107
3194 22:16:04.896461 DQ12 =123, DQ13 =119, DQ14 =119, DQ15 =119
3195 22:16:04.897037
3196 22:16:04.897410
3197 22:16:04.897792 ==
3198 22:16:04.899692 Dram Type= 6, Freq= 0, CH_1, rank 0
3199 22:16:04.903384 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3200 22:16:04.903952 ==
3201 22:16:04.904328
3202 22:16:04.904672
3203 22:16:04.906910 TX Vref Scan disable
3204 22:16:04.909640 == TX Byte 0 ==
3205 22:16:04.913231 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3206 22:16:04.916305 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3207 22:16:04.919746 == TX Byte 1 ==
3208 22:16:04.922956 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3209 22:16:04.926073 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3210 22:16:04.926646 ==
3211 22:16:04.929739 Dram Type= 6, Freq= 0, CH_1, rank 0
3212 22:16:04.936711 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3213 22:16:04.937289 ==
3214 22:16:04.946115 TX Vref=22, minBit 9, minWin=24, winSum=409
3215 22:16:04.949307 TX Vref=24, minBit 3, minWin=25, winSum=416
3216 22:16:04.952852 TX Vref=26, minBit 3, minWin=25, winSum=420
3217 22:16:04.956347 TX Vref=28, minBit 9, minWin=24, winSum=423
3218 22:16:04.959577 TX Vref=30, minBit 9, minWin=25, winSum=424
3219 22:16:04.962608 TX Vref=32, minBit 9, minWin=25, winSum=421
3220 22:16:04.970549 [TxChooseVref] Worse bit 9, Min win 25, Win sum 424, Final Vref 30
3221 22:16:04.971163
3222 22:16:04.972943 Final TX Range 1 Vref 30
3223 22:16:04.973411
3224 22:16:04.973776 ==
3225 22:16:04.975801 Dram Type= 6, Freq= 0, CH_1, rank 0
3226 22:16:04.979098 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3227 22:16:04.979605 ==
3228 22:16:04.979978
3229 22:16:04.982844
3230 22:16:04.983472 TX Vref Scan disable
3231 22:16:04.986019 == TX Byte 0 ==
3232 22:16:04.989421 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
3233 22:16:04.992807 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
3234 22:16:04.995700 == TX Byte 1 ==
3235 22:16:04.998925 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3236 22:16:05.002705 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3237 22:16:05.005660
3238 22:16:05.006123 [DATLAT]
3239 22:16:05.006490 Freq=1200, CH1 RK0
3240 22:16:05.006842
3241 22:16:05.009143 DATLAT Default: 0xd
3242 22:16:05.009610 0, 0xFFFF, sum = 0
3243 22:16:05.012374 1, 0xFFFF, sum = 0
3244 22:16:05.012848 2, 0xFFFF, sum = 0
3245 22:16:05.016077 3, 0xFFFF, sum = 0
3246 22:16:05.016861 4, 0xFFFF, sum = 0
3247 22:16:05.019445 5, 0xFFFF, sum = 0
3248 22:16:05.022257 6, 0xFFFF, sum = 0
3249 22:16:05.022731 7, 0xFFFF, sum = 0
3250 22:16:05.025711 8, 0xFFFF, sum = 0
3251 22:16:05.026300 9, 0xFFFF, sum = 0
3252 22:16:05.029147 10, 0xFFFF, sum = 0
3253 22:16:05.029728 11, 0xFFFF, sum = 0
3254 22:16:05.032466 12, 0x0, sum = 1
3255 22:16:05.033042 13, 0x0, sum = 2
3256 22:16:05.035644 14, 0x0, sum = 3
3257 22:16:05.036118 15, 0x0, sum = 4
3258 22:16:05.036494 best_step = 13
3259 22:16:05.038880
3260 22:16:05.039403 ==
3261 22:16:05.042326 Dram Type= 6, Freq= 0, CH_1, rank 0
3262 22:16:05.045432 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3263 22:16:05.045906 ==
3264 22:16:05.046279 RX Vref Scan: 1
3265 22:16:05.046628
3266 22:16:05.049288 Set Vref Range= 32 -> 127
3267 22:16:05.049748
3268 22:16:05.052372 RX Vref 32 -> 127, step: 1
3269 22:16:05.052968
3270 22:16:05.055575 RX Delay -13 -> 252, step: 4
3271 22:16:05.056152
3272 22:16:05.058713 Set Vref, RX VrefLevel [Byte0]: 32
3273 22:16:05.062207 [Byte1]: 32
3274 22:16:05.062677
3275 22:16:05.065382 Set Vref, RX VrefLevel [Byte0]: 33
3276 22:16:05.069080 [Byte1]: 33
3277 22:16:05.072029
3278 22:16:05.072576 Set Vref, RX VrefLevel [Byte0]: 34
3279 22:16:05.075545 [Byte1]: 34
3280 22:16:05.080084
3281 22:16:05.080506 Set Vref, RX VrefLevel [Byte0]: 35
3282 22:16:05.083730 [Byte1]: 35
3283 22:16:05.088083
3284 22:16:05.088663 Set Vref, RX VrefLevel [Byte0]: 36
3285 22:16:05.091288 [Byte1]: 36
3286 22:16:05.095792
3287 22:16:05.096483 Set Vref, RX VrefLevel [Byte0]: 37
3288 22:16:05.099163 [Byte1]: 37
3289 22:16:05.103891
3290 22:16:05.104465 Set Vref, RX VrefLevel [Byte0]: 38
3291 22:16:05.107015 [Byte1]: 38
3292 22:16:05.111741
3293 22:16:05.112345 Set Vref, RX VrefLevel [Byte0]: 39
3294 22:16:05.114619 [Byte1]: 39
3295 22:16:05.119336
3296 22:16:05.119778 Set Vref, RX VrefLevel [Byte0]: 40
3297 22:16:05.122646 [Byte1]: 40
3298 22:16:05.126929
3299 22:16:05.127376 Set Vref, RX VrefLevel [Byte0]: 41
3300 22:16:05.130717 [Byte1]: 41
3301 22:16:05.135529
3302 22:16:05.136036 Set Vref, RX VrefLevel [Byte0]: 42
3303 22:16:05.138854 [Byte1]: 42
3304 22:16:05.142933
3305 22:16:05.143495 Set Vref, RX VrefLevel [Byte0]: 43
3306 22:16:05.146154 [Byte1]: 43
3307 22:16:05.150671
3308 22:16:05.151082 Set Vref, RX VrefLevel [Byte0]: 44
3309 22:16:05.154385 [Byte1]: 44
3310 22:16:05.159344
3311 22:16:05.159876 Set Vref, RX VrefLevel [Byte0]: 45
3312 22:16:05.162018 [Byte1]: 45
3313 22:16:05.166574
3314 22:16:05.167319 Set Vref, RX VrefLevel [Byte0]: 46
3315 22:16:05.170151 [Byte1]: 46
3316 22:16:05.174250
3317 22:16:05.174659 Set Vref, RX VrefLevel [Byte0]: 47
3318 22:16:05.178255 [Byte1]: 47
3319 22:16:05.182972
3320 22:16:05.183560 Set Vref, RX VrefLevel [Byte0]: 48
3321 22:16:05.185947 [Byte1]: 48
3322 22:16:05.190257
3323 22:16:05.190842 Set Vref, RX VrefLevel [Byte0]: 49
3324 22:16:05.193851 [Byte1]: 49
3325 22:16:05.198764
3326 22:16:05.199334 Set Vref, RX VrefLevel [Byte0]: 50
3327 22:16:05.201980 [Byte1]: 50
3328 22:16:05.205823
3329 22:16:05.206278 Set Vref, RX VrefLevel [Byte0]: 51
3330 22:16:05.209019 [Byte1]: 51
3331 22:16:05.214013
3332 22:16:05.214582 Set Vref, RX VrefLevel [Byte0]: 52
3333 22:16:05.217502 [Byte1]: 52
3334 22:16:05.221761
3335 22:16:05.222214 Set Vref, RX VrefLevel [Byte0]: 53
3336 22:16:05.225315 [Byte1]: 53
3337 22:16:05.230610
3338 22:16:05.231159 Set Vref, RX VrefLevel [Byte0]: 54
3339 22:16:05.233046 [Byte1]: 54
3340 22:16:05.237682
3341 22:16:05.238231 Set Vref, RX VrefLevel [Byte0]: 55
3342 22:16:05.240869 [Byte1]: 55
3343 22:16:05.245743
3344 22:16:05.246294 Set Vref, RX VrefLevel [Byte0]: 56
3345 22:16:05.249731 [Byte1]: 56
3346 22:16:05.253618
3347 22:16:05.254172 Set Vref, RX VrefLevel [Byte0]: 57
3348 22:16:05.256791 [Byte1]: 57
3349 22:16:05.261310
3350 22:16:05.261886 Set Vref, RX VrefLevel [Byte0]: 58
3351 22:16:05.265574 [Byte1]: 58
3352 22:16:05.269114
3353 22:16:05.269720 Set Vref, RX VrefLevel [Byte0]: 59
3354 22:16:05.272278 [Byte1]: 59
3355 22:16:05.276953
3356 22:16:05.277502 Set Vref, RX VrefLevel [Byte0]: 60
3357 22:16:05.280677 [Byte1]: 60
3358 22:16:05.285249
3359 22:16:05.285833 Set Vref, RX VrefLevel [Byte0]: 61
3360 22:16:05.288585 [Byte1]: 61
3361 22:16:05.293013
3362 22:16:05.293557 Set Vref, RX VrefLevel [Byte0]: 62
3363 22:16:05.296401 [Byte1]: 62
3364 22:16:05.300559
3365 22:16:05.301119 Set Vref, RX VrefLevel [Byte0]: 63
3366 22:16:05.303690 [Byte1]: 63
3367 22:16:05.308636
3368 22:16:05.309179 Set Vref, RX VrefLevel [Byte0]: 64
3369 22:16:05.312216 [Byte1]: 64
3370 22:16:05.316366
3371 22:16:05.316930 Final RX Vref Byte 0 = 52 to rank0
3372 22:16:05.319444 Final RX Vref Byte 1 = 51 to rank0
3373 22:16:05.322671 Final RX Vref Byte 0 = 52 to rank1
3374 22:16:05.326430 Final RX Vref Byte 1 = 51 to rank1==
3375 22:16:05.329512 Dram Type= 6, Freq= 0, CH_1, rank 0
3376 22:16:05.336809 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3377 22:16:05.337383 ==
3378 22:16:05.337756 DQS Delay:
3379 22:16:05.338101 DQS0 = 0, DQS1 = 0
3380 22:16:05.340292 DQM Delay:
3381 22:16:05.340759 DQM0 = 114, DQM1 = 112
3382 22:16:05.342680 DQ Delay:
3383 22:16:05.346686 DQ0 =118, DQ1 =110, DQ2 =106, DQ3 =114
3384 22:16:05.349928 DQ4 =110, DQ5 =122, DQ6 =126, DQ7 =110
3385 22:16:05.352950 DQ8 =98, DQ9 =104, DQ10 =114, DQ11 =106
3386 22:16:05.356217 DQ12 =120, DQ13 =120, DQ14 =120, DQ15 =120
3387 22:16:05.356782
3388 22:16:05.357151
3389 22:16:05.366425 [DQSOSCAuto] RK0, (LSB)MR18= 0xf1fd, (MSB)MR19= 0x303, tDQSOscB0 = 411 ps tDQSOscB1 = 416 ps
3390 22:16:05.366997 CH1 RK0: MR19=303, MR18=F1FD
3391 22:16:05.374033 CH1_RK0: MR19=0x303, MR18=0xF1FD, DQSOSC=411, MR23=63, INC=38, DEC=25
3392 22:16:05.374603
3393 22:16:05.376447 ----->DramcWriteLeveling(PI) begin...
3394 22:16:05.376918 ==
3395 22:16:05.379422 Dram Type= 6, Freq= 0, CH_1, rank 1
3396 22:16:05.386549 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3397 22:16:05.387121 ==
3398 22:16:05.387549 Write leveling (Byte 0): 26 => 26
3399 22:16:05.389756 Write leveling (Byte 1): 28 => 28
3400 22:16:05.392745 DramcWriteLeveling(PI) end<-----
3401 22:16:05.393212
3402 22:16:05.393579 ==
3403 22:16:05.396176 Dram Type= 6, Freq= 0, CH_1, rank 1
3404 22:16:05.402745 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3405 22:16:05.403337 ==
3406 22:16:05.406015 [Gating] SW mode calibration
3407 22:16:05.413201 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3408 22:16:05.415982 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3409 22:16:05.422657 0 15 0 | B1->B0 | 3333 3434 | 0 1 | (0 0) (1 1)
3410 22:16:05.425889 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3411 22:16:05.429362 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3412 22:16:05.435718 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3413 22:16:05.439575 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3414 22:16:05.442726 0 15 20 | B1->B0 | 3434 3333 | 1 0 | (1 1) (0 0)
3415 22:16:05.449515 0 15 24 | B1->B0 | 3434 2424 | 1 0 | (1 0) (1 0)
3416 22:16:05.452826 0 15 28 | B1->B0 | 2c2c 2323 | 1 0 | (1 0) (0 0)
3417 22:16:05.455725 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3418 22:16:05.462736 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3419 22:16:05.466009 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3420 22:16:05.469854 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3421 22:16:05.472412 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3422 22:16:05.479255 1 0 20 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
3423 22:16:05.482727 1 0 24 | B1->B0 | 2424 4646 | 0 0 | (0 0) (0 0)
3424 22:16:05.485850 1 0 28 | B1->B0 | 3939 4646 | 0 0 | (0 0) (0 0)
3425 22:16:05.492523 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3426 22:16:05.495771 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3427 22:16:05.499097 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3428 22:16:05.505852 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3429 22:16:05.509271 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3430 22:16:05.512126 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3431 22:16:05.518544 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3432 22:16:05.521835 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
3433 22:16:05.525369 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3434 22:16:05.532105 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3435 22:16:05.535251 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3436 22:16:05.539069 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3437 22:16:05.546075 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3438 22:16:05.549071 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3439 22:16:05.551916 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3440 22:16:05.558984 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3441 22:16:05.561656 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3442 22:16:05.565502 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3443 22:16:05.571832 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3444 22:16:05.575200 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3445 22:16:05.578437 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3446 22:16:05.584726 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
3447 22:16:05.588154 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
3448 22:16:05.592108 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
3449 22:16:05.595304 Total UI for P1: 0, mck2ui 16
3450 22:16:05.598238 best dqsien dly found for B0: ( 1, 3, 22)
3451 22:16:05.604804 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3452 22:16:05.605372 Total UI for P1: 0, mck2ui 16
3453 22:16:05.610982 best dqsien dly found for B1: ( 1, 3, 28)
3454 22:16:05.614504 best DQS0 dly(MCK, UI, PI) = (1, 3, 22)
3455 22:16:05.617839 best DQS1 dly(MCK, UI, PI) = (1, 3, 28)
3456 22:16:05.618401
3457 22:16:05.620847 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 22)
3458 22:16:05.624100 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 28)
3459 22:16:05.627310 [Gating] SW calibration Done
3460 22:16:05.627800 ==
3461 22:16:05.631115 Dram Type= 6, Freq= 0, CH_1, rank 1
3462 22:16:05.633873 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3463 22:16:05.634350 ==
3464 22:16:05.637862 RX Vref Scan: 0
3465 22:16:05.638427
3466 22:16:05.638800 RX Vref 0 -> 0, step: 1
3467 22:16:05.640690
3468 22:16:05.641248 RX Delay -40 -> 252, step: 8
3469 22:16:05.647720 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
3470 22:16:05.651217 iDelay=200, Bit 1, Center 111 (40 ~ 183) 144
3471 22:16:05.654419 iDelay=200, Bit 2, Center 103 (32 ~ 175) 144
3472 22:16:05.657402 iDelay=200, Bit 3, Center 111 (40 ~ 183) 144
3473 22:16:05.660317 iDelay=200, Bit 4, Center 115 (40 ~ 191) 152
3474 22:16:05.667147 iDelay=200, Bit 5, Center 127 (56 ~ 199) 144
3475 22:16:05.670315 iDelay=200, Bit 6, Center 119 (48 ~ 191) 144
3476 22:16:05.673740 iDelay=200, Bit 7, Center 115 (40 ~ 191) 152
3477 22:16:05.677144 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
3478 22:16:05.680200 iDelay=200, Bit 9, Center 99 (32 ~ 167) 136
3479 22:16:05.687015 iDelay=200, Bit 10, Center 111 (40 ~ 183) 144
3480 22:16:05.690980 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
3481 22:16:05.694642 iDelay=200, Bit 12, Center 123 (56 ~ 191) 136
3482 22:16:05.696847 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
3483 22:16:05.703570 iDelay=200, Bit 14, Center 115 (48 ~ 183) 136
3484 22:16:05.707068 iDelay=200, Bit 15, Center 119 (48 ~ 191) 144
3485 22:16:05.707669 ==
3486 22:16:05.710464 Dram Type= 6, Freq= 0, CH_1, rank 1
3487 22:16:05.713320 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3488 22:16:05.713891 ==
3489 22:16:05.714268 DQS Delay:
3490 22:16:05.716798 DQS0 = 0, DQS1 = 0
3491 22:16:05.717268 DQM Delay:
3492 22:16:05.719750 DQM0 = 115, DQM1 = 111
3493 22:16:05.720220 DQ Delay:
3494 22:16:05.723249 DQ0 =119, DQ1 =111, DQ2 =103, DQ3 =111
3495 22:16:05.726532 DQ4 =115, DQ5 =127, DQ6 =119, DQ7 =115
3496 22:16:05.729952 DQ8 =99, DQ9 =99, DQ10 =111, DQ11 =107
3497 22:16:05.736427 DQ12 =123, DQ13 =119, DQ14 =115, DQ15 =119
3498 22:16:05.736991
3499 22:16:05.737422
3500 22:16:05.737907 ==
3501 22:16:05.739735 Dram Type= 6, Freq= 0, CH_1, rank 1
3502 22:16:05.743203 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3503 22:16:05.743677 ==
3504 22:16:05.744050
3505 22:16:05.744392
3506 22:16:05.746170 TX Vref Scan disable
3507 22:16:05.746636 == TX Byte 0 ==
3508 22:16:05.753274 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3509 22:16:05.756095 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3510 22:16:05.756663 == TX Byte 1 ==
3511 22:16:05.762735 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3512 22:16:05.766528 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3513 22:16:05.767098 ==
3514 22:16:05.769470 Dram Type= 6, Freq= 0, CH_1, rank 1
3515 22:16:05.773044 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3516 22:16:05.773616 ==
3517 22:16:05.785593 TX Vref=22, minBit 9, minWin=24, winSum=416
3518 22:16:05.788791 TX Vref=24, minBit 9, minWin=25, winSum=423
3519 22:16:05.791757 TX Vref=26, minBit 9, minWin=25, winSum=425
3520 22:16:05.795836 TX Vref=28, minBit 9, minWin=25, winSum=430
3521 22:16:05.798817 TX Vref=30, minBit 9, minWin=25, winSum=429
3522 22:16:05.805327 TX Vref=32, minBit 9, minWin=26, winSum=432
3523 22:16:05.808171 [TxChooseVref] Worse bit 9, Min win 26, Win sum 432, Final Vref 32
3524 22:16:05.808644
3525 22:16:05.811564 Final TX Range 1 Vref 32
3526 22:16:05.812130
3527 22:16:05.812502 ==
3528 22:16:05.815554 Dram Type= 6, Freq= 0, CH_1, rank 1
3529 22:16:05.818481 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3530 22:16:05.821612 ==
3531 22:16:05.822087
3532 22:16:05.822588
3533 22:16:05.823087 TX Vref Scan disable
3534 22:16:05.824573 == TX Byte 0 ==
3535 22:16:05.828298 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3536 22:16:05.834860 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3537 22:16:05.835459 == TX Byte 1 ==
3538 22:16:05.837945 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3539 22:16:05.844894 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3540 22:16:05.845534
3541 22:16:05.845916 [DATLAT]
3542 22:16:05.846264 Freq=1200, CH1 RK1
3543 22:16:05.846605
3544 22:16:05.848390 DATLAT Default: 0xd
3545 22:16:05.851626 0, 0xFFFF, sum = 0
3546 22:16:05.852209 1, 0xFFFF, sum = 0
3547 22:16:05.854612 2, 0xFFFF, sum = 0
3548 22:16:05.855084 3, 0xFFFF, sum = 0
3549 22:16:05.858020 4, 0xFFFF, sum = 0
3550 22:16:05.858601 5, 0xFFFF, sum = 0
3551 22:16:05.861166 6, 0xFFFF, sum = 0
3552 22:16:05.861645 7, 0xFFFF, sum = 0
3553 22:16:05.864877 8, 0xFFFF, sum = 0
3554 22:16:05.865351 9, 0xFFFF, sum = 0
3555 22:16:05.867906 10, 0xFFFF, sum = 0
3556 22:16:05.868477 11, 0xFFFF, sum = 0
3557 22:16:05.871449 12, 0x0, sum = 1
3558 22:16:05.871920 13, 0x0, sum = 2
3559 22:16:05.874836 14, 0x0, sum = 3
3560 22:16:05.875437 15, 0x0, sum = 4
3561 22:16:05.877971 best_step = 13
3562 22:16:05.878617
3563 22:16:05.879007 ==
3564 22:16:05.880906 Dram Type= 6, Freq= 0, CH_1, rank 1
3565 22:16:05.884734 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3566 22:16:05.885308 ==
3567 22:16:05.887511 RX Vref Scan: 0
3568 22:16:05.887978
3569 22:16:05.888345 RX Vref 0 -> 0, step: 1
3570 22:16:05.888691
3571 22:16:05.891062 RX Delay -13 -> 252, step: 4
3572 22:16:05.897849 iDelay=195, Bit 0, Center 118 (51 ~ 186) 136
3573 22:16:05.901610 iDelay=195, Bit 1, Center 112 (43 ~ 182) 140
3574 22:16:05.904528 iDelay=195, Bit 2, Center 106 (39 ~ 174) 136
3575 22:16:05.907722 iDelay=195, Bit 3, Center 114 (47 ~ 182) 136
3576 22:16:05.910317 iDelay=195, Bit 4, Center 116 (47 ~ 186) 140
3577 22:16:05.917701 iDelay=195, Bit 5, Center 124 (55 ~ 194) 140
3578 22:16:05.920817 iDelay=195, Bit 6, Center 122 (55 ~ 190) 136
3579 22:16:05.923700 iDelay=195, Bit 7, Center 112 (43 ~ 182) 140
3580 22:16:05.927118 iDelay=195, Bit 8, Center 100 (39 ~ 162) 124
3581 22:16:05.930412 iDelay=195, Bit 9, Center 104 (43 ~ 166) 124
3582 22:16:05.937046 iDelay=195, Bit 10, Center 114 (51 ~ 178) 128
3583 22:16:05.940061 iDelay=195, Bit 11, Center 106 (43 ~ 170) 128
3584 22:16:05.943582 iDelay=195, Bit 12, Center 120 (59 ~ 182) 124
3585 22:16:05.947142 iDelay=195, Bit 13, Center 118 (55 ~ 182) 128
3586 22:16:05.953501 iDelay=195, Bit 14, Center 118 (55 ~ 182) 128
3587 22:16:05.956638 iDelay=195, Bit 15, Center 122 (59 ~ 186) 128
3588 22:16:05.957105 ==
3589 22:16:05.959842 Dram Type= 6, Freq= 0, CH_1, rank 1
3590 22:16:05.963046 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3591 22:16:05.963547 ==
3592 22:16:05.966240 DQS Delay:
3593 22:16:05.966664 DQS0 = 0, DQS1 = 0
3594 22:16:05.967002 DQM Delay:
3595 22:16:05.969704 DQM0 = 115, DQM1 = 112
3596 22:16:05.970227 DQ Delay:
3597 22:16:05.973371 DQ0 =118, DQ1 =112, DQ2 =106, DQ3 =114
3598 22:16:05.976633 DQ4 =116, DQ5 =124, DQ6 =122, DQ7 =112
3599 22:16:05.982577 DQ8 =100, DQ9 =104, DQ10 =114, DQ11 =106
3600 22:16:05.985907 DQ12 =120, DQ13 =118, DQ14 =118, DQ15 =122
3601 22:16:05.986333
3602 22:16:05.986689
3603 22:16:05.992729 [DQSOSCAuto] RK1, (LSB)MR18= 0xf508, (MSB)MR19= 0x304, tDQSOscB0 = 406 ps tDQSOscB1 = 414 ps
3604 22:16:05.996106 CH1 RK1: MR19=304, MR18=F508
3605 22:16:06.002581 CH1_RK1: MR19=0x304, MR18=0xF508, DQSOSC=406, MR23=63, INC=39, DEC=26
3606 22:16:06.006440 [RxdqsGatingPostProcess] freq 1200
3607 22:16:06.013012 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3608 22:16:06.015488 best DQS0 dly(2T, 0.5T) = (0, 11)
3609 22:16:06.015959 best DQS1 dly(2T, 0.5T) = (0, 11)
3610 22:16:06.019218 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3611 22:16:06.022238 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3612 22:16:06.026061 best DQS0 dly(2T, 0.5T) = (0, 11)
3613 22:16:06.029267 best DQS1 dly(2T, 0.5T) = (0, 11)
3614 22:16:06.032248 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3615 22:16:06.035924 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3616 22:16:06.038729 Pre-setting of DQS Precalculation
3617 22:16:06.045185 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3618 22:16:06.051897 sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2
3619 22:16:06.058845 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
3620 22:16:06.059485
3621 22:16:06.059865
3622 22:16:06.061644 [Calibration Summary] 2400 Mbps
3623 22:16:06.062107 CH 0, Rank 0
3624 22:16:06.064883 SW Impedance : PASS
3625 22:16:06.068204 DUTY Scan : NO K
3626 22:16:06.068670 ZQ Calibration : PASS
3627 22:16:06.071943 Jitter Meter : NO K
3628 22:16:06.075348 CBT Training : PASS
3629 22:16:06.075813 Write leveling : PASS
3630 22:16:06.078450 RX DQS gating : PASS
3631 22:16:06.081297 RX DQ/DQS(RDDQC) : PASS
3632 22:16:06.081762 TX DQ/DQS : PASS
3633 22:16:06.085038 RX DATLAT : PASS
3634 22:16:06.088172 RX DQ/DQS(Engine): PASS
3635 22:16:06.088740 TX OE : NO K
3636 22:16:06.091893 All Pass.
3637 22:16:06.092458
3638 22:16:06.092821 CH 0, Rank 1
3639 22:16:06.094902 SW Impedance : PASS
3640 22:16:06.095518 DUTY Scan : NO K
3641 22:16:06.098638 ZQ Calibration : PASS
3642 22:16:06.101525 Jitter Meter : NO K
3643 22:16:06.102089 CBT Training : PASS
3644 22:16:06.104396 Write leveling : PASS
3645 22:16:06.107937 RX DQS gating : PASS
3646 22:16:06.108501 RX DQ/DQS(RDDQC) : PASS
3647 22:16:06.111507 TX DQ/DQS : PASS
3648 22:16:06.114472 RX DATLAT : PASS
3649 22:16:06.115043 RX DQ/DQS(Engine): PASS
3650 22:16:06.118244 TX OE : NO K
3651 22:16:06.118712 All Pass.
3652 22:16:06.119080
3653 22:16:06.120603 CH 1, Rank 0
3654 22:16:06.121066 SW Impedance : PASS
3655 22:16:06.124243 DUTY Scan : NO K
3656 22:16:06.127259 ZQ Calibration : PASS
3657 22:16:06.127738 Jitter Meter : NO K
3658 22:16:06.130896 CBT Training : PASS
3659 22:16:06.133730 Write leveling : PASS
3660 22:16:06.134204 RX DQS gating : PASS
3661 22:16:06.137310 RX DQ/DQS(RDDQC) : PASS
3662 22:16:06.137784 TX DQ/DQS : PASS
3663 22:16:06.140486 RX DATLAT : PASS
3664 22:16:06.144317 RX DQ/DQS(Engine): PASS
3665 22:16:06.144751 TX OE : NO K
3666 22:16:06.147244 All Pass.
3667 22:16:06.147670
3668 22:16:06.148010 CH 1, Rank 1
3669 22:16:06.150727 SW Impedance : PASS
3670 22:16:06.151157 DUTY Scan : NO K
3671 22:16:06.154072 ZQ Calibration : PASS
3672 22:16:06.157149 Jitter Meter : NO K
3673 22:16:06.157683 CBT Training : PASS
3674 22:16:06.160318 Write leveling : PASS
3675 22:16:06.163305 RX DQS gating : PASS
3676 22:16:06.163736 RX DQ/DQS(RDDQC) : PASS
3677 22:16:06.166847 TX DQ/DQS : PASS
3678 22:16:06.170438 RX DATLAT : PASS
3679 22:16:06.170964 RX DQ/DQS(Engine): PASS
3680 22:16:06.173643 TX OE : NO K
3681 22:16:06.174237 All Pass.
3682 22:16:06.174629
3683 22:16:06.176919 DramC Write-DBI off
3684 22:16:06.179874 PER_BANK_REFRESH: Hybrid Mode
3685 22:16:06.180306 TX_TRACKING: ON
3686 22:16:06.190086 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1
3687 22:16:06.193407 [FAST_K] Save calibration result to emmc
3688 22:16:06.196774 dramc_set_vcore_voltage set vcore to 650000
3689 22:16:06.199912 Read voltage for 600, 5
3690 22:16:06.200477 Vio18 = 0
3691 22:16:06.203154 Vcore = 650000
3692 22:16:06.203749 Vdram = 0
3693 22:16:06.204208 Vddq = 0
3694 22:16:06.204570 Vmddr = 0
3695 22:16:06.209802 [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0
3696 22:16:06.216342 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
3697 22:16:06.216911 MEM_TYPE=3, freq_sel=19
3698 22:16:06.219625 sv_algorithm_assistance_LP4_1600
3699 22:16:06.223824 ============ PULL DRAM RESETB DOWN ============
3700 22:16:06.229390 ========== PULL DRAM RESETB DOWN end =========
3701 22:16:06.232621 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3702 22:16:06.236538 ===================================
3703 22:16:06.239370 LPDDR4 DRAM CONFIGURATION
3704 22:16:06.242755 ===================================
3705 22:16:06.243388 EX_ROW_EN[0] = 0x0
3706 22:16:06.246166 EX_ROW_EN[1] = 0x0
3707 22:16:06.246744 LP4Y_EN = 0x0
3708 22:16:06.249283 WORK_FSP = 0x0
3709 22:16:06.252405 WL = 0x2
3710 22:16:06.252985 RL = 0x2
3711 22:16:06.255363 BL = 0x2
3712 22:16:06.255884 RPST = 0x0
3713 22:16:06.259047 RD_PRE = 0x0
3714 22:16:06.259655 WR_PRE = 0x1
3715 22:16:06.262392 WR_PST = 0x0
3716 22:16:06.262866 DBI_WR = 0x0
3717 22:16:06.266303 DBI_RD = 0x0
3718 22:16:06.266890 OTF = 0x1
3719 22:16:06.268880 ===================================
3720 22:16:06.272297 ===================================
3721 22:16:06.275520 ANA top config
3722 22:16:06.278801 ===================================
3723 22:16:06.279437 DLL_ASYNC_EN = 0
3724 22:16:06.282119 ALL_SLAVE_EN = 1
3725 22:16:06.285775 NEW_RANK_MODE = 1
3726 22:16:06.288537 DLL_IDLE_MODE = 1
3727 22:16:06.291552 LP45_APHY_COMB_EN = 1
3728 22:16:06.292026 TX_ODT_DIS = 1
3729 22:16:06.295613 NEW_8X_MODE = 1
3730 22:16:06.298784 ===================================
3731 22:16:06.301963 ===================================
3732 22:16:06.305120 data_rate = 1200
3733 22:16:06.308158 CKR = 1
3734 22:16:06.311736 DQ_P2S_RATIO = 8
3735 22:16:06.315385 ===================================
3736 22:16:06.318769 CA_P2S_RATIO = 8
3737 22:16:06.319388 DQ_CA_OPEN = 0
3738 22:16:06.321689 DQ_SEMI_OPEN = 0
3739 22:16:06.325150 CA_SEMI_OPEN = 0
3740 22:16:06.327977 CA_FULL_RATE = 0
3741 22:16:06.332126 DQ_CKDIV4_EN = 1
3742 22:16:06.334654 CA_CKDIV4_EN = 1
3743 22:16:06.335131 CA_PREDIV_EN = 0
3744 22:16:06.337919 PH8_DLY = 0
3745 22:16:06.341163 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
3746 22:16:06.345307 DQ_AAMCK_DIV = 4
3747 22:16:06.348028 CA_AAMCK_DIV = 4
3748 22:16:06.351164 CA_ADMCK_DIV = 4
3749 22:16:06.351814 DQ_TRACK_CA_EN = 0
3750 22:16:06.354579 CA_PICK = 600
3751 22:16:06.358053 CA_MCKIO = 600
3752 22:16:06.361247 MCKIO_SEMI = 0
3753 22:16:06.364045 PLL_FREQ = 2288
3754 22:16:06.367610 DQ_UI_PI_RATIO = 32
3755 22:16:06.370937 CA_UI_PI_RATIO = 0
3756 22:16:06.374152 ===================================
3757 22:16:06.377374 ===================================
3758 22:16:06.377951 memory_type:LPDDR4
3759 22:16:06.380393 GP_NUM : 10
3760 22:16:06.384049 SRAM_EN : 1
3761 22:16:06.384541 MD32_EN : 0
3762 22:16:06.387254 ===================================
3763 22:16:06.390876 [ANA_INIT] >>>>>>>>>>>>>>
3764 22:16:06.394282 <<<<<< [CONFIGURE PHASE]: ANA_TX
3765 22:16:06.397765 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
3766 22:16:06.400638 ===================================
3767 22:16:06.404164 data_rate = 1200,PCW = 0X5800
3768 22:16:06.407235 ===================================
3769 22:16:06.410292 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
3770 22:16:06.417019 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3771 22:16:06.420127 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3772 22:16:06.426596 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
3773 22:16:06.429916 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
3774 22:16:06.433213 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
3775 22:16:06.433688 [ANA_INIT] flow start
3776 22:16:06.436081 [ANA_INIT] PLL >>>>>>>>
3777 22:16:06.439863 [ANA_INIT] PLL <<<<<<<<
3778 22:16:06.440427 [ANA_INIT] MIDPI >>>>>>>>
3779 22:16:06.443000 [ANA_INIT] MIDPI <<<<<<<<
3780 22:16:06.446283 [ANA_INIT] DLL >>>>>>>>
3781 22:16:06.446754 [ANA_INIT] flow end
3782 22:16:06.453623 ============ LP4 DIFF to SE enter ============
3783 22:16:06.456409 ============ LP4 DIFF to SE exit ============
3784 22:16:06.459903 [ANA_INIT] <<<<<<<<<<<<<
3785 22:16:06.463123 [Flow] Enable top DCM control >>>>>
3786 22:16:06.466234 [Flow] Enable top DCM control <<<<<
3787 22:16:06.466717 Enable DLL master slave shuffle
3788 22:16:06.472380 ==============================================================
3789 22:16:06.476146 Gating Mode config
3790 22:16:06.479630 ==============================================================
3791 22:16:06.482672 Config description:
3792 22:16:06.492750 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
3793 22:16:06.498965 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
3794 22:16:06.502663 SELPH_MODE 0: By rank 1: By Phase
3795 22:16:06.508892 ==============================================================
3796 22:16:06.511848 GAT_TRACK_EN = 1
3797 22:16:06.516173 RX_GATING_MODE = 2
3798 22:16:06.518924 RX_GATING_TRACK_MODE = 2
3799 22:16:06.522025 SELPH_MODE = 1
3800 22:16:06.525516 PICG_EARLY_EN = 1
3801 22:16:06.528666 VALID_LAT_VALUE = 1
3802 22:16:06.532405 ==============================================================
3803 22:16:06.535314 Enter into Gating configuration >>>>
3804 22:16:06.538798 Exit from Gating configuration <<<<
3805 22:16:06.542151 Enter into DVFS_PRE_config >>>>>
3806 22:16:06.555277 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
3807 22:16:06.555849 Exit from DVFS_PRE_config <<<<<
3808 22:16:06.559032 Enter into PICG configuration >>>>
3809 22:16:06.561976 Exit from PICG configuration <<<<
3810 22:16:06.565382 [RX_INPUT] configuration >>>>>
3811 22:16:06.568176 [RX_INPUT] configuration <<<<<
3812 22:16:06.574975 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
3813 22:16:06.578396 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
3814 22:16:06.584820 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
3815 22:16:06.591003 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
3816 22:16:06.598211 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
3817 22:16:06.604600 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
3818 22:16:06.607831 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
3819 22:16:06.611490 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
3820 22:16:06.614644 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
3821 22:16:06.620988 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
3822 22:16:06.624544 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
3823 22:16:06.627837 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3824 22:16:06.631575 ===================================
3825 22:16:06.634044 LPDDR4 DRAM CONFIGURATION
3826 22:16:06.637692 ===================================
3827 22:16:06.640734 EX_ROW_EN[0] = 0x0
3828 22:16:06.641299 EX_ROW_EN[1] = 0x0
3829 22:16:06.643813 LP4Y_EN = 0x0
3830 22:16:06.644283 WORK_FSP = 0x0
3831 22:16:06.646882 WL = 0x2
3832 22:16:06.647383 RL = 0x2
3833 22:16:06.650525 BL = 0x2
3834 22:16:06.650992 RPST = 0x0
3835 22:16:06.654145 RD_PRE = 0x0
3836 22:16:06.654723 WR_PRE = 0x1
3837 22:16:06.657288 WR_PST = 0x0
3838 22:16:06.657847 DBI_WR = 0x0
3839 22:16:06.660206 DBI_RD = 0x0
3840 22:16:06.663897 OTF = 0x1
3841 22:16:06.667250 ===================================
3842 22:16:06.671321 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
3843 22:16:06.673594 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
3844 22:16:06.676671 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3845 22:16:06.680098 ===================================
3846 22:16:06.683285 LPDDR4 DRAM CONFIGURATION
3847 22:16:06.687068 ===================================
3848 22:16:06.690338 EX_ROW_EN[0] = 0x10
3849 22:16:06.690898 EX_ROW_EN[1] = 0x0
3850 22:16:06.693898 LP4Y_EN = 0x0
3851 22:16:06.694605 WORK_FSP = 0x0
3852 22:16:06.696686 WL = 0x2
3853 22:16:06.697270 RL = 0x2
3854 22:16:06.700509 BL = 0x2
3855 22:16:06.701075 RPST = 0x0
3856 22:16:06.703325 RD_PRE = 0x0
3857 22:16:06.706310 WR_PRE = 0x1
3858 22:16:06.706775 WR_PST = 0x0
3859 22:16:06.709862 DBI_WR = 0x0
3860 22:16:06.710330 DBI_RD = 0x0
3861 22:16:06.712878 OTF = 0x1
3862 22:16:06.716650 ===================================
3863 22:16:06.719900 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
3864 22:16:06.725019 nWR fixed to 30
3865 22:16:06.728198 [ModeRegInit_LP4] CH0 RK0
3866 22:16:06.728679 [ModeRegInit_LP4] CH0 RK1
3867 22:16:06.732405 [ModeRegInit_LP4] CH1 RK0
3868 22:16:06.735419 [ModeRegInit_LP4] CH1 RK1
3869 22:16:06.735897 match AC timing 17
3870 22:16:06.741889 dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 1
3871 22:16:06.744845 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3872 22:16:06.748447 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
3873 22:16:06.755204 [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17
3874 22:16:06.757980 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
3875 22:16:06.758561 ==
3876 22:16:06.761332 Dram Type= 6, Freq= 0, CH_0, rank 0
3877 22:16:06.764735 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3878 22:16:06.765214 ==
3879 22:16:06.771618 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3880 22:16:06.777812 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
3881 22:16:06.781508 [CA 0] Center 36 (6~67) winsize 62
3882 22:16:06.784259 [CA 1] Center 36 (6~67) winsize 62
3883 22:16:06.787626 [CA 2] Center 34 (4~65) winsize 62
3884 22:16:06.791304 [CA 3] Center 34 (4~65) winsize 62
3885 22:16:06.793904 [CA 4] Center 33 (3~64) winsize 62
3886 22:16:06.797917 [CA 5] Center 33 (3~64) winsize 62
3887 22:16:06.798494
3888 22:16:06.800689 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3889 22:16:06.801170
3890 22:16:06.803996 [CATrainingPosCal] consider 1 rank data
3891 22:16:06.807570 u2DelayCellTimex100 = 270/100 ps
3892 22:16:06.810559 CA0 delay=36 (6~67),Diff = 3 PI (28 cell)
3893 22:16:06.813744 CA1 delay=36 (6~67),Diff = 3 PI (28 cell)
3894 22:16:06.817310 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
3895 22:16:06.823766 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
3896 22:16:06.826868 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
3897 22:16:06.830982 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3898 22:16:06.831505
3899 22:16:06.834002 CA PerBit enable=1, Macro0, CA PI delay=33
3900 22:16:06.834584
3901 22:16:06.837446 [CBTSetCACLKResult] CA Dly = 33
3902 22:16:06.838023 CS Dly: 5 (0~36)
3903 22:16:06.838506 ==
3904 22:16:06.840671 Dram Type= 6, Freq= 0, CH_0, rank 1
3905 22:16:06.847088 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3906 22:16:06.847722 ==
3907 22:16:06.850128 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3908 22:16:06.857114 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
3909 22:16:06.860801 [CA 0] Center 36 (6~67) winsize 62
3910 22:16:06.864384 [CA 1] Center 36 (6~67) winsize 62
3911 22:16:06.867017 [CA 2] Center 34 (4~65) winsize 62
3912 22:16:06.870619 [CA 3] Center 34 (4~65) winsize 62
3913 22:16:06.874003 [CA 4] Center 33 (3~64) winsize 62
3914 22:16:06.876832 [CA 5] Center 33 (3~64) winsize 62
3915 22:16:06.877412
3916 22:16:06.880073 [CmdBusTrainingLP45] Vref(ca) range 1: 37
3917 22:16:06.880656
3918 22:16:06.883582 [CATrainingPosCal] consider 2 rank data
3919 22:16:06.887394 u2DelayCellTimex100 = 270/100 ps
3920 22:16:06.890112 CA0 delay=36 (6~67),Diff = 3 PI (28 cell)
3921 22:16:06.896771 CA1 delay=36 (6~67),Diff = 3 PI (28 cell)
3922 22:16:06.900283 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
3923 22:16:06.903993 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
3924 22:16:06.908107 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
3925 22:16:06.909475 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3926 22:16:06.909956
3927 22:16:06.912908 CA PerBit enable=1, Macro0, CA PI delay=33
3928 22:16:06.913449
3929 22:16:06.916561 [CBTSetCACLKResult] CA Dly = 33
3930 22:16:06.919812 CS Dly: 5 (0~36)
3931 22:16:06.920391
3932 22:16:06.923109 ----->DramcWriteLeveling(PI) begin...
3933 22:16:06.923719 ==
3934 22:16:06.926251 Dram Type= 6, Freq= 0, CH_0, rank 0
3935 22:16:06.929944 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3936 22:16:06.930427 ==
3937 22:16:06.932691 Write leveling (Byte 0): 34 => 34
3938 22:16:06.936338 Write leveling (Byte 1): 30 => 30
3939 22:16:06.939672 DramcWriteLeveling(PI) end<-----
3940 22:16:06.940151
3941 22:16:06.940621 ==
3942 22:16:06.943416 Dram Type= 6, Freq= 0, CH_0, rank 0
3943 22:16:06.945863 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3944 22:16:06.946339 ==
3945 22:16:06.949366 [Gating] SW mode calibration
3946 22:16:06.956036 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
3947 22:16:06.962548 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
3948 22:16:06.966145 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3949 22:16:06.970235 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3950 22:16:06.975720 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3951 22:16:06.979086 0 9 12 | B1->B0 | 3434 3333 | 1 0 | (1 1) (0 1)
3952 22:16:06.985624 0 9 16 | B1->B0 | 2e2e 2626 | 1 0 | (0 0) (0 0)
3953 22:16:06.988887 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3954 22:16:06.992347 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3955 22:16:06.998908 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3956 22:16:07.002543 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3957 22:16:07.005475 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3958 22:16:07.011738 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3959 22:16:07.015201 0 10 12 | B1->B0 | 2424 3030 | 0 1 | (0 0) (0 0)
3960 22:16:07.018560 0 10 16 | B1->B0 | 3939 3f3f | 0 1 | (0 0) (0 0)
3961 22:16:07.025186 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3962 22:16:07.028186 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3963 22:16:07.031688 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3964 22:16:07.038171 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3965 22:16:07.041890 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3966 22:16:07.044705 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3967 22:16:07.052389 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3968 22:16:07.055086 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
3969 22:16:07.057947 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3970 22:16:07.064365 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3971 22:16:07.067637 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3972 22:16:07.071240 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3973 22:16:07.078320 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3974 22:16:07.081422 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3975 22:16:07.084292 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3976 22:16:07.091021 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3977 22:16:07.094147 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3978 22:16:07.097457 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3979 22:16:07.104082 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3980 22:16:07.107042 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3981 22:16:07.110632 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3982 22:16:07.117715 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3983 22:16:07.120290 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
3984 22:16:07.123360 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3985 22:16:07.130416 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3986 22:16:07.130880 Total UI for P1: 0, mck2ui 16
3987 22:16:07.137041 best dqsien dly found for B0: ( 0, 13, 14)
3988 22:16:07.137669 Total UI for P1: 0, mck2ui 16
3989 22:16:07.140628 best dqsien dly found for B1: ( 0, 13, 16)
3990 22:16:07.146708 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
3991 22:16:07.150292 best DQS1 dly(MCK, UI, PI) = (0, 13, 16)
3992 22:16:07.150860
3993 22:16:07.153801 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
3994 22:16:07.157373 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 16)
3995 22:16:07.159938 [Gating] SW calibration Done
3996 22:16:07.160406 ==
3997 22:16:07.163289 Dram Type= 6, Freq= 0, CH_0, rank 0
3998 22:16:07.166657 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3999 22:16:07.167131 ==
4000 22:16:07.170349 RX Vref Scan: 0
4001 22:16:07.170928
4002 22:16:07.171346 RX Vref 0 -> 0, step: 1
4003 22:16:07.171702
4004 22:16:07.173561 RX Delay -230 -> 252, step: 16
4005 22:16:07.180169 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
4006 22:16:07.183816 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4007 22:16:07.187665 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4008 22:16:07.190114 iDelay=218, Bit 3, Center 33 (-134 ~ 201) 336
4009 22:16:07.193194 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4010 22:16:07.199638 iDelay=218, Bit 5, Center 33 (-134 ~ 201) 336
4011 22:16:07.203108 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4012 22:16:07.206690 iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336
4013 22:16:07.209927 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4014 22:16:07.215963 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
4015 22:16:07.219519 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4016 22:16:07.223220 iDelay=218, Bit 11, Center 33 (-134 ~ 201) 336
4017 22:16:07.226036 iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320
4018 22:16:07.233108 iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320
4019 22:16:07.236512 iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320
4020 22:16:07.238927 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4021 22:16:07.239430 ==
4022 22:16:07.242545 Dram Type= 6, Freq= 0, CH_0, rank 0
4023 22:16:07.245614 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4024 22:16:07.249568 ==
4025 22:16:07.250131 DQS Delay:
4026 22:16:07.250504 DQS0 = 0, DQS1 = 0
4027 22:16:07.252321 DQM Delay:
4028 22:16:07.252783 DQM0 = 41, DQM1 = 33
4029 22:16:07.255680 DQ Delay:
4030 22:16:07.259710 DQ0 =41, DQ1 =41, DQ2 =33, DQ3 =33
4031 22:16:07.260277 DQ4 =41, DQ5 =33, DQ6 =57, DQ7 =49
4032 22:16:07.262253 DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =33
4033 22:16:07.268931 DQ12 =41, DQ13 =41, DQ14 =41, DQ15 =41
4034 22:16:07.269499
4035 22:16:07.269870
4036 22:16:07.270211 ==
4037 22:16:07.271810 Dram Type= 6, Freq= 0, CH_0, rank 0
4038 22:16:07.275156 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4039 22:16:07.275757 ==
4040 22:16:07.276130
4041 22:16:07.276472
4042 22:16:07.279219 TX Vref Scan disable
4043 22:16:07.279761 == TX Byte 0 ==
4044 22:16:07.284852 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
4045 22:16:07.288228 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
4046 22:16:07.291735 == TX Byte 1 ==
4047 22:16:07.295382 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4048 22:16:07.298615 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4049 22:16:07.299145 ==
4050 22:16:07.302187 Dram Type= 6, Freq= 0, CH_0, rank 0
4051 22:16:07.305244 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4052 22:16:07.308087 ==
4053 22:16:07.308610
4054 22:16:07.308944
4055 22:16:07.309257 TX Vref Scan disable
4056 22:16:07.311725 == TX Byte 0 ==
4057 22:16:07.315500 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
4058 22:16:07.321929 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
4059 22:16:07.322461 == TX Byte 1 ==
4060 22:16:07.325410 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4061 22:16:07.331447 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4062 22:16:07.331955
4063 22:16:07.332329 [DATLAT]
4064 22:16:07.332677 Freq=600, CH0 RK0
4065 22:16:07.333015
4066 22:16:07.335109 DATLAT Default: 0x9
4067 22:16:07.338347 0, 0xFFFF, sum = 0
4068 22:16:07.338916 1, 0xFFFF, sum = 0
4069 22:16:07.341849 2, 0xFFFF, sum = 0
4070 22:16:07.342555 3, 0xFFFF, sum = 0
4071 22:16:07.344703 4, 0xFFFF, sum = 0
4072 22:16:07.345178 5, 0xFFFF, sum = 0
4073 22:16:07.347988 6, 0xFFFF, sum = 0
4074 22:16:07.348462 7, 0xFFFF, sum = 0
4075 22:16:07.351285 8, 0x0, sum = 1
4076 22:16:07.351767 9, 0x0, sum = 2
4077 22:16:07.354939 10, 0x0, sum = 3
4078 22:16:07.355550 11, 0x0, sum = 4
4079 22:16:07.355934 best_step = 9
4080 22:16:07.356280
4081 22:16:07.358042 ==
4082 22:16:07.361223 Dram Type= 6, Freq= 0, CH_0, rank 0
4083 22:16:07.364649 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4084 22:16:07.365240 ==
4085 22:16:07.365620 RX Vref Scan: 1
4086 22:16:07.365968
4087 22:16:07.368509 RX Vref 0 -> 0, step: 1
4088 22:16:07.369072
4089 22:16:07.371336 RX Delay -195 -> 252, step: 8
4090 22:16:07.371891
4091 22:16:07.374704 Set Vref, RX VrefLevel [Byte0]: 53
4092 22:16:07.378184 [Byte1]: 49
4093 22:16:07.378751
4094 22:16:07.381310 Final RX Vref Byte 0 = 53 to rank0
4095 22:16:07.384197 Final RX Vref Byte 1 = 49 to rank0
4096 22:16:07.387820 Final RX Vref Byte 0 = 53 to rank1
4097 22:16:07.391202 Final RX Vref Byte 1 = 49 to rank1==
4098 22:16:07.394219 Dram Type= 6, Freq= 0, CH_0, rank 0
4099 22:16:07.399817 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4100 22:16:07.400953 ==
4101 22:16:07.401422 DQS Delay:
4102 22:16:07.401791 DQS0 = 0, DQS1 = 0
4103 22:16:07.403977 DQM Delay:
4104 22:16:07.404459 DQM0 = 41, DQM1 = 33
4105 22:16:07.407756 DQ Delay:
4106 22:16:07.411153 DQ0 =44, DQ1 =44, DQ2 =36, DQ3 =36
4107 22:16:07.411755 DQ4 =44, DQ5 =32, DQ6 =52, DQ7 =44
4108 22:16:07.414129 DQ8 =24, DQ9 =20, DQ10 =36, DQ11 =28
4109 22:16:07.420572 DQ12 =40, DQ13 =36, DQ14 =44, DQ15 =40
4110 22:16:07.421140
4111 22:16:07.421511
4112 22:16:07.427629 [DQSOSCAuto] RK0, (LSB)MR18= 0x463e, (MSB)MR19= 0x808, tDQSOscB0 = 398 ps tDQSOscB1 = 396 ps
4113 22:16:07.430831 CH0 RK0: MR19=808, MR18=463E
4114 22:16:07.437328 CH0_RK0: MR19=0x808, MR18=0x463E, DQSOSC=396, MR23=63, INC=167, DEC=111
4115 22:16:07.437898
4116 22:16:07.440682 ----->DramcWriteLeveling(PI) begin...
4117 22:16:07.441261 ==
4118 22:16:07.443858 Dram Type= 6, Freq= 0, CH_0, rank 1
4119 22:16:07.447073 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4120 22:16:07.447575 ==
4121 22:16:07.450351 Write leveling (Byte 0): 32 => 32
4122 22:16:07.453955 Write leveling (Byte 1): 30 => 30
4123 22:16:07.457362 DramcWriteLeveling(PI) end<-----
4124 22:16:07.457934
4125 22:16:07.458310 ==
4126 22:16:07.460173 Dram Type= 6, Freq= 0, CH_0, rank 1
4127 22:16:07.463591 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4128 22:16:07.464159 ==
4129 22:16:07.466923 [Gating] SW mode calibration
4130 22:16:07.473833 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4131 22:16:07.480146 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4132 22:16:07.483730 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4133 22:16:07.489881 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4134 22:16:07.493311 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4135 22:16:07.496386 0 9 12 | B1->B0 | 3434 3030 | 1 0 | (1 0) (1 0)
4136 22:16:07.503052 0 9 16 | B1->B0 | 2f2f 2424 | 1 0 | (0 1) (0 0)
4137 22:16:07.506634 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4138 22:16:07.509410 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4139 22:16:07.516234 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4140 22:16:07.520179 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4141 22:16:07.522644 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4142 22:16:07.529700 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4143 22:16:07.532646 0 10 12 | B1->B0 | 2727 3232 | 0 0 | (0 0) (0 0)
4144 22:16:07.536592 0 10 16 | B1->B0 | 3c3c 4646 | 0 0 | (1 1) (0 0)
4145 22:16:07.542677 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4146 22:16:07.545945 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4147 22:16:07.549075 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4148 22:16:07.555718 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4149 22:16:07.558942 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4150 22:16:07.562204 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4151 22:16:07.569095 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4152 22:16:07.572100 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4153 22:16:07.575876 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4154 22:16:07.582088 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4155 22:16:07.585750 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4156 22:16:07.588399 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4157 22:16:07.595558 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4158 22:16:07.598778 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4159 22:16:07.602790 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4160 22:16:07.608981 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4161 22:16:07.611712 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4162 22:16:07.614798 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4163 22:16:07.621388 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4164 22:16:07.624901 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4165 22:16:07.628199 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4166 22:16:07.635192 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4167 22:16:07.638267 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4168 22:16:07.641791 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4169 22:16:07.644625 Total UI for P1: 0, mck2ui 16
4170 22:16:07.647749 best dqsien dly found for B0: ( 0, 13, 14)
4171 22:16:07.651144 Total UI for P1: 0, mck2ui 16
4172 22:16:07.654589 best dqsien dly found for B1: ( 0, 13, 14)
4173 22:16:07.657578 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
4174 22:16:07.661070 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4175 22:16:07.664230
4176 22:16:07.667831 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
4177 22:16:07.671160 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4178 22:16:07.674694 [Gating] SW calibration Done
4179 22:16:07.675164 ==
4180 22:16:07.677342 Dram Type= 6, Freq= 0, CH_0, rank 1
4181 22:16:07.680714 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4182 22:16:07.681288 ==
4183 22:16:07.683863 RX Vref Scan: 0
4184 22:16:07.684331
4185 22:16:07.684701 RX Vref 0 -> 0, step: 1
4186 22:16:07.685045
4187 22:16:07.687493 RX Delay -230 -> 252, step: 16
4188 22:16:07.690774 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
4189 22:16:07.697367 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4190 22:16:07.700847 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4191 22:16:07.704112 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4192 22:16:07.707156 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4193 22:16:07.713792 iDelay=218, Bit 5, Center 33 (-134 ~ 201) 336
4194 22:16:07.718346 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4195 22:16:07.720962 iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336
4196 22:16:07.723762 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4197 22:16:07.730230 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
4198 22:16:07.733022 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4199 22:16:07.736591 iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320
4200 22:16:07.739908 iDelay=218, Bit 12, Center 33 (-134 ~ 201) 336
4201 22:16:07.746556 iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320
4202 22:16:07.750015 iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320
4203 22:16:07.753557 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4204 22:16:07.754123 ==
4205 22:16:07.756055 Dram Type= 6, Freq= 0, CH_0, rank 1
4206 22:16:07.759740 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4207 22:16:07.760307 ==
4208 22:16:07.762821 DQS Delay:
4209 22:16:07.763424 DQS0 = 0, DQS1 = 0
4210 22:16:07.766194 DQM Delay:
4211 22:16:07.766663 DQM0 = 42, DQM1 = 31
4212 22:16:07.769789 DQ Delay:
4213 22:16:07.770351 DQ0 =41, DQ1 =41, DQ2 =41, DQ3 =41
4214 22:16:07.772608 DQ4 =41, DQ5 =33, DQ6 =49, DQ7 =49
4215 22:16:07.775836 DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =25
4216 22:16:07.779520 DQ12 =33, DQ13 =41, DQ14 =41, DQ15 =41
4217 22:16:07.780091
4218 22:16:07.782580
4219 22:16:07.783046 ==
4220 22:16:07.785920 Dram Type= 6, Freq= 0, CH_0, rank 1
4221 22:16:07.789230 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4222 22:16:07.789705 ==
4223 22:16:07.790077
4224 22:16:07.790420
4225 22:16:07.792689 TX Vref Scan disable
4226 22:16:07.793159 == TX Byte 0 ==
4227 22:16:07.799099 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
4228 22:16:07.802461 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
4229 22:16:07.802909 == TX Byte 1 ==
4230 22:16:07.808924 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4231 22:16:07.812596 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4232 22:16:07.813121 ==
4233 22:16:07.815895 Dram Type= 6, Freq= 0, CH_0, rank 1
4234 22:16:07.819032 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4235 22:16:07.819647 ==
4236 22:16:07.820020
4237 22:16:07.820362
4238 22:16:07.822262 TX Vref Scan disable
4239 22:16:07.825900 == TX Byte 0 ==
4240 22:16:07.828841 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4241 22:16:07.835950 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4242 22:16:07.836417 == TX Byte 1 ==
4243 22:16:07.839067 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4244 22:16:07.845525 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4245 22:16:07.846100
4246 22:16:07.846470 [DATLAT]
4247 22:16:07.846915 Freq=600, CH0 RK1
4248 22:16:07.847299
4249 22:16:07.848630 DATLAT Default: 0x9
4250 22:16:07.849091 0, 0xFFFF, sum = 0
4251 22:16:07.852411 1, 0xFFFF, sum = 0
4252 22:16:07.855150 2, 0xFFFF, sum = 0
4253 22:16:07.855663 3, 0xFFFF, sum = 0
4254 22:16:07.858538 4, 0xFFFF, sum = 0
4255 22:16:07.859108 5, 0xFFFF, sum = 0
4256 22:16:07.861842 6, 0xFFFF, sum = 0
4257 22:16:07.862424 7, 0xFFFF, sum = 0
4258 22:16:07.864975 8, 0x0, sum = 1
4259 22:16:07.865496 9, 0x0, sum = 2
4260 22:16:07.867992 10, 0x0, sum = 3
4261 22:16:07.868541 11, 0x0, sum = 4
4262 22:16:07.868924 best_step = 9
4263 22:16:07.869275
4264 22:16:07.871687 ==
4265 22:16:07.874856 Dram Type= 6, Freq= 0, CH_0, rank 1
4266 22:16:07.878076 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4267 22:16:07.878638 ==
4268 22:16:07.879010 RX Vref Scan: 0
4269 22:16:07.879449
4270 22:16:07.881022 RX Vref 0 -> 0, step: 1
4271 22:16:07.881507
4272 22:16:07.884424 RX Delay -195 -> 252, step: 8
4273 22:16:07.891081 iDelay=197, Bit 0, Center 40 (-107 ~ 188) 296
4274 22:16:07.894851 iDelay=197, Bit 1, Center 44 (-107 ~ 196) 304
4275 22:16:07.897887 iDelay=197, Bit 2, Center 36 (-115 ~ 188) 304
4276 22:16:07.900870 iDelay=197, Bit 3, Center 36 (-115 ~ 188) 304
4277 22:16:07.907390 iDelay=197, Bit 4, Center 44 (-107 ~ 196) 304
4278 22:16:07.911453 iDelay=197, Bit 5, Center 28 (-123 ~ 180) 304
4279 22:16:07.914292 iDelay=197, Bit 6, Center 48 (-99 ~ 196) 296
4280 22:16:07.918323 iDelay=197, Bit 7, Center 48 (-99 ~ 196) 296
4281 22:16:07.920354 iDelay=197, Bit 8, Center 24 (-131 ~ 180) 312
4282 22:16:07.927676 iDelay=197, Bit 9, Center 20 (-139 ~ 180) 320
4283 22:16:07.931331 iDelay=197, Bit 10, Center 36 (-115 ~ 188) 304
4284 22:16:07.933635 iDelay=197, Bit 11, Center 28 (-123 ~ 180) 304
4285 22:16:07.937234 iDelay=197, Bit 12, Center 40 (-115 ~ 196) 312
4286 22:16:07.944152 iDelay=197, Bit 13, Center 40 (-115 ~ 196) 312
4287 22:16:07.947627 iDelay=197, Bit 14, Center 44 (-107 ~ 196) 304
4288 22:16:07.950391 iDelay=197, Bit 15, Center 40 (-115 ~ 196) 312
4289 22:16:07.950958 ==
4290 22:16:07.953632 Dram Type= 6, Freq= 0, CH_0, rank 1
4291 22:16:07.960028 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4292 22:16:07.960589 ==
4293 22:16:07.960955 DQS Delay:
4294 22:16:07.961295 DQS0 = 0, DQS1 = 0
4295 22:16:07.963876 DQM Delay:
4296 22:16:07.964331 DQM0 = 40, DQM1 = 34
4297 22:16:07.966589 DQ Delay:
4298 22:16:07.969929 DQ0 =40, DQ1 =44, DQ2 =36, DQ3 =36
4299 22:16:07.973230 DQ4 =44, DQ5 =28, DQ6 =48, DQ7 =48
4300 22:16:07.976583 DQ8 =24, DQ9 =20, DQ10 =36, DQ11 =28
4301 22:16:07.979684 DQ12 =40, DQ13 =40, DQ14 =44, DQ15 =40
4302 22:16:07.980096
4303 22:16:07.980423
4304 22:16:07.986408 [DQSOSCAuto] RK1, (LSB)MR18= 0x4741, (MSB)MR19= 0x808, tDQSOscB0 = 397 ps tDQSOscB1 = 396 ps
4305 22:16:07.989719 CH0 RK1: MR19=808, MR18=4741
4306 22:16:07.996348 CH0_RK1: MR19=0x808, MR18=0x4741, DQSOSC=396, MR23=63, INC=167, DEC=111
4307 22:16:07.999687 [RxdqsGatingPostProcess] freq 600
4308 22:16:08.002986 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4309 22:16:08.006901 Pre-setting of DQS Precalculation
4310 22:16:08.012869 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4311 22:16:08.013381 ==
4312 22:16:08.015863 Dram Type= 6, Freq= 0, CH_1, rank 0
4313 22:16:08.019394 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4314 22:16:08.019958 ==
4315 22:16:08.026027 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4316 22:16:08.033120 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
4317 22:16:08.037209 [CA 0] Center 36 (6~66) winsize 61
4318 22:16:08.039704 [CA 1] Center 35 (5~66) winsize 62
4319 22:16:08.043024 [CA 2] Center 34 (4~65) winsize 62
4320 22:16:08.046045 [CA 3] Center 34 (4~64) winsize 61
4321 22:16:08.049078 [CA 4] Center 34 (4~65) winsize 62
4322 22:16:08.053044 [CA 5] Center 33 (3~64) winsize 62
4323 22:16:08.053603
4324 22:16:08.055673 [CmdBusTrainingLP45] Vref(ca) range 1: 35
4325 22:16:08.056230
4326 22:16:08.058906 [CATrainingPosCal] consider 1 rank data
4327 22:16:08.062460 u2DelayCellTimex100 = 270/100 ps
4328 22:16:08.065856 CA0 delay=36 (6~66),Diff = 3 PI (28 cell)
4329 22:16:08.068730 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4330 22:16:08.071976 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
4331 22:16:08.075324 CA3 delay=34 (4~64),Diff = 1 PI (9 cell)
4332 22:16:08.078606 CA4 delay=34 (4~65),Diff = 1 PI (9 cell)
4333 22:16:08.081923 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4334 22:16:08.085350
4335 22:16:08.088531 CA PerBit enable=1, Macro0, CA PI delay=33
4336 22:16:08.089088
4337 22:16:08.091733 [CBTSetCACLKResult] CA Dly = 33
4338 22:16:08.092286 CS Dly: 4 (0~35)
4339 22:16:08.092652 ==
4340 22:16:08.095221 Dram Type= 6, Freq= 0, CH_1, rank 1
4341 22:16:08.098775 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4342 22:16:08.101514 ==
4343 22:16:08.105090 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4344 22:16:08.111499 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
4345 22:16:08.115010 [CA 0] Center 35 (5~66) winsize 62
4346 22:16:08.117858 [CA 1] Center 35 (5~66) winsize 62
4347 22:16:08.121431 [CA 2] Center 34 (4~65) winsize 62
4348 22:16:08.124790 [CA 3] Center 34 (3~65) winsize 63
4349 22:16:08.128194 [CA 4] Center 34 (4~65) winsize 62
4350 22:16:08.131507 [CA 5] Center 33 (3~64) winsize 62
4351 22:16:08.132077
4352 22:16:08.134312 [CmdBusTrainingLP45] Vref(ca) range 1: 33
4353 22:16:08.134781
4354 22:16:08.137932 [CATrainingPosCal] consider 2 rank data
4355 22:16:08.141354 u2DelayCellTimex100 = 270/100 ps
4356 22:16:08.144448 CA0 delay=36 (6~66),Diff = 3 PI (28 cell)
4357 22:16:08.148056 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4358 22:16:08.154218 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
4359 22:16:08.157978 CA3 delay=34 (4~64),Diff = 1 PI (9 cell)
4360 22:16:08.161123 CA4 delay=34 (4~65),Diff = 1 PI (9 cell)
4361 22:16:08.164083 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4362 22:16:08.164555
4363 22:16:08.167436 CA PerBit enable=1, Macro0, CA PI delay=33
4364 22:16:08.168005
4365 22:16:08.171668 [CBTSetCACLKResult] CA Dly = 33
4366 22:16:08.172238 CS Dly: 4 (0~36)
4367 22:16:08.172610
4368 22:16:08.177540 ----->DramcWriteLeveling(PI) begin...
4369 22:16:08.178112 ==
4370 22:16:08.180702 Dram Type= 6, Freq= 0, CH_1, rank 0
4371 22:16:08.183647 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4372 22:16:08.184120 ==
4373 22:16:08.187020 Write leveling (Byte 0): 29 => 29
4374 22:16:08.190592 Write leveling (Byte 1): 29 => 29
4375 22:16:08.193387 DramcWriteLeveling(PI) end<-----
4376 22:16:08.193859
4377 22:16:08.194227 ==
4378 22:16:08.197492 Dram Type= 6, Freq= 0, CH_1, rank 0
4379 22:16:08.200521 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4380 22:16:08.200997 ==
4381 22:16:08.203734 [Gating] SW mode calibration
4382 22:16:08.210603 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4383 22:16:08.216566 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4384 22:16:08.220167 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4385 22:16:08.223370 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4386 22:16:08.230497 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4387 22:16:08.234021 0 9 12 | B1->B0 | 3030 2e2e | 0 1 | (0 1) (1 0)
4388 22:16:08.236937 0 9 16 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
4389 22:16:08.243755 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4390 22:16:08.246460 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4391 22:16:08.250408 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4392 22:16:08.256538 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4393 22:16:08.259743 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4394 22:16:08.262896 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4395 22:16:08.269399 0 10 12 | B1->B0 | 3030 3333 | 0 0 | (0 0) (0 0)
4396 22:16:08.272735 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4397 22:16:08.276781 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4398 22:16:08.282677 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4399 22:16:08.286084 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4400 22:16:08.289247 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4401 22:16:08.296068 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4402 22:16:08.299576 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4403 22:16:08.302373 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
4404 22:16:08.309288 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4405 22:16:08.312334 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4406 22:16:08.315842 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4407 22:16:08.322147 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4408 22:16:08.325334 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4409 22:16:08.328886 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4410 22:16:08.335785 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4411 22:16:08.338623 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4412 22:16:08.342134 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4413 22:16:08.349152 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4414 22:16:08.351549 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4415 22:16:08.355096 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4416 22:16:08.363104 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4417 22:16:08.364765 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4418 22:16:08.368338 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4419 22:16:08.374885 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4420 22:16:08.378777 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4421 22:16:08.381807 Total UI for P1: 0, mck2ui 16
4422 22:16:08.385127 best dqsien dly found for B0: ( 0, 13, 12)
4423 22:16:08.387799 Total UI for P1: 0, mck2ui 16
4424 22:16:08.391799 best dqsien dly found for B1: ( 0, 13, 14)
4425 22:16:08.395092 best DQS0 dly(MCK, UI, PI) = (0, 13, 12)
4426 22:16:08.398712 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4427 22:16:08.399487
4428 22:16:08.401055 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 12)
4429 22:16:08.407993 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4430 22:16:08.408566 [Gating] SW calibration Done
4431 22:16:08.408943 ==
4432 22:16:08.411255 Dram Type= 6, Freq= 0, CH_1, rank 0
4433 22:16:08.417833 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4434 22:16:08.418389 ==
4435 22:16:08.418766 RX Vref Scan: 0
4436 22:16:08.419113
4437 22:16:08.420943 RX Vref 0 -> 0, step: 1
4438 22:16:08.421403
4439 22:16:08.424717 RX Delay -230 -> 252, step: 16
4440 22:16:08.427942 iDelay=218, Bit 0, Center 49 (-118 ~ 217) 336
4441 22:16:08.430928 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4442 22:16:08.437687 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4443 22:16:08.440860 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4444 22:16:08.444456 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4445 22:16:08.447260 iDelay=218, Bit 5, Center 57 (-102 ~ 217) 320
4446 22:16:08.450371 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4447 22:16:08.457130 iDelay=218, Bit 7, Center 41 (-118 ~ 201) 320
4448 22:16:08.461360 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4449 22:16:08.463668 iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320
4450 22:16:08.467260 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4451 22:16:08.474062 iDelay=218, Bit 11, Center 33 (-134 ~ 201) 336
4452 22:16:08.477022 iDelay=218, Bit 12, Center 49 (-118 ~ 217) 336
4453 22:16:08.480561 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4454 22:16:08.483678 iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320
4455 22:16:08.489993 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4456 22:16:08.490490 ==
4457 22:16:08.493548 Dram Type= 6, Freq= 0, CH_1, rank 0
4458 22:16:08.496938 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4459 22:16:08.497411 ==
4460 22:16:08.497783 DQS Delay:
4461 22:16:08.500586 DQS0 = 0, DQS1 = 0
4462 22:16:08.501156 DQM Delay:
4463 22:16:08.503308 DQM0 = 44, DQM1 = 37
4464 22:16:08.503777 DQ Delay:
4465 22:16:08.506812 DQ0 =49, DQ1 =41, DQ2 =33, DQ3 =41
4466 22:16:08.510302 DQ4 =41, DQ5 =57, DQ6 =49, DQ7 =41
4467 22:16:08.513309 DQ8 =25, DQ9 =25, DQ10 =33, DQ11 =33
4468 22:16:08.516516 DQ12 =49, DQ13 =49, DQ14 =41, DQ15 =41
4469 22:16:08.516942
4470 22:16:08.517276
4471 22:16:08.517622 ==
4472 22:16:08.519624 Dram Type= 6, Freq= 0, CH_1, rank 0
4473 22:16:08.523251 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4474 22:16:08.526607 ==
4475 22:16:08.527206
4476 22:16:08.527624
4477 22:16:08.527971 TX Vref Scan disable
4478 22:16:08.529497 == TX Byte 0 ==
4479 22:16:08.533467 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4480 22:16:08.536317 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4481 22:16:08.539410 == TX Byte 1 ==
4482 22:16:08.543113 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4483 22:16:08.546742 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4484 22:16:08.549730 ==
4485 22:16:08.553665 Dram Type= 6, Freq= 0, CH_1, rank 0
4486 22:16:08.557145 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4487 22:16:08.557623 ==
4488 22:16:08.557996
4489 22:16:08.558346
4490 22:16:08.559238 TX Vref Scan disable
4491 22:16:08.559638 == TX Byte 0 ==
4492 22:16:08.565846 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4493 22:16:08.569254 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4494 22:16:08.573117 == TX Byte 1 ==
4495 22:16:08.576238 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4496 22:16:08.579112 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4497 22:16:08.579590
4498 22:16:08.579966 [DATLAT]
4499 22:16:08.582462 Freq=600, CH1 RK0
4500 22:16:08.582890
4501 22:16:08.585941 DATLAT Default: 0x9
4502 22:16:08.586367 0, 0xFFFF, sum = 0
4503 22:16:08.588899 1, 0xFFFF, sum = 0
4504 22:16:08.589333 2, 0xFFFF, sum = 0
4505 22:16:08.592949 3, 0xFFFF, sum = 0
4506 22:16:08.593382 4, 0xFFFF, sum = 0
4507 22:16:08.596109 5, 0xFFFF, sum = 0
4508 22:16:08.596542 6, 0xFFFF, sum = 0
4509 22:16:08.599483 7, 0xFFFF, sum = 0
4510 22:16:08.599923 8, 0x0, sum = 1
4511 22:16:08.602149 9, 0x0, sum = 2
4512 22:16:08.602583 10, 0x0, sum = 3
4513 22:16:08.605929 11, 0x0, sum = 4
4514 22:16:08.606517 best_step = 9
4515 22:16:08.606873
4516 22:16:08.607234 ==
4517 22:16:08.608629 Dram Type= 6, Freq= 0, CH_1, rank 0
4518 22:16:08.612048 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4519 22:16:08.612479 ==
4520 22:16:08.615772 RX Vref Scan: 1
4521 22:16:08.616201
4522 22:16:08.619389 RX Vref 0 -> 0, step: 1
4523 22:16:08.619854
4524 22:16:08.620190 RX Delay -179 -> 252, step: 8
4525 22:16:08.620510
4526 22:16:08.621916 Set Vref, RX VrefLevel [Byte0]: 52
4527 22:16:08.625514 [Byte1]: 51
4528 22:16:08.629873
4529 22:16:08.630304 Final RX Vref Byte 0 = 52 to rank0
4530 22:16:08.633198 Final RX Vref Byte 1 = 51 to rank0
4531 22:16:08.636635 Final RX Vref Byte 0 = 52 to rank1
4532 22:16:08.639903 Final RX Vref Byte 1 = 51 to rank1==
4533 22:16:08.642974 Dram Type= 6, Freq= 0, CH_1, rank 0
4534 22:16:08.650616 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4535 22:16:08.651155 ==
4536 22:16:08.651553 DQS Delay:
4537 22:16:08.652805 DQS0 = 0, DQS1 = 0
4538 22:16:08.653229 DQM Delay:
4539 22:16:08.653568 DQM0 = 42, DQM1 = 35
4540 22:16:08.656400 DQ Delay:
4541 22:16:08.660126 DQ0 =48, DQ1 =40, DQ2 =32, DQ3 =44
4542 22:16:08.663743 DQ4 =40, DQ5 =48, DQ6 =52, DQ7 =36
4543 22:16:08.666498 DQ8 =20, DQ9 =24, DQ10 =32, DQ11 =28
4544 22:16:08.669577 DQ12 =44, DQ13 =44, DQ14 =44, DQ15 =44
4545 22:16:08.670089
4546 22:16:08.670462
4547 22:16:08.676254 [DQSOSCAuto] RK0, (LSB)MR18= 0x2943, (MSB)MR19= 0x808, tDQSOscB0 = 397 ps tDQSOscB1 = 402 ps
4548 22:16:08.679794 CH1 RK0: MR19=808, MR18=2943
4549 22:16:08.686671 CH1_RK0: MR19=0x808, MR18=0x2943, DQSOSC=397, MR23=63, INC=166, DEC=110
4550 22:16:08.687454
4551 22:16:08.689010 ----->DramcWriteLeveling(PI) begin...
4552 22:16:08.689491 ==
4553 22:16:08.692653 Dram Type= 6, Freq= 0, CH_1, rank 1
4554 22:16:08.695801 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4555 22:16:08.696278 ==
4556 22:16:08.699059 Write leveling (Byte 0): 29 => 29
4557 22:16:08.702461 Write leveling (Byte 1): 30 => 30
4558 22:16:08.706057 DramcWriteLeveling(PI) end<-----
4559 22:16:08.706679
4560 22:16:08.707258 ==
4561 22:16:08.708700 Dram Type= 6, Freq= 0, CH_1, rank 1
4562 22:16:08.715747 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4563 22:16:08.716316 ==
4564 22:16:08.716696 [Gating] SW mode calibration
4565 22:16:08.725385 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4566 22:16:08.728521 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4567 22:16:08.731691 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4568 22:16:08.738162 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4569 22:16:08.742044 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4570 22:16:08.748435 0 9 12 | B1->B0 | 3232 2929 | 1 0 | (1 1) (0 0)
4571 22:16:08.751855 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4572 22:16:08.755355 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4573 22:16:08.761753 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4574 22:16:08.765116 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4575 22:16:08.768879 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4576 22:16:08.774956 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4577 22:16:08.777993 0 10 8 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
4578 22:16:08.781508 0 10 12 | B1->B0 | 3030 3c3c | 0 0 | (0 0) (0 0)
4579 22:16:08.788421 0 10 16 | B1->B0 | 3e3e 4646 | 1 0 | (0 0) (0 0)
4580 22:16:08.791530 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4581 22:16:08.794807 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4582 22:16:08.801883 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4583 22:16:08.804345 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4584 22:16:08.807713 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4585 22:16:08.814050 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4586 22:16:08.817724 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4587 22:16:08.821379 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4588 22:16:08.827770 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4589 22:16:08.830706 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4590 22:16:08.834374 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4591 22:16:08.838257 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4592 22:16:08.844506 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4593 22:16:08.847101 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4594 22:16:08.850590 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4595 22:16:08.857555 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4596 22:16:08.860591 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4597 22:16:08.863845 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4598 22:16:08.870458 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4599 22:16:08.873674 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4600 22:16:08.877520 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4601 22:16:08.883855 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4602 22:16:08.886985 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4603 22:16:08.891123 Total UI for P1: 0, mck2ui 16
4604 22:16:08.893766 best dqsien dly found for B0: ( 0, 13, 8)
4605 22:16:08.896475 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4606 22:16:08.899882 Total UI for P1: 0, mck2ui 16
4607 22:16:08.903629 best dqsien dly found for B1: ( 0, 13, 12)
4608 22:16:08.906954 best DQS0 dly(MCK, UI, PI) = (0, 13, 8)
4609 22:16:08.913315 best DQS1 dly(MCK, UI, PI) = (0, 13, 12)
4610 22:16:08.913888
4611 22:16:08.916079 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 8)
4612 22:16:08.919912 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 12)
4613 22:16:08.923250 [Gating] SW calibration Done
4614 22:16:08.923812 ==
4615 22:16:08.926356 Dram Type= 6, Freq= 0, CH_1, rank 1
4616 22:16:08.929683 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4617 22:16:08.930174 ==
4618 22:16:08.932847 RX Vref Scan: 0
4619 22:16:08.933411
4620 22:16:08.933786 RX Vref 0 -> 0, step: 1
4621 22:16:08.934135
4622 22:16:08.936187 RX Delay -230 -> 252, step: 16
4623 22:16:08.939085 iDelay=218, Bit 0, Center 49 (-118 ~ 217) 336
4624 22:16:08.946228 iDelay=218, Bit 1, Center 33 (-134 ~ 201) 336
4625 22:16:08.949397 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4626 22:16:08.952045 iDelay=218, Bit 3, Center 33 (-134 ~ 201) 336
4627 22:16:08.956444 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4628 22:16:08.962185 iDelay=218, Bit 5, Center 49 (-118 ~ 217) 336
4629 22:16:08.965873 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4630 22:16:08.968792 iDelay=218, Bit 7, Center 33 (-134 ~ 201) 336
4631 22:16:08.972473 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4632 22:16:08.979300 iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320
4633 22:16:08.981803 iDelay=218, Bit 10, Center 41 (-118 ~ 201) 320
4634 22:16:08.985732 iDelay=218, Bit 11, Center 33 (-134 ~ 201) 336
4635 22:16:08.988669 iDelay=218, Bit 12, Center 49 (-118 ~ 217) 336
4636 22:16:08.995870 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4637 22:16:08.998840 iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320
4638 22:16:09.001666 iDelay=218, Bit 15, Center 49 (-118 ~ 217) 336
4639 22:16:09.002229 ==
4640 22:16:09.005271 Dram Type= 6, Freq= 0, CH_1, rank 1
4641 22:16:09.008493 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4642 22:16:09.011919 ==
4643 22:16:09.012481 DQS Delay:
4644 22:16:09.012857 DQS0 = 0, DQS1 = 0
4645 22:16:09.014867 DQM Delay:
4646 22:16:09.015506 DQM0 = 40, DQM1 = 39
4647 22:16:09.018707 DQ Delay:
4648 22:16:09.021259 DQ0 =49, DQ1 =33, DQ2 =33, DQ3 =33
4649 22:16:09.021728 DQ4 =41, DQ5 =49, DQ6 =49, DQ7 =33
4650 22:16:09.024967 DQ8 =25, DQ9 =25, DQ10 =41, DQ11 =33
4651 22:16:09.032376 DQ12 =49, DQ13 =49, DQ14 =41, DQ15 =49
4652 22:16:09.032941
4653 22:16:09.033311
4654 22:16:09.033652 ==
4655 22:16:09.034857 Dram Type= 6, Freq= 0, CH_1, rank 1
4656 22:16:09.038198 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4657 22:16:09.038830 ==
4658 22:16:09.039293
4659 22:16:09.039827
4660 22:16:09.041068 TX Vref Scan disable
4661 22:16:09.041587 == TX Byte 0 ==
4662 22:16:09.047751 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4663 22:16:09.051259 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4664 22:16:09.051730 == TX Byte 1 ==
4665 22:16:09.058296 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4666 22:16:09.061384 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4667 22:16:09.061908 ==
4668 22:16:09.064498 Dram Type= 6, Freq= 0, CH_1, rank 1
4669 22:16:09.067733 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4670 22:16:09.068157 ==
4671 22:16:09.068492
4672 22:16:09.070587
4673 22:16:09.071011 TX Vref Scan disable
4674 22:16:09.074369 == TX Byte 0 ==
4675 22:16:09.077708 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4676 22:16:09.083900 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4677 22:16:09.084328 == TX Byte 1 ==
4678 22:16:09.087232 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4679 22:16:09.094627 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4680 22:16:09.095156
4681 22:16:09.095535 [DATLAT]
4682 22:16:09.095854 Freq=600, CH1 RK1
4683 22:16:09.096169
4684 22:16:09.097278 DATLAT Default: 0x9
4685 22:16:09.100480 0, 0xFFFF, sum = 0
4686 22:16:09.100912 1, 0xFFFF, sum = 0
4687 22:16:09.103610 2, 0xFFFF, sum = 0
4688 22:16:09.104038 3, 0xFFFF, sum = 0
4689 22:16:09.107101 4, 0xFFFF, sum = 0
4690 22:16:09.107693 5, 0xFFFF, sum = 0
4691 22:16:09.110518 6, 0xFFFF, sum = 0
4692 22:16:09.110944 7, 0xFFFF, sum = 0
4693 22:16:09.113879 8, 0x0, sum = 1
4694 22:16:09.114443 9, 0x0, sum = 2
4695 22:16:09.117397 10, 0x0, sum = 3
4696 22:16:09.117934 11, 0x0, sum = 4
4697 22:16:09.118282 best_step = 9
4698 22:16:09.118594
4699 22:16:09.120158 ==
4700 22:16:09.123710 Dram Type= 6, Freq= 0, CH_1, rank 1
4701 22:16:09.126840 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4702 22:16:09.127423 ==
4703 22:16:09.127843 RX Vref Scan: 0
4704 22:16:09.128171
4705 22:16:09.130237 RX Vref 0 -> 0, step: 1
4706 22:16:09.130772
4707 22:16:09.133097 RX Delay -179 -> 252, step: 8
4708 22:16:09.139911 iDelay=205, Bit 0, Center 40 (-115 ~ 196) 312
4709 22:16:09.143520 iDelay=205, Bit 1, Center 36 (-123 ~ 196) 320
4710 22:16:09.147647 iDelay=205, Bit 2, Center 28 (-131 ~ 188) 320
4711 22:16:09.150056 iDelay=205, Bit 3, Center 40 (-115 ~ 196) 312
4712 22:16:09.158042 iDelay=205, Bit 4, Center 36 (-123 ~ 196) 320
4713 22:16:09.160029 iDelay=205, Bit 5, Center 48 (-107 ~ 204) 312
4714 22:16:09.163358 iDelay=205, Bit 6, Center 44 (-115 ~ 204) 320
4715 22:16:09.166493 iDelay=205, Bit 7, Center 32 (-123 ~ 188) 312
4716 22:16:09.169500 iDelay=205, Bit 8, Center 24 (-131 ~ 180) 312
4717 22:16:09.176689 iDelay=205, Bit 9, Center 24 (-131 ~ 180) 312
4718 22:16:09.179343 iDelay=205, Bit 10, Center 40 (-115 ~ 196) 312
4719 22:16:09.182753 iDelay=205, Bit 11, Center 24 (-131 ~ 180) 312
4720 22:16:09.186641 iDelay=205, Bit 12, Center 44 (-107 ~ 196) 304
4721 22:16:09.192879 iDelay=205, Bit 13, Center 40 (-115 ~ 196) 312
4722 22:16:09.196110 iDelay=205, Bit 14, Center 40 (-115 ~ 196) 312
4723 22:16:09.199872 iDelay=205, Bit 15, Center 40 (-115 ~ 196) 312
4724 22:16:09.200443 ==
4725 22:16:09.202867 Dram Type= 6, Freq= 0, CH_1, rank 1
4726 22:16:09.208992 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4727 22:16:09.209559 ==
4728 22:16:09.209933 DQS Delay:
4729 22:16:09.212403 DQS0 = 0, DQS1 = 0
4730 22:16:09.212988 DQM Delay:
4731 22:16:09.213367 DQM0 = 38, DQM1 = 34
4732 22:16:09.215502 DQ Delay:
4733 22:16:09.219257 DQ0 =40, DQ1 =36, DQ2 =28, DQ3 =40
4734 22:16:09.222478 DQ4 =36, DQ5 =48, DQ6 =44, DQ7 =32
4735 22:16:09.225735 DQ8 =24, DQ9 =24, DQ10 =40, DQ11 =24
4736 22:16:09.228871 DQ12 =44, DQ13 =40, DQ14 =40, DQ15 =40
4737 22:16:09.229344
4738 22:16:09.229715
4739 22:16:09.235736 [DQSOSCAuto] RK1, (LSB)MR18= 0x3256, (MSB)MR19= 0x808, tDQSOscB0 = 393 ps tDQSOscB1 = 400 ps
4740 22:16:09.238836 CH1 RK1: MR19=808, MR18=3256
4741 22:16:09.245704 CH1_RK1: MR19=0x808, MR18=0x3256, DQSOSC=393, MR23=63, INC=169, DEC=113
4742 22:16:09.248357 [RxdqsGatingPostProcess] freq 600
4743 22:16:09.252224 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4744 22:16:09.255977 Pre-setting of DQS Precalculation
4745 22:16:09.261689 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4746 22:16:09.268572 sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5
4747 22:16:09.274845 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
4748 22:16:09.275497
4749 22:16:09.275873
4750 22:16:09.278057 [Calibration Summary] 1200 Mbps
4751 22:16:09.281257 CH 0, Rank 0
4752 22:16:09.281716 SW Impedance : PASS
4753 22:16:09.284756 DUTY Scan : NO K
4754 22:16:09.288048 ZQ Calibration : PASS
4755 22:16:09.288513 Jitter Meter : NO K
4756 22:16:09.291549 CBT Training : PASS
4757 22:16:09.292016 Write leveling : PASS
4758 22:16:09.294801 RX DQS gating : PASS
4759 22:16:09.297670 RX DQ/DQS(RDDQC) : PASS
4760 22:16:09.298087 TX DQ/DQS : PASS
4761 22:16:09.301606 RX DATLAT : PASS
4762 22:16:09.304747 RX DQ/DQS(Engine): PASS
4763 22:16:09.305269 TX OE : NO K
4764 22:16:09.308073 All Pass.
4765 22:16:09.308660
4766 22:16:09.309006 CH 0, Rank 1
4767 22:16:09.311307 SW Impedance : PASS
4768 22:16:09.311727 DUTY Scan : NO K
4769 22:16:09.314395 ZQ Calibration : PASS
4770 22:16:09.317491 Jitter Meter : NO K
4771 22:16:09.317910 CBT Training : PASS
4772 22:16:09.321467 Write leveling : PASS
4773 22:16:09.324512 RX DQS gating : PASS
4774 22:16:09.325037 RX DQ/DQS(RDDQC) : PASS
4775 22:16:09.327599 TX DQ/DQS : PASS
4776 22:16:09.331056 RX DATLAT : PASS
4777 22:16:09.331509 RX DQ/DQS(Engine): PASS
4778 22:16:09.334177 TX OE : NO K
4779 22:16:09.334701 All Pass.
4780 22:16:09.335041
4781 22:16:09.337262 CH 1, Rank 0
4782 22:16:09.337678 SW Impedance : PASS
4783 22:16:09.340707 DUTY Scan : NO K
4784 22:16:09.344021 ZQ Calibration : PASS
4785 22:16:09.344450 Jitter Meter : NO K
4786 22:16:09.347241 CBT Training : PASS
4787 22:16:09.350448 Write leveling : PASS
4788 22:16:09.350871 RX DQS gating : PASS
4789 22:16:09.353970 RX DQ/DQS(RDDQC) : PASS
4790 22:16:09.357017 TX DQ/DQS : PASS
4791 22:16:09.357445 RX DATLAT : PASS
4792 22:16:09.360645 RX DQ/DQS(Engine): PASS
4793 22:16:09.363615 TX OE : NO K
4794 22:16:09.364148 All Pass.
4795 22:16:09.364491
4796 22:16:09.364808 CH 1, Rank 1
4797 22:16:09.367276 SW Impedance : PASS
4798 22:16:09.370427 DUTY Scan : NO K
4799 22:16:09.370843 ZQ Calibration : PASS
4800 22:16:09.373461 Jitter Meter : NO K
4801 22:16:09.376903 CBT Training : PASS
4802 22:16:09.377424 Write leveling : PASS
4803 22:16:09.380456 RX DQS gating : PASS
4804 22:16:09.383387 RX DQ/DQS(RDDQC) : PASS
4805 22:16:09.383913 TX DQ/DQS : PASS
4806 22:16:09.386587 RX DATLAT : PASS
4807 22:16:09.387008 RX DQ/DQS(Engine): PASS
4808 22:16:09.389840 TX OE : NO K
4809 22:16:09.390262 All Pass.
4810 22:16:09.390597
4811 22:16:09.393190 DramC Write-DBI off
4812 22:16:09.396723 PER_BANK_REFRESH: Hybrid Mode
4813 22:16:09.397145 TX_TRACKING: ON
4814 22:16:09.407260 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1
4815 22:16:09.410117 [FAST_K] Save calibration result to emmc
4816 22:16:09.413065 dramc_set_vcore_voltage set vcore to 662500
4817 22:16:09.416517 Read voltage for 933, 3
4818 22:16:09.417081 Vio18 = 0
4819 22:16:09.419758 Vcore = 662500
4820 22:16:09.420225 Vdram = 0
4821 22:16:09.420598 Vddq = 0
4822 22:16:09.420943 Vmddr = 0
4823 22:16:09.426507 [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0
4824 22:16:09.433321 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
4825 22:16:09.433859 MEM_TYPE=3, freq_sel=17
4826 22:16:09.435907 sv_algorithm_assistance_LP4_1600
4827 22:16:09.439080 ============ PULL DRAM RESETB DOWN ============
4828 22:16:09.446352 ========== PULL DRAM RESETB DOWN end =========
4829 22:16:09.449144 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4830 22:16:09.452523 ===================================
4831 22:16:09.455841 LPDDR4 DRAM CONFIGURATION
4832 22:16:09.459277 ===================================
4833 22:16:09.459705 EX_ROW_EN[0] = 0x0
4834 22:16:09.462453 EX_ROW_EN[1] = 0x0
4835 22:16:09.466031 LP4Y_EN = 0x0
4836 22:16:09.466618 WORK_FSP = 0x0
4837 22:16:09.469117 WL = 0x3
4838 22:16:09.469565 RL = 0x3
4839 22:16:09.472155 BL = 0x2
4840 22:16:09.472579 RPST = 0x0
4841 22:16:09.475672 RD_PRE = 0x0
4842 22:16:09.476096 WR_PRE = 0x1
4843 22:16:09.478644 WR_PST = 0x0
4844 22:16:09.479066 DBI_WR = 0x0
4845 22:16:09.481919 DBI_RD = 0x0
4846 22:16:09.482340 OTF = 0x1
4847 22:16:09.485169 ===================================
4848 22:16:09.488401 ===================================
4849 22:16:09.492485 ANA top config
4850 22:16:09.495243 ===================================
4851 22:16:09.495678 DLL_ASYNC_EN = 0
4852 22:16:09.498901 ALL_SLAVE_EN = 1
4853 22:16:09.502095 NEW_RANK_MODE = 1
4854 22:16:09.505581 DLL_IDLE_MODE = 1
4855 22:16:09.508432 LP45_APHY_COMB_EN = 1
4856 22:16:09.508857 TX_ODT_DIS = 1
4857 22:16:09.511454 NEW_8X_MODE = 1
4858 22:16:09.514767 ===================================
4859 22:16:09.518085 ===================================
4860 22:16:09.522162 data_rate = 1866
4861 22:16:09.524536 CKR = 1
4862 22:16:09.528390 DQ_P2S_RATIO = 8
4863 22:16:09.531328 ===================================
4864 22:16:09.535370 CA_P2S_RATIO = 8
4865 22:16:09.535888 DQ_CA_OPEN = 0
4866 22:16:09.538382 DQ_SEMI_OPEN = 0
4867 22:16:09.541256 CA_SEMI_OPEN = 0
4868 22:16:09.544754 CA_FULL_RATE = 0
4869 22:16:09.548075 DQ_CKDIV4_EN = 1
4870 22:16:09.551540 CA_CKDIV4_EN = 1
4871 22:16:09.551963 CA_PREDIV_EN = 0
4872 22:16:09.554795 PH8_DLY = 0
4873 22:16:09.558453 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
4874 22:16:09.561228 DQ_AAMCK_DIV = 4
4875 22:16:09.564313 CA_AAMCK_DIV = 4
4876 22:16:09.567999 CA_ADMCK_DIV = 4
4877 22:16:09.568553 DQ_TRACK_CA_EN = 0
4878 22:16:09.571747 CA_PICK = 933
4879 22:16:09.574772 CA_MCKIO = 933
4880 22:16:09.578032 MCKIO_SEMI = 0
4881 22:16:09.581122 PLL_FREQ = 3732
4882 22:16:09.584479 DQ_UI_PI_RATIO = 32
4883 22:16:09.587917 CA_UI_PI_RATIO = 0
4884 22:16:09.590892 ===================================
4885 22:16:09.594367 ===================================
4886 22:16:09.594934 memory_type:LPDDR4
4887 22:16:09.597632 GP_NUM : 10
4888 22:16:09.601463 SRAM_EN : 1
4889 22:16:09.601932 MD32_EN : 0
4890 22:16:09.603988 ===================================
4891 22:16:09.607835 [ANA_INIT] >>>>>>>>>>>>>>
4892 22:16:09.611270 <<<<<< [CONFIGURE PHASE]: ANA_TX
4893 22:16:09.614270 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
4894 22:16:09.616887 ===================================
4895 22:16:09.620965 data_rate = 1866,PCW = 0X8f00
4896 22:16:09.624442 ===================================
4897 22:16:09.627153 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
4898 22:16:09.631086 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4899 22:16:09.637188 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4900 22:16:09.643743 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
4901 22:16:09.646953 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
4902 22:16:09.650430 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
4903 22:16:09.651038 [ANA_INIT] flow start
4904 22:16:09.653271 [ANA_INIT] PLL >>>>>>>>
4905 22:16:09.656753 [ANA_INIT] PLL <<<<<<<<
4906 22:16:09.657318 [ANA_INIT] MIDPI >>>>>>>>
4907 22:16:09.659757 [ANA_INIT] MIDPI <<<<<<<<
4908 22:16:09.663389 [ANA_INIT] DLL >>>>>>>>
4909 22:16:09.663904 [ANA_INIT] flow end
4910 22:16:09.670465 ============ LP4 DIFF to SE enter ============
4911 22:16:09.673351 ============ LP4 DIFF to SE exit ============
4912 22:16:09.676728 [ANA_INIT] <<<<<<<<<<<<<
4913 22:16:09.679858 [Flow] Enable top DCM control >>>>>
4914 22:16:09.683083 [Flow] Enable top DCM control <<<<<
4915 22:16:09.683571 Enable DLL master slave shuffle
4916 22:16:09.690044 ==============================================================
4917 22:16:09.693183 Gating Mode config
4918 22:16:09.696704 ==============================================================
4919 22:16:09.699263 Config description:
4920 22:16:09.709337 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
4921 22:16:09.716388 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
4922 22:16:09.719018 SELPH_MODE 0: By rank 1: By Phase
4923 22:16:09.725934 ==============================================================
4924 22:16:09.729133 GAT_TRACK_EN = 1
4925 22:16:09.732541 RX_GATING_MODE = 2
4926 22:16:09.735506 RX_GATING_TRACK_MODE = 2
4927 22:16:09.739150 SELPH_MODE = 1
4928 22:16:09.741975 PICG_EARLY_EN = 1
4929 22:16:09.742400 VALID_LAT_VALUE = 1
4930 22:16:09.749172 ==============================================================
4931 22:16:09.751996 Enter into Gating configuration >>>>
4932 22:16:09.755277 Exit from Gating configuration <<<<
4933 22:16:09.758657 Enter into DVFS_PRE_config >>>>>
4934 22:16:09.772163 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
4935 22:16:09.772723 Exit from DVFS_PRE_config <<<<<
4936 22:16:09.775566 Enter into PICG configuration >>>>
4937 22:16:09.778623 Exit from PICG configuration <<<<
4938 22:16:09.781523 [RX_INPUT] configuration >>>>>
4939 22:16:09.785483 [RX_INPUT] configuration <<<<<
4940 22:16:09.791638 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
4941 22:16:09.794891 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
4942 22:16:09.802319 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
4943 22:16:09.808374 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
4944 22:16:09.814683 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
4945 22:16:09.821353 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
4946 22:16:09.824865 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
4947 22:16:09.827992 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
4948 22:16:09.831125 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
4949 22:16:09.837885 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
4950 22:16:09.841477 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
4951 22:16:09.844107 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4952 22:16:09.847990 ===================================
4953 22:16:09.850949 LPDDR4 DRAM CONFIGURATION
4954 22:16:09.854102 ===================================
4955 22:16:09.857691 EX_ROW_EN[0] = 0x0
4956 22:16:09.858213 EX_ROW_EN[1] = 0x0
4957 22:16:09.860529 LP4Y_EN = 0x0
4958 22:16:09.860946 WORK_FSP = 0x0
4959 22:16:09.864442 WL = 0x3
4960 22:16:09.864859 RL = 0x3
4961 22:16:09.867635 BL = 0x2
4962 22:16:09.868053 RPST = 0x0
4963 22:16:09.871383 RD_PRE = 0x0
4964 22:16:09.871803 WR_PRE = 0x1
4965 22:16:09.873594 WR_PST = 0x0
4966 22:16:09.874009 DBI_WR = 0x0
4967 22:16:09.877304 DBI_RD = 0x0
4968 22:16:09.880705 OTF = 0x1
4969 22:16:09.883647 ===================================
4970 22:16:09.887322 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
4971 22:16:09.890387 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
4972 22:16:09.893534 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4973 22:16:09.896876 ===================================
4974 22:16:09.900189 LPDDR4 DRAM CONFIGURATION
4975 22:16:09.903941 ===================================
4976 22:16:09.906608 EX_ROW_EN[0] = 0x10
4977 22:16:09.907028 EX_ROW_EN[1] = 0x0
4978 22:16:09.909999 LP4Y_EN = 0x0
4979 22:16:09.910415 WORK_FSP = 0x0
4980 22:16:09.913650 WL = 0x3
4981 22:16:09.914166 RL = 0x3
4982 22:16:09.917335 BL = 0x2
4983 22:16:09.917873 RPST = 0x0
4984 22:16:09.919963 RD_PRE = 0x0
4985 22:16:09.920382 WR_PRE = 0x1
4986 22:16:09.923224 WR_PST = 0x0
4987 22:16:09.926572 DBI_WR = 0x0
4988 22:16:09.927088 DBI_RD = 0x0
4989 22:16:09.930407 OTF = 0x1
4990 22:16:09.933083 ===================================
4991 22:16:09.936725 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
4992 22:16:09.941928 nWR fixed to 30
4993 22:16:09.945096 [ModeRegInit_LP4] CH0 RK0
4994 22:16:09.945522 [ModeRegInit_LP4] CH0 RK1
4995 22:16:09.948643 [ModeRegInit_LP4] CH1 RK0
4996 22:16:09.951629 [ModeRegInit_LP4] CH1 RK1
4997 22:16:09.952119 match AC timing 9
4998 22:16:09.958333 dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 1
4999 22:16:09.961631 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
5000 22:16:09.965129 [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10
5001 22:16:09.971524 [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21
5002 22:16:09.974852 [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)
5003 22:16:09.975404 ==
5004 22:16:09.978201 Dram Type= 6, Freq= 0, CH_0, rank 0
5005 22:16:09.981956 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5006 22:16:09.982487 ==
5007 22:16:09.988099 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5008 22:16:09.994340 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5009 22:16:09.997708 [CA 0] Center 37 (7~68) winsize 62
5010 22:16:10.001577 [CA 1] Center 37 (7~68) winsize 62
5011 22:16:10.004711 [CA 2] Center 34 (4~64) winsize 61
5012 22:16:10.007887 [CA 3] Center 34 (4~65) winsize 62
5013 22:16:10.011146 [CA 4] Center 32 (2~63) winsize 62
5014 22:16:10.014479 [CA 5] Center 32 (2~63) winsize 62
5015 22:16:10.014898
5016 22:16:10.017721 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5017 22:16:10.018259
5018 22:16:10.021490 [CATrainingPosCal] consider 1 rank data
5019 22:16:10.025438 u2DelayCellTimex100 = 270/100 ps
5020 22:16:10.027915 CA0 delay=37 (7~68),Diff = 5 PI (31 cell)
5021 22:16:10.030686 CA1 delay=37 (7~68),Diff = 5 PI (31 cell)
5022 22:16:10.034374 CA2 delay=34 (4~64),Diff = 2 PI (12 cell)
5023 22:16:10.041073 CA3 delay=34 (4~65),Diff = 2 PI (12 cell)
5024 22:16:10.043956 CA4 delay=32 (2~63),Diff = 0 PI (0 cell)
5025 22:16:10.047507 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
5026 22:16:10.047930
5027 22:16:10.050697 CA PerBit enable=1, Macro0, CA PI delay=32
5028 22:16:10.051262
5029 22:16:10.054432 [CBTSetCACLKResult] CA Dly = 32
5030 22:16:10.054848 CS Dly: 6 (0~37)
5031 22:16:10.055216 ==
5032 22:16:10.056968 Dram Type= 6, Freq= 0, CH_0, rank 1
5033 22:16:10.063872 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5034 22:16:10.064391 ==
5035 22:16:10.067196 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5036 22:16:10.074092 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
5037 22:16:10.076950 [CA 0] Center 38 (8~68) winsize 61
5038 22:16:10.080630 [CA 1] Center 37 (7~68) winsize 62
5039 22:16:10.083591 [CA 2] Center 34 (4~65) winsize 62
5040 22:16:10.087678 [CA 3] Center 34 (4~65) winsize 62
5041 22:16:10.090211 [CA 4] Center 33 (3~64) winsize 62
5042 22:16:10.093471 [CA 5] Center 32 (2~63) winsize 62
5043 22:16:10.093997
5044 22:16:10.097128 [CmdBusTrainingLP45] Vref(ca) range 1: 37
5045 22:16:10.097653
5046 22:16:10.099635 [CATrainingPosCal] consider 2 rank data
5047 22:16:10.103419 u2DelayCellTimex100 = 270/100 ps
5048 22:16:10.109669 CA0 delay=38 (8~68),Diff = 6 PI (37 cell)
5049 22:16:10.113766 CA1 delay=37 (7~68),Diff = 5 PI (31 cell)
5050 22:16:10.116188 CA2 delay=34 (4~64),Diff = 2 PI (12 cell)
5051 22:16:10.120183 CA3 delay=34 (4~65),Diff = 2 PI (12 cell)
5052 22:16:10.123022 CA4 delay=33 (3~63),Diff = 1 PI (6 cell)
5053 22:16:10.126144 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
5054 22:16:10.126689
5055 22:16:10.129690 CA PerBit enable=1, Macro0, CA PI delay=32
5056 22:16:10.130111
5057 22:16:10.132889 [CBTSetCACLKResult] CA Dly = 32
5058 22:16:10.136177 CS Dly: 7 (0~39)
5059 22:16:10.136598
5060 22:16:10.139225 ----->DramcWriteLeveling(PI) begin...
5061 22:16:10.139652 ==
5062 22:16:10.143710 Dram Type= 6, Freq= 0, CH_0, rank 0
5063 22:16:10.145748 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5064 22:16:10.146172 ==
5065 22:16:10.149080 Write leveling (Byte 0): 32 => 32
5066 22:16:10.153856 Write leveling (Byte 1): 27 => 27
5067 22:16:10.155697 DramcWriteLeveling(PI) end<-----
5068 22:16:10.156112
5069 22:16:10.156441 ==
5070 22:16:10.159326 Dram Type= 6, Freq= 0, CH_0, rank 0
5071 22:16:10.162597 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5072 22:16:10.163120 ==
5073 22:16:10.165723 [Gating] SW mode calibration
5074 22:16:10.172212 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5075 22:16:10.178987 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5076 22:16:10.182597 0 14 0 | B1->B0 | 2828 3333 | 0 1 | (0 0) (0 0)
5077 22:16:10.188916 0 14 4 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
5078 22:16:10.191997 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5079 22:16:10.196087 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5080 22:16:10.202222 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5081 22:16:10.205626 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5082 22:16:10.208619 0 14 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5083 22:16:10.215592 0 14 28 | B1->B0 | 3434 2f2f | 1 0 | (1 0) (1 0)
5084 22:16:10.218983 0 15 0 | B1->B0 | 3030 2323 | 0 0 | (0 1) (0 0)
5085 22:16:10.222055 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5086 22:16:10.228648 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5087 22:16:10.231368 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5088 22:16:10.234902 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5089 22:16:10.241966 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5090 22:16:10.245685 0 15 24 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
5091 22:16:10.248174 0 15 28 | B1->B0 | 2323 3837 | 0 1 | (0 0) (0 0)
5092 22:16:10.252325 1 0 0 | B1->B0 | 3939 4646 | 0 0 | (0 0) (0 0)
5093 22:16:10.258392 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5094 22:16:10.261747 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5095 22:16:10.265008 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5096 22:16:10.271977 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5097 22:16:10.274998 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5098 22:16:10.278782 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5099 22:16:10.284721 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5100 22:16:10.288052 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5101 22:16:10.291094 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5102 22:16:10.297933 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5103 22:16:10.301346 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5104 22:16:10.304605 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5105 22:16:10.311342 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5106 22:16:10.314411 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5107 22:16:10.317821 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5108 22:16:10.324086 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5109 22:16:10.328126 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5110 22:16:10.330916 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5111 22:16:10.337322 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5112 22:16:10.340898 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5113 22:16:10.343854 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5114 22:16:10.351012 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5115 22:16:10.353598 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5116 22:16:10.357533 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5117 22:16:10.360653 Total UI for P1: 0, mck2ui 16
5118 22:16:10.363608 best dqsien dly found for B0: ( 1, 2, 28)
5119 22:16:10.370513 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5120 22:16:10.373530 Total UI for P1: 0, mck2ui 16
5121 22:16:10.377729 best dqsien dly found for B1: ( 1, 3, 0)
5122 22:16:10.380423 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5123 22:16:10.383850 best DQS1 dly(MCK, UI, PI) = (1, 3, 0)
5124 22:16:10.384320
5125 22:16:10.386852 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5126 22:16:10.390584 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 0)
5127 22:16:10.393867 [Gating] SW calibration Done
5128 22:16:10.394431 ==
5129 22:16:10.397175 Dram Type= 6, Freq= 0, CH_0, rank 0
5130 22:16:10.400132 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5131 22:16:10.400702 ==
5132 22:16:10.403775 RX Vref Scan: 0
5133 22:16:10.404342
5134 22:16:10.406476 RX Vref 0 -> 0, step: 1
5135 22:16:10.407039
5136 22:16:10.407459 RX Delay -80 -> 252, step: 8
5137 22:16:10.412854 iDelay=208, Bit 0, Center 99 (0 ~ 199) 200
5138 22:16:10.416198 iDelay=208, Bit 1, Center 99 (0 ~ 199) 200
5139 22:16:10.419626 iDelay=208, Bit 2, Center 95 (0 ~ 191) 192
5140 22:16:10.422832 iDelay=208, Bit 3, Center 95 (0 ~ 191) 192
5141 22:16:10.427334 iDelay=208, Bit 4, Center 103 (8 ~ 199) 192
5142 22:16:10.429657 iDelay=208, Bit 5, Center 91 (-8 ~ 191) 200
5143 22:16:10.436547 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5144 22:16:10.439934 iDelay=208, Bit 7, Center 111 (16 ~ 207) 192
5145 22:16:10.442873 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5146 22:16:10.446071 iDelay=208, Bit 9, Center 75 (-16 ~ 167) 184
5147 22:16:10.449712 iDelay=208, Bit 10, Center 87 (-8 ~ 183) 192
5148 22:16:10.455642 iDelay=208, Bit 11, Center 83 (-8 ~ 175) 184
5149 22:16:10.459209 iDelay=208, Bit 12, Center 95 (0 ~ 191) 192
5150 22:16:10.462240 iDelay=208, Bit 13, Center 95 (0 ~ 191) 192
5151 22:16:10.465885 iDelay=208, Bit 14, Center 95 (0 ~ 191) 192
5152 22:16:10.469391 iDelay=208, Bit 15, Center 95 (0 ~ 191) 192
5153 22:16:10.469961 ==
5154 22:16:10.472966 Dram Type= 6, Freq= 0, CH_0, rank 0
5155 22:16:10.479276 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5156 22:16:10.479842 ==
5157 22:16:10.480216 DQS Delay:
5158 22:16:10.482238 DQS0 = 0, DQS1 = 0
5159 22:16:10.482703 DQM Delay:
5160 22:16:10.485529 DQM0 = 100, DQM1 = 88
5161 22:16:10.485990 DQ Delay:
5162 22:16:10.489029 DQ0 =99, DQ1 =99, DQ2 =95, DQ3 =95
5163 22:16:10.492357 DQ4 =103, DQ5 =91, DQ6 =111, DQ7 =111
5164 22:16:10.495525 DQ8 =83, DQ9 =75, DQ10 =87, DQ11 =83
5165 22:16:10.498667 DQ12 =95, DQ13 =95, DQ14 =95, DQ15 =95
5166 22:16:10.499290
5167 22:16:10.499668
5168 22:16:10.500016 ==
5169 22:16:10.502214 Dram Type= 6, Freq= 0, CH_0, rank 0
5170 22:16:10.505483 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5171 22:16:10.506065 ==
5172 22:16:10.506447
5173 22:16:10.509112
5174 22:16:10.509678 TX Vref Scan disable
5175 22:16:10.511951 == TX Byte 0 ==
5176 22:16:10.514971 Update DQ dly =716 (2 ,6, 12) DQ OEN =(2 ,3)
5177 22:16:10.518195 Update DQM dly =716 (2 ,6, 12) DQM OEN =(2 ,3)
5178 22:16:10.521600 == TX Byte 1 ==
5179 22:16:10.524978 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5180 22:16:10.528705 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5181 22:16:10.529285 ==
5182 22:16:10.531540 Dram Type= 6, Freq= 0, CH_0, rank 0
5183 22:16:10.538706 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5184 22:16:10.539327 ==
5185 22:16:10.539714
5186 22:16:10.540065
5187 22:16:10.540423 TX Vref Scan disable
5188 22:16:10.542828 == TX Byte 0 ==
5189 22:16:10.546107 Update DQ dly =716 (2 ,6, 12) DQ OEN =(2 ,3)
5190 22:16:10.553368 Update DQM dly =716 (2 ,6, 12) DQM OEN =(2 ,3)
5191 22:16:10.553946 == TX Byte 1 ==
5192 22:16:10.555775 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5193 22:16:10.559060 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5194 22:16:10.562405
5195 22:16:10.562873 [DATLAT]
5196 22:16:10.563288 Freq=933, CH0 RK0
5197 22:16:10.563645
5198 22:16:10.565951 DATLAT Default: 0xd
5199 22:16:10.566514 0, 0xFFFF, sum = 0
5200 22:16:10.569957 1, 0xFFFF, sum = 0
5201 22:16:10.570532 2, 0xFFFF, sum = 0
5202 22:16:10.572459 3, 0xFFFF, sum = 0
5203 22:16:10.575546 4, 0xFFFF, sum = 0
5204 22:16:10.576023 5, 0xFFFF, sum = 0
5205 22:16:10.579122 6, 0xFFFF, sum = 0
5206 22:16:10.579790 7, 0xFFFF, sum = 0
5207 22:16:10.582600 8, 0xFFFF, sum = 0
5208 22:16:10.583130 9, 0xFFFF, sum = 0
5209 22:16:10.585610 10, 0x0, sum = 1
5210 22:16:10.586142 11, 0x0, sum = 2
5211 22:16:10.588518 12, 0x0, sum = 3
5212 22:16:10.588950 13, 0x0, sum = 4
5213 22:16:10.589298 best_step = 11
5214 22:16:10.592145
5215 22:16:10.592569 ==
5216 22:16:10.596093 Dram Type= 6, Freq= 0, CH_0, rank 0
5217 22:16:10.598931 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5218 22:16:10.599500 ==
5219 22:16:10.599847 RX Vref Scan: 1
5220 22:16:10.600166
5221 22:16:10.602132 RX Vref 0 -> 0, step: 1
5222 22:16:10.602558
5223 22:16:10.605620 RX Delay -61 -> 252, step: 4
5224 22:16:10.606047
5225 22:16:10.608511 Set Vref, RX VrefLevel [Byte0]: 53
5226 22:16:10.611985 [Byte1]: 49
5227 22:16:10.612511
5228 22:16:10.615270 Final RX Vref Byte 0 = 53 to rank0
5229 22:16:10.618907 Final RX Vref Byte 1 = 49 to rank0
5230 22:16:10.621714 Final RX Vref Byte 0 = 53 to rank1
5231 22:16:10.624878 Final RX Vref Byte 1 = 49 to rank1==
5232 22:16:10.628216 Dram Type= 6, Freq= 0, CH_0, rank 0
5233 22:16:10.634951 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5234 22:16:10.635514 ==
5235 22:16:10.635855 DQS Delay:
5236 22:16:10.638471 DQS0 = 0, DQS1 = 0
5237 22:16:10.638936 DQM Delay:
5238 22:16:10.639338 DQM0 = 98, DQM1 = 87
5239 22:16:10.641663 DQ Delay:
5240 22:16:10.644724 DQ0 =100, DQ1 =98, DQ2 =94, DQ3 =96
5241 22:16:10.648756 DQ4 =98, DQ5 =90, DQ6 =108, DQ7 =104
5242 22:16:10.651266 DQ8 =80, DQ9 =74, DQ10 =88, DQ11 =82
5243 22:16:10.654694 DQ12 =94, DQ13 =88, DQ14 =98, DQ15 =94
5244 22:16:10.655331
5245 22:16:10.655850
5246 22:16:10.661367 [DQSOSCAuto] RK0, (LSB)MR18= 0x1c17, (MSB)MR19= 0x505, tDQSOscB0 = 414 ps tDQSOscB1 = 412 ps
5247 22:16:10.664756 CH0 RK0: MR19=505, MR18=1C17
5248 22:16:10.671269 CH0_RK0: MR19=0x505, MR18=0x1C17, DQSOSC=412, MR23=63, INC=63, DEC=42
5249 22:16:10.671875
5250 22:16:10.675264 ----->DramcWriteLeveling(PI) begin...
5251 22:16:10.675760 ==
5252 22:16:10.678422 Dram Type= 6, Freq= 0, CH_0, rank 1
5253 22:16:10.681635 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5254 22:16:10.682247 ==
5255 22:16:10.684289 Write leveling (Byte 0): 33 => 33
5256 22:16:10.688002 Write leveling (Byte 1): 30 => 30
5257 22:16:10.690612 DramcWriteLeveling(PI) end<-----
5258 22:16:10.691147
5259 22:16:10.691610 ==
5260 22:16:10.693926 Dram Type= 6, Freq= 0, CH_0, rank 1
5261 22:16:10.700852 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5262 22:16:10.701393 ==
5263 22:16:10.701834 [Gating] SW mode calibration
5264 22:16:10.710608 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5265 22:16:10.714089 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5266 22:16:10.720682 0 14 0 | B1->B0 | 2b2b 3434 | 1 1 | (0 0) (1 1)
5267 22:16:10.723556 0 14 4 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
5268 22:16:10.726988 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5269 22:16:10.733369 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5270 22:16:10.737657 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5271 22:16:10.740441 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5272 22:16:10.747360 0 14 24 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
5273 22:16:10.750271 0 14 28 | B1->B0 | 3333 2d2d | 1 0 | (1 0) (0 0)
5274 22:16:10.753121 0 15 0 | B1->B0 | 2c2c 2424 | 0 0 | (1 1) (0 0)
5275 22:16:10.759951 0 15 4 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
5276 22:16:10.763607 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5277 22:16:10.766431 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5278 22:16:10.773180 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5279 22:16:10.776713 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5280 22:16:10.779360 0 15 24 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
5281 22:16:10.786835 0 15 28 | B1->B0 | 2e2e 4242 | 1 0 | (0 0) (0 0)
5282 22:16:10.789580 1 0 0 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)
5283 22:16:10.792569 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5284 22:16:10.799339 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5285 22:16:10.802906 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5286 22:16:10.805649 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5287 22:16:10.812298 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5288 22:16:10.815739 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5289 22:16:10.818936 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5290 22:16:10.825896 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5291 22:16:10.828600 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5292 22:16:10.831824 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5293 22:16:10.838633 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5294 22:16:10.841640 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5295 22:16:10.844932 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5296 22:16:10.851868 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5297 22:16:10.855434 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5298 22:16:10.858167 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5299 22:16:10.865167 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5300 22:16:10.869000 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5301 22:16:10.871669 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5302 22:16:10.878449 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5303 22:16:10.881944 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5304 22:16:10.884810 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5305 22:16:10.891661 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5306 22:16:10.894343 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5307 22:16:10.898354 Total UI for P1: 0, mck2ui 16
5308 22:16:10.901645 best dqsien dly found for B0: ( 1, 2, 26)
5309 22:16:10.905819 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5310 22:16:10.907803 Total UI for P1: 0, mck2ui 16
5311 22:16:10.911290 best dqsien dly found for B1: ( 1, 3, 0)
5312 22:16:10.914847 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5313 22:16:10.918169 best DQS1 dly(MCK, UI, PI) = (1, 3, 0)
5314 22:16:10.918732
5315 22:16:10.924548 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5316 22:16:10.927992 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 0)
5317 22:16:10.930956 [Gating] SW calibration Done
5318 22:16:10.931548 ==
5319 22:16:10.933914 Dram Type= 6, Freq= 0, CH_0, rank 1
5320 22:16:10.937862 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5321 22:16:10.938520 ==
5322 22:16:10.938891 RX Vref Scan: 0
5323 22:16:10.939265
5324 22:16:10.940340 RX Vref 0 -> 0, step: 1
5325 22:16:10.940878
5326 22:16:10.943855 RX Delay -80 -> 252, step: 8
5327 22:16:10.947358 iDelay=200, Bit 0, Center 99 (8 ~ 191) 184
5328 22:16:10.950238 iDelay=200, Bit 1, Center 103 (8 ~ 199) 192
5329 22:16:10.953485 iDelay=200, Bit 2, Center 95 (0 ~ 191) 192
5330 22:16:10.960454 iDelay=200, Bit 3, Center 95 (0 ~ 191) 192
5331 22:16:10.963962 iDelay=200, Bit 4, Center 103 (8 ~ 199) 192
5332 22:16:10.967314 iDelay=200, Bit 5, Center 87 (-8 ~ 183) 192
5333 22:16:10.970406 iDelay=200, Bit 6, Center 103 (8 ~ 199) 192
5334 22:16:10.973482 iDelay=200, Bit 7, Center 103 (8 ~ 199) 192
5335 22:16:10.976734 iDelay=200, Bit 8, Center 83 (-8 ~ 175) 184
5336 22:16:10.983606 iDelay=200, Bit 9, Center 75 (-16 ~ 167) 184
5337 22:16:10.986946 iDelay=200, Bit 10, Center 91 (0 ~ 183) 184
5338 22:16:10.989826 iDelay=200, Bit 11, Center 83 (-8 ~ 175) 184
5339 22:16:10.993487 iDelay=200, Bit 12, Center 95 (0 ~ 191) 192
5340 22:16:10.996629 iDelay=200, Bit 13, Center 95 (0 ~ 191) 192
5341 22:16:11.003445 iDelay=200, Bit 14, Center 99 (8 ~ 191) 184
5342 22:16:11.006691 iDelay=200, Bit 15, Center 91 (0 ~ 183) 184
5343 22:16:11.007307 ==
5344 22:16:11.009793 Dram Type= 6, Freq= 0, CH_0, rank 1
5345 22:16:11.013148 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5346 22:16:11.013616 ==
5347 22:16:11.016412 DQS Delay:
5348 22:16:11.016970 DQS0 = 0, DQS1 = 0
5349 22:16:11.017373 DQM Delay:
5350 22:16:11.019884 DQM0 = 98, DQM1 = 89
5351 22:16:11.020461 DQ Delay:
5352 22:16:11.023443 DQ0 =99, DQ1 =103, DQ2 =95, DQ3 =95
5353 22:16:11.026214 DQ4 =103, DQ5 =87, DQ6 =103, DQ7 =103
5354 22:16:11.029948 DQ8 =83, DQ9 =75, DQ10 =91, DQ11 =83
5355 22:16:11.032707 DQ12 =95, DQ13 =95, DQ14 =99, DQ15 =91
5356 22:16:11.033173
5357 22:16:11.033539
5358 22:16:11.036115 ==
5359 22:16:11.036680 Dram Type= 6, Freq= 0, CH_0, rank 1
5360 22:16:11.042703 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5361 22:16:11.043350 ==
5362 22:16:11.043739
5363 22:16:11.044089
5364 22:16:11.045974 TX Vref Scan disable
5365 22:16:11.046444 == TX Byte 0 ==
5366 22:16:11.049464 Update DQ dly =718 (2 ,6, 14) DQ OEN =(2 ,3)
5367 22:16:11.055700 Update DQM dly =718 (2 ,6, 14) DQM OEN =(2 ,3)
5368 22:16:11.056288 == TX Byte 1 ==
5369 22:16:11.062380 Update DQ dly =713 (2 ,5, 41) DQ OEN =(2 ,2)
5370 22:16:11.065922 Update DQM dly =713 (2 ,5, 41) DQM OEN =(2 ,2)
5371 22:16:11.066506 ==
5372 22:16:11.068978 Dram Type= 6, Freq= 0, CH_0, rank 1
5373 22:16:11.072175 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5374 22:16:11.072651 ==
5375 22:16:11.073093
5376 22:16:11.073449
5377 22:16:11.075465 TX Vref Scan disable
5378 22:16:11.078867 == TX Byte 0 ==
5379 22:16:11.082353 Update DQ dly =717 (2 ,6, 13) DQ OEN =(2 ,3)
5380 22:16:11.085768 Update DQM dly =717 (2 ,6, 13) DQM OEN =(2 ,3)
5381 22:16:11.088893 == TX Byte 1 ==
5382 22:16:11.091988 Update DQ dly =713 (2 ,5, 41) DQ OEN =(2 ,2)
5383 22:16:11.095680 Update DQM dly =713 (2 ,5, 41) DQM OEN =(2 ,2)
5384 22:16:11.096157
5385 22:16:11.099089 [DATLAT]
5386 22:16:11.099689 Freq=933, CH0 RK1
5387 22:16:11.100070
5388 22:16:11.102183 DATLAT Default: 0xb
5389 22:16:11.102755 0, 0xFFFF, sum = 0
5390 22:16:11.105649 1, 0xFFFF, sum = 0
5391 22:16:11.106131 2, 0xFFFF, sum = 0
5392 22:16:11.108313 3, 0xFFFF, sum = 0
5393 22:16:11.108792 4, 0xFFFF, sum = 0
5394 22:16:11.112701 5, 0xFFFF, sum = 0
5395 22:16:11.113284 6, 0xFFFF, sum = 0
5396 22:16:11.115727 7, 0xFFFF, sum = 0
5397 22:16:11.116300 8, 0xFFFF, sum = 0
5398 22:16:11.118241 9, 0xFFFF, sum = 0
5399 22:16:11.118719 10, 0x0, sum = 1
5400 22:16:11.121359 11, 0x0, sum = 2
5401 22:16:11.121814 12, 0x0, sum = 3
5402 22:16:11.124759 13, 0x0, sum = 4
5403 22:16:11.125192 best_step = 11
5404 22:16:11.125529
5405 22:16:11.125841 ==
5406 22:16:11.128055 Dram Type= 6, Freq= 0, CH_0, rank 1
5407 22:16:11.134806 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5408 22:16:11.135267 ==
5409 22:16:11.135614 RX Vref Scan: 0
5410 22:16:11.135929
5411 22:16:11.137857 RX Vref 0 -> 0, step: 1
5412 22:16:11.138280
5413 22:16:11.141809 RX Delay -61 -> 252, step: 4
5414 22:16:11.144535 iDelay=195, Bit 0, Center 96 (11 ~ 182) 172
5415 22:16:11.152117 iDelay=195, Bit 1, Center 100 (11 ~ 190) 180
5416 22:16:11.154389 iDelay=195, Bit 2, Center 90 (-1 ~ 182) 184
5417 22:16:11.157951 iDelay=195, Bit 3, Center 96 (7 ~ 186) 180
5418 22:16:11.161374 iDelay=195, Bit 4, Center 102 (11 ~ 194) 184
5419 22:16:11.164051 iDelay=195, Bit 5, Center 88 (-1 ~ 178) 180
5420 22:16:11.170607 iDelay=195, Bit 6, Center 106 (19 ~ 194) 176
5421 22:16:11.174051 iDelay=195, Bit 7, Center 104 (15 ~ 194) 180
5422 22:16:11.177585 iDelay=195, Bit 8, Center 80 (-9 ~ 170) 180
5423 22:16:11.180889 iDelay=195, Bit 9, Center 76 (-13 ~ 166) 180
5424 22:16:11.184503 iDelay=195, Bit 10, Center 88 (-1 ~ 178) 180
5425 22:16:11.190663 iDelay=195, Bit 11, Center 82 (-5 ~ 170) 176
5426 22:16:11.194489 iDelay=195, Bit 12, Center 92 (3 ~ 182) 180
5427 22:16:11.197613 iDelay=195, Bit 13, Center 94 (7 ~ 182) 176
5428 22:16:11.200445 iDelay=195, Bit 14, Center 100 (11 ~ 190) 180
5429 22:16:11.203934 iDelay=195, Bit 15, Center 96 (7 ~ 186) 180
5430 22:16:11.204516 ==
5431 22:16:11.207119 Dram Type= 6, Freq= 0, CH_0, rank 1
5432 22:16:11.214655 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5433 22:16:11.215300 ==
5434 22:16:11.215787 DQS Delay:
5435 22:16:11.216884 DQS0 = 0, DQS1 = 0
5436 22:16:11.217360 DQM Delay:
5437 22:16:11.217831 DQM0 = 97, DQM1 = 88
5438 22:16:11.220298 DQ Delay:
5439 22:16:11.223984 DQ0 =96, DQ1 =100, DQ2 =90, DQ3 =96
5440 22:16:11.226726 DQ4 =102, DQ5 =88, DQ6 =106, DQ7 =104
5441 22:16:11.229942 DQ8 =80, DQ9 =76, DQ10 =88, DQ11 =82
5442 22:16:11.233638 DQ12 =92, DQ13 =94, DQ14 =100, DQ15 =96
5443 22:16:11.234230
5444 22:16:11.234600
5445 22:16:11.240135 [DQSOSCAuto] RK1, (LSB)MR18= 0x1613, (MSB)MR19= 0x505, tDQSOscB0 = 415 ps tDQSOscB1 = 414 ps
5446 22:16:11.242982 CH0 RK1: MR19=505, MR18=1613
5447 22:16:11.249803 CH0_RK1: MR19=0x505, MR18=0x1613, DQSOSC=414, MR23=63, INC=63, DEC=42
5448 22:16:11.252713 [RxdqsGatingPostProcess] freq 933
5449 22:16:11.259873 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5450 22:16:11.263232 best DQS0 dly(2T, 0.5T) = (0, 10)
5451 22:16:11.266876 best DQS1 dly(2T, 0.5T) = (0, 11)
5452 22:16:11.267485 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5453 22:16:11.269723 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
5454 22:16:11.272742 best DQS0 dly(2T, 0.5T) = (0, 10)
5455 22:16:11.275922 best DQS1 dly(2T, 0.5T) = (0, 11)
5456 22:16:11.279845 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5457 22:16:11.282683 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
5458 22:16:11.286225 Pre-setting of DQS Precalculation
5459 22:16:11.292186 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5460 22:16:11.292739 ==
5461 22:16:11.295699 Dram Type= 6, Freq= 0, CH_1, rank 0
5462 22:16:11.298965 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5463 22:16:11.299571 ==
5464 22:16:11.305523 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5465 22:16:11.312166 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5466 22:16:11.315734 [CA 0] Center 37 (6~68) winsize 63
5467 22:16:11.319483 [CA 1] Center 37 (6~68) winsize 63
5468 22:16:11.322160 [CA 2] Center 34 (4~65) winsize 62
5469 22:16:11.325483 [CA 3] Center 34 (3~65) winsize 63
5470 22:16:11.328517 [CA 4] Center 34 (4~65) winsize 62
5471 22:16:11.331702 [CA 5] Center 33 (3~64) winsize 62
5472 22:16:11.332166
5473 22:16:11.335234 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5474 22:16:11.335700
5475 22:16:11.338690 [CATrainingPosCal] consider 1 rank data
5476 22:16:11.341569 u2DelayCellTimex100 = 270/100 ps
5477 22:16:11.345357 CA0 delay=37 (6~68),Diff = 4 PI (24 cell)
5478 22:16:11.348992 CA1 delay=37 (6~68),Diff = 4 PI (24 cell)
5479 22:16:11.351449 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5480 22:16:11.355151 CA3 delay=34 (3~65),Diff = 1 PI (6 cell)
5481 22:16:11.358959 CA4 delay=34 (4~65),Diff = 1 PI (6 cell)
5482 22:16:11.361864 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5483 22:16:11.362426
5484 22:16:11.368678 CA PerBit enable=1, Macro0, CA PI delay=33
5485 22:16:11.369248
5486 22:16:11.372003 [CBTSetCACLKResult] CA Dly = 33
5487 22:16:11.372489 CS Dly: 5 (0~36)
5488 22:16:11.372856 ==
5489 22:16:11.375430 Dram Type= 6, Freq= 0, CH_1, rank 1
5490 22:16:11.378659 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5491 22:16:11.379285 ==
5492 22:16:11.384588 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5493 22:16:11.391524 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
5494 22:16:11.394957 [CA 0] Center 36 (5~67) winsize 63
5495 22:16:11.398231 [CA 1] Center 36 (6~67) winsize 62
5496 22:16:11.401347 [CA 2] Center 34 (4~65) winsize 62
5497 22:16:11.404363 [CA 3] Center 33 (3~64) winsize 62
5498 22:16:11.408117 [CA 4] Center 34 (4~64) winsize 61
5499 22:16:11.411301 [CA 5] Center 33 (3~64) winsize 62
5500 22:16:11.411877
5501 22:16:11.414365 [CmdBusTrainingLP45] Vref(ca) range 1: 33
5502 22:16:11.414830
5503 22:16:11.417894 [CATrainingPosCal] consider 2 rank data
5504 22:16:11.421701 u2DelayCellTimex100 = 270/100 ps
5505 22:16:11.424523 CA0 delay=36 (6~67),Diff = 3 PI (18 cell)
5506 22:16:11.427879 CA1 delay=36 (6~67),Diff = 3 PI (18 cell)
5507 22:16:11.430952 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5508 22:16:11.434513 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
5509 22:16:11.441475 CA4 delay=34 (4~64),Diff = 1 PI (6 cell)
5510 22:16:11.444037 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5511 22:16:11.444503
5512 22:16:11.448726 CA PerBit enable=1, Macro0, CA PI delay=33
5513 22:16:11.449291
5514 22:16:11.450564 [CBTSetCACLKResult] CA Dly = 33
5515 22:16:11.451027 CS Dly: 6 (0~38)
5516 22:16:11.451425
5517 22:16:11.453916 ----->DramcWriteLeveling(PI) begin...
5518 22:16:11.454383 ==
5519 22:16:11.458400 Dram Type= 6, Freq= 0, CH_1, rank 0
5520 22:16:11.463924 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5521 22:16:11.464479 ==
5522 22:16:11.467610 Write leveling (Byte 0): 27 => 27
5523 22:16:11.470839 Write leveling (Byte 1): 29 => 29
5524 22:16:11.471436 DramcWriteLeveling(PI) end<-----
5525 22:16:11.474659
5526 22:16:11.475117 ==
5527 22:16:11.477369 Dram Type= 6, Freq= 0, CH_1, rank 0
5528 22:16:11.480540 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5529 22:16:11.481110 ==
5530 22:16:11.483758 [Gating] SW mode calibration
5531 22:16:11.490748 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5532 22:16:11.493976 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5533 22:16:11.500844 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5534 22:16:11.503382 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5535 22:16:11.506779 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5536 22:16:11.513052 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5537 22:16:11.517055 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5538 22:16:11.519543 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5539 22:16:11.526626 0 14 24 | B1->B0 | 3333 2f2f | 1 1 | (1 1) (1 1)
5540 22:16:11.529991 0 14 28 | B1->B0 | 2e2e 2b2b | 0 0 | (0 0) (0 1)
5541 22:16:11.533943 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5542 22:16:11.540761 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5543 22:16:11.543154 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5544 22:16:11.549451 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5545 22:16:11.552276 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5546 22:16:11.555703 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5547 22:16:11.562749 0 15 24 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
5548 22:16:11.565685 0 15 28 | B1->B0 | 3b3b 4545 | 0 0 | (0 0) (0 0)
5549 22:16:11.568971 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5550 22:16:11.575344 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5551 22:16:11.579485 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5552 22:16:11.582393 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5553 22:16:11.589019 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5554 22:16:11.593130 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5555 22:16:11.595327 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5556 22:16:11.602460 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5557 22:16:11.606941 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5558 22:16:11.609156 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5559 22:16:11.615310 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5560 22:16:11.618751 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5561 22:16:11.621877 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5562 22:16:11.628284 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5563 22:16:11.631779 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5564 22:16:11.634774 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5565 22:16:11.641751 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5566 22:16:11.644700 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5567 22:16:11.648202 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5568 22:16:11.654319 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5569 22:16:11.657566 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5570 22:16:11.661111 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5571 22:16:11.667956 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5572 22:16:11.671368 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5573 22:16:11.674300 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5574 22:16:11.678449 Total UI for P1: 0, mck2ui 16
5575 22:16:11.681189 best dqsien dly found for B0: ( 1, 2, 26)
5576 22:16:11.684580 Total UI for P1: 0, mck2ui 16
5577 22:16:11.687289 best dqsien dly found for B1: ( 1, 2, 26)
5578 22:16:11.691464 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5579 22:16:11.694271 best DQS1 dly(MCK, UI, PI) = (1, 2, 26)
5580 22:16:11.694858
5581 22:16:11.701020 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5582 22:16:11.704112 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)
5583 22:16:11.704698 [Gating] SW calibration Done
5584 22:16:11.707824 ==
5585 22:16:11.710390 Dram Type= 6, Freq= 0, CH_1, rank 0
5586 22:16:11.714102 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5587 22:16:11.714684 ==
5588 22:16:11.715058 RX Vref Scan: 0
5589 22:16:11.715449
5590 22:16:11.717382 RX Vref 0 -> 0, step: 1
5591 22:16:11.717962
5592 22:16:11.720808 RX Delay -80 -> 252, step: 8
5593 22:16:11.723395 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5594 22:16:11.726758 iDelay=208, Bit 1, Center 95 (0 ~ 191) 192
5595 22:16:11.730155 iDelay=208, Bit 2, Center 87 (-8 ~ 183) 192
5596 22:16:11.737073 iDelay=208, Bit 3, Center 99 (0 ~ 199) 200
5597 22:16:11.740369 iDelay=208, Bit 4, Center 95 (0 ~ 191) 192
5598 22:16:11.744102 iDelay=208, Bit 5, Center 111 (16 ~ 207) 192
5599 22:16:11.747250 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5600 22:16:11.749861 iDelay=208, Bit 7, Center 95 (0 ~ 191) 192
5601 22:16:11.757135 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5602 22:16:11.759545 iDelay=208, Bit 9, Center 87 (-8 ~ 183) 192
5603 22:16:11.762758 iDelay=208, Bit 10, Center 95 (0 ~ 191) 192
5604 22:16:11.766715 iDelay=208, Bit 11, Center 87 (-8 ~ 183) 192
5605 22:16:11.769835 iDelay=208, Bit 12, Center 103 (8 ~ 199) 192
5606 22:16:11.773446 iDelay=208, Bit 13, Center 103 (8 ~ 199) 192
5607 22:16:11.779548 iDelay=208, Bit 14, Center 103 (8 ~ 199) 192
5608 22:16:11.783682 iDelay=208, Bit 15, Center 103 (8 ~ 199) 192
5609 22:16:11.784248 ==
5610 22:16:11.786334 Dram Type= 6, Freq= 0, CH_1, rank 0
5611 22:16:11.789736 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5612 22:16:11.790302 ==
5613 22:16:11.792777 DQS Delay:
5614 22:16:11.793278 DQS0 = 0, DQS1 = 0
5615 22:16:11.793652 DQM Delay:
5616 22:16:11.796365 DQM0 = 99, DQM1 = 95
5617 22:16:11.796835 DQ Delay:
5618 22:16:11.799394 DQ0 =103, DQ1 =95, DQ2 =87, DQ3 =99
5619 22:16:11.803413 DQ4 =95, DQ5 =111, DQ6 =111, DQ7 =95
5620 22:16:11.806357 DQ8 =83, DQ9 =87, DQ10 =95, DQ11 =87
5621 22:16:11.809632 DQ12 =103, DQ13 =103, DQ14 =103, DQ15 =103
5622 22:16:11.813330
5623 22:16:11.813893
5624 22:16:11.814283 ==
5625 22:16:11.815781 Dram Type= 6, Freq= 0, CH_1, rank 0
5626 22:16:11.819930 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5627 22:16:11.820498 ==
5628 22:16:11.820871
5629 22:16:11.821214
5630 22:16:11.822210 TX Vref Scan disable
5631 22:16:11.822678 == TX Byte 0 ==
5632 22:16:11.829377 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5633 22:16:11.832321 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5634 22:16:11.832792 == TX Byte 1 ==
5635 22:16:11.838929 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5636 22:16:11.841965 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5637 22:16:11.842433 ==
5638 22:16:11.845716 Dram Type= 6, Freq= 0, CH_1, rank 0
5639 22:16:11.850299 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5640 22:16:11.850871 ==
5641 22:16:11.851295
5642 22:16:11.852025
5643 22:16:11.852396 TX Vref Scan disable
5644 22:16:11.855276 == TX Byte 0 ==
5645 22:16:11.858336 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5646 22:16:11.862434 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5647 22:16:11.865079 == TX Byte 1 ==
5648 22:16:11.868526 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5649 22:16:11.872458 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5650 22:16:11.875284
5651 22:16:11.875749 [DATLAT]
5652 22:16:11.876112 Freq=933, CH1 RK0
5653 22:16:11.876457
5654 22:16:11.878570 DATLAT Default: 0xd
5655 22:16:11.879133 0, 0xFFFF, sum = 0
5656 22:16:11.881466 1, 0xFFFF, sum = 0
5657 22:16:11.881936 2, 0xFFFF, sum = 0
5658 22:16:11.885039 3, 0xFFFF, sum = 0
5659 22:16:11.888348 4, 0xFFFF, sum = 0
5660 22:16:11.888921 5, 0xFFFF, sum = 0
5661 22:16:11.891349 6, 0xFFFF, sum = 0
5662 22:16:11.891912 7, 0xFFFF, sum = 0
5663 22:16:11.895100 8, 0xFFFF, sum = 0
5664 22:16:11.895709 9, 0xFFFF, sum = 0
5665 22:16:11.898195 10, 0x0, sum = 1
5666 22:16:11.898769 11, 0x0, sum = 2
5667 22:16:11.901575 12, 0x0, sum = 3
5668 22:16:11.902149 13, 0x0, sum = 4
5669 22:16:11.902528 best_step = 11
5670 22:16:11.904424
5671 22:16:11.904987 ==
5672 22:16:11.908143 Dram Type= 6, Freq= 0, CH_1, rank 0
5673 22:16:11.911118 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5674 22:16:11.911737 ==
5675 22:16:11.912115 RX Vref Scan: 1
5676 22:16:11.914636
5677 22:16:11.915232 RX Vref 0 -> 0, step: 1
5678 22:16:11.915611
5679 22:16:11.917599 RX Delay -53 -> 252, step: 4
5680 22:16:11.918162
5681 22:16:11.920884 Set Vref, RX VrefLevel [Byte0]: 52
5682 22:16:11.923922 [Byte1]: 51
5683 22:16:11.927803
5684 22:16:11.928364 Final RX Vref Byte 0 = 52 to rank0
5685 22:16:11.931340 Final RX Vref Byte 1 = 51 to rank0
5686 22:16:11.934526 Final RX Vref Byte 0 = 52 to rank1
5687 22:16:11.937530 Final RX Vref Byte 1 = 51 to rank1==
5688 22:16:11.940490 Dram Type= 6, Freq= 0, CH_1, rank 0
5689 22:16:11.947637 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5690 22:16:11.948224 ==
5691 22:16:11.948598 DQS Delay:
5692 22:16:11.950664 DQS0 = 0, DQS1 = 0
5693 22:16:11.951130 DQM Delay:
5694 22:16:11.951552 DQM0 = 98, DQM1 = 94
5695 22:16:11.953606 DQ Delay:
5696 22:16:11.957244 DQ0 =106, DQ1 =92, DQ2 =88, DQ3 =100
5697 22:16:11.960394 DQ4 =96, DQ5 =108, DQ6 =108, DQ7 =92
5698 22:16:11.963688 DQ8 =80, DQ9 =84, DQ10 =94, DQ11 =88
5699 22:16:11.967506 DQ12 =102, DQ13 =104, DQ14 =102, DQ15 =104
5700 22:16:11.967930
5701 22:16:11.968263
5702 22:16:11.973354 [DQSOSCAuto] RK0, (LSB)MR18= 0x616, (MSB)MR19= 0x505, tDQSOscB0 = 414 ps tDQSOscB1 = 420 ps
5703 22:16:11.976792 CH1 RK0: MR19=505, MR18=616
5704 22:16:11.983312 CH1_RK0: MR19=0x505, MR18=0x616, DQSOSC=414, MR23=63, INC=63, DEC=42
5705 22:16:11.983833
5706 22:16:11.986737 ----->DramcWriteLeveling(PI) begin...
5707 22:16:11.987211 ==
5708 22:16:11.989930 Dram Type= 6, Freq= 0, CH_1, rank 1
5709 22:16:11.993444 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5710 22:16:11.996333 ==
5711 22:16:11.996757 Write leveling (Byte 0): 28 => 28
5712 22:16:11.999841 Write leveling (Byte 1): 29 => 29
5713 22:16:12.003311 DramcWriteLeveling(PI) end<-----
5714 22:16:12.003834
5715 22:16:12.004168 ==
5716 22:16:12.006392 Dram Type= 6, Freq= 0, CH_1, rank 1
5717 22:16:12.012957 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5718 22:16:12.013480 ==
5719 22:16:12.015994 [Gating] SW mode calibration
5720 22:16:12.023276 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5721 22:16:12.026448 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5722 22:16:12.032627 0 14 0 | B1->B0 | 3232 3434 | 1 1 | (1 1) (1 1)
5723 22:16:12.036091 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5724 22:16:12.039452 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5725 22:16:12.045553 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5726 22:16:12.049439 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5727 22:16:12.052707 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5728 22:16:12.059148 0 14 24 | B1->B0 | 3434 3030 | 0 1 | (0 0) (1 0)
5729 22:16:12.062475 0 14 28 | B1->B0 | 2727 2323 | 0 0 | (0 0) (0 0)
5730 22:16:12.065988 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
5731 22:16:12.072128 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5732 22:16:12.075618 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5733 22:16:12.078637 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5734 22:16:12.085154 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5735 22:16:12.088600 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5736 22:16:12.091693 0 15 24 | B1->B0 | 2525 3030 | 0 0 | (0 0) (0 0)
5737 22:16:12.099017 0 15 28 | B1->B0 | 3838 4646 | 1 0 | (0 0) (0 0)
5738 22:16:12.101789 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5739 22:16:12.104961 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5740 22:16:12.111876 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5741 22:16:12.114962 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5742 22:16:12.118624 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5743 22:16:12.124715 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5744 22:16:12.127903 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5745 22:16:12.132144 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5746 22:16:12.138157 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5747 22:16:12.141458 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5748 22:16:12.144752 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5749 22:16:12.150871 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5750 22:16:12.155003 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5751 22:16:12.157735 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5752 22:16:12.164278 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5753 22:16:12.167678 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5754 22:16:12.170713 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5755 22:16:12.177551 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5756 22:16:12.180567 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5757 22:16:12.183991 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5758 22:16:12.190669 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5759 22:16:12.194102 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5760 22:16:12.197497 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5761 22:16:12.204129 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5762 22:16:12.204700 Total UI for P1: 0, mck2ui 16
5763 22:16:12.210742 best dqsien dly found for B0: ( 1, 2, 26)
5764 22:16:12.214115 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5765 22:16:12.216979 Total UI for P1: 0, mck2ui 16
5766 22:16:12.220821 best dqsien dly found for B1: ( 1, 2, 28)
5767 22:16:12.223723 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5768 22:16:12.227028 best DQS1 dly(MCK, UI, PI) = (1, 2, 28)
5769 22:16:12.227654
5770 22:16:12.231066 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5771 22:16:12.233558 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 28)
5772 22:16:12.236853 [Gating] SW calibration Done
5773 22:16:12.237321 ==
5774 22:16:12.240491 Dram Type= 6, Freq= 0, CH_1, rank 1
5775 22:16:12.246903 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5776 22:16:12.247523 ==
5777 22:16:12.247901 RX Vref Scan: 0
5778 22:16:12.248248
5779 22:16:12.250691 RX Vref 0 -> 0, step: 1
5780 22:16:12.251293
5781 22:16:12.253136 RX Delay -80 -> 252, step: 8
5782 22:16:12.256867 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5783 22:16:12.260024 iDelay=208, Bit 1, Center 91 (-8 ~ 191) 200
5784 22:16:12.262805 iDelay=208, Bit 2, Center 87 (-8 ~ 183) 192
5785 22:16:12.266578 iDelay=208, Bit 3, Center 95 (0 ~ 191) 192
5786 22:16:12.272995 iDelay=208, Bit 4, Center 95 (0 ~ 191) 192
5787 22:16:12.276010 iDelay=208, Bit 5, Center 107 (8 ~ 207) 200
5788 22:16:12.279417 iDelay=208, Bit 6, Center 103 (8 ~ 199) 192
5789 22:16:12.282903 iDelay=208, Bit 7, Center 95 (0 ~ 191) 192
5790 22:16:12.285931 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5791 22:16:12.289439 iDelay=208, Bit 9, Center 83 (-8 ~ 175) 184
5792 22:16:12.295803 iDelay=208, Bit 10, Center 95 (0 ~ 191) 192
5793 22:16:12.299096 iDelay=208, Bit 11, Center 87 (-8 ~ 183) 192
5794 22:16:12.302688 iDelay=208, Bit 12, Center 103 (8 ~ 199) 192
5795 22:16:12.306067 iDelay=208, Bit 13, Center 103 (8 ~ 199) 192
5796 22:16:12.309388 iDelay=208, Bit 14, Center 95 (0 ~ 191) 192
5797 22:16:12.315569 iDelay=208, Bit 15, Center 103 (8 ~ 199) 192
5798 22:16:12.315990 ==
5799 22:16:12.319309 Dram Type= 6, Freq= 0, CH_1, rank 1
5800 22:16:12.322009 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5801 22:16:12.322429 ==
5802 22:16:12.322760 DQS Delay:
5803 22:16:12.325580 DQS0 = 0, DQS1 = 0
5804 22:16:12.326102 DQM Delay:
5805 22:16:12.328716 DQM0 = 97, DQM1 = 94
5806 22:16:12.329241 DQ Delay:
5807 22:16:12.332221 DQ0 =103, DQ1 =91, DQ2 =87, DQ3 =95
5808 22:16:12.335822 DQ4 =95, DQ5 =107, DQ6 =103, DQ7 =95
5809 22:16:12.338704 DQ8 =83, DQ9 =83, DQ10 =95, DQ11 =87
5810 22:16:12.342658 DQ12 =103, DQ13 =103, DQ14 =95, DQ15 =103
5811 22:16:12.343209
5812 22:16:12.343551
5813 22:16:12.343864 ==
5814 22:16:12.345156 Dram Type= 6, Freq= 0, CH_1, rank 1
5815 22:16:12.351903 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5816 22:16:12.352431 ==
5817 22:16:12.352770
5818 22:16:12.353083
5819 22:16:12.353376 TX Vref Scan disable
5820 22:16:12.355258 == TX Byte 0 ==
5821 22:16:12.358918 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5822 22:16:12.365391 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5823 22:16:12.365932 == TX Byte 1 ==
5824 22:16:12.368724 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5825 22:16:12.374826 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5826 22:16:12.375355 ==
5827 22:16:12.377918 Dram Type= 6, Freq= 0, CH_1, rank 1
5828 22:16:12.382891 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5829 22:16:12.383508 ==
5830 22:16:12.383939
5831 22:16:12.384285
5832 22:16:12.385100 TX Vref Scan disable
5833 22:16:12.388046 == TX Byte 0 ==
5834 22:16:12.391340 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5835 22:16:12.394303 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5836 22:16:12.397630 == TX Byte 1 ==
5837 22:16:12.401267 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5838 22:16:12.404733 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5839 22:16:12.405315
5840 22:16:12.405695 [DATLAT]
5841 22:16:12.407627 Freq=933, CH1 RK1
5842 22:16:12.408198
5843 22:16:12.411199 DATLAT Default: 0xb
5844 22:16:12.411680 0, 0xFFFF, sum = 0
5845 22:16:12.414708 1, 0xFFFF, sum = 0
5846 22:16:12.415329 2, 0xFFFF, sum = 0
5847 22:16:12.417755 3, 0xFFFF, sum = 0
5848 22:16:12.418328 4, 0xFFFF, sum = 0
5849 22:16:12.421839 5, 0xFFFF, sum = 0
5850 22:16:12.422416 6, 0xFFFF, sum = 0
5851 22:16:12.424036 7, 0xFFFF, sum = 0
5852 22:16:12.424514 8, 0xFFFF, sum = 0
5853 22:16:12.427407 9, 0xFFFF, sum = 0
5854 22:16:12.427886 10, 0x0, sum = 1
5855 22:16:12.431079 11, 0x0, sum = 2
5856 22:16:12.431687 12, 0x0, sum = 3
5857 22:16:12.435345 13, 0x0, sum = 4
5858 22:16:12.435913 best_step = 11
5859 22:16:12.436288
5860 22:16:12.436638 ==
5861 22:16:12.437592 Dram Type= 6, Freq= 0, CH_1, rank 1
5862 22:16:12.444361 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5863 22:16:12.444930 ==
5864 22:16:12.445303 RX Vref Scan: 0
5865 22:16:12.445654
5866 22:16:12.447220 RX Vref 0 -> 0, step: 1
5867 22:16:12.447687
5868 22:16:12.450493 RX Delay -53 -> 252, step: 4
5869 22:16:12.454198 iDelay=199, Bit 0, Center 102 (11 ~ 194) 184
5870 22:16:12.456871 iDelay=199, Bit 1, Center 94 (-1 ~ 190) 192
5871 22:16:12.463709 iDelay=199, Bit 2, Center 88 (-5 ~ 182) 188
5872 22:16:12.466829 iDelay=199, Bit 3, Center 92 (-1 ~ 186) 188
5873 22:16:12.470104 iDelay=199, Bit 4, Center 98 (3 ~ 194) 192
5874 22:16:12.473551 iDelay=199, Bit 5, Center 106 (15 ~ 198) 184
5875 22:16:12.476609 iDelay=199, Bit 6, Center 104 (11 ~ 198) 188
5876 22:16:12.483557 iDelay=199, Bit 7, Center 94 (-1 ~ 190) 192
5877 22:16:12.486702 iDelay=199, Bit 8, Center 82 (-5 ~ 170) 176
5878 22:16:12.490773 iDelay=199, Bit 9, Center 82 (-9 ~ 174) 184
5879 22:16:12.493241 iDelay=199, Bit 10, Center 92 (-1 ~ 186) 188
5880 22:16:12.496967 iDelay=199, Bit 11, Center 86 (-5 ~ 178) 184
5881 22:16:12.503235 iDelay=199, Bit 12, Center 100 (11 ~ 190) 180
5882 22:16:12.506845 iDelay=199, Bit 13, Center 102 (11 ~ 194) 184
5883 22:16:12.509421 iDelay=199, Bit 14, Center 96 (7 ~ 186) 180
5884 22:16:12.513263 iDelay=199, Bit 15, Center 100 (7 ~ 194) 188
5885 22:16:12.513844 ==
5886 22:16:12.516505 Dram Type= 6, Freq= 0, CH_1, rank 1
5887 22:16:12.519631 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5888 22:16:12.523565 ==
5889 22:16:12.524131 DQS Delay:
5890 22:16:12.524502 DQS0 = 0, DQS1 = 0
5891 22:16:12.526821 DQM Delay:
5892 22:16:12.527422 DQM0 = 97, DQM1 = 92
5893 22:16:12.529845 DQ Delay:
5894 22:16:12.533306 DQ0 =102, DQ1 =94, DQ2 =88, DQ3 =92
5895 22:16:12.536225 DQ4 =98, DQ5 =106, DQ6 =104, DQ7 =94
5896 22:16:12.540041 DQ8 =82, DQ9 =82, DQ10 =92, DQ11 =86
5897 22:16:12.542686 DQ12 =100, DQ13 =102, DQ14 =96, DQ15 =100
5898 22:16:12.543151
5899 22:16:12.543565
5900 22:16:12.548992 [DQSOSCAuto] RK1, (LSB)MR18= 0xc22, (MSB)MR19= 0x505, tDQSOscB0 = 411 ps tDQSOscB1 = 418 ps
5901 22:16:12.553242 CH1 RK1: MR19=505, MR18=C22
5902 22:16:12.558851 CH1_RK1: MR19=0x505, MR18=0xC22, DQSOSC=411, MR23=63, INC=64, DEC=42
5903 22:16:12.562768 [RxdqsGatingPostProcess] freq 933
5904 22:16:12.565481 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5905 22:16:12.568634 best DQS0 dly(2T, 0.5T) = (0, 10)
5906 22:16:12.572399 best DQS1 dly(2T, 0.5T) = (0, 10)
5907 22:16:12.575450 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5908 22:16:12.578360 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5909 22:16:12.582328 best DQS0 dly(2T, 0.5T) = (0, 10)
5910 22:16:12.585576 best DQS1 dly(2T, 0.5T) = (0, 10)
5911 22:16:12.588501 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5912 22:16:12.592504 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5913 22:16:12.595595 Pre-setting of DQS Precalculation
5914 22:16:12.602006 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5915 22:16:12.608658 sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3
5916 22:16:12.615013 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
5917 22:16:12.615642
5918 22:16:12.616015
5919 22:16:12.618459 [Calibration Summary] 1866 Mbps
5920 22:16:12.619026 CH 0, Rank 0
5921 22:16:12.621450 SW Impedance : PASS
5922 22:16:12.625348 DUTY Scan : NO K
5923 22:16:12.625916 ZQ Calibration : PASS
5924 22:16:12.627818 Jitter Meter : NO K
5925 22:16:12.631318 CBT Training : PASS
5926 22:16:12.631880 Write leveling : PASS
5927 22:16:12.634860 RX DQS gating : PASS
5928 22:16:12.637817 RX DQ/DQS(RDDQC) : PASS
5929 22:16:12.638282 TX DQ/DQS : PASS
5930 22:16:12.641377 RX DATLAT : PASS
5931 22:16:12.641842 RX DQ/DQS(Engine): PASS
5932 22:16:12.644098 TX OE : NO K
5933 22:16:12.644564 All Pass.
5934 22:16:12.644932
5935 22:16:12.647680 CH 0, Rank 1
5936 22:16:12.648279 SW Impedance : PASS
5937 22:16:12.651065 DUTY Scan : NO K
5938 22:16:12.654321 ZQ Calibration : PASS
5939 22:16:12.654883 Jitter Meter : NO K
5940 22:16:12.657932 CBT Training : PASS
5941 22:16:12.660777 Write leveling : PASS
5942 22:16:12.661251 RX DQS gating : PASS
5943 22:16:12.664825 RX DQ/DQS(RDDQC) : PASS
5944 22:16:12.667643 TX DQ/DQS : PASS
5945 22:16:12.668161 RX DATLAT : PASS
5946 22:16:12.671288 RX DQ/DQS(Engine): PASS
5947 22:16:12.674324 TX OE : NO K
5948 22:16:12.674894 All Pass.
5949 22:16:12.675310
5950 22:16:12.675663 CH 1, Rank 0
5951 22:16:12.677654 SW Impedance : PASS
5952 22:16:12.680683 DUTY Scan : NO K
5953 22:16:12.681257 ZQ Calibration : PASS
5954 22:16:12.683648 Jitter Meter : NO K
5955 22:16:12.687218 CBT Training : PASS
5956 22:16:12.687721 Write leveling : PASS
5957 22:16:12.690478 RX DQS gating : PASS
5958 22:16:12.694199 RX DQ/DQS(RDDQC) : PASS
5959 22:16:12.694771 TX DQ/DQS : PASS
5960 22:16:12.696871 RX DATLAT : PASS
5961 22:16:12.701259 RX DQ/DQS(Engine): PASS
5962 22:16:12.701833 TX OE : NO K
5963 22:16:12.704502 All Pass.
5964 22:16:12.705065
5965 22:16:12.705440 CH 1, Rank 1
5966 22:16:12.707342 SW Impedance : PASS
5967 22:16:12.707928 DUTY Scan : NO K
5968 22:16:12.710064 ZQ Calibration : PASS
5969 22:16:12.713668 Jitter Meter : NO K
5970 22:16:12.714177 CBT Training : PASS
5971 22:16:12.716720 Write leveling : PASS
5972 22:16:12.720020 RX DQS gating : PASS
5973 22:16:12.720598 RX DQ/DQS(RDDQC) : PASS
5974 22:16:12.723219 TX DQ/DQS : PASS
5975 22:16:12.726423 RX DATLAT : PASS
5976 22:16:12.726860 RX DQ/DQS(Engine): PASS
5977 22:16:12.730133 TX OE : NO K
5978 22:16:12.730657 All Pass.
5979 22:16:12.730994
5980 22:16:12.733292 DramC Write-DBI off
5981 22:16:12.736674 PER_BANK_REFRESH: Hybrid Mode
5982 22:16:12.737146 TX_TRACKING: ON
5983 22:16:12.746479 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0
5984 22:16:12.750027 [FAST_K] Save calibration result to emmc
5985 22:16:12.753718 dramc_set_vcore_voltage set vcore to 650000
5986 22:16:12.756591 Read voltage for 400, 6
5987 22:16:12.757156 Vio18 = 0
5988 22:16:12.757526 Vcore = 650000
5989 22:16:12.759603 Vdram = 0
5990 22:16:12.760025 Vddq = 0
5991 22:16:12.760358 Vmddr = 0
5992 22:16:12.767261 [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0
5993 22:16:12.769762 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
5994 22:16:12.772964 MEM_TYPE=3, freq_sel=20
5995 22:16:12.775813 sv_algorithm_assistance_LP4_800
5996 22:16:12.779043 ============ PULL DRAM RESETB DOWN ============
5997 22:16:12.782848 ========== PULL DRAM RESETB DOWN end =========
5998 22:16:12.789196 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
5999 22:16:12.792693 ===================================
6000 22:16:12.793225 LPDDR4 DRAM CONFIGURATION
6001 22:16:12.795976 ===================================
6002 22:16:12.798666 EX_ROW_EN[0] = 0x0
6003 22:16:12.802763 EX_ROW_EN[1] = 0x0
6004 22:16:12.803381 LP4Y_EN = 0x0
6005 22:16:12.806204 WORK_FSP = 0x0
6006 22:16:12.806771 WL = 0x2
6007 22:16:12.809238 RL = 0x2
6008 22:16:12.809811 BL = 0x2
6009 22:16:12.812300 RPST = 0x0
6010 22:16:12.812881 RD_PRE = 0x0
6011 22:16:12.815233 WR_PRE = 0x1
6012 22:16:12.815699 WR_PST = 0x0
6013 22:16:12.818518 DBI_WR = 0x0
6014 22:16:12.818985 DBI_RD = 0x0
6015 22:16:12.822064 OTF = 0x1
6016 22:16:12.825104 ===================================
6017 22:16:12.828275 ===================================
6018 22:16:12.828700 ANA top config
6019 22:16:12.831508 ===================================
6020 22:16:12.834983 DLL_ASYNC_EN = 0
6021 22:16:12.838725 ALL_SLAVE_EN = 1
6022 22:16:12.842208 NEW_RANK_MODE = 1
6023 22:16:12.844947 DLL_IDLE_MODE = 1
6024 22:16:12.845379 LP45_APHY_COMB_EN = 1
6025 22:16:12.848437 TX_ODT_DIS = 1
6026 22:16:12.851790 NEW_8X_MODE = 1
6027 22:16:12.855552 ===================================
6028 22:16:12.858398 ===================================
6029 22:16:12.861414 data_rate = 800
6030 22:16:12.864928 CKR = 1
6031 22:16:12.865500 DQ_P2S_RATIO = 4
6032 22:16:12.867886 ===================================
6033 22:16:12.871706 CA_P2S_RATIO = 4
6034 22:16:12.875312 DQ_CA_OPEN = 0
6035 22:16:12.878175 DQ_SEMI_OPEN = 1
6036 22:16:12.881397 CA_SEMI_OPEN = 1
6037 22:16:12.884538 CA_FULL_RATE = 0
6038 22:16:12.888116 DQ_CKDIV4_EN = 0
6039 22:16:12.888688 CA_CKDIV4_EN = 1
6040 22:16:12.891002 CA_PREDIV_EN = 0
6041 22:16:12.894483 PH8_DLY = 0
6042 22:16:12.897662 SEMI_OPEN_CA_PICK_MCK_RATIO= 4
6043 22:16:12.900915 DQ_AAMCK_DIV = 0
6044 22:16:12.904661 CA_AAMCK_DIV = 0
6045 22:16:12.905238 CA_ADMCK_DIV = 4
6046 22:16:12.907859 DQ_TRACK_CA_EN = 0
6047 22:16:12.911334 CA_PICK = 800
6048 22:16:12.914964 CA_MCKIO = 400
6049 22:16:12.917541 MCKIO_SEMI = 400
6050 22:16:12.920705 PLL_FREQ = 3016
6051 22:16:12.923921 DQ_UI_PI_RATIO = 32
6052 22:16:12.927033 CA_UI_PI_RATIO = 32
6053 22:16:12.931028 ===================================
6054 22:16:12.933873 ===================================
6055 22:16:12.934446 memory_type:LPDDR4
6056 22:16:12.936947 GP_NUM : 10
6057 22:16:12.940713 SRAM_EN : 1
6058 22:16:12.941281 MD32_EN : 0
6059 22:16:12.943947 ===================================
6060 22:16:12.947310 [ANA_INIT] >>>>>>>>>>>>>>
6061 22:16:12.950198 <<<<<< [CONFIGURE PHASE]: ANA_TX
6062 22:16:12.954031 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
6063 22:16:12.957390 ===================================
6064 22:16:12.959926 data_rate = 800,PCW = 0X7400
6065 22:16:12.963278 ===================================
6066 22:16:12.966900 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
6067 22:16:12.970058 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6068 22:16:12.983364 WARN: tr->DQ_AAMCK_DIV= 0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6069 22:16:12.986601 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
6070 22:16:12.989581 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
6071 22:16:12.992976 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
6072 22:16:12.996221 [ANA_INIT] flow start
6073 22:16:12.999372 [ANA_INIT] PLL >>>>>>>>
6074 22:16:12.999838 [ANA_INIT] PLL <<<<<<<<
6075 22:16:13.003641 [ANA_INIT] MIDPI >>>>>>>>
6076 22:16:13.006152 [ANA_INIT] MIDPI <<<<<<<<
6077 22:16:13.006616 [ANA_INIT] DLL >>>>>>>>
6078 22:16:13.009636 [ANA_INIT] flow end
6079 22:16:13.012984 ============ LP4 DIFF to SE enter ============
6080 22:16:13.019032 ============ LP4 DIFF to SE exit ============
6081 22:16:13.019559 [ANA_INIT] <<<<<<<<<<<<<
6082 22:16:13.024076 [Flow] Enable top DCM control >>>>>
6083 22:16:13.026020 [Flow] Enable top DCM control <<<<<
6084 22:16:13.029051 Enable DLL master slave shuffle
6085 22:16:13.035598 ==============================================================
6086 22:16:13.036029 Gating Mode config
6087 22:16:13.042380 ==============================================================
6088 22:16:13.045778 Config description:
6089 22:16:13.055729 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
6090 22:16:13.061851 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
6091 22:16:13.066035 SELPH_MODE 0: By rank 1: By Phase
6092 22:16:13.071731 ==============================================================
6093 22:16:13.075474 GAT_TRACK_EN = 0
6094 22:16:13.078636 RX_GATING_MODE = 2
6095 22:16:13.079113 RX_GATING_TRACK_MODE = 2
6096 22:16:13.081526 SELPH_MODE = 1
6097 22:16:13.085212 PICG_EARLY_EN = 1
6098 22:16:13.088001 VALID_LAT_VALUE = 1
6099 22:16:13.094600 ==============================================================
6100 22:16:13.098207 Enter into Gating configuration >>>>
6101 22:16:13.101405 Exit from Gating configuration <<<<
6102 22:16:13.105037 Enter into DVFS_PRE_config >>>>>
6103 22:16:13.114413 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
6104 22:16:13.117572 Exit from DVFS_PRE_config <<<<<
6105 22:16:13.121028 Enter into PICG configuration >>>>
6106 22:16:13.124390 Exit from PICG configuration <<<<
6107 22:16:13.127668 [RX_INPUT] configuration >>>>>
6108 22:16:13.131616 [RX_INPUT] configuration <<<<<
6109 22:16:13.134061 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
6110 22:16:13.140772 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
6111 22:16:13.147504 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
6112 22:16:13.154084 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
6113 22:16:13.160480 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
6114 22:16:13.163719 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
6115 22:16:13.170674 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
6116 22:16:13.174364 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
6117 22:16:13.177450 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
6118 22:16:13.180346 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
6119 22:16:13.187072 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
6120 22:16:13.190460 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6121 22:16:13.194094 ===================================
6122 22:16:13.196874 LPDDR4 DRAM CONFIGURATION
6123 22:16:13.199864 ===================================
6124 22:16:13.200331 EX_ROW_EN[0] = 0x0
6125 22:16:13.203806 EX_ROW_EN[1] = 0x0
6126 22:16:13.207006 LP4Y_EN = 0x0
6127 22:16:13.207616 WORK_FSP = 0x0
6128 22:16:13.210718 WL = 0x2
6129 22:16:13.211331 RL = 0x2
6130 22:16:13.213335 BL = 0x2
6131 22:16:13.213902 RPST = 0x0
6132 22:16:13.216873 RD_PRE = 0x0
6133 22:16:13.217435 WR_PRE = 0x1
6134 22:16:13.219961 WR_PST = 0x0
6135 22:16:13.220422 DBI_WR = 0x0
6136 22:16:13.223642 DBI_RD = 0x0
6137 22:16:13.224105 OTF = 0x1
6138 22:16:13.226605 ===================================
6139 22:16:13.230428 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
6140 22:16:13.236688 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
6141 22:16:13.240656 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6142 22:16:13.243310 ===================================
6143 22:16:13.246393 LPDDR4 DRAM CONFIGURATION
6144 22:16:13.249851 ===================================
6145 22:16:13.250360 EX_ROW_EN[0] = 0x10
6146 22:16:13.253049 EX_ROW_EN[1] = 0x0
6147 22:16:13.253569 LP4Y_EN = 0x0
6148 22:16:13.256537 WORK_FSP = 0x0
6149 22:16:13.259730 WL = 0x2
6150 22:16:13.260227 RL = 0x2
6151 22:16:13.262581 BL = 0x2
6152 22:16:13.263023 RPST = 0x0
6153 22:16:13.266476 RD_PRE = 0x0
6154 22:16:13.266999 WR_PRE = 0x1
6155 22:16:13.270129 WR_PST = 0x0
6156 22:16:13.270651 DBI_WR = 0x0
6157 22:16:13.272546 DBI_RD = 0x0
6158 22:16:13.273070 OTF = 0x1
6159 22:16:13.276100 ===================================
6160 22:16:13.282551 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
6161 22:16:13.287387 nWR fixed to 30
6162 22:16:13.290276 [ModeRegInit_LP4] CH0 RK0
6163 22:16:13.290802 [ModeRegInit_LP4] CH0 RK1
6164 22:16:13.293485 [ModeRegInit_LP4] CH1 RK0
6165 22:16:13.297211 [ModeRegInit_LP4] CH1 RK1
6166 22:16:13.297735 match AC timing 19
6167 22:16:13.303529 dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 1
6168 22:16:13.306835 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
6169 22:16:13.310021 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
6170 22:16:13.317152 [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17
6171 22:16:13.319835 [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)
6172 22:16:13.320378 ==
6173 22:16:13.323285 Dram Type= 6, Freq= 0, CH_0, rank 0
6174 22:16:13.326796 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6175 22:16:13.327356 ==
6176 22:16:13.332974 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6177 22:16:13.339677 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6178 22:16:13.343603 [CA 0] Center 36 (8~64) winsize 57
6179 22:16:13.346870 [CA 1] Center 36 (8~64) winsize 57
6180 22:16:13.349436 [CA 2] Center 36 (8~64) winsize 57
6181 22:16:13.352883 [CA 3] Center 36 (8~64) winsize 57
6182 22:16:13.355890 [CA 4] Center 36 (8~64) winsize 57
6183 22:16:13.359048 [CA 5] Center 36 (8~64) winsize 57
6184 22:16:13.359542
6185 22:16:13.362692 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6186 22:16:13.363155
6187 22:16:13.365996 [CATrainingPosCal] consider 1 rank data
6188 22:16:13.369981 u2DelayCellTimex100 = 270/100 ps
6189 22:16:13.372411 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6190 22:16:13.376028 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6191 22:16:13.379569 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6192 22:16:13.383084 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6193 22:16:13.385965 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6194 22:16:13.389562 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6195 22:16:13.390132
6196 22:16:13.395745 CA PerBit enable=1, Macro0, CA PI delay=36
6197 22:16:13.396325
6198 22:16:13.396695 [CBTSetCACLKResult] CA Dly = 36
6199 22:16:13.398834 CS Dly: 1 (0~32)
6200 22:16:13.399324 ==
6201 22:16:13.401980 Dram Type= 6, Freq= 0, CH_0, rank 1
6202 22:16:13.405579 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6203 22:16:13.406150 ==
6204 22:16:13.412230 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6205 22:16:13.418447 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
6206 22:16:13.422189 [CA 0] Center 36 (8~64) winsize 57
6207 22:16:13.425443 [CA 1] Center 36 (8~64) winsize 57
6208 22:16:13.428200 [CA 2] Center 36 (8~64) winsize 57
6209 22:16:13.432828 [CA 3] Center 36 (8~64) winsize 57
6210 22:16:13.435636 [CA 4] Center 36 (8~64) winsize 57
6211 22:16:13.436209 [CA 5] Center 36 (8~64) winsize 57
6212 22:16:13.438642
6213 22:16:13.441699 [CmdBusTrainingLP45] Vref(ca) range 1: 37
6214 22:16:13.442171
6215 22:16:13.445083 [CATrainingPosCal] consider 2 rank data
6216 22:16:13.447941 u2DelayCellTimex100 = 270/100 ps
6217 22:16:13.451615 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6218 22:16:13.454874 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6219 22:16:13.457930 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6220 22:16:13.461307 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6221 22:16:13.464326 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6222 22:16:13.467838 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6223 22:16:13.468265
6224 22:16:13.471022 CA PerBit enable=1, Macro0, CA PI delay=36
6225 22:16:13.475037
6226 22:16:13.475640 [CBTSetCACLKResult] CA Dly = 36
6227 22:16:13.477409 CS Dly: 1 (0~32)
6228 22:16:13.477830
6229 22:16:13.481255 ----->DramcWriteLeveling(PI) begin...
6230 22:16:13.481688 ==
6231 22:16:13.484353 Dram Type= 6, Freq= 0, CH_0, rank 0
6232 22:16:13.487855 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6233 22:16:13.488287 ==
6234 22:16:13.490750 Write leveling (Byte 0): 40 => 8
6235 22:16:13.494387 Write leveling (Byte 1): 40 => 8
6236 22:16:13.497674 DramcWriteLeveling(PI) end<-----
6237 22:16:13.498190
6238 22:16:13.498528 ==
6239 22:16:13.500944 Dram Type= 6, Freq= 0, CH_0, rank 0
6240 22:16:13.504311 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6241 22:16:13.507570 ==
6242 22:16:13.508084 [Gating] SW mode calibration
6243 22:16:13.517885 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6244 22:16:13.520636 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6245 22:16:13.524526 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6246 22:16:13.530526 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6247 22:16:13.534184 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6248 22:16:13.537122 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6249 22:16:13.543481 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6250 22:16:13.547354 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6251 22:16:13.550576 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6252 22:16:13.558640 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6253 22:16:13.560506 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6254 22:16:13.563514 Total UI for P1: 0, mck2ui 16
6255 22:16:13.566820 best dqsien dly found for B0: ( 0, 14, 24)
6256 22:16:13.570221 Total UI for P1: 0, mck2ui 16
6257 22:16:13.573584 best dqsien dly found for B1: ( 0, 14, 24)
6258 22:16:13.576490 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6259 22:16:13.579915 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6260 22:16:13.580385
6261 22:16:13.583058 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6262 22:16:13.587302 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6263 22:16:13.589740 [Gating] SW calibration Done
6264 22:16:13.590209 ==
6265 22:16:13.593373 Dram Type= 6, Freq= 0, CH_0, rank 0
6266 22:16:13.599549 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6267 22:16:13.600134 ==
6268 22:16:13.600507 RX Vref Scan: 0
6269 22:16:13.600851
6270 22:16:13.602887 RX Vref 0 -> 0, step: 1
6271 22:16:13.603388
6272 22:16:13.606665 RX Delay -410 -> 252, step: 16
6273 22:16:13.610050 iDelay=230, Bit 0, Center -35 (-282 ~ 213) 496
6274 22:16:13.613322 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6275 22:16:13.619906 iDelay=230, Bit 2, Center -35 (-282 ~ 213) 496
6276 22:16:13.623162 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6277 22:16:13.626836 iDelay=230, Bit 4, Center -27 (-266 ~ 213) 480
6278 22:16:13.629744 iDelay=230, Bit 5, Center -35 (-282 ~ 213) 496
6279 22:16:13.636474 iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496
6280 22:16:13.639666 iDelay=230, Bit 7, Center -19 (-266 ~ 229) 496
6281 22:16:13.642931 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6282 22:16:13.646491 iDelay=230, Bit 9, Center -51 (-298 ~ 197) 496
6283 22:16:13.652660 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6284 22:16:13.655694 iDelay=230, Bit 11, Center -43 (-298 ~ 213) 512
6285 22:16:13.659409 iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496
6286 22:16:13.662975 iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496
6287 22:16:13.669483 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6288 22:16:13.672663 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6289 22:16:13.673239 ==
6290 22:16:13.675885 Dram Type= 6, Freq= 0, CH_0, rank 0
6291 22:16:13.679275 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6292 22:16:13.679754 ==
6293 22:16:13.682096 DQS Delay:
6294 22:16:13.682545 DQS0 = 35, DQS1 = 51
6295 22:16:13.685748 DQM Delay:
6296 22:16:13.686159 DQM0 = 5, DQM1 = 10
6297 22:16:13.686481 DQ Delay:
6298 22:16:13.688583 DQ0 =0, DQ1 =0, DQ2 =0, DQ3 =0
6299 22:16:13.691986 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6300 22:16:13.695436 DQ8 =0, DQ9 =0, DQ10 =8, DQ11 =8
6301 22:16:13.698353 DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =16
6302 22:16:13.698761
6303 22:16:13.699085
6304 22:16:13.699424 ==
6305 22:16:13.701694 Dram Type= 6, Freq= 0, CH_0, rank 0
6306 22:16:13.708527 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6307 22:16:13.709044 ==
6308 22:16:13.709374
6309 22:16:13.709674
6310 22:16:13.709963 TX Vref Scan disable
6311 22:16:13.711786 == TX Byte 0 ==
6312 22:16:13.716010 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6313 22:16:13.718568 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6314 22:16:13.722414 == TX Byte 1 ==
6315 22:16:13.724802 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6316 22:16:13.728133 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6317 22:16:13.731465 ==
6318 22:16:13.734638 Dram Type= 6, Freq= 0, CH_0, rank 0
6319 22:16:13.738215 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6320 22:16:13.738683 ==
6321 22:16:13.739016
6322 22:16:13.739385
6323 22:16:13.741538 TX Vref Scan disable
6324 22:16:13.742061 == TX Byte 0 ==
6325 22:16:13.744704 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6326 22:16:13.751385 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6327 22:16:13.751941 == TX Byte 1 ==
6328 22:16:13.754376 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6329 22:16:13.760803 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6330 22:16:13.761373
6331 22:16:13.761742 [DATLAT]
6332 22:16:13.762080 Freq=400, CH0 RK0
6333 22:16:13.762410
6334 22:16:13.764305 DATLAT Default: 0xf
6335 22:16:13.767761 0, 0xFFFF, sum = 0
6336 22:16:13.768224 1, 0xFFFF, sum = 0
6337 22:16:13.771322 2, 0xFFFF, sum = 0
6338 22:16:13.771782 3, 0xFFFF, sum = 0
6339 22:16:13.774882 4, 0xFFFF, sum = 0
6340 22:16:13.775496 5, 0xFFFF, sum = 0
6341 22:16:13.777681 6, 0xFFFF, sum = 0
6342 22:16:13.778181 7, 0xFFFF, sum = 0
6343 22:16:13.780611 8, 0xFFFF, sum = 0
6344 22:16:13.781072 9, 0xFFFF, sum = 0
6345 22:16:13.784062 10, 0xFFFF, sum = 0
6346 22:16:13.784475 11, 0xFFFF, sum = 0
6347 22:16:13.787514 12, 0xFFFF, sum = 0
6348 22:16:13.787928 13, 0x0, sum = 1
6349 22:16:13.790545 14, 0x0, sum = 2
6350 22:16:13.790960 15, 0x0, sum = 3
6351 22:16:13.794316 16, 0x0, sum = 4
6352 22:16:13.794850 best_step = 14
6353 22:16:13.795214
6354 22:16:13.795530 ==
6355 22:16:13.797097 Dram Type= 6, Freq= 0, CH_0, rank 0
6356 22:16:13.803523 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6357 22:16:13.803935 ==
6358 22:16:13.804260 RX Vref Scan: 1
6359 22:16:13.804565
6360 22:16:13.807582 RX Vref 0 -> 0, step: 1
6361 22:16:13.808089
6362 22:16:13.810200 RX Delay -343 -> 252, step: 8
6363 22:16:13.810711
6364 22:16:13.814021 Set Vref, RX VrefLevel [Byte0]: 53
6365 22:16:13.816656 [Byte1]: 49
6366 22:16:13.820185
6367 22:16:13.820694 Final RX Vref Byte 0 = 53 to rank0
6368 22:16:13.824225 Final RX Vref Byte 1 = 49 to rank0
6369 22:16:13.827367 Final RX Vref Byte 0 = 53 to rank1
6370 22:16:13.829820 Final RX Vref Byte 1 = 49 to rank1==
6371 22:16:13.833222 Dram Type= 6, Freq= 0, CH_0, rank 0
6372 22:16:13.839460 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6373 22:16:13.839938 ==
6374 22:16:13.840299 DQS Delay:
6375 22:16:13.843091 DQS0 = 44, DQS1 = 56
6376 22:16:13.843600 DQM Delay:
6377 22:16:13.846094 DQM0 = 11, DQM1 = 14
6378 22:16:13.846627 DQ Delay:
6379 22:16:13.849641 DQ0 =12, DQ1 =12, DQ2 =8, DQ3 =8
6380 22:16:13.853153 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =16
6381 22:16:13.856223 DQ8 =4, DQ9 =0, DQ10 =16, DQ11 =8
6382 22:16:13.859650 DQ12 =20, DQ13 =20, DQ14 =24, DQ15 =20
6383 22:16:13.860201
6384 22:16:13.860586
6385 22:16:13.865815 [DQSOSCAuto] RK0, (LSB)MR18= 0x8e81, (MSB)MR19= 0xc0c, tDQSOscB0 = 393 ps tDQSOscB1 = 392 ps
6386 22:16:13.869814 CH0 RK0: MR19=C0C, MR18=8E81
6387 22:16:13.875813 CH0_RK0: MR19=0xC0C, MR18=0x8E81, DQSOSC=392, MR23=63, INC=384, DEC=256
6388 22:16:13.876350 ==
6389 22:16:13.879804 Dram Type= 6, Freq= 0, CH_0, rank 1
6390 22:16:13.882805 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6391 22:16:13.883452 ==
6392 22:16:13.886441 [Gating] SW mode calibration
6393 22:16:13.892308 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6394 22:16:13.898849 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6395 22:16:13.902473 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6396 22:16:13.905808 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6397 22:16:13.913072 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6398 22:16:13.915735 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6399 22:16:13.919380 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6400 22:16:13.925393 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6401 22:16:13.929565 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6402 22:16:13.932124 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6403 22:16:13.938453 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6404 22:16:13.942145 Total UI for P1: 0, mck2ui 16
6405 22:16:13.944989 best dqsien dly found for B0: ( 0, 14, 24)
6406 22:16:13.948591 Total UI for P1: 0, mck2ui 16
6407 22:16:13.951824 best dqsien dly found for B1: ( 0, 14, 24)
6408 22:16:13.955447 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6409 22:16:13.958789 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6410 22:16:13.959403
6411 22:16:13.961534 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6412 22:16:13.964724 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6413 22:16:13.968298 [Gating] SW calibration Done
6414 22:16:13.968766 ==
6415 22:16:13.971411 Dram Type= 6, Freq= 0, CH_0, rank 1
6416 22:16:13.974957 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6417 22:16:13.975582 ==
6418 22:16:13.978211 RX Vref Scan: 0
6419 22:16:13.978698
6420 22:16:13.981425 RX Vref 0 -> 0, step: 1
6421 22:16:13.982016
6422 22:16:13.982395 RX Delay -410 -> 252, step: 16
6423 22:16:13.988857 iDelay=230, Bit 0, Center -27 (-266 ~ 213) 480
6424 22:16:13.991354 iDelay=230, Bit 1, Center -27 (-266 ~ 213) 480
6425 22:16:13.994837 iDelay=230, Bit 2, Center -35 (-282 ~ 213) 496
6426 22:16:14.001691 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6427 22:16:14.005032 iDelay=230, Bit 4, Center -27 (-266 ~ 213) 480
6428 22:16:14.008101 iDelay=230, Bit 5, Center -35 (-282 ~ 213) 496
6429 22:16:14.011426 iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496
6430 22:16:14.017969 iDelay=230, Bit 7, Center -19 (-266 ~ 229) 496
6431 22:16:14.021153 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6432 22:16:14.024370 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6433 22:16:14.027646 iDelay=230, Bit 10, Center -35 (-282 ~ 213) 496
6434 22:16:14.034707 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6435 22:16:14.037898 iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496
6436 22:16:14.040772 iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496
6437 22:16:14.044500 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6438 22:16:14.050805 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6439 22:16:14.051400 ==
6440 22:16:14.054443 Dram Type= 6, Freq= 0, CH_0, rank 1
6441 22:16:14.057726 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6442 22:16:14.058309 ==
6443 22:16:14.058798 DQS Delay:
6444 22:16:14.061184 DQS0 = 35, DQS1 = 59
6445 22:16:14.061763 DQM Delay:
6446 22:16:14.064076 DQM0 = 7, DQM1 = 17
6447 22:16:14.064560 DQ Delay:
6448 22:16:14.067229 DQ0 =8, DQ1 =8, DQ2 =0, DQ3 =0
6449 22:16:14.070558 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6450 22:16:14.074574 DQ8 =8, DQ9 =0, DQ10 =24, DQ11 =8
6451 22:16:14.077412 DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =24
6452 22:16:14.077897
6453 22:16:14.078376
6454 22:16:14.078824 ==
6455 22:16:14.080730 Dram Type= 6, Freq= 0, CH_0, rank 1
6456 22:16:14.084253 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6457 22:16:14.084767 ==
6458 22:16:14.085201
6459 22:16:14.085610
6460 22:16:14.087200 TX Vref Scan disable
6461 22:16:14.091078 == TX Byte 0 ==
6462 22:16:14.094495 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6463 22:16:14.097332 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6464 22:16:14.100348 == TX Byte 1 ==
6465 22:16:14.103804 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6466 22:16:14.107048 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6467 22:16:14.107678 ==
6468 22:16:14.110123 Dram Type= 6, Freq= 0, CH_0, rank 1
6469 22:16:14.113499 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6470 22:16:14.114039 ==
6471 22:16:14.117239
6472 22:16:14.117777
6473 22:16:14.118223 TX Vref Scan disable
6474 22:16:14.120234 == TX Byte 0 ==
6475 22:16:14.123921 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6476 22:16:14.127340 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6477 22:16:14.130271 == TX Byte 1 ==
6478 22:16:14.133593 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6479 22:16:14.136690 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6480 22:16:14.137230
6481 22:16:14.137674 [DATLAT]
6482 22:16:14.140187 Freq=400, CH0 RK1
6483 22:16:14.140628
6484 22:16:14.143702 DATLAT Default: 0xe
6485 22:16:14.144237 0, 0xFFFF, sum = 0
6486 22:16:14.146725 1, 0xFFFF, sum = 0
6487 22:16:14.147201 2, 0xFFFF, sum = 0
6488 22:16:14.150044 3, 0xFFFF, sum = 0
6489 22:16:14.150583 4, 0xFFFF, sum = 0
6490 22:16:14.153017 5, 0xFFFF, sum = 0
6491 22:16:14.153508 6, 0xFFFF, sum = 0
6492 22:16:14.156547 7, 0xFFFF, sum = 0
6493 22:16:14.157074 8, 0xFFFF, sum = 0
6494 22:16:14.159790 9, 0xFFFF, sum = 0
6495 22:16:14.160333 10, 0xFFFF, sum = 0
6496 22:16:14.163582 11, 0xFFFF, sum = 0
6497 22:16:14.164038 12, 0xFFFF, sum = 0
6498 22:16:14.166311 13, 0x0, sum = 1
6499 22:16:14.166914 14, 0x0, sum = 2
6500 22:16:14.169468 15, 0x0, sum = 3
6501 22:16:14.169895 16, 0x0, sum = 4
6502 22:16:14.173161 best_step = 14
6503 22:16:14.173679
6504 22:16:14.174013 ==
6505 22:16:14.176386 Dram Type= 6, Freq= 0, CH_0, rank 1
6506 22:16:14.179336 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6507 22:16:14.179792 ==
6508 22:16:14.183370 RX Vref Scan: 0
6509 22:16:14.183932
6510 22:16:14.184303 RX Vref 0 -> 0, step: 1
6511 22:16:14.184815
6512 22:16:14.185844 RX Delay -359 -> 252, step: 8
6513 22:16:14.194451 iDelay=217, Bit 0, Center -32 (-263 ~ 200) 464
6514 22:16:14.198200 iDelay=217, Bit 1, Center -32 (-271 ~ 208) 480
6515 22:16:14.200708 iDelay=217, Bit 2, Center -40 (-279 ~ 200) 480
6516 22:16:14.207606 iDelay=217, Bit 3, Center -36 (-271 ~ 200) 472
6517 22:16:14.211338 iDelay=217, Bit 4, Center -32 (-271 ~ 208) 480
6518 22:16:14.214340 iDelay=217, Bit 5, Center -44 (-279 ~ 192) 472
6519 22:16:14.218083 iDelay=217, Bit 6, Center -24 (-263 ~ 216) 480
6520 22:16:14.224085 iDelay=217, Bit 7, Center -28 (-263 ~ 208) 472
6521 22:16:14.227347 iDelay=217, Bit 8, Center -56 (-303 ~ 192) 496
6522 22:16:14.231007 iDelay=217, Bit 9, Center -60 (-303 ~ 184) 488
6523 22:16:14.233468 iDelay=217, Bit 10, Center -40 (-279 ~ 200) 480
6524 22:16:14.240246 iDelay=217, Bit 11, Center -52 (-295 ~ 192) 488
6525 22:16:14.244035 iDelay=217, Bit 12, Center -44 (-287 ~ 200) 488
6526 22:16:14.246926 iDelay=217, Bit 13, Center -40 (-279 ~ 200) 480
6527 22:16:14.250443 iDelay=217, Bit 14, Center -32 (-271 ~ 208) 480
6528 22:16:14.257316 iDelay=217, Bit 15, Center -40 (-279 ~ 200) 480
6529 22:16:14.257940 ==
6530 22:16:14.259888 Dram Type= 6, Freq= 0, CH_0, rank 1
6531 22:16:14.263122 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6532 22:16:14.263597 ==
6533 22:16:14.263940 DQS Delay:
6534 22:16:14.266846 DQS0 = 44, DQS1 = 60
6535 22:16:14.267456 DQM Delay:
6536 22:16:14.269873 DQM0 = 10, DQM1 = 14
6537 22:16:14.270344 DQ Delay:
6538 22:16:14.273767 DQ0 =12, DQ1 =12, DQ2 =4, DQ3 =8
6539 22:16:14.277151 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =16
6540 22:16:14.279830 DQ8 =4, DQ9 =0, DQ10 =20, DQ11 =8
6541 22:16:14.283780 DQ12 =16, DQ13 =20, DQ14 =28, DQ15 =20
6542 22:16:14.284358
6543 22:16:14.284736
6544 22:16:14.293174 [DQSOSCAuto] RK1, (LSB)MR18= 0x857e, (MSB)MR19= 0xc0c, tDQSOscB0 = 393 ps tDQSOscB1 = 393 ps
6545 22:16:14.293742 CH0 RK1: MR19=C0C, MR18=857E
6546 22:16:14.299567 CH0_RK1: MR19=0xC0C, MR18=0x857E, DQSOSC=393, MR23=63, INC=382, DEC=254
6547 22:16:14.302651 [RxdqsGatingPostProcess] freq 400
6548 22:16:14.309648 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6549 22:16:14.313082 best DQS0 dly(2T, 0.5T) = (0, 10)
6550 22:16:14.316105 best DQS1 dly(2T, 0.5T) = (0, 10)
6551 22:16:14.319330 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6552 22:16:14.323324 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6553 22:16:14.325646 best DQS0 dly(2T, 0.5T) = (0, 10)
6554 22:16:14.329739 best DQS1 dly(2T, 0.5T) = (0, 10)
6555 22:16:14.332338 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6556 22:16:14.336511 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6557 22:16:14.337073 Pre-setting of DQS Precalculation
6558 22:16:14.342770 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6559 22:16:14.343381 ==
6560 22:16:14.345746 Dram Type= 6, Freq= 0, CH_1, rank 0
6561 22:16:14.348854 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6562 22:16:14.349423 ==
6563 22:16:14.355609 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6564 22:16:14.362034 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6565 22:16:14.365337 [CA 0] Center 36 (8~64) winsize 57
6566 22:16:14.368348 [CA 1] Center 36 (8~64) winsize 57
6567 22:16:14.371620 [CA 2] Center 36 (8~64) winsize 57
6568 22:16:14.375152 [CA 3] Center 36 (8~64) winsize 57
6569 22:16:14.378164 [CA 4] Center 36 (8~64) winsize 57
6570 22:16:14.381484 [CA 5] Center 36 (8~64) winsize 57
6571 22:16:14.381920
6572 22:16:14.384718 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6573 22:16:14.385144
6574 22:16:14.388232 [CATrainingPosCal] consider 1 rank data
6575 22:16:14.391646 u2DelayCellTimex100 = 270/100 ps
6576 22:16:14.395055 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6577 22:16:14.398201 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6578 22:16:14.401868 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6579 22:16:14.404948 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6580 22:16:14.408100 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6581 22:16:14.412067 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6582 22:16:14.412625
6583 22:16:14.417946 CA PerBit enable=1, Macro0, CA PI delay=36
6584 22:16:14.418534
6585 22:16:14.418879 [CBTSetCACLKResult] CA Dly = 36
6586 22:16:14.420999 CS Dly: 1 (0~32)
6587 22:16:14.421420 ==
6588 22:16:14.424262 Dram Type= 6, Freq= 0, CH_1, rank 1
6589 22:16:14.427807 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6590 22:16:14.428229 ==
6591 22:16:14.434119 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6592 22:16:14.440773 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
6593 22:16:14.444148 [CA 0] Center 36 (8~64) winsize 57
6594 22:16:14.447831 [CA 1] Center 36 (8~64) winsize 57
6595 22:16:14.451032 [CA 2] Center 36 (8~64) winsize 57
6596 22:16:14.454056 [CA 3] Center 36 (8~64) winsize 57
6597 22:16:14.457677 [CA 4] Center 36 (8~64) winsize 57
6598 22:16:14.460794 [CA 5] Center 36 (8~64) winsize 57
6599 22:16:14.461317
6600 22:16:14.464260 [CmdBusTrainingLP45] Vref(ca) range 1: 33
6601 22:16:14.464682
6602 22:16:14.467364 [CATrainingPosCal] consider 2 rank data
6603 22:16:14.470067 u2DelayCellTimex100 = 270/100 ps
6604 22:16:14.473802 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6605 22:16:14.476716 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6606 22:16:14.480125 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6607 22:16:14.483344 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6608 22:16:14.487525 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6609 22:16:14.490022 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6610 22:16:14.490446
6611 22:16:14.497173 CA PerBit enable=1, Macro0, CA PI delay=36
6612 22:16:14.497698
6613 22:16:14.498037 [CBTSetCACLKResult] CA Dly = 36
6614 22:16:14.499914 CS Dly: 1 (0~32)
6615 22:16:14.500333
6616 22:16:14.503294 ----->DramcWriteLeveling(PI) begin...
6617 22:16:14.503716 ==
6618 22:16:14.506638 Dram Type= 6, Freq= 0, CH_1, rank 0
6619 22:16:14.509687 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6620 22:16:14.510209 ==
6621 22:16:14.513489 Write leveling (Byte 0): 40 => 8
6622 22:16:14.516613 Write leveling (Byte 1): 40 => 8
6623 22:16:14.520111 DramcWriteLeveling(PI) end<-----
6624 22:16:14.520622
6625 22:16:14.520963 ==
6626 22:16:14.523693 Dram Type= 6, Freq= 0, CH_1, rank 0
6627 22:16:14.526687 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6628 22:16:14.529254 ==
6629 22:16:14.529804 [Gating] SW mode calibration
6630 22:16:14.539703 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6631 22:16:14.543552 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6632 22:16:14.546011 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6633 22:16:14.552548 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6634 22:16:14.555806 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6635 22:16:14.559264 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6636 22:16:14.565579 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6637 22:16:14.569284 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6638 22:16:14.572526 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6639 22:16:14.578690 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6640 22:16:14.582285 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6641 22:16:14.585617 Total UI for P1: 0, mck2ui 16
6642 22:16:14.588729 best dqsien dly found for B0: ( 0, 14, 24)
6643 22:16:14.592374 Total UI for P1: 0, mck2ui 16
6644 22:16:14.595489 best dqsien dly found for B1: ( 0, 14, 24)
6645 22:16:14.598817 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6646 22:16:14.602044 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6647 22:16:14.602485
6648 22:16:14.605768 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6649 22:16:14.611835 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6650 22:16:14.612360 [Gating] SW calibration Done
6651 22:16:14.612697 ==
6652 22:16:14.615240 Dram Type= 6, Freq= 0, CH_1, rank 0
6653 22:16:14.621967 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6654 22:16:14.622502 ==
6655 22:16:14.622841 RX Vref Scan: 0
6656 22:16:14.623154
6657 22:16:14.625218 RX Vref 0 -> 0, step: 1
6658 22:16:14.625635
6659 22:16:14.628263 RX Delay -410 -> 252, step: 16
6660 22:16:14.631658 iDelay=230, Bit 0, Center -19 (-266 ~ 229) 496
6661 22:16:14.634994 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6662 22:16:14.642017 iDelay=230, Bit 2, Center -51 (-298 ~ 197) 496
6663 22:16:14.644628 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6664 22:16:14.648537 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6665 22:16:14.654900 iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496
6666 22:16:14.658050 iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496
6667 22:16:14.661935 iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496
6668 22:16:14.664454 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6669 22:16:14.671136 iDelay=230, Bit 9, Center -51 (-298 ~ 197) 496
6670 22:16:14.674521 iDelay=230, Bit 10, Center -35 (-282 ~ 213) 496
6671 22:16:14.677760 iDelay=230, Bit 11, Center -43 (-298 ~ 213) 512
6672 22:16:14.680808 iDelay=230, Bit 12, Center -27 (-282 ~ 229) 512
6673 22:16:14.687928 iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512
6674 22:16:14.691134 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6675 22:16:14.694529 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6676 22:16:14.695094 ==
6677 22:16:14.697795 Dram Type= 6, Freq= 0, CH_1, rank 0
6678 22:16:14.700673 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6679 22:16:14.704813 ==
6680 22:16:14.705383 DQS Delay:
6681 22:16:14.705756 DQS0 = 51, DQS1 = 51
6682 22:16:14.707272 DQM Delay:
6683 22:16:14.707735 DQM0 = 20, DQM1 = 13
6684 22:16:14.710960 DQ Delay:
6685 22:16:14.714124 DQ0 =32, DQ1 =16, DQ2 =0, DQ3 =16
6686 22:16:14.717401 DQ4 =16, DQ5 =32, DQ6 =32, DQ7 =16
6687 22:16:14.717971 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6688 22:16:14.720887 DQ12 =24, DQ13 =24, DQ14 =16, DQ15 =16
6689 22:16:14.723845
6690 22:16:14.724402
6691 22:16:14.724780 ==
6692 22:16:14.727306 Dram Type= 6, Freq= 0, CH_1, rank 0
6693 22:16:14.730362 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6694 22:16:14.730827 ==
6695 22:16:14.731241
6696 22:16:14.731601
6697 22:16:14.734368 TX Vref Scan disable
6698 22:16:14.734849 == TX Byte 0 ==
6699 22:16:14.740351 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6700 22:16:14.743635 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6701 22:16:14.744074 == TX Byte 1 ==
6702 22:16:14.747149 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6703 22:16:14.753295 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6704 22:16:14.753716 ==
6705 22:16:14.757131 Dram Type= 6, Freq= 0, CH_1, rank 0
6706 22:16:14.760085 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6707 22:16:14.760601 ==
6708 22:16:14.761129
6709 22:16:14.761500
6710 22:16:14.763234 TX Vref Scan disable
6711 22:16:14.763658 == TX Byte 0 ==
6712 22:16:14.769816 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6713 22:16:14.773396 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6714 22:16:14.773921 == TX Byte 1 ==
6715 22:16:14.780119 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6716 22:16:14.783259 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6717 22:16:14.783784
6718 22:16:14.784121 [DATLAT]
6719 22:16:14.786296 Freq=400, CH1 RK0
6720 22:16:14.786713
6721 22:16:14.787046 DATLAT Default: 0xf
6722 22:16:14.789861 0, 0xFFFF, sum = 0
6723 22:16:14.790287 1, 0xFFFF, sum = 0
6724 22:16:14.793222 2, 0xFFFF, sum = 0
6725 22:16:14.793754 3, 0xFFFF, sum = 0
6726 22:16:14.796119 4, 0xFFFF, sum = 0
6727 22:16:14.796545 5, 0xFFFF, sum = 0
6728 22:16:14.799842 6, 0xFFFF, sum = 0
6729 22:16:14.800380 7, 0xFFFF, sum = 0
6730 22:16:14.802843 8, 0xFFFF, sum = 0
6731 22:16:14.806680 9, 0xFFFF, sum = 0
6732 22:16:14.807238 10, 0xFFFF, sum = 0
6733 22:16:14.809670 11, 0xFFFF, sum = 0
6734 22:16:14.810200 12, 0xFFFF, sum = 0
6735 22:16:14.812775 13, 0x0, sum = 1
6736 22:16:14.813308 14, 0x0, sum = 2
6737 22:16:14.816084 15, 0x0, sum = 3
6738 22:16:14.816762 16, 0x0, sum = 4
6739 22:16:14.818991 best_step = 14
6740 22:16:14.819501
6741 22:16:14.819843 ==
6742 22:16:14.822664 Dram Type= 6, Freq= 0, CH_1, rank 0
6743 22:16:14.825676 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6744 22:16:14.826130 ==
6745 22:16:14.826506 RX Vref Scan: 1
6746 22:16:14.829012
6747 22:16:14.829530 RX Vref 0 -> 0, step: 1
6748 22:16:14.829867
6749 22:16:14.832467 RX Delay -343 -> 252, step: 8
6750 22:16:14.832886
6751 22:16:14.835698 Set Vref, RX VrefLevel [Byte0]: 52
6752 22:16:14.839738 [Byte1]: 51
6753 22:16:14.843299
6754 22:16:14.843717 Final RX Vref Byte 0 = 52 to rank0
6755 22:16:14.846336 Final RX Vref Byte 1 = 51 to rank0
6756 22:16:14.849533 Final RX Vref Byte 0 = 52 to rank1
6757 22:16:14.852873 Final RX Vref Byte 1 = 51 to rank1==
6758 22:16:14.856664 Dram Type= 6, Freq= 0, CH_1, rank 0
6759 22:16:14.862669 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6760 22:16:14.863095 ==
6761 22:16:14.863596 DQS Delay:
6762 22:16:14.865937 DQS0 = 44, DQS1 = 52
6763 22:16:14.866368 DQM Delay:
6764 22:16:14.866700 DQM0 = 10, DQM1 = 10
6765 22:16:14.869598 DQ Delay:
6766 22:16:14.873346 DQ0 =20, DQ1 =8, DQ2 =0, DQ3 =8
6767 22:16:14.875817 DQ4 =4, DQ5 =20, DQ6 =20, DQ7 =4
6768 22:16:14.876245 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =4
6769 22:16:14.879355 DQ12 =20, DQ13 =16, DQ14 =16, DQ15 =16
6770 22:16:14.882223
6771 22:16:14.882649
6772 22:16:14.888876 [DQSOSCAuto] RK0, (LSB)MR18= 0x678e, (MSB)MR19= 0xc0c, tDQSOscB0 = 392 ps tDQSOscB1 = 396 ps
6773 22:16:14.892536 CH1 RK0: MR19=C0C, MR18=678E
6774 22:16:14.899573 CH1_RK0: MR19=0xC0C, MR18=0x678E, DQSOSC=392, MR23=63, INC=384, DEC=256
6775 22:16:14.900153 ==
6776 22:16:14.902330 Dram Type= 6, Freq= 0, CH_1, rank 1
6777 22:16:14.905940 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6778 22:16:14.906514 ==
6779 22:16:14.908994 [Gating] SW mode calibration
6780 22:16:14.915870 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6781 22:16:14.922258 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6782 22:16:14.925601 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6783 22:16:14.928389 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6784 22:16:14.935025 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6785 22:16:14.938473 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6786 22:16:14.941481 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6787 22:16:14.948302 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6788 22:16:14.951387 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6789 22:16:14.954829 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6790 22:16:14.961248 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6791 22:16:14.964486 Total UI for P1: 0, mck2ui 16
6792 22:16:14.968159 best dqsien dly found for B0: ( 0, 14, 24)
6793 22:16:14.971473 Total UI for P1: 0, mck2ui 16
6794 22:16:14.974468 best dqsien dly found for B1: ( 0, 14, 24)
6795 22:16:14.978121 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6796 22:16:14.981083 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6797 22:16:14.981530
6798 22:16:14.984706 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6799 22:16:14.988049 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6800 22:16:14.990829 [Gating] SW calibration Done
6801 22:16:14.991296 ==
6802 22:16:14.994755 Dram Type= 6, Freq= 0, CH_1, rank 1
6803 22:16:14.997701 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6804 22:16:14.998238 ==
6805 22:16:15.001136 RX Vref Scan: 0
6806 22:16:15.001666
6807 22:16:15.005430 RX Vref 0 -> 0, step: 1
6808 22:16:15.005970
6809 22:16:15.007257 RX Delay -410 -> 252, step: 16
6810 22:16:15.010803 iDelay=230, Bit 0, Center -27 (-282 ~ 229) 512
6811 22:16:15.014262 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6812 22:16:15.017916 iDelay=230, Bit 2, Center -43 (-298 ~ 213) 512
6813 22:16:15.024225 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6814 22:16:15.027555 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6815 22:16:15.030689 iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496
6816 22:16:15.033690 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6817 22:16:15.040739 iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496
6818 22:16:15.043918 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6819 22:16:15.046753 iDelay=230, Bit 9, Center -51 (-298 ~ 197) 496
6820 22:16:15.050693 iDelay=230, Bit 10, Center -35 (-282 ~ 213) 496
6821 22:16:15.056811 iDelay=230, Bit 11, Center -35 (-282 ~ 213) 496
6822 22:16:15.060316 iDelay=230, Bit 12, Center -27 (-282 ~ 229) 512
6823 22:16:15.063315 iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512
6824 22:16:15.069776 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6825 22:16:15.073140 iDelay=230, Bit 15, Center -27 (-282 ~ 229) 512
6826 22:16:15.073599 ==
6827 22:16:15.076697 Dram Type= 6, Freq= 0, CH_1, rank 1
6828 22:16:15.079862 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6829 22:16:15.080331 ==
6830 22:16:15.082882 DQS Delay:
6831 22:16:15.083367 DQS0 = 43, DQS1 = 51
6832 22:16:15.086615 DQM Delay:
6833 22:16:15.087208 DQM0 = 11, DQM1 = 15
6834 22:16:15.087587 DQ Delay:
6835 22:16:15.090103 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =8
6836 22:16:15.092935 DQ4 =8, DQ5 =24, DQ6 =16, DQ7 =8
6837 22:16:15.096786 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =16
6838 22:16:15.100367 DQ12 =24, DQ13 =24, DQ14 =16, DQ15 =24
6839 22:16:15.100942
6840 22:16:15.101315
6841 22:16:15.101659 ==
6842 22:16:15.102570 Dram Type= 6, Freq= 0, CH_1, rank 1
6843 22:16:15.109693 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6844 22:16:15.110269 ==
6845 22:16:15.110644
6846 22:16:15.110987
6847 22:16:15.111373 TX Vref Scan disable
6848 22:16:15.112614 == TX Byte 0 ==
6849 22:16:15.116249 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6850 22:16:15.119577 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6851 22:16:15.122892 == TX Byte 1 ==
6852 22:16:15.126331 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6853 22:16:15.129406 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6854 22:16:15.129981 ==
6855 22:16:15.132916 Dram Type= 6, Freq= 0, CH_1, rank 1
6856 22:16:15.139363 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6857 22:16:15.140009 ==
6858 22:16:15.140390
6859 22:16:15.140734
6860 22:16:15.141061 TX Vref Scan disable
6861 22:16:15.142400 == TX Byte 0 ==
6862 22:16:15.146029 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6863 22:16:15.148879 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6864 22:16:15.152509 == TX Byte 1 ==
6865 22:16:15.156996 Update DQ dly =584 (4 ,2, 8) DQ OEN =(3 ,3)
6866 22:16:15.159728 Update DQM dly =584 (4 ,2, 8) DQM OEN =(3 ,3)
6867 22:16:15.160198
6868 22:16:15.162823 [DATLAT]
6869 22:16:15.163425 Freq=400, CH1 RK1
6870 22:16:15.163800
6871 22:16:15.165532 DATLAT Default: 0xe
6872 22:16:15.166000 0, 0xFFFF, sum = 0
6873 22:16:15.168894 1, 0xFFFF, sum = 0
6874 22:16:15.169366 2, 0xFFFF, sum = 0
6875 22:16:15.172027 3, 0xFFFF, sum = 0
6876 22:16:15.172527 4, 0xFFFF, sum = 0
6877 22:16:15.175413 5, 0xFFFF, sum = 0
6878 22:16:15.178423 6, 0xFFFF, sum = 0
6879 22:16:15.178901 7, 0xFFFF, sum = 0
6880 22:16:15.181784 8, 0xFFFF, sum = 0
6881 22:16:15.182220 9, 0xFFFF, sum = 0
6882 22:16:15.185592 10, 0xFFFF, sum = 0
6883 22:16:15.186162 11, 0xFFFF, sum = 0
6884 22:16:15.188624 12, 0xFFFF, sum = 0
6885 22:16:15.189161 13, 0x0, sum = 1
6886 22:16:15.191885 14, 0x0, sum = 2
6887 22:16:15.192421 15, 0x0, sum = 3
6888 22:16:15.195005 16, 0x0, sum = 4
6889 22:16:15.195658 best_step = 14
6890 22:16:15.196038
6891 22:16:15.196390 ==
6892 22:16:15.198541 Dram Type= 6, Freq= 0, CH_1, rank 1
6893 22:16:15.202030 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6894 22:16:15.204763 ==
6895 22:16:15.205263 RX Vref Scan: 0
6896 22:16:15.205642
6897 22:16:15.208945 RX Vref 0 -> 0, step: 1
6898 22:16:15.209522
6899 22:16:15.212234 RX Delay -343 -> 252, step: 8
6900 22:16:15.218663 iDelay=217, Bit 0, Center -36 (-279 ~ 208) 488
6901 22:16:15.222250 iDelay=217, Bit 1, Center -40 (-287 ~ 208) 496
6902 22:16:15.226045 iDelay=217, Bit 2, Center -48 (-295 ~ 200) 496
6903 22:16:15.228292 iDelay=217, Bit 3, Center -40 (-287 ~ 208) 496
6904 22:16:15.234852 iDelay=217, Bit 4, Center -40 (-287 ~ 208) 496
6905 22:16:15.237777 iDelay=217, Bit 5, Center -28 (-271 ~ 216) 488
6906 22:16:15.241071 iDelay=217, Bit 6, Center -28 (-271 ~ 216) 488
6907 22:16:15.244968 iDelay=217, Bit 7, Center -40 (-287 ~ 208) 496
6908 22:16:15.251545 iDelay=217, Bit 8, Center -56 (-295 ~ 184) 480
6909 22:16:15.254431 iDelay=217, Bit 9, Center -52 (-295 ~ 192) 488
6910 22:16:15.257874 iDelay=217, Bit 10, Center -40 (-287 ~ 208) 496
6911 22:16:15.261008 iDelay=217, Bit 11, Center -48 (-287 ~ 192) 480
6912 22:16:15.267315 iDelay=217, Bit 12, Center -32 (-271 ~ 208) 480
6913 22:16:15.270776 iDelay=217, Bit 13, Center -32 (-271 ~ 208) 480
6914 22:16:15.274215 iDelay=217, Bit 14, Center -36 (-279 ~ 208) 488
6915 22:16:15.280541 iDelay=217, Bit 15, Center -32 (-279 ~ 216) 496
6916 22:16:15.281122 ==
6917 22:16:15.283690 Dram Type= 6, Freq= 0, CH_1, rank 1
6918 22:16:15.287290 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6919 22:16:15.287860 ==
6920 22:16:15.288235 DQS Delay:
6921 22:16:15.291114 DQS0 = 48, DQS1 = 56
6922 22:16:15.291638 DQM Delay:
6923 22:16:15.293601 DQM0 = 10, DQM1 = 15
6924 22:16:15.294064 DQ Delay:
6925 22:16:15.297235 DQ0 =12, DQ1 =8, DQ2 =0, DQ3 =8
6926 22:16:15.300200 DQ4 =8, DQ5 =20, DQ6 =20, DQ7 =8
6927 22:16:15.304233 DQ8 =0, DQ9 =4, DQ10 =16, DQ11 =8
6928 22:16:15.306979 DQ12 =24, DQ13 =24, DQ14 =20, DQ15 =24
6929 22:16:15.307559
6930 22:16:15.308091
6931 22:16:15.314017 [DQSOSCAuto] RK1, (LSB)MR18= 0x7ab1, (MSB)MR19= 0xc0c, tDQSOscB0 = 387 ps tDQSOscB1 = 394 ps
6932 22:16:15.317447 CH1 RK1: MR19=C0C, MR18=7AB1
6933 22:16:15.323548 CH1_RK1: MR19=0xC0C, MR18=0x7AB1, DQSOSC=387, MR23=63, INC=394, DEC=262
6934 22:16:15.327380 [RxdqsGatingPostProcess] freq 400
6935 22:16:15.333226 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6936 22:16:15.336568 best DQS0 dly(2T, 0.5T) = (0, 10)
6937 22:16:15.337133 best DQS1 dly(2T, 0.5T) = (0, 10)
6938 22:16:15.339687 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6939 22:16:15.342843 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6940 22:16:15.346757 best DQS0 dly(2T, 0.5T) = (0, 10)
6941 22:16:15.349917 best DQS1 dly(2T, 0.5T) = (0, 10)
6942 22:16:15.353131 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6943 22:16:15.356337 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6944 22:16:15.359722 Pre-setting of DQS Precalculation
6945 22:16:15.366025 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6946 22:16:15.372868 sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6
6947 22:16:15.379205 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
6948 22:16:15.379766
6949 22:16:15.380134
6950 22:16:15.382469 [Calibration Summary] 800 Mbps
6951 22:16:15.382944 CH 0, Rank 0
6952 22:16:15.385755 SW Impedance : PASS
6953 22:16:15.389271 DUTY Scan : NO K
6954 22:16:15.389840 ZQ Calibration : PASS
6955 22:16:15.392433 Jitter Meter : NO K
6956 22:16:15.395791 CBT Training : PASS
6957 22:16:15.396372 Write leveling : PASS
6958 22:16:15.399322 RX DQS gating : PASS
6959 22:16:15.402219 RX DQ/DQS(RDDQC) : PASS
6960 22:16:15.402682 TX DQ/DQS : PASS
6961 22:16:15.405954 RX DATLAT : PASS
6962 22:16:15.409080 RX DQ/DQS(Engine): PASS
6963 22:16:15.409698 TX OE : NO K
6964 22:16:15.412203 All Pass.
6965 22:16:15.412784
6966 22:16:15.413152 CH 0, Rank 1
6967 22:16:15.415440 SW Impedance : PASS
6968 22:16:15.416013 DUTY Scan : NO K
6969 22:16:15.419264 ZQ Calibration : PASS
6970 22:16:15.422131 Jitter Meter : NO K
6971 22:16:15.422597 CBT Training : PASS
6972 22:16:15.425724 Write leveling : NO K
6973 22:16:15.428630 RX DQS gating : PASS
6974 22:16:15.429094 RX DQ/DQS(RDDQC) : PASS
6975 22:16:15.432020 TX DQ/DQS : PASS
6976 22:16:15.432491 RX DATLAT : PASS
6977 22:16:15.435521 RX DQ/DQS(Engine): PASS
6978 22:16:15.438869 TX OE : NO K
6979 22:16:15.439504 All Pass.
6980 22:16:15.439883
6981 22:16:15.441934 CH 1, Rank 0
6982 22:16:15.442420 SW Impedance : PASS
6983 22:16:15.445615 DUTY Scan : NO K
6984 22:16:15.446182 ZQ Calibration : PASS
6985 22:16:15.449097 Jitter Meter : NO K
6986 22:16:15.452569 CBT Training : PASS
6987 22:16:15.453137 Write leveling : PASS
6988 22:16:15.455001 RX DQS gating : PASS
6989 22:16:15.458579 RX DQ/DQS(RDDQC) : PASS
6990 22:16:15.459148 TX DQ/DQS : PASS
6991 22:16:15.461523 RX DATLAT : PASS
6992 22:16:15.465387 RX DQ/DQS(Engine): PASS
6993 22:16:15.466078 TX OE : NO K
6994 22:16:15.468031 All Pass.
6995 22:16:15.468638
6996 22:16:15.469130 CH 1, Rank 1
6997 22:16:15.471350 SW Impedance : PASS
6998 22:16:15.471813 DUTY Scan : NO K
6999 22:16:15.474858 ZQ Calibration : PASS
7000 22:16:15.478063 Jitter Meter : NO K
7001 22:16:15.478664 CBT Training : PASS
7002 22:16:15.481612 Write leveling : NO K
7003 22:16:15.484504 RX DQS gating : PASS
7004 22:16:15.485009 RX DQ/DQS(RDDQC) : PASS
7005 22:16:15.487804 TX DQ/DQS : PASS
7006 22:16:15.490959 RX DATLAT : PASS
7007 22:16:15.491453 RX DQ/DQS(Engine): PASS
7008 22:16:15.494351 TX OE : NO K
7009 22:16:15.494853 All Pass.
7010 22:16:15.495234
7011 22:16:15.497549 DramC Write-DBI off
7012 22:16:15.500801 PER_BANK_REFRESH: Hybrid Mode
7013 22:16:15.501267 TX_TRACKING: ON
7014 22:16:15.510839 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
7015 22:16:15.514028 [FAST_K] Save calibration result to emmc
7016 22:16:15.518572 dramc_set_vcore_voltage set vcore to 725000
7017 22:16:15.520506 Read voltage for 1600, 0
7018 22:16:15.520967 Vio18 = 0
7019 22:16:15.523760 Vcore = 725000
7020 22:16:15.524296 Vdram = 0
7021 22:16:15.524633 Vddq = 0
7022 22:16:15.524942 Vmddr = 0
7023 22:16:15.531405 [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0
7024 22:16:15.536976 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
7025 22:16:15.537503 MEM_TYPE=3, freq_sel=13
7026 22:16:15.540518 sv_algorithm_assistance_LP4_3733
7027 22:16:15.543567 ============ PULL DRAM RESETB DOWN ============
7028 22:16:15.550703 ========== PULL DRAM RESETB DOWN end =========
7029 22:16:15.554305 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7030 22:16:15.556971 ===================================
7031 22:16:15.560135 LPDDR4 DRAM CONFIGURATION
7032 22:16:15.563496 ===================================
7033 22:16:15.564017 EX_ROW_EN[0] = 0x0
7034 22:16:15.566379 EX_ROW_EN[1] = 0x0
7035 22:16:15.566816 LP4Y_EN = 0x0
7036 22:16:15.569608 WORK_FSP = 0x1
7037 22:16:15.572807 WL = 0x5
7038 22:16:15.573224 RL = 0x5
7039 22:16:15.576136 BL = 0x2
7040 22:16:15.576574 RPST = 0x0
7041 22:16:15.579646 RD_PRE = 0x0
7042 22:16:15.580063 WR_PRE = 0x1
7043 22:16:15.583386 WR_PST = 0x1
7044 22:16:15.583807 DBI_WR = 0x0
7045 22:16:15.586287 DBI_RD = 0x0
7046 22:16:15.586704 OTF = 0x1
7047 22:16:15.589872 ===================================
7048 22:16:15.592696 ===================================
7049 22:16:15.596152 ANA top config
7050 22:16:15.599277 ===================================
7051 22:16:15.599750 DLL_ASYNC_EN = 0
7052 22:16:15.602860 ALL_SLAVE_EN = 0
7053 22:16:15.605704 NEW_RANK_MODE = 1
7054 22:16:15.610225 DLL_IDLE_MODE = 1
7055 22:16:15.613268 LP45_APHY_COMB_EN = 1
7056 22:16:15.613835 TX_ODT_DIS = 0
7057 22:16:15.616190 NEW_8X_MODE = 1
7058 22:16:15.619587 ===================================
7059 22:16:15.622324 ===================================
7060 22:16:15.625949 data_rate = 3200
7061 22:16:15.629804 CKR = 1
7062 22:16:15.632556 DQ_P2S_RATIO = 8
7063 22:16:15.636069 ===================================
7064 22:16:15.639001 CA_P2S_RATIO = 8
7065 22:16:15.639564 DQ_CA_OPEN = 0
7066 22:16:15.642479 DQ_SEMI_OPEN = 0
7067 22:16:15.645388 CA_SEMI_OPEN = 0
7068 22:16:15.648755 CA_FULL_RATE = 0
7069 22:16:15.652432 DQ_CKDIV4_EN = 0
7070 22:16:15.655657 CA_CKDIV4_EN = 0
7071 22:16:15.656185 CA_PREDIV_EN = 0
7072 22:16:15.659366 PH8_DLY = 12
7073 22:16:15.662132 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
7074 22:16:15.666475 DQ_AAMCK_DIV = 4
7075 22:16:15.669067 CA_AAMCK_DIV = 4
7076 22:16:15.672114 CA_ADMCK_DIV = 4
7077 22:16:15.672625 DQ_TRACK_CA_EN = 0
7078 22:16:15.674966 CA_PICK = 1600
7079 22:16:15.678335 CA_MCKIO = 1600
7080 22:16:15.681951 MCKIO_SEMI = 0
7081 22:16:15.685344 PLL_FREQ = 3068
7082 22:16:15.689985 DQ_UI_PI_RATIO = 32
7083 22:16:15.691897 CA_UI_PI_RATIO = 0
7084 22:16:15.694768 ===================================
7085 22:16:15.698574 ===================================
7086 22:16:15.699095 memory_type:LPDDR4
7087 22:16:15.701553 GP_NUM : 10
7088 22:16:15.704727 SRAM_EN : 1
7089 22:16:15.705152 MD32_EN : 0
7090 22:16:15.708121 ===================================
7091 22:16:15.711736 [ANA_INIT] >>>>>>>>>>>>>>
7092 22:16:15.714349 <<<<<< [CONFIGURE PHASE]: ANA_TX
7093 22:16:15.717935 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
7094 22:16:15.721086 ===================================
7095 22:16:15.725123 data_rate = 3200,PCW = 0X7600
7096 22:16:15.727580 ===================================
7097 22:16:15.731973 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
7098 22:16:15.737814 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7099 22:16:15.741178 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7100 22:16:15.748111 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
7101 22:16:15.751201 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
7102 22:16:15.754203 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
7103 22:16:15.754731 [ANA_INIT] flow start
7104 22:16:15.758016 [ANA_INIT] PLL >>>>>>>>
7105 22:16:15.760606 [ANA_INIT] PLL <<<<<<<<
7106 22:16:15.761131 [ANA_INIT] MIDPI >>>>>>>>
7107 22:16:15.764427 [ANA_INIT] MIDPI <<<<<<<<
7108 22:16:15.767271 [ANA_INIT] DLL >>>>>>>>
7109 22:16:15.767719 [ANA_INIT] DLL <<<<<<<<
7110 22:16:15.770788 [ANA_INIT] flow end
7111 22:16:15.773969 ============ LP4 DIFF to SE enter ============
7112 22:16:15.780541 ============ LP4 DIFF to SE exit ============
7113 22:16:15.781065 [ANA_INIT] <<<<<<<<<<<<<
7114 22:16:15.784168 [Flow] Enable top DCM control >>>>>
7115 22:16:15.787151 [Flow] Enable top DCM control <<<<<
7116 22:16:15.790877 Enable DLL master slave shuffle
7117 22:16:15.796710 ==============================================================
7118 22:16:15.797128 Gating Mode config
7119 22:16:15.803643 ==============================================================
7120 22:16:15.806814 Config description:
7121 22:16:15.818025 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
7122 22:16:15.823557 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
7123 22:16:15.826833 SELPH_MODE 0: By rank 1: By Phase
7124 22:16:15.833299 ==============================================================
7125 22:16:15.836278 GAT_TRACK_EN = 1
7126 22:16:15.839656 RX_GATING_MODE = 2
7127 22:16:15.840133 RX_GATING_TRACK_MODE = 2
7128 22:16:15.843018 SELPH_MODE = 1
7129 22:16:15.846879 PICG_EARLY_EN = 1
7130 22:16:15.850038 VALID_LAT_VALUE = 1
7131 22:16:15.856677 ==============================================================
7132 22:16:15.860026 Enter into Gating configuration >>>>
7133 22:16:15.863320 Exit from Gating configuration <<<<
7134 22:16:15.866273 Enter into DVFS_PRE_config >>>>>
7135 22:16:15.876277 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
7136 22:16:15.880179 Exit from DVFS_PRE_config <<<<<
7137 22:16:15.882839 Enter into PICG configuration >>>>
7138 22:16:15.886298 Exit from PICG configuration <<<<
7139 22:16:15.889682 [RX_INPUT] configuration >>>>>
7140 22:16:15.893144 [RX_INPUT] configuration <<<<<
7141 22:16:15.896206 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
7142 22:16:15.902920 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
7143 22:16:15.908709 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
7144 22:16:15.915571 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
7145 22:16:15.922572 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
7146 22:16:15.925581 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
7147 22:16:15.932723 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
7148 22:16:15.935680 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
7149 22:16:15.938677 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
7150 22:16:15.941801 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
7151 22:16:15.948949 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
7152 22:16:15.951893 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7153 22:16:15.955760 ===================================
7154 22:16:15.958906 LPDDR4 DRAM CONFIGURATION
7155 22:16:15.962336 ===================================
7156 22:16:15.962914 EX_ROW_EN[0] = 0x0
7157 22:16:15.965242 EX_ROW_EN[1] = 0x0
7158 22:16:15.965714 LP4Y_EN = 0x0
7159 22:16:15.968716 WORK_FSP = 0x1
7160 22:16:15.969259 WL = 0x5
7161 22:16:15.971811 RL = 0x5
7162 22:16:15.972281 BL = 0x2
7163 22:16:15.975557 RPST = 0x0
7164 22:16:15.978693 RD_PRE = 0x0
7165 22:16:15.979207 WR_PRE = 0x1
7166 22:16:15.982019 WR_PST = 0x1
7167 22:16:15.982603 DBI_WR = 0x0
7168 22:16:15.985526 DBI_RD = 0x0
7169 22:16:15.986094 OTF = 0x1
7170 22:16:15.988545 ===================================
7171 22:16:15.991896 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
7172 22:16:15.998765 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
7173 22:16:16.001637 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7174 22:16:16.004601 ===================================
7175 22:16:16.008359 LPDDR4 DRAM CONFIGURATION
7176 22:16:16.011362 ===================================
7177 22:16:16.011840 EX_ROW_EN[0] = 0x10
7178 22:16:16.014580 EX_ROW_EN[1] = 0x0
7179 22:16:16.015050 LP4Y_EN = 0x0
7180 22:16:16.018417 WORK_FSP = 0x1
7181 22:16:16.019063 WL = 0x5
7182 22:16:16.021643 RL = 0x5
7183 22:16:16.022116 BL = 0x2
7184 22:16:16.024392 RPST = 0x0
7185 22:16:16.027679 RD_PRE = 0x0
7186 22:16:16.028217 WR_PRE = 0x1
7187 22:16:16.031287 WR_PST = 0x1
7188 22:16:16.031756 DBI_WR = 0x0
7189 22:16:16.034784 DBI_RD = 0x0
7190 22:16:16.035246 OTF = 0x1
7191 22:16:16.038088 ===================================
7192 22:16:16.044416 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
7193 22:16:16.044912 ==
7194 22:16:16.047681 Dram Type= 6, Freq= 0, CH_0, rank 0
7195 22:16:16.051059 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7196 22:16:16.051669 ==
7197 22:16:16.054345 [Duty_Offset_Calibration]
7198 22:16:16.057740 B0:2 B1:0 CA:4
7199 22:16:16.058262
7200 22:16:16.060985 [DutyScan_Calibration_Flow] k_type=0
7201 22:16:16.069055
7202 22:16:16.069622 ==CLK 0==
7203 22:16:16.072223 Final CLK duty delay cell = -4
7204 22:16:16.075418 [-4] MAX Duty = 5031%(X100), DQS PI = 30
7205 22:16:16.078298 [-4] MIN Duty = 4844%(X100), DQS PI = 8
7206 22:16:16.082412 [-4] AVG Duty = 4937%(X100)
7207 22:16:16.082901
7208 22:16:16.085708 CH0 CLK Duty spec in!! Max-Min= 187%
7209 22:16:16.088157 [DutyScan_Calibration_Flow] ====Done====
7210 22:16:16.088646
7211 22:16:16.091667 [DutyScan_Calibration_Flow] k_type=1
7212 22:16:16.108177
7213 22:16:16.108865 ==DQS 0 ==
7214 22:16:16.111548 Final DQS duty delay cell = -4
7215 22:16:16.115648 [-4] MAX Duty = 4907%(X100), DQS PI = 44
7216 22:16:16.118734 [-4] MIN Duty = 4782%(X100), DQS PI = 4
7217 22:16:16.121317 [-4] AVG Duty = 4844%(X100)
7218 22:16:16.121878
7219 22:16:16.122254 ==DQS 1 ==
7220 22:16:16.124854 Final DQS duty delay cell = 0
7221 22:16:16.127574 [0] MAX Duty = 5187%(X100), DQS PI = 2
7222 22:16:16.131280 [0] MIN Duty = 5000%(X100), DQS PI = 10
7223 22:16:16.134546 [0] AVG Duty = 5093%(X100)
7224 22:16:16.135156
7225 22:16:16.138445 CH0 DQS 0 Duty spec in!! Max-Min= 125%
7226 22:16:16.139112
7227 22:16:16.140829 CH0 DQS 1 Duty spec in!! Max-Min= 187%
7228 22:16:16.144456 [DutyScan_Calibration_Flow] ====Done====
7229 22:16:16.145056
7230 22:16:16.147068 [DutyScan_Calibration_Flow] k_type=3
7231 22:16:16.165717
7232 22:16:16.166273 ==DQM 0 ==
7233 22:16:16.168449 Final DQM duty delay cell = 0
7234 22:16:16.172591 [0] MAX Duty = 5124%(X100), DQS PI = 22
7235 22:16:16.175168 [0] MIN Duty = 4875%(X100), DQS PI = 54
7236 22:16:16.178714 [0] AVG Duty = 4999%(X100)
7237 22:16:16.179242
7238 22:16:16.179624 ==DQM 1 ==
7239 22:16:16.182497 Final DQM duty delay cell = 0
7240 22:16:16.185132 [0] MAX Duty = 4969%(X100), DQS PI = 2
7241 22:16:16.188787 [0] MIN Duty = 4813%(X100), DQS PI = 16
7242 22:16:16.191992 [0] AVG Duty = 4891%(X100)
7243 22:16:16.192471
7244 22:16:16.195743 CH0 DQM 0 Duty spec in!! Max-Min= 249%
7245 22:16:16.196269
7246 22:16:16.198562 CH0 DQM 1 Duty spec in!! Max-Min= 156%
7247 22:16:16.201897 [DutyScan_Calibration_Flow] ====Done====
7248 22:16:16.202462
7249 22:16:16.204813 [DutyScan_Calibration_Flow] k_type=2
7250 22:16:16.223067
7251 22:16:16.223686 ==DQ 0 ==
7252 22:16:16.225900 Final DQ duty delay cell = 0
7253 22:16:16.229301 [0] MAX Duty = 5156%(X100), DQS PI = 22
7254 22:16:16.232892 [0] MIN Duty = 4938%(X100), DQS PI = 12
7255 22:16:16.233471 [0] AVG Duty = 5047%(X100)
7256 22:16:16.236736
7257 22:16:16.237201 ==DQ 1 ==
7258 22:16:16.239288 Final DQ duty delay cell = 0
7259 22:16:16.242319 [0] MAX Duty = 5218%(X100), DQS PI = 2
7260 22:16:16.245690 [0] MIN Duty = 4938%(X100), DQS PI = 12
7261 22:16:16.246162 [0] AVG Duty = 5078%(X100)
7262 22:16:16.246531
7263 22:16:16.252312 CH0 DQ 0 Duty spec in!! Max-Min= 218%
7264 22:16:16.252892
7265 22:16:16.255315 CH0 DQ 1 Duty spec in!! Max-Min= 280%
7266 22:16:16.259236 [DutyScan_Calibration_Flow] ====Done====
7267 22:16:16.259841 ==
7268 22:16:16.262819 Dram Type= 6, Freq= 0, CH_1, rank 0
7269 22:16:16.265591 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7270 22:16:16.266172 ==
7271 22:16:16.269218 [Duty_Offset_Calibration]
7272 22:16:16.269687 B0:0 B1:-1 CA:3
7273 22:16:16.270057
7274 22:16:16.272376 [DutyScan_Calibration_Flow] k_type=0
7275 22:16:16.283126
7276 22:16:16.283720 ==CLK 0==
7277 22:16:16.285034 Final CLK duty delay cell = -4
7278 22:16:16.288487 [-4] MAX Duty = 5000%(X100), DQS PI = 2
7279 22:16:16.292227 [-4] MIN Duty = 4875%(X100), DQS PI = 12
7280 22:16:16.295699 [-4] AVG Duty = 4937%(X100)
7281 22:16:16.296257
7282 22:16:16.298911 CH1 CLK Duty spec in!! Max-Min= 125%
7283 22:16:16.302011 [DutyScan_Calibration_Flow] ====Done====
7284 22:16:16.302566
7285 22:16:16.305018 [DutyScan_Calibration_Flow] k_type=1
7286 22:16:16.321811
7287 22:16:16.322377 ==DQS 0 ==
7288 22:16:16.324610 Final DQS duty delay cell = 0
7289 22:16:16.327784 [0] MAX Duty = 5250%(X100), DQS PI = 30
7290 22:16:16.332346 [0] MIN Duty = 4907%(X100), DQS PI = 58
7291 22:16:16.334325 [0] AVG Duty = 5078%(X100)
7292 22:16:16.334790
7293 22:16:16.335150 ==DQS 1 ==
7294 22:16:16.337665 Final DQS duty delay cell = -4
7295 22:16:16.341026 [-4] MAX Duty = 5031%(X100), DQS PI = 30
7296 22:16:16.344292 [-4] MIN Duty = 4844%(X100), DQS PI = 0
7297 22:16:16.347471 [-4] AVG Duty = 4937%(X100)
7298 22:16:16.347919
7299 22:16:16.350801 CH1 DQS 0 Duty spec in!! Max-Min= 343%
7300 22:16:16.351281
7301 22:16:16.354109 CH1 DQS 1 Duty spec in!! Max-Min= 187%
7302 22:16:16.358307 [DutyScan_Calibration_Flow] ====Done====
7303 22:16:16.358715
7304 22:16:16.360647 [DutyScan_Calibration_Flow] k_type=3
7305 22:16:16.378735
7306 22:16:16.379271 ==DQM 0 ==
7307 22:16:16.382179 Final DQM duty delay cell = 0
7308 22:16:16.385074 [0] MAX Duty = 5062%(X100), DQS PI = 28
7309 22:16:16.388210 [0] MIN Duty = 4782%(X100), DQS PI = 38
7310 22:16:16.391701 [0] AVG Duty = 4922%(X100)
7311 22:16:16.392154
7312 22:16:16.392517 ==DQM 1 ==
7313 22:16:16.395099 Final DQM duty delay cell = 0
7314 22:16:16.398765 [0] MAX Duty = 4969%(X100), DQS PI = 30
7315 22:16:16.401368 [0] MIN Duty = 4813%(X100), DQS PI = 0
7316 22:16:16.405246 [0] AVG Duty = 4891%(X100)
7317 22:16:16.405826
7318 22:16:16.408537 CH1 DQM 0 Duty spec in!! Max-Min= 280%
7319 22:16:16.409092
7320 22:16:16.411845 CH1 DQM 1 Duty spec in!! Max-Min= 156%
7321 22:16:16.415483 [DutyScan_Calibration_Flow] ====Done====
7322 22:16:16.416036
7323 22:16:16.418294 [DutyScan_Calibration_Flow] k_type=2
7324 22:16:16.434752
7325 22:16:16.435337 ==DQ 0 ==
7326 22:16:16.438037 Final DQ duty delay cell = -4
7327 22:16:16.441385 [-4] MAX Duty = 4938%(X100), DQS PI = 0
7328 22:16:16.444129 [-4] MIN Duty = 4813%(X100), DQS PI = 20
7329 22:16:16.447665 [-4] AVG Duty = 4875%(X100)
7330 22:16:16.448217
7331 22:16:16.448660 ==DQ 1 ==
7332 22:16:16.450920 Final DQ duty delay cell = 0
7333 22:16:16.454175 [0] MAX Duty = 5062%(X100), DQS PI = 32
7334 22:16:16.458082 [0] MIN Duty = 4875%(X100), DQS PI = 52
7335 22:16:16.460598 [0] AVG Duty = 4968%(X100)
7336 22:16:16.461062
7337 22:16:16.464730 CH1 DQ 0 Duty spec in!! Max-Min= 125%
7338 22:16:16.465292
7339 22:16:16.467523 CH1 DQ 1 Duty spec in!! Max-Min= 187%
7340 22:16:16.470365 [DutyScan_Calibration_Flow] ====Done====
7341 22:16:16.473734 nWR fixed to 30
7342 22:16:16.477010 [ModeRegInit_LP4] CH0 RK0
7343 22:16:16.477465 [ModeRegInit_LP4] CH0 RK1
7344 22:16:16.480304 [ModeRegInit_LP4] CH1 RK0
7345 22:16:16.483492 [ModeRegInit_LP4] CH1 RK1
7346 22:16:16.484022 match AC timing 5
7347 22:16:16.490183 dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 1
7348 22:16:16.493711 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
7349 22:16:16.496889 [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14
7350 22:16:16.503495 [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29
7351 22:16:16.506532 [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)
7352 22:16:16.510290 [MiockJmeterHQA]
7353 22:16:16.510814
7354 22:16:16.513318 [DramcMiockJmeter] u1RxGatingPI = 0
7355 22:16:16.513838 0 : 4259, 4032
7356 22:16:16.514183 4 : 4253, 4027
7357 22:16:16.517090 8 : 4253, 4026
7358 22:16:16.517621 12 : 4252, 4027
7359 22:16:16.520401 16 : 4253, 4026
7360 22:16:16.520931 20 : 4252, 4027
7361 22:16:16.522942 24 : 4253, 4026
7362 22:16:16.523391 28 : 4255, 4029
7363 22:16:16.523750 32 : 4252, 4027
7364 22:16:16.526957 36 : 4363, 4137
7365 22:16:16.527526 40 : 4252, 4027
7366 22:16:16.529970 44 : 4253, 4026
7367 22:16:16.530412 48 : 4252, 4027
7368 22:16:16.533475 52 : 4252, 4027
7369 22:16:16.534007 56 : 4253, 4027
7370 22:16:16.536548 60 : 4363, 4138
7371 22:16:16.537029 64 : 4360, 4137
7372 22:16:16.537378 68 : 4250, 4027
7373 22:16:16.540075 72 : 4250, 4027
7374 22:16:16.540501 76 : 4250, 4027
7375 22:16:16.543713 80 : 4250, 4027
7376 22:16:16.544251 84 : 4250, 4027
7377 22:16:16.546992 88 : 4361, 4137
7378 22:16:16.547447 92 : 4250, 4027
7379 22:16:16.549594 96 : 4250, 3389
7380 22:16:16.550121 100 : 4250, 0
7381 22:16:16.550466 104 : 4250, 0
7382 22:16:16.553059 108 : 4250, 0
7383 22:16:16.553605 112 : 4255, 0
7384 22:16:16.556947 116 : 4250, 0
7385 22:16:16.557648 120 : 4250, 0
7386 22:16:16.558010 124 : 4360, 0
7387 22:16:16.559496 128 : 4360, 0
7388 22:16:16.559933 132 : 4360, 0
7389 22:16:16.560274 136 : 4250, 0
7390 22:16:16.563657 140 : 4360, 0
7391 22:16:16.564163 144 : 4250, 0
7392 22:16:16.566373 148 : 4249, 0
7393 22:16:16.566903 152 : 4250, 0
7394 22:16:16.567291 156 : 4250, 0
7395 22:16:16.569234 160 : 4250, 0
7396 22:16:16.569657 164 : 4250, 0
7397 22:16:16.573215 168 : 4250, 0
7398 22:16:16.573807 172 : 4250, 0
7399 22:16:16.574157 176 : 4361, 0
7400 22:16:16.575697 180 : 4361, 0
7401 22:16:16.576211 184 : 4360, 0
7402 22:16:16.578959 188 : 4251, 0
7403 22:16:16.579597 192 : 4250, 0
7404 22:16:16.580145 196 : 4252, 0
7405 22:16:16.582427 200 : 4249, 0
7406 22:16:16.582852 204 : 4250, 0
7407 22:16:16.585668 208 : 4250, 0
7408 22:16:16.586107 212 : 4250, 0
7409 22:16:16.586445 216 : 4250, 0
7410 22:16:16.589672 220 : 4250, 495
7411 22:16:16.590281 224 : 4360, 4100
7412 22:16:16.592799 228 : 4250, 4027
7413 22:16:16.593330 232 : 4361, 4137
7414 22:16:16.595572 236 : 4360, 4137
7415 22:16:16.595997 240 : 4250, 4027
7416 22:16:16.598885 244 : 4250, 4027
7417 22:16:16.599356 248 : 4360, 4138
7418 22:16:16.602477 252 : 4250, 4026
7419 22:16:16.603019 256 : 4250, 4027
7420 22:16:16.603408 260 : 4250, 4027
7421 22:16:16.605774 264 : 4250, 4027
7422 22:16:16.606301 268 : 4250, 4027
7423 22:16:16.608874 272 : 4250, 4027
7424 22:16:16.609399 276 : 4361, 4137
7425 22:16:16.612513 280 : 4250, 4027
7426 22:16:16.613042 284 : 4250, 4027
7427 22:16:16.615543 288 : 4361, 4137
7428 22:16:16.615967 292 : 4250, 4027
7429 22:16:16.619105 296 : 4249, 4027
7430 22:16:16.619667 300 : 4360, 4137
7431 22:16:16.622469 304 : 4250, 4026
7432 22:16:16.622998 308 : 4250, 4027
7433 22:16:16.625877 312 : 4249, 4027
7434 22:16:16.626407 316 : 4252, 4029
7435 22:16:16.628632 320 : 4250, 4027
7436 22:16:16.629060 324 : 4250, 4027
7437 22:16:16.629398 328 : 4360, 4138
7438 22:16:16.632091 332 : 4250, 4011
7439 22:16:16.632617 336 : 4250, 2020
7440 22:16:16.632961
7441 22:16:16.635514 MIOCK jitter meter ch=0
7442 22:16:16.636039
7443 22:16:16.638598 1T = (336-100) = 236 dly cells
7444 22:16:16.645084 Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 275/100 ps
7445 22:16:16.645614 ==
7446 22:16:16.649000 Dram Type= 6, Freq= 0, CH_0, rank 0
7447 22:16:16.651827 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7448 22:16:16.652376 ==
7449 22:16:16.658085 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7450 22:16:16.661785 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7451 22:16:16.664920 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7452 22:16:16.671512 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7453 22:16:16.681093 [CA 0] Center 44 (14~74) winsize 61
7454 22:16:16.684158 [CA 1] Center 43 (13~74) winsize 62
7455 22:16:16.687662 [CA 2] Center 39 (10~68) winsize 59
7456 22:16:16.691569 [CA 3] Center 38 (9~68) winsize 60
7457 22:16:16.694396 [CA 4] Center 36 (7~66) winsize 60
7458 22:16:16.697955 [CA 5] Center 36 (6~66) winsize 61
7459 22:16:16.698644
7460 22:16:16.701618 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7461 22:16:16.702188
7462 22:16:16.707683 [CATrainingPosCal] consider 1 rank data
7463 22:16:16.708254 u2DelayCellTimex100 = 275/100 ps
7464 22:16:16.714100 CA0 delay=44 (14~74),Diff = 8 PI (28 cell)
7465 22:16:16.717730 CA1 delay=43 (13~74),Diff = 7 PI (24 cell)
7466 22:16:16.720837 CA2 delay=39 (10~68),Diff = 3 PI (10 cell)
7467 22:16:16.724069 CA3 delay=38 (9~68),Diff = 2 PI (7 cell)
7468 22:16:16.727673 CA4 delay=36 (7~66),Diff = 0 PI (0 cell)
7469 22:16:16.730778 CA5 delay=36 (6~66),Diff = 0 PI (0 cell)
7470 22:16:16.731387
7471 22:16:16.733825 CA PerBit enable=1, Macro0, CA PI delay=36
7472 22:16:16.734394
7473 22:16:16.737368 [CBTSetCACLKResult] CA Dly = 36
7474 22:16:16.740459 CS Dly: 11 (0~42)
7475 22:16:16.743931 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7476 22:16:16.747255 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7477 22:16:16.747820 ==
7478 22:16:16.750146 Dram Type= 6, Freq= 0, CH_0, rank 1
7479 22:16:16.756854 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7480 22:16:16.757323 ==
7481 22:16:16.760972 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7482 22:16:16.766878 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7483 22:16:16.770213 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7484 22:16:16.776903 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7485 22:16:16.785275 [CA 0] Center 44 (14~75) winsize 62
7486 22:16:16.787665 [CA 1] Center 43 (13~74) winsize 62
7487 22:16:16.791355 [CA 2] Center 38 (9~68) winsize 60
7488 22:16:16.794758 [CA 3] Center 38 (9~68) winsize 60
7489 22:16:16.797420 [CA 4] Center 37 (7~67) winsize 61
7490 22:16:16.802262 [CA 5] Center 36 (7~66) winsize 60
7491 22:16:16.802829
7492 22:16:16.803934 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7493 22:16:16.804398
7494 22:16:16.810983 [CATrainingPosCal] consider 2 rank data
7495 22:16:16.811617 u2DelayCellTimex100 = 275/100 ps
7496 22:16:16.818004 CA0 delay=44 (14~74),Diff = 8 PI (28 cell)
7497 22:16:16.820492 CA1 delay=43 (13~74),Diff = 7 PI (24 cell)
7498 22:16:16.824431 CA2 delay=39 (10~68),Diff = 3 PI (10 cell)
7499 22:16:16.827754 CA3 delay=38 (9~68),Diff = 2 PI (7 cell)
7500 22:16:16.830430 CA4 delay=36 (7~66),Diff = 0 PI (0 cell)
7501 22:16:16.834230 CA5 delay=36 (7~66),Diff = 0 PI (0 cell)
7502 22:16:16.834795
7503 22:16:16.837527 CA PerBit enable=1, Macro0, CA PI delay=36
7504 22:16:16.838106
7505 22:16:16.840485 [CBTSetCACLKResult] CA Dly = 36
7506 22:16:16.844135 CS Dly: 11 (0~43)
7507 22:16:16.847066 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7508 22:16:16.850501 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7509 22:16:16.851070
7510 22:16:16.853902 ----->DramcWriteLeveling(PI) begin...
7511 22:16:16.856996 ==
7512 22:16:16.860719 Dram Type= 6, Freq= 0, CH_0, rank 0
7513 22:16:16.864041 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7514 22:16:16.864607 ==
7515 22:16:16.866864 Write leveling (Byte 0): 36 => 36
7516 22:16:16.870129 Write leveling (Byte 1): 24 => 24
7517 22:16:16.873173 DramcWriteLeveling(PI) end<-----
7518 22:16:16.873640
7519 22:16:16.874005 ==
7520 22:16:16.876285 Dram Type= 6, Freq= 0, CH_0, rank 0
7521 22:16:16.879691 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7522 22:16:16.880153 ==
7523 22:16:16.882917 [Gating] SW mode calibration
7524 22:16:16.889778 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7525 22:16:16.895842 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7526 22:16:16.900025 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7527 22:16:16.902823 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7528 22:16:16.909714 1 4 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7529 22:16:16.912703 1 4 12 | B1->B0 | 2323 3131 | 0 1 | (0 0) (0 0)
7530 22:16:16.915998 1 4 16 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
7531 22:16:16.922975 1 4 20 | B1->B0 | 2d2d 3434 | 1 1 | (1 1) (1 1)
7532 22:16:16.925900 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7533 22:16:16.929053 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7534 22:16:16.936012 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7535 22:16:16.938927 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7536 22:16:16.942355 1 5 8 | B1->B0 | 3434 3333 | 1 0 | (1 1) (0 0)
7537 22:16:16.949040 1 5 12 | B1->B0 | 3434 2525 | 1 0 | (1 1) (1 0)
7538 22:16:16.952733 1 5 16 | B1->B0 | 3434 2323 | 1 0 | (1 1) (0 0)
7539 22:16:16.955851 1 5 20 | B1->B0 | 2e2e 2323 | 0 0 | (0 1) (0 0)
7540 22:16:16.962846 1 5 24 | B1->B0 | 2424 2323 | 0 0 | (1 0) (0 0)
7541 22:16:16.965177 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7542 22:16:16.968796 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7543 22:16:16.975311 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7544 22:16:16.978528 1 6 8 | B1->B0 | 2323 2c2c | 0 0 | (0 0) (0 0)
7545 22:16:16.981899 1 6 12 | B1->B0 | 2323 4444 | 0 0 | (0 0) (0 0)
7546 22:16:16.988497 1 6 16 | B1->B0 | 2424 4646 | 0 0 | (0 0) (0 0)
7547 22:16:16.991632 1 6 20 | B1->B0 | 3736 4646 | 1 0 | (0 0) (0 0)
7548 22:16:16.995222 1 6 24 | B1->B0 | 4444 4646 | 0 0 | (1 1) (0 0)
7549 22:16:17.001760 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7550 22:16:17.005196 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7551 22:16:17.008275 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7552 22:16:17.014848 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7553 22:16:17.018108 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7554 22:16:17.021921 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
7555 22:16:17.028257 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7556 22:16:17.031239 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7557 22:16:17.035050 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7558 22:16:17.041737 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7559 22:16:17.044216 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7560 22:16:17.047604 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7561 22:16:17.054381 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7562 22:16:17.057491 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7563 22:16:17.061018 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7564 22:16:17.067408 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7565 22:16:17.070650 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7566 22:16:17.074530 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7567 22:16:17.080212 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7568 22:16:17.083790 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7569 22:16:17.086982 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
7570 22:16:17.090798 Total UI for P1: 0, mck2ui 16
7571 22:16:17.093467 best dqsien dly found for B0: ( 1, 9, 8)
7572 22:16:17.100148 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
7573 22:16:17.103708 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7574 22:16:17.107140 1 9 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7575 22:16:17.113580 1 9 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7576 22:16:17.116642 Total UI for P1: 0, mck2ui 16
7577 22:16:17.120505 best dqsien dly found for B1: ( 1, 9, 22)
7578 22:16:17.122871 best DQS0 dly(MCK, UI, PI) = (1, 9, 8)
7579 22:16:17.126541 best DQS1 dly(MCK, UI, PI) = (1, 9, 22)
7580 22:16:17.127114
7581 22:16:17.130612 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 8)
7582 22:16:17.132953 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 22)
7583 22:16:17.136847 [Gating] SW calibration Done
7584 22:16:17.137422 ==
7585 22:16:17.139425 Dram Type= 6, Freq= 0, CH_0, rank 0
7586 22:16:17.142820 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7587 22:16:17.143346 ==
7588 22:16:17.146035 RX Vref Scan: 0
7589 22:16:17.146505
7590 22:16:17.149445 RX Vref 0 -> 0, step: 1
7591 22:16:17.150016
7592 22:16:17.150390 RX Delay 0 -> 252, step: 8
7593 22:16:17.156191 iDelay=192, Bit 0, Center 135 (80 ~ 191) 112
7594 22:16:17.159809 iDelay=192, Bit 1, Center 135 (80 ~ 191) 112
7595 22:16:17.163290 iDelay=192, Bit 2, Center 127 (72 ~ 183) 112
7596 22:16:17.166570 iDelay=192, Bit 3, Center 131 (80 ~ 183) 104
7597 22:16:17.168970 iDelay=192, Bit 4, Center 135 (80 ~ 191) 112
7598 22:16:17.175501 iDelay=192, Bit 5, Center 119 (64 ~ 175) 112
7599 22:16:17.179211 iDelay=192, Bit 6, Center 139 (88 ~ 191) 104
7600 22:16:17.182336 iDelay=192, Bit 7, Center 139 (88 ~ 191) 104
7601 22:16:17.185452 iDelay=192, Bit 8, Center 119 (64 ~ 175) 112
7602 22:16:17.192455 iDelay=192, Bit 9, Center 115 (64 ~ 167) 104
7603 22:16:17.195163 iDelay=192, Bit 10, Center 127 (80 ~ 175) 96
7604 22:16:17.198761 iDelay=192, Bit 11, Center 123 (72 ~ 175) 104
7605 22:16:17.202738 iDelay=192, Bit 12, Center 135 (80 ~ 191) 112
7606 22:16:17.205607 iDelay=192, Bit 13, Center 131 (80 ~ 183) 104
7607 22:16:17.211862 iDelay=192, Bit 14, Center 135 (80 ~ 191) 112
7608 22:16:17.214979 iDelay=192, Bit 15, Center 135 (80 ~ 191) 112
7609 22:16:17.215486 ==
7610 22:16:17.218815 Dram Type= 6, Freq= 0, CH_0, rank 0
7611 22:16:17.221945 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7612 22:16:17.222512 ==
7613 22:16:17.224972 DQS Delay:
7614 22:16:17.225444 DQS0 = 0, DQS1 = 0
7615 22:16:17.228136 DQM Delay:
7616 22:16:17.228717 DQM0 = 132, DQM1 = 127
7617 22:16:17.229098 DQ Delay:
7618 22:16:17.231611 DQ0 =135, DQ1 =135, DQ2 =127, DQ3 =131
7619 22:16:17.238282 DQ4 =135, DQ5 =119, DQ6 =139, DQ7 =139
7620 22:16:17.241942 DQ8 =119, DQ9 =115, DQ10 =127, DQ11 =123
7621 22:16:17.244580 DQ12 =135, DQ13 =131, DQ14 =135, DQ15 =135
7622 22:16:17.245050
7623 22:16:17.245420
7624 22:16:17.245784 ==
7625 22:16:17.248066 Dram Type= 6, Freq= 0, CH_0, rank 0
7626 22:16:17.251414 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7627 22:16:17.251992 ==
7628 22:16:17.252366
7629 22:16:17.252707
7630 22:16:17.254158 TX Vref Scan disable
7631 22:16:17.257934 == TX Byte 0 ==
7632 22:16:17.261142 Update DQ dly =993 (3 ,6, 33) DQ OEN =(3 ,3)
7633 22:16:17.264582 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
7634 22:16:17.267586 == TX Byte 1 ==
7635 22:16:17.270777 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
7636 22:16:17.274155 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
7637 22:16:17.274729 ==
7638 22:16:17.277902 Dram Type= 6, Freq= 0, CH_0, rank 0
7639 22:16:17.283739 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7640 22:16:17.284396 ==
7641 22:16:17.297002
7642 22:16:17.300050 TX Vref early break, caculate TX vref
7643 22:16:17.303849 TX Vref=16, minBit 1, minWin=21, winSum=358
7644 22:16:17.306612 TX Vref=18, minBit 1, minWin=22, winSum=371
7645 22:16:17.310272 TX Vref=20, minBit 1, minWin=21, winSum=379
7646 22:16:17.313333 TX Vref=22, minBit 7, minWin=23, winSum=388
7647 22:16:17.316721 TX Vref=24, minBit 1, minWin=23, winSum=402
7648 22:16:17.323849 TX Vref=26, minBit 1, minWin=24, winSum=406
7649 22:16:17.326782 TX Vref=28, minBit 1, minWin=23, winSum=406
7650 22:16:17.329991 TX Vref=30, minBit 4, minWin=23, winSum=404
7651 22:16:17.332919 TX Vref=32, minBit 2, minWin=23, winSum=392
7652 22:16:17.336387 TX Vref=34, minBit 0, minWin=23, winSum=384
7653 22:16:17.343139 [TxChooseVref] Worse bit 1, Min win 24, Win sum 406, Final Vref 26
7654 22:16:17.343902
7655 22:16:17.346091 Final TX Range 0 Vref 26
7656 22:16:17.346579
7657 22:16:17.346949 ==
7658 22:16:17.349857 Dram Type= 6, Freq= 0, CH_0, rank 0
7659 22:16:17.353152 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7660 22:16:17.353725 ==
7661 22:16:17.354103
7662 22:16:17.354450
7663 22:16:17.356010 TX Vref Scan disable
7664 22:16:17.362898 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps
7665 22:16:17.363507 == TX Byte 0 ==
7666 22:16:17.366087 u2DelayCellOfst[0]=14 cells (4 PI)
7667 22:16:17.369395 u2DelayCellOfst[1]=14 cells (4 PI)
7668 22:16:17.372689 u2DelayCellOfst[2]=10 cells (3 PI)
7669 22:16:17.375795 u2DelayCellOfst[3]=10 cells (3 PI)
7670 22:16:17.379691 u2DelayCellOfst[4]=10 cells (3 PI)
7671 22:16:17.382952 u2DelayCellOfst[5]=0 cells (0 PI)
7672 22:16:17.386164 u2DelayCellOfst[6]=21 cells (6 PI)
7673 22:16:17.389294 u2DelayCellOfst[7]=17 cells (5 PI)
7674 22:16:17.392812 Update DQ dly =990 (3 ,6, 30) DQ OEN =(3 ,3)
7675 22:16:17.395554 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
7676 22:16:17.399371 == TX Byte 1 ==
7677 22:16:17.402503 u2DelayCellOfst[8]=0 cells (0 PI)
7678 22:16:17.405837 u2DelayCellOfst[9]=0 cells (0 PI)
7679 22:16:17.409025 u2DelayCellOfst[10]=3 cells (1 PI)
7680 22:16:17.412111 u2DelayCellOfst[11]=0 cells (0 PI)
7681 22:16:17.415880 u2DelayCellOfst[12]=7 cells (2 PI)
7682 22:16:17.416453 u2DelayCellOfst[13]=7 cells (2 PI)
7683 22:16:17.418849 u2DelayCellOfst[14]=10 cells (3 PI)
7684 22:16:17.422020 u2DelayCellOfst[15]=7 cells (2 PI)
7685 22:16:17.429053 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
7686 22:16:17.431730 Update DQM dly =979 (3 ,6, 19) DQM OEN =(3 ,3)
7687 22:16:17.432201 DramC Write-DBI on
7688 22:16:17.435240 ==
7689 22:16:17.438460 Dram Type= 6, Freq= 0, CH_0, rank 0
7690 22:16:17.441558 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7691 22:16:17.442129 ==
7692 22:16:17.442503
7693 22:16:17.442849
7694 22:16:17.445093 TX Vref Scan disable
7695 22:16:17.445687 == TX Byte 0 ==
7696 22:16:17.451731 Update DQM dly =736 (2 ,6, 32) DQM OEN =(3 ,3)
7697 22:16:17.452300 == TX Byte 1 ==
7698 22:16:17.455096 Update DQM dly =721 (2 ,6, 17) DQM OEN =(3 ,3)
7699 22:16:17.458429 DramC Write-DBI off
7700 22:16:17.459009
7701 22:16:17.459555 [DATLAT]
7702 22:16:17.462353 Freq=1600, CH0 RK0
7703 22:16:17.462930
7704 22:16:17.463361 DATLAT Default: 0xf
7705 22:16:17.464339 0, 0xFFFF, sum = 0
7706 22:16:17.468334 1, 0xFFFF, sum = 0
7707 22:16:17.468907 2, 0xFFFF, sum = 0
7708 22:16:17.470888 3, 0xFFFF, sum = 0
7709 22:16:17.471397 4, 0xFFFF, sum = 0
7710 22:16:17.475096 5, 0xFFFF, sum = 0
7711 22:16:17.475726 6, 0xFFFF, sum = 0
7712 22:16:17.477792 7, 0xFFFF, sum = 0
7713 22:16:17.478365 8, 0xFFFF, sum = 0
7714 22:16:17.481135 9, 0xFFFF, sum = 0
7715 22:16:17.481711 10, 0xFFFF, sum = 0
7716 22:16:17.484177 11, 0xFFFF, sum = 0
7717 22:16:17.484653 12, 0xFFFF, sum = 0
7718 22:16:17.487160 13, 0xFFFF, sum = 0
7719 22:16:17.487683 14, 0x0, sum = 1
7720 22:16:17.491472 15, 0x0, sum = 2
7721 22:16:17.492059 16, 0x0, sum = 3
7722 22:16:17.494177 17, 0x0, sum = 4
7723 22:16:17.494754 best_step = 15
7724 22:16:17.495137
7725 22:16:17.495747 ==
7726 22:16:17.497574 Dram Type= 6, Freq= 0, CH_0, rank 0
7727 22:16:17.503707 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7728 22:16:17.504265 ==
7729 22:16:17.504634 RX Vref Scan: 1
7730 22:16:17.504983
7731 22:16:17.507022 Set Vref Range= 24 -> 127
7732 22:16:17.507534
7733 22:16:17.511279 RX Vref 24 -> 127, step: 1
7734 22:16:17.511864
7735 22:16:17.513655 RX Delay 19 -> 252, step: 4
7736 22:16:17.514119
7737 22:16:17.517360 Set Vref, RX VrefLevel [Byte0]: 24
7738 22:16:17.520489 [Byte1]: 24
7739 22:16:17.520975
7740 22:16:17.523847 Set Vref, RX VrefLevel [Byte0]: 25
7741 22:16:17.527354 [Byte1]: 25
7742 22:16:17.528117
7743 22:16:17.530874 Set Vref, RX VrefLevel [Byte0]: 26
7744 22:16:17.533634 [Byte1]: 26
7745 22:16:17.534206
7746 22:16:17.537740 Set Vref, RX VrefLevel [Byte0]: 27
7747 22:16:17.540293 [Byte1]: 27
7748 22:16:17.544309
7749 22:16:17.544877 Set Vref, RX VrefLevel [Byte0]: 28
7750 22:16:17.547583 [Byte1]: 28
7751 22:16:17.551809
7752 22:16:17.552381 Set Vref, RX VrefLevel [Byte0]: 29
7753 22:16:17.555441 [Byte1]: 29
7754 22:16:17.559922
7755 22:16:17.560491 Set Vref, RX VrefLevel [Byte0]: 30
7756 22:16:17.566574 [Byte1]: 30
7757 22:16:17.567366
7758 22:16:17.569098 Set Vref, RX VrefLevel [Byte0]: 31
7759 22:16:17.572578 [Byte1]: 31
7760 22:16:17.573149
7761 22:16:17.575540 Set Vref, RX VrefLevel [Byte0]: 32
7762 22:16:17.579314 [Byte1]: 32
7763 22:16:17.582600
7764 22:16:17.583071 Set Vref, RX VrefLevel [Byte0]: 33
7765 22:16:17.585867 [Byte1]: 33
7766 22:16:17.590519
7767 22:16:17.591078 Set Vref, RX VrefLevel [Byte0]: 34
7768 22:16:17.593319 [Byte1]: 34
7769 22:16:17.598308
7770 22:16:17.598872 Set Vref, RX VrefLevel [Byte0]: 35
7771 22:16:17.600373 [Byte1]: 35
7772 22:16:17.604736
7773 22:16:17.605294 Set Vref, RX VrefLevel [Byte0]: 36
7774 22:16:17.608498 [Byte1]: 36
7775 22:16:17.612299
7776 22:16:17.612786 Set Vref, RX VrefLevel [Byte0]: 37
7777 22:16:17.615613 [Byte1]: 37
7778 22:16:17.620034
7779 22:16:17.620604 Set Vref, RX VrefLevel [Byte0]: 38
7780 22:16:17.624148 [Byte1]: 38
7781 22:16:17.627349
7782 22:16:17.627905 Set Vref, RX VrefLevel [Byte0]: 39
7783 22:16:17.631080 [Byte1]: 39
7784 22:16:17.635529
7785 22:16:17.636088 Set Vref, RX VrefLevel [Byte0]: 40
7786 22:16:17.638539 [Byte1]: 40
7787 22:16:17.643377
7788 22:16:17.643925 Set Vref, RX VrefLevel [Byte0]: 41
7789 22:16:17.646332 [Byte1]: 41
7790 22:16:17.650939
7791 22:16:17.651555 Set Vref, RX VrefLevel [Byte0]: 42
7792 22:16:17.653595 [Byte1]: 42
7793 22:16:17.657908
7794 22:16:17.658472 Set Vref, RX VrefLevel [Byte0]: 43
7795 22:16:17.661256 [Byte1]: 43
7796 22:16:17.666142
7797 22:16:17.666705 Set Vref, RX VrefLevel [Byte0]: 44
7798 22:16:17.668873 [Byte1]: 44
7799 22:16:17.673086
7800 22:16:17.673666 Set Vref, RX VrefLevel [Byte0]: 45
7801 22:16:17.677085 [Byte1]: 45
7802 22:16:17.680713
7803 22:16:17.681277 Set Vref, RX VrefLevel [Byte0]: 46
7804 22:16:17.684030 [Byte1]: 46
7805 22:16:17.688150
7806 22:16:17.688612 Set Vref, RX VrefLevel [Byte0]: 47
7807 22:16:17.691494 [Byte1]: 47
7808 22:16:17.696294
7809 22:16:17.696858 Set Vref, RX VrefLevel [Byte0]: 48
7810 22:16:17.699261 [Byte1]: 48
7811 22:16:17.703839
7812 22:16:17.704397 Set Vref, RX VrefLevel [Byte0]: 49
7813 22:16:17.706750 [Byte1]: 49
7814 22:16:17.711038
7815 22:16:17.711659 Set Vref, RX VrefLevel [Byte0]: 50
7816 22:16:17.714733 [Byte1]: 50
7817 22:16:17.718497
7818 22:16:17.719242 Set Vref, RX VrefLevel [Byte0]: 51
7819 22:16:17.721945 [Byte1]: 51
7820 22:16:17.725827
7821 22:16:17.726388 Set Vref, RX VrefLevel [Byte0]: 52
7822 22:16:17.729472 [Byte1]: 52
7823 22:16:17.734661
7824 22:16:17.735270 Set Vref, RX VrefLevel [Byte0]: 53
7825 22:16:17.737098 [Byte1]: 53
7826 22:16:17.740866
7827 22:16:17.741350 Set Vref, RX VrefLevel [Byte0]: 54
7828 22:16:17.744533 [Byte1]: 54
7829 22:16:17.748532
7830 22:16:17.748993 Set Vref, RX VrefLevel [Byte0]: 55
7831 22:16:17.752592 [Byte1]: 55
7832 22:16:17.756265
7833 22:16:17.756830 Set Vref, RX VrefLevel [Byte0]: 56
7834 22:16:17.760161 [Byte1]: 56
7835 22:16:17.763884
7836 22:16:17.764440 Set Vref, RX VrefLevel [Byte0]: 57
7837 22:16:17.767348 [Byte1]: 57
7838 22:16:17.771864
7839 22:16:17.772522 Set Vref, RX VrefLevel [Byte0]: 58
7840 22:16:17.774592 [Byte1]: 58
7841 22:16:17.779032
7842 22:16:17.779645 Set Vref, RX VrefLevel [Byte0]: 59
7843 22:16:17.782712 [Byte1]: 59
7844 22:16:17.786581
7845 22:16:17.787141 Set Vref, RX VrefLevel [Byte0]: 60
7846 22:16:17.790065 [Byte1]: 60
7847 22:16:17.794888
7848 22:16:17.795502 Set Vref, RX VrefLevel [Byte0]: 61
7849 22:16:17.797910 [Byte1]: 61
7850 22:16:17.802501
7851 22:16:17.803068 Set Vref, RX VrefLevel [Byte0]: 62
7852 22:16:17.805402 [Byte1]: 62
7853 22:16:17.809141
7854 22:16:17.809602 Set Vref, RX VrefLevel [Byte0]: 63
7855 22:16:17.812699 [Byte1]: 63
7856 22:16:17.817068
7857 22:16:17.817683 Set Vref, RX VrefLevel [Byte0]: 64
7858 22:16:17.820245 [Byte1]: 64
7859 22:16:17.824779
7860 22:16:17.825278 Set Vref, RX VrefLevel [Byte0]: 65
7861 22:16:17.827465 [Byte1]: 65
7862 22:16:17.832061
7863 22:16:17.832632 Set Vref, RX VrefLevel [Byte0]: 66
7864 22:16:17.835400 [Byte1]: 66
7865 22:16:17.839541
7866 22:16:17.840119 Set Vref, RX VrefLevel [Byte0]: 67
7867 22:16:17.843255 [Byte1]: 67
7868 22:16:17.847154
7869 22:16:17.847831 Set Vref, RX VrefLevel [Byte0]: 68
7870 22:16:17.850577 [Byte1]: 68
7871 22:16:17.855245
7872 22:16:17.855842 Set Vref, RX VrefLevel [Byte0]: 69
7873 22:16:17.858489 [Byte1]: 69
7874 22:16:17.862711
7875 22:16:17.863288 Set Vref, RX VrefLevel [Byte0]: 70
7876 22:16:17.865701 [Byte1]: 70
7877 22:16:17.869975
7878 22:16:17.870434 Set Vref, RX VrefLevel [Byte0]: 71
7879 22:16:17.873682 [Byte1]: 71
7880 22:16:17.878124
7881 22:16:17.878684 Set Vref, RX VrefLevel [Byte0]: 72
7882 22:16:17.880529 [Byte1]: 72
7883 22:16:17.885189
7884 22:16:17.885779 Set Vref, RX VrefLevel [Byte0]: 73
7885 22:16:17.888273 [Byte1]: 73
7886 22:16:17.892824
7887 22:16:17.893285 Set Vref, RX VrefLevel [Byte0]: 74
7888 22:16:17.895875 [Byte1]: 74
7889 22:16:17.900136
7890 22:16:17.900697 Set Vref, RX VrefLevel [Byte0]: 75
7891 22:16:17.903554 [Byte1]: 75
7892 22:16:17.907802
7893 22:16:17.908368 Set Vref, RX VrefLevel [Byte0]: 76
7894 22:16:17.910946 [Byte1]: 76
7895 22:16:17.915753
7896 22:16:17.916321 Final RX Vref Byte 0 = 55 to rank0
7897 22:16:17.919223 Final RX Vref Byte 1 = 57 to rank0
7898 22:16:17.922021 Final RX Vref Byte 0 = 55 to rank1
7899 22:16:17.924886 Final RX Vref Byte 1 = 57 to rank1==
7900 22:16:17.928591 Dram Type= 6, Freq= 0, CH_0, rank 0
7901 22:16:17.935396 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7902 22:16:17.935976 ==
7903 22:16:17.936407 DQS Delay:
7904 22:16:17.938835 DQS0 = 0, DQS1 = 0
7905 22:16:17.939434 DQM Delay:
7906 22:16:17.941775 DQM0 = 129, DQM1 = 124
7907 22:16:17.942241 DQ Delay:
7908 22:16:17.945213 DQ0 =130, DQ1 =130, DQ2 =128, DQ3 =126
7909 22:16:17.948155 DQ4 =130, DQ5 =118, DQ6 =138, DQ7 =134
7910 22:16:17.951917 DQ8 =112, DQ9 =112, DQ10 =124, DQ11 =120
7911 22:16:17.955331 DQ12 =132, DQ13 =128, DQ14 =134, DQ15 =130
7912 22:16:17.955890
7913 22:16:17.956257
7914 22:16:17.956598
7915 22:16:17.958023 [DramC_TX_OE_Calibration] TA2
7916 22:16:17.961678 Original DQ_B0 (3 6) =30, OEN = 27
7917 22:16:17.964992 Original DQ_B1 (3 6) =30, OEN = 27
7918 22:16:17.968468 24, 0x0, End_B0=24 End_B1=24
7919 22:16:17.971556 25, 0x0, End_B0=25 End_B1=25
7920 22:16:17.972049 26, 0x0, End_B0=26 End_B1=26
7921 22:16:17.974731 27, 0x0, End_B0=27 End_B1=27
7922 22:16:17.978054 28, 0x0, End_B0=28 End_B1=28
7923 22:16:17.981533 29, 0x0, End_B0=29 End_B1=29
7924 22:16:17.982105 30, 0x0, End_B0=30 End_B1=30
7925 22:16:17.984744 31, 0x4141, End_B0=30 End_B1=30
7926 22:16:17.988435 Byte0 end_step=30 best_step=27
7927 22:16:17.990893 Byte1 end_step=30 best_step=27
7928 22:16:17.995309 Byte0 TX OE(2T, 0.5T) = (3, 3)
7929 22:16:17.998157 Byte1 TX OE(2T, 0.5T) = (3, 3)
7930 22:16:17.998763
7931 22:16:17.999142
7932 22:16:18.004890 [DQSOSCAuto] RK0, (LSB)MR18= 0x1613, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 398 ps
7933 22:16:18.007774 CH0 RK0: MR19=303, MR18=1613
7934 22:16:18.014488 CH0_RK0: MR19=0x303, MR18=0x1613, DQSOSC=398, MR23=63, INC=23, DEC=15
7935 22:16:18.015071
7936 22:16:18.017514 ----->DramcWriteLeveling(PI) begin...
7937 22:16:18.018098 ==
7938 22:16:18.020856 Dram Type= 6, Freq= 0, CH_0, rank 1
7939 22:16:18.023917 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7940 22:16:18.024501 ==
7941 22:16:18.027649 Write leveling (Byte 0): 33 => 33
7942 22:16:18.030889 Write leveling (Byte 1): 29 => 29
7943 22:16:18.034803 DramcWriteLeveling(PI) end<-----
7944 22:16:18.035430
7945 22:16:18.035813 ==
7946 22:16:18.037188 Dram Type= 6, Freq= 0, CH_0, rank 1
7947 22:16:18.043595 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7948 22:16:18.044175 ==
7949 22:16:18.044579 [Gating] SW mode calibration
7950 22:16:18.053612 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7951 22:16:18.056673 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7952 22:16:18.063327 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7953 22:16:18.066416 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7954 22:16:18.069913 1 4 8 | B1->B0 | 2323 2d2d | 0 1 | (0 0) (1 1)
7955 22:16:18.076299 1 4 12 | B1->B0 | 2323 3232 | 0 1 | (0 0) (0 0)
7956 22:16:18.079880 1 4 16 | B1->B0 | 2b2b 3434 | 0 1 | (0 0) (1 1)
7957 22:16:18.083459 1 4 20 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
7958 22:16:18.089674 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7959 22:16:18.092783 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7960 22:16:18.096493 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7961 22:16:18.103535 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
7962 22:16:18.106715 1 5 8 | B1->B0 | 3434 2c2c | 1 1 | (1 1) (1 0)
7963 22:16:18.109546 1 5 12 | B1->B0 | 3434 2828 | 1 0 | (1 1) (0 0)
7964 22:16:18.115925 1 5 16 | B1->B0 | 3434 2323 | 0 0 | (0 1) (0 0)
7965 22:16:18.119556 1 5 20 | B1->B0 | 2929 2323 | 1 0 | (1 0) (0 0)
7966 22:16:18.122860 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7967 22:16:18.129287 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7968 22:16:18.132237 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7969 22:16:18.136115 1 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7970 22:16:18.142797 1 6 8 | B1->B0 | 2323 3939 | 0 0 | (0 0) (0 0)
7971 22:16:18.145375 1 6 12 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
7972 22:16:18.148936 1 6 16 | B1->B0 | 3131 4646 | 1 0 | (0 0) (0 0)
7973 22:16:18.155548 1 6 20 | B1->B0 | 4343 4646 | 0 0 | (0 0) (0 0)
7974 22:16:18.158460 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7975 22:16:18.162359 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7976 22:16:18.168501 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7977 22:16:18.171664 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7978 22:16:18.175040 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7979 22:16:18.182131 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
7980 22:16:18.184910 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
7981 22:16:18.188019 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7982 22:16:18.194895 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7983 22:16:18.198182 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7984 22:16:18.201383 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7985 22:16:18.208355 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7986 22:16:18.211517 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7987 22:16:18.214719 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7988 22:16:18.221772 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7989 22:16:18.224727 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7990 22:16:18.227961 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7991 22:16:18.234188 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7992 22:16:18.238108 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7993 22:16:18.241480 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7994 22:16:18.247863 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7995 22:16:18.250783 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
7996 22:16:18.254998 Total UI for P1: 0, mck2ui 16
7997 22:16:18.257487 best dqsien dly found for B0: ( 1, 9, 8)
7998 22:16:18.260770 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7999 22:16:18.267268 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8000 22:16:18.267828 Total UI for P1: 0, mck2ui 16
8001 22:16:18.273788 best dqsien dly found for B1: ( 1, 9, 16)
8002 22:16:18.277284 best DQS0 dly(MCK, UI, PI) = (1, 9, 8)
8003 22:16:18.280599 best DQS1 dly(MCK, UI, PI) = (1, 9, 16)
8004 22:16:18.281164
8005 22:16:18.283607 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 8)
8006 22:16:18.287151 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 16)
8007 22:16:18.290171 [Gating] SW calibration Done
8008 22:16:18.290636 ==
8009 22:16:18.293650 Dram Type= 6, Freq= 0, CH_0, rank 1
8010 22:16:18.297323 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8011 22:16:18.297897 ==
8012 22:16:18.300148 RX Vref Scan: 0
8013 22:16:18.300611
8014 22:16:18.300976 RX Vref 0 -> 0, step: 1
8015 22:16:18.301321
8016 22:16:18.303857 RX Delay 0 -> 252, step: 8
8017 22:16:18.307103 iDelay=200, Bit 0, Center 131 (80 ~ 183) 104
8018 22:16:18.313530 iDelay=200, Bit 1, Center 135 (80 ~ 191) 112
8019 22:16:18.316589 iDelay=200, Bit 2, Center 127 (72 ~ 183) 112
8020 22:16:18.320029 iDelay=200, Bit 3, Center 127 (72 ~ 183) 112
8021 22:16:18.324099 iDelay=200, Bit 4, Center 135 (80 ~ 191) 112
8022 22:16:18.326752 iDelay=200, Bit 5, Center 119 (64 ~ 175) 112
8023 22:16:18.333504 iDelay=200, Bit 6, Center 143 (88 ~ 199) 112
8024 22:16:18.337047 iDelay=200, Bit 7, Center 143 (88 ~ 199) 112
8025 22:16:18.340423 iDelay=200, Bit 8, Center 115 (56 ~ 175) 120
8026 22:16:18.342998 iDelay=200, Bit 9, Center 111 (56 ~ 167) 112
8027 22:16:18.349794 iDelay=200, Bit 10, Center 123 (64 ~ 183) 120
8028 22:16:18.353193 iDelay=200, Bit 11, Center 115 (56 ~ 175) 120
8029 22:16:18.356476 iDelay=200, Bit 12, Center 127 (72 ~ 183) 112
8030 22:16:18.359985 iDelay=200, Bit 13, Center 131 (72 ~ 191) 120
8031 22:16:18.363116 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
8032 22:16:18.369254 iDelay=200, Bit 15, Center 131 (72 ~ 191) 120
8033 22:16:18.369805 ==
8034 22:16:18.372496 Dram Type= 6, Freq= 0, CH_0, rank 1
8035 22:16:18.376175 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8036 22:16:18.376643 ==
8037 22:16:18.377009 DQS Delay:
8038 22:16:18.379835 DQS0 = 0, DQS1 = 0
8039 22:16:18.380396 DQM Delay:
8040 22:16:18.382833 DQM0 = 132, DQM1 = 123
8041 22:16:18.383339 DQ Delay:
8042 22:16:18.386084 DQ0 =131, DQ1 =135, DQ2 =127, DQ3 =127
8043 22:16:18.388773 DQ4 =135, DQ5 =119, DQ6 =143, DQ7 =143
8044 22:16:18.392271 DQ8 =115, DQ9 =111, DQ10 =123, DQ11 =115
8045 22:16:18.399309 DQ12 =127, DQ13 =131, DQ14 =135, DQ15 =131
8046 22:16:18.399872
8047 22:16:18.400243
8048 22:16:18.400580 ==
8049 22:16:18.402262 Dram Type= 6, Freq= 0, CH_0, rank 1
8050 22:16:18.405751 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8051 22:16:18.406313 ==
8052 22:16:18.406680
8053 22:16:18.407020
8054 22:16:18.408828 TX Vref Scan disable
8055 22:16:18.409382 == TX Byte 0 ==
8056 22:16:18.415246 Update DQ dly =989 (3 ,6, 29) DQ OEN =(3 ,3)
8057 22:16:18.419042 Update DQM dly =989 (3 ,6, 29) DQM OEN =(3 ,3)
8058 22:16:18.419737 == TX Byte 1 ==
8059 22:16:18.425746 Update DQ dly =985 (3 ,6, 25) DQ OEN =(3 ,3)
8060 22:16:18.428436 Update DQM dly =985 (3 ,6, 25) DQM OEN =(3 ,3)
8061 22:16:18.428906 ==
8062 22:16:18.432191 Dram Type= 6, Freq= 0, CH_0, rank 1
8063 22:16:18.435225 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8064 22:16:18.435694 ==
8065 22:16:18.450146
8066 22:16:18.452881 TX Vref early break, caculate TX vref
8067 22:16:18.456399 TX Vref=16, minBit 9, minWin=22, winSum=378
8068 22:16:18.459168 TX Vref=18, minBit 1, minWin=23, winSum=383
8069 22:16:18.463065 TX Vref=20, minBit 9, minWin=23, winSum=390
8070 22:16:18.466281 TX Vref=22, minBit 3, minWin=24, winSum=401
8071 22:16:18.469497 TX Vref=24, minBit 1, minWin=24, winSum=408
8072 22:16:18.475862 TX Vref=26, minBit 1, minWin=25, winSum=416
8073 22:16:18.479793 TX Vref=28, minBit 3, minWin=24, winSum=416
8074 22:16:18.482214 TX Vref=30, minBit 4, minWin=24, winSum=411
8075 22:16:18.486036 TX Vref=32, minBit 2, minWin=24, winSum=406
8076 22:16:18.489152 TX Vref=34, minBit 1, minWin=23, winSum=394
8077 22:16:18.495548 [TxChooseVref] Worse bit 1, Min win 25, Win sum 416, Final Vref 26
8078 22:16:18.496018
8079 22:16:18.498983 Final TX Range 0 Vref 26
8080 22:16:18.499512
8081 22:16:18.499888 ==
8082 22:16:18.502115 Dram Type= 6, Freq= 0, CH_0, rank 1
8083 22:16:18.505716 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8084 22:16:18.506285 ==
8085 22:16:18.506654
8086 22:16:18.506993
8087 22:16:18.508809 TX Vref Scan disable
8088 22:16:18.515408 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps
8089 22:16:18.515875 == TX Byte 0 ==
8090 22:16:18.519057 u2DelayCellOfst[0]=10 cells (3 PI)
8091 22:16:18.522335 u2DelayCellOfst[1]=17 cells (5 PI)
8092 22:16:18.525833 u2DelayCellOfst[2]=10 cells (3 PI)
8093 22:16:18.528685 u2DelayCellOfst[3]=10 cells (3 PI)
8094 22:16:18.531796 u2DelayCellOfst[4]=10 cells (3 PI)
8095 22:16:18.535232 u2DelayCellOfst[5]=0 cells (0 PI)
8096 22:16:18.538574 u2DelayCellOfst[6]=17 cells (5 PI)
8097 22:16:18.541912 u2DelayCellOfst[7]=17 cells (5 PI)
8098 22:16:18.545361 Update DQ dly =987 (3 ,6, 27) DQ OEN =(3 ,3)
8099 22:16:18.548177 Update DQM dly =989 (3 ,6, 29) DQM OEN =(3 ,3)
8100 22:16:18.551937 == TX Byte 1 ==
8101 22:16:18.555045 u2DelayCellOfst[8]=0 cells (0 PI)
8102 22:16:18.558390 u2DelayCellOfst[9]=0 cells (0 PI)
8103 22:16:18.561659 u2DelayCellOfst[10]=3 cells (1 PI)
8104 22:16:18.562416 u2DelayCellOfst[11]=3 cells (1 PI)
8105 22:16:18.564485 u2DelayCellOfst[12]=10 cells (3 PI)
8106 22:16:18.568732 u2DelayCellOfst[13]=10 cells (3 PI)
8107 22:16:18.572001 u2DelayCellOfst[14]=17 cells (5 PI)
8108 22:16:18.574261 u2DelayCellOfst[15]=10 cells (3 PI)
8109 22:16:18.581217 Update DQ dly =983 (3 ,6, 23) DQ OEN =(3 ,3)
8110 22:16:18.584720 Update DQM dly =985 (3 ,6, 25) DQM OEN =(3 ,3)
8111 22:16:18.585289 DramC Write-DBI on
8112 22:16:18.587995 ==
8113 22:16:18.588494 Dram Type= 6, Freq= 0, CH_0, rank 1
8114 22:16:18.594716 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8115 22:16:18.595337 ==
8116 22:16:18.595718
8117 22:16:18.596091
8118 22:16:18.597896 TX Vref Scan disable
8119 22:16:18.598410 == TX Byte 0 ==
8120 22:16:18.604355 Update DQM dly =733 (2 ,6, 29) DQM OEN =(3 ,3)
8121 22:16:18.604847 == TX Byte 1 ==
8122 22:16:18.607684 Update DQM dly =726 (2 ,6, 22) DQM OEN =(3 ,3)
8123 22:16:18.611149 DramC Write-DBI off
8124 22:16:18.611751
8125 22:16:18.612129 [DATLAT]
8126 22:16:18.614461 Freq=1600, CH0 RK1
8127 22:16:18.615032
8128 22:16:18.615462 DATLAT Default: 0xf
8129 22:16:18.617768 0, 0xFFFF, sum = 0
8130 22:16:18.618348 1, 0xFFFF, sum = 0
8131 22:16:18.621295 2, 0xFFFF, sum = 0
8132 22:16:18.621875 3, 0xFFFF, sum = 0
8133 22:16:18.624077 4, 0xFFFF, sum = 0
8134 22:16:18.624558 5, 0xFFFF, sum = 0
8135 22:16:18.628054 6, 0xFFFF, sum = 0
8136 22:16:18.628632 7, 0xFFFF, sum = 0
8137 22:16:18.631147 8, 0xFFFF, sum = 0
8138 22:16:18.634183 9, 0xFFFF, sum = 0
8139 22:16:18.634665 10, 0xFFFF, sum = 0
8140 22:16:18.637949 11, 0xFFFF, sum = 0
8141 22:16:18.638532 12, 0xFFFF, sum = 0
8142 22:16:18.640861 13, 0xFFFF, sum = 0
8143 22:16:18.641440 14, 0x0, sum = 1
8144 22:16:18.643864 15, 0x0, sum = 2
8145 22:16:18.644339 16, 0x0, sum = 3
8146 22:16:18.647278 17, 0x0, sum = 4
8147 22:16:18.647849 best_step = 15
8148 22:16:18.648219
8149 22:16:18.648616 ==
8150 22:16:18.651209 Dram Type= 6, Freq= 0, CH_0, rank 1
8151 22:16:18.654472 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8152 22:16:18.657493 ==
8153 22:16:18.658068 RX Vref Scan: 0
8154 22:16:18.658442
8155 22:16:18.660319 RX Vref 0 -> 0, step: 1
8156 22:16:18.660784
8157 22:16:18.663702 RX Delay 11 -> 252, step: 4
8158 22:16:18.667046 iDelay=191, Bit 0, Center 126 (75 ~ 178) 104
8159 22:16:18.670389 iDelay=191, Bit 1, Center 132 (79 ~ 186) 108
8160 22:16:18.673267 iDelay=191, Bit 2, Center 124 (71 ~ 178) 108
8161 22:16:18.679784 iDelay=191, Bit 3, Center 126 (75 ~ 178) 104
8162 22:16:18.683825 iDelay=191, Bit 4, Center 132 (83 ~ 182) 100
8163 22:16:18.686476 iDelay=191, Bit 5, Center 118 (63 ~ 174) 112
8164 22:16:18.689780 iDelay=191, Bit 6, Center 138 (87 ~ 190) 104
8165 22:16:18.693038 iDelay=191, Bit 7, Center 134 (83 ~ 186) 104
8166 22:16:18.700371 iDelay=191, Bit 8, Center 114 (63 ~ 166) 104
8167 22:16:18.703124 iDelay=191, Bit 9, Center 110 (59 ~ 162) 104
8168 22:16:18.706244 iDelay=191, Bit 10, Center 126 (75 ~ 178) 104
8169 22:16:18.709617 iDelay=191, Bit 11, Center 120 (71 ~ 170) 100
8170 22:16:18.716475 iDelay=191, Bit 12, Center 128 (75 ~ 182) 108
8171 22:16:18.719290 iDelay=191, Bit 13, Center 130 (79 ~ 182) 104
8172 22:16:18.723060 iDelay=191, Bit 14, Center 136 (83 ~ 190) 108
8173 22:16:18.726227 iDelay=191, Bit 15, Center 132 (79 ~ 186) 108
8174 22:16:18.726802 ==
8175 22:16:18.729755 Dram Type= 6, Freq= 0, CH_0, rank 1
8176 22:16:18.736121 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8177 22:16:18.736696 ==
8178 22:16:18.737067 DQS Delay:
8179 22:16:18.737412 DQS0 = 0, DQS1 = 0
8180 22:16:18.739685 DQM Delay:
8181 22:16:18.740265 DQM0 = 128, DQM1 = 124
8182 22:16:18.742978 DQ Delay:
8183 22:16:18.746042 DQ0 =126, DQ1 =132, DQ2 =124, DQ3 =126
8184 22:16:18.749092 DQ4 =132, DQ5 =118, DQ6 =138, DQ7 =134
8185 22:16:18.753008 DQ8 =114, DQ9 =110, DQ10 =126, DQ11 =120
8186 22:16:18.755891 DQ12 =128, DQ13 =130, DQ14 =136, DQ15 =132
8187 22:16:18.756462
8188 22:16:18.756831
8189 22:16:18.757168
8190 22:16:18.758954 [DramC_TX_OE_Calibration] TA2
8191 22:16:18.762442 Original DQ_B0 (3 6) =30, OEN = 27
8192 22:16:18.765637 Original DQ_B1 (3 6) =30, OEN = 27
8193 22:16:18.769378 24, 0x0, End_B0=24 End_B1=24
8194 22:16:18.769954 25, 0x0, End_B0=25 End_B1=25
8195 22:16:18.772075 26, 0x0, End_B0=26 End_B1=26
8196 22:16:18.775358 27, 0x0, End_B0=27 End_B1=27
8197 22:16:18.778770 28, 0x0, End_B0=28 End_B1=28
8198 22:16:18.782098 29, 0x0, End_B0=29 End_B1=29
8199 22:16:18.782678 30, 0x0, End_B0=30 End_B1=30
8200 22:16:18.785604 31, 0x4141, End_B0=30 End_B1=30
8201 22:16:18.788533 Byte0 end_step=30 best_step=27
8202 22:16:18.791348 Byte1 end_step=30 best_step=27
8203 22:16:18.794894 Byte0 TX OE(2T, 0.5T) = (3, 3)
8204 22:16:18.798249 Byte1 TX OE(2T, 0.5T) = (3, 3)
8205 22:16:18.798819
8206 22:16:18.799237
8207 22:16:18.804792 [DQSOSCAuto] RK1, (LSB)MR18= 0x1311, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 400 ps
8208 22:16:18.807743 CH0 RK1: MR19=303, MR18=1311
8209 22:16:18.814509 CH0_RK1: MR19=0x303, MR18=0x1311, DQSOSC=400, MR23=63, INC=23, DEC=15
8210 22:16:18.817911 [RxdqsGatingPostProcess] freq 1600
8211 22:16:18.825065 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8212 22:16:18.825602 best DQS0 dly(2T, 0.5T) = (1, 1)
8213 22:16:18.828026 best DQS1 dly(2T, 0.5T) = (1, 1)
8214 22:16:18.831327 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8215 22:16:18.834892 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8216 22:16:18.837866 best DQS0 dly(2T, 0.5T) = (1, 1)
8217 22:16:18.841643 best DQS1 dly(2T, 0.5T) = (1, 1)
8218 22:16:18.844624 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8219 22:16:18.847789 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8220 22:16:18.850779 Pre-setting of DQS Precalculation
8221 22:16:18.854120 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
8222 22:16:18.857943 ==
8223 22:16:18.858367 Dram Type= 6, Freq= 0, CH_1, rank 0
8224 22:16:18.864504 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8225 22:16:18.865038 ==
8226 22:16:18.867574 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8227 22:16:18.874274 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8228 22:16:18.877523 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8229 22:16:18.883733 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8230 22:16:18.892395 [CA 0] Center 41 (11~72) winsize 62
8231 22:16:18.895014 [CA 1] Center 42 (13~72) winsize 60
8232 22:16:18.898758 [CA 2] Center 38 (9~67) winsize 59
8233 22:16:18.902104 [CA 3] Center 37 (8~66) winsize 59
8234 22:16:18.905233 [CA 4] Center 38 (8~68) winsize 61
8235 22:16:18.909009 [CA 5] Center 36 (6~66) winsize 61
8236 22:16:18.909431
8237 22:16:18.911617 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8238 22:16:18.912040
8239 22:16:18.915084 [CATrainingPosCal] consider 1 rank data
8240 22:16:18.918874 u2DelayCellTimex100 = 275/100 ps
8241 22:16:18.925425 CA0 delay=41 (11~72),Diff = 5 PI (17 cell)
8242 22:16:18.928105 CA1 delay=42 (13~72),Diff = 6 PI (21 cell)
8243 22:16:18.932067 CA2 delay=38 (9~67),Diff = 2 PI (7 cell)
8244 22:16:18.935446 CA3 delay=37 (8~66),Diff = 1 PI (3 cell)
8245 22:16:18.938370 CA4 delay=38 (8~68),Diff = 2 PI (7 cell)
8246 22:16:18.941691 CA5 delay=36 (6~66),Diff = 0 PI (0 cell)
8247 22:16:18.942223
8248 22:16:18.944960 CA PerBit enable=1, Macro0, CA PI delay=36
8249 22:16:18.945492
8250 22:16:18.948783 [CBTSetCACLKResult] CA Dly = 36
8251 22:16:18.951879 CS Dly: 8 (0~39)
8252 22:16:18.955329 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8253 22:16:18.958412 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8254 22:16:18.958940 ==
8255 22:16:18.961228 Dram Type= 6, Freq= 0, CH_1, rank 1
8256 22:16:18.968025 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8257 22:16:18.968558 ==
8258 22:16:18.971511 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8259 22:16:18.978034 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8260 22:16:18.981305 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8261 22:16:18.987971 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8262 22:16:18.995283 [CA 0] Center 42 (12~72) winsize 61
8263 22:16:18.998896 [CA 1] Center 43 (14~72) winsize 59
8264 22:16:19.001360 [CA 2] Center 38 (9~68) winsize 60
8265 22:16:19.005377 [CA 3] Center 37 (8~66) winsize 59
8266 22:16:19.008175 [CA 4] Center 37 (8~67) winsize 60
8267 22:16:19.011702 [CA 5] Center 37 (8~67) winsize 60
8268 22:16:19.012232
8269 22:16:19.014958 [CmdBusTrainingLP45] Vref(ca) range 0: 30
8270 22:16:19.015411
8271 22:16:19.021572 [CATrainingPosCal] consider 2 rank data
8272 22:16:19.022112 u2DelayCellTimex100 = 275/100 ps
8273 22:16:19.028225 CA0 delay=42 (12~72),Diff = 5 PI (17 cell)
8274 22:16:19.031605 CA1 delay=43 (14~72),Diff = 6 PI (21 cell)
8275 22:16:19.034580 CA2 delay=38 (9~67),Diff = 1 PI (3 cell)
8276 22:16:19.038039 CA3 delay=37 (8~66),Diff = 0 PI (0 cell)
8277 22:16:19.041122 CA4 delay=37 (8~67),Diff = 0 PI (0 cell)
8278 22:16:19.044682 CA5 delay=37 (8~66),Diff = 0 PI (0 cell)
8279 22:16:19.045216
8280 22:16:19.047565 CA PerBit enable=1, Macro0, CA PI delay=37
8281 22:16:19.048099
8282 22:16:19.051536 [CBTSetCACLKResult] CA Dly = 37
8283 22:16:19.054498 CS Dly: 9 (0~42)
8284 22:16:19.057464 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8285 22:16:19.060693 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8286 22:16:19.061142
8287 22:16:19.064237 ----->DramcWriteLeveling(PI) begin...
8288 22:16:19.064768 ==
8289 22:16:19.067753 Dram Type= 6, Freq= 0, CH_1, rank 0
8290 22:16:19.075064 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8291 22:16:19.075700 ==
8292 22:16:19.077128 Write leveling (Byte 0): 24 => 24
8293 22:16:19.080422 Write leveling (Byte 1): 26 => 26
8294 22:16:19.083747 DramcWriteLeveling(PI) end<-----
8295 22:16:19.084162
8296 22:16:19.084482 ==
8297 22:16:19.086968 Dram Type= 6, Freq= 0, CH_1, rank 0
8298 22:16:19.090321 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8299 22:16:19.090735 ==
8300 22:16:19.093982 [Gating] SW mode calibration
8301 22:16:19.100563 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8302 22:16:19.106862 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8303 22:16:19.110311 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8304 22:16:19.113692 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8305 22:16:19.119820 1 4 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8306 22:16:19.123242 1 4 12 | B1->B0 | 2727 3434 | 0 0 | (0 0) (0 0)
8307 22:16:19.126771 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8308 22:16:19.134293 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8309 22:16:19.136381 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8310 22:16:19.139947 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8311 22:16:19.146436 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8312 22:16:19.149618 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8313 22:16:19.152916 1 5 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8314 22:16:19.160207 1 5 12 | B1->B0 | 3232 2828 | 1 0 | (1 0) (1 0)
8315 22:16:19.163688 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
8316 22:16:19.166861 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8317 22:16:19.172781 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8318 22:16:19.176361 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8319 22:16:19.179241 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8320 22:16:19.185838 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8321 22:16:19.189241 1 6 8 | B1->B0 | 2323 2626 | 0 1 | (0 0) (0 0)
8322 22:16:19.192683 1 6 12 | B1->B0 | 2c2c 4545 | 1 1 | (0 0) (0 0)
8323 22:16:19.199305 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8324 22:16:19.202504 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8325 22:16:19.205470 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8326 22:16:19.212963 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8327 22:16:19.215738 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8328 22:16:19.218510 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8329 22:16:19.225303 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8330 22:16:19.228974 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8331 22:16:19.231641 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8332 22:16:19.238216 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8333 22:16:19.242079 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8334 22:16:19.245106 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8335 22:16:19.251797 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8336 22:16:19.255161 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8337 22:16:19.258868 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8338 22:16:19.265045 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8339 22:16:19.268752 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8340 22:16:19.272364 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8341 22:16:19.278649 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8342 22:16:19.281260 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8343 22:16:19.284825 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8344 22:16:19.291124 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8345 22:16:19.294464 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8346 22:16:19.298407 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8347 22:16:19.304431 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8348 22:16:19.304994 Total UI for P1: 0, mck2ui 16
8349 22:16:19.311103 best dqsien dly found for B0: ( 1, 9, 12)
8350 22:16:19.314382 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8351 22:16:19.318216 Total UI for P1: 0, mck2ui 16
8352 22:16:19.320830 best dqsien dly found for B1: ( 1, 9, 14)
8353 22:16:19.324692 best DQS0 dly(MCK, UI, PI) = (1, 9, 12)
8354 22:16:19.327887 best DQS1 dly(MCK, UI, PI) = (1, 9, 14)
8355 22:16:19.328316
8356 22:16:19.330756 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 12)
8357 22:16:19.334457 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 14)
8358 22:16:19.337371 [Gating] SW calibration Done
8359 22:16:19.337802 ==
8360 22:16:19.341245 Dram Type= 6, Freq= 0, CH_1, rank 0
8361 22:16:19.344703 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8362 22:16:19.347448 ==
8363 22:16:19.347973 RX Vref Scan: 0
8364 22:16:19.348314
8365 22:16:19.350387 RX Vref 0 -> 0, step: 1
8366 22:16:19.350879
8367 22:16:19.353837 RX Delay 0 -> 252, step: 8
8368 22:16:19.357087 iDelay=200, Bit 0, Center 139 (88 ~ 191) 104
8369 22:16:19.360631 iDelay=200, Bit 1, Center 131 (80 ~ 183) 104
8370 22:16:19.363464 iDelay=200, Bit 2, Center 123 (64 ~ 183) 120
8371 22:16:19.367225 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
8372 22:16:19.374249 iDelay=200, Bit 4, Center 131 (80 ~ 183) 104
8373 22:16:19.376593 iDelay=200, Bit 5, Center 143 (88 ~ 199) 112
8374 22:16:19.379897 iDelay=200, Bit 6, Center 147 (96 ~ 199) 104
8375 22:16:19.383655 iDelay=200, Bit 7, Center 127 (72 ~ 183) 112
8376 22:16:19.387016 iDelay=200, Bit 8, Center 111 (56 ~ 167) 112
8377 22:16:19.393780 iDelay=200, Bit 9, Center 119 (64 ~ 175) 112
8378 22:16:19.396753 iDelay=200, Bit 10, Center 131 (80 ~ 183) 104
8379 22:16:19.400166 iDelay=200, Bit 11, Center 123 (64 ~ 183) 120
8380 22:16:19.404049 iDelay=200, Bit 12, Center 139 (88 ~ 191) 104
8381 22:16:19.409842 iDelay=200, Bit 13, Center 139 (80 ~ 199) 120
8382 22:16:19.413180 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
8383 22:16:19.416257 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8384 22:16:19.416684 ==
8385 22:16:19.419716 Dram Type= 6, Freq= 0, CH_1, rank 0
8386 22:16:19.423834 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8387 22:16:19.424393 ==
8388 22:16:19.426059 DQS Delay:
8389 22:16:19.426482 DQS0 = 0, DQS1 = 0
8390 22:16:19.430094 DQM Delay:
8391 22:16:19.430624 DQM0 = 134, DQM1 = 129
8392 22:16:19.433248 DQ Delay:
8393 22:16:19.435905 DQ0 =139, DQ1 =131, DQ2 =123, DQ3 =135
8394 22:16:19.439506 DQ4 =131, DQ5 =143, DQ6 =147, DQ7 =127
8395 22:16:19.442818 DQ8 =111, DQ9 =119, DQ10 =131, DQ11 =123
8396 22:16:19.445655 DQ12 =139, DQ13 =139, DQ14 =135, DQ15 =135
8397 22:16:19.446080
8398 22:16:19.446414
8399 22:16:19.446729 ==
8400 22:16:19.449011 Dram Type= 6, Freq= 0, CH_1, rank 0
8401 22:16:19.452288 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8402 22:16:19.452715 ==
8403 22:16:19.456021
8404 22:16:19.456550
8405 22:16:19.456889 TX Vref Scan disable
8406 22:16:19.459297 == TX Byte 0 ==
8407 22:16:19.462268 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8408 22:16:19.465650 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8409 22:16:19.469812 == TX Byte 1 ==
8410 22:16:19.472578 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
8411 22:16:19.475678 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8412 22:16:19.478931 ==
8413 22:16:19.479496 Dram Type= 6, Freq= 0, CH_1, rank 0
8414 22:16:19.485195 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8415 22:16:19.485736 ==
8416 22:16:19.498167
8417 22:16:19.501764 TX Vref early break, caculate TX vref
8418 22:16:19.505145 TX Vref=16, minBit 9, minWin=21, winSum=369
8419 22:16:19.508528 TX Vref=18, minBit 8, minWin=22, winSum=377
8420 22:16:19.512018 TX Vref=20, minBit 8, minWin=23, winSum=386
8421 22:16:19.514545 TX Vref=22, minBit 8, minWin=23, winSum=391
8422 22:16:19.518146 TX Vref=24, minBit 8, minWin=24, winSum=406
8423 22:16:19.524388 TX Vref=26, minBit 8, minWin=25, winSum=415
8424 22:16:19.527782 TX Vref=28, minBit 0, minWin=25, winSum=413
8425 22:16:19.531367 TX Vref=30, minBit 0, minWin=25, winSum=414
8426 22:16:19.534796 TX Vref=32, minBit 9, minWin=24, winSum=408
8427 22:16:19.537831 TX Vref=34, minBit 0, minWin=23, winSum=395
8428 22:16:19.544352 TX Vref=36, minBit 11, minWin=22, winSum=384
8429 22:16:19.547823 [TxChooseVref] Worse bit 8, Min win 25, Win sum 415, Final Vref 26
8430 22:16:19.548366
8431 22:16:19.551482 Final TX Range 0 Vref 26
8432 22:16:19.551907
8433 22:16:19.552238 ==
8434 22:16:19.554576 Dram Type= 6, Freq= 0, CH_1, rank 0
8435 22:16:19.557213 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8436 22:16:19.560999 ==
8437 22:16:19.561533
8438 22:16:19.561891
8439 22:16:19.562285 TX Vref Scan disable
8440 22:16:19.567748 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps
8441 22:16:19.568281 == TX Byte 0 ==
8442 22:16:19.570993 u2DelayCellOfst[0]=14 cells (4 PI)
8443 22:16:19.574353 u2DelayCellOfst[1]=10 cells (3 PI)
8444 22:16:19.577303 u2DelayCellOfst[2]=0 cells (0 PI)
8445 22:16:19.580811 u2DelayCellOfst[3]=7 cells (2 PI)
8446 22:16:19.584613 u2DelayCellOfst[4]=10 cells (3 PI)
8447 22:16:19.587351 u2DelayCellOfst[5]=14 cells (4 PI)
8448 22:16:19.590534 u2DelayCellOfst[6]=17 cells (5 PI)
8449 22:16:19.593690 u2DelayCellOfst[7]=7 cells (2 PI)
8450 22:16:19.596986 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
8451 22:16:19.600768 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8452 22:16:19.603516 == TX Byte 1 ==
8453 22:16:19.607026 u2DelayCellOfst[8]=0 cells (0 PI)
8454 22:16:19.610360 u2DelayCellOfst[9]=3 cells (1 PI)
8455 22:16:19.613908 u2DelayCellOfst[10]=14 cells (4 PI)
8456 22:16:19.616673 u2DelayCellOfst[11]=3 cells (1 PI)
8457 22:16:19.619713 u2DelayCellOfst[12]=14 cells (4 PI)
8458 22:16:19.623694 u2DelayCellOfst[13]=14 cells (4 PI)
8459 22:16:19.626782 u2DelayCellOfst[14]=17 cells (5 PI)
8460 22:16:19.629645 u2DelayCellOfst[15]=17 cells (5 PI)
8461 22:16:19.633229 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8462 22:16:19.637542 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8463 22:16:19.640104 DramC Write-DBI on
8464 22:16:19.640526 ==
8465 22:16:19.643332 Dram Type= 6, Freq= 0, CH_1, rank 0
8466 22:16:19.646871 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8467 22:16:19.647458 ==
8468 22:16:19.647808
8469 22:16:19.648121
8470 22:16:19.649593 TX Vref Scan disable
8471 22:16:19.650013 == TX Byte 0 ==
8472 22:16:19.656311 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
8473 22:16:19.656840 == TX Byte 1 ==
8474 22:16:19.662962 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
8475 22:16:19.663504 DramC Write-DBI off
8476 22:16:19.663848
8477 22:16:19.664161 [DATLAT]
8478 22:16:19.666216 Freq=1600, CH1 RK0
8479 22:16:19.666745
8480 22:16:19.669341 DATLAT Default: 0xf
8481 22:16:19.669790 0, 0xFFFF, sum = 0
8482 22:16:19.673122 1, 0xFFFF, sum = 0
8483 22:16:19.673662 2, 0xFFFF, sum = 0
8484 22:16:19.676143 3, 0xFFFF, sum = 0
8485 22:16:19.676683 4, 0xFFFF, sum = 0
8486 22:16:19.679846 5, 0xFFFF, sum = 0
8487 22:16:19.680274 6, 0xFFFF, sum = 0
8488 22:16:19.683047 7, 0xFFFF, sum = 0
8489 22:16:19.683608 8, 0xFFFF, sum = 0
8490 22:16:19.686124 9, 0xFFFF, sum = 0
8491 22:16:19.686656 10, 0xFFFF, sum = 0
8492 22:16:19.689139 11, 0xFFFF, sum = 0
8493 22:16:19.689573 12, 0xFFFF, sum = 0
8494 22:16:19.692511 13, 0xFFFF, sum = 0
8495 22:16:19.692942 14, 0x0, sum = 1
8496 22:16:19.695781 15, 0x0, sum = 2
8497 22:16:19.696213 16, 0x0, sum = 3
8498 22:16:19.699236 17, 0x0, sum = 4
8499 22:16:19.699667 best_step = 15
8500 22:16:19.700004
8501 22:16:19.700320 ==
8502 22:16:19.702076 Dram Type= 6, Freq= 0, CH_1, rank 0
8503 22:16:19.708891 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8504 22:16:19.709317 ==
8505 22:16:19.709651 RX Vref Scan: 1
8506 22:16:19.709966
8507 22:16:19.712095 Set Vref Range= 24 -> 127
8508 22:16:19.712526
8509 22:16:19.715357 RX Vref 24 -> 127, step: 1
8510 22:16:19.715782
8511 22:16:19.719230 RX Delay 11 -> 252, step: 4
8512 22:16:19.719767
8513 22:16:19.722543 Set Vref, RX VrefLevel [Byte0]: 24
8514 22:16:19.725797 [Byte1]: 24
8515 22:16:19.726329
8516 22:16:19.728644 Set Vref, RX VrefLevel [Byte0]: 25
8517 22:16:19.731809 [Byte1]: 25
8518 22:16:19.732334
8519 22:16:19.734931 Set Vref, RX VrefLevel [Byte0]: 26
8520 22:16:19.738334 [Byte1]: 26
8521 22:16:19.741990
8522 22:16:19.742519 Set Vref, RX VrefLevel [Byte0]: 27
8523 22:16:19.745350 [Byte1]: 27
8524 22:16:19.749483
8525 22:16:19.750016 Set Vref, RX VrefLevel [Byte0]: 28
8526 22:16:19.753024 [Byte1]: 28
8527 22:16:19.757911
8528 22:16:19.758435 Set Vref, RX VrefLevel [Byte0]: 29
8529 22:16:19.760485 [Byte1]: 29
8530 22:16:19.764398
8531 22:16:19.767809 Set Vref, RX VrefLevel [Byte0]: 30
8532 22:16:19.771428 [Byte1]: 30
8533 22:16:19.771992
8534 22:16:19.774851 Set Vref, RX VrefLevel [Byte0]: 31
8535 22:16:19.778174 [Byte1]: 31
8536 22:16:19.778694
8537 22:16:19.780965 Set Vref, RX VrefLevel [Byte0]: 32
8538 22:16:19.784277 [Byte1]: 32
8539 22:16:19.787619
8540 22:16:19.788152 Set Vref, RX VrefLevel [Byte0]: 33
8541 22:16:19.791150 [Byte1]: 33
8542 22:16:19.795635
8543 22:16:19.796322 Set Vref, RX VrefLevel [Byte0]: 34
8544 22:16:19.798674 [Byte1]: 34
8545 22:16:19.803579
8546 22:16:19.804101 Set Vref, RX VrefLevel [Byte0]: 35
8547 22:16:19.806444 [Byte1]: 35
8548 22:16:19.811256
8549 22:16:19.811780 Set Vref, RX VrefLevel [Byte0]: 36
8550 22:16:19.813409 [Byte1]: 36
8551 22:16:19.818426
8552 22:16:19.818950 Set Vref, RX VrefLevel [Byte0]: 37
8553 22:16:19.821365 [Byte1]: 37
8554 22:16:19.825707
8555 22:16:19.826224 Set Vref, RX VrefLevel [Byte0]: 38
8556 22:16:19.828715 [Byte1]: 38
8557 22:16:19.834151
8558 22:16:19.834671 Set Vref, RX VrefLevel [Byte0]: 39
8559 22:16:19.836561 [Byte1]: 39
8560 22:16:19.840806
8561 22:16:19.841324 Set Vref, RX VrefLevel [Byte0]: 40
8562 22:16:19.844317 [Byte1]: 40
8563 22:16:19.848405
8564 22:16:19.848938 Set Vref, RX VrefLevel [Byte0]: 41
8565 22:16:19.852113 [Byte1]: 41
8566 22:16:19.855849
8567 22:16:19.856380 Set Vref, RX VrefLevel [Byte0]: 42
8568 22:16:19.859065 [Byte1]: 42
8569 22:16:19.863709
8570 22:16:19.867013 Set Vref, RX VrefLevel [Byte0]: 43
8571 22:16:19.870579 [Byte1]: 43
8572 22:16:19.871104
8573 22:16:19.873851 Set Vref, RX VrefLevel [Byte0]: 44
8574 22:16:19.876407 [Byte1]: 44
8575 22:16:19.876859
8576 22:16:19.879673 Set Vref, RX VrefLevel [Byte0]: 45
8577 22:16:19.883366 [Byte1]: 45
8578 22:16:19.886735
8579 22:16:19.887298 Set Vref, RX VrefLevel [Byte0]: 46
8580 22:16:19.889846 [Byte1]: 46
8581 22:16:19.894364
8582 22:16:19.894889 Set Vref, RX VrefLevel [Byte0]: 47
8583 22:16:19.897438 [Byte1]: 47
8584 22:16:19.901731
8585 22:16:19.902273 Set Vref, RX VrefLevel [Byte0]: 48
8586 22:16:19.904939 [Byte1]: 48
8587 22:16:19.909073
8588 22:16:19.909605 Set Vref, RX VrefLevel [Byte0]: 49
8589 22:16:19.912834 [Byte1]: 49
8590 22:16:19.917607
8591 22:16:19.918133 Set Vref, RX VrefLevel [Byte0]: 50
8592 22:16:19.920792 [Byte1]: 50
8593 22:16:19.924568
8594 22:16:19.925093 Set Vref, RX VrefLevel [Byte0]: 51
8595 22:16:19.927544 [Byte1]: 51
8596 22:16:19.932115
8597 22:16:19.932704 Set Vref, RX VrefLevel [Byte0]: 52
8598 22:16:19.935370 [Byte1]: 52
8599 22:16:19.940074
8600 22:16:19.940633 Set Vref, RX VrefLevel [Byte0]: 53
8601 22:16:19.943004 [Byte1]: 53
8602 22:16:19.947537
8603 22:16:19.948068 Set Vref, RX VrefLevel [Byte0]: 54
8604 22:16:19.950557 [Byte1]: 54
8605 22:16:19.955051
8606 22:16:19.955630 Set Vref, RX VrefLevel [Byte0]: 55
8607 22:16:19.958301 [Byte1]: 55
8608 22:16:19.963012
8609 22:16:19.963592 Set Vref, RX VrefLevel [Byte0]: 56
8610 22:16:19.965645 [Byte1]: 56
8611 22:16:19.970303
8612 22:16:19.970845 Set Vref, RX VrefLevel [Byte0]: 57
8613 22:16:19.973506 [Byte1]: 57
8614 22:16:19.977778
8615 22:16:19.978201 Set Vref, RX VrefLevel [Byte0]: 58
8616 22:16:19.981382 [Byte1]: 58
8617 22:16:19.985323
8618 22:16:19.985810 Set Vref, RX VrefLevel [Byte0]: 59
8619 22:16:19.988723 [Byte1]: 59
8620 22:16:19.993118
8621 22:16:19.993654 Set Vref, RX VrefLevel [Byte0]: 60
8622 22:16:19.996467 [Byte1]: 60
8623 22:16:20.000829
8624 22:16:20.001361 Set Vref, RX VrefLevel [Byte0]: 61
8625 22:16:20.003852 [Byte1]: 61
8626 22:16:20.008893
8627 22:16:20.009419 Set Vref, RX VrefLevel [Byte0]: 62
8628 22:16:20.011726 [Byte1]: 62
8629 22:16:20.016031
8630 22:16:20.016568 Set Vref, RX VrefLevel [Byte0]: 63
8631 22:16:20.019081 [Byte1]: 63
8632 22:16:20.023577
8633 22:16:20.024215 Set Vref, RX VrefLevel [Byte0]: 64
8634 22:16:20.027426 [Byte1]: 64
8635 22:16:20.031570
8636 22:16:20.032096 Set Vref, RX VrefLevel [Byte0]: 65
8637 22:16:20.034650 [Byte1]: 65
8638 22:16:20.038935
8639 22:16:20.039500 Set Vref, RX VrefLevel [Byte0]: 66
8640 22:16:20.042233 [Byte1]: 66
8641 22:16:20.046460
8642 22:16:20.046986 Set Vref, RX VrefLevel [Byte0]: 67
8643 22:16:20.050150 [Byte1]: 67
8644 22:16:20.054325
8645 22:16:20.054856 Set Vref, RX VrefLevel [Byte0]: 68
8646 22:16:20.057748 [Byte1]: 68
8647 22:16:20.061695
8648 22:16:20.062245 Set Vref, RX VrefLevel [Byte0]: 69
8649 22:16:20.065003 [Byte1]: 69
8650 22:16:20.069363
8651 22:16:20.069896 Set Vref, RX VrefLevel [Byte0]: 70
8652 22:16:20.073098 [Byte1]: 70
8653 22:16:20.076564
8654 22:16:20.077056 Set Vref, RX VrefLevel [Byte0]: 71
8655 22:16:20.079688 [Byte1]: 71
8656 22:16:20.084220
8657 22:16:20.084749 Set Vref, RX VrefLevel [Byte0]: 72
8658 22:16:20.088047 [Byte1]: 72
8659 22:16:20.092379
8660 22:16:20.092898 Final RX Vref Byte 0 = 59 to rank0
8661 22:16:20.095272 Final RX Vref Byte 1 = 61 to rank0
8662 22:16:20.098376 Final RX Vref Byte 0 = 59 to rank1
8663 22:16:20.101898 Final RX Vref Byte 1 = 61 to rank1==
8664 22:16:20.104865 Dram Type= 6, Freq= 0, CH_1, rank 0
8665 22:16:20.112024 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8666 22:16:20.112548 ==
8667 22:16:20.112887 DQS Delay:
8668 22:16:20.115231 DQS0 = 0, DQS1 = 0
8669 22:16:20.115761 DQM Delay:
8670 22:16:20.116197 DQM0 = 131, DQM1 = 128
8671 22:16:20.118632 DQ Delay:
8672 22:16:20.122723 DQ0 =138, DQ1 =128, DQ2 =118, DQ3 =130
8673 22:16:20.125562 DQ4 =128, DQ5 =142, DQ6 =144, DQ7 =126
8674 22:16:20.128269 DQ8 =114, DQ9 =118, DQ10 =128, DQ11 =120
8675 22:16:20.131660 DQ12 =138, DQ13 =138, DQ14 =136, DQ15 =138
8676 22:16:20.132179
8677 22:16:20.132511
8678 22:16:20.132906
8679 22:16:20.135231 [DramC_TX_OE_Calibration] TA2
8680 22:16:20.138588 Original DQ_B0 (3 6) =30, OEN = 27
8681 22:16:20.141748 Original DQ_B1 (3 6) =30, OEN = 27
8682 22:16:20.145411 24, 0x0, End_B0=24 End_B1=24
8683 22:16:20.147959 25, 0x0, End_B0=25 End_B1=25
8684 22:16:20.148407 26, 0x0, End_B0=26 End_B1=26
8685 22:16:20.151138 27, 0x0, End_B0=27 End_B1=27
8686 22:16:20.154602 28, 0x0, End_B0=28 End_B1=28
8687 22:16:20.158491 29, 0x0, End_B0=29 End_B1=29
8688 22:16:20.159019 30, 0x0, End_B0=30 End_B1=30
8689 22:16:20.161237 31, 0x4545, End_B0=30 End_B1=30
8690 22:16:20.164799 Byte0 end_step=30 best_step=27
8691 22:16:20.167486 Byte1 end_step=30 best_step=27
8692 22:16:20.171295 Byte0 TX OE(2T, 0.5T) = (3, 3)
8693 22:16:20.174682 Byte1 TX OE(2T, 0.5T) = (3, 3)
8694 22:16:20.175241
8695 22:16:20.175592
8696 22:16:20.180904 [DQSOSCAuto] RK0, (LSB)MR18= 0xe18, (MSB)MR19= 0x303, tDQSOscB0 = 397 ps tDQSOscB1 = 402 ps
8697 22:16:20.184412 CH1 RK0: MR19=303, MR18=E18
8698 22:16:20.191036 CH1_RK0: MR19=0x303, MR18=0xE18, DQSOSC=397, MR23=63, INC=23, DEC=15
8699 22:16:20.191575
8700 22:16:20.194297 ----->DramcWriteLeveling(PI) begin...
8701 22:16:20.194852 ==
8702 22:16:20.197011 Dram Type= 6, Freq= 0, CH_1, rank 1
8703 22:16:20.200469 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8704 22:16:20.200898 ==
8705 22:16:20.203844 Write leveling (Byte 0): 24 => 24
8706 22:16:20.207097 Write leveling (Byte 1): 26 => 26
8707 22:16:20.210295 DramcWriteLeveling(PI) end<-----
8708 22:16:20.210716
8709 22:16:20.211049 ==
8710 22:16:20.213823 Dram Type= 6, Freq= 0, CH_1, rank 1
8711 22:16:20.216997 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8712 22:16:20.220550 ==
8713 22:16:20.220974 [Gating] SW mode calibration
8714 22:16:20.230728 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8715 22:16:20.233511 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8716 22:16:20.236752 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8717 22:16:20.244000 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8718 22:16:20.246760 1 4 8 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
8719 22:16:20.249938 1 4 12 | B1->B0 | 2929 3434 | 1 1 | (1 1) (1 1)
8720 22:16:20.256749 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8721 22:16:20.259871 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8722 22:16:20.263291 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8723 22:16:20.269967 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8724 22:16:20.272946 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8725 22:16:20.276131 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8726 22:16:20.283269 1 5 8 | B1->B0 | 3434 2525 | 1 0 | (1 1) (0 0)
8727 22:16:20.286267 1 5 12 | B1->B0 | 3333 2323 | 1 0 | (1 0) (0 0)
8728 22:16:20.289275 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8729 22:16:20.296223 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8730 22:16:20.299266 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8731 22:16:20.302359 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8732 22:16:20.309007 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8733 22:16:20.312789 1 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
8734 22:16:20.315545 1 6 8 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
8735 22:16:20.322868 1 6 12 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
8736 22:16:20.326039 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8737 22:16:20.329530 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8738 22:16:20.335711 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8739 22:16:20.338514 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8740 22:16:20.342321 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8741 22:16:20.349008 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8742 22:16:20.352349 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8743 22:16:20.355876 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8744 22:16:20.361954 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8745 22:16:20.364967 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8746 22:16:20.371782 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8747 22:16:20.375334 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8748 22:16:20.378835 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8749 22:16:20.385541 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8750 22:16:20.387986 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8751 22:16:20.391116 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8752 22:16:20.398671 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8753 22:16:20.401177 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8754 22:16:20.404555 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8755 22:16:20.410835 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8756 22:16:20.414521 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8757 22:16:20.417647 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8758 22:16:20.424606 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8759 22:16:20.428259 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8760 22:16:20.431229 Total UI for P1: 0, mck2ui 16
8761 22:16:20.434703 best dqsien dly found for B0: ( 1, 9, 6)
8762 22:16:20.437378 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8763 22:16:20.444031 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8764 22:16:20.444600 Total UI for P1: 0, mck2ui 16
8765 22:16:20.450535 best dqsien dly found for B1: ( 1, 9, 12)
8766 22:16:20.453785 best DQS0 dly(MCK, UI, PI) = (1, 9, 6)
8767 22:16:20.457335 best DQS1 dly(MCK, UI, PI) = (1, 9, 12)
8768 22:16:20.457913
8769 22:16:20.460315 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 6)
8770 22:16:20.463602 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 12)
8771 22:16:20.466917 [Gating] SW calibration Done
8772 22:16:20.467437 ==
8773 22:16:20.470850 Dram Type= 6, Freq= 0, CH_1, rank 1
8774 22:16:20.474177 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8775 22:16:20.474750 ==
8776 22:16:20.476804 RX Vref Scan: 0
8777 22:16:20.477377
8778 22:16:20.477749 RX Vref 0 -> 0, step: 1
8779 22:16:20.478214
8780 22:16:20.480085 RX Delay 0 -> 252, step: 8
8781 22:16:20.483341 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8782 22:16:20.490311 iDelay=200, Bit 1, Center 131 (72 ~ 191) 120
8783 22:16:20.493149 iDelay=200, Bit 2, Center 123 (64 ~ 183) 120
8784 22:16:20.496645 iDelay=200, Bit 3, Center 131 (72 ~ 191) 120
8785 22:16:20.499997 iDelay=200, Bit 4, Center 131 (72 ~ 191) 120
8786 22:16:20.503129 iDelay=200, Bit 5, Center 143 (88 ~ 199) 112
8787 22:16:20.509700 iDelay=200, Bit 6, Center 139 (80 ~ 199) 120
8788 22:16:20.513076 iDelay=200, Bit 7, Center 135 (80 ~ 191) 112
8789 22:16:20.516231 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
8790 22:16:20.520085 iDelay=200, Bit 9, Center 119 (64 ~ 175) 112
8791 22:16:20.523220 iDelay=200, Bit 10, Center 131 (72 ~ 191) 120
8792 22:16:20.529573 iDelay=200, Bit 11, Center 123 (64 ~ 183) 120
8793 22:16:20.532799 iDelay=200, Bit 12, Center 139 (80 ~ 199) 120
8794 22:16:20.536271 iDelay=200, Bit 13, Center 139 (80 ~ 199) 120
8795 22:16:20.539425 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
8796 22:16:20.545979 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8797 22:16:20.546545 ==
8798 22:16:20.549955 Dram Type= 6, Freq= 0, CH_1, rank 1
8799 22:16:20.552603 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8800 22:16:20.553094 ==
8801 22:16:20.553465 DQS Delay:
8802 22:16:20.556095 DQS0 = 0, DQS1 = 0
8803 22:16:20.556664 DQM Delay:
8804 22:16:20.558915 DQM0 = 133, DQM1 = 130
8805 22:16:20.559594 DQ Delay:
8806 22:16:20.562590 DQ0 =135, DQ1 =131, DQ2 =123, DQ3 =131
8807 22:16:20.565838 DQ4 =131, DQ5 =143, DQ6 =139, DQ7 =135
8808 22:16:20.569104 DQ8 =119, DQ9 =119, DQ10 =131, DQ11 =123
8809 22:16:20.572317 DQ12 =139, DQ13 =139, DQ14 =135, DQ15 =135
8810 22:16:20.575730
8811 22:16:20.576293
8812 22:16:20.576660 ==
8813 22:16:20.579069 Dram Type= 6, Freq= 0, CH_1, rank 1
8814 22:16:20.582370 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8815 22:16:20.582938 ==
8816 22:16:20.583348
8817 22:16:20.583694
8818 22:16:20.585533 TX Vref Scan disable
8819 22:16:20.586093 == TX Byte 0 ==
8820 22:16:20.591969 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8821 22:16:20.595572 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8822 22:16:20.596039 == TX Byte 1 ==
8823 22:16:20.602287 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
8824 22:16:20.605233 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8825 22:16:20.605700 ==
8826 22:16:20.608219 Dram Type= 6, Freq= 0, CH_1, rank 1
8827 22:16:20.611629 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8828 22:16:20.612092 ==
8829 22:16:20.626723
8830 22:16:20.629929 TX Vref early break, caculate TX vref
8831 22:16:20.633719 TX Vref=16, minBit 9, minWin=22, winSum=381
8832 22:16:20.636281 TX Vref=18, minBit 9, minWin=22, winSum=385
8833 22:16:20.639779 TX Vref=20, minBit 9, minWin=22, winSum=394
8834 22:16:20.643246 TX Vref=22, minBit 9, minWin=23, winSum=401
8835 22:16:20.646492 TX Vref=24, minBit 9, minWin=23, winSum=407
8836 22:16:20.652943 TX Vref=26, minBit 9, minWin=24, winSum=416
8837 22:16:20.656452 TX Vref=28, minBit 9, minWin=23, winSum=418
8838 22:16:20.660226 TX Vref=30, minBit 9, minWin=25, winSum=421
8839 22:16:20.662768 TX Vref=32, minBit 9, minWin=24, winSum=410
8840 22:16:20.665833 TX Vref=34, minBit 11, minWin=23, winSum=401
8841 22:16:20.672696 TX Vref=36, minBit 0, minWin=23, winSum=396
8842 22:16:20.676140 [TxChooseVref] Worse bit 9, Min win 25, Win sum 421, Final Vref 30
8843 22:16:20.676709
8844 22:16:20.679293 Final TX Range 0 Vref 30
8845 22:16:20.679860
8846 22:16:20.680229 ==
8847 22:16:20.682956 Dram Type= 6, Freq= 0, CH_1, rank 1
8848 22:16:20.686202 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8849 22:16:20.689573 ==
8850 22:16:20.690135
8851 22:16:20.690501
8852 22:16:20.690840 TX Vref Scan disable
8853 22:16:20.695841 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps
8854 22:16:20.696406 == TX Byte 0 ==
8855 22:16:20.699506 u2DelayCellOfst[0]=14 cells (4 PI)
8856 22:16:20.702770 u2DelayCellOfst[1]=10 cells (3 PI)
8857 22:16:20.705521 u2DelayCellOfst[2]=0 cells (0 PI)
8858 22:16:20.708788 u2DelayCellOfst[3]=3 cells (1 PI)
8859 22:16:20.711862 u2DelayCellOfst[4]=7 cells (2 PI)
8860 22:16:20.715504 u2DelayCellOfst[5]=14 cells (4 PI)
8861 22:16:20.718626 u2DelayCellOfst[6]=14 cells (4 PI)
8862 22:16:20.721693 u2DelayCellOfst[7]=7 cells (2 PI)
8863 22:16:20.725568 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
8864 22:16:20.728562 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8865 22:16:20.731886 == TX Byte 1 ==
8866 22:16:20.735321 u2DelayCellOfst[8]=0 cells (0 PI)
8867 22:16:20.738362 u2DelayCellOfst[9]=3 cells (1 PI)
8868 22:16:20.742260 u2DelayCellOfst[10]=14 cells (4 PI)
8869 22:16:20.745108 u2DelayCellOfst[11]=3 cells (1 PI)
8870 22:16:20.749673 u2DelayCellOfst[12]=14 cells (4 PI)
8871 22:16:20.751527 u2DelayCellOfst[13]=17 cells (5 PI)
8872 22:16:20.755053 u2DelayCellOfst[14]=17 cells (5 PI)
8873 22:16:20.758633 u2DelayCellOfst[15]=17 cells (5 PI)
8874 22:16:20.762424 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8875 22:16:20.764742 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8876 22:16:20.768440 DramC Write-DBI on
8877 22:16:20.769001 ==
8878 22:16:20.772229 Dram Type= 6, Freq= 0, CH_1, rank 1
8879 22:16:20.775842 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8880 22:16:20.776412 ==
8881 22:16:20.776787
8882 22:16:20.777128
8883 22:16:20.777973 TX Vref Scan disable
8884 22:16:20.778435 == TX Byte 0 ==
8885 22:16:20.785114 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
8886 22:16:20.785685 == TX Byte 1 ==
8887 22:16:20.791463 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8888 22:16:20.792061 DramC Write-DBI off
8889 22:16:20.792447
8890 22:16:20.792792 [DATLAT]
8891 22:16:20.794651 Freq=1600, CH1 RK1
8892 22:16:20.795249
8893 22:16:20.797814 DATLAT Default: 0xf
8894 22:16:20.798421 0, 0xFFFF, sum = 0
8895 22:16:20.800909 1, 0xFFFF, sum = 0
8896 22:16:20.801599 2, 0xFFFF, sum = 0
8897 22:16:20.804058 3, 0xFFFF, sum = 0
8898 22:16:20.804486 4, 0xFFFF, sum = 0
8899 22:16:20.807668 5, 0xFFFF, sum = 0
8900 22:16:20.808139 6, 0xFFFF, sum = 0
8901 22:16:20.811168 7, 0xFFFF, sum = 0
8902 22:16:20.811736 8, 0xFFFF, sum = 0
8903 22:16:20.814019 9, 0xFFFF, sum = 0
8904 22:16:20.814487 10, 0xFFFF, sum = 0
8905 22:16:20.817665 11, 0xFFFF, sum = 0
8906 22:16:20.818279 12, 0xFFFF, sum = 0
8907 22:16:20.820994 13, 0xFFFF, sum = 0
8908 22:16:20.821463 14, 0x0, sum = 1
8909 22:16:20.823896 15, 0x0, sum = 2
8910 22:16:20.824365 16, 0x0, sum = 3
8911 22:16:20.827475 17, 0x0, sum = 4
8912 22:16:20.828110 best_step = 15
8913 22:16:20.828660
8914 22:16:20.829025 ==
8915 22:16:20.830520 Dram Type= 6, Freq= 0, CH_1, rank 1
8916 22:16:20.836992 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8917 22:16:20.837555 ==
8918 22:16:20.837926 RX Vref Scan: 0
8919 22:16:20.838361
8920 22:16:20.840651 RX Vref 0 -> 0, step: 1
8921 22:16:20.841114
8922 22:16:20.843869 RX Delay 19 -> 252, step: 4
8923 22:16:20.846928 iDelay=195, Bit 0, Center 134 (83 ~ 186) 104
8924 22:16:20.850322 iDelay=195, Bit 1, Center 130 (79 ~ 182) 104
8925 22:16:20.857133 iDelay=195, Bit 2, Center 120 (67 ~ 174) 108
8926 22:16:20.860599 iDelay=195, Bit 3, Center 128 (75 ~ 182) 108
8927 22:16:20.864088 iDelay=195, Bit 4, Center 130 (75 ~ 186) 112
8928 22:16:20.867314 iDelay=195, Bit 5, Center 142 (91 ~ 194) 104
8929 22:16:20.870450 iDelay=195, Bit 6, Center 140 (87 ~ 194) 108
8930 22:16:20.876799 iDelay=195, Bit 7, Center 128 (75 ~ 182) 108
8931 22:16:20.880182 iDelay=195, Bit 8, Center 116 (63 ~ 170) 108
8932 22:16:20.883578 iDelay=195, Bit 9, Center 118 (67 ~ 170) 104
8933 22:16:20.886678 iDelay=195, Bit 10, Center 128 (75 ~ 182) 108
8934 22:16:20.890407 iDelay=195, Bit 11, Center 120 (67 ~ 174) 108
8935 22:16:20.896648 iDelay=195, Bit 12, Center 136 (83 ~ 190) 108
8936 22:16:20.900043 iDelay=195, Bit 13, Center 134 (79 ~ 190) 112
8937 22:16:20.902844 iDelay=195, Bit 14, Center 132 (79 ~ 186) 108
8938 22:16:20.906765 iDelay=195, Bit 15, Center 136 (83 ~ 190) 108
8939 22:16:20.907377 ==
8940 22:16:20.910274 Dram Type= 6, Freq= 0, CH_1, rank 1
8941 22:16:20.916461 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8942 22:16:20.917015 ==
8943 22:16:20.917386 DQS Delay:
8944 22:16:20.919861 DQS0 = 0, DQS1 = 0
8945 22:16:20.920326 DQM Delay:
8946 22:16:20.922585 DQM0 = 131, DQM1 = 127
8947 22:16:20.923045 DQ Delay:
8948 22:16:20.926276 DQ0 =134, DQ1 =130, DQ2 =120, DQ3 =128
8949 22:16:20.929639 DQ4 =130, DQ5 =142, DQ6 =140, DQ7 =128
8950 22:16:20.932551 DQ8 =116, DQ9 =118, DQ10 =128, DQ11 =120
8951 22:16:20.936515 DQ12 =136, DQ13 =134, DQ14 =132, DQ15 =136
8952 22:16:20.937081
8953 22:16:20.937453
8954 22:16:20.937796
8955 22:16:20.939157 [DramC_TX_OE_Calibration] TA2
8956 22:16:20.942733 Original DQ_B0 (3 6) =30, OEN = 27
8957 22:16:20.945953 Original DQ_B1 (3 6) =30, OEN = 27
8958 22:16:20.948823 24, 0x0, End_B0=24 End_B1=24
8959 22:16:20.952542 25, 0x0, End_B0=25 End_B1=25
8960 22:16:20.953013 26, 0x0, End_B0=26 End_B1=26
8961 22:16:20.955573 27, 0x0, End_B0=27 End_B1=27
8962 22:16:20.959522 28, 0x0, End_B0=28 End_B1=28
8963 22:16:20.962243 29, 0x0, End_B0=29 End_B1=29
8964 22:16:20.965914 30, 0x0, End_B0=30 End_B1=30
8965 22:16:20.966488 31, 0x4141, End_B0=30 End_B1=30
8966 22:16:20.969165 Byte0 end_step=30 best_step=27
8967 22:16:20.972019 Byte1 end_step=30 best_step=27
8968 22:16:20.975823 Byte0 TX OE(2T, 0.5T) = (3, 3)
8969 22:16:20.979164 Byte1 TX OE(2T, 0.5T) = (3, 3)
8970 22:16:20.979810
8971 22:16:20.980197
8972 22:16:20.985771 [DQSOSCAuto] RK1, (LSB)MR18= 0x101d, (MSB)MR19= 0x303, tDQSOscB0 = 395 ps tDQSOscB1 = 401 ps
8973 22:16:20.989101 CH1 RK1: MR19=303, MR18=101D
8974 22:16:20.995088 CH1_RK1: MR19=0x303, MR18=0x101D, DQSOSC=395, MR23=63, INC=23, DEC=15
8975 22:16:20.998805 [RxdqsGatingPostProcess] freq 1600
8976 22:16:21.005309 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8977 22:16:21.008546 best DQS0 dly(2T, 0.5T) = (1, 1)
8978 22:16:21.009110 best DQS1 dly(2T, 0.5T) = (1, 1)
8979 22:16:21.011419 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8980 22:16:21.015306 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8981 22:16:21.018980 best DQS0 dly(2T, 0.5T) = (1, 1)
8982 22:16:21.021834 best DQS1 dly(2T, 0.5T) = (1, 1)
8983 22:16:21.024942 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8984 22:16:21.028168 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8985 22:16:21.031288 Pre-setting of DQS Precalculation
8986 22:16:21.035417 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
8987 22:16:21.045006 sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0
8988 22:16:21.051612 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
8989 22:16:21.052175
8990 22:16:21.052543
8991 22:16:21.054413 [Calibration Summary] 3200 Mbps
8992 22:16:21.054878 CH 0, Rank 0
8993 22:16:21.058224 SW Impedance : PASS
8994 22:16:21.061247 DUTY Scan : NO K
8995 22:16:21.061822 ZQ Calibration : PASS
8996 22:16:21.064518 Jitter Meter : NO K
8997 22:16:21.067603 CBT Training : PASS
8998 22:16:21.068163 Write leveling : PASS
8999 22:16:21.071369 RX DQS gating : PASS
9000 22:16:21.074564 RX DQ/DQS(RDDQC) : PASS
9001 22:16:21.075125 TX DQ/DQS : PASS
9002 22:16:21.077613 RX DATLAT : PASS
9003 22:16:21.078179 RX DQ/DQS(Engine): PASS
9004 22:16:21.080483 TX OE : PASS
9005 22:16:21.080950 All Pass.
9006 22:16:21.081322
9007 22:16:21.083960 CH 0, Rank 1
9008 22:16:21.087565 SW Impedance : PASS
9009 22:16:21.088131 DUTY Scan : NO K
9010 22:16:21.090687 ZQ Calibration : PASS
9011 22:16:21.091292 Jitter Meter : NO K
9012 22:16:21.093743 CBT Training : PASS
9013 22:16:21.097755 Write leveling : PASS
9014 22:16:21.098338 RX DQS gating : PASS
9015 22:16:21.100919 RX DQ/DQS(RDDQC) : PASS
9016 22:16:21.103843 TX DQ/DQS : PASS
9017 22:16:21.104313 RX DATLAT : PASS
9018 22:16:21.107026 RX DQ/DQS(Engine): PASS
9019 22:16:21.111275 TX OE : PASS
9020 22:16:21.111834 All Pass.
9021 22:16:21.112209
9022 22:16:21.112551 CH 1, Rank 0
9023 22:16:21.113197 SW Impedance : PASS
9024 22:16:21.117126 DUTY Scan : NO K
9025 22:16:21.117688 ZQ Calibration : PASS
9026 22:16:21.120418 Jitter Meter : NO K
9027 22:16:21.123853 CBT Training : PASS
9028 22:16:21.124416 Write leveling : PASS
9029 22:16:21.127100 RX DQS gating : PASS
9030 22:16:21.130068 RX DQ/DQS(RDDQC) : PASS
9031 22:16:21.130635 TX DQ/DQS : PASS
9032 22:16:21.133750 RX DATLAT : PASS
9033 22:16:21.136421 RX DQ/DQS(Engine): PASS
9034 22:16:21.136887 TX OE : PASS
9035 22:16:21.139962 All Pass.
9036 22:16:21.140427
9037 22:16:21.140816 CH 1, Rank 1
9038 22:16:21.144473 SW Impedance : PASS
9039 22:16:21.145038 DUTY Scan : NO K
9040 22:16:21.146556 ZQ Calibration : PASS
9041 22:16:21.149566 Jitter Meter : NO K
9042 22:16:21.150033 CBT Training : PASS
9043 22:16:21.153000 Write leveling : PASS
9044 22:16:21.156517 RX DQS gating : PASS
9045 22:16:21.156979 RX DQ/DQS(RDDQC) : PASS
9046 22:16:21.159816 TX DQ/DQS : PASS
9047 22:16:21.160427 RX DATLAT : PASS
9048 22:16:21.163429 RX DQ/DQS(Engine): PASS
9049 22:16:21.166358 TX OE : PASS
9050 22:16:21.166822 All Pass.
9051 22:16:21.167226
9052 22:16:21.169583 DramC Write-DBI on
9053 22:16:21.173081 PER_BANK_REFRESH: Hybrid Mode
9054 22:16:21.173654 TX_TRACKING: ON
9055 22:16:21.183165 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0
9056 22:16:21.189631 sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1
9057 22:16:21.195978 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9058 22:16:21.199598 [FAST_K] Save calibration result to emmc
9059 22:16:21.202656 sync common calibartion params.
9060 22:16:21.205871 sync cbt_mode0:1, 1:1
9061 22:16:21.209658 dram_init: ddr_geometry: 2
9062 22:16:21.210222 dram_init: ddr_geometry: 2
9063 22:16:21.212621 dram_init: ddr_geometry: 2
9064 22:16:21.215284 0:dram_rank_size:100000000
9065 22:16:21.219333 1:dram_rank_size:100000000
9066 22:16:21.222269 sync rank num:2, rank0_size:0x100000000, rank1_size:0x100000000
9067 22:16:21.225838 DFS_SHUFFLE_HW_MODE: ON
9068 22:16:21.228895 dramc_set_vcore_voltage set vcore to 725000
9069 22:16:21.231977 Read voltage for 1600, 0
9070 22:16:21.232441 Vio18 = 0
9071 22:16:21.232809 Vcore = 725000
9072 22:16:21.235230 Vdram = 0
9073 22:16:21.235800 Vddq = 0
9074 22:16:21.236170 Vmddr = 0
9075 22:16:21.238793 switch to 3200 Mbps bootup
9076 22:16:21.243000 [DramcRunTimeConfig]
9077 22:16:21.243606 PHYPLL
9078 22:16:21.243979 DPM_CONTROL_AFTERK: ON
9079 22:16:21.245420 PER_BANK_REFRESH: ON
9080 22:16:21.248583 REFRESH_OVERHEAD_REDUCTION: ON
9081 22:16:21.249047 CMD_PICG_NEW_MODE: OFF
9082 22:16:21.251944 XRTWTW_NEW_MODE: ON
9083 22:16:21.255367 XRTRTR_NEW_MODE: ON
9084 22:16:21.255831 TX_TRACKING: ON
9085 22:16:21.258812 RDSEL_TRACKING: OFF
9086 22:16:21.259403 DQS Precalculation for DVFS: ON
9087 22:16:21.261884 RX_TRACKING: OFF
9088 22:16:21.262444 HW_GATING DBG: ON
9089 22:16:21.266060 ZQCS_ENABLE_LP4: ON
9090 22:16:21.268491 RX_PICG_NEW_MODE: ON
9091 22:16:21.269074 TX_PICG_NEW_MODE: ON
9092 22:16:21.271912 ENABLE_RX_DCM_DPHY: ON
9093 22:16:21.274972 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
9094 22:16:21.275594 DUMMY_READ_FOR_TRACKING: OFF
9095 22:16:21.278260 !!! SPM_CONTROL_AFTERK: OFF
9096 22:16:21.281545 !!! SPM could not control APHY
9097 22:16:21.285257 IMPEDANCE_TRACKING: ON
9098 22:16:21.285825 TEMP_SENSOR: ON
9099 22:16:21.288477 HW_SAVE_FOR_SR: OFF
9100 22:16:21.291557 CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF
9101 22:16:21.294691 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF
9102 22:16:21.295151 Read ODT Tracking: ON
9103 22:16:21.298013 Refresh Rate DeBounce: ON
9104 22:16:21.301421 DFS_NO_QUEUE_FLUSH: ON
9105 22:16:21.304469 DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF
9106 22:16:21.305162 ENABLE_DFS_RUNTIME_MRW: OFF
9107 22:16:21.307795 DDR_RESERVE_NEW_MODE: ON
9108 22:16:21.310965 MR_CBT_SWITCH_FREQ: ON
9109 22:16:21.311613 =========================
9110 22:16:21.331640 [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)
9111 22:16:21.334945 dram_init: ddr_geometry: 2
9112 22:16:21.352943 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
9113 22:16:21.356073 dram_init: dram init end (result: 0)
9114 22:16:21.362911 DRAM-K: Full calibration passed in 24409 msecs
9115 22:16:21.366291 MRC: failed to locate region type 0.
9116 22:16:21.366862 DRAM rank0 size:0x100000000,
9117 22:16:21.369152 DRAM rank1 size=0x100000000
9118 22:16:21.379457 Mapping address range [0x40000000:0x240000000) as cacheable | read-write | non-secure | normal
9119 22:16:21.385813 Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal
9120 22:16:21.392323 Backing address range [0x40000000:0x80000000) with new page table @0x00112000
9121 22:16:21.402473 Backing address range [0x40000000:0x40200000) with new page table @0x00113000
9122 22:16:21.403044 DRAM rank0 size:0x100000000,
9123 22:16:21.405593 DRAM rank1 size=0x100000000
9124 22:16:21.406055 CBMEM:
9125 22:16:21.408905 IMD: root @ 0xfffff000 254 entries.
9126 22:16:21.412189 IMD: root @ 0xffffec00 62 entries.
9127 22:16:21.415364 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
9128 22:16:21.422200 WARNING: RO_VPD is uninitialized or empty.
9129 22:16:21.425523 FMAP: area RW_VPD found @ 577000 (16384 bytes)
9130 22:16:21.432962 CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80
9131 22:16:21.446016 read SPI 0x42894 0xe01e: 6225 us, 9216 KB/s, 73.728 Mbps
9132 22:16:21.457227 BS: romstage times (exec / console): total (unknown) / 23944 ms
9133 22:16:21.457789
9134 22:16:21.458158
9135 22:16:21.466833 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...
9136 22:16:21.470280 ARM64: Exception handlers installed.
9137 22:16:21.473676 ARM64: Testing exception
9138 22:16:21.476330 ARM64: Done test exception
9139 22:16:21.476794 Enumerating buses...
9140 22:16:21.479871 Show all devs... Before device enumeration.
9141 22:16:21.482892 Root Device: enabled 1
9142 22:16:21.486506 CPU_CLUSTER: 0: enabled 1
9143 22:16:21.487075 CPU: 00: enabled 1
9144 22:16:21.490346 Compare with tree...
9145 22:16:21.490909 Root Device: enabled 1
9146 22:16:21.492799 CPU_CLUSTER: 0: enabled 1
9147 22:16:21.496446 CPU: 00: enabled 1
9148 22:16:21.496908 Root Device scanning...
9149 22:16:21.500064 scan_static_bus for Root Device
9150 22:16:21.503079 CPU_CLUSTER: 0 enabled
9151 22:16:21.506254 scan_static_bus for Root Device done
9152 22:16:21.509899 scan_bus: bus Root Device finished in 8 msecs
9153 22:16:21.510469 done
9154 22:16:21.516140 BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms
9155 22:16:21.519778 FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)
9156 22:16:21.525632 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
9157 22:16:21.532513 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms
9158 22:16:21.533082 Allocating resources...
9159 22:16:21.536253 Reading resources...
9160 22:16:21.539128 Root Device read_resources bus 0 link: 0
9161 22:16:21.542113 DRAM rank0 size:0x100000000,
9162 22:16:21.542582 DRAM rank1 size=0x100000000
9163 22:16:21.548964 CPU_CLUSTER: 0 read_resources bus 0 link: 0
9164 22:16:21.549529 CPU: 00 missing read_resources
9165 22:16:21.556447 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
9166 22:16:21.558844 Root Device read_resources bus 0 link: 0 done
9167 22:16:21.562130 Done reading resources.
9168 22:16:21.565036 Show resources in subtree (Root Device)...After reading.
9169 22:16:21.569182 Root Device child on link 0 CPU_CLUSTER: 0
9170 22:16:21.571873 CPU_CLUSTER: 0 child on link 0 CPU: 00
9171 22:16:21.581411 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9172 22:16:21.581968 CPU: 00
9173 22:16:21.588422 Root Device assign_resources, bus 0 link: 0
9174 22:16:21.591635 CPU_CLUSTER: 0 missing set_resources
9175 22:16:21.594920 Root Device assign_resources, bus 0 link: 0 done
9176 22:16:21.598203 Done setting resources.
9177 22:16:21.601828 Show resources in subtree (Root Device)...After assigning values.
9178 22:16:21.608023 Root Device child on link 0 CPU_CLUSTER: 0
9179 22:16:21.611407 CPU_CLUSTER: 0 child on link 0 CPU: 00
9180 22:16:21.618227 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9181 22:16:21.621560 CPU: 00
9182 22:16:21.622119 Done allocating resources.
9183 22:16:21.627786 BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms
9184 22:16:21.631119 Enabling resources...
9185 22:16:21.631632 done.
9186 22:16:21.634486 BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms
9187 22:16:21.637547 Initializing devices...
9188 22:16:21.638011 Root Device init
9189 22:16:21.640991 init hardware done!
9190 22:16:21.644656 0x00000018: ctrlr->caps
9191 22:16:21.645232 52.000 MHz: ctrlr->f_max
9192 22:16:21.647575 0.400 MHz: ctrlr->f_min
9193 22:16:21.651156 0x40ff8080: ctrlr->voltages
9194 22:16:21.651787 sclk: 390625
9195 22:16:21.652159 Bus Width = 1
9196 22:16:21.654158 sclk: 390625
9197 22:16:21.654670 Bus Width = 1
9198 22:16:21.657530 Early init status = 3
9199 22:16:21.661108 out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00
9200 22:16:21.665629 in-header: 03 fc 00 00 01 00 00 00
9201 22:16:21.668679 in-data: 00
9202 22:16:21.672068 out: cmd=0x12d: 03 c8 2d 01 00 00 05 00 01 00 00 00 01
9203 22:16:21.677895 in-header: 03 fd 00 00 00 00 00 00
9204 22:16:21.681438 in-data:
9205 22:16:21.683775 out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00
9206 22:16:21.688647 in-header: 03 fc 00 00 01 00 00 00
9207 22:16:21.691648 in-data: 00
9208 22:16:21.694844 out: cmd=0x12d: 03 c9 2d 01 00 00 05 00 00 00 00 00 01
9209 22:16:21.700502 in-header: 03 fd 00 00 00 00 00 00
9210 22:16:21.704068 in-data:
9211 22:16:21.707614 [SSUSB] Setting up USB HOST controller...
9212 22:16:21.710855 [SSUSB] u3phy_ports_enable u2p:1, u3p:1
9213 22:16:21.713920 [SSUSB] phy power-on done.
9214 22:16:21.717297 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
9215 22:16:21.723790 CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c
9216 22:16:21.727326 mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)
9217 22:16:21.733956 CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c
9218 22:16:21.740160 read SPI 0x50eb0 0x2ad3: 1174 us, 9338 KB/s, 74.704 Mbps
9219 22:16:21.746866 mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)
9220 22:16:21.753427 CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204
9221 22:16:21.760119 read SPI 0x705bc 0x1f6a: 924 us, 8703 KB/s, 69.624 Mbps
9222 22:16:21.763618 SPM: binary array size = 0x9dc
9223 22:16:21.766766 SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)
9224 22:16:21.773480 spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18
9225 22:16:21.780101 mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)
9226 22:16:21.786859 SPM: spm_init done in 34 msecs, spm pc = 0x3f4
9227 22:16:21.789644 configure_display: Starting display init
9228 22:16:21.823972 anx7625_power_on_init: Init interface.
9229 22:16:21.827221 anx7625_disable_pd_protocol: Disabled PD feature.
9230 22:16:21.830496 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
9231 22:16:21.859065 anx7625_start_dp_work: Secure OCM version=00
9232 22:16:21.861436 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
9233 22:16:21.876778 sp_tx_get_edid_block: EDID Block = 1
9234 22:16:21.979063 Extracted contents:
9235 22:16:21.982773 header: 00 ff ff ff ff ff ff 00
9236 22:16:21.985754 serial number: 26 cf 7d 05 00 00 00 00 00 1e
9237 22:16:21.989262 version: 01 04
9238 22:16:21.992087 basic params: 95 1f 11 78 0a
9239 22:16:21.995634 chroma info: 76 90 94 55 54 90 27 21 50 54
9240 22:16:21.998509 established: 00 00 00
9241 22:16:22.005705 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
9242 22:16:22.011881 descriptor 1: 38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19
9243 22:16:22.015378 descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9244 22:16:22.021882 descriptor 3: 00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20
9245 22:16:22.028528 descriptor 4: 00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a
9246 22:16:22.031401 extensions: 00
9247 22:16:22.031863 checksum: fb
9248 22:16:22.032228
9249 22:16:22.038278 Manufacturer: IVO Model 57d Serial Number 0
9250 22:16:22.038847 Made week 0 of 2020
9251 22:16:22.042007 EDID version: 1.4
9252 22:16:22.042570 Digital display
9253 22:16:22.044828 6 bits per primary color channel
9254 22:16:22.048079 DisplayPort interface
9255 22:16:22.048546 Maximum image size: 31 cm x 17 cm
9256 22:16:22.051886 Gamma: 220%
9257 22:16:22.052454 Check DPMS levels
9258 22:16:22.057943 Supported color formats: RGB 4:4:4, YCrCb 4:2:2
9259 22:16:22.061676 First detailed timing is preferred timing
9260 22:16:22.064748 Established timings supported:
9261 22:16:22.065322 Standard timings supported:
9262 22:16:22.067764 Detailed timings
9263 22:16:22.071443 Hex of detail: 383680a07038204018303c0035ae10000019
9264 22:16:22.077995 Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm
9265 22:16:22.081890 0780 0798 07c8 0820 hborder 0
9266 22:16:22.084920 0438 043b 0447 0458 vborder 0
9267 22:16:22.088307 -hsync -vsync
9268 22:16:22.088869 Did detailed timing
9269 22:16:22.094189 Hex of detail: 000000000000000000000000000000000000
9270 22:16:22.097751 Manufacturer-specified data, tag 0
9271 22:16:22.100768 Hex of detail: 000000fe00496e666f566973696f6e0a2020
9272 22:16:22.104785 ASCII string: InfoVision
9273 22:16:22.107711 Hex of detail: 000000fe00523134304e574635205248200a
9274 22:16:22.111034 ASCII string: R140NWF5 RH
9275 22:16:22.111535 Checksum
9276 22:16:22.114373 Checksum: 0xfb (valid)
9277 22:16:22.117447 configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz
9278 22:16:22.120592 DSI data_rate: 832800000 bps
9279 22:16:22.127345 anx7625_parse_edid: detected IVO panel, use k value 0x3b
9280 22:16:22.131039 anx7625_parse_edid: pixelclock(138800).
9281 22:16:22.134246 hactive(1920), hsync(48), hfp(24), hbp(88)
9282 22:16:22.138241 vactive(1080), vsync(12), vfp(3), vbp(17)
9283 22:16:22.140768 anx7625_dsi_config: config dsi.
9284 22:16:22.147850 anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).
9285 22:16:22.161239 anx7625_dsi_config: success to config DSI
9286 22:16:22.164387 anx7625_dp_start: MIPI phy setup OK.
9287 22:16:22.168168 mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4
9288 22:16:22.171414 mtk_ddp_mode_set invalid vrefresh 60
9289 22:16:22.174342 main_disp_path_setup
9290 22:16:22.174902 ovl_layer_smi_id_en
9291 22:16:22.177654 ovl_layer_smi_id_en
9292 22:16:22.178218 ccorr_config
9293 22:16:22.178580 aal_config
9294 22:16:22.181081 gamma_config
9295 22:16:22.181534 postmask_config
9296 22:16:22.184216 dither_config
9297 22:16:22.187233 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
9298 22:16:22.193866 x_res x y_res: 1920 x 1080, size: 8294400 at 0x0
9299 22:16:22.197434 Root Device init finished in 555 msecs
9300 22:16:22.200546 CPU_CLUSTER: 0 init
9301 22:16:22.207560 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | device
9302 22:16:22.213507 INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff
9303 22:16:22.214025 APU_MBOX 0x190000b0 = 0x10001
9304 22:16:22.217327 APU_MBOX 0x190001b0 = 0x10001
9305 22:16:22.220062 APU_MBOX 0x190005b0 = 0x10001
9306 22:16:22.223761 APU_MBOX 0x190006b0 = 0x10001
9307 22:16:22.230029 CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c
9308 22:16:22.240167 read SPI 0x539f4 0xe237: 6247 us, 9270 KB/s, 74.160 Mbps
9309 22:16:22.252799 mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)
9310 22:16:22.258929 CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0
9311 22:16:22.270864 read SPI 0x61c74 0xe8ef: 6408 us, 9305 KB/s, 74.440 Mbps
9312 22:16:22.280006 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)
9313 22:16:22.283370 CPU_CLUSTER: 0 init finished in 81 msecs
9314 22:16:22.286953 Devices initialized
9315 22:16:22.290464 Show all devs... After init.
9316 22:16:22.291017 Root Device: enabled 1
9317 22:16:22.292585 CPU_CLUSTER: 0: enabled 1
9318 22:16:22.296018 CPU: 00: enabled 1
9319 22:16:22.299428 BS: BS_DEV_INIT run times (exec / console): 213 / 447 ms
9320 22:16:22.303253 FMAP: area RW_ELOG found @ 57f000 (4096 bytes)
9321 22:16:22.306077 ELOG: NV offset 0x57f000 size 0x1000
9322 22:16:22.313097 read SPI 0x57f000 0x1000: 488 us, 8393 KB/s, 67.144 Mbps
9323 22:16:22.319614 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
9324 22:16:22.322853 ELOG: Event(17) added with size 13 at 2023-06-04 22:16:34 UTC
9325 22:16:22.329598 out: cmd=0x121: 03 db 21 01 00 00 00 00
9326 22:16:22.332681 in-header: 03 39 00 00 2c 00 00 00
9327 22:16:22.342634 in-data: 26 68 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9328 22:16:22.349917 ELOG: Event(A1) added with size 10 at 2023-06-04 22:16:34 UTC
9329 22:16:22.356192 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
9330 22:16:22.362825 ELOG: Event(A0) added with size 9 at 2023-06-04 22:16:34 UTC
9331 22:16:22.366402 elog_add_boot_reason: Logged dev mode boot
9332 22:16:22.372254 BS: BS_POST_DEVICE entry times (exec / console): 2 / 64 ms
9333 22:16:22.372811 Finalize devices...
9334 22:16:22.375808 Devices finalized
9335 22:16:22.379230 BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
9336 22:16:22.382368 Writing coreboot table at 0xffe64000
9337 22:16:22.386062 0. 000000000010a000-0000000000113fff: RAMSTAGE
9338 22:16:22.392807 1. 0000000040000000-00000000400fffff: RAM
9339 22:16:22.395833 2. 0000000040100000-000000004032afff: RAMSTAGE
9340 22:16:22.398888 3. 000000004032b000-00000000545fffff: RAM
9341 22:16:22.402566 4. 0000000054600000-000000005465ffff: BL31
9342 22:16:22.405930 5. 0000000054660000-00000000ffe63fff: RAM
9343 22:16:22.412355 6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES
9344 22:16:22.415657 7. 0000000100000000-000000023fffffff: RAM
9345 22:16:22.418838 Passing 5 GPIOs to payload:
9346 22:16:22.421846 NAME | PORT | POLARITY | VALUE
9347 22:16:22.428570 EC in RW | 0x000000aa | low | undefined
9348 22:16:22.432012 EC interrupt | 0x00000005 | low | undefined
9349 22:16:22.435258 TPM interrupt | 0x000000ab | high | undefined
9350 22:16:22.441568 SD card detect | 0x00000011 | high | undefined
9351 22:16:22.444656 speaker enable | 0x00000093 | high | undefined
9352 22:16:22.448222 out: cmd=0x6: 03 f7 06 00 00 00 00 00
9353 22:16:22.452011 in-header: 03 f9 00 00 02 00 00 00
9354 22:16:22.455625 in-data: 02 00
9355 22:16:22.458446 ADC[4]: Raw value=902586 ID=7
9356 22:16:22.462362 ADC[3]: Raw value=213916 ID=1
9357 22:16:22.462933 RAM Code: 0x71
9358 22:16:22.465389 ADC[6]: Raw value=75000 ID=0
9359 22:16:22.468365 ADC[5]: Raw value=213546 ID=1
9360 22:16:22.468831 SKU Code: 0x1
9361 22:16:22.475806 Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum a51a
9362 22:16:22.476377 coreboot table: 964 bytes.
9363 22:16:22.478775 IMD ROOT 0. 0xfffff000 0x00001000
9364 22:16:22.481966 IMD SMALL 1. 0xffffe000 0x00001000
9365 22:16:22.484614 RO MCACHE 2. 0xffffc000 0x00001104
9366 22:16:22.488232 CONSOLE 3. 0xfff7c000 0x00080000
9367 22:16:22.491590 FMAP 4. 0xfff7b000 0x00000452
9368 22:16:22.495473 TIME STAMP 5. 0xfff7a000 0x00000910
9369 22:16:22.497944 VBOOT WORK 6. 0xfff66000 0x00014000
9370 22:16:22.501676 RAMOOPS 7. 0xffe66000 0x00100000
9371 22:16:22.504854 COREBOOT 8. 0xffe64000 0x00002000
9372 22:16:22.508476 IMD small region:
9373 22:16:22.510945 IMD ROOT 0. 0xffffec00 0x00000400
9374 22:16:22.514799 VPD 1. 0xffffeba0 0x0000004c
9375 22:16:22.518726 MMC STATUS 2. 0xffffeb80 0x00000004
9376 22:16:22.524614 BS: BS_WRITE_TABLES run times (exec / console): 2 / 137 ms
9377 22:16:22.525227 Probing TPM: done!
9378 22:16:22.531708 Connected to device vid:did:rid of 1ae0:0028:00
9379 22:16:22.538209 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
9380 22:16:22.541358 Initialized TPM device CR50 revision 0
9381 22:16:22.544788 Checking cr50 for pending updates
9382 22:16:22.550390 Reading cr50 TPM mode
9383 22:16:22.559777 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms
9384 22:16:22.565552 CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098
9385 22:16:22.606475 read SPI 0x3990ec 0x4f1b0: 34847 us, 9298 KB/s, 74.384 Mbps
9386 22:16:22.608933 Checking segment from ROM address 0x40100000
9387 22:16:22.611886 Checking segment from ROM address 0x4010001c
9388 22:16:22.618792 Loading segment from ROM address 0x40100000
9389 22:16:22.619399 code (compression=0)
9390 22:16:22.628861 New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178
9391 22:16:22.635858 Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178
9392 22:16:22.636435 it's not compressed!
9393 22:16:22.641823 [ 0x80000000, 8004f178, 0x821a7280) <- 40100038
9394 22:16:22.648473 Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108
9395 22:16:22.666479 Loading segment from ROM address 0x4010001c
9396 22:16:22.667051 Entry Point 0x80000000
9397 22:16:22.669020 Loaded segments
9398 22:16:22.672824 BS: BS_PAYLOAD_LOAD run times (exec / console): 48 / 61 ms
9399 22:16:22.679810 Jumping to boot code at 0x80000000(0xffe64000)
9400 22:16:22.686032 CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes
9401 22:16:22.692809 CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290
9402 22:16:22.701240 read SPI 0x8eb68 0x74a8: 3223 us, 9265 KB/s, 74.120 Mbps
9403 22:16:22.703807 Checking segment from ROM address 0x40100000
9404 22:16:22.708131 Checking segment from ROM address 0x4010001c
9405 22:16:22.713599 Loading segment from ROM address 0x40100000
9406 22:16:22.714156 code (compression=1)
9407 22:16:22.720101 New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470
9408 22:16:22.730474 Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470
9409 22:16:22.731048 using LZMA
9410 22:16:22.738610 [ 0x54600000, 54614abc, 0x5462e000) <- 40100038
9411 22:16:22.745025 Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544
9412 22:16:22.748714 Loading segment from ROM address 0x4010001c
9413 22:16:22.749178 Entry Point 0x54601000
9414 22:16:22.751916 Loaded segments
9415 22:16:22.755698 NOTICE: MT8192 bl31_setup
9416 22:16:22.762450 NOTICE: BL31: v2.4(debug):v2.4-448-gce3ebc861
9417 22:16:22.765428 NOTICE: BL31: Built : Sat Sep 11 09:59:37 UTC 2021
9418 22:16:22.769347 WARNING: region 0:
9419 22:16:22.772668 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9420 22:16:22.773242 WARNING: region 1:
9421 22:16:22.779054 WARNING: sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d
9422 22:16:22.782347 WARNING: region 2:
9423 22:16:22.785613 WARNING: sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d
9424 22:16:22.789325 WARNING: region 3:
9425 22:16:22.792125 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9426 22:16:22.796099 WARNING: region 4:
9427 22:16:22.802426 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9428 22:16:22.802993 WARNING: region 5:
9429 22:16:22.805802 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9430 22:16:22.809364 WARNING: region 6:
9431 22:16:22.811852 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9432 22:16:22.815165 WARNING: region 7:
9433 22:16:22.818684 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9434 22:16:22.825643 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000
9435 22:16:22.828908 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0
9436 22:16:22.832228 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff
9437 22:16:22.838586 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff
9438 22:16:22.841950 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff
9439 22:16:22.848473 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00
9440 22:16:22.851987 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff
9441 22:16:22.854851 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff
9442 22:16:22.861246 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff
9443 22:16:22.864794 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff
9444 22:16:22.871056 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff
9445 22:16:22.874819 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff
9446 22:16:22.878559 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff
9447 22:16:22.884598 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff
9448 22:16:22.887892 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff
9449 22:16:22.891254 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff
9450 22:16:22.897727 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff
9451 22:16:22.901048 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff
9452 22:16:22.907778 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff
9453 22:16:22.911395 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff
9454 22:16:22.914775 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff
9455 22:16:22.921404 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff
9456 22:16:22.924901 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff
9457 22:16:22.928137 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff
9458 22:16:22.934540 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff
9459 22:16:22.938073 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff
9460 22:16:22.945212 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff
9461 22:16:22.947914 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff
9462 22:16:22.954486 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff
9463 22:16:22.957702 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff
9464 22:16:22.961067 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff
9465 22:16:22.967963 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff
9466 22:16:22.971000 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0
9467 22:16:22.974561 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0
9468 22:16:22.977968 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0
9469 22:16:22.984166 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0
9470 22:16:22.988004 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0
9471 22:16:22.990817 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0
9472 22:16:22.994224 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0
9473 22:16:23.001014 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0
9474 22:16:23.004192 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0
9475 22:16:23.007896 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0
9476 22:16:23.010962 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0
9477 22:16:23.017578 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0
9478 22:16:23.020993 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0
9479 22:16:23.024024 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0
9480 22:16:23.027736 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0
9481 22:16:23.034543 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0
9482 22:16:23.037322 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff
9483 22:16:23.044137 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff
9484 22:16:23.047943 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff
9485 22:16:23.051559 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff
9486 22:16:23.057385 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff
9487 22:16:23.060644 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff
9488 22:16:23.067940 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff
9489 22:16:23.070668 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff
9490 22:16:23.077407 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff
9491 22:16:23.080700 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff
9492 22:16:23.083871 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff
9493 22:16:23.090421 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff
9494 22:16:23.094108 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff
9495 22:16:23.100486 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff
9496 22:16:23.103879 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff
9497 22:16:23.110654 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff
9498 22:16:23.114457 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff
9499 22:16:23.121397 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff
9500 22:16:23.123955 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff
9501 22:16:23.126919 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff
9502 22:16:23.133893 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff
9503 22:16:23.137846 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff
9504 22:16:23.144302 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff
9505 22:16:23.147099 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff
9506 22:16:23.153925 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff
9507 22:16:23.157292 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff
9508 22:16:23.160540 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff
9509 22:16:23.167262 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff
9510 22:16:23.170305 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff
9511 22:16:23.176898 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff
9512 22:16:23.180240 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff
9513 22:16:23.187435 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff
9514 22:16:23.190516 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff
9515 22:16:23.197326 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff
9516 22:16:23.200294 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff
9517 22:16:23.203769 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff
9518 22:16:23.210557 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff
9519 22:16:23.214094 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff
9520 22:16:23.221265 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff
9521 22:16:23.223853 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff
9522 22:16:23.227580 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff
9523 22:16:23.234097 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff
9524 22:16:23.237187 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff
9525 22:16:23.243816 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff
9526 22:16:23.246828 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff
9527 22:16:23.253500 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff
9528 22:16:23.257387 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff
9529 22:16:23.263683 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff
9530 22:16:23.266850 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0
9531 22:16:23.270251 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0
9532 22:16:23.273097 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0
9533 22:16:23.280026 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0
9534 22:16:23.283808 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0
9535 22:16:23.286394 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff
9536 22:16:23.293170 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff
9537 22:16:23.296562 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff
9538 22:16:23.303071 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff
9539 22:16:23.306893 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff
9540 22:16:23.309943 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff
9541 22:16:23.316524 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff
9542 22:16:23.320064 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff
9543 22:16:23.326662 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff
9544 22:16:23.330218 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff
9545 22:16:23.333244 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff
9546 22:16:23.340133 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff
9547 22:16:23.343418 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff
9548 22:16:23.350049 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff
9549 22:16:23.353424 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff
9550 22:16:23.356787 INFO: [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18
9551 22:16:23.360963 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000
9552 22:16:23.366593 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004
9553 22:16:23.370128 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0
9554 22:16:23.373606 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0
9555 22:16:23.380171 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0
9556 22:16:23.382960 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0
9557 22:16:23.386226 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000
9558 22:16:23.389646 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff
9559 22:16:23.396192 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff
9560 22:16:23.399889 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff
9561 22:16:23.406102 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff
9562 22:16:23.409680 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff
9563 22:16:23.412708 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff
9564 22:16:23.419742 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff
9565 22:16:23.423058 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc
9566 22:16:23.430085 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff
9567 22:16:23.433124 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf
9568 22:16:23.436556 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff
9569 22:16:23.443436 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc
9570 22:16:23.446163 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff
9571 22:16:23.449793 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff
9572 22:16:23.456299 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff
9573 22:16:23.459560 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff
9574 22:16:23.466391 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff
9575 22:16:23.469262 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff
9576 22:16:23.472798 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff
9577 22:16:23.479779 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff
9578 22:16:23.483374 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff
9579 22:16:23.489639 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff
9580 22:16:23.493397 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff
9581 22:16:23.495973 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff
9582 22:16:23.502721 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff
9583 22:16:23.506710 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff
9584 22:16:23.513194 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff
9585 22:16:23.515884 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff
9586 22:16:23.519455 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff
9587 22:16:23.525939 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff
9588 22:16:23.529529 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff
9589 22:16:23.532598 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff
9590 22:16:23.539328 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff
9591 22:16:23.542825 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff
9592 22:16:23.549452 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff
9593 22:16:23.552793 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff
9594 22:16:23.555948 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff
9595 22:16:23.562427 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff
9596 22:16:23.565585 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff
9597 22:16:23.572113 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff
9598 22:16:23.575445 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff
9599 22:16:23.579349 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff
9600 22:16:23.585942 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff
9601 22:16:23.588684 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff
9602 22:16:23.595308 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff
9603 22:16:23.598716 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff
9604 22:16:23.602489 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff
9605 22:16:23.608977 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff
9606 22:16:23.611989 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff
9607 22:16:23.618735 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff
9608 22:16:23.622445 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff
9609 22:16:23.625217 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff
9610 22:16:23.632183 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff
9611 22:16:23.635414 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff
9612 22:16:23.642177 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff
9613 22:16:23.645760 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff
9614 22:16:23.648682 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff
9615 22:16:23.655230 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff
9616 22:16:23.658651 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff
9617 22:16:23.665090 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff
9618 22:16:23.668166 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff
9619 22:16:23.671486 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff
9620 22:16:23.678468 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff
9621 22:16:23.681639 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff
9622 22:16:23.688130 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff
9623 22:16:23.691766 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff
9624 22:16:23.694846 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff
9625 22:16:23.701391 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff
9626 22:16:23.704647 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff
9627 22:16:23.711144 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff
9628 22:16:23.714454 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff
9629 22:16:23.721176 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff
9630 22:16:23.724349 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff
9631 22:16:23.727425 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff
9632 22:16:23.734262 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff
9633 22:16:23.738238 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff
9634 22:16:23.745092 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff
9635 22:16:23.747418 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff
9636 22:16:23.754330 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff
9637 22:16:23.757276 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff
9638 22:16:23.760819 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff
9639 22:16:23.767361 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff
9640 22:16:23.771007 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff
9641 22:16:23.777277 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff
9642 22:16:23.780765 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff
9643 22:16:23.786844 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff
9644 22:16:23.790661 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff
9645 22:16:23.795070 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff
9646 22:16:23.799986 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff
9647 22:16:23.803401 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff
9648 22:16:23.810255 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff
9649 22:16:23.813853 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff
9650 22:16:23.819634 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff
9651 22:16:23.823522 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff
9652 22:16:23.826445 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff
9653 22:16:23.832997 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff
9654 22:16:23.836330 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff
9655 22:16:23.843559 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff
9656 22:16:23.846112 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff
9657 22:16:23.852855 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff
9658 22:16:23.856115 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff
9659 22:16:23.859832 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff
9660 22:16:23.866203 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff
9661 22:16:23.870037 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff
9662 22:16:23.876251 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff
9663 22:16:23.879697 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0
9664 22:16:23.883147 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0
9665 22:16:23.885701 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0
9666 22:16:23.892387 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0
9667 22:16:23.896144 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0
9668 22:16:23.898814 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff
9669 22:16:23.905599 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff
9670 22:16:23.909022 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff
9671 22:16:23.912137 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff
9672 22:16:23.918417 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf
9673 22:16:23.921772 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff
9674 22:16:23.928366 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff
9675 22:16:23.931717 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff
9676 22:16:23.935335 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff
9677 22:16:23.942739 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf
9678 22:16:23.945264 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff
9679 22:16:23.948595 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff
9680 22:16:23.955804 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff
9681 22:16:23.958612 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff
9682 22:16:23.962128 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf
9683 22:16:23.968175 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff
9684 22:16:23.971973 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff
9685 22:16:23.978770 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff
9686 22:16:23.981601 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff
9687 22:16:23.984771 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf
9688 22:16:23.991731 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff
9689 22:16:23.994992 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff
9690 22:16:24.001732 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff
9691 22:16:24.004455 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff
9692 22:16:24.007735 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf
9693 22:16:24.014175 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff
9694 22:16:24.017797 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff
9695 22:16:24.020427 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff
9696 22:16:24.027369 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff
9697 22:16:24.030759 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf
9698 22:16:24.034360 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff
9699 22:16:24.040932 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff
9700 22:16:24.044055 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff
9701 22:16:24.050733 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff
9702 22:16:24.053948 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf
9703 22:16:24.057090 INFO: [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0
9704 22:16:24.060562 INFO: [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3
9705 22:16:24.066884 INFO: [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3
9706 22:16:24.070063 INFO: [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3
9707 22:16:24.073158 INFO: [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0
9708 22:16:24.076554 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400
9709 22:16:24.083631 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0
9710 22:16:24.086929 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0
9711 22:16:24.090235 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0
9712 22:16:24.093555 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0
9713 22:16:24.100290 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0
9714 22:16:24.103393 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000
9715 22:16:24.106174 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0
9716 22:16:24.113082 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff
9717 22:16:24.116431 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff
9718 22:16:24.123041 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff
9719 22:16:24.126329 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff
9720 22:16:24.129601 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff
9721 22:16:24.136165 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff
9722 22:16:24.140099 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff
9723 22:16:24.146737 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f
9724 22:16:24.149546 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3
9725 22:16:24.155930 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff
9726 22:16:24.158854 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff
9727 22:16:24.162512 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff
9728 22:16:24.169412 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff
9729 22:16:24.172546 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff
9730 22:16:24.179249 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff
9731 22:16:24.182109 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f
9732 22:16:24.185641 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff
9733 22:16:24.192034 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff
9734 22:16:24.195542 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff
9735 22:16:24.202097 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff
9736 22:16:24.205627 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff
9737 22:16:24.211621 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff
9738 22:16:24.215324 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff
9739 22:16:24.218420 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f
9740 22:16:24.225055 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff
9741 22:16:24.228231 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff
9742 22:16:24.235265 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff
9743 22:16:24.238909 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff
9744 22:16:24.244527 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff
9745 22:16:24.248305 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff
9746 22:16:24.252026 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff
9747 22:16:24.257940 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f
9748 22:16:24.261161 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff
9749 22:16:24.267664 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff
9750 22:16:24.270633 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff
9751 22:16:24.278000 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff
9752 22:16:24.281202 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff
9753 22:16:24.284338 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff
9754 22:16:24.291015 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff
9755 22:16:24.294369 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f
9756 22:16:24.297415 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff
9757 22:16:24.304431 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff
9758 22:16:24.307321 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff
9759 22:16:24.314054 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff
9760 22:16:24.317223 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff
9761 22:16:24.323836 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff
9762 22:16:24.327133 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff
9763 22:16:24.330651 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f
9764 22:16:24.337123 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff
9765 22:16:24.340972 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff
9766 22:16:24.346601 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff
9767 22:16:24.350466 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff
9768 22:16:24.356875 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff
9769 22:16:24.360215 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff
9770 22:16:24.366610 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff
9771 22:16:24.370059 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f
9772 22:16:24.373316 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff
9773 22:16:24.380234 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff
9774 22:16:24.383027 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff
9775 22:16:24.390146 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff
9776 22:16:24.393142 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff
9777 22:16:24.396732 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff
9778 22:16:24.403569 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff
9779 22:16:24.406715 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f
9780 22:16:24.413255 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff
9781 22:16:24.416221 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff
9782 22:16:24.419893 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff
9783 22:16:24.426525 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff
9784 22:16:24.429420 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff
9785 22:16:24.435899 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff
9786 22:16:24.439654 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff
9787 22:16:24.442948 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f
9788 22:16:24.449002 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff
9789 22:16:24.453090 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff
9790 22:16:24.459273 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff
9791 22:16:24.463263 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff
9792 22:16:24.469065 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff
9793 22:16:24.472450 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff
9794 22:16:24.479124 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff
9795 22:16:24.482531 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f
9796 22:16:24.485474 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff
9797 22:16:24.493149 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff
9798 22:16:24.495458 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff
9799 22:16:24.501608 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff
9800 22:16:24.505128 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff
9801 22:16:24.512128 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff
9802 22:16:24.515155 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff
9803 22:16:24.518753 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f
9804 22:16:24.525410 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff
9805 22:16:24.528032 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff
9806 22:16:24.534801 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff
9807 22:16:24.538121 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff
9808 22:16:24.545121 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff
9809 22:16:24.548410 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff
9810 22:16:24.555004 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff
9811 22:16:24.557908 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f
9812 22:16:24.564520 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff
9813 22:16:24.567814 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff
9814 22:16:24.572322 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff
9815 22:16:24.577644 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff
9816 22:16:24.581016 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff
9817 22:16:24.588331 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff
9818 22:16:24.590852 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff
9819 22:16:24.597814 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f
9820 22:16:24.600667 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff
9821 22:16:24.607472 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff
9822 22:16:24.611294 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff
9823 22:16:24.613891 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff
9824 22:16:24.620577 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff
9825 22:16:24.623969 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff
9826 22:16:24.630512 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff
9827 22:16:24.633790 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f
9828 22:16:24.640664 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff
9829 22:16:24.643692 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff
9830 22:16:24.650496 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff
9831 22:16:24.653677 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff
9832 22:16:24.657086 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff
9833 22:16:24.663707 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff
9834 22:16:24.666490 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff
9835 22:16:24.673129 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f
9836 22:16:24.676439 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0
9837 22:16:24.683305 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000
9838 22:16:24.686262 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff
9839 22:16:24.693350 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff
9840 22:16:24.696336 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3
9841 22:16:24.702886 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff
9842 22:16:24.706409 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff
9843 22:16:24.709574 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff
9844 22:16:24.716273 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff
9845 22:16:24.719839 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff
9846 22:16:24.726262 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff
9847 22:16:24.729260 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff
9848 22:16:24.736613 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff
9849 22:16:24.739362 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff
9850 22:16:24.745826 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff
9851 22:16:24.749817 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff
9852 22:16:24.755652 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff
9853 22:16:24.759292 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff
9854 22:16:24.765974 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff
9855 22:16:24.769126 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff
9856 22:16:24.776274 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff
9857 22:16:24.779425 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff
9858 22:16:24.785081 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff
9859 22:16:24.788849 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff
9860 22:16:24.795382 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff
9861 22:16:24.798710 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff
9862 22:16:24.804811 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff
9863 22:16:24.811692 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff
9864 22:16:24.815030 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff
9865 22:16:24.821502 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff
9866 22:16:24.824796 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff
9867 22:16:24.831264 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff
9868 22:16:24.835013 INFO: [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0
9869 22:16:24.835629 INFO: [APUAPC] vio 0
9870 22:16:24.842157 INFO: [APUAPC] set_apusys_ao_apc - SUCCESS!
9871 22:16:24.845158 INFO: [APUAPC] set_apusys_noc_dapc - SUCCESS!
9872 22:16:24.848591 INFO: [APUAPC] D0_APC_0: 0x400510
9873 22:16:24.852151 INFO: [APUAPC] D0_APC_1: 0x0
9874 22:16:24.855556 INFO: [APUAPC] D0_APC_2: 0x1540
9875 22:16:24.858593 INFO: [APUAPC] D0_APC_3: 0x0
9876 22:16:24.861821 INFO: [APUAPC] D1_APC_0: 0xffffffff
9877 22:16:24.865665 INFO: [APUAPC] D1_APC_1: 0xffffffff
9878 22:16:24.868890 INFO: [APUAPC] D1_APC_2: 0x3fffff
9879 22:16:24.871702 INFO: [APUAPC] D1_APC_3: 0x0
9880 22:16:24.875665 INFO: [APUAPC] D2_APC_0: 0xffffffff
9881 22:16:24.878680 INFO: [APUAPC] D2_APC_1: 0xffffffff
9882 22:16:24.881533 INFO: [APUAPC] D2_APC_2: 0x3fffff
9883 22:16:24.885455 INFO: [APUAPC] D2_APC_3: 0x0
9884 22:16:24.888786 INFO: [APUAPC] D3_APC_0: 0xffffffff
9885 22:16:24.891707 INFO: [APUAPC] D3_APC_1: 0xffffffff
9886 22:16:24.895207 INFO: [APUAPC] D3_APC_2: 0x3fffff
9887 22:16:24.898937 INFO: [APUAPC] D3_APC_3: 0x0
9888 22:16:24.901916 INFO: [APUAPC] D4_APC_0: 0xffffffff
9889 22:16:24.904759 INFO: [APUAPC] D4_APC_1: 0xffffffff
9890 22:16:24.908041 INFO: [APUAPC] D4_APC_2: 0x3fffff
9891 22:16:24.911963 INFO: [APUAPC] D4_APC_3: 0x0
9892 22:16:24.914902 INFO: [APUAPC] D5_APC_0: 0xffffffff
9893 22:16:24.918146 INFO: [APUAPC] D5_APC_1: 0xffffffff
9894 22:16:24.922405 INFO: [APUAPC] D5_APC_2: 0x3fffff
9895 22:16:24.922976 INFO: [APUAPC] D5_APC_3: 0x0
9896 22:16:24.925017 INFO: [APUAPC] D6_APC_0: 0xffffffff
9897 22:16:24.931268 INFO: [APUAPC] D6_APC_1: 0xffffffff
9898 22:16:24.935086 INFO: [APUAPC] D6_APC_2: 0x3fffff
9899 22:16:24.935705 INFO: [APUAPC] D6_APC_3: 0x0
9900 22:16:24.938838 INFO: [APUAPC] D7_APC_0: 0xffffffff
9901 22:16:24.941775 INFO: [APUAPC] D7_APC_1: 0xffffffff
9902 22:16:24.944683 INFO: [APUAPC] D7_APC_2: 0x3fffff
9903 22:16:24.948178 INFO: [APUAPC] D7_APC_3: 0x0
9904 22:16:24.951882 INFO: [APUAPC] D8_APC_0: 0xffffffff
9905 22:16:24.954885 INFO: [APUAPC] D8_APC_1: 0xffffffff
9906 22:16:24.958021 INFO: [APUAPC] D8_APC_2: 0x3fffff
9907 22:16:24.961280 INFO: [APUAPC] D8_APC_3: 0x0
9908 22:16:24.964324 INFO: [APUAPC] D9_APC_0: 0xffffffff
9909 22:16:24.967838 INFO: [APUAPC] D9_APC_1: 0xffffffff
9910 22:16:24.971612 INFO: [APUAPC] D9_APC_2: 0x3fffff
9911 22:16:24.975328 INFO: [APUAPC] D9_APC_3: 0x0
9912 22:16:24.977656 INFO: [APUAPC] D10_APC_0: 0xffffffff
9913 22:16:24.980967 INFO: [APUAPC] D10_APC_1: 0xffffffff
9914 22:16:24.984420 INFO: [APUAPC] D10_APC_2: 0x3fffff
9915 22:16:24.988302 INFO: [APUAPC] D10_APC_3: 0x0
9916 22:16:24.990473 INFO: [APUAPC] D11_APC_0: 0xffffffff
9917 22:16:24.994209 INFO: [APUAPC] D11_APC_1: 0xffffffff
9918 22:16:24.997888 INFO: [APUAPC] D11_APC_2: 0x3fffff
9919 22:16:25.000986 INFO: [APUAPC] D11_APC_3: 0x0
9920 22:16:25.003812 INFO: [APUAPC] D12_APC_0: 0xffffffff
9921 22:16:25.007209 INFO: [APUAPC] D12_APC_1: 0xffffffff
9922 22:16:25.010372 INFO: [APUAPC] D12_APC_2: 0x3fffff
9923 22:16:25.014124 INFO: [APUAPC] D12_APC_3: 0x0
9924 22:16:25.017522 INFO: [APUAPC] D13_APC_0: 0xffffffff
9925 22:16:25.024663 INFO: [APUAPC] D13_APC_1: 0xffffffff
9926 22:16:25.026937 INFO: [APUAPC] D13_APC_2: 0x3fffff
9927 22:16:25.027457 INFO: [APUAPC] D13_APC_3: 0x0
9928 22:16:25.033818 INFO: [APUAPC] D14_APC_0: 0xffffffff
9929 22:16:25.037422 INFO: [APUAPC] D14_APC_1: 0xffffffff
9930 22:16:25.040710 INFO: [APUAPC] D14_APC_2: 0x3fffff
9931 22:16:25.041278 INFO: [APUAPC] D14_APC_3: 0x0
9932 22:16:25.046677 INFO: [APUAPC] D15_APC_0: 0xffffffff
9933 22:16:25.049943 INFO: [APUAPC] D15_APC_1: 0xffffffff
9934 22:16:25.053738 INFO: [APUAPC] D15_APC_2: 0x3fffff
9935 22:16:25.057057 INFO: [APUAPC] D15_APC_3: 0x0
9936 22:16:25.057625 INFO: [APUAPC] APC_CON: 0x4
9937 22:16:25.060145 INFO: [NOCDAPC] D0_APC_0: 0x0
9938 22:16:25.064114 INFO: [NOCDAPC] D0_APC_1: 0x0
9939 22:16:25.066495 INFO: [NOCDAPC] D1_APC_0: 0x0
9940 22:16:25.069802 INFO: [NOCDAPC] D1_APC_1: 0xfff
9941 22:16:25.073822 INFO: [NOCDAPC] D2_APC_0: 0x0
9942 22:16:25.077143 INFO: [NOCDAPC] D2_APC_1: 0xfff
9943 22:16:25.079942 INFO: [NOCDAPC] D3_APC_0: 0x0
9944 22:16:25.082942 INFO: [NOCDAPC] D3_APC_1: 0xfff
9945 22:16:25.087088 INFO: [NOCDAPC] D4_APC_0: 0x0
9946 22:16:25.087710 INFO: [NOCDAPC] D4_APC_1: 0xfff
9947 22:16:25.090254 INFO: [NOCDAPC] D5_APC_0: 0x0
9948 22:16:25.093080 INFO: [NOCDAPC] D5_APC_1: 0xfff
9949 22:16:25.096271 INFO: [NOCDAPC] D6_APC_0: 0x0
9950 22:16:25.099225 INFO: [NOCDAPC] D6_APC_1: 0xfff
9951 22:16:25.102538 INFO: [NOCDAPC] D7_APC_0: 0x0
9952 22:16:25.106117 INFO: [NOCDAPC] D7_APC_1: 0xfff
9953 22:16:25.109687 INFO: [NOCDAPC] D8_APC_0: 0x0
9954 22:16:25.112448 INFO: [NOCDAPC] D8_APC_1: 0xfff
9955 22:16:25.115987 INFO: [NOCDAPC] D9_APC_0: 0x0
9956 22:16:25.119327 INFO: [NOCDAPC] D9_APC_1: 0xfff
9957 22:16:25.123065 INFO: [NOCDAPC] D10_APC_0: 0x0
9958 22:16:25.126111 INFO: [NOCDAPC] D10_APC_1: 0xfff
9959 22:16:25.126600 INFO: [NOCDAPC] D11_APC_0: 0x0
9960 22:16:25.129583 INFO: [NOCDAPC] D11_APC_1: 0xfff
9961 22:16:25.132523 INFO: [NOCDAPC] D12_APC_0: 0x0
9962 22:16:25.135793 INFO: [NOCDAPC] D12_APC_1: 0xfff
9963 22:16:25.139520 INFO: [NOCDAPC] D13_APC_0: 0x0
9964 22:16:25.142907 INFO: [NOCDAPC] D13_APC_1: 0xfff
9965 22:16:25.146194 INFO: [NOCDAPC] D14_APC_0: 0x0
9966 22:16:25.149109 INFO: [NOCDAPC] D14_APC_1: 0xfff
9967 22:16:25.152590 INFO: [NOCDAPC] D15_APC_0: 0x0
9968 22:16:25.156146 INFO: [NOCDAPC] D15_APC_1: 0xfff
9969 22:16:25.159013 INFO: [NOCDAPC] APC_CON: 0x4
9970 22:16:25.162359 INFO: [APUAPC] set_apusys_apc done
9971 22:16:25.165776 INFO: [DEVAPC] devapc_init done
9972 22:16:25.168925 INFO: GICv3 without legacy support detected.
9973 22:16:25.172181 INFO: ARM GICv3 driver initialized in EL3
9974 22:16:25.175745 INFO: Maximum SPI INTID supported: 639
9975 22:16:25.179285 INFO: BL31: Initializing runtime services
9976 22:16:25.185781 WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!
9977 22:16:25.188765 INFO: SPM: enable CPC mode
9978 22:16:25.195399 INFO: mcdi ready for mcusys-off-idle and system suspend
9979 22:16:25.198707 INFO: BL31: Preparing for EL3 exit to normal world
9980 22:16:25.201588 INFO: Entry point address = 0x80000000
9981 22:16:25.205601 INFO: SPSR = 0x8
9982 22:16:25.210170
9983 22:16:25.210736
9984 22:16:25.211108
9985 22:16:25.213892 Starting depthcharge on Spherion...
9986 22:16:25.214461
9987 22:16:25.214833 Wipe memory regions:
9988 22:16:25.215216
9989 22:16:25.217717 end: 2.2.3 depthcharge-start (duration 00:00:29) [common]
9990 22:16:25.218260 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
9991 22:16:25.218724 Setting prompt string to ['asurada:']
9992 22:16:25.219161 bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:25)
9993 22:16:25.219926 [0x00000040000000, 0x00000054600000)
9994 22:16:25.339459
9995 22:16:25.340021 [0x00000054660000, 0x00000080000000)
9996 22:16:25.601029
9997 22:16:25.601589 [0x000000821a7280, 0x000000ffe64000)
9998 22:16:26.345452
9999 22:16:26.346014 [0x00000100000000, 0x00000240000000)
10000 22:16:28.235303
10001 22:16:28.238170 Initializing XHCI USB controller at 0x11200000.
10002 22:16:29.276568
10003 22:16:29.279949 [firmware-asurada-13885.B-collabora] Dec 7 2021 09:38:38
10004 22:16:29.280510
10005 22:16:29.280877
10006 22:16:29.281220
10007 22:16:29.281998 Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10009 22:16:29.383439 asurada: tftpboot 192.168.201.1 10583909/tftp-deploy-im2kix39/kernel/image.itb 10583909/tftp-deploy-im2kix39/kernel/cmdline
10010 22:16:29.384101 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10011 22:16:29.384602 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:21)
10012 22:16:29.389662 tftpboot 192.168.201.1 10583909/tftp-deploy-im2kix39/kernel/image.ittp-deploy-im2kix39/kernel/cmdline
10013 22:16:29.390237
10014 22:16:29.390612 Waiting for link
10015 22:16:29.550048
10016 22:16:29.550613 R8152: Initializing
10017 22:16:29.550991
10018 22:16:29.553047 Version 6 (ocp_data = 5c30)
10019 22:16:29.553542
10020 22:16:29.556041 R8152: Done initializing
10021 22:16:29.556503
10022 22:16:29.556870 Adding net device
10023 22:16:31.518008
10024 22:16:31.518580 done.
10025 22:16:31.518948
10026 22:16:31.519341 MAC: 00:24:32:30:7c:7b
10027 22:16:31.519689
10028 22:16:31.520758 Sending DHCP discover... done.
10029 22:16:31.521218
10030 22:16:31.524059 Waiting for reply... done.
10031 22:16:31.524522
10032 22:16:31.527091 Sending DHCP request... done.
10033 22:16:31.527591
10034 22:16:31.527961 Waiting for reply... done.
10035 22:16:31.528307
10036 22:16:31.530404 My ip is 192.168.201.14
10037 22:16:31.530863
10038 22:16:31.533694 The DHCP server ip is 192.168.201.1
10039 22:16:31.534113
10040 22:16:31.537756 TFTP server IP predefined by user: 192.168.201.1
10041 22:16:31.538283
10042 22:16:31.543619 Bootfile predefined by user: 10583909/tftp-deploy-im2kix39/kernel/image.itb
10043 22:16:31.544085
10044 22:16:31.547046 Sending tftp read request... done.
10045 22:16:31.547510
10046 22:16:31.556090 Waiting for the transfer...
10047 22:16:31.556767
10048 22:16:32.280226 00000000 ################################################################
10049 22:16:32.280788
10050 22:16:33.001275 00080000 ################################################################
10051 22:16:33.001816
10052 22:16:33.728811 00100000 ################################################################
10053 22:16:33.729434
10054 22:16:34.447074 00180000 ################################################################
10055 22:16:34.447717
10056 22:16:35.167780 00200000 ################################################################
10057 22:16:35.168382
10058 22:16:35.886576 00280000 ################################################################
10059 22:16:35.887203
10060 22:16:36.601483 00300000 ################################################################
10061 22:16:36.602060
10062 22:16:37.336941 00380000 ################################################################
10063 22:16:37.337525
10064 22:16:38.068423 00400000 ################################################################
10065 22:16:38.068985
10066 22:16:38.781936 00480000 ################################################################
10067 22:16:38.782471
10068 22:16:39.500104 00500000 ################################################################
10069 22:16:39.500705
10070 22:16:40.214499 00580000 ################################################################
10071 22:16:40.215075
10072 22:16:40.922234 00600000 ################################################################
10073 22:16:40.922768
10074 22:16:41.648873 00680000 ################################################################
10075 22:16:41.649458
10076 22:16:42.365795 00700000 ################################################################
10077 22:16:42.366367
10078 22:16:43.088774 00780000 ################################################################
10079 22:16:43.089355
10080 22:16:43.813686 00800000 ################################################################
10081 22:16:43.814255
10082 22:16:44.537587 00880000 ################################################################
10083 22:16:44.538134
10084 22:16:45.250573 00900000 ################################################################
10085 22:16:45.251130
10086 22:16:45.966784 00980000 ################################################################
10087 22:16:45.967401
10088 22:16:46.677635 00a00000 ################################################################
10089 22:16:46.678210
10090 22:16:47.408979 00a80000 ################################################################
10091 22:16:47.409534
10092 22:16:48.139044 00b00000 ################################################################
10093 22:16:48.139652
10094 22:16:48.858577 00b80000 ################################################################
10095 22:16:48.859159
10096 22:16:49.585312 00c00000 ################################################################
10097 22:16:49.585835
10098 22:16:50.296140 00c80000 ################################################################
10099 22:16:50.296691
10100 22:16:51.024393 00d00000 ################################################################
10101 22:16:51.024969
10102 22:16:51.747663 00d80000 ################################################################
10103 22:16:51.748192
10104 22:16:52.445520 00e00000 ################################################################
10105 22:16:52.446098
10106 22:16:53.161062 00e80000 ################################################################
10107 22:16:53.161608
10108 22:16:53.868426 00f00000 ################################################################
10109 22:16:53.868953
10110 22:16:54.557827 00f80000 ################################################################
10111 22:16:54.558524
10112 22:16:55.255414 01000000 ################################################################
10113 22:16:55.255972
10114 22:16:55.966655 01080000 ################################################################
10115 22:16:55.967199
10116 22:16:56.694342 01100000 ################################################################
10117 22:16:56.694901
10118 22:16:57.405328 01180000 ################################################################
10119 22:16:57.405877
10120 22:16:58.123424 01200000 ################################################################
10121 22:16:58.123965
10122 22:16:58.837826 01280000 ################################################################
10123 22:16:58.838370
10124 22:16:59.555586 01300000 ################################################################
10125 22:16:59.556190
10126 22:17:00.269863 01380000 ################################################################
10127 22:17:00.270413
10128 22:17:00.982289 01400000 ################################################################
10129 22:17:00.982823
10130 22:17:01.690611 01480000 ################################################################
10131 22:17:01.691313
10132 22:17:02.405876 01500000 ################################################################
10133 22:17:02.406405
10134 22:17:03.131517 01580000 ################################################################
10135 22:17:03.132044
10136 22:17:03.844720 01600000 ################################################################
10137 22:17:03.845255
10138 22:17:04.570466 01680000 ################################################################
10139 22:17:04.571020
10140 22:17:05.275477 01700000 ################################################################
10141 22:17:05.276007
10142 22:17:05.998392 01780000 ################################################################
10143 22:17:05.998933
10144 22:17:06.721484 01800000 ################################################################
10145 22:17:06.722062
10146 22:17:07.455642 01880000 ################################################################
10147 22:17:07.456189
10148 22:17:08.173170 01900000 ################################################################
10149 22:17:08.173705
10150 22:17:08.895872 01980000 ################################################################
10151 22:17:08.896426
10152 22:17:09.606603 01a00000 ################################################################
10153 22:17:09.607121
10154 22:17:10.331093 01a80000 ################################################################
10155 22:17:10.331664
10156 22:17:11.052313 01b00000 ################################################################
10157 22:17:11.052828
10158 22:17:11.764222 01b80000 ################################################################
10159 22:17:11.764743
10160 22:17:12.481429 01c00000 ################################################################
10161 22:17:12.481963
10162 22:17:13.187282 01c80000 ################################################################
10163 22:17:13.187801
10164 22:17:13.882508 01d00000 ################################################################
10165 22:17:13.883056
10166 22:17:14.595018 01d80000 ################################################################
10167 22:17:14.595612
10168 22:17:15.298044 01e00000 ################################################################
10169 22:17:15.298590
10170 22:17:16.020494 01e80000 ################################################################
10171 22:17:16.021028
10172 22:17:16.748778 01f00000 ################################################################
10173 22:17:16.749437
10174 22:17:17.476974 01f80000 ################################################################
10175 22:17:17.477524
10176 22:17:18.192118 02000000 ################################################################
10177 22:17:18.192662
10178 22:17:18.904838 02080000 ################################################################
10179 22:17:18.905435
10180 22:17:19.620154 02100000 ################################################################
10181 22:17:19.620678
10182 22:17:20.334886 02180000 ################################################################
10183 22:17:20.335454
10184 22:17:21.043971 02200000 ################################################################
10185 22:17:21.044527
10186 22:17:21.756653 02280000 ################################################################
10187 22:17:21.757220
10188 22:17:22.468759 02300000 ################################################################
10189 22:17:22.469277
10190 22:17:23.186119 02380000 ################################################################
10191 22:17:23.186707
10192 22:17:23.894174 02400000 ################################################################
10193 22:17:23.894775
10194 22:17:24.610028 02480000 ################################################################
10195 22:17:24.610614
10196 22:17:25.318395 02500000 ################################################################
10197 22:17:25.318938
10198 22:17:26.040678 02580000 ################################################################
10199 22:17:26.041240
10200 22:17:26.746122 02600000 ################################################################
10201 22:17:26.746660
10202 22:17:27.470896 02680000 ################################################################
10203 22:17:27.471531
10204 22:17:28.193395 02700000 ################################################################
10205 22:17:28.193935
10206 22:17:28.915548 02780000 ################################################################
10207 22:17:28.916135
10208 22:17:29.631956 02800000 ################################################################
10209 22:17:29.632524
10210 22:17:30.340259 02880000 ################################################################
10211 22:17:30.340828
10212 22:17:31.042150 02900000 ################################################################
10213 22:17:31.042677
10214 22:17:31.748006 02980000 ################################################################
10215 22:17:31.748535
10216 22:17:32.448690 02a00000 ################################################################
10217 22:17:32.449261
10218 22:17:33.152592 02a80000 ################################################################
10219 22:17:33.153140
10220 22:17:33.875121 02b00000 ################################################################
10221 22:17:33.875700
10222 22:17:34.585020 02b80000 ################################################################
10223 22:17:34.585575
10224 22:17:35.277564 02c00000 ################################################################
10225 22:17:35.278096
10226 22:17:35.984387 02c80000 ################################################################
10227 22:17:35.984922
10228 22:17:36.709288 02d00000 ################################################################
10229 22:17:36.709880
10230 22:17:37.440093 02d80000 ################################################################
10231 22:17:37.440686
10232 22:17:38.168014 02e00000 ################################################################
10233 22:17:38.168580
10234 22:17:38.886467 02e80000 ################################################################
10235 22:17:38.887001
10236 22:17:39.578229 02f00000 ################################################################
10237 22:17:39.578822
10238 22:17:40.269911 02f80000 ################################################################
10239 22:17:40.270440
10240 22:17:40.999901 03000000 ################################################################
10241 22:17:41.000449
10242 22:17:41.717842 03080000 ################################################################
10243 22:17:41.718359
10244 22:17:42.426446 03100000 ################################################################
10245 22:17:42.426970
10246 22:17:43.140802 03180000 ################################################################
10247 22:17:43.141322
10248 22:17:43.859331 03200000 ################################################################
10249 22:17:43.859845
10250 22:17:44.577520 03280000 ################################################################
10251 22:17:44.578106
10252 22:17:45.304036 03300000 ################################################################
10253 22:17:45.304594
10254 22:17:46.031509 03380000 ################################################################
10255 22:17:46.032075
10256 22:17:46.740821 03400000 ################################################################
10257 22:17:46.741375
10258 22:17:47.460376 03480000 ################################################################
10259 22:17:47.460977
10260 22:17:48.199091 03500000 ################################################################
10261 22:17:48.199670
10262 22:17:48.894867 03580000 ################################################################
10263 22:17:48.895420
10264 22:17:49.582124 03600000 ################################################################
10265 22:17:49.582677
10266 22:17:50.275716 03680000 ################################################################
10267 22:17:50.276235
10268 22:17:50.989397 03700000 ################################################################
10269 22:17:50.990052
10270 22:17:51.712041 03780000 ################################################################
10271 22:17:51.712644
10272 22:17:52.442709 03800000 ################################################################
10273 22:17:52.443281
10274 22:17:53.167990 03880000 ################################################################
10275 22:17:53.168511
10276 22:17:53.885302 03900000 ################################################################
10277 22:17:53.885829
10278 22:17:54.616407 03980000 ################################################################
10279 22:17:54.616922
10280 22:17:55.350421 03a00000 ################################################################
10281 22:17:55.351047
10282 22:17:56.082438 03a80000 ################################################################
10283 22:17:56.083053
10284 22:17:56.812608 03b00000 ################################################################
10285 22:17:56.813213
10286 22:17:57.552342 03b80000 ################################################################
10287 22:17:57.552886
10288 22:17:58.276410 03c00000 ################################################################
10289 22:17:58.276955
10290 22:17:58.998209 03c80000 ################################################################
10291 22:17:58.998734
10292 22:17:59.721566 03d00000 ################################################################
10293 22:17:59.722103
10294 22:18:00.423746 03d80000 ################################################################
10295 22:18:00.424326
10296 22:18:01.139457 03e00000 ################################################################
10297 22:18:01.139989
10298 22:18:01.851225 03e80000 ################################################################
10299 22:18:01.851793
10300 22:18:02.449596 03f00000 ####################################################### done.
10301 22:18:02.450115
10302 22:18:02.452858 The bootfile was 66503730 bytes long.
10303 22:18:02.453312
10304 22:18:02.456202 Sending tftp read request... done.
10305 22:18:02.456625
10306 22:18:02.459514 Waiting for the transfer...
10307 22:18:02.459935
10308 22:18:02.460273 00000000 # done.
10309 22:18:02.462963
10310 22:18:02.469283 Command line loaded dynamically from TFTP file: 10583909/tftp-deploy-im2kix39/kernel/cmdline
10311 22:18:02.469793
10312 22:18:02.479645 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10313 22:18:02.480182
10314 22:18:02.482804 Loading FIT.
10315 22:18:02.483369
10316 22:18:02.486149 Image ramdisk-1 has 56373041 bytes.
10317 22:18:02.486676
10318 22:18:02.487077 Image fdt-1 has 46924 bytes.
10319 22:18:02.489326
10320 22:18:02.489761 Image kernel-1 has 10081729 bytes.
10321 22:18:02.490100
10322 22:18:02.498661 Compat preference: google,spherion-rev2-sku1 google,spherion-rev2 google,spherion-sku1 google,spherion
10323 22:18:02.499167
10324 22:18:02.515288 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 google,spherion-rev2 (match) google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192
10325 22:18:02.518722
10326 22:18:02.523289 Choosing best match conf-1 for compat google,spherion-rev2.
10327 22:18:02.526740
10328 22:18:02.531136 Connected to device vid:did:rid of 1ae0:0028:00
10329 22:18:02.537853
10330 22:18:02.541386 tpm_get_response: command 0x17b, return code 0x0
10331 22:18:02.541810
10332 22:18:02.544459 ec_init: CrosEC protocol v3 supported (256, 248)
10333 22:18:02.548320
10334 22:18:02.551736 tpm_cleanup: add release locality here.
10335 22:18:02.552271
10336 22:18:02.552605 Shutting down all USB controllers.
10337 22:18:02.554926
10338 22:18:02.555372 Removing current net device
10339 22:18:02.555702
10340 22:18:02.562688 Exiting depthcharge with code 4 at timestamp: 126580697
10341 22:18:02.563236
10342 22:18:02.564939 LZMA decompressing kernel-1 to 0x821a6718
10343 22:18:02.565352
10344 22:18:02.568750 LZMA decompressing kernel-1 to 0x40000000
10345 22:18:03.836118
10346 22:18:03.836697 jumping to kernel
10347 22:18:03.838317 end: 2.2.4 bootloader-commands (duration 00:01:39) [common]
10348 22:18:03.838858 start: 2.2.5 auto-login-action (timeout 00:02:47) [common]
10349 22:18:03.839300 Setting prompt string to ['Linux version [0-9]']
10350 22:18:03.839689 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10351 22:18:03.840073 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10352 22:18:03.918585
10353 22:18:03.921987 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
10354 22:18:03.925718 start: 2.2.5.1 login-action (timeout 00:02:47) [common]
10355 22:18:03.926306 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10356 22:18:03.926773 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10357 22:18:03.927216 Using line separator: #'\n'#
10358 22:18:03.927569 No login prompt set.
10359 22:18:03.927923 Parsing kernel messages
10360 22:18:03.928240 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10361 22:18:03.929125 [login-action] Waiting for messages, (timeout 00:02:47)
10362 22:18:03.945081 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1606555-arm64-gcc-10-defconfig-arm64-chromebook-vtq55) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 4 21:56:05 UTC 2023
10363 22:18:03.947572 [ 0.000000] random: crng init done
10364 22:18:03.954262 [ 0.000000] Machine model: Google Spherion (rev0 - 3)
10365 22:18:03.954445 [ 0.000000] efi: UEFI not found.
10366 22:18:03.964356 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
10367 22:18:03.971532 [ 0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool
10368 22:18:03.981640 [ 0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB
10369 22:18:03.991119 [ 0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool
10370 22:18:03.997873 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
10371 22:18:04.004040 [ 0.000000] printk: bootconsole [mtk8250] enabled
10372 22:18:04.011019 [ 0.000000] NUMA: No NUMA configuration found
10373 22:18:04.017198 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000023fffffff]
10374 22:18:04.021337 [ 0.000000] NUMA: NODE_DATA [mem 0x23efcca00-0x23efcefff]
10375 22:18:04.024659 [ 0.000000] Zone ranges:
10376 22:18:04.030443 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
10377 22:18:04.033527 [ 0.000000] DMA32 empty
10378 22:18:04.040674 [ 0.000000] Normal [mem 0x0000000100000000-0x000000023fffffff]
10379 22:18:04.043646 [ 0.000000] Movable zone start for each node
10380 22:18:04.047367 [ 0.000000] Early memory node ranges
10381 22:18:04.053545 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
10382 22:18:04.060977 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
10383 22:18:04.066586 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
10384 22:18:04.073339 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
10385 22:18:04.080153 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000023fffffff]
10386 22:18:04.086752 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000023fffffff]
10387 22:18:04.142044 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
10388 22:18:04.148996 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
10389 22:18:04.155157 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
10390 22:18:04.158629 [ 0.000000] psci: probing for conduit method from DT.
10391 22:18:04.165681 [ 0.000000] psci: PSCIv1.1 detected in firmware.
10392 22:18:04.169045 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
10393 22:18:04.174768 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
10394 22:18:04.178585 [ 0.000000] psci: SMC Calling Convention v1.2
10395 22:18:04.185201 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
10396 22:18:04.188696 [ 0.000000] Detected VIPT I-cache on CPU0
10397 22:18:04.194927 [ 0.000000] CPU features: detected: GIC system register CPU interface
10398 22:18:04.202165 [ 0.000000] CPU features: detected: Virtualization Host Extensions
10399 22:18:04.208148 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
10400 22:18:04.214795 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
10401 22:18:04.224581 [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
10402 22:18:04.231644 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
10403 22:18:04.235488 [ 0.000000] alternatives: applying boot alternatives
10404 22:18:04.241884 [ 0.000000] Fallback order for Node 0: 0
10405 22:18:04.247325 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2063616
10406 22:18:04.250644 [ 0.000000] Policy zone: Normal
10407 22:18:04.260540 [ 0.000000] Kernel command line: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10408 22:18:04.275096 <5>[ 0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.
10409 22:18:04.284218 <6>[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
10410 22:18:04.294353 <6>[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
10411 22:18:04.300828 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
10412 22:18:04.304221 <6>[ 0.000000] software IO TLB: area num 8.
10413 22:18:04.360837 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
10414 22:18:04.510088 <6>[ 0.000000] Memory: 7917884K/8385536K available (17984K kernel code, 4098K rwdata, 14068K rodata, 8384K init, 615K bss, 434884K reserved, 32768K cma-reserved)
10415 22:18:04.516040 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
10416 22:18:04.522924 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
10417 22:18:04.526552 <6>[ 0.000000] rcu: RCU event tracing is enabled.
10418 22:18:04.533058 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
10419 22:18:04.539079 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
10420 22:18:04.542318 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
10421 22:18:04.552998 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
10422 22:18:04.559324 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
10423 22:18:04.565534 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
10424 22:18:04.572265 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
10425 22:18:04.575330 <6>[ 0.000000] GICv3: 608 SPIs implemented
10426 22:18:04.579434 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
10427 22:18:04.585475 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
10428 22:18:04.588830 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
10429 22:18:04.595622 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000
10430 22:18:04.608459 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
10431 22:18:04.621949 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
10432 22:18:04.628132 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
10433 22:18:04.636022 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
10434 22:18:04.649446 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
10435 22:18:04.655654 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
10436 22:18:04.663012 <6>[ 0.009228] Console: colour dummy device 80x25
10437 22:18:04.672774 <6>[ 0.013984] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
10438 22:18:04.678962 <6>[ 0.024490] pid_max: default: 32768 minimum: 301
10439 22:18:04.682401 <6>[ 0.029363] LSM: Security Framework initializing
10440 22:18:04.688991 <6>[ 0.034301] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10441 22:18:04.699059 <6>[ 0.042163] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10442 22:18:04.708870 <6>[ 0.051601] cblist_init_generic: Setting adjustable number of callback queues.
10443 22:18:04.715741 <6>[ 0.059055] cblist_init_generic: Setting shift to 3 and lim to 1.
10444 22:18:04.718988 <6>[ 0.065392] cblist_init_generic: Setting shift to 3 and lim to 1.
10445 22:18:04.725412 <6>[ 0.071837] rcu: Hierarchical SRCU implementation.
10446 22:18:04.732353 <6>[ 0.076850] rcu: Max phase no-delay instances is 1000.
10447 22:18:04.738668 <6>[ 0.083863] EFI services will not be available.
10448 22:18:04.741824 <6>[ 0.088833] smp: Bringing up secondary CPUs ...
10449 22:18:04.749505 <6>[ 0.093886] Detected VIPT I-cache on CPU1
10450 22:18:04.756772 <6>[ 0.093961] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
10451 22:18:04.763281 <6>[ 0.093989] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
10452 22:18:04.766521 <6>[ 0.094322] Detected VIPT I-cache on CPU2
10453 22:18:04.776084 <6>[ 0.094375] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000
10454 22:18:04.783156 <6>[ 0.094392] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]
10455 22:18:04.785831 <6>[ 0.094654] Detected VIPT I-cache on CPU3
10456 22:18:04.792341 <6>[ 0.094702] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000
10457 22:18:04.799416 <6>[ 0.094716] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]
10458 22:18:04.806268 <6>[ 0.095023] CPU features: detected: Spectre-v4
10459 22:18:04.809231 <6>[ 0.095029] CPU features: detected: Spectre-BHB
10460 22:18:04.812229 <6>[ 0.095035] Detected PIPT I-cache on CPU4
10461 22:18:04.818742 <6>[ 0.095094] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000
10462 22:18:04.828754 <6>[ 0.095111] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]
10463 22:18:04.831990 <6>[ 0.095401] Detected PIPT I-cache on CPU5
10464 22:18:04.838306 <6>[ 0.095464] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000
10465 22:18:04.845217 <6>[ 0.095480] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]
10466 22:18:04.848040 <6>[ 0.095758] Detected PIPT I-cache on CPU6
10467 22:18:04.858206 <6>[ 0.095825] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000
10468 22:18:04.864708 <6>[ 0.095841] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]
10469 22:18:04.867816 <6>[ 0.096136] Detected PIPT I-cache on CPU7
10470 22:18:04.874306 <6>[ 0.096200] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000
10471 22:18:04.881241 <6>[ 0.096216] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]
10472 22:18:04.884522 <6>[ 0.096262] smp: Brought up 1 node, 8 CPUs
10473 22:18:04.890919 <6>[ 0.237609] SMP: Total of 8 processors activated.
10474 22:18:04.897447 <6>[ 0.242530] CPU features: detected: 32-bit EL0 Support
10475 22:18:04.904256 <6>[ 0.247893] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
10476 22:18:04.911730 <6>[ 0.256747] CPU features: detected: Common not Private translations
10477 22:18:04.917420 <6>[ 0.263263] CPU features: detected: CRC32 instructions
10478 22:18:04.924031 <6>[ 0.268614] CPU features: detected: RCpc load-acquire (LDAPR)
10479 22:18:04.927546 <6>[ 0.274574] CPU features: detected: LSE atomic instructions
10480 22:18:04.933557 <6>[ 0.280390] CPU features: detected: Privileged Access Never
10481 22:18:04.940450 <6>[ 0.286170] CPU features: detected: RAS Extension Support
10482 22:18:04.947740 <6>[ 0.291779] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
10483 22:18:04.950931 <6>[ 0.299043] CPU: All CPU(s) started at EL2
10484 22:18:04.956691 <6>[ 0.303385] alternatives: applying system-wide alternatives
10485 22:18:04.967285 <6>[ 0.314041] devtmpfs: initialized
10486 22:18:04.983013 <6>[ 0.322858] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
10487 22:18:04.989802 <6>[ 0.332821] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
10488 22:18:04.996237 <6>[ 0.341026] pinctrl core: initialized pinctrl subsystem
10489 22:18:04.999103 <6>[ 0.347708] DMI not present or invalid.
10490 22:18:05.005825 <6>[ 0.352126] NET: Registered PF_NETLINK/PF_ROUTE protocol family
10491 22:18:05.015968 <6>[ 0.359007] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
10492 22:18:05.022784 <6>[ 0.366593] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
10493 22:18:05.032357 <6>[ 0.374817] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
10494 22:18:05.035491 <6>[ 0.383069] audit: initializing netlink subsys (disabled)
10495 22:18:05.045779 <5>[ 0.388768] audit: type=2000 audit(0.276:1): state=initialized audit_enabled=0 res=1
10496 22:18:05.052079 <6>[ 0.389491] thermal_sys: Registered thermal governor 'step_wise'
10497 22:18:05.059163 <6>[ 0.396737] thermal_sys: Registered thermal governor 'power_allocator'
10498 22:18:05.063078 <6>[ 0.402993] cpuidle: using governor menu
10499 22:18:05.068190 <6>[ 0.413956] NET: Registered PF_QIPCRTR protocol family
10500 22:18:05.074971 <6>[ 0.419465] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
10501 22:18:05.082254 <6>[ 0.426569] ASID allocator initialised with 32768 entries
10502 22:18:05.085100 <6>[ 0.433152] Serial: AMBA PL011 UART driver
10503 22:18:05.095573 <4>[ 0.441805] Trying to register duplicate clock ID: 134
10504 22:18:05.149673 <6>[ 0.499031] KASLR enabled
10505 22:18:05.163788 <6>[ 0.506751] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
10506 22:18:05.170164 <6>[ 0.513766] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
10507 22:18:05.176305 <6>[ 0.520257] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
10508 22:18:05.183678 <6>[ 0.527262] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
10509 22:18:05.190117 <6>[ 0.533752] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
10510 22:18:05.196494 <6>[ 0.540759] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
10511 22:18:05.203318 <6>[ 0.547247] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
10512 22:18:05.209948 <6>[ 0.554252] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
10513 22:18:05.212728 <6>[ 0.561669] ACPI: Interpreter disabled.
10514 22:18:05.221429 <6>[ 0.568065] iommu: Default domain type: Translated
10515 22:18:05.228447 <6>[ 0.573177] iommu: DMA domain TLB invalidation policy: strict mode
10516 22:18:05.231157 <5>[ 0.579833] SCSI subsystem initialized
10517 22:18:05.237778 <6>[ 0.583997] usbcore: registered new interface driver usbfs
10518 22:18:05.244777 <6>[ 0.589729] usbcore: registered new interface driver hub
10519 22:18:05.247545 <6>[ 0.595281] usbcore: registered new device driver usb
10520 22:18:05.254884 <6>[ 0.601357] pps_core: LinuxPPS API ver. 1 registered
10521 22:18:05.264990 <6>[ 0.606550] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
10522 22:18:05.267784 <6>[ 0.615898] PTP clock support registered
10523 22:18:05.271393 <6>[ 0.620139] EDAC MC: Ver: 3.0.0
10524 22:18:05.279396 <6>[ 0.625282] FPGA manager framework
10525 22:18:05.285626 <6>[ 0.628961] Advanced Linux Sound Architecture Driver Initialized.
10526 22:18:05.288393 <6>[ 0.635732] vgaarb: loaded
10527 22:18:05.295455 <6>[ 0.638909] clocksource: Switched to clocksource arch_sys_counter
10528 22:18:05.298713 <5>[ 0.645352] VFS: Disk quotas dquot_6.6.0
10529 22:18:05.305803 <6>[ 0.649535] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
10530 22:18:05.308678 <6>[ 0.656723] pnp: PnP ACPI: disabled
10531 22:18:05.316980 <6>[ 0.663449] NET: Registered PF_INET protocol family
10532 22:18:05.326589 <6>[ 0.669028] IP idents hash table entries: 131072 (order: 8, 1048576 bytes, linear)
10533 22:18:05.338032 <6>[ 0.681320] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
10534 22:18:05.347749 <6>[ 0.690134] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
10535 22:18:05.354938 <6>[ 0.698104] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
10536 22:18:05.364378 <6>[ 0.706809] TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
10537 22:18:05.371115 <6>[ 0.716561] TCP: Hash tables configured (established 65536 bind 65536)
10538 22:18:05.377391 <6>[ 0.723419] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
10539 22:18:05.387628 <6>[ 0.730618] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
10540 22:18:05.393607 <6>[ 0.738318] NET: Registered PF_UNIX/PF_LOCAL protocol family
10541 22:18:05.400514 <6>[ 0.744485] RPC: Registered named UNIX socket transport module.
10542 22:18:05.403929 <6>[ 0.750640] RPC: Registered udp transport module.
10543 22:18:05.410705 <6>[ 0.755574] RPC: Registered tcp transport module.
10544 22:18:05.417248 <6>[ 0.760507] RPC: Registered tcp NFSv4.1 backchannel transport module.
10545 22:18:05.420084 <6>[ 0.767180] PCI: CLS 0 bytes, default 64
10546 22:18:05.423708 <6>[ 0.771578] Unpacking initramfs...
10547 22:18:05.433813 <6>[ 0.775667] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available
10548 22:18:05.439703 <6>[ 0.784342] hw perfevents: enabled with armv8_cortex_a76 PMU driver, 7 counters available
10549 22:18:05.447333 <6>[ 0.793193] kvm [1]: IPA Size Limit: 40 bits
10550 22:18:05.450514 <6>[ 0.797718] kvm [1]: GICv3: no GICV resource entry
10551 22:18:05.456895 <6>[ 0.802741] kvm [1]: disabling GICv2 emulation
10552 22:18:05.463325 <6>[ 0.807430] kvm [1]: GIC system register CPU interface enabled
10553 22:18:05.466782 <6>[ 0.813600] kvm [1]: vgic interrupt IRQ18
10554 22:18:05.473285 <6>[ 0.817954] kvm [1]: VHE mode initialized successfully
10555 22:18:05.476565 <5>[ 0.824341] Initialise system trusted keyrings
10556 22:18:05.483164 <6>[ 0.829114] workingset: timestamp_bits=42 max_order=21 bucket_order=0
10557 22:18:05.492805 <6>[ 0.839370] squashfs: version 4.0 (2009/01/31) Phillip Lougher
10558 22:18:05.499377 <5>[ 0.845771] NFS: Registering the id_resolver key type
10559 22:18:05.502759 <5>[ 0.851073] Key type id_resolver registered
10560 22:18:05.509596 <5>[ 0.855490] Key type id_legacy registered
10561 22:18:05.515698 <6>[ 0.859771] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
10562 22:18:05.522074 <6>[ 0.866693] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
10563 22:18:05.529016 <6>[ 0.874420] 9p: Installing v9fs 9p2000 file system support
10564 22:18:05.565640 <5>[ 0.912011] Key type asymmetric registered
10565 22:18:05.568653 <5>[ 0.916344] Asymmetric key parser 'x509' registered
10566 22:18:05.578955 <6>[ 0.921491] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
10567 22:18:05.582664 <6>[ 0.929105] io scheduler mq-deadline registered
10568 22:18:05.585713 <6>[ 0.933869] io scheduler kyber registered
10569 22:18:05.604100 <6>[ 0.950726] EINJ: ACPI disabled.
10570 22:18:05.636639 <4>[ 0.976153] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10571 22:18:05.646021 <4>[ 0.986795] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10572 22:18:05.660935 <6>[ 1.007698] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
10573 22:18:05.669337 <6>[ 1.015839] printk: console [ttyS0] disabled
10574 22:18:05.697949 <6>[ 1.040485] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 255, base_baud = 1625000) is a ST16650V2
10575 22:18:05.703886 <6>[ 1.049962] printk: console [ttyS0] enabled
10576 22:18:05.707506 <6>[ 1.049962] printk: console [ttyS0] enabled
10577 22:18:05.713956 <6>[ 1.058854] printk: bootconsole [mtk8250] disabled
10578 22:18:05.716927 <6>[ 1.058854] printk: bootconsole [mtk8250] disabled
10579 22:18:05.723593 <6>[ 1.070131] SuperH (H)SCI(F) driver initialized
10580 22:18:05.726547 <6>[ 1.075397] msm_serial: driver initialized
10581 22:18:05.740824 <6>[ 1.084298] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000
10582 22:18:05.750798 <6>[ 1.092849] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000
10583 22:18:05.757691 <6>[ 1.101391] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000
10584 22:18:05.767611 <6>[ 1.110019] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000
10585 22:18:05.777395 <6>[ 1.118725] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000
10586 22:18:05.784244 <6>[ 1.127445] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000
10587 22:18:05.794328 <6>[ 1.135986] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000
10588 22:18:05.800725 <6>[ 1.144790] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000
10589 22:18:05.810560 <6>[ 1.153332] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000
10590 22:18:05.822148 <6>[ 1.168811] loop: module loaded
10591 22:18:05.828962 <6>[ 1.174787] vgpu11_sshub: Bringing 400000uV into 575000-575000uV
10592 22:18:05.850990 <4>[ 1.197952] mtk-pmic-keys: Failed to locate of_node [id: -1]
10593 22:18:05.858270 <6>[ 1.204930] megasas: 07.719.03.00-rc1
10594 22:18:05.867563 <6>[ 1.214499] spi-nor spi2.0: w25q64jwm (8192 Kbytes)
10595 22:18:05.876035 <6>[ 1.222295] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2
10596 22:18:05.892299 <6>[ 1.238351] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)
10597 22:18:05.948784 <6>[ 1.287880] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.6.153/cr50_v3.94_pp.113-620c9
10598 22:18:07.859894 <6>[ 3.206873] Freeing initrd memory: 55048K
10599 22:18:07.870031 <6>[ 3.217230] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz
10600 22:18:07.880723 <6>[ 3.228138] tun: Universal TUN/TAP device driver, 1.6
10601 22:18:07.884532 <6>[ 3.234187] thunder_xcv, ver 1.0
10602 22:18:07.887219 <6>[ 3.237693] thunder_bgx, ver 1.0
10603 22:18:07.890593 <6>[ 3.241189] nicpf, ver 1.0
10604 22:18:07.901986 <6>[ 3.245184] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
10605 22:18:07.904861 <6>[ 3.252659] hns3: Copyright (c) 2017 Huawei Corporation.
10606 22:18:07.911620 <6>[ 3.258243] hclge is initializing
10607 22:18:07.914964 <6>[ 3.261818] e1000: Intel(R) PRO/1000 Network Driver
10608 22:18:07.921778 <6>[ 3.266947] e1000: Copyright (c) 1999-2006 Intel Corporation.
10609 22:18:07.925031 <6>[ 3.272961] e1000e: Intel(R) PRO/1000 Network Driver
10610 22:18:07.931516 <6>[ 3.278177] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
10611 22:18:07.938400 <6>[ 3.284362] igb: Intel(R) Gigabit Ethernet Network Driver
10612 22:18:07.945047 <6>[ 3.290012] igb: Copyright (c) 2007-2014 Intel Corporation.
10613 22:18:07.951463 <6>[ 3.295851] igbvf: Intel(R) Gigabit Virtual Function Network Driver
10614 22:18:07.958148 <6>[ 3.302369] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
10615 22:18:07.961340 <6>[ 3.308829] sky2: driver version 1.30
10616 22:18:07.968051 <6>[ 3.313796] VFIO - User Level meta-driver version: 0.3
10617 22:18:07.974837 <6>[ 3.321920] usbcore: registered new interface driver usb-storage
10618 22:18:07.981693 <6>[ 3.328371] usbcore: registered new device driver onboard-usb-hub
10619 22:18:07.990772 <6>[ 3.337442] mt6397-rtc mt6359-rtc: registered as rtc0
10620 22:18:08.000184 <6>[ 3.342912] mt6397-rtc mt6359-rtc: setting system clock to 2023-06-04T22:18:20 UTC (1685917100)
10621 22:18:08.003599 <6>[ 3.352463] i2c_dev: i2c /dev entries driver
10622 22:18:08.020657 <6>[ 3.364085] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
10623 22:18:08.027693 <6>[ 3.374249] sdhci: Secure Digital Host Controller Interface driver
10624 22:18:08.034495 <6>[ 3.380687] sdhci: Copyright(c) Pierre Ossman
10625 22:18:08.040945 <6>[ 3.386080] Synopsys Designware Multimedia Card Interface Driver
10626 22:18:08.044210 <6>[ 3.392729] mmc0: CQHCI version 5.10
10627 22:18:08.051246 <6>[ 3.393225] sdhci-pltfm: SDHCI platform and OF driver helper
10628 22:18:08.057935 <6>[ 3.404668] ledtrig-cpu: registered to indicate activity on CPUs
10629 22:18:08.068301 <6>[ 3.412008] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000
10630 22:18:08.074818 <6>[ 3.419401] usbcore: registered new interface driver usbhid
10631 22:18:08.078479 <6>[ 3.425228] usbhid: USB HID core driver
10632 22:18:08.084992 <6>[ 3.429464] spi_master spi0: will run message pump with realtime priority
10633 22:18:08.129599 <6>[ 3.469973] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0
10634 22:18:08.148328 <6>[ 3.485102] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1
10635 22:18:08.151517 <6>[ 3.498672] mmc0: Command Queue Engine enabled
10636 22:18:08.158678 <6>[ 3.500285] cros-ec-spi spi0.0: Chrome EC device registered
10637 22:18:08.165334 <6>[ 3.503411] mmc0: new HS400 Enhanced strobe MMC card at address 0001
10638 22:18:08.169303 <6>[ 3.516514] mmcblk0: mmc0:0001 DA4128 116 GiB
10639 22:18:08.184294 <6>[ 3.527788] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)
10640 22:18:08.190777 <6>[ 3.529609] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
10641 22:18:08.197404 <6>[ 3.539237] NET: Registered PF_PACKET protocol family
10642 22:18:08.200770 <6>[ 3.544378] mmcblk0boot0: mmc0:0001 DA4128 4.00 MiB
10643 22:18:08.207855 <6>[ 3.548444] 9pnet: Installing 9P2000 support
10644 22:18:08.211237 <6>[ 3.554161] mmcblk0boot1: mmc0:0001 DA4128 4.00 MiB
10645 22:18:08.217008 <5>[ 3.558120] Key type dns_resolver registered
10646 22:18:08.223943 <6>[ 3.563944] mmcblk0rpmb: mmc0:0001 DA4128 16.0 MiB, chardev (507:0)
10647 22:18:08.227596 <6>[ 3.568425] registered taskstats version 1
10648 22:18:08.230832 <5>[ 3.578723] Loading compiled-in X.509 certificates
10649 22:18:08.265798 <4>[ 3.605707] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10650 22:18:08.275651 <4>[ 3.616411] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10651 22:18:08.285841 <3>[ 3.629199] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)
10652 22:18:08.297996 <6>[ 3.644720] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102
10653 22:18:08.304792 <6>[ 3.651559] xhci-mtk 11200000.usb: xHCI Host Controller
10654 22:18:08.311315 <6>[ 3.657061] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
10655 22:18:08.321136 <6>[ 3.664914] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
10656 22:18:08.328108 <6>[ 3.674352] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000
10657 22:18:08.334642 <6>[ 3.680544] xhci-mtk 11200000.usb: xHCI Host Controller
10658 22:18:08.341404 <6>[ 3.686040] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
10659 22:18:08.347944 <6>[ 3.693707] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed
10660 22:18:08.354591 <6>[ 3.701603] hub 1-0:1.0: USB hub found
10661 22:18:08.358191 <6>[ 3.705651] hub 1-0:1.0: 1 port detected
10662 22:18:08.367785 <6>[ 3.710003] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
10663 22:18:08.371030 <6>[ 3.718881] hub 2-0:1.0: USB hub found
10664 22:18:08.374366 <6>[ 3.722935] hub 2-0:1.0: 1 port detected
10665 22:18:08.383600 <6>[ 3.730130] mtk-msdc 11f70000.mmc: Got CD GPIO
10666 22:18:08.401011 <6>[ 3.744669] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()
10667 22:18:08.407280 <6>[ 3.752810] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()
10668 22:18:08.417463 <4>[ 3.760811] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW
10669 22:18:08.427335 <6>[ 3.770539] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()
10670 22:18:08.433801 <6>[ 3.778627] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()
10671 22:18:08.445013 <6>[ 3.786686] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()
10672 22:18:08.450628 <6>[ 3.794615] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()
10673 22:18:08.457756 <6>[ 3.802476] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()
10674 22:18:08.467697 <6>[ 3.810302] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39
10675 22:18:08.477539 <6>[ 3.820970] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)
10676 22:18:08.487398 <6>[ 3.829336] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)
10677 22:18:08.493978 <6>[ 3.837736] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)
10678 22:18:08.504150 <6>[ 3.846084] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)
10679 22:18:08.510908 <6>[ 3.854454] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)
10680 22:18:08.519910 <6>[ 3.862800] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)
10681 22:18:08.526662 <6>[ 3.871169] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)
10682 22:18:08.537612 <6>[ 3.879514] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)
10683 22:18:08.543031 <6>[ 3.887878] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
10684 22:18:08.553211 <6>[ 3.896223] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
10685 22:18:08.559669 <6>[ 3.904566] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)
10686 22:18:08.570145 <6>[ 3.912908] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)
10687 22:18:08.576174 <6>[ 3.921252] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)
10688 22:18:08.586487 <6>[ 3.929595] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)
10689 22:18:08.594239 <6>[ 3.937940] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)
10690 22:18:08.599791 <6>[ 3.946813] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0
10691 22:18:08.607284 <6>[ 3.954261] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0
10692 22:18:08.614697 <6>[ 3.961349] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0
10693 22:18:08.625169 <6>[ 3.968503] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0
10694 22:18:08.631666 <6>[ 3.975830] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0
10695 22:18:08.641019 <6>[ 3.982742] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)
10696 22:18:08.648087 <6>[ 3.991890] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)
10697 22:18:08.658269 <6>[ 4.001057] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)
10698 22:18:08.668144 <6>[ 4.010487] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)
10699 22:18:08.678113 <6>[ 4.019965] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)
10700 22:18:08.687926 <6>[ 4.029439] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)
10701 22:18:08.697904 <6>[ 4.038565] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)
10702 22:18:08.704150 <6>[ 4.048040] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)
10703 22:18:08.714024 <6>[ 4.057167] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)
10704 22:18:08.724128 <6>[ 4.066469] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing
10705 22:18:08.733851 <6>[ 4.076656] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing
10706 22:18:08.744287 <6>[ 4.088181] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0
10707 22:18:08.791748 <6>[ 4.135183] usb 1-1: new high-speed USB device number 2 using xhci-mtk
10708 22:18:08.946064 <6>[ 4.292732] hub 1-1:1.0: USB hub found
10709 22:18:08.948929 <6>[ 4.297188] hub 1-1:1.0: 4 ports detected
10710 22:18:09.071315 <6>[ 4.415370] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
10711 22:18:09.096757 <6>[ 4.443645] hub 2-1:1.0: USB hub found
10712 22:18:09.099822 <6>[ 4.448040] hub 2-1:1.0: 3 ports detected
10713 22:18:09.271510 <6>[ 4.615183] usb 1-1.4: new high-speed USB device number 3 using xhci-mtk
10714 22:18:09.404645 <6>[ 4.751338] hub 1-1.4:1.0: USB hub found
10715 22:18:09.407583 <6>[ 4.756013] hub 1-1.4:1.0: 2 ports detected
10716 22:18:09.483267 <6>[ 4.827421] usb 2-1.3: new SuperSpeed USB device number 3 using xhci-mtk
10717 22:18:09.703287 <6>[ 5.047184] usb 1-1.4.1: new high-speed USB device number 4 using xhci-mtk
10718 22:18:09.895548 <6>[ 5.239183] usb 1-1.4.2: new high-speed USB device number 5 using xhci-mtk
10719 22:18:21.044168 <6>[ 16.395807] ALSA device list:
10720 22:18:21.050462 <6>[ 16.399056] No soundcards found.
10721 22:18:21.063345 <6>[ 16.411479] Freeing unused kernel memory: 8384K
10722 22:18:21.066117 <6>[ 16.416406] Run /init as init process
10723 22:18:21.096426 <6>[ 16.445227] NET: Registered PF_INET6 protocol family
10724 22:18:21.103729 <6>[ 16.451815] Segment Routing with IPv6
10725 22:18:21.106783 <6>[ 16.455805] In-situ OAM (IOAM) with IPv6
10726 22:18:21.142552 <30>[ 16.470342] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
10727 22:18:21.144973 <30>[ 16.494122] systemd[1]: Detected architecture arm64.
10728 22:18:21.145467
10729 22:18:21.151409 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
10730 22:18:21.152001
10731 22:18:21.166873 <30>[ 16.515345] systemd[1]: Set hostname to <debian-bullseye-arm64>.
10732 22:18:21.298646 <30>[ 16.643442] systemd[1]: Queued start job for default target Graphical Interface.
10733 22:18:21.345033 <30>[ 16.692372] systemd[1]: Created slice system-getty.slice.
10734 22:18:21.350614 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
10735 22:18:21.367574 <30>[ 16.715748] systemd[1]: Created slice system-modprobe.slice.
10736 22:18:21.374017 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
10737 22:18:21.391839 <30>[ 16.740294] systemd[1]: Created slice system-serial\x2dgetty.slice.
10738 22:18:21.401716 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
10739 22:18:21.415231 <30>[ 16.763690] systemd[1]: Created slice User and Session Slice.
10740 22:18:21.421896 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
10741 22:18:21.442465 <30>[ 16.787735] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
10742 22:18:21.452560 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
10743 22:18:21.470597 <30>[ 16.815321] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
10744 22:18:21.476412 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
10745 22:18:21.497091 <30>[ 16.839255] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.
10746 22:18:21.503881 <30>[ 16.851290] systemd[1]: Reached target Local Encrypted Volumes.
10747 22:18:21.510198 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
10748 22:18:21.527155 <30>[ 16.875542] systemd[1]: Reached target Paths.
10749 22:18:21.530469 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
10750 22:18:21.546854 <30>[ 16.895160] systemd[1]: Reached target Remote File Systems.
10751 22:18:21.552925 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
10752 22:18:21.567110 <30>[ 16.915164] systemd[1]: Reached target Slices.
10753 22:18:21.570647 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
10754 22:18:21.587452 <30>[ 16.935233] systemd[1]: Reached target Swap.
10755 22:18:21.590227 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
10756 22:18:21.610503 <30>[ 16.955515] systemd[1]: Listening on initctl Compatibility Named Pipe.
10757 22:18:21.616698 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
10758 22:18:21.623675 <30>[ 16.970176] systemd[1]: Listening on Journal Audit Socket.
10759 22:18:21.630776 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
10760 22:18:21.643079 <30>[ 16.991476] systemd[1]: Listening on Journal Socket (/dev/log).
10761 22:18:21.649562 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
10762 22:18:21.667105 <30>[ 17.015509] systemd[1]: Listening on Journal Socket.
10763 22:18:21.673714 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
10764 22:18:21.687550 <30>[ 17.035435] systemd[1]: Listening on udev Control Socket.
10765 22:18:21.693277 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
10766 22:18:21.706942 <30>[ 17.055402] systemd[1]: Listening on udev Kernel Socket.
10767 22:18:21.713385 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
10768 22:18:21.746913 <30>[ 17.095366] systemd[1]: Mounting Huge Pages File System...
10769 22:18:21.753688 Mounting [0;1;39mHuge Pages File System[0m...
10770 22:18:21.768394 <30>[ 17.117099] systemd[1]: Mounting POSIX Message Queue File System...
10771 22:18:21.775354 Mounting [0;1;39mPOSIX Message Queue File System[0m...
10772 22:18:21.793420 <30>[ 17.141113] systemd[1]: Mounting Kernel Debug File System...
10773 22:18:21.798972 Mounting [0;1;39mKernel Debug File System[0m...
10774 22:18:21.818055 <30>[ 17.163437] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
10775 22:18:21.829257 <30>[ 17.174215] systemd[1]: Starting Create list of static device nodes for the current kernel...
10776 22:18:21.835399 Starting [0;1;39mCreate list of st…odes for the current kernel[0m...
10777 22:18:21.852488 <30>[ 17.201298] systemd[1]: Starting Load Kernel Module configfs...
10778 22:18:21.860027 Starting [0;1;39mLoad Kernel Module configfs[0m...
10779 22:18:21.877121 <30>[ 17.225283] systemd[1]: Starting Load Kernel Module drm...
10780 22:18:21.883783 Starting [0;1;39mLoad Kernel Module drm[0m...
10781 22:18:21.902212 <30>[ 17.247380] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.
10782 22:18:21.912096 <30>[ 17.260867] systemd[1]: Starting Journal Service...
10783 22:18:21.915721 Starting [0;1;39mJournal Service[0m...
10784 22:18:21.933013 <30>[ 17.281777] systemd[1]: Starting Load Kernel Modules...
10785 22:18:21.940033 Starting [0;1;39mLoad Kernel Modules[0m...
10786 22:18:21.962217 <30>[ 17.305911] systemd[1]: Starting Remount Root and Kernel File Systems...
10787 22:18:21.967261 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
10788 22:18:21.981789 <30>[ 17.329796] systemd[1]: Starting Coldplug All udev Devices...
10789 22:18:21.988031 Starting [0;1;39mColdplug All udev Devices[0m...
10790 22:18:22.005162 <30>[ 17.353772] systemd[1]: Mounted Huge Pages File System.
10791 22:18:22.011809 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
10792 22:18:22.028084 <30>[ 17.375969] systemd[1]: Started Journal Service.
10793 22:18:22.034314 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
10794 22:18:22.048873 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
10795 22:18:22.063660 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
10796 22:18:22.083772 [[0;32m OK [0m] Finished [0;1;39mCreate list of st… nodes for the current kernel[0m.
10797 22:18:22.100590 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
10798 22:18:22.116570 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
10799 22:18:22.132163 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
10800 22:18:22.155577 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
10801 22:18:22.175323 See 'systemctl status systemd-remount-fs.service' for details.
10802 22:18:22.227364 Mounting [0;1;39mKernel Configuration File System[0m...
10803 22:18:22.249488 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
10804 22:18:22.266790 <46>[ 17.611911] systemd-journald[177]: Received client request to flush runtime journal.
10805 22:18:22.275262 Starting [0;1;39mLoad/Save Random Seed[0m...
10806 22:18:22.293712 Starting [0;1;39mApply Kernel Variables[0m...
10807 22:18:22.314217 Starting [0;1;39mCreate System Users[0m...
10808 22:18:22.333904 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
10809 22:18:22.359437 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
10810 22:18:22.375968 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
10811 22:18:22.396108 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
10812 22:18:22.415896 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
10813 22:18:22.431796 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
10814 22:18:22.467471 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
10815 22:18:22.490334 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
10816 22:18:22.503663 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
10817 22:18:22.518555 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
10818 22:18:22.582872 Starting [0;1;39mCreate Volatile Files and Directories[0m...
10819 22:18:22.606755 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
10820 22:18:22.624033 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
10821 22:18:22.643668 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
10822 22:18:22.699811 Starting [0;1;39mNetwork Time Synchronization[0m...
10823 22:18:22.720569 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
10824 22:18:22.754165 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
10825 22:18:22.815576 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
10826 22:18:22.838889 <6>[ 18.183866] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000
10827 22:18:22.849121 [[0;32m OK [0m] Found device [0;1;39m/dev/t<6>[ 18.194892] remoteproc remoteproc0: scp is available
10828 22:18:22.849715 tyS0[0m.
10829 22:18:22.858647 <4>[ 18.201866] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10830 22:18:22.865416 <6>[ 18.211958] remoteproc remoteproc0: powering up scp
10831 22:18:22.875548 <4>[ 18.217278] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10832 22:18:22.878228 <3>[ 18.227121] remoteproc remoteproc0: request_firmware failed: -2
10833 22:18:22.885127 <6>[ 18.230221] mc: Linux media interface: v0.10
10834 22:18:22.891523 [[0;32m OK [0m] Created slice [0;1;39msystem-systemd\x2dbacklight.slice[0m.
10835 22:18:22.902483 <6>[ 18.247895] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:
10836 22:18:22.909157 <6>[ 18.254630] videodev: Linux video capture interface: v2.00
10837 22:18:22.916104 <6>[ 18.255600] mtk-pcie-gen3 11230000.pcie: MEM 0x0012000000..0x00127fffff -> 0x0012000000
10838 22:18:22.926029 <3>[ 18.256157] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10839 22:18:22.932495 <3>[ 18.256173] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10840 22:18:22.942364 <3>[ 18.256181] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10841 22:18:22.949699 <3>[ 18.259702] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10842 22:18:22.958955 <3>[ 18.259715] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10843 22:18:22.965637 <3>[ 18.259723] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10844 22:18:22.973321 <3>[ 18.259732] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10845 22:18:22.981729 <3>[ 18.259740] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10846 22:18:22.988734 <3>[ 18.259784] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10847 22:18:22.998249 <3>[ 18.259839] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10848 22:18:23.004954 <3>[ 18.259847] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10849 22:18:23.014813 <3>[ 18.259854] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10850 22:18:23.021913 <3>[ 18.259904] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10851 22:18:23.031647 <3>[ 18.259912] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10852 22:18:23.037803 <3>[ 18.259918] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10853 22:18:23.048026 <3>[ 18.259926] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10854 22:18:23.054634 <3>[ 18.259933] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10855 22:18:23.064436 <3>[ 18.259972] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10856 22:18:23.068044 <6>[ 18.269596] usbcore: registered new interface driver r8152
10857 22:18:23.077558 <6>[ 18.270178] mtk-pcie-gen3 11230000.pcie: IO 0x0012800000..0x0012ffffff -> 0x0012800000
10858 22:18:23.083806 <4>[ 18.278669] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator
10859 22:18:23.091277 <6>[ 18.408953] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00
10860 22:18:23.100323 <4>[ 18.420490] elants_i2c 4-0010: supply vccio not found, using dummy regulator
10861 22:18:23.104311 <6>[ 18.422239] pci_bus 0000:00: root bus resource [bus 00-ff]
10862 22:18:23.113643 <6>[ 18.439981] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered
10863 22:18:23.120254 <6>[ 18.445946] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]
10864 22:18:23.127370 <4>[ 18.465171] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
10865 22:18:23.133520 <4>[ 18.465171] Fallback method does not support PEC.
10866 22:18:23.143489 <6>[ 18.467622] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])
10867 22:18:23.150269 <6>[ 18.487414] usb 2-1.3: reset SuperSpeed USB device number 3 using xhci-mtk
10868 22:18:23.160326 <6>[ 18.487577] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0001, Sample: 0x0001, IAP: 0x0003
10869 22:18:23.170850 <6>[ 18.488045] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input2
10870 22:18:23.177663 <3>[ 18.490188] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10871 22:18:23.184686 <6>[ 18.496822] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400
10872 22:18:23.194483 <4>[ 18.526996] r8152 2-1.3:1.0: Direct firmware load for rtl_nic/rtl8153a-4.fw failed with error -2
10873 22:18:23.201803 <3>[ 18.529930] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10874 22:18:23.211797 <3>[ 18.530742] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -6
10875 22:18:23.218216 <6>[ 18.531817] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]
10876 22:18:23.228271 <6>[ 18.537799] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input3
10877 22:18:23.235357 <4>[ 18.538083] r8152 2-1.3:1.0: unable to load firmware patch rtl_nic/rtl8153a-4.fw (-2)
10878 22:18:23.241921 <6>[ 18.547194] pci 0000:00:00.0: supports D1 D2
10879 22:18:23.245035 <6>[ 18.566003] usbcore: registered new interface driver cdc_ether
10880 22:18:23.255361 <6>[ 18.572191] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10881 22:18:23.258641 <6>[ 18.582440] Bluetooth: Core ver 2.22
10882 22:18:23.264925 <3>[ 18.585353] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10883 22:18:23.275360 <3>[ 18.587588] power_supply sbs-5-000b: driver failed to report `health' property: -6
10884 22:18:23.279104 <6>[ 18.590299] usbcore: registered new interface driver r8153_ecm
10885 22:18:23.289177 <6>[ 18.591704] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
10886 22:18:23.295798 <6>[ 18.591835] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000
10887 22:18:23.302549 <6>[ 18.591865] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
10888 22:18:23.309297 <6>[ 18.591886] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
10889 22:18:23.316051 <6>[ 18.591904] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
10890 22:18:23.323156 <6>[ 18.592020] pci 0000:01:00.0: supports D1 D2
10891 22:18:23.330109 <6>[ 18.592023] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10892 22:18:23.333116 <6>[ 18.594186] NET: Registered PF_BLUETOOTH protocol family
10893 22:18:23.339893 <6>[ 18.595229] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0
10894 22:18:23.346787 <6>[ 18.599007] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
10895 22:18:23.356782 <6>[ 18.599047] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]
10896 22:18:23.363631 <6>[ 18.599055] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]
10897 22:18:23.373785 <6>[ 18.599067] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]
10898 22:18:23.381097 <6>[ 18.599083] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]
10899 22:18:23.387835 <6>[ 18.599101] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]
10900 22:18:23.393888 <6>[ 18.599117] pci 0000:00:00.0: PCI bridge to [bus 01]
10901 22:18:23.400804 <6>[ 18.599129] pci 0000:00:00.0: bridge window [mem 0x12000000-0x121fffff 64bit pref]
10902 22:18:23.407397 <6>[ 18.599347] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
10903 22:18:23.414342 <6>[ 18.599632] remoteproc remoteproc0: powering up scp
10904 22:18:23.421283 <4>[ 18.599686] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10905 22:18:23.427843 <3>[ 18.599695] remoteproc remoteproc0: request_firmware failed: -2
10906 22:18:23.438646 <3>[ 18.599698] fops_vcodec_open(),166: [MTK_V4L2][ERROR] vpu_load_firmware failed!
10907 22:18:23.441668 <6>[ 18.600376] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)
10908 22:18:23.448260 <6>[ 18.600502] pcieport 0000:00:00.0: PME: Signaling with IRQ 283
10909 22:18:23.455201 <6>[ 18.600802] pcieport 0000:00:00.0: AER: enabled with IRQ 283
10910 22:18:23.462045 <6>[ 18.607176] Bluetooth: HCI device and connection manager initialized
10911 22:18:23.466200 <6>[ 18.607220] Bluetooth: HCI socket layer initialized
10912 22:18:23.472264 <6>[ 18.611191] r8152 2-1.3:1.0 eth0: v1.12.13
10913 22:18:23.482509 <6>[ 18.612420] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4
10914 22:18:23.488712 <6>[ 18.612569] usbcore: registered new interface driver uvcvideo
10915 22:18:23.495697 <6>[ 18.619863] Bluetooth: L2CAP socket layer initialized
10916 22:18:23.498505 <6>[ 18.619890] Bluetooth: SCO socket layer initialized
10917 22:18:23.508712 <5>[ 18.625191] cfg80211: Loading compiled-in X.509 certificates for regulatory database
10918 22:18:23.518448 <3>[ 18.637476] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10919 22:18:23.525177 <3>[ 18.640443] power_supply sbs-5-000b: driver failed to report `cycle_count' property: -6
10920 22:18:23.532103 <6>[ 18.640919] r8152 2-1.3:1.0 enx002432307c7b: renamed from eth0
10921 22:18:23.538222 <5>[ 18.653810] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
10922 22:18:23.544722 <6>[ 18.664299] usbcore: registered new interface driver btusb
10923 22:18:23.554737 <4>[ 18.664988] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2
10924 22:18:23.561664 <3>[ 18.665001] Bluetooth: hci0: Failed to load firmware file (-2)
10925 22:18:23.564770 <3>[ 18.665005] Bluetooth: hci0: Failed to set up firmware (-2)
10926 22:18:23.578285 <4>[ 18.665009] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.
10927 22:18:23.584401 <3>[ 18.665526] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10928 22:18:23.594454 <3>[ 18.686140] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10929 22:18:23.604400 <4>[ 18.691728] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
10930 22:18:23.611222 <3>[ 18.725236] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10931 22:18:23.617858 <6>[ 18.725641] cfg80211: failed to load regulatory.db
10932 22:18:23.624365 <6>[ 18.760893] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000
10933 22:18:23.630770 [[0;32m OK [<6>[ 18.978274] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)
10934 22:18:23.637053 0m] Reached target [0;1;39mSystem Time Set[0m.
10935 22:18:23.650530 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
10936 22:18:23.658061 <6>[ 19.006561] mt7921e 0000:01:00.0: ASIC revision: 79610010
10937 22:18:23.698596 Starting [0;1;39mLoad/Save Screen …of leds:white:kbd_backlight[0m...
10938 22:18:23.715339 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Screen …s of leds:white:kbd_backlight[0m.
10939 22:18:23.765201 <4>[ 19.107125] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10940 22:18:23.883452 <4>[ 19.225239] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10941 22:18:23.894567 [[0;32m OK [0m] Reached target [0;1;39mBluetooth[0m.
10942 22:18:23.910741 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
10943 22:18:23.929892 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
10944 22:18:23.945673 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
10945 22:18:23.958252 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
10946 22:18:23.978003 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
10947 22:18:23.992317 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
10948 22:18:24.001862 <4>[ 19.345782] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10949 22:18:24.009396 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
10950 22:18:24.027151 [[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
10951 22:18:24.067544 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
10952 22:18:24.093544 Starting [0;1;39mUser Login Management[0m...
10953 22:18:24.115082 Starting [0;1;39mPermit User Sessions[0m...
10954 22:18:24.124788 <4>[ 19.467948] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10955 22:18:24.141683 Starting [0;1;39mLoad/Save RF Kill Switch Status[0m...
10956 22:18:24.151785 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
10957 22:18:24.161040 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
10958 22:18:24.182030 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS0[0m.
10959 22:18:24.189289 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
10960 22:18:24.207992 [[0;32m OK [0m] Started [0;1;39mLoad/Save RF Kill Switch Status[0m.
10961 22:18:24.227459 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
10962 22:18:24.251258 <4>[ 19.593601] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10963 22:18:24.261445 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
10964 22:18:24.282654 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
10965 22:18:24.326440 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
10966 22:18:24.350118 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
10967 22:18:24.371512 <4>[ 19.713741] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10968 22:18:24.384195
10969 22:18:24.384756
10970 22:18:24.387285 Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0
10971 22:18:24.387761
10972 22:18:24.390462 debian-bullseye-arm64 login: root (automatic login)
10973 22:18:24.390956
10974 22:18:24.391447
10975 22:18:24.411513 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Sun Jun 4 21:56:05 UTC 2023 aarch64
10976 22:18:24.412091
10977 22:18:24.418281 The programs included with the Debian GNU/Linux system are free software;
10978 22:18:24.424836 the exact distribution terms for each program are described in the
10979 22:18:24.428064 individual files in /usr/share/doc/*/copyright.
10980 22:18:24.428637
10981 22:18:24.435275 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
10982 22:18:24.437466 permitted by applicable law.
10983 22:18:24.438654 Matched prompt #10: / #
10985 22:18:24.439806 Setting prompt string to ['/ #']
10986 22:18:24.440319 end: 2.2.5.1 login-action (duration 00:00:21) [common]
10988 22:18:24.441407 end: 2.2.5 auto-login-action (duration 00:00:21) [common]
10989 22:18:24.441880 start: 2.2.6 expect-shell-connection (timeout 00:02:26) [common]
10990 22:18:24.442280 Setting prompt string to ['/ #']
10991 22:18:24.442629 Forcing a shell prompt, looking for ['/ #']
10993 22:18:24.493556 / #
10994 22:18:24.494226 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
10995 22:18:24.494690 Waiting using forced prompt support (timeout 00:02:30)
10996 22:18:24.495255 <4>[ 19.833506] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10997 22:18:24.500000
10998 22:18:24.500940 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
10999 22:18:24.501496 start: 2.2.7 export-device-env (timeout 00:02:26) [common]
11000 22:18:24.502201 end: 2.2.7 export-device-env (duration 00:00:00) [common]
11001 22:18:24.502732 end: 2.2 depthcharge-retry (duration 00:02:34) [common]
11002 22:18:24.503224 end: 2 depthcharge-action (duration 00:02:34) [common]
11003 22:18:24.503751 start: 3 lava-test-retry (timeout 00:07:05) [common]
11004 22:18:24.504248 start: 3.1 lava-test-shell (timeout 00:07:05) [common]
11005 22:18:24.504663 Using namespace: common
11007 22:18:24.605789 / # #
11008 22:18:24.606457 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
11009 22:18:24.655720 #<4>[ 19.953371] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11010 22:18:24.656295
11011 22:18:24.656992 Using /lava-10583909
11013 22:18:24.758148 / # export SHELL=/bin/sh
11014 22:18:24.758924 export SHELL=/bin/sh<4>[ 20.073731] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11015 22:18:24.764701
11017 22:18:24.866301 / # . /lava-10583909/environment
11018 22:18:24.867118 . /lava-10583909/environment<4>[ 20.192985] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11019 22:18:24.872567
11021 22:18:24.974313 / # /lava-10583909/bin/lava-test-runner /lava-10583909/0
11022 22:18:24.974928 Test shell timeout: 10s (minimum of the action and connection timeout)
11023 22:18:24.976687 /lava-10583909/bin/lava-test-runner /lava-10583909/0<3>[ 20.306856] mt7921e 0000:01:00.0: hardware init failed
11024 22:18:24.980942
11025 22:18:25.023672 + export TESTRUN_ID=0_igt-kms-me<8>[ 20.354222] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 10583909_1.5.2.3.1>
11026 22:18:25.024256 diatek
11027 22:18:25.024632 + cd /lava-10583909/0/tests/0_igt-kms-mediatek
11028 22:18:25.025030 + cat uuid
11029 22:18:25.025661 Received signal: <STARTRUN> 0_igt-kms-mediatek 10583909_1.5.2.3.1
11030 22:18:25.026057 Starting test lava.0_igt-kms-mediatek (10583909_1.5.2.3.1)
11031 22:18:25.026494 Skipping test definition patterns.
11032 22:18:25.027060 + UUID=10583909_1.5.2.3.1
11033 22:18:25.027494 + set +x
11034 22:18:25.037122 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats core_getversion core_setmaster_vs_auth drm_read kms_addfb_basic kms_atomic km<8>[ 20.384846] <LAVA_SIGNAL_TESTSET START core_auth>
11035 22:18:25.038135 Received signal: <TESTSET> START core_auth
11036 22:18:25.038563 Starting test_set core_auth
11037 22:18:25.043567 s_flip_event_leak kms_prop_blob kms_setmode kms_vblank
11038 22:18:25.059606 <14>[ 20.408601] [IGT] core_auth: executing
11039 22:18:25.066201 IGT-Version: 1.2<14>[ 20.413089] [IGT] core_auth: starting subtest getclient-simple
11040 22:18:25.073114 7.1-g766edf9 (aa<14>[ 20.420809] [IGT] core_auth: exiting, ret=0
11041 22:18:25.076184 rch64) (Linux: 6.1.31 aarch64)
11042 22:18:25.079692 Starting subtest: getclient-simple
11043 22:18:25.086452 Opened devic<8>[ 20.432483] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
11044 22:18:25.087417 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
11046 22:18:25.089342 e: /dev/dri/card0
11047 22:18:25.093039 [1mSubtest getclient-simple: SUCCESS (0.000s)[0m
11048 22:18:25.109190 <14>[ 20.457858] [IGT] core_auth: executing
11049 22:18:25.115862 IGT-Version: 1.2<14>[ 20.462246] [IGT] core_auth: starting subtest getclient-master-drop
11050 22:18:25.121953 7.1-g766edf9 (aa<14>[ 20.470405] [IGT] core_auth: exiting, ret=0
11051 22:18:25.125555 rch64) (Linux: 6.1.31 aarch64)
11052 22:18:25.128971 Starting subtest: getclient-master-drop
11053 22:18:25.135710 Opened <8>[ 20.481791] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
11054 22:18:25.136534 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
11056 22:18:25.138610 device: /dev/dri/card0
11057 22:18:25.145224 [1mSubtest getclient-master-drop: SUCCESS (0.000s)[0m
11058 22:18:25.160658 <14>[ 20.509125] [IGT] core_auth: executing
11059 22:18:25.167031 IGT-Version: 1.2<14>[ 20.513792] [IGT] core_auth: starting subtest basic-auth
11060 22:18:25.173654 7.1-g766edf9 (aa<14>[ 20.520763] [IGT] core_auth: exiting, ret=0
11061 22:18:25.177143 rch64) (Linux: 6.1.31 aarch64)
11062 22:18:25.177618 Opened device: /dev/dri/card0
11063 22:18:25.186865 Starting subtest:<8>[ 20.532747] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
11064 22:18:25.187470 basic-auth
11065 22:18:25.188116 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
11067 22:18:25.190342 [1mSubtest basic-auth: SUCCESS (0.000s)[0m
11068 22:18:25.208974 <14>[ 20.557754] [IGT] core_auth: executing
11069 22:18:25.215333 IGT-Version: 1.2<14>[ 20.562192] [IGT] core_auth: starting subtest many-magics
11070 22:18:25.218854 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11071 22:18:25.222970 Opened device: /dev/dri/card0
11072 22:18:25.225560 Starting subtest: many-magics
11073 22:18:25.228943 Reopening device failed after 1020 opens
11074 22:18:25.231981 <14>[ 20.582166] [IGT] core_auth: exiting, ret=0
11075 22:18:25.238823 [1mSubtest many-magics: SUCCESS (0.013s)[0m
11076 22:18:25.245288 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
11078 22:18:25.248418 <8>[ 20.593797] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
11079 22:18:25.251272 <8>[ 20.602393] <LAVA_SIGNAL_TESTSET STOP>
11080 22:18:25.252004 Received signal: <TESTSET> STOP
11081 22:18:25.252425 Closing test_set core_auth
11082 22:18:25.294343 <14>[ 20.643366] [IGT] core_getclient: executing
11083 22:18:25.301185 IGT-Version: 1.2<14>[ 20.648440] [IGT] core_getclient: exiting, ret=0
11084 22:18:25.304480 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11085 22:18:25.307418 Opened device: /dev/dri/card0
11086 22:18:25.314374 S<8>[ 20.660962] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
11087 22:18:25.315261 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
11089 22:18:25.317731 UCCESS (0.006s)
11090 22:18:25.355953 <14>[ 20.705189] [IGT] core_getstats: executing
11091 22:18:25.362781 IGT-Version: 1.2<14>[ 20.710007] [IGT] core_getstats: exiting, ret=0
11092 22:18:25.366283 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11093 22:18:25.369717 Opened device: /dev/dri/card0
11094 22:18:25.376185 S<8>[ 20.721818] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
11095 22:18:25.376664 UCCESS (0.006s)
11096 22:18:25.377301 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
11098 22:18:25.418441 <14>[ 20.766677] [IGT] core_getversion: executing
11099 22:18:25.424808 IGT-Version: 1.2<14>[ 20.771937] [IGT] core_getversion: exiting, ret=0
11100 22:18:25.427575 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11101 22:18:25.431284 Opened device: /dev/dri/card0
11102 22:18:25.437954 S<8>[ 20.783981] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
11103 22:18:25.438776 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
11105 22:18:25.440809 UCCESS (0.006s)
11106 22:18:25.480468 <14>[ 20.829189] [IGT] core_setmaster_vs_auth: executing
11107 22:18:25.487235 IGT-Version: 1.2<14>[ 20.834982] [IGT] core_setmaster_vs_auth: exiting, ret=0
11108 22:18:25.493220 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11109 22:18:25.493704 Opened device: /dev/dri/card0
11110 22:18:25.503286 S<8>[ 20.847728] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
11111 22:18:25.504033 UCCESS (0.007s)
11112 22:18:25.504690 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
11114 22:18:25.529599 <8>[ 20.878215] <LAVA_SIGNAL_TESTSET START drm_read>
11115 22:18:25.530502 Received signal: <TESTSET> START drm_read
11116 22:18:25.530928 Starting test_set drm_read
11117 22:18:25.552698 <14>[ 20.901503] [IGT] drm_read: executing
11118 22:18:25.558926 IGT-Version: 1.2<14>[ 20.906387] [IGT] drm_read: exiting, ret=77
11119 22:18:25.562153 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11120 22:18:25.565553 Opened device: /dev/dri/card0
11121 22:18:25.572502 N<8>[ 20.918193] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>
11122 22:18:25.572887 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
11124 22:18:25.575324 o KMS driver or no outputs, pipes: 8, outputs: 0
11125 22:18:25.578903 [1mSubtest invalid-buffer: SKIP (0.000s)[0m
11126 22:18:25.594787 <14>[ 20.944000] [IGT] drm_read: executing
11127 22:18:25.602878 IGT-Version: 1.2<14>[ 20.948531] [IGT] drm_read: exiting, ret=77
11128 22:18:25.605173 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11129 22:18:25.607898 Opened device: /dev/dri/card0
11130 22:18:25.615297 N<8>[ 20.960762] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>
11131 22:18:25.616094 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
11133 22:18:25.620062 o KMS driver or no outputs, pipes: 8, outputs: 0
11134 22:18:25.621163 [1mSubtest fault-buffer: SKIP (0.000s)[0m
11135 22:18:25.637911 <14>[ 20.986583] [IGT] drm_read: executing
11136 22:18:25.644655 IGT-Version: 1.2<14>[ 20.991538] [IGT] drm_read: exiting, ret=77
11137 22:18:25.647605 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11138 22:18:25.651067 Opened device: /dev/dri/card0
11139 22:18:25.657438 N<8>[ 21.002426] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>
11140 22:18:25.658170 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
11142 22:18:25.661345 o KMS driver or no outputs, pipes: 8, outputs: 0
11143 22:18:25.663682 [1mSubtest empty-block: SKIP (0.000s)[0m
11144 22:18:25.680499 <14>[ 21.029045] [IGT] drm_read: executing
11145 22:18:25.687125 IGT-Version: 1.2<14>[ 21.033582] [IGT] drm_read: exiting, ret=77
11146 22:18:25.690061 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11147 22:18:25.693240 Opened device: /dev/dri/card0
11148 22:18:25.700240 N<8>[ 21.045797] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>
11149 22:18:25.701090 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
11151 22:18:25.703125 o KMS driver or no outputs, pipes: 8, outputs: 0
11152 22:18:25.706247 [1mSubtest empty-nonblock: SKIP (0.000s)[0m
11153 22:18:25.723662 <14>[ 21.071990] [IGT] drm_read: executing
11154 22:18:25.730286 IGT-Version: 1.2<14>[ 21.076685] [IGT] drm_read: exiting, ret=77
11155 22:18:25.733284 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11156 22:18:25.736038 Opened device: /dev/dri/card0
11157 22:18:25.743273 N<8>[ 21.088562] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>
11158 22:18:25.744140 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
11160 22:18:25.746216 o KMS driver or no outputs, pipes: 8, outputs: 0
11161 22:18:25.752866 [1mSubtest short-buffer-block: SKIP (0.000s)[0m
11162 22:18:25.766016 <14>[ 21.114761] [IGT] drm_read: executing
11163 22:18:25.772616 IGT-Version: 1.2<14>[ 21.119614] [IGT] drm_read: exiting, ret=77
11164 22:18:25.775657 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11165 22:18:25.779055 Opened device: /dev/dri/card0
11166 22:18:25.785669 N<8>[ 21.130790] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>
11167 22:18:25.786509 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
11169 22:18:25.788707 o KMS driver or no outputs, pipes: 8, outputs: 0
11170 22:18:25.795640 [1mSubtest short-buffer-nonblock: SKIP (0.000s)[0m
11171 22:18:25.809483 <14>[ 21.158079] [IGT] drm_read: executing
11172 22:18:25.812655 IGT-Version: 1.2<14>[ 21.162631] [IGT] drm_read: exiting, ret=77
11173 22:18:25.819504 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11174 22:18:25.822905 Opened device: /dev/dri/card0
11175 22:18:25.829640 N<8>[ 21.173926] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>
11176 22:18:25.830491 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
11178 22:18:25.835990 o KMS driver or no outputs, pipe<8>[ 21.184409] <LAVA_SIGNAL_TESTSET STOP>
11179 22:18:25.836562 s: 8, outputs: 0
11180 22:18:25.837200 Received signal: <TESTSET> STOP
11181 22:18:25.837567 Closing test_set drm_read
11182 22:18:25.842463 [1mSubtest short-buffer-wakeup: SKIP (0.000s)[0m
11183 22:18:25.862296 <8>[ 21.211400] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
11184 22:18:25.863136 Received signal: <TESTSET> START kms_addfb_basic
11185 22:18:25.863587 Starting test_set kms_addfb_basic
11186 22:18:25.886303 <14>[ 21.235298] [IGT] kms_addfb_basic: executing
11187 22:18:25.893089 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11188 22:18:25.899587 <14>[ 21.245078] [IGT] kms_addfb_basic: starting subtest unused-handle
11189 22:18:25.900315 Opened device: /dev/dri/card0
11190 22:18:25.902982 Starting subtest: unused-handle
11191 22:18:25.909789 [1mSubtest unused-handle: SUCCESS (0.000s)[0m
11192 22:18:25.915929 Test requirement<14>[ 21.262380] [IGT] kms_addfb_basic: exiting, ret=0
11193 22:18:25.919541 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11194 22:18:25.929873 Test requirem<8>[ 21.275192] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
11195 22:18:25.930449 ent: is_i915_device(fd)
11196 22:18:25.931098 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
11198 22:18:25.939600 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11199 22:18:25.942618 Test requirement: is_i915_device(fd)
11200 22:18:25.946518 No KMS driver or no outputs, pipes: 8, outputs: 0
11201 22:18:25.948902 <14>[ 21.299998] [IGT] kms_addfb_basic: executing
11202 22:18:25.957327 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11203 22:18:25.962266 <14>[ 21.309397] [IGT] kms_addfb_basic: starting subtest unused-pitches
11204 22:18:25.966557 Opened device: /dev/dri/card0
11205 22:18:25.968727 Starting subtest: unused-pitches
11206 22:18:25.972794 [1mSubtest unused-pitches: SUCCESS (0.000s)[0m
11207 22:18:25.979227 Test requirement<14>[ 21.327239] [IGT] kms_addfb_basic: exiting, ret=0
11208 22:18:25.985397 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11209 22:18:25.991683 Test requirem<8>[ 21.339485] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
11210 22:18:25.992424 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
11212 22:18:25.995248 ent: is_i915_device(fd)
11213 22:18:26.001935 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11214 22:18:26.005219 Test requirement: is_i915_device(fd)
11215 22:18:26.011585 No KMS driver or no outputs, pipes: 8, outputs: 0
11216 22:18:26.015241 <14>[ 21.365061] [IGT] kms_addfb_basic: executing
11217 22:18:26.022474 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11218 22:18:26.027950 <14>[ 21.374466] [IGT] kms_addfb_basic: starting subtest unused-offsets
11219 22:18:26.032355 Opened device: /dev/dri/card0
11220 22:18:26.034773 Starting subtest: unused-offsets
11221 22:18:26.038339 [1mSubtest unused-offsets: SUCCESS (0.000s)[0m
11222 22:18:26.044648 Test requirem<14>[ 21.392196] [IGT] kms_addfb_basic: exiting, ret=0
11223 22:18:26.050823 ent not met in function igt_require_i915, file ../lib/drmtest.c:721:
11224 22:18:26.057662 Test requi<8>[ 21.404385] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
11225 22:18:26.058397 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
11227 22:18:26.060956 rement: is_i915_device(fd)
11228 22:18:26.067515 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11229 22:18:26.071326 Test requirement: is_i915_device(fd)
11230 22:18:26.074689 No KMS driver or no outputs, pipes: 8, outputs: 0
11231 22:18:26.081292 <14>[ 21.429856] [IGT] kms_addfb_basic: executing
11232 22:18:26.087845 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11233 22:18:26.094277 <14>[ 21.439461] [IGT] kms_addfb_basic: starting subtest unused-modifier
11234 22:18:26.094846 Opened device: /dev/dri/card0
11235 22:18:26.097355 Starting subtest: unused-modifier
11236 22:18:26.104153 [1mSubtest unused-modifier: SUCCESS (0.000s)[0m
11237 22:18:26.110566 Test requir<14>[ 21.457274] [IGT] kms_addfb_basic: exiting, ret=0
11238 22:18:26.113760 ement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11239 22:18:26.124111 Test req<8>[ 21.469406] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
11240 22:18:26.124946 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11242 22:18:26.127295 uirement: is_i915_device(fd)
11243 22:18:26.134924 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11244 22:18:26.137334 Test requirement: is_i915_device(fd)
11245 22:18:26.140477 No KMS driver or no outputs, pipes: 8, outputs: 0
11246 22:18:26.147168 <14>[ 21.494861] [IGT] kms_addfb_basic: executing
11247 22:18:26.150237 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11248 22:18:26.156991 <14>[ 21.504428] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
11249 22:18:26.160421 Opened device: /dev/dri/card0
11250 22:18:26.163684 Starting subtest: clobberred-modifier
11251 22:18:26.173297 Test requirement not met in function igt_require_i915, fil<14>[ 21.522395] [IGT] kms_addfb_basic: exiting, ret=77
11252 22:18:26.176965 e ../lib/drmtest.c:721:
11253 22:18:26.179770 Test requirement: is_i915_device(fd)
11254 22:18:26.190203 [1mSubtest clobb<8>[ 21.534562] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
11255 22:18:26.191096 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11257 22:18:26.193898 erred-modifier: SKIP (0.000s)[0m
11258 22:18:26.199839 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11259 22:18:26.203015 Test requirement: is_i915_device(fd)
11260 22:18:26.213016 Test requirement not met in function igt_require_i915, file ../lib/d<14>[ 21.561390] [IGT] kms_addfb_basic: executing
11261 22:18:26.213595 rmtest.c:721:
11262 22:18:26.216266 Test requirement: is_i915_device(fd)
11263 22:18:26.226587 No KMS driv<14>[ 21.572176] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
11264 22:18:26.230140 er or no outputs, pipes: 8, outputs: 0
11265 22:18:26.236397 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11266 22:18:26.242744 Opened device: /dev/dri/<14>[ 21.590465] [IGT] kms_addfb_basic: exiting, ret=77
11267 22:18:26.243348 card0
11268 22:18:26.246306 Starting subtest: invalid-smem-bo-on-discrete
11269 22:18:26.259559 Test requirement not met i<8>[ 21.603403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
11270 22:18:26.260385 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11272 22:18:26.262778 n function igt_require_intel, file ../lib/drmtest.c:716:
11273 22:18:26.265823 Test requirement: is_intel_device(fd)
11274 22:18:26.272756 [1mSubtest invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
11275 22:18:26.282372 Test requirement not met in function igt_require_i915, file ../lib/<14>[ 21.630647] [IGT] kms_addfb_basic: executing
11276 22:18:26.282952 drmtest.c:721:
11277 22:18:26.285836 Test requirement: is_i915_device(fd)
11278 22:18:26.295902 Test requi<14>[ 21.640945] [IGT] kms_addfb_basic: starting subtest legacy-format
11279 22:18:26.299312 rement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11280 22:18:26.302012 Test requirement: is_i915_device(fd)
11281 22:18:26.309213 No KMS driver or no outputs, pipes: 8, outputs: 0
11282 22:18:26.312084 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11283 22:18:26.315406 Opened device: /dev/dri/card0
11284 22:18:26.322557 Starting subtes<14>[ 21.670547] [IGT] kms_addfb_basic: exiting, ret=0
11285 22:18:26.325865 t: legacy-format
11286 22:18:26.328880 Successfully fuzzed 10000 {bpp, depth} variations
11287 22:18:26.335739 [1mSubtest<8>[ 21.683490] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
11288 22:18:26.336707 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11290 22:18:26.339107 legacy-format: SUCCESS (0.012s)[0m
11291 22:18:26.348848 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11292 22:18:26.352327 Test requirement: is_i915_device(fd)
11293 22:18:26.362674 Test requirement not met in function igt_require_i915, file ../li<14>[ 21.709591] [IGT] kms_addfb_basic: executing
11294 22:18:26.363294 b/drmtest.c:721:
11295 22:18:26.365762 Test requirement: is_i915_device(fd)
11296 22:18:26.375252 No KMS driver or no outputs, pipes: 8, o<14>[ 21.722489] [IGT] kms_addfb_basic: starting subtest no-handle
11297 22:18:26.375835 utputs: 0
11298 22:18:26.381697 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11299 22:18:26.388230 Opened device: /dev/d<14>[ 21.736651] [IGT] kms_addfb_basic: exiting, ret=0
11300 22:18:26.388803 ri/card0
11301 22:18:26.391953 Starting subtest: no-handle
11302 22:18:26.401578 [1mSubtest no-handle: SUCCESS (0.000s)[<8>[ 21.749446] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
11303 22:18:26.402165 0m
11304 22:18:26.402820 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11306 22:18:26.411329 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11307 22:18:26.414844 Test requirement: is_i915_device(fd)
11308 22:18:26.421066 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11309 22:18:26.427920 Test requirement<14>[ 21.774689] [IGT] kms_addfb_basic: executing
11310 22:18:26.428506 : is_i915_device(fd)
11311 22:18:26.433956 No KMS driver or no outputs, pipes: 8, outputs: 0
11312 22:18:26.441039 IGT-Version: 1.27.1-g76<14>[ 21.788072] [IGT] kms_addfb_basic: starting subtest basic
11313 22:18:26.444180 6edf9 (aarch64) (Linux: 6.1.31 aarch64)
11314 22:18:26.448172 Opened device: /dev/dri/card0
11315 22:18:26.448756 Starting subtest: basic
11316 22:18:26.453758 <14>[ 21.801920] [IGT] kms_addfb_basic: exiting, ret=0
11317 22:18:26.454239
11318 22:18:26.457673 [1mSubtest basic: SUCCESS (0.000s)[0m
11319 22:18:26.467429 Test requirement not met in function i<8>[ 21.814407] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11320 22:18:26.468290 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11322 22:18:26.470713 gt_require_i915, file ../lib/drmtest.c:721:
11323 22:18:26.473819 Test requirement: is_i915_device(fd)
11324 22:18:26.480809 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11325 22:18:26.483707 Test requirement: is_i915_device(fd)
11326 22:18:26.490050 No KMS driver or no <14>[ 21.839639] [IGT] kms_addfb_basic: executing
11327 22:18:26.493561 outputs, pipes: 8, outputs: 0
11328 22:18:26.500446 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11329 22:18:26.506857 O<14>[ 21.852883] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
11330 22:18:26.510256 pened device: /dev/dri/card0
11331 22:18:26.510826 Starting subtest: bad-pitch-0
11332 22:18:26.519749 [1mSubtest bad-pitch-0: SUCCESS (0<14>[ 21.867332] [IGT] kms_addfb_basic: exiting, ret=0
11333 22:18:26.520326 .000s)[0m
11334 22:18:26.533341 Test requirement not met in function igt_require_i915, file ../lib/d<8>[ 21.880006] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
11335 22:18:26.533926 rmtest.c:721:
11336 22:18:26.534579 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11338 22:18:26.536231 Test requirement: is_i915_device(fd)
11339 22:18:26.545911 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11340 22:18:26.549931 Test requirement: is_i915_device(fd)
11341 22:18:26.552439 No KMS driver or no outputs, pipes: 8, outputs: 0
11342 22:18:26.555928 <14>[ 21.905383] [IGT] kms_addfb_basic: executing
11343 22:18:26.556406
11344 22:18:26.562449 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11345 22:18:26.566064 Opened device: /dev/dri/card0
11346 22:18:26.573135 <14>[ 21.918937] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
11347 22:18:26.576010 Starting subtest: bad-pitch-32
11348 22:18:26.579073 [1mSubtest bad-pitch-32: SUCCESS (0.000s)[0m
11349 22:18:26.585818 Test requirement<14>[ 21.933585] [IGT] kms_addfb_basic: exiting, ret=0
11350 22:18:26.592263 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11351 22:18:26.598446 Test requirem<8>[ 21.946172] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
11352 22:18:26.599291 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11354 22:18:26.602640 ent: is_i915_device(fd)
11355 22:18:26.608622 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11356 22:18:26.612147 Test requirement: is_i915_device(fd)
11357 22:18:26.615308 No KMS driver or no outputs, pipes: 8, outputs: 0
11358 22:18:26.622912 <14>[ 21.971929] [IGT] kms_addfb_basic: executing
11359 22:18:26.629983 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11360 22:18:26.630561 Opened device: /dev/dri/card0
11361 22:18:26.636150 <14>[ 21.984141] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
11362 22:18:26.639278 Starting subtest: bad-pitch-63
11363 22:18:26.645598 [1mSubtest bad-pitch-63: SUCCESS (0.000s)[0m
11364 22:18:26.649019 Test requirement<14>[ 21.998650] [IGT] kms_addfb_basic: exiting, ret=0
11365 22:18:26.656010 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11366 22:18:26.665524 Test requirem<8>[ 22.011309] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
11367 22:18:26.666101 ent: is_i915_device(fd)
11368 22:18:26.666733 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11370 22:18:26.675968 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11371 22:18:26.679030 Test requirement: is_i915_device(fd)
11372 22:18:26.682443 No KMS driver or no outputs, pipes: 8, outputs: 0
11373 22:18:26.689084 <14>[ 22.037542] [IGT] kms_addfb_basic: executing
11374 22:18:26.695647 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11375 22:18:26.696217 Opened device: /dev/dri/card0
11376 22:18:26.702425 <14>[ 22.049797] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
11377 22:18:26.705093 Starting subtest: bad-pitch-128
11378 22:18:26.711906 [1mSubtest bad-pitch-128: SUCCESS (0.000s)[0m
11379 22:18:26.715075 Test requireme<14>[ 22.064444] [IGT] kms_addfb_basic: exiting, ret=0
11380 22:18:26.722063 nt not met in function igt_require_i915, file ../lib/drmtest.c:721:
11381 22:18:26.731834 Test requir<8>[ 22.077088] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
11382 22:18:26.732406 ement: is_i915_device(fd)
11383 22:18:26.733045 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11385 22:18:26.741501 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11386 22:18:26.744666 Test requirement: is_i915_device(fd)
11387 22:18:26.747704 No KMS driver or no outputs, pipes: 8, outputs: 0
11388 22:18:26.754819 <14>[ 22.103664] [IGT] kms_addfb_basic: executing
11389 22:18:26.761158 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11390 22:18:26.761608 Opened device: /dev/dri/card0
11391 22:18:26.767925 <14>[ 22.115678] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
11392 22:18:26.771657 Starting subtest: bad-pitch-256
11393 22:18:26.778590 [1mSubtest bad-pitch-256: SUCCESS (0.000s)[0m
11394 22:18:26.784236 Test requirement<14>[ 22.130739] [IGT] kms_addfb_basic: exiting, ret=0
11395 22:18:26.787498 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11396 22:18:26.797699 Test requirem<8>[ 22.143272] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
11397 22:18:26.798273 ent: is_i915_device(fd)
11398 22:18:26.798914 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11400 22:18:26.807522 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11401 22:18:26.810596 Test requirement: is_i915_device(fd)
11402 22:18:26.814158 No KMS driver or no outputs, pipes: 8, outputs: 0
11403 22:18:26.820625 <14>[ 22.169083] [IGT] kms_addfb_basic: executing
11404 22:18:26.824586 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11405 22:18:26.827137 Opened device: /dev/dri/card0
11406 22:18:26.833922 <14>[ 22.181269] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
11407 22:18:26.837031 Starting subtest: bad-pitch-1024
11408 22:18:26.840776 [1mSubtest bad-pitch-1024: SUCCESS (0.000s)[0m
11409 22:18:26.847414 Test require<14>[ 22.196038] [IGT] kms_addfb_basic: exiting, ret=0
11410 22:18:26.853722 ment not met in function igt_require_i915, file ../lib/drmtest.c:721:
11411 22:18:26.863958 Test requ<8>[ 22.208548] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
11412 22:18:26.864451 irement: is_i915_device(fd)
11413 22:18:26.865202 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11415 22:18:26.873586 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11416 22:18:26.876572 Test requirement: is_i915_device(fd)
11417 22:18:26.879663 No KMS driver or no outputs, pipes: 8, outputs: 0
11418 22:18:26.886610 <14>[ 22.234819] [IGT] kms_addfb_basic: executing
11419 22:18:26.889816 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11420 22:18:26.893430 Opened device: /dev/dri/card0
11421 22:18:26.899787 <14>[ 22.247084] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
11422 22:18:26.903552 Starting subtest: bad-pitch-999
11423 22:18:26.906647 [1mSubtest bad-pitch-999: SUCCESS (0.000s)[0m
11424 22:18:26.913160 Test requireme<14>[ 22.261802] [IGT] kms_addfb_basic: exiting, ret=0
11425 22:18:26.919678 nt not met in function igt_require_i915, file ../lib/drmtest.c:721:
11426 22:18:26.926832 Test requir<8>[ 22.274248] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
11427 22:18:26.927726 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11429 22:18:26.929280 ement: is_i915_device(fd)
11430 22:18:26.936120 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11431 22:18:26.939581 Test requirement: is_i915_device(fd)
11432 22:18:26.945670 No KMS driver or no outputs, pipes: 8, outputs: 0
11433 22:18:26.949735 <14>[ 22.299798] [IGT] kms_addfb_basic: executing
11434 22:18:26.956860 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11435 22:18:26.959338 Opened device: /dev/dri/card0
11436 22:18:26.965761 <14>[ 22.312006] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
11437 22:18:26.969552 Starting subtest: bad-pitch-65536
11438 22:18:26.972212 [1mSubtest bad-pitch-65536: SUCCESS (0.000s)[0m
11439 22:18:26.979125 Test requi<14>[ 22.326921] [IGT] kms_addfb_basic: exiting, ret=0
11440 22:18:26.986571 rement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11441 22:18:26.992389 Test re<8>[ 22.339480] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
11442 22:18:26.993376 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11444 22:18:26.995336 quirement: is_i915_device(fd)
11445 22:18:27.002111 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11446 22:18:27.005588 Test requirement: is_i915_device(fd)
11447 22:18:27.012479 No KMS driver or no outputs, pipes: 8, outputs: 0
11448 22:18:27.015169 <14>[ 22.365674] [IGT] kms_addfb_basic: executing
11449 22:18:27.021691 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11450 22:18:27.025094 Opened device: /dev/dri/card0
11451 22:18:27.032178 <14>[ 22.380169] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
11452 22:18:27.035306 Starting subtest: invalid-get-prop-any
11453 22:18:27.044876 [1mSubtest invalid-get-<14>[ 22.392376] [IGT] kms_addfb_basic: exiting, ret=0
11454 22:18:27.048684 prop-any: SUCCESS (0.000s)[0m
11455 22:18:27.058231 Test requirement not met in function igt_require<8>[ 22.404339] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11456 22:18:27.059095 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11458 22:18:27.061824 _i915, file ../lib/drmtest.c:721:
11459 22:18:27.064946 Test requirement: is_i915_device(fd)
11460 22:18:27.071291 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11461 22:18:27.075012 Test requirement: is_i915_device(fd)
11462 22:18:27.082231 No KMS driver or no outputs, p<14>[ 22.430613] [IGT] kms_addfb_basic: executing
11463 22:18:27.085364 ipes: 8, outputs: 0
11464 22:18:27.091534 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11465 22:18:27.092111 Opened device: /dev/dri/card0
11466 22:18:27.098110 <14>[ 22.446585] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
11467 22:18:27.100982 Starting subtest: invalid-get-prop
11468 22:18:27.111614 [1mSubtest invalid-get-prop<14>[ 22.458607] [IGT] kms_addfb_basic: exiting, ret=0
11469 22:18:27.112197 : SUCCESS (0.000s)[0m
11470 22:18:27.124503 Test requirement not met in function igt_require_i915, f<8>[ 22.470376] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11471 22:18:27.125409 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11473 22:18:27.127722 ile ../lib/drmtest.c:721:
11474 22:18:27.131231 Test requirement: is_i915_device(fd)
11475 22:18:27.137850 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11476 22:18:27.140437 Test requirement: is_i915_device(fd)
11477 22:18:27.147475 No KMS driver or no outputs, pipes: 8,<14>[ 22.496990] [IGT] kms_addfb_basic: executing
11478 22:18:27.151104 outputs: 0
11479 22:18:27.154323 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11480 22:18:27.157220 Opened device: /dev/dri/card0
11481 22:18:27.163613 <14>[ 22.512513] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
11482 22:18:27.170755 Starting subtest: invalid-set-prop-any
11483 22:18:27.177266 [1mSubtest invalid-set-<14>[ 22.524706] [IGT] kms_addfb_basic: exiting, ret=0
11484 22:18:27.181118 prop-any: SUCCESS (0.000s)[0m
11485 22:18:27.191250 Test requirement not met in function igt_require<8>[ 22.536686] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11486 22:18:27.192132 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11488 22:18:27.193753 _i915, file ../lib/drmtest.c:721:
11489 22:18:27.197108 Test requirement: is_i915_device(fd)
11490 22:18:27.204283 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11491 22:18:27.206949 Test requirement: is_i915_device(fd)
11492 22:18:27.213464 No KMS driver or no outputs, p<14>[ 22.563447] [IGT] kms_addfb_basic: executing
11493 22:18:27.216866 ipes: 8, outputs: 0
11494 22:18:27.223819 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11495 22:18:27.226592 Opened device: /dev/dri/card0
11496 22:18:27.233762 <14>[ 22.578894] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
11497 22:18:27.237104 Starting subtest: invalid-set-prop
11498 22:18:27.243378 [1mSubtest invalid-set-prop<14>[ 22.590956] [IGT] kms_addfb_basic: exiting, ret=0
11499 22:18:27.243947 : SUCCESS (0.000s)[0m
11500 22:18:27.256506 Test requirement not met in function igt_require_i915, f<8>[ 22.602654] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11501 22:18:27.257356 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11503 22:18:27.259413 ile ../lib/drmtest.c:721:
11504 22:18:27.262751 Test requirement: is_i915_device(fd)
11505 22:18:27.270058 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11506 22:18:27.273063 Test requirement: is_i915_device(fd)
11507 22:18:27.279434 No KMS driver or no ou<14>[ 22.627724] [IGT] kms_addfb_basic: executing
11508 22:18:27.282727 tputs, pipes: 8, outputs: 0
11509 22:18:27.285707 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11510 22:18:27.289175 Opened device: /dev/dri/card0
11511 22:18:27.296648 <14>[ 22.645495] [IGT] kms_addfb_basic: starting subtest master-rmfb
11512 22:18:27.299451 Starting subtest: master-rmfb
11513 22:18:27.306630 [1mSubtest maste<14>[ 22.654811] [IGT] kms_addfb_basic: exiting, ret=0
11514 22:18:27.309621 r-rmfb: SUCCESS (0.000s)[0m
11515 22:18:27.319989 Test requirement not met in function igt_require_i<8>[ 22.667453] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
11516 22:18:27.320889 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11518 22:18:27.322894 915, file ../lib/drmtest.c:721:
11519 22:18:27.326213 Test requirement: is_i915_device(fd)
11520 22:18:27.332848 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11521 22:18:27.335766 Test requirement: is_i915_device(fd)
11522 22:18:27.343070 No KMS driver or<14>[ 22.691993] [IGT] kms_addfb_basic: executing
11523 22:18:27.346354 no outputs, pipes: 8, outputs: 0
11524 22:18:27.352790 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11525 22:18:27.355773 Opened device: /dev/dri/card0
11526 22:18:27.366874 <14>[ 22.712080] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
11527 22:18:27.373222 Starting subtest<14>[ 22.720063] [IGT] kms_addfb_basic: exiting, ret=0
11528 22:18:27.373802 : addfb25-modifier-no-flag
11529 22:18:27.386247 [1mSubtest addfb25-modifier-no-flag: SUCCESS (0.000<8>[ 22.732594] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
11530 22:18:27.386871 s)[0m
11531 22:18:27.387570 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11533 22:18:27.395733 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11534 22:18:27.398910 Test requirement: is_i915_device(fd)
11535 22:18:27.409509 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 22.758072] [IGT] kms_addfb_basic: executing
11536 22:18:27.410107 1:
11537 22:18:27.412427 Test requirement: is_i915_device(fd)
11538 22:18:27.419310 No KMS driver or no outputs, pipes: 8, outputs: 0
11539 22:18:27.423394 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11540 22:18:27.432081 Opened device: /dev<14>[ 22.778108] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
11541 22:18:27.432650 /dri/card0
11542 22:18:27.435380 Starting subtest: addfb25-bad-modifier
11543 22:18:27.448683 (kms_addfb_basic:430) CRITICAL: Test assertion failure function addfb25_<14>[ 22.795989] [IGT] kms_addfb_basic: exiting, ret=98
11544 22:18:27.452165 tests, file ../tests/kms_addfb_basic.c:662:
11545 22:18:27.462249 (kms_addfb_basic:430) CRITICAL: Fai<8>[ 22.808490] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
11546 22:18:27.463102 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11548 22:18:27.478673 led assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11549 22:18:27.484730 (kms_addfb_basic:430) CRITICAL: error<14>[ 22.834028] [IGT] kms_addfb_basic: executing
11550 22:18:27.485200 : 0 != -1
11551 22:18:27.489194 Stack trace:
11552 22:18:27.491565 #0 ../lib/igt_core.c:1963 __igt_fail_assert()
11553 22:18:27.494929 #1 [<unknown>+0xd39247e0]
11554 22:18:27.498468 #2 [<unknown>+0xd3926278]
11555 22:18:27.498938 #3 [<unknown>+0xd392167c]
11556 22:18:27.504675 #4 [__libc_st<14>[ 22.854287] [IGT] kms_addfb_basic: exiting, ret=77
11557 22:18:27.507929 art_main+0xe8]
11558 22:18:27.508391 #5 [<unknown>+0xd39216b4]
11559 22:18:27.511645 #6 [<unknown>+0xd39216b4]
11560 22:18:27.521252 Subtes<8>[ 22.866229] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
11561 22:18:27.522077 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11563 22:18:27.525402 t addfb25-bad-modifier failed.
11564 22:18:27.525973 **** DEBUG ****
11565 22:18:27.534726 (kms_addfb_basic:430) ioctl_wrappers-DEBUG: Test requirement passed: igt_has_fb_modifiers(fd)
11566 22:18:27.544383 (kms_addfb_basic:430) CRITICAL: Test assertion failure function <14>[ 22.892537] [IGT] kms_addfb_basic: executing
11567 22:18:27.547462 addfb25_tests, file ../tests/kms_addfb_basic.c:662:
11568 22:18:27.564164 (kms_addfb_basic:430) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0<14>[ 22.913015] [IGT] kms_addfb_basic: exiting, ret=77
11569 22:18:27.577742 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11571 22:18:27.580559 xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -<8>[ 22.925131] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
11572 22:18:27.581035 1
11573 22:18:27.584151 (kms_addfb_basic:430) CRITICAL: error: 0 != -1
11574 22:18:27.587632 (kms_addfb_basic:430) igt_core-INFO: Stack trace:
11575 22:18:27.594481 (kms_addfb_basic:430) igt_core-INFO: #0 ../lib/igt_core.c:1963 __igt_fail_assert()
11576 22:18:27.600672 (kms_addfb_basic:430<14>[ 22.950364] [IGT] kms_addfb_basic: executing
11577 22:18:27.607338 ) igt_core-INFO: #1 [<unknown>+0xd39247e0]
11578 22:18:27.610420 (kms_addfb_basic:430) igt_core-INFO: #2 [<unknown>+0xd3926278]
11579 22:18:27.624138 (kms_addfb_basic:430) igt_core-INFO: #3 [<unknown>+0xd392167c]<14>[ 22.970890] [IGT] kms_addfb_basic: exiting, ret=77
11580 22:18:27.624709
11581 22:18:27.626951 (kms_addfb_basic:430) igt_core-INFO: #4 [__libc_start_main+0xe8]
11582 22:18:27.637181 (kms_addfb<8>[ 22.982792] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
11583 22:18:27.638015 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11585 22:18:27.643655 _basic:430) igt_core-INFO: #5 [<unknown>+0xd39216b4]
11586 22:18:27.650328 (kms_addfb_basic:430) igt_core-INFO: #6 [<unknown>+0xd39216b4]
11587 22:18:27.650901 **** END ****
11588 22:18:27.653568 [1mSubtest addfb25-bad-modifier: FAIL (0.009s)[0m
11589 22:18:27.659954 Test requirement<14>[ 23.009644] [IGT] kms_addfb_basic: executing
11590 22:18:27.666584 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11591 22:18:27.669700 Test requirement: is_i915_device(fd)
11592 22:18:27.680804 Test requirement not met in function igt_require_i915, file ../lib/drmt<14>[ 23.029540] [IGT] kms_addfb_basic: exiting, ret=77
11593 22:18:27.683290 est.c:721:
11594 22:18:27.686884 Test requirement: is_i915_device(fd)
11595 22:18:27.696357 No KMS driver or no outputs, p<8>[ 23.041437] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
11596 22:18:27.697243 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11598 22:18:27.699943 ipes: 8, outputs: 0
11599 22:18:27.702375 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11600 22:18:27.705875 Opened device: /dev/dri/card0
11601 22:18:27.712271 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11602 22:18:27.719308 Test requ<14>[ 23.067177] [IGT] kms_addfb_basic: executing
11603 22:18:27.722109 irement: is_i915_device(fd)
11604 22:18:27.725451 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
11605 22:18:27.735458 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11606 22:18:27.739277 <14>[ 23.087470] [IGT] kms_addfb_basic: exiting, ret=77
11607 22:18:27.742073 Test requirement: is_i915_device(fd)
11608 22:18:27.755269 No KMS driver or no outputs, pipes: 8, out<8>[ 23.099653] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
11609 22:18:27.755919 puts: 0
11610 22:18:27.756581 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11612 22:18:27.761786 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11613 22:18:27.762560 Opened device: /dev/dri/card0
11614 22:18:27.771794 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11615 22:18:27.778592 Test requirement: is_<14>[ 23.125298] [IGT] kms_addfb_basic: executing
11616 22:18:27.779219 i915_device(fd)
11617 22:18:27.781991 [1mSubtest addfb25-x-tiled-legacy: SKIP (0.000s)[0m
11618 22:18:27.791693 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11619 22:18:27.798235 Test requirement: is_<14>[ 23.145746] [IGT] kms_addfb_basic: exiting, ret=77
11620 22:18:27.798857 i915_device(fd)
11621 22:18:27.804941 No KMS driver or no outputs, pipes: 8, outputs: 0
11622 22:18:27.811569 IGT-Version:<8>[ 23.157536] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
11623 22:18:27.812420 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11625 22:18:27.815919 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11626 22:18:27.818169 Opened device: /dev/dri/card0
11627 22:18:27.825018 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11628 22:18:27.827950 Test requirement: is_i915_device(fd)
11629 22:18:27.834546 [1m<14>[ 23.183013] [IGT] kms_addfb_basic: executing
11630 22:18:27.841159 Subtest addfb25-framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11631 22:18:27.847852 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11632 22:18:27.854425 Test requirement: is_i915_devic<14>[ 23.203282] [IGT] kms_addfb_basic: exiting, ret=77
11633 22:18:27.855151 e(fd)
11634 22:18:27.861678 No KMS driver or no outputs, pipes: 8, outputs: 0
11635 22:18:27.871031 IGT-Version: 1.27.1-g7<8>[ 23.215333] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
11636 22:18:27.871818 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11638 22:18:27.874186 66edf9 (aarch64) (Linux: 6.1.31 aarch64)
11639 22:18:27.877564 Opened device: /dev/dri/card0
11640 22:18:27.884537 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11641 22:18:27.887422 Test requirement: is_i915_device(fd)
11642 22:18:27.891270 Test requireme<14>[ 23.240576] [IGT] kms_addfb_basic: executing
11643 22:18:27.897607 nt not met in function igt_require_i915, file ../lib/drmtest.c:721:
11644 22:18:27.900773 Test requirement: is_i915_device(fd)
11645 22:18:27.907442 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
11646 22:18:27.913562 No KMS driver or<14>[ 23.261273] [IGT] kms_addfb_basic: exiting, ret=77
11647 22:18:27.917906 no outputs, pipes: 8, outputs: 0
11648 22:18:27.926940 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux<8>[ 23.273188] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>
11649 22:18:27.927637 : 6.1.31 aarch64)
11650 22:18:27.928295 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11652 22:18:27.929986 Opened device: /dev/dri/card0
11653 22:18:27.936999 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11654 22:18:27.940392 Test requirement: is_i915_device(fd)
11655 22:18:27.950225 Test requirement not met in function <14>[ 23.297810] [IGT] kms_addfb_basic: executing
11656 22:18:27.953361 igt_require_i915, file ../lib/drmtest.c:721:
11657 22:18:27.956296 Test requirement: is_i915_device(fd)
11658 22:18:27.959805 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11659 22:18:27.969679 No KMS driver or no outputs, pipes<14>[ 23.317926] [IGT] kms_addfb_basic: exiting, ret=77
11660 22:18:27.970153 : 8, outputs: 0
11661 22:18:27.976524 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11662 22:18:27.983089 <8>[ 23.329594] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>
11663 22:18:27.983707
11664 22:18:27.984358 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11666 22:18:27.986629 Opened device: /dev/dri/card0
11667 22:18:27.992933 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11668 22:18:27.996598 Test requirement: is_i915_device(fd)
11669 22:18:28.006409 Test requirement not met in function igt_require_i915, <14>[ 23.354218] [IGT] kms_addfb_basic: executing
11670 22:18:28.010143 file ../lib/drmtest.c:721:
11671 22:18:28.012842 Test requirement: is_i915_device(fd)
11672 22:18:28.016824 [1mSubtest tile-pitch-mismatch: SKIP (0.000s)[0m
11673 22:18:28.019698 No KMS driver or no outputs, pipes: 8, outputs: 0
11674 22:18:28.026293 IGT-Ver<14>[ 23.374707] [IGT] kms_addfb_basic: exiting, ret=77
11675 22:18:28.032531 sion: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11676 22:18:28.039270 Opened device: /dev/dri<8>[ 23.386506] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>
11677 22:18:28.039839 /card0
11678 22:18:28.040482 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11680 22:18:28.049333 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11681 22:18:28.052568 Test requirement: is_i915_device(fd)
11682 22:18:28.062652 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 23.411347] [IGT] kms_addfb_basic: executing
11683 22:18:28.063278 1:
11684 22:18:28.066074 Test requirement: is_i915_device(fd)
11685 22:18:28.068954 [1mSubtest basic-y-tiled-legacy: SKIP (0.000s)[0m
11686 22:18:28.075699 No KMS driver or no outputs, pipes: 8, outputs: 0
11687 22:18:28.082693 IGT-Version: 1.27.1-g766edf9 (<14>[ 23.431473] [IGT] kms_addfb_basic: exiting, ret=77
11688 22:18:28.085607 aarch64) (Linux: 6.1.31 aarch64)
11689 22:18:28.089574 Opened device: /dev/dri/card0
11690 22:18:28.096120 Test requiremen<8>[ 23.443200] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>
11691 22:18:28.097011 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11693 22:18:28.102645 t not met in function igt_require_i915, file ../lib/drmtest.c:721:
11694 22:18:28.105953 Test requirement: is_i915_device(fd)
11695 22:18:28.112217 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11696 22:18:28.119315 Test requirement: i<14>[ 23.468049] [IGT] kms_addfb_basic: executing
11697 22:18:28.122596 s_i915_device(fd)
11698 22:18:28.125685 No KMS driver or no outputs, pipes: 8, outputs: 0
11699 22:18:28.128316 [1mSubtest size-max: SKIP (0.000s)[0m
11700 22:18:28.135153 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11701 22:18:28.138664 O<14>[ 23.488423] [IGT] kms_addfb_basic: exiting, ret=77
11702 22:18:28.141774 pened device: /dev/dri/card0
11703 22:18:28.154940 Test requirement not met in function igt_require_i<8>[ 23.500438] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>
11704 22:18:28.155531 915, file ../lib/drmtest.c:721:
11705 22:18:28.156178 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11707 22:18:28.157964 Test requirement: is_i915_device(fd)
11708 22:18:28.168406 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11709 22:18:28.171560 Test requirement: is_i915_device(fd)
11710 22:18:28.174843 No KMS driver or<14>[ 23.524817] [IGT] kms_addfb_basic: executing
11711 22:18:28.178649 no outputs, pipes: 8, outputs: 0
11712 22:18:28.181168 [1mSubtest too-wide: SKIP (0.000s)[0m
11713 22:18:28.188979 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11714 22:18:28.191012 Opened device: /dev/dri/card0
11715 22:18:28.197561 Test <14>[ 23.545260] [IGT] kms_addfb_basic: exiting, ret=77
11716 22:18:28.204291 requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11717 22:18:28.211106 Te<8>[ 23.557128] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
11718 22:18:28.212013 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11720 22:18:28.214159 st requirement: is_i915_device(fd)
11721 22:18:28.221490 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11722 22:18:28.223897 Test requirement: is_i915_device(fd)
11723 22:18:28.231036 No KMS driver or no outputs, pipes: 8, outputs: 0
11724 22:18:28.234020 <14>[ 23.583234] [IGT] kms_addfb_basic: executing
11725 22:18:28.237456 [1mSubtest too-high: SKIP (0.000s)[0m
11726 22:18:28.243950 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11727 22:18:28.247247 Opened device: /dev/dri/card0
11728 22:18:28.253765 Test requirement not met in function igt<14>[ 23.603531] [IGT] kms_addfb_basic: exiting, ret=77
11729 22:18:28.260203 _require_i915, file ../lib/drmtest.c:721:
11730 22:18:28.263974 Test requirement: is_i915_device(fd)
11731 22:18:28.270101 <8>[ 23.615531] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
11732 22:18:28.270599
11733 22:18:28.271367 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11735 22:18:28.277110 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11736 22:18:28.280607 Test requirement: is_i915_device(fd)
11737 22:18:28.283379 No KMS driver or no outputs, pipes: 8, outputs: 0
11738 22:18:28.294135 [1mSubtest bo-too-small: SKIP (0.0<14>[ 23.641078] [IGT] kms_addfb_basic: executing
11739 22:18:28.294709 00s)[0m
11740 22:18:28.300161 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11741 22:18:28.303759 Opened device: /dev/dri/card0
11742 22:18:28.313299 Test requirement not met in function igt_require_i915, file ../lib/drmt<14>[ 23.661739] [IGT] kms_addfb_basic: exiting, ret=77
11743 22:18:28.313882 est.c:721:
11744 22:18:28.317028 Test requirement: is_i915_device(fd)
11745 22:18:28.326667 Test requirement not met in fu<8>[ 23.673430] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
11746 22:18:28.327587 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11748 22:18:28.333027 nction igt_require_i915, file ../lib/drmtest.c:721:
11749 22:18:28.336078 Test requirement: is_i915_device(fd)
11750 22:18:28.339668 No KMS driver or no outputs, pipes: 8, outputs: 0
11751 22:18:28.342883 [1mSubtest small-bo: SKIP (0.000s)[0m
11752 22:18:28.350019 IGT-Version: 1.27.1-g766e<14>[ 23.699625] [IGT] kms_addfb_basic: executing
11753 22:18:28.353112 df9 (aarch64) (Linux: 6.1.31 aarch64)
11754 22:18:28.356411 Opened device: /dev/dri/card0
11755 22:18:28.362634 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11756 22:18:28.369357 Test requirement: is_i9<14>[ 23.719509] [IGT] kms_addfb_basic: exiting, ret=77
11757 22:18:28.373086 15_device(fd)
11758 22:18:28.385834 Test requirement not met in function igt_require_i915, file ../li<8>[ 23.731470] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
11759 22:18:28.386700 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11761 22:18:28.389120 b/drmtest.c:721:
11762 22:18:28.392511 Test requirement: is_i915_device(fd)
11763 22:18:28.395550 No KMS driver or no outputs, pipes: 8, outputs: 0
11764 22:18:28.402481 [1mSubtest bo-too-small-due-to-tiling: SKIP (0.000s)[0m
11765 22:18:28.408724 IGT-Version: 1.27.1-g766edf9 (aarch64) (Li<14>[ 23.757653] [IGT] kms_addfb_basic: executing
11766 22:18:28.412326 nux: 6.1.31 aarch64)
11767 22:18:28.412897 Opened device: /dev/dri/card0
11768 22:18:28.422538 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11769 22:18:28.425304 Test requirement: is_i915_device(fd)
11770 22:18:28.429302 Te<14>[ 23.777861] [IGT] kms_addfb_basic: exiting, ret=77
11771 22:18:28.435487 st requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11772 22:18:28.442356 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11774 22:18:28.445421 <8>[ 23.790113] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
11775 22:18:28.446032
11776 22:18:28.451675 Test requirement: is_i915_devic<8>[ 23.799390] <LAVA_SIGNAL_TESTSET STOP>
11777 22:18:28.452251 e(fd)
11778 22:18:28.452884 Received signal: <TESTSET> STOP
11779 22:18:28.453356 Closing test_set kms_addfb_basic
11780 22:18:28.455112 No KMS driver or no outputs, pipes: 8, outputs: 0
11781 22:18:28.461518 [1mSubtest addfb25-y-tiled-legacy: SKIP (0.000s)[0m
11782 22:18:28.465534 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11783 22:18:28.468380 Opened device: /dev/dri/card0
11784 22:18:28.474984 Test requirement not met in func<8>[ 23.824905] <LAVA_SIGNAL_TESTSET START kms_atomic>
11785 22:18:28.475834 Received signal: <TESTSET> START kms_atomic
11786 22:18:28.476247 Starting test_set kms_atomic
11787 22:18:28.481636 tion igt_require_i915, file ../lib/drmtest.c:721:
11788 22:18:28.484583 Test requirement: is_i915_device(fd)
11789 22:18:28.491202 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11790 22:18:28.497953 Test requirement: is_i915_device(fd)<14>[ 23.847718] [IGT] kms_atomic: executing
11791 22:18:28.498423
11792 22:18:28.504832 No KMS driver <14>[ 23.853405] [IGT] kms_atomic: exiting, ret=77
11793 22:18:28.507585 or no outputs, pipes: 8, outputs: 0
11794 22:18:28.521423 [1mSubtest addfb25-yf-tiled-legacy: SKIP (<8>[ 23.865399] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>
11795 22:18:28.522002 0.000s)[0m
11796 22:18:28.522652 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11798 22:18:28.527574 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11799 22:18:28.528232 Opened device: /dev/dri/card0
11800 22:18:28.537750 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11801 22:18:28.540564 Test requirement:<14>[ 23.891698] [IGT] kms_atomic: executing
11802 22:18:28.547076 is_i915_device(<14>[ 23.896518] [IGT] kms_atomic: exiting, ret=77
11803 22:18:28.547699 fd)
11804 22:18:28.563907 Test requirement not met in function igt_require_i915, file ../lib/drmtest.<8>[ 23.908200] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>
11805 22:18:28.564499 c:721:
11806 22:18:28.565158 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11808 22:18:28.566836 Test requirement: is_i915_device(fd)
11809 22:18:28.570453 No KMS driver or no outputs, pipes: 8, outputs: 0
11810 22:18:28.577175 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000s)[0m
11811 22:18:28.583833 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1<14>[ 23.934691] [IGT] kms_atomic: executing
11812 22:18:28.586497 .31 aarch64)
11813 22:18:28.590302 Op<14>[ 23.939524] [IGT] kms_atomic: exiting, ret=77
11814 22:18:28.593427 ened device: /dev/dri/card0
11815 22:18:28.606477 Test requirement not met in function igt_require_i9<8>[ 23.951130] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
11816 22:18:28.607355 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11818 22:18:28.610020 15, file ../lib/drmtest.c:721:
11819 22:18:28.613103 Test requirement: is_i915_device(fd)
11820 22:18:28.619748 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11821 22:18:28.623042 Test requirement: is_i915_device(fd)
11822 22:18:28.630450 No KMS driver or <14>[ 23.978145] [IGT] kms_atomic: executing
11823 22:18:28.636424 no outputs, pipe<14>[ 23.983790] [IGT] kms_atomic: exiting, ret=77
11824 22:18:28.637030 s: 8, outputs: 0
11825 22:18:28.640519 [1mSubtest addfb25-4-tiled: SKIP (0.000s)[0m
11826 22:18:28.649513 IGT-Version: 1<8>[ 23.995367] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
11827 22:18:28.650347 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11829 22:18:28.652704 .27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11830 22:18:28.656050 Opened device: /dev/dri/card0
11831 22:18:28.663492 No KMS driver or no outputs, pipes: 8, outputs: 0
11832 22:18:28.666070 [1mSubtest plane-overlay-legacy: SKIP (0.000s)[0m
11833 22:18:28.672400 IGT-Version: 1.27.1-g76<14>[ 24.021340] [IGT] kms_atomic: executing
11834 22:18:28.679058 6edf9 (aarch64) <14>[ 24.026767] [IGT] kms_atomic: exiting, ret=77
11835 22:18:28.679591 (Linux: 6.1.31 aarch64)
11836 22:18:28.682608 Opened device: /dev/dri/card0
11837 22:18:28.692581 No KMS driver or no outp<8>[ 24.038372] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>
11838 22:18:28.693242 uts, pipes: 8, outputs: 0
11839 22:18:28.693902 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11841 22:18:28.698907 [1mSubtest plane-primary-legacy: SKIP (0.000s)[0m
11842 22:18:28.705961 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11843 22:18:28.706536 Opened device: /dev/dri/card0
11844 22:18:28.712227 No KMS driver or no outputs, pipe<14>[ 24.063494] [IGT] kms_atomic: executing
11845 22:18:28.718981 s: 8, outputs: 0<14>[ 24.068834] [IGT] kms_atomic: exiting, ret=77
11846 22:18:28.719592
11847 22:18:28.725984 [1mSubtest plane-primary-overlay-mutable-zpos: SKIP (0.000s)[0m
11848 22:18:28.736003 IGT-Version<8>[ 24.080515] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>
11849 22:18:28.736856 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11851 22:18:28.739374 : 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11852 22:18:28.743422 Opened device: /dev/dri/card0
11853 22:18:28.745798 No KMS driver or no outputs, pipes: 8, outputs: 0
11854 22:18:28.751839 [1mSubtest plane-immutable-zpos: SKIP (0.000s)[0m
11855 22:18:28.758429 IGT-Version: 1.27.1-<14>[ 24.106970] [IGT] kms_atomic: executing
11856 22:18:28.761899 g766edf9 (aarch6<14>[ 24.111736] [IGT] kms_atomic: exiting, ret=77
11857 22:18:28.765355 4) (Linux: 6.1.31 aarch64)
11858 22:18:28.768541 Opened device: /dev/dri/card0
11859 22:18:28.778513 No KMS driver or no o<8>[ 24.123965] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>
11860 22:18:28.779520 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
11862 22:18:28.781795 utputs, pipes: 8, outputs: 0
11863 22:18:28.785009 [1mSubtest test-only: SKIP (0.000s)[0m
11864 22:18:28.788149 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11865 22:18:28.791704 Opened device: /dev/dri/card0
11866 22:18:28.798301 No KMS driver or no outputs, pipes: 8, outputs: 0
11867 22:18:28.801451 [1mSu<14>[ 24.150487] [IGT] kms_atomic: executing
11868 22:18:28.808102 btest plane-curs<14>[ 24.156137] [IGT] kms_atomic: exiting, ret=77
11869 22:18:28.811708 or-legacy: SKIP (0.000s)[0m
11870 22:18:28.822206 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1<8>[ 24.168311] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
11871 22:18:28.823056 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
11873 22:18:28.824683 .31 aarch64)
11874 22:18:28.828483 Opened device: /dev/dri/card0
11875 22:18:28.831526 No KMS driver or no outputs, pipes: 8, outputs: 0
11876 22:18:28.835071 [1mSubtest plane-invalid-params: SKIP (0.000s)[0m
11877 22:18:28.844520 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch<14>[ 24.194356] [IGT] kms_atomic: executing
11878 22:18:28.845087 64)
11879 22:18:28.851158 Opened devi<14>[ 24.199713] [IGT] kms_atomic: exiting, ret=77
11880 22:18:28.854574 ce: /dev/dri/card0
11881 22:18:28.857710 No KMS driver or no outputs, pipes: 8, outputs: 0
11882 22:18:28.864683 [1mSubte<8>[ 24.211467] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>
11883 22:18:28.865644 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
11885 22:18:28.871146 st plane-invalid-params-fence: SKIP (0.000s)[0m
11886 22:18:28.874402 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11887 22:18:28.877728 Opened device: /dev/dri/card0
11888 22:18:28.884019 No KMS driver or no outputs, pipes: 8, outputs: 0
11889 22:18:28.887702 [1mSubtest <14>[ 24.237107] [IGT] kms_atomic: executing
11890 22:18:28.893943 crtc-invalid-par<14>[ 24.242584] [IGT] kms_atomic: exiting, ret=77
11891 22:18:28.897620 ams: SKIP (0.000s)[0m
11892 22:18:28.907567 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
11894 22:18:28.910393 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aa<8>[ 24.254457] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
11895 22:18:28.910875 rch64)
11896 22:18:28.913583 Opened device: /dev/dri/card0
11897 22:18:28.916955 No KMS driver or no outputs, pipes: 8, outputs: 0
11898 22:18:28.921332 [1mSubtest crtc-invalid-params-fence: SKIP (0.000s)[0m
11899 22:18:28.931455 <14>[ 24.280730] [IGT] kms_atomic: executing
11900 22:18:28.938075 IGT-Version: 1.2<14>[ 24.285537] [IGT] kms_atomic: exiting, ret=77
11901 22:18:28.941303 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11902 22:18:28.944379 Opened device: /dev/dri/card0
11903 22:18:28.951603 N<8>[ 24.297224] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>
11904 22:18:28.952466 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
11906 22:18:28.954208 o KMS driver or no outputs, pipes: 8, outputs: 0
11907 22:18:28.960769 [1mSubtest atomic-invalid-params: SKIP (0.000s)[0m
11908 22:18:28.973945 <14>[ 24.322825] [IGT] kms_atomic: executing
11909 22:18:28.980418 IGT-Version: 1.2<14>[ 24.327563] [IGT] kms_atomic: exiting, ret=77
11910 22:18:28.983545 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11911 22:18:28.986960 Opened device: /dev/dri/card0
11912 22:18:28.993204 N<8>[ 24.339338] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>
11913 22:18:28.994035 Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
11915 22:18:29.000317 o KMS driver or no outputs, pipe<8>[ 24.349400] <LAVA_SIGNAL_TESTSET STOP>
11916 22:18:29.001141 Received signal: <TESTSET> STOP
11917 22:18:29.001537 Closing test_set kms_atomic
11918 22:18:29.003346 s: 8, outputs: 0
11919 22:18:29.007129 [1mSubtest atomic_plane_damage: SKIP (0.000s)[0m
11920 22:18:29.027565 <8>[ 24.376339] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
11921 22:18:29.028405 Received signal: <TESTSET> START kms_flip_event_leak
11922 22:18:29.028804 Starting test_set kms_flip_event_leak
11923 22:18:29.050782 <14>[ 24.399425] [IGT] kms_flip_event_leak: executing
11924 22:18:29.056976 IGT-Version: 1.2<14>[ 24.404899] [IGT] kms_flip_event_leak: exiting, ret=77
11925 22:18:29.060244 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11926 22:18:29.063117 Opened device: /dev/dri/card0
11927 22:18:29.070054 N<8>[ 24.417727] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11928 22:18:29.070923 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11930 22:18:29.076344 o KMS driver or no outputs, pipe<8>[ 24.426406] <LAVA_SIGNAL_TESTSET STOP>
11931 22:18:29.077084 Received signal: <TESTSET> STOP
11932 22:18:29.077479 Closing test_set kms_flip_event_leak
11933 22:18:29.079910 s: 8, outputs: 0
11934 22:18:29.083450 [1mSubtest basic: SKIP (0.000s)[0m
11935 22:18:29.103033 <8>[ 24.452462] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
11936 22:18:29.103900 Received signal: <TESTSET> START kms_prop_blob
11937 22:18:29.104292 Starting test_set kms_prop_blob
11938 22:18:29.125919 <14>[ 24.474918] [IGT] kms_prop_blob: executing
11939 22:18:29.132467 IGT-Version: 1.2<14>[ 24.479978] [IGT] kms_prop_blob: starting subtest basic
11940 22:18:29.139014 7.1-g766edf9 (aa<14>[ 24.486860] [IGT] kms_prop_blob: exiting, ret=0
11941 22:18:29.142431 rch64) (Linux: 6.1.31 aarch64)
11942 22:18:29.145609 Opened device: /dev/dri/card0
11943 22:18:29.152617 Starting subtest:<8>[ 24.498571] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11944 22:18:29.153189 basic
11945 22:18:29.153840 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11947 22:18:29.155659 [1mSubtest basic: SUCCESS (0.000s)[0m
11948 22:18:29.175258 <14>[ 24.524287] [IGT] kms_prop_blob: executing
11949 22:18:29.181747 IGT-Version: 1.2<14>[ 24.529124] [IGT] kms_prop_blob: starting subtest blob-prop-core
11950 22:18:29.188385 7.1-g766edf9 (aa<14>[ 24.536830] [IGT] kms_prop_blob: exiting, ret=0
11951 22:18:29.191600 rch64) (Linux: 6.1.31 aarch64)
11952 22:18:29.194767 Opened device: /dev/dri/card0
11953 22:18:29.201287 Starting subtest:<8>[ 24.548863] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
11954 22:18:29.202160 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
11956 22:18:29.204940 blob-prop-core
11957 22:18:29.208081 [1mSubtest blob-prop-core: SUCCESS (0.000s)[0m
11958 22:18:29.224615 <14>[ 24.574125] [IGT] kms_prop_blob: executing
11959 22:18:29.231229 IGT-Version: 1.2<14>[ 24.578973] [IGT] kms_prop_blob: starting subtest blob-prop-validate
11960 22:18:29.238330 7.1-g766edf9 (aa<14>[ 24.587291] [IGT] kms_prop_blob: exiting, ret=0
11961 22:18:29.241328 rch64) (Linux: 6.1.31 aarch64)
11962 22:18:29.244401 Opened device: /dev/dri/card0
11963 22:18:29.254958 Starting subtest:<8>[ 24.599073] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
11964 22:18:29.255592 blob-prop-validate
11965 22:18:29.256241 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
11967 22:18:29.260913 [1mSubtest blob-prop-validate: SUCCESS (0.000s)[0m
11968 22:18:29.275350 <14>[ 24.624720] [IGT] kms_prop_blob: executing
11969 22:18:29.281980 IGT-Version: 1.2<14>[ 24.629629] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
11970 22:18:29.288746 7.1-g766edf9 (aa<14>[ 24.637731] [IGT] kms_prop_blob: exiting, ret=0
11971 22:18:29.292213 rch64) (Linux: 6.1.31 aarch64)
11972 22:18:29.295415 Opened device: /dev/dri/card0
11973 22:18:29.304945 Starting subtest:<8>[ 24.649808] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
11974 22:18:29.305521 blob-prop-lifetime
11975 22:18:29.306174 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
11977 22:18:29.312055 [1mSubtest blob-prop-lifetime: SUCCESS (0.000s)[0m
11978 22:18:29.326163 <14>[ 24.675585] [IGT] kms_prop_blob: executing
11979 22:18:29.333089 IGT-Version: 1.2<14>[ 24.680392] [IGT] kms_prop_blob: starting subtest blob-multiple
11980 22:18:29.339877 7.1-g766edf9 (aa<14>[ 24.688135] [IGT] kms_prop_blob: exiting, ret=0
11981 22:18:29.343012 rch64) (Linux: 6.1.31 aarch64)
11982 22:18:29.345960 Opened device: /dev/dri/card0
11983 22:18:29.352646 Starting subtest:<8>[ 24.699943] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
11984 22:18:29.353488 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
11986 22:18:29.355856 blob-multiple
11987 22:18:29.359093 [1mSubtest blob-multiple: SUCCESS (0.000s)[0m
11988 22:18:29.376846 <14>[ 24.725559] [IGT] kms_prop_blob: executing
11989 22:18:29.383278 IGT-Version: 1.2<14>[ 24.730408] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
11990 22:18:29.389602 7.1-g766edf9 (aa<14>[ 24.738568] [IGT] kms_prop_blob: exiting, ret=0
11991 22:18:29.393494 rch64) (Linux: 6.1.31 aarch64)
11992 22:18:29.395880 Opened device: /dev/dri/card0
11993 22:18:29.406327 Starting subtest:<8>[ 24.750522] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11994 22:18:29.406899 invalid-get-prop-any
11995 22:18:29.407595 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11997 22:18:29.412353 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
11998 22:18:29.427847 <14>[ 24.776650] [IGT] kms_prop_blob: executing
11999 22:18:29.434008 IGT-Version: 1.2<14>[ 24.781498] [IGT] kms_prop_blob: starting subtest invalid-get-prop
12000 22:18:29.440425 7.1-g766edf9 (aa<14>[ 24.789317] [IGT] kms_prop_blob: exiting, ret=0
12001 22:18:29.444509 rch64) (Linux: 6.1.31 aarch64)
12002 22:18:29.447296 Opened device: /dev/dri/card0
12003 22:18:29.453794 Starting subtest:<8>[ 24.801045] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
12004 22:18:29.454639 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
12006 22:18:29.456876 invalid-get-prop
12007 22:18:29.460995 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
12008 22:18:29.478253 <14>[ 24.827116] [IGT] kms_prop_blob: executing
12009 22:18:29.484338 IGT-Version: 1.2<14>[ 24.831948] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
12010 22:18:29.490843 7.1-g766edf9 (aa<14>[ 24.840111] [IGT] kms_prop_blob: exiting, ret=0
12011 22:18:29.494758 rch64) (Linux: 6.1.31 aarch64)
12012 22:18:29.498075 Opened device: /dev/dri/card0
12013 22:18:29.507718 Starting subtest:<8>[ 24.851973] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
12014 22:18:29.508281 invalid-set-prop-any
12015 22:18:29.508924 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
12017 22:18:29.514061 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
12018 22:18:29.528611 <14>[ 24.878319] [IGT] kms_prop_blob: executing
12019 22:18:29.535881 IGT-Version: 1.2<14>[ 24.883277] [IGT] kms_prop_blob: starting subtest invalid-set-prop
12020 22:18:29.541957 7.1-g766edf9 (aa<14>[ 24.890962] [IGT] kms_prop_blob: exiting, ret=0
12021 22:18:29.545553 rch64) (Linux: 6.1.31 aarch64)
12022 22:18:29.548957 Opened device: /dev/dri/card0
12023 22:18:29.555383 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
12025 22:18:29.558553 Starting subtest:<8>[ 24.903041] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
12026 22:18:29.559027 invalid-set-prop
12027 22:18:29.565641 [1mSubtest i<8>[ 24.912957] <LAVA_SIGNAL_TESTSET STOP>
12028 22:18:29.566484 Received signal: <TESTSET> STOP
12029 22:18:29.566881 Closing test_set kms_prop_blob
12030 22:18:29.569575 nvalid-set-prop: SUCCESS (0.000s)[0m
12031 22:18:29.589586 <8>[ 24.938655] <LAVA_SIGNAL_TESTSET START kms_setmode>
12032 22:18:29.590436 Received signal: <TESTSET> START kms_setmode
12033 22:18:29.590836 Starting test_set kms_setmode
12034 22:18:29.611938 <14>[ 24.960988] [IGT] kms_setmode: executing
12035 22:18:29.618220 IGT-Version: 1.2<14>[ 24.965708] [IGT] kms_setmode: starting subtest basic
12036 22:18:29.625372 7.1-g766edf9 (aa<14>[ 24.972362] [IGT] kms_setmode: exiting, ret=77
12037 22:18:29.628117 rch64) (Linux: 6.1.31 aarch64)
12038 22:18:29.628590 Opened device: /dev/dri/card0
12039 22:18:29.637792 Starting subtest:<8>[ 24.984394] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
12040 22:18:29.638372 basic
12041 22:18:29.639074 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
12043 22:18:29.640808 No dynamic tests executed.
12044 22:18:29.643944 [1mSubtest basic: SKIP (0.000s)[0m
12045 22:18:29.659759 <14>[ 25.008869] [IGT] kms_setmode: executing
12046 22:18:29.665956 IGT-Version: 1.2<14>[ 25.013671] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
12047 22:18:29.673517 7.1-g766edf9 (aa<14>[ 25.021940] [IGT] kms_setmode: exiting, ret=77
12048 22:18:29.676450 rch64) (Linux: 6.1.31 aarch64)
12049 22:18:29.679090 Opened device: /dev/dri/card0
12050 22:18:29.690001 Starting subtest:<8>[ 25.034248] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
12051 22:18:29.690582 basic-clone-single-crtc
12052 22:18:29.691311 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
12054 22:18:29.692672 No dynamic tests executed.
12055 22:18:29.699360 [1mSubtest basic-clone-single-crtc: SKIP (0.000s)[0m
12056 22:18:29.711807 <14>[ 25.060917] [IGT] kms_setmode: executing
12057 22:18:29.718472 IGT-Version: 1.2<14>[ 25.065878] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
12058 22:18:29.724827 7.1-g766edf9 (aa<14>[ 25.074269] [IGT] kms_setmode: exiting, ret=77
12059 22:18:29.728590 rch64) (Linux: 6.1.31 aarch64)
12060 22:18:29.731547 Opened device: /dev/dri/card0
12061 22:18:29.741246 Starting subtest:<8>[ 25.086188] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
12062 22:18:29.742081 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
12064 22:18:29.744579 invalid-clone-single-crtc
12065 22:18:29.745078 No dynamic tests executed.
12066 22:18:29.750920 [1mSubtest invalid-clone-single-crtc: SKIP (0.000s)[0m
12067 22:18:29.763277 <14>[ 25.112667] [IGT] kms_setmode: executing
12068 22:18:29.769861 IGT-Version: 1.2<14>[ 25.117385] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
12069 22:18:29.776888 7.1-g766edf9 (aa<14>[ 25.126048] [IGT] kms_setmode: exiting, ret=77
12070 22:18:29.779899 rch64) (Linux: 6.1.31 aarch64)
12071 22:18:29.783792 Opened device: /dev/dri/card0
12072 22:18:29.793219 Starting subtest:<8>[ 25.138003] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
12073 22:18:29.794073 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
12075 22:18:29.796116 invalid-clone-exclusive-crtc
12076 22:18:29.800121 No dynamic tests executed.
12077 22:18:29.802882 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
12078 22:18:29.815440 <14>[ 25.164505] [IGT] kms_setmode: executing
12079 22:18:29.821787 IGT-Version: 1.2<14>[ 25.169298] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
12080 22:18:29.828390 7.1-g766edf9 (aa<14>[ 25.177297] [IGT] kms_setmode: exiting, ret=77
12081 22:18:29.831296 rch64) (Linux: 6.1.31 aarch64)
12082 22:18:29.835739 Opened device: /dev/dri/card0
12083 22:18:29.844944 Starting subtest:<8>[ 25.189241] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
12084 22:18:29.845517 clone-exclusive-crtc
12085 22:18:29.846287 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
12087 22:18:29.848248 No dynamic tests executed.
12088 22:18:29.851156 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
12089 22:18:29.865999 <14>[ 25.215480] [IGT] kms_setmode: executing
12090 22:18:29.875669 IGT-Version: 1.2<14>[ 25.220189] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
12091 22:18:29.882757 7.1-g766edf9 (aa<14>[ 25.229429] [IGT] kms_setmode: exiting, ret=77
12092 22:18:29.883285 rch64) (Linux: 6.1.31 aarch64)
12093 22:18:29.885740 Opened device: /dev/dri/card0
12094 22:18:29.896106 Starting subtest:<8>[ 25.241015] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
12095 22:18:29.896959 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
12097 22:18:29.902749 invalid-clone-single-crtc-steal<8>[ 25.252925] <LAVA_SIGNAL_TESTSET STOP>
12098 22:18:29.903362 ing
12099 22:18:29.904006 Received signal: <TESTSET> STOP
12100 22:18:29.904387 Closing test_set kms_setmode
12101 22:18:29.906238 No dynamic tests executed.
12102 22:18:29.912231 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
12103 22:18:29.930440 <8>[ 25.279540] <LAVA_SIGNAL_TESTSET START kms_vblank>
12104 22:18:29.931294 Received signal: <TESTSET> START kms_vblank
12105 22:18:29.931692 Starting test_set kms_vblank
12106 22:18:29.953214 <14>[ 25.301976] [IGT] kms_vblank: executing
12107 22:18:29.959166 IGT-Version: 1.2<14>[ 25.306944] [IGT] kms_vblank: exiting, ret=77
12108 22:18:29.962992 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12109 22:18:29.966558 Opened device: /dev/dri/card0
12110 22:18:29.972097 N<8>[ 25.318254] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>
12111 22:18:29.972845 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
12113 22:18:29.975823 o KMS driver or no outputs, pipes: 8, outputs: 0
12114 22:18:29.978614 [1mSubtest invalid: SKIP (0.000s)[0m
12115 22:18:29.994581 <14>[ 25.343126] [IGT] kms_vblank: executing
12116 22:18:30.000700 IGT-Version: 1.2<14>[ 25.348097] [IGT] kms_vblank: exiting, ret=77
12117 22:18:30.003704 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12118 22:18:30.007077 Opened device: /dev/dri/card0
12119 22:18:30.013416 N<8>[ 25.360002] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>
12120 22:18:30.014264 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
12122 22:18:30.016902 o KMS driver or no outputs, pipes: 8, outputs: 0
12123 22:18:30.020554 [1mSubtest crtc-id: SKIP (0.000s)[0m
12124 22:18:30.036101 <14>[ 25.385187] [IGT] kms_vblank: executing
12125 22:18:30.043050 IGT-Version: 1.2<14>[ 25.390124] [IGT] kms_vblank: exiting, ret=77
12126 22:18:30.045935 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12127 22:18:30.049710 Opened device: /dev/dri/card0
12128 22:18:30.055543 N<8>[ 25.401688] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>
12129 22:18:30.056392 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
12131 22:18:30.059420 o KMS driver or no outputs, pipes: 8, outputs: 0
12132 22:18:30.065602 [1mSubtest pipe-A-accuracy-idle: SKIP (0.000s)[0m
12133 22:18:30.078656 <14>[ 25.427832] [IGT] kms_vblank: executing
12134 22:18:30.085519 IGT-Version: 1.2<14>[ 25.432878] [IGT] kms_vblank: exiting, ret=77
12135 22:18:30.088385 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12136 22:18:30.092089 Opened device: /dev/dri/card0
12137 22:18:30.098446 N<8>[ 25.444732] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>
12138 22:18:30.099303 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
12140 22:18:30.101945 o KMS driver or no outputs, pipes: 8, outputs: 0
12141 22:18:30.108513 [1mSubtest pipe-A-query-idle: SKIP (0.000s)[0m
12142 22:18:30.120856 <14>[ 25.470309] [IGT] kms_vblank: executing
12143 22:18:30.127890 IGT-Version: 1.2<14>[ 25.475391] [IGT] kms_vblank: exiting, ret=77
12144 22:18:30.131104 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12145 22:18:30.134433 Opened device: /dev/dri/card0
12146 22:18:30.140958 N<8>[ 25.486825] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>
12147 22:18:30.141809 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
12149 22:18:30.143792 o KMS driver or no outputs, pipes: 8, outputs: 0
12150 22:18:30.150546 [1mSubtest pipe-A-query-idle-hang: SKIP (0.000s)[0m
12151 22:18:30.163209 <14>[ 25.512772] [IGT] kms_vblank: executing
12152 22:18:30.169712 IGT-Version: 1.2<14>[ 25.517744] [IGT] kms_vblank: exiting, ret=77
12153 22:18:30.173313 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12154 22:18:30.176635 Opened device: /dev/dri/card0
12155 22:18:30.183278 N<8>[ 25.529559] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>
12156 22:18:30.184125 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
12158 22:18:30.186675 o KMS driver or no outputs, pipes: 8, outputs: 0
12159 22:18:30.193305 [1mSubtest pipe-A-query-forked: SKIP (0.000s)[0m
12160 22:18:30.205974 <14>[ 25.554887] [IGT] kms_vblank: executing
12161 22:18:30.211909 IGT-Version: 1.2<14>[ 25.559864] [IGT] kms_vblank: exiting, ret=77
12162 22:18:30.215770 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12163 22:18:30.218825 Opened device: /dev/dri/card0
12164 22:18:30.225055 N<8>[ 25.571100] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>
12165 22:18:30.225907 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
12167 22:18:30.228858 o KMS driver or no outputs, pipes: 8, outputs: 0
12168 22:18:30.235731 [1mSubtest pipe-A-query-forked-hang: SKIP (0.000s)[0m
12169 22:18:30.248116 <14>[ 25.597254] [IGT] kms_vblank: executing
12170 22:18:30.254471 IGT-Version: 1.2<14>[ 25.602318] [IGT] kms_vblank: exiting, ret=77
12171 22:18:30.258354 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12172 22:18:30.260992 Opened device: /dev/dri/card0
12173 22:18:30.268091 N<8>[ 25.613538] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>
12174 22:18:30.268988 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
12176 22:18:30.270605 o KMS driver or no outputs, pipes: 8, outputs: 0
12177 22:18:30.277476 [1mSubtest pipe-A-query-busy: SKIP (0.000s)[0m
12178 22:18:30.290301 <14>[ 25.639382] [IGT] kms_vblank: executing
12179 22:18:30.296524 IGT-Version: 1.2<14>[ 25.644392] [IGT] kms_vblank: exiting, ret=77
12180 22:18:30.300090 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12181 22:18:30.303358 Opened device: /dev/dri/card0
12182 22:18:30.310025 N<8>[ 25.655930] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>
12183 22:18:30.310892 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
12185 22:18:30.312944 o KMS driver or no outputs, pipes: 8, outputs: 0
12186 22:18:30.319557 [1mSubtest pipe-A-query-busy-hang: SKIP (0.000s)[0m
12187 22:18:30.332546 <14>[ 25.681937] [IGT] kms_vblank: executing
12188 22:18:30.339223 IGT-Version: 1.2<14>[ 25.686979] [IGT] kms_vblank: exiting, ret=77
12189 22:18:30.342917 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12190 22:18:30.346390 Opened device: /dev/dri/card0
12191 22:18:30.353055 N<8>[ 25.698022] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>
12192 22:18:30.353921 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12194 22:18:30.358812 o KMS driver or no outputs, pipes: 8, outputs: 0
12195 22:18:30.362091 [1mSubtest pipe-A-query-forked-busy: SKIP (0.000s)[0m
12196 22:18:30.375256 <14>[ 25.724486] [IGT] kms_vblank: executing
12197 22:18:30.381543 IGT-Version: 1.2<14>[ 25.729442] [IGT] kms_vblank: exiting, ret=77
12198 22:18:30.384973 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12199 22:18:30.388449 Opened device: /dev/dri/card0
12200 22:18:30.394951 N<8>[ 25.740818] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>
12201 22:18:30.395869 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12203 22:18:30.401414 o KMS driver or no outputs, pipes: 8, outputs: 0
12204 22:18:30.404858 [1mSubtest pipe-A-query-forked-busy-hang: SKIP (0.000s)[0m
12205 22:18:30.418175 <14>[ 25.767804] [IGT] kms_vblank: executing
12206 22:18:30.424933 IGT-Version: 1.2<14>[ 25.772745] [IGT] kms_vblank: exiting, ret=77
12207 22:18:30.427886 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12208 22:18:30.431532 Opened device: /dev/dri/card0
12209 22:18:30.438288 N<8>[ 25.784626] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>
12210 22:18:30.439157 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12212 22:18:30.441628 o KMS driver or no outputs, pipes: 8, outputs: 0
12213 22:18:30.447838 [1mSubtest pipe-A-wait-idle: SKIP (0.000s)[0m
12214 22:18:30.461229 <14>[ 25.810809] [IGT] kms_vblank: executing
12215 22:18:30.468063 IGT-Version: 1.2<14>[ 25.816121] [IGT] kms_vblank: exiting, ret=77
12216 22:18:30.472067 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12217 22:18:30.474774 Opened device: /dev/dri/card0
12218 22:18:30.480959 N<8>[ 25.827367] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>
12219 22:18:30.481718 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12221 22:18:30.487243 o KMS driver or no outputs, pipes: 8, outputs: 0
12222 22:18:30.490668 [1mSubtest pipe-A-wait-idle-hang: SKIP (0.000s)[0m
12223 22:18:30.503499 <14>[ 25.853321] [IGT] kms_vblank: executing
12224 22:18:30.510789 IGT-Version: 1.2<14>[ 25.858345] [IGT] kms_vblank: exiting, ret=77
12225 22:18:30.513755 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12226 22:18:30.517030 Opened device: /dev/dri/card0
12227 22:18:30.523939 N<8>[ 25.869730] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>
12228 22:18:30.524651 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12230 22:18:30.526978 o KMS driver or no outputs, pipes: 8, outputs: 0
12231 22:18:30.533182 [1mSubtest pipe-A-wait-forked: SKIP (0.000s)[0m
12232 22:18:30.546508 <14>[ 25.895599] [IGT] kms_vblank: executing
12233 22:18:30.552696 IGT-Version: 1.2<14>[ 25.900692] [IGT] kms_vblank: exiting, ret=77
12234 22:18:30.556087 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12235 22:18:30.559255 Opened device: /dev/dri/card0
12236 22:18:30.565748 N<8>[ 25.911965] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>
12237 22:18:30.566441 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12239 22:18:30.569427 o KMS driver or no outputs, pipes: 8, outputs: 0
12240 22:18:30.575988 [1mSubtest pipe-A-wait-forked-hang: SKIP (0.000s)[0m
12241 22:18:30.589024 <14>[ 25.938462] [IGT] kms_vblank: executing
12242 22:18:30.595351 IGT-Version: 1.2<14>[ 25.943607] [IGT] kms_vblank: exiting, ret=77
12243 22:18:30.598632 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12244 22:18:30.602218 Opened device: /dev/dri/card0
12245 22:18:30.609281 N<8>[ 25.954533] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>
12246 22:18:30.610138 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12248 22:18:30.612025 o KMS driver or no outputs, pipes: 8, outputs: 0
12249 22:18:30.618684 [1mSubtest pipe-A-wait-busy: SKIP (0.000s)[0m
12250 22:18:30.631116 <14>[ 25.980394] [IGT] kms_vblank: executing
12251 22:18:30.637677 IGT-Version: 1.2<14>[ 25.985500] [IGT] kms_vblank: exiting, ret=77
12252 22:18:30.640821 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12253 22:18:30.644797 Opened device: /dev/dri/card0
12254 22:18:30.650925 N<8>[ 25.996933] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>
12255 22:18:30.651840 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12257 22:18:30.653810 o KMS driver or no outputs, pipes: 8, outputs: 0
12258 22:18:30.661285 [1mSubtest pipe-A-wait-busy-hang: SKIP (0.000s)[0m
12259 22:18:30.674541 <14>[ 26.023743] [IGT] kms_vblank: executing
12260 22:18:30.681227 IGT-Version: 1.2<14>[ 26.028693] [IGT] kms_vblank: exiting, ret=77
12261 22:18:30.684586 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12262 22:18:30.687629 Opened device: /dev/dri/card0
12263 22:18:30.694600 N<8>[ 26.040151] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>
12264 22:18:30.695699 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12266 22:18:30.697572 o KMS driver or no outputs, pipes: 8, outputs: 0
12267 22:18:30.703963 [1mSubtest pipe-A-wait-forked-busy: SKIP (0.000s)[0m
12268 22:18:30.717488 <14>[ 26.066342] [IGT] kms_vblank: executing
12269 22:18:30.723564 IGT-Version: 1.2<14>[ 26.071383] [IGT] kms_vblank: exiting, ret=77
12270 22:18:30.727157 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12271 22:18:30.730311 Opened device: /dev/dri/card0
12272 22:18:30.737080 N<8>[ 26.082492] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>
12273 22:18:30.737932 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12275 22:18:30.743483 o KMS driver or no outputs, pipes: 8, outputs: 0
12276 22:18:30.746759 [1mSubtest pipe-A-wait-forked-busy-hang: SKIP (0.000s)[0m
12277 22:18:30.759807 <14>[ 26.109063] [IGT] kms_vblank: executing
12278 22:18:30.766293 IGT-Version: 1.2<14>[ 26.114129] [IGT] kms_vblank: exiting, ret=77
12279 22:18:30.769469 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12280 22:18:30.773221 Opened device: /dev/dri/card0
12281 22:18:30.779321 N<8>[ 26.125490] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>
12282 22:18:30.780292 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12284 22:18:30.786295 o KMS driver or no outputs, pipes: 8, outputs: 0
12285 22:18:30.789312 [1mSubtest pipe-A-ts-continuation-idle: SKIP (0.000s)[0m
12286 22:18:30.802529 <14>[ 26.152044] [IGT] kms_vblank: executing
12287 22:18:30.809059 IGT-Version: 1.2<14>[ 26.157136] [IGT] kms_vblank: exiting, ret=77
12288 22:18:30.812223 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12289 22:18:30.815751 Opened device: /dev/dri/card0
12290 22:18:30.822712 N<8>[ 26.168490] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>
12291 22:18:30.823616 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12293 22:18:30.828809 o KMS driver or no outputs, pipes: 8, outputs: 0
12294 22:18:30.832145 [1mSubtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)[0m
12295 22:18:30.846364 <14>[ 26.195700] [IGT] kms_vblank: executing
12296 22:18:30.853318 IGT-Version: 1.2<14>[ 26.200693] [IGT] kms_vblank: exiting, ret=77
12297 22:18:30.856732 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12298 22:18:30.859426 Opened device: /dev/dri/card0
12299 22:18:30.866492 N<8>[ 26.212292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>
12300 22:18:30.867278 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12302 22:18:30.872859 o KMS driver or no outputs, pipes: 8, outputs: 0
12303 22:18:30.876154 [1mSubtest pipe-A-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12304 22:18:30.890649 <14>[ 26.239812] [IGT] kms_vblank: executing
12305 22:18:30.897151 IGT-Version: 1.2<14>[ 26.244813] [IGT] kms_vblank: exiting, ret=77
12306 22:18:30.900205 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12307 22:18:30.903463 Opened device: /dev/dri/card0
12308 22:18:30.910170 N<8>[ 26.256637] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>
12309 22:18:30.911070 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12311 22:18:30.916623 o KMS driver or no outputs, pipes: 8, outputs: 0
12312 22:18:30.923229 [1mSubtest pipe-A-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12313 22:18:30.934514 <14>[ 26.283520] [IGT] kms_vblank: executing
12314 22:18:30.941047 IGT-Version: 1.2<14>[ 26.288508] [IGT] kms_vblank: exiting, ret=77
12315 22:18:30.944132 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12316 22:18:30.947632 Opened device: /dev/dri/card0
12317 22:18:30.954126 N<8>[ 26.299845] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>
12318 22:18:30.954867 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12320 22:18:30.961391 o KMS driver or no outputs, pipes: 8, outputs: 0
12321 22:18:30.963839 [1mSubtest pipe-A-ts-continuation-suspend: SKIP (0.000s)[0m
12322 22:18:30.976851 <14>[ 26.326510] [IGT] kms_vblank: executing
12323 22:18:30.983252 IGT-Version: 1.2<14>[ 26.331718] [IGT] kms_vblank: exiting, ret=77
12324 22:18:30.987217 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12325 22:18:30.990529 Opened device: /dev/dri/card0
12326 22:18:30.996597 N<8>[ 26.343335] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>
12327 22:18:30.997439 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12329 22:18:31.003821 o KMS driver or no outputs, pipes: 8, outputs: 0
12330 22:18:31.006374 [1mSubtest pipe-A-ts-continuation-modeset: SKIP (0.000s)[0m
12331 22:18:31.021580 <14>[ 26.370670] [IGT] kms_vblank: executing
12332 22:18:31.027590 IGT-Version: 1.2<14>[ 26.375976] [IGT] kms_vblank: exiting, ret=77
12333 22:18:31.031218 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12334 22:18:31.034528 Opened device: /dev/dri/card0
12335 22:18:31.044751 N<8>[ 26.387431] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>
12336 22:18:31.045591 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12338 22:18:31.047782 o KMS driver or no outputs, pipes: 8, outputs: 0
12339 22:18:31.053790 [1mSubtest pipe-A-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12340 22:18:31.064919 <14>[ 26.414394] [IGT] kms_vblank: executing
12341 22:18:31.071988 IGT-Version: 1.2<14>[ 26.419453] [IGT] kms_vblank: exiting, ret=77
12342 22:18:31.075327 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12343 22:18:31.077729 Opened device: /dev/dri/card0
12344 22:18:31.084388 N<8>[ 26.430576] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>
12345 22:18:31.085126 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12347 22:18:31.091296 o KMS driver or no outputs, pipes: 8, outputs: 0
12348 22:18:31.098135 [1mSubtest pipe-A-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12349 22:18:31.108583 <14>[ 26.457946] [IGT] kms_vblank: executing
12350 22:18:31.115424 IGT-Version: 1.2<14>[ 26.462893] [IGT] kms_vblank: exiting, ret=77
12351 22:18:31.118804 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12352 22:18:31.121463 Opened device: /dev/dri/card0
12353 22:18:31.128585 N<8>[ 26.474632] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>
12354 22:18:31.129438 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12356 22:18:31.131906 o KMS driver or no outputs, pipes: 8, outputs: 0
12357 22:18:31.137994 [1mSubtest pipe-B-accuracy-idle: SKIP (0.000s)[0m
12358 22:18:31.152013 <14>[ 26.501119] [IGT] kms_vblank: executing
12359 22:18:31.158492 IGT-Version: 1.2<14>[ 26.506270] [IGT] kms_vblank: exiting, ret=77
12360 22:18:31.161717 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12361 22:18:31.164720 Opened device: /dev/dri/card0
12362 22:18:31.171752 N<8>[ 26.517592] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>
12363 22:18:31.172616 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12365 22:18:31.174411 o KMS driver or no outputs, pipes: 8, outputs: 0
12366 22:18:31.181209 [1mSubtest pipe-B-query-idle: SKIP (0.000s)[0m
12367 22:18:31.193818 <14>[ 26.543399] [IGT] kms_vblank: executing
12368 22:18:31.200273 IGT-Version: 1.2<14>[ 26.548367] [IGT] kms_vblank: exiting, ret=77
12369 22:18:31.204185 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12370 22:18:31.206875 Opened device: /dev/dri/card0
12371 22:18:31.214224 N<8>[ 26.559741] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>
12372 22:18:31.215090 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12374 22:18:31.217094 o KMS driver or no outputs, pipes: 8, outputs: 0
12375 22:18:31.223720 [1mSubtest pipe-B-query-idle-hang: SKIP (0.000s)[0m
12376 22:18:31.236095 <14>[ 26.585964] [IGT] kms_vblank: executing
12377 22:18:31.243354 IGT-Version: 1.2<14>[ 26.591124] [IGT] kms_vblank: exiting, ret=77
12378 22:18:31.246358 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12379 22:18:31.250073 Opened device: /dev/dri/card0
12380 22:18:31.256342 N<8>[ 26.602304] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>
12381 22:18:31.257206 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12383 22:18:31.259392 o KMS driver or no outputs, pipes: 8, outputs: 0
12384 22:18:31.266559 [1mSubtest pipe-B-query-forked: SKIP (0.000s)[0m
12385 22:18:31.278850 <14>[ 26.628444] [IGT] kms_vblank: executing
12386 22:18:31.285307 IGT-Version: 1.2<14>[ 26.633521] [IGT] kms_vblank: exiting, ret=77
12387 22:18:31.289231 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12388 22:18:31.293078 Opened device: /dev/dri/card0
12389 22:18:31.298676 N<8>[ 26.644682] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>
12390 22:18:31.299593 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12392 22:18:31.305060 o KMS driver or no outputs, pipes: 8, outputs: 0
12393 22:18:31.308629 [1mSubtest pipe-B-query-forked-hang: SKIP (0.000s)[0m
12394 22:18:31.321493 <14>[ 26.671082] [IGT] kms_vblank: executing
12395 22:18:31.327968 IGT-Version: 1.2<14>[ 26.676027] [IGT] kms_vblank: exiting, ret=77
12396 22:18:31.331256 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12397 22:18:31.334612 Opened device: /dev/dri/card0
12398 22:18:31.341668 N<8>[ 26.687362] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>
12399 22:18:31.342535 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12401 22:18:31.344749 o KMS driver or no outputs, pipes: 8, outputs: 0
12402 22:18:31.351394 [1mSubtest pipe-B-query-busy: SKIP (0.000s)[0m
12403 22:18:31.363653 <14>[ 26.713051] [IGT] kms_vblank: executing
12404 22:18:31.370301 IGT-Version: 1.2<14>[ 26.718053] [IGT] kms_vblank: exiting, ret=77
12405 22:18:31.373634 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12406 22:18:31.377041 Opened device: /dev/dri/card0
12407 22:18:31.383148 N<8>[ 26.729186] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>
12408 22:18:31.384103 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12410 22:18:31.386747 o KMS driver or no outputs, pipes: 8, outputs: 0
12411 22:18:31.393473 [1mSubtest pipe-B-query-busy-hang: SKIP (0.000s)[0m
12412 22:18:31.405812 <14>[ 26.755575] [IGT] kms_vblank: executing
12413 22:18:31.412728 IGT-Version: 1.2<14>[ 26.760527] [IGT] kms_vblank: exiting, ret=77
12414 22:18:31.416087 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12415 22:18:31.418978 Opened device: /dev/dri/card0
12416 22:18:31.425765 N<8>[ 26.771934] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>
12417 22:18:31.426604 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12419 22:18:31.432508 o KMS driver or no outputs, pipes: 8, outputs: 0
12420 22:18:31.435856 [1mSubtest pipe-B-query-forked-busy: SKIP (0.000s)[0m
12421 22:18:31.448252 <14>[ 26.798085] [IGT] kms_vblank: executing
12422 22:18:31.455162 IGT-Version: 1.2<14>[ 26.803209] [IGT] kms_vblank: exiting, ret=77
12423 22:18:31.458068 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12424 22:18:31.461945 Opened device: /dev/dri/card0
12425 22:18:31.468296 N<8>[ 26.814753] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>
12426 22:18:31.469118 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12428 22:18:31.475558 o KMS driver or no outputs, pipes: 8, outputs: 0
12429 22:18:31.477920 [1mSubtest pipe-B-query-forked-busy-hang: SKIP (0.000s)[0m
12430 22:18:31.492643 <14>[ 26.842122] [IGT] kms_vblank: executing
12431 22:18:31.499402 IGT-Version: 1.2<14>[ 26.847304] [IGT] kms_vblank: exiting, ret=77
12432 22:18:31.502380 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12433 22:18:31.506091 Opened device: /dev/dri/card0
12434 22:18:31.512266 N<8>[ 26.858384] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>
12435 22:18:31.513117 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12437 22:18:31.515403 o KMS driver or no outputs, pipes: 8, outputs: 0
12438 22:18:31.522495 [1mSubtest pipe-B-wait-idle: SKIP (0.000s)[0m
12439 22:18:31.534572 <14>[ 26.884040] [IGT] kms_vblank: executing
12440 22:18:31.540945 IGT-Version: 1.2<14>[ 26.888987] [IGT] kms_vblank: exiting, ret=77
12441 22:18:31.544005 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12442 22:18:31.547412 Opened device: /dev/dri/card0
12443 22:18:31.553751 N<8>[ 26.900780] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>
12444 22:18:31.554445 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12446 22:18:31.557535 o KMS driver or no outputs, pipes: 8, outputs: 0
12447 22:18:31.564012 [1mSubtest pipe-B-wait-idle-hang: SKIP (0.000s)[0m
12448 22:18:31.577184 <14>[ 26.926555] [IGT] kms_vblank: executing
12449 22:18:31.583522 IGT-Version: 1.2<14>[ 26.931793] [IGT] kms_vblank: exiting, ret=77
12450 22:18:31.587287 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12451 22:18:31.590182 Opened device: /dev/dri/card0
12452 22:18:31.597411 N<8>[ 26.943070] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>
12453 22:18:31.598271 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12455 22:18:31.599989 o KMS driver or no outputs, pipes: 8, outputs: 0
12456 22:18:31.607458 [1mSubtest pipe-B-wait-forked: SKIP (0.000s)[0m
12457 22:18:31.619144 <14>[ 26.968784] [IGT] kms_vblank: executing
12458 22:18:31.625628 IGT-Version: 1.2<14>[ 26.973887] [IGT] kms_vblank: exiting, ret=77
12459 22:18:31.629062 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12460 22:18:31.632210 Opened device: /dev/dri/card0
12461 22:18:31.639100 N<8>[ 26.985200] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>
12462 22:18:31.640057 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12464 22:18:31.646044 o KMS driver or no outputs, pipes: 8, outputs: 0
12465 22:18:31.649035 [1mSubtest pipe-B-wait-forked-hang: SKIP (0.000s)[0m
12466 22:18:31.661697 <14>[ 27.011249] [IGT] kms_vblank: executing
12467 22:18:31.668366 IGT-Version: 1.2<14>[ 27.016340] [IGT] kms_vblank: exiting, ret=77
12468 22:18:31.671700 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12469 22:18:31.675101 Opened device: /dev/dri/card0
12470 22:18:31.681678 N<8>[ 27.027757] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>
12471 22:18:31.682545 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12473 22:18:31.685125 o KMS driver or no outputs, pipes: 8, outputs: 0
12474 22:18:31.691669 [1mSubtest pipe-B-wait-busy: SKIP (0.000s)[0m
12475 22:18:31.703960 <14>[ 27.053128] [IGT] kms_vblank: executing
12476 22:18:31.710090 IGT-Version: 1.2<14>[ 27.058085] [IGT] kms_vblank: exiting, ret=77
12477 22:18:31.713733 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12478 22:18:31.716921 Opened device: /dev/dri/card0
12479 22:18:31.723452 N<8>[ 27.069552] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>
12480 22:18:31.724320 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12482 22:18:31.727026 o KMS driver or no outputs, pipes: 8, outputs: 0
12483 22:18:31.733095 [1mSubtest pipe-B-wait-busy-hang: SKIP (0.000s)[0m
12484 22:18:31.745873 <14>[ 27.095522] [IGT] kms_vblank: executing
12485 22:18:31.752381 IGT-Version: 1.2<14>[ 27.100494] [IGT] kms_vblank: exiting, ret=77
12486 22:18:31.755592 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12487 22:18:31.758979 Opened device: /dev/dri/card0
12488 22:18:31.765726 N<8>[ 27.111785] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>
12489 22:18:31.766595 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12491 22:18:31.769532 o KMS driver or no outputs, pipes: 8, outputs: 0
12492 22:18:31.775328 [1mSubtest pipe-B-wait-forked-busy: SKIP (0.000s)[0m
12493 22:18:31.788684 <14>[ 27.138198] [IGT] kms_vblank: executing
12494 22:18:31.795529 IGT-Version: 1.2<14>[ 27.143195] [IGT] kms_vblank: exiting, ret=77
12495 22:18:31.798813 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12496 22:18:31.802039 Opened device: /dev/dri/card0
12497 22:18:31.809323 N<8>[ 27.154394] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>
12498 22:18:31.810172 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12500 22:18:31.815541 o KMS driver or no outputs, pipes: 8, outputs: 0
12501 22:18:31.818786 [1mSubtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)[0m
12502 22:18:31.832129 <14>[ 27.181243] [IGT] kms_vblank: executing
12503 22:18:31.838282 IGT-Version: 1.2<14>[ 27.186341] [IGT] kms_vblank: exiting, ret=77
12504 22:18:31.841319 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12505 22:18:31.845556 Opened device: /dev/dri/card0
12506 22:18:31.851390 N<8>[ 27.197762] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>
12507 22:18:31.852320 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12509 22:18:31.858096 o KMS driver or no outputs, pipes: 8, outputs: 0
12510 22:18:31.860954 [1mSubtest pipe-B-ts-continuation-idle: SKIP (0.000s)[0m
12511 22:18:31.875971 <14>[ 27.225219] [IGT] kms_vblank: executing
12512 22:18:31.882152 IGT-Version: 1.2<14>[ 27.230154] [IGT] kms_vblank: exiting, ret=77
12513 22:18:31.885285 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12514 22:18:31.888929 Opened device: /dev/dri/card0
12515 22:18:31.895754 N<8>[ 27.241811] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>
12516 22:18:31.896612 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12518 22:18:31.901961 o KMS driver or no outputs, pipes: 8, outputs: 0
12519 22:18:31.905743 [1mSubtest pipe-B-ts-continuation-idle-hang: SKIP (0.000s)[0m
12520 22:18:31.918767 <14>[ 27.268443] [IGT] kms_vblank: executing
12521 22:18:31.925384 IGT-Version: 1.2<14>[ 27.273481] [IGT] kms_vblank: exiting, ret=77
12522 22:18:31.929165 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12523 22:18:31.931797 Opened device: /dev/dri/card0
12524 22:18:31.938976 N<8>[ 27.285096] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>
12525 22:18:31.939873 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12527 22:18:31.945409 o KMS driver or no outputs, pipes: 8, outputs: 0
12528 22:18:31.948742 [1mSubtest pipe-B-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12529 22:18:31.963074 <14>[ 27.312709] [IGT] kms_vblank: executing
12530 22:18:31.969831 IGT-Version: 1.2<14>[ 27.317644] [IGT] kms_vblank: exiting, ret=77
12531 22:18:31.972886 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12532 22:18:31.976194 Opened device: /dev/dri/card0
12533 22:18:31.983421 N<8>[ 27.329194] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>
12534 22:18:31.984272 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12536 22:18:31.989535 o KMS driver or no outputs, pipes: 8, outputs: 0
12537 22:18:31.996270 [1mSubtest pipe-B-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12538 22:18:32.006954 <14>[ 27.356566] [IGT] kms_vblank: executing
12539 22:18:32.013952 IGT-Version: 1.2<14>[ 27.361701] [IGT] kms_vblank: exiting, ret=77
12540 22:18:32.016661 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12541 22:18:32.020159 Opened device: /dev/dri/card0
12542 22:18:32.027799 N<8>[ 27.372977] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>
12543 22:18:32.028667 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12545 22:18:32.033225 o KMS driver or no outputs, pipes: 8, outputs: 0
12546 22:18:32.037174 [1mSubtest pipe-B-ts-continuation-suspend: SKIP (0.000s)[0m
12547 22:18:32.050338 <14>[ 27.399923] [IGT] kms_vblank: executing
12548 22:18:32.057012 IGT-Version: 1.2<14>[ 27.404993] [IGT] kms_vblank: exiting, ret=77
12549 22:18:32.060558 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12550 22:18:32.064448 Opened device: /dev/dri/card0
12551 22:18:32.070169 N<8>[ 27.416450] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>
12552 22:18:32.070908 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12554 22:18:32.076693 o KMS driver or no outputs, pipes: 8, outputs: 0
12555 22:18:32.079940 [1mSubtest pipe-B-ts-continuation-modeset: SKIP (0.000s)[0m
12556 22:18:32.093224 <14>[ 27.443144] [IGT] kms_vblank: executing
12557 22:18:32.099855 IGT-Version: 1.2<14>[ 27.448227] [IGT] kms_vblank: exiting, ret=77
12558 22:18:32.103312 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12559 22:18:32.106625 Opened device: /dev/dri/card0
12560 22:18:32.113324 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12562 22:18:32.116273 N<8>[ 27.459493] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>
12563 22:18:32.120304 o KMS driver or no outputs, pipes: 8, outputs: 0
12564 22:18:32.126290 [1mSubtest pipe-B-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12565 22:18:32.137822 <14>[ 27.486930] [IGT] kms_vblank: executing
12566 22:18:32.144062 IGT-Version: 1.2<14>[ 27.492003] [IGT] kms_vblank: exiting, ret=77
12567 22:18:32.147381 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12568 22:18:32.150833 Opened device: /dev/dri/card0
12569 22:18:32.157586 N<8>[ 27.503325] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>
12570 22:18:32.158428 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12572 22:18:32.163969 o KMS driver or no outputs, pipes: 8, outputs: 0
12573 22:18:32.170923 [1mSubtest pipe-B-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12574 22:18:32.180658 <14>[ 27.530531] [IGT] kms_vblank: executing
12575 22:18:32.187583 IGT-Version: 1.2<14>[ 27.535747] [IGT] kms_vblank: exiting, ret=77
12576 22:18:32.190819 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12577 22:18:32.193910 Opened device: /dev/dri/card0
12578 22:18:32.200637 N<8>[ 27.546759] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>
12579 22:18:32.201432 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12581 22:18:32.203931 o KMS driver or no outputs, pipes: 8, outputs: 0
12582 22:18:32.210485 [1mSubtest pipe-C-accuracy-idle: SKIP (0.000s)[0m
12583 22:18:32.223257 <14>[ 27.572786] [IGT] kms_vblank: executing
12584 22:18:32.229329 IGT-Version: 1.2<14>[ 27.577796] [IGT] kms_vblank: exiting, ret=77
12585 22:18:32.233876 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12586 22:18:32.236107 Opened device: /dev/dri/card0
12587 22:18:32.243595 N<8>[ 27.589664] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>
12588 22:18:32.244433 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12590 22:18:32.246302 o KMS driver or no outputs, pipes: 8, outputs: 0
12591 22:18:32.252458 [1mSubtest pipe-C-query-idle: SKIP (0.000s)[0m
12592 22:18:32.266280 <14>[ 27.615943] [IGT] kms_vblank: executing
12593 22:18:32.273293 IGT-Version: 1.2<14>[ 27.620926] [IGT] kms_vblank: exiting, ret=77
12594 22:18:32.276224 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12595 22:18:32.281340 Opened device: /dev/dri/card0
12596 22:18:32.286310 N<8>[ 27.632563] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>
12597 22:18:32.287052 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12599 22:18:32.289157 o KMS driver or no outputs, pipes: 8, outputs: 0
12600 22:18:32.296150 [1mSubtest pipe-C-query-idle-hang: SKIP (0.000s)[0m
12601 22:18:32.308704 <14>[ 27.658664] [IGT] kms_vblank: executing
12602 22:18:32.315827 IGT-Version: 1.2<14>[ 27.663789] [IGT] kms_vblank: exiting, ret=77
12603 22:18:32.318725 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12604 22:18:32.322136 Opened device: /dev/dri/card0
12605 22:18:32.328990 N<8>[ 27.675164] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>
12606 22:18:32.329761 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12608 22:18:32.331964 o KMS driver or no outputs, pipes: 8, outputs: 0
12609 22:18:32.339256 [1mSubtest pipe-C-query-forked: SKIP (0.000s)[0m
12610 22:18:32.351801 <14>[ 27.700946] [IGT] kms_vblank: executing
12611 22:18:32.358398 IGT-Version: 1.2<14>[ 27.705972] [IGT] kms_vblank: exiting, ret=77
12612 22:18:32.361856 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12613 22:18:32.365234 Opened device: /dev/dri/card0
12614 22:18:32.371211 N<8>[ 27.717135] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>
12615 22:18:32.371948 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12617 22:18:32.374815 o KMS driver or no outputs, pipes: 8, outputs: 0
12618 22:18:32.381054 [1mSubtest pipe-C-query-forked-hang: SKIP (0.000s)[0m
12619 22:18:32.394282 <14>[ 27.743477] [IGT] kms_vblank: executing
12620 22:18:32.399997 IGT-Version: 1.2<14>[ 27.748448] [IGT] kms_vblank: exiting, ret=77
12621 22:18:32.403452 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12622 22:18:32.407497 Opened device: /dev/dri/card0
12623 22:18:32.413331 N<8>[ 27.759852] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>
12624 22:18:32.414155 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12626 22:18:32.416923 o KMS driver or no outputs, pipes: 8, outputs: 0
12627 22:18:32.423116 [1mSubtest pipe-C-query-busy: SKIP (0.000s)[0m
12628 22:18:32.435862 <14>[ 27.785624] [IGT] kms_vblank: executing
12629 22:18:32.442941 IGT-Version: 1.2<14>[ 27.790603] [IGT] kms_vblank: exiting, ret=77
12630 22:18:32.446023 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12631 22:18:32.449337 Opened device: /dev/dri/card0
12632 22:18:32.455825 N<8>[ 27.802029] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>
12633 22:18:32.456684 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12635 22:18:32.459791 o KMS driver or no outputs, pipes: 8, outputs: 0
12636 22:18:32.465488 [1mSubtest pipe-C-query-busy-hang: SKIP (0.000s)[0m
12637 22:18:32.479331 <14>[ 27.828099] [IGT] kms_vblank: executing
12638 22:18:32.485030 IGT-Version: 1.2<14>[ 27.833062] [IGT] kms_vblank: exiting, ret=77
12639 22:18:32.488792 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12640 22:18:32.492281 Opened device: /dev/dri/card0
12641 22:18:32.498663 N<8>[ 27.844348] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>
12642 22:18:32.499540 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12644 22:18:32.501389 o KMS driver or no outputs, pipes: 8, outputs: 0
12645 22:18:32.507857 [1mSubtest pipe-C-query-forked-busy: SKIP (0.000s)[0m
12646 22:18:32.521105 <14>[ 27.870861] [IGT] kms_vblank: executing
12647 22:18:32.528116 IGT-Version: 1.2<14>[ 27.875980] [IGT] kms_vblank: exiting, ret=77
12648 22:18:32.531675 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12649 22:18:32.534702 Opened device: /dev/dri/card0
12650 22:18:32.540754 N<8>[ 27.887221] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>
12651 22:18:32.541583 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12653 22:18:32.547806 o KMS driver or no outputs, pipes: 8, outputs: 0
12654 22:18:32.551096 [1mSubtest pipe-C-query-forked-busy-hang: SKIP (0.000s)[0m
12655 22:18:32.564335 <14>[ 27.913955] [IGT] kms_vblank: executing
12656 22:18:32.571114 IGT-Version: 1.2<14>[ 27.918896] [IGT] kms_vblank: exiting, ret=77
12657 22:18:32.574425 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12658 22:18:32.577772 Opened device: /dev/dri/card0
12659 22:18:32.584213 N<8>[ 27.930302] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>
12660 22:18:32.585057 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12662 22:18:32.587513 o KMS driver or no outputs, pipes: 8, outputs: 0
12663 22:18:32.594070 [1mSubtest pipe-C-wait-idle: SKIP (0.000s)[0m
12664 22:18:32.607017 <14>[ 27.955934] [IGT] kms_vblank: executing
12665 22:18:32.613629 IGT-Version: 1.2<14>[ 27.960921] [IGT] kms_vblank: exiting, ret=77
12666 22:18:32.615872 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12667 22:18:32.619372 Opened device: /dev/dri/card0
12668 22:18:32.626358 N<8>[ 27.972635] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>
12669 22:18:32.627262 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12671 22:18:32.629006 o KMS driver or no outputs, pipes: 8, outputs: 0
12672 22:18:32.635651 [1mSubtest pipe-C-wait-idle-hang: SKIP (0.000s)[0m
12673 22:18:32.649865 <14>[ 27.999478] [IGT] kms_vblank: executing
12674 22:18:32.655978 IGT-Version: 1.2<14>[ 28.004418] [IGT] kms_vblank: exiting, ret=77
12675 22:18:32.659632 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12676 22:18:32.662893 Opened device: /dev/dri/card0
12677 22:18:32.669846 N<8>[ 28.016643] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>
12678 22:18:32.670700 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12680 22:18:32.672483 o KMS driver or no outputs, pipes: 8, outputs: 0
12681 22:18:32.679898 [1mSubtest pipe-C-wait-forked: SKIP (0.000s)[0m
12682 22:18:32.691946 <14>[ 28.041805] [IGT] kms_vblank: executing
12683 22:18:32.699073 IGT-Version: 1.2<14>[ 28.046814] [IGT] kms_vblank: exiting, ret=77
12684 22:18:32.702379 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12685 22:18:32.705557 Opened device: /dev/dri/card0
12686 22:18:32.711666 N<8>[ 28.058495] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>
12687 22:18:32.712514 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12689 22:18:32.718907 o KMS driver or no outputs, pipes: 8, outputs: 0
12690 22:18:32.722113 [1mSubtest pipe-C-wait-forked-hang: SKIP (0.000s)[0m
12691 22:18:32.734942 <14>[ 28.084678] [IGT] kms_vblank: executing
12692 22:18:32.741786 IGT-Version: 1.2<14>[ 28.089658] [IGT] kms_vblank: exiting, ret=77
12693 22:18:32.744866 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12694 22:18:32.748110 Opened device: /dev/dri/card0
12695 22:18:32.754880 N<8>[ 28.101238] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>
12696 22:18:32.755813 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12698 22:18:32.758040 o KMS driver or no outputs, pipes: 8, outputs: 0
12699 22:18:32.764965 [1mSubtest pipe-C-wait-busy: SKIP (0.000s)[0m
12700 22:18:32.777936 <14>[ 28.126763] [IGT] kms_vblank: executing
12701 22:18:32.783791 IGT-Version: 1.2<14>[ 28.131969] [IGT] kms_vblank: exiting, ret=77
12702 22:18:32.786652 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12703 22:18:32.790810 Opened device: /dev/dri/card0
12704 22:18:32.797195 N<8>[ 28.143849] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>
12705 22:18:32.797930 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12707 22:18:32.800075 o KMS driver or no outputs, pipes: 8, outputs: 0
12708 22:18:32.807050 [1mSubtest pipe-C-wait-busy-hang: SKIP (0.000s)[0m
12709 22:18:32.819305 <14>[ 28.169129] [IGT] kms_vblank: executing
12710 22:18:32.826262 IGT-Version: 1.2<14>[ 28.174134] [IGT] kms_vblank: exiting, ret=77
12711 22:18:32.831099 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12712 22:18:32.832268 Opened device: /dev/dri/card0
12713 22:18:32.839019 N<8>[ 28.185794] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>
12714 22:18:32.839910 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12716 22:18:32.842816 o KMS driver or no outputs, pipes: 8, outputs: 0
12717 22:18:32.848894 [1mSubtest pipe-C-wait-forked-busy: SKIP (0.000s)[0m
12718 22:18:32.862258 <14>[ 28.211782] [IGT] kms_vblank: executing
12719 22:18:32.868706 IGT-Version: 1.2<14>[ 28.216819] [IGT] kms_vblank: exiting, ret=77
12720 22:18:32.872184 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12721 22:18:32.875381 Opened device: /dev/dri/card0
12722 22:18:32.882134 N<8>[ 28.228745] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>
12723 22:18:32.883005 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12725 22:18:32.888873 o KMS driver or no outputs, pipes: 8, outputs: 0
12726 22:18:32.891690 [1mSubtest pipe-C-wait-forked-busy-hang: SKIP (0.000s)[0m
12727 22:18:32.905733 <14>[ 28.255143] [IGT] kms_vblank: executing
12728 22:18:32.912158 IGT-Version: 1.2<14>[ 28.260093] [IGT] kms_vblank: exiting, ret=77
12729 22:18:32.915341 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12730 22:18:32.918623 Opened device: /dev/dri/card0
12731 22:18:32.925086 N<8>[ 28.271418] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>
12732 22:18:32.925943 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12734 22:18:32.931753 o KMS driver or no outputs, pipes: 8, outputs: 0
12735 22:18:32.935681 [1mSubtest pipe-C-ts-continuation-idle: SKIP (0.000s)[0m
12736 22:18:32.948128 <14>[ 28.298061] [IGT] kms_vblank: executing
12737 22:18:32.955056 IGT-Version: 1.2<14>[ 28.303099] [IGT] kms_vblank: exiting, ret=77
12738 22:18:32.957967 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12739 22:18:32.961659 Opened device: /dev/dri/card0
12740 22:18:32.968054 N<8>[ 28.314535] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>
12741 22:18:32.968913 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12743 22:18:32.974586 o KMS driver or no outputs, pipes: 8, outputs: 0
12744 22:18:32.977643 [1mSubtest pipe-C-ts-continuation-idle-hang: SKIP (0.000s)[0m
12745 22:18:32.992537 <14>[ 28.342166] [IGT] kms_vblank: executing
12746 22:18:32.998670 IGT-Version: 1.2<14>[ 28.347382] [IGT] kms_vblank: exiting, ret=77
12747 22:18:33.002756 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12748 22:18:33.005632 Opened device: /dev/dri/card0
12749 22:18:33.012121 N<8>[ 28.358472] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>
12750 22:18:33.012969 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12752 22:18:33.018880 o KMS driver or no outputs, pipes: 8, outputs: 0
12753 22:18:33.022557 [1mSubtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12754 22:18:33.035799 <14>[ 28.385227] [IGT] kms_vblank: executing
12755 22:18:33.042567 IGT-Version: 1.2<14>[ 28.390336] [IGT] kms_vblank: exiting, ret=77
12756 22:18:33.045653 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12757 22:18:33.048540 Opened device: /dev/dri/card0
12758 22:18:33.055164 N<8>[ 28.401840] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>
12759 22:18:33.056080 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12761 22:18:33.062274 o KMS driver or no outputs, pipes: 8, outputs: 0
12762 22:18:33.068645 [1mSubtest pipe-C-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12763 22:18:33.078660 <14>[ 28.428785] [IGT] kms_vblank: executing
12764 22:18:33.085626 IGT-Version: 1.2<14>[ 28.433906] [IGT] kms_vblank: exiting, ret=77
12765 22:18:33.089563 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12766 22:18:33.091875 Opened device: /dev/dri/card0
12767 22:18:33.098769 N<8>[ 28.445063] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>
12768 22:18:33.099673 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12770 22:18:33.106390 o KMS driver or no outputs, pipes: 8, outputs: 0
12771 22:18:33.108572 [1mSubtest pipe-C-ts-continuation-suspend: SKIP (0.000s)[0m
12772 22:18:33.122697 <14>[ 28.471905] [IGT] kms_vblank: executing
12773 22:18:33.128952 IGT-Version: 1.2<14>[ 28.476888] [IGT] kms_vblank: exiting, ret=77
12774 22:18:33.132429 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12775 22:18:33.135409 Opened device: /dev/dri/card0
12776 22:18:33.142386 N<8>[ 28.488830] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>
12777 22:18:33.143318 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12779 22:18:33.149262 o KMS driver or no outputs, pipes: 8, outputs: 0
12780 22:18:33.151826 [1mSubtest pipe-C-ts-continuation-modeset: SKIP (0.000s)[0m
12781 22:18:33.166189 <14>[ 28.516077] [IGT] kms_vblank: executing
12782 22:18:33.172962 IGT-Version: 1.2<14>[ 28.521214] [IGT] kms_vblank: exiting, ret=77
12783 22:18:33.175950 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12784 22:18:33.179883 Opened device: /dev/dri/card0
12785 22:18:33.186585 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12787 22:18:33.189535 N<8>[ 28.532774] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>
12788 22:18:33.192777 o KMS driver or no outputs, pipes: 8, outputs: 0
12789 22:18:33.198853 [1mSubtest pipe-C-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12790 22:18:33.209465 <14>[ 28.559539] [IGT] kms_vblank: executing
12791 22:18:33.216493 IGT-Version: 1.2<14>[ 28.564496] [IGT] kms_vblank: exiting, ret=77
12792 22:18:33.219442 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12793 22:18:33.223306 Opened device: /dev/dri/card0
12794 22:18:33.229514 N<8>[ 28.575880] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>
12795 22:18:33.230381 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12797 22:18:33.236428 o KMS driver or no outputs, pipes: 8, outputs: 0
12798 22:18:33.239716 [1mSubtest pipe-C-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12799 22:18:33.253578 <14>[ 28.603465] [IGT] kms_vblank: executing
12800 22:18:33.261431 IGT-Version: 1.2<14>[ 28.608419] [IGT] kms_vblank: exiting, ret=77
12801 22:18:33.264422 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12802 22:18:33.266908 Opened device: /dev/dri/card0
12803 22:18:33.273223 N<8>[ 28.620340] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>
12804 22:18:33.274180 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12806 22:18:33.277066 o KMS driver or no outputs, pipes: 8, outputs: 0
12807 22:18:33.283070 [1mSubtest pipe-D-accuracy-idle: SKIP (0.000s)[0m
12808 22:18:33.297408 <14>[ 28.646623] [IGT] kms_vblank: executing
12809 22:18:33.303325 IGT-Version: 1.2<14>[ 28.651938] [IGT] kms_vblank: exiting, ret=77
12810 22:18:33.306698 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12811 22:18:33.309902 Opened device: /dev/dri/card0
12812 22:18:33.316804 N<8>[ 28.663333] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>
12813 22:18:33.317675 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12815 22:18:33.319802 o KMS driver or no outputs, pipes: 8, outputs: 0
12816 22:18:33.326661 [1mSubtest pipe-D-query-idle: SKIP (0.000s)[0m
12817 22:18:33.339841 <14>[ 28.688977] [IGT] kms_vblank: executing
12818 22:18:33.346019 IGT-Version: 1.2<14>[ 28.694064] [IGT] kms_vblank: exiting, ret=77
12819 22:18:33.349458 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12820 22:18:33.352380 Opened device: /dev/dri/card0
12821 22:18:33.359629 N<8>[ 28.705406] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>
12822 22:18:33.360514 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12824 22:18:33.362503 o KMS driver or no outputs, pipes: 8, outputs: 0
12825 22:18:33.369412 [1mSubtest pipe-D-query-idle-hang: SKIP (0.000s)[0m
12826 22:18:33.382402 <14>[ 28.731698] [IGT] kms_vblank: executing
12827 22:18:33.388705 IGT-Version: 1.2<14>[ 28.736843] [IGT] kms_vblank: exiting, ret=77
12828 22:18:33.392094 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12829 22:18:33.395317 Opened device: /dev/dri/card0
12830 22:18:33.401795 N<8>[ 28.748056] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>
12831 22:18:33.402670 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12833 22:18:33.404961 o KMS driver or no outputs, pipes: 8, outputs: 0
12834 22:18:33.411554 [1mSubtest pipe-D-query-forked: SKIP (0.000s)[0m
12835 22:18:33.424577 <14>[ 28.774193] [IGT] kms_vblank: executing
12836 22:18:33.431016 IGT-Version: 1.2<14>[ 28.779300] [IGT] kms_vblank: exiting, ret=77
12837 22:18:33.434937 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12838 22:18:33.437291 Opened device: /dev/dri/card0
12839 22:18:33.444151 N<8>[ 28.790863] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>
12840 22:18:33.444999 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
12842 22:18:33.450984 o KMS driver or no outputs, pipes: 8, outputs: 0
12843 22:18:33.454237 [1mSubtest pipe-D-query-forked-hang: SKIP (0.000s)[0m
12844 22:18:33.468481 <14>[ 28.817860] [IGT] kms_vblank: executing
12845 22:18:33.474588 IGT-Version: 1.2<14>[ 28.823057] [IGT] kms_vblank: exiting, ret=77
12846 22:18:33.478692 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12847 22:18:33.482160 Opened device: /dev/dri/card0
12848 22:18:33.487612 N<8>[ 28.834261] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>
12849 22:18:33.488381 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
12851 22:18:33.491222 o KMS driver or no outputs, pipes: 8, outputs: 0
12852 22:18:33.498086 [1mSubtest pipe-D-query-busy: SKIP (0.000s)[0m
12853 22:18:33.510280 <14>[ 28.860271] [IGT] kms_vblank: executing
12854 22:18:33.517090 IGT-Version: 1.2<14>[ 28.865279] [IGT] kms_vblank: exiting, ret=77
12855 22:18:33.520275 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12856 22:18:33.524044 Opened device: /dev/dri/card0
12857 22:18:33.530172 N<8>[ 28.876581] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>
12858 22:18:33.531020 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
12860 22:18:33.533373 o KMS driver or no outputs, pipes: 8, outputs: 0
12861 22:18:33.540302 [1mSubtest pipe-D-query-busy-hang: SKIP (0.000s)[0m
12862 22:18:33.552680 <14>[ 28.902528] [IGT] kms_vblank: executing
12863 22:18:33.559292 IGT-Version: 1.2<14>[ 28.907698] [IGT] kms_vblank: exiting, ret=77
12864 22:18:33.562655 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12865 22:18:33.566583 Opened device: /dev/dri/card0
12866 22:18:33.572482 N<8>[ 28.919028] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>
12867 22:18:33.573355 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
12869 22:18:33.579468 o KMS driver or no outputs, pipes: 8, outputs: 0
12870 22:18:33.582503 [1mSubtest pipe-D-query-forked-busy: SKIP (0.000s)[0m
12871 22:18:33.595145 <14>[ 28.945175] [IGT] kms_vblank: executing
12872 22:18:33.601767 IGT-Version: 1.2<14>[ 28.950169] [IGT] kms_vblank: exiting, ret=77
12873 22:18:33.605401 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12874 22:18:33.608352 Opened device: /dev/dri/card0
12875 22:18:33.615231 N<8>[ 28.961345] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>
12876 22:18:33.616096 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
12878 22:18:33.621842 o KMS driver or no outputs, pipes: 8, outputs: 0
12879 22:18:33.625193 [1mSubtest pipe-D-query-forked-busy-hang: SKIP (0.000s)[0m
12880 22:18:33.638934 <14>[ 28.988196] [IGT] kms_vblank: executing
12881 22:18:33.645320 IGT-Version: 1.2<14>[ 28.993129] [IGT] kms_vblank: exiting, ret=77
12882 22:18:33.648135 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12883 22:18:33.652063 Opened device: /dev/dri/card0
12884 22:18:33.658187 N<8>[ 29.004582] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>
12885 22:18:33.659107 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
12887 22:18:33.661805 o KMS driver or no outputs, pipes: 8, outputs: 0
12888 22:18:33.668072 [1mSubtest pipe-D-wait-idle: SKIP (0.000s)[0m
12889 22:18:33.680765 <14>[ 29.030160] [IGT] kms_vblank: executing
12890 22:18:33.687541 IGT-Version: 1.2<14>[ 29.035222] [IGT] kms_vblank: exiting, ret=77
12891 22:18:33.690045 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12892 22:18:33.693961 Opened device: /dev/dri/card0
12893 22:18:33.700045 N<8>[ 29.046335] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>
12894 22:18:33.700842 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
12896 22:18:33.703683 o KMS driver or no outputs, pipes: 8, outputs: 0
12897 22:18:33.710340 [1mSubtest pipe-D-wait-idle-hang: SKIP (0.000s)[0m
12898 22:18:33.723267 <14>[ 29.072538] [IGT] kms_vblank: executing
12899 22:18:33.729528 IGT-Version: 1.2<14>[ 29.077504] [IGT] kms_vblank: exiting, ret=77
12900 22:18:33.732413 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12901 22:18:33.735455 Opened device: /dev/dri/card0
12902 22:18:33.742667 N<8>[ 29.089504] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>
12903 22:18:33.743583 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
12905 22:18:33.746082 o KMS driver or no outputs, pipes: 8, outputs: 0
12906 22:18:33.752367 [1mSubtest pipe-D-wait-forked: SKIP (0.000s)[0m
12907 22:18:33.765712 <14>[ 29.115802] [IGT] kms_vblank: executing
12908 22:18:33.773037 IGT-Version: 1.2<14>[ 29.121121] [IGT] kms_vblank: exiting, ret=77
12909 22:18:33.776064 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12910 22:18:33.779360 Opened device: /dev/dri/card0
12911 22:18:33.785491 N<8>[ 29.132481] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>
12912 22:18:33.786354 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
12914 22:18:33.792313 o KMS driver or no outputs, pipes: 8, outputs: 0
12915 22:18:33.795863 [1mSubtest pipe-D-wait-forked-hang: SKIP (0.000s)[0m
12916 22:18:33.809076 <14>[ 29.158444] [IGT] kms_vblank: executing
12917 22:18:33.814900 IGT-Version: 1.2<14>[ 29.163498] [IGT] kms_vblank: exiting, ret=77
12918 22:18:33.818377 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12919 22:18:33.822118 Opened device: /dev/dri/card0
12920 22:18:33.828055 N<8>[ 29.174660] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>
12921 22:18:33.828916 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
12923 22:18:33.831340 o KMS driver or no outputs, pipes: 8, outputs: 0
12924 22:18:33.838255 [1mSubtest pipe-D-wait-busy: SKIP (0.000s)[0m
12925 22:18:33.851066 <14>[ 29.200551] [IGT] kms_vblank: executing
12926 22:18:33.857368 IGT-Version: 1.2<14>[ 29.205588] [IGT] kms_vblank: exiting, ret=77
12927 22:18:33.860615 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12928 22:18:33.864004 Opened device: /dev/dri/card0
12929 22:18:33.870737 N<8>[ 29.216686] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>
12930 22:18:33.871650 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
12932 22:18:33.873748 o KMS driver or no outputs, pipes: 8, outputs: 0
12933 22:18:33.880942 [1mSubtest pipe-D-wait-busy-hang: SKIP (0.000s)[0m
12934 22:18:33.893284 <14>[ 29.242955] [IGT] kms_vblank: executing
12935 22:18:33.899411 IGT-Version: 1.2<14>[ 29.247949] [IGT] kms_vblank: exiting, ret=77
12936 22:18:33.903150 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12937 22:18:33.906542 Opened device: /dev/dri/card0
12938 22:18:33.913152 N<8>[ 29.259436] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>
12939 22:18:33.914011 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
12941 22:18:33.916292 o KMS driver or no outputs, pipes: 8, outputs: 0
12942 22:18:33.922762 [1mSubtest pipe-D-wait-forked-busy: SKIP (0.000s)[0m
12943 22:18:33.935625 <14>[ 29.285498] [IGT] kms_vblank: executing
12944 22:18:33.942392 IGT-Version: 1.2<14>[ 29.290588] [IGT] kms_vblank: exiting, ret=77
12945 22:18:33.945323 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12946 22:18:33.948732 Opened device: /dev/dri/card0
12947 22:18:33.955686 N<8>[ 29.302377] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>
12948 22:18:33.956566 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
12950 22:18:33.962169 o KMS driver or no outputs, pipes: 8, outputs: 0
12951 22:18:33.965027 [1mSubtest pipe-D-wait-forked-busy-hang: SKIP (0.000s)[0m
12952 22:18:33.979784 <14>[ 29.329814] [IGT] kms_vblank: executing
12953 22:18:33.986873 IGT-Version: 1.2<14>[ 29.334749] [IGT] kms_vblank: exiting, ret=77
12954 22:18:33.990675 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12955 22:18:33.993481 Opened device: /dev/dri/card0
12956 22:18:33.999778 N<8>[ 29.346842] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>
12957 22:18:34.000540 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
12959 22:18:34.006498 o KMS driver or no outputs, pipes: 8, outputs: 0
12960 22:18:34.009660 [1mSubtest pipe-D-ts-continuation-idle: SKIP (0.000s)[0m
12961 22:18:34.023215 <14>[ 29.372722] [IGT] kms_vblank: executing
12962 22:18:34.029189 IGT-Version: 1.2<14>[ 29.377811] [IGT] kms_vblank: exiting, ret=77
12963 22:18:34.032442 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12964 22:18:34.036145 Opened device: /dev/dri/card0
12965 22:18:34.042800 N<8>[ 29.389103] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>
12966 22:18:34.043707 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
12968 22:18:34.049045 o KMS driver or no outputs, pipes: 8, outputs: 0
12969 22:18:34.052584 [1mSubtest pipe-D-ts-continuation-idle-hang: SKIP (0.000s)[0m
12970 22:18:34.065983 <14>[ 29.416083] [IGT] kms_vblank: executing
12971 22:18:34.072927 IGT-Version: 1.2<14>[ 29.421091] [IGT] kms_vblank: exiting, ret=77
12972 22:18:34.076004 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12973 22:18:34.079838 Opened device: /dev/dri/card0
12974 22:18:34.086845 N<8>[ 29.432485] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>
12975 22:18:34.087764 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
12977 22:18:34.092709 o KMS driver or no outputs, pipes: 8, outputs: 0
12978 22:18:34.096201 [1mSubtest pipe-D-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12979 22:18:34.109444 <14>[ 29.459474] [IGT] kms_vblank: executing
12980 22:18:34.116222 IGT-Version: 1.2<14>[ 29.464474] [IGT] kms_vblank: exiting, ret=77
12981 22:18:34.119411 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12982 22:18:34.122809 Opened device: /dev/dri/card0
12983 22:18:34.129407 N<8>[ 29.476071] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>
12984 22:18:34.130299 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
12986 22:18:34.136846 o KMS driver or no outputs, pipes: 8, outputs: 0
12987 22:18:34.142677 [1mSubtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12988 22:18:34.153655 <14>[ 29.503842] [IGT] kms_vblank: executing
12989 22:18:34.160699 IGT-Version: 1.2<14>[ 29.508806] [IGT] kms_vblank: exiting, ret=77
12990 22:18:34.164988 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12991 22:18:34.167317 Opened device: /dev/dri/card0
12992 22:18:34.174269 N<8>[ 29.520470] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>
12993 22:18:34.175034 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
12995 22:18:34.180253 o KMS driver or no outputs, pipes: 8, outputs: 0
12996 22:18:34.183852 [1mSubtest pipe-D-ts-continuation-suspend: SKIP (0.000s)[0m
12997 22:18:34.197308 <14>[ 29.547125] [IGT] kms_vblank: executing
12998 22:18:34.204123 IGT-Version: 1.2<14>[ 29.552106] [IGT] kms_vblank: exiting, ret=77
12999 22:18:34.207215 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13000 22:18:34.210933 Opened device: /dev/dri/card0
13001 22:18:34.217760 N<8>[ 29.563536] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>
13002 22:18:34.218614 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
13004 22:18:34.223828 o KMS driver or no outputs, pipes: 8, outputs: 0
13005 22:18:34.227075 [1mSubtest pipe-D-ts-continuation-modeset: SKIP (0.000s)[0m
13006 22:18:34.242322 <14>[ 29.590357] [IGT] kms_vblank: executing
13007 22:18:34.247541 IGT-Version: 1.2<14>[ 29.595550] [IGT] kms_vblank: exiting, ret=77
13008 22:18:34.250536 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13009 22:18:34.254182 Opened device: /dev/dri/card0
13010 22:18:34.260797 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
13012 22:18:34.263141 N<8>[ 29.607299] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>
13013 22:18:34.266557 o KMS driver or no outputs, pipes: 8, outputs: 0
13014 22:18:34.273716 [1mSubtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13015 22:18:34.285176 <14>[ 29.634918] [IGT] kms_vblank: executing
13016 22:18:34.291802 IGT-Version: 1.2<14>[ 29.639895] [IGT] kms_vblank: exiting, ret=77
13017 22:18:34.295404 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13018 22:18:34.298390 Opened device: /dev/dri/card0
13019 22:18:34.304577 N<8>[ 29.651875] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>
13020 22:18:34.305342 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
13022 22:18:34.311545 o KMS driver or no outputs, pipes: 8, outputs: 0
13023 22:18:34.318163 [1mSubtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13024 22:18:34.329041 <14>[ 29.678609] [IGT] kms_vblank: executing
13025 22:18:34.335621 IGT-Version: 1.2<14>[ 29.683698] [IGT] kms_vblank: exiting, ret=77
13026 22:18:34.338535 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13027 22:18:34.341992 Opened device: /dev/dri/card0
13028 22:18:34.351062 N<8>[ 29.695099] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>
13029 22:18:34.351985 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
13031 22:18:34.353231 o KMS driver or no outputs, pipes: 8, outputs: 0
13032 22:18:34.358355 [1mSubtest pipe-E-accuracy-idle: SKIP (0.000s)[0m
13033 22:18:34.370608 <14>[ 29.720685] [IGT] kms_vblank: executing
13034 22:18:34.377258 IGT-Version: 1.2<14>[ 29.725734] [IGT] kms_vblank: exiting, ret=77
13035 22:18:34.380366 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13036 22:18:34.383486 Opened device: /dev/dri/card0
13037 22:18:34.390498 N<8>[ 29.737414] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>
13038 22:18:34.391388 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
13040 22:18:34.394027 o KMS driver or no outputs, pipes: 8, outputs: 0
13041 22:18:34.400483 [1mSubtest pipe-E-query-idle: SKIP (0.000s)[0m
13042 22:18:34.413812 <14>[ 29.763782] [IGT] kms_vblank: executing
13043 22:18:34.420546 IGT-Version: 1.2<14>[ 29.768913] [IGT] kms_vblank: exiting, ret=77
13044 22:18:34.423885 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13045 22:18:34.427634 Opened device: /dev/dri/card0
13046 22:18:34.433851 N<8>[ 29.780601] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>
13047 22:18:34.434713 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
13049 22:18:34.437187 o KMS driver or no outputs, pipes: 8, outputs: 0
13050 22:18:34.443727 [1mSubtest pipe-E-query-idle-hang: SKIP (0.000s)[0m
13051 22:18:34.458223 <14>[ 29.807489] [IGT] kms_vblank: executing
13052 22:18:34.464442 IGT-Version: 1.2<14>[ 29.812423] [IGT] kms_vblank: exiting, ret=77
13053 22:18:34.468070 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13054 22:18:34.470796 Opened device: /dev/dri/card0
13055 22:18:34.477398 N<8>[ 29.823909] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>
13056 22:18:34.478260 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
13058 22:18:34.480907 o KMS driver or no outputs, pipes: 8, outputs: 0
13059 22:18:34.486918 [1mSubtest pipe-E-query-forked: SKIP (0.000s)[0m
13060 22:18:34.499857 <14>[ 29.849935] [IGT] kms_vblank: executing
13061 22:18:34.506572 IGT-Version: 1.2<14>[ 29.854977] [IGT] kms_vblank: exiting, ret=77
13062 22:18:34.509714 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13063 22:18:34.513297 Opened device: /dev/dri/card0
13064 22:18:34.520073 N<8>[ 29.866546] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>
13065 22:18:34.520936 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
13067 22:18:34.522903 o KMS driver or no outputs, pipes: 8, outputs: 0
13068 22:18:34.529680 [1mSubtest pipe-E-query-forked-hang: SKIP (0.000s)[0m
13069 22:18:34.542723 <14>[ 29.892656] [IGT] kms_vblank: executing
13070 22:18:34.549483 IGT-Version: 1.2<14>[ 29.897622] [IGT] kms_vblank: exiting, ret=77
13071 22:18:34.552802 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13072 22:18:34.556540 Opened device: /dev/dri/card0
13073 22:18:34.562677 N<8>[ 29.909199] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>
13074 22:18:34.563571 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
13076 22:18:34.566331 o KMS driver or no outputs, pipes: 8, outputs: 0
13077 22:18:34.572881 [1mSubtest pipe-E-query-busy: SKIP (0.000s)[0m
13078 22:18:34.585846 <14>[ 29.935878] [IGT] kms_vblank: executing
13079 22:18:34.592287 IGT-Version: 1.2<14>[ 29.940820] [IGT] kms_vblank: exiting, ret=77
13080 22:18:34.596082 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13081 22:18:34.599058 Opened device: /dev/dri/card0
13082 22:18:34.605757 N<8>[ 29.952333] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>
13083 22:18:34.606553 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
13085 22:18:34.609207 o KMS driver or no outputs, pipes: 8, outputs: 0
13086 22:18:34.615629 [1mSubtest pipe-E-query-busy-hang: SKIP (0.000s)[0m
13087 22:18:34.628113 <14>[ 29.978166] [IGT] kms_vblank: executing
13088 22:18:34.635073 IGT-Version: 1.2<14>[ 29.983192] [IGT] kms_vblank: exiting, ret=77
13089 22:18:34.638293 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13090 22:18:34.641788 Opened device: /dev/dri/card0
13091 22:18:34.648233 N<8>[ 29.994420] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>
13092 22:18:34.649082 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
13094 22:18:34.654645 o KMS driver or no outputs, pipes: 8, outputs: 0
13095 22:18:34.657835 [1mSubtest pipe-E-query-forked-busy: SKIP (0.000s)[0m
13096 22:18:34.670790 <14>[ 30.020659] [IGT] kms_vblank: executing
13097 22:18:34.678532 IGT-Version: 1.2<14>[ 30.025718] [IGT] kms_vblank: exiting, ret=77
13098 22:18:34.680866 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13099 22:18:34.684182 Opened device: /dev/dri/card0
13100 22:18:34.690544 N<8>[ 30.036811] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>
13101 22:18:34.691393 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
13103 22:18:34.697371 o KMS driver or no outputs, pipes: 8, outputs: 0
13104 22:18:34.700393 [1mSubtest pipe-E-query-forked-busy-hang: SKIP (0.000s)[0m
13105 22:18:34.713951 <14>[ 30.064037] [IGT] kms_vblank: executing
13106 22:18:34.720422 IGT-Version: 1.2<14>[ 30.069003] [IGT] kms_vblank: exiting, ret=77
13107 22:18:34.723642 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13108 22:18:34.727776 Opened device: /dev/dri/card0
13109 22:18:34.733661 N<8>[ 30.080239] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>
13110 22:18:34.734554 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
13112 22:18:34.737171 o KMS driver or no outputs, pipes: 8, outputs: 0
13113 22:18:34.743395 [1mSubtest pipe-E-wait-idle: SKIP (0.000s)[0m
13114 22:18:34.756250 <14>[ 30.106016] [IGT] kms_vblank: executing
13115 22:18:34.762964 IGT-Version: 1.2<14>[ 30.111075] [IGT] kms_vblank: exiting, ret=77
13116 22:18:34.766088 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13117 22:18:34.769429 Opened device: /dev/dri/card0
13118 22:18:34.776178 N<8>[ 30.122038] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>
13119 22:18:34.777076 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
13121 22:18:34.779064 o KMS driver or no outputs, pipes: 8, outputs: 0
13122 22:18:34.787777 [1mSubtest pipe-E-wait-idle-hang: SKIP (0.000s)[0m
13123 22:18:34.798612 <14>[ 30.148213] [IGT] kms_vblank: executing
13124 22:18:34.805325 IGT-Version: 1.2<14>[ 30.153275] [IGT] kms_vblank: exiting, ret=77
13125 22:18:34.807937 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13126 22:18:34.811690 Opened device: /dev/dri/card0
13127 22:18:34.817717 N<8>[ 30.164691] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>
13128 22:18:34.818452 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
13130 22:18:34.821532 o KMS driver or no outputs, pipes: 8, outputs: 0
13131 22:18:34.827903 [1mSubtest pipe-E-wait-forked: SKIP (0.000s)[0m
13132 22:18:34.840633 <14>[ 30.190407] [IGT] kms_vblank: executing
13133 22:18:34.847427 IGT-Version: 1.2<14>[ 30.195628] [IGT] kms_vblank: exiting, ret=77
13134 22:18:34.850272 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13135 22:18:34.853865 Opened device: /dev/dri/card0
13136 22:18:34.860112 N<8>[ 30.206760] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>
13137 22:18:34.860952 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
13139 22:18:34.867086 o KMS driver or no outputs, pipes: 8, outputs: 0
13140 22:18:34.869986 [1mSubtest pipe-E-wait-forked-hang: SKIP (0.000s)[0m
13141 22:18:34.883322 <14>[ 30.233263] [IGT] kms_vblank: executing
13142 22:18:34.889737 IGT-Version: 1.2<14>[ 30.238257] [IGT] kms_vblank: exiting, ret=77
13143 22:18:34.893444 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13144 22:18:34.896828 Opened device: /dev/dri/card0
13145 22:18:34.902922 N<8>[ 30.249495] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>
13146 22:18:34.903940 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
13148 22:18:34.906582 o KMS driver or no outputs, pipes: 8, outputs: 0
13149 22:18:34.912656 [1mSubtest pipe-E-wait-busy: SKIP (0.000s)[0m
13150 22:18:34.925185 <14>[ 30.275349] [IGT] kms_vblank: executing
13151 22:18:34.932090 IGT-Version: 1.2<14>[ 30.280517] [IGT] kms_vblank: exiting, ret=77
13152 22:18:34.935125 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13153 22:18:34.938411 Opened device: /dev/dri/card0
13154 22:18:34.945135 N<8>[ 30.291749] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>
13155 22:18:34.945982 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
13157 22:18:34.950066 o KMS driver or no outputs, pipes: 8, outputs: 0
13158 22:18:34.955153 [1mSubtest pipe-E-wait-busy-hang: SKIP (0.000s)[0m
13159 22:18:34.967904 <14>[ 30.317602] [IGT] kms_vblank: executing
13160 22:18:34.974522 IGT-Version: 1.2<14>[ 30.322580] [IGT] kms_vblank: exiting, ret=77
13161 22:18:34.977702 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13162 22:18:34.981107 Opened device: /dev/dri/card0
13163 22:18:34.987857 N<8>[ 30.334094] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>
13164 22:18:34.988735 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
13166 22:18:34.990968 o KMS driver or no outputs, pipes: 8, outputs: 0
13167 22:18:34.997866 [1mSubtest pipe-E-wait-forked-busy: SKIP (0.000s)[0m
13168 22:18:35.010027 <14>[ 30.360221] [IGT] kms_vblank: executing
13169 22:18:35.016585 IGT-Version: 1.2<14>[ 30.365345] [IGT] kms_vblank: exiting, ret=77
13170 22:18:35.019991 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13171 22:18:35.024009 Opened device: /dev/dri/card0
13172 22:18:35.030240 N<8>[ 30.376497] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>
13173 22:18:35.031213 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
13175 22:18:35.036636 o KMS driver or no outputs, pipes: 8, outputs: 0
13176 22:18:35.039946 [1mSubtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)[0m
13177 22:18:35.053527 <14>[ 30.403320] [IGT] kms_vblank: executing
13178 22:18:35.060045 IGT-Version: 1.2<14>[ 30.408312] [IGT] kms_vblank: exiting, ret=77
13179 22:18:35.063917 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13180 22:18:35.066951 Opened device: /dev/dri/card0
13181 22:18:35.073394 N<8>[ 30.419421] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>
13182 22:18:35.074252 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
13184 22:18:35.080120 o KMS driver or no outputs, pipes: 8, outputs: 0
13185 22:18:35.082902 [1mSubtest pipe-E-ts-continuation-idle: SKIP (0.000s)[0m
13186 22:18:35.096325 <14>[ 30.446324] [IGT] kms_vblank: executing
13187 22:18:35.103576 IGT-Version: 1.2<14>[ 30.451572] [IGT] kms_vblank: exiting, ret=77
13188 22:18:35.106510 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13189 22:18:35.109665 Opened device: /dev/dri/card0
13190 22:18:35.116111 N<8>[ 30.462503] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>
13191 22:18:35.116868 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13193 22:18:35.122508 o KMS driver or no outputs, pipes: 8, outputs: 0
13194 22:18:35.126145 [1mSubtest pipe-E-ts-continuation-idle-hang: SKIP (0.000s)[0m
13195 22:18:35.139561 <14>[ 30.489534] [IGT] kms_vblank: executing
13196 22:18:35.146490 IGT-Version: 1.2<14>[ 30.494497] [IGT] kms_vblank: exiting, ret=77
13197 22:18:35.149053 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13198 22:18:35.152464 Opened device: /dev/dri/card0
13199 22:18:35.159789 N<8>[ 30.505900] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>
13200 22:18:35.160655 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13202 22:18:35.166095 o KMS driver or no outputs, pipes: 8, outputs: 0
13203 22:18:35.169471 [1mSubtest pipe-E-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13204 22:18:35.182694 <14>[ 30.532829] [IGT] kms_vblank: executing
13205 22:18:35.189449 IGT-Version: 1.2<14>[ 30.537830] [IGT] kms_vblank: exiting, ret=77
13206 22:18:35.192896 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13207 22:18:35.196052 Opened device: /dev/dri/card0
13208 22:18:35.203320 N<8>[ 30.548934] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>
13209 22:18:35.204248 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13211 22:18:35.209353 o KMS driver or no outputs, pipes: 8, outputs: 0
13212 22:18:35.215865 [1mSubtest pipe-E-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13213 22:18:35.226463 <14>[ 30.576567] [IGT] kms_vblank: executing
13214 22:18:35.232997 IGT-Version: 1.2<14>[ 30.581718] [IGT] kms_vblank: exiting, ret=77
13215 22:18:35.236351 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13216 22:18:35.239817 Opened device: /dev/dri/card0
13217 22:18:35.246462 N<8>[ 30.592813] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>
13218 22:18:35.247322 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13220 22:18:35.253056 o KMS driver or no outputs, pipes: 8, outputs: 0
13221 22:18:35.255914 [1mSubtest pipe-E-ts-continuation-suspend: SKIP (0.000s)[0m
13222 22:18:35.269581 <14>[ 30.619749] [IGT] kms_vblank: executing
13223 22:18:35.276329 IGT-Version: 1.2<14>[ 30.624821] [IGT] kms_vblank: exiting, ret=77
13224 22:18:35.279816 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13225 22:18:35.282513 Opened device: /dev/dri/card0
13226 22:18:35.289277 N<8>[ 30.636289] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>
13227 22:18:35.289960 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13229 22:18:35.295727 o KMS driver or no outputs, pipes: 8, outputs: 0
13230 22:18:35.299253 [1mSubtest pipe-E-ts-continuation-modeset: SKIP (0.000s)[0m
13231 22:18:35.312730 <14>[ 30.662939] [IGT] kms_vblank: executing
13232 22:18:35.319601 IGT-Version: 1.2<14>[ 30.668050] [IGT] kms_vblank: exiting, ret=77
13233 22:18:35.322971 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13234 22:18:35.325954 Opened device: /dev/dri/card0
13235 22:18:35.332618 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13237 22:18:35.335658 N<8>[ 30.679470] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>
13238 22:18:35.339821 o KMS driver or no outputs, pipes: 8, outputs: 0
13239 22:18:35.345458 [1mSubtest pipe-E-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13240 22:18:35.356800 <14>[ 30.706701] [IGT] kms_vblank: executing
13241 22:18:35.363001 IGT-Version: 1.2<14>[ 30.711982] [IGT] kms_vblank: exiting, ret=77
13242 22:18:35.366506 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13243 22:18:35.369889 Opened device: /dev/dri/card0
13244 22:18:35.376058 N<8>[ 30.722855] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>
13245 22:18:35.376877 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13247 22:18:35.383517 o KMS driver or no outputs, pipes: 8, outputs: 0
13248 22:18:35.389373 [1mSubtest pipe-E-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13249 22:18:35.400102 <14>[ 30.750171] [IGT] kms_vblank: executing
13250 22:18:35.406657 IGT-Version: 1.2<14>[ 30.755309] [IGT] kms_vblank: exiting, ret=77
13251 22:18:35.410363 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13252 22:18:35.413583 Opened device: /dev/dri/card0
13253 22:18:35.420132 N<8>[ 30.766542] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>
13254 22:18:35.420982 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13256 22:18:35.423286 o KMS driver or no outputs, pipes: 8, outputs: 0
13257 22:18:35.429627 [1mSubtest pipe-F-accuracy-idle: SKIP (0.000s)[0m
13258 22:18:35.442724 <14>[ 30.792543] [IGT] kms_vblank: executing
13259 22:18:35.449261 IGT-Version: 1.2<14>[ 30.797529] [IGT] kms_vblank: exiting, ret=77
13260 22:18:35.452568 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13261 22:18:35.456037 Opened device: /dev/dri/card0
13262 22:18:35.462613 N<8>[ 30.808723] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>
13263 22:18:35.463346 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13265 22:18:35.466649 o KMS driver or no outputs, pipes: 8, outputs: 0
13266 22:18:35.472394 [1mSubtest pipe-F-query-idle: SKIP (0.000s)[0m
13267 22:18:35.484603 <14>[ 30.834490] [IGT] kms_vblank: executing
13268 22:18:35.491618 IGT-Version: 1.2<14>[ 30.839655] [IGT] kms_vblank: exiting, ret=77
13269 22:18:35.494833 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13270 22:18:35.497998 Opened device: /dev/dri/card0
13271 22:18:35.504521 N<8>[ 30.850566] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>
13272 22:18:35.505409 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13274 22:18:35.507648 o KMS driver or no outputs, pipes: 8, outputs: 0
13275 22:18:35.514266 [1mSubtest pipe-F-query-idle-hang: SKIP (0.000s)[0m
13276 22:18:35.526930 <14>[ 30.876488] [IGT] kms_vblank: executing
13277 22:18:35.533170 IGT-Version: 1.2<14>[ 30.881548] [IGT] kms_vblank: exiting, ret=77
13278 22:18:35.536332 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13279 22:18:35.539780 Opened device: /dev/dri/card0
13280 22:18:35.545862 N<8>[ 30.893005] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>
13281 22:18:35.546687 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13283 22:18:35.549981 o KMS driver or no outputs, pipes: 8, outputs: 0
13284 22:18:35.556134 [1mSubtest pipe-F-query-forked: SKIP (0.000s)[0m
13285 22:18:35.568879 <14>[ 30.918776] [IGT] kms_vblank: executing
13286 22:18:35.575517 IGT-Version: 1.2<14>[ 30.923937] [IGT] kms_vblank: exiting, ret=77
13287 22:18:35.578473 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13288 22:18:35.581834 Opened device: /dev/dri/card0
13289 22:18:35.588376 N<8>[ 30.935628] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>
13290 22:18:35.589270 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13292 22:18:35.595048 o KMS driver or no outputs, pipes: 8, outputs: 0
13293 22:18:35.598461 [1mSubtest pipe-F-query-forked-hang: SKIP (0.000s)[0m
13294 22:18:35.611816 <14>[ 30.961627] [IGT] kms_vblank: executing
13295 22:18:35.618363 IGT-Version: 1.2<14>[ 30.966605] [IGT] kms_vblank: exiting, ret=77
13296 22:18:35.621368 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13297 22:18:35.624477 Opened device: /dev/dri/card0
13298 22:18:35.631337 N<8>[ 30.977989] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>
13299 22:18:35.632176 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13301 22:18:35.634677 o KMS driver or no outputs, pipes: 8, outputs: 0
13302 22:18:35.641414 [1mSubtest pipe-F-query-busy: SKIP (0.000s)[0m
13303 22:18:35.653250 <14>[ 31.003432] [IGT] kms_vblank: executing
13304 22:18:35.660164 IGT-Version: 1.2<14>[ 31.008485] [IGT] kms_vblank: exiting, ret=77
13305 22:18:35.663018 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13306 22:18:35.666985 Opened device: /dev/dri/card0
13307 22:18:35.673325 N<8>[ 31.020028] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>
13308 22:18:35.674065 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13310 22:18:35.676371 o KMS driver or no outputs, pipes: 8, outputs: 0
13311 22:18:35.682896 [1mSubtest pipe-F-query-busy-hang: SKIP (0.000s)[0m
13312 22:18:35.695945 <14>[ 31.046034] [IGT] kms_vblank: executing
13313 22:18:35.702224 IGT-Version: 1.2<14>[ 31.051192] [IGT] kms_vblank: exiting, ret=77
13314 22:18:35.705890 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13315 22:18:35.708945 Opened device: /dev/dri/card0
13316 22:18:35.715622 N<8>[ 31.062443] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>
13317 22:18:35.716352 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13319 22:18:35.722559 o KMS driver or no outputs, pipes: 8, outputs: 0
13320 22:18:35.726267 [1mSubtest pipe-F-query-forked-busy: SKIP (0.000s)[0m
13321 22:18:35.739583 <14>[ 31.088953] [IGT] kms_vblank: executing
13322 22:18:35.746461 IGT-Version: 1.2<14>[ 31.093976] [IGT] kms_vblank: exiting, ret=77
13323 22:18:35.748747 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13324 22:18:35.752493 Opened device: /dev/dri/card0
13325 22:18:35.758623 N<8>[ 31.105151] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>
13326 22:18:35.759640 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13328 22:18:35.765600 o KMS driver or no outputs, pipes: 8, outputs: 0
13329 22:18:35.768726 [1mSubtest pipe-F-query-forked-busy-hang: SKIP (0.000s)[0m
13330 22:18:35.781858 <14>[ 31.131925] [IGT] kms_vblank: executing
13331 22:18:35.788278 IGT-Version: 1.2<14>[ 31.136915] [IGT] kms_vblank: exiting, ret=77
13332 22:18:35.792090 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13333 22:18:35.795286 Opened device: /dev/dri/card0
13334 22:18:35.801740 N<8>[ 31.148694] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>
13335 22:18:35.802557 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13337 22:18:35.804648 o KMS driver or no outputs, pipes: 8, outputs: 0
13338 22:18:35.811930 [1mSubtest pipe-F-wait-idle: SKIP (0.000s)[0m
13339 22:18:35.823845 <14>[ 31.173873] [IGT] kms_vblank: executing
13340 22:18:35.830864 IGT-Version: 1.2<14>[ 31.178865] [IGT] kms_vblank: exiting, ret=77
13341 22:18:35.834153 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13342 22:18:35.836765 Opened device: /dev/dri/card0
13343 22:18:35.843458 N<8>[ 31.190387] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>
13344 22:18:35.844285 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13346 22:18:35.846788 o KMS driver or no outputs, pipes: 8, outputs: 0
13347 22:18:35.853566 [1mSubtest pipe-F-wait-idle-hang: SKIP (0.000s)[0m
13348 22:18:35.866436 <14>[ 31.216498] [IGT] kms_vblank: executing
13349 22:18:35.873180 IGT-Version: 1.2<14>[ 31.221547] [IGT] kms_vblank: exiting, ret=77
13350 22:18:35.877050 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13351 22:18:35.879750 Opened device: /dev/dri/card0
13352 22:18:35.886450 N<8>[ 31.232740] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>
13353 22:18:35.887325 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13355 22:18:35.889812 o KMS driver or no outputs, pipes: 8, outputs: 0
13356 22:18:35.896175 [1mSubtest pipe-F-wait-forked: SKIP (0.000s)[0m
13357 22:18:35.908299 <14>[ 31.258623] [IGT] kms_vblank: executing
13358 22:18:35.914948 IGT-Version: 1.2<14>[ 31.263782] [IGT] kms_vblank: exiting, ret=77
13359 22:18:35.918158 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13360 22:18:35.921569 Opened device: /dev/dri/card0
13361 22:18:35.928116 N<8>[ 31.275354] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>
13362 22:18:35.928856 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13364 22:18:35.932853 o KMS driver or no outputs, pipes: 8, outputs: 0
13365 22:18:35.938604 [1mSubtest pipe-F-wait-forked-hang: SKIP (0.000s)[0m
13366 22:18:35.951236 <14>[ 31.301271] [IGT] kms_vblank: executing
13367 22:18:35.957540 IGT-Version: 1.2<14>[ 31.306254] [IGT] kms_vblank: exiting, ret=77
13368 22:18:35.960853 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13369 22:18:35.964542 Opened device: /dev/dri/card0
13370 22:18:35.971158 N<8>[ 31.317671] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>
13371 22:18:35.972065 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13373 22:18:35.974533 o KMS driver or no outputs, pipes: 8, outputs: 0
13374 22:18:35.981047 [1mSubtest pipe-F-wait-busy: SKIP (0.000s)[0m
13375 22:18:35.993037 <14>[ 31.343102] [IGT] kms_vblank: executing
13376 22:18:35.999950 IGT-Version: 1.2<14>[ 31.348176] [IGT] kms_vblank: exiting, ret=77
13377 22:18:36.002707 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13378 22:18:36.006818 Opened device: /dev/dri/card0
13379 22:18:36.013019 N<8>[ 31.359705] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>
13380 22:18:36.013785 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13382 22:18:36.016039 o KMS driver or no outputs, pipes: 8, outputs: 0
13383 22:18:36.023276 [1mSubtest pipe-F-wait-busy-hang: SKIP (0.000s)[0m
13384 22:18:36.035792 <14>[ 31.385622] [IGT] kms_vblank: executing
13385 22:18:36.042149 IGT-Version: 1.2<14>[ 31.390617] [IGT] kms_vblank: exiting, ret=77
13386 22:18:36.046422 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13387 22:18:36.048903 Opened device: /dev/dri/card0
13388 22:18:36.055412 N<8>[ 31.401974] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>
13389 22:18:36.056281 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13391 22:18:36.058873 o KMS driver or no outputs, pipes: 8, outputs: 0
13392 22:18:36.065301 [1mSubtest pipe-F-wait-forked-busy: SKIP (0.000s)[0m
13393 22:18:36.078737 <14>[ 31.428004] [IGT] kms_vblank: executing
13394 22:18:36.084357 IGT-Version: 1.2<14>[ 31.433079] [IGT] kms_vblank: exiting, ret=77
13395 22:18:36.087921 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13396 22:18:36.091082 Opened device: /dev/dri/card0
13397 22:18:36.097461 N<8>[ 31.444688] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>
13398 22:18:36.098331 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13400 22:18:36.104075 o KMS driver or no outputs, pipes: 8, outputs: 0
13401 22:18:36.107108 [1mSubtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)[0m
13402 22:18:36.121441 <14>[ 31.471242] [IGT] kms_vblank: executing
13403 22:18:36.127720 IGT-Version: 1.2<14>[ 31.476326] [IGT] kms_vblank: exiting, ret=77
13404 22:18:36.130975 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13405 22:18:36.134474 Opened device: /dev/dri/card0
13406 22:18:36.141010 N<8>[ 31.487638] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>
13407 22:18:36.141863 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13409 22:18:36.148186 o KMS driver or no outputs, pipes: 8, outputs: 0
13410 22:18:36.150834 [1mSubtest pipe-F-ts-continuation-idle: SKIP (0.000s)[0m
13411 22:18:36.164248 <14>[ 31.514106] [IGT] kms_vblank: executing
13412 22:18:36.170657 IGT-Version: 1.2<14>[ 31.519122] [IGT] kms_vblank: exiting, ret=77
13413 22:18:36.173938 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13414 22:18:36.177333 Opened device: /dev/dri/card0
13415 22:18:36.184226 N<8>[ 31.530529] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>
13416 22:18:36.185126 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13418 22:18:36.191160 o KMS driver or no outputs, pipes: 8, outputs: 0
13419 22:18:36.193681 [1mSubtest pipe-F-ts-continuation-idle-hang: SKIP (0.000s)[0m
13420 22:18:36.207113 <14>[ 31.557500] [IGT] kms_vblank: executing
13421 22:18:36.213822 IGT-Version: 1.2<14>[ 31.562583] [IGT] kms_vblank: exiting, ret=77
13422 22:18:36.217079 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13423 22:18:36.221160 Opened device: /dev/dri/card0
13424 22:18:36.227629 N<8>[ 31.573895] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>
13425 22:18:36.228364 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13427 22:18:36.233518 o KMS driver or no outputs, pipes: 8, outputs: 0
13428 22:18:36.237084 [1mSubtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13429 22:18:36.250680 <14>[ 31.600798] [IGT] kms_vblank: executing
13430 22:18:36.257992 IGT-Version: 1.2<14>[ 31.605983] [IGT] kms_vblank: exiting, ret=77
13431 22:18:36.261190 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13432 22:18:36.263664 Opened device: /dev/dri/card0
13433 22:18:36.271532 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13435 22:18:36.273874 N<8>[ 31.617132] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>
13436 22:18:36.277061 o KMS driver or no outputs, pipes: 8, outputs: 0
13437 22:18:36.283344 [1mSubtest pipe-F-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13438 22:18:36.294828 <14>[ 31.644613] [IGT] kms_vblank: executing
13439 22:18:36.301267 IGT-Version: 1.2<14>[ 31.649644] [IGT] kms_vblank: exiting, ret=77
13440 22:18:36.304188 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13441 22:18:36.307605 Opened device: /dev/dri/card0
13442 22:18:36.314295 N<8>[ 31.660822] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>
13443 22:18:36.315042 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13445 22:18:36.321139 o KMS driver or no outputs, pipes: 8, outputs: 0
13446 22:18:36.323831 [1mSubtest pipe-F-ts-continuation-suspend: SKIP (0.000s)[0m
13447 22:18:36.338377 <14>[ 31.687927] [IGT] kms_vblank: executing
13448 22:18:36.344852 IGT-Version: 1.2<14>[ 31.692911] [IGT] kms_vblank: exiting, ret=77
13449 22:18:36.347689 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13450 22:18:36.350847 Opened device: /dev/dri/card0
13451 22:18:36.357377 N<8>[ 31.704122] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>
13452 22:18:36.358329 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13454 22:18:36.364352 o KMS driver or no outputs, pipes: 8, outputs: 0
13455 22:18:36.367801 [1mSubtest pipe-F-ts-continuation-modeset: SKIP (0.000s)[0m
13456 22:18:36.381468 <14>[ 31.731112] [IGT] kms_vblank: executing
13457 22:18:36.389001 IGT-Version: 1.2<14>[ 31.736111] [IGT] kms_vblank: exiting, ret=77
13458 22:18:36.390855 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13459 22:18:36.395160 Opened device: /dev/dri/card0
13460 22:18:36.400930 N<8>[ 31.747435] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>
13461 22:18:36.401796 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13463 22:18:36.407576 o KMS driver or no outputs, pipes: 8, outputs: 0
13464 22:18:36.413720 [1mSubtest pipe-F-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13465 22:18:36.424771 <14>[ 31.774731] [IGT] kms_vblank: executing
13466 22:18:36.431266 IGT-Version: 1.2<14>[ 31.779914] [IGT] kms_vblank: exiting, ret=77
13467 22:18:36.434465 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13468 22:18:36.437861 Opened device: /dev/dri/card0
13469 22:18:36.444165 N<8>[ 31.790969] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>
13470 22:18:36.444943 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13472 22:18:36.450737 o KMS driver or no outputs, pipes: 8, outputs: 0
13473 22:18:36.457463 [1mSubtest pipe-F-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13474 22:18:36.468096 <14>[ 31.818128] [IGT] kms_vblank: executing
13475 22:18:36.474767 IGT-Version: 1.2<14>[ 31.823234] [IGT] kms_vblank: exiting, ret=77
13476 22:18:36.477899 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13477 22:18:36.481411 Opened device: /dev/dri/card0
13478 22:18:36.487781 N<8>[ 31.834499] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>
13479 22:18:36.488629 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13481 22:18:36.490874 o KMS driver or no outputs, pipes: 8, outputs: 0
13482 22:18:36.497679 [1mSubtest pipe-G-accuracy-idle: SKIP (0.000s)[0m
13483 22:18:36.511207 <14>[ 31.860575] [IGT] kms_vblank: executing
13484 22:18:36.517084 IGT-Version: 1.2<14>[ 31.865592] [IGT] kms_vblank: exiting, ret=77
13485 22:18:36.520294 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13486 22:18:36.523461 Opened device: /dev/dri/card0
13487 22:18:36.530221 N<8>[ 31.876779] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>
13488 22:18:36.530965 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13490 22:18:36.533915 o KMS driver or no outputs, pipes: 8, outputs: 0
13491 22:18:36.539892 [1mSubtest pipe-G-query-idle: SKIP (0.000s)[0m
13492 22:18:36.552516 <14>[ 31.902968] [IGT] kms_vblank: executing
13493 22:18:36.559305 IGT-Version: 1.2<14>[ 31.908046] [IGT] kms_vblank: exiting, ret=77
13494 22:18:36.562555 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13495 22:18:36.565972 Opened device: /dev/dri/card0
13496 22:18:36.572289 N<8>[ 31.919330] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>
13497 22:18:36.573138 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13499 22:18:36.579558 o KMS driver or no outputs, pipes: 8, outputs: 0
13500 22:18:36.582370 [1mSubtest pipe-G-query-idle-hang: SKIP (0.000s)[0m
13501 22:18:36.595472 <14>[ 31.945581] [IGT] kms_vblank: executing
13502 22:18:36.602360 IGT-Version: 1.2<14>[ 31.950553] [IGT] kms_vblank: exiting, ret=77
13503 22:18:36.605433 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13504 22:18:36.608614 Opened device: /dev/dri/card0
13505 22:18:36.615404 N<8>[ 31.961788] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>
13506 22:18:36.616239 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13508 22:18:36.618518 o KMS driver or no outputs, pipes: 8, outputs: 0
13509 22:18:36.624828 [1mSubtest pipe-G-query-forked: SKIP (0.000s)[0m
13510 22:18:36.639054 <14>[ 31.988795] [IGT] kms_vblank: executing
13511 22:18:36.644990 IGT-Version: 1.2<14>[ 31.993818] [IGT] kms_vblank: exiting, ret=77
13512 22:18:36.648361 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13513 22:18:36.651522 Opened device: /dev/dri/card0
13514 22:18:36.658445 N<8>[ 32.005661] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>
13515 22:18:36.659327 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13517 22:18:36.664857 o KMS driver or no outputs, pipes: 8, outputs: 0
13518 22:18:36.668279 [1mSubtest pipe-G-query-forked-hang: SKIP (0.000s)[0m
13519 22:18:36.681761 <14>[ 32.031800] [IGT] kms_vblank: executing
13520 22:18:36.688250 IGT-Version: 1.2<14>[ 32.036768] [IGT] kms_vblank: exiting, ret=77
13521 22:18:36.691793 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13522 22:18:36.695419 Opened device: /dev/dri/card0
13523 22:18:36.701791 N<8>[ 32.048108] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>
13524 22:18:36.702652 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13526 22:18:36.705041 o KMS driver or no outputs, pipes: 8, outputs: 0
13527 22:18:36.711237 [1mSubtest pipe-G-query-busy: SKIP (0.000s)[0m
13528 22:18:36.724125 <14>[ 32.073937] [IGT] kms_vblank: executing
13529 22:18:36.730466 IGT-Version: 1.2<14>[ 32.078935] [IGT] kms_vblank: exiting, ret=77
13530 22:18:36.734382 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13531 22:18:36.736943 Opened device: /dev/dri/card0
13532 22:18:36.743577 N<8>[ 32.090261] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>
13533 22:18:36.744445 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13535 22:18:36.747706 o KMS driver or no outputs, pipes: 8, outputs: 0
13536 22:18:36.752904 [1mSubtest pipe-G-query-busy-hang: SKIP (0.000s)[0m
13537 22:18:36.766610 <14>[ 32.116403] [IGT] kms_vblank: executing
13538 22:18:36.773000 IGT-Version: 1.2<14>[ 32.121422] [IGT] kms_vblank: exiting, ret=77
13539 22:18:36.776510 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13540 22:18:36.779454 Opened device: /dev/dri/card0
13541 22:18:36.785784 N<8>[ 32.132755] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>
13542 22:18:36.786641 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13544 22:18:36.792597 o KMS driver or no outputs, pipes: 8, outputs: 0
13545 22:18:36.796175 [1mSubtest pipe-G-query-forked-busy: SKIP (0.000s)[0m
13546 22:18:36.808909 <14>[ 32.159128] [IGT] kms_vblank: executing
13547 22:18:36.815285 IGT-Version: 1.2<14>[ 32.164122] [IGT] kms_vblank: exiting, ret=77
13548 22:18:36.818677 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13549 22:18:36.822019 Opened device: /dev/dri/card0
13550 22:18:36.829433 N<8>[ 32.175516] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>
13551 22:18:36.830275 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13553 22:18:36.835735 o KMS driver or no outputs, pipes: 8, outputs: 0
13554 22:18:36.838890 [1mSubtest pipe-G-query-forked-busy-hang: SKIP (0.000s)[0m
13555 22:18:36.852231 <14>[ 32.202273] [IGT] kms_vblank: executing
13556 22:18:36.858818 IGT-Version: 1.2<14>[ 32.207369] [IGT] kms_vblank: exiting, ret=77
13557 22:18:36.861889 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13558 22:18:36.865062 Opened device: /dev/dri/card0
13559 22:18:36.871815 N<8>[ 32.218567] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>
13560 22:18:36.872655 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13562 22:18:36.875146 o KMS driver or no outputs, pipes: 8, outputs: 0
13563 22:18:36.881726 [1mSubtest pipe-G-wait-idle: SKIP (0.000s)[0m
13564 22:18:36.893897 <14>[ 32.244227] [IGT] kms_vblank: executing
13565 22:18:36.900655 IGT-Version: 1.2<14>[ 32.249183] [IGT] kms_vblank: exiting, ret=77
13566 22:18:36.903653 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13567 22:18:36.908015 Opened device: /dev/dri/card0
13568 22:18:36.913848 N<8>[ 32.260735] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>
13569 22:18:36.914689 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13571 22:18:36.916889 o KMS driver or no outputs, pipes: 8, outputs: 0
13572 22:18:36.923548 [1mSubtest pipe-G-wait-idle-hang: SKIP (0.000s)[0m
13573 22:18:36.937059 <14>[ 32.286644] [IGT] kms_vblank: executing
13574 22:18:36.943347 IGT-Version: 1.2<14>[ 32.291785] [IGT] kms_vblank: exiting, ret=77
13575 22:18:36.946414 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13576 22:18:36.949475 Opened device: /dev/dri/card0
13577 22:18:36.956345 N<8>[ 32.302789] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>
13578 22:18:36.957214 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13580 22:18:36.959973 o KMS driver or no outputs, pipes: 8, outputs: 0
13581 22:18:36.966071 [1mSubtest pipe-G-wait-forked: SKIP (0.000s)[0m
13582 22:18:36.978710 <14>[ 32.328806] [IGT] kms_vblank: executing
13583 22:18:36.985410 IGT-Version: 1.2<14>[ 32.333776] [IGT] kms_vblank: exiting, ret=77
13584 22:18:36.988882 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13585 22:18:36.991603 Opened device: /dev/dri/card0
13586 22:18:36.998295 N<8>[ 32.344891] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>
13587 22:18:36.999155 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13589 22:18:37.002400 o KMS driver or no outputs, pipes: 8, outputs: 0
13590 22:18:37.007851 [1mSubtest pipe-G-wait-forked-hang: SKIP (0.000s)[0m
13591 22:18:37.021142 <14>[ 32.371266] [IGT] kms_vblank: executing
13592 22:18:37.027452 IGT-Version: 1.2<14>[ 32.376243] [IGT] kms_vblank: exiting, ret=77
13593 22:18:37.030939 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13594 22:18:37.034789 Opened device: /dev/dri/card0
13595 22:18:37.040930 N<8>[ 32.387486] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>
13596 22:18:37.041786 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13598 22:18:37.044457 o KMS driver or no outputs, pipes: 8, outputs: 0
13599 22:18:37.050729 [1mSubtest pipe-G-wait-busy: SKIP (0.000s)[0m
13600 22:18:37.063221 <14>[ 32.412859] [IGT] kms_vblank: executing
13601 22:18:37.070480 IGT-Version: 1.2<14>[ 32.417861] [IGT] kms_vblank: exiting, ret=77
13602 22:18:37.072228 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13603 22:18:37.075637 Opened device: /dev/dri/card0
13604 22:18:37.082512 N<8>[ 32.429226] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>
13605 22:18:37.083369 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13607 22:18:37.085921 o KMS driver or no outputs, pipes: 8, outputs: 0
13608 22:18:37.092273 [1mSubtest pipe-G-wait-busy-hang: SKIP (0.000s)[0m
13609 22:18:37.105515 <14>[ 32.455422] [IGT] kms_vblank: executing
13610 22:18:37.111311 IGT-Version: 1.2<14>[ 32.460410] [IGT] kms_vblank: exiting, ret=77
13611 22:18:37.115350 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13612 22:18:37.118657 Opened device: /dev/dri/card0
13613 22:18:37.125046 N<8>[ 32.471918] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>
13614 22:18:37.125906 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13616 22:18:37.128729 o KMS driver or no outputs, pipes: 8, outputs: 0
13617 22:18:37.134993 [1mSubtest pipe-G-wait-forked-busy: SKIP (0.000s)[0m
13618 22:18:37.147765 <14>[ 32.497976] [IGT] kms_vblank: executing
13619 22:18:37.154338 IGT-Version: 1.2<14>[ 32.503012] [IGT] kms_vblank: exiting, ret=77
13620 22:18:37.158506 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13621 22:18:37.161186 Opened device: /dev/dri/card0
13622 22:18:37.168141 N<8>[ 32.514069] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>
13623 22:18:37.168989 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13625 22:18:37.174824 o KMS driver or no outputs, pipes: 8, outputs: 0
13626 22:18:37.178051 [1mSubtest pipe-G-wait-forked-busy-hang: SKIP (0.000s)[0m
13627 22:18:37.190663 <14>[ 32.540925] [IGT] kms_vblank: executing
13628 22:18:37.197345 IGT-Version: 1.2<14>[ 32.545929] [IGT] kms_vblank: exiting, ret=77
13629 22:18:37.201327 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13630 22:18:37.203887 Opened device: /dev/dri/card0
13631 22:18:37.210738 N<8>[ 32.557126] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>
13632 22:18:37.211636 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13634 22:18:37.217431 o KMS driver or no outputs, pipes: 8, outputs: 0
13635 22:18:37.220139 [1mSubtest pipe-G-ts-continuation-idle: SKIP (0.000s)[0m
13636 22:18:37.234017 <14>[ 32.583832] [IGT] kms_vblank: executing
13637 22:18:37.240378 IGT-Version: 1.2<14>[ 32.588787] [IGT] kms_vblank: exiting, ret=77
13638 22:18:37.243472 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13639 22:18:37.247294 Opened device: /dev/dri/card0
13640 22:18:37.253866 N<8>[ 32.600181] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>
13641 22:18:37.254716 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13643 22:18:37.260076 o KMS driver or no outputs, pipes: 8, outputs: 0
13644 22:18:37.263376 [1mSubtest pipe-G-ts-continuation-idle-hang: SKIP (0.000s)[0m
13645 22:18:37.276918 <14>[ 32.627422] [IGT] kms_vblank: executing
13646 22:18:37.283858 IGT-Version: 1.2<14>[ 32.632413] [IGT] kms_vblank: exiting, ret=77
13647 22:18:37.287302 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13648 22:18:37.290381 Opened device: /dev/dri/card0
13649 22:18:37.296981 N<8>[ 32.643928] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>
13650 22:18:37.297829 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13652 22:18:37.303318 o KMS driver or no outputs, pipes: 8, outputs: 0
13653 22:18:37.306868 [1mSubtest pipe-G-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13654 22:18:37.320269 <14>[ 32.670743] [IGT] kms_vblank: executing
13655 22:18:37.327336 IGT-Version: 1.2<14>[ 32.675964] [IGT] kms_vblank: exiting, ret=77
13656 22:18:37.330356 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13657 22:18:37.340247 Opened device: /<8>[ 32.686842] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>
13658 22:18:37.341097 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13660 22:18:37.343918 dev/dri/card0
13661 22:18:37.346982 No KMS driver or no outputs, pipes: 8, outputs: 0
13662 22:18:37.353569 [1mSubtest pipe-G-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13663 22:18:37.364145 <14>[ 32.713959] [IGT] kms_vblank: executing
13664 22:18:37.370365 IGT-Version: 1.2<14>[ 32.719219] [IGT] kms_vblank: exiting, ret=77
13665 22:18:37.373858 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13666 22:18:37.377154 Opened device: /dev/dri/card0
13667 22:18:37.384083 N<8>[ 32.730571] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>
13668 22:18:37.384939 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13670 22:18:37.390120 o KMS driver or no outputs, pipes: 8, outputs: 0
13671 22:18:37.393243 [1mSubtest pipe-G-ts-continuation-suspend: SKIP (0.000s)[0m
13672 22:18:37.406924 <14>[ 32.757251] [IGT] kms_vblank: executing
13673 22:18:37.413911 IGT-Version: 1.2<14>[ 32.762205] [IGT] kms_vblank: exiting, ret=77
13674 22:18:37.416682 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13675 22:18:37.419718 Opened device: /dev/dri/card0
13676 22:18:37.426786 N<8>[ 32.773690] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>
13677 22:18:37.427721 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13679 22:18:37.433317 o KMS driver or no outputs, pipes: 8, outputs: 0
13680 22:18:37.436247 [1mSubtest pipe-G-ts-continuation-modeset: SKIP (0.000s)[0m
13681 22:18:37.450136 <14>[ 32.800014] [IGT] kms_vblank: executing
13682 22:18:37.457486 IGT-Version: 1.2<14>[ 32.805103] [IGT] kms_vblank: exiting, ret=77
13683 22:18:37.459856 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13684 22:18:37.463073 Opened device: /dev/dri/card0
13685 22:18:37.470100 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13687 22:18:37.473670 N<8>[ 32.816544] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>
13688 22:18:37.476074 o KMS driver or no outputs, pipes: 8, outputs: 0
13689 22:18:37.482481 [1mSubtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13690 22:18:37.494901 <14>[ 32.844700] [IGT] kms_vblank: executing
13691 22:18:37.501509 IGT-Version: 1.2<14>[ 32.849913] [IGT] kms_vblank: exiting, ret=77
13692 22:18:37.505045 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13693 22:18:37.507430 Opened device: /dev/dri/card0
13694 22:18:37.514394 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13696 22:18:37.517360 N<8>[ 32.861299] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>
13697 22:18:37.521084 o KMS driver or no outputs, pipes: 8, outputs: 0
13698 22:18:37.527428 [1mSubtest pipe-G-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13699 22:18:37.538673 <14>[ 32.888697] [IGT] kms_vblank: executing
13700 22:18:37.545297 IGT-Version: 1.2<14>[ 32.893638] [IGT] kms_vblank: exiting, ret=77
13701 22:18:37.548210 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13702 22:18:37.552076 Opened device: /dev/dri/card0
13703 22:18:37.558302 N<8>[ 32.905364] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>
13704 22:18:37.559164 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13706 22:18:37.561609 o KMS driver or no outputs, pipes: 8, outputs: 0
13707 22:18:37.567820 [1mSubtest pipe-H-accuracy-idle: SKIP (0.000s)[0m
13708 22:18:37.580642 <14>[ 32.930830] [IGT] kms_vblank: executing
13709 22:18:37.587115 IGT-Version: 1.2<14>[ 32.935910] [IGT] kms_vblank: exiting, ret=77
13710 22:18:37.590532 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13711 22:18:37.594028 Opened device: /dev/dri/card0
13712 22:18:37.600880 N<8>[ 32.947448] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>
13713 22:18:37.601728 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13715 22:18:37.603317 o KMS driver or no outputs, pipes: 8, outputs: 0
13716 22:18:37.610766 [1mSubtest pipe-H-query-idle: SKIP (0.000s)[0m
13717 22:18:37.622920 <14>[ 32.973165] [IGT] kms_vblank: executing
13718 22:18:37.629483 IGT-Version: 1.2<14>[ 32.978137] [IGT] kms_vblank: exiting, ret=77
13719 22:18:37.633092 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13720 22:18:37.635898 Opened device: /dev/dri/card0
13721 22:18:37.642550 N<8>[ 32.989356] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>
13722 22:18:37.643529 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13724 22:18:37.646101 o KMS driver or no outputs, pipes: 8, outputs: 0
13725 22:18:37.652856 [1mSubtest pipe-H-query-idle-hang: SKIP (0.000s)[0m
13726 22:18:37.664849 <14>[ 33.015434] [IGT] kms_vblank: executing
13727 22:18:37.671917 IGT-Version: 1.2<14>[ 33.020378] [IGT] kms_vblank: exiting, ret=77
13728 22:18:37.674850 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13729 22:18:37.678106 Opened device: /dev/dri/card0
13730 22:18:37.684844 N<8>[ 33.031889] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>
13731 22:18:37.685691 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13733 22:18:37.687957 o KMS driver or no outputs, pipes: 8, outputs: 0
13734 22:18:37.694451 [1mSubtest pipe-H-query-forked: SKIP (0.000s)[0m
13735 22:18:37.707276 <14>[ 33.057588] [IGT] kms_vblank: executing
13736 22:18:37.714036 IGT-Version: 1.2<14>[ 33.062602] [IGT] kms_vblank: exiting, ret=77
13737 22:18:37.717674 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13738 22:18:37.720226 Opened device: /dev/dri/card0
13739 22:18:37.727077 N<8>[ 33.074048] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>
13740 22:18:37.728025 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13742 22:18:37.733495 o KMS driver or no outputs, pipes: 8, outputs: 0
13743 22:18:37.737340 [1mSubtest pipe-H-query-forked-hang: SKIP (0.000s)[0m
13744 22:18:37.749571 <14>[ 33.099900] [IGT] kms_vblank: executing
13745 22:18:37.756078 IGT-Version: 1.2<14>[ 33.104947] [IGT] kms_vblank: exiting, ret=77
13746 22:18:37.759444 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13747 22:18:37.762996 Opened device: /dev/dri/card0
13748 22:18:37.769685 N<8>[ 33.116570] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>
13749 22:18:37.770536 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13751 22:18:37.772403 o KMS driver or no outputs, pipes: 8, outputs: 0
13752 22:18:37.779586 [1mSubtest pipe-H-query-busy: SKIP (0.000s)[0m
13753 22:18:37.792090 <14>[ 33.142084] [IGT] kms_vblank: executing
13754 22:18:37.798618 IGT-Version: 1.2<14>[ 33.147090] [IGT] kms_vblank: exiting, ret=77
13755 22:18:37.801792 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13756 22:18:37.804870 Opened device: /dev/dri/card0
13757 22:18:37.811866 N<8>[ 33.158480] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>
13758 22:18:37.812734 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13760 22:18:37.816035 o KMS driver or no outputs, pipes: 8, outputs: 0
13761 22:18:37.821369 [1mSubtest pipe-H-query-busy-hang: SKIP (0.000s)[0m
13762 22:18:37.834051 <14>[ 33.184242] [IGT] kms_vblank: executing
13763 22:18:37.840514 IGT-Version: 1.2<14>[ 33.189325] [IGT] kms_vblank: exiting, ret=77
13764 22:18:37.844447 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13765 22:18:37.847668 Opened device: /dev/dri/card0
13766 22:18:37.854040 N<8>[ 33.200900] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>
13767 22:18:37.855084 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13769 22:18:37.860866 o KMS driver or no outputs, pipes: 8, outputs: 0
13770 22:18:37.863719 [1mSubtest pipe-H-query-forked-busy: SKIP (0.000s)[0m
13771 22:18:37.877431 <14>[ 33.227181] [IGT] kms_vblank: executing
13772 22:18:37.883904 IGT-Version: 1.2<14>[ 33.232152] [IGT] kms_vblank: exiting, ret=77
13773 22:18:37.886818 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13774 22:18:37.889892 Opened device: /dev/dri/card0
13775 22:18:37.896580 N<8>[ 33.243684] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>
13776 22:18:37.897554 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13778 22:18:37.903709 o KMS driver or no outputs, pipes: 8, outputs: 0
13779 22:18:37.906288 [1mSubtest pipe-H-query-forked-busy-hang: SKIP (0.000s)[0m
13780 22:18:37.920160 <14>[ 33.270161] [IGT] kms_vblank: executing
13781 22:18:37.926490 IGT-Version: 1.2<14>[ 33.275298] [IGT] kms_vblank: exiting, ret=77
13782 22:18:37.929985 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13783 22:18:37.933041 Opened device: /dev/dri/card0
13784 22:18:37.940055 N<8>[ 33.286568] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>
13785 22:18:37.940901 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13787 22:18:37.942721 o KMS driver or no outputs, pipes: 8, outputs: 0
13788 22:18:37.949206 [1mSubtest pipe-H-wait-idle: SKIP (0.000s)[0m
13789 22:18:37.961614 <14>[ 33.312057] [IGT] kms_vblank: executing
13790 22:18:37.968168 IGT-Version: 1.2<14>[ 33.317051] [IGT] kms_vblank: exiting, ret=77
13791 22:18:37.971735 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13792 22:18:37.975409 Opened device: /dev/dri/card0
13793 22:18:37.981486 N<8>[ 33.328723] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>
13794 22:18:37.982331 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13796 22:18:37.984642 o KMS driver or no outputs, pipes: 8, outputs: 0
13797 22:18:37.991449 [1mSubtest pipe-H-wait-idle-hang: SKIP (0.000s)[0m
13798 22:18:38.004052 <14>[ 33.354585] [IGT] kms_vblank: executing
13799 22:18:38.010806 IGT-Version: 1.2<14>[ 33.359714] [IGT] kms_vblank: exiting, ret=77
13800 22:18:38.014382 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13801 22:18:38.017615 Opened device: /dev/dri/card0
13802 22:18:38.024652 N<8>[ 33.371266] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>
13803 22:18:38.025390 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13805 22:18:38.028485 o KMS driver or no outputs, pipes: 8, outputs: 0
13806 22:18:38.034638 [1mSubtest pipe-H-wait-forked: SKIP (0.000s)[0m
13807 22:18:38.046740 <14>[ 33.396959] [IGT] kms_vblank: executing
13808 22:18:38.053476 IGT-Version: 1.2<14>[ 33.401940] [IGT] kms_vblank: exiting, ret=77
13809 22:18:38.056821 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13810 22:18:38.059679 Opened device: /dev/dri/card0
13811 22:18:38.066531 N<8>[ 33.413137] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>
13812 22:18:38.067380 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13814 22:18:38.069890 o KMS driver or no outputs, pipes: 8, outputs: 0
13815 22:18:38.076746 [1mSubtest pipe-H-wait-forked-hang: SKIP (0.000s)[0m
13816 22:18:38.089327 <14>[ 33.439561] [IGT] kms_vblank: executing
13817 22:18:38.096183 IGT-Version: 1.2<14>[ 33.444543] [IGT] kms_vblank: exiting, ret=77
13818 22:18:38.099450 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13819 22:18:38.103060 Opened device: /dev/dri/card0
13820 22:18:38.108678 N<8>[ 33.456158] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>
13821 22:18:38.109503 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13823 22:18:38.112218 o KMS driver or no outputs, pipes: 8, outputs: 0
13824 22:18:38.118997 [1mSubtest pipe-H-wait-busy: SKIP (0.000s)[0m
13825 22:18:38.131320 <14>[ 33.481494] [IGT] kms_vblank: executing
13826 22:18:38.138235 IGT-Version: 1.2<14>[ 33.486487] [IGT] kms_vblank: exiting, ret=77
13827 22:18:38.141055 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13828 22:18:38.144086 Opened device: /dev/dri/card0
13829 22:18:38.150687 N<8>[ 33.497780] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>
13830 22:18:38.151430 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13832 22:18:38.154734 o KMS driver or no outputs, pipes: 8, outputs: 0
13833 22:18:38.160714 [1mSubtest pipe-H-wait-busy-hang: SKIP (0.000s)[0m
13834 22:18:38.173120 <14>[ 33.523569] [IGT] kms_vblank: executing
13835 22:18:38.180130 IGT-Version: 1.2<14>[ 33.528704] [IGT] kms_vblank: exiting, ret=77
13836 22:18:38.183542 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13837 22:18:38.186622 Opened device: /dev/dri/card0
13838 22:18:38.193488 N<8>[ 33.540256] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>
13839 22:18:38.194338 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
13841 22:18:38.200081 o KMS driver or no outputs, pipes: 8, outputs: 0
13842 22:18:38.203263 [1mSubtest pipe-H-wait-forked-busy: SKIP (0.000s)[0m
13843 22:18:38.216050 <14>[ 33.566128] [IGT] kms_vblank: executing
13844 22:18:38.222064 IGT-Version: 1.2<14>[ 33.571172] [IGT] kms_vblank: exiting, ret=77
13845 22:18:38.226078 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13846 22:18:38.229034 Opened device: /dev/dri/card0
13847 22:18:38.235970 N<8>[ 33.582656] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>
13848 22:18:38.236820 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
13850 22:18:38.242618 o KMS driver or no outputs, pipes: 8, outputs: 0
13851 22:18:38.245955 [1mSubtest pipe-H-wait-forked-busy-hang: SKIP (0.000s)[0m
13852 22:18:38.258786 <14>[ 33.609066] [IGT] kms_vblank: executing
13853 22:18:38.265342 IGT-Version: 1.2<14>[ 33.614187] [IGT] kms_vblank: exiting, ret=77
13854 22:18:38.268698 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13855 22:18:38.271997 Opened device: /dev/dri/card0
13856 22:18:38.278872 N<8>[ 33.625692] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>
13857 22:18:38.279780 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
13859 22:18:38.285291 o KMS driver or no outputs, pipes: 8, outputs: 0
13860 22:18:38.288509 [1mSubtest pipe-H-ts-continuation-idle: SKIP (0.000s)[0m
13861 22:18:38.301833 <14>[ 33.651937] [IGT] kms_vblank: executing
13862 22:18:38.308232 IGT-Version: 1.2<14>[ 33.657032] [IGT] kms_vblank: exiting, ret=77
13863 22:18:38.311357 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13864 22:18:38.315230 Opened device: /dev/dri/card0
13865 22:18:38.321039 N<8>[ 33.668666] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>
13866 22:18:38.322016 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
13868 22:18:38.327724 o KMS driver or no outputs, pipes: 8, outputs: 0
13869 22:18:38.334611 [1mSubtest pipe-H-ts-continuation-idle-hang: SKIP (0.000s)[0m
13870 22:18:38.345766 <14>[ 33.695485] [IGT] kms_vblank: executing
13871 22:18:38.352306 IGT-Version: 1.2<14>[ 33.700598] [IGT] kms_vblank: exiting, ret=77
13872 22:18:38.355222 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13873 22:18:38.358351 Opened device: /dev/dri/card0
13874 22:18:38.365489 N<8>[ 33.712124] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>
13875 22:18:38.366229 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
13877 22:18:38.371701 o KMS driver or no outputs, pipes: 8, outputs: 0
13878 22:18:38.374698 [1mSubtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13879 22:18:38.389000 <14>[ 33.738954] [IGT] kms_vblank: executing
13880 22:18:38.395309 IGT-Version: 1.2<14>[ 33.744049] [IGT] kms_vblank: exiting, ret=77
13881 22:18:38.398924 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13882 22:18:38.402776 Opened device: /dev/dri/card0
13883 22:18:38.408909 N<8>[ 33.755641] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>
13884 22:18:38.409758 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
13886 22:18:38.415491 o KMS driver or no outputs, pipes: 8, outputs: 0
13887 22:18:38.421331 [1mSubtest pipe-H-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13888 22:18:38.432029 <14>[ 33.782498] [IGT] kms_vblank: executing
13889 22:18:38.438942 IGT-Version: 1.2<14>[ 33.787722] [IGT] kms_vblank: exiting, ret=77
13890 22:18:38.442593 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13891 22:18:38.445973 Opened device: /dev/dri/card0
13892 22:18:38.453060 N<8>[ 33.799210] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>
13893 22:18:38.453910 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
13895 22:18:38.458757 o KMS driver or no outputs, pipes: 8, outputs: 0
13896 22:18:38.462050 [1mSubtest pipe-H-ts-continuation-suspend: SKIP (0.000s)[0m
13897 22:18:38.474932 <14>[ 33.825457] [IGT] kms_vblank: executing
13898 22:18:38.481736 IGT-Version: 1.2<14>[ 33.830550] [IGT] kms_vblank: exiting, ret=77
13899 22:18:38.485143 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13900 22:18:38.488316 Opened device: /dev/dri/card0
13901 22:18:38.494897 N<8>[ 33.841993] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>
13902 22:18:38.495780 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
13904 22:18:38.501576 o KMS driver or no outputs, pipes: 8, outputs: 0
13905 22:18:38.505051 [1mSubtest pipe-H-ts-continuation-modeset: SKIP (0.000s)[0m
13906 22:18:38.518579 <14>[ 33.868668] [IGT] kms_vblank: executing
13907 22:18:38.524980 IGT-Version: 1.2<14>[ 33.873627] [IGT] kms_vblank: exiting, ret=77
13908 22:18:38.528651 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13909 22:18:38.531495 Opened device: /dev/dri/card0
13910 22:18:38.538421 N<8>[ 33.885111] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>
13911 22:18:38.539320 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
13913 22:18:38.545148 o KMS driver or no outputs, pipes: 8, outputs: 0
13914 22:18:38.551283 [1mSubtest pipe-H-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13915 22:18:38.562395 <14>[ 33.912297] [IGT] kms_vblank: executing
13916 22:18:38.568253 IGT-Version: 1.2<14>[ 33.917260] [IGT] kms_vblank: exiting, ret=77
13917 22:18:38.571773 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13918 22:18:38.575594 Opened device: /dev/dri/card0
13919 22:18:38.581679 N<8>[ 33.928833] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>
13920 22:18:38.582557 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
13922 22:18:38.588838 Received signal: <TESTSET> STOP
13923 22:18:38.589384 Closing test_set kms_vblank
13924 22:18:38.591239 o KMS driver or no outputs, pipe<8>[ 33.940157] <LAVA_SIGNAL_TESTSET STOP>
13925 22:18:38.598124 s: 8, outputs: 0<8>[ 33.946061] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 10583909_1.5.2.3.1>
13926 22:18:38.598685
13927 22:18:38.599341 Received signal: <ENDRUN> 0_igt-kms-mediatek 10583909_1.5.2.3.1
13928 22:18:38.599800 Ending use of test pattern.
13929 22:18:38.600149 Ending test lava.0_igt-kms-mediatek (10583909_1.5.2.3.1), duration 13.57
13931 22:18:38.605325 [1mSubtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13932 22:18:38.605912 + set +x
13933 22:18:38.607954 <LAVA_TEST_RUNNER EXIT>
13934 22:18:38.608682 ok: lava_test_shell seems to have completed
13935 22:18:38.628606 addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: skip
set: kms_atomic
atomic_plane_damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: skip
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: skip
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: skip
set: kms_vblank
crtc-invalid-params:
result: skip
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: skip
set: drm_read
empty-nonblock:
result: skip
set: drm_read
fault-buffer:
result: skip
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: skip
set: kms_vblank
invalid-buffer:
result: skip
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
pipe-A-accuracy-idle:
result: skip
set: kms_vblank
pipe-A-query-busy:
result: skip
set: kms_vblank
pipe-A-query-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked:
result: skip
set: kms_vblank
pipe-A-query-forked-busy:
result: skip
set: kms_vblank
pipe-A-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked-hang:
result: skip
set: kms_vblank
pipe-A-query-idle:
result: skip
set: kms_vblank
pipe-A-query-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-A-wait-busy:
result: skip
set: kms_vblank
pipe-A-wait-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked-hang:
result: skip
set: kms_vblank
pipe-A-wait-idle:
result: skip
set: kms_vblank
pipe-A-wait-idle-hang:
result: skip
set: kms_vblank
pipe-B-accuracy-idle:
result: skip
set: kms_vblank
pipe-B-query-busy:
result: skip
set: kms_vblank
pipe-B-query-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked:
result: skip
set: kms_vblank
pipe-B-query-forked-busy:
result: skip
set: kms_vblank
pipe-B-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked-hang:
result: skip
set: kms_vblank
pipe-B-query-idle:
result: skip
set: kms_vblank
pipe-B-query-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-B-wait-busy:
result: skip
set: kms_vblank
pipe-B-wait-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked-hang:
result: skip
set: kms_vblank
pipe-B-wait-idle:
result: skip
set: kms_vblank
pipe-B-wait-idle-hang:
result: skip
set: kms_vblank
pipe-C-accuracy-idle:
result: skip
set: kms_vblank
pipe-C-query-busy:
result: skip
set: kms_vblank
pipe-C-query-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked:
result: skip
set: kms_vblank
pipe-C-query-forked-busy:
result: skip
set: kms_vblank
pipe-C-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked-hang:
result: skip
set: kms_vblank
pipe-C-query-idle:
result: skip
set: kms_vblank
pipe-C-query-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-C-wait-busy:
result: skip
set: kms_vblank
pipe-C-wait-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked-hang:
result: skip
set: kms_vblank
pipe-C-wait-idle:
result: skip
set: kms_vblank
pipe-C-wait-idle-hang:
result: skip
set: kms_vblank
pipe-D-accuracy-idle:
result: skip
set: kms_vblank
pipe-D-query-busy:
result: skip
set: kms_vblank
pipe-D-query-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked:
result: skip
set: kms_vblank
pipe-D-query-forked-busy:
result: skip
set: kms_vblank
pipe-D-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked-hang:
result: skip
set: kms_vblank
pipe-D-query-idle:
result: skip
set: kms_vblank
pipe-D-query-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-D-wait-busy:
result: skip
set: kms_vblank
pipe-D-wait-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked-hang:
result: skip
set: kms_vblank
pipe-D-wait-idle:
result: skip
set: kms_vblank
pipe-D-wait-idle-hang:
result: skip
set: kms_vblank
pipe-E-accuracy-idle:
result: skip
set: kms_vblank
pipe-E-query-busy:
result: skip
set: kms_vblank
pipe-E-query-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked:
result: skip
set: kms_vblank
pipe-E-query-forked-busy:
result: skip
set: kms_vblank
pipe-E-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked-hang:
result: skip
set: kms_vblank
pipe-E-query-idle:
result: skip
set: kms_vblank
pipe-E-query-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-E-wait-busy:
result: skip
set: kms_vblank
pipe-E-wait-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked-hang:
result: skip
set: kms_vblank
pipe-E-wait-idle:
result: skip
set: kms_vblank
pipe-E-wait-idle-hang:
result: skip
set: kms_vblank
pipe-F-accuracy-idle:
result: skip
set: kms_vblank
pipe-F-query-busy:
result: skip
set: kms_vblank
pipe-F-query-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked:
result: skip
set: kms_vblank
pipe-F-query-forked-busy:
result: skip
set: kms_vblank
pipe-F-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked-hang:
result: skip
set: kms_vblank
pipe-F-query-idle:
result: skip
set: kms_vblank
pipe-F-query-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-F-wait-busy:
result: skip
set: kms_vblank
pipe-F-wait-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked-hang:
result: skip
set: kms_vblank
pipe-F-wait-idle:
result: skip
set: kms_vblank
pipe-F-wait-idle-hang:
result: skip
set: kms_vblank
pipe-G-accuracy-idle:
result: skip
set: kms_vblank
pipe-G-query-busy:
result: skip
set: kms_vblank
pipe-G-query-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked:
result: skip
set: kms_vblank
pipe-G-query-forked-busy:
result: skip
set: kms_vblank
pipe-G-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked-hang:
result: skip
set: kms_vblank
pipe-G-query-idle:
result: skip
set: kms_vblank
pipe-G-query-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-G-wait-busy:
result: skip
set: kms_vblank
pipe-G-wait-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked-hang:
result: skip
set: kms_vblank
pipe-G-wait-idle:
result: skip
set: kms_vblank
pipe-G-wait-idle-hang:
result: skip
set: kms_vblank
pipe-H-accuracy-idle:
result: skip
set: kms_vblank
pipe-H-query-busy:
result: skip
set: kms_vblank
pipe-H-query-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked:
result: skip
set: kms_vblank
pipe-H-query-forked-busy:
result: skip
set: kms_vblank
pipe-H-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked-hang:
result: skip
set: kms_vblank
pipe-H-query-idle:
result: skip
set: kms_vblank
pipe-H-query-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-H-wait-busy:
result: skip
set: kms_vblank
pipe-H-wait-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked-hang:
result: skip
set: kms_vblank
pipe-H-wait-idle:
result: skip
set: kms_vblank
pipe-H-wait-idle-hang:
result: skip
set: kms_vblank
plane-cursor-legacy:
result: skip
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: skip
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: skip
set: kms_atomic
plane-primary-legacy:
result: skip
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
short-buffer-block:
result: skip
set: drm_read
short-buffer-nonblock:
result: skip
set: drm_read
short-buffer-wakeup:
result: skip
set: drm_read
size-max:
result: skip
set: kms_addfb_basic
small-bo:
result: skip
set: kms_addfb_basic
test-only:
result: skip
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: skip
set: kms_addfb_basic
too-wide:
result: skip
set: kms_addfb_basic
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
13936 22:18:38.629458 end: 3.1 lava-test-shell (duration 00:00:14) [common]
13937 22:18:38.629817 end: 3 lava-test-retry (duration 00:00:14) [common]
13938 22:18:38.630146 start: 4 finalize (timeout 00:06:51) [common]
13939 22:18:38.630465 start: 4.1 power-off (timeout 00:00:30) [common]
13940 22:18:38.631011 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-2' '--port=1' '--command=off'
13941 22:18:38.730117 >> Command sent successfully.
13942 22:18:38.736172 Returned 0 in 0 seconds
13943 22:18:38.837239 end: 4.1 power-off (duration 00:00:00) [common]
13945 22:18:38.838788 start: 4.2 read-feedback (timeout 00:06:50) [common]
13946 22:18:38.840244 Listened to connection for namespace 'common' for up to 1s
13947 22:18:39.840892 Finalising connection for namespace 'common'
13948 22:18:39.841516 Disconnecting from shell: Finalise
13949 22:18:39.841910 / #
13950 22:18:39.942926 end: 4.2 read-feedback (duration 00:00:01) [common]
13951 22:18:39.943850 end: 4 finalize (duration 00:00:01) [common]
13952 22:18:39.944583 Cleaning after the job
13953 22:18:39.945073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/ramdisk
13954 22:18:39.970364 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/kernel
13955 22:18:39.982896 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/dtb
13956 22:18:39.983209 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10583909/tftp-deploy-im2kix39/modules
13957 22:18:39.991330 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10583909
13958 22:18:40.087164 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10583909
13959 22:18:40.087743 Job finished correctly